forked from achamaikin/CCSModuleSW30Web
52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
/* USER CODE BEGIN Header */
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "dma.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/*----------------------------------------------------------------------------*/
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/* Configure DMA */
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/*----------------------------------------------------------------------------*/
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/**
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* Enable DMA controller clock
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*/
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void MX_DMA_Init(void)
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{
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/* DMA controller clock enable */
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__HAL_RCC_DMA1_CLK_ENABLE();
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/* DMA interrupt init */
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/* DMA1_Channel1_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 1, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
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/* DMA1_Channel2_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 4, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
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/* DMA1_Channel3_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 1, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
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/* DMA1_Channel6_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 1, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn);
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/* DMA1_Channel7_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 4, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
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}
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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