GbTModuleSW30Web.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e8 08008000 08008000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000e288 080081e8 080081e8 000011e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000b84 08016470 08016470 0000f470 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 08016ff4 08016ff4 00011240 2**0 CONTENTS 4 .ARM 00000008 08016ff4 08016ff4 0000fff4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 08016ffc 08016ffc 00011240 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 08016ffc 08016ffc 0000fffc 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .fini_array 00000004 08017000 08017000 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 8 .data 00000240 20000000 08017004 00011000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 00000d70 20000240 08017244 00011240 2**3 ALLOC 10 ._user_heap_stack 00000600 20000fb0 08017244 00011fb0 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 00011240 2**0 CONTENTS, READONLY 12 .debug_info 0001c185 00000000 00000000 00011269 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 0000586d 00000000 00000000 0002d3ee 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00001768 00000000 00000000 00032c60 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 000011db 00000000 00000000 000343c8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 00026df6 00000000 00000000 000355a3 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001e8a1 00000000 00000000 0005c399 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000c96c1 00000000 00000000 0007ac3a 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 001442fb 2**0 CONTENTS, READONLY 20 .debug_frame 00006fb8 00000000 00000000 00144340 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 0000006e 00000000 00000000 0014b2f8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080081e8 <__do_global_dtors_aux>: 80081e8: b510 push {r4, lr} 80081ea: 4c05 ldr r4, [pc, #20] @ (8008200 <__do_global_dtors_aux+0x18>) 80081ec: 7823 ldrb r3, [r4, #0] 80081ee: b933 cbnz r3, 80081fe <__do_global_dtors_aux+0x16> 80081f0: 4b04 ldr r3, [pc, #16] @ (8008204 <__do_global_dtors_aux+0x1c>) 80081f2: b113 cbz r3, 80081fa <__do_global_dtors_aux+0x12> 80081f4: 4804 ldr r0, [pc, #16] @ (8008208 <__do_global_dtors_aux+0x20>) 80081f6: f3af 8000 nop.w 80081fa: 2301 movs r3, #1 80081fc: 7023 strb r3, [r4, #0] 80081fe: bd10 pop {r4, pc} 8008200: 20000240 .word 0x20000240 8008204: 00000000 .word 0x00000000 8008208: 08016458 .word 0x08016458 0800820c : 800820c: b508 push {r3, lr} 800820e: 4b03 ldr r3, [pc, #12] @ (800821c ) 8008210: b11b cbz r3, 800821a 8008212: 4903 ldr r1, [pc, #12] @ (8008220 ) 8008214: 4803 ldr r0, [pc, #12] @ (8008224 ) 8008216: f3af 8000 nop.w 800821a: bd08 pop {r3, pc} 800821c: 00000000 .word 0x00000000 8008220: 20000244 .word 0x20000244 8008224: 08016458 .word 0x08016458 08008228 : 8008228: 4603 mov r3, r0 800822a: f813 2b01 ldrb.w r2, [r3], #1 800822e: 2a00 cmp r2, #0 8008230: d1fb bne.n 800822a 8008232: 1a18 subs r0, r3, r0 8008234: 3801 subs r0, #1 8008236: 4770 bx lr 08008238 <__aeabi_drsub>: 8008238: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 800823c: e002 b.n 8008244 <__adddf3> 800823e: bf00 nop 08008240 <__aeabi_dsub>: 8008240: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 08008244 <__adddf3>: 8008244: b530 push {r4, r5, lr} 8008246: ea4f 0441 mov.w r4, r1, lsl #1 800824a: ea4f 0543 mov.w r5, r3, lsl #1 800824e: ea94 0f05 teq r4, r5 8008252: bf08 it eq 8008254: ea90 0f02 teqeq r0, r2 8008258: bf1f itttt ne 800825a: ea54 0c00 orrsne.w ip, r4, r0 800825e: ea55 0c02 orrsne.w ip, r5, r2 8008262: ea7f 5c64 mvnsne.w ip, r4, asr #21 8008266: ea7f 5c65 mvnsne.w ip, r5, asr #21 800826a: f000 80e2 beq.w 8008432 <__adddf3+0x1ee> 800826e: ea4f 5454 mov.w r4, r4, lsr #21 8008272: ebd4 5555 rsbs r5, r4, r5, lsr #21 8008276: bfb8 it lt 8008278: 426d neglt r5, r5 800827a: dd0c ble.n 8008296 <__adddf3+0x52> 800827c: 442c add r4, r5 800827e: ea80 0202 eor.w r2, r0, r2 8008282: ea81 0303 eor.w r3, r1, r3 8008286: ea82 0000 eor.w r0, r2, r0 800828a: ea83 0101 eor.w r1, r3, r1 800828e: ea80 0202 eor.w r2, r0, r2 8008292: ea81 0303 eor.w r3, r1, r3 8008296: 2d36 cmp r5, #54 @ 0x36 8008298: bf88 it hi 800829a: bd30 pophi {r4, r5, pc} 800829c: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 80082a0: ea4f 3101 mov.w r1, r1, lsl #12 80082a4: f44f 1c80 mov.w ip, #1048576 @ 0x100000 80082a8: ea4c 3111 orr.w r1, ip, r1, lsr #12 80082ac: d002 beq.n 80082b4 <__adddf3+0x70> 80082ae: 4240 negs r0, r0 80082b0: eb61 0141 sbc.w r1, r1, r1, lsl #1 80082b4: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 80082b8: ea4f 3303 mov.w r3, r3, lsl #12 80082bc: ea4c 3313 orr.w r3, ip, r3, lsr #12 80082c0: d002 beq.n 80082c8 <__adddf3+0x84> 80082c2: 4252 negs r2, r2 80082c4: eb63 0343 sbc.w r3, r3, r3, lsl #1 80082c8: ea94 0f05 teq r4, r5 80082cc: f000 80a7 beq.w 800841e <__adddf3+0x1da> 80082d0: f1a4 0401 sub.w r4, r4, #1 80082d4: f1d5 0e20 rsbs lr, r5, #32 80082d8: db0d blt.n 80082f6 <__adddf3+0xb2> 80082da: fa02 fc0e lsl.w ip, r2, lr 80082de: fa22 f205 lsr.w r2, r2, r5 80082e2: 1880 adds r0, r0, r2 80082e4: f141 0100 adc.w r1, r1, #0 80082e8: fa03 f20e lsl.w r2, r3, lr 80082ec: 1880 adds r0, r0, r2 80082ee: fa43 f305 asr.w r3, r3, r5 80082f2: 4159 adcs r1, r3 80082f4: e00e b.n 8008314 <__adddf3+0xd0> 80082f6: f1a5 0520 sub.w r5, r5, #32 80082fa: f10e 0e20 add.w lr, lr, #32 80082fe: 2a01 cmp r2, #1 8008300: fa03 fc0e lsl.w ip, r3, lr 8008304: bf28 it cs 8008306: f04c 0c02 orrcs.w ip, ip, #2 800830a: fa43 f305 asr.w r3, r3, r5 800830e: 18c0 adds r0, r0, r3 8008310: eb51 71e3 adcs.w r1, r1, r3, asr #31 8008314: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8008318: d507 bpl.n 800832a <__adddf3+0xe6> 800831a: f04f 0e00 mov.w lr, #0 800831e: f1dc 0c00 rsbs ip, ip, #0 8008322: eb7e 0000 sbcs.w r0, lr, r0 8008326: eb6e 0101 sbc.w r1, lr, r1 800832a: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 800832e: d31b bcc.n 8008368 <__adddf3+0x124> 8008330: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 8008334: d30c bcc.n 8008350 <__adddf3+0x10c> 8008336: 0849 lsrs r1, r1, #1 8008338: ea5f 0030 movs.w r0, r0, rrx 800833c: ea4f 0c3c mov.w ip, ip, rrx 8008340: f104 0401 add.w r4, r4, #1 8008344: ea4f 5244 mov.w r2, r4, lsl #21 8008348: f512 0f80 cmn.w r2, #4194304 @ 0x400000 800834c: f080 809a bcs.w 8008484 <__adddf3+0x240> 8008350: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8008354: bf08 it eq 8008356: ea5f 0c50 movseq.w ip, r0, lsr #1 800835a: f150 0000 adcs.w r0, r0, #0 800835e: eb41 5104 adc.w r1, r1, r4, lsl #20 8008362: ea41 0105 orr.w r1, r1, r5 8008366: bd30 pop {r4, r5, pc} 8008368: ea5f 0c4c movs.w ip, ip, lsl #1 800836c: 4140 adcs r0, r0 800836e: eb41 0101 adc.w r1, r1, r1 8008372: 3c01 subs r4, #1 8008374: bf28 it cs 8008376: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 800837a: d2e9 bcs.n 8008350 <__adddf3+0x10c> 800837c: f091 0f00 teq r1, #0 8008380: bf04 itt eq 8008382: 4601 moveq r1, r0 8008384: 2000 moveq r0, #0 8008386: fab1 f381 clz r3, r1 800838a: bf08 it eq 800838c: 3320 addeq r3, #32 800838e: f1a3 030b sub.w r3, r3, #11 8008392: f1b3 0220 subs.w r2, r3, #32 8008396: da0c bge.n 80083b2 <__adddf3+0x16e> 8008398: 320c adds r2, #12 800839a: dd08 ble.n 80083ae <__adddf3+0x16a> 800839c: f102 0c14 add.w ip, r2, #20 80083a0: f1c2 020c rsb r2, r2, #12 80083a4: fa01 f00c lsl.w r0, r1, ip 80083a8: fa21 f102 lsr.w r1, r1, r2 80083ac: e00c b.n 80083c8 <__adddf3+0x184> 80083ae: f102 0214 add.w r2, r2, #20 80083b2: bfd8 it le 80083b4: f1c2 0c20 rsble ip, r2, #32 80083b8: fa01 f102 lsl.w r1, r1, r2 80083bc: fa20 fc0c lsr.w ip, r0, ip 80083c0: bfdc itt le 80083c2: ea41 010c orrle.w r1, r1, ip 80083c6: 4090 lslle r0, r2 80083c8: 1ae4 subs r4, r4, r3 80083ca: bfa2 ittt ge 80083cc: eb01 5104 addge.w r1, r1, r4, lsl #20 80083d0: 4329 orrge r1, r5 80083d2: bd30 popge {r4, r5, pc} 80083d4: ea6f 0404 mvn.w r4, r4 80083d8: 3c1f subs r4, #31 80083da: da1c bge.n 8008416 <__adddf3+0x1d2> 80083dc: 340c adds r4, #12 80083de: dc0e bgt.n 80083fe <__adddf3+0x1ba> 80083e0: f104 0414 add.w r4, r4, #20 80083e4: f1c4 0220 rsb r2, r4, #32 80083e8: fa20 f004 lsr.w r0, r0, r4 80083ec: fa01 f302 lsl.w r3, r1, r2 80083f0: ea40 0003 orr.w r0, r0, r3 80083f4: fa21 f304 lsr.w r3, r1, r4 80083f8: ea45 0103 orr.w r1, r5, r3 80083fc: bd30 pop {r4, r5, pc} 80083fe: f1c4 040c rsb r4, r4, #12 8008402: f1c4 0220 rsb r2, r4, #32 8008406: fa20 f002 lsr.w r0, r0, r2 800840a: fa01 f304 lsl.w r3, r1, r4 800840e: ea40 0003 orr.w r0, r0, r3 8008412: 4629 mov r1, r5 8008414: bd30 pop {r4, r5, pc} 8008416: fa21 f004 lsr.w r0, r1, r4 800841a: 4629 mov r1, r5 800841c: bd30 pop {r4, r5, pc} 800841e: f094 0f00 teq r4, #0 8008422: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 8008426: bf06 itte eq 8008428: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 800842c: 3401 addeq r4, #1 800842e: 3d01 subne r5, #1 8008430: e74e b.n 80082d0 <__adddf3+0x8c> 8008432: ea7f 5c64 mvns.w ip, r4, asr #21 8008436: bf18 it ne 8008438: ea7f 5c65 mvnsne.w ip, r5, asr #21 800843c: d029 beq.n 8008492 <__adddf3+0x24e> 800843e: ea94 0f05 teq r4, r5 8008442: bf08 it eq 8008444: ea90 0f02 teqeq r0, r2 8008448: d005 beq.n 8008456 <__adddf3+0x212> 800844a: ea54 0c00 orrs.w ip, r4, r0 800844e: bf04 itt eq 8008450: 4619 moveq r1, r3 8008452: 4610 moveq r0, r2 8008454: bd30 pop {r4, r5, pc} 8008456: ea91 0f03 teq r1, r3 800845a: bf1e ittt ne 800845c: 2100 movne r1, #0 800845e: 2000 movne r0, #0 8008460: bd30 popne {r4, r5, pc} 8008462: ea5f 5c54 movs.w ip, r4, lsr #21 8008466: d105 bne.n 8008474 <__adddf3+0x230> 8008468: 0040 lsls r0, r0, #1 800846a: 4149 adcs r1, r1 800846c: bf28 it cs 800846e: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 8008472: bd30 pop {r4, r5, pc} 8008474: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 8008478: bf3c itt cc 800847a: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 800847e: bd30 popcc {r4, r5, pc} 8008480: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8008484: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 8008488: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 800848c: f04f 0000 mov.w r0, #0 8008490: bd30 pop {r4, r5, pc} 8008492: ea7f 5c64 mvns.w ip, r4, asr #21 8008496: bf1a itte ne 8008498: 4619 movne r1, r3 800849a: 4610 movne r0, r2 800849c: ea7f 5c65 mvnseq.w ip, r5, asr #21 80084a0: bf1c itt ne 80084a2: 460b movne r3, r1 80084a4: 4602 movne r2, r0 80084a6: ea50 3401 orrs.w r4, r0, r1, lsl #12 80084aa: bf06 itte eq 80084ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80084b0: ea91 0f03 teqeq r1, r3 80084b4: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 80084b8: bd30 pop {r4, r5, pc} 80084ba: bf00 nop 080084bc <__aeabi_ui2d>: 80084bc: f090 0f00 teq r0, #0 80084c0: bf04 itt eq 80084c2: 2100 moveq r1, #0 80084c4: 4770 bxeq lr 80084c6: b530 push {r4, r5, lr} 80084c8: f44f 6480 mov.w r4, #1024 @ 0x400 80084cc: f104 0432 add.w r4, r4, #50 @ 0x32 80084d0: f04f 0500 mov.w r5, #0 80084d4: f04f 0100 mov.w r1, #0 80084d8: e750 b.n 800837c <__adddf3+0x138> 80084da: bf00 nop 080084dc <__aeabi_i2d>: 80084dc: f090 0f00 teq r0, #0 80084e0: bf04 itt eq 80084e2: 2100 moveq r1, #0 80084e4: 4770 bxeq lr 80084e6: b530 push {r4, r5, lr} 80084e8: f44f 6480 mov.w r4, #1024 @ 0x400 80084ec: f104 0432 add.w r4, r4, #50 @ 0x32 80084f0: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 80084f4: bf48 it mi 80084f6: 4240 negmi r0, r0 80084f8: f04f 0100 mov.w r1, #0 80084fc: e73e b.n 800837c <__adddf3+0x138> 80084fe: bf00 nop 08008500 <__aeabi_f2d>: 8008500: 0042 lsls r2, r0, #1 8008502: ea4f 01e2 mov.w r1, r2, asr #3 8008506: ea4f 0131 mov.w r1, r1, rrx 800850a: ea4f 7002 mov.w r0, r2, lsl #28 800850e: bf1f itttt ne 8008510: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 8008514: f093 4f7f teqne r3, #4278190080 @ 0xff000000 8008518: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 800851c: 4770 bxne lr 800851e: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 8008522: bf08 it eq 8008524: 4770 bxeq lr 8008526: f093 4f7f teq r3, #4278190080 @ 0xff000000 800852a: bf04 itt eq 800852c: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 8008530: 4770 bxeq lr 8008532: b530 push {r4, r5, lr} 8008534: f44f 7460 mov.w r4, #896 @ 0x380 8008538: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 800853c: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 8008540: e71c b.n 800837c <__adddf3+0x138> 8008542: bf00 nop 08008544 <__aeabi_ul2d>: 8008544: ea50 0201 orrs.w r2, r0, r1 8008548: bf08 it eq 800854a: 4770 bxeq lr 800854c: b530 push {r4, r5, lr} 800854e: f04f 0500 mov.w r5, #0 8008552: e00a b.n 800856a <__aeabi_l2d+0x16> 08008554 <__aeabi_l2d>: 8008554: ea50 0201 orrs.w r2, r0, r1 8008558: bf08 it eq 800855a: 4770 bxeq lr 800855c: b530 push {r4, r5, lr} 800855e: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 8008562: d502 bpl.n 800856a <__aeabi_l2d+0x16> 8008564: 4240 negs r0, r0 8008566: eb61 0141 sbc.w r1, r1, r1, lsl #1 800856a: f44f 6480 mov.w r4, #1024 @ 0x400 800856e: f104 0432 add.w r4, r4, #50 @ 0x32 8008572: ea5f 5c91 movs.w ip, r1, lsr #22 8008576: f43f aed8 beq.w 800832a <__adddf3+0xe6> 800857a: f04f 0203 mov.w r2, #3 800857e: ea5f 0cdc movs.w ip, ip, lsr #3 8008582: bf18 it ne 8008584: 3203 addne r2, #3 8008586: ea5f 0cdc movs.w ip, ip, lsr #3 800858a: bf18 it ne 800858c: 3203 addne r2, #3 800858e: eb02 02dc add.w r2, r2, ip, lsr #3 8008592: f1c2 0320 rsb r3, r2, #32 8008596: fa00 fc03 lsl.w ip, r0, r3 800859a: fa20 f002 lsr.w r0, r0, r2 800859e: fa01 fe03 lsl.w lr, r1, r3 80085a2: ea40 000e orr.w r0, r0, lr 80085a6: fa21 f102 lsr.w r1, r1, r2 80085aa: 4414 add r4, r2 80085ac: e6bd b.n 800832a <__adddf3+0xe6> 80085ae: bf00 nop 080085b0 <__aeabi_dmul>: 80085b0: b570 push {r4, r5, r6, lr} 80085b2: f04f 0cff mov.w ip, #255 @ 0xff 80085b6: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 80085ba: ea1c 5411 ands.w r4, ip, r1, lsr #20 80085be: bf1d ittte ne 80085c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80085c4: ea94 0f0c teqne r4, ip 80085c8: ea95 0f0c teqne r5, ip 80085cc: f000 f8de bleq 800878c <__aeabi_dmul+0x1dc> 80085d0: 442c add r4, r5 80085d2: ea81 0603 eor.w r6, r1, r3 80085d6: ea21 514c bic.w r1, r1, ip, lsl #21 80085da: ea23 534c bic.w r3, r3, ip, lsl #21 80085de: ea50 3501 orrs.w r5, r0, r1, lsl #12 80085e2: bf18 it ne 80085e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80085e8: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 80085ec: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 80085f0: d038 beq.n 8008664 <__aeabi_dmul+0xb4> 80085f2: fba0 ce02 umull ip, lr, r0, r2 80085f6: f04f 0500 mov.w r5, #0 80085fa: fbe1 e502 umlal lr, r5, r1, r2 80085fe: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 8008602: fbe0 e503 umlal lr, r5, r0, r3 8008606: f04f 0600 mov.w r6, #0 800860a: fbe1 5603 umlal r5, r6, r1, r3 800860e: f09c 0f00 teq ip, #0 8008612: bf18 it ne 8008614: f04e 0e01 orrne.w lr, lr, #1 8008618: f1a4 04ff sub.w r4, r4, #255 @ 0xff 800861c: f5b6 7f00 cmp.w r6, #512 @ 0x200 8008620: f564 7440 sbc.w r4, r4, #768 @ 0x300 8008624: d204 bcs.n 8008630 <__aeabi_dmul+0x80> 8008626: ea5f 0e4e movs.w lr, lr, lsl #1 800862a: 416d adcs r5, r5 800862c: eb46 0606 adc.w r6, r6, r6 8008630: ea42 21c6 orr.w r1, r2, r6, lsl #11 8008634: ea41 5155 orr.w r1, r1, r5, lsr #21 8008638: ea4f 20c5 mov.w r0, r5, lsl #11 800863c: ea40 505e orr.w r0, r0, lr, lsr #21 8008640: ea4f 2ece mov.w lr, lr, lsl #11 8008644: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8008648: bf88 it hi 800864a: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 800864e: d81e bhi.n 800868e <__aeabi_dmul+0xde> 8008650: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 8008654: bf08 it eq 8008656: ea5f 0e50 movseq.w lr, r0, lsr #1 800865a: f150 0000 adcs.w r0, r0, #0 800865e: eb41 5104 adc.w r1, r1, r4, lsl #20 8008662: bd70 pop {r4, r5, r6, pc} 8008664: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 8008668: ea46 0101 orr.w r1, r6, r1 800866c: ea40 0002 orr.w r0, r0, r2 8008670: ea81 0103 eor.w r1, r1, r3 8008674: ebb4 045c subs.w r4, r4, ip, lsr #1 8008678: bfc2 ittt gt 800867a: ebd4 050c rsbsgt r5, r4, ip 800867e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8008682: bd70 popgt {r4, r5, r6, pc} 8008684: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008688: f04f 0e00 mov.w lr, #0 800868c: 3c01 subs r4, #1 800868e: f300 80ab bgt.w 80087e8 <__aeabi_dmul+0x238> 8008692: f114 0f36 cmn.w r4, #54 @ 0x36 8008696: bfde ittt le 8008698: 2000 movle r0, #0 800869a: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 800869e: bd70 pople {r4, r5, r6, pc} 80086a0: f1c4 0400 rsb r4, r4, #0 80086a4: 3c20 subs r4, #32 80086a6: da35 bge.n 8008714 <__aeabi_dmul+0x164> 80086a8: 340c adds r4, #12 80086aa: dc1b bgt.n 80086e4 <__aeabi_dmul+0x134> 80086ac: f104 0414 add.w r4, r4, #20 80086b0: f1c4 0520 rsb r5, r4, #32 80086b4: fa00 f305 lsl.w r3, r0, r5 80086b8: fa20 f004 lsr.w r0, r0, r4 80086bc: fa01 f205 lsl.w r2, r1, r5 80086c0: ea40 0002 orr.w r0, r0, r2 80086c4: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 80086c8: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 80086cc: eb10 70d3 adds.w r0, r0, r3, lsr #31 80086d0: fa21 f604 lsr.w r6, r1, r4 80086d4: eb42 0106 adc.w r1, r2, r6 80086d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80086dc: bf08 it eq 80086de: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80086e2: bd70 pop {r4, r5, r6, pc} 80086e4: f1c4 040c rsb r4, r4, #12 80086e8: f1c4 0520 rsb r5, r4, #32 80086ec: fa00 f304 lsl.w r3, r0, r4 80086f0: fa20 f005 lsr.w r0, r0, r5 80086f4: fa01 f204 lsl.w r2, r1, r4 80086f8: ea40 0002 orr.w r0, r0, r2 80086fc: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8008700: eb10 70d3 adds.w r0, r0, r3, lsr #31 8008704: f141 0100 adc.w r1, r1, #0 8008708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 800870c: bf08 it eq 800870e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8008712: bd70 pop {r4, r5, r6, pc} 8008714: f1c4 0520 rsb r5, r4, #32 8008718: fa00 f205 lsl.w r2, r0, r5 800871c: ea4e 0e02 orr.w lr, lr, r2 8008720: fa20 f304 lsr.w r3, r0, r4 8008724: fa01 f205 lsl.w r2, r1, r5 8008728: ea43 0302 orr.w r3, r3, r2 800872c: fa21 f004 lsr.w r0, r1, r4 8008730: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8008734: fa21 f204 lsr.w r2, r1, r4 8008738: ea20 0002 bic.w r0, r0, r2 800873c: eb00 70d3 add.w r0, r0, r3, lsr #31 8008740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8008744: bf08 it eq 8008746: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800874a: bd70 pop {r4, r5, r6, pc} 800874c: f094 0f00 teq r4, #0 8008750: d10f bne.n 8008772 <__aeabi_dmul+0x1c2> 8008752: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 8008756: 0040 lsls r0, r0, #1 8008758: eb41 0101 adc.w r1, r1, r1 800875c: f411 1f80 tst.w r1, #1048576 @ 0x100000 8008760: bf08 it eq 8008762: 3c01 subeq r4, #1 8008764: d0f7 beq.n 8008756 <__aeabi_dmul+0x1a6> 8008766: ea41 0106 orr.w r1, r1, r6 800876a: f095 0f00 teq r5, #0 800876e: bf18 it ne 8008770: 4770 bxne lr 8008772: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 8008776: 0052 lsls r2, r2, #1 8008778: eb43 0303 adc.w r3, r3, r3 800877c: f413 1f80 tst.w r3, #1048576 @ 0x100000 8008780: bf08 it eq 8008782: 3d01 subeq r5, #1 8008784: d0f7 beq.n 8008776 <__aeabi_dmul+0x1c6> 8008786: ea43 0306 orr.w r3, r3, r6 800878a: 4770 bx lr 800878c: ea94 0f0c teq r4, ip 8008790: ea0c 5513 and.w r5, ip, r3, lsr #20 8008794: bf18 it ne 8008796: ea95 0f0c teqne r5, ip 800879a: d00c beq.n 80087b6 <__aeabi_dmul+0x206> 800879c: ea50 0641 orrs.w r6, r0, r1, lsl #1 80087a0: bf18 it ne 80087a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80087a6: d1d1 bne.n 800874c <__aeabi_dmul+0x19c> 80087a8: ea81 0103 eor.w r1, r1, r3 80087ac: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80087b0: f04f 0000 mov.w r0, #0 80087b4: bd70 pop {r4, r5, r6, pc} 80087b6: ea50 0641 orrs.w r6, r0, r1, lsl #1 80087ba: bf06 itte eq 80087bc: 4610 moveq r0, r2 80087be: 4619 moveq r1, r3 80087c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80087c4: d019 beq.n 80087fa <__aeabi_dmul+0x24a> 80087c6: ea94 0f0c teq r4, ip 80087ca: d102 bne.n 80087d2 <__aeabi_dmul+0x222> 80087cc: ea50 3601 orrs.w r6, r0, r1, lsl #12 80087d0: d113 bne.n 80087fa <__aeabi_dmul+0x24a> 80087d2: ea95 0f0c teq r5, ip 80087d6: d105 bne.n 80087e4 <__aeabi_dmul+0x234> 80087d8: ea52 3603 orrs.w r6, r2, r3, lsl #12 80087dc: bf1c itt ne 80087de: 4610 movne r0, r2 80087e0: 4619 movne r1, r3 80087e2: d10a bne.n 80087fa <__aeabi_dmul+0x24a> 80087e4: ea81 0103 eor.w r1, r1, r3 80087e8: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80087ec: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 80087f0: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 80087f4: f04f 0000 mov.w r0, #0 80087f8: bd70 pop {r4, r5, r6, pc} 80087fa: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 80087fe: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 8008802: bd70 pop {r4, r5, r6, pc} 08008804 <__aeabi_ddiv>: 8008804: b570 push {r4, r5, r6, lr} 8008806: f04f 0cff mov.w ip, #255 @ 0xff 800880a: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 800880e: ea1c 5411 ands.w r4, ip, r1, lsr #20 8008812: bf1d ittte ne 8008814: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8008818: ea94 0f0c teqne r4, ip 800881c: ea95 0f0c teqne r5, ip 8008820: f000 f8a7 bleq 8008972 <__aeabi_ddiv+0x16e> 8008824: eba4 0405 sub.w r4, r4, r5 8008828: ea81 0e03 eor.w lr, r1, r3 800882c: ea52 3503 orrs.w r5, r2, r3, lsl #12 8008830: ea4f 3101 mov.w r1, r1, lsl #12 8008834: f000 8088 beq.w 8008948 <__aeabi_ddiv+0x144> 8008838: ea4f 3303 mov.w r3, r3, lsl #12 800883c: f04f 5580 mov.w r5, #268435456 @ 0x10000000 8008840: ea45 1313 orr.w r3, r5, r3, lsr #4 8008844: ea43 6312 orr.w r3, r3, r2, lsr #24 8008848: ea4f 2202 mov.w r2, r2, lsl #8 800884c: ea45 1511 orr.w r5, r5, r1, lsr #4 8008850: ea45 6510 orr.w r5, r5, r0, lsr #24 8008854: ea4f 2600 mov.w r6, r0, lsl #8 8008858: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000 800885c: 429d cmp r5, r3 800885e: bf08 it eq 8008860: 4296 cmpeq r6, r2 8008862: f144 04fd adc.w r4, r4, #253 @ 0xfd 8008866: f504 7440 add.w r4, r4, #768 @ 0x300 800886a: d202 bcs.n 8008872 <__aeabi_ddiv+0x6e> 800886c: 085b lsrs r3, r3, #1 800886e: ea4f 0232 mov.w r2, r2, rrx 8008872: 1ab6 subs r6, r6, r2 8008874: eb65 0503 sbc.w r5, r5, r3 8008878: 085b lsrs r3, r3, #1 800887a: ea4f 0232 mov.w r2, r2, rrx 800887e: f44f 1080 mov.w r0, #1048576 @ 0x100000 8008882: f44f 2c00 mov.w ip, #524288 @ 0x80000 8008886: ebb6 0e02 subs.w lr, r6, r2 800888a: eb75 0e03 sbcs.w lr, r5, r3 800888e: bf22 ittt cs 8008890: 1ab6 subcs r6, r6, r2 8008892: 4675 movcs r5, lr 8008894: ea40 000c orrcs.w r0, r0, ip 8008898: 085b lsrs r3, r3, #1 800889a: ea4f 0232 mov.w r2, r2, rrx 800889e: ebb6 0e02 subs.w lr, r6, r2 80088a2: eb75 0e03 sbcs.w lr, r5, r3 80088a6: bf22 ittt cs 80088a8: 1ab6 subcs r6, r6, r2 80088aa: 4675 movcs r5, lr 80088ac: ea40 005c orrcs.w r0, r0, ip, lsr #1 80088b0: 085b lsrs r3, r3, #1 80088b2: ea4f 0232 mov.w r2, r2, rrx 80088b6: ebb6 0e02 subs.w lr, r6, r2 80088ba: eb75 0e03 sbcs.w lr, r5, r3 80088be: bf22 ittt cs 80088c0: 1ab6 subcs r6, r6, r2 80088c2: 4675 movcs r5, lr 80088c4: ea40 009c orrcs.w r0, r0, ip, lsr #2 80088c8: 085b lsrs r3, r3, #1 80088ca: ea4f 0232 mov.w r2, r2, rrx 80088ce: ebb6 0e02 subs.w lr, r6, r2 80088d2: eb75 0e03 sbcs.w lr, r5, r3 80088d6: bf22 ittt cs 80088d8: 1ab6 subcs r6, r6, r2 80088da: 4675 movcs r5, lr 80088dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80088e0: ea55 0e06 orrs.w lr, r5, r6 80088e4: d018 beq.n 8008918 <__aeabi_ddiv+0x114> 80088e6: ea4f 1505 mov.w r5, r5, lsl #4 80088ea: ea45 7516 orr.w r5, r5, r6, lsr #28 80088ee: ea4f 1606 mov.w r6, r6, lsl #4 80088f2: ea4f 03c3 mov.w r3, r3, lsl #3 80088f6: ea43 7352 orr.w r3, r3, r2, lsr #29 80088fa: ea4f 02c2 mov.w r2, r2, lsl #3 80088fe: ea5f 1c1c movs.w ip, ip, lsr #4 8008902: d1c0 bne.n 8008886 <__aeabi_ddiv+0x82> 8008904: f411 1f80 tst.w r1, #1048576 @ 0x100000 8008908: d10b bne.n 8008922 <__aeabi_ddiv+0x11e> 800890a: ea41 0100 orr.w r1, r1, r0 800890e: f04f 0000 mov.w r0, #0 8008912: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000 8008916: e7b6 b.n 8008886 <__aeabi_ddiv+0x82> 8008918: f411 1f80 tst.w r1, #1048576 @ 0x100000 800891c: bf04 itt eq 800891e: 4301 orreq r1, r0 8008920: 2000 moveq r0, #0 8008922: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8008926: bf88 it hi 8008928: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 800892c: f63f aeaf bhi.w 800868e <__aeabi_dmul+0xde> 8008930: ebb5 0c03 subs.w ip, r5, r3 8008934: bf04 itt eq 8008936: ebb6 0c02 subseq.w ip, r6, r2 800893a: ea5f 0c50 movseq.w ip, r0, lsr #1 800893e: f150 0000 adcs.w r0, r0, #0 8008942: eb41 5104 adc.w r1, r1, r4, lsl #20 8008946: bd70 pop {r4, r5, r6, pc} 8008948: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000 800894c: ea4e 3111 orr.w r1, lr, r1, lsr #12 8008950: eb14 045c adds.w r4, r4, ip, lsr #1 8008954: bfc2 ittt gt 8008956: ebd4 050c rsbsgt r5, r4, ip 800895a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800895e: bd70 popgt {r4, r5, r6, pc} 8008960: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008964: f04f 0e00 mov.w lr, #0 8008968: 3c01 subs r4, #1 800896a: e690 b.n 800868e <__aeabi_dmul+0xde> 800896c: ea45 0e06 orr.w lr, r5, r6 8008970: e68d b.n 800868e <__aeabi_dmul+0xde> 8008972: ea0c 5513 and.w r5, ip, r3, lsr #20 8008976: ea94 0f0c teq r4, ip 800897a: bf08 it eq 800897c: ea95 0f0c teqeq r5, ip 8008980: f43f af3b beq.w 80087fa <__aeabi_dmul+0x24a> 8008984: ea94 0f0c teq r4, ip 8008988: d10a bne.n 80089a0 <__aeabi_ddiv+0x19c> 800898a: ea50 3401 orrs.w r4, r0, r1, lsl #12 800898e: f47f af34 bne.w 80087fa <__aeabi_dmul+0x24a> 8008992: ea95 0f0c teq r5, ip 8008996: f47f af25 bne.w 80087e4 <__aeabi_dmul+0x234> 800899a: 4610 mov r0, r2 800899c: 4619 mov r1, r3 800899e: e72c b.n 80087fa <__aeabi_dmul+0x24a> 80089a0: ea95 0f0c teq r5, ip 80089a4: d106 bne.n 80089b4 <__aeabi_ddiv+0x1b0> 80089a6: ea52 3503 orrs.w r5, r2, r3, lsl #12 80089aa: f43f aefd beq.w 80087a8 <__aeabi_dmul+0x1f8> 80089ae: 4610 mov r0, r2 80089b0: 4619 mov r1, r3 80089b2: e722 b.n 80087fa <__aeabi_dmul+0x24a> 80089b4: ea50 0641 orrs.w r6, r0, r1, lsl #1 80089b8: bf18 it ne 80089ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80089be: f47f aec5 bne.w 800874c <__aeabi_dmul+0x19c> 80089c2: ea50 0441 orrs.w r4, r0, r1, lsl #1 80089c6: f47f af0d bne.w 80087e4 <__aeabi_dmul+0x234> 80089ca: ea52 0543 orrs.w r5, r2, r3, lsl #1 80089ce: f47f aeeb bne.w 80087a8 <__aeabi_dmul+0x1f8> 80089d2: e712 b.n 80087fa <__aeabi_dmul+0x24a> 080089d4 <__gedf2>: 80089d4: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 80089d8: e006 b.n 80089e8 <__cmpdf2+0x4> 80089da: bf00 nop 080089dc <__ledf2>: 80089dc: f04f 0c01 mov.w ip, #1 80089e0: e002 b.n 80089e8 <__cmpdf2+0x4> 80089e2: bf00 nop 080089e4 <__cmpdf2>: 80089e4: f04f 0c01 mov.w ip, #1 80089e8: f84d cd04 str.w ip, [sp, #-4]! 80089ec: ea4f 0c41 mov.w ip, r1, lsl #1 80089f0: ea7f 5c6c mvns.w ip, ip, asr #21 80089f4: ea4f 0c43 mov.w ip, r3, lsl #1 80089f8: bf18 it ne 80089fa: ea7f 5c6c mvnsne.w ip, ip, asr #21 80089fe: d01b beq.n 8008a38 <__cmpdf2+0x54> 8008a00: b001 add sp, #4 8008a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8008a06: bf0c ite eq 8008a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8008a0c: ea91 0f03 teqne r1, r3 8008a10: bf02 ittt eq 8008a12: ea90 0f02 teqeq r0, r2 8008a16: 2000 moveq r0, #0 8008a18: 4770 bxeq lr 8008a1a: f110 0f00 cmn.w r0, #0 8008a1e: ea91 0f03 teq r1, r3 8008a22: bf58 it pl 8008a24: 4299 cmppl r1, r3 8008a26: bf08 it eq 8008a28: 4290 cmpeq r0, r2 8008a2a: bf2c ite cs 8008a2c: 17d8 asrcs r0, r3, #31 8008a2e: ea6f 70e3 mvncc.w r0, r3, asr #31 8008a32: f040 0001 orr.w r0, r0, #1 8008a36: 4770 bx lr 8008a38: ea4f 0c41 mov.w ip, r1, lsl #1 8008a3c: ea7f 5c6c mvns.w ip, ip, asr #21 8008a40: d102 bne.n 8008a48 <__cmpdf2+0x64> 8008a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8008a46: d107 bne.n 8008a58 <__cmpdf2+0x74> 8008a48: ea4f 0c43 mov.w ip, r3, lsl #1 8008a4c: ea7f 5c6c mvns.w ip, ip, asr #21 8008a50: d1d6 bne.n 8008a00 <__cmpdf2+0x1c> 8008a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8008a56: d0d3 beq.n 8008a00 <__cmpdf2+0x1c> 8008a58: f85d 0b04 ldr.w r0, [sp], #4 8008a5c: 4770 bx lr 8008a5e: bf00 nop 08008a60 <__aeabi_cdrcmple>: 8008a60: 4684 mov ip, r0 8008a62: 4610 mov r0, r2 8008a64: 4662 mov r2, ip 8008a66: 468c mov ip, r1 8008a68: 4619 mov r1, r3 8008a6a: 4663 mov r3, ip 8008a6c: e000 b.n 8008a70 <__aeabi_cdcmpeq> 8008a6e: bf00 nop 08008a70 <__aeabi_cdcmpeq>: 8008a70: b501 push {r0, lr} 8008a72: f7ff ffb7 bl 80089e4 <__cmpdf2> 8008a76: 2800 cmp r0, #0 8008a78: bf48 it mi 8008a7a: f110 0f00 cmnmi.w r0, #0 8008a7e: bd01 pop {r0, pc} 08008a80 <__aeabi_dcmpeq>: 8008a80: f84d ed08 str.w lr, [sp, #-8]! 8008a84: f7ff fff4 bl 8008a70 <__aeabi_cdcmpeq> 8008a88: bf0c ite eq 8008a8a: 2001 moveq r0, #1 8008a8c: 2000 movne r0, #0 8008a8e: f85d fb08 ldr.w pc, [sp], #8 8008a92: bf00 nop 08008a94 <__aeabi_dcmplt>: 8008a94: f84d ed08 str.w lr, [sp, #-8]! 8008a98: f7ff ffea bl 8008a70 <__aeabi_cdcmpeq> 8008a9c: bf34 ite cc 8008a9e: 2001 movcc r0, #1 8008aa0: 2000 movcs r0, #0 8008aa2: f85d fb08 ldr.w pc, [sp], #8 8008aa6: bf00 nop 08008aa8 <__aeabi_dcmple>: 8008aa8: f84d ed08 str.w lr, [sp, #-8]! 8008aac: f7ff ffe0 bl 8008a70 <__aeabi_cdcmpeq> 8008ab0: bf94 ite ls 8008ab2: 2001 movls r0, #1 8008ab4: 2000 movhi r0, #0 8008ab6: f85d fb08 ldr.w pc, [sp], #8 8008aba: bf00 nop 08008abc <__aeabi_dcmpge>: 8008abc: f84d ed08 str.w lr, [sp, #-8]! 8008ac0: f7ff ffce bl 8008a60 <__aeabi_cdrcmple> 8008ac4: bf94 ite ls 8008ac6: 2001 movls r0, #1 8008ac8: 2000 movhi r0, #0 8008aca: f85d fb08 ldr.w pc, [sp], #8 8008ace: bf00 nop 08008ad0 <__aeabi_dcmpgt>: 8008ad0: f84d ed08 str.w lr, [sp, #-8]! 8008ad4: f7ff ffc4 bl 8008a60 <__aeabi_cdrcmple> 8008ad8: bf34 ite cc 8008ada: 2001 movcc r0, #1 8008adc: 2000 movcs r0, #0 8008ade: f85d fb08 ldr.w pc, [sp], #8 8008ae2: bf00 nop 08008ae4 <__aeabi_dcmpun>: 8008ae4: ea4f 0c41 mov.w ip, r1, lsl #1 8008ae8: ea7f 5c6c mvns.w ip, ip, asr #21 8008aec: d102 bne.n 8008af4 <__aeabi_dcmpun+0x10> 8008aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8008af2: d10a bne.n 8008b0a <__aeabi_dcmpun+0x26> 8008af4: ea4f 0c43 mov.w ip, r3, lsl #1 8008af8: ea7f 5c6c mvns.w ip, ip, asr #21 8008afc: d102 bne.n 8008b04 <__aeabi_dcmpun+0x20> 8008afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8008b02: d102 bne.n 8008b0a <__aeabi_dcmpun+0x26> 8008b04: f04f 0000 mov.w r0, #0 8008b08: 4770 bx lr 8008b0a: f04f 0001 mov.w r0, #1 8008b0e: 4770 bx lr 08008b10 <__aeabi_d2iz>: 8008b10: ea4f 0241 mov.w r2, r1, lsl #1 8008b14: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 8008b18: d215 bcs.n 8008b46 <__aeabi_d2iz+0x36> 8008b1a: d511 bpl.n 8008b40 <__aeabi_d2iz+0x30> 8008b1c: f46f 7378 mvn.w r3, #992 @ 0x3e0 8008b20: ebb3 5262 subs.w r2, r3, r2, asr #21 8008b24: d912 bls.n 8008b4c <__aeabi_d2iz+0x3c> 8008b26: ea4f 23c1 mov.w r3, r1, lsl #11 8008b2a: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8008b2e: ea43 5350 orr.w r3, r3, r0, lsr #21 8008b32: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8008b36: fa23 f002 lsr.w r0, r3, r2 8008b3a: bf18 it ne 8008b3c: 4240 negne r0, r0 8008b3e: 4770 bx lr 8008b40: f04f 0000 mov.w r0, #0 8008b44: 4770 bx lr 8008b46: ea50 3001 orrs.w r0, r0, r1, lsl #12 8008b4a: d105 bne.n 8008b58 <__aeabi_d2iz+0x48> 8008b4c: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 8008b50: bf08 it eq 8008b52: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 8008b56: 4770 bx lr 8008b58: f04f 0000 mov.w r0, #0 8008b5c: 4770 bx lr 8008b5e: bf00 nop 08008b60 <__aeabi_d2f>: 8008b60: ea4f 0241 mov.w r2, r1, lsl #1 8008b64: f1b2 43e0 subs.w r3, r2, #1879048192 @ 0x70000000 8008b68: bf24 itt cs 8008b6a: f5b3 1c00 subscs.w ip, r3, #2097152 @ 0x200000 8008b6e: f1dc 5cfe rsbscs ip, ip, #532676608 @ 0x1fc00000 8008b72: d90d bls.n 8008b90 <__aeabi_d2f+0x30> 8008b74: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8008b78: ea4f 02c0 mov.w r2, r0, lsl #3 8008b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29 8008b80: f1b2 4f00 cmp.w r2, #2147483648 @ 0x80000000 8008b84: eb40 0083 adc.w r0, r0, r3, lsl #2 8008b88: bf08 it eq 8008b8a: f020 0001 biceq.w r0, r0, #1 8008b8e: 4770 bx lr 8008b90: f011 4f80 tst.w r1, #1073741824 @ 0x40000000 8008b94: d121 bne.n 8008bda <__aeabi_d2f+0x7a> 8008b96: f113 7238 adds.w r2, r3, #48234496 @ 0x2e00000 8008b9a: bfbc itt lt 8008b9c: f001 4000 andlt.w r0, r1, #2147483648 @ 0x80000000 8008ba0: 4770 bxlt lr 8008ba2: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008ba6: ea4f 5252 mov.w r2, r2, lsr #21 8008baa: f1c2 0218 rsb r2, r2, #24 8008bae: f1c2 0c20 rsb ip, r2, #32 8008bb2: fa10 f30c lsls.w r3, r0, ip 8008bb6: fa20 f002 lsr.w r0, r0, r2 8008bba: bf18 it ne 8008bbc: f040 0001 orrne.w r0, r0, #1 8008bc0: ea4f 23c1 mov.w r3, r1, lsl #11 8008bc4: ea4f 23d3 mov.w r3, r3, lsr #11 8008bc8: fa03 fc0c lsl.w ip, r3, ip 8008bcc: ea40 000c orr.w r0, r0, ip 8008bd0: fa23 f302 lsr.w r3, r3, r2 8008bd4: ea4f 0343 mov.w r3, r3, lsl #1 8008bd8: e7cc b.n 8008b74 <__aeabi_d2f+0x14> 8008bda: ea7f 5362 mvns.w r3, r2, asr #21 8008bde: d107 bne.n 8008bf0 <__aeabi_d2f+0x90> 8008be0: ea50 3301 orrs.w r3, r0, r1, lsl #12 8008be4: bf1e ittt ne 8008be6: f04f 40fe movne.w r0, #2130706432 @ 0x7f000000 8008bea: f440 0040 orrne.w r0, r0, #12582912 @ 0xc00000 8008bee: 4770 bxne lr 8008bf0: f001 4000 and.w r0, r1, #2147483648 @ 0x80000000 8008bf4: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008bf8: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008bfc: 4770 bx lr 8008bfe: bf00 nop 08008c00 <__aeabi_frsub>: 8008c00: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 8008c04: e002 b.n 8008c0c <__addsf3> 8008c06: bf00 nop 08008c08 <__aeabi_fsub>: 8008c08: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 08008c0c <__addsf3>: 8008c0c: 0042 lsls r2, r0, #1 8008c0e: bf1f itttt ne 8008c10: ea5f 0341 movsne.w r3, r1, lsl #1 8008c14: ea92 0f03 teqne r2, r3 8008c18: ea7f 6c22 mvnsne.w ip, r2, asr #24 8008c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24 8008c20: d06a beq.n 8008cf8 <__addsf3+0xec> 8008c22: ea4f 6212 mov.w r2, r2, lsr #24 8008c26: ebd2 6313 rsbs r3, r2, r3, lsr #24 8008c2a: bfc1 itttt gt 8008c2c: 18d2 addgt r2, r2, r3 8008c2e: 4041 eorgt r1, r0 8008c30: 4048 eorgt r0, r1 8008c32: 4041 eorgt r1, r0 8008c34: bfb8 it lt 8008c36: 425b neglt r3, r3 8008c38: 2b19 cmp r3, #25 8008c3a: bf88 it hi 8008c3c: 4770 bxhi lr 8008c3e: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 8008c42: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008c46: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 8008c4a: bf18 it ne 8008c4c: 4240 negne r0, r0 8008c4e: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8008c52: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 8008c56: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 8008c5a: bf18 it ne 8008c5c: 4249 negne r1, r1 8008c5e: ea92 0f03 teq r2, r3 8008c62: d03f beq.n 8008ce4 <__addsf3+0xd8> 8008c64: f1a2 0201 sub.w r2, r2, #1 8008c68: fa41 fc03 asr.w ip, r1, r3 8008c6c: eb10 000c adds.w r0, r0, ip 8008c70: f1c3 0320 rsb r3, r3, #32 8008c74: fa01 f103 lsl.w r1, r1, r3 8008c78: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8008c7c: d502 bpl.n 8008c84 <__addsf3+0x78> 8008c7e: 4249 negs r1, r1 8008c80: eb60 0040 sbc.w r0, r0, r0, lsl #1 8008c84: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 8008c88: d313 bcc.n 8008cb2 <__addsf3+0xa6> 8008c8a: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 8008c8e: d306 bcc.n 8008c9e <__addsf3+0x92> 8008c90: 0840 lsrs r0, r0, #1 8008c92: ea4f 0131 mov.w r1, r1, rrx 8008c96: f102 0201 add.w r2, r2, #1 8008c9a: 2afe cmp r2, #254 @ 0xfe 8008c9c: d251 bcs.n 8008d42 <__addsf3+0x136> 8008c9e: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 8008ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23 8008ca6: bf08 it eq 8008ca8: f020 0001 biceq.w r0, r0, #1 8008cac: ea40 0003 orr.w r0, r0, r3 8008cb0: 4770 bx lr 8008cb2: 0049 lsls r1, r1, #1 8008cb4: eb40 0000 adc.w r0, r0, r0 8008cb8: 3a01 subs r2, #1 8008cba: bf28 it cs 8008cbc: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 8008cc0: d2ed bcs.n 8008c9e <__addsf3+0x92> 8008cc2: fab0 fc80 clz ip, r0 8008cc6: f1ac 0c08 sub.w ip, ip, #8 8008cca: ebb2 020c subs.w r2, r2, ip 8008cce: fa00 f00c lsl.w r0, r0, ip 8008cd2: bfaa itet ge 8008cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23 8008cd8: 4252 neglt r2, r2 8008cda: 4318 orrge r0, r3 8008cdc: bfbc itt lt 8008cde: 40d0 lsrlt r0, r2 8008ce0: 4318 orrlt r0, r3 8008ce2: 4770 bx lr 8008ce4: f092 0f00 teq r2, #0 8008ce8: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 8008cec: bf06 itte eq 8008cee: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 8008cf2: 3201 addeq r2, #1 8008cf4: 3b01 subne r3, #1 8008cf6: e7b5 b.n 8008c64 <__addsf3+0x58> 8008cf8: ea4f 0341 mov.w r3, r1, lsl #1 8008cfc: ea7f 6c22 mvns.w ip, r2, asr #24 8008d00: bf18 it ne 8008d02: ea7f 6c23 mvnsne.w ip, r3, asr #24 8008d06: d021 beq.n 8008d4c <__addsf3+0x140> 8008d08: ea92 0f03 teq r2, r3 8008d0c: d004 beq.n 8008d18 <__addsf3+0x10c> 8008d0e: f092 0f00 teq r2, #0 8008d12: bf08 it eq 8008d14: 4608 moveq r0, r1 8008d16: 4770 bx lr 8008d18: ea90 0f01 teq r0, r1 8008d1c: bf1c itt ne 8008d1e: 2000 movne r0, #0 8008d20: 4770 bxne lr 8008d22: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 8008d26: d104 bne.n 8008d32 <__addsf3+0x126> 8008d28: 0040 lsls r0, r0, #1 8008d2a: bf28 it cs 8008d2c: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 8008d30: 4770 bx lr 8008d32: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 8008d36: bf3c itt cc 8008d38: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 8008d3c: 4770 bxcc lr 8008d3e: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8008d42: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 8008d46: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008d4a: 4770 bx lr 8008d4c: ea7f 6222 mvns.w r2, r2, asr #24 8008d50: bf16 itet ne 8008d52: 4608 movne r0, r1 8008d54: ea7f 6323 mvnseq.w r3, r3, asr #24 8008d58: 4601 movne r1, r0 8008d5a: 0242 lsls r2, r0, #9 8008d5c: bf06 itte eq 8008d5e: ea5f 2341 movseq.w r3, r1, lsl #9 8008d62: ea90 0f01 teqeq r0, r1 8008d66: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 8008d6a: 4770 bx lr 08008d6c <__aeabi_ui2f>: 8008d6c: f04f 0300 mov.w r3, #0 8008d70: e004 b.n 8008d7c <__aeabi_i2f+0x8> 8008d72: bf00 nop 08008d74 <__aeabi_i2f>: 8008d74: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 8008d78: bf48 it mi 8008d7a: 4240 negmi r0, r0 8008d7c: ea5f 0c00 movs.w ip, r0 8008d80: bf08 it eq 8008d82: 4770 bxeq lr 8008d84: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 8008d88: 4601 mov r1, r0 8008d8a: f04f 0000 mov.w r0, #0 8008d8e: e01c b.n 8008dca <__aeabi_l2f+0x2a> 08008d90 <__aeabi_ul2f>: 8008d90: ea50 0201 orrs.w r2, r0, r1 8008d94: bf08 it eq 8008d96: 4770 bxeq lr 8008d98: f04f 0300 mov.w r3, #0 8008d9c: e00a b.n 8008db4 <__aeabi_l2f+0x14> 8008d9e: bf00 nop 08008da0 <__aeabi_l2f>: 8008da0: ea50 0201 orrs.w r2, r0, r1 8008da4: bf08 it eq 8008da6: 4770 bxeq lr 8008da8: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 8008dac: d502 bpl.n 8008db4 <__aeabi_l2f+0x14> 8008dae: 4240 negs r0, r0 8008db0: eb61 0141 sbc.w r1, r1, r1, lsl #1 8008db4: ea5f 0c01 movs.w ip, r1 8008db8: bf02 ittt eq 8008dba: 4684 moveq ip, r0 8008dbc: 4601 moveq r1, r0 8008dbe: 2000 moveq r0, #0 8008dc0: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 8008dc4: bf08 it eq 8008dc6: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 8008dca: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 8008dce: fabc f28c clz r2, ip 8008dd2: 3a08 subs r2, #8 8008dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23 8008dd8: db10 blt.n 8008dfc <__aeabi_l2f+0x5c> 8008dda: fa01 fc02 lsl.w ip, r1, r2 8008dde: 4463 add r3, ip 8008de0: fa00 fc02 lsl.w ip, r0, r2 8008de4: f1c2 0220 rsb r2, r2, #32 8008de8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8008dec: fa20 f202 lsr.w r2, r0, r2 8008df0: eb43 0002 adc.w r0, r3, r2 8008df4: bf08 it eq 8008df6: f020 0001 biceq.w r0, r0, #1 8008dfa: 4770 bx lr 8008dfc: f102 0220 add.w r2, r2, #32 8008e00: fa01 fc02 lsl.w ip, r1, r2 8008e04: f1c2 0220 rsb r2, r2, #32 8008e08: ea50 004c orrs.w r0, r0, ip, lsl #1 8008e0c: fa21 f202 lsr.w r2, r1, r2 8008e10: eb43 0002 adc.w r0, r3, r2 8008e14: bf08 it eq 8008e16: ea20 70dc biceq.w r0, r0, ip, lsr #31 8008e1a: 4770 bx lr 08008e1c <__aeabi_fmul>: 8008e1c: f04f 0cff mov.w ip, #255 @ 0xff 8008e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8008e24: bf1e ittt ne 8008e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8008e2a: ea92 0f0c teqne r2, ip 8008e2e: ea93 0f0c teqne r3, ip 8008e32: d06f beq.n 8008f14 <__aeabi_fmul+0xf8> 8008e34: 441a add r2, r3 8008e36: ea80 0c01 eor.w ip, r0, r1 8008e3a: 0240 lsls r0, r0, #9 8008e3c: bf18 it ne 8008e3e: ea5f 2141 movsne.w r1, r1, lsl #9 8008e42: d01e beq.n 8008e82 <__aeabi_fmul+0x66> 8008e44: f04f 6300 mov.w r3, #134217728 @ 0x8000000 8008e48: ea43 1050 orr.w r0, r3, r0, lsr #5 8008e4c: ea43 1151 orr.w r1, r3, r1, lsr #5 8008e50: fba0 3101 umull r3, r1, r0, r1 8008e54: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8008e58: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 8008e5c: bf3e ittt cc 8008e5e: 0049 lslcc r1, r1, #1 8008e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8008e64: 005b lslcc r3, r3, #1 8008e66: ea40 0001 orr.w r0, r0, r1 8008e6a: f162 027f sbc.w r2, r2, #127 @ 0x7f 8008e6e: 2afd cmp r2, #253 @ 0xfd 8008e70: d81d bhi.n 8008eae <__aeabi_fmul+0x92> 8008e72: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8008e76: eb40 50c2 adc.w r0, r0, r2, lsl #23 8008e7a: bf08 it eq 8008e7c: f020 0001 biceq.w r0, r0, #1 8008e80: 4770 bx lr 8008e82: f090 0f00 teq r0, #0 8008e86: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8008e8a: bf08 it eq 8008e8c: 0249 lsleq r1, r1, #9 8008e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9 8008e92: ea40 2051 orr.w r0, r0, r1, lsr #9 8008e96: 3a7f subs r2, #127 @ 0x7f 8008e98: bfc2 ittt gt 8008e9a: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 8008e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8008ea2: 4770 bxgt lr 8008ea4: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008ea8: f04f 0300 mov.w r3, #0 8008eac: 3a01 subs r2, #1 8008eae: dc5d bgt.n 8008f6c <__aeabi_fmul+0x150> 8008eb0: f112 0f19 cmn.w r2, #25 8008eb4: bfdc itt le 8008eb6: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 8008eba: 4770 bxle lr 8008ebc: f1c2 0200 rsb r2, r2, #0 8008ec0: 0041 lsls r1, r0, #1 8008ec2: fa21 f102 lsr.w r1, r1, r2 8008ec6: f1c2 0220 rsb r2, r2, #32 8008eca: fa00 fc02 lsl.w ip, r0, r2 8008ece: ea5f 0031 movs.w r0, r1, rrx 8008ed2: f140 0000 adc.w r0, r0, #0 8008ed6: ea53 034c orrs.w r3, r3, ip, lsl #1 8008eda: bf08 it eq 8008edc: ea20 70dc biceq.w r0, r0, ip, lsr #31 8008ee0: 4770 bx lr 8008ee2: f092 0f00 teq r2, #0 8008ee6: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 8008eea: bf02 ittt eq 8008eec: 0040 lsleq r0, r0, #1 8008eee: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 8008ef2: 3a01 subeq r2, #1 8008ef4: d0f9 beq.n 8008eea <__aeabi_fmul+0xce> 8008ef6: ea40 000c orr.w r0, r0, ip 8008efa: f093 0f00 teq r3, #0 8008efe: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8008f02: bf02 ittt eq 8008f04: 0049 lsleq r1, r1, #1 8008f06: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8008f0a: 3b01 subeq r3, #1 8008f0c: d0f9 beq.n 8008f02 <__aeabi_fmul+0xe6> 8008f0e: ea41 010c orr.w r1, r1, ip 8008f12: e78f b.n 8008e34 <__aeabi_fmul+0x18> 8008f14: ea0c 53d1 and.w r3, ip, r1, lsr #23 8008f18: ea92 0f0c teq r2, ip 8008f1c: bf18 it ne 8008f1e: ea93 0f0c teqne r3, ip 8008f22: d00a beq.n 8008f3a <__aeabi_fmul+0x11e> 8008f24: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 8008f28: bf18 it ne 8008f2a: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 8008f2e: d1d8 bne.n 8008ee2 <__aeabi_fmul+0xc6> 8008f30: ea80 0001 eor.w r0, r0, r1 8008f34: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8008f38: 4770 bx lr 8008f3a: f090 0f00 teq r0, #0 8008f3e: bf17 itett ne 8008f40: f090 4f00 teqne r0, #2147483648 @ 0x80000000 8008f44: 4608 moveq r0, r1 8008f46: f091 0f00 teqne r1, #0 8008f4a: f091 4f00 teqne r1, #2147483648 @ 0x80000000 8008f4e: d014 beq.n 8008f7a <__aeabi_fmul+0x15e> 8008f50: ea92 0f0c teq r2, ip 8008f54: d101 bne.n 8008f5a <__aeabi_fmul+0x13e> 8008f56: 0242 lsls r2, r0, #9 8008f58: d10f bne.n 8008f7a <__aeabi_fmul+0x15e> 8008f5a: ea93 0f0c teq r3, ip 8008f5e: d103 bne.n 8008f68 <__aeabi_fmul+0x14c> 8008f60: 024b lsls r3, r1, #9 8008f62: bf18 it ne 8008f64: 4608 movne r0, r1 8008f66: d108 bne.n 8008f7a <__aeabi_fmul+0x15e> 8008f68: ea80 0001 eor.w r0, r0, r1 8008f6c: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8008f70: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008f74: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008f78: 4770 bx lr 8008f7a: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008f7e: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 8008f82: 4770 bx lr 08008f84 <__aeabi_fdiv>: 8008f84: f04f 0cff mov.w ip, #255 @ 0xff 8008f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8008f8c: bf1e ittt ne 8008f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8008f92: ea92 0f0c teqne r2, ip 8008f96: ea93 0f0c teqne r3, ip 8008f9a: d069 beq.n 8009070 <__aeabi_fdiv+0xec> 8008f9c: eba2 0203 sub.w r2, r2, r3 8008fa0: ea80 0c01 eor.w ip, r0, r1 8008fa4: 0249 lsls r1, r1, #9 8008fa6: ea4f 2040 mov.w r0, r0, lsl #9 8008faa: d037 beq.n 800901c <__aeabi_fdiv+0x98> 8008fac: f04f 5380 mov.w r3, #268435456 @ 0x10000000 8008fb0: ea43 1111 orr.w r1, r3, r1, lsr #4 8008fb4: ea43 1310 orr.w r3, r3, r0, lsr #4 8008fb8: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8008fbc: 428b cmp r3, r1 8008fbe: bf38 it cc 8008fc0: 005b lslcc r3, r3, #1 8008fc2: f142 027d adc.w r2, r2, #125 @ 0x7d 8008fc6: f44f 0c00 mov.w ip, #8388608 @ 0x800000 8008fca: 428b cmp r3, r1 8008fcc: bf24 itt cs 8008fce: 1a5b subcs r3, r3, r1 8008fd0: ea40 000c orrcs.w r0, r0, ip 8008fd4: ebb3 0f51 cmp.w r3, r1, lsr #1 8008fd8: bf24 itt cs 8008fda: eba3 0351 subcs.w r3, r3, r1, lsr #1 8008fde: ea40 005c orrcs.w r0, r0, ip, lsr #1 8008fe2: ebb3 0f91 cmp.w r3, r1, lsr #2 8008fe6: bf24 itt cs 8008fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2 8008fec: ea40 009c orrcs.w r0, r0, ip, lsr #2 8008ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3 8008ff4: bf24 itt cs 8008ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3 8008ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8008ffe: 011b lsls r3, r3, #4 8009000: bf18 it ne 8009002: ea5f 1c1c movsne.w ip, ip, lsr #4 8009006: d1e0 bne.n 8008fca <__aeabi_fdiv+0x46> 8009008: 2afd cmp r2, #253 @ 0xfd 800900a: f63f af50 bhi.w 8008eae <__aeabi_fmul+0x92> 800900e: 428b cmp r3, r1 8009010: eb40 50c2 adc.w r0, r0, r2, lsl #23 8009014: bf08 it eq 8009016: f020 0001 biceq.w r0, r0, #1 800901a: 4770 bx lr 800901c: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8009020: ea4c 2050 orr.w r0, ip, r0, lsr #9 8009024: 327f adds r2, #127 @ 0x7f 8009026: bfc2 ittt gt 8009028: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 800902c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8009030: 4770 bxgt lr 8009032: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8009036: f04f 0300 mov.w r3, #0 800903a: 3a01 subs r2, #1 800903c: e737 b.n 8008eae <__aeabi_fmul+0x92> 800903e: f092 0f00 teq r2, #0 8009042: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 8009046: bf02 ittt eq 8009048: 0040 lsleq r0, r0, #1 800904a: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 800904e: 3a01 subeq r2, #1 8009050: d0f9 beq.n 8009046 <__aeabi_fdiv+0xc2> 8009052: ea40 000c orr.w r0, r0, ip 8009056: f093 0f00 teq r3, #0 800905a: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 800905e: bf02 ittt eq 8009060: 0049 lsleq r1, r1, #1 8009062: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8009066: 3b01 subeq r3, #1 8009068: d0f9 beq.n 800905e <__aeabi_fdiv+0xda> 800906a: ea41 010c orr.w r1, r1, ip 800906e: e795 b.n 8008f9c <__aeabi_fdiv+0x18> 8009070: ea0c 53d1 and.w r3, ip, r1, lsr #23 8009074: ea92 0f0c teq r2, ip 8009078: d108 bne.n 800908c <__aeabi_fdiv+0x108> 800907a: 0242 lsls r2, r0, #9 800907c: f47f af7d bne.w 8008f7a <__aeabi_fmul+0x15e> 8009080: ea93 0f0c teq r3, ip 8009084: f47f af70 bne.w 8008f68 <__aeabi_fmul+0x14c> 8009088: 4608 mov r0, r1 800908a: e776 b.n 8008f7a <__aeabi_fmul+0x15e> 800908c: ea93 0f0c teq r3, ip 8009090: d104 bne.n 800909c <__aeabi_fdiv+0x118> 8009092: 024b lsls r3, r1, #9 8009094: f43f af4c beq.w 8008f30 <__aeabi_fmul+0x114> 8009098: 4608 mov r0, r1 800909a: e76e b.n 8008f7a <__aeabi_fmul+0x15e> 800909c: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 80090a0: bf18 it ne 80090a2: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 80090a6: d1ca bne.n 800903e <__aeabi_fdiv+0xba> 80090a8: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 80090ac: f47f af5c bne.w 8008f68 <__aeabi_fmul+0x14c> 80090b0: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 80090b4: f47f af3c bne.w 8008f30 <__aeabi_fmul+0x114> 80090b8: e75f b.n 8008f7a <__aeabi_fmul+0x15e> 80090ba: bf00 nop 080090bc <__gesf2>: 80090bc: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 80090c0: e006 b.n 80090d0 <__cmpsf2+0x4> 80090c2: bf00 nop 080090c4 <__lesf2>: 80090c4: f04f 0c01 mov.w ip, #1 80090c8: e002 b.n 80090d0 <__cmpsf2+0x4> 80090ca: bf00 nop 080090cc <__cmpsf2>: 80090cc: f04f 0c01 mov.w ip, #1 80090d0: f84d cd04 str.w ip, [sp, #-4]! 80090d4: ea4f 0240 mov.w r2, r0, lsl #1 80090d8: ea4f 0341 mov.w r3, r1, lsl #1 80090dc: ea7f 6c22 mvns.w ip, r2, asr #24 80090e0: bf18 it ne 80090e2: ea7f 6c23 mvnsne.w ip, r3, asr #24 80090e6: d011 beq.n 800910c <__cmpsf2+0x40> 80090e8: b001 add sp, #4 80090ea: ea52 0c53 orrs.w ip, r2, r3, lsr #1 80090ee: bf18 it ne 80090f0: ea90 0f01 teqne r0, r1 80090f4: bf58 it pl 80090f6: ebb2 0003 subspl.w r0, r2, r3 80090fa: bf88 it hi 80090fc: 17c8 asrhi r0, r1, #31 80090fe: bf38 it cc 8009100: ea6f 70e1 mvncc.w r0, r1, asr #31 8009104: bf18 it ne 8009106: f040 0001 orrne.w r0, r0, #1 800910a: 4770 bx lr 800910c: ea7f 6c22 mvns.w ip, r2, asr #24 8009110: d102 bne.n 8009118 <__cmpsf2+0x4c> 8009112: ea5f 2c40 movs.w ip, r0, lsl #9 8009116: d105 bne.n 8009124 <__cmpsf2+0x58> 8009118: ea7f 6c23 mvns.w ip, r3, asr #24 800911c: d1e4 bne.n 80090e8 <__cmpsf2+0x1c> 800911e: ea5f 2c41 movs.w ip, r1, lsl #9 8009122: d0e1 beq.n 80090e8 <__cmpsf2+0x1c> 8009124: f85d 0b04 ldr.w r0, [sp], #4 8009128: 4770 bx lr 800912a: bf00 nop 0800912c <__aeabi_cfrcmple>: 800912c: 4684 mov ip, r0 800912e: 4608 mov r0, r1 8009130: 4661 mov r1, ip 8009132: e7ff b.n 8009134 <__aeabi_cfcmpeq> 08009134 <__aeabi_cfcmpeq>: 8009134: b50f push {r0, r1, r2, r3, lr} 8009136: f7ff ffc9 bl 80090cc <__cmpsf2> 800913a: 2800 cmp r0, #0 800913c: bf48 it mi 800913e: f110 0f00 cmnmi.w r0, #0 8009142: bd0f pop {r0, r1, r2, r3, pc} 08009144 <__aeabi_fcmpeq>: 8009144: f84d ed08 str.w lr, [sp, #-8]! 8009148: f7ff fff4 bl 8009134 <__aeabi_cfcmpeq> 800914c: bf0c ite eq 800914e: 2001 moveq r0, #1 8009150: 2000 movne r0, #0 8009152: f85d fb08 ldr.w pc, [sp], #8 8009156: bf00 nop 08009158 <__aeabi_fcmplt>: 8009158: f84d ed08 str.w lr, [sp, #-8]! 800915c: f7ff ffea bl 8009134 <__aeabi_cfcmpeq> 8009160: bf34 ite cc 8009162: 2001 movcc r0, #1 8009164: 2000 movcs r0, #0 8009166: f85d fb08 ldr.w pc, [sp], #8 800916a: bf00 nop 0800916c <__aeabi_fcmple>: 800916c: f84d ed08 str.w lr, [sp, #-8]! 8009170: f7ff ffe0 bl 8009134 <__aeabi_cfcmpeq> 8009174: bf94 ite ls 8009176: 2001 movls r0, #1 8009178: 2000 movhi r0, #0 800917a: f85d fb08 ldr.w pc, [sp], #8 800917e: bf00 nop 08009180 <__aeabi_fcmpge>: 8009180: f84d ed08 str.w lr, [sp, #-8]! 8009184: f7ff ffd2 bl 800912c <__aeabi_cfrcmple> 8009188: bf94 ite ls 800918a: 2001 movls r0, #1 800918c: 2000 movhi r0, #0 800918e: f85d fb08 ldr.w pc, [sp], #8 8009192: bf00 nop 08009194 <__aeabi_fcmpgt>: 8009194: f84d ed08 str.w lr, [sp, #-8]! 8009198: f7ff ffc8 bl 800912c <__aeabi_cfrcmple> 800919c: bf34 ite cc 800919e: 2001 movcc r0, #1 80091a0: 2000 movcs r0, #0 80091a2: f85d fb08 ldr.w pc, [sp], #8 80091a6: bf00 nop 080091a8 <__aeabi_f2iz>: 80091a8: ea4f 0240 mov.w r2, r0, lsl #1 80091ac: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 80091b0: d30f bcc.n 80091d2 <__aeabi_f2iz+0x2a> 80091b2: f04f 039e mov.w r3, #158 @ 0x9e 80091b6: ebb3 6212 subs.w r2, r3, r2, lsr #24 80091ba: d90d bls.n 80091d8 <__aeabi_f2iz+0x30> 80091bc: ea4f 2300 mov.w r3, r0, lsl #8 80091c0: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 80091c4: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 80091c8: fa23 f002 lsr.w r0, r3, r2 80091cc: bf18 it ne 80091ce: 4240 negne r0, r0 80091d0: 4770 bx lr 80091d2: f04f 0000 mov.w r0, #0 80091d6: 4770 bx lr 80091d8: f112 0f61 cmn.w r2, #97 @ 0x61 80091dc: d101 bne.n 80091e2 <__aeabi_f2iz+0x3a> 80091de: 0242 lsls r2, r0, #9 80091e0: d105 bne.n 80091ee <__aeabi_f2iz+0x46> 80091e2: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 80091e6: bf08 it eq 80091e8: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 80091ec: 4770 bx lr 80091ee: f04f 0000 mov.w r0, #0 80091f2: 4770 bx lr 080091f4 <__aeabi_ldivmod>: 80091f4: b97b cbnz r3, 8009216 <__aeabi_ldivmod+0x22> 80091f6: b972 cbnz r2, 8009216 <__aeabi_ldivmod+0x22> 80091f8: 2900 cmp r1, #0 80091fa: bfbe ittt lt 80091fc: 2000 movlt r0, #0 80091fe: f04f 4100 movlt.w r1, #2147483648 @ 0x80000000 8009202: e006 blt.n 8009212 <__aeabi_ldivmod+0x1e> 8009204: bf08 it eq 8009206: 2800 cmpeq r0, #0 8009208: bf1c itt ne 800920a: f06f 4100 mvnne.w r1, #2147483648 @ 0x80000000 800920e: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 8009212: f000 b9d7 b.w 80095c4 <__aeabi_idiv0> 8009216: f1ad 0c08 sub.w ip, sp, #8 800921a: e96d ce04 strd ip, lr, [sp, #-16]! 800921e: 2900 cmp r1, #0 8009220: db09 blt.n 8009236 <__aeabi_ldivmod+0x42> 8009222: 2b00 cmp r3, #0 8009224: db1a blt.n 800925c <__aeabi_ldivmod+0x68> 8009226: f000 f84d bl 80092c4 <__udivmoddi4> 800922a: f8dd e004 ldr.w lr, [sp, #4] 800922e: e9dd 2302 ldrd r2, r3, [sp, #8] 8009232: b004 add sp, #16 8009234: 4770 bx lr 8009236: 4240 negs r0, r0 8009238: eb61 0141 sbc.w r1, r1, r1, lsl #1 800923c: 2b00 cmp r3, #0 800923e: db1b blt.n 8009278 <__aeabi_ldivmod+0x84> 8009240: f000 f840 bl 80092c4 <__udivmoddi4> 8009244: f8dd e004 ldr.w lr, [sp, #4] 8009248: e9dd 2302 ldrd r2, r3, [sp, #8] 800924c: b004 add sp, #16 800924e: 4240 negs r0, r0 8009250: eb61 0141 sbc.w r1, r1, r1, lsl #1 8009254: 4252 negs r2, r2 8009256: eb63 0343 sbc.w r3, r3, r3, lsl #1 800925a: 4770 bx lr 800925c: 4252 negs r2, r2 800925e: eb63 0343 sbc.w r3, r3, r3, lsl #1 8009262: f000 f82f bl 80092c4 <__udivmoddi4> 8009266: f8dd e004 ldr.w lr, [sp, #4] 800926a: e9dd 2302 ldrd r2, r3, [sp, #8] 800926e: b004 add sp, #16 8009270: 4240 negs r0, r0 8009272: eb61 0141 sbc.w r1, r1, r1, lsl #1 8009276: 4770 bx lr 8009278: 4252 negs r2, r2 800927a: eb63 0343 sbc.w r3, r3, r3, lsl #1 800927e: f000 f821 bl 80092c4 <__udivmoddi4> 8009282: f8dd e004 ldr.w lr, [sp, #4] 8009286: e9dd 2302 ldrd r2, r3, [sp, #8] 800928a: b004 add sp, #16 800928c: 4252 negs r2, r2 800928e: eb63 0343 sbc.w r3, r3, r3, lsl #1 8009292: 4770 bx lr 08009294 <__aeabi_uldivmod>: 8009294: b953 cbnz r3, 80092ac <__aeabi_uldivmod+0x18> 8009296: b94a cbnz r2, 80092ac <__aeabi_uldivmod+0x18> 8009298: 2900 cmp r1, #0 800929a: bf08 it eq 800929c: 2800 cmpeq r0, #0 800929e: bf1c itt ne 80092a0: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff 80092a4: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 80092a8: f000 b98c b.w 80095c4 <__aeabi_idiv0> 80092ac: f1ad 0c08 sub.w ip, sp, #8 80092b0: e96d ce04 strd ip, lr, [sp, #-16]! 80092b4: f000 f806 bl 80092c4 <__udivmoddi4> 80092b8: f8dd e004 ldr.w lr, [sp, #4] 80092bc: e9dd 2302 ldrd r2, r3, [sp, #8] 80092c0: b004 add sp, #16 80092c2: 4770 bx lr 080092c4 <__udivmoddi4>: 80092c4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80092c8: 9d08 ldr r5, [sp, #32] 80092ca: 468e mov lr, r1 80092cc: 4604 mov r4, r0 80092ce: 4688 mov r8, r1 80092d0: 2b00 cmp r3, #0 80092d2: d14a bne.n 800936a <__udivmoddi4+0xa6> 80092d4: 428a cmp r2, r1 80092d6: 4617 mov r7, r2 80092d8: d962 bls.n 80093a0 <__udivmoddi4+0xdc> 80092da: fab2 f682 clz r6, r2 80092de: b14e cbz r6, 80092f4 <__udivmoddi4+0x30> 80092e0: f1c6 0320 rsb r3, r6, #32 80092e4: fa01 f806 lsl.w r8, r1, r6 80092e8: fa20 f303 lsr.w r3, r0, r3 80092ec: 40b7 lsls r7, r6 80092ee: ea43 0808 orr.w r8, r3, r8 80092f2: 40b4 lsls r4, r6 80092f4: ea4f 4e17 mov.w lr, r7, lsr #16 80092f8: fbb8 f1fe udiv r1, r8, lr 80092fc: fa1f fc87 uxth.w ip, r7 8009300: fb0e 8811 mls r8, lr, r1, r8 8009304: fb01 f20c mul.w r2, r1, ip 8009308: 0c23 lsrs r3, r4, #16 800930a: ea43 4308 orr.w r3, r3, r8, lsl #16 800930e: 429a cmp r2, r3 8009310: d909 bls.n 8009326 <__udivmoddi4+0x62> 8009312: 18fb adds r3, r7, r3 8009314: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff 8009318: f080 80eb bcs.w 80094f2 <__udivmoddi4+0x22e> 800931c: 429a cmp r2, r3 800931e: f240 80e8 bls.w 80094f2 <__udivmoddi4+0x22e> 8009322: 3902 subs r1, #2 8009324: 443b add r3, r7 8009326: 1a9a subs r2, r3, r2 8009328: fbb2 f0fe udiv r0, r2, lr 800932c: fb0e 2210 mls r2, lr, r0, r2 8009330: fb00 fc0c mul.w ip, r0, ip 8009334: b2a3 uxth r3, r4 8009336: ea43 4302 orr.w r3, r3, r2, lsl #16 800933a: 459c cmp ip, r3 800933c: d909 bls.n 8009352 <__udivmoddi4+0x8e> 800933e: 18fb adds r3, r7, r3 8009340: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff 8009344: f080 80d7 bcs.w 80094f6 <__udivmoddi4+0x232> 8009348: 459c cmp ip, r3 800934a: f240 80d4 bls.w 80094f6 <__udivmoddi4+0x232> 800934e: 443b add r3, r7 8009350: 3802 subs r0, #2 8009352: ea40 4001 orr.w r0, r0, r1, lsl #16 8009356: 2100 movs r1, #0 8009358: eba3 030c sub.w r3, r3, ip 800935c: b11d cbz r5, 8009366 <__udivmoddi4+0xa2> 800935e: 2200 movs r2, #0 8009360: 40f3 lsrs r3, r6 8009362: e9c5 3200 strd r3, r2, [r5] 8009366: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800936a: 428b cmp r3, r1 800936c: d905 bls.n 800937a <__udivmoddi4+0xb6> 800936e: b10d cbz r5, 8009374 <__udivmoddi4+0xb0> 8009370: e9c5 0100 strd r0, r1, [r5] 8009374: 2100 movs r1, #0 8009376: 4608 mov r0, r1 8009378: e7f5 b.n 8009366 <__udivmoddi4+0xa2> 800937a: fab3 f183 clz r1, r3 800937e: 2900 cmp r1, #0 8009380: d146 bne.n 8009410 <__udivmoddi4+0x14c> 8009382: 4573 cmp r3, lr 8009384: d302 bcc.n 800938c <__udivmoddi4+0xc8> 8009386: 4282 cmp r2, r0 8009388: f200 8108 bhi.w 800959c <__udivmoddi4+0x2d8> 800938c: 1a84 subs r4, r0, r2 800938e: eb6e 0203 sbc.w r2, lr, r3 8009392: 2001 movs r0, #1 8009394: 4690 mov r8, r2 8009396: 2d00 cmp r5, #0 8009398: d0e5 beq.n 8009366 <__udivmoddi4+0xa2> 800939a: e9c5 4800 strd r4, r8, [r5] 800939e: e7e2 b.n 8009366 <__udivmoddi4+0xa2> 80093a0: 2a00 cmp r2, #0 80093a2: f000 8091 beq.w 80094c8 <__udivmoddi4+0x204> 80093a6: fab2 f682 clz r6, r2 80093aa: 2e00 cmp r6, #0 80093ac: f040 80a5 bne.w 80094fa <__udivmoddi4+0x236> 80093b0: 1a8a subs r2, r1, r2 80093b2: 2101 movs r1, #1 80093b4: 0c03 lsrs r3, r0, #16 80093b6: ea4f 4e17 mov.w lr, r7, lsr #16 80093ba: b280 uxth r0, r0 80093bc: b2bc uxth r4, r7 80093be: fbb2 fcfe udiv ip, r2, lr 80093c2: fb0e 221c mls r2, lr, ip, r2 80093c6: ea43 4302 orr.w r3, r3, r2, lsl #16 80093ca: fb04 f20c mul.w r2, r4, ip 80093ce: 429a cmp r2, r3 80093d0: d907 bls.n 80093e2 <__udivmoddi4+0x11e> 80093d2: 18fb adds r3, r7, r3 80093d4: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff 80093d8: d202 bcs.n 80093e0 <__udivmoddi4+0x11c> 80093da: 429a cmp r2, r3 80093dc: f200 80e3 bhi.w 80095a6 <__udivmoddi4+0x2e2> 80093e0: 46c4 mov ip, r8 80093e2: 1a9b subs r3, r3, r2 80093e4: fbb3 f2fe udiv r2, r3, lr 80093e8: fb0e 3312 mls r3, lr, r2, r3 80093ec: fb02 f404 mul.w r4, r2, r4 80093f0: ea40 4303 orr.w r3, r0, r3, lsl #16 80093f4: 429c cmp r4, r3 80093f6: d907 bls.n 8009408 <__udivmoddi4+0x144> 80093f8: 18fb adds r3, r7, r3 80093fa: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff 80093fe: d202 bcs.n 8009406 <__udivmoddi4+0x142> 8009400: 429c cmp r4, r3 8009402: f200 80cd bhi.w 80095a0 <__udivmoddi4+0x2dc> 8009406: 4602 mov r2, r0 8009408: 1b1b subs r3, r3, r4 800940a: ea42 400c orr.w r0, r2, ip, lsl #16 800940e: e7a5 b.n 800935c <__udivmoddi4+0x98> 8009410: f1c1 0620 rsb r6, r1, #32 8009414: 408b lsls r3, r1 8009416: fa22 f706 lsr.w r7, r2, r6 800941a: 431f orrs r7, r3 800941c: fa2e fa06 lsr.w sl, lr, r6 8009420: ea4f 4917 mov.w r9, r7, lsr #16 8009424: fbba f8f9 udiv r8, sl, r9 8009428: fa0e fe01 lsl.w lr, lr, r1 800942c: fa20 f306 lsr.w r3, r0, r6 8009430: fb09 aa18 mls sl, r9, r8, sl 8009434: fa1f fc87 uxth.w ip, r7 8009438: ea43 030e orr.w r3, r3, lr 800943c: fa00 fe01 lsl.w lr, r0, r1 8009440: fb08 f00c mul.w r0, r8, ip 8009444: 0c1c lsrs r4, r3, #16 8009446: ea44 440a orr.w r4, r4, sl, lsl #16 800944a: 42a0 cmp r0, r4 800944c: fa02 f201 lsl.w r2, r2, r1 8009450: d90a bls.n 8009468 <__udivmoddi4+0x1a4> 8009452: 193c adds r4, r7, r4 8009454: f108 3aff add.w sl, r8, #4294967295 @ 0xffffffff 8009458: f080 809e bcs.w 8009598 <__udivmoddi4+0x2d4> 800945c: 42a0 cmp r0, r4 800945e: f240 809b bls.w 8009598 <__udivmoddi4+0x2d4> 8009462: f1a8 0802 sub.w r8, r8, #2 8009466: 443c add r4, r7 8009468: 1a24 subs r4, r4, r0 800946a: b298 uxth r0, r3 800946c: fbb4 f3f9 udiv r3, r4, r9 8009470: fb09 4413 mls r4, r9, r3, r4 8009474: fb03 fc0c mul.w ip, r3, ip 8009478: ea40 4404 orr.w r4, r0, r4, lsl #16 800947c: 45a4 cmp ip, r4 800947e: d909 bls.n 8009494 <__udivmoddi4+0x1d0> 8009480: 193c adds r4, r7, r4 8009482: f103 30ff add.w r0, r3, #4294967295 @ 0xffffffff 8009486: f080 8085 bcs.w 8009594 <__udivmoddi4+0x2d0> 800948a: 45a4 cmp ip, r4 800948c: f240 8082 bls.w 8009594 <__udivmoddi4+0x2d0> 8009490: 3b02 subs r3, #2 8009492: 443c add r4, r7 8009494: ea43 4008 orr.w r0, r3, r8, lsl #16 8009498: eba4 040c sub.w r4, r4, ip 800949c: fba0 8c02 umull r8, ip, r0, r2 80094a0: 4564 cmp r4, ip 80094a2: 4643 mov r3, r8 80094a4: 46e1 mov r9, ip 80094a6: d364 bcc.n 8009572 <__udivmoddi4+0x2ae> 80094a8: d061 beq.n 800956e <__udivmoddi4+0x2aa> 80094aa: b15d cbz r5, 80094c4 <__udivmoddi4+0x200> 80094ac: ebbe 0203 subs.w r2, lr, r3 80094b0: eb64 0409 sbc.w r4, r4, r9 80094b4: fa04 f606 lsl.w r6, r4, r6 80094b8: fa22 f301 lsr.w r3, r2, r1 80094bc: 431e orrs r6, r3 80094be: 40cc lsrs r4, r1 80094c0: e9c5 6400 strd r6, r4, [r5] 80094c4: 2100 movs r1, #0 80094c6: e74e b.n 8009366 <__udivmoddi4+0xa2> 80094c8: fbb1 fcf2 udiv ip, r1, r2 80094cc: 0c01 lsrs r1, r0, #16 80094ce: ea41 410e orr.w r1, r1, lr, lsl #16 80094d2: b280 uxth r0, r0 80094d4: ea40 4201 orr.w r2, r0, r1, lsl #16 80094d8: 463b mov r3, r7 80094da: fbb1 f1f7 udiv r1, r1, r7 80094de: 4638 mov r0, r7 80094e0: 463c mov r4, r7 80094e2: 46b8 mov r8, r7 80094e4: 46be mov lr, r7 80094e6: 2620 movs r6, #32 80094e8: eba2 0208 sub.w r2, r2, r8 80094ec: ea41 410c orr.w r1, r1, ip, lsl #16 80094f0: e765 b.n 80093be <__udivmoddi4+0xfa> 80094f2: 4601 mov r1, r0 80094f4: e717 b.n 8009326 <__udivmoddi4+0x62> 80094f6: 4610 mov r0, r2 80094f8: e72b b.n 8009352 <__udivmoddi4+0x8e> 80094fa: f1c6 0120 rsb r1, r6, #32 80094fe: fa2e fc01 lsr.w ip, lr, r1 8009502: 40b7 lsls r7, r6 8009504: fa0e fe06 lsl.w lr, lr, r6 8009508: fa20 f101 lsr.w r1, r0, r1 800950c: ea41 010e orr.w r1, r1, lr 8009510: ea4f 4e17 mov.w lr, r7, lsr #16 8009514: fbbc f8fe udiv r8, ip, lr 8009518: b2bc uxth r4, r7 800951a: fb0e cc18 mls ip, lr, r8, ip 800951e: fb08 f904 mul.w r9, r8, r4 8009522: 0c0a lsrs r2, r1, #16 8009524: ea42 420c orr.w r2, r2, ip, lsl #16 8009528: 40b0 lsls r0, r6 800952a: 4591 cmp r9, r2 800952c: ea4f 4310 mov.w r3, r0, lsr #16 8009530: b280 uxth r0, r0 8009532: d93e bls.n 80095b2 <__udivmoddi4+0x2ee> 8009534: 18ba adds r2, r7, r2 8009536: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff 800953a: d201 bcs.n 8009540 <__udivmoddi4+0x27c> 800953c: 4591 cmp r9, r2 800953e: d81f bhi.n 8009580 <__udivmoddi4+0x2bc> 8009540: eba2 0209 sub.w r2, r2, r9 8009544: fbb2 f9fe udiv r9, r2, lr 8009548: fb09 f804 mul.w r8, r9, r4 800954c: fb0e 2a19 mls sl, lr, r9, r2 8009550: b28a uxth r2, r1 8009552: ea42 420a orr.w r2, r2, sl, lsl #16 8009556: 4542 cmp r2, r8 8009558: d229 bcs.n 80095ae <__udivmoddi4+0x2ea> 800955a: 18ba adds r2, r7, r2 800955c: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff 8009560: d2c2 bcs.n 80094e8 <__udivmoddi4+0x224> 8009562: 4542 cmp r2, r8 8009564: d2c0 bcs.n 80094e8 <__udivmoddi4+0x224> 8009566: f1a9 0102 sub.w r1, r9, #2 800956a: 443a add r2, r7 800956c: e7bc b.n 80094e8 <__udivmoddi4+0x224> 800956e: 45c6 cmp lr, r8 8009570: d29b bcs.n 80094aa <__udivmoddi4+0x1e6> 8009572: ebb8 0302 subs.w r3, r8, r2 8009576: eb6c 0c07 sbc.w ip, ip, r7 800957a: 3801 subs r0, #1 800957c: 46e1 mov r9, ip 800957e: e794 b.n 80094aa <__udivmoddi4+0x1e6> 8009580: eba7 0909 sub.w r9, r7, r9 8009584: 444a add r2, r9 8009586: fbb2 f9fe udiv r9, r2, lr 800958a: f1a8 0c02 sub.w ip, r8, #2 800958e: fb09 f804 mul.w r8, r9, r4 8009592: e7db b.n 800954c <__udivmoddi4+0x288> 8009594: 4603 mov r3, r0 8009596: e77d b.n 8009494 <__udivmoddi4+0x1d0> 8009598: 46d0 mov r8, sl 800959a: e765 b.n 8009468 <__udivmoddi4+0x1a4> 800959c: 4608 mov r0, r1 800959e: e6fa b.n 8009396 <__udivmoddi4+0xd2> 80095a0: 443b add r3, r7 80095a2: 3a02 subs r2, #2 80095a4: e730 b.n 8009408 <__udivmoddi4+0x144> 80095a6: f1ac 0c02 sub.w ip, ip, #2 80095aa: 443b add r3, r7 80095ac: e719 b.n 80093e2 <__udivmoddi4+0x11e> 80095ae: 4649 mov r1, r9 80095b0: e79a b.n 80094e8 <__udivmoddi4+0x224> 80095b2: eba2 0209 sub.w r2, r2, r9 80095b6: fbb2 f9fe udiv r9, r2, lr 80095ba: 46c4 mov ip, r8 80095bc: fb09 f804 mul.w r8, r9, r4 80095c0: e7c4 b.n 800954c <__udivmoddi4+0x288> 80095c2: bf00 nop 080095c4 <__aeabi_idiv0>: 80095c4: 4770 bx lr 80095c6: bf00 nop 080095c8 : ADC_HandleTypeDef hadc1; /* ADC1 init function */ void MX_ADC1_Init(void) { 80095c8: b580 push {r7, lr} 80095ca: b084 sub sp, #16 80095cc: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 80095ce: 1d3b adds r3, r7, #4 80095d0: 2200 movs r2, #0 80095d2: 601a str r2, [r3, #0] 80095d4: 605a str r2, [r3, #4] 80095d6: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 80095d8: 4b18 ldr r3, [pc, #96] @ (800963c ) 80095da: 4a19 ldr r2, [pc, #100] @ (8009640 ) 80095dc: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 80095de: 4b17 ldr r3, [pc, #92] @ (800963c ) 80095e0: 2200 movs r2, #0 80095e2: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = DISABLE; 80095e4: 4b15 ldr r3, [pc, #84] @ (800963c ) 80095e6: 2200 movs r2, #0 80095e8: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 80095ea: 4b14 ldr r3, [pc, #80] @ (800963c ) 80095ec: 2200 movs r2, #0 80095ee: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80095f0: 4b12 ldr r3, [pc, #72] @ (800963c ) 80095f2: f44f 2260 mov.w r2, #917504 @ 0xe0000 80095f6: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80095f8: 4b10 ldr r3, [pc, #64] @ (800963c ) 80095fa: 2200 movs r2, #0 80095fc: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 1; 80095fe: 4b0f ldr r3, [pc, #60] @ (800963c ) 8009600: 2201 movs r2, #1 8009602: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 8009604: 480d ldr r0, [pc, #52] @ (800963c ) 8009606: f005 f911 bl 800e82c 800960a: 4603 mov r3, r0 800960c: 2b00 cmp r3, #0 800960e: d001 beq.n 8009614 { Error_Handler(); 8009610: f002 fe6a bl 800c2e8 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 8009614: 2308 movs r3, #8 8009616: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 8009618: 2301 movs r3, #1 800961a: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 800961c: 2300 movs r3, #0 800961e: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8009620: 1d3b adds r3, r7, #4 8009622: 4619 mov r1, r3 8009624: 4805 ldr r0, [pc, #20] @ (800963c ) 8009626: f005 fbc5 bl 800edb4 800962a: 4603 mov r3, r0 800962c: 2b00 cmp r3, #0 800962e: d001 beq.n 8009634 { Error_Handler(); 8009630: f002 fe5a bl 800c2e8 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 8009634: bf00 nop 8009636: 3710 adds r7, #16 8009638: 46bd mov sp, r7 800963a: bd80 pop {r7, pc} 800963c: 2000025c .word 0x2000025c 8009640: 40012400 .word 0x40012400 08009644 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { 8009644: b580 push {r7, lr} 8009646: b08a sub sp, #40 @ 0x28 8009648: af00 add r7, sp, #0 800964a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800964c: f107 0318 add.w r3, r7, #24 8009650: 2200 movs r2, #0 8009652: 601a str r2, [r3, #0] 8009654: 605a str r2, [r3, #4] 8009656: 609a str r2, [r3, #8] 8009658: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) 800965a: 687b ldr r3, [r7, #4] 800965c: 681b ldr r3, [r3, #0] 800965e: 4a1f ldr r2, [pc, #124] @ (80096dc ) 8009660: 4293 cmp r3, r2 8009662: d137 bne.n 80096d4 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8009664: 4b1e ldr r3, [pc, #120] @ (80096e0 ) 8009666: 699b ldr r3, [r3, #24] 8009668: 4a1d ldr r2, [pc, #116] @ (80096e0 ) 800966a: f443 7300 orr.w r3, r3, #512 @ 0x200 800966e: 6193 str r3, [r2, #24] 8009670: 4b1b ldr r3, [pc, #108] @ (80096e0 ) 8009672: 699b ldr r3, [r3, #24] 8009674: f403 7300 and.w r3, r3, #512 @ 0x200 8009678: 617b str r3, [r7, #20] 800967a: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 800967c: 4b18 ldr r3, [pc, #96] @ (80096e0 ) 800967e: 699b ldr r3, [r3, #24] 8009680: 4a17 ldr r2, [pc, #92] @ (80096e0 ) 8009682: f043 0304 orr.w r3, r3, #4 8009686: 6193 str r3, [r2, #24] 8009688: 4b15 ldr r3, [pc, #84] @ (80096e0 ) 800968a: 699b ldr r3, [r3, #24] 800968c: f003 0304 and.w r3, r3, #4 8009690: 613b str r3, [r7, #16] 8009692: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8009694: 4b12 ldr r3, [pc, #72] @ (80096e0 ) 8009696: 699b ldr r3, [r3, #24] 8009698: 4a11 ldr r2, [pc, #68] @ (80096e0 ) 800969a: f043 0308 orr.w r3, r3, #8 800969e: 6193 str r3, [r2, #24] 80096a0: 4b0f ldr r3, [pc, #60] @ (80096e0 ) 80096a2: 699b ldr r3, [r3, #24] 80096a4: f003 0308 and.w r3, r3, #8 80096a8: 60fb str r3, [r7, #12] 80096aa: 68fb ldr r3, [r7, #12] /**ADC1 GPIO Configuration PA3 ------> ADC1_IN3 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = GPIO_PIN_3; 80096ac: 2308 movs r3, #8 80096ae: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80096b0: 2303 movs r3, #3 80096b2: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80096b4: f107 0318 add.w r3, r7, #24 80096b8: 4619 mov r1, r3 80096ba: 480a ldr r0, [pc, #40] @ (80096e4 ) 80096bc: f006 fef4 bl 80104a8 GPIO_InitStruct.Pin = ADC_NTC1_Pin|ADC_NTC2_Pin; 80096c0: 2303 movs r3, #3 80096c2: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80096c4: 2303 movs r3, #3 80096c6: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80096c8: f107 0318 add.w r3, r7, #24 80096cc: 4619 mov r1, r3 80096ce: 4806 ldr r0, [pc, #24] @ (80096e8 ) 80096d0: f006 feea bl 80104a8 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 80096d4: bf00 nop 80096d6: 3728 adds r7, #40 @ 0x28 80096d8: 46bd mov sp, r7 80096da: bd80 pop {r7, pc} 80096dc: 40012400 .word 0x40012400 80096e0: 40021000 .word 0x40021000 80096e4: 40010800 .word 0x40010800 80096e8: 40010c00 .word 0x40010c00 080096ec : InfoBlock_t *InfoBlock = (InfoBlock_t *)(VERSION_OFFSET); uint8_t RELAY_State[RELAY_COUNT]; void RELAY_Write(relay_t num, uint8_t state){ 80096ec: b580 push {r7, lr} 80096ee: b082 sub sp, #8 80096f0: af00 add r7, sp, #0 80096f2: 4603 mov r3, r0 80096f4: 460a mov r2, r1 80096f6: 71fb strb r3, [r7, #7] 80096f8: 4613 mov r3, r2 80096fa: 71bb strb r3, [r7, #6] switch (num) { 80096fc: 79fb ldrb r3, [r7, #7] 80096fe: 2b06 cmp r3, #6 8009700: d847 bhi.n 8009792 8009702: a201 add r2, pc, #4 @ (adr r2, 8009708 ) 8009704: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8009708: 08009725 .word 0x08009725 800970c: 08009735 .word 0x08009735 8009710: 08009745 .word 0x08009745 8009714: 08009755 .word 0x08009755 8009718: 08009765 .word 0x08009765 800971c: 08009775 .word 0x08009775 8009720: 08009785 .word 0x08009785 case RELAY_AUX0: HAL_GPIO_WritePin(RELAY1_GPIO_Port, RELAY1_Pin, state); 8009724: 79bb ldrb r3, [r7, #6] 8009726: 461a mov r2, r3 8009728: f44f 7180 mov.w r1, #256 @ 0x100 800972c: 481d ldr r0, [pc, #116] @ (80097a4 ) 800972e: f007 f856 bl 80107de break; 8009732: e02f b.n 8009794 case RELAY_AUX1: HAL_GPIO_WritePin(RELAY2_GPIO_Port, RELAY2_Pin, state); 8009734: 79bb ldrb r3, [r7, #6] 8009736: 461a mov r2, r3 8009738: f44f 7100 mov.w r1, #512 @ 0x200 800973c: 4819 ldr r0, [pc, #100] @ (80097a4 ) 800973e: f007 f84e bl 80107de break; 8009742: e027 b.n 8009794 case RELAY3: HAL_GPIO_WritePin(RELAY3_GPIO_Port, RELAY3_Pin, state); 8009744: 79bb ldrb r3, [r7, #6] 8009746: 461a mov r2, r3 8009748: f44f 6180 mov.w r1, #1024 @ 0x400 800974c: 4815 ldr r0, [pc, #84] @ (80097a4 ) 800974e: f007 f846 bl 80107de break; 8009752: e01f b.n 8009794 case RELAY_DC: HAL_GPIO_WritePin(RELAY4_GPIO_Port, RELAY4_Pin, state); 8009754: 79bb ldrb r3, [r7, #6] 8009756: 461a mov r2, r3 8009758: f44f 6100 mov.w r1, #2048 @ 0x800 800975c: 4811 ldr r0, [pc, #68] @ (80097a4 ) 800975e: f007 f83e bl 80107de break; 8009762: e017 b.n 8009794 case RELAY_AC: HAL_GPIO_WritePin(RELAY5_GPIO_Port, RELAY5_Pin, state); 8009764: 79bb ldrb r3, [r7, #6] 8009766: 461a mov r2, r3 8009768: f44f 5180 mov.w r1, #4096 @ 0x1000 800976c: 480d ldr r0, [pc, #52] @ (80097a4 ) 800976e: f007 f836 bl 80107de break; 8009772: e00f b.n 8009794 case RELAY_CC: HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, state); 8009774: 79bb ldrb r3, [r7, #6] 8009776: 461a mov r2, r3 8009778: f44f 4100 mov.w r1, #32768 @ 0x8000 800977c: 480a ldr r0, [pc, #40] @ (80097a8 ) 800977e: f007 f82e bl 80107de break; 8009782: e007 b.n 8009794 case RELAY_DC1: HAL_GPIO_WritePin(RELAY_DC_GPIO_Port, RELAY_DC_Pin, state); 8009784: 79bb ldrb r3, [r7, #6] 8009786: 461a mov r2, r3 8009788: 2108 movs r1, #8 800978a: 4808 ldr r0, [pc, #32] @ (80097ac ) 800978c: f007 f827 bl 80107de break; 8009790: e000 b.n 8009794 default: break; 8009792: bf00 nop } RELAY_State[num] = state; 8009794: 79fb ldrb r3, [r7, #7] 8009796: 4906 ldr r1, [pc, #24] @ (80097b0 ) 8009798: 79ba ldrb r2, [r7, #6] 800979a: 54ca strb r2, [r1, r3] } 800979c: bf00 nop 800979e: 3708 adds r7, #8 80097a0: 46bd mov sp, r7 80097a2: bd80 pop {r7, pc} 80097a4: 40011800 .word 0x40011800 80097a8: 40010800 .word 0x40010800 80097ac: 40011400 .word 0x40011400 80097b0: 2000028c .word 0x2000028c 080097b4 : uint8_t RELAY_Read(relay_t num){ 80097b4: b480 push {r7} 80097b6: b083 sub sp, #12 80097b8: af00 add r7, sp, #0 80097ba: 4603 mov r3, r0 80097bc: 71fb strb r3, [r7, #7] return RELAY_State[num]; 80097be: 79fb ldrb r3, [r7, #7] 80097c0: 4a03 ldr r2, [pc, #12] @ (80097d0 ) 80097c2: 5cd3 ldrb r3, [r2, r3] } 80097c4: 4618 mov r0, r3 80097c6: 370c adds r7, #12 80097c8: 46bd mov sp, r7 80097ca: bc80 pop {r7} 80097cc: 4770 bx lr 80097ce: bf00 nop 80097d0: 2000028c .word 0x2000028c 080097d4 : uint8_t IN_ReadInput(inputNum_t input_n){ 80097d4: b580 push {r7, lr} 80097d6: b082 sub sp, #8 80097d8: af00 add r7, sp, #0 80097da: 4603 mov r3, r0 80097dc: 71fb strb r3, [r7, #7] switch(input_n){ 80097de: 79fb ldrb r3, [r7, #7] 80097e0: 2b06 cmp r3, #6 80097e2: d83b bhi.n 800985c 80097e4: a201 add r2, pc, #4 @ (adr r2, 80097ec ) 80097e6: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80097ea: bf00 nop 80097ec: 08009809 .word 0x08009809 80097f0: 08009815 .word 0x08009815 80097f4: 08009821 .word 0x08009821 80097f8: 0800982d .word 0x0800982d 80097fc: 08009839 .word 0x08009839 8009800: 08009845 .word 0x08009845 8009804: 08009851 .word 0x08009851 case IN_SW0: return HAL_GPIO_ReadPin(IN_SW0_GPIO_Port, IN_SW0_Pin); 8009808: 2102 movs r1, #2 800980a: 4817 ldr r0, [pc, #92] @ (8009868 ) 800980c: f006 ffd0 bl 80107b0 8009810: 4603 mov r3, r0 8009812: e024 b.n 800985e case IN_SW1: return HAL_GPIO_ReadPin(IN_SW1_GPIO_Port, IN_SW1_Pin); 8009814: 2104 movs r1, #4 8009816: 4814 ldr r0, [pc, #80] @ (8009868 ) 8009818: f006 ffca bl 80107b0 800981c: 4603 mov r3, r0 800981e: e01e b.n 800985e case IN0: return HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 8009820: 2180 movs r1, #128 @ 0x80 8009822: 4812 ldr r0, [pc, #72] @ (800986c ) 8009824: f006 ffc4 bl 80107b0 8009828: 4603 mov r3, r0 800982a: e018 b.n 800985e case IN_ESTOP: return HAL_GPIO_ReadPin(IN_ESTOP_GPIO_Port, IN_ESTOP_Pin); 800982c: 2180 movs r1, #128 @ 0x80 800982e: 4810 ldr r0, [pc, #64] @ (8009870 ) 8009830: f006 ffbe bl 80107b0 8009834: 4603 mov r3, r0 8009836: e012 b.n 800985e case IN_FB1: return HAL_GPIO_ReadPin(IN_FB1_GPIO_Port, IN_FB1_Pin); 8009838: 2110 movs r1, #16 800983a: 480e ldr r0, [pc, #56] @ (8009874 ) 800983c: f006 ffb8 bl 80107b0 8009840: 4603 mov r3, r0 8009842: e00c b.n 800985e case IN_CONT_FB_DC: return HAL_GPIO_ReadPin(IN_FB2_GPIO_Port, IN_FB2_Pin); 8009844: 2108 movs r1, #8 8009846: 480b ldr r0, [pc, #44] @ (8009874 ) 8009848: f006 ffb2 bl 80107b0 800984c: 4603 mov r3, r0 800984e: e006 b.n 800985e case ISO_IN: return HAL_GPIO_ReadPin(ISO_IN_GPIO_Port, ISO_IN_Pin); 8009850: 2102 movs r1, #2 8009852: 4806 ldr r0, [pc, #24] @ (800986c ) 8009854: f006 ffac bl 80107b0 8009858: 4603 mov r3, r0 800985a: e000 b.n 800985e default: return 0; 800985c: 2300 movs r3, #0 } } 800985e: 4618 mov r0, r3 8009860: 3708 adds r7, #8 8009862: 46bd mov sp, r7 8009864: bd80 pop {r7, pc} 8009866: bf00 nop 8009868: 40010800 .word 0x40010800 800986c: 40011800 .word 0x40011800 8009870: 40011400 .word 0x40011400 8009874: 40010c00 .word 0x40010c00 08009878 : // // HAL_ADC_Stop(&hadc1); // stop adc return 0; } void Init_Peripheral(){ 8009878: b580 push {r7, lr} 800987a: af00 add r7, sp, #0 HAL_ADCEx_Calibration_Start(&hadc1); 800987c: 4810 ldr r0, [pc, #64] @ (80098c0 ) 800987e: f005 fc2d bl 800f0dc RELAY_Write(RELAY_AUX0, 0); 8009882: 2100 movs r1, #0 8009884: 2000 movs r0, #0 8009886: f7ff ff31 bl 80096ec RELAY_Write(RELAY_AUX1, 0); 800988a: 2100 movs r1, #0 800988c: 2001 movs r0, #1 800988e: f7ff ff2d bl 80096ec RELAY_Write(RELAY3, 0); 8009892: 2100 movs r1, #0 8009894: 2002 movs r0, #2 8009896: f7ff ff29 bl 80096ec RELAY_Write(RELAY_DC, 0); 800989a: 2100 movs r1, #0 800989c: 2003 movs r0, #3 800989e: f7ff ff25 bl 80096ec RELAY_Write(RELAY_AC, 0); 80098a2: 2100 movs r1, #0 80098a4: 2004 movs r0, #4 80098a6: f7ff ff21 bl 80096ec RELAY_Write(RELAY_CC, 1); 80098aa: 2101 movs r1, #1 80098ac: 2005 movs r0, #5 80098ae: f7ff ff1d bl 80096ec RELAY_Write(RELAY_DC1, 0); 80098b2: 2100 movs r1, #0 80098b4: 2006 movs r0, #6 80098b6: f7ff ff19 bl 80096ec } 80098ba: bf00 nop 80098bc: bd80 pop {r7, pc} 80098be: bf00 nop 80098c0: 2000025c .word 0x2000025c 080098c4 : float pt1000_to_temperature(float resistance) { 80098c4: b590 push {r4, r7, lr} 80098c6: b087 sub sp, #28 80098c8: af00 add r7, sp, #0 80098ca: 6078 str r0, [r7, #4] // Константы для PT1000 const float R0 = 1000.0; // Сопротивление при 0 °C 80098cc: 4b0c ldr r3, [pc, #48] @ (8009900 ) 80098ce: 617b str r3, [r7, #20] const float C_A = 3.9083E-3f; 80098d0: 4b0c ldr r3, [pc, #48] @ (8009904 ) 80098d2: 613b str r3, [r7, #16] float temperature = (resistance-R0) / ( R0 * C_A); 80098d4: 6979 ldr r1, [r7, #20] 80098d6: 6878 ldr r0, [r7, #4] 80098d8: f7ff f996 bl 8008c08 <__aeabi_fsub> 80098dc: 4603 mov r3, r0 80098de: 461c mov r4, r3 80098e0: 6939 ldr r1, [r7, #16] 80098e2: 6978 ldr r0, [r7, #20] 80098e4: f7ff fa9a bl 8008e1c <__aeabi_fmul> 80098e8: 4603 mov r3, r0 80098ea: 4619 mov r1, r3 80098ec: 4620 mov r0, r4 80098ee: f7ff fb49 bl 8008f84 <__aeabi_fdiv> 80098f2: 4603 mov r3, r0 80098f4: 60fb str r3, [r7, #12] return temperature; 80098f6: 68fb ldr r3, [r7, #12] } 80098f8: 4618 mov r0, r3 80098fa: 371c adds r7, #28 80098fc: 46bd mov sp, r7 80098fe: bd90 pop {r4, r7, pc} 8009900: 447a0000 .word 0x447a0000 8009904: 3b801132 .word 0x3b801132 08009908 : float calculate_NTC_resistance(int adc_value, float Vref, float Vin, float R) { 8009908: b5b0 push {r4, r5, r7, lr} 800990a: b086 sub sp, #24 800990c: af00 add r7, sp, #0 800990e: 60f8 str r0, [r7, #12] 8009910: 60b9 str r1, [r7, #8] 8009912: 607a str r2, [r7, #4] 8009914: 603b str r3, [r7, #0] // Преобразуем значение АЦП в выходное напряжение float Vout = (adc_value / 4095.0) * Vref; 8009916: 68f8 ldr r0, [r7, #12] 8009918: f7fe fde0 bl 80084dc <__aeabi_i2d> 800991c: a31c add r3, pc, #112 @ (adr r3, 8009990 ) 800991e: e9d3 2300 ldrd r2, r3, [r3] 8009922: f7fe ff6f bl 8008804 <__aeabi_ddiv> 8009926: 4602 mov r2, r0 8009928: 460b mov r3, r1 800992a: 4614 mov r4, r2 800992c: 461d mov r5, r3 800992e: 68b8 ldr r0, [r7, #8] 8009930: f7fe fde6 bl 8008500 <__aeabi_f2d> 8009934: 4602 mov r2, r0 8009936: 460b mov r3, r1 8009938: 4620 mov r0, r4 800993a: 4629 mov r1, r5 800993c: f7fe fe38 bl 80085b0 <__aeabi_dmul> 8009940: 4602 mov r2, r0 8009942: 460b mov r3, r1 8009944: 4610 mov r0, r2 8009946: 4619 mov r1, r3 8009948: f7ff f90a bl 8008b60 <__aeabi_d2f> 800994c: 4603 mov r3, r0 800994e: 617b str r3, [r7, #20] // Проверяем, чтобы Vout не было равно Vin if (Vout >= Vin) { 8009950: 6879 ldr r1, [r7, #4] 8009952: 6978 ldr r0, [r7, #20] 8009954: f7ff fc14 bl 8009180 <__aeabi_fcmpge> 8009958: 4603 mov r3, r0 800995a: 2b00 cmp r3, #0 800995c: d001 beq.n 8009962 return -1; // Ошибка: Vout не может быть больше или равно Vin 800995e: 4b0e ldr r3, [pc, #56] @ (8009998 ) 8009960: e010 b.n 8009984 } // Вычисляем сопротивление термистора float R_NTC = R * (Vout / (Vin - Vout)); 8009962: 6979 ldr r1, [r7, #20] 8009964: 6878 ldr r0, [r7, #4] 8009966: f7ff f94f bl 8008c08 <__aeabi_fsub> 800996a: 4603 mov r3, r0 800996c: 4619 mov r1, r3 800996e: 6978 ldr r0, [r7, #20] 8009970: f7ff fb08 bl 8008f84 <__aeabi_fdiv> 8009974: 4603 mov r3, r0 8009976: 4619 mov r1, r3 8009978: 6838 ldr r0, [r7, #0] 800997a: f7ff fa4f bl 8008e1c <__aeabi_fmul> 800997e: 4603 mov r3, r0 8009980: 613b str r3, [r7, #16] return R_NTC; 8009982: 693b ldr r3, [r7, #16] } 8009984: 4618 mov r0, r3 8009986: 3718 adds r7, #24 8009988: 46bd mov sp, r7 800998a: bdb0 pop {r4, r5, r7, pc} 800998c: f3af 8000 nop.w 8009990: 00000000 .word 0x00000000 8009994: 40affe00 .word 0x40affe00 8009998: bf800000 .word 0xbf800000 0800999c : int16_t GBT_ReadTemp(uint8_t ch){ 800999c: b580 push {r7, lr} 800999e: b088 sub sp, #32 80099a0: af00 add r7, sp, #0 80099a2: 4603 mov r3, r0 80099a4: 71fb strb r3, [r7, #7] //TODO if(ch)ADC_Select_Channel(ADC_CHANNEL_8); 80099a6: 79fb ldrb r3, [r7, #7] 80099a8: 2b00 cmp r3, #0 80099aa: d003 beq.n 80099b4 80099ac: 2008 movs r0, #8 80099ae: f000 f83b bl 8009a28 80099b2: e002 b.n 80099ba else ADC_Select_Channel(ADC_CHANNEL_9); 80099b4: 2009 movs r0, #9 80099b6: f000 f837 bl 8009a28 // Начало конверсии HAL_ADC_Start(&hadc1); 80099ba: 4817 ldr r0, [pc, #92] @ (8009a18 ) 80099bc: f005 f80e bl 800e9dc // Ожидание окончания конверсии HAL_ADC_PollForConversion(&hadc1, HAL_MAX_DELAY); 80099c0: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 80099c4: 4814 ldr r0, [pc, #80] @ (8009a18 ) 80099c6: f005 f8e3 bl 800eb90 // Получение значения uint32_t adcValue = HAL_ADC_GetValue(&hadc1); 80099ca: 4813 ldr r0, [pc, #76] @ (8009a18 ) 80099cc: f005 f9e6 bl 800ed9c 80099d0: 61f8 str r0, [r7, #28] // Остановка АЦП (по желанию) HAL_ADC_Stop(&hadc1); 80099d2: 4811 ldr r0, [pc, #68] @ (8009a18 ) 80099d4: f005 f8b0 bl 800eb38 if(adcValue>4000) return 20; //Термодатчик не подключен 80099d8: 69fb ldr r3, [r7, #28] 80099da: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 80099de: d901 bls.n 80099e4 80099e0: 2314 movs r3, #20 80099e2: e015 b.n 8009a10 // int adc_value = 2048; // Пример значения АЦП float Vref = 3.3; // Напряжение опорное 80099e4: 4b0d ldr r3, [pc, #52] @ (8009a1c ) 80099e6: 61bb str r3, [r7, #24] float Vin = 5.0; // Входное напряжение 80099e8: 4b0d ldr r3, [pc, #52] @ (8009a20 ) 80099ea: 617b str r3, [r7, #20] float R = 1000; // Сопротивление резистора в Омах 80099ec: 4b0d ldr r3, [pc, #52] @ (8009a24 ) 80099ee: 613b str r3, [r7, #16] float temp = pt1000_to_temperature(calculate_NTC_resistance(adcValue, Vref, Vin, R)); 80099f0: 69f8 ldr r0, [r7, #28] 80099f2: 693b ldr r3, [r7, #16] 80099f4: 697a ldr r2, [r7, #20] 80099f6: 69b9 ldr r1, [r7, #24] 80099f8: f7ff ff86 bl 8009908 80099fc: 4603 mov r3, r0 80099fe: 4618 mov r0, r3 8009a00: f7ff ff60 bl 80098c4 8009a04: 60f8 str r0, [r7, #12] return (int16_t)temp; 8009a06: 68f8 ldr r0, [r7, #12] 8009a08: f7ff fbce bl 80091a8 <__aeabi_f2iz> 8009a0c: 4603 mov r3, r0 8009a0e: b21b sxth r3, r3 } 8009a10: 4618 mov r0, r3 8009a12: 3720 adds r7, #32 8009a14: 46bd mov sp, r7 8009a16: bd80 pop {r7, pc} 8009a18: 2000025c .word 0x2000025c 8009a1c: 40533333 .word 0x40533333 8009a20: 40a00000 .word 0x40a00000 8009a24: 447a0000 .word 0x447a0000 08009a28 : void ADC_Select_Channel(uint32_t ch) { 8009a28: b580 push {r7, lr} 8009a2a: b086 sub sp, #24 8009a2c: af00 add r7, sp, #0 8009a2e: 6078 str r0, [r7, #4] ADC_ChannelConfTypeDef conf = { 8009a30: 687b ldr r3, [r7, #4] 8009a32: 60fb str r3, [r7, #12] 8009a34: 2301 movs r3, #1 8009a36: 613b str r3, [r7, #16] 8009a38: 2303 movs r3, #3 8009a3a: 617b str r3, [r7, #20] .Channel = ch, .Rank = 1, .SamplingTime = ADC_SAMPLETIME_28CYCLES_5, }; if (HAL_ADC_ConfigChannel(&hadc1, &conf) != HAL_OK) { 8009a3c: f107 030c add.w r3, r7, #12 8009a40: 4619 mov r1, r3 8009a42: 4806 ldr r0, [pc, #24] @ (8009a5c ) 8009a44: f005 f9b6 bl 800edb4 8009a48: 4603 mov r3, r0 8009a4a: 2b00 cmp r3, #0 8009a4c: d001 beq.n 8009a52 Error_Handler(); 8009a4e: f002 fc4b bl 800c2e8 } } 8009a52: bf00 nop 8009a54: 3718 adds r7, #24 8009a56: 46bd mov sp, r7 8009a58: bd80 pop {r7, pc} 8009a5a: bf00 nop 8009a5c: 2000025c .word 0x2000025c 08009a60 : CAN_HandleTypeDef hcan1; CAN_HandleTypeDef hcan2; /* CAN1 init function */ void MX_CAN1_Init(void) { 8009a60: b580 push {r7, lr} 8009a62: af00 add r7, sp, #0 /* USER CODE END CAN1_Init 0 */ /* USER CODE BEGIN CAN1_Init 1 */ /* USER CODE END CAN1_Init 1 */ hcan1.Instance = CAN1; 8009a64: 4b17 ldr r3, [pc, #92] @ (8009ac4 ) 8009a66: 4a18 ldr r2, [pc, #96] @ (8009ac8 ) 8009a68: 601a str r2, [r3, #0] hcan1.Init.Prescaler = 8; 8009a6a: 4b16 ldr r3, [pc, #88] @ (8009ac4 ) 8009a6c: 2208 movs r2, #8 8009a6e: 605a str r2, [r3, #4] hcan1.Init.Mode = CAN_MODE_NORMAL; 8009a70: 4b14 ldr r3, [pc, #80] @ (8009ac4 ) 8009a72: 2200 movs r2, #0 8009a74: 609a str r2, [r3, #8] hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ; 8009a76: 4b13 ldr r3, [pc, #76] @ (8009ac4 ) 8009a78: 2200 movs r2, #0 8009a7a: 60da str r2, [r3, #12] hcan1.Init.TimeSeg1 = CAN_BS1_15TQ; 8009a7c: 4b11 ldr r3, [pc, #68] @ (8009ac4 ) 8009a7e: f44f 2260 mov.w r2, #917504 @ 0xe0000 8009a82: 611a str r2, [r3, #16] hcan1.Init.TimeSeg2 = CAN_BS2_2TQ; 8009a84: 4b0f ldr r3, [pc, #60] @ (8009ac4 ) 8009a86: f44f 1280 mov.w r2, #1048576 @ 0x100000 8009a8a: 615a str r2, [r3, #20] hcan1.Init.TimeTriggeredMode = DISABLE; 8009a8c: 4b0d ldr r3, [pc, #52] @ (8009ac4 ) 8009a8e: 2200 movs r2, #0 8009a90: 761a strb r2, [r3, #24] hcan1.Init.AutoBusOff = ENABLE; 8009a92: 4b0c ldr r3, [pc, #48] @ (8009ac4 ) 8009a94: 2201 movs r2, #1 8009a96: 765a strb r2, [r3, #25] hcan1.Init.AutoWakeUp = ENABLE; 8009a98: 4b0a ldr r3, [pc, #40] @ (8009ac4 ) 8009a9a: 2201 movs r2, #1 8009a9c: 769a strb r2, [r3, #26] hcan1.Init.AutoRetransmission = ENABLE; 8009a9e: 4b09 ldr r3, [pc, #36] @ (8009ac4 ) 8009aa0: 2201 movs r2, #1 8009aa2: 76da strb r2, [r3, #27] hcan1.Init.ReceiveFifoLocked = DISABLE; 8009aa4: 4b07 ldr r3, [pc, #28] @ (8009ac4 ) 8009aa6: 2200 movs r2, #0 8009aa8: 771a strb r2, [r3, #28] hcan1.Init.TransmitFifoPriority = ENABLE; 8009aaa: 4b06 ldr r3, [pc, #24] @ (8009ac4 ) 8009aac: 2201 movs r2, #1 8009aae: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan1) != HAL_OK) 8009ab0: 4804 ldr r0, [pc, #16] @ (8009ac4 ) 8009ab2: f005 fbc1 bl 800f238 8009ab6: 4603 mov r3, r0 8009ab8: 2b00 cmp r3, #0 8009aba: d001 beq.n 8009ac0 { Error_Handler(); 8009abc: f002 fc14 bl 800c2e8 } /* USER CODE BEGIN CAN1_Init 2 */ /* USER CODE END CAN1_Init 2 */ } 8009ac0: bf00 nop 8009ac2: bd80 pop {r7, pc} 8009ac4: 20000294 .word 0x20000294 8009ac8: 40006400 .word 0x40006400 08009acc : /* CAN2 init function */ void MX_CAN2_Init(void) { 8009acc: b580 push {r7, lr} 8009ace: af00 add r7, sp, #0 /* USER CODE END CAN2_Init 0 */ /* USER CODE BEGIN CAN2_Init 1 */ /* USER CODE END CAN2_Init 1 */ hcan2.Instance = CAN2; 8009ad0: 4b17 ldr r3, [pc, #92] @ (8009b30 ) 8009ad2: 4a18 ldr r2, [pc, #96] @ (8009b34 ) 8009ad4: 601a str r2, [r3, #0] hcan2.Init.Prescaler = 16; 8009ad6: 4b16 ldr r3, [pc, #88] @ (8009b30 ) 8009ad8: 2210 movs r2, #16 8009ada: 605a str r2, [r3, #4] hcan2.Init.Mode = CAN_MODE_NORMAL; 8009adc: 4b14 ldr r3, [pc, #80] @ (8009b30 ) 8009ade: 2200 movs r2, #0 8009ae0: 609a str r2, [r3, #8] hcan2.Init.SyncJumpWidth = CAN_SJW_1TQ; 8009ae2: 4b13 ldr r3, [pc, #76] @ (8009b30 ) 8009ae4: 2200 movs r2, #0 8009ae6: 60da str r2, [r3, #12] hcan2.Init.TimeSeg1 = CAN_BS1_15TQ; 8009ae8: 4b11 ldr r3, [pc, #68] @ (8009b30 ) 8009aea: f44f 2260 mov.w r2, #917504 @ 0xe0000 8009aee: 611a str r2, [r3, #16] hcan2.Init.TimeSeg2 = CAN_BS2_2TQ; 8009af0: 4b0f ldr r3, [pc, #60] @ (8009b30 ) 8009af2: f44f 1280 mov.w r2, #1048576 @ 0x100000 8009af6: 615a str r2, [r3, #20] hcan2.Init.TimeTriggeredMode = DISABLE; 8009af8: 4b0d ldr r3, [pc, #52] @ (8009b30 ) 8009afa: 2200 movs r2, #0 8009afc: 761a strb r2, [r3, #24] hcan2.Init.AutoBusOff = ENABLE; 8009afe: 4b0c ldr r3, [pc, #48] @ (8009b30 ) 8009b00: 2201 movs r2, #1 8009b02: 765a strb r2, [r3, #25] hcan2.Init.AutoWakeUp = ENABLE; 8009b04: 4b0a ldr r3, [pc, #40] @ (8009b30 ) 8009b06: 2201 movs r2, #1 8009b08: 769a strb r2, [r3, #26] hcan2.Init.AutoRetransmission = ENABLE; 8009b0a: 4b09 ldr r3, [pc, #36] @ (8009b30 ) 8009b0c: 2201 movs r2, #1 8009b0e: 76da strb r2, [r3, #27] hcan2.Init.ReceiveFifoLocked = DISABLE; 8009b10: 4b07 ldr r3, [pc, #28] @ (8009b30 ) 8009b12: 2200 movs r2, #0 8009b14: 771a strb r2, [r3, #28] hcan2.Init.TransmitFifoPriority = ENABLE; 8009b16: 4b06 ldr r3, [pc, #24] @ (8009b30 ) 8009b18: 2201 movs r2, #1 8009b1a: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan2) != HAL_OK) 8009b1c: 4804 ldr r0, [pc, #16] @ (8009b30 ) 8009b1e: f005 fb8b bl 800f238 8009b22: 4603 mov r3, r0 8009b24: 2b00 cmp r3, #0 8009b26: d001 beq.n 8009b2c { Error_Handler(); 8009b28: f002 fbde bl 800c2e8 } /* USER CODE BEGIN CAN2_Init 2 */ /* USER CODE END CAN2_Init 2 */ } 8009b2c: bf00 nop 8009b2e: bd80 pop {r7, pc} 8009b30: 200002bc .word 0x200002bc 8009b34: 40006800 .word 0x40006800 08009b38 : static uint32_t HAL_RCC_CAN1_CLK_ENABLED=0; void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle) { 8009b38: b580 push {r7, lr} 8009b3a: b08e sub sp, #56 @ 0x38 8009b3c: af00 add r7, sp, #0 8009b3e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8009b40: f107 0320 add.w r3, r7, #32 8009b44: 2200 movs r2, #0 8009b46: 601a str r2, [r3, #0] 8009b48: 605a str r2, [r3, #4] 8009b4a: 609a str r2, [r3, #8] 8009b4c: 60da str r2, [r3, #12] if(canHandle->Instance==CAN1) 8009b4e: 687b ldr r3, [r7, #4] 8009b50: 681b ldr r3, [r3, #0] 8009b52: 4a61 ldr r2, [pc, #388] @ (8009cd8 ) 8009b54: 4293 cmp r3, r2 8009b56: d153 bne.n 8009c00 { /* USER CODE BEGIN CAN1_MspInit 0 */ /* USER CODE END CAN1_MspInit 0 */ /* CAN1 clock enable */ HAL_RCC_CAN1_CLK_ENABLED++; 8009b58: 4b60 ldr r3, [pc, #384] @ (8009cdc ) 8009b5a: 681b ldr r3, [r3, #0] 8009b5c: 3301 adds r3, #1 8009b5e: 4a5f ldr r2, [pc, #380] @ (8009cdc ) 8009b60: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8009b62: 4b5e ldr r3, [pc, #376] @ (8009cdc ) 8009b64: 681b ldr r3, [r3, #0] 8009b66: 2b01 cmp r3, #1 8009b68: d10b bne.n 8009b82 __HAL_RCC_CAN1_CLK_ENABLE(); 8009b6a: 4b5d ldr r3, [pc, #372] @ (8009ce0 ) 8009b6c: 69db ldr r3, [r3, #28] 8009b6e: 4a5c ldr r2, [pc, #368] @ (8009ce0 ) 8009b70: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8009b74: 61d3 str r3, [r2, #28] 8009b76: 4b5a ldr r3, [pc, #360] @ (8009ce0 ) 8009b78: 69db ldr r3, [r3, #28] 8009b7a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8009b7e: 61fb str r3, [r7, #28] 8009b80: 69fb ldr r3, [r7, #28] } __HAL_RCC_GPIOD_CLK_ENABLE(); 8009b82: 4b57 ldr r3, [pc, #348] @ (8009ce0 ) 8009b84: 699b ldr r3, [r3, #24] 8009b86: 4a56 ldr r2, [pc, #344] @ (8009ce0 ) 8009b88: f043 0320 orr.w r3, r3, #32 8009b8c: 6193 str r3, [r2, #24] 8009b8e: 4b54 ldr r3, [pc, #336] @ (8009ce0 ) 8009b90: 699b ldr r3, [r3, #24] 8009b92: f003 0320 and.w r3, r3, #32 8009b96: 61bb str r3, [r7, #24] 8009b98: 69bb ldr r3, [r7, #24] /**CAN1 GPIO Configuration PD0 ------> CAN1_RX PD1 ------> CAN1_TX */ GPIO_InitStruct.Pin = GPIO_PIN_0; 8009b9a: 2301 movs r3, #1 8009b9c: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8009b9e: 2300 movs r3, #0 8009ba0: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8009ba2: 2300 movs r3, #0 8009ba4: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8009ba6: f107 0320 add.w r3, r7, #32 8009baa: 4619 mov r1, r3 8009bac: 484d ldr r0, [pc, #308] @ (8009ce4 ) 8009bae: f006 fc7b bl 80104a8 GPIO_InitStruct.Pin = GPIO_PIN_1; 8009bb2: 2302 movs r3, #2 8009bb4: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8009bb6: 2302 movs r3, #2 8009bb8: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8009bba: 2303 movs r3, #3 8009bbc: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8009bbe: f107 0320 add.w r3, r7, #32 8009bc2: 4619 mov r1, r3 8009bc4: 4847 ldr r0, [pc, #284] @ (8009ce4 ) 8009bc6: f006 fc6f bl 80104a8 __HAL_AFIO_REMAP_CAN1_3(); 8009bca: 4b47 ldr r3, [pc, #284] @ (8009ce8 ) 8009bcc: 685b ldr r3, [r3, #4] 8009bce: 633b str r3, [r7, #48] @ 0x30 8009bd0: 6b3b ldr r3, [r7, #48] @ 0x30 8009bd2: f423 43c0 bic.w r3, r3, #24576 @ 0x6000 8009bd6: 633b str r3, [r7, #48] @ 0x30 8009bd8: 6b3b ldr r3, [r7, #48] @ 0x30 8009bda: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8009bde: 633b str r3, [r7, #48] @ 0x30 8009be0: 6b3b ldr r3, [r7, #48] @ 0x30 8009be2: f443 43c0 orr.w r3, r3, #24576 @ 0x6000 8009be6: 633b str r3, [r7, #48] @ 0x30 8009be8: 4a3f ldr r2, [pc, #252] @ (8009ce8 ) 8009bea: 6b3b ldr r3, [r7, #48] @ 0x30 8009bec: 6053 str r3, [r2, #4] /* CAN1 interrupt Init */ HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 0, 0); 8009bee: 2200 movs r2, #0 8009bf0: 2100 movs r1, #0 8009bf2: 2014 movs r0, #20 8009bf4: f006 fac3 bl 801017e HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn); 8009bf8: 2014 movs r0, #20 8009bfa: f006 fadc bl 80101b6 HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); /* USER CODE BEGIN CAN2_MspInit 1 */ /* USER CODE END CAN2_MspInit 1 */ } } 8009bfe: e067 b.n 8009cd0 else if(canHandle->Instance==CAN2) 8009c00: 687b ldr r3, [r7, #4] 8009c02: 681b ldr r3, [r3, #0] 8009c04: 4a39 ldr r2, [pc, #228] @ (8009cec ) 8009c06: 4293 cmp r3, r2 8009c08: d162 bne.n 8009cd0 __HAL_RCC_CAN2_CLK_ENABLE(); 8009c0a: 4b35 ldr r3, [pc, #212] @ (8009ce0 ) 8009c0c: 69db ldr r3, [r3, #28] 8009c0e: 4a34 ldr r2, [pc, #208] @ (8009ce0 ) 8009c10: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000 8009c14: 61d3 str r3, [r2, #28] 8009c16: 4b32 ldr r3, [pc, #200] @ (8009ce0 ) 8009c18: 69db ldr r3, [r3, #28] 8009c1a: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8009c1e: 617b str r3, [r7, #20] 8009c20: 697b ldr r3, [r7, #20] HAL_RCC_CAN1_CLK_ENABLED++; 8009c22: 4b2e ldr r3, [pc, #184] @ (8009cdc ) 8009c24: 681b ldr r3, [r3, #0] 8009c26: 3301 adds r3, #1 8009c28: 4a2c ldr r2, [pc, #176] @ (8009cdc ) 8009c2a: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8009c2c: 4b2b ldr r3, [pc, #172] @ (8009cdc ) 8009c2e: 681b ldr r3, [r3, #0] 8009c30: 2b01 cmp r3, #1 8009c32: d10b bne.n 8009c4c __HAL_RCC_CAN1_CLK_ENABLE(); 8009c34: 4b2a ldr r3, [pc, #168] @ (8009ce0 ) 8009c36: 69db ldr r3, [r3, #28] 8009c38: 4a29 ldr r2, [pc, #164] @ (8009ce0 ) 8009c3a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8009c3e: 61d3 str r3, [r2, #28] 8009c40: 4b27 ldr r3, [pc, #156] @ (8009ce0 ) 8009c42: 69db ldr r3, [r3, #28] 8009c44: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8009c48: 613b str r3, [r7, #16] 8009c4a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8009c4c: 4b24 ldr r3, [pc, #144] @ (8009ce0 ) 8009c4e: 699b ldr r3, [r3, #24] 8009c50: 4a23 ldr r2, [pc, #140] @ (8009ce0 ) 8009c52: f043 0308 orr.w r3, r3, #8 8009c56: 6193 str r3, [r2, #24] 8009c58: 4b21 ldr r3, [pc, #132] @ (8009ce0 ) 8009c5a: 699b ldr r3, [r3, #24] 8009c5c: f003 0308 and.w r3, r3, #8 8009c60: 60fb str r3, [r7, #12] 8009c62: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_5; 8009c64: 2320 movs r3, #32 8009c66: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8009c68: 2300 movs r3, #0 8009c6a: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8009c6c: 2300 movs r3, #0 8009c6e: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8009c70: f107 0320 add.w r3, r7, #32 8009c74: 4619 mov r1, r3 8009c76: 481e ldr r0, [pc, #120] @ (8009cf0 ) 8009c78: f006 fc16 bl 80104a8 GPIO_InitStruct.Pin = GPIO_PIN_6; 8009c7c: 2340 movs r3, #64 @ 0x40 8009c7e: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8009c80: 2302 movs r3, #2 8009c82: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8009c84: 2303 movs r3, #3 8009c86: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8009c88: f107 0320 add.w r3, r7, #32 8009c8c: 4619 mov r1, r3 8009c8e: 4818 ldr r0, [pc, #96] @ (8009cf0 ) 8009c90: f006 fc0a bl 80104a8 __HAL_AFIO_REMAP_CAN2_ENABLE(); 8009c94: 4b14 ldr r3, [pc, #80] @ (8009ce8 ) 8009c96: 685b ldr r3, [r3, #4] 8009c98: 637b str r3, [r7, #52] @ 0x34 8009c9a: 6b7b ldr r3, [r7, #52] @ 0x34 8009c9c: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8009ca0: 637b str r3, [r7, #52] @ 0x34 8009ca2: 6b7b ldr r3, [r7, #52] @ 0x34 8009ca4: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 8009ca8: 637b str r3, [r7, #52] @ 0x34 8009caa: 4a0f ldr r2, [pc, #60] @ (8009ce8 ) 8009cac: 6b7b ldr r3, [r7, #52] @ 0x34 8009cae: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(CAN2_TX_IRQn, 0, 0); 8009cb0: 2200 movs r2, #0 8009cb2: 2100 movs r1, #0 8009cb4: 203f movs r0, #63 @ 0x3f 8009cb6: f006 fa62 bl 801017e HAL_NVIC_EnableIRQ(CAN2_TX_IRQn); 8009cba: 203f movs r0, #63 @ 0x3f 8009cbc: f006 fa7b bl 80101b6 HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 0, 0); 8009cc0: 2200 movs r2, #0 8009cc2: 2100 movs r1, #0 8009cc4: 2041 movs r0, #65 @ 0x41 8009cc6: f006 fa5a bl 801017e HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); 8009cca: 2041 movs r0, #65 @ 0x41 8009ccc: f006 fa73 bl 80101b6 } 8009cd0: bf00 nop 8009cd2: 3738 adds r7, #56 @ 0x38 8009cd4: 46bd mov sp, r7 8009cd6: bd80 pop {r7, pc} 8009cd8: 40006400 .word 0x40006400 8009cdc: 200002e4 .word 0x200002e4 8009ce0: 40021000 .word 0x40021000 8009ce4: 40011400 .word 0x40011400 8009ce8: 40010000 .word 0x40010000 8009cec: 40006800 .word 0x40006800 8009cf0: 40010c00 .word 0x40010c00 08009cf4 : #include "lock.h" #include "psu_control.h" ChargingConnector_t CONN; void CONN_Init(){ 8009cf4: b480 push {r7} 8009cf6: af00 add r7, sp, #0 CONN.connControl = CMD_NONE; 8009cf8: 4b08 ldr r3, [pc, #32] @ (8009d1c ) 8009cfa: 2200 movs r2, #0 8009cfc: 701a strb r2, [r3, #0] CONN.connState = Unknown; 8009cfe: 4b07 ldr r3, [pc, #28] @ (8009d1c ) 8009d00: 2200 movs r2, #0 8009d02: 705a strb r2, [r3, #1] CONN.RequestedVoltage = PSU_MIN_VOLTAGE; 8009d04: 4b05 ldr r3, [pc, #20] @ (8009d1c ) 8009d06: 2200 movs r2, #0 8009d08: f062 0269 orn r2, r2, #105 @ 0x69 8009d0c: 73da strb r2, [r3, #15] 8009d0e: 2200 movs r2, #0 8009d10: 741a strb r2, [r3, #16] } 8009d12: bf00 nop 8009d14: 46bd mov sp, r7 8009d16: bc80 pop {r7} 8009d18: 4770 bx lr 8009d1a: bf00 nop 8009d1c: 200002e8 .word 0x200002e8 08009d20 : void CONN_Loop(){ 8009d20: b580 push {r7, lr} 8009d22: af00 add r7, sp, #0 static CONN_State_t last_connState = Unknown; if(last_connState != CONN.connState){ 8009d24: 4b1e ldr r3, [pc, #120] @ (8009da0 ) 8009d26: 785a ldrb r2, [r3, #1] 8009d28: 4b1e ldr r3, [pc, #120] @ (8009da4 ) 8009d2a: 781b ldrb r3, [r3, #0] 8009d2c: 429a cmp r2, r3 8009d2e: d006 beq.n 8009d3e last_connState = CONN.connState; 8009d30: 4b1b ldr r3, [pc, #108] @ (8009da0 ) 8009d32: 785a ldrb r2, [r3, #1] 8009d34: 4b1b ldr r3, [pc, #108] @ (8009da4 ) 8009d36: 701a strb r2, [r3, #0] CONN.connControl = CMD_NONE; 8009d38: 4b19 ldr r3, [pc, #100] @ (8009da0 ) 8009d3a: 2200 movs r2, #0 8009d3c: 701a strb r2, [r3, #0] } if(GBT_LockState.error){ 8009d3e: 4b1a ldr r3, [pc, #104] @ (8009da8 ) 8009d40: 785b ldrb r3, [r3, #1] 8009d42: 2b00 cmp r3, #0 8009d44: d003 beq.n 8009d4e CONN.chargingError = CONN_ERR_LOCK; 8009d46: 4b16 ldr r3, [pc, #88] @ (8009da0 ) 8009d48: 2204 movs r2, #4 8009d4a: 775a strb r2, [r3, #29] 8009d4c: e016 b.n 8009d7c } else if(PSU0.cont_fault){ 8009d4e: 4b17 ldr r3, [pc, #92] @ (8009dac ) 8009d50: 7b1b ldrb r3, [r3, #12] 8009d52: 2b00 cmp r3, #0 8009d54: d003 beq.n 8009d5e CONN.chargingError = CONN_ERR_CONTACTOR; 8009d56: 4b12 ldr r3, [pc, #72] @ (8009da0 ) 8009d58: 2207 movs r2, #7 8009d5a: 775a strb r2, [r3, #29] 8009d5c: e00e b.n 8009d7c } else if(PSU0.psu_fault){ 8009d5e: 4b13 ldr r3, [pc, #76] @ (8009dac ) 8009d60: 7b5b ldrb r3, [r3, #13] 8009d62: 2b00 cmp r3, #0 8009d64: d003 beq.n 8009d6e CONN.chargingError = CONN_ERR_PSU_FAULT; 8009d66: 4b0e ldr r3, [pc, #56] @ (8009da0 ) 8009d68: 220a movs r2, #10 8009d6a: 775a strb r2, [r3, #29] 8009d6c: e006 b.n 8009d7c // } else if(!CTRL.ac_ok) { // CONN.chargingError = CONN_ERR_AC_FAULT; // } else }else if (CONN.EvConnected == 0){ 8009d6e: 4b0c ldr r3, [pc, #48] @ (8009da0 ) 8009d70: 7f9b ldrb r3, [r3, #30] 8009d72: 2b00 cmp r3, #0 8009d74: d102 bne.n 8009d7c CONN.chargingError = CONN_NO_ERROR; 8009d76: 4b0a ldr r3, [pc, #40] @ (8009da0 ) 8009d78: 2200 movs r2, #0 8009d7a: 775a strb r2, [r3, #29] } if(ED_TraceWarning(CONN.chargingError, 0)) printf("CONN%d Error: %d\n", 0, CONN.chargingError); 8009d7c: 4b08 ldr r3, [pc, #32] @ (8009da0 ) 8009d7e: 7f5b ldrb r3, [r3, #29] 8009d80: 2100 movs r1, #0 8009d82: 4618 mov r0, r3 8009d84: f002 f95e bl 800c044 8009d88: 4603 mov r3, r0 8009d8a: 2b00 cmp r3, #0 8009d8c: d006 beq.n 8009d9c 8009d8e: 4b04 ldr r3, [pc, #16] @ (8009da0 ) 8009d90: 7f5b ldrb r3, [r3, #29] 8009d92: 461a mov r2, r3 8009d94: 2100 movs r1, #0 8009d96: 4806 ldr r0, [pc, #24] @ (8009db0 ) 8009d98: f00a f968 bl 801406c } 8009d9c: bf00 nop 8009d9e: bd80 pop {r7, pc} 8009da0: 200002e8 .word 0x200002e8 8009da4: 20000307 .word 0x20000307 8009da8: 20000008 .word 0x20000008 8009dac: 200009fc .word 0x200009fc 8009db0: 08016470 .word 0x08016470 08009db4 : GBT_StopSource_t GBT_StopSource; extern ConfigBlock_t config; void GBT_Init(){ 8009db4: b580 push {r7, lr} 8009db6: af00 add r7, sp, #0 GBT_State = GBT_DISABLED; 8009db8: 4b0b ldr r3, [pc, #44] @ (8009de8 ) 8009dba: 2210 movs r2, #16 8009dbc: 701a strb r2, [r3, #0] GBT_Reset(); 8009dbe: f000 ff1f bl 800ac00 GBT_MaxLoad.maxOutputVoltage = PSU_MAX_VOLTAGE*10; // 1000V 8009dc2: 4b0a ldr r3, [pc, #40] @ (8009dec ) 8009dc4: f242 7210 movw r2, #10000 @ 0x2710 8009dc8: 801a strh r2, [r3, #0] GBT_MaxLoad.minOutputVoltage = PSU_MIN_VOLTAGE*10; //150V 8009dca: 4b08 ldr r3, [pc, #32] @ (8009dec ) 8009dcc: f240 52dc movw r2, #1500 @ 0x5dc 8009dd0: 805a strh r2, [r3, #2] GBT_MaxLoad.maxOutputCurrent = 4000 - (PSU_MAX_CURRENT*10); //100A 8009dd2: 4b06 ldr r3, [pc, #24] @ (8009dec ) 8009dd4: f640 32b8 movw r2, #3000 @ 0xbb8 8009dd8: 809a strh r2, [r3, #4] GBT_MaxLoad.minOutputCurrent = 4000 - (PSU_MIN_CURRENT*10); //1A 8009dda: 4b04 ldr r3, [pc, #16] @ (8009dec ) 8009ddc: f640 7296 movw r2, #3990 @ 0xf96 8009de0: 80da strh r2, [r3, #6] } 8009de2: bf00 nop 8009de4: bd80 pop {r7, pc} 8009de6: bf00 nop 8009de8: 20000308 .word 0x20000308 8009dec: 20000320 .word 0x20000320 08009df0 : void GBT_SetConfig(){ 8009df0: b580 push {r7, lr} 8009df2: af00 add r7, sp, #0 set_Time(config.unixTime); 8009df4: 4b0c ldr r3, [pc, #48] @ (8009e28 ) 8009df6: f8d3 3007 ldr.w r3, [r3, #7] 8009dfa: 4618 mov r0, r3 8009dfc: f003 ff00 bl 800dc00 GBT_ChargerInfo.chargerLocation[0] = config.location[0]; 8009e00: 4b09 ldr r3, [pc, #36] @ (8009e28 ) 8009e02: 781a ldrb r2, [r3, #0] 8009e04: 4b09 ldr r3, [pc, #36] @ (8009e2c ) 8009e06: 715a strb r2, [r3, #5] GBT_ChargerInfo.chargerLocation[1] = config.location[1]; 8009e08: 4b07 ldr r3, [pc, #28] @ (8009e28 ) 8009e0a: 785a ldrb r2, [r3, #1] 8009e0c: 4b07 ldr r3, [pc, #28] @ (8009e2c ) 8009e0e: 719a strb r2, [r3, #6] GBT_ChargerInfo.chargerLocation[2] = config.location[2]; 8009e10: 4b05 ldr r3, [pc, #20] @ (8009e28 ) 8009e12: 789a ldrb r2, [r3, #2] 8009e14: 4b05 ldr r3, [pc, #20] @ (8009e2c ) 8009e16: 71da strb r2, [r3, #7] GBT_ChargerInfo.chargerNumber = config.chargerNumber; 8009e18: 4b03 ldr r3, [pc, #12] @ (8009e28 ) 8009e1a: f8d3 3003 ldr.w r3, [r3, #3] 8009e1e: 4a03 ldr r2, [pc, #12] @ (8009e2c ) 8009e20: f8c2 3001 str.w r3, [r2, #1] } 8009e24: bf00 nop 8009e26: bd80 pop {r7, pc} 8009e28: 20000060 .word 0x20000060 8009e2c: 20000328 .word 0x20000328 08009e30 : void GBT_ChargerTask(){ 8009e30: b5b0 push {r4, r5, r7, lr} 8009e32: b084 sub sp, #16 8009e34: af02 add r7, sp, #8 //GBT_LockTask(); if(j_rx.state == 2){ 8009e36: 4bab ldr r3, [pc, #684] @ (800a0e4 ) 8009e38: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8009e3c: 2b02 cmp r3, #2 8009e3e: f040 80d1 bne.w 8009fe4 switch (j_rx.PGN){ 8009e42: 4ba8 ldr r3, [pc, #672] @ (800a0e4 ) 8009e44: f8d3 3100 ldr.w r3, [r3, #256] @ 0x100 8009e48: f5b3 5f1c cmp.w r3, #9984 @ 0x2700 8009e4c: d047 beq.n 8009ede 8009e4e: f5b3 5f1c cmp.w r3, #9984 @ 0x2700 8009e52: f200 80c3 bhi.w 8009fdc 8009e56: f5b3 5fe0 cmp.w r3, #7168 @ 0x1c00 8009e5a: f000 80b6 beq.w 8009fca 8009e5e: f5b3 5fe0 cmp.w r3, #7168 @ 0x1c00 8009e62: f200 80bb bhi.w 8009fdc 8009e66: f5b3 5fb8 cmp.w r3, #5888 @ 0x1700 8009e6a: f000 80b2 beq.w 8009fd2 8009e6e: f5b3 5fb8 cmp.w r3, #5888 @ 0x1700 8009e72: f200 80b3 bhi.w 8009fdc 8009e76: f5b3 5fb0 cmp.w r3, #5632 @ 0x1600 8009e7a: f000 80ac beq.w 8009fd6 8009e7e: f5b3 5fb0 cmp.w r3, #5632 @ 0x1600 8009e82: f200 80ab bhi.w 8009fdc 8009e86: f5b3 5fa8 cmp.w r3, #5376 @ 0x1500 8009e8a: f000 80a6 beq.w 8009fda 8009e8e: f5b3 5fa8 cmp.w r3, #5376 @ 0x1500 8009e92: f200 80a3 bhi.w 8009fdc 8009e96: f5b3 5f98 cmp.w r3, #4864 @ 0x1300 8009e9a: f000 8086 beq.w 8009faa 8009e9e: f5b3 5f98 cmp.w r3, #4864 @ 0x1300 8009ea2: f200 809b bhi.w 8009fdc 8009ea6: f5b3 5f88 cmp.w r3, #4352 @ 0x1100 8009eaa: d06f beq.n 8009f8c 8009eac: f5b3 5f88 cmp.w r3, #4352 @ 0x1100 8009eb0: f200 8094 bhi.w 8009fdc 8009eb4: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009eb8: d046 beq.n 8009f48 8009eba: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009ebe: f200 808d bhi.w 8009fdc 8009ec2: f5b3 6f10 cmp.w r3, #2304 @ 0x900 8009ec6: d02c beq.n 8009f22 8009ec8: f5b3 6f10 cmp.w r3, #2304 @ 0x900 8009ecc: f200 8086 bhi.w 8009fdc 8009ed0: f5b3 7f00 cmp.w r3, #512 @ 0x200 8009ed4: d00b beq.n 8009eee 8009ed6: f5b3 6fc0 cmp.w r3, #1536 @ 0x600 8009eda: d018 beq.n 8009f0e 8009edc: e07e b.n 8009fdc case 0x2700: //PGN BHM GBT_BHM_recv = 1; 8009ede: 4b82 ldr r3, [pc, #520] @ (800a0e8 ) 8009ee0: 2201 movs r2, #1 8009ee2: 701a strb r2, [r3, #0] memcpy (&GBT_MaxVoltage, j_rx.data, sizeof(GBT_MaxVoltage)); 8009ee4: 4b7f ldr r3, [pc, #508] @ (800a0e4 ) 8009ee6: 881a ldrh r2, [r3, #0] 8009ee8: 4b80 ldr r3, [pc, #512] @ (800a0ec ) 8009eea: 801a strh r2, [r3, #0] break; 8009eec: e076 b.n 8009fdc case 0x0200: //PGN BRM LONG GBT_BAT_INFO_recv = 1; 8009eee: 4b80 ldr r3, [pc, #512] @ (800a0f0 ) 8009ef0: 2201 movs r2, #1 8009ef2: 701a strb r2, [r3, #0] memcpy (&GBT_EVInfo, j_rx.data, sizeof(GBT_EVInfo)); 8009ef4: 4a7f ldr r2, [pc, #508] @ (800a0f4 ) 8009ef6: 4b7b ldr r3, [pc, #492] @ (800a0e4 ) 8009ef8: 4614 mov r4, r2 8009efa: 461d mov r5, r3 8009efc: cd0f ldmia r5!, {r0, r1, r2, r3} 8009efe: c40f stmia r4!, {r0, r1, r2, r3} 8009f00: cd0f ldmia r5!, {r0, r1, r2, r3} 8009f02: c40f stmia r4!, {r0, r1, r2, r3} 8009f04: cd0f ldmia r5!, {r0, r1, r2, r3} 8009f06: c40f stmia r4!, {r0, r1, r2, r3} 8009f08: 682b ldr r3, [r5, #0] 8009f0a: 7023 strb r3, [r4, #0] break; 8009f0c: e066 b.n 8009fdc case 0x0600: //PGN BCP LONG GBT_BAT_STAT_recv = 1; 8009f0e: 4b7a ldr r3, [pc, #488] @ (800a0f8 ) 8009f10: 2201 movs r2, #1 8009f12: 701a strb r2, [r3, #0] memcpy (&GBT_BATStat, j_rx.data, sizeof(GBT_BATStat)); 8009f14: 4a79 ldr r2, [pc, #484] @ (800a0fc ) 8009f16: 4b73 ldr r3, [pc, #460] @ (800a0e4 ) 8009f18: 4614 mov r4, r2 8009f1a: cb0f ldmia r3, {r0, r1, r2, r3} 8009f1c: c407 stmia r4!, {r0, r1, r2} 8009f1e: 7023 strb r3, [r4, #0] break; 8009f20: e05c b.n 8009fdc case 0x0900: //PGN BRO GBT_BRO_recv = 1; 8009f22: 4b77 ldr r3, [pc, #476] @ (800a100 ) 8009f24: 2201 movs r2, #1 8009f26: 701a strb r2, [r3, #0] if(j_rx.data[0] == 0xAA) EV_ready = 1; 8009f28: 4b6e ldr r3, [pc, #440] @ (800a0e4 ) 8009f2a: 781b ldrb r3, [r3, #0] 8009f2c: 2baa cmp r3, #170 @ 0xaa 8009f2e: d103 bne.n 8009f38 8009f30: 4b74 ldr r3, [pc, #464] @ (800a104 ) 8009f32: 2201 movs r2, #1 8009f34: 701a strb r2, [r3, #0] 8009f36: e002 b.n 8009f3e else EV_ready = 0; 8009f38: 4b72 ldr r3, [pc, #456] @ (800a104 ) 8009f3a: 2200 movs r2, #0 8009f3c: 701a strb r2, [r3, #0] GBT_BRO = j_rx.data[0]; 8009f3e: 4b69 ldr r3, [pc, #420] @ (800a0e4 ) 8009f40: 781a ldrb r2, [r3, #0] 8009f42: 4b71 ldr r3, [pc, #452] @ (800a108 ) 8009f44: 701a strb r2, [r3, #0] break; 8009f46: e049 b.n 8009fdc case 0x1000: //PGN BCL GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 8009f48: f004 fc42 bl 800e7d0 8009f4c: 4603 mov r3, r0 8009f4e: 4a6f ldr r2, [pc, #444] @ (800a10c ) 8009f50: 6013 str r3, [r2, #0] //TODO: power block memcpy (&GBT_ReqPower, j_rx.data, sizeof(GBT_ReqPower)); 8009f52: 4b6f ldr r3, [pc, #444] @ (800a110 ) 8009f54: 4a63 ldr r2, [pc, #396] @ (800a0e4 ) 8009f56: e892 0003 ldmia.w r2, {r0, r1} 8009f5a: 6018 str r0, [r3, #0] 8009f5c: 3304 adds r3, #4 8009f5e: 7019 strb r1, [r3, #0] uint16_t volt = GBT_ReqPower.requestedVoltage; // 0.1V/bit 8009f60: 4b6b ldr r3, [pc, #428] @ (800a110 ) 8009f62: 881b ldrh r3, [r3, #0] 8009f64: 80fb strh r3, [r7, #6] uint16_t curr = 4000 - GBT_ReqPower.requestedCurrent; // 0.1A/bit 8009f66: 4b6a ldr r3, [pc, #424] @ (800a110 ) 8009f68: 885b ldrh r3, [r3, #2] 8009f6a: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 8009f6e: 80bb strh r3, [r7, #4] CONN.RequestedVoltage = volt / 10; // В 8009f70: 88fb ldrh r3, [r7, #6] 8009f72: 4a68 ldr r2, [pc, #416] @ (800a114 ) 8009f74: fba2 2303 umull r2, r3, r2, r3 8009f78: 08db lsrs r3, r3, #3 8009f7a: b29a uxth r2, r3 8009f7c: 4b66 ldr r3, [pc, #408] @ (800a118 ) 8009f7e: f8a3 200f strh.w r2, [r3, #15] CONN.WantedCurrent = curr; // 0.1A 8009f82: 4b65 ldr r3, [pc, #404] @ (800a118 ) 8009f84: 88ba ldrh r2, [r7, #4] 8009f86: f8a3 201b strh.w r2, [r3, #27] break; 8009f8a: e027 b.n 8009fdc case 0x1100: //PGN BCS GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 8009f8c: f004 fc20 bl 800e7d0 8009f90: 4603 mov r3, r0 8009f92: 4a5e ldr r2, [pc, #376] @ (800a10c ) 8009f94: 6013 str r3, [r2, #0] //TODO memcpy (&GBT_ChargingStatus, j_rx.data, sizeof(GBT_ChargingStatus)); 8009f96: 4b61 ldr r3, [pc, #388] @ (800a11c ) 8009f98: 4a52 ldr r2, [pc, #328] @ (800a0e4 ) 8009f9a: ca07 ldmia r2, {r0, r1, r2} 8009f9c: c303 stmia r3!, {r0, r1} 8009f9e: 701a strb r2, [r3, #0] CONN.SOC = GBT_ChargingStatus.currentChargeState; 8009fa0: 4b5e ldr r3, [pc, #376] @ (800a11c ) 8009fa2: 799a ldrb r2, [r3, #6] 8009fa4: 4b5c ldr r3, [pc, #368] @ (800a118 ) 8009fa6: 709a strb r2, [r3, #2] break; 8009fa8: e018 b.n 8009fdc case 0x1300: //PGN BSM GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 8009faa: f004 fc11 bl 800e7d0 8009fae: 4603 mov r3, r0 8009fb0: 4a56 ldr r2, [pc, #344] @ (800a10c ) 8009fb2: 6013 str r3, [r2, #0] //TODO memcpy (&GBT_BatteryStatus, j_rx.data, sizeof(GBT_BatteryStatus)); 8009fb4: 4b5a ldr r3, [pc, #360] @ (800a120 ) 8009fb6: 4a4b ldr r2, [pc, #300] @ (800a0e4 ) 8009fb8: e892 0003 ldmia.w r2, {r0, r1} 8009fbc: 6018 str r0, [r3, #0] 8009fbe: 3304 adds r3, #4 8009fc0: 8019 strh r1, [r3, #0] 8009fc2: 3302 adds r3, #2 8009fc4: 0c0a lsrs r2, r1, #16 8009fc6: 701a strb r2, [r3, #0] break; 8009fc8: e008 b.n 8009fdc // case 0x1900: //PGN BST // break; case 0x1C00: //PGN BSD //TODO SOC Voltage Temp GBT_BSD_recv = 1; 8009fca: 4b56 ldr r3, [pc, #344] @ (800a124 ) 8009fcc: 2201 movs r2, #1 8009fce: 701a strb r2, [r3, #0] break; 8009fd0: e004 b.n 8009fdc break; 8009fd2: bf00 nop 8009fd4: e002 b.n 8009fdc break; 8009fd6: bf00 nop 8009fd8: e000 b.n 8009fdc break; 8009fda: bf00 nop // break; //BSM BMV BMT BSP BST BSD BEM } j_rx.state = 0; 8009fdc: 4b41 ldr r3, [pc, #260] @ (800a0e4 ) 8009fde: 2200 movs r2, #0 8009fe0: f883 210a strb.w r2, [r3, #266] @ 0x10a } if((HAL_GetTick() - GBT_delay_start) < GBT_delay){ 8009fe4: f004 fbf4 bl 800e7d0 8009fe8: 4602 mov r2, r0 8009fea: 4b4f ldr r3, [pc, #316] @ (800a128 ) 8009fec: 681b ldr r3, [r3, #0] 8009fee: 1ad2 subs r2, r2, r3 8009ff0: 4b4e ldr r3, [pc, #312] @ (800a12c ) 8009ff2: 681b ldr r3, [r3, #0] 8009ff4: 429a cmp r2, r3 8009ff6: f0c0 8474 bcc.w 800a8e2 //waiting }else switch (GBT_State){ 8009ffa: 4b4d ldr r3, [pc, #308] @ (800a130 ) 8009ffc: 781b ldrb r3, [r3, #0] 8009ffe: 3b10 subs r3, #16 800a000: 2b12 cmp r3, #18 800a002: f200 844f bhi.w 800a8a4 800a006: a201 add r2, pc, #4 @ (adr r2, 800a00c ) 800a008: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a00c: 0800a059 .word 0x0800a059 800a010: 0800a8a5 .word 0x0800a8a5 800a014: 0800a8a5 .word 0x0800a8a5 800a018: 0800a07f .word 0x0800a07f 800a01c: 0800a091 .word 0x0800a091 800a020: 0800a141 .word 0x0800a141 800a024: 0800a18b .word 0x0800a18b 800a028: 0800a1fd .word 0x0800a1fd 800a02c: 0800a239 .word 0x0800a239 800a030: 0800a28b .word 0x0800a28b 800a034: 0800a409 .word 0x0800a409 800a038: 0800a50d .word 0x0800a50d 800a03c: 0800a59f .word 0x0800a59f 800a040: 0800a5f5 .word 0x0800a5f5 800a044: 0800a667 .word 0x0800a667 800a048: 0800a81d .word 0x0800a81d 800a04c: 0800a85f .word 0x0800a85f 800a050: 0800a87f .word 0x0800a87f 800a054: 0800a891 .word 0x0800a891 case GBT_DISABLED: RELAY_Write(RELAY_AUX0, 0); 800a058: 2100 movs r1, #0 800a05a: 2000 movs r0, #0 800a05c: f7ff fb46 bl 80096ec RELAY_Write(RELAY_AUX1, 0); 800a060: 2100 movs r1, #0 800a062: 2001 movs r0, #1 800a064: f7ff fb42 bl 80096ec if(connectorState == Preparing){ 800a068: 4b32 ldr r3, [pc, #200] @ (800a134 ) 800a06a: 781b ldrb r3, [r3, #0] 800a06c: 2b03 cmp r3, #3 800a06e: f040 841d bne.w 800a8ac GBT_Reset(); 800a072: f000 fdc5 bl 800ac00 GBT_Start();//TODO IF protections (maybe not needed) 800a076: f000 fe51 bl 800ad1c } break; 800a07a: f000 bc17 b.w 800a8ac case GBT_S3_STARTED: GBT_SwitchState(GBT_S31_WAIT_BHM); 800a07e: 2014 movs r0, #20 800a080: f000 fc5c bl 800a93c GBT_Delay(500); 800a084: f44f 70fa mov.w r0, #500 @ 0x1f4 800a088: f000 fd10 bl 800aaac break; 800a08c: f000 bc29 b.w 800a8e2 case GBT_S31_WAIT_BHM: if(j_rx.state == 0) GBT_SendCHM(); 800a090: 4b14 ldr r3, [pc, #80] @ (800a0e4 ) 800a092: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a096: 2b00 cmp r3, #0 800a098: d101 bne.n 800a09e 800a09a: f001 fa3d bl 800b518 GBT_Delay(250); 800a09e: 20fa movs r0, #250 @ 0xfa 800a0a0: f000 fd04 bl 800aaac if(GBT_BHM_recv) { 800a0a4: 4b10 ldr r3, [pc, #64] @ (800a0e8 ) 800a0a6: 781b ldrb r3, [r3, #0] 800a0a8: 2b00 cmp r3, #0 800a0aa: d002 beq.n 800a0b2 GBT_SwitchState(GBT_S4_WAIT_PSU_READY); 800a0ac: 2015 movs r0, #21 800a0ae: f000 fc45 bl 800a93c } //Timeout 10S if((GBT_BHM_recv == 0) && (GBT_StateTick()>10000)) { //BHM Timeout 800a0b2: 4b0d ldr r3, [pc, #52] @ (800a0e8 ) 800a0b4: 781b ldrb r3, [r3, #0] 800a0b6: 2b00 cmp r3, #0 800a0b8: f040 83fa bne.w 800a8b0 800a0bc: f000 fcea bl 800aa94 800a0c0: 4603 mov r3, r0 800a0c2: f242 7210 movw r2, #10000 @ 0x2710 800a0c6: 4293 cmp r3, r2 800a0c8: f240 83f2 bls.w 800a8b0 GBT_Error(0xFCF0C0FC); 800a0cc: 481a ldr r0, [pc, #104] @ (800a138 ) 800a0ce: f000 fd7b bl 800abc8 CONN.chargingError = CONN_ERR_EV_COMM; 800a0d2: 4b11 ldr r3, [pc, #68] @ (800a118 ) 800a0d4: 2209 movs r2, #9 800a0d6: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "BHM Timeout\n"); 800a0d8: 4918 ldr r1, [pc, #96] @ (800a13c ) 800a0da: 2004 movs r0, #4 800a0dc: f001 f9c2 bl 800b464 } break; 800a0e0: e3e6 b.n 800a8b0 800a0e2: bf00 nop 800a0e4: 20000860 .word 0x20000860 800a0e8: 2000031b .word 0x2000031b 800a0ec: 20000330 .word 0x20000330 800a0f0: 20000318 .word 0x20000318 800a0f4: 20000334 .word 0x20000334 800a0f8: 20000319 .word 0x20000319 800a0fc: 20000368 .word 0x20000368 800a100: 2000031a .word 0x2000031a 800a104: 2000031d .word 0x2000031d 800a108: 200003ac .word 0x200003ac 800a10c: 200003b4 .word 0x200003b4 800a110: 20000378 .word 0x20000378 800a114: cccccccd .word 0xcccccccd 800a118: 200002e8 .word 0x200002e8 800a11c: 20000388 .word 0x20000388 800a120: 20000394 .word 0x20000394 800a124: 2000031c .word 0x2000031c 800a128: 20000310 .word 0x20000310 800a12c: 20000314 .word 0x20000314 800a130: 20000308 .word 0x20000308 800a134: 200003c1 .word 0x200003c1 800a138: fcf0c0fc .word 0xfcf0c0fc 800a13c: 080164b8 .word 0x080164b8 case GBT_S4_WAIT_PSU_READY: if(j_rx.state == 0) GBT_SendCHM(); 800a140: 4b96 ldr r3, [pc, #600] @ (800a39c ) 800a142: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a146: 2b00 cmp r3, #0 800a148: d101 bne.n 800a14e 800a14a: f001 f9e5 bl 800b518 GBT_Delay(250); 800a14e: 20fa movs r0, #250 @ 0xfa 800a150: f000 fcac bl 800aaac if(PSU0.ready){ 800a154: 4b92 ldr r3, [pc, #584] @ (800a3a0 ) 800a156: 7a5b ldrb r3, [r3, #9] 800a158: 2b00 cmp r3, #0 800a15a: d002 beq.n 800a162 GBT_SwitchState(GBT_S4_WAIT_PSU_ON); 800a15c: 2016 movs r0, #22 800a15e: f000 fbed bl 800a93c } if(GBT_StateTick()>10000){ 800a162: f000 fc97 bl 800aa94 800a166: 4603 mov r3, r0 800a168: f242 7210 movw r2, #10000 @ 0x2710 800a16c: 4293 cmp r3, r2 800a16e: f240 83a1 bls.w 800a8b4 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a172: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a176: f000 fcd3 bl 800ab20 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a17a: 4b8a ldr r3, [pc, #552] @ (800a3a4 ) 800a17c: 220a movs r2, #10 800a17e: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU ready timeout, stopping...\n"); 800a180: 4989 ldr r1, [pc, #548] @ (800a3a8 ) 800a182: 2004 movs r0, #4 800a184: f001 f96e bl 800b464 break; 800a188: e3ab b.n 800a8e2 } break; case GBT_S4_WAIT_PSU_ON: if(j_rx.state == 0) GBT_SendCHM(); 800a18a: 4b84 ldr r3, [pc, #528] @ (800a39c ) 800a18c: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a190: 2b00 cmp r3, #0 800a192: d101 bne.n 800a198 800a194: f001 f9c0 bl 800b518 GBT_Delay(250); 800a198: 20fa movs r0, #250 @ 0xfa 800a19a: f000 fc87 bl 800aaac CONN.RequestedVoltage = GBT_MaxVoltage.maxOutputVoltage / 10; // 0.1V -> V 800a19e: 4b83 ldr r3, [pc, #524] @ (800a3ac ) 800a1a0: 881b ldrh r3, [r3, #0] 800a1a2: 4a83 ldr r2, [pc, #524] @ (800a3b0 ) 800a1a4: fba2 2303 umull r2, r3, r2, r3 800a1a8: 08db lsrs r3, r3, #3 800a1aa: b29a uxth r2, r3 800a1ac: 4b7d ldr r3, [pc, #500] @ (800a3a4 ) 800a1ae: f8a3 200f strh.w r2, [r3, #15] CONN.WantedCurrent = 10; // 1A max (0.1A units) 800a1b2: 4b7c ldr r3, [pc, #496] @ (800a3a4 ) 800a1b4: 2200 movs r2, #0 800a1b6: f042 020a orr.w r2, r2, #10 800a1ba: 76da strb r2, [r3, #27] 800a1bc: 2200 movs r2, #0 800a1be: 771a strb r2, [r3, #28] CONN.EnableOutput = 1; 800a1c0: 4b78 ldr r3, [pc, #480] @ (800a3a4 ) 800a1c2: 2201 movs r2, #1 800a1c4: 75da strb r2, [r3, #23] if(PSU0.state == PSU_CONNECTED){ 800a1c6: 4b76 ldr r3, [pc, #472] @ (800a3a0 ) 800a1c8: 79db ldrb r3, [r3, #7] 800a1ca: 2b05 cmp r3, #5 800a1cc: d102 bne.n 800a1d4 GBT_SwitchState(GBT_S4_ISOTEST); 800a1ce: 2017 movs r0, #23 800a1d0: f000 fbb4 bl 800a93c } if(GBT_StateTick()>10000){ 800a1d4: f000 fc5e bl 800aa94 800a1d8: 4603 mov r3, r0 800a1da: f242 7210 movw r2, #10000 @ 0x2710 800a1de: 4293 cmp r3, r2 800a1e0: f240 836a bls.w 800a8b8 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a1e4: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a1e8: f000 fc9a bl 800ab20 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a1ec: 4b6d ldr r3, [pc, #436] @ (800a3a4 ) 800a1ee: 220a movs r2, #10 800a1f0: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU on timeout, stopping...\n"); 800a1f2: 4970 ldr r1, [pc, #448] @ (800a3b4 ) 800a1f4: 2004 movs r0, #4 800a1f6: f001 f935 bl 800b464 break; 800a1fa: e372 b.n 800a8e2 } break; case GBT_S4_ISOTEST: if(j_rx.state == 0) GBT_SendCHM(); 800a1fc: 4b67 ldr r3, [pc, #412] @ (800a39c ) 800a1fe: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a202: 2b00 cmp r3, #0 800a204: d101 bne.n 800a20a 800a206: f001 f987 bl 800b518 GBT_Delay(250); 800a20a: 20fa movs r0, #250 @ 0xfa 800a20c: f000 fc4e bl 800aaac //TODO: Isolation test trigger if(CONN.chargingError != CONN_NO_ERROR){ 800a210: 4b64 ldr r3, [pc, #400] @ (800a3a4 ) 800a212: 7f5b ldrb r3, [r3, #29] 800a214: 2b00 cmp r3, #0 800a216: d003 beq.n 800a220 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a218: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a21c: f000 fc80 bl 800ab20 } if(GBT_StateTick()>5000){ 800a220: f000 fc38 bl 800aa94 800a224: 4603 mov r3, r0 800a226: f241 3288 movw r2, #5000 @ 0x1388 800a22a: 4293 cmp r3, r2 800a22c: f240 8346 bls.w 800a8bc GBT_SwitchState(GBT_S4_WAIT_PSU_OFF); 800a230: 2018 movs r0, #24 800a232: f000 fb83 bl 800a93c } break; 800a236: e341 b.n 800a8bc case GBT_S4_WAIT_PSU_OFF: CONN.RequestedVoltage = 0; 800a238: 4b5a ldr r3, [pc, #360] @ (800a3a4 ) 800a23a: 2200 movs r2, #0 800a23c: 73da strb r2, [r3, #15] 800a23e: 2200 movs r2, #0 800a240: 741a strb r2, [r3, #16] CONN.WantedCurrent = 0; 800a242: 4b58 ldr r3, [pc, #352] @ (800a3a4 ) 800a244: 2200 movs r2, #0 800a246: 76da strb r2, [r3, #27] 800a248: 2200 movs r2, #0 800a24a: 771a strb r2, [r3, #28] CONN.EnableOutput = 0; 800a24c: 4b55 ldr r3, [pc, #340] @ (800a3a4 ) 800a24e: 2200 movs r2, #0 800a250: 75da strb r2, [r3, #23] if(GBT_StateTick()>5000){ 800a252: f000 fc1f bl 800aa94 800a256: 4603 mov r3, r0 800a258: f241 3288 movw r2, #5000 @ 0x1388 800a25c: 4293 cmp r3, r2 800a25e: d90b bls.n 800a278 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a260: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a264: f000 fc5c bl 800ab20 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a268: 4b4e ldr r3, [pc, #312] @ (800a3a4 ) 800a26a: 220a movs r2, #10 800a26c: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU off timeout, stopping...\n"); 800a26e: 4952 ldr r1, [pc, #328] @ (800a3b8 ) 800a270: 2004 movs r0, #4 800a272: f001 f8f7 bl 800b464 break; 800a276: e334 b.n 800a8e2 } if(PSU0.PSU_enabled == 0){ 800a278: 4b49 ldr r3, [pc, #292] @ (800a3a0 ) 800a27a: 7a9b ldrb r3, [r3, #10] 800a27c: 2b00 cmp r3, #0 800a27e: f040 831f bne.w 800a8c0 GBT_SwitchState(GBT_S5_BAT_INFO); 800a282: 2019 movs r0, #25 800a284: f000 fb5a bl 800a93c } break; 800a288: e31a b.n 800a8c0 case GBT_S5_BAT_INFO: if(j_rx.state == 0) GBT_SendCRM(0x00); 800a28a: 4b44 ldr r3, [pc, #272] @ (800a39c ) 800a28c: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a290: 2b00 cmp r3, #0 800a292: d102 bne.n 800a29a 800a294: 2000 movs r0, #0 800a296: f001 f953 bl 800b540 GBT_Delay(250); 800a29a: 20fa movs r0, #250 @ 0xfa 800a29c: f000 fc06 bl 800aaac if(GBT_BAT_INFO_recv){ //BRM 800a2a0: 4b46 ldr r3, [pc, #280] @ (800a3bc ) 800a2a2: 781b ldrb r3, [r3, #0] 800a2a4: 2b00 cmp r3, #0 800a2a6: d060 beq.n 800a36a //Got battery info GBT_SwitchState(GBT_S6_BAT_STAT); 800a2a8: 201a movs r0, #26 800a2aa: f000 fb47 bl 800a93c log_printf(LOG_INFO, "EV info:\n"); 800a2ae: 4944 ldr r1, [pc, #272] @ (800a3c0 ) 800a2b0: 2007 movs r0, #7 800a2b2: f001 f8d7 bl 800b464 log_printf(LOG_INFO, "GBT_ver V%d.%d%d\n",GBT_EVInfo.version[0],GBT_EVInfo.version[1],GBT_EVInfo.version[2]); 800a2b6: 4b43 ldr r3, [pc, #268] @ (800a3c4 ) 800a2b8: 781b ldrb r3, [r3, #0] 800a2ba: 461a mov r2, r3 800a2bc: 4b41 ldr r3, [pc, #260] @ (800a3c4 ) 800a2be: 785b ldrb r3, [r3, #1] 800a2c0: 4619 mov r1, r3 800a2c2: 4b40 ldr r3, [pc, #256] @ (800a3c4 ) 800a2c4: 789b ldrb r3, [r3, #2] 800a2c6: 9300 str r3, [sp, #0] 800a2c8: 460b mov r3, r1 800a2ca: 493f ldr r1, [pc, #252] @ (800a3c8 ) 800a2cc: 2007 movs r0, #7 800a2ce: f001 f8c9 bl 800b464 log_printf(LOG_INFO, "Battery type: %d\n",GBT_EVInfo.batteryType); 800a2d2: 4b3c ldr r3, [pc, #240] @ (800a3c4 ) 800a2d4: 78db ldrb r3, [r3, #3] 800a2d6: 461a mov r2, r3 800a2d8: 493c ldr r1, [pc, #240] @ (800a3cc ) 800a2da: 2007 movs r0, #7 800a2dc: f001 f8c2 bl 800b464 log_printf(LOG_INFO, "Battery capacity: %d\n", GBT_EVInfo.batteryCapacity); // 0.1Ah/bit 800a2e0: 4b38 ldr r3, [pc, #224] @ (800a3c4 ) 800a2e2: 889b ldrh r3, [r3, #4] 800a2e4: 461a mov r2, r3 800a2e6: 493a ldr r1, [pc, #232] @ (800a3d0 ) 800a2e8: 2007 movs r0, #7 800a2ea: f001 f8bb bl 800b464 log_printf(LOG_INFO, "Battery voltage: %d\n", GBT_EVInfo.batteryVoltage); // 0.1V/bit 800a2ee: 4b35 ldr r3, [pc, #212] @ (800a3c4 ) 800a2f0: 88db ldrh r3, [r3, #6] 800a2f2: 461a mov r2, r3 800a2f4: 4937 ldr r1, [pc, #220] @ (800a3d4 ) 800a2f6: 2007 movs r0, #7 800a2f8: f001 f8b4 bl 800b464 log_printf(LOG_INFO, "Battery vendor: %.4s\n", GBT_EVInfo.batteryVendor); // Battery vendor (ASCII string) 800a2fc: 4a36 ldr r2, [pc, #216] @ (800a3d8 ) 800a2fe: 4937 ldr r1, [pc, #220] @ (800a3dc ) 800a300: 2007 movs r0, #7 800a302: f001 f8af bl 800b464 log_printf(LOG_INFO, "Battery SN: %lu\n", GBT_EVInfo.batterySN); // int 800a306: 4b2f ldr r3, [pc, #188] @ (800a3c4 ) 800a308: 68db ldr r3, [r3, #12] 800a30a: 461a mov r2, r3 800a30c: 4934 ldr r1, [pc, #208] @ (800a3e0 ) 800a30e: 2007 movs r0, #7 800a310: f001 f8a8 bl 800b464 log_printf(LOG_INFO, "Battery manufacture date: %02d.%02d.%04d\n", GBT_EVInfo.batteryManuD, GBT_EVInfo.batteryManuM ,GBT_EVInfo.batteryManuY+1985); // year (offset 1985) 800a314: 4b2b ldr r3, [pc, #172] @ (800a3c4 ) 800a316: 7c9b ldrb r3, [r3, #18] 800a318: 461a mov r2, r3 800a31a: 4b2a ldr r3, [pc, #168] @ (800a3c4 ) 800a31c: 7c5b ldrb r3, [r3, #17] 800a31e: 4619 mov r1, r3 800a320: 4b28 ldr r3, [pc, #160] @ (800a3c4 ) 800a322: 7c1b ldrb r3, [r3, #16] 800a324: f203 73c1 addw r3, r3, #1985 @ 0x7c1 800a328: 9300 str r3, [sp, #0] 800a32a: 460b mov r3, r1 800a32c: 492d ldr r1, [pc, #180] @ (800a3e4 ) 800a32e: 2007 movs r0, #7 800a330: f001 f898 bl 800b464 log_printf(LOG_INFO, "Battery cycles: %d\n", GBT_EVInfo.batteryCycleCount); //uint24_t 800a334: 4b23 ldr r3, [pc, #140] @ (800a3c4 ) 800a336: 7cda ldrb r2, [r3, #19] 800a338: 8a9b ldrh r3, [r3, #20] 800a33a: 021b lsls r3, r3, #8 800a33c: 4313 orrs r3, r2 800a33e: 461a mov r2, r3 800a340: 4929 ldr r1, [pc, #164] @ (800a3e8 ) 800a342: 2007 movs r0, #7 800a344: f001 f88e bl 800b464 log_printf(LOG_INFO, "Own auto: %d\n", GBT_EVInfo.ownAuto); // 0 = lizing, 1 = own auto 800a348: 4b1e ldr r3, [pc, #120] @ (800a3c4 ) 800a34a: 7d9b ldrb r3, [r3, #22] 800a34c: 461a mov r2, r3 800a34e: 4927 ldr r1, [pc, #156] @ (800a3ec ) 800a350: 2007 movs r0, #7 800a352: f001 f887 bl 800b464 log_printf(LOG_INFO, "EVIN: %.17s\n", GBT_EVInfo.EVIN); //EVIN 800a356: 4a26 ldr r2, [pc, #152] @ (800a3f0 ) 800a358: 4926 ldr r1, [pc, #152] @ (800a3f4 ) 800a35a: 2007 movs r0, #7 800a35c: f001 f882 bl 800b464 log_printf(LOG_INFO, "EV_SW_VER: %.8s\n", GBT_EVInfo.EV_SW_VER); 800a360: 4a25 ldr r2, [pc, #148] @ (800a3f8 ) 800a362: 4926 ldr r1, [pc, #152] @ (800a3fc ) 800a364: 2007 movs r0, #7 800a366: f001 f87d bl 800b464 } //Timeout if((GBT_StateTick()>5000) && (GBT_BAT_INFO_recv == 0)){ 800a36a: f000 fb93 bl 800aa94 800a36e: 4603 mov r3, r0 800a370: f241 3288 movw r2, #5000 @ 0x1388 800a374: 4293 cmp r3, r2 800a376: f240 82a5 bls.w 800a8c4 800a37a: 4b10 ldr r3, [pc, #64] @ (800a3bc ) 800a37c: 781b ldrb r3, [r3, #0] 800a37e: 2b00 cmp r3, #0 800a380: f040 82a0 bne.w 800a8c4 CONN.chargingError = CONN_ERR_EV_COMM; 800a384: 4b07 ldr r3, [pc, #28] @ (800a3a4 ) 800a386: 2209 movs r2, #9 800a388: 775a strb r2, [r3, #29] GBT_Error(0xFDF0C0FC); //BRM Timeout 800a38a: 481d ldr r0, [pc, #116] @ (800a400 ) 800a38c: f000 fc1c bl 800abc8 log_printf(LOG_ERR, "BRM Timeout\n"); 800a390: 491c ldr r1, [pc, #112] @ (800a404 ) 800a392: 2004 movs r0, #4 800a394: f001 f866 bl 800b464 } break; 800a398: e294 b.n 800a8c4 800a39a: bf00 nop 800a39c: 20000860 .word 0x20000860 800a3a0: 200009fc .word 0x200009fc 800a3a4: 200002e8 .word 0x200002e8 800a3a8: 080164c8 .word 0x080164c8 800a3ac: 20000330 .word 0x20000330 800a3b0: cccccccd .word 0xcccccccd 800a3b4: 080164e8 .word 0x080164e8 800a3b8: 08016508 .word 0x08016508 800a3bc: 20000318 .word 0x20000318 800a3c0: 08016528 .word 0x08016528 800a3c4: 20000334 .word 0x20000334 800a3c8: 08016534 .word 0x08016534 800a3cc: 08016548 .word 0x08016548 800a3d0: 0801655c .word 0x0801655c 800a3d4: 08016574 .word 0x08016574 800a3d8: 2000033c .word 0x2000033c 800a3dc: 0801658c .word 0x0801658c 800a3e0: 080165a4 .word 0x080165a4 800a3e4: 080165b8 .word 0x080165b8 800a3e8: 080165e4 .word 0x080165e4 800a3ec: 080165f8 .word 0x080165f8 800a3f0: 2000034c .word 0x2000034c 800a3f4: 08016608 .word 0x08016608 800a3f8: 2000035d .word 0x2000035d 800a3fc: 08016618 .word 0x08016618 800a400: fdf0c0fc .word 0xfdf0c0fc 800a404: 0801662c .word 0x0801662c case GBT_S6_BAT_STAT: if(j_rx.state == 0) GBT_SendCRM(0xAA); 800a408: 4bb0 ldr r3, [pc, #704] @ (800a6cc ) 800a40a: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a40e: 2b00 cmp r3, #0 800a410: d102 bne.n 800a418 800a412: 20aa movs r0, #170 @ 0xaa 800a414: f001 f894 bl 800b540 GBT_Delay(250); 800a418: 20fa movs r0, #250 @ 0xfa 800a41a: f000 fb47 bl 800aaac if(GBT_BAT_STAT_recv){ 800a41e: 4bac ldr r3, [pc, #688] @ (800a6d0 ) 800a420: 781b ldrb r3, [r3, #0] 800a422: 2b00 cmp r3, #0 800a424: d05a beq.n 800a4dc //Got battery status GBT_SwitchState(GBT_S7_BMS_WAIT); 800a426: 201b movs r0, #27 800a428: f000 fa88 bl 800a93c log_printf(LOG_INFO, "Battery info:\n"); 800a42c: 49a9 ldr r1, [pc, #676] @ (800a6d4 ) 800a42e: 2007 movs r0, #7 800a430: f001 f818 bl 800b464 log_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxCellVoltage/100); // 0.01v/bit 800a434: 4ba8 ldr r3, [pc, #672] @ (800a6d8 ) 800a436: 881b ldrh r3, [r3, #0] 800a438: 4aa8 ldr r2, [pc, #672] @ (800a6dc ) 800a43a: fba2 2303 umull r2, r3, r2, r3 800a43e: 095b lsrs r3, r3, #5 800a440: b29b uxth r3, r3 800a442: 461a mov r2, r3 800a444: 49a6 ldr r1, [pc, #664] @ (800a6e0 ) 800a446: 2007 movs r0, #7 800a448: f001 f80c bl 800b464 log_printf(LOG_INFO, "maxCC %dA\n",GBT_BATStat.maxChargingCurrent/10); // 0.1A/bit 800a44c: 4ba2 ldr r3, [pc, #648] @ (800a6d8 ) 800a44e: 885b ldrh r3, [r3, #2] 800a450: 4aa4 ldr r2, [pc, #656] @ (800a6e4 ) 800a452: fba2 2303 umull r2, r3, r2, r3 800a456: 08db lsrs r3, r3, #3 800a458: b29b uxth r3, r3 800a45a: 461a mov r2, r3 800a45c: 49a2 ldr r1, [pc, #648] @ (800a6e8 ) 800a45e: 2007 movs r0, #7 800a460: f001 f800 bl 800b464 log_printf(LOG_INFO, "totE %dkWh\n",GBT_BATStat.totalEnergy/10); // 0.1kWh 800a464: 4b9c ldr r3, [pc, #624] @ (800a6d8 ) 800a466: 889b ldrh r3, [r3, #4] 800a468: 4a9e ldr r2, [pc, #632] @ (800a6e4 ) 800a46a: fba2 2303 umull r2, r3, r2, r3 800a46e: 08db lsrs r3, r3, #3 800a470: b29b uxth r3, r3 800a472: 461a mov r2, r3 800a474: 499d ldr r1, [pc, #628] @ (800a6ec ) 800a476: 2007 movs r0, #7 800a478: f000 fff4 bl 800b464 log_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxChargingVoltage/10); // 0.1V/ bit 800a47c: 4b96 ldr r3, [pc, #600] @ (800a6d8 ) 800a47e: 88db ldrh r3, [r3, #6] 800a480: 4a98 ldr r2, [pc, #608] @ (800a6e4 ) 800a482: fba2 2303 umull r2, r3, r2, r3 800a486: 08db lsrs r3, r3, #3 800a488: b29b uxth r3, r3 800a48a: 461a mov r2, r3 800a48c: 4994 ldr r1, [pc, #592] @ (800a6e0 ) 800a48e: 2007 movs r0, #7 800a490: f000 ffe8 bl 800b464 log_printf(LOG_INFO, "maxT %dC\n",(int16_t)GBT_BATStat.maxTemp-50); // 1C/bit, -50C offset 800a494: 4b90 ldr r3, [pc, #576] @ (800a6d8 ) 800a496: 7a1b ldrb r3, [r3, #8] 800a498: 3b32 subs r3, #50 @ 0x32 800a49a: 461a mov r2, r3 800a49c: 4994 ldr r1, [pc, #592] @ (800a6f0 ) 800a49e: 2007 movs r0, #7 800a4a0: f000 ffe0 bl 800b464 log_printf(LOG_INFO, "SOC %dp\n",GBT_BATStat.SOC/10); // 0.1%/bit , 0..100% 800a4a4: 4b8c ldr r3, [pc, #560] @ (800a6d8 ) 800a4a6: f8b3 3009 ldrh.w r3, [r3, #9] 800a4aa: b29b uxth r3, r3 800a4ac: 4a8d ldr r2, [pc, #564] @ (800a6e4 ) 800a4ae: fba2 2303 umull r2, r3, r2, r3 800a4b2: 08db lsrs r3, r3, #3 800a4b4: b29b uxth r3, r3 800a4b6: 461a mov r2, r3 800a4b8: 498e ldr r1, [pc, #568] @ (800a6f4 ) 800a4ba: 2007 movs r0, #7 800a4bc: f000 ffd2 bl 800b464 log_printf(LOG_INFO, "Volt. %dV\n",GBT_BATStat.measVoltage/10); // 0.1V/bit 800a4c0: 4b85 ldr r3, [pc, #532] @ (800a6d8 ) 800a4c2: f8b3 300b ldrh.w r3, [r3, #11] 800a4c6: b29b uxth r3, r3 800a4c8: 4a86 ldr r2, [pc, #536] @ (800a6e4 ) 800a4ca: fba2 2303 umull r2, r3, r2, r3 800a4ce: 08db lsrs r3, r3, #3 800a4d0: b29b uxth r3, r3 800a4d2: 461a mov r2, r3 800a4d4: 4988 ldr r1, [pc, #544] @ (800a6f8 ) 800a4d6: 2007 movs r0, #7 800a4d8: f000 ffc4 bl 800b464 } if((GBT_StateTick()>5000) && (GBT_BAT_STAT_recv == 0)){ 800a4dc: f000 fada bl 800aa94 800a4e0: 4603 mov r3, r0 800a4e2: f241 3288 movw r2, #5000 @ 0x1388 800a4e6: 4293 cmp r3, r2 800a4e8: f240 81ee bls.w 800a8c8 800a4ec: 4b78 ldr r3, [pc, #480] @ (800a6d0 ) 800a4ee: 781b ldrb r3, [r3, #0] 800a4f0: 2b00 cmp r3, #0 800a4f2: f040 81e9 bne.w 800a8c8 CONN.chargingError = CONN_ERR_EV_COMM; 800a4f6: 4b81 ldr r3, [pc, #516] @ (800a6fc ) 800a4f8: 2209 movs r2, #9 800a4fa: 775a strb r2, [r3, #29] GBT_Error(0xFCF1C0FC); //BCP Timeout 800a4fc: 4880 ldr r0, [pc, #512] @ (800a700 ) 800a4fe: f000 fb63 bl 800abc8 log_printf(LOG_ERR, "BCP Timeout\n"); 800a502: 4980 ldr r1, [pc, #512] @ (800a704 ) 800a504: 2004 movs r0, #4 800a506: f000 ffad bl 800b464 } break; 800a50a: e1dd b.n 800a8c8 case GBT_S7_BMS_WAIT: if(j_rx.state == 0) GBT_SendCTS(); 800a50c: 4b6f ldr r3, [pc, #444] @ (800a6cc ) 800a50e: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a512: 2b00 cmp r3, #0 800a514: d101 bne.n 800a51a 800a516: f000 ffdb bl 800b4d0 HAL_Delay(2); 800a51a: 2002 movs r0, #2 800a51c: f004 f962 bl 800e7e4 if(j_rx.state == 0) GBT_SendCML(); 800a520: 4b6a ldr r3, [pc, #424] @ (800a6cc ) 800a522: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a526: 2b00 cmp r3, #0 800a528: d101 bne.n 800a52e 800a52a: f000 ffe7 bl 800b4fc GBT_Delay(250); 800a52e: 20fa movs r0, #250 @ 0xfa 800a530: f000 fabc bl 800aaac if((GBT_StateTick()>5000) && (GBT_BRO_recv == 0)){ 800a534: f000 faae bl 800aa94 800a538: 4603 mov r3, r0 800a53a: f241 3288 movw r2, #5000 @ 0x1388 800a53e: 4293 cmp r3, r2 800a540: d90d bls.n 800a55e 800a542: 4b71 ldr r3, [pc, #452] @ (800a708 ) 800a544: 781b ldrb r3, [r3, #0] 800a546: 2b00 cmp r3, #0 800a548: d109 bne.n 800a55e CONN.chargingError = CONN_ERR_EV_COMM; 800a54a: 4b6c ldr r3, [pc, #432] @ (800a6fc ) 800a54c: 2209 movs r2, #9 800a54e: 775a strb r2, [r3, #29] GBT_Error(0xFCF4C0FC); //BRO Timeout 800a550: 486e ldr r0, [pc, #440] @ (800a70c ) 800a552: f000 fb39 bl 800abc8 log_printf(LOG_ERR, "BRO Timeout\n"); 800a556: 496e ldr r1, [pc, #440] @ (800a710 ) 800a558: 2004 movs r0, #4 800a55a: f000 ff83 bl 800b464 } if(EV_ready){ 800a55e: 4b6d ldr r3, [pc, #436] @ (800a714 ) 800a560: 781b ldrb r3, [r3, #0] 800a562: 2b00 cmp r3, #0 800a564: d003 beq.n 800a56e //EV ready (AA) GBT_SwitchState(GBT_S8_INIT_CHARGER); 800a566: 201c movs r0, #28 800a568: f000 f9e8 bl 800a93c CONN.chargingError = CONN_ERR_EV_COMM; GBT_Error(0xFCF4C0FC); //BRO Timeout log_printf(LOG_ERR, "EV not ready for a 60s\n"); } } break; 800a56c: e1ae b.n 800a8cc if((GBT_StateTick()>60000) && (GBT_BRO_recv == 1)){ 800a56e: f000 fa91 bl 800aa94 800a572: 4603 mov r3, r0 800a574: f64e 2260 movw r2, #60000 @ 0xea60 800a578: 4293 cmp r3, r2 800a57a: f240 81a7 bls.w 800a8cc 800a57e: 4b62 ldr r3, [pc, #392] @ (800a708 ) 800a580: 781b ldrb r3, [r3, #0] 800a582: 2b01 cmp r3, #1 800a584: f040 81a2 bne.w 800a8cc CONN.chargingError = CONN_ERR_EV_COMM; 800a588: 4b5c ldr r3, [pc, #368] @ (800a6fc ) 800a58a: 2209 movs r2, #9 800a58c: 775a strb r2, [r3, #29] GBT_Error(0xFCF4C0FC); //BRO Timeout 800a58e: 485f ldr r0, [pc, #380] @ (800a70c ) 800a590: f000 fb1a bl 800abc8 log_printf(LOG_ERR, "EV not ready for a 60s\n"); 800a594: 4960 ldr r1, [pc, #384] @ (800a718 ) 800a596: 2004 movs r0, #4 800a598: f000 ff64 bl 800b464 break; 800a59c: e196 b.n 800a8cc case GBT_S8_INIT_CHARGER: if(j_rx.state == 0) GBT_SendCRO(0x00); 800a59e: 4b4b ldr r3, [pc, #300] @ (800a6cc ) 800a5a0: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a5a4: 2b00 cmp r3, #0 800a5a6: d102 bne.n 800a5ae 800a5a8: 2000 movs r0, #0 800a5aa: f000 ffdf bl 800b56c //TODO GBT_Delay(250); 800a5ae: 20fa movs r0, #250 @ 0xfa 800a5b0: f000 fa7c bl 800aaac // if(GBT_StateTick()>1500){ if(PSU0.ready){ 800a5b4: 4b59 ldr r3, [pc, #356] @ (800a71c ) 800a5b6: 7a5b ldrb r3, [r3, #9] 800a5b8: 2b00 cmp r3, #0 800a5ba: d002 beq.n 800a5c2 //Power Modules initiated GBT_SwitchState(GBT_S9_WAIT_BCL); 800a5bc: 201d movs r0, #29 800a5be: f000 f9bd bl 800a93c } if((GBT_StateTick()>6000) && (PSU0.ready == 0)){ 800a5c2: f000 fa67 bl 800aa94 800a5c6: 4603 mov r3, r0 800a5c8: f241 7270 movw r2, #6000 @ 0x1770 800a5cc: 4293 cmp r3, r2 800a5ce: f240 817f bls.w 800a8d0 800a5d2: 4b52 ldr r3, [pc, #328] @ (800a71c ) 800a5d4: 7a5b ldrb r3, [r3, #9] 800a5d6: 2b00 cmp r3, #0 800a5d8: f040 817a bne.w 800a8d0 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a5dc: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a5e0: f000 fa9e bl 800ab20 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a5e4: 4b45 ldr r3, [pc, #276] @ (800a6fc ) 800a5e6: 220a movs r2, #10 800a5e8: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU not ready, stopping...\n"); 800a5ea: 494d ldr r1, [pc, #308] @ (800a720 ) 800a5ec: 2004 movs r0, #4 800a5ee: f000 ff39 bl 800b464 } break; 800a5f2: e16d b.n 800a8d0 case GBT_S9_WAIT_BCL: if(j_rx.state == 0) GBT_SendCRO(0xAA); 800a5f4: 4b35 ldr r3, [pc, #212] @ (800a6cc ) 800a5f6: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a5fa: 2b00 cmp r3, #0 800a5fc: d102 bne.n 800a604 800a5fe: 20aa movs r0, #170 @ 0xaa 800a600: f000 ffb4 bl 800b56c GBT_Delay(250); 800a604: 20fa movs r0, #250 @ 0xfa 800a606: f000 fa51 bl 800aaac if(GBT_ReqPower.chargingMode != 0){ //REFACTORING 800a60a: 4b46 ldr r3, [pc, #280] @ (800a724 ) 800a60c: 791b ldrb r3, [r3, #4] 800a60e: 2b00 cmp r3, #0 800a610: f000 8160 beq.w 800a8d4 //BCL power requirements received GBT_SwitchState(GBT_S10_CHARGING); 800a614: 201e movs r0, #30 800a616: f000 f991 bl 800a93c GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 800a61a: f004 f8d9 bl 800e7d0 800a61e: 4603 mov r3, r0 800a620: 4a41 ldr r2, [pc, #260] @ (800a728 ) 800a622: 6013 str r3, [r2, #0] CONN_SetState(Charging); 800a624: 2008 movs r0, #8 800a626: f000 fca1 bl 800af6c uint16_t curr = 4000 - GBT_ReqPower.requestedCurrent; 800a62a: 4b3e ldr r3, [pc, #248] @ (800a724 ) 800a62c: 885b ldrh r3, [r3, #2] 800a62e: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 800a632: 807b strh r3, [r7, #2] uint16_t volt = GBT_ReqPower.requestedVoltage; 800a634: 4b3b ldr r3, [pc, #236] @ (800a724 ) 800a636: 881b ldrh r3, [r3, #0] 800a638: 803b strh r3, [r7, #0] //TODO Limits CONN.RequestedVoltage = volt / 10; // В 800a63a: 883b ldrh r3, [r7, #0] 800a63c: 4a29 ldr r2, [pc, #164] @ (800a6e4 ) 800a63e: fba2 2303 umull r2, r3, r2, r3 800a642: 08db lsrs r3, r3, #3 800a644: b29a uxth r2, r3 800a646: 4b2d ldr r3, [pc, #180] @ (800a6fc ) 800a648: f8a3 200f strh.w r2, [r3, #15] CONN.WantedCurrent = curr; // 0.1A 800a64c: 4b2b ldr r3, [pc, #172] @ (800a6fc ) 800a64e: 887a ldrh r2, [r7, #2] 800a650: f8a3 201b strh.w r2, [r3, #27] CONN.EnableOutput = 1; 800a654: 4b29 ldr r3, [pc, #164] @ (800a6fc ) 800a656: 2201 movs r2, #1 800a658: 75da strb r2, [r3, #23] GBT_TimeChargingStarted = get_Current_Time(); 800a65a: f003 fac7 bl 800dbec 800a65e: 4603 mov r3, r0 800a660: 4a32 ldr r2, [pc, #200] @ (800a72c ) 800a662: 6013 str r3, [r2, #0] } break; 800a664: e136 b.n 800a8d4 case GBT_S10_CHARGING: //CHARGING if((HAL_GetTick() - GBT_last_BCL_BCS_BSM_tick) > GBT_BCL_BCS_BSM_TIMEOUT_MS){ 800a666: f004 f8b3 bl 800e7d0 800a66a: 4602 mov r2, r0 800a66c: 4b2e ldr r3, [pc, #184] @ (800a728 ) 800a66e: 681b ldr r3, [r3, #0] 800a670: 1ad3 subs r3, r2, r3 800a672: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800a676: d90b bls.n 800a690 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a678: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a67c: f000 fa50 bl 800ab20 CONN.chargingError = CONN_ERR_EV_COMM; 800a680: 4b1e ldr r3, [pc, #120] @ (800a6fc ) 800a682: 2209 movs r2, #9 800a684: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "BCL/BCS/BSM timeout, stopping...\n"); 800a686: 492a ldr r1, [pc, #168] @ (800a730 ) 800a688: 2005 movs r0, #5 800a68a: f000 feeb bl 800b464 break; 800a68e: e128 b.n 800a8e2 } if(CONN.connControl == CMD_STOP) GBT_StopOCPP(GBT_CST_SUSPENDS_ARTIFICIALLY); 800a690: 4b1a ldr r3, [pc, #104] @ (800a6fc ) 800a692: 781b ldrb r3, [r3, #0] 800a694: 2b01 cmp r3, #1 800a696: d102 bne.n 800a69e 800a698: 4826 ldr r0, [pc, #152] @ (800a734 ) 800a69a: f000 fa5d bl 800ab58 if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_StopOCPP(GBT_CST_SUSPENDS_ARTIFICIALLY); // --> Finished 800a69e: 4b17 ldr r3, [pc, #92] @ (800a6fc ) 800a6a0: 781b ldrb r3, [r3, #0] 800a6a2: 2b03 cmp r3, #3 800a6a4: d102 bne.n 800a6ac 800a6a6: 4823 ldr r0, [pc, #140] @ (800a734 ) 800a6a8: f000 fa56 bl 800ab58 if(GBT_LockState.error) { 800a6ac: 4b22 ldr r3, [pc, #136] @ (800a738 ) 800a6ae: 785b ldrb r3, [r3, #1] 800a6b0: 2b00 cmp r3, #0 800a6b2: d045 beq.n 800a740 GBT_StopEVSE(GBT_CST_OTHERFALUT); // --> Suspend EVSE 800a6b4: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a6b8: f000 fa32 bl 800ab20 CONN.chargingError = CONN_ERR_LOCK; 800a6bc: 4b0f ldr r3, [pc, #60] @ (800a6fc ) 800a6be: 2204 movs r2, #4 800a6c0: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Lock error, stopping...\n"); 800a6c2: 491e ldr r1, [pc, #120] @ (800a73c ) 800a6c4: 2005 movs r0, #5 800a6c6: f000 fecd bl 800b464 break; 800a6ca: e10a b.n 800a8e2 800a6cc: 20000860 .word 0x20000860 800a6d0: 20000319 .word 0x20000319 800a6d4: 0801663c .word 0x0801663c 800a6d8: 20000368 .word 0x20000368 800a6dc: 51eb851f .word 0x51eb851f 800a6e0: 0801664c .word 0x0801664c 800a6e4: cccccccd .word 0xcccccccd 800a6e8: 08016658 .word 0x08016658 800a6ec: 08016664 .word 0x08016664 800a6f0: 08016670 .word 0x08016670 800a6f4: 0801667c .word 0x0801667c 800a6f8: 08016688 .word 0x08016688 800a6fc: 200002e8 .word 0x200002e8 800a700: fcf1c0fc .word 0xfcf1c0fc 800a704: 08016694 .word 0x08016694 800a708: 2000031a .word 0x2000031a 800a70c: fcf4c0fc .word 0xfcf4c0fc 800a710: 080166a4 .word 0x080166a4 800a714: 2000031d .word 0x2000031d 800a718: 080166b4 .word 0x080166b4 800a71c: 200009fc .word 0x200009fc 800a720: 080166cc .word 0x080166cc 800a724: 20000378 .word 0x20000378 800a728: 200003b4 .word 0x200003b4 800a72c: 200003b0 .word 0x200003b0 800a730: 080166e8 .word 0x080166e8 800a734: 0400f0f0 .word 0x0400f0f0 800a738: 20000008 .word 0x20000008 800a73c: 0801670c .word 0x0801670c } if(CONN_CC_GetState()!=GBT_CC_4V){ 800a740: f000 fcf0 bl 800b124 800a744: 4603 mov r3, r0 800a746: 2b03 cmp r3, #3 800a748: d00b beq.n 800a762 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a74a: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a74e: f000 f9e7 bl 800ab20 CONN.chargingError = CONN_ERR_HOTPLUG; 800a752: 4b6c ldr r3, [pc, #432] @ (800a904 ) 800a754: 2208 movs r2, #8 800a756: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Hotplug detected, stopping...\n"); 800a758: 496b ldr r1, [pc, #428] @ (800a908 ) 800a75a: 2005 movs r0, #5 800a75c: f000 fe82 bl 800b464 break; 800a760: e0bf b.n 800a8e2 } if((GBT_ReadTemp(0) > 90) || (GBT_ReadTemp(1) > 90)) { 800a762: 2000 movs r0, #0 800a764: f7ff f91a bl 800999c 800a768: 4603 mov r3, r0 800a76a: 2b5a cmp r3, #90 @ 0x5a 800a76c: dc05 bgt.n 800a77a 800a76e: 2001 movs r0, #1 800a770: f7ff f914 bl 800999c 800a774: 4603 mov r3, r0 800a776: 2b5a cmp r3, #90 @ 0x5a 800a778: dd14 ble.n 800a7a4 GBT_StopEVSE(GBT_CST_CONNECTOR_OVER_TEMP); 800a77a: 4864 ldr r0, [pc, #400] @ (800a90c ) 800a77c: f000 f9d0 bl 800ab20 CONN.chargingError = CONN_ERR_CONN_TEMP; 800a780: 4b60 ldr r3, [pc, #384] @ (800a904 ) 800a782: 2205 movs r2, #5 800a784: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Connector overheat %d %d, stopping...\n", GBT_ReadTemp(0), GBT_ReadTemp(1)); 800a786: 2000 movs r0, #0 800a788: f7ff f908 bl 800999c 800a78c: 4603 mov r3, r0 800a78e: 461c mov r4, r3 800a790: 2001 movs r0, #1 800a792: f7ff f903 bl 800999c 800a796: 4603 mov r3, r0 800a798: 4622 mov r2, r4 800a79a: 495d ldr r1, [pc, #372] @ (800a910 ) 800a79c: 2005 movs r0, #5 800a79e: f000 fe61 bl 800b464 break; 800a7a2: e09e b.n 800a8e2 } if(CONN.chargingError != CONN_NO_ERROR){ // --> Suspend EVSE 800a7a4: 4b57 ldr r3, [pc, #348] @ (800a904 ) 800a7a6: 7f5b ldrb r3, [r3, #29] 800a7a8: 2b00 cmp r3, #0 800a7aa: d003 beq.n 800a7b4 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a7ac: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a7b0: f000 f9b6 bl 800ab20 // log_printf(LOG_WARN, "Isolation error\n"); } //GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111100;//NOT PERMITTED GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111101; 800a7b4: 4b57 ldr r3, [pc, #348] @ (800a914 ) 800a7b6: f64f 72fd movw r2, #65533 @ 0xfffd 800a7ba: 80da strh r2, [r3, #6] GBT_ChargerCurrentStatus.chargingTime = (get_Current_Time() - GBT_TimeChargingStarted)/60; 800a7bc: f003 fa16 bl 800dbec 800a7c0: 4602 mov r2, r0 800a7c2: 4b55 ldr r3, [pc, #340] @ (800a918 ) 800a7c4: 681b ldr r3, [r3, #0] 800a7c6: 1ad3 subs r3, r2, r3 800a7c8: 4a54 ldr r2, [pc, #336] @ (800a91c ) 800a7ca: fba2 2303 umull r2, r3, r2, r3 800a7ce: 095b lsrs r3, r3, #5 800a7d0: b29a uxth r2, r3 800a7d2: 4b50 ldr r3, [pc, #320] @ (800a914 ) 800a7d4: 809a strh r2, [r3, #4] GBT_ChargerCurrentStatus.outputCurrent = 4000 - CONN.MeasuredCurrent; // 0.1A 800a7d6: 4b4b ldr r3, [pc, #300] @ (800a904 ) 800a7d8: f8b3 3015 ldrh.w r3, [r3, #21] 800a7dc: b29b uxth r3, r3 800a7de: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 800a7e2: b29a uxth r2, r3 800a7e4: 4b4b ldr r3, [pc, #300] @ (800a914 ) 800a7e6: 805a strh r2, [r3, #2] GBT_ChargerCurrentStatus.outputVoltage = CONN.MeasuredVoltage * 10; // V -> 0.1V 800a7e8: 4b46 ldr r3, [pc, #280] @ (800a904 ) 800a7ea: f8b3 3013 ldrh.w r3, [r3, #19] 800a7ee: b29b uxth r3, r3 800a7f0: 461a mov r2, r3 800a7f2: 0092 lsls r2, r2, #2 800a7f4: 4413 add r3, r2 800a7f6: 005b lsls r3, r3, #1 800a7f8: b29a uxth r2, r3 800a7fa: 4b46 ldr r3, [pc, #280] @ (800a914 ) 800a7fc: 801a strh r2, [r3, #0] if(j_rx.state == 0) { 800a7fe: 4b48 ldr r3, [pc, #288] @ (800a920 ) 800a800: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a804: 2b00 cmp r3, #0 800a806: d105 bne.n 800a814 GBT_SendCCS(); 800a808: f000 fec4 bl 800b594 GBT_Delay(49); 800a80c: 2031 movs r0, #49 @ 0x31 800a80e: f000 f94d bl 800aaac } //TODO: снижение тока если перегрев контактов break; 800a812: e066 b.n 800a8e2 GBT_Delay(10); // Resend packet if not sent 800a814: 200a movs r0, #10 800a816: f000 f949 bl 800aaac break; 800a81a: e062 b.n 800a8e2 case GBT_STOP: GBT_Delay(10); 800a81c: 200a movs r0, #10 800a81e: f000 f945 bl 800aaac CONN.EnableOutput = 0; 800a822: 4b38 ldr r3, [pc, #224] @ (800a904 ) 800a824: 2200 movs r2, #0 800a826: 75da strb r2, [r3, #23] GBT_SendCST(GBT_StopCauseCode); 800a828: 4b3e ldr r3, [pc, #248] @ (800a924 ) 800a82a: 681b ldr r3, [r3, #0] 800a82c: 4618 mov r0, r3 800a82e: f000 febf bl 800b5b0 //RELAY_Write(RELAY_OUTPUT, 0); //GBT_SwitchState(GBT_DISABLED); if(GBT_StateTick()>10000){ 800a832: f000 f92f bl 800aa94 800a836: 4603 mov r3, r0 800a838: f242 7210 movw r2, #10000 @ 0x2710 800a83c: 4293 cmp r3, r2 800a83e: d906 bls.n 800a84e log_printf(LOG_ERR, "BSD Timeout\n"); 800a840: 4939 ldr r1, [pc, #228] @ (800a928 ) 800a842: 2004 movs r0, #4 800a844: f000 fe0e bl 800b464 GBT_Error(0xFCF0C0FD); //BSD Timeout 800a848: 4838 ldr r0, [pc, #224] @ (800a92c ) 800a84a: f000 f9bd bl 800abc8 } if(GBT_BSD_recv != 0){ 800a84e: 4b38 ldr r3, [pc, #224] @ (800a930 ) 800a850: 781b ldrb r3, [r3, #0] 800a852: 2b00 cmp r3, #0 800a854: d040 beq.n 800a8d8 GBT_SwitchState(GBT_STOP_CSD); 800a856: 2020 movs r0, #32 800a858: f000 f870 bl 800a93c } break; 800a85c: e03c b.n 800a8d8 case GBT_STOP_CSD: GBT_Delay(250); 800a85e: 20fa movs r0, #250 @ 0xfa 800a860: f000 f924 bl 800aaac GBT_SendCSD(); 800a864: f000 fec4 bl 800b5f0 if(GBT_StateTick()>2500){ //2.5S 800a868: f000 f914 bl 800aa94 800a86c: 4603 mov r3, r0 800a86e: f640 12c4 movw r2, #2500 @ 0x9c4 800a872: 4293 cmp r3, r2 800a874: d932 bls.n 800a8dc GBT_SwitchState(GBT_COMPLETE); 800a876: 2022 movs r0, #34 @ 0x22 800a878: f000 f860 bl 800a93c } break; 800a87c: e02e b.n 800a8dc case GBT_ERROR: GBT_SendCEM(GBT_ErrorCode); //2.5S 800a87e: 4b2d ldr r3, [pc, #180] @ (800a934 ) 800a880: 681b ldr r3, [r3, #0] 800a882: 4618 mov r0, r3 800a884: f000 fed4 bl 800b630 GBT_SwitchState(GBT_COMPLETE); 800a888: 2022 movs r0, #34 @ 0x22 800a88a: f000 f857 bl 800a93c break; 800a88e: e028 b.n 800a8e2 case GBT_COMPLETE: if(connectorState != Finished) { 800a890: 4b29 ldr r3, [pc, #164] @ (800a938 ) 800a892: 781b ldrb r3, [r3, #0] 800a894: 2b0a cmp r3, #10 800a896: d023 beq.n 800a8e0 GBT_SwitchState(GBT_DISABLED); 800a898: 2010 movs r0, #16 800a89a: f000 f84f bl 800a93c GBT_Reset();//CHECK 800a89e: f000 f9af bl 800ac00 } break; 800a8a2: e01d b.n 800a8e0 default: GBT_SwitchState(GBT_DISABLED); 800a8a4: 2010 movs r0, #16 800a8a6: f000 f849 bl 800a93c 800a8aa: e01a b.n 800a8e2 break; 800a8ac: bf00 nop 800a8ae: e018 b.n 800a8e2 break; 800a8b0: bf00 nop 800a8b2: e016 b.n 800a8e2 break; 800a8b4: bf00 nop 800a8b6: e014 b.n 800a8e2 break; 800a8b8: bf00 nop 800a8ba: e012 b.n 800a8e2 break; 800a8bc: bf00 nop 800a8be: e010 b.n 800a8e2 break; 800a8c0: bf00 nop 800a8c2: e00e b.n 800a8e2 break; 800a8c4: bf00 nop 800a8c6: e00c b.n 800a8e2 break; 800a8c8: bf00 nop 800a8ca: e00a b.n 800a8e2 break; 800a8cc: bf00 nop 800a8ce: e008 b.n 800a8e2 break; 800a8d0: bf00 nop 800a8d2: e006 b.n 800a8e2 break; 800a8d4: bf00 nop 800a8d6: e004 b.n 800a8e2 break; 800a8d8: bf00 nop 800a8da: e002 b.n 800a8e2 break; 800a8dc: bf00 nop 800a8de: e000 b.n 800a8e2 break; 800a8e0: bf00 nop } if (CONN_CC_GetState()==GBT_CC_4V) CONN.EvConnected = 1; 800a8e2: f000 fc1f bl 800b124 800a8e6: 4603 mov r3, r0 800a8e8: 2b03 cmp r3, #3 800a8ea: d103 bne.n 800a8f4 800a8ec: 4b05 ldr r3, [pc, #20] @ (800a904 ) 800a8ee: 2201 movs r2, #1 800a8f0: 779a strb r2, [r3, #30] else CONN.EvConnected = 0; } 800a8f2: e002 b.n 800a8fa else CONN.EvConnected = 0; 800a8f4: 4b03 ldr r3, [pc, #12] @ (800a904 ) 800a8f6: 2200 movs r2, #0 800a8f8: 779a strb r2, [r3, #30] } 800a8fa: bf00 nop 800a8fc: 3708 adds r7, #8 800a8fe: 46bd mov sp, r7 800a900: bdb0 pop {r4, r5, r7, pc} 800a902: bf00 nop 800a904: 200002e8 .word 0x200002e8 800a908: 08016728 .word 0x08016728 800a90c: 0001f0f0 .word 0x0001f0f0 800a910: 08016748 .word 0x08016748 800a914: 2000039c .word 0x2000039c 800a918: 200003b0 .word 0x200003b0 800a91c: 88888889 .word 0x88888889 800a920: 20000860 .word 0x20000860 800a924: 200003b8 .word 0x200003b8 800a928: 08016770 .word 0x08016770 800a92c: fcf0c0fd .word 0xfcf0c0fd 800a930: 2000031c .word 0x2000031c 800a934: 200003bc .word 0x200003bc 800a938: 200003c1 .word 0x200003c1 0800a93c : void GBT_SwitchState(gbtState_t state){ 800a93c: b580 push {r7, lr} 800a93e: b082 sub sp, #8 800a940: af00 add r7, sp, #0 800a942: 4603 mov r3, r0 800a944: 71fb strb r3, [r7, #7] GBT_State = state; 800a946: 4a42 ldr r2, [pc, #264] @ (800aa50 ) 800a948: 79fb ldrb r3, [r7, #7] 800a94a: 7013 strb r3, [r2, #0] GBT_state_tick = HAL_GetTick(); 800a94c: f003 ff40 bl 800e7d0 800a950: 4603 mov r3, r0 800a952: 4a40 ldr r2, [pc, #256] @ (800aa54 ) 800a954: 6013 str r3, [r2, #0] if(GBT_State == GBT_DISABLED) log_printf(LOG_INFO, "Disabled\n"); 800a956: 4b3e ldr r3, [pc, #248] @ (800aa50 ) 800a958: 781b ldrb r3, [r3, #0] 800a95a: 2b10 cmp r3, #16 800a95c: d103 bne.n 800a966 800a95e: 493e ldr r1, [pc, #248] @ (800aa58 ) 800a960: 2007 movs r0, #7 800a962: f000 fd7f bl 800b464 if(GBT_State == GBT_S3_STARTED) log_printf(LOG_INFO, "Charging started\n"); 800a966: 4b3a ldr r3, [pc, #232] @ (800aa50 ) 800a968: 781b ldrb r3, [r3, #0] 800a96a: 2b13 cmp r3, #19 800a96c: d103 bne.n 800a976 800a96e: 493b ldr r1, [pc, #236] @ (800aa5c ) 800a970: 2007 movs r0, #7 800a972: f000 fd77 bl 800b464 if(GBT_State == GBT_S31_WAIT_BHM) log_printf(LOG_INFO, "Waiting for BHM\n"); 800a976: 4b36 ldr r3, [pc, #216] @ (800aa50 ) 800a978: 781b ldrb r3, [r3, #0] 800a97a: 2b14 cmp r3, #20 800a97c: d103 bne.n 800a986 800a97e: 4938 ldr r1, [pc, #224] @ (800aa60 ) 800a980: 2007 movs r0, #7 800a982: f000 fd6f bl 800b464 if(GBT_State == GBT_S4_WAIT_PSU_READY) log_printf(LOG_INFO, "Waiting for PSU ready\n"); 800a986: 4b32 ldr r3, [pc, #200] @ (800aa50 ) 800a988: 781b ldrb r3, [r3, #0] 800a98a: 2b15 cmp r3, #21 800a98c: d103 bne.n 800a996 800a98e: 4935 ldr r1, [pc, #212] @ (800aa64 ) 800a990: 2007 movs r0, #7 800a992: f000 fd67 bl 800b464 if(GBT_State == GBT_S4_ISOTEST) log_printf(LOG_INFO, "Isolation test\n"); 800a996: 4b2e ldr r3, [pc, #184] @ (800aa50 ) 800a998: 781b ldrb r3, [r3, #0] 800a99a: 2b17 cmp r3, #23 800a99c: d103 bne.n 800a9a6 800a99e: 4932 ldr r1, [pc, #200] @ (800aa68 ) 800a9a0: 2007 movs r0, #7 800a9a2: f000 fd5f bl 800b464 if(GBT_State == GBT_S5_BAT_INFO) log_printf(LOG_INFO, "Waiting for battery info\n"); 800a9a6: 4b2a ldr r3, [pc, #168] @ (800aa50 ) 800a9a8: 781b ldrb r3, [r3, #0] 800a9aa: 2b19 cmp r3, #25 800a9ac: d103 bne.n 800a9b6 800a9ae: 492f ldr r1, [pc, #188] @ (800aa6c ) 800a9b0: 2007 movs r0, #7 800a9b2: f000 fd57 bl 800b464 if(GBT_State == GBT_S6_BAT_STAT) log_printf(LOG_INFO, "Waiting for battery status\n"); 800a9b6: 4b26 ldr r3, [pc, #152] @ (800aa50 ) 800a9b8: 781b ldrb r3, [r3, #0] 800a9ba: 2b1a cmp r3, #26 800a9bc: d103 bne.n 800a9c6 800a9be: 492c ldr r1, [pc, #176] @ (800aa70 ) 800a9c0: 2007 movs r0, #7 800a9c2: f000 fd4f bl 800b464 if(GBT_State == GBT_S7_BMS_WAIT) log_printf(LOG_INFO, "Waiting for BMS\n"); 800a9c6: 4b22 ldr r3, [pc, #136] @ (800aa50 ) 800a9c8: 781b ldrb r3, [r3, #0] 800a9ca: 2b1b cmp r3, #27 800a9cc: d103 bne.n 800a9d6 800a9ce: 4929 ldr r1, [pc, #164] @ (800aa74 ) 800a9d0: 2007 movs r0, #7 800a9d2: f000 fd47 bl 800b464 if(GBT_State == GBT_S8_INIT_CHARGER)log_printf(LOG_INFO, "Initializing charger\n"); 800a9d6: 4b1e ldr r3, [pc, #120] @ (800aa50 ) 800a9d8: 781b ldrb r3, [r3, #0] 800a9da: 2b1c cmp r3, #28 800a9dc: d103 bne.n 800a9e6 800a9de: 4926 ldr r1, [pc, #152] @ (800aa78 ) 800a9e0: 2007 movs r0, #7 800a9e2: f000 fd3f bl 800b464 if(GBT_State == GBT_S9_WAIT_BCL) log_printf(LOG_INFO, "Waiting for BCL\n"); 800a9e6: 4b1a ldr r3, [pc, #104] @ (800aa50 ) 800a9e8: 781b ldrb r3, [r3, #0] 800a9ea: 2b1d cmp r3, #29 800a9ec: d103 bne.n 800a9f6 800a9ee: 4923 ldr r1, [pc, #140] @ (800aa7c ) 800a9f0: 2007 movs r0, #7 800a9f2: f000 fd37 bl 800b464 if(GBT_State == GBT_S10_CHARGING) log_printf(LOG_INFO, "Charging in progress\n"); 800a9f6: 4b16 ldr r3, [pc, #88] @ (800aa50 ) 800a9f8: 781b ldrb r3, [r3, #0] 800a9fa: 2b1e cmp r3, #30 800a9fc: d103 bne.n 800aa06 800a9fe: 4920 ldr r1, [pc, #128] @ (800aa80 ) 800aa00: 2007 movs r0, #7 800aa02: f000 fd2f bl 800b464 if(GBT_State == GBT_STOP) log_printf(LOG_INFO, "Charging Stopped\n"); 800aa06: 4b12 ldr r3, [pc, #72] @ (800aa50 ) 800aa08: 781b ldrb r3, [r3, #0] 800aa0a: 2b1f cmp r3, #31 800aa0c: d103 bne.n 800aa16 800aa0e: 491d ldr r1, [pc, #116] @ (800aa84 ) 800aa10: 2007 movs r0, #7 800aa12: f000 fd27 bl 800b464 if(GBT_State == GBT_STOP_CSD) log_printf(LOG_INFO, "Charging Stopped with CSD\n"); 800aa16: 4b0e ldr r3, [pc, #56] @ (800aa50 ) 800aa18: 781b ldrb r3, [r3, #0] 800aa1a: 2b20 cmp r3, #32 800aa1c: d103 bne.n 800aa26 800aa1e: 491a ldr r1, [pc, #104] @ (800aa88 ) 800aa20: 2007 movs r0, #7 800aa22: f000 fd1f bl 800b464 if(GBT_State == GBT_ERROR) log_printf(LOG_INFO, "Charging Error\n"); 800aa26: 4b0a ldr r3, [pc, #40] @ (800aa50 ) 800aa28: 781b ldrb r3, [r3, #0] 800aa2a: 2b21 cmp r3, #33 @ 0x21 800aa2c: d103 bne.n 800aa36 800aa2e: 4917 ldr r1, [pc, #92] @ (800aa8c ) 800aa30: 2007 movs r0, #7 800aa32: f000 fd17 bl 800b464 if(GBT_State == GBT_COMPLETE) log_printf(LOG_INFO, "Charging Finished\n"); 800aa36: 4b06 ldr r3, [pc, #24] @ (800aa50 ) 800aa38: 781b ldrb r3, [r3, #0] 800aa3a: 2b22 cmp r3, #34 @ 0x22 800aa3c: d103 bne.n 800aa46 800aa3e: 4914 ldr r1, [pc, #80] @ (800aa90 ) 800aa40: 2007 movs r0, #7 800aa42: f000 fd0f bl 800b464 } 800aa46: bf00 nop 800aa48: 3708 adds r7, #8 800aa4a: 46bd mov sp, r7 800aa4c: bd80 pop {r7, pc} 800aa4e: bf00 nop 800aa50: 20000308 .word 0x20000308 800aa54: 2000030c .word 0x2000030c 800aa58: 08016780 .word 0x08016780 800aa5c: 0801678c .word 0x0801678c 800aa60: 080167a0 .word 0x080167a0 800aa64: 080167b4 .word 0x080167b4 800aa68: 080167cc .word 0x080167cc 800aa6c: 080167dc .word 0x080167dc 800aa70: 080167f8 .word 0x080167f8 800aa74: 08016814 .word 0x08016814 800aa78: 08016828 .word 0x08016828 800aa7c: 08016840 .word 0x08016840 800aa80: 08016854 .word 0x08016854 800aa84: 0801686c .word 0x0801686c 800aa88: 08016880 .word 0x08016880 800aa8c: 0801689c .word 0x0801689c 800aa90: 080168ac .word 0x080168ac 0800aa94 : uint32_t GBT_StateTick(){ 800aa94: b580 push {r7, lr} 800aa96: af00 add r7, sp, #0 return HAL_GetTick() - GBT_state_tick; 800aa98: f003 fe9a bl 800e7d0 800aa9c: 4602 mov r2, r0 800aa9e: 4b02 ldr r3, [pc, #8] @ (800aaa8 ) 800aaa0: 681b ldr r3, [r3, #0] 800aaa2: 1ad3 subs r3, r2, r3 } 800aaa4: 4618 mov r0, r3 800aaa6: bd80 pop {r7, pc} 800aaa8: 2000030c .word 0x2000030c 0800aaac : void GBT_Delay(uint32_t delay){ 800aaac: b580 push {r7, lr} 800aaae: b082 sub sp, #8 800aab0: af00 add r7, sp, #0 800aab2: 6078 str r0, [r7, #4] GBT_delay_start = HAL_GetTick(); 800aab4: f003 fe8c bl 800e7d0 800aab8: 4603 mov r3, r0 800aaba: 4a04 ldr r2, [pc, #16] @ (800aacc ) 800aabc: 6013 str r3, [r2, #0] GBT_delay = delay; 800aabe: 4a04 ldr r2, [pc, #16] @ (800aad0 ) 800aac0: 687b ldr r3, [r7, #4] 800aac2: 6013 str r3, [r2, #0] } 800aac4: bf00 nop 800aac6: 3708 adds r7, #8 800aac8: 46bd mov sp, r7 800aaca: bd80 pop {r7, pc} 800aacc: 20000310 .word 0x20000310 800aad0: 20000314 .word 0x20000314 0800aad4 : void GBT_StopEV(uint32_t causecode){ // --> Suspend EV 800aad4: b580 push {r7, lr} 800aad6: b082 sub sp, #8 800aad8: af00 add r7, sp, #0 800aada: 6078 str r0, [r7, #4] if (CONN.chargingError){ 800aadc: 4b0c ldr r3, [pc, #48] @ (800ab10 ) 800aade: 7f5b ldrb r3, [r3, #29] 800aae0: 2b00 cmp r3, #0 800aae2: d003 beq.n 800aaec GBT_StopSource = GBT_STOP_EVSE; 800aae4: 4b0b ldr r3, [pc, #44] @ (800ab14 ) 800aae6: 2200 movs r2, #0 800aae8: 701a strb r2, [r3, #0] 800aaea: e002 b.n 800aaf2 }else{ GBT_StopSource = GBT_STOP_EV; 800aaec: 4b09 ldr r3, [pc, #36] @ (800ab14 ) 800aaee: 2201 movs r2, #1 800aaf0: 701a strb r2, [r3, #0] } GBT_StopCauseCode = causecode; 800aaf2: 4a09 ldr r2, [pc, #36] @ (800ab18 ) 800aaf4: 687b ldr r3, [r7, #4] 800aaf6: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 800aaf8: 4b08 ldr r3, [pc, #32] @ (800ab1c ) 800aafa: 781b ldrb r3, [r3, #0] 800aafc: 2b1f cmp r3, #31 800aafe: d002 beq.n 800ab06 800ab00: 201f movs r0, #31 800ab02: f7ff ff1b bl 800a93c } 800ab06: bf00 nop 800ab08: 3708 adds r7, #8 800ab0a: 46bd mov sp, r7 800ab0c: bd80 pop {r7, pc} 800ab0e: bf00 nop 800ab10: 200002e8 .word 0x200002e8 800ab14: 200003c0 .word 0x200003c0 800ab18: 200003b8 .word 0x200003b8 800ab1c: 20000308 .word 0x20000308 0800ab20 : void GBT_StopEVSE(uint32_t causecode){ // --> Suspend EVSE 800ab20: b580 push {r7, lr} 800ab22: b082 sub sp, #8 800ab24: af00 add r7, sp, #0 800ab26: 6078 str r0, [r7, #4] GBT_StopSource = GBT_STOP_EVSE; 800ab28: 4b08 ldr r3, [pc, #32] @ (800ab4c ) 800ab2a: 2200 movs r2, #0 800ab2c: 701a strb r2, [r3, #0] GBT_StopCauseCode = causecode; 800ab2e: 4a08 ldr r2, [pc, #32] @ (800ab50 ) 800ab30: 687b ldr r3, [r7, #4] 800ab32: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 800ab34: 4b07 ldr r3, [pc, #28] @ (800ab54 ) 800ab36: 781b ldrb r3, [r3, #0] 800ab38: 2b1f cmp r3, #31 800ab3a: d002 beq.n 800ab42 800ab3c: 201f movs r0, #31 800ab3e: f7ff fefd bl 800a93c } 800ab42: bf00 nop 800ab44: 3708 adds r7, #8 800ab46: 46bd mov sp, r7 800ab48: bd80 pop {r7, pc} 800ab4a: bf00 nop 800ab4c: 200003c0 .word 0x200003c0 800ab50: 200003b8 .word 0x200003b8 800ab54: 20000308 .word 0x20000308 0800ab58 : void GBT_StopOCPP(uint32_t causecode){ // --> Finished 800ab58: b580 push {r7, lr} 800ab5a: b082 sub sp, #8 800ab5c: af00 add r7, sp, #0 800ab5e: 6078 str r0, [r7, #4] GBT_StopSource = GBT_STOP_OCPP; 800ab60: 4b08 ldr r3, [pc, #32] @ (800ab84 ) 800ab62: 2202 movs r2, #2 800ab64: 701a strb r2, [r3, #0] GBT_StopCauseCode = causecode; 800ab66: 4a08 ldr r2, [pc, #32] @ (800ab88 ) 800ab68: 687b ldr r3, [r7, #4] 800ab6a: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 800ab6c: 4b07 ldr r3, [pc, #28] @ (800ab8c ) 800ab6e: 781b ldrb r3, [r3, #0] 800ab70: 2b1f cmp r3, #31 800ab72: d002 beq.n 800ab7a 800ab74: 201f movs r0, #31 800ab76: f7ff fee1 bl 800a93c } 800ab7a: bf00 nop 800ab7c: 3708 adds r7, #8 800ab7e: 46bd mov sp, r7 800ab80: bd80 pop {r7, pc} 800ab82: bf00 nop 800ab84: 200003c0 .word 0x200003c0 800ab88: 200003b8 .word 0x200003b8 800ab8c: 20000308 .word 0x20000308 0800ab90 : void GBT_ForceStop(){ // --> Suspend EV 800ab90: b580 push {r7, lr} 800ab92: af00 add r7, sp, #0 GBT_StopSource = GBT_STOP_EV; 800ab94: 4b0a ldr r3, [pc, #40] @ (800abc0 ) 800ab96: 2201 movs r2, #1 800ab98: 701a strb r2, [r3, #0] CONN.EnableOutput = 0; 800ab9a: 4b0a ldr r3, [pc, #40] @ (800abc4 ) 800ab9c: 2200 movs r2, #0 800ab9e: 75da strb r2, [r3, #23] GBT_SwitchState(GBT_COMPLETE); 800aba0: 2022 movs r0, #34 @ 0x22 800aba2: f7ff fecb bl 800a93c GBT_Lock(0); 800aba6: 2000 movs r0, #0 800aba8: f001 f906 bl 800bdb8 RELAY_Write(RELAY_AUX0, 0); 800abac: 2100 movs r1, #0 800abae: 2000 movs r0, #0 800abb0: f7fe fd9c bl 80096ec RELAY_Write(RELAY_AUX1, 0); 800abb4: 2100 movs r1, #0 800abb6: 2001 movs r0, #1 800abb8: f7fe fd98 bl 80096ec } 800abbc: bf00 nop 800abbe: bd80 pop {r7, pc} 800abc0: 200003c0 .word 0x200003c0 800abc4: 200002e8 .word 0x200002e8 0800abc8 : void GBT_Error(uint32_t errorcode){ // --> Suspend EV 800abc8: b580 push {r7, lr} 800abca: b082 sub sp, #8 800abcc: af00 add r7, sp, #0 800abce: 6078 str r0, [r7, #4] GBT_StopSource = GBT_STOP_EV; 800abd0: 4b08 ldr r3, [pc, #32] @ (800abf4 ) 800abd2: 2201 movs r2, #1 800abd4: 701a strb r2, [r3, #0] log_printf(LOG_ERR, "GBT Error code: 0x%X\n", errorcode); 800abd6: 687a ldr r2, [r7, #4] 800abd8: 4907 ldr r1, [pc, #28] @ (800abf8 ) 800abda: 2004 movs r0, #4 800abdc: f000 fc42 bl 800b464 GBT_ErrorCode = errorcode; 800abe0: 4a06 ldr r2, [pc, #24] @ (800abfc ) 800abe2: 687b ldr r3, [r7, #4] 800abe4: 6013 str r3, [r2, #0] GBT_SwitchState(GBT_ERROR); 800abe6: 2021 movs r0, #33 @ 0x21 800abe8: f7ff fea8 bl 800a93c } 800abec: bf00 nop 800abee: 3708 adds r7, #8 800abf0: 46bd mov sp, r7 800abf2: bd80 pop {r7, pc} 800abf4: 200003c0 .word 0x200003c0 800abf8: 080168c0 .word 0x080168c0 800abfc: 200003bc .word 0x200003bc 0800ac00 : void GBT_Reset(){ 800ac00: b580 push {r7, lr} 800ac02: af00 add r7, sp, #0 GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 800ac04: f003 fde4 bl 800e7d0 800ac08: 4603 mov r3, r0 800ac0a: 4a31 ldr r2, [pc, #196] @ (800acd0 ) 800ac0c: 6013 str r3, [r2, #0] GBT_BAT_INFO_recv = 0; 800ac0e: 4b31 ldr r3, [pc, #196] @ (800acd4 ) 800ac10: 2200 movs r2, #0 800ac12: 701a strb r2, [r3, #0] GBT_BAT_STAT_recv = 0; 800ac14: 4b30 ldr r3, [pc, #192] @ (800acd8 ) 800ac16: 2200 movs r2, #0 800ac18: 701a strb r2, [r3, #0] GBT_BRO_recv = 0; 800ac1a: 4b30 ldr r3, [pc, #192] @ (800acdc ) 800ac1c: 2200 movs r2, #0 800ac1e: 701a strb r2, [r3, #0] GBT_BHM_recv = 0; 800ac20: 4b2f ldr r3, [pc, #188] @ (800ace0 ) 800ac22: 2200 movs r2, #0 800ac24: 701a strb r2, [r3, #0] GBT_BSD_recv = 0; 800ac26: 4b2f ldr r3, [pc, #188] @ (800ace4 ) 800ac28: 2200 movs r2, #0 800ac2a: 701a strb r2, [r3, #0] EV_ready = 0; 800ac2c: 4b2e ldr r3, [pc, #184] @ (800ace8 ) 800ac2e: 2200 movs r2, #0 800ac30: 701a strb r2, [r3, #0] CONN.SOC = 0; 800ac32: 4b2e ldr r3, [pc, #184] @ (800acec ) 800ac34: 2200 movs r2, #0 800ac36: 709a strb r2, [r3, #2] CONN.EnableOutput = 0; 800ac38: 4b2c ldr r3, [pc, #176] @ (800acec ) 800ac3a: 2200 movs r2, #0 800ac3c: 75da strb r2, [r3, #23] CONN.WantedCurrent = 0; 800ac3e: 4b2b ldr r3, [pc, #172] @ (800acec ) 800ac40: 2200 movs r2, #0 800ac42: 76da strb r2, [r3, #27] 800ac44: 2200 movs r2, #0 800ac46: 771a strb r2, [r3, #28] CONN.RequestedVoltage = 0; 800ac48: 4b28 ldr r3, [pc, #160] @ (800acec ) 800ac4a: 2200 movs r2, #0 800ac4c: 73da strb r2, [r3, #15] 800ac4e: 2200 movs r2, #0 800ac50: 741a strb r2, [r3, #16] memset(&GBT_EVInfo, 0, sizeof (GBT_EVInfo)); 800ac52: 2231 movs r2, #49 @ 0x31 800ac54: 2100 movs r1, #0 800ac56: 4826 ldr r0, [pc, #152] @ (800acf0 ) 800ac58: f009 fa1a bl 8014090 memset(&GBT_BATStat, 0, sizeof (GBT_BATStat)); 800ac5c: 220d movs r2, #13 800ac5e: 2100 movs r1, #0 800ac60: 4824 ldr r0, [pc, #144] @ (800acf4 ) 800ac62: f009 fa15 bl 8014090 memset(&GBT_ReqPower, 0, sizeof (GBT_ReqPower)); 800ac66: 2205 movs r2, #5 800ac68: 2100 movs r1, #0 800ac6a: 4823 ldr r0, [pc, #140] @ (800acf8 ) 800ac6c: f009 fa10 bl 8014090 memset(&GBT_CurrPower, 0, sizeof (GBT_CurrPower)); 800ac70: 2205 movs r2, #5 800ac72: 2100 movs r1, #0 800ac74: 4821 ldr r0, [pc, #132] @ (800acfc ) 800ac76: f009 fa0b bl 8014090 memset(&GBT_MaxVoltage, 0, sizeof (GBT_MaxVoltage)); 800ac7a: 2202 movs r2, #2 800ac7c: 2100 movs r1, #0 800ac7e: 4820 ldr r0, [pc, #128] @ (800ad00 ) 800ac80: f009 fa06 bl 8014090 memset(&GBT_ChargingStatus, 0, sizeof (GBT_ChargingStatus)); 800ac84: 2209 movs r2, #9 800ac86: 2100 movs r1, #0 800ac88: 481e ldr r0, [pc, #120] @ (800ad04 ) 800ac8a: f009 fa01 bl 8014090 memset(&GBT_BatteryStatus, 0, sizeof (GBT_BatteryStatus)); 800ac8e: 2207 movs r2, #7 800ac90: 2100 movs r1, #0 800ac92: 481d ldr r0, [pc, #116] @ (800ad08 ) 800ac94: f009 f9fc bl 8014090 memset(&GBT_ChargerCurrentStatus, 0, sizeof (GBT_ChargerCurrentStatus)); 800ac98: 2208 movs r2, #8 800ac9a: 2100 movs r1, #0 800ac9c: 481b ldr r0, [pc, #108] @ (800ad0c ) 800ac9e: f009 f9f7 bl 8014090 memset(&GBT_ChargerStop, 0, sizeof (GBT_ChargerStop)); 800aca2: 2208 movs r2, #8 800aca4: 2100 movs r1, #0 800aca6: 481a ldr r0, [pc, #104] @ (800ad10 ) 800aca8: f009 f9f2 bl 8014090 GBT_CurrPower.requestedCurrent = 4000; //0A 800acac: 4b13 ldr r3, [pc, #76] @ (800acfc ) 800acae: f44f 627a mov.w r2, #4000 @ 0xfa0 800acb2: 805a strh r2, [r3, #2] GBT_CurrPower.requestedVoltage = 500; //50V 800acb4: 4b11 ldr r3, [pc, #68] @ (800acfc ) 800acb6: f44f 72fa mov.w r2, #500 @ 0x1f4 800acba: 801a strh r2, [r3, #0] GBT_TimeChargingStarted = 0; 800acbc: 4b15 ldr r3, [pc, #84] @ (800ad14 ) 800acbe: 2200 movs r2, #0 800acc0: 601a str r2, [r3, #0] GBT_BRO = 0x00; 800acc2: 4b15 ldr r3, [pc, #84] @ (800ad18 ) 800acc4: 2200 movs r2, #0 800acc6: 701a strb r2, [r3, #0] GBT_LockResetError(); 800acc8: f001 f980 bl 800bfcc } 800accc: bf00 nop 800acce: bd80 pop {r7, pc} 800acd0: 200003b4 .word 0x200003b4 800acd4: 20000318 .word 0x20000318 800acd8: 20000319 .word 0x20000319 800acdc: 2000031a .word 0x2000031a 800ace0: 2000031b .word 0x2000031b 800ace4: 2000031c .word 0x2000031c 800ace8: 2000031d .word 0x2000031d 800acec: 200002e8 .word 0x200002e8 800acf0: 20000334 .word 0x20000334 800acf4: 20000368 .word 0x20000368 800acf8: 20000378 .word 0x20000378 800acfc: 20000380 .word 0x20000380 800ad00: 20000330 .word 0x20000330 800ad04: 20000388 .word 0x20000388 800ad08: 20000394 .word 0x20000394 800ad0c: 2000039c .word 0x2000039c 800ad10: 200003a4 .word 0x200003a4 800ad14: 200003b0 .word 0x200003b0 800ad18: 200003ac .word 0x200003ac 0800ad1c : void GBT_Start(){ 800ad1c: b580 push {r7, lr} 800ad1e: af00 add r7, sp, #0 RELAY_Write(RELAY_AUX0, 1); 800ad20: 2101 movs r1, #1 800ad22: 2000 movs r0, #0 800ad24: f7fe fce2 bl 80096ec RELAY_Write(RELAY_AUX1, 1); 800ad28: 2101 movs r1, #1 800ad2a: 2001 movs r0, #1 800ad2c: f7fe fcde bl 80096ec GBT_SwitchState(GBT_S3_STARTED); 800ad30: 2013 movs r0, #19 800ad32: f7ff fe03 bl 800a93c } 800ad36: bf00 nop 800ad38: bd80 pop {r7, pc} ... 0800ad3c : extern uint8_t config_initialized; gbtCcState_t CC_STATE_FILTERED; void CONN_Task(){ 800ad3c: b580 push {r7, lr} 800ad3e: af00 add r7, sp, #0 switch (connectorState){ 800ad40: 4b85 ldr r3, [pc, #532] @ (800af58 ) 800ad42: 781b ldrb r3, [r3, #0] 800ad44: 2b0c cmp r3, #12 800ad46: f200 80f3 bhi.w 800af30 800ad4a: a201 add r2, pc, #4 @ (adr r2, 800ad50 ) 800ad4c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800ad50: 0800ad85 .word 0x0800ad85 800ad54: 0800adc3 .word 0x0800adc3 800ad58: 0800ad9d .word 0x0800ad9d 800ad5c: 0800ae4f .word 0x0800ae4f 800ad60: 0800ae09 .word 0x0800ae09 800ad64: 0800af31 .word 0x0800af31 800ad68: 0800af31 .word 0x0800af31 800ad6c: 0800af31 .word 0x0800af31 800ad70: 0800aea3 .word 0x0800aea3 800ad74: 0800af31 .word 0x0800af31 800ad78: 0800af05 .word 0x0800af05 800ad7c: 0800aef7 .word 0x0800aef7 800ad80: 0800aee9 .word 0x0800aee9 case Unknown: // unlocked, waiting for config GBT_Lock(0); 800ad84: 2000 movs r0, #0 800ad86: f001 f817 bl 800bdb8 if (config_initialized) { 800ad8a: 4b74 ldr r3, [pc, #464] @ (800af5c ) 800ad8c: 781b ldrb r3, [r3, #0] 800ad8e: 2b00 cmp r3, #0 800ad90: f000 80d2 beq.w 800af38 CONN_SetState(Unplugged); 800ad94: 2001 movs r0, #1 800ad96: f000 f8e9 bl 800af6c } break; 800ad9a: e0cd b.n 800af38 case Disabled: // faulted, unlocked GBT_Lock(0); 800ad9c: 2000 movs r0, #0 800ad9e: f001 f80b bl 800bdb8 if(CONN.chargingError == 0) CONN_SetState(Unplugged); 800ada2: 4b6f ldr r3, [pc, #444] @ (800af60 ) 800ada4: 7f5b ldrb r3, [r3, #29] 800ada6: 2b00 cmp r3, #0 800ada8: d102 bne.n 800adb0 800adaa: 2001 movs r0, #1 800adac: f000 f8de bl 800af6c if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800adb0: 4b6b ldr r3, [pc, #428] @ (800af60 ) 800adb2: 781b ldrb r3, [r3, #0] 800adb4: 2b03 cmp r3, #3 800adb6: f040 80c1 bne.w 800af3c 800adba: 2000 movs r0, #0 800adbc: f000 ffc8 bl 800bd50 break; 800adc0: e0bc b.n 800af3c case Unplugged: // unlocked, waiting to connect GBT_Lock(0); 800adc2: 2000 movs r0, #0 800adc4: f000 fff8 bl 800bdb8 if(CONN.chargingError != 0) CONN_SetState(Disabled); 800adc8: 4b65 ldr r3, [pc, #404] @ (800af60 ) 800adca: 7f5b ldrb r3, [r3, #29] 800adcc: 2b00 cmp r3, #0 800adce: d002 beq.n 800add6 800add0: 2002 movs r0, #2 800add2: f000 f8cb bl 800af6c if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800add6: 4b62 ldr r3, [pc, #392] @ (800af60 ) 800add8: 781b ldrb r3, [r3, #0] 800adda: 2b03 cmp r3, #3 800addc: d102 bne.n 800ade4 800adde: 2000 movs r0, #0 800ade0: f000 ffb6 bl 800bd50 if((CONN_CC_GetState()==GBT_CC_4V) && (CONN.connControl != CMD_FORCE_UNLOCK)){ 800ade4: f000 f99e bl 800b124 800ade8: 4603 mov r3, r0 800adea: 2b03 cmp r3, #3 800adec: f040 80a8 bne.w 800af40 800adf0: 4b5b ldr r3, [pc, #364] @ (800af60 ) 800adf2: 781b ldrb r3, [r3, #0] 800adf4: 2b03 cmp r3, #3 800adf6: f000 80a3 beq.w 800af40 CONN_SetState(AuthRequired); 800adfa: 2004 movs r0, #4 800adfc: f000 f8b6 bl 800af6c GBT_Lock(0); 800ae00: 2000 movs r0, #0 800ae02: f000 ffd9 bl 800bdb8 } break; 800ae06: e09b b.n 800af40 case AuthRequired: // plugged, waiting to start charge GBT_Lock(0); 800ae08: 2000 movs r0, #0 800ae0a: f000 ffd5 bl 800bdb8 if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800ae0e: 4b54 ldr r3, [pc, #336] @ (800af60 ) 800ae10: 781b ldrb r3, [r3, #0] 800ae12: 2b03 cmp r3, #3 800ae14: d102 bne.n 800ae1c 800ae16: 2000 movs r0, #0 800ae18: f000 ff9a bl 800bd50 if(CONN_CC_GetState()==GBT_CC_4V){ 800ae1c: f000 f982 bl 800b124 800ae20: 4603 mov r3, r0 800ae22: 2b03 cmp r3, #3 800ae24: d10f bne.n 800ae46 if(CONN.connControl == CMD_START){ 800ae26: 4b4e ldr r3, [pc, #312] @ (800af60 ) 800ae28: 781b ldrb r3, [r3, #0] 800ae2a: 2b02 cmp r3, #2 800ae2c: d102 bne.n 800ae34 CONN_SetState(Preparing); 800ae2e: 2003 movs r0, #3 800ae30: f000 f89c bl 800af6c } if(CONN.connControl == CMD_FORCE_UNLOCK){ 800ae34: 4b4a ldr r3, [pc, #296] @ (800af60 ) 800ae36: 781b ldrb r3, [r3, #0] 800ae38: 2b03 cmp r3, #3 800ae3a: f040 8083 bne.w 800af44 CONN_SetState(Unplugged); 800ae3e: 2001 movs r0, #1 800ae40: f000 f894 bl 800af6c } // if CHARGING_NOT_ALLOWED — stay here }else{ CONN_SetState(Unplugged); } break; 800ae44: e07e b.n 800af44 CONN_SetState(Unplugged); 800ae46: 2001 movs r0, #1 800ae48: f000 f890 bl 800af6c break; 800ae4c: e07a b.n 800af44 case Preparing: // charging, locked GBT_Lock(1); 800ae4e: 2001 movs r0, #1 800ae50: f000 ffb2 bl 800bdb8 if(GBT_State == GBT_COMPLETE){ 800ae54: 4b43 ldr r3, [pc, #268] @ (800af64 ) 800ae56: 781b ldrb r3, [r3, #0] 800ae58: 2b22 cmp r3, #34 @ 0x22 800ae5a: d11a bne.n 800ae92 if(GBT_StopSource == GBT_STOP_EVSE){ 800ae5c: 4b42 ldr r3, [pc, #264] @ (800af68 ) 800ae5e: 781b ldrb r3, [r3, #0] 800ae60: 2b00 cmp r3, #0 800ae62: d103 bne.n 800ae6c CONN_SetState(FinishedEVSE); 800ae64: 200b movs r0, #11 800ae66: f000 f881 bl 800af6c 800ae6a: e012 b.n 800ae92 }else if(GBT_StopSource == GBT_STOP_EV){ 800ae6c: 4b3e ldr r3, [pc, #248] @ (800af68 ) 800ae6e: 781b ldrb r3, [r3, #0] 800ae70: 2b01 cmp r3, #1 800ae72: d103 bne.n 800ae7c CONN_SetState(FinishedEV); 800ae74: 200c movs r0, #12 800ae76: f000 f879 bl 800af6c 800ae7a: e00a b.n 800ae92 }else if(GBT_StopSource == GBT_STOP_OCPP){ 800ae7c: 4b3a ldr r3, [pc, #232] @ (800af68 ) 800ae7e: 781b ldrb r3, [r3, #0] 800ae80: 2b02 cmp r3, #2 800ae82: d103 bne.n 800ae8c CONN_SetState(Finished); 800ae84: 200a movs r0, #10 800ae86: f000 f871 bl 800af6c 800ae8a: e002 b.n 800ae92 }else{ CONN_SetState(FinishedEVSE); 800ae8c: 200b movs r0, #11 800ae8e: f000 f86d bl 800af6c } } if(GBT_State == GBT_S10_CHARGING){ 800ae92: 4b34 ldr r3, [pc, #208] @ (800af64 ) 800ae94: 781b ldrb r3, [r3, #0] 800ae96: 2b1e cmp r3, #30 800ae98: d156 bne.n 800af48 CONN_SetState(Charging); 800ae9a: 2008 movs r0, #8 800ae9c: f000 f866 bl 800af6c } break; 800aea0: e052 b.n 800af48 case Charging: // charging, locked GBT_Lock(1); 800aea2: 2001 movs r0, #1 800aea4: f000 ff88 bl 800bdb8 if(GBT_State == GBT_COMPLETE){ 800aea8: 4b2e ldr r3, [pc, #184] @ (800af64 ) 800aeaa: 781b ldrb r3, [r3, #0] 800aeac: 2b22 cmp r3, #34 @ 0x22 800aeae: d14d bne.n 800af4c if(GBT_StopSource == GBT_STOP_EVSE){ 800aeb0: 4b2d ldr r3, [pc, #180] @ (800af68 ) 800aeb2: 781b ldrb r3, [r3, #0] 800aeb4: 2b00 cmp r3, #0 800aeb6: d103 bne.n 800aec0 CONN_SetState(FinishedEVSE); 800aeb8: 200b movs r0, #11 800aeba: f000 f857 bl 800af6c CONN_SetState(Finished); }else{ CONN_SetState(FinishedEVSE); } } break; 800aebe: e045 b.n 800af4c }else if(GBT_StopSource == GBT_STOP_EV){ 800aec0: 4b29 ldr r3, [pc, #164] @ (800af68 ) 800aec2: 781b ldrb r3, [r3, #0] 800aec4: 2b01 cmp r3, #1 800aec6: d103 bne.n 800aed0 CONN_SetState(FinishedEV); 800aec8: 200c movs r0, #12 800aeca: f000 f84f bl 800af6c break; 800aece: e03d b.n 800af4c }else if(GBT_StopSource == GBT_STOP_OCPP){ 800aed0: 4b25 ldr r3, [pc, #148] @ (800af68 ) 800aed2: 781b ldrb r3, [r3, #0] 800aed4: 2b02 cmp r3, #2 800aed6: d103 bne.n 800aee0 CONN_SetState(Finished); 800aed8: 200a movs r0, #10 800aeda: f000 f847 bl 800af6c break; 800aede: e035 b.n 800af4c CONN_SetState(FinishedEVSE); 800aee0: 200b movs r0, #11 800aee2: f000 f843 bl 800af6c break; 800aee6: e031 b.n 800af4c case FinishedEV: // charging completed by EV, waiting to transaction stop GBT_Lock(0); 800aee8: 2000 movs r0, #0 800aeea: f000 ff65 bl 800bdb8 CONN_SetState(Finished); 800aeee: 200a movs r0, #10 800aef0: f000 f83c bl 800af6c break; 800aef4: e02d b.n 800af52 case FinishedEVSE: // charging completed by EVSE, waiting to transaction stop GBT_Lock(0); 800aef6: 2000 movs r0, #0 800aef8: f000 ff5e bl 800bdb8 CONN_SetState(Finished); 800aefc: 200a movs r0, #10 800aefe: f000 f835 bl 800af6c break; 800af02: e026 b.n 800af52 case Finished: // charging completed, waiting to disconnect, unlocked GBT_Lock(0); 800af04: 2000 movs r0, #0 800af06: f000 ff57 bl 800bdb8 //TODO Force unlock time limit if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800af0a: 4b15 ldr r3, [pc, #84] @ (800af60 ) 800af0c: 781b ldrb r3, [r3, #0] 800af0e: 2b03 cmp r3, #3 800af10: d102 bne.n 800af18 800af12: 2000 movs r0, #0 800af14: f000 ff1c bl 800bd50 if(CONN_CC_GetState()==GBT_CC_6V){ 800af18: f000 f904 bl 800b124 800af1c: 4603 mov r3, r0 800af1e: 2b02 cmp r3, #2 800af20: d116 bne.n 800af50 GBT_Lock(0); 800af22: 2000 movs r0, #0 800af24: f000 ff48 bl 800bdb8 CONN_SetState(Unplugged); 800af28: 2001 movs r0, #1 800af2a: f000 f81f bl 800af6c } break; 800af2e: e00f b.n 800af50 default: CONN_SetState(Unknown); 800af30: 2000 movs r0, #0 800af32: f000 f81b bl 800af6c } } 800af36: e00c b.n 800af52 break; 800af38: bf00 nop 800af3a: e00a b.n 800af52 break; 800af3c: bf00 nop 800af3e: e008 b.n 800af52 break; 800af40: bf00 nop 800af42: e006 b.n 800af52 break; 800af44: bf00 nop 800af46: e004 b.n 800af52 break; 800af48: bf00 nop 800af4a: e002 b.n 800af52 break; 800af4c: bf00 nop 800af4e: e000 b.n 800af52 break; 800af50: bf00 nop } 800af52: bf00 nop 800af54: bd80 pop {r7, pc} 800af56: bf00 nop 800af58: 200003c1 .word 0x200003c1 800af5c: 20000cf2 .word 0x20000cf2 800af60: 200002e8 .word 0x200002e8 800af64: 20000308 .word 0x20000308 800af68: 200003c0 .word 0x200003c0 0800af6c : //external //CONN_SetState(Disabled); void CONN_SetState(CONN_State_t state){ 800af6c: b580 push {r7, lr} 800af6e: b082 sub sp, #8 800af70: af00 add r7, sp, #0 800af72: 4603 mov r3, r0 800af74: 71fb strb r3, [r7, #7] connectorState = state; 800af76: 4a3d ldr r2, [pc, #244] @ (800b06c ) 800af78: 79fb ldrb r3, [r7, #7] 800af7a: 7013 strb r3, [r2, #0] if(connectorState == Unknown) log_printf(LOG_INFO, "Connector: Unknown\n"); 800af7c: 4b3b ldr r3, [pc, #236] @ (800b06c ) 800af7e: 781b ldrb r3, [r3, #0] 800af80: 2b00 cmp r3, #0 800af82: d103 bne.n 800af8c 800af84: 493a ldr r1, [pc, #232] @ (800b070 ) 800af86: 2007 movs r0, #7 800af88: f000 fa6c bl 800b464 if(connectorState == Unplugged) log_printf(LOG_INFO, "Connector: Unplugged\n"); 800af8c: 4b37 ldr r3, [pc, #220] @ (800b06c ) 800af8e: 781b ldrb r3, [r3, #0] 800af90: 2b01 cmp r3, #1 800af92: d103 bne.n 800af9c 800af94: 4937 ldr r1, [pc, #220] @ (800b074 ) 800af96: 2007 movs r0, #7 800af98: f000 fa64 bl 800b464 if(connectorState == Disabled) log_printf(LOG_INFO, "Connector: Disabled\n"); 800af9c: 4b33 ldr r3, [pc, #204] @ (800b06c ) 800af9e: 781b ldrb r3, [r3, #0] 800afa0: 2b02 cmp r3, #2 800afa2: d103 bne.n 800afac 800afa4: 4934 ldr r1, [pc, #208] @ (800b078 ) 800afa6: 2007 movs r0, #7 800afa8: f000 fa5c bl 800b464 if(connectorState == Preparing) log_printf(LOG_INFO, "Connector: Preparing\n"); 800afac: 4b2f ldr r3, [pc, #188] @ (800b06c ) 800afae: 781b ldrb r3, [r3, #0] 800afb0: 2b03 cmp r3, #3 800afb2: d103 bne.n 800afbc 800afb4: 4931 ldr r1, [pc, #196] @ (800b07c ) 800afb6: 2007 movs r0, #7 800afb8: f000 fa54 bl 800b464 if(connectorState == AuthRequired) log_printf(LOG_INFO, "Connector: AuthRequired\n"); 800afbc: 4b2b ldr r3, [pc, #172] @ (800b06c ) 800afbe: 781b ldrb r3, [r3, #0] 800afc0: 2b04 cmp r3, #4 800afc2: d103 bne.n 800afcc 800afc4: 492e ldr r1, [pc, #184] @ (800b080 ) 800afc6: 2007 movs r0, #7 800afc8: f000 fa4c bl 800b464 if(connectorState == WaitingForEnergy) log_printf(LOG_INFO, "Connector: WaitingForEnergy\n"); 800afcc: 4b27 ldr r3, [pc, #156] @ (800b06c ) 800afce: 781b ldrb r3, [r3, #0] 800afd0: 2b05 cmp r3, #5 800afd2: d103 bne.n 800afdc 800afd4: 492b ldr r1, [pc, #172] @ (800b084 ) 800afd6: 2007 movs r0, #7 800afd8: f000 fa44 bl 800b464 if(connectorState == ChargingPausedEV) log_printf(LOG_INFO, "Connector: ChargingPausedEV\n"); 800afdc: 4b23 ldr r3, [pc, #140] @ (800b06c ) 800afde: 781b ldrb r3, [r3, #0] 800afe0: 2b06 cmp r3, #6 800afe2: d103 bne.n 800afec 800afe4: 4928 ldr r1, [pc, #160] @ (800b088 ) 800afe6: 2007 movs r0, #7 800afe8: f000 fa3c bl 800b464 if(connectorState == ChargingPausedEVSE) log_printf(LOG_INFO, "Connector: ChargingPausedEVSE\n"); 800afec: 4b1f ldr r3, [pc, #124] @ (800b06c ) 800afee: 781b ldrb r3, [r3, #0] 800aff0: 2b07 cmp r3, #7 800aff2: d103 bne.n 800affc 800aff4: 4925 ldr r1, [pc, #148] @ (800b08c ) 800aff6: 2007 movs r0, #7 800aff8: f000 fa34 bl 800b464 if(connectorState == Charging) log_printf(LOG_INFO, "Connector: Charging\n"); 800affc: 4b1b ldr r3, [pc, #108] @ (800b06c ) 800affe: 781b ldrb r3, [r3, #0] 800b000: 2b08 cmp r3, #8 800b002: d103 bne.n 800b00c 800b004: 4922 ldr r1, [pc, #136] @ (800b090 ) 800b006: 2007 movs r0, #7 800b008: f000 fa2c bl 800b464 if(connectorState == AuthTimeout) log_printf(LOG_INFO, "Connector: AuthTimeout\n"); 800b00c: 4b17 ldr r3, [pc, #92] @ (800b06c ) 800b00e: 781b ldrb r3, [r3, #0] 800b010: 2b09 cmp r3, #9 800b012: d103 bne.n 800b01c 800b014: 491f ldr r1, [pc, #124] @ (800b094 ) 800b016: 2007 movs r0, #7 800b018: f000 fa24 bl 800b464 if(connectorState == Finished) log_printf(LOG_INFO, "Connector: Finished\n"); 800b01c: 4b13 ldr r3, [pc, #76] @ (800b06c ) 800b01e: 781b ldrb r3, [r3, #0] 800b020: 2b0a cmp r3, #10 800b022: d103 bne.n 800b02c 800b024: 491c ldr r1, [pc, #112] @ (800b098 ) 800b026: 2007 movs r0, #7 800b028: f000 fa1c bl 800b464 if(connectorState == FinishedEVSE) log_printf(LOG_INFO, "Connector: FinishedEVSE\n"); 800b02c: 4b0f ldr r3, [pc, #60] @ (800b06c ) 800b02e: 781b ldrb r3, [r3, #0] 800b030: 2b0b cmp r3, #11 800b032: d103 bne.n 800b03c 800b034: 4919 ldr r1, [pc, #100] @ (800b09c ) 800b036: 2007 movs r0, #7 800b038: f000 fa14 bl 800b464 if(connectorState == FinishedEV) log_printf(LOG_INFO, "Connector: FinishedEV\n"); 800b03c: 4b0b ldr r3, [pc, #44] @ (800b06c ) 800b03e: 781b ldrb r3, [r3, #0] 800b040: 2b0c cmp r3, #12 800b042: d103 bne.n 800b04c 800b044: 4916 ldr r1, [pc, #88] @ (800b0a0 ) 800b046: 2007 movs r0, #7 800b048: f000 fa0c bl 800b464 if(connectorState == Replugging) log_printf(LOG_INFO, "Connector: Replugging\n"); 800b04c: 4b07 ldr r3, [pc, #28] @ (800b06c ) 800b04e: 781b ldrb r3, [r3, #0] 800b050: 2b0d cmp r3, #13 800b052: d103 bne.n 800b05c 800b054: 4913 ldr r1, [pc, #76] @ (800b0a4 ) 800b056: 2007 movs r0, #7 800b058: f000 fa04 bl 800b464 CONN.connState = state; 800b05c: 4a12 ldr r2, [pc, #72] @ (800b0a8 ) 800b05e: 79fb ldrb r3, [r7, #7] 800b060: 7053 strb r3, [r2, #1] } 800b062: bf00 nop 800b064: 3708 adds r7, #8 800b066: 46bd mov sp, r7 800b068: bd80 pop {r7, pc} 800b06a: bf00 nop 800b06c: 200003c1 .word 0x200003c1 800b070: 080168d8 .word 0x080168d8 800b074: 080168ec .word 0x080168ec 800b078: 08016904 .word 0x08016904 800b07c: 0801691c .word 0x0801691c 800b080: 08016934 .word 0x08016934 800b084: 08016950 .word 0x08016950 800b088: 08016970 .word 0x08016970 800b08c: 08016990 .word 0x08016990 800b090: 080169b0 .word 0x080169b0 800b094: 080169c8 .word 0x080169c8 800b098: 080169e0 .word 0x080169e0 800b09c: 080169f8 .word 0x080169f8 800b0a0: 08016a14 .word 0x08016a14 800b0a4: 08016a2c .word 0x08016a2c 800b0a8: 200002e8 .word 0x200002e8 0800b0ac : void CONN_CC_ReadStateFiltered() { 800b0ac: b580 push {r7, lr} 800b0ae: b082 sub sp, #8 800b0b0: af00 add r7, sp, #0 static uint32_t last_change_time = 0; static uint32_t last_check_time = 0; static uint8_t prev_state = 0; if((HAL_GetTick()-last_check_time)<100) return; 800b0b2: f003 fb8d bl 800e7d0 800b0b6: 4602 mov r2, r0 800b0b8: 4b16 ldr r3, [pc, #88] @ (800b114 ) 800b0ba: 681b ldr r3, [r3, #0] 800b0bc: 1ad3 subs r3, r2, r3 800b0be: 2b63 cmp r3, #99 @ 0x63 800b0c0: d924 bls.n 800b10c last_check_time = HAL_GetTick(); 800b0c2: f003 fb85 bl 800e7d0 800b0c6: 4603 mov r3, r0 800b0c8: 4a12 ldr r2, [pc, #72] @ (800b114 ) 800b0ca: 6013 str r3, [r2, #0] uint8_t new_state = CONN_CC_GetStateRaw(); 800b0cc: f000 f834 bl 800b138 800b0d0: 4603 mov r3, r0 800b0d2: 71fb strb r3, [r7, #7] if (new_state != prev_state) { 800b0d4: 4b10 ldr r3, [pc, #64] @ (800b118 ) 800b0d6: 781b ldrb r3, [r3, #0] 800b0d8: 79fa ldrb r2, [r7, #7] 800b0da: 429a cmp r2, r3 800b0dc: d008 beq.n 800b0f0 last_change_time = HAL_GetTick(); 800b0de: f003 fb77 bl 800e7d0 800b0e2: 4603 mov r3, r0 800b0e4: 4a0d ldr r2, [pc, #52] @ (800b11c ) 800b0e6: 6013 str r3, [r2, #0] prev_state = new_state; 800b0e8: 4a0b ldr r2, [pc, #44] @ (800b118 ) 800b0ea: 79fb ldrb r3, [r7, #7] 800b0ec: 7013 strb r3, [r2, #0] 800b0ee: e00e b.n 800b10e } else if ((HAL_GetTick() - last_change_time) >= 300) { 800b0f0: f003 fb6e bl 800e7d0 800b0f4: 4602 mov r2, r0 800b0f6: 4b09 ldr r3, [pc, #36] @ (800b11c ) 800b0f8: 681b ldr r3, [r3, #0] 800b0fa: 1ad3 subs r3, r2, r3 800b0fc: f5b3 7f96 cmp.w r3, #300 @ 0x12c 800b100: d305 bcc.n 800b10e CC_STATE_FILTERED = prev_state; 800b102: 4b05 ldr r3, [pc, #20] @ (800b118 ) 800b104: 781a ldrb r2, [r3, #0] 800b106: 4b06 ldr r3, [pc, #24] @ (800b120 ) 800b108: 701a strb r2, [r3, #0] 800b10a: e000 b.n 800b10e if((HAL_GetTick()-last_check_time)<100) return; 800b10c: bf00 nop } } 800b10e: 3708 adds r7, #8 800b110: 46bd mov sp, r7 800b112: bd80 pop {r7, pc} 800b114: 200003c4 .word 0x200003c4 800b118: 200003c8 .word 0x200003c8 800b11c: 200003cc .word 0x200003cc 800b120: 200003c2 .word 0x200003c2 0800b124 : uint8_t CONN_CC_GetState(){ 800b124: b480 push {r7} 800b126: af00 add r7, sp, #0 return CC_STATE_FILTERED; 800b128: 4b02 ldr r3, [pc, #8] @ (800b134 ) 800b12a: 781b ldrb r3, [r3, #0] } 800b12c: 4618 mov r0, r3 800b12e: 46bd mov sp, r7 800b130: bc80 pop {r7} 800b132: 4770 bx lr 800b134: 200003c2 .word 0x200003c2 0800b138 : uint8_t CONN_CC_GetStateRaw(){ 800b138: b580 push {r7, lr} 800b13a: b082 sub sp, #8 800b13c: af00 add r7, sp, #0 float volt = CONN_CC_GetAdc(); 800b13e: f000 f851 bl 800b1e4 800b142: 6078 str r0, [r7, #4] // if((volt<12.6f) && (volt>11.4f)) return GBT_CC_12V; // if((volt<6.8f) && (volt>5.2f)) return GBT_CC_6V; // if((volt<4.8f) && (volt>3.2f)) return GBT_CC_4V; // if((volt<2.8f) && (volt>1.2f)) return GBT_CC_2V; if((volt<13.0f) && (volt>11.0f)) return GBT_CC_12V; 800b144: 4922 ldr r1, [pc, #136] @ (800b1d0 ) 800b146: 6878 ldr r0, [r7, #4] 800b148: f7fe f806 bl 8009158 <__aeabi_fcmplt> 800b14c: 4603 mov r3, r0 800b14e: 2b00 cmp r3, #0 800b150: d008 beq.n 800b164 800b152: 4920 ldr r1, [pc, #128] @ (800b1d4 ) 800b154: 6878 ldr r0, [r7, #4] 800b156: f7fe f81d bl 8009194 <__aeabi_fcmpgt> 800b15a: 4603 mov r3, r0 800b15c: 2b00 cmp r3, #0 800b15e: d001 beq.n 800b164 800b160: 2301 movs r3, #1 800b162: e031 b.n 800b1c8 if((volt<7.2f) && (volt>4.8f)) return GBT_CC_6V; 800b164: 491c ldr r1, [pc, #112] @ (800b1d8 ) 800b166: 6878 ldr r0, [r7, #4] 800b168: f7fd fff6 bl 8009158 <__aeabi_fcmplt> 800b16c: 4603 mov r3, r0 800b16e: 2b00 cmp r3, #0 800b170: d008 beq.n 800b184 800b172: 491a ldr r1, [pc, #104] @ (800b1dc ) 800b174: 6878 ldr r0, [r7, #4] 800b176: f7fe f80d bl 8009194 <__aeabi_fcmpgt> 800b17a: 4603 mov r3, r0 800b17c: 2b00 cmp r3, #0 800b17e: d001 beq.n 800b184 800b180: 2302 movs r3, #2 800b182: e021 b.n 800b1c8 if((volt<4.8f) && (volt>3.0f)) return GBT_CC_4V; 800b184: 4915 ldr r1, [pc, #84] @ (800b1dc ) 800b186: 6878 ldr r0, [r7, #4] 800b188: f7fd ffe6 bl 8009158 <__aeabi_fcmplt> 800b18c: 4603 mov r3, r0 800b18e: 2b00 cmp r3, #0 800b190: d008 beq.n 800b1a4 800b192: 4913 ldr r1, [pc, #76] @ (800b1e0 ) 800b194: 6878 ldr r0, [r7, #4] 800b196: f7fd fffd bl 8009194 <__aeabi_fcmpgt> 800b19a: 4603 mov r3, r0 800b19c: 2b00 cmp r3, #0 800b19e: d001 beq.n 800b1a4 800b1a0: 2303 movs r3, #3 800b1a2: e011 b.n 800b1c8 if((volt<3.0f) && (volt>1.0f)) return GBT_CC_2V; 800b1a4: 490e ldr r1, [pc, #56] @ (800b1e0 ) 800b1a6: 6878 ldr r0, [r7, #4] 800b1a8: f7fd ffd6 bl 8009158 <__aeabi_fcmplt> 800b1ac: 4603 mov r3, r0 800b1ae: 2b00 cmp r3, #0 800b1b0: d009 beq.n 800b1c6 800b1b2: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 800b1b6: 6878 ldr r0, [r7, #4] 800b1b8: f7fd ffec bl 8009194 <__aeabi_fcmpgt> 800b1bc: 4603 mov r3, r0 800b1be: 2b00 cmp r3, #0 800b1c0: d001 beq.n 800b1c6 800b1c2: 2304 movs r3, #4 800b1c4: e000 b.n 800b1c8 return GBT_CC_UNKNOWN; 800b1c6: 2300 movs r3, #0 } 800b1c8: 4618 mov r0, r3 800b1ca: 3708 adds r7, #8 800b1cc: 46bd mov sp, r7 800b1ce: bd80 pop {r7, pc} 800b1d0: 41500000 .word 0x41500000 800b1d4: 41300000 .word 0x41300000 800b1d8: 40e66666 .word 0x40e66666 800b1dc: 4099999a .word 0x4099999a 800b1e0: 40400000 .word 0x40400000 0800b1e4 : float CONN_CC_GetAdc(){ 800b1e4: b580 push {r7, lr} 800b1e6: b082 sub sp, #8 800b1e8: af00 add r7, sp, #0 //Vin*k= 1.09v //12vin = 1353 ADC uint32_t adc; float volt; ADC_Select_Channel(ADC_CHANNEL_3); 800b1ea: 2003 movs r0, #3 800b1ec: f7fe fc1c bl 8009a28 HAL_ADC_Start(&hadc1); 800b1f0: 480e ldr r0, [pc, #56] @ (800b22c ) 800b1f2: f003 fbf3 bl 800e9dc HAL_ADC_PollForConversion(&hadc1, 100); 800b1f6: 2164 movs r1, #100 @ 0x64 800b1f8: 480c ldr r0, [pc, #48] @ (800b22c ) 800b1fa: f003 fcc9 bl 800eb90 adc = HAL_ADC_GetValue(&hadc1); 800b1fe: 480b ldr r0, [pc, #44] @ (800b22c ) 800b200: f003 fdcc bl 800ed9c 800b204: 6078 str r0, [r7, #4] HAL_ADC_Stop(&hadc1); 800b206: 4809 ldr r0, [pc, #36] @ (800b22c ) 800b208: f003 fc96 bl 800eb38 volt = (float)adc/113.4f; 800b20c: 6878 ldr r0, [r7, #4] 800b20e: f7fd fdad bl 8008d6c <__aeabi_ui2f> 800b212: 4603 mov r3, r0 800b214: 4906 ldr r1, [pc, #24] @ (800b230 ) 800b216: 4618 mov r0, r3 800b218: f7fd feb4 bl 8008f84 <__aeabi_fdiv> 800b21c: 4603 mov r3, r0 800b21e: 603b str r3, [r7, #0] return volt; 800b220: 683b ldr r3, [r7, #0] } 800b222: 4618 mov r0, r3 800b224: 3708 adds r7, #8 800b226: 46bd mov sp, r7 800b228: bd80 pop {r7, pc} 800b22a: bf00 nop 800b22c: 2000025c .word 0x2000025c 800b230: 42e2cccd .word 0x42e2cccd 0800b234 : CRC_HandleTypeDef hcrc; /* CRC init function */ void MX_CRC_Init(void) { 800b234: b580 push {r7, lr} 800b236: af00 add r7, sp, #0 /* USER CODE END CRC_Init 0 */ /* USER CODE BEGIN CRC_Init 1 */ /* USER CODE END CRC_Init 1 */ hcrc.Instance = CRC; 800b238: 4b06 ldr r3, [pc, #24] @ (800b254 ) 800b23a: 4a07 ldr r2, [pc, #28] @ (800b258 ) 800b23c: 601a str r2, [r3, #0] if (HAL_CRC_Init(&hcrc) != HAL_OK) 800b23e: 4805 ldr r0, [pc, #20] @ (800b254 ) 800b240: f004 ffd3 bl 80101ea 800b244: 4603 mov r3, r0 800b246: 2b00 cmp r3, #0 800b248: d001 beq.n 800b24e { Error_Handler(); 800b24a: f001 f84d bl 800c2e8 } /* USER CODE BEGIN CRC_Init 2 */ /* USER CODE END CRC_Init 2 */ } 800b24e: bf00 nop 800b250: bd80 pop {r7, pc} 800b252: bf00 nop 800b254: 200003d0 .word 0x200003d0 800b258: 40023000 .word 0x40023000 0800b25c : void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle) { 800b25c: b480 push {r7} 800b25e: b085 sub sp, #20 800b260: af00 add r7, sp, #0 800b262: 6078 str r0, [r7, #4] if(crcHandle->Instance==CRC) 800b264: 687b ldr r3, [r7, #4] 800b266: 681b ldr r3, [r3, #0] 800b268: 4a09 ldr r2, [pc, #36] @ (800b290 ) 800b26a: 4293 cmp r3, r2 800b26c: d10b bne.n 800b286 { /* USER CODE BEGIN CRC_MspInit 0 */ /* USER CODE END CRC_MspInit 0 */ /* CRC clock enable */ __HAL_RCC_CRC_CLK_ENABLE(); 800b26e: 4b09 ldr r3, [pc, #36] @ (800b294 ) 800b270: 695b ldr r3, [r3, #20] 800b272: 4a08 ldr r2, [pc, #32] @ (800b294 ) 800b274: f043 0340 orr.w r3, r3, #64 @ 0x40 800b278: 6153 str r3, [r2, #20] 800b27a: 4b06 ldr r3, [pc, #24] @ (800b294 ) 800b27c: 695b ldr r3, [r3, #20] 800b27e: f003 0340 and.w r3, r3, #64 @ 0x40 800b282: 60fb str r3, [r7, #12] 800b284: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN CRC_MspInit 1 */ /* USER CODE END CRC_MspInit 1 */ } } 800b286: bf00 nop 800b288: 3714 adds r7, #20 800b28a: 46bd mov sp, r7 800b28c: bc80 pop {r7} 800b28e: 4770 bx lr 800b290: 40023000 .word 0x40023000 800b294: 40021000 .word 0x40021000 0800b298 <_write>: #if defined(__GNUC__) int _write(int fd, char * ptr, int len) { 800b298: b580 push {r7, lr} 800b29a: b084 sub sp, #16 800b29c: af00 add r7, sp, #0 800b29e: 60f8 str r0, [r7, #12] 800b2a0: 60b9 str r1, [r7, #8] 800b2a2: 607a str r2, [r7, #4] debug_buffer_add((const uint8_t*)ptr, len); 800b2a4: 687b ldr r3, [r7, #4] 800b2a6: b29b uxth r3, r3 800b2a8: 4619 mov r1, r3 800b2aa: 68b8 ldr r0, [r7, #8] 800b2ac: f000 f806 bl 800b2bc return len; 800b2b0: 687b ldr r3, [r7, #4] } 800b2b2: 4618 mov r0, r3 800b2b4: 3710 adds r7, #16 800b2b6: 46bd mov sp, r7 800b2b8: bd80 pop {r7, pc} ... 0800b2bc : #endif // Добавляет данные в кольцевой буфер void debug_buffer_add(const uint8_t* data, uint16_t len) { 800b2bc: b480 push {r7} 800b2be: b085 sub sp, #20 800b2c0: af00 add r7, sp, #0 800b2c2: 6078 str r0, [r7, #4] 800b2c4: 460b mov r3, r1 800b2c6: 807b strh r3, [r7, #2] \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800b2c8: b672 cpsid i } 800b2ca: bf00 nop __disable_irq(); for (uint16_t i = 0; i < len; i++) { 800b2cc: 2300 movs r3, #0 800b2ce: 81fb strh r3, [r7, #14] 800b2d0: e045 b.n 800b35e // Если буфер полон, перезаписываем старые данные if (debug_buffer.count >= DEBUG_BUFFER_SIZE) { 800b2d2: 4b28 ldr r3, [pc, #160] @ (800b374 ) 800b2d4: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b2d8: b29b uxth r3, r3 800b2da: f5b3 6f80 cmp.w r3, #1024 @ 0x400 800b2de: d318 bcc.n 800b312 debug_buffer.read_index = (debug_buffer.read_index + 1) % DEBUG_BUFFER_SIZE; 800b2e0: 4b24 ldr r3, [pc, #144] @ (800b374 ) 800b2e2: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b2e6: b29b uxth r3, r3 800b2e8: 3301 adds r3, #1 800b2ea: 425a negs r2, r3 800b2ec: f3c3 0309 ubfx r3, r3, #0, #10 800b2f0: f3c2 0209 ubfx r2, r2, #0, #10 800b2f4: bf58 it pl 800b2f6: 4253 negpl r3, r2 800b2f8: b29a uxth r2, r3 800b2fa: 4b1e ldr r3, [pc, #120] @ (800b374 ) 800b2fc: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402 debug_buffer.count--; 800b300: 4b1c ldr r3, [pc, #112] @ (800b374 ) 800b302: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b306: b29b uxth r3, r3 800b308: 3b01 subs r3, #1 800b30a: b29a uxth r2, r3 800b30c: 4b19 ldr r3, [pc, #100] @ (800b374 ) 800b30e: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 } debug_buffer.buffer[debug_buffer.write_index] = data[i]; 800b312: 89fb ldrh r3, [r7, #14] 800b314: 687a ldr r2, [r7, #4] 800b316: 4413 add r3, r2 800b318: 4a16 ldr r2, [pc, #88] @ (800b374 ) 800b31a: f8b2 2400 ldrh.w r2, [r2, #1024] @ 0x400 800b31e: b292 uxth r2, r2 800b320: 7819 ldrb r1, [r3, #0] 800b322: 4b14 ldr r3, [pc, #80] @ (800b374 ) 800b324: 5499 strb r1, [r3, r2] debug_buffer.write_index = (debug_buffer.write_index + 1) % DEBUG_BUFFER_SIZE; 800b326: 4b13 ldr r3, [pc, #76] @ (800b374 ) 800b328: f8b3 3400 ldrh.w r3, [r3, #1024] @ 0x400 800b32c: b29b uxth r3, r3 800b32e: 3301 adds r3, #1 800b330: 425a negs r2, r3 800b332: f3c3 0309 ubfx r3, r3, #0, #10 800b336: f3c2 0209 ubfx r2, r2, #0, #10 800b33a: bf58 it pl 800b33c: 4253 negpl r3, r2 800b33e: b29a uxth r2, r3 800b340: 4b0c ldr r3, [pc, #48] @ (800b374 ) 800b342: f8a3 2400 strh.w r2, [r3, #1024] @ 0x400 debug_buffer.count++; 800b346: 4b0b ldr r3, [pc, #44] @ (800b374 ) 800b348: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b34c: b29b uxth r3, r3 800b34e: 3301 adds r3, #1 800b350: b29a uxth r2, r3 800b352: 4b08 ldr r3, [pc, #32] @ (800b374 ) 800b354: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 for (uint16_t i = 0; i < len; i++) { 800b358: 89fb ldrh r3, [r7, #14] 800b35a: 3301 adds r3, #1 800b35c: 81fb strh r3, [r7, #14] 800b35e: 89fa ldrh r2, [r7, #14] 800b360: 887b ldrh r3, [r7, #2] 800b362: 429a cmp r2, r3 800b364: d3b5 bcc.n 800b2d2 __ASM volatile ("cpsie i" : : : "memory"); 800b366: b662 cpsie i } 800b368: bf00 nop } __enable_irq(); } 800b36a: bf00 nop 800b36c: 3714 adds r7, #20 800b36e: 46bd mov sp, r7 800b370: bc80 pop {r7} 800b372: 4770 bx lr 800b374: 200003d8 .word 0x200003d8 0800b378 : // Возвращает количество доступных данных в буфере uint16_t debug_buffer_available(void) { 800b378: b480 push {r7} 800b37a: b083 sub sp, #12 800b37c: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800b37e: b672 cpsid i } 800b380: bf00 nop __disable_irq(); uint16_t count = debug_buffer.count; 800b382: 4b06 ldr r3, [pc, #24] @ (800b39c ) 800b384: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b388: 80fb strh r3, [r7, #6] __ASM volatile ("cpsie i" : : : "memory"); 800b38a: b662 cpsie i } 800b38c: bf00 nop __enable_irq(); return count; 800b38e: 88fb ldrh r3, [r7, #6] } 800b390: 4618 mov r0, r3 800b392: 370c adds r7, #12 800b394: 46bd mov sp, r7 800b396: bc80 pop {r7} 800b398: 4770 bx lr 800b39a: bf00 nop 800b39c: 200003d8 .word 0x200003d8 0800b3a0 : // Отправляет один пакет данных из буфера через SC_SendPacket (не более 250 байт) void debug_buffer_send(void) { 800b3a0: b580 push {r7, lr} 800b3a2: b082 sub sp, #8 800b3a4: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800b3a6: b672 cpsid i } 800b3a8: bf00 nop __disable_irq(); // Если буфер пуст, ничего не делаем if (debug_buffer.count == 0) { 800b3aa: 4b2d ldr r3, [pc, #180] @ (800b460 ) 800b3ac: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b3b0: b29b uxth r3, r3 800b3b2: 2b00 cmp r3, #0 800b3b4: d102 bne.n 800b3bc __ASM volatile ("cpsie i" : : : "memory"); 800b3b6: b662 cpsie i } 800b3b8: bf00 nop __enable_irq(); return; 800b3ba: e04e b.n 800b45a } // Определяем сколько байт можно отправить (не более 250) uint16_t bytes_to_send = debug_buffer.count; 800b3bc: 4b28 ldr r3, [pc, #160] @ (800b460 ) 800b3be: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b3c2: 80fb strh r3, [r7, #6] if (bytes_to_send > DEBUG_BUFFER_MAX_COUNT) { 800b3c4: 88fb ldrh r3, [r7, #6] 800b3c6: 2b80 cmp r3, #128 @ 0x80 800b3c8: d901 bls.n 800b3ce bytes_to_send = DEBUG_BUFFER_MAX_COUNT; 800b3ca: 2380 movs r3, #128 @ 0x80 800b3cc: 80fb strh r3, [r7, #6] } // Вычисляем сколько байт до конца буфера uint16_t bytes_to_end = DEBUG_BUFFER_SIZE - debug_buffer.read_index; 800b3ce: 4b24 ldr r3, [pc, #144] @ (800b460 ) 800b3d0: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b3d4: b29b uxth r3, r3 800b3d6: f5c3 6380 rsb r3, r3, #1024 @ 0x400 800b3da: 80bb strh r3, [r7, #4] // Отправляем только непрерывный блок (до конца буфера или до bytes_to_send) if (bytes_to_send > bytes_to_end) { 800b3dc: 88fa ldrh r2, [r7, #6] 800b3de: 88bb ldrh r3, [r7, #4] 800b3e0: 429a cmp r2, r3 800b3e2: d901 bls.n 800b3e8 bytes_to_send = bytes_to_end; 800b3e4: 88bb ldrh r3, [r7, #4] 800b3e6: 80fb strh r3, [r7, #6] } // Отправляем данные напрямую из буфера if(bytes_to_send == debug_buffer.count){ 800b3e8: 4b1d ldr r3, [pc, #116] @ (800b460 ) 800b3ea: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b3ee: b29b uxth r3, r3 800b3f0: 88fa ldrh r2, [r7, #6] 800b3f2: 429a cmp r2, r3 800b3f4: d10c bne.n 800b410 SC_SendPacket(&debug_buffer.buffer[debug_buffer.read_index], bytes_to_send, CMD_GET_LOG); 800b3f6: 4b1a ldr r3, [pc, #104] @ (800b460 ) 800b3f8: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b3fc: b29b uxth r3, r3 800b3fe: 461a mov r2, r3 800b400: 4b17 ldr r3, [pc, #92] @ (800b460 ) 800b402: 4413 add r3, r2 800b404: 88f9 ldrh r1, [r7, #6] 800b406: 2250 movs r2, #80 @ 0x50 800b408: 4618 mov r0, r3 800b40a: f002 f91b bl 800d644 800b40e: e00b b.n 800b428 }else{ SC_SendPacket(&debug_buffer.buffer[debug_buffer.read_index], bytes_to_send, CMD_GET_LOG_CONTINUE); 800b410: 4b13 ldr r3, [pc, #76] @ (800b460 ) 800b412: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b416: b29b uxth r3, r3 800b418: 461a mov r2, r3 800b41a: 4b11 ldr r3, [pc, #68] @ (800b460 ) 800b41c: 4413 add r3, r2 800b41e: 88f9 ldrh r1, [r7, #6] 800b420: 2251 movs r2, #81 @ 0x51 800b422: 4618 mov r0, r3 800b424: f002 f90e bl 800d644 } debug_buffer.read_index = (debug_buffer.read_index + bytes_to_send) % DEBUG_BUFFER_SIZE; 800b428: 4b0d ldr r3, [pc, #52] @ (800b460 ) 800b42a: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b42e: b29a uxth r2, r3 800b430: 88fb ldrh r3, [r7, #6] 800b432: 4413 add r3, r2 800b434: b29b uxth r3, r3 800b436: f3c3 0309 ubfx r3, r3, #0, #10 800b43a: b29a uxth r2, r3 800b43c: 4b08 ldr r3, [pc, #32] @ (800b460 ) 800b43e: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402 debug_buffer.count -= bytes_to_send; 800b442: 4b07 ldr r3, [pc, #28] @ (800b460 ) 800b444: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b448: b29a uxth r2, r3 800b44a: 88fb ldrh r3, [r7, #6] 800b44c: 1ad3 subs r3, r2, r3 800b44e: b29a uxth r2, r3 800b450: 4b03 ldr r3, [pc, #12] @ (800b460 ) 800b452: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 __ASM volatile ("cpsie i" : : : "memory"); 800b456: b662 cpsie i } 800b458: bf00 nop __enable_irq(); } 800b45a: 3708 adds r7, #8 800b45c: 46bd mov sp, r7 800b45e: bd80 pop {r7, pc} 800b460: 200003d8 .word 0x200003d8 0800b464 : #define LOG_BUFFER_SIZE 128 uint8_t log_buffer[LOG_BUFFER_SIZE]; // Кастомный printf с приоритетом лога int log_printf(LogLevel_t level, const char *format, ...) { 800b464: b40e push {r1, r2, r3} 800b466: b580 push {r7, lr} 800b468: b085 sub sp, #20 800b46a: af00 add r7, sp, #0 800b46c: 4603 mov r3, r0 800b46e: 71fb strb r3, [r7, #7] va_list args; int result; // Добавляем приоритет первым байтом log_buffer[0] = (uint8_t)level; 800b470: 4a15 ldr r2, [pc, #84] @ (800b4c8 ) 800b472: 79fb ldrb r3, [r7, #7] 800b474: 7013 strb r3, [r2, #0] // Форматируем строку начиная со второго байта va_start(args, format); 800b476: f107 0320 add.w r3, r7, #32 800b47a: 60bb str r3, [r7, #8] result = vsnprintf((char*)&log_buffer[1], LOG_BUFFER_SIZE - 2, format, args); 800b47c: 68bb ldr r3, [r7, #8] 800b47e: 69fa ldr r2, [r7, #28] 800b480: 217e movs r1, #126 @ 0x7e 800b482: 4812 ldr r0, [pc, #72] @ (800b4cc ) 800b484: f008 fdc6 bl 8014014 800b488: 60f8 str r0, [r7, #12] va_end(args); // Проверяем, не переполнился ли буфер if (result < 0) { 800b48a: 68fb ldr r3, [r7, #12] 800b48c: 2b00 cmp r3, #0 800b48e: da01 bge.n 800b494 return result; 800b490: 68fb ldr r3, [r7, #12] 800b492: e012 b.n 800b4ba } // Ограничиваем размер, чтобы оставить место для нуль-терминатора if (result >= (LOG_BUFFER_SIZE - 2)) { 800b494: 68fb ldr r3, [r7, #12] 800b496: 2b7d cmp r3, #125 @ 0x7d 800b498: dd01 ble.n 800b49e result = LOG_BUFFER_SIZE - 2; 800b49a: 237e movs r3, #126 @ 0x7e 800b49c: 60fb str r3, [r7, #12] } // Добавляем нуль-терминатор в конец log_buffer[result + 1] = '\0'; 800b49e: 68fb ldr r3, [r7, #12] 800b4a0: 3301 adds r3, #1 800b4a2: 4a09 ldr r2, [pc, #36] @ (800b4c8 ) 800b4a4: 2100 movs r1, #0 800b4a6: 54d1 strb r1, [r2, r3] // Отправляем в буфер (приоритет + строка + нуль-терминатор) debug_buffer_add(log_buffer, result + 2); 800b4a8: 68fb ldr r3, [r7, #12] 800b4aa: b29b uxth r3, r3 800b4ac: 3302 adds r3, #2 800b4ae: b29b uxth r3, r3 800b4b0: 4619 mov r1, r3 800b4b2: 4805 ldr r0, [pc, #20] @ (800b4c8 ) 800b4b4: f7ff ff02 bl 800b2bc return result; 800b4b8: 68fb ldr r3, [r7, #12] } 800b4ba: 4618 mov r0, r3 800b4bc: 3714 adds r7, #20 800b4be: 46bd mov sp, r7 800b4c0: e8bd 4080 ldmia.w sp!, {r7, lr} 800b4c4: b003 add sp, #12 800b4c6: 4770 bx lr 800b4c8: 200007e0 .word 0x200007e0 800b4cc: 200007e1 .word 0x200007e1 0800b4d0 : // GB/T Time Synchronization Packet #include "main.h" #include "soft_rtc.h" #include "charger_gbt.h" void GBT_SendCTS(){ 800b4d0: b580 push {r7, lr} 800b4d2: b082 sub sp, #8 800b4d4: af00 add r7, sp, #0 uint8_t data[7]; unix_to_bcd(get_Current_Time(), data); 800b4d6: f002 fb89 bl 800dbec 800b4da: 4602 mov r2, r0 800b4dc: 463b mov r3, r7 800b4de: 4619 mov r1, r3 800b4e0: 4610 mov r0, r2 800b4e2: f002 fbc1 bl 800dc68 // data[3] = 0x05; //days // data[4] = 0x05; //month // data[5] = 0x24; //years // data[6] = 0x20; //centuries J_SendPacket(0x000700, 6, 7, data); 800b4e6: 463b mov r3, r7 800b4e8: 2207 movs r2, #7 800b4ea: 2106 movs r1, #6 800b4ec: f44f 60e0 mov.w r0, #1792 @ 0x700 800b4f0: f000 fb60 bl 800bbb4 } 800b4f4: bf00 nop 800b4f6: 3708 adds r7, #8 800b4f8: 46bd mov sp, r7 800b4fa: bd80 pop {r7, pc} 0800b4fc : //GB/T Max Load Packet void GBT_SendCML(){ 800b4fc: b580 push {r7, lr} 800b4fe: af00 add r7, sp, #0 // data[4] = 0xC4; //-150A maximum output current // data[5] = 0x09; // // data[6] = 0x8C; //-2A minimum output current // data[7] = 0x0F; // J_SendPacket(0x000800, 6, 8, (uint8_t*)&GBT_MaxLoad); 800b500: 4b04 ldr r3, [pc, #16] @ (800b514 ) 800b502: 2208 movs r2, #8 800b504: 2106 movs r1, #6 800b506: f44f 6000 mov.w r0, #2048 @ 0x800 800b50a: f000 fb53 bl 800bbb4 } 800b50e: bf00 nop 800b510: bd80 pop {r7, pc} 800b512: bf00 nop 800b514: 20000320 .word 0x20000320 0800b518 : //GB/T Version packet void GBT_SendCHM(){ 800b518: b580 push {r7, lr} 800b51a: b082 sub sp, #8 800b51c: af00 add r7, sp, #0 uint8_t data[3]; data[0] = 0x01; 800b51e: 2301 movs r3, #1 800b520: 713b strb r3, [r7, #4] data[1] = 0x01; 800b522: 2301 movs r3, #1 800b524: 717b strb r3, [r7, #5] data[2] = 0x00; 800b526: 2300 movs r3, #0 800b528: 71bb strb r3, [r7, #6] J_SendPacket(0x2600, 6, 3, data); 800b52a: 1d3b adds r3, r7, #4 800b52c: 2203 movs r2, #3 800b52e: 2106 movs r1, #6 800b530: f44f 5018 mov.w r0, #9728 @ 0x2600 800b534: f000 fb3e bl 800bbb4 } 800b538: bf00 nop 800b53a: 3708 adds r7, #8 800b53c: 46bd mov sp, r7 800b53e: bd80 pop {r7, pc} 0800b540 : //GB/T CRM Packet (state=BMS identified) void GBT_SendCRM(uint8_t state){ 800b540: b580 push {r7, lr} 800b542: b082 sub sp, #8 800b544: af00 add r7, sp, #0 800b546: 4603 mov r3, r0 800b548: 71fb strb r3, [r7, #7] // data[3] = 0x01; // data[4] = 0x00; // data[5] = 0x42; //TODO: location BFG // data[6] = 0x46; // data[7] = 0x47; GBT_ChargerInfo.bmsIdentified = state; 800b54a: 4a07 ldr r2, [pc, #28] @ (800b568 ) 800b54c: 79fb ldrb r3, [r7, #7] 800b54e: 7013 strb r3, [r2, #0] J_SendPacket(0x100, 6, 8, (uint8_t *)&GBT_ChargerInfo); 800b550: 4b05 ldr r3, [pc, #20] @ (800b568 ) 800b552: 2208 movs r2, #8 800b554: 2106 movs r1, #6 800b556: f44f 7080 mov.w r0, #256 @ 0x100 800b55a: f000 fb2b bl 800bbb4 } 800b55e: bf00 nop 800b560: 3708 adds r7, #8 800b562: 46bd mov sp, r7 800b564: bd80 pop {r7, pc} 800b566: bf00 nop 800b568: 20000328 .word 0x20000328 0800b56c : //GB/T CRO packet (Charger ready) void GBT_SendCRO(uint8_t state){ 800b56c: b580 push {r7, lr} 800b56e: b084 sub sp, #16 800b570: af00 add r7, sp, #0 800b572: 4603 mov r3, r0 800b574: 71fb strb r3, [r7, #7] uint8_t data[1]; data[0] = state; 800b576: 79fb ldrb r3, [r7, #7] 800b578: 733b strb r3, [r7, #12] J_SendPacket(0xA00, 4, 1, data); 800b57a: f107 030c add.w r3, r7, #12 800b57e: 2201 movs r2, #1 800b580: 2104 movs r1, #4 800b582: f44f 6020 mov.w r0, #2560 @ 0xa00 800b586: f000 fb15 bl 800bbb4 } 800b58a: bf00 nop 800b58c: 3710 adds r7, #16 800b58e: 46bd mov sp, r7 800b590: bd80 pop {r7, pc} ... 0800b594 : //GB/T CCS packet (Charger current status) void GBT_SendCCS(){ 800b594: b580 push {r7, lr} 800b596: af00 add r7, sp, #0 // data[3] = GBT_CurrPower.requestedCurrent>>8; //TODO: current // data[4] = GBT_StateTick()/60000; //charging time (min) // data[5] = 0; //TODO: 255 min+ // data[6] = 0b11111101; //charging not permitted // data[7] = 0xFF; J_SendPacket(0x1200, 6, 8, (uint8_t *)&GBT_ChargerCurrentStatus); 800b598: 4b04 ldr r3, [pc, #16] @ (800b5ac ) 800b59a: 2208 movs r2, #8 800b59c: 2106 movs r1, #6 800b59e: f44f 5090 mov.w r0, #4608 @ 0x1200 800b5a2: f000 fb07 bl 800bbb4 } 800b5a6: bf00 nop 800b5a8: bd80 pop {r7, pc} 800b5aa: bf00 nop 800b5ac: 2000039c .word 0x2000039c 0800b5b0 : // GB/T Charging Stop packet void GBT_SendCST(uint32_t Cause){ 800b5b0: b580 push {r7, lr} 800b5b2: b084 sub sp, #16 800b5b4: af00 add r7, sp, #0 800b5b6: 6078 str r0, [r7, #4] uint8_t data[8]; data[0] = (Cause>>24) & 0xFF; // Error 800b5b8: 687b ldr r3, [r7, #4] 800b5ba: 0e1b lsrs r3, r3, #24 800b5bc: b2db uxtb r3, r3 800b5be: 723b strb r3, [r7, #8] data[1] = (Cause>>16) & 0xFF; // 800b5c0: 687b ldr r3, [r7, #4] 800b5c2: 0c1b lsrs r3, r3, #16 800b5c4: b2db uxtb r3, r3 800b5c6: 727b strb r3, [r7, #9] data[2] = (Cause>>8) & 0xFF; // 800b5c8: 687b ldr r3, [r7, #4] 800b5ca: 0a1b lsrs r3, r3, #8 800b5cc: b2db uxtb r3, r3 800b5ce: 72bb strb r3, [r7, #10] data[3] = Cause & 0xFF; // 800b5d0: 687b ldr r3, [r7, #4] 800b5d2: b2db uxtb r3, r3 800b5d4: 72fb strb r3, [r7, #11] J_SendPacket(0x1A00, 4, 4, data); 800b5d6: f107 0308 add.w r3, r7, #8 800b5da: 2204 movs r2, #4 800b5dc: 2104 movs r1, #4 800b5de: f44f 50d0 mov.w r0, #6656 @ 0x1a00 800b5e2: f000 fae7 bl 800bbb4 } 800b5e6: bf00 nop 800b5e8: 3710 adds r7, #16 800b5ea: 46bd mov sp, r7 800b5ec: bd80 pop {r7, pc} ... 0800b5f0 : void GBT_SendCSD(){ 800b5f0: b580 push {r7, lr} 800b5f2: af00 add r7, sp, #0 GBT_ChargerStop.chargerNumber = GBT_ChargerInfo.chargerNumber; 800b5f4: 4b0b ldr r3, [pc, #44] @ (800b624 ) 800b5f6: f8d3 3001 ldr.w r3, [r3, #1] 800b5fa: 4a0b ldr r2, [pc, #44] @ (800b628 ) 800b5fc: 6053 str r3, [r2, #4] GBT_ChargerStop.outputEnergy = 0; //TODO Energy meters 800b5fe: 4b0a ldr r3, [pc, #40] @ (800b628 ) 800b600: 2200 movs r2, #0 800b602: 709a strb r2, [r3, #2] 800b604: 2200 movs r2, #0 800b606: 70da strb r2, [r3, #3] GBT_ChargerStop.chargingTime = GBT_ChargerCurrentStatus.chargingTime; 800b608: 4b08 ldr r3, [pc, #32] @ (800b62c ) 800b60a: 889b ldrh r3, [r3, #4] 800b60c: b29a uxth r2, r3 800b60e: 4b06 ldr r3, [pc, #24] @ (800b628 ) 800b610: 801a strh r2, [r3, #0] J_SendPacket(0x1D00, 6, 7, (uint8_t *)&GBT_ChargerStop); 800b612: 4b05 ldr r3, [pc, #20] @ (800b628 ) 800b614: 2207 movs r2, #7 800b616: 2106 movs r1, #6 800b618: f44f 50e8 mov.w r0, #7424 @ 0x1d00 800b61c: f000 faca bl 800bbb4 } 800b620: bf00 nop 800b622: bd80 pop {r7, pc} 800b624: 20000328 .word 0x20000328 800b628: 200003a4 .word 0x200003a4 800b62c: 2000039c .word 0x2000039c 0800b630 : void GBT_SendCEM(uint32_t ErrorCode){ 800b630: b580 push {r7, lr} 800b632: b084 sub sp, #16 800b634: af00 add r7, sp, #0 800b636: 6078 str r0, [r7, #4] uint8_t data[8]; data[0] = (ErrorCode>>24) & 0xFF; // Error 800b638: 687b ldr r3, [r7, #4] 800b63a: 0e1b lsrs r3, r3, #24 800b63c: b2db uxtb r3, r3 800b63e: 723b strb r3, [r7, #8] data[1] = (ErrorCode>>16) & 0xFF; // 800b640: 687b ldr r3, [r7, #4] 800b642: 0c1b lsrs r3, r3, #16 800b644: b2db uxtb r3, r3 800b646: 727b strb r3, [r7, #9] data[2] = (ErrorCode>>8) & 0xFF; // 800b648: 687b ldr r3, [r7, #4] 800b64a: 0a1b lsrs r3, r3, #8 800b64c: b2db uxtb r3, r3 800b64e: 72bb strb r3, [r7, #10] data[3] = ErrorCode & 0xFF; // 800b650: 687b ldr r3, [r7, #4] 800b652: b2db uxtb r3, r3 800b654: 72fb strb r3, [r7, #11] J_SendPacket(0x1F00, 4, 4, data); 800b656: f107 0308 add.w r3, r7, #8 800b65a: 2204 movs r2, #4 800b65c: 2104 movs r1, #4 800b65e: f44f 50f8 mov.w r0, #7936 @ 0x1f00 800b662: f000 faa7 bl 800bbb4 } 800b666: bf00 nop 800b668: 3710 adds r7, #16 800b66a: 46bd mov sp, r7 800b66c: bd80 pop {r7, pc} ... 0800b670 : * EXTI PB8 ------> I2C1_SCL PB9 ------> I2C1_SDA */ void MX_GPIO_Init(void) { 800b670: b580 push {r7, lr} 800b672: b08a sub sp, #40 @ 0x28 800b674: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800b676: f107 0314 add.w r3, r7, #20 800b67a: 2200 movs r2, #0 800b67c: 601a str r2, [r3, #0] 800b67e: 605a str r2, [r3, #4] 800b680: 609a str r2, [r3, #8] 800b682: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 800b684: 4b7d ldr r3, [pc, #500] @ (800b87c ) 800b686: 699b ldr r3, [r3, #24] 800b688: 4a7c ldr r2, [pc, #496] @ (800b87c ) 800b68a: f043 0310 orr.w r3, r3, #16 800b68e: 6193 str r3, [r2, #24] 800b690: 4b7a ldr r3, [pc, #488] @ (800b87c ) 800b692: 699b ldr r3, [r3, #24] 800b694: f003 0310 and.w r3, r3, #16 800b698: 613b str r3, [r7, #16] 800b69a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 800b69c: 4b77 ldr r3, [pc, #476] @ (800b87c ) 800b69e: 699b ldr r3, [r3, #24] 800b6a0: 4a76 ldr r2, [pc, #472] @ (800b87c ) 800b6a2: f043 0304 orr.w r3, r3, #4 800b6a6: 6193 str r3, [r2, #24] 800b6a8: 4b74 ldr r3, [pc, #464] @ (800b87c ) 800b6aa: 699b ldr r3, [r3, #24] 800b6ac: f003 0304 and.w r3, r3, #4 800b6b0: 60fb str r3, [r7, #12] 800b6b2: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOB_CLK_ENABLE(); 800b6b4: 4b71 ldr r3, [pc, #452] @ (800b87c ) 800b6b6: 699b ldr r3, [r3, #24] 800b6b8: 4a70 ldr r2, [pc, #448] @ (800b87c ) 800b6ba: f043 0308 orr.w r3, r3, #8 800b6be: 6193 str r3, [r2, #24] 800b6c0: 4b6e ldr r3, [pc, #440] @ (800b87c ) 800b6c2: 699b ldr r3, [r3, #24] 800b6c4: f003 0308 and.w r3, r3, #8 800b6c8: 60bb str r3, [r7, #8] 800b6ca: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOE_CLK_ENABLE(); 800b6cc: 4b6b ldr r3, [pc, #428] @ (800b87c ) 800b6ce: 699b ldr r3, [r3, #24] 800b6d0: 4a6a ldr r2, [pc, #424] @ (800b87c ) 800b6d2: f043 0340 orr.w r3, r3, #64 @ 0x40 800b6d6: 6193 str r3, [r2, #24] 800b6d8: 4b68 ldr r3, [pc, #416] @ (800b87c ) 800b6da: 699b ldr r3, [r3, #24] 800b6dc: f003 0340 and.w r3, r3, #64 @ 0x40 800b6e0: 607b str r3, [r7, #4] 800b6e2: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 800b6e4: 4b65 ldr r3, [pc, #404] @ (800b87c ) 800b6e6: 699b ldr r3, [r3, #24] 800b6e8: 4a64 ldr r2, [pc, #400] @ (800b87c ) 800b6ea: f043 0320 orr.w r3, r3, #32 800b6ee: 6193 str r3, [r2, #24] 800b6f0: 4b62 ldr r3, [pc, #392] @ (800b87c ) 800b6f2: 699b ldr r3, [r3, #24] 800b6f4: f003 0320 and.w r3, r3, #32 800b6f8: 603b str r3, [r7, #0] 800b6fa: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, LOCK_A_Pin|LOCK_B_Pin, GPIO_PIN_RESET); 800b6fc: 2200 movs r2, #0 800b6fe: 2130 movs r1, #48 @ 0x30 800b700: 485f ldr r0, [pc, #380] @ (800b880 ) 800b702: f005 f86c bl 80107de /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, RELAY1_Pin|RELAY2_Pin|RELAY3_Pin|RELAY4_Pin 800b706: 2200 movs r2, #0 800b708: f44f 51f8 mov.w r1, #7936 @ 0x1f00 800b70c: 485d ldr r0, [pc, #372] @ (800b884 ) 800b70e: f005 f866 bl 80107de |RELAY5_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, GPIO_PIN_RESET); 800b712: 2200 movs r2, #0 800b714: f44f 4100 mov.w r1, #32768 @ 0x8000 800b718: 485b ldr r0, [pc, #364] @ (800b888 ) 800b71a: f005 f860 bl 80107de /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, RELAY_DC_Pin|USART2_DIR_Pin, GPIO_PIN_RESET); 800b71e: 2200 movs r2, #0 800b720: 2118 movs r1, #24 800b722: 485a ldr r0, [pc, #360] @ (800b88c ) 800b724: f005 f85b bl 80107de /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(EE_WP_GPIO_Port, EE_WP_Pin, GPIO_PIN_RESET); 800b728: 2200 movs r2, #0 800b72a: 2180 movs r1, #128 @ 0x80 800b72c: 4858 ldr r0, [pc, #352] @ (800b890 ) 800b72e: f005 f856 bl 80107de /*Configure GPIO pin : IN_SW0_Pin */ GPIO_InitStruct.Pin = IN_SW0_Pin; 800b732: 2302 movs r3, #2 800b734: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b736: 2300 movs r3, #0 800b738: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b73a: 2300 movs r3, #0 800b73c: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_SW0_GPIO_Port, &GPIO_InitStruct); 800b73e: f107 0314 add.w r3, r7, #20 800b742: 4619 mov r1, r3 800b744: 4850 ldr r0, [pc, #320] @ (800b888 ) 800b746: f004 feaf bl 80104a8 /*Configure GPIO pin : IN_SW1_Pin */ GPIO_InitStruct.Pin = IN_SW1_Pin; 800b74a: 2304 movs r3, #4 800b74c: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b74e: 2300 movs r3, #0 800b750: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 800b752: 2302 movs r3, #2 800b754: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_SW1_GPIO_Port, &GPIO_InitStruct); 800b756: f107 0314 add.w r3, r7, #20 800b75a: 4619 mov r1, r3 800b75c: 484a ldr r0, [pc, #296] @ (800b888 ) 800b75e: f004 fea3 bl 80104a8 /*Configure GPIO pins : LOCK_A_Pin LOCK_B_Pin */ GPIO_InitStruct.Pin = LOCK_A_Pin|LOCK_B_Pin; 800b762: 2330 movs r3, #48 @ 0x30 800b764: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b766: 2301 movs r3, #1 800b768: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b76a: 2300 movs r3, #0 800b76c: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b76e: 2302 movs r3, #2 800b770: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800b772: f107 0314 add.w r3, r7, #20 800b776: 4619 mov r1, r3 800b778: 4841 ldr r0, [pc, #260] @ (800b880 ) 800b77a: f004 fe95 bl 80104a8 /*Configure GPIO pins : IN0_Pin AC_OK_Pin ISO_IN_Pin */ GPIO_InitStruct.Pin = IN0_Pin|AC_OK_Pin|ISO_IN_Pin; 800b77e: f244 0382 movw r3, #16514 @ 0x4082 800b782: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b784: 2300 movs r3, #0 800b786: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b788: 2300 movs r3, #0 800b78a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800b78c: f107 0314 add.w r3, r7, #20 800b790: 4619 mov r1, r3 800b792: 483c ldr r0, [pc, #240] @ (800b884 ) 800b794: f004 fe88 bl 80104a8 /*Configure GPIO pins : RELAY1_Pin RELAY2_Pin RELAY3_Pin RELAY4_Pin RELAY5_Pin */ GPIO_InitStruct.Pin = RELAY1_Pin|RELAY2_Pin|RELAY3_Pin|RELAY4_Pin 800b798: f44f 53f8 mov.w r3, #7936 @ 0x1f00 800b79c: 617b str r3, [r7, #20] |RELAY5_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b79e: 2301 movs r3, #1 800b7a0: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b7a2: 2300 movs r3, #0 800b7a4: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b7a6: 2302 movs r3, #2 800b7a8: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800b7aa: f107 0314 add.w r3, r7, #20 800b7ae: 4619 mov r1, r3 800b7b0: 4834 ldr r0, [pc, #208] @ (800b884 ) 800b7b2: f004 fe79 bl 80104a8 /*Configure GPIO pin : RELAY_CC_Pin */ GPIO_InitStruct.Pin = RELAY_CC_Pin; 800b7b6: f44f 4300 mov.w r3, #32768 @ 0x8000 800b7ba: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b7bc: 2301 movs r3, #1 800b7be: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b7c0: 2300 movs r3, #0 800b7c2: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b7c4: 2302 movs r3, #2 800b7c6: 623b str r3, [r7, #32] HAL_GPIO_Init(RELAY_CC_GPIO_Port, &GPIO_InitStruct); 800b7c8: f107 0314 add.w r3, r7, #20 800b7cc: 4619 mov r1, r3 800b7ce: 482e ldr r0, [pc, #184] @ (800b888 ) 800b7d0: f004 fe6a bl 80104a8 /*Configure GPIO pins : RELAY_DC_Pin USART2_DIR_Pin */ GPIO_InitStruct.Pin = RELAY_DC_Pin|USART2_DIR_Pin; 800b7d4: 2318 movs r3, #24 800b7d6: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b7d8: 2301 movs r3, #1 800b7da: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b7dc: 2300 movs r3, #0 800b7de: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b7e0: 2302 movs r3, #2 800b7e2: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800b7e4: f107 0314 add.w r3, r7, #20 800b7e8: 4619 mov r1, r3 800b7ea: 4828 ldr r0, [pc, #160] @ (800b88c ) 800b7ec: f004 fe5c bl 80104a8 /*Configure GPIO pin : IN_ESTOP_Pin */ GPIO_InitStruct.Pin = IN_ESTOP_Pin; 800b7f0: 2380 movs r3, #128 @ 0x80 800b7f2: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b7f4: 2300 movs r3, #0 800b7f6: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b7f8: 2300 movs r3, #0 800b7fa: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_ESTOP_GPIO_Port, &GPIO_InitStruct); 800b7fc: f107 0314 add.w r3, r7, #20 800b800: 4619 mov r1, r3 800b802: 4822 ldr r0, [pc, #136] @ (800b88c ) 800b804: f004 fe50 bl 80104a8 /*Configure GPIO pins : IN_FB2_Pin IN_FB1_Pin */ GPIO_InitStruct.Pin = IN_FB2_Pin|IN_FB1_Pin; 800b808: 2318 movs r3, #24 800b80a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b80c: 2300 movs r3, #0 800b80e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b810: 2300 movs r3, #0 800b812: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800b814: f107 0314 add.w r3, r7, #20 800b818: 4619 mov r1, r3 800b81a: 481d ldr r0, [pc, #116] @ (800b890 ) 800b81c: f004 fe44 bl 80104a8 /*Configure GPIO pin : EE_WP_Pin */ GPIO_InitStruct.Pin = EE_WP_Pin; 800b820: 2380 movs r3, #128 @ 0x80 800b822: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b824: 2301 movs r3, #1 800b826: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b828: 2300 movs r3, #0 800b82a: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b82c: 2302 movs r3, #2 800b82e: 623b str r3, [r7, #32] HAL_GPIO_Init(EE_WP_GPIO_Port, &GPIO_InitStruct); 800b830: f107 0314 add.w r3, r7, #20 800b834: 4619 mov r1, r3 800b836: 4816 ldr r0, [pc, #88] @ (800b890 ) 800b838: f004 fe36 bl 80104a8 /*Configure GPIO pins : PB8 PB9 */ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; 800b83c: f44f 7340 mov.w r3, #768 @ 0x300 800b840: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 800b842: 2312 movs r3, #18 800b844: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800b846: 2303 movs r3, #3 800b848: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800b84a: f107 0314 add.w r3, r7, #20 800b84e: 4619 mov r1, r3 800b850: 480f ldr r0, [pc, #60] @ (800b890 ) 800b852: f004 fe29 bl 80104a8 /*Configure peripheral I/O remapping */ __HAL_AFIO_REMAP_I2C1_ENABLE(); 800b856: 4b0f ldr r3, [pc, #60] @ (800b894 ) 800b858: 685b ldr r3, [r3, #4] 800b85a: 627b str r3, [r7, #36] @ 0x24 800b85c: 6a7b ldr r3, [r7, #36] @ 0x24 800b85e: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800b862: 627b str r3, [r7, #36] @ 0x24 800b864: 6a7b ldr r3, [r7, #36] @ 0x24 800b866: f043 0302 orr.w r3, r3, #2 800b86a: 627b str r3, [r7, #36] @ 0x24 800b86c: 4a09 ldr r2, [pc, #36] @ (800b894 ) 800b86e: 6a7b ldr r3, [r7, #36] @ 0x24 800b870: 6053 str r3, [r2, #4] } 800b872: bf00 nop 800b874: 3728 adds r7, #40 @ 0x28 800b876: 46bd mov sp, r7 800b878: bd80 pop {r7, pc} 800b87a: bf00 nop 800b87c: 40021000 .word 0x40021000 800b880: 40011000 .word 0x40011000 800b884: 40011800 .word 0x40011800 800b888: 40010800 .word 0x40010800 800b88c: 40011400 .word 0x40011400 800b890: 40010c00 .word 0x40010c00 800b894: 40010000 .word 0x40010000 0800b898 : extern GBT_BCL_t GBT_CurrPower; j_receive_t j_rx; void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) { 800b898: b590 push {r4, r7, lr} 800b89a: b0cd sub sp, #308 @ 0x134 800b89c: af40 add r7, sp, #256 @ 0x100 800b89e: 6078 str r0, [r7, #4] CAN_RxHeaderTypeDef RxHeader; uint8_t RxData[8] = {0,}; 800b8a0: f107 030c add.w r3, r7, #12 800b8a4: 2200 movs r2, #0 800b8a6: 601a str r2, [r3, #0] 800b8a8: 605a str r2, [r3, #4] if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &RxHeader, RxData) == HAL_OK) 800b8aa: f107 030c add.w r3, r7, #12 800b8ae: f107 0214 add.w r2, r7, #20 800b8b2: 2100 movs r1, #0 800b8b4: 6878 ldr r0, [r7, #4] 800b8b6: f004 f82b bl 800f910 800b8ba: 4603 mov r3, r0 800b8bc: 2b00 cmp r3, #0 800b8be: f040 8153 bne.w 800bb68 { if((RxHeader.ExtId & 0x00FFFF) == ((J_ID_SE << 8) | J_ID_EV)){ // SA, DA match 800b8c2: 69bb ldr r3, [r7, #24] 800b8c4: b29b uxth r3, r3 800b8c6: f245 62f4 movw r2, #22260 @ 0x56f4 800b8ca: 4293 cmp r3, r2 800b8cc: f040 814c bne.w 800bb68 switch ((RxHeader.ExtId>>8) & 0x00FF00){ 800b8d0: 69bb ldr r3, [r7, #24] 800b8d2: 0a1b lsrs r3, r3, #8 800b8d4: f403 437f and.w r3, r3, #65280 @ 0xff00 800b8d8: f5b3 4f6c cmp.w r3, #60416 @ 0xec00 800b8dc: d013 beq.n 800b906 800b8de: f5b3 4f6c cmp.w r3, #60416 @ 0xec00 800b8e2: f200 810c bhi.w 800bafe 800b8e6: f5b3 4f6b cmp.w r3, #60160 @ 0xeb00 800b8ea: d057 beq.n 800b99c 800b8ec: f5b3 4f6b cmp.w r3, #60160 @ 0xeb00 800b8f0: f200 8105 bhi.w 800bafe 800b8f4: f5b3 5fc8 cmp.w r3, #6400 @ 0x1900 800b8f8: f000 80dd beq.w 800bab6 800b8fc: f5b3 5ff0 cmp.w r3, #7680 @ 0x1e00 800b900: f000 80b6 beq.w 800ba70 800b904: e0fb b.n 800bafe case 0xEC00: //PGN Connection Management Message if(RxData[0] == 16){ //Request to Send 800b906: 7b3b ldrb r3, [r7, #12] 800b908: 2b10 cmp r3, #16 800b90a: d13e bne.n 800b98a /* Set the RTS values */ j_rx.size = RxData[1] | (RxData[2]<<8); 800b90c: 7b7b ldrb r3, [r7, #13] 800b90e: b21a sxth r2, r3 800b910: 7bbb ldrb r3, [r7, #14] 800b912: b21b sxth r3, r3 800b914: 021b lsls r3, r3, #8 800b916: b21b sxth r3, r3 800b918: 4313 orrs r3, r2 800b91a: b21b sxth r3, r3 800b91c: b29a uxth r2, r3 800b91e: 4b94 ldr r3, [pc, #592] @ (800bb70 ) 800b920: f8a3 2104 strh.w r2, [r3, #260] @ 0x104 j_rx.packet = 1; 800b924: 4b92 ldr r3, [pc, #584] @ (800bb70 ) 800b926: 2201 movs r2, #1 800b928: f883 2107 strb.w r2, [r3, #263] @ 0x107 j_rx.packets = RxData[3]; 800b92c: 7bfa ldrb r2, [r7, #15] 800b92e: 4b90 ldr r3, [pc, #576] @ (800bb70 ) 800b930: f883 2106 strb.w r2, [r3, #262] @ 0x106 j_rx.step = 2; //TODO 800b934: 4b8e ldr r3, [pc, #568] @ (800bb70 ) 800b936: 2202 movs r2, #2 800b938: f883 2108 strb.w r2, [r3, #264] @ 0x108 j_rx.step_cts_remain = j_rx.step; 800b93c: 4b8c ldr r3, [pc, #560] @ (800bb70 ) 800b93e: f893 2108 ldrb.w r2, [r3, #264] @ 0x108 800b942: 4b8b ldr r3, [pc, #556] @ (800bb70 ) 800b944: f883 2109 strb.w r2, [r3, #265] @ 0x109 j_rx.PGN = (RxData[7] << 16) | (RxData[6] << 8) | RxData[5]; 800b948: 7cfb ldrb r3, [r7, #19] 800b94a: 041a lsls r2, r3, #16 800b94c: 7cbb ldrb r3, [r7, #18] 800b94e: 021b lsls r3, r3, #8 800b950: 4313 orrs r3, r2 800b952: 7c7a ldrb r2, [r7, #17] 800b954: 4313 orrs r3, r2 800b956: 461a mov r2, r3 800b958: 4b85 ldr r3, [pc, #532] @ (800bb70 ) 800b95a: f8c3 2100 str.w r2, [r3, #256] @ 0x100 if(j_rx.size<256) { //TODO: valid check 800b95e: 4b84 ldr r3, [pc, #528] @ (800bb70 ) 800b960: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800b964: 2bff cmp r3, #255 @ 0xff 800b966: d810 bhi.n 800b98a J_SendCTS(j_rx); 800b968: 4c81 ldr r4, [pc, #516] @ (800bb70 ) 800b96a: 4668 mov r0, sp 800b96c: f104 0310 add.w r3, r4, #16 800b970: f44f 7280 mov.w r2, #256 @ 0x100 800b974: 4619 mov r1, r3 800b976: f008 fc99 bl 80142ac 800b97a: e894 000f ldmia.w r4, {r0, r1, r2, r3} 800b97e: f000 f941 bl 800bc04 j_rx.state = 1; 800b982: 4b7b ldr r3, [pc, #492] @ (800bb70 ) 800b984: 2201 movs r2, #1 800b986: f883 210a strb.w r2, [r3, #266] @ 0x10a } } if(RxData[0] == 255){ //Connection Abort 800b98a: 7b3b ldrb r3, [r7, #12] 800b98c: 2bff cmp r3, #255 @ 0xff 800b98e: f040 80e6 bne.w 800bb5e j_rx.state = 0; 800b992: 4b77 ldr r3, [pc, #476] @ (800bb70 ) 800b994: 2200 movs r2, #0 800b996: f883 210a strb.w r2, [r3, #266] @ 0x10a * 1CECF456 11 02 01 FF FF 00 02 00 * 1CEB56F4 01 01 01 00 03 46 05 40 * 1CEC56F4 FF FF FF FF FF 00 00 00 */ break; 800b99a: e0e0 b.n 800bb5e case 0xEB00: //PGN Data Message if(j_rx.state != 1) break; 800b99c: 4b74 ldr r3, [pc, #464] @ (800bb70 ) 800b99e: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800b9a2: 2b01 cmp r3, #1 800b9a4: f040 80dd bne.w 800bb62 if((RxData[0]>0) && (RxData[0]<35)){ //Array limit check 800b9a8: 7b3b ldrb r3, [r7, #12] 800b9aa: 2b00 cmp r3, #0 800b9ac: f000 80db beq.w 800bb66 800b9b0: 7b3b ldrb r3, [r7, #12] 800b9b2: 2b22 cmp r3, #34 @ 0x22 800b9b4: f200 80d7 bhi.w 800bb66 if(j_rx.packet == RxData[0]){ //step check 800b9b8: 4b6d ldr r3, [pc, #436] @ (800bb70 ) 800b9ba: f893 2107 ldrb.w r2, [r3, #263] @ 0x107 800b9be: 7b3b ldrb r3, [r7, #12] 800b9c0: 429a cmp r2, r3 800b9c2: f040 80d0 bne.w 800bb66 memcpy (&j_rx.data[(RxData[0]-1)*7], &RxData[1],7); 800b9c6: 7b3b ldrb r3, [r7, #12] 800b9c8: 1e5a subs r2, r3, #1 800b9ca: 4613 mov r3, r2 800b9cc: 00db lsls r3, r3, #3 800b9ce: 1a9b subs r3, r3, r2 800b9d0: 4a67 ldr r2, [pc, #412] @ (800bb70 ) 800b9d2: 1898 adds r0, r3, r2 800b9d4: f107 030c add.w r3, r7, #12 800b9d8: 3301 adds r3, #1 800b9da: 2207 movs r2, #7 800b9dc: 4619 mov r1, r3 800b9de: f008 fc65 bl 80142ac j_rx.packet++; 800b9e2: 4b63 ldr r3, [pc, #396] @ (800bb70 ) 800b9e4: f893 3107 ldrb.w r3, [r3, #263] @ 0x107 800b9e8: 3301 adds r3, #1 800b9ea: b2da uxtb r2, r3 800b9ec: 4b60 ldr r3, [pc, #384] @ (800bb70 ) 800b9ee: f883 2107 strb.w r2, [r3, #263] @ 0x107 if(j_rx.packet > j_rx.packets){ 800b9f2: 4b5f ldr r3, [pc, #380] @ (800bb70 ) 800b9f4: f893 2107 ldrb.w r2, [r3, #263] @ 0x107 800b9f8: 4b5d ldr r3, [pc, #372] @ (800bb70 ) 800b9fa: f893 3106 ldrb.w r3, [r3, #262] @ 0x106 800b9fe: 429a cmp r2, r3 800ba00: d911 bls.n 800ba26 //End of transmission J_SendACK(j_rx); 800ba02: 4c5b ldr r4, [pc, #364] @ (800bb70 ) 800ba04: 4668 mov r0, sp 800ba06: f104 0310 add.w r3, r4, #16 800ba0a: f44f 7280 mov.w r2, #256 @ 0x100 800ba0e: 4619 mov r1, r3 800ba10: f008 fc4c bl 80142ac 800ba14: e894 000f ldmia.w r4, {r0, r1, r2, r3} 800ba18: f000 f93a bl 800bc90 j_rx.state = 2; 800ba1c: 4b54 ldr r3, [pc, #336] @ (800bb70 ) 800ba1e: 2202 movs r2, #2 800ba20: f883 210a strb.w r2, [r3, #266] @ 0x10a j_rx.step_cts_remain = 2; } } } } break; 800ba24: e09f b.n 800bb66 if(j_rx.step_cts_remain > 0) j_rx.step_cts_remain--; 800ba26: 4b52 ldr r3, [pc, #328] @ (800bb70 ) 800ba28: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 800ba2c: 2b00 cmp r3, #0 800ba2e: d007 beq.n 800ba40 800ba30: 4b4f ldr r3, [pc, #316] @ (800bb70 ) 800ba32: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 800ba36: 3b01 subs r3, #1 800ba38: b2da uxtb r2, r3 800ba3a: 4b4d ldr r3, [pc, #308] @ (800bb70 ) 800ba3c: f883 2109 strb.w r2, [r3, #265] @ 0x109 if(j_rx.step_cts_remain == 0){ 800ba40: 4b4b ldr r3, [pc, #300] @ (800bb70 ) 800ba42: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 800ba46: 2b00 cmp r3, #0 800ba48: f040 808d bne.w 800bb66 J_SendCTS(j_rx); 800ba4c: 4c48 ldr r4, [pc, #288] @ (800bb70 ) 800ba4e: 4668 mov r0, sp 800ba50: f104 0310 add.w r3, r4, #16 800ba54: f44f 7280 mov.w r2, #256 @ 0x100 800ba58: 4619 mov r1, r3 800ba5a: f008 fc27 bl 80142ac 800ba5e: e894 000f ldmia.w r4, {r0, r1, r2, r3} 800ba62: f000 f8cf bl 800bc04 j_rx.step_cts_remain = 2; 800ba66: 4b42 ldr r3, [pc, #264] @ (800bb70 ) 800ba68: 2202 movs r2, #2 800ba6a: f883 2109 strb.w r2, [r3, #265] @ 0x109 break; 800ba6e: e07a b.n 800bb66 case 0x1E00: //PGN BEM (ERROR) //Error force stop // --> Suspend EV log_printf(LOG_ERR, "BEM Received, force stopping...\n"); 800ba70: 4940 ldr r1, [pc, #256] @ (800bb74 ) 800ba72: 2004 movs r0, #4 800ba74: f7ff fcf6 bl 800b464 log_printf(LOG_ERR, "BEM: %02X %02X %02X %02X", RxData[0], RxData[1], RxData[2], RxData[3]); 800ba78: 7b3b ldrb r3, [r7, #12] 800ba7a: 4619 mov r1, r3 800ba7c: 7b7b ldrb r3, [r7, #13] 800ba7e: 4618 mov r0, r3 800ba80: 7bbb ldrb r3, [r7, #14] 800ba82: 7bfa ldrb r2, [r7, #15] 800ba84: 9201 str r2, [sp, #4] 800ba86: 9300 str r3, [sp, #0] 800ba88: 4603 mov r3, r0 800ba8a: 460a mov r2, r1 800ba8c: 493a ldr r1, [pc, #232] @ (800bb78 ) 800ba8e: 2004 movs r0, #4 800ba90: f7ff fce8 bl 800b464 log_printf(LOG_ERR, " %02X %02X %02X %02X\n", RxData[4], RxData[5], RxData[6], RxData[7]); 800ba94: 7c3b ldrb r3, [r7, #16] 800ba96: 4619 mov r1, r3 800ba98: 7c7b ldrb r3, [r7, #17] 800ba9a: 4618 mov r0, r3 800ba9c: 7cbb ldrb r3, [r7, #18] 800ba9e: 7cfa ldrb r2, [r7, #19] 800baa0: 9201 str r2, [sp, #4] 800baa2: 9300 str r3, [sp, #0] 800baa4: 4603 mov r3, r0 800baa6: 460a mov r2, r1 800baa8: 4934 ldr r1, [pc, #208] @ (800bb7c ) 800baaa: 2004 movs r0, #4 800baac: f7ff fcda bl 800b464 GBT_ForceStop(); 800bab0: f7ff f86e bl 800ab90 break; 800bab4: e058 b.n 800bb68 case 0x1900: //PGN BST (STOP) //Normal stop // --> Suspend EV log_printf(LOG_INFO, "BST Received, stopping...\n"); 800bab6: 4932 ldr r1, [pc, #200] @ (800bb80 ) 800bab8: 2007 movs r0, #7 800baba: f7ff fcd3 bl 800b464 log_printf(LOG_INFO, "BST: %02X %02X %02X %02X", RxData[0], RxData[1], RxData[2], RxData[3]); 800babe: 7b3b ldrb r3, [r7, #12] 800bac0: 4619 mov r1, r3 800bac2: 7b7b ldrb r3, [r7, #13] 800bac4: 4618 mov r0, r3 800bac6: 7bbb ldrb r3, [r7, #14] 800bac8: 7bfa ldrb r2, [r7, #15] 800baca: 9201 str r2, [sp, #4] 800bacc: 9300 str r3, [sp, #0] 800bace: 4603 mov r3, r0 800bad0: 460a mov r2, r1 800bad2: 492c ldr r1, [pc, #176] @ (800bb84 ) 800bad4: 2007 movs r0, #7 800bad6: f7ff fcc5 bl 800b464 log_printf(LOG_INFO, " %02X %02X %02X %02X\n", RxData[4], RxData[5], RxData[6], RxData[7]); 800bada: 7c3b ldrb r3, [r7, #16] 800badc: 4619 mov r1, r3 800bade: 7c7b ldrb r3, [r7, #17] 800bae0: 4618 mov r0, r3 800bae2: 7cbb ldrb r3, [r7, #18] 800bae4: 7cfa ldrb r2, [r7, #19] 800bae6: 9201 str r2, [sp, #4] 800bae8: 9300 str r3, [sp, #0] 800baea: 4603 mov r3, r0 800baec: 460a mov r2, r1 800baee: 4923 ldr r1, [pc, #140] @ (800bb7c ) 800baf0: 2007 movs r0, #7 800baf2: f7ff fcb7 bl 800b464 GBT_StopEV(GBT_CST_BMS_ACTIVELY_SUSPENDS); 800baf6: 4824 ldr r0, [pc, #144] @ (800bb88 ) 800baf8: f7fe ffec bl 800aad4 break; 800bafc: e034 b.n 800bb68 default: if(j_rx.state == 0){//TODO protections 800bafe: 4b1c ldr r3, [pc, #112] @ (800bb70 ) 800bb00: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800bb04: 2b00 cmp r3, #0 800bb06: d12f bne.n 800bb68 //Short packet j_rx.size = RxHeader.DLC; 800bb08: 6a7b ldr r3, [r7, #36] @ 0x24 800bb0a: b29a uxth r2, r3 800bb0c: 4b18 ldr r3, [pc, #96] @ (800bb70 ) 800bb0e: f8a3 2104 strh.w r2, [r3, #260] @ 0x104 j_rx.packet = 1; 800bb12: 4b17 ldr r3, [pc, #92] @ (800bb70 ) 800bb14: 2201 movs r2, #1 800bb16: f883 2107 strb.w r2, [r3, #263] @ 0x107 j_rx.packets = 1; 800bb1a: 4b15 ldr r3, [pc, #84] @ (800bb70 ) 800bb1c: 2201 movs r2, #1 800bb1e: f883 2106 strb.w r2, [r3, #262] @ 0x106 j_rx.step = 1; 800bb22: 4b13 ldr r3, [pc, #76] @ (800bb70 ) 800bb24: 2201 movs r2, #1 800bb26: f883 2108 strb.w r2, [r3, #264] @ 0x108 j_rx.step_cts_remain = 0; 800bb2a: 4b11 ldr r3, [pc, #68] @ (800bb70 ) 800bb2c: 2200 movs r2, #0 800bb2e: f883 2109 strb.w r2, [r3, #265] @ 0x109 j_rx.PGN = (RxHeader.ExtId>>8) & 0x00FF00; 800bb32: 69bb ldr r3, [r7, #24] 800bb34: 0a1b lsrs r3, r3, #8 800bb36: f403 437f and.w r3, r3, #65280 @ 0xff00 800bb3a: 4a0d ldr r2, [pc, #52] @ (800bb70 ) 800bb3c: f8c2 3100 str.w r3, [r2, #256] @ 0x100 j_rx.state = 2; 800bb40: 4b0b ldr r3, [pc, #44] @ (800bb70 ) 800bb42: 2202 movs r2, #2 800bb44: f883 210a strb.w r2, [r3, #266] @ 0x10a memcpy (j_rx.data, RxData, j_rx.size); 800bb48: 4b09 ldr r3, [pc, #36] @ (800bb70 ) 800bb4a: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800bb4e: 461a mov r2, r3 800bb50: f107 030c add.w r3, r7, #12 800bb54: 4619 mov r1, r3 800bb56: 4806 ldr r0, [pc, #24] @ (800bb70 ) 800bb58: f008 fba8 bl 80142ac } } } } } 800bb5c: e004 b.n 800bb68 break; 800bb5e: bf00 nop 800bb60: e002 b.n 800bb68 if(j_rx.state != 1) break; 800bb62: bf00 nop 800bb64: e000 b.n 800bb68 break; 800bb66: bf00 nop } 800bb68: bf00 nop 800bb6a: 3734 adds r7, #52 @ 0x34 800bb6c: 46bd mov sp, r7 800bb6e: bd90 pop {r4, r7, pc} 800bb70: 20000860 .word 0x20000860 800bb74: 08016a44 .word 0x08016a44 800bb78: 08016a68 .word 0x08016a68 800bb7c: 08016a84 .word 0x08016a84 800bb80: 08016a9c .word 0x08016a9c 800bb84: 08016ab8 .word 0x08016ab8 800bb88: 4000f0f0 .word 0x4000f0f0 0800bb8c : void GBT_CAN_ReInit(){ 800bb8c: b580 push {r7, lr} 800bb8e: af00 add r7, sp, #0 HAL_CAN_Stop(&hcan1); 800bb90: 4807 ldr r0, [pc, #28] @ (800bbb0 ) 800bb92: f003 fd71 bl 800f678 MX_CAN1_Init(); 800bb96: f7fd ff63 bl 8009a60 GBT_CAN_FilterInit(); 800bb9a: f000 f8b3 bl 800bd04 HAL_CAN_Start(&hcan1); 800bb9e: 4804 ldr r0, [pc, #16] @ (800bbb0 ) 800bba0: f003 fd26 bl 800f5f0 HAL_CAN_ActivateNotification(&hcan1, CAN_IT_RX_FIFO0_MSG_PENDING); 800bba4: 2102 movs r1, #2 800bba6: 4802 ldr r0, [pc, #8] @ (800bbb0 ) 800bba8: f003 ffd3 bl 800fb52 } 800bbac: bf00 nop 800bbae: bd80 pop {r7, pc} 800bbb0: 20000294 .word 0x20000294 0800bbb4 : void J_SendPacket(uint32_t PGN, uint8_t pri, uint8_t DLC, uint8_t *data){ 800bbb4: b580 push {r7, lr} 800bbb6: b08c sub sp, #48 @ 0x30 800bbb8: af00 add r7, sp, #0 800bbba: 60f8 str r0, [r7, #12] 800bbbc: 607b str r3, [r7, #4] 800bbbe: 460b mov r3, r1 800bbc0: 72fb strb r3, [r7, #11] 800bbc2: 4613 mov r3, r2 800bbc4: 72bb strb r3, [r7, #10] CAN_TxHeaderTypeDef tx_header; uint32_t tx_mailbox; tx_header.ExtId = (pri << 26) | (PGN << 8) | (J_ID_EV << 8) | J_ID_SE; 800bbc6: 7afb ldrb r3, [r7, #11] 800bbc8: 069a lsls r2, r3, #26 800bbca: 68fb ldr r3, [r7, #12] 800bbcc: 021b lsls r3, r3, #8 800bbce: 4313 orrs r3, r2 800bbd0: f443 4374 orr.w r3, r3, #62464 @ 0xf400 800bbd4: f043 0356 orr.w r3, r3, #86 @ 0x56 800bbd8: 61fb str r3, [r7, #28] tx_header.RTR = CAN_RTR_DATA; 800bbda: 2300 movs r3, #0 800bbdc: 627b str r3, [r7, #36] @ 0x24 tx_header.IDE = CAN_ID_EXT; 800bbde: 2304 movs r3, #4 800bbe0: 623b str r3, [r7, #32] tx_header.DLC = DLC; 800bbe2: 7abb ldrb r3, [r7, #10] 800bbe4: 62bb str r3, [r7, #40] @ 0x28 //TODO buffer wait HAL_CAN_AddTxMessage(&hcan1, &tx_header, data, &tx_mailbox); 800bbe6: f107 0314 add.w r3, r7, #20 800bbea: f107 0118 add.w r1, r7, #24 800bbee: 687a ldr r2, [r7, #4] 800bbf0: 4803 ldr r0, [pc, #12] @ (800bc00 ) 800bbf2: f003 fd8a bl 800f70a //HAL_Delay(2); } 800bbf6: bf00 nop 800bbf8: 3730 adds r7, #48 @ 0x30 800bbfa: 46bd mov sp, r7 800bbfc: bd80 pop {r7, pc} 800bbfe: bf00 nop 800bc00: 20000294 .word 0x20000294 0800bc04 : //void J_SendPacketLong(){ // //TODO (no need) //} // J1939 sequence Clear To Send packet void J_SendCTS(j_receive_t rx){ 800bc04: b084 sub sp, #16 800bc06: b580 push {r7, lr} 800bc08: b082 sub sp, #8 800bc0a: af00 add r7, sp, #0 800bc0c: f107 0c10 add.w ip, r7, #16 800bc10: e88c 000f stmia.w ip, {r0, r1, r2, r3} //if(rx.packets <= rx.packet) return; TODO uint8_t data[8]; data[0] = 17; //CONTROL_BYTE_TP_CM_CTS 800bc14: 2311 movs r3, #17 800bc16: 703b strb r3, [r7, #0] data[1] = rx.step;//total_number_of_packages_transmitted 800bc18: f897 3118 ldrb.w r3, [r7, #280] @ 0x118 800bc1c: 707b strb r3, [r7, #1] if (rx.step > (rx.packets - rx.packet+1)) data[1] = rx.packets - rx.packet+1; 800bc1e: f897 3118 ldrb.w r3, [r7, #280] @ 0x118 800bc22: 461a mov r2, r3 800bc24: f897 3116 ldrb.w r3, [r7, #278] @ 0x116 800bc28: 4619 mov r1, r3 800bc2a: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 800bc2e: 1acb subs r3, r1, r3 800bc30: 3301 adds r3, #1 800bc32: 429a cmp r2, r3 800bc34: dd08 ble.n 800bc48 800bc36: f897 2116 ldrb.w r2, [r7, #278] @ 0x116 800bc3a: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 800bc3e: 1ad3 subs r3, r2, r3 800bc40: b2db uxtb r3, r3 800bc42: 3301 adds r3, #1 800bc44: b2db uxtb r3, r3 800bc46: 707b strb r3, [r7, #1] data[2] = rx.packet;//next_packet_number_transmitted 800bc48: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 800bc4c: 70bb strb r3, [r7, #2] data[3] = 0xFF; /* Reserved */ 800bc4e: 23ff movs r3, #255 @ 0xff 800bc50: 70fb strb r3, [r7, #3] data[4] = 0xFF; 800bc52: 23ff movs r3, #255 @ 0xff 800bc54: 713b strb r3, [r7, #4] data[5] = rx.PGN; 800bc56: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bc5a: b2db uxtb r3, r3 800bc5c: 717b strb r3, [r7, #5] data[6] = rx.PGN >> 8; 800bc5e: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bc62: 0a1b lsrs r3, r3, #8 800bc64: b2db uxtb r3, r3 800bc66: 71bb strb r3, [r7, #6] data[7] = rx.PGN >> 16; 800bc68: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bc6c: 0c1b lsrs r3, r3, #16 800bc6e: b2db uxtb r3, r3 800bc70: 71fb strb r3, [r7, #7] J_SendPacket(0x00EC00, 7, 8, data); 800bc72: 463b mov r3, r7 800bc74: 2208 movs r2, #8 800bc76: 2107 movs r1, #7 800bc78: f44f 406c mov.w r0, #60416 @ 0xec00 800bc7c: f7ff ff9a bl 800bbb4 } 800bc80: bf00 nop 800bc82: 3708 adds r7, #8 800bc84: 46bd mov sp, r7 800bc86: e8bd 4080 ldmia.w sp!, {r7, lr} 800bc8a: b004 add sp, #16 800bc8c: 4770 bx lr ... 0800bc90 : // J1939 sequence ACK packet void J_SendACK(j_receive_t rx){//uint32_t PGN, uint8_t step, uint8_t packet){ 800bc90: b084 sub sp, #16 800bc92: b580 push {r7, lr} 800bc94: b082 sub sp, #8 800bc96: af00 add r7, sp, #0 800bc98: f107 0c10 add.w ip, r7, #16 800bc9c: e88c 000f stmia.w ip, {r0, r1, r2, r3} uint8_t data[8]; data[0] = 19; //CONTROL_BYTE_TP_CM_ACK 800bca0: 2313 movs r3, #19 800bca2: 703b strb r3, [r7, #0] data[1] = j_rx.size; 800bca4: 4b16 ldr r3, [pc, #88] @ (800bd00 ) 800bca6: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800bcaa: b2db uxtb r3, r3 800bcac: 707b strb r3, [r7, #1] data[2] = j_rx.size>>8; 800bcae: 4b14 ldr r3, [pc, #80] @ (800bd00 ) 800bcb0: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800bcb4: 0a1b lsrs r3, r3, #8 800bcb6: b29b uxth r3, r3 800bcb8: b2db uxtb r3, r3 800bcba: 70bb strb r3, [r7, #2] data[3] = j_rx.packets; 800bcbc: 4b10 ldr r3, [pc, #64] @ (800bd00 ) 800bcbe: f893 3106 ldrb.w r3, [r3, #262] @ 0x106 800bcc2: 70fb strb r3, [r7, #3] data[4] = 0xFF;//TODO 800bcc4: 23ff movs r3, #255 @ 0xff 800bcc6: 713b strb r3, [r7, #4] data[5] = rx.PGN; 800bcc8: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bccc: b2db uxtb r3, r3 800bcce: 717b strb r3, [r7, #5] data[6] = rx.PGN >> 8; 800bcd0: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bcd4: 0a1b lsrs r3, r3, #8 800bcd6: b2db uxtb r3, r3 800bcd8: 71bb strb r3, [r7, #6] data[7] = rx.PGN >> 16; 800bcda: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bcde: 0c1b lsrs r3, r3, #16 800bce0: b2db uxtb r3, r3 800bce2: 71fb strb r3, [r7, #7] J_SendPacket(0x00EC00, 7, 8, data); 800bce4: 463b mov r3, r7 800bce6: 2208 movs r2, #8 800bce8: 2107 movs r1, #7 800bcea: f44f 406c mov.w r0, #60416 @ 0xec00 800bcee: f7ff ff61 bl 800bbb4 } 800bcf2: bf00 nop 800bcf4: 3708 adds r7, #8 800bcf6: 46bd mov sp, r7 800bcf8: e8bd 4080 ldmia.w sp!, {r7, lr} 800bcfc: b004 add sp, #16 800bcfe: 4770 bx lr 800bd00: 20000860 .word 0x20000860 0800bd04 : void GBT_CAN_FilterInit(){ 800bd04: b580 push {r7, lr} 800bd06: b08a sub sp, #40 @ 0x28 800bd08: af00 add r7, sp, #0 CAN_FilterTypeDef sFilterConfig; sFilterConfig.FilterBank = 0; 800bd0a: 2300 movs r3, #0 800bd0c: 617b str r3, [r7, #20] sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; 800bd0e: 2300 movs r3, #0 800bd10: 61bb str r3, [r7, #24] sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; 800bd12: 2301 movs r3, #1 800bd14: 61fb str r3, [r7, #28] sFilterConfig.FilterIdHigh = 0x0000; 800bd16: 2300 movs r3, #0 800bd18: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = 0x0000; 800bd1a: 2300 movs r3, #0 800bd1c: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 800bd1e: 2300 movs r3, #0 800bd20: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = 0x0000; 800bd22: 2300 movs r3, #0 800bd24: 60fb str r3, [r7, #12] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0; 800bd26: 2300 movs r3, #0 800bd28: 613b str r3, [r7, #16] sFilterConfig.FilterActivation = ENABLE; 800bd2a: 2301 movs r3, #1 800bd2c: 623b str r3, [r7, #32] //sFilterConfig.SlaveStartFilterBank = 14; if(HAL_CAN_ConfigFilter(&hcan1, &sFilterConfig) != HAL_OK) 800bd2e: 463b mov r3, r7 800bd30: 4619 mov r1, r3 800bd32: 4806 ldr r0, [pc, #24] @ (800bd4c ) 800bd34: f003 fb7c bl 800f430 800bd38: 4603 mov r3, r0 800bd3a: 2b00 cmp r3, #0 800bd3c: d001 beq.n 800bd42 { Error_Handler(); 800bd3e: f000 fad3 bl 800c2e8 } } 800bd42: bf00 nop 800bd44: 3728 adds r7, #40 @ 0x28 800bd46: 46bd mov sp, r7 800bd48: bd80 pop {r7, pc} 800bd4a: bf00 nop 800bd4c: 20000294 .word 0x20000294 0800bd50 : .retry_count = 0, .error_tick = 0 }; void GBT_ForceLock(uint8_t state){ 800bd50: b480 push {r7} 800bd52: b083 sub sp, #12 800bd54: af00 add r7, sp, #0 800bd56: 4603 mov r3, r0 800bd58: 71fb strb r3, [r7, #7] // Устанавливаем флаг для выполнения действия GBT_LockState.action_requested = state ? 1 : 0; 800bd5a: 79fb ldrb r3, [r7, #7] 800bd5c: 2b00 cmp r3, #0 800bd5e: bf14 ite ne 800bd60: 2301 movne r3, #1 800bd62: 2300 moveq r3, #0 800bd64: b2db uxtb r3, r3 800bd66: 461a mov r2, r3 800bd68: 4b04 ldr r3, [pc, #16] @ (800bd7c ) 800bd6a: 709a strb r2, [r3, #2] GBT_LockState.retry_count = 0; 800bd6c: 4b03 ldr r3, [pc, #12] @ (800bd7c ) 800bd6e: 2200 movs r2, #0 800bd70: 721a strb r2, [r3, #8] } 800bd72: bf00 nop 800bd74: 370c adds r7, #12 800bd76: 46bd mov sp, r7 800bd78: bc80 pop {r7} 800bd7a: 4770 bx lr 800bd7c: 20000008 .word 0x20000008 0800bd80 : uint8_t GBT_LockGetState(){ 800bd80: b580 push {r7, lr} 800bd82: af00 add r7, sp, #0 //1 = locked //0 = unlocked if(LOCK_POLARITY){ 800bd84: 4b0a ldr r3, [pc, #40] @ (800bdb0 ) 800bd86: 781b ldrb r3, [r3, #0] 800bd88: 2b00 cmp r3, #0 800bd8a: d005 beq.n 800bd98 return HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 800bd8c: 2180 movs r1, #128 @ 0x80 800bd8e: 4809 ldr r0, [pc, #36] @ (800bdb4 ) 800bd90: f004 fd0e bl 80107b0 800bd94: 4603 mov r3, r0 800bd96: e009 b.n 800bdac }else{ return !HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 800bd98: 2180 movs r1, #128 @ 0x80 800bd9a: 4806 ldr r0, [pc, #24] @ (800bdb4 ) 800bd9c: f004 fd08 bl 80107b0 800bda0: 4603 mov r3, r0 800bda2: 2b00 cmp r3, #0 800bda4: bf0c ite eq 800bda6: 2301 moveq r3, #1 800bda8: 2300 movne r3, #0 800bdaa: b2db uxtb r3, r3 } } 800bdac: 4618 mov r0, r3 800bdae: bd80 pop {r7, pc} 800bdb0: 20000004 .word 0x20000004 800bdb4: 40011800 .word 0x40011800 0800bdb8 : void GBT_Lock(uint8_t state){ 800bdb8: b480 push {r7} 800bdba: b083 sub sp, #12 800bdbc: af00 add r7, sp, #0 800bdbe: 4603 mov r3, r0 800bdc0: 71fb strb r3, [r7, #7] GBT_LockState.demand = state; 800bdc2: 4a04 ldr r2, [pc, #16] @ (800bdd4 ) 800bdc4: 79fb ldrb r3, [r7, #7] 800bdc6: 7013 strb r3, [r2, #0] } 800bdc8: bf00 nop 800bdca: 370c adds r7, #12 800bdcc: 46bd mov sp, r7 800bdce: bc80 pop {r7} 800bdd0: 4770 bx lr 800bdd2: bf00 nop 800bdd4: 20000008 .word 0x20000008 0800bdd8 : tick = HAL_GetTick(); HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, GBT_LockState.demand ? 1 : 0); } void GBT_ManageLockMotor(){ 800bdd8: b580 push {r7, lr} 800bdda: b082 sub sp, #8 800bddc: af00 add r7, sp, #0 static const uint8_t MAX_RETRIES = 5; uint32_t current_tick = HAL_GetTick(); 800bdde: f002 fcf7 bl 800e7d0 800bde2: 6078 str r0, [r7, #4] // Проверяем таймаут сброса ошибки (до проверки error, чтобы можно было сбросить) GBT_ResetErrorTimeout(); 800bde4: f000 f904 bl 800bff0 if (GBT_LockState.error) { 800bde8: 4b72 ldr r3, [pc, #456] @ (800bfb4 ) 800bdea: 785b ldrb r3, [r3, #1] 800bdec: 2b00 cmp r3, #0 800bdee: f040 80dd bne.w 800bfac return; } // Проверяем, нужно ли выполнить действие bool lock_is_open = GBT_LockGetState() == 0; 800bdf2: f7ff ffc5 bl 800bd80 800bdf6: 4603 mov r3, r0 800bdf8: 2b00 cmp r3, #0 800bdfa: bf0c ite eq 800bdfc: 2301 moveq r3, #1 800bdfe: 2300 movne r3, #0 800be00: 70fb strb r3, [r7, #3] bool lock_should_be_open = GBT_LockState.demand == 0; 800be02: 4b6c ldr r3, [pc, #432] @ (800bfb4 ) 800be04: 781b ldrb r3, [r3, #0] 800be06: 2b00 cmp r3, #0 800be08: bf0c ite eq 800be0a: 2301 moveq r3, #1 800be0c: 2300 movne r3, #0 800be0e: 70bb strb r3, [r7, #2] // Если есть запрошенное действие или состояние не соответствует требуемому if (GBT_LockState.action_requested != 255 || (lock_is_open != lock_should_be_open)) { 800be10: 4b68 ldr r3, [pc, #416] @ (800bfb4 ) 800be12: 789b ldrb r3, [r3, #2] 800be14: 2bff cmp r3, #255 @ 0xff 800be16: d104 bne.n 800be22 800be18: 78fa ldrb r2, [r7, #3] 800be1a: 78bb ldrb r3, [r7, #2] 800be1c: 429a cmp r2, r3 800be1e: f000 80ad beq.w 800bf7c // Если действие еще не запрошено, запрашиваем его if (GBT_LockState.action_requested == 255) { 800be22: 4b64 ldr r3, [pc, #400] @ (800bfb4 ) 800be24: 789b ldrb r3, [r3, #2] 800be26: 2bff cmp r3, #255 @ 0xff 800be28: d109 bne.n 800be3e GBT_LockState.action_requested = lock_should_be_open ? 0 : 1; 800be2a: 78bb ldrb r3, [r7, #2] 800be2c: f083 0301 eor.w r3, r3, #1 800be30: b2db uxtb r3, r3 800be32: 461a mov r2, r3 800be34: 4b5f ldr r3, [pc, #380] @ (800bfb4 ) 800be36: 709a strb r2, [r3, #2] GBT_LockState.retry_count = 0; 800be38: 4b5e ldr r3, [pc, #376] @ (800bfb4 ) 800be3a: 2200 movs r2, #0 800be3c: 721a strb r2, [r3, #8] } // Управление мотором через машину состояний switch (GBT_LockState.motor_state) { 800be3e: 4b5d ldr r3, [pc, #372] @ (800bfb4 ) 800be40: 78db ldrb r3, [r3, #3] 800be42: 2b02 cmp r3, #2 800be44: d04a beq.n 800bedc 800be46: 2b02 cmp r3, #2 800be48: f300 80b1 bgt.w 800bfae 800be4c: 2b00 cmp r3, #0 800be4e: d002 beq.n 800be56 800be50: 2b01 cmp r3, #1 800be52: d02a beq.n 800beaa 800be54: e0ab b.n 800bfae case 0: // idle - мотор выключен // Определяем, какой пин нужно включить if (LOCK_MOTOR_POLARITY) { 800be56: 4b58 ldr r3, [pc, #352] @ (800bfb8 ) 800be58: 781b ldrb r3, [r3, #0] 800be5a: 2b00 cmp r3, #0 800be5c: d00f beq.n 800be7e if (GBT_LockState.action_requested == 1) { // LOCK 800be5e: 4b55 ldr r3, [pc, #340] @ (800bfb4 ) 800be60: 789b ldrb r3, [r3, #2] 800be62: 2b01 cmp r3, #1 800be64: d105 bne.n 800be72 HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1); 800be66: 2201 movs r2, #1 800be68: 2120 movs r1, #32 800be6a: 4854 ldr r0, [pc, #336] @ (800bfbc ) 800be6c: f004 fcb7 bl 80107de 800be70: e014 b.n 800be9c } else { // UNLOCK HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1); 800be72: 2201 movs r2, #1 800be74: 2110 movs r1, #16 800be76: 4851 ldr r0, [pc, #324] @ (800bfbc ) 800be78: f004 fcb1 bl 80107de 800be7c: e00e b.n 800be9c } } else { if (GBT_LockState.action_requested == 1) { // LOCK 800be7e: 4b4d ldr r3, [pc, #308] @ (800bfb4 ) 800be80: 789b ldrb r3, [r3, #2] 800be82: 2b01 cmp r3, #1 800be84: d105 bne.n 800be92 HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1); 800be86: 2201 movs r2, #1 800be88: 2110 movs r1, #16 800be8a: 484c ldr r0, [pc, #304] @ (800bfbc ) 800be8c: f004 fca7 bl 80107de 800be90: e004 b.n 800be9c } else { // UNLOCK HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1); 800be92: 2201 movs r2, #1 800be94: 2120 movs r1, #32 800be96: 4849 ldr r0, [pc, #292] @ (800bfbc ) 800be98: f004 fca1 bl 80107de } } GBT_LockState.motor_state = 1; // motor_on 800be9c: 4b45 ldr r3, [pc, #276] @ (800bfb4 ) 800be9e: 2201 movs r2, #1 800bea0: 70da strb r2, [r3, #3] GBT_LockState.last_action_time = current_tick; 800bea2: 4a44 ldr r2, [pc, #272] @ (800bfb4 ) 800bea4: 687b ldr r3, [r7, #4] 800bea6: 6053 str r3, [r2, #4] break; 800bea8: e067 b.n 800bf7a case 1: // motor_on - мотор включен, ждем LOCK_DELAY if (current_tick - GBT_LockState.last_action_time >= LOCK_DELAY) { 800beaa: 4b42 ldr r3, [pc, #264] @ (800bfb4 ) 800beac: 685b ldr r3, [r3, #4] 800beae: 687a ldr r2, [r7, #4] 800beb0: 1ad3 subs r3, r2, r3 800beb2: 4a43 ldr r2, [pc, #268] @ (800bfc0 ) 800beb4: 8812 ldrh r2, [r2, #0] 800beb6: 4293 cmp r3, r2 800beb8: d35c bcc.n 800bf74 // Выключаем оба пина HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0); 800beba: 2200 movs r2, #0 800bebc: 2110 movs r1, #16 800bebe: 483f ldr r0, [pc, #252] @ (800bfbc ) 800bec0: f004 fc8d bl 80107de HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0); 800bec4: 2200 movs r2, #0 800bec6: 2120 movs r1, #32 800bec8: 483c ldr r0, [pc, #240] @ (800bfbc ) 800beca: f004 fc88 bl 80107de GBT_LockState.motor_state = 2; // waiting_off 800bece: 4b39 ldr r3, [pc, #228] @ (800bfb4 ) 800bed0: 2202 movs r2, #2 800bed2: 70da strb r2, [r3, #3] GBT_LockState.last_action_time = current_tick; 800bed4: 4a37 ldr r2, [pc, #220] @ (800bfb4 ) 800bed6: 687b ldr r3, [r7, #4] 800bed8: 6053 str r3, [r2, #4] } break; 800beda: e04b b.n 800bf74 case 2: // waiting_off - ждем немного перед проверкой состояния // Небольшая задержка перед проверкой состояния (например, 50мс) if (current_tick - GBT_LockState.last_action_time >= 50) { 800bedc: 4b35 ldr r3, [pc, #212] @ (800bfb4 ) 800bede: 685b ldr r3, [r3, #4] 800bee0: 687a ldr r2, [r7, #4] 800bee2: 1ad3 subs r3, r2, r3 800bee4: 2b31 cmp r3, #49 @ 0x31 800bee6: d947 bls.n 800bf78 // Проверяем, достигнуто ли требуемое состояние lock_is_open = GBT_LockGetState() == 0; 800bee8: f7ff ff4a bl 800bd80 800beec: 4603 mov r3, r0 800beee: 2b00 cmp r3, #0 800bef0: bf0c ite eq 800bef2: 2301 moveq r3, #1 800bef4: 2300 movne r3, #0 800bef6: 70fb strb r3, [r7, #3] bool action_success = (lock_is_open == (GBT_LockState.action_requested == 0)); 800bef8: 78fb ldrb r3, [r7, #3] 800befa: 4a2e ldr r2, [pc, #184] @ (800bfb4 ) 800befc: 7892 ldrb r2, [r2, #2] 800befe: 2a00 cmp r2, #0 800bf00: bf0c ite eq 800bf02: 2201 moveq r2, #1 800bf04: 2200 movne r2, #0 800bf06: b2d2 uxtb r2, r2 800bf08: 4293 cmp r3, r2 800bf0a: bf0c ite eq 800bf0c: 2301 moveq r3, #1 800bf0e: 2300 movne r3, #0 800bf10: 707b strb r3, [r7, #1] if (action_success) { 800bf12: 787b ldrb r3, [r7, #1] 800bf14: 2b00 cmp r3, #0 800bf16: d009 beq.n 800bf2c // Действие выполнено успешно GBT_LockState.action_requested = 255; // сбрасываем флаг 800bf18: 4b26 ldr r3, [pc, #152] @ (800bfb4 ) 800bf1a: 22ff movs r2, #255 @ 0xff 800bf1c: 709a strb r2, [r3, #2] GBT_LockState.motor_state = 0; // idle 800bf1e: 4b25 ldr r3, [pc, #148] @ (800bfb4 ) 800bf20: 2200 movs r2, #0 800bf22: 70da strb r2, [r3, #3] GBT_LockState.retry_count = 0; 800bf24: 4b23 ldr r3, [pc, #140] @ (800bfb4 ) 800bf26: 2200 movs r2, #0 800bf28: 721a strb r2, [r3, #8] // Повторяем попытку GBT_LockState.motor_state = 0; // возвращаемся к началу } } } break; 800bf2a: e025 b.n 800bf78 GBT_LockState.retry_count++; 800bf2c: 4b21 ldr r3, [pc, #132] @ (800bfb4 ) 800bf2e: 7a1b ldrb r3, [r3, #8] 800bf30: 3301 adds r3, #1 800bf32: b2da uxtb r2, r3 800bf34: 4b1f ldr r3, [pc, #124] @ (800bfb4 ) 800bf36: 721a strb r2, [r3, #8] if (GBT_LockState.retry_count >= MAX_RETRIES) { 800bf38: 4b1e ldr r3, [pc, #120] @ (800bfb4 ) 800bf3a: 7a1a ldrb r2, [r3, #8] 800bf3c: 4b21 ldr r3, [pc, #132] @ (800bfc4 ) 800bf3e: 781b ldrb r3, [r3, #0] 800bf40: 429a cmp r2, r3 800bf42: d313 bcc.n 800bf6c GBT_LockState.error = 1; 800bf44: 4b1b ldr r3, [pc, #108] @ (800bfb4 ) 800bf46: 2201 movs r2, #1 800bf48: 705a strb r2, [r3, #1] GBT_LockState.error_tick = current_tick; // сохраняем время установки ошибки 800bf4a: 4a1a ldr r2, [pc, #104] @ (800bfb4 ) 800bf4c: 687b ldr r3, [r7, #4] 800bf4e: 60d3 str r3, [r2, #12] GBT_LockState.action_requested = 0; // пытаемся разблокировать 800bf50: 4b18 ldr r3, [pc, #96] @ (800bfb4 ) 800bf52: 2200 movs r2, #0 800bf54: 709a strb r2, [r3, #2] GBT_LockState.motor_state = 0; 800bf56: 4b17 ldr r3, [pc, #92] @ (800bfb4 ) 800bf58: 2200 movs r2, #0 800bf5a: 70da strb r2, [r3, #3] GBT_LockState.retry_count = 0; 800bf5c: 4b15 ldr r3, [pc, #84] @ (800bfb4 ) 800bf5e: 2200 movs r2, #0 800bf60: 721a strb r2, [r3, #8] log_printf(LOG_ERR, "Lock error\n"); 800bf62: 4919 ldr r1, [pc, #100] @ (800bfc8 ) 800bf64: 2004 movs r0, #4 800bf66: f7ff fa7d bl 800b464 break; 800bf6a: e005 b.n 800bf78 GBT_LockState.motor_state = 0; // возвращаемся к началу 800bf6c: 4b11 ldr r3, [pc, #68] @ (800bfb4 ) 800bf6e: 2200 movs r2, #0 800bf70: 70da strb r2, [r3, #3] break; 800bf72: e001 b.n 800bf78 break; 800bf74: bf00 nop 800bf76: e01a b.n 800bfae break; 800bf78: bf00 nop switch (GBT_LockState.motor_state) { 800bf7a: e018 b.n 800bfae } } else { // Состояние соответствует требуемому, сбрасываем флаги if (GBT_LockState.motor_state != 0) { 800bf7c: 4b0d ldr r3, [pc, #52] @ (800bfb4 ) 800bf7e: 78db ldrb r3, [r3, #3] 800bf80: 2b00 cmp r3, #0 800bf82: d00c beq.n 800bf9e HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0); 800bf84: 2200 movs r2, #0 800bf86: 2110 movs r1, #16 800bf88: 480c ldr r0, [pc, #48] @ (800bfbc ) 800bf8a: f004 fc28 bl 80107de HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0); 800bf8e: 2200 movs r2, #0 800bf90: 2120 movs r1, #32 800bf92: 480a ldr r0, [pc, #40] @ (800bfbc ) 800bf94: f004 fc23 bl 80107de GBT_LockState.motor_state = 0; 800bf98: 4b06 ldr r3, [pc, #24] @ (800bfb4 ) 800bf9a: 2200 movs r2, #0 800bf9c: 70da strb r2, [r3, #3] } GBT_LockState.action_requested = 255; 800bf9e: 4b05 ldr r3, [pc, #20] @ (800bfb4 ) 800bfa0: 22ff movs r2, #255 @ 0xff 800bfa2: 709a strb r2, [r3, #2] GBT_LockState.retry_count = 0; 800bfa4: 4b03 ldr r3, [pc, #12] @ (800bfb4 ) 800bfa6: 2200 movs r2, #0 800bfa8: 721a strb r2, [r3, #8] 800bfaa: e000 b.n 800bfae return; 800bfac: bf00 nop } } 800bfae: 3708 adds r7, #8 800bfb0: 46bd mov sp, r7 800bfb2: bd80 pop {r7, pc} 800bfb4: 20000008 .word 0x20000008 800bfb8: 20000005 .word 0x20000005 800bfbc: 40011000 .word 0x40011000 800bfc0: 20000006 .word 0x20000006 800bfc4: 08016bc7 .word 0x08016bc7 800bfc8: 08016ad4 .word 0x08016ad4 0800bfcc : void GBT_LockResetError(){ 800bfcc: b580 push {r7, lr} 800bfce: af00 add r7, sp, #0 GBT_LockState.error = 0; 800bfd0: 4b05 ldr r3, [pc, #20] @ (800bfe8 ) 800bfd2: 2200 movs r2, #0 800bfd4: 705a strb r2, [r3, #1] GBT_LockState.error_tick = 0; 800bfd6: 4b04 ldr r3, [pc, #16] @ (800bfe8 ) 800bfd8: 2200 movs r2, #0 800bfda: 60da str r2, [r3, #12] log_printf(LOG_INFO, "Lock error reset\n"); 800bfdc: 4903 ldr r1, [pc, #12] @ (800bfec ) 800bfde: 2007 movs r0, #7 800bfe0: f7ff fa40 bl 800b464 } 800bfe4: bf00 nop 800bfe6: bd80 pop {r7, pc} 800bfe8: 20000008 .word 0x20000008 800bfec: 08016ae0 .word 0x08016ae0 0800bff0 : void GBT_ResetErrorTimeout(){ 800bff0: b580 push {r7, lr} 800bff2: af00 add r7, sp, #0 static const uint32_t ERROR_TIMEOUT_MS = 300000; // 5 минут if (GBT_LockState.error && GBT_LockState.error_tick != 0) { 800bff4: 4b0a ldr r3, [pc, #40] @ (800c020 ) 800bff6: 785b ldrb r3, [r3, #1] 800bff8: 2b00 cmp r3, #0 800bffa: d00f beq.n 800c01c 800bffc: 4b08 ldr r3, [pc, #32] @ (800c020 ) 800bffe: 68db ldr r3, [r3, #12] 800c000: 2b00 cmp r3, #0 800c002: d00b beq.n 800c01c if ((HAL_GetTick()-GBT_LockState.error_tick) >= ERROR_TIMEOUT_MS) { 800c004: f002 fbe4 bl 800e7d0 800c008: 4602 mov r2, r0 800c00a: 4b05 ldr r3, [pc, #20] @ (800c020 ) 800c00c: 68db ldr r3, [r3, #12] 800c00e: 1ad2 subs r2, r2, r3 800c010: 4b04 ldr r3, [pc, #16] @ (800c024 ) 800c012: 681b ldr r3, [r3, #0] 800c014: 429a cmp r2, r3 800c016: d301 bcc.n 800c01c // Прошло 5 минут, сбрасываем ошибку GBT_LockResetError(); 800c018: f7ff ffd8 bl 800bfcc } } } 800c01c: bf00 nop 800c01e: bd80 pop {r7, pc} 800c020: 20000008 .word 0x20000008 800c024: 08016bc8 .word 0x08016bc8 0800c028 : * bootloader before starting this program. Unfortunately, function * SystemInit() overwrites this change again. * @return none. */ static void VectorBase_Config(void) { 800c028: b480 push {r7} 800c02a: af00 add r7, sp, #0 * c-startup code. */ extern const unsigned long g_pfnVectors[]; /* Remap the vector table to where the vector table is located for this program. */ SCB->VTOR = (unsigned long)&g_pfnVectors[0]; 800c02c: 4b03 ldr r3, [pc, #12] @ (800c03c ) 800c02e: 4a04 ldr r2, [pc, #16] @ (800c040 ) 800c030: 609a str r2, [r3, #8] } 800c032: bf00 nop 800c034: 46bd mov sp, r7 800c036: bc80 pop {r7} 800c038: 4770 bx lr 800c03a: bf00 nop 800c03c: e000ed00 .word 0xe000ed00 800c040: 08008000 .word 0x08008000 0800c044 : uint8_t ED_TraceWarning(uint8_t flag, uint8_t id){ 800c044: b480 push {r7} 800c046: b085 sub sp, #20 800c048: af00 add r7, sp, #0 800c04a: 4603 mov r3, r0 800c04c: 460a mov r2, r1 800c04e: 71fb strb r3, [r7, #7] 800c050: 4613 mov r3, r2 800c052: 71bb strb r3, [r7, #6] static uint8_t memory[32]; if(id > 31) return 0; 800c054: 79bb ldrb r3, [r7, #6] 800c056: 2b1f cmp r3, #31 800c058: d901 bls.n 800c05e 800c05a: 2300 movs r3, #0 800c05c: e00e b.n 800c07c uint8_t result = 0; 800c05e: 2300 movs r3, #0 800c060: 73fb strb r3, [r7, #15] if(memory[id] != flag){ 800c062: 79bb ldrb r3, [r7, #6] 800c064: 4a08 ldr r2, [pc, #32] @ (800c088 ) 800c066: 5cd3 ldrb r3, [r2, r3] 800c068: 79fa ldrb r2, [r7, #7] 800c06a: 429a cmp r2, r3 800c06c: d001 beq.n 800c072 result = 1; 800c06e: 2301 movs r3, #1 800c070: 73fb strb r3, [r7, #15] } memory[id] = flag; 800c072: 79bb ldrb r3, [r7, #6] 800c074: 4904 ldr r1, [pc, #16] @ (800c088 ) 800c076: 79fa ldrb r2, [r7, #7] 800c078: 54ca strb r2, [r1, r3] return result; 800c07a: 7bfb ldrb r3, [r7, #15] } 800c07c: 4618 mov r0, r3 800c07e: 3714 adds r7, #20 800c080: 46bd mov sp, r7 800c082: bc80 pop {r7} 800c084: 4770 bx lr 800c086: bf00 nop 800c088: 20000970 .word 0x20000970 0800c08c : void ED_Delay(uint32_t Delay) { 800c08c: b580 push {r7, lr} 800c08e: b084 sub sp, #16 800c090: af00 add r7, sp, #0 800c092: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 800c094: f002 fb9c bl 800e7d0 800c098: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800c09a: 687b ldr r3, [r7, #4] 800c09c: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800c09e: 68fb ldr r3, [r7, #12] 800c0a0: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800c0a4: d012 beq.n 800c0cc { wait += (uint32_t)(uwTickFreq); 800c0a6: 4b10 ldr r3, [pc, #64] @ (800c0e8 ) 800c0a8: 781b ldrb r3, [r3, #0] 800c0aa: 461a mov r2, r3 800c0ac: 68fb ldr r3, [r7, #12] 800c0ae: 4413 add r3, r2 800c0b0: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait){ 800c0b2: e00b b.n 800c0cc CONN_CC_ReadStateFiltered(); 800c0b4: f7fe fffa bl 800b0ac GBT_ManageLockMotor(); 800c0b8: f7ff fe8e bl 800bdd8 CONN_Task(); 800c0bc: f7fe fe3e bl 800ad3c GBT_ChargerTask(); 800c0c0: f7fd feb6 bl 8009e30 LED_Task(); 800c0c4: f000 fff4 bl 800d0b0 SC_Task(); 800c0c8: f001 f900 bl 800d2cc while ((HAL_GetTick() - tickstart) < wait){ 800c0cc: f002 fb80 bl 800e7d0 800c0d0: 4602 mov r2, r0 800c0d2: 68bb ldr r3, [r7, #8] 800c0d4: 1ad3 subs r3, r2, r3 800c0d6: 68fa ldr r2, [r7, #12] 800c0d8: 429a cmp r2, r3 800c0da: d8eb bhi.n 800c0b4 // if(huart2.gState != HAL_UART_STATE_BUSY_TX) debug_buffer_send(); // TEST } } 800c0dc: bf00 nop 800c0de: bf00 nop 800c0e0: 3710 adds r7, #16 800c0e2: 46bd mov sp, r7 800c0e4: bd80 pop {r7, pc} 800c0e6: bf00 nop 800c0e8: 20000074 .word 0x20000074 0800c0ec : void StopButtonControl(){ 800c0ec: b580 push {r7, lr} 800c0ee: af00 add r7, sp, #0 //Charging do nothing if(!IN_ReadInput(IN_ESTOP)){ 800c0f0: 2003 movs r0, #3 800c0f2: f7fd fb6f bl 80097d4 800c0f6: 4603 mov r3, r0 800c0f8: 2b00 cmp r3, #0 800c0fa: d102 bne.n 800c102 CONN.connControl = CMD_STOP; 800c0fc: 4b02 ldr r3, [pc, #8] @ (800c108 ) 800c0fe: 2201 movs r2, #1 800c100: 701a strb r2, [r3, #0] } } 800c102: bf00 nop 800c104: bd80 pop {r7, pc} 800c106: bf00 nop 800c108: 200002e8 .word 0x200002e8 0800c10c
: /** * @brief The application entry point. * @retval int */ int main(void) { 800c10c: b580 push {r7, lr} 800c10e: b082 sub sp, #8 800c110: af02 add r7, sp, #8 /* USER CODE BEGIN 1 */ VectorBase_Config(); 800c112: f7ff ff89 bl 800c028 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 800c116: f002 fb03 bl 800e720 /* USER CODE BEGIN Init */ HAL_RCC_DeInit(); 800c11a: f004 fb85 bl 8010828 /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 800c11e: f000 f873 bl 800c208 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 800c122: f7ff faa5 bl 800b670 MX_ADC1_Init(); 800c126: f7fd fa4f bl 80095c8 MX_CAN1_Init(); 800c12a: f7fd fc99 bl 8009a60 MX_CAN2_Init(); 800c12e: f7fd fccd bl 8009acc MX_RTC_Init(); 800c132: f001 f85b bl 800d1ec MX_TIM4_Init(); 800c136: f001 fff1 bl 800e11c MX_USART2_UART_Init(); 800c13a: f002 f931 bl 800e3a0 MX_CRC_Init(); 800c13e: f7ff f879 bl 800b234 MX_UART5_Init(); 800c142: f002 f8d9 bl 800e2f8 MX_USART1_UART_Init(); 800c146: f002 f901 bl 800e34c MX_USART3_UART_Init(); 800c14a: f002 f953 bl 800e3f4 /* USER CODE BEGIN 2 */ Init_Peripheral(); 800c14e: f7fd fb93 bl 8009878 LED_Init(); 800c152: f000 ff8d bl 800d070 HAL_Delay(300); 800c156: f44f 7096 mov.w r0, #300 @ 0x12c 800c15a: f002 fb43 bl 800e7e4 GBT_Init(); 800c15e: f7fd fe29 bl 8009db4 SC_Init(); 800c162: f001 f8a7 bl 800d2b4 log_printf(LOG_INFO, "GBT Charger v%d.%d\n", GBT_CH_VER_MAJOR, GBT_CH_VER_MINOR); 800c166: 2300 movs r3, #0 800c168: 2201 movs r2, #1 800c16a: 4922 ldr r1, [pc, #136] @ (800c1f4 ) 800c16c: 2007 movs r0, #7 800c16e: f7ff f979 bl 800b464 ReadVersion(); 800c172: f001 f87b bl 800d26c log_printf(LOG_INFO, "Serial number: %d\n", infoPacket.serialNumber); 800c176: 4b20 ldr r3, [pc, #128] @ (800c1f8 ) 800c178: 881b ldrh r3, [r3, #0] 800c17a: b29b uxth r3, r3 800c17c: 461a mov r2, r3 800c17e: 491f ldr r1, [pc, #124] @ (800c1fc ) 800c180: 2007 movs r0, #7 800c182: f7ff f96f bl 800b464 log_printf(LOG_INFO, "Board revision: %d\n", infoPacket.boardVersion); 800c186: 4b1c ldr r3, [pc, #112] @ (800c1f8 ) 800c188: 789b ldrb r3, [r3, #2] 800c18a: 461a mov r2, r3 800c18c: 491c ldr r1, [pc, #112] @ (800c200 ) 800c18e: 2007 movs r0, #7 800c190: f7ff f968 bl 800b464 log_printf(LOG_INFO, "FW version: %d.%d.%d\n", infoPacket.fw_version_major, infoPacket.fw_version_minor, infoPacket.fw_version_patch); 800c194: 4b18 ldr r3, [pc, #96] @ (800c1f8 ) 800c196: 889b ldrh r3, [r3, #4] 800c198: b29b uxth r3, r3 800c19a: 461a mov r2, r3 800c19c: 4b16 ldr r3, [pc, #88] @ (800c1f8 ) 800c19e: 88db ldrh r3, [r3, #6] 800c1a0: b29b uxth r3, r3 800c1a2: 4619 mov r1, r3 800c1a4: 4b14 ldr r3, [pc, #80] @ (800c1f8 ) 800c1a6: 891b ldrh r3, [r3, #8] 800c1a8: b29b uxth r3, r3 800c1aa: 9300 str r3, [sp, #0] 800c1ac: 460b mov r3, r1 800c1ae: 4915 ldr r1, [pc, #84] @ (800c204 ) 800c1b0: 2007 movs r0, #7 800c1b2: f7ff f957 bl 800b464 GBT_SetConfig(); 800c1b6: f7fd fe1b bl 8009df0 GBT_CAN_ReInit(); 800c1ba: f7ff fce7 bl 800bb8c PSU_Init(); 800c1be: f000 fa7d bl 800c6bc CONN_Init(); 800c1c2: f7fd fd97 bl 8009cf4 /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ PSU_ReadWrite(); 800c1c6: f000 fb87 bl 800c8d8 PSU_Task(); 800c1ca: f000 fc23 bl 800ca14 ED_Delay(10); 800c1ce: 200a movs r0, #10 800c1d0: f7ff ff5c bl 800c08c METER_CalculateEnergy(); 800c1d4: f000 f88e bl 800c2f4 CONN_Loop(); 800c1d8: f7fd fda2 bl 8009d20 LED_Write(); 800c1dc: f000 fe0e bl 800cdfc ED_Delay(10); 800c1e0: 200a movs r0, #10 800c1e2: f7ff ff53 bl 800c08c StopButtonControl(); 800c1e6: f7ff ff81 bl 800c0ec ED_Delay(50); 800c1ea: 2032 movs r0, #50 @ 0x32 800c1ec: f7ff ff4e bl 800c08c { 800c1f0: bf00 nop 800c1f2: e7e8 b.n 800c1c6 800c1f4: 08016af4 .word 0x08016af4 800c1f8: 20000ce8 .word 0x20000ce8 800c1fc: 08016b08 .word 0x08016b08 800c200: 08016b1c .word 0x08016b1c 800c204: 08016b30 .word 0x08016b30 0800c208 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 800c208: b580 push {r7, lr} 800c20a: b09c sub sp, #112 @ 0x70 800c20c: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 800c20e: f107 0338 add.w r3, r7, #56 @ 0x38 800c212: 2238 movs r2, #56 @ 0x38 800c214: 2100 movs r1, #0 800c216: 4618 mov r0, r3 800c218: f007 ff3a bl 8014090 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800c21c: f107 0324 add.w r3, r7, #36 @ 0x24 800c220: 2200 movs r2, #0 800c222: 601a str r2, [r3, #0] 800c224: 605a str r2, [r3, #4] 800c226: 609a str r2, [r3, #8] 800c228: 60da str r2, [r3, #12] 800c22a: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 800c22c: 1d3b adds r3, r7, #4 800c22e: 2220 movs r2, #32 800c230: 2100 movs r1, #0 800c232: 4618 mov r0, r3 800c234: f007 ff2c bl 8014090 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; 800c238: 2305 movs r3, #5 800c23a: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 800c23c: f44f 3380 mov.w r3, #65536 @ 0x10000 800c240: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5; 800c242: 2304 movs r3, #4 800c244: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.LSEState = RCC_LSE_ON; 800c246: 2301 movs r3, #1 800c248: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 800c24a: 2301 movs r3, #1 800c24c: 64fb str r3, [r7, #76] @ 0x4c RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2; 800c24e: f44f 3380 mov.w r3, #65536 @ 0x10000 800c252: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 800c254: 2302 movs r3, #2 800c256: 65bb str r3, [r7, #88] @ 0x58 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 800c258: f44f 3380 mov.w r3, #65536 @ 0x10000 800c25c: 65fb str r3, [r7, #92] @ 0x5c RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 800c25e: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000 800c262: 663b str r3, [r7, #96] @ 0x60 RCC_OscInitStruct.PLL2.PLL2State = RCC_PLL2_ON; 800c264: 2302 movs r3, #2 800c266: 667b str r3, [r7, #100] @ 0x64 RCC_OscInitStruct.PLL2.PLL2MUL = RCC_PLL2_MUL8; 800c268: f44f 63c0 mov.w r3, #1536 @ 0x600 800c26c: 66bb str r3, [r7, #104] @ 0x68 RCC_OscInitStruct.PLL2.HSEPrediv2Value = RCC_HSE_PREDIV2_DIV5; 800c26e: 2340 movs r3, #64 @ 0x40 800c270: 66fb str r3, [r7, #108] @ 0x6c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800c272: f107 0338 add.w r3, r7, #56 @ 0x38 800c276: 4618 mov r0, r3 800c278: f004 fba6 bl 80109c8 800c27c: 4603 mov r3, r0 800c27e: 2b00 cmp r3, #0 800c280: d001 beq.n 800c286 { Error_Handler(); 800c282: f000 f831 bl 800c2e8 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800c286: 230f movs r3, #15 800c288: 627b str r3, [r7, #36] @ 0x24 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 800c28a: 2302 movs r3, #2 800c28c: 62bb str r3, [r7, #40] @ 0x28 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800c28e: 2300 movs r3, #0 800c290: 62fb str r3, [r7, #44] @ 0x2c RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 800c292: f44f 6380 mov.w r3, #1024 @ 0x400 800c296: 633b str r3, [r7, #48] @ 0x30 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800c298: 2300 movs r3, #0 800c29a: 637b str r3, [r7, #52] @ 0x34 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 800c29c: f107 0324 add.w r3, r7, #36 @ 0x24 800c2a0: 2102 movs r1, #2 800c2a2: 4618 mov r0, r3 800c2a4: f004 fea6 bl 8010ff4 800c2a8: 4603 mov r3, r0 800c2aa: 2b00 cmp r3, #0 800c2ac: d001 beq.n 800c2b2 { Error_Handler(); 800c2ae: f000 f81b bl 800c2e8 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC; 800c2b2: 2303 movs r3, #3 800c2b4: 607b str r3, [r7, #4] PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 800c2b6: f44f 7380 mov.w r3, #256 @ 0x100 800c2ba: 60bb str r3, [r7, #8] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 800c2bc: f44f 4300 mov.w r3, #32768 @ 0x8000 800c2c0: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 800c2c2: 1d3b adds r3, r7, #4 800c2c4: 4618 mov r0, r3 800c2c6: f005 f88b bl 80113e0 800c2ca: 4603 mov r3, r0 800c2cc: 2b00 cmp r3, #0 800c2ce: d001 beq.n 800c2d4 { Error_Handler(); 800c2d0: f000 f80a bl 800c2e8 } /** Configure the Systick interrupt time */ __HAL_RCC_PLLI2S_ENABLE(); 800c2d4: 4b03 ldr r3, [pc, #12] @ (800c2e4 ) 800c2d6: 2201 movs r2, #1 800c2d8: 601a str r2, [r3, #0] } 800c2da: bf00 nop 800c2dc: 3770 adds r7, #112 @ 0x70 800c2de: 46bd mov sp, r7 800c2e0: bd80 pop {r7, pc} 800c2e2: bf00 nop 800c2e4: 42420070 .word 0x42420070 0800c2e8 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 800c2e8: b480 push {r7} 800c2ea: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800c2ec: b672 cpsid i } 800c2ee: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 800c2f0: bf00 nop 800c2f2: e7fd b.n 800c2f0 0800c2f4 : METER_t METER; // Функция для расчета и накопления энергии c дробной частью без счетчиков void METER_CalculateEnergy() { 800c2f4: e92d 43b0 stmdb sp!, {r4, r5, r7, r8, r9, lr} 800c2f8: b084 sub sp, #16 800c2fa: af00 add r7, sp, #0 // Проверяем, что индекс находится в пределах массива METER.online = 0; 800c2fc: 4b2e ldr r3, [pc, #184] @ (800c3b8 ) 800c2fe: 2200 movs r2, #0 800c300: 711a strb r2, [r3, #4] if(CONN.connState == Charging){ 800c302: 4b2e ldr r3, [pc, #184] @ (800c3bc ) 800c304: 785b ldrb r3, [r3, #1] 800c306: 2b08 cmp r3, #8 800c308: d104 bne.n 800c314 METER.enable = 1; 800c30a: 4b2b ldr r3, [pc, #172] @ (800c3b8 ) 800c30c: 2201 movs r2, #1 800c30e: f883 2024 strb.w r2, [r3, #36] @ 0x24 800c312: e003 b.n 800c31c }else{ METER.enable = 0; 800c314: 4b28 ldr r3, [pc, #160] @ (800c3b8 ) 800c316: 2200 movs r2, #0 800c318: f883 2024 strb.w r2, [r3, #36] @ 0x24 } uint32_t currentTick = HAL_GetTick(); // Получаем текущее время в миллисекундах 800c31c: f002 fa58 bl 800e7d0 800c320: 60f8 str r0, [r7, #12] uint32_t elapsedTimeMs = currentTick - METER.lastTick; // Вычисляем время, прошедшее с последнего вызова в секундах 800c322: 4b25 ldr r3, [pc, #148] @ (800c3b8 ) 800c324: 689b ldr r3, [r3, #8] 800c326: 68fa ldr r2, [r7, #12] 800c328: 1ad3 subs r3, r2, r3 800c32a: 60bb str r3, [r7, #8] METER.lastTick = currentTick; // Обновляем время последнего вызова для текущего коннектора 800c32c: 4a22 ldr r2, [pc, #136] @ (800c3b8 ) 800c32e: 68fb ldr r3, [r7, #12] 800c330: 6093 str r3, [r2, #8] uint32_t energyWs = CONN.Power * elapsedTimeMs / 1000; // Рассчитываем энергию в ватт-секундах за прошедший промежуток времени 800c332: 4b22 ldr r3, [pc, #136] @ (800c3bc ) 800c334: f8d3 3003 ldr.w r3, [r3, #3] 800c338: 68ba ldr r2, [r7, #8] 800c33a: fb02 f303 mul.w r3, r2, r3 800c33e: 4a20 ldr r2, [pc, #128] @ (800c3c0 ) 800c340: fba2 2303 umull r2, r3, r2, r3 800c344: 099b lsrs r3, r3, #6 800c346: 607b str r3, [r7, #4] //Расчет энергии теперь идет всегда, смещение берем суммарное METER.EnergyPSU_Ws += energyWs; 800c348: 4b1b ldr r3, [pc, #108] @ (800c3b8 ) 800c34a: e9d3 2304 ldrd r2, r3, [r3, #16] 800c34e: 6879 ldr r1, [r7, #4] 800c350: 2000 movs r0, #0 800c352: 460c mov r4, r1 800c354: 4605 mov r5, r0 800c356: eb12 0804 adds.w r8, r2, r4 800c35a: eb43 0905 adc.w r9, r3, r5 800c35e: 4b16 ldr r3, [pc, #88] @ (800c3b8 ) 800c360: e9c3 8904 strd r8, r9, [r3, #16] // Абсолютное значение энергии разъема складывается из накопленной дробной части и значения со счетчиков METER.AbsoluteEnergy = (uint32_t)METER.EnergyPSU_Ws/3600; //переводим в Вт*час 800c364: 4b14 ldr r3, [pc, #80] @ (800c3b8 ) 800c366: e9d3 2304 ldrd r2, r3, [r3, #16] 800c36a: 4b16 ldr r3, [pc, #88] @ (800c3c4 ) 800c36c: fba3 2302 umull r2, r3, r3, r2 800c370: 0adb lsrs r3, r3, #11 800c372: 4a11 ldr r2, [pc, #68] @ (800c3b8 ) 800c374: 6193 str r3, [r2, #24] if(METER.enable) { 800c376: 4b10 ldr r3, [pc, #64] @ (800c3b8 ) 800c378: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800c37c: 2b00 cmp r3, #0 800c37e: d008 beq.n 800c392 //enabled state CONN.Energy = METER.AbsoluteEnergy - METER.EnergyOffset;//переводим в Вт*час 800c380: 4b0d ldr r3, [pc, #52] @ (800c3b8 ) 800c382: 699a ldr r2, [r3, #24] 800c384: 4b0c ldr r3, [pc, #48] @ (800c3b8 ) 800c386: 69db ldr r3, [r3, #28] 800c388: 1ad3 subs r3, r2, r3 800c38a: 4a0c ldr r2, [pc, #48] @ (800c3bc ) 800c38c: f8c2 3007 str.w r3, [r2, #7] METER.EnergyOffset = METER.AbsoluteEnergy; } } 800c390: e00c b.n 800c3ac CONN.Energy = 0; 800c392: 4b0a ldr r3, [pc, #40] @ (800c3bc ) 800c394: 2200 movs r2, #0 800c396: 71da strb r2, [r3, #7] 800c398: 2200 movs r2, #0 800c39a: 721a strb r2, [r3, #8] 800c39c: 2200 movs r2, #0 800c39e: 725a strb r2, [r3, #9] 800c3a0: 2200 movs r2, #0 800c3a2: 729a strb r2, [r3, #10] METER.EnergyOffset = METER.AbsoluteEnergy; 800c3a4: 4b04 ldr r3, [pc, #16] @ (800c3b8 ) 800c3a6: 699b ldr r3, [r3, #24] 800c3a8: 4a03 ldr r2, [pc, #12] @ (800c3b8 ) 800c3aa: 61d3 str r3, [r2, #28] } 800c3ac: bf00 nop 800c3ae: 3710 adds r7, #16 800c3b0: 46bd mov sp, r7 800c3b2: e8bd 83b0 ldmia.w sp!, {r4, r5, r7, r8, r9, pc} 800c3b6: bf00 nop 800c3b8: 20000990 .word 0x20000990 800c3bc: 200002e8 .word 0x200002e8 800c3c0: 10624dd3 .word 0x10624dd3 800c3c4: 91a2b3c5 .word 0x91a2b3c5 0800c3c8 : uint32_t can_lastpacket; extern CAN_HandleTypeDef hcan2; static void PSU_SwitchState(PSU_State_t state){ 800c3c8: b580 push {r7, lr} 800c3ca: b082 sub sp, #8 800c3cc: af00 add r7, sp, #0 800c3ce: 4603 mov r3, r0 800c3d0: 71fb strb r3, [r7, #7] PSU0.state = state; 800c3d2: 4a06 ldr r2, [pc, #24] @ (800c3ec ) 800c3d4: 79fb ldrb r3, [r7, #7] 800c3d6: 71d3 strb r3, [r2, #7] PSU0.statetick = HAL_GetTick(); 800c3d8: f002 f9fa bl 800e7d0 800c3dc: 4603 mov r3, r0 800c3de: 4a03 ldr r2, [pc, #12] @ (800c3ec ) 800c3e0: 6113 str r3, [r2, #16] } 800c3e2: bf00 nop 800c3e4: 3708 adds r7, #8 800c3e6: 46bd mov sp, r7 800c3e8: bd80 pop {r7, pc} 800c3ea: bf00 nop 800c3ec: 200009fc .word 0x200009fc 0800c3f0 : static uint32_t PSU_StateTime(void){ 800c3f0: b580 push {r7, lr} 800c3f2: af00 add r7, sp, #0 return HAL_GetTick() - PSU0.statetick; 800c3f4: f002 f9ec bl 800e7d0 800c3f8: 4602 mov r2, r0 800c3fa: 4b02 ldr r3, [pc, #8] @ (800c404 ) 800c3fc: 691b ldr r3, [r3, #16] 800c3fe: 1ad3 subs r3, r2, r3 } 800c400: 4618 mov r0, r3 800c402: bd80 pop {r7, pc} 800c404: 200009fc .word 0x200009fc 0800c408 : void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan){ 800c408: b580 push {r7, lr} 800c40a: b084 sub sp, #16 800c40c: af00 add r7, sp, #0 800c40e: 6078 str r0, [r7, #4] static CAN_RxHeaderTypeDef RxHeader; static uint8_t RxData[8] = {0,}; CanId_t CanId; if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO1, &RxHeader, RxData) == HAL_OK) 800c410: 4b88 ldr r3, [pc, #544] @ (800c634 ) 800c412: 4a89 ldr r2, [pc, #548] @ (800c638 ) 800c414: 2101 movs r1, #1 800c416: 6878 ldr r0, [r7, #4] 800c418: f003 fa7a bl 800f910 800c41c: 4603 mov r3, r0 800c41e: 2b00 cmp r3, #0 800c420: f040 8104 bne.w 800c62c { memcpy(&CanId, &RxHeader.ExtId, sizeof(CanId_t)); 800c424: 4b84 ldr r3, [pc, #528] @ (800c638 ) 800c426: 685b ldr r3, [r3, #4] 800c428: 60bb str r3, [r7, #8] /* Для DC30 поддерживается только один силовой модуль (source == 0) */ if(CanId.source != 0) return; 800c42a: 7a3b ldrb r3, [r7, #8] 800c42c: 2b00 cmp r3, #0 800c42e: f040 80fc bne.w 800c62a can_lastpacket = HAL_GetTick(); 800c432: f002 f9cd bl 800e7d0 800c436: 4603 mov r3, r0 800c438: 4a80 ldr r2, [pc, #512] @ (800c63c ) 800c43a: 6013 str r3, [r2, #0] if(CanId.command==0x02){ 800c43c: 7abb ldrb r3, [r7, #10] 800c43e: f003 033f and.w r3, r3, #63 @ 0x3f 800c442: b2db uxtb r3, r3 800c444: 2b02 cmp r3, #2 800c446: d105 bne.n 800c454 memcpy(&PSU_02, RxData, 8); 800c448: 4b7d ldr r3, [pc, #500] @ (800c640 ) 800c44a: 4a7a ldr r2, [pc, #488] @ (800c634 ) 800c44c: e892 0003 ldmia.w r2, {r0, r1} 800c450: e883 0003 stmia.w r3, {r0, r1} } if(CanId.command==0x04){ 800c454: 7abb ldrb r3, [r7, #10] 800c456: f003 033f and.w r3, r3, #63 @ 0x3f 800c45a: b2db uxtb r3, r3 800c45c: 2b04 cmp r3, #4 800c45e: d119 bne.n 800c494 memcpy(&PSU_04, RxData, 8); 800c460: 4b78 ldr r3, [pc, #480] @ (800c644 ) 800c462: 4a74 ldr r2, [pc, #464] @ (800c634 ) 800c464: e892 0003 ldmia.w r2, {r0, r1} 800c468: e883 0003 stmia.w r3, {r0, r1} PSU0.tempAmbient = PSU_04.moduleTemperature; 800c46c: 4b75 ldr r3, [pc, #468] @ (800c644 ) 800c46e: 791b ldrb r3, [r3, #4] 800c470: 461a mov r2, r3 800c472: 4b75 ldr r3, [pc, #468] @ (800c648 ) 800c474: 61da str r2, [r3, #28] PSU0.status0.raw = PSU_04.modularForm0; 800c476: 4b73 ldr r3, [pc, #460] @ (800c644 ) 800c478: 7a1a ldrb r2, [r3, #8] 800c47a: 4b73 ldr r3, [pc, #460] @ (800c648 ) 800c47c: f883 2020 strb.w r2, [r3, #32] PSU0.status1.raw = PSU_04.modularForm1; 800c480: 4b70 ldr r3, [pc, #448] @ (800c644 ) 800c482: 79da ldrb r2, [r3, #7] 800c484: 4b70 ldr r3, [pc, #448] @ (800c648 ) 800c486: f883 2021 strb.w r2, [r3, #33] @ 0x21 PSU0.status2.raw = PSU_04.modularForm2; 800c48a: 4b6e ldr r3, [pc, #440] @ (800c644 ) 800c48c: 799a ldrb r2, [r3, #6] 800c48e: 4b6e ldr r3, [pc, #440] @ (800c648 ) 800c490: f883 2022 strb.w r2, [r3, #34] @ 0x22 } if(CanId.command==0x06){ 800c494: 7abb ldrb r3, [r7, #10] 800c496: f003 033f and.w r3, r3, #63 @ 0x3f 800c49a: b2db uxtb r3, r3 800c49c: 2b06 cmp r3, #6 800c49e: d123 bne.n 800c4e8 memcpy(&PSU_06, RxData, 8); 800c4a0: 4b6a ldr r3, [pc, #424] @ (800c64c ) 800c4a2: 4a64 ldr r2, [pc, #400] @ (800c634 ) 800c4a4: e892 0003 ldmia.w r2, {r0, r1} 800c4a8: e883 0003 stmia.w r3, {r0, r1} PSU_06.VAB = PSU_06.VABLo+(PSU_06.VABHi<<8); 800c4ac: 4b67 ldr r3, [pc, #412] @ (800c64c ) 800c4ae: 785b ldrb r3, [r3, #1] 800c4b0: 461a mov r2, r3 800c4b2: 4b66 ldr r3, [pc, #408] @ (800c64c ) 800c4b4: 781b ldrb r3, [r3, #0] 800c4b6: 021b lsls r3, r3, #8 800c4b8: 4413 add r3, r2 800c4ba: 461a mov r2, r3 800c4bc: 4b63 ldr r3, [pc, #396] @ (800c64c ) 800c4be: 609a str r2, [r3, #8] PSU_06.VBC = PSU_06.VBCLo+(PSU_06.VBCHi<<8); 800c4c0: 4b62 ldr r3, [pc, #392] @ (800c64c ) 800c4c2: 78db ldrb r3, [r3, #3] 800c4c4: 461a mov r2, r3 800c4c6: 4b61 ldr r3, [pc, #388] @ (800c64c ) 800c4c8: 789b ldrb r3, [r3, #2] 800c4ca: 021b lsls r3, r3, #8 800c4cc: 4413 add r3, r2 800c4ce: 461a mov r2, r3 800c4d0: 4b5e ldr r3, [pc, #376] @ (800c64c ) 800c4d2: 60da str r2, [r3, #12] PSU_06.VCA = PSU_06.VCALo+(PSU_06.VCAHi<<8); 800c4d4: 4b5d ldr r3, [pc, #372] @ (800c64c ) 800c4d6: 795b ldrb r3, [r3, #5] 800c4d8: 461a mov r2, r3 800c4da: 4b5c ldr r3, [pc, #368] @ (800c64c ) 800c4dc: 791b ldrb r3, [r3, #4] 800c4de: 021b lsls r3, r3, #8 800c4e0: 4413 add r3, r2 800c4e2: 461a mov r2, r3 800c4e4: 4b59 ldr r3, [pc, #356] @ (800c64c ) 800c4e6: 611a str r2, [r3, #16] } if(CanId.command==0x08){ 800c4e8: 7abb ldrb r3, [r7, #10] 800c4ea: f003 033f and.w r3, r3, #63 @ 0x3f 800c4ee: b2db uxtb r3, r3 800c4f0: 2b08 cmp r3, #8 800c4f2: d105 bne.n 800c500 memcpy(&PSU_08, RxData, 8); 800c4f4: 4b56 ldr r3, [pc, #344] @ (800c650 ) 800c4f6: 4a4f ldr r2, [pc, #316] @ (800c634 ) 800c4f8: e892 0003 ldmia.w r2, {r0, r1} 800c4fc: e883 0003 stmia.w r3, {r0, r1} } if(CanId.command==0x09){ 800c500: 7abb ldrb r3, [r7, #10] 800c502: f003 033f and.w r3, r3, #63 @ 0x3f 800c506: b2db uxtb r3, r3 800c508: 2b09 cmp r3, #9 800c50a: f040 808f bne.w 800c62c memcpy(&PSU_09, RxData, 8); 800c50e: 4b51 ldr r3, [pc, #324] @ (800c654 ) 800c510: 4a48 ldr r2, [pc, #288] @ (800c634 ) 800c512: e892 0003 ldmia.w r2, {r0, r1} 800c516: e883 0003 stmia.w r3, {r0, r1} PSU_09.moduleNCurrent = PSU_09.moduleNCurrent_[3]; 800c51a: 4b4e ldr r3, [pc, #312] @ (800c654 ) 800c51c: 79db ldrb r3, [r3, #7] 800c51e: 461a mov r2, r3 800c520: 4b4c ldr r3, [pc, #304] @ (800c654 ) 800c522: 60da str r2, [r3, #12] PSU_09.moduleNCurrent |= PSU_09.moduleNCurrent_[2]<<8; 800c524: 4b4b ldr r3, [pc, #300] @ (800c654 ) 800c526: 68da ldr r2, [r3, #12] 800c528: 4b4a ldr r3, [pc, #296] @ (800c654 ) 800c52a: 799b ldrb r3, [r3, #6] 800c52c: 021b lsls r3, r3, #8 800c52e: 4313 orrs r3, r2 800c530: 4a48 ldr r2, [pc, #288] @ (800c654 ) 800c532: 60d3 str r3, [r2, #12] PSU_09.moduleNCurrent |= PSU_09.moduleNCurrent_[1]<<16; 800c534: 4b47 ldr r3, [pc, #284] @ (800c654 ) 800c536: 68da ldr r2, [r3, #12] 800c538: 4b46 ldr r3, [pc, #280] @ (800c654 ) 800c53a: 795b ldrb r3, [r3, #5] 800c53c: 041b lsls r3, r3, #16 800c53e: 4313 orrs r3, r2 800c540: 4a44 ldr r2, [pc, #272] @ (800c654 ) 800c542: 60d3 str r3, [r2, #12] PSU_09.moduleNCurrent |= PSU_09.moduleNCurrent_[0]<<24; 800c544: 4b43 ldr r3, [pc, #268] @ (800c654 ) 800c546: 68da ldr r2, [r3, #12] 800c548: 4b42 ldr r3, [pc, #264] @ (800c654 ) 800c54a: 791b ldrb r3, [r3, #4] 800c54c: 061b lsls r3, r3, #24 800c54e: 4313 orrs r3, r2 800c550: 4a40 ldr r2, [pc, #256] @ (800c654 ) 800c552: 60d3 str r3, [r2, #12] PSU_09.moduleNVoltage = PSU_09.moduleNVoltage_[3]; 800c554: 4b3f ldr r3, [pc, #252] @ (800c654 ) 800c556: 78db ldrb r3, [r3, #3] 800c558: 461a mov r2, r3 800c55a: 4b3e ldr r3, [pc, #248] @ (800c654 ) 800c55c: 609a str r2, [r3, #8] PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[2]<<8; 800c55e: 4b3d ldr r3, [pc, #244] @ (800c654 ) 800c560: 689a ldr r2, [r3, #8] 800c562: 4b3c ldr r3, [pc, #240] @ (800c654 ) 800c564: 789b ldrb r3, [r3, #2] 800c566: 021b lsls r3, r3, #8 800c568: 4313 orrs r3, r2 800c56a: 4a3a ldr r2, [pc, #232] @ (800c654 ) 800c56c: 6093 str r3, [r2, #8] PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[1]<<16; 800c56e: 4b39 ldr r3, [pc, #228] @ (800c654 ) 800c570: 689a ldr r2, [r3, #8] 800c572: 4b38 ldr r3, [pc, #224] @ (800c654 ) 800c574: 785b ldrb r3, [r3, #1] 800c576: 041b lsls r3, r3, #16 800c578: 4313 orrs r3, r2 800c57a: 4a36 ldr r2, [pc, #216] @ (800c654 ) 800c57c: 6093 str r3, [r2, #8] PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[0]<<24; 800c57e: 4b35 ldr r3, [pc, #212] @ (800c654 ) 800c580: 689a ldr r2, [r3, #8] 800c582: 4b34 ldr r3, [pc, #208] @ (800c654 ) 800c584: 781b ldrb r3, [r3, #0] 800c586: 061b lsls r3, r3, #24 800c588: 4313 orrs r3, r2 800c58a: 4a32 ldr r2, [pc, #200] @ (800c654 ) 800c58c: 6093 str r3, [r2, #8] // PSU_09 -> PSU -> CONN (один модуль) { uint16_t v = PSU_09.moduleNVoltage / 1000; 800c58e: 4b31 ldr r3, [pc, #196] @ (800c654 ) 800c590: 689b ldr r3, [r3, #8] 800c592: 4a31 ldr r2, [pc, #196] @ (800c658 ) 800c594: fba2 2303 umull r2, r3, r2, r3 800c598: 099b lsrs r3, r3, #6 800c59a: 81fb strh r3, [r7, #14] int16_t i = PSU_09.moduleNCurrent / 100; 800c59c: 4b2d ldr r3, [pc, #180] @ (800c654 ) 800c59e: 68db ldr r3, [r3, #12] 800c5a0: 4a2e ldr r2, [pc, #184] @ (800c65c ) 800c5a2: fba2 2303 umull r2, r3, r2, r3 800c5a6: 095b lsrs r3, r3, #5 800c5a8: 81bb strh r3, [r7, #12] // Обновляем модель PSU0 по телеметрии PSU0.outputVoltage = v; 800c5aa: 4a27 ldr r2, [pc, #156] @ (800c648 ) 800c5ac: 89fb ldrh r3, [r7, #14] 800c5ae: 8053 strh r3, [r2, #2] PSU0.outputCurrent = i; 800c5b0: 4a25 ldr r2, [pc, #148] @ (800c648 ) 800c5b2: 89bb ldrh r3, [r7, #12] 800c5b4: 8093 strh r3, [r2, #4] PSU0.PSU_enabled = (v >= PSU_VOLTAGE_THRESHOLD); 800c5b6: 89fb ldrh r3, [r7, #14] 800c5b8: 2b13 cmp r3, #19 800c5ba: bf8c ite hi 800c5bc: 2301 movhi r3, #1 800c5be: 2300 movls r3, #0 800c5c0: b2db uxtb r3, r3 800c5c2: 461a mov r2, r3 800c5c4: 4b20 ldr r3, [pc, #128] @ (800c648 ) 800c5c6: 729a strb r2, [r3, #10] PSU0.online = 1; 800c5c8: 4b1f ldr r3, [pc, #124] @ (800c648 ) 800c5ca: 2201 movs r2, #1 800c5cc: 721a strb r2, [r3, #8] PSU0.temperature = PSU_04.moduleTemperature; 800c5ce: 4b1d ldr r3, [pc, #116] @ (800c644 ) 800c5d0: 791a ldrb r2, [r3, #4] 800c5d2: 4b1d ldr r3, [pc, #116] @ (800c648 ) 800c5d4: 719a strb r2, [r3, #6] // Экспортируем значения из PSU0 в CONN только, // когда модуль хотя бы в состоянии READY и выше if(PSU0.state >= PSU_READY){ 800c5d6: 4b1c ldr r3, [pc, #112] @ (800c648 ) 800c5d8: 79db ldrb r3, [r3, #7] 800c5da: 2b01 cmp r3, #1 800c5dc: d926 bls.n 800c62c CONN.MeasuredVoltage = PSU0.outputVoltage; 800c5de: 4b1a ldr r3, [pc, #104] @ (800c648 ) 800c5e0: 885a ldrh r2, [r3, #2] 800c5e2: 4b1f ldr r3, [pc, #124] @ (800c660 ) 800c5e4: f8a3 2013 strh.w r2, [r3, #19] CONN.MeasuredCurrent = PSU0.outputCurrent; 800c5e8: 4b17 ldr r3, [pc, #92] @ (800c648 ) 800c5ea: f9b3 3004 ldrsh.w r3, [r3, #4] 800c5ee: b29a uxth r2, r3 800c5f0: 4b1b ldr r3, [pc, #108] @ (800c660 ) 800c5f2: f8a3 2015 strh.w r2, [r3, #21] CONN.Power = CONN.MeasuredCurrent * CONN.MeasuredVoltage / 10; 800c5f6: 4b1a ldr r3, [pc, #104] @ (800c660 ) 800c5f8: f8b3 3015 ldrh.w r3, [r3, #21] 800c5fc: b29b uxth r3, r3 800c5fe: 461a mov r2, r3 800c600: 4b17 ldr r3, [pc, #92] @ (800c660 ) 800c602: f8b3 3013 ldrh.w r3, [r3, #19] 800c606: b29b uxth r3, r3 800c608: fb02 f303 mul.w r3, r2, r3 800c60c: 4a15 ldr r2, [pc, #84] @ (800c664 ) 800c60e: fb82 1203 smull r1, r2, r2, r3 800c612: 1092 asrs r2, r2, #2 800c614: 17db asrs r3, r3, #31 800c616: 1ad3 subs r3, r2, r3 800c618: 461a mov r2, r3 800c61a: 4b11 ldr r3, [pc, #68] @ (800c660 ) 800c61c: f8c3 2003 str.w r2, [r3, #3] CONN.outputEnabled = PSU0.PSU_enabled; 800c620: 4b09 ldr r3, [pc, #36] @ (800c648 ) 800c622: 7a9a ldrb r2, [r3, #10] 800c624: 4b0e ldr r3, [pc, #56] @ (800c660 ) 800c626: 761a strb r2, [r3, #24] 800c628: e000 b.n 800c62c if(CanId.source != 0) return; 800c62a: bf00 nop } } } } } 800c62c: 3710 adds r7, #16 800c62e: 46bd mov sp, r7 800c630: bd80 pop {r7, pc} 800c632: bf00 nop 800c634: 20000a40 .word 0x20000a40 800c638: 20000a24 .word 0x20000a24 800c63c: 20000a20 .word 0x20000a20 800c640: 200009b8 .word 0x200009b8 800c644: 200009c4 .word 0x200009c4 800c648: 200009fc .word 0x200009fc 800c64c: 200009d0 .word 0x200009d0 800c650: 200009e4 .word 0x200009e4 800c654: 200009ec .word 0x200009ec 800c658: 10624dd3 .word 0x10624dd3 800c65c: 51eb851f .word 0x51eb851f 800c660: 200002e8 .word 0x200002e8 800c664: 66666667 .word 0x66666667 0800c668 : void PSU_CAN_FilterInit(){ 800c668: b580 push {r7, lr} 800c66a: b08a sub sp, #40 @ 0x28 800c66c: af00 add r7, sp, #0 CAN_FilterTypeDef sFilterConfig; sFilterConfig.FilterBank = 14; 800c66e: 230e movs r3, #14 800c670: 617b str r3, [r7, #20] sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; 800c672: 2300 movs r3, #0 800c674: 61bb str r3, [r7, #24] sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; 800c676: 2301 movs r3, #1 800c678: 61fb str r3, [r7, #28] sFilterConfig.FilterIdHigh = 0x0000; 800c67a: 2300 movs r3, #0 800c67c: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = 0x0000; 800c67e: 2300 movs r3, #0 800c680: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 800c682: 2300 movs r3, #0 800c684: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = 0x0000; 800c686: 2300 movs r3, #0 800c688: 60fb str r3, [r7, #12] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0; 800c68a: 2300 movs r3, #0 800c68c: 613b str r3, [r7, #16] sFilterConfig.FilterActivation = ENABLE; 800c68e: 2301 movs r3, #1 800c690: 623b str r3, [r7, #32] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO1; 800c692: 2301 movs r3, #1 800c694: 613b str r3, [r7, #16] sFilterConfig.SlaveStartFilterBank = 14; 800c696: 230e movs r3, #14 800c698: 627b str r3, [r7, #36] @ 0x24 if(HAL_CAN_ConfigFilter(&hcan2, &sFilterConfig) != HAL_OK) 800c69a: 463b mov r3, r7 800c69c: 4619 mov r1, r3 800c69e: 4806 ldr r0, [pc, #24] @ (800c6b8 ) 800c6a0: f002 fec6 bl 800f430 800c6a4: 4603 mov r3, r0 800c6a6: 2b00 cmp r3, #0 800c6a8: d001 beq.n 800c6ae { Error_Handler(); 800c6aa: f7ff fe1d bl 800c2e8 } } 800c6ae: bf00 nop 800c6b0: 3728 adds r7, #40 @ 0x28 800c6b2: 46bd mov sp, r7 800c6b4: bd80 pop {r7, pc} 800c6b6: bf00 nop 800c6b8: 200002bc .word 0x200002bc 0800c6bc : void PSU_Init(){ 800c6bc: b580 push {r7, lr} 800c6be: af00 add r7, sp, #0 HAL_CAN_Stop(&hcan2); 800c6c0: 4813 ldr r0, [pc, #76] @ (800c710 ) 800c6c2: f002 ffd9 bl 800f678 MX_CAN2_Init(); 800c6c6: f7fd fa01 bl 8009acc PSU_CAN_FilterInit(); 800c6ca: f7ff ffcd bl 800c668 HAL_CAN_Start(&hcan2); 800c6ce: 4810 ldr r0, [pc, #64] @ (800c710 ) 800c6d0: f002 ff8e bl 800f5f0 HAL_CAN_ActivateNotification(&hcan2, CAN_IT_RX_FIFO1_MSG_PENDING /* | CAN_IT_ERROR | CAN_IT_BUSOFF | CAN_IT_LAST_ERROR_CODE | CAN_IT_TX_MAILBOX_EMPTY*/); 800c6d4: 2110 movs r1, #16 800c6d6: 480e ldr r0, [pc, #56] @ (800c710 ) 800c6d8: f003 fa3b bl 800fb52 memset(&PSU0, 0, sizeof(PSU0)); 800c6dc: 2224 movs r2, #36 @ 0x24 800c6de: 2100 movs r1, #0 800c6e0: 480c ldr r0, [pc, #48] @ (800c714 ) 800c6e2: f007 fcd5 bl 8014090 PSU0.state = PSU_UNREADY; 800c6e6: 4b0b ldr r3, [pc, #44] @ (800c714 ) 800c6e8: 2200 movs r2, #0 800c6ea: 71da strb r2, [r3, #7] PSU0.statetick = HAL_GetTick(); 800c6ec: f002 f870 bl 800e7d0 800c6f0: 4603 mov r3, r0 800c6f2: 4a08 ldr r2, [pc, #32] @ (800c714 ) 800c6f4: 6113 str r3, [r2, #16] PSU0.power_limit = PSU_MAX_POWER; // kW 800c6f6: 4b07 ldr r3, [pc, #28] @ (800c714 ) 800c6f8: f247 5230 movw r2, #30000 @ 0x7530 800c6fc: 615a str r2, [r3, #20] PSU0.hv_mode = 0; 800c6fe: 4b05 ldr r3, [pc, #20] @ (800c714 ) 800c700: 2200 movs r2, #0 800c702: 761a strb r2, [r3, #24] PSU_Enable(0, 0); 800c704: 2100 movs r1, #0 800c706: 2000 movs r0, #0 800c708: f000 f806 bl 800c718 } 800c70c: bf00 nop 800c70e: bd80 pop {r7, pc} 800c710: 200002bc .word 0x200002bc 800c714: 200009fc .word 0x200009fc 0800c718 : void PSU_Enable(uint8_t addr, uint8_t enable){ 800c718: b580 push {r7, lr} 800c71a: b084 sub sp, #16 800c71c: af00 add r7, sp, #0 800c71e: 4603 mov r3, r0 800c720: 460a mov r2, r1 800c722: 71fb strb r3, [r7, #7] 800c724: 4613 mov r3, r2 800c726: 71bb strb r3, [r7, #6] PSU_1A_t data; memset(&data, 0, sizeof(data)); 800c728: f107 0308 add.w r3, r7, #8 800c72c: 2208 movs r2, #8 800c72e: 2100 movs r1, #0 800c730: 4618 mov r0, r3 800c732: f007 fcad bl 8014090 /* Для DC30 поддерживается только один модуль с адресом 0 */ if(addr != 0) return; 800c736: 79fb ldrb r3, [r7, #7] 800c738: 2b00 cmp r3, #0 800c73a: d115 bne.n 800c768 if(PSU0.online == 0) return; 800c73c: 4b0d ldr r3, [pc, #52] @ (800c774 ) 800c73e: 7a1b ldrb r3, [r3, #8] 800c740: 2b00 cmp r3, #0 800c742: d013 beq.n 800c76c data.enable = !enable; 800c744: 79bb ldrb r3, [r7, #6] 800c746: 2b00 cmp r3, #0 800c748: bf0c ite eq 800c74a: 2301 moveq r3, #1 800c74c: 2300 movne r3, #0 800c74e: b2db uxtb r3, r3 800c750: 723b strb r3, [r7, #8] PSU_SendCmd(0xF0, addr, 0x1A, &data); 800c752: 79f9 ldrb r1, [r7, #7] 800c754: f107 0308 add.w r3, r7, #8 800c758: 221a movs r2, #26 800c75a: 20f0 movs r0, #240 @ 0xf0 800c75c: f000 f866 bl 800c82c ED_Delay(CAN_DELAY); 800c760: 2014 movs r0, #20 800c762: f7ff fc93 bl 800c08c 800c766: e002 b.n 800c76e if(addr != 0) return; 800c768: bf00 nop 800c76a: e000 b.n 800c76e if(PSU0.online == 0) return; 800c76c: bf00 nop } 800c76e: 3710 adds r7, #16 800c770: 46bd mov sp, r7 800c772: bd80 pop {r7, pc} 800c774: 200009fc .word 0x200009fc 0800c778 : memset(&data, 0, sizeof(data)); data.enable = !enable; if(addr != 0) return; PSU_SendCmd(0xF0, addr, 0x1D, &data); } void PSU_SetVoltageCurrent(uint8_t addr, uint16_t voltage, uint16_t current){ 800c778: b580 push {r7, lr} 800c77a: b086 sub sp, #24 800c77c: af00 add r7, sp, #0 800c77e: 4603 mov r3, r0 800c780: 71fb strb r3, [r7, #7] 800c782: 460b mov r3, r1 800c784: 80bb strh r3, [r7, #4] 800c786: 4613 mov r3, r2 800c788: 807b strh r3, [r7, #2] PSU_1C_t data; memset(&data, 0, sizeof(data)); 800c78a: f107 0308 add.w r3, r7, #8 800c78e: 2208 movs r2, #8 800c790: 2100 movs r1, #0 800c792: 4618 mov r0, r3 800c794: f007 fc7c bl 8014090 if(addr != 0) return; 800c798: 79fb ldrb r3, [r7, #7] 800c79a: 2b00 cmp r3, #0 800c79c: d140 bne.n 800c820 if(voltage 800c7a4: 2396 movs r3, #150 @ 0x96 800c7a6: 80bb strh r3, [r7, #4] if((PSU0.hv_mode==0) && voltage>499) voltage = 499; 800c7a8: 4b1f ldr r3, [pc, #124] @ (800c828 ) 800c7aa: 7e1b ldrb r3, [r3, #24] 800c7ac: 2b00 cmp r3, #0 800c7ae: d106 bne.n 800c7be 800c7b0: 88bb ldrh r3, [r7, #4] 800c7b2: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800c7b6: d302 bcc.n 800c7be 800c7b8: f240 13f3 movw r3, #499 @ 0x1f3 800c7bc: 80bb strh r3, [r7, #4] uint32_t current_ma = current * 100; 800c7be: 887b ldrh r3, [r7, #2] 800c7c0: 2264 movs r2, #100 @ 0x64 800c7c2: fb02 f303 mul.w r3, r2, r3 800c7c6: 617b str r3, [r7, #20] uint32_t voltage_mv = voltage * 1000; 800c7c8: 88bb ldrh r3, [r7, #4] 800c7ca: f44f 727a mov.w r2, #1000 @ 0x3e8 800c7ce: fb02 f303 mul.w r3, r2, r3 800c7d2: 613b str r3, [r7, #16] data.moduleCurrentTotal[0] = (current_ma >> 24) & 0xFF; 800c7d4: 697b ldr r3, [r7, #20] 800c7d6: 0e1b lsrs r3, r3, #24 800c7d8: b2db uxtb r3, r3 800c7da: 733b strb r3, [r7, #12] data.moduleCurrentTotal[1] = (current_ma >> 16) & 0xFF; 800c7dc: 697b ldr r3, [r7, #20] 800c7de: 0c1b lsrs r3, r3, #16 800c7e0: b2db uxtb r3, r3 800c7e2: 737b strb r3, [r7, #13] data.moduleCurrentTotal[2] = (current_ma >> 8) & 0xFF; 800c7e4: 697b ldr r3, [r7, #20] 800c7e6: 0a1b lsrs r3, r3, #8 800c7e8: b2db uxtb r3, r3 800c7ea: 73bb strb r3, [r7, #14] data.moduleCurrentTotal[3] = (current_ma >> 0) & 0xFF; 800c7ec: 697b ldr r3, [r7, #20] 800c7ee: b2db uxtb r3, r3 800c7f0: 73fb strb r3, [r7, #15] data.moduleVoltage[0] = (voltage_mv >> 24) & 0xFF; 800c7f2: 693b ldr r3, [r7, #16] 800c7f4: 0e1b lsrs r3, r3, #24 800c7f6: b2db uxtb r3, r3 800c7f8: 723b strb r3, [r7, #8] data.moduleVoltage[1] = (voltage_mv >> 16) & 0xFF; 800c7fa: 693b ldr r3, [r7, #16] 800c7fc: 0c1b lsrs r3, r3, #16 800c7fe: b2db uxtb r3, r3 800c800: 727b strb r3, [r7, #9] data.moduleVoltage[2] = (voltage_mv >> 8) & 0xFF; 800c802: 693b ldr r3, [r7, #16] 800c804: 0a1b lsrs r3, r3, #8 800c806: b2db uxtb r3, r3 800c808: 72bb strb r3, [r7, #10] data.moduleVoltage[3] = (voltage_mv >> 0) & 0xFF; 800c80a: 693b ldr r3, [r7, #16] 800c80c: b2db uxtb r3, r3 800c80e: 72fb strb r3, [r7, #11] PSU_SendCmd(0xF0, addr, 0x1C, &data); 800c810: 79f9 ldrb r1, [r7, #7] 800c812: f107 0308 add.w r3, r7, #8 800c816: 221c movs r2, #28 800c818: 20f0 movs r0, #240 @ 0xf0 800c81a: f000 f807 bl 800c82c 800c81e: e000 b.n 800c822 if(addr != 0) return; 800c820: bf00 nop } 800c822: 3718 adds r7, #24 800c824: 46bd mov sp, r7 800c826: bd80 pop {r7, pc} 800c828: 200009fc .word 0x200009fc 0800c82c : void PSU_SendCmd(uint8_t source, uint8_t destination, uint8_t cmd, void *data){ 800c82c: b580 push {r7, lr} 800c82e: b08c sub sp, #48 @ 0x30 800c830: af00 add r7, sp, #0 800c832: 603b str r3, [r7, #0] 800c834: 4603 mov r3, r0 800c836: 71fb strb r3, [r7, #7] 800c838: 460b mov r3, r1 800c83a: 71bb strb r3, [r7, #6] 800c83c: 4613 mov r3, r2 800c83e: 717b strb r3, [r7, #5] CanId_t CanId; CanId.source = source; 800c840: 79fb ldrb r3, [r7, #7] 800c842: f887 3028 strb.w r3, [r7, #40] @ 0x28 CanId.destination = destination; 800c846: 79bb ldrb r3, [r7, #6] 800c848: f887 3029 strb.w r3, [r7, #41] @ 0x29 CanId.command = cmd; 800c84c: 797b ldrb r3, [r7, #5] 800c84e: f003 033f and.w r3, r3, #63 @ 0x3f 800c852: b2da uxtb r2, r3 800c854: f897 302a ldrb.w r3, [r7, #42] @ 0x2a 800c858: f362 0305 bfi r3, r2, #0, #6 800c85c: f887 302a strb.w r3, [r7, #42] @ 0x2a CanId.device = 0x0A; 800c860: 8d7b ldrh r3, [r7, #42] @ 0x2a 800c862: 220a movs r2, #10 800c864: f362 1389 bfi r3, r2, #6, #4 800c868: 857b strh r3, [r7, #42] @ 0x2a int8_t retry_counter = 10; 800c86a: 230a movs r3, #10 800c86c: f887 302f strb.w r3, [r7, #47] @ 0x2f CAN_TxHeaderTypeDef tx_header; uint32_t tx_mailbox; HAL_StatusTypeDef CAN_result; memcpy(&tx_header.ExtId, &CanId, sizeof(CanId_t)); 800c870: 6abb ldr r3, [r7, #40] @ 0x28 800c872: 617b str r3, [r7, #20] tx_header.RTR = CAN_RTR_DATA; 800c874: 2300 movs r3, #0 800c876: 61fb str r3, [r7, #28] tx_header.IDE = CAN_ID_EXT; 800c878: 2304 movs r3, #4 800c87a: 61bb str r3, [r7, #24] tx_header.DLC = 8; 800c87c: 2308 movs r3, #8 800c87e: 623b str r3, [r7, #32] while(retry_counter>0){ //если буфер полон, ждем пока он освободится 800c880: e01e b.n 800c8c0 if (HAL_CAN_GetTxMailboxesFreeLevel(&hcan2) > 0){ 800c882: 4814 ldr r0, [pc, #80] @ (800c8d4 ) 800c884: f003 f810 bl 800f8a8 800c888: 4603 mov r3, r0 800c88a: 2b00 cmp r3, #0 800c88c: d00e beq.n 800c8ac /* отправка сообщения */ CAN_result = HAL_CAN_AddTxMessage(&hcan2, &tx_header, (uint8_t*)data, &tx_mailbox); 800c88e: f107 030c add.w r3, r7, #12 800c892: f107 0110 add.w r1, r7, #16 800c896: 683a ldr r2, [r7, #0] 800c898: 480e ldr r0, [pc, #56] @ (800c8d4 ) 800c89a: f002 ff36 bl 800f70a 800c89e: 4603 mov r3, r0 800c8a0: f887 302e strb.w r3, [r7, #46] @ 0x2e /* если отправка удалась, выход */ if(CAN_result == HAL_OK) { 800c8a4: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 800c8a8: 2b00 cmp r3, #0 800c8aa: d00e beq.n 800c8ca return; retry_counter = 0; } } ED_Delay(1); 800c8ac: 2001 movs r0, #1 800c8ae: f7ff fbed bl 800c08c retry_counter--; 800c8b2: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f 800c8b6: b2db uxtb r3, r3 800c8b8: 3b01 subs r3, #1 800c8ba: b2db uxtb r3, r3 800c8bc: f887 302f strb.w r3, [r7, #47] @ 0x2f while(retry_counter>0){ //если буфер полон, ждем пока он освободится 800c8c0: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f 800c8c4: 2b00 cmp r3, #0 800c8c6: dcdc bgt.n 800c882 800c8c8: e000 b.n 800c8cc return; 800c8ca: bf00 nop } } 800c8cc: 3730 adds r7, #48 @ 0x30 800c8ce: 46bd mov sp, r7 800c8d0: bd80 pop {r7, pc} 800c8d2: bf00 nop 800c8d4: 200002bc .word 0x200002bc 0800c8d8 : uint32_t max(uint32_t a, uint32_t b){ if(a>b) return a; else return b; } void PSU_ReadWrite(){ 800c8d8: b580 push {r7, lr} 800c8da: b082 sub sp, #8 800c8dc: af00 add r7, sp, #0 uint8_t zero_data[8] = {0,0,0,0,0,0,0,0}; 800c8de: 463b mov r3, r7 800c8e0: 2200 movs r2, #0 800c8e2: 601a str r2, [r3, #0] 800c8e4: 605a str r2, [r3, #4] PSU_SendCmd(0xF0, 0, 0x04, zero_data);ED_Delay(CAN_DELAY); 800c8e6: 463b mov r3, r7 800c8e8: 2204 movs r2, #4 800c8ea: 2100 movs r1, #0 800c8ec: 20f0 movs r0, #240 @ 0xf0 800c8ee: f7ff ff9d bl 800c82c 800c8f2: 2014 movs r0, #20 800c8f4: f7ff fbca bl 800c08c PSU_SendCmd(0xF0, 0, 0x06, zero_data);ED_Delay(CAN_DELAY); 800c8f8: 463b mov r3, r7 800c8fa: 2206 movs r2, #6 800c8fc: 2100 movs r1, #0 800c8fe: 20f0 movs r0, #240 @ 0xf0 800c900: f7ff ff94 bl 800c82c 800c904: 2014 movs r0, #20 800c906: f7ff fbc1 bl 800c08c // PSU_SendCmd(0xF0, 0, 0x08, zero_data);ED_Delay(CAN_DELAY); PSU_SendCmd(0xF0, 0, 0x09, zero_data);ED_Delay(CAN_DELAY); 800c90a: 463b mov r3, r7 800c90c: 2209 movs r2, #9 800c90e: 2100 movs r1, #0 800c910: 20f0 movs r0, #240 @ 0xf0 800c912: f7ff ff8b bl 800c82c 800c916: 2014 movs r0, #20 800c918: f7ff fbb8 bl 800c08c // Power Limit if ((CONN.WantedCurrent/10) * CONN.MeasuredVoltage > PSU0.power_limit){ 800c91c: 4b39 ldr r3, [pc, #228] @ (800ca04 ) 800c91e: f8b3 301b ldrh.w r3, [r3, #27] 800c922: b29b uxth r3, r3 800c924: 4a38 ldr r2, [pc, #224] @ (800ca08 ) 800c926: fba2 2303 umull r2, r3, r2, r3 800c92a: 08db lsrs r3, r3, #3 800c92c: b29b uxth r3, r3 800c92e: 461a mov r2, r3 800c930: 4b34 ldr r3, [pc, #208] @ (800ca04 ) 800c932: f8b3 3013 ldrh.w r3, [r3, #19] 800c936: b29b uxth r3, r3 800c938: fb02 f303 mul.w r3, r2, r3 800c93c: 461a mov r2, r3 800c93e: 4b33 ldr r3, [pc, #204] @ (800ca0c ) 800c940: 695b ldr r3, [r3, #20] 800c942: 429a cmp r2, r3 800c944: d911 bls.n 800c96a CONN.RequestedCurrent = PSU0.power_limit * 10 / CONN.MeasuredVoltage; 800c946: 4b31 ldr r3, [pc, #196] @ (800ca0c ) 800c948: 695a ldr r2, [r3, #20] 800c94a: 4613 mov r3, r2 800c94c: 009b lsls r3, r3, #2 800c94e: 4413 add r3, r2 800c950: 005b lsls r3, r3, #1 800c952: 461a mov r2, r3 800c954: 4b2b ldr r3, [pc, #172] @ (800ca04 ) 800c956: f8b3 3013 ldrh.w r3, [r3, #19] 800c95a: b29b uxth r3, r3 800c95c: fbb2 f3f3 udiv r3, r2, r3 800c960: b29a uxth r2, r3 800c962: 4b28 ldr r3, [pc, #160] @ (800ca04 ) 800c964: f8a3 2011 strh.w r2, [r3, #17] 800c968: e006 b.n 800c978 }else{ CONN.RequestedCurrent = CONN.WantedCurrent; 800c96a: 4b26 ldr r3, [pc, #152] @ (800ca04 ) 800c96c: f8b3 301b ldrh.w r3, [r3, #27] 800c970: b29a uxth r2, r3 800c972: 4b24 ldr r3, [pc, #144] @ (800ca04 ) 800c974: f8a3 2011 strh.w r2, [r3, #17] } if(CONN.RequestedCurrent > (PSU_MAX_CURRENT*10)){ 800c978: 4b22 ldr r3, [pc, #136] @ (800ca04 ) 800c97a: f8b3 3011 ldrh.w r3, [r3, #17] 800c97e: b29b uxth r3, r3 800c980: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800c984: d908 bls.n 800c998 CONN.RequestedCurrent = PSU_MAX_CURRENT*10; 800c986: 4b1f ldr r3, [pc, #124] @ (800ca04 ) 800c988: 2200 movs r2, #0 800c98a: f062 0217 orn r2, r2, #23 800c98e: 745a strb r2, [r3, #17] 800c990: 2200 movs r2, #0 800c992: f042 0203 orr.w r2, r2, #3 800c996: 749a strb r2, [r3, #18] } CONN.RequestedPower = CONN.RequestedCurrent * CONN.RequestedVoltage / 10; 800c998: 4b1a ldr r3, [pc, #104] @ (800ca04 ) 800c99a: f8b3 3011 ldrh.w r3, [r3, #17] 800c99e: b29b uxth r3, r3 800c9a0: 461a mov r2, r3 800c9a2: 4b18 ldr r3, [pc, #96] @ (800ca04 ) 800c9a4: f8b3 300f ldrh.w r3, [r3, #15] 800c9a8: b29b uxth r3, r3 800c9aa: fb02 f303 mul.w r3, r2, r3 800c9ae: 4a18 ldr r2, [pc, #96] @ (800ca10 ) 800c9b0: fb82 1203 smull r1, r2, r2, r3 800c9b4: 1092 asrs r2, r2, #2 800c9b6: 17db asrs r3, r3, #31 800c9b8: 1ad3 subs r3, r2, r3 800c9ba: 461a mov r2, r3 800c9bc: 4b11 ldr r3, [pc, #68] @ (800ca04 ) 800c9be: f8c3 200b str.w r2, [r3, #11] if(PSU0.ready){ 800c9c2: 4b12 ldr r3, [pc, #72] @ (800ca0c ) 800c9c4: 7a5b ldrb r3, [r3, #9] 800c9c6: 2b00 cmp r3, #0 800c9c8: d018 beq.n 800c9fc PSU_SetVoltageCurrent(0, CONN.RequestedVoltage, CONN.RequestedCurrent); // Normal mode 800c9ca: 4b0e ldr r3, [pc, #56] @ (800ca04 ) 800c9cc: f8b3 300f ldrh.w r3, [r3, #15] 800c9d0: b29b uxth r3, r3 800c9d2: 4a0c ldr r2, [pc, #48] @ (800ca04 ) 800c9d4: f8b2 2011 ldrh.w r2, [r2, #17] 800c9d8: b292 uxth r2, r2 800c9da: 4619 mov r1, r3 800c9dc: 2000 movs r0, #0 800c9de: f7ff fecb bl 800c778 ED_Delay(CAN_DELAY); 800c9e2: 2014 movs r0, #20 800c9e4: f7ff fb52 bl 800c08c if(CONN.MeasuredVoltage>490) PSU0.hv_mode = 1; 800c9e8: 4b06 ldr r3, [pc, #24] @ (800ca04 ) 800c9ea: f8b3 3013 ldrh.w r3, [r3, #19] 800c9ee: b29b uxth r3, r3 800c9f0: f5b3 7ff5 cmp.w r3, #490 @ 0x1ea 800c9f4: d902 bls.n 800c9fc 800c9f6: 4b05 ldr r3, [pc, #20] @ (800ca0c ) 800c9f8: 2201 movs r2, #1 800c9fa: 761a strb r2, [r3, #24] } // PSU_SetHVMode(0, PSU0.hv_mode); // auto set, no need // ED_Delay(CAN_DELAY); } 800c9fc: bf00 nop 800c9fe: 3708 adds r7, #8 800ca00: 46bd mov sp, r7 800ca02: bd80 pop {r7, pc} 800ca04: 200002e8 .word 0x200002e8 800ca08: cccccccd .word 0xcccccccd 800ca0c: 200009fc .word 0x200009fc 800ca10: 66666667 .word 0x66666667 0800ca14 : void PSU_Task(void){ 800ca14: b598 push {r3, r4, r7, lr} 800ca16: af00 add r7, sp, #0 static uint32_t psu_on_tick = 0; static uint32_t dc_on_tick = 0; static uint32_t cont_ok_tick = 0; // Обновляем ONLINE/READY по таймауту if((HAL_GetTick() - can_lastpacket) > PSU_ONLINE_TIMEOUT){ 800ca18: f001 feda bl 800e7d0 800ca1c: 4602 mov r2, r0 800ca1e: 4bb4 ldr r3, [pc, #720] @ (800ccf0 ) 800ca20: 681b ldr r3, [r3, #0] 800ca22: 1ad3 subs r3, r2, r3 800ca24: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800ca28: d920 bls.n 800ca6c PSU0.online = 0; 800ca2a: 4bb2 ldr r3, [pc, #712] @ (800ccf4 ) 800ca2c: 2200 movs r2, #0 800ca2e: 721a strb r2, [r3, #8] PSU0.PSU_enabled = 0; 800ca30: 4bb0 ldr r3, [pc, #704] @ (800ccf4 ) 800ca32: 2200 movs r2, #0 800ca34: 729a strb r2, [r3, #10] PSU_04.moduleTemperature = 0; 800ca36: 4bb0 ldr r3, [pc, #704] @ (800ccf8 ) 800ca38: 2200 movs r2, #0 800ca3a: 711a strb r2, [r3, #4] PSU_04.modularForm0 = 0; 800ca3c: 4bae ldr r3, [pc, #696] @ (800ccf8 ) 800ca3e: 2200 movs r2, #0 800ca40: 721a strb r2, [r3, #8] PSU_04.modularForm1 = 0; 800ca42: 4bad ldr r3, [pc, #692] @ (800ccf8 ) 800ca44: 2200 movs r2, #0 800ca46: 71da strb r2, [r3, #7] PSU_04.modularForm2 = 0; 800ca48: 4bab ldr r3, [pc, #684] @ (800ccf8 ) 800ca4a: 2200 movs r2, #0 800ca4c: 719a strb r2, [r3, #6] PSU_06.VAB = 0; 800ca4e: 4bab ldr r3, [pc, #684] @ (800ccfc ) 800ca50: 2200 movs r2, #0 800ca52: 609a str r2, [r3, #8] PSU_06.VBC = 0; 800ca54: 4ba9 ldr r3, [pc, #676] @ (800ccfc ) 800ca56: 2200 movs r2, #0 800ca58: 60da str r2, [r3, #12] PSU_06.VCA = 0; 800ca5a: 4ba8 ldr r3, [pc, #672] @ (800ccfc ) 800ca5c: 2200 movs r2, #0 800ca5e: 611a str r2, [r3, #16] PSU_09.moduleNCurrent = 0; 800ca60: 4ba7 ldr r3, [pc, #668] @ (800cd00 ) 800ca62: 2200 movs r2, #0 800ca64: 60da str r2, [r3, #12] PSU_09.moduleNVoltage = 0; 800ca66: 4ba6 ldr r3, [pc, #664] @ (800cd00 ) 800ca68: 2200 movs r2, #0 800ca6a: 609a str r2, [r3, #8] } if(!PSU0.online || !PSU0.enableAC){ 800ca6c: 4ba1 ldr r3, [pc, #644] @ (800ccf4 ) 800ca6e: 7a1b ldrb r3, [r3, #8] 800ca70: 2b00 cmp r3, #0 800ca72: d003 beq.n 800ca7c 800ca74: 4b9f ldr r3, [pc, #636] @ (800ccf4 ) 800ca76: 781b ldrb r3, [r3, #0] 800ca78: 2b00 cmp r3, #0 800ca7a: d10c bne.n 800ca96 CONN.MeasuredVoltage = 0; 800ca7c: 4ba1 ldr r3, [pc, #644] @ (800cd04 ) 800ca7e: 2200 movs r2, #0 800ca80: 74da strb r2, [r3, #19] 800ca82: 2200 movs r2, #0 800ca84: 751a strb r2, [r3, #20] CONN.MeasuredCurrent = 0; 800ca86: 4b9f ldr r3, [pc, #636] @ (800cd04 ) 800ca88: 2200 movs r2, #0 800ca8a: 755a strb r2, [r3, #21] 800ca8c: 2200 movs r2, #0 800ca8e: 759a strb r2, [r3, #22] CONN.outputEnabled = 0; 800ca90: 4b9c ldr r3, [pc, #624] @ (800cd04 ) 800ca92: 2200 movs r2, #0 800ca94: 761a strb r2, [r3, #24] } // Управление AC-контактором с задержкой отключения 1 минута if(CONN.EvConnected){ 800ca96: 4b9b ldr r3, [pc, #620] @ (800cd04 ) 800ca98: 7f9b ldrb r3, [r3, #30] 800ca9a: 2b00 cmp r3, #0 800ca9c: d00c beq.n 800cab8 RELAY_Write(RELAY_AC, 1); 800ca9e: 2101 movs r1, #1 800caa0: 2004 movs r0, #4 800caa2: f7fc fe23 bl 80096ec psu_on_tick = HAL_GetTick(); 800caa6: f001 fe93 bl 800e7d0 800caaa: 4603 mov r3, r0 800caac: 4a96 ldr r2, [pc, #600] @ (800cd08 ) 800caae: 6013 str r3, [r2, #0] PSU0.enableAC = 1; 800cab0: 4b90 ldr r3, [pc, #576] @ (800ccf4 ) 800cab2: 2201 movs r2, #1 800cab4: 701a strb r2, [r3, #0] 800cab6: e010 b.n 800cada }else{ if((HAL_GetTick() - psu_on_tick) > 1 * 60000){ 800cab8: f001 fe8a bl 800e7d0 800cabc: 4602 mov r2, r0 800cabe: 4b92 ldr r3, [pc, #584] @ (800cd08 ) 800cac0: 681b ldr r3, [r3, #0] 800cac2: 1ad3 subs r3, r2, r3 800cac4: f64e 2260 movw r2, #60000 @ 0xea60 800cac8: 4293 cmp r3, r2 800caca: d906 bls.n 800cada RELAY_Write(RELAY_AC, 0); 800cacc: 2100 movs r1, #0 800cace: 2004 movs r0, #4 800cad0: f7fc fe0c bl 80096ec PSU0.enableAC = 0; 800cad4: 4b87 ldr r3, [pc, #540] @ (800ccf4 ) 800cad6: 2200 movs r2, #0 800cad8: 701a strb r2, [r3, #0] } } // Текущее состояние DC-контактора по обратной связи PSU0.CONT_enabled = IN_ReadInput(IN_CONT_FB_DC); 800cada: 2005 movs r0, #5 800cadc: f7fc fe7a bl 80097d4 800cae0: 4603 mov r3, r0 800cae2: 461a mov r2, r3 800cae4: 4b83 ldr r3, [pc, #524] @ (800ccf4 ) 800cae6: 72da strb r2, [r3, #11] // Обновляем ready с учётом ошибок if(PSU0.online && !PSU0.cont_fault && PSU0.enableAC){ 800cae8: 4b82 ldr r3, [pc, #520] @ (800ccf4 ) 800caea: 7a1b ldrb r3, [r3, #8] 800caec: 2b00 cmp r3, #0 800caee: d007 beq.n 800cb00 800caf0: 4b80 ldr r3, [pc, #512] @ (800ccf4 ) 800caf2: 7b1b ldrb r3, [r3, #12] 800caf4: 2b00 cmp r3, #0 800caf6: d103 bne.n 800cb00 800caf8: 4b7e ldr r3, [pc, #504] @ (800ccf4 ) 800cafa: 781b ldrb r3, [r3, #0] 800cafc: 2b00 cmp r3, #0 800cafe: d102 bne.n 800cb06 // PSU0.ready = 1; }else{ PSU0.ready = 0; 800cb00: 4b7c ldr r3, [pc, #496] @ (800ccf4 ) 800cb02: 2200 movs r2, #0 800cb04: 725a strb r2, [r3, #9] } switch(PSU0.state){ 800cb06: 4b7b ldr r3, [pc, #492] @ (800ccf4 ) 800cb08: 79db ldrb r3, [r3, #7] 800cb0a: 2b09 cmp r3, #9 800cb0c: f200 8155 bhi.w 800cdba 800cb10: a201 add r2, pc, #4 @ (adr r2, 800cb18 ) 800cb12: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800cb16: bf00 nop 800cb18: 0800cb41 .word 0x0800cb41 800cb1c: 0800cb75 .word 0x0800cb75 800cb20: 0800cb91 .word 0x0800cb91 800cb24: 0800cbc9 .word 0x0800cbc9 800cb28: 0800cc17 .word 0x0800cc17 800cb2c: 0800cc59 .word 0x0800cc59 800cb30: 0800ccc3 .word 0x0800ccc3 800cb34: 0800cd6d .word 0x0800cd6d 800cb38: 0800cd1d .word 0x0800cd1d 800cb3c: 0800cda7 .word 0x0800cda7 case PSU_UNREADY: PSU0.enableOutput = 0; 800cb40: 4b6c ldr r3, [pc, #432] @ (800ccf4 ) 800cb42: 2200 movs r2, #0 800cb44: 705a strb r2, [r3, #1] RELAY_Write(RELAY_DC, 0); 800cb46: 2100 movs r1, #0 800cb48: 2003 movs r0, #3 800cb4a: f7fc fdcf bl 80096ec if(PSU0.online && PSU0.enableAC && !PSU0.cont_fault){ 800cb4e: 4b69 ldr r3, [pc, #420] @ (800ccf4 ) 800cb50: 7a1b ldrb r3, [r3, #8] 800cb52: 2b00 cmp r3, #0 800cb54: f000 8135 beq.w 800cdc2 800cb58: 4b66 ldr r3, [pc, #408] @ (800ccf4 ) 800cb5a: 781b ldrb r3, [r3, #0] 800cb5c: 2b00 cmp r3, #0 800cb5e: f000 8130 beq.w 800cdc2 800cb62: 4b64 ldr r3, [pc, #400] @ (800ccf4 ) 800cb64: 7b1b ldrb r3, [r3, #12] 800cb66: 2b00 cmp r3, #0 800cb68: f040 812b bne.w 800cdc2 PSU_SwitchState(PSU_INITIALIZING); 800cb6c: 2001 movs r0, #1 800cb6e: f7ff fc2b bl 800c3c8 } break; 800cb72: e126 b.n 800cdc2 case PSU_INITIALIZING: if(PSU_StateTime() > 4000){ // Wait 4s for PSU to initialize 800cb74: f7ff fc3c bl 800c3f0 800cb78: 4603 mov r3, r0 800cb7a: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800cb7e: f240 8122 bls.w 800cdc6 PSU0.ready = 1; 800cb82: 4b5c ldr r3, [pc, #368] @ (800ccf4 ) 800cb84: 2201 movs r2, #1 800cb86: 725a strb r2, [r3, #9] PSU_SwitchState(PSU_READY); 800cb88: 2002 movs r0, #2 800cb8a: f7ff fc1d bl 800c3c8 } break; 800cb8e: e11a b.n 800cdc6 case PSU_READY: // модуль готов, но выключен PSU0.hv_mode = 0; 800cb90: 4b58 ldr r3, [pc, #352] @ (800ccf4 ) 800cb92: 2200 movs r2, #0 800cb94: 761a strb r2, [r3, #24] RELAY_Write(RELAY_DC, 0); 800cb96: 2100 movs r1, #0 800cb98: 2003 movs r0, #3 800cb9a: f7fc fda7 bl 80096ec if(!PSU0.ready){ 800cb9e: 4b55 ldr r3, [pc, #340] @ (800ccf4 ) 800cba0: 7a5b ldrb r3, [r3, #9] 800cba2: 2b00 cmp r3, #0 800cba4: d103 bne.n 800cbae PSU_SwitchState(PSU_UNREADY); 800cba6: 2000 movs r0, #0 800cba8: f7ff fc0e bl 800c3c8 break; 800cbac: e11c b.n 800cde8 } if(CONN.EnableOutput){ 800cbae: 4b55 ldr r3, [pc, #340] @ (800cd04 ) 800cbb0: 7ddb ldrb r3, [r3, #23] 800cbb2: 2b00 cmp r3, #0 800cbb4: f000 8109 beq.w 800cdca PSU_Enable(0, 1); 800cbb8: 2101 movs r1, #1 800cbba: 2000 movs r0, #0 800cbbc: f7ff fdac bl 800c718 PSU_SwitchState(PSU_WAIT_ACK_ON); 800cbc0: 2003 movs r0, #3 800cbc2: f7ff fc01 bl 800c3c8 } break; 800cbc6: e100 b.n 800cdca case PSU_WAIT_ACK_ON: if(PSU0.PSU_enabled && PSU0.ready){ 800cbc8: 4b4a ldr r3, [pc, #296] @ (800ccf4 ) 800cbca: 7a9b ldrb r3, [r3, #10] 800cbcc: 2b00 cmp r3, #0 800cbce: d00c beq.n 800cbea 800cbd0: 4b48 ldr r3, [pc, #288] @ (800ccf4 ) 800cbd2: 7a5b ldrb r3, [r3, #9] 800cbd4: 2b00 cmp r3, #0 800cbd6: d008 beq.n 800cbea dc_on_tick = HAL_GetTick(); 800cbd8: f001 fdfa bl 800e7d0 800cbdc: 4603 mov r3, r0 800cbde: 4a4b ldr r2, [pc, #300] @ (800cd0c ) 800cbe0: 6013 str r3, [r2, #0] PSU_SwitchState(PSU_CONT_WAIT_ACK_ON); 800cbe2: 2004 movs r0, #4 800cbe4: f7ff fbf0 bl 800c3c8 PSU0.psu_fault = 1; CONN.chargingError = CONN_ERR_PSU_FAULT; PSU_SwitchState(PSU_UNREADY); log_printf(LOG_ERR, "PSU on timeout\n"); } break; 800cbe8: e0f1 b.n 800cdce }else if(PSU_StateTime() > 10000){ 800cbea: f7ff fc01 bl 800c3f0 800cbee: 4603 mov r3, r0 800cbf0: f242 7210 movw r2, #10000 @ 0x2710 800cbf4: 4293 cmp r3, r2 800cbf6: f240 80ea bls.w 800cdce PSU0.psu_fault = 1; 800cbfa: 4b3e ldr r3, [pc, #248] @ (800ccf4 ) 800cbfc: 2201 movs r2, #1 800cbfe: 735a strb r2, [r3, #13] CONN.chargingError = CONN_ERR_PSU_FAULT; 800cc00: 4b40 ldr r3, [pc, #256] @ (800cd04 ) 800cc02: 220a movs r2, #10 800cc04: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_UNREADY); 800cc06: 2000 movs r0, #0 800cc08: f7ff fbde bl 800c3c8 log_printf(LOG_ERR, "PSU on timeout\n"); 800cc0c: 4940 ldr r1, [pc, #256] @ (800cd10 ) 800cc0e: 2004 movs r0, #4 800cc10: f7fe fc28 bl 800b464 break; 800cc14: e0db b.n 800cdce case PSU_CONT_WAIT_ACK_ON: // замыкаем DC-контактор и ждём подтверждение RELAY_Write(RELAY_DC, 1); 800cc16: 2101 movs r1, #1 800cc18: 2003 movs r0, #3 800cc1a: f7fc fd67 bl 80096ec if(PSU0.CONT_enabled){ 800cc1e: 4b35 ldr r3, [pc, #212] @ (800ccf4 ) 800cc20: 7adb ldrb r3, [r3, #11] 800cc22: 2b00 cmp r3, #0 800cc24: d003 beq.n 800cc2e PSU_SwitchState(PSU_CONNECTED); 800cc26: 2005 movs r0, #5 800cc28: f7ff fbce bl 800c3c8 PSU0.cont_fault = 1; CONN.chargingError = CONN_ERR_CONTACTOR; PSU_SwitchState(PSU_CURRENT_DROP); log_printf(LOG_ERR, "Contactor error, stopping...\n"); } break; 800cc2c: e0d1 b.n 800cdd2 }else if(PSU_StateTime() > 1000){ 800cc2e: f7ff fbdf bl 800c3f0 800cc32: 4603 mov r3, r0 800cc34: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800cc38: f240 80cb bls.w 800cdd2 PSU0.cont_fault = 1; 800cc3c: 4b2d ldr r3, [pc, #180] @ (800ccf4 ) 800cc3e: 2201 movs r2, #1 800cc40: 731a strb r2, [r3, #12] CONN.chargingError = CONN_ERR_CONTACTOR; 800cc42: 4b30 ldr r3, [pc, #192] @ (800cd04 ) 800cc44: 2207 movs r2, #7 800cc46: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_CURRENT_DROP); 800cc48: 2006 movs r0, #6 800cc4a: f7ff fbbd bl 800c3c8 log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800cc4e: 4931 ldr r1, [pc, #196] @ (800cd14 ) 800cc50: 2004 movs r0, #4 800cc52: f7fe fc07 bl 800b464 break; 800cc56: e0bc b.n 800cdd2 case PSU_CONNECTED: // Основное рабочее состояние if(!CONN.EnableOutput || !PSU0.ready){ 800cc58: 4b2a ldr r3, [pc, #168] @ (800cd04 ) 800cc5a: 7ddb ldrb r3, [r3, #23] 800cc5c: 2b00 cmp r3, #0 800cc5e: d003 beq.n 800cc68 800cc60: 4b24 ldr r3, [pc, #144] @ (800ccf4 ) 800cc62: 7a5b ldrb r3, [r3, #9] 800cc64: 2b00 cmp r3, #0 800cc66: d103 bne.n 800cc70 PSU_SwitchState(PSU_CURRENT_DROP); 800cc68: 2006 movs r0, #6 800cc6a: f7ff fbad bl 800c3c8 break; 800cc6e: e0bb b.n 800cde8 } // контроль контактора: 1 c таймаут if (IN_ReadInput(IN_CONT_FB_DC) != RELAY_Read(RELAY_DC)){ 800cc70: 2005 movs r0, #5 800cc72: f7fc fdaf bl 80097d4 800cc76: 4603 mov r3, r0 800cc78: 461c mov r4, r3 800cc7a: 2003 movs r0, #3 800cc7c: f7fc fd9a bl 80097b4 800cc80: 4603 mov r3, r0 800cc82: 429c cmp r4, r3 800cc84: d017 beq.n 800ccb6 if((HAL_GetTick() - cont_ok_tick) > 1000){ 800cc86: f001 fda3 bl 800e7d0 800cc8a: 4602 mov r2, r0 800cc8c: 4b22 ldr r3, [pc, #136] @ (800cd18 ) 800cc8e: 681b ldr r3, [r3, #0] 800cc90: 1ad3 subs r3, r2, r3 800cc92: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800cc96: f240 809e bls.w 800cdd6 CONN.chargingError = CONN_ERR_CONTACTOR; 800cc9a: 4b1a ldr r3, [pc, #104] @ (800cd04 ) 800cc9c: 2207 movs r2, #7 800cc9e: 775a strb r2, [r3, #29] PSU0.cont_fault = 1; 800cca0: 4b14 ldr r3, [pc, #80] @ (800ccf4 ) 800cca2: 2201 movs r2, #1 800cca4: 731a strb r2, [r3, #12] PSU_SwitchState(PSU_CURRENT_DROP); 800cca6: 2006 movs r0, #6 800cca8: f7ff fb8e bl 800c3c8 log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800ccac: 4919 ldr r1, [pc, #100] @ (800cd14 ) 800ccae: 2004 movs r0, #4 800ccb0: f7fe fbd8 bl 800b464 } }else{ cont_ok_tick = HAL_GetTick(); } break; 800ccb4: e08f b.n 800cdd6 cont_ok_tick = HAL_GetTick(); 800ccb6: f001 fd8b bl 800e7d0 800ccba: 4603 mov r3, r0 800ccbc: 4a16 ldr r2, [pc, #88] @ (800cd18 ) 800ccbe: 6013 str r3, [r2, #0] break; 800ccc0: e089 b.n 800cdd6 case PSU_CURRENT_DROP: // снижаем ток до нуля перед отключением DC CONN.RequestedCurrent = 0; 800ccc2: 4b10 ldr r3, [pc, #64] @ (800cd04 ) 800ccc4: 2200 movs r2, #0 800ccc6: 745a strb r2, [r3, #17] 800ccc8: 2200 movs r2, #0 800ccca: 749a strb r2, [r3, #18] // если ток действительно упал или вышло время, отключаем DC if((CONN.MeasuredCurrent < 30) || (PSU_StateTime() > 5000)){ 800cccc: 4b0d ldr r3, [pc, #52] @ (800cd04 ) 800ccce: f8b3 3015 ldrh.w r3, [r3, #21] 800ccd2: b29b uxth r3, r3 800ccd4: 2b1d cmp r3, #29 800ccd6: d906 bls.n 800cce6 800ccd8: f7ff fb8a bl 800c3f0 800ccdc: 4603 mov r3, r0 800ccde: f241 3288 movw r2, #5000 @ 0x1388 800cce2: 4293 cmp r3, r2 800cce4: d979 bls.n 800cdda PSU_SwitchState(PSU_CONT_WAIT_ACK_OFF); 800cce6: 2008 movs r0, #8 800cce8: f7ff fb6e bl 800c3c8 } break; 800ccec: e075 b.n 800cdda 800ccee: bf00 nop 800ccf0: 20000a20 .word 0x20000a20 800ccf4: 200009fc .word 0x200009fc 800ccf8: 200009c4 .word 0x200009c4 800ccfc: 200009d0 .word 0x200009d0 800cd00: 200009ec .word 0x200009ec 800cd04: 200002e8 .word 0x200002e8 800cd08: 20000a48 .word 0x20000a48 800cd0c: 20000a4c .word 0x20000a4c 800cd10: 08016b48 .word 0x08016b48 800cd14: 08016b58 .word 0x08016b58 800cd18: 20000a50 .word 0x20000a50 case PSU_CONT_WAIT_ACK_OFF: RELAY_Write(RELAY_DC, 0); 800cd1c: 2100 movs r1, #0 800cd1e: 2003 movs r0, #3 800cd20: f7fc fce4 bl 80096ec if(!PSU0.CONT_enabled){ 800cd24: 4b31 ldr r3, [pc, #196] @ (800cdec ) 800cd26: 7adb ldrb r3, [r3, #11] 800cd28: 2b00 cmp r3, #0 800cd2a: d107 bne.n 800cd3c PSU_Enable(0, 0); 800cd2c: 2100 movs r1, #0 800cd2e: 2000 movs r0, #0 800cd30: f7ff fcf2 bl 800c718 PSU_SwitchState(PSU_WAIT_ACK_OFF); 800cd34: 2007 movs r0, #7 800cd36: f7ff fb47 bl 800c3c8 CONN.chargingError = CONN_ERR_CONTACTOR; PSU_Enable(0, 0); PSU_SwitchState(PSU_WAIT_ACK_OFF); log_printf(LOG_ERR, "Contactor error, stopping...\n"); } break; 800cd3a: e050 b.n 800cdde }else if(PSU_StateTime() > 1000){ 800cd3c: f7ff fb58 bl 800c3f0 800cd40: 4603 mov r3, r0 800cd42: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800cd46: d94a bls.n 800cdde PSU0.cont_fault = 1; 800cd48: 4b28 ldr r3, [pc, #160] @ (800cdec ) 800cd4a: 2201 movs r2, #1 800cd4c: 731a strb r2, [r3, #12] CONN.chargingError = CONN_ERR_CONTACTOR; 800cd4e: 4b28 ldr r3, [pc, #160] @ (800cdf0 ) 800cd50: 2207 movs r2, #7 800cd52: 775a strb r2, [r3, #29] PSU_Enable(0, 0); 800cd54: 2100 movs r1, #0 800cd56: 2000 movs r0, #0 800cd58: f7ff fcde bl 800c718 PSU_SwitchState(PSU_WAIT_ACK_OFF); 800cd5c: 2007 movs r0, #7 800cd5e: f7ff fb33 bl 800c3c8 log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800cd62: 4924 ldr r1, [pc, #144] @ (800cdf4 ) 800cd64: 2004 movs r0, #4 800cd66: f7fe fb7d bl 800b464 break; 800cd6a: e038 b.n 800cdde case PSU_WAIT_ACK_OFF: if(!PSU0.PSU_enabled){ 800cd6c: 4b1f ldr r3, [pc, #124] @ (800cdec ) 800cd6e: 7a9b ldrb r3, [r3, #10] 800cd70: 2b00 cmp r3, #0 800cd72: d103 bne.n 800cd7c PSU_SwitchState(PSU_OFF_PAUSE); 800cd74: 2009 movs r0, #9 800cd76: f7ff fb27 bl 800c3c8 PSU0.psu_fault = 1; CONN.chargingError = CONN_ERR_PSU_FAULT; PSU_SwitchState(PSU_UNREADY); log_printf(LOG_ERR, "PSU off timeout\n"); } break; 800cd7a: e032 b.n 800cde2 }else if(PSU_StateTime() > 10000){ 800cd7c: f7ff fb38 bl 800c3f0 800cd80: 4603 mov r3, r0 800cd82: f242 7210 movw r2, #10000 @ 0x2710 800cd86: 4293 cmp r3, r2 800cd88: d92b bls.n 800cde2 PSU0.psu_fault = 1; 800cd8a: 4b18 ldr r3, [pc, #96] @ (800cdec ) 800cd8c: 2201 movs r2, #1 800cd8e: 735a strb r2, [r3, #13] CONN.chargingError = CONN_ERR_PSU_FAULT; 800cd90: 4b17 ldr r3, [pc, #92] @ (800cdf0 ) 800cd92: 220a movs r2, #10 800cd94: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_UNREADY); 800cd96: 2000 movs r0, #0 800cd98: f7ff fb16 bl 800c3c8 log_printf(LOG_ERR, "PSU off timeout\n"); 800cd9c: 4916 ldr r1, [pc, #88] @ (800cdf8 ) 800cd9e: 2004 movs r0, #4 800cda0: f7fe fb60 bl 800b464 break; 800cda4: e01d b.n 800cde2 case PSU_OFF_PAUSE: if(PSU_StateTime() > 4000){ 800cda6: f7ff fb23 bl 800c3f0 800cdaa: 4603 mov r3, r0 800cdac: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800cdb0: d919 bls.n 800cde6 PSU_SwitchState(PSU_READY); 800cdb2: 2002 movs r0, #2 800cdb4: f7ff fb08 bl 800c3c8 } break; 800cdb8: e015 b.n 800cde6 default: PSU_SwitchState(PSU_UNREADY); 800cdba: 2000 movs r0, #0 800cdbc: f7ff fb04 bl 800c3c8 break; 800cdc0: e012 b.n 800cde8 break; 800cdc2: bf00 nop 800cdc4: e010 b.n 800cde8 break; 800cdc6: bf00 nop 800cdc8: e00e b.n 800cde8 break; 800cdca: bf00 nop 800cdcc: e00c b.n 800cde8 break; 800cdce: bf00 nop 800cdd0: e00a b.n 800cde8 break; 800cdd2: bf00 nop 800cdd4: e008 b.n 800cde8 break; 800cdd6: bf00 nop 800cdd8: e006 b.n 800cde8 break; 800cdda: bf00 nop 800cddc: e004 b.n 800cde8 break; 800cdde: bf00 nop 800cde0: e002 b.n 800cde8 break; 800cde2: bf00 nop 800cde4: e000 b.n 800cde8 break; 800cde6: bf00 nop } } 800cde8: bf00 nop 800cdea: bd98 pop {r3, r4, r7, pc} 800cdec: 200009fc .word 0x200009fc 800cdf0: 200002e8 .word 0x200002e8 800cdf4: 08016b58 .word 0x08016b58 800cdf8: 08016b78 .word 0x08016b78 0800cdfc : .Th = 10, .Tf = 50, .Tl = 0, }; void LED_Write(){ 800cdfc: b580 push {r7, lr} 800cdfe: af00 add r7, sp, #0 if(CONN.chargingError != CONN_NO_ERROR){ 800ce00: 4b34 ldr r3, [pc, #208] @ (800ced4 ) 800ce02: 7f5b ldrb r3, [r3, #29] 800ce04: 2b00 cmp r3, #0 800ce06: d003 beq.n 800ce10 LED_SetColor(&color_error); 800ce08: 4833 ldr r0, [pc, #204] @ (800ced8 ) 800ce0a: f000 f91f bl 800d04c return; 800ce0e: e05f b.n 800ced0 } switch(CONN.connState){ 800ce10: 4b30 ldr r3, [pc, #192] @ (800ced4 ) 800ce12: 785b ldrb r3, [r3, #1] 800ce14: 2b0d cmp r3, #13 800ce16: d857 bhi.n 800cec8 800ce18: a201 add r2, pc, #4 @ (adr r2, 800ce20 ) 800ce1a: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800ce1e: bf00 nop 800ce20: 0800ce59 .word 0x0800ce59 800ce24: 0800ce61 .word 0x0800ce61 800ce28: 0800ce69 .word 0x0800ce69 800ce2c: 0800ce71 .word 0x0800ce71 800ce30: 0800ce79 .word 0x0800ce79 800ce34: 0800ce81 .word 0x0800ce81 800ce38: 0800ce89 .word 0x0800ce89 800ce3c: 0800ce91 .word 0x0800ce91 800ce40: 0800ce99 .word 0x0800ce99 800ce44: 0800cea1 .word 0x0800cea1 800ce48: 0800cea9 .word 0x0800cea9 800ce4c: 0800ceb1 .word 0x0800ceb1 800ce50: 0800ceb9 .word 0x0800ceb9 800ce54: 0800cec1 .word 0x0800cec1 case Unknown: LED_SetColor(&color_unknown); 800ce58: 4820 ldr r0, [pc, #128] @ (800cedc ) 800ce5a: f000 f8f7 bl 800d04c break; 800ce5e: e037 b.n 800ced0 case Unplugged: LED_SetColor(&color_unplugged); 800ce60: 481f ldr r0, [pc, #124] @ (800cee0 ) 800ce62: f000 f8f3 bl 800d04c break; 800ce66: e033 b.n 800ced0 case Disabled: LED_SetColor(&color_error); 800ce68: 481b ldr r0, [pc, #108] @ (800ced8 ) 800ce6a: f000 f8ef bl 800d04c break; 800ce6e: e02f b.n 800ced0 case Preparing: LED_SetColor(&color_preparing); 800ce70: 481c ldr r0, [pc, #112] @ (800cee4 ) 800ce72: f000 f8eb bl 800d04c break; 800ce76: e02b b.n 800ced0 case AuthRequired: LED_SetColor(&color_preparing); 800ce78: 481a ldr r0, [pc, #104] @ (800cee4 ) 800ce7a: f000 f8e7 bl 800d04c break; 800ce7e: e027 b.n 800ced0 case WaitingForEnergy: LED_SetColor(&color_charging); 800ce80: 4819 ldr r0, [pc, #100] @ (800cee8 ) 800ce82: f000 f8e3 bl 800d04c break; 800ce86: e023 b.n 800ced0 case ChargingPausedEV: LED_SetColor(&color_charging); 800ce88: 4817 ldr r0, [pc, #92] @ (800cee8 ) 800ce8a: f000 f8df bl 800d04c break; 800ce8e: e01f b.n 800ced0 case ChargingPausedEVSE: LED_SetColor(&color_charging); 800ce90: 4815 ldr r0, [pc, #84] @ (800cee8 ) 800ce92: f000 f8db bl 800d04c break; 800ce96: e01b b.n 800ced0 case Charging: LED_SetColor(&color_charging); 800ce98: 4813 ldr r0, [pc, #76] @ (800cee8 ) 800ce9a: f000 f8d7 bl 800d04c break; 800ce9e: e017 b.n 800ced0 case AuthTimeout: LED_SetColor(&color_finished); 800cea0: 4812 ldr r0, [pc, #72] @ (800ceec ) 800cea2: f000 f8d3 bl 800d04c break; 800cea6: e013 b.n 800ced0 case Finished: LED_SetColor(&color_finished); 800cea8: 4810 ldr r0, [pc, #64] @ (800ceec ) 800ceaa: f000 f8cf bl 800d04c break; 800ceae: e00f b.n 800ced0 case FinishedEVSE: LED_SetColor(&color_finished); 800ceb0: 480e ldr r0, [pc, #56] @ (800ceec ) 800ceb2: f000 f8cb bl 800d04c break; 800ceb6: e00b b.n 800ced0 case FinishedEV: LED_SetColor(&color_finished); 800ceb8: 480c ldr r0, [pc, #48] @ (800ceec ) 800ceba: f000 f8c7 bl 800d04c break; 800cebe: e007 b.n 800ced0 case Replugging: LED_SetColor(&color_preparing); 800cec0: 4808 ldr r0, [pc, #32] @ (800cee4 ) 800cec2: f000 f8c3 bl 800d04c break; 800cec6: e003 b.n 800ced0 default: LED_SetColor(&color_unknown); 800cec8: 4804 ldr r0, [pc, #16] @ (800cedc ) 800ceca: f000 f8bf bl 800d04c break; 800cece: bf00 nop } } 800ced0: bd80 pop {r7, pc} 800ced2: bf00 nop 800ced4: 200002e8 .word 0x200002e8 800ced8: 20000054 .word 0x20000054 800cedc: 20000018 .word 0x20000018 800cee0: 20000024 .word 0x20000024 800cee4: 20000030 .word 0x20000030 800cee8: 2000003c .word 0x2000003c 800ceec: 20000048 .word 0x20000048 0800cef0 : void interpolateColors(RGB_t* color1, RGB_t* color2, uint16_t a, uint16_t b, RGB_t *result) { 800cef0: b480 push {r7} 800cef2: b087 sub sp, #28 800cef4: af00 add r7, sp, #0 800cef6: 60f8 str r0, [r7, #12] 800cef8: 60b9 str r1, [r7, #8] 800cefa: 4611 mov r1, r2 800cefc: 461a mov r2, r3 800cefe: 460b mov r3, r1 800cf00: 80fb strh r3, [r7, #6] 800cf02: 4613 mov r3, r2 800cf04: 80bb strh r3, [r7, #4] // Проверяем, чтобы a не выходила за пределы диапазона if (a > b) a = b; 800cf06: 88fa ldrh r2, [r7, #6] 800cf08: 88bb ldrh r3, [r7, #4] 800cf0a: 429a cmp r2, r3 800cf0c: d901 bls.n 800cf12 800cf0e: 88bb ldrh r3, [r7, #4] 800cf10: 80fb strh r3, [r7, #6] if(b==0) b = 1; 800cf12: 88bb ldrh r3, [r7, #4] 800cf14: 2b00 cmp r3, #0 800cf16: d101 bne.n 800cf1c 800cf18: 2301 movs r3, #1 800cf1a: 80bb strh r3, [r7, #4] // Вычисляем коэффициент смешивания в виде целого числа uint16_t t = (a * 255) / b; // t будет от 0 до 255 800cf1c: 88fa ldrh r2, [r7, #6] 800cf1e: 4613 mov r3, r2 800cf20: 021b lsls r3, r3, #8 800cf22: 1a9a subs r2, r3, r2 800cf24: 88bb ldrh r3, [r7, #4] 800cf26: fb92 f3f3 sdiv r3, r2, r3 800cf2a: 82fb strh r3, [r7, #22] // Линейная интерполяция с использованием целых чисел result->R = (color1->R * (255 - t) + color2->R * t) / 255; 800cf2c: 68fb ldr r3, [r7, #12] 800cf2e: 781b ldrb r3, [r3, #0] 800cf30: 461a mov r2, r3 800cf32: 8afb ldrh r3, [r7, #22] 800cf34: f1c3 03ff rsb r3, r3, #255 @ 0xff 800cf38: fb03 f202 mul.w r2, r3, r2 800cf3c: 68bb ldr r3, [r7, #8] 800cf3e: 781b ldrb r3, [r3, #0] 800cf40: 4619 mov r1, r3 800cf42: 8afb ldrh r3, [r7, #22] 800cf44: fb01 f303 mul.w r3, r1, r3 800cf48: 4413 add r3, r2 800cf4a: 4a20 ldr r2, [pc, #128] @ (800cfcc ) 800cf4c: fb82 1203 smull r1, r2, r2, r3 800cf50: 441a add r2, r3 800cf52: 11d2 asrs r2, r2, #7 800cf54: 17db asrs r3, r3, #31 800cf56: 1ad3 subs r3, r2, r3 800cf58: b2da uxtb r2, r3 800cf5a: 6a3b ldr r3, [r7, #32] 800cf5c: 701a strb r2, [r3, #0] result->G = (color1->G * (255 - t) + color2->G * t) / 255; 800cf5e: 68fb ldr r3, [r7, #12] 800cf60: 785b ldrb r3, [r3, #1] 800cf62: 461a mov r2, r3 800cf64: 8afb ldrh r3, [r7, #22] 800cf66: f1c3 03ff rsb r3, r3, #255 @ 0xff 800cf6a: fb03 f202 mul.w r2, r3, r2 800cf6e: 68bb ldr r3, [r7, #8] 800cf70: 785b ldrb r3, [r3, #1] 800cf72: 4619 mov r1, r3 800cf74: 8afb ldrh r3, [r7, #22] 800cf76: fb01 f303 mul.w r3, r1, r3 800cf7a: 4413 add r3, r2 800cf7c: 4a13 ldr r2, [pc, #76] @ (800cfcc ) 800cf7e: fb82 1203 smull r1, r2, r2, r3 800cf82: 441a add r2, r3 800cf84: 11d2 asrs r2, r2, #7 800cf86: 17db asrs r3, r3, #31 800cf88: 1ad3 subs r3, r2, r3 800cf8a: b2da uxtb r2, r3 800cf8c: 6a3b ldr r3, [r7, #32] 800cf8e: 705a strb r2, [r3, #1] result->B = (color1->B * (255 - t) + color2->B * t) / 255; 800cf90: 68fb ldr r3, [r7, #12] 800cf92: 789b ldrb r3, [r3, #2] 800cf94: 461a mov r2, r3 800cf96: 8afb ldrh r3, [r7, #22] 800cf98: f1c3 03ff rsb r3, r3, #255 @ 0xff 800cf9c: fb03 f202 mul.w r2, r3, r2 800cfa0: 68bb ldr r3, [r7, #8] 800cfa2: 789b ldrb r3, [r3, #2] 800cfa4: 4619 mov r1, r3 800cfa6: 8afb ldrh r3, [r7, #22] 800cfa8: fb01 f303 mul.w r3, r1, r3 800cfac: 4413 add r3, r2 800cfae: 4a07 ldr r2, [pc, #28] @ (800cfcc ) 800cfb0: fb82 1203 smull r1, r2, r2, r3 800cfb4: 441a add r2, r3 800cfb6: 11d2 asrs r2, r2, #7 800cfb8: 17db asrs r3, r3, #31 800cfba: 1ad3 subs r3, r2, r3 800cfbc: b2da uxtb r2, r3 800cfbe: 6a3b ldr r3, [r7, #32] 800cfc0: 709a strb r2, [r3, #2] } 800cfc2: bf00 nop 800cfc4: 371c adds r7, #28 800cfc6: 46bd mov sp, r7 800cfc8: bc80 pop {r7} 800cfca: 4770 bx lr 800cfcc: 80808081 .word 0x80808081 0800cfd0 : void RGB_SetColor(RGB_t *color){ 800cfd0: b480 push {r7} 800cfd2: b083 sub sp, #12 800cfd4: af00 add r7, sp, #0 800cfd6: 6078 str r0, [r7, #4] htim4.Instance->CCR2 = color->R * 100 / 255; 800cfd8: 687b ldr r3, [r7, #4] 800cfda: 781b ldrb r3, [r3, #0] 800cfdc: 461a mov r2, r3 800cfde: 2364 movs r3, #100 @ 0x64 800cfe0: fb02 f303 mul.w r3, r2, r3 800cfe4: 4a17 ldr r2, [pc, #92] @ (800d044 ) 800cfe6: fb82 1203 smull r1, r2, r2, r3 800cfea: 441a add r2, r3 800cfec: 11d2 asrs r2, r2, #7 800cfee: 17db asrs r3, r3, #31 800cff0: 1ad2 subs r2, r2, r3 800cff2: 4b15 ldr r3, [pc, #84] @ (800d048 ) 800cff4: 681b ldr r3, [r3, #0] 800cff6: 639a str r2, [r3, #56] @ 0x38 htim4.Instance->CCR3 = color->G * 100 / 255; 800cff8: 687b ldr r3, [r7, #4] 800cffa: 785b ldrb r3, [r3, #1] 800cffc: 461a mov r2, r3 800cffe: 2364 movs r3, #100 @ 0x64 800d000: fb02 f303 mul.w r3, r2, r3 800d004: 4a0f ldr r2, [pc, #60] @ (800d044 ) 800d006: fb82 1203 smull r1, r2, r2, r3 800d00a: 441a add r2, r3 800d00c: 11d2 asrs r2, r2, #7 800d00e: 17db asrs r3, r3, #31 800d010: 1ad2 subs r2, r2, r3 800d012: 4b0d ldr r3, [pc, #52] @ (800d048 ) 800d014: 681b ldr r3, [r3, #0] 800d016: 63da str r2, [r3, #60] @ 0x3c htim4.Instance->CCR4 = color->B * 100 / 255; 800d018: 687b ldr r3, [r7, #4] 800d01a: 789b ldrb r3, [r3, #2] 800d01c: 461a mov r2, r3 800d01e: 2364 movs r3, #100 @ 0x64 800d020: fb02 f303 mul.w r3, r2, r3 800d024: 4a07 ldr r2, [pc, #28] @ (800d044 ) 800d026: fb82 1203 smull r1, r2, r2, r3 800d02a: 441a add r2, r3 800d02c: 11d2 asrs r2, r2, #7 800d02e: 17db asrs r3, r3, #31 800d030: 1ad2 subs r2, r2, r3 800d032: 4b05 ldr r3, [pc, #20] @ (800d048 ) 800d034: 681b ldr r3, [r3, #0] 800d036: 641a str r2, [r3, #64] @ 0x40 } 800d038: bf00 nop 800d03a: 370c adds r7, #12 800d03c: 46bd mov sp, r7 800d03e: bc80 pop {r7} 800d040: 4770 bx lr 800d042: bf00 nop 800d044: 80808081 .word 0x80808081 800d048: 20000cf8 .word 0x20000cf8 0800d04c : void LED_SetColor(RGB_Cycle_t *color){ 800d04c: b480 push {r7} 800d04e: b083 sub sp, #12 800d050: af00 add r7, sp, #0 800d052: 6078 str r0, [r7, #4] memcpy(&LED_Cycle, color, sizeof(RGB_Cycle_t)); 800d054: 4b05 ldr r3, [pc, #20] @ (800d06c ) 800d056: 687a ldr r2, [r7, #4] 800d058: 6810 ldr r0, [r2, #0] 800d05a: 6851 ldr r1, [r2, #4] 800d05c: c303 stmia r3!, {r0, r1} 800d05e: 8912 ldrh r2, [r2, #8] 800d060: 801a strh r2, [r3, #0] } 800d062: bf00 nop 800d064: 370c adds r7, #12 800d066: 46bd mov sp, r7 800d068: bc80 pop {r7} 800d06a: 4770 bx lr 800d06c: 20000a5c .word 0x20000a5c 0800d070 : void LED_Init(){ 800d070: b580 push {r7, lr} 800d072: b082 sub sp, #8 800d074: af00 add r7, sp, #0 RGB_t color = {.R=0, .G=0, .B=0}; 800d076: 2300 movs r3, #0 800d078: 713b strb r3, [r7, #4] 800d07a: 2300 movs r3, #0 800d07c: 717b strb r3, [r7, #5] 800d07e: 2300 movs r3, #0 800d080: 71bb strb r3, [r7, #6] HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_2); 800d082: 2104 movs r1, #4 800d084: 4809 ldr r0, [pc, #36] @ (800d0ac ) 800d086: f004 fddf bl 8011c48 HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); 800d08a: 2108 movs r1, #8 800d08c: 4807 ldr r0, [pc, #28] @ (800d0ac ) 800d08e: f004 fddb bl 8011c48 HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_4); 800d092: 210c movs r1, #12 800d094: 4805 ldr r0, [pc, #20] @ (800d0ac ) 800d096: f004 fdd7 bl 8011c48 RGB_SetColor(&color); 800d09a: 1d3b adds r3, r7, #4 800d09c: 4618 mov r0, r3 800d09e: f7ff ff97 bl 800cfd0 } 800d0a2: bf00 nop 800d0a4: 3708 adds r7, #8 800d0a6: 46bd mov sp, r7 800d0a8: bd80 pop {r7, pc} 800d0aa: bf00 nop 800d0ac: 20000cf8 .word 0x20000cf8 0800d0b0 : // } // } // } // } void LED_Task(){ 800d0b0: b580 push {r7, lr} 800d0b2: b082 sub sp, #8 800d0b4: af02 add r7, sp, #8 static uint32_t led_tick; if((HAL_GetTick() - led_tick) > 20){ 800d0b6: f001 fb8b bl 800e7d0 800d0ba: 4602 mov r2, r0 800d0bc: 4b46 ldr r3, [pc, #280] @ (800d1d8 ) 800d0be: 681b ldr r3, [r3, #0] 800d0c0: 1ad3 subs r3, r2, r3 800d0c2: 2b14 cmp r3, #20 800d0c4: f240 8085 bls.w 800d1d2 led_tick = HAL_GetTick(); 800d0c8: f001 fb82 bl 800e7d0 800d0cc: 4603 mov r3, r0 800d0ce: 4a42 ldr r2, [pc, #264] @ (800d1d8 ) 800d0d0: 6013 str r3, [r2, #0] LED_State.tick++; 800d0d2: 4b42 ldr r3, [pc, #264] @ (800d1dc ) 800d0d4: 885b ldrh r3, [r3, #2] 800d0d6: 3301 adds r3, #1 800d0d8: b29a uxth r2, r3 800d0da: 4b40 ldr r3, [pc, #256] @ (800d1dc ) 800d0dc: 805a strh r2, [r3, #2] // LED_PhaseSync(led_n); switch(LED_State.state){ 800d0de: 4b3f ldr r3, [pc, #252] @ (800d1dc ) 800d0e0: 781b ldrb r3, [r3, #0] 800d0e2: 2b03 cmp r3, #3 800d0e4: d867 bhi.n 800d1b6 800d0e6: a201 add r2, pc, #4 @ (adr r2, 800d0ec ) 800d0e8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d0ec: 0800d0fd .word 0x0800d0fd 800d0f0: 0800d12f .word 0x0800d12f 800d0f4: 0800d15b .word 0x0800d15b 800d0f8: 0800d18d .word 0x0800d18d case LED_RISING: interpolateColors(&LED_Cycle.Color2, &LED_Cycle.Color1, LED_State.tick, LED_Cycle.Tr, &LED_State.color); 800d0fc: 4b37 ldr r3, [pc, #220] @ (800d1dc ) 800d0fe: 885a ldrh r2, [r3, #2] 800d100: 4b37 ldr r3, [pc, #220] @ (800d1e0 ) 800d102: 78db ldrb r3, [r3, #3] 800d104: 4619 mov r1, r3 800d106: 4b37 ldr r3, [pc, #220] @ (800d1e4 ) 800d108: 9300 str r3, [sp, #0] 800d10a: 460b mov r3, r1 800d10c: 4934 ldr r1, [pc, #208] @ (800d1e0 ) 800d10e: 4836 ldr r0, [pc, #216] @ (800d1e8 ) 800d110: f7ff feee bl 800cef0 if(LED_State.tick>LED_Cycle.Tr){ 800d114: 4b31 ldr r3, [pc, #196] @ (800d1dc ) 800d116: 885b ldrh r3, [r3, #2] 800d118: 4a31 ldr r2, [pc, #196] @ (800d1e0 ) 800d11a: 78d2 ldrb r2, [r2, #3] 800d11c: 4293 cmp r3, r2 800d11e: d94e bls.n 800d1be LED_State.state = LED_HIGH; 800d120: 4b2e ldr r3, [pc, #184] @ (800d1dc ) 800d122: 2201 movs r2, #1 800d124: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d126: 4b2d ldr r3, [pc, #180] @ (800d1dc ) 800d128: 2200 movs r2, #0 800d12a: 805a strh r2, [r3, #2] } break; 800d12c: e047 b.n 800d1be case LED_HIGH: memcpy(&LED_State.color, &LED_Cycle.Color1, sizeof(RGB_t)); 800d12e: 4b2b ldr r3, [pc, #172] @ (800d1dc ) 800d130: 4a2b ldr r2, [pc, #172] @ (800d1e0 ) 800d132: 3304 adds r3, #4 800d134: 6812 ldr r2, [r2, #0] 800d136: 4611 mov r1, r2 800d138: 8019 strh r1, [r3, #0] 800d13a: 3302 adds r3, #2 800d13c: 0c12 lsrs r2, r2, #16 800d13e: 701a strb r2, [r3, #0] if(LED_State.tick>LED_Cycle.Th){ 800d140: 4b26 ldr r3, [pc, #152] @ (800d1dc ) 800d142: 885b ldrh r3, [r3, #2] 800d144: 4a26 ldr r2, [pc, #152] @ (800d1e0 ) 800d146: 7912 ldrb r2, [r2, #4] 800d148: 4293 cmp r3, r2 800d14a: d93a bls.n 800d1c2 LED_State.state = LED_FALLING; 800d14c: 4b23 ldr r3, [pc, #140] @ (800d1dc ) 800d14e: 2202 movs r2, #2 800d150: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d152: 4b22 ldr r3, [pc, #136] @ (800d1dc ) 800d154: 2200 movs r2, #0 800d156: 805a strh r2, [r3, #2] } break; 800d158: e033 b.n 800d1c2 case LED_FALLING: interpolateColors(&LED_Cycle.Color1, &LED_Cycle.Color2, LED_State.tick, LED_Cycle.Tf, &LED_State.color); 800d15a: 4b20 ldr r3, [pc, #128] @ (800d1dc ) 800d15c: 885a ldrh r2, [r3, #2] 800d15e: 4b20 ldr r3, [pc, #128] @ (800d1e0 ) 800d160: 795b ldrb r3, [r3, #5] 800d162: 4619 mov r1, r3 800d164: 4b1f ldr r3, [pc, #124] @ (800d1e4 ) 800d166: 9300 str r3, [sp, #0] 800d168: 460b mov r3, r1 800d16a: 491f ldr r1, [pc, #124] @ (800d1e8 ) 800d16c: 481c ldr r0, [pc, #112] @ (800d1e0 ) 800d16e: f7ff febf bl 800cef0 if(LED_State.tick>LED_Cycle.Tf){ 800d172: 4b1a ldr r3, [pc, #104] @ (800d1dc ) 800d174: 885b ldrh r3, [r3, #2] 800d176: 4a1a ldr r2, [pc, #104] @ (800d1e0 ) 800d178: 7952 ldrb r2, [r2, #5] 800d17a: 4293 cmp r3, r2 800d17c: d923 bls.n 800d1c6 LED_State.state = LED_LOW; 800d17e: 4b17 ldr r3, [pc, #92] @ (800d1dc ) 800d180: 2203 movs r2, #3 800d182: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d184: 4b15 ldr r3, [pc, #84] @ (800d1dc ) 800d186: 2200 movs r2, #0 800d188: 805a strh r2, [r3, #2] } break; 800d18a: e01c b.n 800d1c6 case LED_LOW: memcpy(&LED_State.color, &LED_Cycle.Color2, sizeof(RGB_t)); 800d18c: 4b13 ldr r3, [pc, #76] @ (800d1dc ) 800d18e: 4a14 ldr r2, [pc, #80] @ (800d1e0 ) 800d190: 3304 adds r3, #4 800d192: 3207 adds r2, #7 800d194: 8811 ldrh r1, [r2, #0] 800d196: 7892 ldrb r2, [r2, #2] 800d198: 8019 strh r1, [r3, #0] 800d19a: 709a strb r2, [r3, #2] if(LED_State.tick>LED_Cycle.Tl){ 800d19c: 4b0f ldr r3, [pc, #60] @ (800d1dc ) 800d19e: 885b ldrh r3, [r3, #2] 800d1a0: 4a0f ldr r2, [pc, #60] @ (800d1e0 ) 800d1a2: 7992 ldrb r2, [r2, #6] 800d1a4: 4293 cmp r3, r2 800d1a6: d910 bls.n 800d1ca LED_State.state = LED_RISING; 800d1a8: 4b0c ldr r3, [pc, #48] @ (800d1dc ) 800d1aa: 2200 movs r2, #0 800d1ac: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d1ae: 4b0b ldr r3, [pc, #44] @ (800d1dc ) 800d1b0: 2200 movs r2, #0 800d1b2: 805a strh r2, [r3, #2] } break; 800d1b4: e009 b.n 800d1ca default: LED_State.state = LED_RISING; 800d1b6: 4b09 ldr r3, [pc, #36] @ (800d1dc ) 800d1b8: 2200 movs r2, #0 800d1ba: 701a strb r2, [r3, #0] 800d1bc: e006 b.n 800d1cc break; 800d1be: bf00 nop 800d1c0: e004 b.n 800d1cc break; 800d1c2: bf00 nop 800d1c4: e002 b.n 800d1cc break; 800d1c6: bf00 nop 800d1c8: e000 b.n 800d1cc break; 800d1ca: bf00 nop } RGB_SetColor(&LED_State.color); 800d1cc: 4805 ldr r0, [pc, #20] @ (800d1e4 ) 800d1ce: f7ff feff bl 800cfd0 } } 800d1d2: bf00 nop 800d1d4: 46bd mov sp, r7 800d1d6: bd80 pop {r7, pc} 800d1d8: 20000a68 .word 0x20000a68 800d1dc: 20000a54 .word 0x20000a54 800d1e0: 20000a5c .word 0x20000a5c 800d1e4: 20000a58 .word 0x20000a58 800d1e8: 20000a63 .word 0x20000a63 0800d1ec : RTC_HandleTypeDef hrtc; /* RTC init function */ void MX_RTC_Init(void) { 800d1ec: b580 push {r7, lr} 800d1ee: af00 add r7, sp, #0 /* USER CODE END RTC_Init 1 */ /** Initialize RTC Only */ hrtc.Instance = RTC; 800d1f0: 4b0a ldr r3, [pc, #40] @ (800d21c ) 800d1f2: 4a0b ldr r2, [pc, #44] @ (800d220 ) 800d1f4: 601a str r2, [r3, #0] hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND; 800d1f6: 4b09 ldr r3, [pc, #36] @ (800d21c ) 800d1f8: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800d1fc: 605a str r2, [r3, #4] hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM; 800d1fe: 4b07 ldr r3, [pc, #28] @ (800d21c ) 800d200: f44f 7280 mov.w r2, #256 @ 0x100 800d204: 609a str r2, [r3, #8] if (HAL_RTC_Init(&hrtc) != HAL_OK) 800d206: 4805 ldr r0, [pc, #20] @ (800d21c ) 800d208: f004 fb6e bl 80118e8 800d20c: 4603 mov r3, r0 800d20e: 2b00 cmp r3, #0 800d210: d001 beq.n 800d216 { Error_Handler(); 800d212: f7ff f869 bl 800c2e8 } /* USER CODE BEGIN RTC_Init 2 */ /* USER CODE END RTC_Init 2 */ } 800d216: bf00 nop 800d218: bd80 pop {r7, pc} 800d21a: bf00 nop 800d21c: 20000a6c .word 0x20000a6c 800d220: 40002800 .word 0x40002800 0800d224 : void HAL_RTC_MspInit(RTC_HandleTypeDef* rtcHandle) { 800d224: b580 push {r7, lr} 800d226: b084 sub sp, #16 800d228: af00 add r7, sp, #0 800d22a: 6078 str r0, [r7, #4] if(rtcHandle->Instance==RTC) 800d22c: 687b ldr r3, [r7, #4] 800d22e: 681b ldr r3, [r3, #0] 800d230: 4a0b ldr r2, [pc, #44] @ (800d260 ) 800d232: 4293 cmp r3, r2 800d234: d110 bne.n 800d258 { /* USER CODE BEGIN RTC_MspInit 0 */ /* USER CODE END RTC_MspInit 0 */ HAL_PWR_EnableBkUpAccess(); 800d236: f003 faeb bl 8010810 /* Enable BKP CLK enable for backup registers */ __HAL_RCC_BKP_CLK_ENABLE(); 800d23a: 4b0a ldr r3, [pc, #40] @ (800d264 ) 800d23c: 69db ldr r3, [r3, #28] 800d23e: 4a09 ldr r2, [pc, #36] @ (800d264 ) 800d240: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 800d244: 61d3 str r3, [r2, #28] 800d246: 4b07 ldr r3, [pc, #28] @ (800d264 ) 800d248: 69db ldr r3, [r3, #28] 800d24a: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 800d24e: 60fb str r3, [r7, #12] 800d250: 68fb ldr r3, [r7, #12] /* RTC clock enable */ __HAL_RCC_RTC_ENABLE(); 800d252: 4b05 ldr r3, [pc, #20] @ (800d268 ) 800d254: 2201 movs r2, #1 800d256: 601a str r2, [r3, #0] /* USER CODE BEGIN RTC_MspInit 1 */ /* USER CODE END RTC_MspInit 1 */ } } 800d258: bf00 nop 800d25a: 3710 adds r7, #16 800d25c: 46bd mov sp, r7 800d25e: bd80 pop {r7, pc} 800d260: 40002800 .word 0x40002800 800d264: 40021000 .word 0x40021000 800d268: 4242043c .word 0x4242043c 0800d26c : .fw_version_major = 0, .fw_version_minor = 0, .fw_version_patch = 0, }; void ReadVersion(){ 800d26c: b480 push {r7} 800d26e: af00 add r7, sp, #0 infoPacket.serialNumber = InfoBlock->serialNumber; 800d270: 4b0e ldr r3, [pc, #56] @ (800d2ac ) 800d272: 681b ldr r3, [r3, #0] 800d274: 681b ldr r3, [r3, #0] 800d276: b29a uxth r2, r3 800d278: 4b0d ldr r3, [pc, #52] @ (800d2b0 ) 800d27a: 801a strh r2, [r3, #0] infoPacket.boardVersion = InfoBlock->boardVersion; 800d27c: 4b0b ldr r3, [pc, #44] @ (800d2ac ) 800d27e: 681b ldr r3, [r3, #0] 800d280: 795a ldrb r2, [r3, #5] 800d282: 4b0b ldr r3, [pc, #44] @ (800d2b0 ) 800d284: 709a strb r2, [r3, #2] infoPacket.stationType = InfoBlock->stationType; 800d286: 4b09 ldr r3, [pc, #36] @ (800d2ac ) 800d288: 681b ldr r3, [r3, #0] 800d28a: 791a ldrb r2, [r3, #4] 800d28c: 4b08 ldr r3, [pc, #32] @ (800d2b0 ) 800d28e: 70da strb r2, [r3, #3] infoPacket.fw_version_major = FW_VERSION_MAJOR; 800d290: 4b07 ldr r3, [pc, #28] @ (800d2b0 ) 800d292: 2201 movs r2, #1 800d294: 809a strh r2, [r3, #4] infoPacket.fw_version_minor = FW_VERSION_MINOR; 800d296: 4b06 ldr r3, [pc, #24] @ (800d2b0 ) 800d298: 2200 movs r2, #0 800d29a: 80da strh r2, [r3, #6] infoPacket.fw_version_patch = FW_VERSION_PATCH; 800d29c: 4b04 ldr r3, [pc, #16] @ (800d2b0 ) 800d29e: 2201 movs r2, #1 800d2a0: 811a strh r2, [r3, #8] } 800d2a2: bf00 nop 800d2a4: 46bd mov sp, r7 800d2a6: bc80 pop {r7} 800d2a8: 4770 bx lr 800d2aa: bf00 nop 800d2ac: 20000000 .word 0x20000000 800d2b0: 20000ce8 .word 0x20000ce8 0800d2b4 : // Внешняя функция обработки команд (определена в serial_handler.c) extern void SC_CommandHandler(ReceivedCommand_t* cmd); void SC_Init() { 800d2b4: b580 push {r7, lr} 800d2b6: af00 add r7, sp, #0 // Обнуляем структуру memset(&serial_control, 0, sizeof(SerialControl_t)); 800d2b8: f44f 7204 mov.w r2, #528 @ 0x210 800d2bc: 2100 movs r1, #0 800d2be: 4802 ldr r0, [pc, #8] @ (800d2c8 ) 800d2c0: f006 fee6 bl 8014090 } 800d2c4: bf00 nop 800d2c6: bd80 pop {r7, pc} 800d2c8: 20000a80 .word 0x20000a80 0800d2cc : void SC_Task() { 800d2cc: b580 push {r7, lr} 800d2ce: af00 add r7, sp, #0 // Запуск приема в режиме прерывания с ожиданием idle if((huart2.RxState == HAL_UART_STATE_READY) && (serial_control.command_ready == 0)) HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d2d0: 4b25 ldr r3, [pc, #148] @ (800d368 ) 800d2d2: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800d2d6: b2db uxtb r3, r3 800d2d8: 2b20 cmp r3, #32 800d2da: d10a bne.n 800d2f2 800d2dc: 4b23 ldr r3, [pc, #140] @ (800d36c ) 800d2de: f893 3208 ldrb.w r3, [r3, #520] @ 0x208 800d2e2: b2db uxtb r3, r3 800d2e4: 2b00 cmp r3, #0 800d2e6: d104 bne.n 800d2f2 800d2e8: 22ff movs r2, #255 @ 0xff 800d2ea: 4921 ldr r1, [pc, #132] @ (800d370 ) 800d2ec: 481e ldr r0, [pc, #120] @ (800d368 ) 800d2ee: f005 fa84 bl 80127fa // Проверка таймаута отправки пакета (больше 100 мс) if (huart2.gState == HAL_UART_STATE_BUSY_TX && serial_control.tx_tick != 0) { 800d2f2: 4b1d ldr r3, [pc, #116] @ (800d368 ) 800d2f4: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d2f8: b2db uxtb r3, r3 800d2fa: 2b21 cmp r3, #33 @ 0x21 800d2fc: d119 bne.n 800d332 800d2fe: 4b1b ldr r3, [pc, #108] @ (800d36c ) 800d300: f8d3 320c ldr.w r3, [r3, #524] @ 0x20c 800d304: 2b00 cmp r3, #0 800d306: d014 beq.n 800d332 if ((HAL_GetTick() - serial_control.tx_tick) > 100) { 800d308: f001 fa62 bl 800e7d0 800d30c: 4602 mov r2, r0 800d30e: 4b17 ldr r3, [pc, #92] @ (800d36c ) 800d310: f8d3 320c ldr.w r3, [r3, #524] @ 0x20c 800d314: 1ad3 subs r3, r2, r3 800d316: 2b64 cmp r3, #100 @ 0x64 800d318: d90b bls.n 800d332 // Таймаут: принудительно сбрасываем передачу HAL_UART_Abort_IT(&huart2); 800d31a: 4813 ldr r0, [pc, #76] @ (800d368 ) 800d31c: f005 faca bl 80128b4 // Выключаем DIR при сбросе передачи HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 800d320: 2200 movs r2, #0 800d322: 2110 movs r1, #16 800d324: 4813 ldr r0, [pc, #76] @ (800d374 ) 800d326: f003 fa5a bl 80107de serial_control.tx_tick = 0; // Сбрасываем tick 800d32a: 4b10 ldr r3, [pc, #64] @ (800d36c ) 800d32c: 2200 movs r2, #0 800d32e: f8c3 220c str.w r2, [r3, #524] @ 0x20c } } // Проверка наличия принятой команды для обработки if (serial_control.command_ready && (huart2.gState != HAL_UART_STATE_BUSY_TX)) { 800d332: 4b0e ldr r3, [pc, #56] @ (800d36c ) 800d334: f893 3208 ldrb.w r3, [r3, #520] @ 0x208 800d338: b2db uxtb r3, r3 800d33a: 2b00 cmp r3, #0 800d33c: d011 beq.n 800d362 800d33e: 4b0a ldr r3, [pc, #40] @ (800d368 ) 800d340: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d344: b2db uxtb r3, r3 800d346: 2b21 cmp r3, #33 @ 0x21 800d348: d00b beq.n 800d362 // HAL_Delay(2); SC_CommandHandler(&serial_control.received_command); 800d34a: 480b ldr r0, [pc, #44] @ (800d378 ) 800d34c: f000 fa24 bl 800d798 HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d350: 22ff movs r2, #255 @ 0xff 800d352: 4907 ldr r1, [pc, #28] @ (800d370 ) 800d354: 4804 ldr r0, [pc, #16] @ (800d368 ) 800d356: f005 fa50 bl 80127fa serial_control.command_ready = 0; // Сбрасываем флаг 800d35a: 4b04 ldr r3, [pc, #16] @ (800d36c ) 800d35c: 2200 movs r2, #0 800d35e: f883 2208 strb.w r2, [r3, #520] @ 0x208 } } 800d362: bf00 nop 800d364: bd80 pop {r7, pc} 800d366: bf00 nop 800d368: 20000dd0 .word 0x20000dd0 800d36c: 20000a80 .word 0x20000a80 800d370: 20000b80 .word 0x20000b80 800d374: 40011400 .word 0x40011400 800d378: 20000c80 .word 0x20000c80 0800d37c : void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { 800d37c: b580 push {r7, lr} 800d37e: b082 sub sp, #8 800d380: af00 add r7, sp, #0 800d382: 6078 str r0, [r7, #4] 800d384: 460b mov r3, r1 800d386: 807b strh r3, [r7, #2] if (huart->Instance == huart2.Instance) { 800d388: 687b ldr r3, [r7, #4] 800d38a: 681a ldr r2, [r3, #0] 800d38c: 4b0a ldr r3, [pc, #40] @ (800d3b8 ) 800d38e: 681b ldr r3, [r3, #0] 800d390: 429a cmp r2, r3 800d392: d10c bne.n 800d3ae if(!process_received_packet(serial_control.rx_buffer, Size)){ 800d394: 887b ldrh r3, [r7, #2] 800d396: 4619 mov r1, r3 800d398: 4808 ldr r0, [pc, #32] @ (800d3bc ) 800d39a: f000 f98f bl 800d6bc 800d39e: 4603 mov r3, r0 800d3a0: 2b00 cmp r3, #0 800d3a2: d104 bne.n 800d3ae SC_SendPacket(NULL, 0, RESP_INVALID); 800d3a4: 2214 movs r2, #20 800d3a6: 2100 movs r1, #0 800d3a8: 2000 movs r0, #0 800d3aa: f000 f94b bl 800d644 } } } 800d3ae: bf00 nop 800d3b0: 3708 adds r7, #8 800d3b2: 46bd mov sp, r7 800d3b4: bd80 pop {r7, pc} 800d3b6: bf00 nop 800d3b8: 20000dd0 .word 0x20000dd0 800d3bc: 20000b80 .word 0x20000b80 0800d3c0 : void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { 800d3c0: b580 push {r7, lr} 800d3c2: b082 sub sp, #8 800d3c4: af00 add r7, sp, #0 800d3c6: 6078 str r0, [r7, #4] if (huart->Instance == huart2.Instance) { 800d3c8: 687b ldr r3, [r7, #4] 800d3ca: 681a ldr r2, [r3, #0] 800d3cc: 4b08 ldr r3, [pc, #32] @ (800d3f0 ) 800d3ce: 681b ldr r3, [r3, #0] 800d3d0: 429a cmp r2, r3 800d3d2: d108 bne.n 800d3e6 HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 800d3d4: 2200 movs r2, #0 800d3d6: 2110 movs r1, #16 800d3d8: 4806 ldr r0, [pc, #24] @ (800d3f4 ) 800d3da: f003 fa00 bl 80107de serial_control.tx_tick = 0; 800d3de: 4b06 ldr r3, [pc, #24] @ (800d3f8 ) 800d3e0: 2200 movs r2, #0 800d3e2: f8c3 220c str.w r2, [r3, #524] @ 0x20c } } 800d3e6: bf00 nop 800d3e8: 3708 adds r7, #8 800d3ea: 46bd mov sp, r7 800d3ec: bd80 pop {r7, pc} 800d3ee: bf00 nop 800d3f0: 20000dd0 .word 0x20000dd0 800d3f4: 40011400 .word 0x40011400 800d3f8: 20000a80 .word 0x20000a80 0800d3fc : // Приватные функции реализации uint32_t revbit(uint32_t uData) { 800d3fc: b480 push {r7} 800d3fe: b085 sub sp, #20 800d400: af00 add r7, sp, #0 800d402: 6078 str r0, [r7, #4] uint32_t uRevData = 0, uIndex = 0; 800d404: 2300 movs r3, #0 800d406: 60fb str r3, [r7, #12] 800d408: 2300 movs r3, #0 800d40a: 60bb str r3, [r7, #8] uRevData |= ((uData >> uIndex) & 0x01); 800d40c: 687a ldr r2, [r7, #4] 800d40e: 68bb ldr r3, [r7, #8] 800d410: fa22 f303 lsr.w r3, r2, r3 800d414: f003 0301 and.w r3, r3, #1 800d418: 68fa ldr r2, [r7, #12] 800d41a: 4313 orrs r3, r2 800d41c: 60fb str r3, [r7, #12] for(uIndex = 1; uIndex < 32; uIndex++) { 800d41e: 2301 movs r3, #1 800d420: 60bb str r3, [r7, #8] 800d422: e00e b.n 800d442 uRevData <<= 1; 800d424: 68fb ldr r3, [r7, #12] 800d426: 005b lsls r3, r3, #1 800d428: 60fb str r3, [r7, #12] uRevData |= ((uData >> uIndex) & 0x01); 800d42a: 687a ldr r2, [r7, #4] 800d42c: 68bb ldr r3, [r7, #8] 800d42e: fa22 f303 lsr.w r3, r2, r3 800d432: f003 0301 and.w r3, r3, #1 800d436: 68fa ldr r2, [r7, #12] 800d438: 4313 orrs r3, r2 800d43a: 60fb str r3, [r7, #12] for(uIndex = 1; uIndex < 32; uIndex++) { 800d43c: 68bb ldr r3, [r7, #8] 800d43e: 3301 adds r3, #1 800d440: 60bb str r3, [r7, #8] 800d442: 68bb ldr r3, [r7, #8] 800d444: 2b1f cmp r3, #31 800d446: d9ed bls.n 800d424 } return uRevData; 800d448: 68fb ldr r3, [r7, #12] } 800d44a: 4618 mov r0, r3 800d44c: 3714 adds r7, #20 800d44e: 46bd mov sp, r7 800d450: bc80 pop {r7} 800d452: 4770 bx lr 0800d454 : uint32_t CRC32_ForBytes(uint8_t *pData, uint32_t uLen) { 800d454: b580 push {r7, lr} 800d456: b086 sub sp, #24 800d458: af00 add r7, sp, #0 800d45a: 6078 str r0, [r7, #4] 800d45c: 6039 str r1, [r7, #0] uint32_t uIndex = 0, uData = 0, i; 800d45e: 2300 movs r3, #0 800d460: 617b str r3, [r7, #20] 800d462: 2300 movs r3, #0 800d464: 60fb str r3, [r7, #12] uIndex = uLen >> 2; 800d466: 683b ldr r3, [r7, #0] 800d468: 089b lsrs r3, r3, #2 800d46a: 617b str r3, [r7, #20] SERIAL_PROTOCOL_CRC_CLK_ENABLE(); 800d46c: 4b3d ldr r3, [pc, #244] @ (800d564 ) 800d46e: 695b ldr r3, [r3, #20] 800d470: 4a3c ldr r2, [pc, #240] @ (800d564 ) 800d472: f043 0340 orr.w r3, r3, #64 @ 0x40 800d476: 6153 str r3, [r2, #20] 800d478: 4b3a ldr r3, [pc, #232] @ (800d564 ) 800d47a: 695b ldr r3, [r3, #20] 800d47c: f003 0340 and.w r3, r3, #64 @ 0x40 800d480: 60bb str r3, [r7, #8] 800d482: 68bb ldr r3, [r7, #8] __HAL_CRC_DR_RESET(&hcrc); 800d484: 4b38 ldr r3, [pc, #224] @ (800d568 ) 800d486: 681b ldr r3, [r3, #0] 800d488: 689a ldr r2, [r3, #8] 800d48a: 4b37 ldr r3, [pc, #220] @ (800d568 ) 800d48c: 681b ldr r3, [r3, #0] 800d48e: f042 0201 orr.w r2, r2, #1 800d492: 609a str r2, [r3, #8] while(uIndex--) { 800d494: e023 b.n 800d4de ((uint8_t *) & uData)[0] = pData[0]; 800d496: f107 030c add.w r3, r7, #12 800d49a: 687a ldr r2, [r7, #4] 800d49c: 7812 ldrb r2, [r2, #0] 800d49e: 701a strb r2, [r3, #0] ((uint8_t *) & uData)[1] = pData[1]; 800d4a0: f107 030c add.w r3, r7, #12 800d4a4: 3301 adds r3, #1 800d4a6: 687a ldr r2, [r7, #4] 800d4a8: 7852 ldrb r2, [r2, #1] 800d4aa: 701a strb r2, [r3, #0] ((uint8_t *) & uData)[2] = pData[2]; 800d4ac: f107 030c add.w r3, r7, #12 800d4b0: 3302 adds r3, #2 800d4b2: 687a ldr r2, [r7, #4] 800d4b4: 7892 ldrb r2, [r2, #2] 800d4b6: 701a strb r2, [r3, #0] ((uint8_t *) & uData)[3] = pData[3]; 800d4b8: f107 030c add.w r3, r7, #12 800d4bc: 3303 adds r3, #3 800d4be: 687a ldr r2, [r7, #4] 800d4c0: 78d2 ldrb r2, [r2, #3] 800d4c2: 701a strb r2, [r3, #0] pData += 4; 800d4c4: 687b ldr r3, [r7, #4] 800d4c6: 3304 adds r3, #4 800d4c8: 607b str r3, [r7, #4] uData = revbit(uData); 800d4ca: 68fb ldr r3, [r7, #12] 800d4cc: 4618 mov r0, r3 800d4ce: f7ff ff95 bl 800d3fc 800d4d2: 4603 mov r3, r0 800d4d4: 60fb str r3, [r7, #12] hcrc.Instance->DR = uData; 800d4d6: 4b24 ldr r3, [pc, #144] @ (800d568 ) 800d4d8: 681b ldr r3, [r3, #0] 800d4da: 68fa ldr r2, [r7, #12] 800d4dc: 601a str r2, [r3, #0] while(uIndex--) { 800d4de: 697b ldr r3, [r7, #20] 800d4e0: 1e5a subs r2, r3, #1 800d4e2: 617a str r2, [r7, #20] 800d4e4: 2b00 cmp r3, #0 800d4e6: d1d6 bne.n 800d496 } uData = revbit(hcrc.Instance->DR); 800d4e8: 4b1f ldr r3, [pc, #124] @ (800d568 ) 800d4ea: 681b ldr r3, [r3, #0] 800d4ec: 681b ldr r3, [r3, #0] 800d4ee: 4618 mov r0, r3 800d4f0: f7ff ff84 bl 800d3fc 800d4f4: 4603 mov r3, r0 800d4f6: 60fb str r3, [r7, #12] uIndex = uLen & 0x03; 800d4f8: 683b ldr r3, [r7, #0] 800d4fa: f003 0303 and.w r3, r3, #3 800d4fe: 617b str r3, [r7, #20] while(uIndex--) { 800d500: e01e b.n 800d540 uData ^= (uint32_t) * pData++; 800d502: 687b ldr r3, [r7, #4] 800d504: 1c5a adds r2, r3, #1 800d506: 607a str r2, [r7, #4] 800d508: 781b ldrb r3, [r3, #0] 800d50a: 461a mov r2, r3 800d50c: 68fb ldr r3, [r7, #12] 800d50e: 4053 eors r3, r2 800d510: 60fb str r3, [r7, #12] for(i = 0; i < 8; i++) 800d512: 2300 movs r3, #0 800d514: 613b str r3, [r7, #16] 800d516: e010 b.n 800d53a if (uData & 0x1) 800d518: 68fb ldr r3, [r7, #12] 800d51a: f003 0301 and.w r3, r3, #1 800d51e: 2b00 cmp r3, #0 800d520: d005 beq.n 800d52e uData = (uData >> 1) ^ CRC32_POLYNOMIAL; 800d522: 68fb ldr r3, [r7, #12] 800d524: 085a lsrs r2, r3, #1 800d526: 4b11 ldr r3, [pc, #68] @ (800d56c ) 800d528: 4053 eors r3, r2 800d52a: 60fb str r3, [r7, #12] 800d52c: e002 b.n 800d534 else uData >>= 1; 800d52e: 68fb ldr r3, [r7, #12] 800d530: 085b lsrs r3, r3, #1 800d532: 60fb str r3, [r7, #12] for(i = 0; i < 8; i++) 800d534: 693b ldr r3, [r7, #16] 800d536: 3301 adds r3, #1 800d538: 613b str r3, [r7, #16] 800d53a: 693b ldr r3, [r7, #16] 800d53c: 2b07 cmp r3, #7 800d53e: d9eb bls.n 800d518 while(uIndex--) { 800d540: 697b ldr r3, [r7, #20] 800d542: 1e5a subs r2, r3, #1 800d544: 617a str r2, [r7, #20] 800d546: 2b00 cmp r3, #0 800d548: d1db bne.n 800d502 } SERIAL_PROTOCOL_CRC_CLK_DISABLE(); 800d54a: 4b06 ldr r3, [pc, #24] @ (800d564 ) 800d54c: 695b ldr r3, [r3, #20] 800d54e: 4a05 ldr r2, [pc, #20] @ (800d564 ) 800d550: f023 0340 bic.w r3, r3, #64 @ 0x40 800d554: 6153 str r3, [r2, #20] return uData ^ 0xFFFFFFFF; 800d556: 68fb ldr r3, [r7, #12] 800d558: 43db mvns r3, r3 } 800d55a: 4618 mov r0, r3 800d55c: 3718 adds r7, #24 800d55e: 46bd mov sp, r7 800d560: bd80 pop {r7, pc} 800d562: bf00 nop 800d564: 40021000 .word 0x40021000 800d568: 200003d0 .word 0x200003d0 800d56c: edb88320 .word 0xedb88320 0800d570 : uint32_t calculate_crc32(const uint8_t* data, uint16_t length) { 800d570: b580 push {r7, lr} 800d572: b082 sub sp, #8 800d574: af00 add r7, sp, #0 800d576: 6078 str r0, [r7, #4] 800d578: 460b mov r3, r1 800d57a: 807b strh r3, [r7, #2] return CRC32_ForBytes((uint8_t*)data, (uint32_t)length); 800d57c: 887b ldrh r3, [r7, #2] 800d57e: 4619 mov r1, r3 800d580: 6878 ldr r0, [r7, #4] 800d582: f7ff ff67 bl 800d454 800d586: 4603 mov r3, r0 } 800d588: 4618 mov r0, r3 800d58a: 3708 adds r7, #8 800d58c: 46bd mov sp, r7 800d58e: bd80 pop {r7, pc} 0800d590 : uint16_t encode_packet(const uint8_t* payload, uint16_t payload_len, uint8_t* output, uint8_t response_code) { 800d590: b580 push {r7, lr} 800d592: b088 sub sp, #32 800d594: af00 add r7, sp, #0 800d596: 60f8 str r0, [r7, #12] 800d598: 607a str r2, [r7, #4] 800d59a: 461a mov r2, r3 800d59c: 460b mov r3, r1 800d59e: 817b strh r3, [r7, #10] 800d5a0: 4613 mov r3, r2 800d5a2: 727b strb r3, [r7, #9] uint16_t out_index = 0; 800d5a4: 2300 movs r3, #0 800d5a6: 83fb strh r3, [r7, #30] output[out_index++] = response_code; 800d5a8: 8bfb ldrh r3, [r7, #30] 800d5aa: 1c5a adds r2, r3, #1 800d5ac: 83fa strh r2, [r7, #30] 800d5ae: 461a mov r2, r3 800d5b0: 687b ldr r3, [r7, #4] 800d5b2: 4413 add r3, r2 800d5b4: 7a7a ldrb r2, [r7, #9] 800d5b6: 701a strb r2, [r3, #0] if (payload != NULL) { 800d5b8: 68fb ldr r3, [r7, #12] 800d5ba: 2b00 cmp r3, #0 800d5bc: d019 beq.n 800d5f2 // Просто копируем полезную нагрузку без какого‑либо экранирования for (uint16_t i = 0; i < payload_len; i++) { 800d5be: 2300 movs r3, #0 800d5c0: 83bb strh r3, [r7, #28] 800d5c2: e012 b.n 800d5ea output[out_index++] = payload[i]; 800d5c4: 8bbb ldrh r3, [r7, #28] 800d5c6: 68fa ldr r2, [r7, #12] 800d5c8: 441a add r2, r3 800d5ca: 8bfb ldrh r3, [r7, #30] 800d5cc: 1c59 adds r1, r3, #1 800d5ce: 83f9 strh r1, [r7, #30] 800d5d0: 4619 mov r1, r3 800d5d2: 687b ldr r3, [r7, #4] 800d5d4: 440b add r3, r1 800d5d6: 7812 ldrb r2, [r2, #0] 800d5d8: 701a strb r2, [r3, #0] // Проверка переполнения if (out_index >= MAX_TX_BUFFER_SIZE - 5) { // 4 байта CRC + END_BYTE 800d5da: 8bfb ldrh r3, [r7, #30] 800d5dc: 2bfa cmp r3, #250 @ 0xfa 800d5de: d901 bls.n 800d5e4 return 0; 800d5e0: 2300 movs r3, #0 800d5e2: e02a b.n 800d63a for (uint16_t i = 0; i < payload_len; i++) { 800d5e4: 8bbb ldrh r3, [r7, #28] 800d5e6: 3301 adds r3, #1 800d5e8: 83bb strh r3, [r7, #28] 800d5ea: 8bba ldrh r2, [r7, #28] 800d5ec: 897b ldrh r3, [r7, #10] 800d5ee: 429a cmp r2, r3 800d5f0: d3e8 bcc.n 800d5c4 } } } // Вычисляем CRC для всего содержимого (код ответа + полезная нагрузка) uint32_t crc = calculate_crc32(output, out_index); 800d5f2: 8bfb ldrh r3, [r7, #30] 800d5f4: 4619 mov r1, r3 800d5f6: 6878 ldr r0, [r7, #4] 800d5f8: f7ff ffba bl 800d570 800d5fc: 4603 mov r3, r0 800d5fe: 613b str r3, [r7, #16] uint8_t* crc_bytes = (uint8_t*)&crc; 800d600: f107 0310 add.w r3, r7, #16 800d604: 617b str r3, [r7, #20] // Добавляем CRC без экранирования for (int i = 0; i < 4; i++) { 800d606: 2300 movs r3, #0 800d608: 61bb str r3, [r7, #24] 800d60a: e012 b.n 800d632 output[out_index++] = crc_bytes[i]; 800d60c: 69bb ldr r3, [r7, #24] 800d60e: 697a ldr r2, [r7, #20] 800d610: 441a add r2, r3 800d612: 8bfb ldrh r3, [r7, #30] 800d614: 1c59 adds r1, r3, #1 800d616: 83f9 strh r1, [r7, #30] 800d618: 4619 mov r1, r3 800d61a: 687b ldr r3, [r7, #4] 800d61c: 440b add r3, r1 800d61e: 7812 ldrb r2, [r2, #0] 800d620: 701a strb r2, [r3, #0] if (out_index >= MAX_TX_BUFFER_SIZE - 1) { // место для END_BYTE 800d622: 8bfb ldrh r3, [r7, #30] 800d624: 2bfe cmp r3, #254 @ 0xfe 800d626: d901 bls.n 800d62c return 0; 800d628: 2300 movs r3, #0 800d62a: e006 b.n 800d63a for (int i = 0; i < 4; i++) { 800d62c: 69bb ldr r3, [r7, #24] 800d62e: 3301 adds r3, #1 800d630: 61bb str r3, [r7, #24] 800d632: 69bb ldr r3, [r7, #24] 800d634: 2b03 cmp r3, #3 800d636: dde9 ble.n 800d60c } } return out_index; 800d638: 8bfb ldrh r3, [r7, #30] } 800d63a: 4618 mov r0, r3 800d63c: 3720 adds r7, #32 800d63e: 46bd mov sp, r7 800d640: bd80 pop {r7, pc} ... 0800d644 : void SC_SendPacket(const uint8_t* payload, uint16_t payload_len, uint8_t response_code) { 800d644: b580 push {r7, lr} 800d646: b084 sub sp, #16 800d648: af00 add r7, sp, #0 800d64a: 6078 str r0, [r7, #4] 800d64c: 460b mov r3, r1 800d64e: 807b strh r3, [r7, #2] 800d650: 4613 mov r3, r2 800d652: 707b strb r3, [r7, #1] uint16_t packet_len = encode_packet(payload, payload_len, serial_control.tx_buffer, response_code); 800d654: 787b ldrb r3, [r7, #1] 800d656: 8879 ldrh r1, [r7, #2] 800d658: 4a15 ldr r2, [pc, #84] @ (800d6b0 ) 800d65a: 6878 ldr r0, [r7, #4] 800d65c: f7ff ff98 bl 800d590 800d660: 4603 mov r3, r0 800d662: 81fb strh r3, [r7, #14] if (packet_len > 0) { 800d664: 89fb ldrh r3, [r7, #14] 800d666: 2b00 cmp r3, #0 800d668: d01e beq.n 800d6a8 if (huart2.gState == HAL_UART_STATE_BUSY_TX) { 800d66a: 4b12 ldr r3, [pc, #72] @ (800d6b4 ) 800d66c: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d670: b2db uxtb r3, r3 800d672: 2b21 cmp r3, #33 @ 0x21 800d674: d107 bne.n 800d686 HAL_UART_Abort_IT(&huart2); 800d676: 480f ldr r0, [pc, #60] @ (800d6b4 ) 800d678: f005 f91c bl 80128b4 HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 800d67c: 2200 movs r2, #0 800d67e: 2110 movs r1, #16 800d680: 480d ldr r0, [pc, #52] @ (800d6b8 ) 800d682: f003 f8ac bl 80107de } HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_SET); 800d686: 2201 movs r2, #1 800d688: 2110 movs r1, #16 800d68a: 480b ldr r0, [pc, #44] @ (800d6b8 ) 800d68c: f003 f8a7 bl 80107de HAL_UART_Transmit_IT(&huart2, serial_control.tx_buffer, packet_len); 800d690: 89fb ldrh r3, [r7, #14] 800d692: 461a mov r2, r3 800d694: 4906 ldr r1, [pc, #24] @ (800d6b0 ) 800d696: 4807 ldr r0, [pc, #28] @ (800d6b4 ) 800d698: f005 f87a bl 8012790 serial_control.tx_tick = HAL_GetTick(); 800d69c: f001 f898 bl 800e7d0 800d6a0: 4603 mov r3, r0 800d6a2: 4a03 ldr r2, [pc, #12] @ (800d6b0 ) 800d6a4: f8c2 320c str.w r3, [r2, #524] @ 0x20c } } 800d6a8: bf00 nop 800d6aa: 3710 adds r7, #16 800d6ac: 46bd mov sp, r7 800d6ae: bd80 pop {r7, pc} 800d6b0: 20000a80 .word 0x20000a80 800d6b4: 20000dd0 .word 0x20000dd0 800d6b8: 40011400 .word 0x40011400 0800d6bc : uint8_t process_received_packet(const uint8_t* packet_data, uint16_t packet_len) { 800d6bc: b580 push {r7, lr} 800d6be: b086 sub sp, #24 800d6c0: af00 add r7, sp, #0 800d6c2: 6078 str r0, [r7, #4] 800d6c4: 460b mov r3, r1 800d6c6: 807b strh r3, [r7, #2] // }else{ // test_crc_invalid = 5; // } // Минимальный размер: 1 байт команды + 4 байта CRC if (packet_len < 5) return 0; 800d6c8: 887b ldrh r3, [r7, #2] 800d6ca: 2b04 cmp r3, #4 800d6cc: d801 bhi.n 800d6d2 800d6ce: 2300 movs r3, #0 800d6d0: e046 b.n 800d760 if (packet_len > MAX_RX_BUFFER_SIZE) return 0; 800d6d2: 887b ldrh r3, [r7, #2] 800d6d4: f5b3 7f80 cmp.w r3, #256 @ 0x100 800d6d8: d901 bls.n 800d6de 800d6da: 2300 movs r3, #0 800d6dc: e040 b.n 800d760 uint16_t payload_length = packet_len - 4; 800d6de: 887b ldrh r3, [r7, #2] 800d6e0: 3b04 subs r3, #4 800d6e2: 82fb strh r3, [r7, #22] // Извлекаем принятую CRC (последние 4 байта, little-endian) uint32_t received_checksum = ((uint32_t)packet_data[payload_length] << 0) | 800d6e4: 8afb ldrh r3, [r7, #22] 800d6e6: 687a ldr r2, [r7, #4] 800d6e8: 4413 add r3, r2 800d6ea: 781b ldrb r3, [r3, #0] 800d6ec: 4619 mov r1, r3 ((uint32_t)packet_data[payload_length + 1] << 8) | 800d6ee: 8afb ldrh r3, [r7, #22] 800d6f0: 3301 adds r3, #1 800d6f2: 687a ldr r2, [r7, #4] 800d6f4: 4413 add r3, r2 800d6f6: 781b ldrb r3, [r3, #0] 800d6f8: 021b lsls r3, r3, #8 ((uint32_t)packet_data[payload_length] << 0) | 800d6fa: ea41 0203 orr.w r2, r1, r3 ((uint32_t)packet_data[payload_length + 2] << 16) | 800d6fe: 8afb ldrh r3, [r7, #22] 800d700: 3302 adds r3, #2 800d702: 6879 ldr r1, [r7, #4] 800d704: 440b add r3, r1 800d706: 781b ldrb r3, [r3, #0] 800d708: 041b lsls r3, r3, #16 ((uint32_t)packet_data[payload_length + 1] << 8) | 800d70a: 431a orrs r2, r3 ((uint32_t)packet_data[payload_length + 3] << 24); 800d70c: 8afb ldrh r3, [r7, #22] 800d70e: 3303 adds r3, #3 800d710: 6879 ldr r1, [r7, #4] 800d712: 440b add r3, r1 800d714: 781b ldrb r3, [r3, #0] 800d716: 061b lsls r3, r3, #24 uint32_t received_checksum = 800d718: 4313 orrs r3, r2 800d71a: 613b str r3, [r7, #16] // Вычисляем CRC для полезной нагрузки uint32_t calculated_checksum = calculate_crc32(packet_data, payload_length); 800d71c: 8afb ldrh r3, [r7, #22] 800d71e: 4619 mov r1, r3 800d720: 6878 ldr r0, [r7, #4] 800d722: f7ff ff25 bl 800d570 800d726: 60f8 str r0, [r7, #12] if (received_checksum != calculated_checksum) return 0; // CRC не совпадает 800d728: 693a ldr r2, [r7, #16] 800d72a: 68fb ldr r3, [r7, #12] 800d72c: 429a cmp r2, r3 800d72e: d001 beq.n 800d734 800d730: 2300 movs r3, #0 800d732: e015 b.n 800d760 serial_control.received_command.argument = &packet_data[1]; 800d734: 687b ldr r3, [r7, #4] 800d736: 3301 adds r3, #1 800d738: 4a0b ldr r2, [pc, #44] @ (800d768 ) 800d73a: f8c2 3204 str.w r3, [r2, #516] @ 0x204 serial_control.received_command.command = packet_data[0]; 800d73e: 687b ldr r3, [r7, #4] 800d740: 781a ldrb r2, [r3, #0] 800d742: 4b09 ldr r3, [pc, #36] @ (800d768 ) 800d744: f883 2200 strb.w r2, [r3, #512] @ 0x200 serial_control.received_command.argument_length = payload_length - 1; 800d748: 8afb ldrh r3, [r7, #22] 800d74a: b2db uxtb r3, r3 800d74c: 3b01 subs r3, #1 800d74e: b2da uxtb r2, r3 800d750: 4b05 ldr r3, [pc, #20] @ (800d768 ) 800d752: f883 2201 strb.w r2, [r3, #513] @ 0x201 serial_control.command_ready = 1; 800d756: 4b04 ldr r3, [pc, #16] @ (800d768 ) 800d758: 2201 movs r2, #1 800d75a: f883 2208 strb.w r2, [r3, #520] @ 0x208 return 1; 800d75e: 2301 movs r3, #1 } 800d760: 4618 mov r0, r3 800d762: 3718 adds r7, #24 800d764: 46bd mov sp, r7 800d766: bd80 pop {r7, pc} 800d768: 20000a80 .word 0x20000a80 0800d76c <__NVIC_SystemReset>: /** \brief System Reset \details Initiates a system reset request to reset the MCU. */ __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) { 800d76c: b480 push {r7} 800d76e: af00 add r7, sp, #0 \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __STATIC_FORCEINLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 800d770: f3bf 8f4f dsb sy } 800d774: bf00 nop __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 800d776: 4b06 ldr r3, [pc, #24] @ (800d790 <__NVIC_SystemReset+0x24>) 800d778: 68db ldr r3, [r3, #12] 800d77a: f403 62e0 and.w r2, r3, #1792 @ 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800d77e: 4904 ldr r1, [pc, #16] @ (800d790 <__NVIC_SystemReset+0x24>) 800d780: 4b04 ldr r3, [pc, #16] @ (800d794 <__NVIC_SystemReset+0x28>) 800d782: 4313 orrs r3, r2 800d784: 60cb str r3, [r1, #12] __ASM volatile ("dsb 0xF":::"memory"); 800d786: f3bf 8f4f dsb sy } 800d78a: bf00 nop SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ __DSB(); /* Ensure completion of memory access */ for(;;) /* wait until reset */ { __NOP(); 800d78c: bf00 nop 800d78e: e7fd b.n 800d78c <__NVIC_SystemReset+0x20> 800d790: e000ed00 .word 0xe000ed00 800d794: 05fa0004 .word 0x05fa0004 0800d798 : .chargerNumber = 00001, .unixTime = 1721651966, }; // Единая функция-обработчик всех команд со switch-case void SC_CommandHandler(ReceivedCommand_t* cmd) { 800d798: b580 push {r7, lr} 800d79a: b084 sub sp, #16 800d79c: af00 add r7, sp, #0 800d79e: 6078 str r0, [r7, #4] uint8_t response_code = RESP_FAILED; 800d7a0: 2313 movs r3, #19 800d7a2: 73fb strb r3, [r7, #15] switch (cmd->command) { 800d7a4: 687b ldr r3, [r7, #4] 800d7a6: 781b ldrb r3, [r3, #0] 800d7a8: 2bc2 cmp r3, #194 @ 0xc2 800d7aa: f300 80b0 bgt.w 800d90e 800d7ae: 2bb0 cmp r3, #176 @ 0xb0 800d7b0: da09 bge.n 800d7c6 800d7b2: 2b60 cmp r3, #96 @ 0x60 800d7b4: d03c beq.n 800d830 800d7b6: 2b60 cmp r3, #96 @ 0x60 800d7b8: f300 80a9 bgt.w 800d90e 800d7bc: 2b40 cmp r3, #64 @ 0x40 800d7be: d02f beq.n 800d820 800d7c0: 2b50 cmp r3, #80 @ 0x50 800d7c2: d03b beq.n 800d83c 800d7c4: e0a3 b.n 800d90e 800d7c6: 3bb0 subs r3, #176 @ 0xb0 800d7c8: 2b12 cmp r3, #18 800d7ca: f200 80a0 bhi.w 800d90e 800d7ce: a201 add r2, pc, #4 @ (adr r2, 800d7d4 ) 800d7d0: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d7d4: 0800d843 .word 0x0800d843 800d7d8: 0800d90f .word 0x0800d90f 800d7dc: 0800d90f .word 0x0800d90f 800d7e0: 0800d90f .word 0x0800d90f 800d7e4: 0800d90f .word 0x0800d90f 800d7e8: 0800d8f3 .word 0x0800d8f3 800d7ec: 0800d90f .word 0x0800d90f 800d7f0: 0800d90f .word 0x0800d90f 800d7f4: 0800d90f .word 0x0800d90f 800d7f8: 0800d90f .word 0x0800d90f 800d7fc: 0800d90f .word 0x0800d90f 800d800: 0800d90f .word 0x0800d90f 800d804: 0800d90f .word 0x0800d90f 800d808: 0800d90f .word 0x0800d90f 800d80c: 0800d90f .word 0x0800d90f 800d810: 0800d90f .word 0x0800d90f 800d814: 0800d889 .word 0x0800d889 800d818: 0800d8ed .word 0x0800d8ed 800d81c: 0800d8c1 .word 0x0800d8c1 // Команды БЕЗ аргументов case CMD_GET_STATUS: // Логика получения информации monitoring_data_callback(); 800d820: f000 f896 bl 800d950 // Отправляем с нормальным приоритетом SC_SendPacket((uint8_t*)&statusPacket, sizeof(statusPacket), CMD_GET_STATUS); 800d824: 2240 movs r2, #64 @ 0x40 800d826: 2158 movs r1, #88 @ 0x58 800d828: 483f ldr r0, [pc, #252] @ (800d928 ) 800d82a: f7ff ff0b bl 800d644 return; // Специальный ответ уже отправлен 800d82e: e077 b.n 800d920 case CMD_GET_INFO: SC_SendPacket((uint8_t*)&infoPacket, sizeof(infoPacket), CMD_GET_INFO); 800d830: 2260 movs r2, #96 @ 0x60 800d832: 210a movs r1, #10 800d834: 483d ldr r0, [pc, #244] @ (800d92c ) 800d836: f7ff ff05 bl 800d644 return; 800d83a: e071 b.n 800d920 case CMD_GET_LOG: debug_buffer_send(); 800d83c: f7fd fdb0 bl 800b3a0 return; // Ответ формируется внутри debug_buffer_send 800d840: e06e b.n 800d920 // Команды С аргументами case CMD_SET_CONFIG: if (cmd->argument_length == sizeof(ConfigBlock_t)) { 800d842: 687b ldr r3, [r7, #4] 800d844: 785b ldrb r3, [r3, #1] 800d846: 2b0b cmp r3, #11 800d848: d11b bne.n 800d882 memcpy(&config, cmd->argument, sizeof(ConfigBlock_t)); 800d84a: 687b ldr r3, [r7, #4] 800d84c: 685a ldr r2, [r3, #4] 800d84e: 4b38 ldr r3, [pc, #224] @ (800d930 ) 800d850: 6810 ldr r0, [r2, #0] 800d852: 6851 ldr r1, [r2, #4] 800d854: c303 stmia r3!, {r0, r1} 800d856: 8911 ldrh r1, [r2, #8] 800d858: 7a92 ldrb r2, [r2, #10] 800d85a: 8019 strh r1, [r3, #0] 800d85c: 709a strb r2, [r3, #2] GBT_SetConfig(); 800d85e: f7fc fac7 bl 8009df0 config_initialized = 1; 800d862: 4b34 ldr r3, [pc, #208] @ (800d934 ) 800d864: 2201 movs r2, #1 800d866: 701a strb r2, [r3, #0] GBT_SetConfig(); 800d868: f7fc fac2 bl 8009df0 // CONN.connState = CONN_Available; // log_printf(LOG_INFO, "Set Config: %s %d\n", config.location, config.chargerNumber); 800d86c: 4b30 ldr r3, [pc, #192] @ (800d930 ) 800d86e: f8d3 3003 ldr.w r3, [r3, #3] 800d872: 4a2f ldr r2, [pc, #188] @ (800d930 ) 800d874: 4930 ldr r1, [pc, #192] @ (800d938 ) 800d876: 2007 movs r0, #7 800d878: f7fd fdf4 bl 800b464 response_code = RESP_SUCCESS; 800d87c: 2312 movs r3, #18 800d87e: 73fb strb r3, [r7, #15] break; 800d880: e048 b.n 800d914 } response_code = RESP_FAILED; 800d882: 2313 movs r3, #19 800d884: 73fb strb r3, [r7, #15] break; 800d886: e045 b.n 800d914 case CMD_SET_POWER_LIMIT: if (cmd->argument_length == 1) { 800d888: 687b ldr r3, [r7, #4] 800d88a: 785b ldrb r3, [r3, #1] 800d88c: 2b01 cmp r3, #1 800d88e: d114 bne.n 800d8ba PSU0.power_limit = ((uint8_t*)cmd->argument)[0] * 1000; 800d890: 687b ldr r3, [r7, #4] 800d892: 685b ldr r3, [r3, #4] 800d894: 781b ldrb r3, [r3, #0] 800d896: 461a mov r2, r3 800d898: f44f 737a mov.w r3, #1000 @ 0x3e8 800d89c: fb02 f303 mul.w r3, r2, r3 800d8a0: 461a mov r2, r3 800d8a2: 4b26 ldr r3, [pc, #152] @ (800d93c ) 800d8a4: 615a str r2, [r3, #20] log_printf(LOG_INFO, "Power limit: %d\n", PSU0.power_limit); 800d8a6: 4b25 ldr r3, [pc, #148] @ (800d93c ) 800d8a8: 695b ldr r3, [r3, #20] 800d8aa: 461a mov r2, r3 800d8ac: 4924 ldr r1, [pc, #144] @ (800d940 ) 800d8ae: 2007 movs r0, #7 800d8b0: f7fd fdd8 bl 800b464 //CONN.connState = (((uint8_t*)cmd->argument)[0])/4; response_code = RESP_SUCCESS; 800d8b4: 2312 movs r3, #18 800d8b6: 73fb strb r3, [r7, #15] break; 800d8b8: e02c b.n 800d914 } response_code = RESP_FAILED; 800d8ba: 2313 movs r3, #19 800d8bc: 73fb strb r3, [r7, #15] break; 800d8be: e029 b.n 800d914 case CMD_CHARGE_PERMIT: if (cmd->argument_length == 1) { 800d8c0: 687b ldr r3, [r7, #4] 800d8c2: 785b ldrb r3, [r3, #1] 800d8c4: 2b01 cmp r3, #1 800d8c6: d10e bne.n 800d8e6 CONN.connControl = ((uint8_t*)cmd->argument)[0]; 800d8c8: 687b ldr r3, [r7, #4] 800d8ca: 685b ldr r3, [r3, #4] 800d8cc: 781a ldrb r2, [r3, #0] 800d8ce: 4b1d ldr r3, [pc, #116] @ (800d944 ) 800d8d0: 701a strb r2, [r3, #0] log_printf(LOG_INFO, "Charge permit: %d\n", CONN.connControl); 800d8d2: 4b1c ldr r3, [pc, #112] @ (800d944 ) 800d8d4: 781b ldrb r3, [r3, #0] 800d8d6: 461a mov r2, r3 800d8d8: 491b ldr r1, [pc, #108] @ (800d948 ) 800d8da: 2007 movs r0, #7 800d8dc: f7fd fdc2 bl 800b464 response_code = RESP_SUCCESS; 800d8e0: 2312 movs r3, #18 800d8e2: 73fb strb r3, [r7, #15] break; 800d8e4: e016 b.n 800d914 } response_code = RESP_FAILED; 800d8e6: 2313 movs r3, #19 800d8e8: 73fb strb r3, [r7, #15] break; 800d8ea: e013 b.n 800d914 // memcpy(&PSU_TestMode, cmd->argument, sizeof(PSU_TestMode_t)); // log_printf(LOG_INFO, "Test PSU: %d %d %d\n", PSU_TestMode.enable, PSU_TestMode.voltage, PSU_TestMode.current); // response_code = RESP_SUCCESS; // break; // } response_code = RESP_FAILED; 800d8ec: 2313 movs r3, #19 800d8ee: 73fb strb r3, [r7, #15] break; 800d8f0: e010 b.n 800d914 case CMD_DEVICE_RESET: // 2. Отправляем SUCCESS (хост может успеть получить его перед ребутом) SC_SendPacket(NULL, 0, RESP_SUCCESS); 800d8f2: 2212 movs r2, #18 800d8f4: 2100 movs r1, #0 800d8f6: 2000 movs r0, #0 800d8f8: f7ff fea4 bl 800d644 while(huart2.gState == HAL_UART_STATE_BUSY_TX); // Ожидание завершения передачи 800d8fc: bf00 nop 800d8fe: 4b13 ldr r3, [pc, #76] @ (800d94c ) 800d900: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d904: b2db uxtb r3, r3 800d906: 2b21 cmp r3, #33 @ 0x21 800d908: d0f9 beq.n 800d8fe // 3. Выполняем программный сброс NVIC_SystemReset(); 800d90a: f7ff ff2f bl 800d76c <__NVIC_SystemReset> return; // Сюда код уже не дойдет, но для компилятора нужно default: // Неизвестная команда response_code = RESP_FAILED; 800d90e: 2313 movs r3, #19 800d910: 73fb strb r3, [r7, #15] break; 800d912: bf00 nop } // Отправляем финальный ответ (для команд без собственного ответа) SC_SendPacket(NULL, 0, response_code); 800d914: 7bfb ldrb r3, [r7, #15] 800d916: 461a mov r2, r3 800d918: 2100 movs r1, #0 800d91a: 2000 movs r0, #0 800d91c: f7ff fe92 bl 800d644 } 800d920: 3710 adds r7, #16 800d922: 46bd mov sp, r7 800d924: bd80 pop {r7, pc} 800d926: bf00 nop 800d928: 20000c90 .word 0x20000c90 800d92c: 20000ce8 .word 0x20000ce8 800d930: 20000060 .word 0x20000060 800d934: 20000cf2 .word 0x20000cf2 800d938: 08016b8c .word 0x08016b8c 800d93c: 200009fc .word 0x200009fc 800d940: 08016ba0 .word 0x08016ba0 800d944: 200002e8 .word 0x200002e8 800d948: 08016bb4 .word 0x08016bb4 800d94c: 20000dd0 .word 0x20000dd0 0800d950 : // Колбэк для заполнения данных мониторинга void monitoring_data_callback() { 800d950: b5b0 push {r4, r5, r7, lr} 800d952: af00 add r7, sp, #0 // Информация о зарядной сессии statusPacket.SOC = CONN.SOC; 800d954: 4b9d ldr r3, [pc, #628] @ (800dbcc ) 800d956: 789a ldrb r2, [r3, #2] 800d958: 4b9d ldr r3, [pc, #628] @ (800dbd0 ) 800d95a: 709a strb r2, [r3, #2] statusPacket.Energy = CONN.Energy; 800d95c: 4b9b ldr r3, [pc, #620] @ (800dbcc ) 800d95e: f8d3 3007 ldr.w r3, [r3, #7] 800d962: 4a9b ldr r2, [pc, #620] @ (800dbd0 ) 800d964: f8c2 3003 str.w r3, [r2, #3] statusPacket.RequestedVoltage = CONN.RequestedVoltage; 800d968: 4b98 ldr r3, [pc, #608] @ (800dbcc ) 800d96a: f8b3 300f ldrh.w r3, [r3, #15] 800d96e: b29a uxth r2, r3 800d970: 4b97 ldr r3, [pc, #604] @ (800dbd0 ) 800d972: f8a3 2007 strh.w r2, [r3, #7] statusPacket.RequestedCurrent = CONN.WantedCurrent; 800d976: 4b95 ldr r3, [pc, #596] @ (800dbcc ) 800d978: f8b3 301b ldrh.w r3, [r3, #27] 800d97c: b29a uxth r2, r3 800d97e: 4b94 ldr r3, [pc, #592] @ (800dbd0 ) 800d980: f8a3 2009 strh.w r2, [r3, #9] statusPacket.MeasuredVoltage = CONN.MeasuredVoltage; 800d984: 4b91 ldr r3, [pc, #580] @ (800dbcc ) 800d986: f8b3 3013 ldrh.w r3, [r3, #19] 800d98a: b29a uxth r2, r3 800d98c: 4b90 ldr r3, [pc, #576] @ (800dbd0 ) 800d98e: f8a3 200b strh.w r2, [r3, #11] statusPacket.MeasuredCurrent = CONN.MeasuredCurrent; 800d992: 4b8e ldr r3, [pc, #568] @ (800dbcc ) 800d994: f8b3 3015 ldrh.w r3, [r3, #21] 800d998: b29a uxth r2, r3 800d99a: 4b8d ldr r3, [pc, #564] @ (800dbd0 ) 800d99c: f8a3 200d strh.w r2, [r3, #13] statusPacket.outputEnabled = CONN.outputEnabled; 800d9a0: 4b8a ldr r3, [pc, #552] @ (800dbcc ) 800d9a2: 7e1a ldrb r2, [r3, #24] 800d9a4: 4b8a ldr r3, [pc, #552] @ (800dbd0 ) 800d9a6: 73da strb r2, [r3, #15] statusPacket.chargingError = CONN.chargingError; 800d9a8: 4b88 ldr r3, [pc, #544] @ (800dbcc ) 800d9aa: 7f5a ldrb r2, [r3, #29] 800d9ac: 4b88 ldr r3, [pc, #544] @ (800dbd0 ) 800d9ae: 705a strb r2, [r3, #1] statusPacket.connState = CONN.connState; 800d9b0: 4b86 ldr r3, [pc, #536] @ (800dbcc ) 800d9b2: 785a ldrb r2, [r3, #1] 800d9b4: 4b86 ldr r3, [pc, #536] @ (800dbd0 ) 800d9b6: 701a strb r2, [r3, #0] statusPacket.chargingElapsedTimeMin = 0; 800d9b8: 4b85 ldr r3, [pc, #532] @ (800dbd0 ) 800d9ba: 2200 movs r2, #0 800d9bc: 741a strb r2, [r3, #16] 800d9be: 2200 movs r2, #0 800d9c0: 745a strb r2, [r3, #17] statusPacket.chargingElapsedTimeSec = 0; 800d9c2: 4b83 ldr r3, [pc, #524] @ (800dbd0 ) 800d9c4: 2200 movs r2, #0 800d9c6: 749a strb r2, [r3, #18] statusPacket.estimatedRemainingChargingTime = 0; 800d9c8: 4b81 ldr r3, [pc, #516] @ (800dbd0 ) 800d9ca: 2200 movs r2, #0 800d9cc: 74da strb r2, [r3, #19] 800d9ce: 2200 movs r2, #0 800d9d0: 751a strb r2, [r3, #20] // состояние зарядной станции statusPacket.relayAC = RELAY_Read(RELAY_AC); 800d9d2: 2004 movs r0, #4 800d9d4: f7fb feee bl 80097b4 800d9d8: 4603 mov r3, r0 800d9da: f003 0301 and.w r3, r3, #1 800d9de: b2d9 uxtb r1, r3 800d9e0: 4a7b ldr r2, [pc, #492] @ (800dbd0 ) 800d9e2: 7d53 ldrb r3, [r2, #21] 800d9e4: f361 0300 bfi r3, r1, #0, #1 800d9e8: 7553 strb r3, [r2, #21] statusPacket.relayDC = RELAY_Read(RELAY_DC); 800d9ea: 2003 movs r0, #3 800d9ec: f7fb fee2 bl 80097b4 800d9f0: 4603 mov r3, r0 800d9f2: f003 0301 and.w r3, r3, #1 800d9f6: b2d9 uxtb r1, r3 800d9f8: 4a75 ldr r2, [pc, #468] @ (800dbd0 ) 800d9fa: 7d53 ldrb r3, [r2, #21] 800d9fc: f361 0341 bfi r3, r1, #1, #1 800da00: 7553 strb r3, [r2, #21] statusPacket.relayAUX = RELAY_Read(RELAY_AUX0); 800da02: 2000 movs r0, #0 800da04: f7fb fed6 bl 80097b4 800da08: 4603 mov r3, r0 800da0a: f003 0301 and.w r3, r3, #1 800da0e: b2d9 uxtb r1, r3 800da10: 4a6f ldr r2, [pc, #444] @ (800dbd0 ) 800da12: 7d53 ldrb r3, [r2, #21] 800da14: f361 0382 bfi r3, r1, #2, #1 800da18: 7553 strb r3, [r2, #21] statusPacket.lockState = GBT_LockGetState(); 800da1a: f7fe f9b1 bl 800bd80 800da1e: 4603 mov r3, r0 800da20: f003 0301 and.w r3, r3, #1 800da24: b2d9 uxtb r1, r3 800da26: 4a6a ldr r2, [pc, #424] @ (800dbd0 ) 800da28: 7d53 ldrb r3, [r2, #21] 800da2a: f361 03c3 bfi r3, r1, #3, #1 800da2e: 7553 strb r3, [r2, #21] statusPacket.stopButton = !IN_ReadInput(IN_ESTOP); 800da30: 2003 movs r0, #3 800da32: f7fb fecf bl 80097d4 800da36: 4603 mov r3, r0 800da38: 2b00 cmp r3, #0 800da3a: bf0c ite eq 800da3c: 2301 moveq r3, #1 800da3e: 2300 movne r3, #0 800da40: b2d9 uxtb r1, r3 800da42: 4a63 ldr r2, [pc, #396] @ (800dbd0 ) 800da44: 7d53 ldrb r3, [r2, #21] 800da46: f361 1304 bfi r3, r1, #4, #1 800da4a: 7553 strb r3, [r2, #21] statusPacket.logAvailable = (debug_buffer_available()>0)?1:0; 800da4c: f7fd fc94 bl 800b378 800da50: 4603 mov r3, r0 800da52: 2b00 cmp r3, #0 800da54: bf14 ite ne 800da56: 2301 movne r3, #1 800da58: 2300 moveq r3, #0 800da5a: b2d9 uxtb r1, r3 800da5c: 4a5c ldr r2, [pc, #368] @ (800dbd0 ) 800da5e: 7d53 ldrb r3, [r2, #21] 800da60: f361 1345 bfi r3, r1, #5, #1 800da64: 7553 strb r3, [r2, #21] statusPacket.evInfoAvailable = GBT_BAT_STAT_recv; 800da66: 4b5b ldr r3, [pc, #364] @ (800dbd4 ) 800da68: 781b ldrb r3, [r3, #0] 800da6a: f003 0301 and.w r3, r3, #1 800da6e: b2d9 uxtb r1, r3 800da70: 4a57 ldr r2, [pc, #348] @ (800dbd0 ) 800da72: 7d53 ldrb r3, [r2, #21] 800da74: f361 1386 bfi r3, r1, #6, #1 800da78: 7553 strb r3, [r2, #21] statusPacket.psuOnline = PSU0.online; 800da7a: 4b57 ldr r3, [pc, #348] @ (800dbd8 ) 800da7c: 7a1b ldrb r3, [r3, #8] 800da7e: f003 0301 and.w r3, r3, #1 800da82: b2d9 uxtb r1, r3 800da84: 4a52 ldr r2, [pc, #328] @ (800dbd0 ) 800da86: 7d53 ldrb r3, [r2, #21] 800da88: f361 13c7 bfi r3, r1, #7, #1 800da8c: 7553 strb r3, [r2, #21] statusPacket.tempConnector0 = GBT_ReadTemp(0); // температура коннектора 800da8e: 2000 movs r0, #0 800da90: f7fb ff84 bl 800999c 800da94: 4603 mov r3, r0 800da96: b25a sxtb r2, r3 800da98: 4b4d ldr r3, [pc, #308] @ (800dbd0 ) 800da9a: 765a strb r2, [r3, #25] statusPacket.tempConnector1 = GBT_ReadTemp(1); 800da9c: 2001 movs r0, #1 800da9e: f7fb ff7d bl 800999c 800daa2: 4603 mov r3, r0 800daa4: b25a sxtb r2, r3 800daa6: 4b4a ldr r3, [pc, #296] @ (800dbd0 ) 800daa8: 769a strb r2, [r3, #26] statusPacket.tempAmbient = PSU0.tempAmbient; // температура окружающего воздуха 800daaa: 4b4b ldr r3, [pc, #300] @ (800dbd8 ) 800daac: 69db ldr r3, [r3, #28] 800daae: b25a sxtb r2, r3 800dab0: 4b47 ldr r3, [pc, #284] @ (800dbd0 ) 800dab2: 76da strb r2, [r3, #27] statusPacket.tempBatteryMax = GBT_BatteryStatus.batteryHighestTemp; // максимальная температура батареи 800dab4: 4b49 ldr r3, [pc, #292] @ (800dbdc ) 800dab6: 785b ldrb r3, [r3, #1] 800dab8: b25a sxtb r2, r3 800daba: 4b45 ldr r3, [pc, #276] @ (800dbd0 ) 800dabc: 771a strb r2, [r3, #28] statusPacket.tempBatteryMin = GBT_BatteryStatus.batteryLowestTemp; // минимальная температура батареи 800dabe: 4b47 ldr r3, [pc, #284] @ (800dbdc ) 800dac0: 78db ldrb r3, [r3, #3] 800dac2: b25a sxtb r2, r3 800dac4: 4b42 ldr r3, [pc, #264] @ (800dbd0 ) 800dac6: 775a strb r2, [r3, #29] statusPacket.highestVoltageOfBatteryCell = GBT_ChargingStatus.highestVoltageOfBatteryCell; 800dac8: 4b45 ldr r3, [pc, #276] @ (800dbe0 ) 800daca: 889b ldrh r3, [r3, #4] 800dacc: b29a uxth r2, r3 800dace: 4b40 ldr r3, [pc, #256] @ (800dbd0 ) 800dad0: 83da strh r2, [r3, #30] statusPacket.batteryStatus = GBT_BatteryStatus.batteryStatus; 800dad2: 4b42 ldr r3, [pc, #264] @ (800dbdc ) 800dad4: 799a ldrb r2, [r3, #6] 800dad6: 4b3e ldr r3, [pc, #248] @ (800dbd0 ) 800dad8: f883 2020 strb.w r2, [r3, #32] statusPacket.phaseVoltageAB = PSU_06.VAB; 800dadc: 4b41 ldr r3, [pc, #260] @ (800dbe4 ) 800dade: 689b ldr r3, [r3, #8] 800dae0: b29a uxth r2, r3 800dae2: 4b3b ldr r3, [pc, #236] @ (800dbd0 ) 800dae4: f8a3 2021 strh.w r2, [r3, #33] @ 0x21 statusPacket.phaseVoltageBC = PSU_06.VBC; 800dae8: 4b3e ldr r3, [pc, #248] @ (800dbe4 ) 800daea: 68db ldr r3, [r3, #12] 800daec: b29a uxth r2, r3 800daee: 4b38 ldr r3, [pc, #224] @ (800dbd0 ) 800daf0: f8a3 2023 strh.w r2, [r3, #35] @ 0x23 statusPacket.phaseVoltageCA = PSU_06.VCA; 800daf4: 4b3b ldr r3, [pc, #236] @ (800dbe4 ) 800daf6: 691b ldr r3, [r3, #16] 800daf8: b29a uxth r2, r3 800dafa: 4b35 ldr r3, [pc, #212] @ (800dbd0 ) 800dafc: f8a3 2025 strh.w r2, [r3, #37] @ 0x25 memcpy(statusPacket.VIN, GBT_EVInfo.EVIN, sizeof(GBT_EVInfo.EVIN)); 800db00: 4b33 ldr r3, [pc, #204] @ (800dbd0 ) 800db02: 4a39 ldr r2, [pc, #228] @ (800dbe8 ) 800db04: 3327 adds r3, #39 @ 0x27 800db06: 3218 adds r2, #24 800db08: 6815 ldr r5, [r2, #0] 800db0a: 6854 ldr r4, [r2, #4] 800db0c: 6890 ldr r0, [r2, #8] 800db0e: 68d1 ldr r1, [r2, #12] 800db10: 601d str r5, [r3, #0] 800db12: 605c str r4, [r3, #4] 800db14: 6098 str r0, [r3, #8] 800db16: 60d9 str r1, [r3, #12] 800db18: 7c12 ldrb r2, [r2, #16] 800db1a: 741a strb r2, [r3, #16] statusPacket.batteryType = GBT_EVInfo.batteryType; 800db1c: 4b32 ldr r3, [pc, #200] @ (800dbe8 ) 800db1e: 78da ldrb r2, [r3, #3] 800db20: 4b2b ldr r3, [pc, #172] @ (800dbd0 ) 800db22: f883 2038 strb.w r2, [r3, #56] @ 0x38 statusPacket.batteryCapacity = GBT_EVInfo.batteryCapacity; 800db26: 4b30 ldr r3, [pc, #192] @ (800dbe8 ) 800db28: 889b ldrh r3, [r3, #4] 800db2a: b29a uxth r2, r3 800db2c: 4b28 ldr r3, [pc, #160] @ (800dbd0 ) 800db2e: f8a3 2039 strh.w r2, [r3, #57] @ 0x39 statusPacket.batteryVoltage = GBT_EVInfo.batteryVoltage; 800db32: 4b2d ldr r3, [pc, #180] @ (800dbe8 ) 800db34: 88db ldrh r3, [r3, #6] 800db36: b29a uxth r2, r3 800db38: 4b25 ldr r3, [pc, #148] @ (800dbd0 ) 800db3a: f8a3 203b strh.w r2, [r3, #59] @ 0x3b memcpy(statusPacket.batteryVendor, GBT_EVInfo.batteryVendor, sizeof(statusPacket.batteryVendor)); 800db3e: 4b2a ldr r3, [pc, #168] @ (800dbe8 ) 800db40: 689b ldr r3, [r3, #8] 800db42: 461a mov r2, r3 800db44: 4b22 ldr r3, [pc, #136] @ (800dbd0 ) 800db46: f8c3 203d str.w r2, [r3, #61] @ 0x3d statusPacket.batterySN = GBT_EVInfo.batterySN; 800db4a: 4b27 ldr r3, [pc, #156] @ (800dbe8 ) 800db4c: 68db ldr r3, [r3, #12] 800db4e: 4a20 ldr r2, [pc, #128] @ (800dbd0 ) 800db50: f8c2 3041 str.w r3, [r2, #65] @ 0x41 statusPacket.batteryManuD = GBT_EVInfo.batteryManuD; 800db54: 4b24 ldr r3, [pc, #144] @ (800dbe8 ) 800db56: 7c9a ldrb r2, [r3, #18] 800db58: 4b1d ldr r3, [pc, #116] @ (800dbd0 ) 800db5a: f883 2047 strb.w r2, [r3, #71] @ 0x47 statusPacket.batteryManuM = GBT_EVInfo.batteryManuM; 800db5e: 4b22 ldr r3, [pc, #136] @ (800dbe8 ) 800db60: 7c5a ldrb r2, [r3, #17] 800db62: 4b1b ldr r3, [pc, #108] @ (800dbd0 ) 800db64: f883 2046 strb.w r2, [r3, #70] @ 0x46 statusPacket.batteryManuY = GBT_EVInfo.batteryManuY; 800db68: 4b1f ldr r3, [pc, #124] @ (800dbe8 ) 800db6a: 7c1a ldrb r2, [r3, #16] 800db6c: 4b18 ldr r3, [pc, #96] @ (800dbd0 ) 800db6e: f883 2045 strb.w r2, [r3, #69] @ 0x45 statusPacket.batteryCycleCount = GBT_EVInfo.batteryCycleCount; 800db72: 4b1d ldr r3, [pc, #116] @ (800dbe8 ) 800db74: 7cda ldrb r2, [r3, #19] 800db76: 7d19 ldrb r1, [r3, #20] 800db78: 0209 lsls r1, r1, #8 800db7a: 430a orrs r2, r1 800db7c: 7d5b ldrb r3, [r3, #21] 800db7e: 041b lsls r3, r3, #16 800db80: 4313 orrs r3, r2 800db82: b29a uxth r2, r3 800db84: 4b12 ldr r3, [pc, #72] @ (800dbd0 ) 800db86: f8a3 2048 strh.w r2, [r3, #72] @ 0x48 statusPacket.ownAuto = GBT_EVInfo.ownAuto; 800db8a: 4b17 ldr r3, [pc, #92] @ (800dbe8 ) 800db8c: 7d9a ldrb r2, [r3, #22] 800db8e: 4b10 ldr r3, [pc, #64] @ (800dbd0 ) 800db90: f883 204a strb.w r2, [r3, #74] @ 0x4a memcpy(statusPacket.EV_SW_VER, GBT_EVInfo.EV_SW_VER, sizeof(statusPacket.EV_SW_VER)); 800db94: 4b0e ldr r3, [pc, #56] @ (800dbd0 ) 800db96: 4a14 ldr r2, [pc, #80] @ (800dbe8 ) 800db98: 334b adds r3, #75 @ 0x4b 800db9a: 3229 adds r2, #41 @ 0x29 800db9c: 6811 ldr r1, [r2, #0] 800db9e: 6852 ldr r2, [r2, #4] 800dba0: 6019 str r1, [r3, #0] 800dba2: 605a str r2, [r3, #4] statusPacket.testMode = 0; 800dba4: 4b0a ldr r3, [pc, #40] @ (800dbd0 ) 800dba6: 2200 movs r2, #0 800dba8: f883 2053 strb.w r2, [r3, #83] @ 0x53 statusPacket.testVoltage = 0; 800dbac: 4b08 ldr r3, [pc, #32] @ (800dbd0 ) 800dbae: 2200 movs r2, #0 800dbb0: f883 2054 strb.w r2, [r3, #84] @ 0x54 800dbb4: 2200 movs r2, #0 800dbb6: f883 2055 strb.w r2, [r3, #85] @ 0x55 statusPacket.testCurrent = 0; 800dbba: 4b05 ldr r3, [pc, #20] @ (800dbd0 ) 800dbbc: 2200 movs r2, #0 800dbbe: f883 2056 strb.w r2, [r3, #86] @ 0x56 800dbc2: 2200 movs r2, #0 800dbc4: f883 2057 strb.w r2, [r3, #87] @ 0x57 // В debug.c есть CONN_SetState, предполагаем наличие CONN_GetState() // Если такой функции нет, закомментируйте следующую строку: // statusPacket.connState = CONN_GetState(); } 800dbc8: bf00 nop 800dbca: bdb0 pop {r4, r5, r7, pc} 800dbcc: 200002e8 .word 0x200002e8 800dbd0: 20000c90 .word 0x20000c90 800dbd4: 20000319 .word 0x20000319 800dbd8: 200009fc .word 0x200009fc 800dbdc: 20000394 .word 0x20000394 800dbe0: 20000388 .word 0x20000388 800dbe4: 200009d0 .word 0x200009d0 800dbe8: 20000334 .word 0x20000334 0800dbec : static uint32_t RTC1_ReadTimeCounter(RTC_HandleTypeDef *hrtc); static HAL_StatusTypeDef RTC1_ExitInitMode(RTC_HandleTypeDef *hrtc); static HAL_StatusTypeDef RTC1_EnterInitMode(RTC_HandleTypeDef *hrtc); uint32_t get_Current_Time(){ 800dbec: b580 push {r7, lr} 800dbee: af00 add r7, sp, #0 return RTC1_ReadTimeCounter(&hrtc); 800dbf0: 4802 ldr r0, [pc, #8] @ (800dbfc ) 800dbf2: f000 f8a5 bl 800dd40 800dbf6: 4603 mov r3, r0 } 800dbf8: 4618 mov r0, r3 800dbfa: bd80 pop {r7, pc} 800dbfc: 20000a6c .word 0x20000a6c 0800dc00 : void set_Time(uint32_t unix_time){ 800dc00: b580 push {r7, lr} 800dc02: b082 sub sp, #8 800dc04: af00 add r7, sp, #0 800dc06: 6078 str r0, [r7, #4] RTC1_WriteTimeCounter(&hrtc, unix_time); 800dc08: 6879 ldr r1, [r7, #4] 800dc0a: 4803 ldr r0, [pc, #12] @ (800dc18 ) 800dc0c: f000 f8c8 bl 800dda0 } 800dc10: bf00 nop 800dc12: 3708 adds r7, #8 800dc14: 46bd mov sp, r7 800dc16: bd80 pop {r7, pc} 800dc18: 20000a6c .word 0x20000a6c 0800dc1c : uint8_t to_bcd(int value) { 800dc1c: b480 push {r7} 800dc1e: b083 sub sp, #12 800dc20: af00 add r7, sp, #0 800dc22: 6078 str r0, [r7, #4] return ((value / 10) << 4) | (value % 10); 800dc24: 687b ldr r3, [r7, #4] 800dc26: 4a0f ldr r2, [pc, #60] @ (800dc64 ) 800dc28: fb82 1203 smull r1, r2, r2, r3 800dc2c: 1092 asrs r2, r2, #2 800dc2e: 17db asrs r3, r3, #31 800dc30: 1ad3 subs r3, r2, r3 800dc32: b25b sxtb r3, r3 800dc34: 011b lsls r3, r3, #4 800dc36: b258 sxtb r0, r3 800dc38: 687a ldr r2, [r7, #4] 800dc3a: 4b0a ldr r3, [pc, #40] @ (800dc64 ) 800dc3c: fb83 1302 smull r1, r3, r3, r2 800dc40: 1099 asrs r1, r3, #2 800dc42: 17d3 asrs r3, r2, #31 800dc44: 1ac9 subs r1, r1, r3 800dc46: 460b mov r3, r1 800dc48: 009b lsls r3, r3, #2 800dc4a: 440b add r3, r1 800dc4c: 005b lsls r3, r3, #1 800dc4e: 1ad1 subs r1, r2, r3 800dc50: b24b sxtb r3, r1 800dc52: 4303 orrs r3, r0 800dc54: b25b sxtb r3, r3 800dc56: b2db uxtb r3, r3 } 800dc58: 4618 mov r0, r3 800dc5a: 370c adds r7, #12 800dc5c: 46bd mov sp, r7 800dc5e: bc80 pop {r7} 800dc60: 4770 bx lr 800dc62: bf00 nop 800dc64: 66666667 .word 0x66666667 0800dc68 : void unix_to_bcd(uint32_t unix_time, uint8_t *time) { 800dc68: b590 push {r4, r7, lr} 800dc6a: b087 sub sp, #28 800dc6c: af00 add r7, sp, #0 800dc6e: 6078 str r0, [r7, #4] 800dc70: 6039 str r1, [r7, #0] struct tm *tm_info; time_t raw_time = (time_t)unix_time; 800dc72: 6879 ldr r1, [r7, #4] 800dc74: 2000 movs r0, #0 800dc76: 460a mov r2, r1 800dc78: 4603 mov r3, r0 800dc7a: e9c7 2302 strd r2, r3, [r7, #8] tm_info = gmtime(&raw_time); 800dc7e: f107 0308 add.w r3, r7, #8 800dc82: 4618 mov r0, r3 800dc84: f006 fa0c bl 80140a0 800dc88: 6178 str r0, [r7, #20] time[0] = to_bcd(tm_info->tm_sec); 800dc8a: 697b ldr r3, [r7, #20] 800dc8c: 681b ldr r3, [r3, #0] 800dc8e: 4618 mov r0, r3 800dc90: f7ff ffc4 bl 800dc1c 800dc94: 4603 mov r3, r0 800dc96: 461a mov r2, r3 800dc98: 683b ldr r3, [r7, #0] 800dc9a: 701a strb r2, [r3, #0] time[1] = to_bcd(tm_info->tm_min); 800dc9c: 697b ldr r3, [r7, #20] 800dc9e: 685a ldr r2, [r3, #4] 800dca0: 683b ldr r3, [r7, #0] 800dca2: 1c5c adds r4, r3, #1 800dca4: 4610 mov r0, r2 800dca6: f7ff ffb9 bl 800dc1c 800dcaa: 4603 mov r3, r0 800dcac: 7023 strb r3, [r4, #0] time[2] = to_bcd(tm_info->tm_hour); 800dcae: 697b ldr r3, [r7, #20] 800dcb0: 689a ldr r2, [r3, #8] 800dcb2: 683b ldr r3, [r7, #0] 800dcb4: 1c9c adds r4, r3, #2 800dcb6: 4610 mov r0, r2 800dcb8: f7ff ffb0 bl 800dc1c 800dcbc: 4603 mov r3, r0 800dcbe: 7023 strb r3, [r4, #0] time[3] = to_bcd(tm_info->tm_mday); 800dcc0: 697b ldr r3, [r7, #20] 800dcc2: 68da ldr r2, [r3, #12] 800dcc4: 683b ldr r3, [r7, #0] 800dcc6: 1cdc adds r4, r3, #3 800dcc8: 4610 mov r0, r2 800dcca: f7ff ffa7 bl 800dc1c 800dcce: 4603 mov r3, r0 800dcd0: 7023 strb r3, [r4, #0] time[4] = to_bcd(tm_info->tm_mon + 1); // tm_mon is 0-11 800dcd2: 697b ldr r3, [r7, #20] 800dcd4: 691b ldr r3, [r3, #16] 800dcd6: 1c5a adds r2, r3, #1 800dcd8: 683b ldr r3, [r7, #0] 800dcda: 1d1c adds r4, r3, #4 800dcdc: 4610 mov r0, r2 800dcde: f7ff ff9d bl 800dc1c 800dce2: 4603 mov r3, r0 800dce4: 7023 strb r3, [r4, #0] time[5] = to_bcd((tm_info->tm_year + 1900) % 100); // Year in 2 digits 800dce6: 697b ldr r3, [r7, #20] 800dce8: 695b ldr r3, [r3, #20] 800dcea: f203 736c addw r3, r3, #1900 @ 0x76c 800dcee: 4a13 ldr r2, [pc, #76] @ (800dd3c ) 800dcf0: fb82 1203 smull r1, r2, r2, r3 800dcf4: 1151 asrs r1, r2, #5 800dcf6: 17da asrs r2, r3, #31 800dcf8: 1a8a subs r2, r1, r2 800dcfa: 2164 movs r1, #100 @ 0x64 800dcfc: fb01 f202 mul.w r2, r1, r2 800dd00: 1a9a subs r2, r3, r2 800dd02: 683b ldr r3, [r7, #0] 800dd04: 1d5c adds r4, r3, #5 800dd06: 4610 mov r0, r2 800dd08: f7ff ff88 bl 800dc1c 800dd0c: 4603 mov r3, r0 800dd0e: 7023 strb r3, [r4, #0] time[6] = to_bcd((tm_info->tm_year + 1900) / 100); // Century in 2 digits 800dd10: 697b ldr r3, [r7, #20] 800dd12: 695b ldr r3, [r3, #20] 800dd14: f203 736c addw r3, r3, #1900 @ 0x76c 800dd18: 4a08 ldr r2, [pc, #32] @ (800dd3c ) 800dd1a: fb82 1203 smull r1, r2, r2, r3 800dd1e: 1152 asrs r2, r2, #5 800dd20: 17db asrs r3, r3, #31 800dd22: 1ad2 subs r2, r2, r3 800dd24: 683b ldr r3, [r7, #0] 800dd26: 1d9c adds r4, r3, #6 800dd28: 4610 mov r0, r2 800dd2a: f7ff ff77 bl 800dc1c 800dd2e: 4603 mov r3, r0 800dd30: 7023 strb r3, [r4, #0] } 800dd32: bf00 nop 800dd34: 371c adds r7, #28 800dd36: 46bd mov sp, r7 800dd38: bd90 pop {r4, r7, pc} 800dd3a: bf00 nop 800dd3c: 51eb851f .word 0x51eb851f 0800dd40 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval Time counter */ static uint32_t RTC1_ReadTimeCounter(RTC_HandleTypeDef *hrtc) { 800dd40: b480 push {r7} 800dd42: b087 sub sp, #28 800dd44: af00 add r7, sp, #0 800dd46: 6078 str r0, [r7, #4] uint16_t high1 = 0U, high2 = 0U, low = 0U; 800dd48: 2300 movs r3, #0 800dd4a: 827b strh r3, [r7, #18] 800dd4c: 2300 movs r3, #0 800dd4e: 823b strh r3, [r7, #16] 800dd50: 2300 movs r3, #0 800dd52: 81fb strh r3, [r7, #14] uint32_t timecounter = 0U; 800dd54: 2300 movs r3, #0 800dd56: 617b str r3, [r7, #20] high1 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT); 800dd58: 687b ldr r3, [r7, #4] 800dd5a: 681b ldr r3, [r3, #0] 800dd5c: 699b ldr r3, [r3, #24] 800dd5e: 827b strh r3, [r7, #18] low = READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT); 800dd60: 687b ldr r3, [r7, #4] 800dd62: 681b ldr r3, [r3, #0] 800dd64: 69db ldr r3, [r3, #28] 800dd66: 81fb strh r3, [r7, #14] high2 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT); 800dd68: 687b ldr r3, [r7, #4] 800dd6a: 681b ldr r3, [r3, #0] 800dd6c: 699b ldr r3, [r3, #24] 800dd6e: 823b strh r3, [r7, #16] if (high1 != high2) 800dd70: 8a7a ldrh r2, [r7, #18] 800dd72: 8a3b ldrh r3, [r7, #16] 800dd74: 429a cmp r2, r3 800dd76: d008 beq.n 800dd8a { /* In this case the counter roll over during reading of CNTL and CNTH registers, read again CNTL register then return the counter value */ timecounter = (((uint32_t) high2 << 16U) | READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT)); 800dd78: 8a3b ldrh r3, [r7, #16] 800dd7a: 041a lsls r2, r3, #16 800dd7c: 687b ldr r3, [r7, #4] 800dd7e: 681b ldr r3, [r3, #0] 800dd80: 69db ldr r3, [r3, #28] 800dd82: b29b uxth r3, r3 800dd84: 4313 orrs r3, r2 800dd86: 617b str r3, [r7, #20] 800dd88: e004 b.n 800dd94 } else { /* No counter roll over during reading of CNTL and CNTH registers, counter value is equal to first value of CNTL and CNTH */ timecounter = (((uint32_t) high1 << 16U) | low); 800dd8a: 8a7b ldrh r3, [r7, #18] 800dd8c: 041a lsls r2, r3, #16 800dd8e: 89fb ldrh r3, [r7, #14] 800dd90: 4313 orrs r3, r2 800dd92: 617b str r3, [r7, #20] } return timecounter; 800dd94: 697b ldr r3, [r7, #20] } 800dd96: 4618 mov r0, r3 800dd98: 371c adds r7, #28 800dd9a: 46bd mov sp, r7 800dd9c: bc80 pop {r7} 800dd9e: 4770 bx lr 0800dda0 : * the configuration information for RTC. * @param TimeCounter: Counter to write in RTC_CNT registers * @retval HAL status */ static HAL_StatusTypeDef RTC1_WriteTimeCounter(RTC_HandleTypeDef *hrtc, uint32_t TimeCounter) { 800dda0: b580 push {r7, lr} 800dda2: b084 sub sp, #16 800dda4: af00 add r7, sp, #0 800dda6: 6078 str r0, [r7, #4] 800dda8: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 800ddaa: 2300 movs r3, #0 800ddac: 73fb strb r3, [r7, #15] /* Set Initialization mode */ if (RTC1_EnterInitMode(hrtc) != HAL_OK) 800ddae: 6878 ldr r0, [r7, #4] 800ddb0: f000 f81d bl 800ddee 800ddb4: 4603 mov r3, r0 800ddb6: 2b00 cmp r3, #0 800ddb8: d002 beq.n 800ddc0 { status = HAL_ERROR; 800ddba: 2301 movs r3, #1 800ddbc: 73fb strb r3, [r7, #15] 800ddbe: e011 b.n 800dde4 } else { /* Set RTC COUNTER MSB word */ WRITE_REG(hrtc->Instance->CNTH, (TimeCounter >> 16U)); 800ddc0: 687b ldr r3, [r7, #4] 800ddc2: 681b ldr r3, [r3, #0] 800ddc4: 683a ldr r2, [r7, #0] 800ddc6: 0c12 lsrs r2, r2, #16 800ddc8: 619a str r2, [r3, #24] /* Set RTC COUNTER LSB word */ WRITE_REG(hrtc->Instance->CNTL, (TimeCounter & RTC_CNTL_RTC_CNT)); 800ddca: 687b ldr r3, [r7, #4] 800ddcc: 681b ldr r3, [r3, #0] 800ddce: 683a ldr r2, [r7, #0] 800ddd0: b292 uxth r2, r2 800ddd2: 61da str r2, [r3, #28] /* Wait for synchro */ if (RTC1_ExitInitMode(hrtc) != HAL_OK) 800ddd4: 6878 ldr r0, [r7, #4] 800ddd6: f000 f832 bl 800de3e 800ddda: 4603 mov r3, r0 800dddc: 2b00 cmp r3, #0 800ddde: d001 beq.n 800dde4 { status = HAL_ERROR; 800dde0: 2301 movs r3, #1 800dde2: 73fb strb r3, [r7, #15] } } return status; 800dde4: 7bfb ldrb r3, [r7, #15] } 800dde6: 4618 mov r0, r3 800dde8: 3710 adds r7, #16 800ddea: 46bd mov sp, r7 800ddec: bd80 pop {r7, pc} 0800ddee : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC1_EnterInitMode(RTC_HandleTypeDef *hrtc) { 800ddee: b580 push {r7, lr} 800ddf0: b084 sub sp, #16 800ddf2: af00 add r7, sp, #0 800ddf4: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800ddf6: 2300 movs r3, #0 800ddf8: 60fb str r3, [r7, #12] tickstart = HAL_GetTick(); 800ddfa: f000 fce9 bl 800e7d0 800ddfe: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800de00: e009 b.n 800de16 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800de02: f000 fce5 bl 800e7d0 800de06: 4602 mov r2, r0 800de08: 68fb ldr r3, [r7, #12] 800de0a: 1ad3 subs r3, r2, r3 800de0c: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800de10: d901 bls.n 800de16 { return HAL_TIMEOUT; 800de12: 2303 movs r3, #3 800de14: e00f b.n 800de36 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800de16: 687b ldr r3, [r7, #4] 800de18: 681b ldr r3, [r3, #0] 800de1a: 685b ldr r3, [r3, #4] 800de1c: f003 0320 and.w r3, r3, #32 800de20: 2b00 cmp r3, #0 800de22: d0ee beq.n 800de02 } } /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); 800de24: 687b ldr r3, [r7, #4] 800de26: 681b ldr r3, [r3, #0] 800de28: 685a ldr r2, [r3, #4] 800de2a: 687b ldr r3, [r7, #4] 800de2c: 681b ldr r3, [r3, #0] 800de2e: f042 0210 orr.w r2, r2, #16 800de32: 605a str r2, [r3, #4] return HAL_OK; 800de34: 2300 movs r3, #0 } 800de36: 4618 mov r0, r3 800de38: 3710 adds r7, #16 800de3a: 46bd mov sp, r7 800de3c: bd80 pop {r7, pc} 0800de3e : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC1_ExitInitMode(RTC_HandleTypeDef *hrtc) { 800de3e: b580 push {r7, lr} 800de40: b084 sub sp, #16 800de42: af00 add r7, sp, #0 800de44: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800de46: 2300 movs r3, #0 800de48: 60fb str r3, [r7, #12] /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 800de4a: 687b ldr r3, [r7, #4] 800de4c: 681b ldr r3, [r3, #0] 800de4e: 685a ldr r2, [r3, #4] 800de50: 687b ldr r3, [r7, #4] 800de52: 681b ldr r3, [r3, #0] 800de54: f022 0210 bic.w r2, r2, #16 800de58: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 800de5a: f000 fcb9 bl 800e7d0 800de5e: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800de60: e009 b.n 800de76 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800de62: f000 fcb5 bl 800e7d0 800de66: 4602 mov r2, r0 800de68: 68fb ldr r3, [r7, #12] 800de6a: 1ad3 subs r3, r2, r3 800de6c: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800de70: d901 bls.n 800de76 { return HAL_TIMEOUT; 800de72: 2303 movs r3, #3 800de74: e007 b.n 800de86 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800de76: 687b ldr r3, [r7, #4] 800de78: 681b ldr r3, [r3, #0] 800de7a: 685b ldr r3, [r3, #4] 800de7c: f003 0320 and.w r3, r3, #32 800de80: 2b00 cmp r3, #0 800de82: d0ee beq.n 800de62 } } return HAL_OK; 800de84: 2300 movs r3, #0 } 800de86: 4618 mov r0, r3 800de88: 3710 adds r7, #16 800de8a: 46bd mov sp, r7 800de8c: bd80 pop {r7, pc} ... 0800de90 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 800de90: b480 push {r7} 800de92: b085 sub sp, #20 800de94: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800de96: 4b15 ldr r3, [pc, #84] @ (800deec ) 800de98: 699b ldr r3, [r3, #24] 800de9a: 4a14 ldr r2, [pc, #80] @ (800deec ) 800de9c: f043 0301 orr.w r3, r3, #1 800dea0: 6193 str r3, [r2, #24] 800dea2: 4b12 ldr r3, [pc, #72] @ (800deec ) 800dea4: 699b ldr r3, [r3, #24] 800dea6: f003 0301 and.w r3, r3, #1 800deaa: 60bb str r3, [r7, #8] 800deac: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 800deae: 4b0f ldr r3, [pc, #60] @ (800deec ) 800deb0: 69db ldr r3, [r3, #28] 800deb2: 4a0e ldr r2, [pc, #56] @ (800deec ) 800deb4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 800deb8: 61d3 str r3, [r2, #28] 800deba: 4b0c ldr r3, [pc, #48] @ (800deec ) 800debc: 69db ldr r3, [r3, #28] 800debe: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800dec2: 607b str r3, [r7, #4] 800dec4: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800dec6: 4b0a ldr r3, [pc, #40] @ (800def0 ) 800dec8: 685b ldr r3, [r3, #4] 800deca: 60fb str r3, [r7, #12] 800decc: 68fb ldr r3, [r7, #12] 800dece: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 800ded2: 60fb str r3, [r7, #12] 800ded4: 68fb ldr r3, [r7, #12] 800ded6: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 800deda: 60fb str r3, [r7, #12] 800dedc: 4a04 ldr r2, [pc, #16] @ (800def0 ) 800dede: 68fb ldr r3, [r7, #12] 800dee0: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800dee2: bf00 nop 800dee4: 3714 adds r7, #20 800dee6: 46bd mov sp, r7 800dee8: bc80 pop {r7} 800deea: 4770 bx lr 800deec: 40021000 .word 0x40021000 800def0: 40010000 .word 0x40010000 0800def4 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 800def4: b480 push {r7} 800def6: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 800def8: bf00 nop 800defa: e7fd b.n 800def8 0800defc : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 800defc: b480 push {r7} 800defe: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 800df00: bf00 nop 800df02: e7fd b.n 800df00 0800df04 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 800df04: b480 push {r7} 800df06: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 800df08: bf00 nop 800df0a: e7fd b.n 800df08 0800df0c : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800df0c: b480 push {r7} 800df0e: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 800df10: bf00 nop 800df12: e7fd b.n 800df10 0800df14 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 800df14: b480 push {r7} 800df16: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 800df18: bf00 nop 800df1a: e7fd b.n 800df18 0800df1c : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 800df1c: b480 push {r7} 800df1e: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 800df20: bf00 nop 800df22: 46bd mov sp, r7 800df24: bc80 pop {r7} 800df26: 4770 bx lr 0800df28 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 800df28: b480 push {r7} 800df2a: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 800df2c: bf00 nop 800df2e: 46bd mov sp, r7 800df30: bc80 pop {r7} 800df32: 4770 bx lr 0800df34 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 800df34: b480 push {r7} 800df36: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 800df38: bf00 nop 800df3a: 46bd mov sp, r7 800df3c: bc80 pop {r7} 800df3e: 4770 bx lr 0800df40 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 800df40: b580 push {r7, lr} 800df42: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 800df44: f000 fc32 bl 800e7ac /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 800df48: bf00 nop 800df4a: bd80 pop {r7, pc} 0800df4c : /** * @brief This function handles CAN1 RX0 interrupt. */ void CAN1_RX0_IRQHandler(void) { 800df4c: b580 push {r7, lr} 800df4e: af00 add r7, sp, #0 /* USER CODE BEGIN CAN1_RX0_IRQn 0 */ /* USER CODE END CAN1_RX0_IRQn 0 */ HAL_CAN_IRQHandler(&hcan1); 800df50: 4802 ldr r0, [pc, #8] @ (800df5c ) 800df52: f001 fe23 bl 800fb9c /* USER CODE BEGIN CAN1_RX0_IRQn 1 */ /* USER CODE END CAN1_RX0_IRQn 1 */ } 800df56: bf00 nop 800df58: bd80 pop {r7, pc} 800df5a: bf00 nop 800df5c: 20000294 .word 0x20000294 0800df60 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { 800df60: b580 push {r7, lr} 800df62: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 800df64: 4802 ldr r0, [pc, #8] @ (800df70 ) 800df66: f004 fdb9 bl 8012adc /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } 800df6a: bf00 nop 800df6c: bd80 pop {r7, pc} 800df6e: bf00 nop 800df70: 20000d88 .word 0x20000d88 0800df74 : /** * @brief This function handles USART2 global interrupt. */ void USART2_IRQHandler(void) { 800df74: b580 push {r7, lr} 800df76: af00 add r7, sp, #0 /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 800df78: 4802 ldr r0, [pc, #8] @ (800df84 ) 800df7a: f004 fdaf bl 8012adc /* USER CODE BEGIN USART2_IRQn 1 */ /* USER CODE END USART2_IRQn 1 */ } 800df7e: bf00 nop 800df80: bd80 pop {r7, pc} 800df82: bf00 nop 800df84: 20000dd0 .word 0x20000dd0 0800df88 : /** * @brief This function handles USART3 global interrupt. */ void USART3_IRQHandler(void) { 800df88: b580 push {r7, lr} 800df8a: af00 add r7, sp, #0 /* USER CODE BEGIN USART3_IRQn 0 */ /* USER CODE END USART3_IRQn 0 */ HAL_UART_IRQHandler(&huart3); 800df8c: 4802 ldr r0, [pc, #8] @ (800df98 ) 800df8e: f004 fda5 bl 8012adc /* USER CODE BEGIN USART3_IRQn 1 */ /* USER CODE END USART3_IRQn 1 */ } 800df92: bf00 nop 800df94: bd80 pop {r7, pc} 800df96: bf00 nop 800df98: 20000e18 .word 0x20000e18 0800df9c : /** * @brief This function handles CAN2 TX interrupt. */ void CAN2_TX_IRQHandler(void) { 800df9c: b580 push {r7, lr} 800df9e: af00 add r7, sp, #0 /* USER CODE BEGIN CAN2_TX_IRQn 0 */ /* USER CODE END CAN2_TX_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 800dfa0: 4802 ldr r0, [pc, #8] @ (800dfac ) 800dfa2: f001 fdfb bl 800fb9c /* USER CODE BEGIN CAN2_TX_IRQn 1 */ /* USER CODE END CAN2_TX_IRQn 1 */ } 800dfa6: bf00 nop 800dfa8: bd80 pop {r7, pc} 800dfaa: bf00 nop 800dfac: 200002bc .word 0x200002bc 0800dfb0 : /** * @brief This function handles CAN2 RX1 interrupt. */ void CAN2_RX1_IRQHandler(void) { 800dfb0: b580 push {r7, lr} 800dfb2: af00 add r7, sp, #0 /* USER CODE BEGIN CAN2_RX1_IRQn 0 */ /* USER CODE END CAN2_RX1_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 800dfb4: 4802 ldr r0, [pc, #8] @ (800dfc0 ) 800dfb6: f001 fdf1 bl 800fb9c /* USER CODE BEGIN CAN2_RX1_IRQn 1 */ /* USER CODE END CAN2_RX1_IRQn 1 */ } 800dfba: bf00 nop 800dfbc: bd80 pop {r7, pc} 800dfbe: bf00 nop 800dfc0: 200002bc .word 0x200002bc 0800dfc4 <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 800dfc4: b480 push {r7} 800dfc6: af00 add r7, sp, #0 return 1; 800dfc8: 2301 movs r3, #1 } 800dfca: 4618 mov r0, r3 800dfcc: 46bd mov sp, r7 800dfce: bc80 pop {r7} 800dfd0: 4770 bx lr 0800dfd2 <_kill>: int _kill(int pid, int sig) { 800dfd2: b580 push {r7, lr} 800dfd4: b082 sub sp, #8 800dfd6: af00 add r7, sp, #0 800dfd8: 6078 str r0, [r7, #4] 800dfda: 6039 str r1, [r7, #0] (void)pid; (void)sig; errno = EINVAL; 800dfdc: f006 f926 bl 801422c <__errno> 800dfe0: 4603 mov r3, r0 800dfe2: 2216 movs r2, #22 800dfe4: 601a str r2, [r3, #0] return -1; 800dfe6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 800dfea: 4618 mov r0, r3 800dfec: 3708 adds r7, #8 800dfee: 46bd mov sp, r7 800dff0: bd80 pop {r7, pc} 0800dff2 <_exit>: void _exit (int status) { 800dff2: b580 push {r7, lr} 800dff4: b082 sub sp, #8 800dff6: af00 add r7, sp, #0 800dff8: 6078 str r0, [r7, #4] _kill(status, -1); 800dffa: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 800dffe: 6878 ldr r0, [r7, #4] 800e000: f7ff ffe7 bl 800dfd2 <_kill> while (1) {} /* Make sure we hang here */ 800e004: bf00 nop 800e006: e7fd b.n 800e004 <_exit+0x12> 0800e008 <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 800e008: b580 push {r7, lr} 800e00a: b086 sub sp, #24 800e00c: af00 add r7, sp, #0 800e00e: 60f8 str r0, [r7, #12] 800e010: 60b9 str r1, [r7, #8] 800e012: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800e014: 2300 movs r3, #0 800e016: 617b str r3, [r7, #20] 800e018: e00a b.n 800e030 <_read+0x28> { *ptr++ = __io_getchar(); 800e01a: f3af 8000 nop.w 800e01e: 4601 mov r1, r0 800e020: 68bb ldr r3, [r7, #8] 800e022: 1c5a adds r2, r3, #1 800e024: 60ba str r2, [r7, #8] 800e026: b2ca uxtb r2, r1 800e028: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 800e02a: 697b ldr r3, [r7, #20] 800e02c: 3301 adds r3, #1 800e02e: 617b str r3, [r7, #20] 800e030: 697a ldr r2, [r7, #20] 800e032: 687b ldr r3, [r7, #4] 800e034: 429a cmp r2, r3 800e036: dbf0 blt.n 800e01a <_read+0x12> } return len; 800e038: 687b ldr r3, [r7, #4] } 800e03a: 4618 mov r0, r3 800e03c: 3718 adds r7, #24 800e03e: 46bd mov sp, r7 800e040: bd80 pop {r7, pc} 0800e042 <_close>: } return len; } int _close(int file) { 800e042: b480 push {r7} 800e044: b083 sub sp, #12 800e046: af00 add r7, sp, #0 800e048: 6078 str r0, [r7, #4] (void)file; return -1; 800e04a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 800e04e: 4618 mov r0, r3 800e050: 370c adds r7, #12 800e052: 46bd mov sp, r7 800e054: bc80 pop {r7} 800e056: 4770 bx lr 0800e058 <_fstat>: int _fstat(int file, struct stat *st) { 800e058: b480 push {r7} 800e05a: b083 sub sp, #12 800e05c: af00 add r7, sp, #0 800e05e: 6078 str r0, [r7, #4] 800e060: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; 800e062: 683b ldr r3, [r7, #0] 800e064: f44f 5200 mov.w r2, #8192 @ 0x2000 800e068: 605a str r2, [r3, #4] return 0; 800e06a: 2300 movs r3, #0 } 800e06c: 4618 mov r0, r3 800e06e: 370c adds r7, #12 800e070: 46bd mov sp, r7 800e072: bc80 pop {r7} 800e074: 4770 bx lr 0800e076 <_isatty>: int _isatty(int file) { 800e076: b480 push {r7} 800e078: b083 sub sp, #12 800e07a: af00 add r7, sp, #0 800e07c: 6078 str r0, [r7, #4] (void)file; return 1; 800e07e: 2301 movs r3, #1 } 800e080: 4618 mov r0, r3 800e082: 370c adds r7, #12 800e084: 46bd mov sp, r7 800e086: bc80 pop {r7} 800e088: 4770 bx lr 0800e08a <_lseek>: int _lseek(int file, int ptr, int dir) { 800e08a: b480 push {r7} 800e08c: b085 sub sp, #20 800e08e: af00 add r7, sp, #0 800e090: 60f8 str r0, [r7, #12] 800e092: 60b9 str r1, [r7, #8] 800e094: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; 800e096: 2300 movs r3, #0 } 800e098: 4618 mov r0, r3 800e09a: 3714 adds r7, #20 800e09c: 46bd mov sp, r7 800e09e: bc80 pop {r7} 800e0a0: 4770 bx lr ... 0800e0a4 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 800e0a4: b580 push {r7, lr} 800e0a6: b086 sub sp, #24 800e0a8: af00 add r7, sp, #0 800e0aa: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 800e0ac: 4a14 ldr r2, [pc, #80] @ (800e100 <_sbrk+0x5c>) 800e0ae: 4b15 ldr r3, [pc, #84] @ (800e104 <_sbrk+0x60>) 800e0b0: 1ad3 subs r3, r2, r3 800e0b2: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 800e0b4: 697b ldr r3, [r7, #20] 800e0b6: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 800e0b8: 4b13 ldr r3, [pc, #76] @ (800e108 <_sbrk+0x64>) 800e0ba: 681b ldr r3, [r3, #0] 800e0bc: 2b00 cmp r3, #0 800e0be: d102 bne.n 800e0c6 <_sbrk+0x22> { __sbrk_heap_end = &_end; 800e0c0: 4b11 ldr r3, [pc, #68] @ (800e108 <_sbrk+0x64>) 800e0c2: 4a12 ldr r2, [pc, #72] @ (800e10c <_sbrk+0x68>) 800e0c4: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 800e0c6: 4b10 ldr r3, [pc, #64] @ (800e108 <_sbrk+0x64>) 800e0c8: 681a ldr r2, [r3, #0] 800e0ca: 687b ldr r3, [r7, #4] 800e0cc: 4413 add r3, r2 800e0ce: 693a ldr r2, [r7, #16] 800e0d0: 429a cmp r2, r3 800e0d2: d207 bcs.n 800e0e4 <_sbrk+0x40> { errno = ENOMEM; 800e0d4: f006 f8aa bl 801422c <__errno> 800e0d8: 4603 mov r3, r0 800e0da: 220c movs r2, #12 800e0dc: 601a str r2, [r3, #0] return (void *)-1; 800e0de: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800e0e2: e009 b.n 800e0f8 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 800e0e4: 4b08 ldr r3, [pc, #32] @ (800e108 <_sbrk+0x64>) 800e0e6: 681b ldr r3, [r3, #0] 800e0e8: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 800e0ea: 4b07 ldr r3, [pc, #28] @ (800e108 <_sbrk+0x64>) 800e0ec: 681a ldr r2, [r3, #0] 800e0ee: 687b ldr r3, [r7, #4] 800e0f0: 4413 add r3, r2 800e0f2: 4a05 ldr r2, [pc, #20] @ (800e108 <_sbrk+0x64>) 800e0f4: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 800e0f6: 68fb ldr r3, [r7, #12] } 800e0f8: 4618 mov r0, r3 800e0fa: 3718 adds r7, #24 800e0fc: 46bd mov sp, r7 800e0fe: bd80 pop {r7, pc} 800e100: 20010000 .word 0x20010000 800e104: 00000400 .word 0x00000400 800e108: 20000cf4 .word 0x20000cf4 800e10c: 20000fb0 .word 0x20000fb0 0800e110 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 800e110: b480 push {r7} 800e112: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 800e114: bf00 nop 800e116: 46bd mov sp, r7 800e118: bc80 pop {r7} 800e11a: 4770 bx lr 0800e11c : TIM_HandleTypeDef htim4; /* TIM4 init function */ void MX_TIM4_Init(void) { 800e11c: b580 push {r7, lr} 800e11e: b08e sub sp, #56 @ 0x38 800e120: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 800e122: f107 0328 add.w r3, r7, #40 @ 0x28 800e126: 2200 movs r2, #0 800e128: 601a str r2, [r3, #0] 800e12a: 605a str r2, [r3, #4] 800e12c: 609a str r2, [r3, #8] 800e12e: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 800e130: f107 0320 add.w r3, r7, #32 800e134: 2200 movs r2, #0 800e136: 601a str r2, [r3, #0] 800e138: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 800e13a: 1d3b adds r3, r7, #4 800e13c: 2200 movs r2, #0 800e13e: 601a str r2, [r3, #0] 800e140: 605a str r2, [r3, #4] 800e142: 609a str r2, [r3, #8] 800e144: 60da str r2, [r3, #12] 800e146: 611a str r2, [r3, #16] 800e148: 615a str r2, [r3, #20] 800e14a: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 800e14c: 4b37 ldr r3, [pc, #220] @ (800e22c ) 800e14e: 4a38 ldr r2, [pc, #224] @ (800e230 ) 800e150: 601a str r2, [r3, #0] htim4.Init.Prescaler = 720; 800e152: 4b36 ldr r3, [pc, #216] @ (800e22c ) 800e154: f44f 7234 mov.w r2, #720 @ 0x2d0 800e158: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 800e15a: 4b34 ldr r3, [pc, #208] @ (800e22c ) 800e15c: 2200 movs r2, #0 800e15e: 609a str r2, [r3, #8] htim4.Init.Period = 100; 800e160: 4b32 ldr r3, [pc, #200] @ (800e22c ) 800e162: 2264 movs r2, #100 @ 0x64 800e164: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 800e166: 4b31 ldr r3, [pc, #196] @ (800e22c ) 800e168: 2200 movs r2, #0 800e16a: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 800e16c: 4b2f ldr r3, [pc, #188] @ (800e22c ) 800e16e: 2200 movs r2, #0 800e170: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 800e172: 482e ldr r0, [pc, #184] @ (800e22c ) 800e174: f003 fcc1 bl 8011afa 800e178: 4603 mov r3, r0 800e17a: 2b00 cmp r3, #0 800e17c: d001 beq.n 800e182 { Error_Handler(); 800e17e: f7fe f8b3 bl 800c2e8 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 800e182: f44f 5380 mov.w r3, #4096 @ 0x1000 800e186: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 800e188: f107 0328 add.w r3, r7, #40 @ 0x28 800e18c: 4619 mov r1, r3 800e18e: 4827 ldr r0, [pc, #156] @ (800e22c ) 800e190: f003 fec6 bl 8011f20 800e194: 4603 mov r3, r0 800e196: 2b00 cmp r3, #0 800e198: d001 beq.n 800e19e { Error_Handler(); 800e19a: f7fe f8a5 bl 800c2e8 } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 800e19e: 4823 ldr r0, [pc, #140] @ (800e22c ) 800e1a0: f003 fcfa bl 8011b98 800e1a4: 4603 mov r3, r0 800e1a6: 2b00 cmp r3, #0 800e1a8: d001 beq.n 800e1ae { Error_Handler(); 800e1aa: f7fe f89d bl 800c2e8 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800e1ae: 2300 movs r3, #0 800e1b0: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800e1b2: 2300 movs r3, #0 800e1b4: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 800e1b6: f107 0320 add.w r3, r7, #32 800e1ba: 4619 mov r1, r3 800e1bc: 481b ldr r0, [pc, #108] @ (800e22c ) 800e1be: f004 fa31 bl 8012624 800e1c2: 4603 mov r3, r0 800e1c4: 2b00 cmp r3, #0 800e1c6: d001 beq.n 800e1cc { Error_Handler(); 800e1c8: f7fe f88e bl 800c2e8 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 800e1cc: 2360 movs r3, #96 @ 0x60 800e1ce: 607b str r3, [r7, #4] sConfigOC.Pulse = 0; 800e1d0: 2300 movs r3, #0 800e1d2: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800e1d4: 2300 movs r3, #0 800e1d6: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 800e1d8: 2300 movs r3, #0 800e1da: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 800e1dc: 1d3b adds r3, r7, #4 800e1de: 2204 movs r2, #4 800e1e0: 4619 mov r1, r3 800e1e2: 4812 ldr r0, [pc, #72] @ (800e22c ) 800e1e4: f003 fdda bl 8011d9c 800e1e8: 4603 mov r3, r0 800e1ea: 2b00 cmp r3, #0 800e1ec: d001 beq.n 800e1f2 { Error_Handler(); 800e1ee: f7fe f87b bl 800c2e8 } if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 800e1f2: 1d3b adds r3, r7, #4 800e1f4: 2208 movs r2, #8 800e1f6: 4619 mov r1, r3 800e1f8: 480c ldr r0, [pc, #48] @ (800e22c ) 800e1fa: f003 fdcf bl 8011d9c 800e1fe: 4603 mov r3, r0 800e200: 2b00 cmp r3, #0 800e202: d001 beq.n 800e208 { Error_Handler(); 800e204: f7fe f870 bl 800c2e8 } if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 800e208: 1d3b adds r3, r7, #4 800e20a: 220c movs r2, #12 800e20c: 4619 mov r1, r3 800e20e: 4807 ldr r0, [pc, #28] @ (800e22c ) 800e210: f003 fdc4 bl 8011d9c 800e214: 4603 mov r3, r0 800e216: 2b00 cmp r3, #0 800e218: d001 beq.n 800e21e { Error_Handler(); 800e21a: f7fe f865 bl 800c2e8 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 800e21e: 4803 ldr r0, [pc, #12] @ (800e22c ) 800e220: f000 f826 bl 800e270 } 800e224: bf00 nop 800e226: 3738 adds r7, #56 @ 0x38 800e228: 46bd mov sp, r7 800e22a: bd80 pop {r7, pc} 800e22c: 20000cf8 .word 0x20000cf8 800e230: 40000800 .word 0x40000800 0800e234 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { 800e234: b480 push {r7} 800e236: b085 sub sp, #20 800e238: af00 add r7, sp, #0 800e23a: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM4) 800e23c: 687b ldr r3, [r7, #4] 800e23e: 681b ldr r3, [r3, #0] 800e240: 4a09 ldr r2, [pc, #36] @ (800e268 ) 800e242: 4293 cmp r3, r2 800e244: d10b bne.n 800e25e { /* USER CODE BEGIN TIM4_MspInit 0 */ /* USER CODE END TIM4_MspInit 0 */ /* TIM4 clock enable */ __HAL_RCC_TIM4_CLK_ENABLE(); 800e246: 4b09 ldr r3, [pc, #36] @ (800e26c ) 800e248: 69db ldr r3, [r3, #28] 800e24a: 4a08 ldr r2, [pc, #32] @ (800e26c ) 800e24c: f043 0304 orr.w r3, r3, #4 800e250: 61d3 str r3, [r2, #28] 800e252: 4b06 ldr r3, [pc, #24] @ (800e26c ) 800e254: 69db ldr r3, [r3, #28] 800e256: f003 0304 and.w r3, r3, #4 800e25a: 60fb str r3, [r7, #12] 800e25c: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 800e25e: bf00 nop 800e260: 3714 adds r7, #20 800e262: 46bd mov sp, r7 800e264: bc80 pop {r7} 800e266: 4770 bx lr 800e268: 40000800 .word 0x40000800 800e26c: 40021000 .word 0x40021000 0800e270 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) { 800e270: b580 push {r7, lr} 800e272: b088 sub sp, #32 800e274: af00 add r7, sp, #0 800e276: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800e278: f107 030c add.w r3, r7, #12 800e27c: 2200 movs r2, #0 800e27e: 601a str r2, [r3, #0] 800e280: 605a str r2, [r3, #4] 800e282: 609a str r2, [r3, #8] 800e284: 60da str r2, [r3, #12] if(timHandle->Instance==TIM4) 800e286: 687b ldr r3, [r7, #4] 800e288: 681b ldr r3, [r3, #0] 800e28a: 4a17 ldr r2, [pc, #92] @ (800e2e8 ) 800e28c: 4293 cmp r3, r2 800e28e: d126 bne.n 800e2de { /* USER CODE BEGIN TIM4_MspPostInit 0 */ /* USER CODE END TIM4_MspPostInit 0 */ __HAL_RCC_GPIOD_CLK_ENABLE(); 800e290: 4b16 ldr r3, [pc, #88] @ (800e2ec ) 800e292: 699b ldr r3, [r3, #24] 800e294: 4a15 ldr r2, [pc, #84] @ (800e2ec ) 800e296: f043 0320 orr.w r3, r3, #32 800e29a: 6193 str r3, [r2, #24] 800e29c: 4b13 ldr r3, [pc, #76] @ (800e2ec ) 800e29e: 699b ldr r3, [r3, #24] 800e2a0: f003 0320 and.w r3, r3, #32 800e2a4: 60bb str r3, [r7, #8] 800e2a6: 68bb ldr r3, [r7, #8] /**TIM4 GPIO Configuration PD13 ------> TIM4_CH2 PD14 ------> TIM4_CH3 PD15 ------> TIM4_CH4 */ GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; 800e2a8: f44f 4360 mov.w r3, #57344 @ 0xe000 800e2ac: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e2ae: 2302 movs r3, #2 800e2b0: 613b str r3, [r7, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800e2b2: 2302 movs r3, #2 800e2b4: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e2b6: f107 030c add.w r3, r7, #12 800e2ba: 4619 mov r1, r3 800e2bc: 480c ldr r0, [pc, #48] @ (800e2f0 ) 800e2be: f002 f8f3 bl 80104a8 __HAL_AFIO_REMAP_TIM4_ENABLE(); 800e2c2: 4b0c ldr r3, [pc, #48] @ (800e2f4 ) 800e2c4: 685b ldr r3, [r3, #4] 800e2c6: 61fb str r3, [r7, #28] 800e2c8: 69fb ldr r3, [r7, #28] 800e2ca: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800e2ce: 61fb str r3, [r7, #28] 800e2d0: 69fb ldr r3, [r7, #28] 800e2d2: f443 5380 orr.w r3, r3, #4096 @ 0x1000 800e2d6: 61fb str r3, [r7, #28] 800e2d8: 4a06 ldr r2, [pc, #24] @ (800e2f4 ) 800e2da: 69fb ldr r3, [r7, #28] 800e2dc: 6053 str r3, [r2, #4] /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 800e2de: bf00 nop 800e2e0: 3720 adds r7, #32 800e2e2: 46bd mov sp, r7 800e2e4: bd80 pop {r7, pc} 800e2e6: bf00 nop 800e2e8: 40000800 .word 0x40000800 800e2ec: 40021000 .word 0x40021000 800e2f0: 40011400 .word 0x40011400 800e2f4: 40010000 .word 0x40010000 0800e2f8 : UART_HandleTypeDef huart2; UART_HandleTypeDef huart3; /* UART5 init function */ void MX_UART5_Init(void) { 800e2f8: b580 push {r7, lr} 800e2fa: af00 add r7, sp, #0 /* USER CODE END UART5_Init 0 */ /* USER CODE BEGIN UART5_Init 1 */ /* USER CODE END UART5_Init 1 */ huart5.Instance = UART5; 800e2fc: 4b11 ldr r3, [pc, #68] @ (800e344 ) 800e2fe: 4a12 ldr r2, [pc, #72] @ (800e348 ) 800e300: 601a str r2, [r3, #0] huart5.Init.BaudRate = 115200; 800e302: 4b10 ldr r3, [pc, #64] @ (800e344 ) 800e304: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e308: 605a str r2, [r3, #4] huart5.Init.WordLength = UART_WORDLENGTH_8B; 800e30a: 4b0e ldr r3, [pc, #56] @ (800e344 ) 800e30c: 2200 movs r2, #0 800e30e: 609a str r2, [r3, #8] huart5.Init.StopBits = UART_STOPBITS_1; 800e310: 4b0c ldr r3, [pc, #48] @ (800e344 ) 800e312: 2200 movs r2, #0 800e314: 60da str r2, [r3, #12] huart5.Init.Parity = UART_PARITY_NONE; 800e316: 4b0b ldr r3, [pc, #44] @ (800e344 ) 800e318: 2200 movs r2, #0 800e31a: 611a str r2, [r3, #16] huart5.Init.Mode = UART_MODE_TX_RX; 800e31c: 4b09 ldr r3, [pc, #36] @ (800e344 ) 800e31e: 220c movs r2, #12 800e320: 615a str r2, [r3, #20] huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e322: 4b08 ldr r3, [pc, #32] @ (800e344 ) 800e324: 2200 movs r2, #0 800e326: 619a str r2, [r3, #24] huart5.Init.OverSampling = UART_OVERSAMPLING_16; 800e328: 4b06 ldr r3, [pc, #24] @ (800e344 ) 800e32a: 2200 movs r2, #0 800e32c: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart5) != HAL_OK) 800e32e: 4805 ldr r0, [pc, #20] @ (800e344 ) 800e330: f004 f9de bl 80126f0 800e334: 4603 mov r3, r0 800e336: 2b00 cmp r3, #0 800e338: d001 beq.n 800e33e { Error_Handler(); 800e33a: f7fd ffd5 bl 800c2e8 } /* USER CODE BEGIN UART5_Init 2 */ /* USER CODE END UART5_Init 2 */ } 800e33e: bf00 nop 800e340: bd80 pop {r7, pc} 800e342: bf00 nop 800e344: 20000d40 .word 0x20000d40 800e348: 40005000 .word 0x40005000 0800e34c : /* USART1 init function */ void MX_USART1_UART_Init(void) { 800e34c: b580 push {r7, lr} 800e34e: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 800e350: 4b11 ldr r3, [pc, #68] @ (800e398 ) 800e352: 4a12 ldr r2, [pc, #72] @ (800e39c ) 800e354: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 800e356: 4b10 ldr r3, [pc, #64] @ (800e398 ) 800e358: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e35c: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 800e35e: 4b0e ldr r3, [pc, #56] @ (800e398 ) 800e360: 2200 movs r2, #0 800e362: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 800e364: 4b0c ldr r3, [pc, #48] @ (800e398 ) 800e366: 2200 movs r2, #0 800e368: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 800e36a: 4b0b ldr r3, [pc, #44] @ (800e398 ) 800e36c: 2200 movs r2, #0 800e36e: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 800e370: 4b09 ldr r3, [pc, #36] @ (800e398 ) 800e372: 220c movs r2, #12 800e374: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e376: 4b08 ldr r3, [pc, #32] @ (800e398 ) 800e378: 2200 movs r2, #0 800e37a: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 800e37c: 4b06 ldr r3, [pc, #24] @ (800e398 ) 800e37e: 2200 movs r2, #0 800e380: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 800e382: 4805 ldr r0, [pc, #20] @ (800e398 ) 800e384: f004 f9b4 bl 80126f0 800e388: 4603 mov r3, r0 800e38a: 2b00 cmp r3, #0 800e38c: d001 beq.n 800e392 { Error_Handler(); 800e38e: f7fd ffab bl 800c2e8 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 800e392: bf00 nop 800e394: bd80 pop {r7, pc} 800e396: bf00 nop 800e398: 20000d88 .word 0x20000d88 800e39c: 40013800 .word 0x40013800 0800e3a0 : /* USART2 init function */ void MX_USART2_UART_Init(void) { 800e3a0: b580 push {r7, lr} 800e3a2: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 800e3a4: 4b11 ldr r3, [pc, #68] @ (800e3ec ) 800e3a6: 4a12 ldr r2, [pc, #72] @ (800e3f0 ) 800e3a8: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 800e3aa: 4b10 ldr r3, [pc, #64] @ (800e3ec ) 800e3ac: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e3b0: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 800e3b2: 4b0e ldr r3, [pc, #56] @ (800e3ec ) 800e3b4: 2200 movs r2, #0 800e3b6: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 800e3b8: 4b0c ldr r3, [pc, #48] @ (800e3ec ) 800e3ba: 2200 movs r2, #0 800e3bc: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 800e3be: 4b0b ldr r3, [pc, #44] @ (800e3ec ) 800e3c0: 2200 movs r2, #0 800e3c2: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 800e3c4: 4b09 ldr r3, [pc, #36] @ (800e3ec ) 800e3c6: 220c movs r2, #12 800e3c8: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e3ca: 4b08 ldr r3, [pc, #32] @ (800e3ec ) 800e3cc: 2200 movs r2, #0 800e3ce: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 800e3d0: 4b06 ldr r3, [pc, #24] @ (800e3ec ) 800e3d2: 2200 movs r2, #0 800e3d4: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 800e3d6: 4805 ldr r0, [pc, #20] @ (800e3ec ) 800e3d8: f004 f98a bl 80126f0 800e3dc: 4603 mov r3, r0 800e3de: 2b00 cmp r3, #0 800e3e0: d001 beq.n 800e3e6 { Error_Handler(); 800e3e2: f7fd ff81 bl 800c2e8 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } 800e3e6: bf00 nop 800e3e8: bd80 pop {r7, pc} 800e3ea: bf00 nop 800e3ec: 20000dd0 .word 0x20000dd0 800e3f0: 40004400 .word 0x40004400 0800e3f4 : /* USART3 init function */ void MX_USART3_UART_Init(void) { 800e3f4: b580 push {r7, lr} 800e3f6: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; 800e3f8: 4b11 ldr r3, [pc, #68] @ (800e440 ) 800e3fa: 4a12 ldr r2, [pc, #72] @ (800e444 ) 800e3fc: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; 800e3fe: 4b10 ldr r3, [pc, #64] @ (800e440 ) 800e400: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e404: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; 800e406: 4b0e ldr r3, [pc, #56] @ (800e440 ) 800e408: 2200 movs r2, #0 800e40a: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; 800e40c: 4b0c ldr r3, [pc, #48] @ (800e440 ) 800e40e: 2200 movs r2, #0 800e410: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; 800e412: 4b0b ldr r3, [pc, #44] @ (800e440 ) 800e414: 2200 movs r2, #0 800e416: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; 800e418: 4b09 ldr r3, [pc, #36] @ (800e440 ) 800e41a: 220c movs r2, #12 800e41c: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e41e: 4b08 ldr r3, [pc, #32] @ (800e440 ) 800e420: 2200 movs r2, #0 800e422: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; 800e424: 4b06 ldr r3, [pc, #24] @ (800e440 ) 800e426: 2200 movs r2, #0 800e428: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart3) != HAL_OK) 800e42a: 4805 ldr r0, [pc, #20] @ (800e440 ) 800e42c: f004 f960 bl 80126f0 800e430: 4603 mov r3, r0 800e432: 2b00 cmp r3, #0 800e434: d001 beq.n 800e43a { Error_Handler(); 800e436: f7fd ff57 bl 800c2e8 } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } 800e43a: bf00 nop 800e43c: bd80 pop {r7, pc} 800e43e: bf00 nop 800e440: 20000e18 .word 0x20000e18 800e444: 40004800 .word 0x40004800 0800e448 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { 800e448: b580 push {r7, lr} 800e44a: b092 sub sp, #72 @ 0x48 800e44c: af00 add r7, sp, #0 800e44e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800e450: f107 0330 add.w r3, r7, #48 @ 0x30 800e454: 2200 movs r2, #0 800e456: 601a str r2, [r3, #0] 800e458: 605a str r2, [r3, #4] 800e45a: 609a str r2, [r3, #8] 800e45c: 60da str r2, [r3, #12] if(uartHandle->Instance==UART5) 800e45e: 687b ldr r3, [r7, #4] 800e460: 681b ldr r3, [r3, #0] 800e462: 4a91 ldr r2, [pc, #580] @ (800e6a8 ) 800e464: 4293 cmp r3, r2 800e466: d13d bne.n 800e4e4 { /* USER CODE BEGIN UART5_MspInit 0 */ /* USER CODE END UART5_MspInit 0 */ /* UART5 clock enable */ __HAL_RCC_UART5_CLK_ENABLE(); 800e468: 4b90 ldr r3, [pc, #576] @ (800e6ac ) 800e46a: 69db ldr r3, [r3, #28] 800e46c: 4a8f ldr r2, [pc, #572] @ (800e6ac ) 800e46e: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 800e472: 61d3 str r3, [r2, #28] 800e474: 4b8d ldr r3, [pc, #564] @ (800e6ac ) 800e476: 69db ldr r3, [r3, #28] 800e478: f403 1380 and.w r3, r3, #1048576 @ 0x100000 800e47c: 62fb str r3, [r7, #44] @ 0x2c 800e47e: 6afb ldr r3, [r7, #44] @ 0x2c __HAL_RCC_GPIOC_CLK_ENABLE(); 800e480: 4b8a ldr r3, [pc, #552] @ (800e6ac ) 800e482: 699b ldr r3, [r3, #24] 800e484: 4a89 ldr r2, [pc, #548] @ (800e6ac ) 800e486: f043 0310 orr.w r3, r3, #16 800e48a: 6193 str r3, [r2, #24] 800e48c: 4b87 ldr r3, [pc, #540] @ (800e6ac ) 800e48e: 699b ldr r3, [r3, #24] 800e490: f003 0310 and.w r3, r3, #16 800e494: 62bb str r3, [r7, #40] @ 0x28 800e496: 6abb ldr r3, [r7, #40] @ 0x28 __HAL_RCC_GPIOD_CLK_ENABLE(); 800e498: 4b84 ldr r3, [pc, #528] @ (800e6ac ) 800e49a: 699b ldr r3, [r3, #24] 800e49c: 4a83 ldr r2, [pc, #524] @ (800e6ac ) 800e49e: f043 0320 orr.w r3, r3, #32 800e4a2: 6193 str r3, [r2, #24] 800e4a4: 4b81 ldr r3, [pc, #516] @ (800e6ac ) 800e4a6: 699b ldr r3, [r3, #24] 800e4a8: f003 0320 and.w r3, r3, #32 800e4ac: 627b str r3, [r7, #36] @ 0x24 800e4ae: 6a7b ldr r3, [r7, #36] @ 0x24 /**UART5 GPIO Configuration PC12 ------> UART5_TX PD2 ------> UART5_RX */ GPIO_InitStruct.Pin = GPIO_PIN_12; 800e4b0: f44f 5380 mov.w r3, #4096 @ 0x1000 800e4b4: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e4b6: 2302 movs r3, #2 800e4b8: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e4ba: 2303 movs r3, #3 800e4bc: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800e4be: f107 0330 add.w r3, r7, #48 @ 0x30 800e4c2: 4619 mov r1, r3 800e4c4: 487a ldr r0, [pc, #488] @ (800e6b0 ) 800e4c6: f001 ffef bl 80104a8 GPIO_InitStruct.Pin = GPIO_PIN_2; 800e4ca: 2304 movs r3, #4 800e4cc: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e4ce: 2300 movs r3, #0 800e4d0: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e4d2: 2300 movs r3, #0 800e4d4: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e4d6: f107 0330 add.w r3, r7, #48 @ 0x30 800e4da: 4619 mov r1, r3 800e4dc: 4875 ldr r0, [pc, #468] @ (800e6b4 ) 800e4de: f001 ffe3 bl 80104a8 HAL_NVIC_EnableIRQ(USART3_IRQn); /* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */ } } 800e4e2: e0dc b.n 800e69e else if(uartHandle->Instance==USART1) 800e4e4: 687b ldr r3, [r7, #4] 800e4e6: 681b ldr r3, [r3, #0] 800e4e8: 4a73 ldr r2, [pc, #460] @ (800e6b8 ) 800e4ea: 4293 cmp r3, r2 800e4ec: d13a bne.n 800e564 __HAL_RCC_USART1_CLK_ENABLE(); 800e4ee: 4b6f ldr r3, [pc, #444] @ (800e6ac ) 800e4f0: 699b ldr r3, [r3, #24] 800e4f2: 4a6e ldr r2, [pc, #440] @ (800e6ac ) 800e4f4: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800e4f8: 6193 str r3, [r2, #24] 800e4fa: 4b6c ldr r3, [pc, #432] @ (800e6ac ) 800e4fc: 699b ldr r3, [r3, #24] 800e4fe: f403 4380 and.w r3, r3, #16384 @ 0x4000 800e502: 623b str r3, [r7, #32] 800e504: 6a3b ldr r3, [r7, #32] __HAL_RCC_GPIOA_CLK_ENABLE(); 800e506: 4b69 ldr r3, [pc, #420] @ (800e6ac ) 800e508: 699b ldr r3, [r3, #24] 800e50a: 4a68 ldr r2, [pc, #416] @ (800e6ac ) 800e50c: f043 0304 orr.w r3, r3, #4 800e510: 6193 str r3, [r2, #24] 800e512: 4b66 ldr r3, [pc, #408] @ (800e6ac ) 800e514: 699b ldr r3, [r3, #24] 800e516: f003 0304 and.w r3, r3, #4 800e51a: 61fb str r3, [r7, #28] 800e51c: 69fb ldr r3, [r7, #28] GPIO_InitStruct.Pin = GPIO_PIN_9; 800e51e: f44f 7300 mov.w r3, #512 @ 0x200 800e522: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e524: 2302 movs r3, #2 800e526: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e528: 2303 movs r3, #3 800e52a: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800e52c: f107 0330 add.w r3, r7, #48 @ 0x30 800e530: 4619 mov r1, r3 800e532: 4862 ldr r0, [pc, #392] @ (800e6bc ) 800e534: f001 ffb8 bl 80104a8 GPIO_InitStruct.Pin = GPIO_PIN_10; 800e538: f44f 6380 mov.w r3, #1024 @ 0x400 800e53c: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e53e: 2300 movs r3, #0 800e540: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e542: 2300 movs r3, #0 800e544: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800e546: f107 0330 add.w r3, r7, #48 @ 0x30 800e54a: 4619 mov r1, r3 800e54c: 485b ldr r0, [pc, #364] @ (800e6bc ) 800e54e: f001 ffab bl 80104a8 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 800e552: 2200 movs r2, #0 800e554: 2100 movs r1, #0 800e556: 2025 movs r0, #37 @ 0x25 800e558: f001 fe11 bl 801017e HAL_NVIC_EnableIRQ(USART1_IRQn); 800e55c: 2025 movs r0, #37 @ 0x25 800e55e: f001 fe2a bl 80101b6 } 800e562: e09c b.n 800e69e else if(uartHandle->Instance==USART2) 800e564: 687b ldr r3, [r7, #4] 800e566: 681b ldr r3, [r3, #0] 800e568: 4a55 ldr r2, [pc, #340] @ (800e6c0 ) 800e56a: 4293 cmp r3, r2 800e56c: d146 bne.n 800e5fc __HAL_RCC_USART2_CLK_ENABLE(); 800e56e: 4b4f ldr r3, [pc, #316] @ (800e6ac ) 800e570: 69db ldr r3, [r3, #28] 800e572: 4a4e ldr r2, [pc, #312] @ (800e6ac ) 800e574: f443 3300 orr.w r3, r3, #131072 @ 0x20000 800e578: 61d3 str r3, [r2, #28] 800e57a: 4b4c ldr r3, [pc, #304] @ (800e6ac ) 800e57c: 69db ldr r3, [r3, #28] 800e57e: f403 3300 and.w r3, r3, #131072 @ 0x20000 800e582: 61bb str r3, [r7, #24] 800e584: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); 800e586: 4b49 ldr r3, [pc, #292] @ (800e6ac ) 800e588: 699b ldr r3, [r3, #24] 800e58a: 4a48 ldr r2, [pc, #288] @ (800e6ac ) 800e58c: f043 0320 orr.w r3, r3, #32 800e590: 6193 str r3, [r2, #24] 800e592: 4b46 ldr r3, [pc, #280] @ (800e6ac ) 800e594: 699b ldr r3, [r3, #24] 800e596: f003 0320 and.w r3, r3, #32 800e59a: 617b str r3, [r7, #20] 800e59c: 697b ldr r3, [r7, #20] GPIO_InitStruct.Pin = GPIO_PIN_5; 800e59e: 2320 movs r3, #32 800e5a0: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e5a2: 2302 movs r3, #2 800e5a4: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e5a6: 2303 movs r3, #3 800e5a8: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e5aa: f107 0330 add.w r3, r7, #48 @ 0x30 800e5ae: 4619 mov r1, r3 800e5b0: 4840 ldr r0, [pc, #256] @ (800e6b4 ) 800e5b2: f001 ff79 bl 80104a8 GPIO_InitStruct.Pin = GPIO_PIN_6; 800e5b6: 2340 movs r3, #64 @ 0x40 800e5b8: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e5ba: 2300 movs r3, #0 800e5bc: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e5be: 2300 movs r3, #0 800e5c0: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e5c2: f107 0330 add.w r3, r7, #48 @ 0x30 800e5c6: 4619 mov r1, r3 800e5c8: 483a ldr r0, [pc, #232] @ (800e6b4 ) 800e5ca: f001 ff6d bl 80104a8 __HAL_AFIO_REMAP_USART2_ENABLE(); 800e5ce: 4b3d ldr r3, [pc, #244] @ (800e6c4 ) 800e5d0: 685b ldr r3, [r3, #4] 800e5d2: 643b str r3, [r7, #64] @ 0x40 800e5d4: 6c3b ldr r3, [r7, #64] @ 0x40 800e5d6: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800e5da: 643b str r3, [r7, #64] @ 0x40 800e5dc: 6c3b ldr r3, [r7, #64] @ 0x40 800e5de: f043 0308 orr.w r3, r3, #8 800e5e2: 643b str r3, [r7, #64] @ 0x40 800e5e4: 4a37 ldr r2, [pc, #220] @ (800e6c4 ) 800e5e6: 6c3b ldr r3, [r7, #64] @ 0x40 800e5e8: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 800e5ea: 2200 movs r2, #0 800e5ec: 2100 movs r1, #0 800e5ee: 2026 movs r0, #38 @ 0x26 800e5f0: f001 fdc5 bl 801017e HAL_NVIC_EnableIRQ(USART2_IRQn); 800e5f4: 2026 movs r0, #38 @ 0x26 800e5f6: f001 fdde bl 80101b6 } 800e5fa: e050 b.n 800e69e else if(uartHandle->Instance==USART3) 800e5fc: 687b ldr r3, [r7, #4] 800e5fe: 681b ldr r3, [r3, #0] 800e600: 4a31 ldr r2, [pc, #196] @ (800e6c8 ) 800e602: 4293 cmp r3, r2 800e604: d14b bne.n 800e69e __HAL_RCC_USART3_CLK_ENABLE(); 800e606: 4b29 ldr r3, [pc, #164] @ (800e6ac ) 800e608: 69db ldr r3, [r3, #28] 800e60a: 4a28 ldr r2, [pc, #160] @ (800e6ac ) 800e60c: f443 2380 orr.w r3, r3, #262144 @ 0x40000 800e610: 61d3 str r3, [r2, #28] 800e612: 4b26 ldr r3, [pc, #152] @ (800e6ac ) 800e614: 69db ldr r3, [r3, #28] 800e616: f403 2380 and.w r3, r3, #262144 @ 0x40000 800e61a: 613b str r3, [r7, #16] 800e61c: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOC_CLK_ENABLE(); 800e61e: 4b23 ldr r3, [pc, #140] @ (800e6ac ) 800e620: 699b ldr r3, [r3, #24] 800e622: 4a22 ldr r2, [pc, #136] @ (800e6ac ) 800e624: f043 0310 orr.w r3, r3, #16 800e628: 6193 str r3, [r2, #24] 800e62a: 4b20 ldr r3, [pc, #128] @ (800e6ac ) 800e62c: 699b ldr r3, [r3, #24] 800e62e: f003 0310 and.w r3, r3, #16 800e632: 60fb str r3, [r7, #12] 800e634: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_10; 800e636: f44f 6380 mov.w r3, #1024 @ 0x400 800e63a: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e63c: 2302 movs r3, #2 800e63e: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e640: 2303 movs r3, #3 800e642: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800e644: f107 0330 add.w r3, r7, #48 @ 0x30 800e648: 4619 mov r1, r3 800e64a: 4819 ldr r0, [pc, #100] @ (800e6b0 ) 800e64c: f001 ff2c bl 80104a8 GPIO_InitStruct.Pin = GPIO_PIN_11; 800e650: f44f 6300 mov.w r3, #2048 @ 0x800 800e654: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e656: 2300 movs r3, #0 800e658: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e65a: 2300 movs r3, #0 800e65c: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800e65e: f107 0330 add.w r3, r7, #48 @ 0x30 800e662: 4619 mov r1, r3 800e664: 4812 ldr r0, [pc, #72] @ (800e6b0 ) 800e666: f001 ff1f bl 80104a8 __HAL_AFIO_REMAP_USART3_PARTIAL(); 800e66a: 4b16 ldr r3, [pc, #88] @ (800e6c4 ) 800e66c: 685b ldr r3, [r3, #4] 800e66e: 647b str r3, [r7, #68] @ 0x44 800e670: 6c7b ldr r3, [r7, #68] @ 0x44 800e672: f023 0330 bic.w r3, r3, #48 @ 0x30 800e676: 647b str r3, [r7, #68] @ 0x44 800e678: 6c7b ldr r3, [r7, #68] @ 0x44 800e67a: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800e67e: 647b str r3, [r7, #68] @ 0x44 800e680: 6c7b ldr r3, [r7, #68] @ 0x44 800e682: f043 0310 orr.w r3, r3, #16 800e686: 647b str r3, [r7, #68] @ 0x44 800e688: 4a0e ldr r2, [pc, #56] @ (800e6c4 ) 800e68a: 6c7b ldr r3, [r7, #68] @ 0x44 800e68c: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); 800e68e: 2200 movs r2, #0 800e690: 2100 movs r1, #0 800e692: 2027 movs r0, #39 @ 0x27 800e694: f001 fd73 bl 801017e HAL_NVIC_EnableIRQ(USART3_IRQn); 800e698: 2027 movs r0, #39 @ 0x27 800e69a: f001 fd8c bl 80101b6 } 800e69e: bf00 nop 800e6a0: 3748 adds r7, #72 @ 0x48 800e6a2: 46bd mov sp, r7 800e6a4: bd80 pop {r7, pc} 800e6a6: bf00 nop 800e6a8: 40005000 .word 0x40005000 800e6ac: 40021000 .word 0x40021000 800e6b0: 40011000 .word 0x40011000 800e6b4: 40011400 .word 0x40011400 800e6b8: 40013800 .word 0x40013800 800e6bc: 40010800 .word 0x40010800 800e6c0: 40004400 .word 0x40004400 800e6c4: 40010000 .word 0x40010000 800e6c8: 40004800 .word 0x40004800 0800e6cc : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ 800e6cc: f8df d034 ldr.w sp, [pc, #52] @ 800e704 /* Call the clock system initialization function.*/ bl SystemInit 800e6d0: f7ff fd1e bl 800e110 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 800e6d4: 480c ldr r0, [pc, #48] @ (800e708 ) ldr r1, =_edata 800e6d6: 490d ldr r1, [pc, #52] @ (800e70c ) ldr r2, =_sidata 800e6d8: 4a0d ldr r2, [pc, #52] @ (800e710 ) movs r3, #0 800e6da: 2300 movs r3, #0 b LoopCopyDataInit 800e6dc: e002 b.n 800e6e4 0800e6de : CopyDataInit: ldr r4, [r2, r3] 800e6de: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800e6e0: 50c4 str r4, [r0, r3] adds r3, r3, #4 800e6e2: 3304 adds r3, #4 0800e6e4 : LoopCopyDataInit: adds r4, r0, r3 800e6e4: 18c4 adds r4, r0, r3 cmp r4, r1 800e6e6: 428c cmp r4, r1 bcc CopyDataInit 800e6e8: d3f9 bcc.n 800e6de /* Zero fill the bss segment. */ ldr r2, =_sbss 800e6ea: 4a0a ldr r2, [pc, #40] @ (800e714 ) ldr r4, =_ebss 800e6ec: 4c0a ldr r4, [pc, #40] @ (800e718 ) movs r3, #0 800e6ee: 2300 movs r3, #0 b LoopFillZerobss 800e6f0: e001 b.n 800e6f6 0800e6f2 : FillZerobss: str r3, [r2] 800e6f2: 6013 str r3, [r2, #0] adds r2, r2, #4 800e6f4: 3204 adds r2, #4 0800e6f6 : LoopFillZerobss: cmp r2, r4 800e6f6: 42a2 cmp r2, r4 bcc FillZerobss 800e6f8: d3fb bcc.n 800e6f2 /* Call static constructors */ bl __libc_init_array 800e6fa: f005 fd9d bl 8014238 <__libc_init_array> /* Call the application's entry point.*/ bl main 800e6fe: f7fd fd05 bl 800c10c
bx lr 800e702: 4770 bx lr ldr sp, =_estack /* set stack pointer */ 800e704: 20010000 .word 0x20010000 ldr r0, =_sdata 800e708: 20000000 .word 0x20000000 ldr r1, =_edata 800e70c: 20000240 .word 0x20000240 ldr r2, =_sidata 800e710: 08017004 .word 0x08017004 ldr r2, =_sbss 800e714: 20000240 .word 0x20000240 ldr r4, =_ebss 800e718: 20000fb0 .word 0x20000fb0 0800e71c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800e71c: e7fe b.n 800e71c ... 0800e720 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 800e720: b580 push {r7, lr} 800e722: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800e724: 4b08 ldr r3, [pc, #32] @ (800e748 ) 800e726: 681b ldr r3, [r3, #0] 800e728: 4a07 ldr r2, [pc, #28] @ (800e748 ) 800e72a: f043 0310 orr.w r3, r3, #16 800e72e: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800e730: 2003 movs r0, #3 800e732: f001 fd19 bl 8010168 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 800e736: 200f movs r0, #15 800e738: f000 f808 bl 800e74c /* Init the low level hardware */ HAL_MspInit(); 800e73c: f7ff fba8 bl 800de90 /* Return function status */ return HAL_OK; 800e740: 2300 movs r3, #0 } 800e742: 4618 mov r0, r3 800e744: bd80 pop {r7, pc} 800e746: bf00 nop 800e748: 40022000 .word 0x40022000 0800e74c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800e74c: b580 push {r7, lr} 800e74e: b082 sub sp, #8 800e750: af00 add r7, sp, #0 800e752: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800e754: 4b12 ldr r3, [pc, #72] @ (800e7a0 ) 800e756: 681a ldr r2, [r3, #0] 800e758: 4b12 ldr r3, [pc, #72] @ (800e7a4 ) 800e75a: 781b ldrb r3, [r3, #0] 800e75c: 4619 mov r1, r3 800e75e: f44f 737a mov.w r3, #1000 @ 0x3e8 800e762: fbb3 f3f1 udiv r3, r3, r1 800e766: fbb2 f3f3 udiv r3, r2, r3 800e76a: 4618 mov r0, r3 800e76c: f001 fd31 bl 80101d2 800e770: 4603 mov r3, r0 800e772: 2b00 cmp r3, #0 800e774: d001 beq.n 800e77a { return HAL_ERROR; 800e776: 2301 movs r3, #1 800e778: e00e b.n 800e798 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800e77a: 687b ldr r3, [r7, #4] 800e77c: 2b0f cmp r3, #15 800e77e: d80a bhi.n 800e796 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 800e780: 2200 movs r2, #0 800e782: 6879 ldr r1, [r7, #4] 800e784: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800e788: f001 fcf9 bl 801017e uwTickPrio = TickPriority; 800e78c: 4a06 ldr r2, [pc, #24] @ (800e7a8 ) 800e78e: 687b ldr r3, [r7, #4] 800e790: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 800e792: 2300 movs r3, #0 800e794: e000 b.n 800e798 return HAL_ERROR; 800e796: 2301 movs r3, #1 } 800e798: 4618 mov r0, r3 800e79a: 3708 adds r7, #8 800e79c: 46bd mov sp, r7 800e79e: bd80 pop {r7, pc} 800e7a0: 2000006c .word 0x2000006c 800e7a4: 20000074 .word 0x20000074 800e7a8: 20000070 .word 0x20000070 0800e7ac : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 800e7ac: b480 push {r7} 800e7ae: af00 add r7, sp, #0 uwTick += uwTickFreq; 800e7b0: 4b05 ldr r3, [pc, #20] @ (800e7c8 ) 800e7b2: 781b ldrb r3, [r3, #0] 800e7b4: 461a mov r2, r3 800e7b6: 4b05 ldr r3, [pc, #20] @ (800e7cc ) 800e7b8: 681b ldr r3, [r3, #0] 800e7ba: 4413 add r3, r2 800e7bc: 4a03 ldr r2, [pc, #12] @ (800e7cc ) 800e7be: 6013 str r3, [r2, #0] } 800e7c0: bf00 nop 800e7c2: 46bd mov sp, r7 800e7c4: bc80 pop {r7} 800e7c6: 4770 bx lr 800e7c8: 20000074 .word 0x20000074 800e7cc: 20000e60 .word 0x20000e60 0800e7d0 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 800e7d0: b480 push {r7} 800e7d2: af00 add r7, sp, #0 return uwTick; 800e7d4: 4b02 ldr r3, [pc, #8] @ (800e7e0 ) 800e7d6: 681b ldr r3, [r3, #0] } 800e7d8: 4618 mov r0, r3 800e7da: 46bd mov sp, r7 800e7dc: bc80 pop {r7} 800e7de: 4770 bx lr 800e7e0: 20000e60 .word 0x20000e60 0800e7e4 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 800e7e4: b580 push {r7, lr} 800e7e6: b084 sub sp, #16 800e7e8: af00 add r7, sp, #0 800e7ea: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 800e7ec: f7ff fff0 bl 800e7d0 800e7f0: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800e7f2: 687b ldr r3, [r7, #4] 800e7f4: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800e7f6: 68fb ldr r3, [r7, #12] 800e7f8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800e7fc: d005 beq.n 800e80a { wait += (uint32_t)(uwTickFreq); 800e7fe: 4b0a ldr r3, [pc, #40] @ (800e828 ) 800e800: 781b ldrb r3, [r3, #0] 800e802: 461a mov r2, r3 800e804: 68fb ldr r3, [r7, #12] 800e806: 4413 add r3, r2 800e808: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 800e80a: bf00 nop 800e80c: f7ff ffe0 bl 800e7d0 800e810: 4602 mov r2, r0 800e812: 68bb ldr r3, [r7, #8] 800e814: 1ad3 subs r3, r2, r3 800e816: 68fa ldr r2, [r7, #12] 800e818: 429a cmp r2, r3 800e81a: d8f7 bhi.n 800e80c { } } 800e81c: bf00 nop 800e81e: bf00 nop 800e820: 3710 adds r7, #16 800e822: 46bd mov sp, r7 800e824: bd80 pop {r7, pc} 800e826: bf00 nop 800e828: 20000074 .word 0x20000074 0800e82c : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 800e82c: b580 push {r7, lr} 800e82e: b086 sub sp, #24 800e830: af00 add r7, sp, #0 800e832: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800e834: 2300 movs r3, #0 800e836: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 800e838: 2300 movs r3, #0 800e83a: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 800e83c: 2300 movs r3, #0 800e83e: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 800e840: 2300 movs r3, #0 800e842: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 800e844: 687b ldr r3, [r7, #4] 800e846: 2b00 cmp r3, #0 800e848: d101 bne.n 800e84e { return HAL_ERROR; 800e84a: 2301 movs r3, #1 800e84c: e0be b.n 800e9cc assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 800e84e: 687b ldr r3, [r7, #4] 800e850: 689b ldr r3, [r3, #8] 800e852: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 800e854: 687b ldr r3, [r7, #4] 800e856: 6a9b ldr r3, [r3, #40] @ 0x28 800e858: 2b00 cmp r3, #0 800e85a: d109 bne.n 800e870 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 800e85c: 687b ldr r3, [r7, #4] 800e85e: 2200 movs r2, #0 800e860: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 800e862: 687b ldr r3, [r7, #4] 800e864: 2200 movs r2, #0 800e866: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 800e86a: 6878 ldr r0, [r7, #4] 800e86c: f7fa feea bl 8009644 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800e870: 6878 ldr r0, [r7, #4] 800e872: f000 fbf1 bl 800f058 800e876: 4603 mov r3, r0 800e878: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 800e87a: 687b ldr r3, [r7, #4] 800e87c: 6a9b ldr r3, [r3, #40] @ 0x28 800e87e: f003 0310 and.w r3, r3, #16 800e882: 2b00 cmp r3, #0 800e884: f040 8099 bne.w 800e9ba 800e888: 7dfb ldrb r3, [r7, #23] 800e88a: 2b00 cmp r3, #0 800e88c: f040 8095 bne.w 800e9ba (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800e890: 687b ldr r3, [r7, #4] 800e892: 6a9b ldr r3, [r3, #40] @ 0x28 800e894: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800e898: f023 0302 bic.w r3, r3, #2 800e89c: f043 0202 orr.w r2, r3, #2 800e8a0: 687b ldr r3, [r7, #4] 800e8a2: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 800e8a4: 687b ldr r3, [r7, #4] 800e8a6: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800e8a8: 687b ldr r3, [r7, #4] 800e8aa: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 800e8ac: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 800e8ae: 687b ldr r3, [r7, #4] 800e8b0: 7b1b ldrb r3, [r3, #12] 800e8b2: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800e8b4: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 800e8b6: 68ba ldr r2, [r7, #8] 800e8b8: 4313 orrs r3, r2 800e8ba: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 800e8bc: 687b ldr r3, [r7, #4] 800e8be: 689b ldr r3, [r3, #8] 800e8c0: f5b3 7f80 cmp.w r3, #256 @ 0x100 800e8c4: d003 beq.n 800e8ce 800e8c6: 687b ldr r3, [r7, #4] 800e8c8: 689b ldr r3, [r3, #8] 800e8ca: 2b01 cmp r3, #1 800e8cc: d102 bne.n 800e8d4 800e8ce: f44f 7380 mov.w r3, #256 @ 0x100 800e8d2: e000 b.n 800e8d6 800e8d4: 2300 movs r3, #0 800e8d6: 693a ldr r2, [r7, #16] 800e8d8: 4313 orrs r3, r2 800e8da: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 800e8dc: 687b ldr r3, [r7, #4] 800e8de: 7d1b ldrb r3, [r3, #20] 800e8e0: 2b01 cmp r3, #1 800e8e2: d119 bne.n 800e918 { if (hadc->Init.ContinuousConvMode == DISABLE) 800e8e4: 687b ldr r3, [r7, #4] 800e8e6: 7b1b ldrb r3, [r3, #12] 800e8e8: 2b00 cmp r3, #0 800e8ea: d109 bne.n 800e900 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 800e8ec: 687b ldr r3, [r7, #4] 800e8ee: 699b ldr r3, [r3, #24] 800e8f0: 3b01 subs r3, #1 800e8f2: 035a lsls r2, r3, #13 800e8f4: 693b ldr r3, [r7, #16] 800e8f6: 4313 orrs r3, r2 800e8f8: f443 6300 orr.w r3, r3, #2048 @ 0x800 800e8fc: 613b str r3, [r7, #16] 800e8fe: e00b b.n 800e918 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800e900: 687b ldr r3, [r7, #4] 800e902: 6a9b ldr r3, [r3, #40] @ 0x28 800e904: f043 0220 orr.w r2, r3, #32 800e908: 687b ldr r3, [r7, #4] 800e90a: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800e90c: 687b ldr r3, [r7, #4] 800e90e: 6adb ldr r3, [r3, #44] @ 0x2c 800e910: f043 0201 orr.w r2, r3, #1 800e914: 687b ldr r3, [r7, #4] 800e916: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 800e918: 687b ldr r3, [r7, #4] 800e91a: 681b ldr r3, [r3, #0] 800e91c: 685b ldr r3, [r3, #4] 800e91e: f423 4169 bic.w r1, r3, #59648 @ 0xe900 800e922: 687b ldr r3, [r7, #4] 800e924: 681b ldr r3, [r3, #0] 800e926: 693a ldr r2, [r7, #16] 800e928: 430a orrs r2, r1 800e92a: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 800e92c: 687b ldr r3, [r7, #4] 800e92e: 681b ldr r3, [r3, #0] 800e930: 689a ldr r2, [r3, #8] 800e932: 4b28 ldr r3, [pc, #160] @ (800e9d4 ) 800e934: 4013 ands r3, r2 800e936: 687a ldr r2, [r7, #4] 800e938: 6812 ldr r2, [r2, #0] 800e93a: 68b9 ldr r1, [r7, #8] 800e93c: 430b orrs r3, r1 800e93e: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 800e940: 687b ldr r3, [r7, #4] 800e942: 689b ldr r3, [r3, #8] 800e944: f5b3 7f80 cmp.w r3, #256 @ 0x100 800e948: d003 beq.n 800e952 800e94a: 687b ldr r3, [r7, #4] 800e94c: 689b ldr r3, [r3, #8] 800e94e: 2b01 cmp r3, #1 800e950: d104 bne.n 800e95c { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 800e952: 687b ldr r3, [r7, #4] 800e954: 691b ldr r3, [r3, #16] 800e956: 3b01 subs r3, #1 800e958: 051b lsls r3, r3, #20 800e95a: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 800e95c: 687b ldr r3, [r7, #4] 800e95e: 681b ldr r3, [r3, #0] 800e960: 6adb ldr r3, [r3, #44] @ 0x2c 800e962: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 800e966: 687b ldr r3, [r7, #4] 800e968: 681b ldr r3, [r3, #0] 800e96a: 68fa ldr r2, [r7, #12] 800e96c: 430a orrs r2, r1 800e96e: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800e970: 687b ldr r3, [r7, #4] 800e972: 681b ldr r3, [r3, #0] 800e974: 689a ldr r2, [r3, #8] 800e976: 4b18 ldr r3, [pc, #96] @ (800e9d8 ) 800e978: 4013 ands r3, r2 800e97a: 68ba ldr r2, [r7, #8] 800e97c: 429a cmp r2, r3 800e97e: d10b bne.n 800e998 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 800e980: 687b ldr r3, [r7, #4] 800e982: 2200 movs r2, #0 800e984: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 800e986: 687b ldr r3, [r7, #4] 800e988: 6a9b ldr r3, [r3, #40] @ 0x28 800e98a: f023 0303 bic.w r3, r3, #3 800e98e: f043 0201 orr.w r2, r3, #1 800e992: 687b ldr r3, [r7, #4] 800e994: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800e996: e018 b.n 800e9ca HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800e998: 687b ldr r3, [r7, #4] 800e99a: 6a9b ldr r3, [r3, #40] @ 0x28 800e99c: f023 0312 bic.w r3, r3, #18 800e9a0: f043 0210 orr.w r2, r3, #16 800e9a4: 687b ldr r3, [r7, #4] 800e9a6: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800e9a8: 687b ldr r3, [r7, #4] 800e9aa: 6adb ldr r3, [r3, #44] @ 0x2c 800e9ac: f043 0201 orr.w r2, r3, #1 800e9b0: 687b ldr r3, [r7, #4] 800e9b2: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 800e9b4: 2301 movs r3, #1 800e9b6: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800e9b8: e007 b.n 800e9ca } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800e9ba: 687b ldr r3, [r7, #4] 800e9bc: 6a9b ldr r3, [r3, #40] @ 0x28 800e9be: f043 0210 orr.w r2, r3, #16 800e9c2: 687b ldr r3, [r7, #4] 800e9c4: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 800e9c6: 2301 movs r3, #1 800e9c8: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 800e9ca: 7dfb ldrb r3, [r7, #23] } 800e9cc: 4618 mov r0, r3 800e9ce: 3718 adds r7, #24 800e9d0: 46bd mov sp, r7 800e9d2: bd80 pop {r7, pc} 800e9d4: ffe1f7fd .word 0xffe1f7fd 800e9d8: ff1f0efe .word 0xff1f0efe 0800e9dc : * Interruptions enabled in this function: None. * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) { 800e9dc: b580 push {r7, lr} 800e9de: b084 sub sp, #16 800e9e0: af00 add r7, sp, #0 800e9e2: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800e9e4: 2300 movs r3, #0 800e9e6: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800e9e8: 687b ldr r3, [r7, #4] 800e9ea: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800e9ee: 2b01 cmp r3, #1 800e9f0: d101 bne.n 800e9f6 800e9f2: 2302 movs r3, #2 800e9f4: e098 b.n 800eb28 800e9f6: 687b ldr r3, [r7, #4] 800e9f8: 2201 movs r2, #1 800e9fa: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 800e9fe: 6878 ldr r0, [r7, #4] 800ea00: f000 fad0 bl 800efa4 800ea04: 4603 mov r3, r0 800ea06: 73fb strb r3, [r7, #15] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 800ea08: 7bfb ldrb r3, [r7, #15] 800ea0a: 2b00 cmp r3, #0 800ea0c: f040 8087 bne.w 800eb1e { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 800ea10: 687b ldr r3, [r7, #4] 800ea12: 6a9b ldr r3, [r3, #40] @ 0x28 800ea14: f423 7340 bic.w r3, r3, #768 @ 0x300 800ea18: f023 0301 bic.w r3, r3, #1 800ea1c: f443 7280 orr.w r2, r3, #256 @ 0x100 800ea20: 687b ldr r3, [r7, #4] 800ea22: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 800ea24: 687b ldr r3, [r7, #4] 800ea26: 681b ldr r3, [r3, #0] 800ea28: 4a41 ldr r2, [pc, #260] @ (800eb30 ) 800ea2a: 4293 cmp r3, r2 800ea2c: d105 bne.n 800ea3a 800ea2e: 4b41 ldr r3, [pc, #260] @ (800eb34 ) 800ea30: 685b ldr r3, [r3, #4] 800ea32: f403 2370 and.w r3, r3, #983040 @ 0xf0000 800ea36: 2b00 cmp r3, #0 800ea38: d115 bne.n 800ea66 { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800ea3a: 687b ldr r3, [r7, #4] 800ea3c: 6a9b ldr r3, [r3, #40] @ 0x28 800ea3e: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 800ea42: 687b ldr r3, [r7, #4] 800ea44: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800ea46: 687b ldr r3, [r7, #4] 800ea48: 681b ldr r3, [r3, #0] 800ea4a: 685b ldr r3, [r3, #4] 800ea4c: f403 6380 and.w r3, r3, #1024 @ 0x400 800ea50: 2b00 cmp r3, #0 800ea52: d026 beq.n 800eaa2 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800ea54: 687b ldr r3, [r7, #4] 800ea56: 6a9b ldr r3, [r3, #40] @ 0x28 800ea58: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800ea5c: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800ea60: 687b ldr r3, [r7, #4] 800ea62: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800ea64: e01d b.n 800eaa2 } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800ea66: 687b ldr r3, [r7, #4] 800ea68: 6a9b ldr r3, [r3, #40] @ 0x28 800ea6a: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800ea6e: 687b ldr r3, [r7, #4] 800ea70: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 800ea72: 687b ldr r3, [r7, #4] 800ea74: 681b ldr r3, [r3, #0] 800ea76: 4a2f ldr r2, [pc, #188] @ (800eb34 ) 800ea78: 4293 cmp r3, r2 800ea7a: d004 beq.n 800ea86 800ea7c: 687b ldr r3, [r7, #4] 800ea7e: 681b ldr r3, [r3, #0] 800ea80: 4a2b ldr r2, [pc, #172] @ (800eb30 ) 800ea82: 4293 cmp r3, r2 800ea84: d10d bne.n 800eaa2 800ea86: 4b2b ldr r3, [pc, #172] @ (800eb34 ) 800ea88: 685b ldr r3, [r3, #4] 800ea8a: f403 6380 and.w r3, r3, #1024 @ 0x400 800ea8e: 2b00 cmp r3, #0 800ea90: d007 beq.n 800eaa2 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800ea92: 687b ldr r3, [r7, #4] 800ea94: 6a9b ldr r3, [r3, #40] @ 0x28 800ea96: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800ea9a: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800ea9e: 687b ldr r3, [r7, #4] 800eaa0: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800eaa2: 687b ldr r3, [r7, #4] 800eaa4: 6a9b ldr r3, [r3, #40] @ 0x28 800eaa6: f403 5380 and.w r3, r3, #4096 @ 0x1000 800eaaa: 2b00 cmp r3, #0 800eaac: d006 beq.n 800eabc { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 800eaae: 687b ldr r3, [r7, #4] 800eab0: 6adb ldr r3, [r3, #44] @ 0x2c 800eab2: f023 0206 bic.w r2, r3, #6 800eab6: 687b ldr r3, [r7, #4] 800eab8: 62da str r2, [r3, #44] @ 0x2c 800eaba: e002 b.n 800eac2 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 800eabc: 687b ldr r3, [r7, #4] 800eabe: 2200 movs r2, #0 800eac0: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 800eac2: 687b ldr r3, [r7, #4] 800eac4: 2200 movs r2, #0 800eac6: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Clear regular group conversion flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 800eaca: 687b ldr r3, [r7, #4] 800eacc: 681b ldr r3, [r3, #0] 800eace: f06f 0202 mvn.w r2, #2 800ead2: 601a str r2, [r3, #0] /* - if ADC is slave, ADC is enabled only (conversion is not started). */ /* - if ADC is master, ADC is enabled and conversion is started. */ /* If ADC is master, ADC is enabled and conversion is started. */ /* Note: Alternate trigger for single conversion could be to force an */ /* additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/ if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ead4: 687b ldr r3, [r7, #4] 800ead6: 681b ldr r3, [r3, #0] 800ead8: 689b ldr r3, [r3, #8] 800eada: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800eade: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800eae2: d113 bne.n 800eb0c ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) ) 800eae4: 687b ldr r3, [r7, #4] 800eae6: 681b ldr r3, [r3, #0] if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800eae8: 4a11 ldr r2, [pc, #68] @ (800eb30 ) 800eaea: 4293 cmp r3, r2 800eaec: d105 bne.n 800eafa ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) ) 800eaee: 4b11 ldr r3, [pc, #68] @ (800eb34 ) 800eaf0: 685b ldr r3, [r3, #4] 800eaf2: f403 2370 and.w r3, r3, #983040 @ 0xf0000 if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800eaf6: 2b00 cmp r3, #0 800eaf8: d108 bne.n 800eb0c { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 800eafa: 687b ldr r3, [r7, #4] 800eafc: 681b ldr r3, [r3, #0] 800eafe: 689a ldr r2, [r3, #8] 800eb00: 687b ldr r3, [r7, #4] 800eb02: 681b ldr r3, [r3, #0] 800eb04: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 800eb08: 609a str r2, [r3, #8] 800eb0a: e00c b.n 800eb26 } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 800eb0c: 687b ldr r3, [r7, #4] 800eb0e: 681b ldr r3, [r3, #0] 800eb10: 689a ldr r2, [r3, #8] 800eb12: 687b ldr r3, [r7, #4] 800eb14: 681b ldr r3, [r3, #0] 800eb16: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 800eb1a: 609a str r2, [r3, #8] 800eb1c: e003 b.n 800eb26 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 800eb1e: 687b ldr r3, [r7, #4] 800eb20: 2200 movs r2, #0 800eb22: f883 2024 strb.w r2, [r3, #36] @ 0x24 } /* Return function status */ return tmp_hal_status; 800eb26: 7bfb ldrb r3, [r7, #15] } 800eb28: 4618 mov r0, r3 800eb2a: 3710 adds r7, #16 800eb2c: 46bd mov sp, r7 800eb2e: bd80 pop {r7, pc} 800eb30: 40012800 .word 0x40012800 800eb34: 40012400 .word 0x40012400 0800eb38 : * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) { 800eb38: b580 push {r7, lr} 800eb3a: b084 sub sp, #16 800eb3c: af00 add r7, sp, #0 800eb3e: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800eb40: 2300 movs r3, #0 800eb42: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800eb44: 687b ldr r3, [r7, #4] 800eb46: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800eb4a: 2b01 cmp r3, #1 800eb4c: d101 bne.n 800eb52 800eb4e: 2302 movs r3, #2 800eb50: e01a b.n 800eb88 800eb52: 687b ldr r3, [r7, #4] 800eb54: 2201 movs r2, #1 800eb56: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800eb5a: 6878 ldr r0, [r7, #4] 800eb5c: f000 fa7c bl 800f058 800eb60: 4603 mov r3, r0 800eb62: 73fb strb r3, [r7, #15] /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) 800eb64: 7bfb ldrb r3, [r7, #15] 800eb66: 2b00 cmp r3, #0 800eb68: d109 bne.n 800eb7e { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800eb6a: 687b ldr r3, [r7, #4] 800eb6c: 6a9b ldr r3, [r3, #40] @ 0x28 800eb6e: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800eb72: f023 0301 bic.w r3, r3, #1 800eb76: f043 0201 orr.w r2, r3, #1 800eb7a: 687b ldr r3, [r7, #4] 800eb7c: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 800eb7e: 687b ldr r3, [r7, #4] 800eb80: 2200 movs r2, #0 800eb82: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800eb86: 7bfb ldrb r3, [r7, #15] } 800eb88: 4618 mov r0, r3 800eb8a: 3710 adds r7, #16 800eb8c: 46bd mov sp, r7 800eb8e: bd80 pop {r7, pc} 0800eb90 : * @param hadc: ADC handle * @param Timeout: Timeout value in millisecond. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) { 800eb90: b590 push {r4, r7, lr} 800eb92: b087 sub sp, #28 800eb94: af00 add r7, sp, #0 800eb96: 6078 str r0, [r7, #4] 800eb98: 6039 str r1, [r7, #0] uint32_t tickstart = 0U; 800eb9a: 2300 movs r3, #0 800eb9c: 617b str r3, [r7, #20] /* Variables for polling in case of scan mode enabled and polling for each */ /* conversion. */ __IO uint32_t Conversion_Timeout_CPU_cycles = 0U; 800eb9e: 2300 movs r3, #0 800eba0: 60fb str r3, [r7, #12] uint32_t Conversion_Timeout_CPU_cycles_max = 0U; 800eba2: 2300 movs r3, #0 800eba4: 613b str r3, [r7, #16] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Get tick count */ tickstart = HAL_GetTick(); 800eba6: f7ff fe13 bl 800e7d0 800ebaa: 6178 str r0, [r7, #20] /* Verification that ADC configuration is compliant with polling for */ /* each conversion: */ /* Particular case is ADC configured in DMA mode */ if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA)) 800ebac: 687b ldr r3, [r7, #4] 800ebae: 681b ldr r3, [r3, #0] 800ebb0: 689b ldr r3, [r3, #8] 800ebb2: f403 7380 and.w r3, r3, #256 @ 0x100 800ebb6: 2b00 cmp r3, #0 800ebb8: d00b beq.n 800ebd2 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800ebba: 687b ldr r3, [r7, #4] 800ebbc: 6a9b ldr r3, [r3, #40] @ 0x28 800ebbe: f043 0220 orr.w r2, r3, #32 800ebc2: 687b ldr r3, [r7, #4] 800ebc4: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 800ebc6: 687b ldr r3, [r7, #4] 800ebc8: 2200 movs r2, #0 800ebca: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800ebce: 2301 movs r3, #1 800ebd0: e0d3 b.n 800ed7a /* from ADC conversion time (selected sampling time + conversion time of */ /* 12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on */ /* settings, conversion time range can be from 28 to 32256 CPU cycles). */ /* As flag EOC is not set after each conversion, no timeout status can */ /* be set. */ if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 800ebd2: 687b ldr r3, [r7, #4] 800ebd4: 681b ldr r3, [r3, #0] 800ebd6: 685b ldr r3, [r3, #4] 800ebd8: f403 7380 and.w r3, r3, #256 @ 0x100 800ebdc: 2b00 cmp r3, #0 800ebde: d131 bne.n 800ec44 HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ) 800ebe0: 687b ldr r3, [r7, #4] 800ebe2: 681b ldr r3, [r3, #0] 800ebe4: 6adb ldr r3, [r3, #44] @ 0x2c 800ebe6: f403 0370 and.w r3, r3, #15728640 @ 0xf00000 if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 800ebea: 2b00 cmp r3, #0 800ebec: d12a bne.n 800ec44 { /* Wait until End of Conversion flag is raised */ while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 800ebee: e021 b.n 800ec34 { /* Check if timeout is disabled (set to infinite wait) */ if(Timeout != HAL_MAX_DELAY) 800ebf0: 683b ldr r3, [r7, #0] 800ebf2: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800ebf6: d01d beq.n 800ec34 { if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout)) 800ebf8: 683b ldr r3, [r7, #0] 800ebfa: 2b00 cmp r3, #0 800ebfc: d007 beq.n 800ec0e 800ebfe: f7ff fde7 bl 800e7d0 800ec02: 4602 mov r2, r0 800ec04: 697b ldr r3, [r7, #20] 800ec06: 1ad3 subs r3, r2, r3 800ec08: 683a ldr r2, [r7, #0] 800ec0a: 429a cmp r2, r3 800ec0c: d212 bcs.n 800ec34 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 800ec0e: 687b ldr r3, [r7, #4] 800ec10: 681b ldr r3, [r3, #0] 800ec12: 681b ldr r3, [r3, #0] 800ec14: f003 0302 and.w r3, r3, #2 800ec18: 2b00 cmp r3, #0 800ec1a: d10b bne.n 800ec34 { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 800ec1c: 687b ldr r3, [r7, #4] 800ec1e: 6a9b ldr r3, [r3, #40] @ 0x28 800ec20: f043 0204 orr.w r2, r3, #4 800ec24: 687b ldr r3, [r7, #4] 800ec26: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 800ec28: 687b ldr r3, [r7, #4] 800ec2a: 2200 movs r2, #0 800ec2c: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_TIMEOUT; 800ec30: 2303 movs r3, #3 800ec32: e0a2 b.n 800ed7a while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 800ec34: 687b ldr r3, [r7, #4] 800ec36: 681b ldr r3, [r3, #0] 800ec38: 681b ldr r3, [r3, #0] 800ec3a: f003 0302 and.w r3, r3, #2 800ec3e: 2b00 cmp r3, #0 800ec40: d0d6 beq.n 800ebf0 if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 800ec42: e070 b.n 800ed26 /* Replace polling by wait for maximum conversion time */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles */ /* and ADC maximum conversion cycles on all channels. */ /* - Wait for the expected ADC clock cycles delay */ Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 800ec44: 4b4f ldr r3, [pc, #316] @ (800ed84 ) 800ec46: 681c ldr r4, [r3, #0] 800ec48: 2002 movs r0, #2 800ec4a: f002 fcfb bl 8011644 800ec4e: 4603 mov r3, r0 800ec50: fbb4 f2f3 udiv r2, r4, r3 * ADC_CONVCYCLES_MAX_RANGE(hadc) ); 800ec54: 687b ldr r3, [r7, #4] 800ec56: 681b ldr r3, [r3, #0] 800ec58: 6919 ldr r1, [r3, #16] 800ec5a: 4b4b ldr r3, [pc, #300] @ (800ed88 ) 800ec5c: 400b ands r3, r1 800ec5e: 2b00 cmp r3, #0 800ec60: d118 bne.n 800ec94 800ec62: 687b ldr r3, [r7, #4] 800ec64: 681b ldr r3, [r3, #0] 800ec66: 68d9 ldr r1, [r3, #12] 800ec68: 4b48 ldr r3, [pc, #288] @ (800ed8c ) 800ec6a: 400b ands r3, r1 800ec6c: 2b00 cmp r3, #0 800ec6e: d111 bne.n 800ec94 800ec70: 687b ldr r3, [r7, #4] 800ec72: 681b ldr r3, [r3, #0] 800ec74: 6919 ldr r1, [r3, #16] 800ec76: 4b46 ldr r3, [pc, #280] @ (800ed90 ) 800ec78: 400b ands r3, r1 800ec7a: 2b00 cmp r3, #0 800ec7c: d108 bne.n 800ec90 800ec7e: 687b ldr r3, [r7, #4] 800ec80: 681b ldr r3, [r3, #0] 800ec82: 68d9 ldr r1, [r3, #12] 800ec84: 4b43 ldr r3, [pc, #268] @ (800ed94 ) 800ec86: 400b ands r3, r1 800ec88: 2b00 cmp r3, #0 800ec8a: d101 bne.n 800ec90 800ec8c: 2314 movs r3, #20 800ec8e: e020 b.n 800ecd2 800ec90: 2329 movs r3, #41 @ 0x29 800ec92: e01e b.n 800ecd2 800ec94: 687b ldr r3, [r7, #4] 800ec96: 681b ldr r3, [r3, #0] 800ec98: 6919 ldr r1, [r3, #16] 800ec9a: 4b3d ldr r3, [pc, #244] @ (800ed90 ) 800ec9c: 400b ands r3, r1 800ec9e: 2b00 cmp r3, #0 800eca0: d106 bne.n 800ecb0 800eca2: 687b ldr r3, [r7, #4] 800eca4: 681b ldr r3, [r3, #0] 800eca6: 68d9 ldr r1, [r3, #12] 800eca8: 4b3a ldr r3, [pc, #232] @ (800ed94 ) 800ecaa: 400b ands r3, r1 800ecac: 2b00 cmp r3, #0 800ecae: d00d beq.n 800eccc 800ecb0: 687b ldr r3, [r7, #4] 800ecb2: 681b ldr r3, [r3, #0] 800ecb4: 6919 ldr r1, [r3, #16] 800ecb6: 4b38 ldr r3, [pc, #224] @ (800ed98 ) 800ecb8: 400b ands r3, r1 800ecba: 2b00 cmp r3, #0 800ecbc: d108 bne.n 800ecd0 800ecbe: 687b ldr r3, [r7, #4] 800ecc0: 681b ldr r3, [r3, #0] 800ecc2: 68d9 ldr r1, [r3, #12] 800ecc4: 4b34 ldr r3, [pc, #208] @ (800ed98 ) 800ecc6: 400b ands r3, r1 800ecc8: 2b00 cmp r3, #0 800ecca: d101 bne.n 800ecd0 800eccc: 2354 movs r3, #84 @ 0x54 800ecce: e000 b.n 800ecd2 800ecd0: 23fc movs r3, #252 @ 0xfc Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock 800ecd2: fb02 f303 mul.w r3, r2, r3 800ecd6: 613b str r3, [r7, #16] while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 800ecd8: e021 b.n 800ed1e { /* Check if timeout is disabled (set to infinite wait) */ if(Timeout != HAL_MAX_DELAY) 800ecda: 683b ldr r3, [r7, #0] 800ecdc: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800ece0: d01a beq.n 800ed18 { if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) 800ece2: 683b ldr r3, [r7, #0] 800ece4: 2b00 cmp r3, #0 800ece6: d007 beq.n 800ecf8 800ece8: f7ff fd72 bl 800e7d0 800ecec: 4602 mov r2, r0 800ecee: 697b ldr r3, [r7, #20] 800ecf0: 1ad3 subs r3, r2, r3 800ecf2: 683a ldr r2, [r7, #0] 800ecf4: 429a cmp r2, r3 800ecf6: d20f bcs.n 800ed18 { /* New check to avoid false timeout detection in case of preemption */ if(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 800ecf8: 68fb ldr r3, [r7, #12] 800ecfa: 693a ldr r2, [r7, #16] 800ecfc: 429a cmp r2, r3 800ecfe: d90b bls.n 800ed18 { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 800ed00: 687b ldr r3, [r7, #4] 800ed02: 6a9b ldr r3, [r3, #40] @ 0x28 800ed04: f043 0204 orr.w r2, r3, #4 800ed08: 687b ldr r3, [r7, #4] 800ed0a: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 800ed0c: 687b ldr r3, [r7, #4] 800ed0e: 2200 movs r2, #0 800ed10: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_TIMEOUT; 800ed14: 2303 movs r3, #3 800ed16: e030 b.n 800ed7a } } } Conversion_Timeout_CPU_cycles ++; 800ed18: 68fb ldr r3, [r7, #12] 800ed1a: 3301 adds r3, #1 800ed1c: 60fb str r3, [r7, #12] while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 800ed1e: 68fb ldr r3, [r7, #12] 800ed20: 693a ldr r2, [r7, #16] 800ed22: 429a cmp r2, r3 800ed24: d8d9 bhi.n 800ecda } } /* Clear regular group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC); 800ed26: 687b ldr r3, [r7, #4] 800ed28: 681b ldr r3, [r3, #0] 800ed2a: f06f 0212 mvn.w r2, #18 800ed2e: 601a str r2, [r3, #0] /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 800ed30: 687b ldr r3, [r7, #4] 800ed32: 6a9b ldr r3, [r3, #40] @ 0x28 800ed34: f443 7200 orr.w r2, r3, #512 @ 0x200 800ed38: 687b ldr r3, [r7, #4] 800ed3a: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ed3c: 687b ldr r3, [r7, #4] 800ed3e: 681b ldr r3, [r3, #0] 800ed40: 689b ldr r3, [r3, #8] 800ed42: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800ed46: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800ed4a: d115 bne.n 800ed78 (hadc->Init.ContinuousConvMode == DISABLE) ) 800ed4c: 687b ldr r3, [r7, #4] 800ed4e: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ed50: 2b00 cmp r3, #0 800ed52: d111 bne.n 800ed78 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 800ed54: 687b ldr r3, [r7, #4] 800ed56: 6a9b ldr r3, [r3, #40] @ 0x28 800ed58: f423 7280 bic.w r2, r3, #256 @ 0x100 800ed5c: 687b ldr r3, [r7, #4] 800ed5e: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800ed60: 687b ldr r3, [r7, #4] 800ed62: 6a9b ldr r3, [r3, #40] @ 0x28 800ed64: f403 5380 and.w r3, r3, #4096 @ 0x1000 800ed68: 2b00 cmp r3, #0 800ed6a: d105 bne.n 800ed78 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 800ed6c: 687b ldr r3, [r7, #4] 800ed6e: 6a9b ldr r3, [r3, #40] @ 0x28 800ed70: f043 0201 orr.w r2, r3, #1 800ed74: 687b ldr r3, [r7, #4] 800ed76: 629a str r2, [r3, #40] @ 0x28 } } /* Return ADC state */ return HAL_OK; 800ed78: 2300 movs r3, #0 } 800ed7a: 4618 mov r0, r3 800ed7c: 371c adds r7, #28 800ed7e: 46bd mov sp, r7 800ed80: bd90 pop {r4, r7, pc} 800ed82: bf00 nop 800ed84: 2000006c .word 0x2000006c 800ed88: 24924924 .word 0x24924924 800ed8c: 00924924 .word 0x00924924 800ed90: 12492492 .word 0x12492492 800ed94: 00492492 .word 0x00492492 800ed98: 00249249 .word 0x00249249 0800ed9c : * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). * @param hadc: ADC handle * @retval ADC group regular conversion data */ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) { 800ed9c: b480 push {r7} 800ed9e: b083 sub sp, #12 800eda0: af00 add r7, sp, #0 800eda2: 6078 str r0, [r7, #4] /* Note: EOC flag is not cleared here by software because automatically */ /* cleared by hardware when reading register DR. */ /* Return ADC converted value */ return hadc->Instance->DR; 800eda4: 687b ldr r3, [r7, #4] 800eda6: 681b ldr r3, [r3, #0] 800eda8: 6cdb ldr r3, [r3, #76] @ 0x4c } 800edaa: 4618 mov r0, r3 800edac: 370c adds r7, #12 800edae: 46bd mov sp, r7 800edb0: bc80 pop {r7} 800edb2: 4770 bx lr 0800edb4 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 800edb4: b480 push {r7} 800edb6: b085 sub sp, #20 800edb8: af00 add r7, sp, #0 800edba: 6078 str r0, [r7, #4] 800edbc: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800edbe: 2300 movs r3, #0 800edc0: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 800edc2: 2300 movs r3, #0 800edc4: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 800edc6: 687b ldr r3, [r7, #4] 800edc8: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800edcc: 2b01 cmp r3, #1 800edce: d101 bne.n 800edd4 800edd0: 2302 movs r3, #2 800edd2: e0dc b.n 800ef8e 800edd4: 687b ldr r3, [r7, #4] 800edd6: 2201 movs r2, #1 800edd8: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 800eddc: 683b ldr r3, [r7, #0] 800edde: 685b ldr r3, [r3, #4] 800ede0: 2b06 cmp r3, #6 800ede2: d81c bhi.n 800ee1e { MODIFY_REG(hadc->Instance->SQR3 , 800ede4: 687b ldr r3, [r7, #4] 800ede6: 681b ldr r3, [r3, #0] 800ede8: 6b59 ldr r1, [r3, #52] @ 0x34 800edea: 683b ldr r3, [r7, #0] 800edec: 685a ldr r2, [r3, #4] 800edee: 4613 mov r3, r2 800edf0: 009b lsls r3, r3, #2 800edf2: 4413 add r3, r2 800edf4: 3b05 subs r3, #5 800edf6: 221f movs r2, #31 800edf8: fa02 f303 lsl.w r3, r2, r3 800edfc: 43db mvns r3, r3 800edfe: 4019 ands r1, r3 800ee00: 683b ldr r3, [r7, #0] 800ee02: 6818 ldr r0, [r3, #0] 800ee04: 683b ldr r3, [r7, #0] 800ee06: 685a ldr r2, [r3, #4] 800ee08: 4613 mov r3, r2 800ee0a: 009b lsls r3, r3, #2 800ee0c: 4413 add r3, r2 800ee0e: 3b05 subs r3, #5 800ee10: fa00 f203 lsl.w r2, r0, r3 800ee14: 687b ldr r3, [r7, #4] 800ee16: 681b ldr r3, [r3, #0] 800ee18: 430a orrs r2, r1 800ee1a: 635a str r2, [r3, #52] @ 0x34 800ee1c: e03c b.n 800ee98 ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 800ee1e: 683b ldr r3, [r7, #0] 800ee20: 685b ldr r3, [r3, #4] 800ee22: 2b0c cmp r3, #12 800ee24: d81c bhi.n 800ee60 { MODIFY_REG(hadc->Instance->SQR2 , 800ee26: 687b ldr r3, [r7, #4] 800ee28: 681b ldr r3, [r3, #0] 800ee2a: 6b19 ldr r1, [r3, #48] @ 0x30 800ee2c: 683b ldr r3, [r7, #0] 800ee2e: 685a ldr r2, [r3, #4] 800ee30: 4613 mov r3, r2 800ee32: 009b lsls r3, r3, #2 800ee34: 4413 add r3, r2 800ee36: 3b23 subs r3, #35 @ 0x23 800ee38: 221f movs r2, #31 800ee3a: fa02 f303 lsl.w r3, r2, r3 800ee3e: 43db mvns r3, r3 800ee40: 4019 ands r1, r3 800ee42: 683b ldr r3, [r7, #0] 800ee44: 6818 ldr r0, [r3, #0] 800ee46: 683b ldr r3, [r7, #0] 800ee48: 685a ldr r2, [r3, #4] 800ee4a: 4613 mov r3, r2 800ee4c: 009b lsls r3, r3, #2 800ee4e: 4413 add r3, r2 800ee50: 3b23 subs r3, #35 @ 0x23 800ee52: fa00 f203 lsl.w r2, r0, r3 800ee56: 687b ldr r3, [r7, #4] 800ee58: 681b ldr r3, [r3, #0] 800ee5a: 430a orrs r2, r1 800ee5c: 631a str r2, [r3, #48] @ 0x30 800ee5e: e01b b.n 800ee98 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 800ee60: 687b ldr r3, [r7, #4] 800ee62: 681b ldr r3, [r3, #0] 800ee64: 6ad9 ldr r1, [r3, #44] @ 0x2c 800ee66: 683b ldr r3, [r7, #0] 800ee68: 685a ldr r2, [r3, #4] 800ee6a: 4613 mov r3, r2 800ee6c: 009b lsls r3, r3, #2 800ee6e: 4413 add r3, r2 800ee70: 3b41 subs r3, #65 @ 0x41 800ee72: 221f movs r2, #31 800ee74: fa02 f303 lsl.w r3, r2, r3 800ee78: 43db mvns r3, r3 800ee7a: 4019 ands r1, r3 800ee7c: 683b ldr r3, [r7, #0] 800ee7e: 6818 ldr r0, [r3, #0] 800ee80: 683b ldr r3, [r7, #0] 800ee82: 685a ldr r2, [r3, #4] 800ee84: 4613 mov r3, r2 800ee86: 009b lsls r3, r3, #2 800ee88: 4413 add r3, r2 800ee8a: 3b41 subs r3, #65 @ 0x41 800ee8c: fa00 f203 lsl.w r2, r0, r3 800ee90: 687b ldr r3, [r7, #4] 800ee92: 681b ldr r3, [r3, #0] 800ee94: 430a orrs r2, r1 800ee96: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 800ee98: 683b ldr r3, [r7, #0] 800ee9a: 681b ldr r3, [r3, #0] 800ee9c: 2b09 cmp r3, #9 800ee9e: d91c bls.n 800eeda { MODIFY_REG(hadc->Instance->SMPR1 , 800eea0: 687b ldr r3, [r7, #4] 800eea2: 681b ldr r3, [r3, #0] 800eea4: 68d9 ldr r1, [r3, #12] 800eea6: 683b ldr r3, [r7, #0] 800eea8: 681a ldr r2, [r3, #0] 800eeaa: 4613 mov r3, r2 800eeac: 005b lsls r3, r3, #1 800eeae: 4413 add r3, r2 800eeb0: 3b1e subs r3, #30 800eeb2: 2207 movs r2, #7 800eeb4: fa02 f303 lsl.w r3, r2, r3 800eeb8: 43db mvns r3, r3 800eeba: 4019 ands r1, r3 800eebc: 683b ldr r3, [r7, #0] 800eebe: 6898 ldr r0, [r3, #8] 800eec0: 683b ldr r3, [r7, #0] 800eec2: 681a ldr r2, [r3, #0] 800eec4: 4613 mov r3, r2 800eec6: 005b lsls r3, r3, #1 800eec8: 4413 add r3, r2 800eeca: 3b1e subs r3, #30 800eecc: fa00 f203 lsl.w r2, r0, r3 800eed0: 687b ldr r3, [r7, #4] 800eed2: 681b ldr r3, [r3, #0] 800eed4: 430a orrs r2, r1 800eed6: 60da str r2, [r3, #12] 800eed8: e019 b.n 800ef0e ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 800eeda: 687b ldr r3, [r7, #4] 800eedc: 681b ldr r3, [r3, #0] 800eede: 6919 ldr r1, [r3, #16] 800eee0: 683b ldr r3, [r7, #0] 800eee2: 681a ldr r2, [r3, #0] 800eee4: 4613 mov r3, r2 800eee6: 005b lsls r3, r3, #1 800eee8: 4413 add r3, r2 800eeea: 2207 movs r2, #7 800eeec: fa02 f303 lsl.w r3, r2, r3 800eef0: 43db mvns r3, r3 800eef2: 4019 ands r1, r3 800eef4: 683b ldr r3, [r7, #0] 800eef6: 6898 ldr r0, [r3, #8] 800eef8: 683b ldr r3, [r7, #0] 800eefa: 681a ldr r2, [r3, #0] 800eefc: 4613 mov r3, r2 800eefe: 005b lsls r3, r3, #1 800ef00: 4413 add r3, r2 800ef02: fa00 f203 lsl.w r2, r0, r3 800ef06: 687b ldr r3, [r7, #4] 800ef08: 681b ldr r3, [r3, #0] 800ef0a: 430a orrs r2, r1 800ef0c: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800ef0e: 683b ldr r3, [r7, #0] 800ef10: 681b ldr r3, [r3, #0] 800ef12: 2b10 cmp r3, #16 800ef14: d003 beq.n 800ef1e (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 800ef16: 683b ldr r3, [r7, #0] 800ef18: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800ef1a: 2b11 cmp r3, #17 800ef1c: d132 bne.n 800ef84 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 800ef1e: 687b ldr r3, [r7, #4] 800ef20: 681b ldr r3, [r3, #0] 800ef22: 4a1d ldr r2, [pc, #116] @ (800ef98 ) 800ef24: 4293 cmp r3, r2 800ef26: d125 bne.n 800ef74 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 800ef28: 687b ldr r3, [r7, #4] 800ef2a: 681b ldr r3, [r3, #0] 800ef2c: 689b ldr r3, [r3, #8] 800ef2e: f403 0300 and.w r3, r3, #8388608 @ 0x800000 800ef32: 2b00 cmp r3, #0 800ef34: d126 bne.n 800ef84 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 800ef36: 687b ldr r3, [r7, #4] 800ef38: 681b ldr r3, [r3, #0] 800ef3a: 689a ldr r2, [r3, #8] 800ef3c: 687b ldr r3, [r7, #4] 800ef3e: 681b ldr r3, [r3, #0] 800ef40: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 800ef44: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 800ef46: 683b ldr r3, [r7, #0] 800ef48: 681b ldr r3, [r3, #0] 800ef4a: 2b10 cmp r3, #16 800ef4c: d11a bne.n 800ef84 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 800ef4e: 4b13 ldr r3, [pc, #76] @ (800ef9c ) 800ef50: 681b ldr r3, [r3, #0] 800ef52: 4a13 ldr r2, [pc, #76] @ (800efa0 ) 800ef54: fba2 2303 umull r2, r3, r2, r3 800ef58: 0c9a lsrs r2, r3, #18 800ef5a: 4613 mov r3, r2 800ef5c: 009b lsls r3, r3, #2 800ef5e: 4413 add r3, r2 800ef60: 005b lsls r3, r3, #1 800ef62: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800ef64: e002 b.n 800ef6c { wait_loop_index--; 800ef66: 68bb ldr r3, [r7, #8] 800ef68: 3b01 subs r3, #1 800ef6a: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800ef6c: 68bb ldr r3, [r7, #8] 800ef6e: 2b00 cmp r3, #0 800ef70: d1f9 bne.n 800ef66 800ef72: e007 b.n 800ef84 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800ef74: 687b ldr r3, [r7, #4] 800ef76: 6a9b ldr r3, [r3, #40] @ 0x28 800ef78: f043 0220 orr.w r2, r3, #32 800ef7c: 687b ldr r3, [r7, #4] 800ef7e: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 800ef80: 2301 movs r3, #1 800ef82: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 800ef84: 687b ldr r3, [r7, #4] 800ef86: 2200 movs r2, #0 800ef88: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800ef8c: 7bfb ldrb r3, [r7, #15] } 800ef8e: 4618 mov r0, r3 800ef90: 3714 adds r7, #20 800ef92: 46bd mov sp, r7 800ef94: bc80 pop {r7} 800ef96: 4770 bx lr 800ef98: 40012400 .word 0x40012400 800ef9c: 2000006c .word 0x2000006c 800efa0: 431bde83 .word 0x431bde83 0800efa4 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 800efa4: b580 push {r7, lr} 800efa6: b084 sub sp, #16 800efa8: af00 add r7, sp, #0 800efaa: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800efac: 2300 movs r3, #0 800efae: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 800efb0: 2300 movs r3, #0 800efb2: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 800efb4: 687b ldr r3, [r7, #4] 800efb6: 681b ldr r3, [r3, #0] 800efb8: 689b ldr r3, [r3, #8] 800efba: f003 0301 and.w r3, r3, #1 800efbe: 2b01 cmp r3, #1 800efc0: d040 beq.n 800f044 { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 800efc2: 687b ldr r3, [r7, #4] 800efc4: 681b ldr r3, [r3, #0] 800efc6: 689a ldr r2, [r3, #8] 800efc8: 687b ldr r3, [r7, #4] 800efca: 681b ldr r3, [r3, #0] 800efcc: f042 0201 orr.w r2, r2, #1 800efd0: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 800efd2: 4b1f ldr r3, [pc, #124] @ (800f050 ) 800efd4: 681b ldr r3, [r3, #0] 800efd6: 4a1f ldr r2, [pc, #124] @ (800f054 ) 800efd8: fba2 2303 umull r2, r3, r2, r3 800efdc: 0c9b lsrs r3, r3, #18 800efde: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800efe0: e002 b.n 800efe8 { wait_loop_index--; 800efe2: 68bb ldr r3, [r7, #8] 800efe4: 3b01 subs r3, #1 800efe6: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800efe8: 68bb ldr r3, [r7, #8] 800efea: 2b00 cmp r3, #0 800efec: d1f9 bne.n 800efe2 } /* Get tick count */ tickstart = HAL_GetTick(); 800efee: f7ff fbef bl 800e7d0 800eff2: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 800eff4: e01f b.n 800f036 { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 800eff6: f7ff fbeb bl 800e7d0 800effa: 4602 mov r2, r0 800effc: 68fb ldr r3, [r7, #12] 800effe: 1ad3 subs r3, r2, r3 800f000: 2b02 cmp r3, #2 800f002: d918 bls.n 800f036 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 800f004: 687b ldr r3, [r7, #4] 800f006: 681b ldr r3, [r3, #0] 800f008: 689b ldr r3, [r3, #8] 800f00a: f003 0301 and.w r3, r3, #1 800f00e: 2b01 cmp r3, #1 800f010: d011 beq.n 800f036 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800f012: 687b ldr r3, [r7, #4] 800f014: 6a9b ldr r3, [r3, #40] @ 0x28 800f016: f043 0210 orr.w r2, r3, #16 800f01a: 687b ldr r3, [r7, #4] 800f01c: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800f01e: 687b ldr r3, [r7, #4] 800f020: 6adb ldr r3, [r3, #44] @ 0x2c 800f022: f043 0201 orr.w r2, r3, #1 800f026: 687b ldr r3, [r7, #4] 800f028: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 800f02a: 687b ldr r3, [r7, #4] 800f02c: 2200 movs r2, #0 800f02e: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f032: 2301 movs r3, #1 800f034: e007 b.n 800f046 while(ADC_IS_ENABLE(hadc) == RESET) 800f036: 687b ldr r3, [r7, #4] 800f038: 681b ldr r3, [r3, #0] 800f03a: 689b ldr r3, [r3, #8] 800f03c: f003 0301 and.w r3, r3, #1 800f040: 2b01 cmp r3, #1 800f042: d1d8 bne.n 800eff6 } } } /* Return HAL status */ return HAL_OK; 800f044: 2300 movs r3, #0 } 800f046: 4618 mov r0, r3 800f048: 3710 adds r7, #16 800f04a: 46bd mov sp, r7 800f04c: bd80 pop {r7, pc} 800f04e: bf00 nop 800f050: 2000006c .word 0x2000006c 800f054: 431bde83 .word 0x431bde83 0800f058 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 800f058: b580 push {r7, lr} 800f05a: b084 sub sp, #16 800f05c: af00 add r7, sp, #0 800f05e: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800f060: 2300 movs r3, #0 800f062: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 800f064: 687b ldr r3, [r7, #4] 800f066: 681b ldr r3, [r3, #0] 800f068: 689b ldr r3, [r3, #8] 800f06a: f003 0301 and.w r3, r3, #1 800f06e: 2b01 cmp r3, #1 800f070: d12e bne.n 800f0d0 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 800f072: 687b ldr r3, [r7, #4] 800f074: 681b ldr r3, [r3, #0] 800f076: 689a ldr r2, [r3, #8] 800f078: 687b ldr r3, [r7, #4] 800f07a: 681b ldr r3, [r3, #0] 800f07c: f022 0201 bic.w r2, r2, #1 800f080: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 800f082: f7ff fba5 bl 800e7d0 800f086: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 800f088: e01b b.n 800f0c2 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 800f08a: f7ff fba1 bl 800e7d0 800f08e: 4602 mov r2, r0 800f090: 68fb ldr r3, [r7, #12] 800f092: 1ad3 subs r3, r2, r3 800f094: 2b02 cmp r3, #2 800f096: d914 bls.n 800f0c2 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 800f098: 687b ldr r3, [r7, #4] 800f09a: 681b ldr r3, [r3, #0] 800f09c: 689b ldr r3, [r3, #8] 800f09e: f003 0301 and.w r3, r3, #1 800f0a2: 2b01 cmp r3, #1 800f0a4: d10d bne.n 800f0c2 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800f0a6: 687b ldr r3, [r7, #4] 800f0a8: 6a9b ldr r3, [r3, #40] @ 0x28 800f0aa: f043 0210 orr.w r2, r3, #16 800f0ae: 687b ldr r3, [r7, #4] 800f0b0: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800f0b2: 687b ldr r3, [r7, #4] 800f0b4: 6adb ldr r3, [r3, #44] @ 0x2c 800f0b6: f043 0201 orr.w r2, r3, #1 800f0ba: 687b ldr r3, [r7, #4] 800f0bc: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 800f0be: 2301 movs r3, #1 800f0c0: e007 b.n 800f0d2 while(ADC_IS_ENABLE(hadc) != RESET) 800f0c2: 687b ldr r3, [r7, #4] 800f0c4: 681b ldr r3, [r3, #0] 800f0c6: 689b ldr r3, [r3, #8] 800f0c8: f003 0301 and.w r3, r3, #1 800f0cc: 2b01 cmp r3, #1 800f0ce: d0dc beq.n 800f08a } } } /* Return HAL status */ return HAL_OK; 800f0d0: 2300 movs r3, #0 } 800f0d2: 4618 mov r0, r3 800f0d4: 3710 adds r7, #16 800f0d6: 46bd mov sp, r7 800f0d8: bd80 pop {r7, pc} ... 0800f0dc : * the completion of this function. * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) { 800f0dc: b590 push {r4, r7, lr} 800f0de: b087 sub sp, #28 800f0e0: af00 add r7, sp, #0 800f0e2: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800f0e4: 2300 movs r3, #0 800f0e6: 75fb strb r3, [r7, #23] uint32_t tickstart; __IO uint32_t wait_loop_index = 0U; 800f0e8: 2300 movs r3, #0 800f0ea: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800f0ec: 687b ldr r3, [r7, #4] 800f0ee: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800f0f2: 2b01 cmp r3, #1 800f0f4: d101 bne.n 800f0fa 800f0f6: 2302 movs r3, #2 800f0f8: e097 b.n 800f22a 800f0fa: 687b ldr r3, [r7, #4] 800f0fc: 2201 movs r2, #1 800f0fe: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* 1. Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800f102: 6878 ldr r0, [r7, #4] 800f104: f7ff ffa8 bl 800f058 800f108: 4603 mov r3, r0 800f10a: 75fb strb r3, [r7, #23] /* 2. Calibration prerequisite delay before starting the calibration. */ /* - ADC must be enabled for at least two ADC clock cycles */ tmp_hal_status = ADC_Enable(hadc); 800f10c: 6878 ldr r0, [r7, #4] 800f10e: f7ff ff49 bl 800efa4 800f112: 4603 mov r3, r0 800f114: 75fb strb r3, [r7, #23] /* Check if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 800f116: 7dfb ldrb r3, [r7, #23] 800f118: 2b00 cmp r3, #0 800f11a: f040 8081 bne.w 800f220 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800f11e: 687b ldr r3, [r7, #4] 800f120: 6a9b ldr r3, [r3, #40] @ 0x28 800f122: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800f126: f023 0302 bic.w r3, r3, #2 800f12a: f043 0202 orr.w r2, r3, #2 800f12e: 687b ldr r3, [r7, #4] 800f130: 629a str r2, [r3, #40] @ 0x28 /* Hardware prerequisite: delay before starting the calibration. */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles. */ /* - Wait for the expected ADC clock cycles delay */ wait_loop_index = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 800f132: 4b40 ldr r3, [pc, #256] @ (800f234 ) 800f134: 681c ldr r4, [r3, #0] 800f136: 2002 movs r0, #2 800f138: f002 fa84 bl 8011644 800f13c: 4603 mov r3, r0 800f13e: fbb4 f3f3 udiv r3, r4, r3 * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES ); 800f142: 005b lsls r3, r3, #1 wait_loop_index = ((SystemCoreClock 800f144: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 800f146: e002 b.n 800f14e { wait_loop_index--; 800f148: 68fb ldr r3, [r7, #12] 800f14a: 3b01 subs r3, #1 800f14c: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 800f14e: 68fb ldr r3, [r7, #12] 800f150: 2b00 cmp r3, #0 800f152: d1f9 bne.n 800f148 } /* 3. Resets ADC calibration registers */ SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL); 800f154: 687b ldr r3, [r7, #4] 800f156: 681b ldr r3, [r3, #0] 800f158: 689a ldr r2, [r3, #8] 800f15a: 687b ldr r3, [r7, #4] 800f15c: 681b ldr r3, [r3, #0] 800f15e: f042 0208 orr.w r2, r2, #8 800f162: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 800f164: f7ff fb34 bl 800e7d0 800f168: 6138 str r0, [r7, #16] /* Wait for calibration reset completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 800f16a: e01b b.n 800f1a4 { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 800f16c: f7ff fb30 bl 800e7d0 800f170: 4602 mov r2, r0 800f172: 693b ldr r3, [r7, #16] 800f174: 1ad3 subs r3, r2, r3 800f176: 2b0a cmp r3, #10 800f178: d914 bls.n 800f1a4 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 800f17a: 687b ldr r3, [r7, #4] 800f17c: 681b ldr r3, [r3, #0] 800f17e: 689b ldr r3, [r3, #8] 800f180: f003 0308 and.w r3, r3, #8 800f184: 2b00 cmp r3, #0 800f186: d00d beq.n 800f1a4 { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800f188: 687b ldr r3, [r7, #4] 800f18a: 6a9b ldr r3, [r3, #40] @ 0x28 800f18c: f023 0312 bic.w r3, r3, #18 800f190: f043 0210 orr.w r2, r3, #16 800f194: 687b ldr r3, [r7, #4] 800f196: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 800f198: 687b ldr r3, [r7, #4] 800f19a: 2200 movs r2, #0 800f19c: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f1a0: 2301 movs r3, #1 800f1a2: e042 b.n 800f22a while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 800f1a4: 687b ldr r3, [r7, #4] 800f1a6: 681b ldr r3, [r3, #0] 800f1a8: 689b ldr r3, [r3, #8] 800f1aa: f003 0308 and.w r3, r3, #8 800f1ae: 2b00 cmp r3, #0 800f1b0: d1dc bne.n 800f16c } } } /* 4. Start ADC calibration */ SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL); 800f1b2: 687b ldr r3, [r7, #4] 800f1b4: 681b ldr r3, [r3, #0] 800f1b6: 689a ldr r2, [r3, #8] 800f1b8: 687b ldr r3, [r7, #4] 800f1ba: 681b ldr r3, [r3, #0] 800f1bc: f042 0204 orr.w r2, r2, #4 800f1c0: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 800f1c2: f7ff fb05 bl 800e7d0 800f1c6: 6138 str r0, [r7, #16] /* Wait for calibration completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 800f1c8: e01b b.n 800f202 { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 800f1ca: f7ff fb01 bl 800e7d0 800f1ce: 4602 mov r2, r0 800f1d0: 693b ldr r3, [r7, #16] 800f1d2: 1ad3 subs r3, r2, r3 800f1d4: 2b0a cmp r3, #10 800f1d6: d914 bls.n 800f202 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 800f1d8: 687b ldr r3, [r7, #4] 800f1da: 681b ldr r3, [r3, #0] 800f1dc: 689b ldr r3, [r3, #8] 800f1de: f003 0304 and.w r3, r3, #4 800f1e2: 2b00 cmp r3, #0 800f1e4: d00d beq.n 800f202 { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800f1e6: 687b ldr r3, [r7, #4] 800f1e8: 6a9b ldr r3, [r3, #40] @ 0x28 800f1ea: f023 0312 bic.w r3, r3, #18 800f1ee: f043 0210 orr.w r2, r3, #16 800f1f2: 687b ldr r3, [r7, #4] 800f1f4: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 800f1f6: 687b ldr r3, [r7, #4] 800f1f8: 2200 movs r2, #0 800f1fa: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f1fe: 2301 movs r3, #1 800f200: e013 b.n 800f22a while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 800f202: 687b ldr r3, [r7, #4] 800f204: 681b ldr r3, [r3, #0] 800f206: 689b ldr r3, [r3, #8] 800f208: f003 0304 and.w r3, r3, #4 800f20c: 2b00 cmp r3, #0 800f20e: d1dc bne.n 800f1ca } } } /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800f210: 687b ldr r3, [r7, #4] 800f212: 6a9b ldr r3, [r3, #40] @ 0x28 800f214: f023 0303 bic.w r3, r3, #3 800f218: f043 0201 orr.w r2, r3, #1 800f21c: 687b ldr r3, [r7, #4] 800f21e: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 800f220: 687b ldr r3, [r7, #4] 800f222: 2200 movs r2, #0 800f224: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800f228: 7dfb ldrb r3, [r7, #23] } 800f22a: 4618 mov r0, r3 800f22c: 371c adds r7, #28 800f22e: 46bd mov sp, r7 800f230: bd90 pop {r4, r7, pc} 800f232: bf00 nop 800f234: 2000006c .word 0x2000006c 0800f238 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) { 800f238: b580 push {r7, lr} 800f23a: b084 sub sp, #16 800f23c: af00 add r7, sp, #0 800f23e: 6078 str r0, [r7, #4] uint32_t tickstart; /* Check CAN handle */ if (hcan == NULL) 800f240: 687b ldr r3, [r7, #4] 800f242: 2b00 cmp r3, #0 800f244: d101 bne.n 800f24a { return HAL_ERROR; 800f246: 2301 movs r3, #1 800f248: e0ed b.n 800f426 /* Init the low level hardware: CLOCK, NVIC */ hcan->MspInitCallback(hcan); } #else if (hcan->State == HAL_CAN_STATE_RESET) 800f24a: 687b ldr r3, [r7, #4] 800f24c: f893 3020 ldrb.w r3, [r3, #32] 800f250: b2db uxtb r3, r3 800f252: 2b00 cmp r3, #0 800f254: d102 bne.n 800f25c { /* Init the low level hardware: CLOCK, NVIC */ HAL_CAN_MspInit(hcan); 800f256: 6878 ldr r0, [r7, #4] 800f258: f7fa fc6e bl 8009b38 } #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800f25c: 687b ldr r3, [r7, #4] 800f25e: 681b ldr r3, [r3, #0] 800f260: 681a ldr r2, [r3, #0] 800f262: 687b ldr r3, [r7, #4] 800f264: 681b ldr r3, [r3, #0] 800f266: f042 0201 orr.w r2, r2, #1 800f26a: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f26c: f7ff fab0 bl 800e7d0 800f270: 60f8 str r0, [r7, #12] /* Wait initialisation acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f272: e012 b.n 800f29a { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f274: f7ff faac bl 800e7d0 800f278: 4602 mov r2, r0 800f27a: 68fb ldr r3, [r7, #12] 800f27c: 1ad3 subs r3, r2, r3 800f27e: 2b0a cmp r3, #10 800f280: d90b bls.n 800f29a { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f282: 687b ldr r3, [r7, #4] 800f284: 6a5b ldr r3, [r3, #36] @ 0x24 800f286: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f28a: 687b ldr r3, [r7, #4] 800f28c: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f28e: 687b ldr r3, [r7, #4] 800f290: 2205 movs r2, #5 800f292: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f296: 2301 movs r3, #1 800f298: e0c5 b.n 800f426 while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f29a: 687b ldr r3, [r7, #4] 800f29c: 681b ldr r3, [r3, #0] 800f29e: 685b ldr r3, [r3, #4] 800f2a0: f003 0301 and.w r3, r3, #1 800f2a4: 2b00 cmp r3, #0 800f2a6: d0e5 beq.n 800f274 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 800f2a8: 687b ldr r3, [r7, #4] 800f2aa: 681b ldr r3, [r3, #0] 800f2ac: 681a ldr r2, [r3, #0] 800f2ae: 687b ldr r3, [r7, #4] 800f2b0: 681b ldr r3, [r3, #0] 800f2b2: f022 0202 bic.w r2, r2, #2 800f2b6: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f2b8: f7ff fa8a bl 800e7d0 800f2bc: 60f8 str r0, [r7, #12] /* Check Sleep mode leave acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 800f2be: e012 b.n 800f2e6 { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f2c0: f7ff fa86 bl 800e7d0 800f2c4: 4602 mov r2, r0 800f2c6: 68fb ldr r3, [r7, #12] 800f2c8: 1ad3 subs r3, r2, r3 800f2ca: 2b0a cmp r3, #10 800f2cc: d90b bls.n 800f2e6 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f2ce: 687b ldr r3, [r7, #4] 800f2d0: 6a5b ldr r3, [r3, #36] @ 0x24 800f2d2: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f2d6: 687b ldr r3, [r7, #4] 800f2d8: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f2da: 687b ldr r3, [r7, #4] 800f2dc: 2205 movs r2, #5 800f2de: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f2e2: 2301 movs r3, #1 800f2e4: e09f b.n 800f426 while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 800f2e6: 687b ldr r3, [r7, #4] 800f2e8: 681b ldr r3, [r3, #0] 800f2ea: 685b ldr r3, [r3, #4] 800f2ec: f003 0302 and.w r3, r3, #2 800f2f0: 2b00 cmp r3, #0 800f2f2: d1e5 bne.n 800f2c0 } } /* Set the time triggered communication mode */ if (hcan->Init.TimeTriggeredMode == ENABLE) 800f2f4: 687b ldr r3, [r7, #4] 800f2f6: 7e1b ldrb r3, [r3, #24] 800f2f8: 2b01 cmp r3, #1 800f2fa: d108 bne.n 800f30e { SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 800f2fc: 687b ldr r3, [r7, #4] 800f2fe: 681b ldr r3, [r3, #0] 800f300: 681a ldr r2, [r3, #0] 800f302: 687b ldr r3, [r7, #4] 800f304: 681b ldr r3, [r3, #0] 800f306: f042 0280 orr.w r2, r2, #128 @ 0x80 800f30a: 601a str r2, [r3, #0] 800f30c: e007 b.n 800f31e } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 800f30e: 687b ldr r3, [r7, #4] 800f310: 681b ldr r3, [r3, #0] 800f312: 681a ldr r2, [r3, #0] 800f314: 687b ldr r3, [r7, #4] 800f316: 681b ldr r3, [r3, #0] 800f318: f022 0280 bic.w r2, r2, #128 @ 0x80 800f31c: 601a str r2, [r3, #0] } /* Set the automatic bus-off management */ if (hcan->Init.AutoBusOff == ENABLE) 800f31e: 687b ldr r3, [r7, #4] 800f320: 7e5b ldrb r3, [r3, #25] 800f322: 2b01 cmp r3, #1 800f324: d108 bne.n 800f338 { SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 800f326: 687b ldr r3, [r7, #4] 800f328: 681b ldr r3, [r3, #0] 800f32a: 681a ldr r2, [r3, #0] 800f32c: 687b ldr r3, [r7, #4] 800f32e: 681b ldr r3, [r3, #0] 800f330: f042 0240 orr.w r2, r2, #64 @ 0x40 800f334: 601a str r2, [r3, #0] 800f336: e007 b.n 800f348 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 800f338: 687b ldr r3, [r7, #4] 800f33a: 681b ldr r3, [r3, #0] 800f33c: 681a ldr r2, [r3, #0] 800f33e: 687b ldr r3, [r7, #4] 800f340: 681b ldr r3, [r3, #0] 800f342: f022 0240 bic.w r2, r2, #64 @ 0x40 800f346: 601a str r2, [r3, #0] } /* Set the automatic wake-up mode */ if (hcan->Init.AutoWakeUp == ENABLE) 800f348: 687b ldr r3, [r7, #4] 800f34a: 7e9b ldrb r3, [r3, #26] 800f34c: 2b01 cmp r3, #1 800f34e: d108 bne.n 800f362 { SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 800f350: 687b ldr r3, [r7, #4] 800f352: 681b ldr r3, [r3, #0] 800f354: 681a ldr r2, [r3, #0] 800f356: 687b ldr r3, [r7, #4] 800f358: 681b ldr r3, [r3, #0] 800f35a: f042 0220 orr.w r2, r2, #32 800f35e: 601a str r2, [r3, #0] 800f360: e007 b.n 800f372 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 800f362: 687b ldr r3, [r7, #4] 800f364: 681b ldr r3, [r3, #0] 800f366: 681a ldr r2, [r3, #0] 800f368: 687b ldr r3, [r7, #4] 800f36a: 681b ldr r3, [r3, #0] 800f36c: f022 0220 bic.w r2, r2, #32 800f370: 601a str r2, [r3, #0] } /* Set the automatic retransmission */ if (hcan->Init.AutoRetransmission == ENABLE) 800f372: 687b ldr r3, [r7, #4] 800f374: 7edb ldrb r3, [r3, #27] 800f376: 2b01 cmp r3, #1 800f378: d108 bne.n 800f38c { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); 800f37a: 687b ldr r3, [r7, #4] 800f37c: 681b ldr r3, [r3, #0] 800f37e: 681a ldr r2, [r3, #0] 800f380: 687b ldr r3, [r7, #4] 800f382: 681b ldr r3, [r3, #0] 800f384: f022 0210 bic.w r2, r2, #16 800f388: 601a str r2, [r3, #0] 800f38a: e007 b.n 800f39c } else { SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); 800f38c: 687b ldr r3, [r7, #4] 800f38e: 681b ldr r3, [r3, #0] 800f390: 681a ldr r2, [r3, #0] 800f392: 687b ldr r3, [r7, #4] 800f394: 681b ldr r3, [r3, #0] 800f396: f042 0210 orr.w r2, r2, #16 800f39a: 601a str r2, [r3, #0] } /* Set the receive FIFO locked mode */ if (hcan->Init.ReceiveFifoLocked == ENABLE) 800f39c: 687b ldr r3, [r7, #4] 800f39e: 7f1b ldrb r3, [r3, #28] 800f3a0: 2b01 cmp r3, #1 800f3a2: d108 bne.n 800f3b6 { SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 800f3a4: 687b ldr r3, [r7, #4] 800f3a6: 681b ldr r3, [r3, #0] 800f3a8: 681a ldr r2, [r3, #0] 800f3aa: 687b ldr r3, [r7, #4] 800f3ac: 681b ldr r3, [r3, #0] 800f3ae: f042 0208 orr.w r2, r2, #8 800f3b2: 601a str r2, [r3, #0] 800f3b4: e007 b.n 800f3c6 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 800f3b6: 687b ldr r3, [r7, #4] 800f3b8: 681b ldr r3, [r3, #0] 800f3ba: 681a ldr r2, [r3, #0] 800f3bc: 687b ldr r3, [r7, #4] 800f3be: 681b ldr r3, [r3, #0] 800f3c0: f022 0208 bic.w r2, r2, #8 800f3c4: 601a str r2, [r3, #0] } /* Set the transmit FIFO priority */ if (hcan->Init.TransmitFifoPriority == ENABLE) 800f3c6: 687b ldr r3, [r7, #4] 800f3c8: 7f5b ldrb r3, [r3, #29] 800f3ca: 2b01 cmp r3, #1 800f3cc: d108 bne.n 800f3e0 { SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 800f3ce: 687b ldr r3, [r7, #4] 800f3d0: 681b ldr r3, [r3, #0] 800f3d2: 681a ldr r2, [r3, #0] 800f3d4: 687b ldr r3, [r7, #4] 800f3d6: 681b ldr r3, [r3, #0] 800f3d8: f042 0204 orr.w r2, r2, #4 800f3dc: 601a str r2, [r3, #0] 800f3de: e007 b.n 800f3f0 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 800f3e0: 687b ldr r3, [r7, #4] 800f3e2: 681b ldr r3, [r3, #0] 800f3e4: 681a ldr r2, [r3, #0] 800f3e6: 687b ldr r3, [r7, #4] 800f3e8: 681b ldr r3, [r3, #0] 800f3ea: f022 0204 bic.w r2, r2, #4 800f3ee: 601a str r2, [r3, #0] } /* Set the bit timing register */ WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | 800f3f0: 687b ldr r3, [r7, #4] 800f3f2: 689a ldr r2, [r3, #8] 800f3f4: 687b ldr r3, [r7, #4] 800f3f6: 68db ldr r3, [r3, #12] 800f3f8: 431a orrs r2, r3 800f3fa: 687b ldr r3, [r7, #4] 800f3fc: 691b ldr r3, [r3, #16] 800f3fe: 431a orrs r2, r3 800f400: 687b ldr r3, [r7, #4] 800f402: 695b ldr r3, [r3, #20] 800f404: ea42 0103 orr.w r1, r2, r3 800f408: 687b ldr r3, [r7, #4] 800f40a: 685b ldr r3, [r3, #4] 800f40c: 1e5a subs r2, r3, #1 800f40e: 687b ldr r3, [r7, #4] 800f410: 681b ldr r3, [r3, #0] 800f412: 430a orrs r2, r1 800f414: 61da str r2, [r3, #28] hcan->Init.TimeSeg1 | hcan->Init.TimeSeg2 | (hcan->Init.Prescaler - 1U))); /* Initialize the error code */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 800f416: 687b ldr r3, [r7, #4] 800f418: 2200 movs r2, #0 800f41a: 625a str r2, [r3, #36] @ 0x24 /* Initialize the CAN state */ hcan->State = HAL_CAN_STATE_READY; 800f41c: 687b ldr r3, [r7, #4] 800f41e: 2201 movs r2, #1 800f420: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 800f424: 2300 movs r3, #0 } 800f426: 4618 mov r0, r3 800f428: 3710 adds r7, #16 800f42a: 46bd mov sp, r7 800f42c: bd80 pop {r7, pc} ... 0800f430 : * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that * contains the filter configuration information. * @retval None */ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig) { 800f430: b480 push {r7} 800f432: b087 sub sp, #28 800f434: af00 add r7, sp, #0 800f436: 6078 str r0, [r7, #4] 800f438: 6039 str r1, [r7, #0] uint32_t filternbrbitpos; CAN_TypeDef *can_ip = hcan->Instance; 800f43a: 687b ldr r3, [r7, #4] 800f43c: 681b ldr r3, [r3, #0] 800f43e: 617b str r3, [r7, #20] HAL_CAN_StateTypeDef state = hcan->State; 800f440: 687b ldr r3, [r7, #4] 800f442: f893 3020 ldrb.w r3, [r3, #32] 800f446: 74fb strb r3, [r7, #19] if ((state == HAL_CAN_STATE_READY) || 800f448: 7cfb ldrb r3, [r7, #19] 800f44a: 2b01 cmp r3, #1 800f44c: d003 beq.n 800f456 800f44e: 7cfb ldrb r3, [r7, #19] 800f450: 2b02 cmp r3, #2 800f452: f040 80be bne.w 800f5d2 assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); #if defined(CAN2) /* CAN1 and CAN2 are dual instances with 28 common filters banks */ /* Select master instance to access the filter banks */ can_ip = CAN1; 800f456: 4b65 ldr r3, [pc, #404] @ (800f5ec ) 800f458: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); #endif /* CAN3 */ /* Initialisation mode for the filter */ SET_BIT(can_ip->FMR, CAN_FMR_FINIT); 800f45a: 697b ldr r3, [r7, #20] 800f45c: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 800f460: f043 0201 orr.w r2, r3, #1 800f464: 697b ldr r3, [r7, #20] 800f466: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #if defined(CAN2) /* Select the start filter number of CAN2 slave instance */ CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); 800f46a: 697b ldr r3, [r7, #20] 800f46c: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 800f470: f423 527c bic.w r2, r3, #16128 @ 0x3f00 800f474: 697b ldr r3, [r7, #20] 800f476: f8c3 2200 str.w r2, [r3, #512] @ 0x200 SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); 800f47a: 697b ldr r3, [r7, #20] 800f47c: f8d3 2200 ldr.w r2, [r3, #512] @ 0x200 800f480: 683b ldr r3, [r7, #0] 800f482: 6a5b ldr r3, [r3, #36] @ 0x24 800f484: 021b lsls r3, r3, #8 800f486: 431a orrs r2, r3 800f488: 697b ldr r3, [r7, #20] 800f48a: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #endif /* CAN3 */ /* Convert filter number into bit position */ filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); 800f48e: 683b ldr r3, [r7, #0] 800f490: 695b ldr r3, [r3, #20] 800f492: f003 031f and.w r3, r3, #31 800f496: 2201 movs r2, #1 800f498: fa02 f303 lsl.w r3, r2, r3 800f49c: 60fb str r3, [r7, #12] /* Filter Deactivation */ CLEAR_BIT(can_ip->FA1R, filternbrbitpos); 800f49e: 697b ldr r3, [r7, #20] 800f4a0: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 800f4a4: 68fb ldr r3, [r7, #12] 800f4a6: 43db mvns r3, r3 800f4a8: 401a ands r2, r3 800f4aa: 697b ldr r3, [r7, #20] 800f4ac: f8c3 221c str.w r2, [r3, #540] @ 0x21c /* Filter Scale */ if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) 800f4b0: 683b ldr r3, [r7, #0] 800f4b2: 69db ldr r3, [r3, #28] 800f4b4: 2b00 cmp r3, #0 800f4b6: d123 bne.n 800f500 { /* 16-bit scale for the filter */ CLEAR_BIT(can_ip->FS1R, filternbrbitpos); 800f4b8: 697b ldr r3, [r7, #20] 800f4ba: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 800f4be: 68fb ldr r3, [r7, #12] 800f4c0: 43db mvns r3, r3 800f4c2: 401a ands r2, r3 800f4c4: 697b ldr r3, [r7, #20] 800f4c6: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* First 16-bit identifier and First 16-bit mask */ /* Or First 16-bit identifier and Second 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 800f4ca: 683b ldr r3, [r7, #0] 800f4cc: 68db ldr r3, [r3, #12] 800f4ce: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 800f4d0: 683b ldr r3, [r7, #0] 800f4d2: 685b ldr r3, [r3, #4] 800f4d4: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f4d6: 683a ldr r2, [r7, #0] 800f4d8: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 800f4da: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f4dc: 697b ldr r3, [r7, #20] 800f4de: 3248 adds r2, #72 @ 0x48 800f4e0: f843 1032 str.w r1, [r3, r2, lsl #3] /* Second 16-bit identifier and Second 16-bit mask */ /* Or Third 16-bit identifier and Fourth 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f4e4: 683b ldr r3, [r7, #0] 800f4e6: 689b ldr r3, [r3, #8] 800f4e8: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); 800f4ea: 683b ldr r3, [r7, #0] 800f4ec: 681b ldr r3, [r3, #0] 800f4ee: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f4f0: 683b ldr r3, [r7, #0] 800f4f2: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f4f4: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f4f6: 6979 ldr r1, [r7, #20] 800f4f8: 3348 adds r3, #72 @ 0x48 800f4fa: 00db lsls r3, r3, #3 800f4fc: 440b add r3, r1 800f4fe: 605a str r2, [r3, #4] } if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) 800f500: 683b ldr r3, [r7, #0] 800f502: 69db ldr r3, [r3, #28] 800f504: 2b01 cmp r3, #1 800f506: d122 bne.n 800f54e { /* 32-bit scale for the filter */ SET_BIT(can_ip->FS1R, filternbrbitpos); 800f508: 697b ldr r3, [r7, #20] 800f50a: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 800f50e: 68fb ldr r3, [r7, #12] 800f510: 431a orrs r2, r3 800f512: 697b ldr r3, [r7, #20] 800f514: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* 32-bit identifier or First 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 800f518: 683b ldr r3, [r7, #0] 800f51a: 681b ldr r3, [r3, #0] 800f51c: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 800f51e: 683b ldr r3, [r7, #0] 800f520: 685b ldr r3, [r3, #4] 800f522: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f524: 683a ldr r2, [r7, #0] 800f526: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 800f528: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f52a: 697b ldr r3, [r7, #20] 800f52c: 3248 adds r2, #72 @ 0x48 800f52e: f843 1032 str.w r1, [r3, r2, lsl #3] /* 32-bit mask or Second 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f532: 683b ldr r3, [r7, #0] 800f534: 689b ldr r3, [r3, #8] 800f536: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); 800f538: 683b ldr r3, [r7, #0] 800f53a: 68db ldr r3, [r3, #12] 800f53c: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f53e: 683b ldr r3, [r7, #0] 800f540: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f542: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f544: 6979 ldr r1, [r7, #20] 800f546: 3348 adds r3, #72 @ 0x48 800f548: 00db lsls r3, r3, #3 800f54a: 440b add r3, r1 800f54c: 605a str r2, [r3, #4] } /* Filter Mode */ if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) 800f54e: 683b ldr r3, [r7, #0] 800f550: 699b ldr r3, [r3, #24] 800f552: 2b00 cmp r3, #0 800f554: d109 bne.n 800f56a { /* Id/Mask mode for the filter*/ CLEAR_BIT(can_ip->FM1R, filternbrbitpos); 800f556: 697b ldr r3, [r7, #20] 800f558: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800f55c: 68fb ldr r3, [r7, #12] 800f55e: 43db mvns r3, r3 800f560: 401a ands r2, r3 800f562: 697b ldr r3, [r7, #20] 800f564: f8c3 2204 str.w r2, [r3, #516] @ 0x204 800f568: e007 b.n 800f57a } else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ { /* Identifier list mode for the filter*/ SET_BIT(can_ip->FM1R, filternbrbitpos); 800f56a: 697b ldr r3, [r7, #20] 800f56c: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800f570: 68fb ldr r3, [r7, #12] 800f572: 431a orrs r2, r3 800f574: 697b ldr r3, [r7, #20] 800f576: f8c3 2204 str.w r2, [r3, #516] @ 0x204 } /* Filter FIFO assignment */ if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) 800f57a: 683b ldr r3, [r7, #0] 800f57c: 691b ldr r3, [r3, #16] 800f57e: 2b00 cmp r3, #0 800f580: d109 bne.n 800f596 { /* FIFO 0 assignation for the filter */ CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); 800f582: 697b ldr r3, [r7, #20] 800f584: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 800f588: 68fb ldr r3, [r7, #12] 800f58a: 43db mvns r3, r3 800f58c: 401a ands r2, r3 800f58e: 697b ldr r3, [r7, #20] 800f590: f8c3 2214 str.w r2, [r3, #532] @ 0x214 800f594: e007 b.n 800f5a6 } else { /* FIFO 1 assignation for the filter */ SET_BIT(can_ip->FFA1R, filternbrbitpos); 800f596: 697b ldr r3, [r7, #20] 800f598: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 800f59c: 68fb ldr r3, [r7, #12] 800f59e: 431a orrs r2, r3 800f5a0: 697b ldr r3, [r7, #20] 800f5a2: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } /* Filter activation */ if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) 800f5a6: 683b ldr r3, [r7, #0] 800f5a8: 6a1b ldr r3, [r3, #32] 800f5aa: 2b01 cmp r3, #1 800f5ac: d107 bne.n 800f5be { SET_BIT(can_ip->FA1R, filternbrbitpos); 800f5ae: 697b ldr r3, [r7, #20] 800f5b0: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 800f5b4: 68fb ldr r3, [r7, #12] 800f5b6: 431a orrs r2, r3 800f5b8: 697b ldr r3, [r7, #20] 800f5ba: f8c3 221c str.w r2, [r3, #540] @ 0x21c } /* Leave the initialisation mode for the filter */ CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); 800f5be: 697b ldr r3, [r7, #20] 800f5c0: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 800f5c4: f023 0201 bic.w r2, r3, #1 800f5c8: 697b ldr r3, [r7, #20] 800f5ca: f8c3 2200 str.w r2, [r3, #512] @ 0x200 /* Return function status */ return HAL_OK; 800f5ce: 2300 movs r3, #0 800f5d0: e006 b.n 800f5e0 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800f5d2: 687b ldr r3, [r7, #4] 800f5d4: 6a5b ldr r3, [r3, #36] @ 0x24 800f5d6: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800f5da: 687b ldr r3, [r7, #4] 800f5dc: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f5de: 2301 movs r3, #1 } } 800f5e0: 4618 mov r0, r3 800f5e2: 371c adds r7, #28 800f5e4: 46bd mov sp, r7 800f5e6: bc80 pop {r7} 800f5e8: 4770 bx lr 800f5ea: bf00 nop 800f5ec: 40006400 .word 0x40006400 0800f5f0 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) { 800f5f0: b580 push {r7, lr} 800f5f2: b084 sub sp, #16 800f5f4: af00 add r7, sp, #0 800f5f6: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_READY) 800f5f8: 687b ldr r3, [r7, #4] 800f5fa: f893 3020 ldrb.w r3, [r3, #32] 800f5fe: b2db uxtb r3, r3 800f600: 2b01 cmp r3, #1 800f602: d12e bne.n 800f662 { /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_LISTENING; 800f604: 687b ldr r3, [r7, #4] 800f606: 2202 movs r2, #2 800f608: f883 2020 strb.w r2, [r3, #32] /* Request leave initialisation */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800f60c: 687b ldr r3, [r7, #4] 800f60e: 681b ldr r3, [r3, #0] 800f610: 681a ldr r2, [r3, #0] 800f612: 687b ldr r3, [r7, #4] 800f614: 681b ldr r3, [r3, #0] 800f616: f022 0201 bic.w r2, r2, #1 800f61a: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f61c: f7ff f8d8 bl 800e7d0 800f620: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 800f622: e012 b.n 800f64a { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f624: f7ff f8d4 bl 800e7d0 800f628: 4602 mov r2, r0 800f62a: 68fb ldr r3, [r7, #12] 800f62c: 1ad3 subs r3, r2, r3 800f62e: 2b0a cmp r3, #10 800f630: d90b bls.n 800f64a { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f632: 687b ldr r3, [r7, #4] 800f634: 6a5b ldr r3, [r3, #36] @ 0x24 800f636: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f63a: 687b ldr r3, [r7, #4] 800f63c: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f63e: 687b ldr r3, [r7, #4] 800f640: 2205 movs r2, #5 800f642: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f646: 2301 movs r3, #1 800f648: e012 b.n 800f670 while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 800f64a: 687b ldr r3, [r7, #4] 800f64c: 681b ldr r3, [r3, #0] 800f64e: 685b ldr r3, [r3, #4] 800f650: f003 0301 and.w r3, r3, #1 800f654: 2b00 cmp r3, #0 800f656: d1e5 bne.n 800f624 } } /* Reset the CAN ErrorCode */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 800f658: 687b ldr r3, [r7, #4] 800f65a: 2200 movs r2, #0 800f65c: 625a str r2, [r3, #36] @ 0x24 /* Return function status */ return HAL_OK; 800f65e: 2300 movs r3, #0 800f660: e006 b.n 800f670 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; 800f662: 687b ldr r3, [r7, #4] 800f664: 6a5b ldr r3, [r3, #36] @ 0x24 800f666: f443 2200 orr.w r2, r3, #524288 @ 0x80000 800f66a: 687b ldr r3, [r7, #4] 800f66c: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f66e: 2301 movs r3, #1 } } 800f670: 4618 mov r0, r3 800f672: 3710 adds r7, #16 800f674: 46bd mov sp, r7 800f676: bd80 pop {r7, pc} 0800f678 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) { 800f678: b580 push {r7, lr} 800f67a: b084 sub sp, #16 800f67c: af00 add r7, sp, #0 800f67e: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_LISTENING) 800f680: 687b ldr r3, [r7, #4] 800f682: f893 3020 ldrb.w r3, [r3, #32] 800f686: b2db uxtb r3, r3 800f688: 2b02 cmp r3, #2 800f68a: d133 bne.n 800f6f4 { /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800f68c: 687b ldr r3, [r7, #4] 800f68e: 681b ldr r3, [r3, #0] 800f690: 681a ldr r2, [r3, #0] 800f692: 687b ldr r3, [r7, #4] 800f694: 681b ldr r3, [r3, #0] 800f696: f042 0201 orr.w r2, r2, #1 800f69a: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f69c: f7ff f898 bl 800e7d0 800f6a0: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f6a2: e012 b.n 800f6ca { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f6a4: f7ff f894 bl 800e7d0 800f6a8: 4602 mov r2, r0 800f6aa: 68fb ldr r3, [r7, #12] 800f6ac: 1ad3 subs r3, r2, r3 800f6ae: 2b0a cmp r3, #10 800f6b0: d90b bls.n 800f6ca { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f6b2: 687b ldr r3, [r7, #4] 800f6b4: 6a5b ldr r3, [r3, #36] @ 0x24 800f6b6: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f6ba: 687b ldr r3, [r7, #4] 800f6bc: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f6be: 687b ldr r3, [r7, #4] 800f6c0: 2205 movs r2, #5 800f6c2: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f6c6: 2301 movs r3, #1 800f6c8: e01b b.n 800f702 while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f6ca: 687b ldr r3, [r7, #4] 800f6cc: 681b ldr r3, [r3, #0] 800f6ce: 685b ldr r3, [r3, #4] 800f6d0: f003 0301 and.w r3, r3, #1 800f6d4: 2b00 cmp r3, #0 800f6d6: d0e5 beq.n 800f6a4 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 800f6d8: 687b ldr r3, [r7, #4] 800f6da: 681b ldr r3, [r3, #0] 800f6dc: 681a ldr r2, [r3, #0] 800f6de: 687b ldr r3, [r7, #4] 800f6e0: 681b ldr r3, [r3, #0] 800f6e2: f022 0202 bic.w r2, r2, #2 800f6e6: 601a str r2, [r3, #0] /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_READY; 800f6e8: 687b ldr r3, [r7, #4] 800f6ea: 2201 movs r2, #1 800f6ec: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 800f6f0: 2300 movs r3, #0 800f6f2: e006 b.n 800f702 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; 800f6f4: 687b ldr r3, [r7, #4] 800f6f6: 6a5b ldr r3, [r3, #36] @ 0x24 800f6f8: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800f6fc: 687b ldr r3, [r7, #4] 800f6fe: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f700: 2301 movs r3, #1 } } 800f702: 4618 mov r0, r3 800f704: 3710 adds r7, #16 800f706: 46bd mov sp, r7 800f708: bd80 pop {r7, pc} 0800f70a : * This parameter can be a value of @arg CAN_Tx_Mailboxes. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, const uint8_t aData[], uint32_t *pTxMailbox) { 800f70a: b480 push {r7} 800f70c: b089 sub sp, #36 @ 0x24 800f70e: af00 add r7, sp, #0 800f710: 60f8 str r0, [r7, #12] 800f712: 60b9 str r1, [r7, #8] 800f714: 607a str r2, [r7, #4] 800f716: 603b str r3, [r7, #0] uint32_t transmitmailbox; HAL_CAN_StateTypeDef state = hcan->State; 800f718: 68fb ldr r3, [r7, #12] 800f71a: f893 3020 ldrb.w r3, [r3, #32] 800f71e: 77fb strb r3, [r7, #31] uint32_t tsr = READ_REG(hcan->Instance->TSR); 800f720: 68fb ldr r3, [r7, #12] 800f722: 681b ldr r3, [r3, #0] 800f724: 689b ldr r3, [r3, #8] 800f726: 61bb str r3, [r7, #24] { assert_param(IS_CAN_EXTID(pHeader->ExtId)); } assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); if ((state == HAL_CAN_STATE_READY) || 800f728: 7ffb ldrb r3, [r7, #31] 800f72a: 2b01 cmp r3, #1 800f72c: d003 beq.n 800f736 800f72e: 7ffb ldrb r3, [r7, #31] 800f730: 2b02 cmp r3, #2 800f732: f040 80ad bne.w 800f890 (state == HAL_CAN_STATE_LISTENING)) { /* Check that all the Tx mailboxes are not full */ if (((tsr & CAN_TSR_TME0) != 0U) || 800f736: 69bb ldr r3, [r7, #24] 800f738: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 800f73c: 2b00 cmp r3, #0 800f73e: d10a bne.n 800f756 ((tsr & CAN_TSR_TME1) != 0U) || 800f740: 69bb ldr r3, [r7, #24] 800f742: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 if (((tsr & CAN_TSR_TME0) != 0U) || 800f746: 2b00 cmp r3, #0 800f748: d105 bne.n 800f756 ((tsr & CAN_TSR_TME2) != 0U)) 800f74a: 69bb ldr r3, [r7, #24] 800f74c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 ((tsr & CAN_TSR_TME1) != 0U) || 800f750: 2b00 cmp r3, #0 800f752: f000 8095 beq.w 800f880 { /* Select an empty transmit mailbox */ transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; 800f756: 69bb ldr r3, [r7, #24] 800f758: 0e1b lsrs r3, r3, #24 800f75a: f003 0303 and.w r3, r3, #3 800f75e: 617b str r3, [r7, #20] /* Store the Tx mailbox */ *pTxMailbox = (uint32_t)1 << transmitmailbox; 800f760: 2201 movs r2, #1 800f762: 697b ldr r3, [r7, #20] 800f764: 409a lsls r2, r3 800f766: 683b ldr r3, [r7, #0] 800f768: 601a str r2, [r3, #0] /* Set up the Id */ if (pHeader->IDE == CAN_ID_STD) 800f76a: 68bb ldr r3, [r7, #8] 800f76c: 689b ldr r3, [r3, #8] 800f76e: 2b00 cmp r3, #0 800f770: d10d bne.n 800f78e { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 800f772: 68bb ldr r3, [r7, #8] 800f774: 681b ldr r3, [r3, #0] 800f776: 055a lsls r2, r3, #21 pHeader->RTR); 800f778: 68bb ldr r3, [r7, #8] 800f77a: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 800f77c: 68f9 ldr r1, [r7, #12] 800f77e: 6809 ldr r1, [r1, #0] 800f780: 431a orrs r2, r3 800f782: 697b ldr r3, [r7, #20] 800f784: 3318 adds r3, #24 800f786: 011b lsls r3, r3, #4 800f788: 440b add r3, r1 800f78a: 601a str r2, [r3, #0] 800f78c: e00f b.n 800f7ae } else { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f78e: 68bb ldr r3, [r7, #8] 800f790: 685b ldr r3, [r3, #4] 800f792: 00da lsls r2, r3, #3 pHeader->IDE | 800f794: 68bb ldr r3, [r7, #8] 800f796: 689b ldr r3, [r3, #8] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f798: 431a orrs r2, r3 pHeader->RTR); 800f79a: 68bb ldr r3, [r7, #8] 800f79c: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f79e: 68f9 ldr r1, [r7, #12] 800f7a0: 6809 ldr r1, [r1, #0] pHeader->IDE | 800f7a2: 431a orrs r2, r3 hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f7a4: 697b ldr r3, [r7, #20] 800f7a6: 3318 adds r3, #24 800f7a8: 011b lsls r3, r3, #4 800f7aa: 440b add r3, r1 800f7ac: 601a str r2, [r3, #0] } /* Set up the DLC */ hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); 800f7ae: 68fb ldr r3, [r7, #12] 800f7b0: 6819 ldr r1, [r3, #0] 800f7b2: 68bb ldr r3, [r7, #8] 800f7b4: 691a ldr r2, [r3, #16] 800f7b6: 697b ldr r3, [r7, #20] 800f7b8: 3318 adds r3, #24 800f7ba: 011b lsls r3, r3, #4 800f7bc: 440b add r3, r1 800f7be: 3304 adds r3, #4 800f7c0: 601a str r2, [r3, #0] /* Set up the Transmit Global Time mode */ if (pHeader->TransmitGlobalTime == ENABLE) 800f7c2: 68bb ldr r3, [r7, #8] 800f7c4: 7d1b ldrb r3, [r3, #20] 800f7c6: 2b01 cmp r3, #1 800f7c8: d111 bne.n 800f7ee { SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); 800f7ca: 68fb ldr r3, [r7, #12] 800f7cc: 681a ldr r2, [r3, #0] 800f7ce: 697b ldr r3, [r7, #20] 800f7d0: 3318 adds r3, #24 800f7d2: 011b lsls r3, r3, #4 800f7d4: 4413 add r3, r2 800f7d6: 3304 adds r3, #4 800f7d8: 681b ldr r3, [r3, #0] 800f7da: 68fa ldr r2, [r7, #12] 800f7dc: 6811 ldr r1, [r2, #0] 800f7de: f443 7280 orr.w r2, r3, #256 @ 0x100 800f7e2: 697b ldr r3, [r7, #20] 800f7e4: 3318 adds r3, #24 800f7e6: 011b lsls r3, r3, #4 800f7e8: 440b add r3, r1 800f7ea: 3304 adds r3, #4 800f7ec: 601a str r2, [r3, #0] } /* Set up the data field */ WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, 800f7ee: 687b ldr r3, [r7, #4] 800f7f0: 3307 adds r3, #7 800f7f2: 781b ldrb r3, [r3, #0] 800f7f4: 061a lsls r2, r3, #24 800f7f6: 687b ldr r3, [r7, #4] 800f7f8: 3306 adds r3, #6 800f7fa: 781b ldrb r3, [r3, #0] 800f7fc: 041b lsls r3, r3, #16 800f7fe: 431a orrs r2, r3 800f800: 687b ldr r3, [r7, #4] 800f802: 3305 adds r3, #5 800f804: 781b ldrb r3, [r3, #0] 800f806: 021b lsls r3, r3, #8 800f808: 4313 orrs r3, r2 800f80a: 687a ldr r2, [r7, #4] 800f80c: 3204 adds r2, #4 800f80e: 7812 ldrb r2, [r2, #0] 800f810: 4610 mov r0, r2 800f812: 68fa ldr r2, [r7, #12] 800f814: 6811 ldr r1, [r2, #0] 800f816: ea43 0200 orr.w r2, r3, r0 800f81a: 697b ldr r3, [r7, #20] 800f81c: 011b lsls r3, r3, #4 800f81e: 440b add r3, r1 800f820: f503 73c6 add.w r3, r3, #396 @ 0x18c 800f824: 601a str r2, [r3, #0] ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, 800f826: 687b ldr r3, [r7, #4] 800f828: 3303 adds r3, #3 800f82a: 781b ldrb r3, [r3, #0] 800f82c: 061a lsls r2, r3, #24 800f82e: 687b ldr r3, [r7, #4] 800f830: 3302 adds r3, #2 800f832: 781b ldrb r3, [r3, #0] 800f834: 041b lsls r3, r3, #16 800f836: 431a orrs r2, r3 800f838: 687b ldr r3, [r7, #4] 800f83a: 3301 adds r3, #1 800f83c: 781b ldrb r3, [r3, #0] 800f83e: 021b lsls r3, r3, #8 800f840: 4313 orrs r3, r2 800f842: 687a ldr r2, [r7, #4] 800f844: 7812 ldrb r2, [r2, #0] 800f846: 4610 mov r0, r2 800f848: 68fa ldr r2, [r7, #12] 800f84a: 6811 ldr r1, [r2, #0] 800f84c: ea43 0200 orr.w r2, r3, r0 800f850: 697b ldr r3, [r7, #20] 800f852: 011b lsls r3, r3, #4 800f854: 440b add r3, r1 800f856: f503 73c4 add.w r3, r3, #392 @ 0x188 800f85a: 601a str r2, [r3, #0] ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); /* Request transmission */ SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); 800f85c: 68fb ldr r3, [r7, #12] 800f85e: 681a ldr r2, [r3, #0] 800f860: 697b ldr r3, [r7, #20] 800f862: 3318 adds r3, #24 800f864: 011b lsls r3, r3, #4 800f866: 4413 add r3, r2 800f868: 681b ldr r3, [r3, #0] 800f86a: 68fa ldr r2, [r7, #12] 800f86c: 6811 ldr r1, [r2, #0] 800f86e: f043 0201 orr.w r2, r3, #1 800f872: 697b ldr r3, [r7, #20] 800f874: 3318 adds r3, #24 800f876: 011b lsls r3, r3, #4 800f878: 440b add r3, r1 800f87a: 601a str r2, [r3, #0] /* Return function status */ return HAL_OK; 800f87c: 2300 movs r3, #0 800f87e: e00e b.n 800f89e } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 800f880: 68fb ldr r3, [r7, #12] 800f882: 6a5b ldr r3, [r3, #36] @ 0x24 800f884: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800f888: 68fb ldr r3, [r7, #12] 800f88a: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f88c: 2301 movs r3, #1 800f88e: e006 b.n 800f89e } } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800f890: 68fb ldr r3, [r7, #12] 800f892: 6a5b ldr r3, [r3, #36] @ 0x24 800f894: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800f898: 68fb ldr r3, [r7, #12] 800f89a: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f89c: 2301 movs r3, #1 } } 800f89e: 4618 mov r0, r3 800f8a0: 3724 adds r7, #36 @ 0x24 800f8a2: 46bd mov sp, r7 800f8a4: bc80 pop {r7} 800f8a6: 4770 bx lr 0800f8a8 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval Number of free Tx Mailboxes. */ uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan) { 800f8a8: b480 push {r7} 800f8aa: b085 sub sp, #20 800f8ac: af00 add r7, sp, #0 800f8ae: 6078 str r0, [r7, #4] uint32_t freelevel = 0U; 800f8b0: 2300 movs r3, #0 800f8b2: 60fb str r3, [r7, #12] HAL_CAN_StateTypeDef state = hcan->State; 800f8b4: 687b ldr r3, [r7, #4] 800f8b6: f893 3020 ldrb.w r3, [r3, #32] 800f8ba: 72fb strb r3, [r7, #11] if ((state == HAL_CAN_STATE_READY) || 800f8bc: 7afb ldrb r3, [r7, #11] 800f8be: 2b01 cmp r3, #1 800f8c0: d002 beq.n 800f8c8 800f8c2: 7afb ldrb r3, [r7, #11] 800f8c4: 2b02 cmp r3, #2 800f8c6: d11d bne.n 800f904 (state == HAL_CAN_STATE_LISTENING)) { /* Check Tx Mailbox 0 status */ if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) 800f8c8: 687b ldr r3, [r7, #4] 800f8ca: 681b ldr r3, [r3, #0] 800f8cc: 689b ldr r3, [r3, #8] 800f8ce: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 800f8d2: 2b00 cmp r3, #0 800f8d4: d002 beq.n 800f8dc { freelevel++; 800f8d6: 68fb ldr r3, [r7, #12] 800f8d8: 3301 adds r3, #1 800f8da: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 1 status */ if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) 800f8dc: 687b ldr r3, [r7, #4] 800f8de: 681b ldr r3, [r3, #0] 800f8e0: 689b ldr r3, [r3, #8] 800f8e2: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 800f8e6: 2b00 cmp r3, #0 800f8e8: d002 beq.n 800f8f0 { freelevel++; 800f8ea: 68fb ldr r3, [r7, #12] 800f8ec: 3301 adds r3, #1 800f8ee: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 2 status */ if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) 800f8f0: 687b ldr r3, [r7, #4] 800f8f2: 681b ldr r3, [r3, #0] 800f8f4: 689b ldr r3, [r3, #8] 800f8f6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800f8fa: 2b00 cmp r3, #0 800f8fc: d002 beq.n 800f904 { freelevel++; 800f8fe: 68fb ldr r3, [r7, #12] 800f900: 3301 adds r3, #1 800f902: 60fb str r3, [r7, #12] } } /* Return Tx Mailboxes free level */ return freelevel; 800f904: 68fb ldr r3, [r7, #12] } 800f906: 4618 mov r0, r3 800f908: 3714 adds r7, #20 800f90a: 46bd mov sp, r7 800f90c: bc80 pop {r7} 800f90e: 4770 bx lr 0800f910 : * @param aData array where the payload of the Rx frame will be stored. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) { 800f910: b480 push {r7} 800f912: b087 sub sp, #28 800f914: af00 add r7, sp, #0 800f916: 60f8 str r0, [r7, #12] 800f918: 60b9 str r1, [r7, #8] 800f91a: 607a str r2, [r7, #4] 800f91c: 603b str r3, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 800f91e: 68fb ldr r3, [r7, #12] 800f920: f893 3020 ldrb.w r3, [r3, #32] 800f924: 75fb strb r3, [r7, #23] assert_param(IS_CAN_RX_FIFO(RxFifo)); if ((state == HAL_CAN_STATE_READY) || 800f926: 7dfb ldrb r3, [r7, #23] 800f928: 2b01 cmp r3, #1 800f92a: d003 beq.n 800f934 800f92c: 7dfb ldrb r3, [r7, #23] 800f92e: 2b02 cmp r3, #2 800f930: f040 8103 bne.w 800fb3a (state == HAL_CAN_STATE_LISTENING)) { /* Check the Rx FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 800f934: 68bb ldr r3, [r7, #8] 800f936: 2b00 cmp r3, #0 800f938: d10e bne.n 800f958 { /* Check that the Rx FIFO 0 is not empty */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) 800f93a: 68fb ldr r3, [r7, #12] 800f93c: 681b ldr r3, [r3, #0] 800f93e: 68db ldr r3, [r3, #12] 800f940: f003 0303 and.w r3, r3, #3 800f944: 2b00 cmp r3, #0 800f946: d116 bne.n 800f976 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 800f948: 68fb ldr r3, [r7, #12] 800f94a: 6a5b ldr r3, [r3, #36] @ 0x24 800f94c: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800f950: 68fb ldr r3, [r7, #12] 800f952: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f954: 2301 movs r3, #1 800f956: e0f7 b.n 800fb48 } } else /* Rx element is assigned to Rx FIFO 1 */ { /* Check that the Rx FIFO 1 is not empty */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) 800f958: 68fb ldr r3, [r7, #12] 800f95a: 681b ldr r3, [r3, #0] 800f95c: 691b ldr r3, [r3, #16] 800f95e: f003 0303 and.w r3, r3, #3 800f962: 2b00 cmp r3, #0 800f964: d107 bne.n 800f976 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 800f966: 68fb ldr r3, [r7, #12] 800f968: 6a5b ldr r3, [r3, #36] @ 0x24 800f96a: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800f96e: 68fb ldr r3, [r7, #12] 800f970: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f972: 2301 movs r3, #1 800f974: e0e8 b.n 800fb48 } } /* Get the header */ pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; 800f976: 68fb ldr r3, [r7, #12] 800f978: 681a ldr r2, [r3, #0] 800f97a: 68bb ldr r3, [r7, #8] 800f97c: 331b adds r3, #27 800f97e: 011b lsls r3, r3, #4 800f980: 4413 add r3, r2 800f982: 681b ldr r3, [r3, #0] 800f984: f003 0204 and.w r2, r3, #4 800f988: 687b ldr r3, [r7, #4] 800f98a: 609a str r2, [r3, #8] if (pHeader->IDE == CAN_ID_STD) 800f98c: 687b ldr r3, [r7, #4] 800f98e: 689b ldr r3, [r3, #8] 800f990: 2b00 cmp r3, #0 800f992: d10c bne.n 800f9ae { pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; 800f994: 68fb ldr r3, [r7, #12] 800f996: 681a ldr r2, [r3, #0] 800f998: 68bb ldr r3, [r7, #8] 800f99a: 331b adds r3, #27 800f99c: 011b lsls r3, r3, #4 800f99e: 4413 add r3, r2 800f9a0: 681b ldr r3, [r3, #0] 800f9a2: 0d5b lsrs r3, r3, #21 800f9a4: f3c3 020a ubfx r2, r3, #0, #11 800f9a8: 687b ldr r3, [r7, #4] 800f9aa: 601a str r2, [r3, #0] 800f9ac: e00b b.n 800f9c6 } else { pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; 800f9ae: 68fb ldr r3, [r7, #12] 800f9b0: 681a ldr r2, [r3, #0] 800f9b2: 68bb ldr r3, [r7, #8] 800f9b4: 331b adds r3, #27 800f9b6: 011b lsls r3, r3, #4 800f9b8: 4413 add r3, r2 800f9ba: 681b ldr r3, [r3, #0] 800f9bc: 08db lsrs r3, r3, #3 800f9be: f023 4260 bic.w r2, r3, #3758096384 @ 0xe0000000 pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & 800f9c2: 687b ldr r3, [r7, #4] 800f9c4: 605a str r2, [r3, #4] } pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); 800f9c6: 68fb ldr r3, [r7, #12] 800f9c8: 681a ldr r2, [r3, #0] 800f9ca: 68bb ldr r3, [r7, #8] 800f9cc: 331b adds r3, #27 800f9ce: 011b lsls r3, r3, #4 800f9d0: 4413 add r3, r2 800f9d2: 681b ldr r3, [r3, #0] 800f9d4: f003 0202 and.w r2, r3, #2 800f9d8: 687b ldr r3, [r7, #4] 800f9da: 60da str r2, [r3, #12] if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) 800f9dc: 68fb ldr r3, [r7, #12] 800f9de: 681a ldr r2, [r3, #0] 800f9e0: 68bb ldr r3, [r7, #8] 800f9e2: 331b adds r3, #27 800f9e4: 011b lsls r3, r3, #4 800f9e6: 4413 add r3, r2 800f9e8: 3304 adds r3, #4 800f9ea: 681b ldr r3, [r3, #0] 800f9ec: f003 0308 and.w r3, r3, #8 800f9f0: 2b00 cmp r3, #0 800f9f2: d003 beq.n 800f9fc { /* Truncate DLC to 8 if received field is over range */ pHeader->DLC = 8U; 800f9f4: 687b ldr r3, [r7, #4] 800f9f6: 2208 movs r2, #8 800f9f8: 611a str r2, [r3, #16] 800f9fa: e00b b.n 800fa14 } else { pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; 800f9fc: 68fb ldr r3, [r7, #12] 800f9fe: 681a ldr r2, [r3, #0] 800fa00: 68bb ldr r3, [r7, #8] 800fa02: 331b adds r3, #27 800fa04: 011b lsls r3, r3, #4 800fa06: 4413 add r3, r2 800fa08: 3304 adds r3, #4 800fa0a: 681b ldr r3, [r3, #0] 800fa0c: f003 020f and.w r2, r3, #15 800fa10: 687b ldr r3, [r7, #4] 800fa12: 611a str r2, [r3, #16] } pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; 800fa14: 68fb ldr r3, [r7, #12] 800fa16: 681a ldr r2, [r3, #0] 800fa18: 68bb ldr r3, [r7, #8] 800fa1a: 331b adds r3, #27 800fa1c: 011b lsls r3, r3, #4 800fa1e: 4413 add r3, r2 800fa20: 3304 adds r3, #4 800fa22: 681b ldr r3, [r3, #0] 800fa24: 0a1b lsrs r3, r3, #8 800fa26: b2da uxtb r2, r3 800fa28: 687b ldr r3, [r7, #4] 800fa2a: 619a str r2, [r3, #24] pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; 800fa2c: 68fb ldr r3, [r7, #12] 800fa2e: 681a ldr r2, [r3, #0] 800fa30: 68bb ldr r3, [r7, #8] 800fa32: 331b adds r3, #27 800fa34: 011b lsls r3, r3, #4 800fa36: 4413 add r3, r2 800fa38: 3304 adds r3, #4 800fa3a: 681b ldr r3, [r3, #0] 800fa3c: 0c1b lsrs r3, r3, #16 800fa3e: b29a uxth r2, r3 800fa40: 687b ldr r3, [r7, #4] 800fa42: 615a str r2, [r3, #20] /* Get the data */ aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos); 800fa44: 68fb ldr r3, [r7, #12] 800fa46: 681a ldr r2, [r3, #0] 800fa48: 68bb ldr r3, [r7, #8] 800fa4a: 011b lsls r3, r3, #4 800fa4c: 4413 add r3, r2 800fa4e: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fa52: 681b ldr r3, [r3, #0] 800fa54: b2da uxtb r2, r3 800fa56: 683b ldr r3, [r7, #0] 800fa58: 701a strb r2, [r3, #0] aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos); 800fa5a: 68fb ldr r3, [r7, #12] 800fa5c: 681a ldr r2, [r3, #0] 800fa5e: 68bb ldr r3, [r7, #8] 800fa60: 011b lsls r3, r3, #4 800fa62: 4413 add r3, r2 800fa64: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fa68: 681b ldr r3, [r3, #0] 800fa6a: 0a1a lsrs r2, r3, #8 800fa6c: 683b ldr r3, [r7, #0] 800fa6e: 3301 adds r3, #1 800fa70: b2d2 uxtb r2, r2 800fa72: 701a strb r2, [r3, #0] aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos); 800fa74: 68fb ldr r3, [r7, #12] 800fa76: 681a ldr r2, [r3, #0] 800fa78: 68bb ldr r3, [r7, #8] 800fa7a: 011b lsls r3, r3, #4 800fa7c: 4413 add r3, r2 800fa7e: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fa82: 681b ldr r3, [r3, #0] 800fa84: 0c1a lsrs r2, r3, #16 800fa86: 683b ldr r3, [r7, #0] 800fa88: 3302 adds r3, #2 800fa8a: b2d2 uxtb r2, r2 800fa8c: 701a strb r2, [r3, #0] aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos); 800fa8e: 68fb ldr r3, [r7, #12] 800fa90: 681a ldr r2, [r3, #0] 800fa92: 68bb ldr r3, [r7, #8] 800fa94: 011b lsls r3, r3, #4 800fa96: 4413 add r3, r2 800fa98: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fa9c: 681b ldr r3, [r3, #0] 800fa9e: 0e1a lsrs r2, r3, #24 800faa0: 683b ldr r3, [r7, #0] 800faa2: 3303 adds r3, #3 800faa4: b2d2 uxtb r2, r2 800faa6: 701a strb r2, [r3, #0] aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos); 800faa8: 68fb ldr r3, [r7, #12] 800faaa: 681a ldr r2, [r3, #0] 800faac: 68bb ldr r3, [r7, #8] 800faae: 011b lsls r3, r3, #4 800fab0: 4413 add r3, r2 800fab2: f503 73de add.w r3, r3, #444 @ 0x1bc 800fab6: 681a ldr r2, [r3, #0] 800fab8: 683b ldr r3, [r7, #0] 800faba: 3304 adds r3, #4 800fabc: b2d2 uxtb r2, r2 800fabe: 701a strb r2, [r3, #0] aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos); 800fac0: 68fb ldr r3, [r7, #12] 800fac2: 681a ldr r2, [r3, #0] 800fac4: 68bb ldr r3, [r7, #8] 800fac6: 011b lsls r3, r3, #4 800fac8: 4413 add r3, r2 800faca: f503 73de add.w r3, r3, #444 @ 0x1bc 800face: 681b ldr r3, [r3, #0] 800fad0: 0a1a lsrs r2, r3, #8 800fad2: 683b ldr r3, [r7, #0] 800fad4: 3305 adds r3, #5 800fad6: b2d2 uxtb r2, r2 800fad8: 701a strb r2, [r3, #0] aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos); 800fada: 68fb ldr r3, [r7, #12] 800fadc: 681a ldr r2, [r3, #0] 800fade: 68bb ldr r3, [r7, #8] 800fae0: 011b lsls r3, r3, #4 800fae2: 4413 add r3, r2 800fae4: f503 73de add.w r3, r3, #444 @ 0x1bc 800fae8: 681b ldr r3, [r3, #0] 800faea: 0c1a lsrs r2, r3, #16 800faec: 683b ldr r3, [r7, #0] 800faee: 3306 adds r3, #6 800faf0: b2d2 uxtb r2, r2 800faf2: 701a strb r2, [r3, #0] aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos); 800faf4: 68fb ldr r3, [r7, #12] 800faf6: 681a ldr r2, [r3, #0] 800faf8: 68bb ldr r3, [r7, #8] 800fafa: 011b lsls r3, r3, #4 800fafc: 4413 add r3, r2 800fafe: f503 73de add.w r3, r3, #444 @ 0x1bc 800fb02: 681b ldr r3, [r3, #0] 800fb04: 0e1a lsrs r2, r3, #24 800fb06: 683b ldr r3, [r7, #0] 800fb08: 3307 adds r3, #7 800fb0a: b2d2 uxtb r2, r2 800fb0c: 701a strb r2, [r3, #0] /* Release the FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 800fb0e: 68bb ldr r3, [r7, #8] 800fb10: 2b00 cmp r3, #0 800fb12: d108 bne.n 800fb26 { /* Release RX FIFO 0 */ SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); 800fb14: 68fb ldr r3, [r7, #12] 800fb16: 681b ldr r3, [r3, #0] 800fb18: 68da ldr r2, [r3, #12] 800fb1a: 68fb ldr r3, [r7, #12] 800fb1c: 681b ldr r3, [r3, #0] 800fb1e: f042 0220 orr.w r2, r2, #32 800fb22: 60da str r2, [r3, #12] 800fb24: e007 b.n 800fb36 } else /* Rx element is assigned to Rx FIFO 1 */ { /* Release RX FIFO 1 */ SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); 800fb26: 68fb ldr r3, [r7, #12] 800fb28: 681b ldr r3, [r3, #0] 800fb2a: 691a ldr r2, [r3, #16] 800fb2c: 68fb ldr r3, [r7, #12] 800fb2e: 681b ldr r3, [r3, #0] 800fb30: f042 0220 orr.w r2, r2, #32 800fb34: 611a str r2, [r3, #16] } /* Return function status */ return HAL_OK; 800fb36: 2300 movs r3, #0 800fb38: e006 b.n 800fb48 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800fb3a: 68fb ldr r3, [r7, #12] 800fb3c: 6a5b ldr r3, [r3, #36] @ 0x24 800fb3e: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800fb42: 68fb ldr r3, [r7, #12] 800fb44: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fb46: 2301 movs r3, #1 } } 800fb48: 4618 mov r0, r3 800fb4a: 371c adds r7, #28 800fb4c: 46bd mov sp, r7 800fb4e: bc80 pop {r7} 800fb50: 4770 bx lr 0800fb52 : * @param ActiveITs indicates which interrupts will be enabled. * This parameter can be any combination of @arg CAN_Interrupts. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) { 800fb52: b480 push {r7} 800fb54: b085 sub sp, #20 800fb56: af00 add r7, sp, #0 800fb58: 6078 str r0, [r7, #4] 800fb5a: 6039 str r1, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 800fb5c: 687b ldr r3, [r7, #4] 800fb5e: f893 3020 ldrb.w r3, [r3, #32] 800fb62: 73fb strb r3, [r7, #15] /* Check function parameters */ assert_param(IS_CAN_IT(ActiveITs)); if ((state == HAL_CAN_STATE_READY) || 800fb64: 7bfb ldrb r3, [r7, #15] 800fb66: 2b01 cmp r3, #1 800fb68: d002 beq.n 800fb70 800fb6a: 7bfb ldrb r3, [r7, #15] 800fb6c: 2b02 cmp r3, #2 800fb6e: d109 bne.n 800fb84 (state == HAL_CAN_STATE_LISTENING)) { /* Enable the selected interrupts */ __HAL_CAN_ENABLE_IT(hcan, ActiveITs); 800fb70: 687b ldr r3, [r7, #4] 800fb72: 681b ldr r3, [r3, #0] 800fb74: 6959 ldr r1, [r3, #20] 800fb76: 687b ldr r3, [r7, #4] 800fb78: 681b ldr r3, [r3, #0] 800fb7a: 683a ldr r2, [r7, #0] 800fb7c: 430a orrs r2, r1 800fb7e: 615a str r2, [r3, #20] /* Return function status */ return HAL_OK; 800fb80: 2300 movs r3, #0 800fb82: e006 b.n 800fb92 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800fb84: 687b ldr r3, [r7, #4] 800fb86: 6a5b ldr r3, [r3, #36] @ 0x24 800fb88: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800fb8c: 687b ldr r3, [r7, #4] 800fb8e: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fb90: 2301 movs r3, #1 } } 800fb92: 4618 mov r0, r3 800fb94: 3714 adds r7, #20 800fb96: 46bd mov sp, r7 800fb98: bc80 pop {r7} 800fb9a: 4770 bx lr 0800fb9c : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) { 800fb9c: b580 push {r7, lr} 800fb9e: b08a sub sp, #40 @ 0x28 800fba0: af00 add r7, sp, #0 800fba2: 6078 str r0, [r7, #4] uint32_t errorcode = HAL_CAN_ERROR_NONE; 800fba4: 2300 movs r3, #0 800fba6: 627b str r3, [r7, #36] @ 0x24 uint32_t interrupts = READ_REG(hcan->Instance->IER); 800fba8: 687b ldr r3, [r7, #4] 800fbaa: 681b ldr r3, [r3, #0] 800fbac: 695b ldr r3, [r3, #20] 800fbae: 623b str r3, [r7, #32] uint32_t msrflags = READ_REG(hcan->Instance->MSR); 800fbb0: 687b ldr r3, [r7, #4] 800fbb2: 681b ldr r3, [r3, #0] 800fbb4: 685b ldr r3, [r3, #4] 800fbb6: 61fb str r3, [r7, #28] uint32_t tsrflags = READ_REG(hcan->Instance->TSR); 800fbb8: 687b ldr r3, [r7, #4] 800fbba: 681b ldr r3, [r3, #0] 800fbbc: 689b ldr r3, [r3, #8] 800fbbe: 61bb str r3, [r7, #24] uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); 800fbc0: 687b ldr r3, [r7, #4] 800fbc2: 681b ldr r3, [r3, #0] 800fbc4: 68db ldr r3, [r3, #12] 800fbc6: 617b str r3, [r7, #20] uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); 800fbc8: 687b ldr r3, [r7, #4] 800fbca: 681b ldr r3, [r3, #0] 800fbcc: 691b ldr r3, [r3, #16] 800fbce: 613b str r3, [r7, #16] uint32_t esrflags = READ_REG(hcan->Instance->ESR); 800fbd0: 687b ldr r3, [r7, #4] 800fbd2: 681b ldr r3, [r3, #0] 800fbd4: 699b ldr r3, [r3, #24] 800fbd6: 60fb str r3, [r7, #12] /* Transmit Mailbox empty interrupt management *****************************/ if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) 800fbd8: 6a3b ldr r3, [r7, #32] 800fbda: f003 0301 and.w r3, r3, #1 800fbde: 2b00 cmp r3, #0 800fbe0: d07c beq.n 800fcdc { /* Transmit Mailbox 0 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP0) != 0U) 800fbe2: 69bb ldr r3, [r7, #24] 800fbe4: f003 0301 and.w r3, r3, #1 800fbe8: 2b00 cmp r3, #0 800fbea: d023 beq.n 800fc34 { /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); 800fbec: 687b ldr r3, [r7, #4] 800fbee: 681b ldr r3, [r3, #0] 800fbf0: 2201 movs r2, #1 800fbf2: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK0) != 0U) 800fbf4: 69bb ldr r3, [r7, #24] 800fbf6: f003 0302 and.w r3, r3, #2 800fbfa: 2b00 cmp r3, #0 800fbfc: d003 beq.n 800fc06 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0CompleteCallback(hcan); 800fbfe: 6878 ldr r0, [r7, #4] 800fc00: f000 f983 bl 800ff0a 800fc04: e016 b.n 800fc34 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST0) != 0U) 800fc06: 69bb ldr r3, [r7, #24] 800fc08: f003 0304 and.w r3, r3, #4 800fc0c: 2b00 cmp r3, #0 800fc0e: d004 beq.n 800fc1a { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST0; 800fc10: 6a7b ldr r3, [r7, #36] @ 0x24 800fc12: f443 6300 orr.w r3, r3, #2048 @ 0x800 800fc16: 627b str r3, [r7, #36] @ 0x24 800fc18: e00c b.n 800fc34 } else if ((tsrflags & CAN_TSR_TERR0) != 0U) 800fc1a: 69bb ldr r3, [r7, #24] 800fc1c: f003 0308 and.w r3, r3, #8 800fc20: 2b00 cmp r3, #0 800fc22: d004 beq.n 800fc2e { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR0; 800fc24: 6a7b ldr r3, [r7, #36] @ 0x24 800fc26: f443 5380 orr.w r3, r3, #4096 @ 0x1000 800fc2a: 627b str r3, [r7, #36] @ 0x24 800fc2c: e002 b.n 800fc34 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0AbortCallback(hcan); 800fc2e: 6878 ldr r0, [r7, #4] 800fc30: f000 f986 bl 800ff40 } } } /* Transmit Mailbox 1 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP1) != 0U) 800fc34: 69bb ldr r3, [r7, #24] 800fc36: f403 7380 and.w r3, r3, #256 @ 0x100 800fc3a: 2b00 cmp r3, #0 800fc3c: d024 beq.n 800fc88 { /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); 800fc3e: 687b ldr r3, [r7, #4] 800fc40: 681b ldr r3, [r3, #0] 800fc42: f44f 7280 mov.w r2, #256 @ 0x100 800fc46: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK1) != 0U) 800fc48: 69bb ldr r3, [r7, #24] 800fc4a: f403 7300 and.w r3, r3, #512 @ 0x200 800fc4e: 2b00 cmp r3, #0 800fc50: d003 beq.n 800fc5a #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1CompleteCallback(hcan); 800fc52: 6878 ldr r0, [r7, #4] 800fc54: f000 f962 bl 800ff1c 800fc58: e016 b.n 800fc88 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST1) != 0U) 800fc5a: 69bb ldr r3, [r7, #24] 800fc5c: f403 6380 and.w r3, r3, #1024 @ 0x400 800fc60: 2b00 cmp r3, #0 800fc62: d004 beq.n 800fc6e { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST1; 800fc64: 6a7b ldr r3, [r7, #36] @ 0x24 800fc66: f443 5300 orr.w r3, r3, #8192 @ 0x2000 800fc6a: 627b str r3, [r7, #36] @ 0x24 800fc6c: e00c b.n 800fc88 } else if ((tsrflags & CAN_TSR_TERR1) != 0U) 800fc6e: 69bb ldr r3, [r7, #24] 800fc70: f403 6300 and.w r3, r3, #2048 @ 0x800 800fc74: 2b00 cmp r3, #0 800fc76: d004 beq.n 800fc82 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR1; 800fc78: 6a7b ldr r3, [r7, #36] @ 0x24 800fc7a: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800fc7e: 627b str r3, [r7, #36] @ 0x24 800fc80: e002 b.n 800fc88 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1AbortCallback(hcan); 800fc82: 6878 ldr r0, [r7, #4] 800fc84: f000 f965 bl 800ff52 } } } /* Transmit Mailbox 2 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP2) != 0U) 800fc88: 69bb ldr r3, [r7, #24] 800fc8a: f403 3380 and.w r3, r3, #65536 @ 0x10000 800fc8e: 2b00 cmp r3, #0 800fc90: d024 beq.n 800fcdc { /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); 800fc92: 687b ldr r3, [r7, #4] 800fc94: 681b ldr r3, [r3, #0] 800fc96: f44f 3280 mov.w r2, #65536 @ 0x10000 800fc9a: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK2) != 0U) 800fc9c: 69bb ldr r3, [r7, #24] 800fc9e: f403 3300 and.w r3, r3, #131072 @ 0x20000 800fca2: 2b00 cmp r3, #0 800fca4: d003 beq.n 800fcae #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2CompleteCallback(hcan); 800fca6: 6878 ldr r0, [r7, #4] 800fca8: f000 f941 bl 800ff2e 800fcac: e016 b.n 800fcdc #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST2) != 0U) 800fcae: 69bb ldr r3, [r7, #24] 800fcb0: f403 2380 and.w r3, r3, #262144 @ 0x40000 800fcb4: 2b00 cmp r3, #0 800fcb6: d004 beq.n 800fcc2 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST2; 800fcb8: 6a7b ldr r3, [r7, #36] @ 0x24 800fcba: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800fcbe: 627b str r3, [r7, #36] @ 0x24 800fcc0: e00c b.n 800fcdc } else if ((tsrflags & CAN_TSR_TERR2) != 0U) 800fcc2: 69bb ldr r3, [r7, #24] 800fcc4: f403 2300 and.w r3, r3, #524288 @ 0x80000 800fcc8: 2b00 cmp r3, #0 800fcca: d004 beq.n 800fcd6 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR2; 800fccc: 6a7b ldr r3, [r7, #36] @ 0x24 800fcce: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800fcd2: 627b str r3, [r7, #36] @ 0x24 800fcd4: e002 b.n 800fcdc #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2AbortCallback(hcan); 800fcd6: 6878 ldr r0, [r7, #4] 800fcd8: f000 f944 bl 800ff64 } } } /* Receive FIFO 0 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) 800fcdc: 6a3b ldr r3, [r7, #32] 800fcde: f003 0308 and.w r3, r3, #8 800fce2: 2b00 cmp r3, #0 800fce4: d00c beq.n 800fd00 { if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) 800fce6: 697b ldr r3, [r7, #20] 800fce8: f003 0310 and.w r3, r3, #16 800fcec: 2b00 cmp r3, #0 800fcee: d007 beq.n 800fd00 { /* Set CAN error code to Rx Fifo 0 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV0; 800fcf0: 6a7b ldr r3, [r7, #36] @ 0x24 800fcf2: f443 7300 orr.w r3, r3, #512 @ 0x200 800fcf6: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO0 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); 800fcf8: 687b ldr r3, [r7, #4] 800fcfa: 681b ldr r3, [r3, #0] 800fcfc: 2210 movs r2, #16 800fcfe: 60da str r2, [r3, #12] } } /* Receive FIFO 0 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) 800fd00: 6a3b ldr r3, [r7, #32] 800fd02: f003 0304 and.w r3, r3, #4 800fd06: 2b00 cmp r3, #0 800fd08: d00b beq.n 800fd22 { if ((rf0rflags & CAN_RF0R_FULL0) != 0U) 800fd0a: 697b ldr r3, [r7, #20] 800fd0c: f003 0308 and.w r3, r3, #8 800fd10: 2b00 cmp r3, #0 800fd12: d006 beq.n 800fd22 { /* Clear FIFO 0 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); 800fd14: 687b ldr r3, [r7, #4] 800fd16: 681b ldr r3, [r3, #0] 800fd18: 2208 movs r2, #8 800fd1a: 60da str r2, [r3, #12] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0FullCallback(hcan); 800fd1c: 6878 ldr r0, [r7, #4] 800fd1e: f000 f92a bl 800ff76 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 0 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) 800fd22: 6a3b ldr r3, [r7, #32] 800fd24: f003 0302 and.w r3, r3, #2 800fd28: 2b00 cmp r3, #0 800fd2a: d009 beq.n 800fd40 { /* Check if message is still pending */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) 800fd2c: 687b ldr r3, [r7, #4] 800fd2e: 681b ldr r3, [r3, #0] 800fd30: 68db ldr r3, [r3, #12] 800fd32: f003 0303 and.w r3, r3, #3 800fd36: 2b00 cmp r3, #0 800fd38: d002 beq.n 800fd40 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0MsgPendingCallback(hcan); 800fd3a: 6878 ldr r0, [r7, #4] 800fd3c: f7fb fdac bl 800b898 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) 800fd40: 6a3b ldr r3, [r7, #32] 800fd42: f003 0340 and.w r3, r3, #64 @ 0x40 800fd46: 2b00 cmp r3, #0 800fd48: d00c beq.n 800fd64 { if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) 800fd4a: 693b ldr r3, [r7, #16] 800fd4c: f003 0310 and.w r3, r3, #16 800fd50: 2b00 cmp r3, #0 800fd52: d007 beq.n 800fd64 { /* Set CAN error code to Rx Fifo 1 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV1; 800fd54: 6a7b ldr r3, [r7, #36] @ 0x24 800fd56: f443 6380 orr.w r3, r3, #1024 @ 0x400 800fd5a: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO1 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); 800fd5c: 687b ldr r3, [r7, #4] 800fd5e: 681b ldr r3, [r3, #0] 800fd60: 2210 movs r2, #16 800fd62: 611a str r2, [r3, #16] } } /* Receive FIFO 1 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) 800fd64: 6a3b ldr r3, [r7, #32] 800fd66: f003 0320 and.w r3, r3, #32 800fd6a: 2b00 cmp r3, #0 800fd6c: d00b beq.n 800fd86 { if ((rf1rflags & CAN_RF1R_FULL1) != 0U) 800fd6e: 693b ldr r3, [r7, #16] 800fd70: f003 0308 and.w r3, r3, #8 800fd74: 2b00 cmp r3, #0 800fd76: d006 beq.n 800fd86 { /* Clear FIFO 1 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); 800fd78: 687b ldr r3, [r7, #4] 800fd7a: 681b ldr r3, [r3, #0] 800fd7c: 2208 movs r2, #8 800fd7e: 611a str r2, [r3, #16] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1FullCallback(hcan); 800fd80: 6878 ldr r0, [r7, #4] 800fd82: f000 f901 bl 800ff88 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) 800fd86: 6a3b ldr r3, [r7, #32] 800fd88: f003 0310 and.w r3, r3, #16 800fd8c: 2b00 cmp r3, #0 800fd8e: d009 beq.n 800fda4 { /* Check if message is still pending */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) 800fd90: 687b ldr r3, [r7, #4] 800fd92: 681b ldr r3, [r3, #0] 800fd94: 691b ldr r3, [r3, #16] 800fd96: f003 0303 and.w r3, r3, #3 800fd9a: 2b00 cmp r3, #0 800fd9c: d002 beq.n 800fda4 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1MsgPendingCallback(hcan); 800fd9e: 6878 ldr r0, [r7, #4] 800fda0: f7fc fb32 bl 800c408 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Sleep interrupt management *********************************************/ if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) 800fda4: 6a3b ldr r3, [r7, #32] 800fda6: f403 3300 and.w r3, r3, #131072 @ 0x20000 800fdaa: 2b00 cmp r3, #0 800fdac: d00b beq.n 800fdc6 { if ((msrflags & CAN_MSR_SLAKI) != 0U) 800fdae: 69fb ldr r3, [r7, #28] 800fdb0: f003 0310 and.w r3, r3, #16 800fdb4: 2b00 cmp r3, #0 800fdb6: d006 beq.n 800fdc6 { /* Clear Sleep interrupt Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); 800fdb8: 687b ldr r3, [r7, #4] 800fdba: 681b ldr r3, [r3, #0] 800fdbc: 2210 movs r2, #16 800fdbe: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->SleepCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_SleepCallback(hcan); 800fdc0: 6878 ldr r0, [r7, #4] 800fdc2: f000 f8ea bl 800ff9a #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* WakeUp interrupt management *********************************************/ if ((interrupts & CAN_IT_WAKEUP) != 0U) 800fdc6: 6a3b ldr r3, [r7, #32] 800fdc8: f403 3380 and.w r3, r3, #65536 @ 0x10000 800fdcc: 2b00 cmp r3, #0 800fdce: d00b beq.n 800fde8 { if ((msrflags & CAN_MSR_WKUI) != 0U) 800fdd0: 69fb ldr r3, [r7, #28] 800fdd2: f003 0308 and.w r3, r3, #8 800fdd6: 2b00 cmp r3, #0 800fdd8: d006 beq.n 800fde8 { /* Clear WakeUp Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); 800fdda: 687b ldr r3, [r7, #4] 800fddc: 681b ldr r3, [r3, #0] 800fdde: 2208 movs r2, #8 800fde0: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->WakeUpFromRxMsgCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_WakeUpFromRxMsgCallback(hcan); 800fde2: 6878 ldr r0, [r7, #4] 800fde4: f000 f8e2 bl 800ffac #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Error interrupts management *********************************************/ if ((interrupts & CAN_IT_ERROR) != 0U) 800fde8: 6a3b ldr r3, [r7, #32] 800fdea: f403 4300 and.w r3, r3, #32768 @ 0x8000 800fdee: 2b00 cmp r3, #0 800fdf0: d07b beq.n 800feea { if ((msrflags & CAN_MSR_ERRI) != 0U) 800fdf2: 69fb ldr r3, [r7, #28] 800fdf4: f003 0304 and.w r3, r3, #4 800fdf8: 2b00 cmp r3, #0 800fdfa: d072 beq.n 800fee2 { /* Check Error Warning Flag */ if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 800fdfc: 6a3b ldr r3, [r7, #32] 800fdfe: f403 7380 and.w r3, r3, #256 @ 0x100 800fe02: 2b00 cmp r3, #0 800fe04: d008 beq.n 800fe18 ((esrflags & CAN_ESR_EWGF) != 0U)) 800fe06: 68fb ldr r3, [r7, #12] 800fe08: f003 0301 and.w r3, r3, #1 if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 800fe0c: 2b00 cmp r3, #0 800fe0e: d003 beq.n 800fe18 { /* Set CAN error code to Error Warning */ errorcode |= HAL_CAN_ERROR_EWG; 800fe10: 6a7b ldr r3, [r7, #36] @ 0x24 800fe12: f043 0301 orr.w r3, r3, #1 800fe16: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Warning Flag as read-only */ } /* Check Error Passive Flag */ if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 800fe18: 6a3b ldr r3, [r7, #32] 800fe1a: f403 7300 and.w r3, r3, #512 @ 0x200 800fe1e: 2b00 cmp r3, #0 800fe20: d008 beq.n 800fe34 ((esrflags & CAN_ESR_EPVF) != 0U)) 800fe22: 68fb ldr r3, [r7, #12] 800fe24: f003 0302 and.w r3, r3, #2 if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 800fe28: 2b00 cmp r3, #0 800fe2a: d003 beq.n 800fe34 { /* Set CAN error code to Error Passive */ errorcode |= HAL_CAN_ERROR_EPV; 800fe2c: 6a7b ldr r3, [r7, #36] @ 0x24 800fe2e: f043 0302 orr.w r3, r3, #2 800fe32: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Passive Flag as read-only */ } /* Check Bus-off Flag */ if (((interrupts & CAN_IT_BUSOFF) != 0U) && 800fe34: 6a3b ldr r3, [r7, #32] 800fe36: f403 6380 and.w r3, r3, #1024 @ 0x400 800fe3a: 2b00 cmp r3, #0 800fe3c: d008 beq.n 800fe50 ((esrflags & CAN_ESR_BOFF) != 0U)) 800fe3e: 68fb ldr r3, [r7, #12] 800fe40: f003 0304 and.w r3, r3, #4 if (((interrupts & CAN_IT_BUSOFF) != 0U) && 800fe44: 2b00 cmp r3, #0 800fe46: d003 beq.n 800fe50 { /* Set CAN error code to Bus-Off */ errorcode |= HAL_CAN_ERROR_BOF; 800fe48: 6a7b ldr r3, [r7, #36] @ 0x24 800fe4a: f043 0304 orr.w r3, r3, #4 800fe4e: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Bus-Off as read-only */ } /* Check Last Error Code Flag */ if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 800fe50: 6a3b ldr r3, [r7, #32] 800fe52: f403 6300 and.w r3, r3, #2048 @ 0x800 800fe56: 2b00 cmp r3, #0 800fe58: d043 beq.n 800fee2 ((esrflags & CAN_ESR_LEC) != 0U)) 800fe5a: 68fb ldr r3, [r7, #12] 800fe5c: f003 0370 and.w r3, r3, #112 @ 0x70 if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 800fe60: 2b00 cmp r3, #0 800fe62: d03e beq.n 800fee2 { switch (esrflags & CAN_ESR_LEC) 800fe64: 68fb ldr r3, [r7, #12] 800fe66: f003 0370 and.w r3, r3, #112 @ 0x70 800fe6a: 2b60 cmp r3, #96 @ 0x60 800fe6c: d02b beq.n 800fec6 800fe6e: 2b60 cmp r3, #96 @ 0x60 800fe70: d82e bhi.n 800fed0 800fe72: 2b50 cmp r3, #80 @ 0x50 800fe74: d022 beq.n 800febc 800fe76: 2b50 cmp r3, #80 @ 0x50 800fe78: d82a bhi.n 800fed0 800fe7a: 2b40 cmp r3, #64 @ 0x40 800fe7c: d019 beq.n 800feb2 800fe7e: 2b40 cmp r3, #64 @ 0x40 800fe80: d826 bhi.n 800fed0 800fe82: 2b30 cmp r3, #48 @ 0x30 800fe84: d010 beq.n 800fea8 800fe86: 2b30 cmp r3, #48 @ 0x30 800fe88: d822 bhi.n 800fed0 800fe8a: 2b10 cmp r3, #16 800fe8c: d002 beq.n 800fe94 800fe8e: 2b20 cmp r3, #32 800fe90: d005 beq.n 800fe9e case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): /* Set CAN error code to CRC error */ errorcode |= HAL_CAN_ERROR_CRC; break; default: break; 800fe92: e01d b.n 800fed0 errorcode |= HAL_CAN_ERROR_STF; 800fe94: 6a7b ldr r3, [r7, #36] @ 0x24 800fe96: f043 0308 orr.w r3, r3, #8 800fe9a: 627b str r3, [r7, #36] @ 0x24 break; 800fe9c: e019 b.n 800fed2 errorcode |= HAL_CAN_ERROR_FOR; 800fe9e: 6a7b ldr r3, [r7, #36] @ 0x24 800fea0: f043 0310 orr.w r3, r3, #16 800fea4: 627b str r3, [r7, #36] @ 0x24 break; 800fea6: e014 b.n 800fed2 errorcode |= HAL_CAN_ERROR_ACK; 800fea8: 6a7b ldr r3, [r7, #36] @ 0x24 800feaa: f043 0320 orr.w r3, r3, #32 800feae: 627b str r3, [r7, #36] @ 0x24 break; 800feb0: e00f b.n 800fed2 errorcode |= HAL_CAN_ERROR_BR; 800feb2: 6a7b ldr r3, [r7, #36] @ 0x24 800feb4: f043 0340 orr.w r3, r3, #64 @ 0x40 800feb8: 627b str r3, [r7, #36] @ 0x24 break; 800feba: e00a b.n 800fed2 errorcode |= HAL_CAN_ERROR_BD; 800febc: 6a7b ldr r3, [r7, #36] @ 0x24 800febe: f043 0380 orr.w r3, r3, #128 @ 0x80 800fec2: 627b str r3, [r7, #36] @ 0x24 break; 800fec4: e005 b.n 800fed2 errorcode |= HAL_CAN_ERROR_CRC; 800fec6: 6a7b ldr r3, [r7, #36] @ 0x24 800fec8: f443 7380 orr.w r3, r3, #256 @ 0x100 800fecc: 627b str r3, [r7, #36] @ 0x24 break; 800fece: e000 b.n 800fed2 break; 800fed0: bf00 nop } /* Clear Last error code Flag */ CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); 800fed2: 687b ldr r3, [r7, #4] 800fed4: 681b ldr r3, [r3, #0] 800fed6: 699a ldr r2, [r3, #24] 800fed8: 687b ldr r3, [r7, #4] 800feda: 681b ldr r3, [r3, #0] 800fedc: f022 0270 bic.w r2, r2, #112 @ 0x70 800fee0: 619a str r2, [r3, #24] } } /* Clear ERRI Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); 800fee2: 687b ldr r3, [r7, #4] 800fee4: 681b ldr r3, [r3, #0] 800fee6: 2204 movs r2, #4 800fee8: 605a str r2, [r3, #4] } /* Call the Error call Back in case of Errors */ if (errorcode != HAL_CAN_ERROR_NONE) 800feea: 6a7b ldr r3, [r7, #36] @ 0x24 800feec: 2b00 cmp r3, #0 800feee: d008 beq.n 800ff02 { /* Update error code in handle */ hcan->ErrorCode |= errorcode; 800fef0: 687b ldr r3, [r7, #4] 800fef2: 6a5a ldr r2, [r3, #36] @ 0x24 800fef4: 6a7b ldr r3, [r7, #36] @ 0x24 800fef6: 431a orrs r2, r3 800fef8: 687b ldr r3, [r7, #4] 800fefa: 625a str r2, [r3, #36] @ 0x24 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->ErrorCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_ErrorCallback(hcan); 800fefc: 6878 ldr r0, [r7, #4] 800fefe: f000 f85e bl 800ffbe #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } 800ff02: bf00 nop 800ff04: 3728 adds r7, #40 @ 0x28 800ff06: 46bd mov sp, r7 800ff08: bd80 pop {r7, pc} 0800ff0a : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) { 800ff0a: b480 push {r7} 800ff0c: b083 sub sp, #12 800ff0e: af00 add r7, sp, #0 800ff10: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the user file */ } 800ff12: bf00 nop 800ff14: 370c adds r7, #12 800ff16: 46bd mov sp, r7 800ff18: bc80 pop {r7} 800ff1a: 4770 bx lr 0800ff1c : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) { 800ff1c: b480 push {r7} 800ff1e: b083 sub sp, #12 800ff20: af00 add r7, sp, #0 800ff22: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the user file */ } 800ff24: bf00 nop 800ff26: 370c adds r7, #12 800ff28: 46bd mov sp, r7 800ff2a: bc80 pop {r7} 800ff2c: 4770 bx lr 0800ff2e : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) { 800ff2e: b480 push {r7} 800ff30: b083 sub sp, #12 800ff32: af00 add r7, sp, #0 800ff34: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the user file */ } 800ff36: bf00 nop 800ff38: 370c adds r7, #12 800ff3a: 46bd mov sp, r7 800ff3c: bc80 pop {r7} 800ff3e: 4770 bx lr 0800ff40 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) { 800ff40: b480 push {r7} 800ff42: b083 sub sp, #12 800ff44: af00 add r7, sp, #0 800ff46: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0AbortCallback could be implemented in the user file */ } 800ff48: bf00 nop 800ff4a: 370c adds r7, #12 800ff4c: 46bd mov sp, r7 800ff4e: bc80 pop {r7} 800ff50: 4770 bx lr 0800ff52 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) { 800ff52: b480 push {r7} 800ff54: b083 sub sp, #12 800ff56: af00 add r7, sp, #0 800ff58: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1AbortCallback could be implemented in the user file */ } 800ff5a: bf00 nop 800ff5c: 370c adds r7, #12 800ff5e: 46bd mov sp, r7 800ff60: bc80 pop {r7} 800ff62: 4770 bx lr 0800ff64 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) { 800ff64: b480 push {r7} 800ff66: b083 sub sp, #12 800ff68: af00 add r7, sp, #0 800ff6a: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2AbortCallback could be implemented in the user file */ } 800ff6c: bf00 nop 800ff6e: 370c adds r7, #12 800ff70: 46bd mov sp, r7 800ff72: bc80 pop {r7} 800ff74: 4770 bx lr 0800ff76 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) { 800ff76: b480 push {r7} 800ff78: b083 sub sp, #12 800ff7a: af00 add r7, sp, #0 800ff7c: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo0FullCallback could be implemented in the user file */ } 800ff7e: bf00 nop 800ff80: 370c adds r7, #12 800ff82: 46bd mov sp, r7 800ff84: bc80 pop {r7} 800ff86: 4770 bx lr 0800ff88 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) { 800ff88: b480 push {r7} 800ff8a: b083 sub sp, #12 800ff8c: af00 add r7, sp, #0 800ff8e: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo1FullCallback could be implemented in the user file */ } 800ff90: bf00 nop 800ff92: 370c adds r7, #12 800ff94: 46bd mov sp, r7 800ff96: bc80 pop {r7} 800ff98: 4770 bx lr 0800ff9a : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) { 800ff9a: b480 push {r7} 800ff9c: b083 sub sp, #12 800ff9e: af00 add r7, sp, #0 800ffa0: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_SleepCallback could be implemented in the user file */ } 800ffa2: bf00 nop 800ffa4: 370c adds r7, #12 800ffa6: 46bd mov sp, r7 800ffa8: bc80 pop {r7} 800ffaa: 4770 bx lr 0800ffac : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) { 800ffac: b480 push {r7} 800ffae: b083 sub sp, #12 800ffb0: af00 add r7, sp, #0 800ffb2: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the user file */ } 800ffb4: bf00 nop 800ffb6: 370c adds r7, #12 800ffb8: 46bd mov sp, r7 800ffba: bc80 pop {r7} 800ffbc: 4770 bx lr 0800ffbe : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) { 800ffbe: b480 push {r7} 800ffc0: b083 sub sp, #12 800ffc2: af00 add r7, sp, #0 800ffc4: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_ErrorCallback could be implemented in the user file */ } 800ffc6: bf00 nop 800ffc8: 370c adds r7, #12 800ffca: 46bd mov sp, r7 800ffcc: bc80 pop {r7} 800ffce: 4770 bx lr 0800ffd0 <__NVIC_SetPriorityGrouping>: { 800ffd0: b480 push {r7} 800ffd2: b085 sub sp, #20 800ffd4: af00 add r7, sp, #0 800ffd6: 6078 str r0, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 800ffd8: 687b ldr r3, [r7, #4] 800ffda: f003 0307 and.w r3, r3, #7 800ffde: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 800ffe0: 4b0c ldr r3, [pc, #48] @ (8010014 <__NVIC_SetPriorityGrouping+0x44>) 800ffe2: 68db ldr r3, [r3, #12] 800ffe4: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 800ffe6: 68ba ldr r2, [r7, #8] 800ffe8: f64f 03ff movw r3, #63743 @ 0xf8ff 800ffec: 4013 ands r3, r2 800ffee: 60bb str r3, [r7, #8] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 800fff0: 68fb ldr r3, [r7, #12] 800fff2: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800fff4: 68bb ldr r3, [r7, #8] 800fff6: 4313 orrs r3, r2 reg_value = (reg_value | 800fff8: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 800fffc: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8010000: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8010002: 4a04 ldr r2, [pc, #16] @ (8010014 <__NVIC_SetPriorityGrouping+0x44>) 8010004: 68bb ldr r3, [r7, #8] 8010006: 60d3 str r3, [r2, #12] } 8010008: bf00 nop 801000a: 3714 adds r7, #20 801000c: 46bd mov sp, r7 801000e: bc80 pop {r7} 8010010: 4770 bx lr 8010012: bf00 nop 8010014: e000ed00 .word 0xe000ed00 08010018 <__NVIC_GetPriorityGrouping>: { 8010018: b480 push {r7} 801001a: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 801001c: 4b04 ldr r3, [pc, #16] @ (8010030 <__NVIC_GetPriorityGrouping+0x18>) 801001e: 68db ldr r3, [r3, #12] 8010020: 0a1b lsrs r3, r3, #8 8010022: f003 0307 and.w r3, r3, #7 } 8010026: 4618 mov r0, r3 8010028: 46bd mov sp, r7 801002a: bc80 pop {r7} 801002c: 4770 bx lr 801002e: bf00 nop 8010030: e000ed00 .word 0xe000ed00 08010034 <__NVIC_EnableIRQ>: { 8010034: b480 push {r7} 8010036: b083 sub sp, #12 8010038: af00 add r7, sp, #0 801003a: 4603 mov r3, r0 801003c: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 801003e: f997 3007 ldrsb.w r3, [r7, #7] 8010042: 2b00 cmp r3, #0 8010044: db0b blt.n 801005e <__NVIC_EnableIRQ+0x2a> NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8010046: 79fb ldrb r3, [r7, #7] 8010048: f003 021f and.w r2, r3, #31 801004c: 4906 ldr r1, [pc, #24] @ (8010068 <__NVIC_EnableIRQ+0x34>) 801004e: f997 3007 ldrsb.w r3, [r7, #7] 8010052: 095b lsrs r3, r3, #5 8010054: 2001 movs r0, #1 8010056: fa00 f202 lsl.w r2, r0, r2 801005a: f841 2023 str.w r2, [r1, r3, lsl #2] } 801005e: bf00 nop 8010060: 370c adds r7, #12 8010062: 46bd mov sp, r7 8010064: bc80 pop {r7} 8010066: 4770 bx lr 8010068: e000e100 .word 0xe000e100 0801006c <__NVIC_SetPriority>: { 801006c: b480 push {r7} 801006e: b083 sub sp, #12 8010070: af00 add r7, sp, #0 8010072: 4603 mov r3, r0 8010074: 6039 str r1, [r7, #0] 8010076: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8010078: f997 3007 ldrsb.w r3, [r7, #7] 801007c: 2b00 cmp r3, #0 801007e: db0a blt.n 8010096 <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8010080: 683b ldr r3, [r7, #0] 8010082: b2da uxtb r2, r3 8010084: 490c ldr r1, [pc, #48] @ (80100b8 <__NVIC_SetPriority+0x4c>) 8010086: f997 3007 ldrsb.w r3, [r7, #7] 801008a: 0112 lsls r2, r2, #4 801008c: b2d2 uxtb r2, r2 801008e: 440b add r3, r1 8010090: f883 2300 strb.w r2, [r3, #768] @ 0x300 } 8010094: e00a b.n 80100ac <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8010096: 683b ldr r3, [r7, #0] 8010098: b2da uxtb r2, r3 801009a: 4908 ldr r1, [pc, #32] @ (80100bc <__NVIC_SetPriority+0x50>) 801009c: 79fb ldrb r3, [r7, #7] 801009e: f003 030f and.w r3, r3, #15 80100a2: 3b04 subs r3, #4 80100a4: 0112 lsls r2, r2, #4 80100a6: b2d2 uxtb r2, r2 80100a8: 440b add r3, r1 80100aa: 761a strb r2, [r3, #24] } 80100ac: bf00 nop 80100ae: 370c adds r7, #12 80100b0: 46bd mov sp, r7 80100b2: bc80 pop {r7} 80100b4: 4770 bx lr 80100b6: bf00 nop 80100b8: e000e100 .word 0xe000e100 80100bc: e000ed00 .word 0xe000ed00 080100c0 : { 80100c0: b480 push {r7} 80100c2: b089 sub sp, #36 @ 0x24 80100c4: af00 add r7, sp, #0 80100c6: 60f8 str r0, [r7, #12] 80100c8: 60b9 str r1, [r7, #8] 80100ca: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80100cc: 68fb ldr r3, [r7, #12] 80100ce: f003 0307 and.w r3, r3, #7 80100d2: 61fb str r3, [r7, #28] PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80100d4: 69fb ldr r3, [r7, #28] 80100d6: f1c3 0307 rsb r3, r3, #7 80100da: 2b04 cmp r3, #4 80100dc: bf28 it cs 80100de: 2304 movcs r3, #4 80100e0: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80100e2: 69fb ldr r3, [r7, #28] 80100e4: 3304 adds r3, #4 80100e6: 2b06 cmp r3, #6 80100e8: d902 bls.n 80100f0 80100ea: 69fb ldr r3, [r7, #28] 80100ec: 3b03 subs r3, #3 80100ee: e000 b.n 80100f2 80100f0: 2300 movs r3, #0 80100f2: 617b str r3, [r7, #20] ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80100f4: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80100f8: 69bb ldr r3, [r7, #24] 80100fa: fa02 f303 lsl.w r3, r2, r3 80100fe: 43da mvns r2, r3 8010100: 68bb ldr r3, [r7, #8] 8010102: 401a ands r2, r3 8010104: 697b ldr r3, [r7, #20] 8010106: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8010108: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 801010c: 697b ldr r3, [r7, #20] 801010e: fa01 f303 lsl.w r3, r1, r3 8010112: 43d9 mvns r1, r3 8010114: 687b ldr r3, [r7, #4] 8010116: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8010118: 4313 orrs r3, r2 } 801011a: 4618 mov r0, r3 801011c: 3724 adds r7, #36 @ 0x24 801011e: 46bd mov sp, r7 8010120: bc80 pop {r7} 8010122: 4770 bx lr 08010124 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8010124: b580 push {r7, lr} 8010126: b082 sub sp, #8 8010128: af00 add r7, sp, #0 801012a: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 801012c: 687b ldr r3, [r7, #4] 801012e: 3b01 subs r3, #1 8010130: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8010134: d301 bcc.n 801013a { return (1UL); /* Reload value impossible */ 8010136: 2301 movs r3, #1 8010138: e00f b.n 801015a } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 801013a: 4a0a ldr r2, [pc, #40] @ (8010164 ) 801013c: 687b ldr r3, [r7, #4] 801013e: 3b01 subs r3, #1 8010140: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8010142: 210f movs r1, #15 8010144: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8010148: f7ff ff90 bl 801006c <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 801014c: 4b05 ldr r3, [pc, #20] @ (8010164 ) 801014e: 2200 movs r2, #0 8010150: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8010152: 4b04 ldr r3, [pc, #16] @ (8010164 ) 8010154: 2207 movs r2, #7 8010156: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8010158: 2300 movs r3, #0 } 801015a: 4618 mov r0, r3 801015c: 3708 adds r7, #8 801015e: 46bd mov sp, r7 8010160: bd80 pop {r7, pc} 8010162: bf00 nop 8010164: e000e010 .word 0xe000e010 08010168 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8010168: b580 push {r7, lr} 801016a: b082 sub sp, #8 801016c: af00 add r7, sp, #0 801016e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8010170: 6878 ldr r0, [r7, #4] 8010172: f7ff ff2d bl 800ffd0 <__NVIC_SetPriorityGrouping> } 8010176: bf00 nop 8010178: 3708 adds r7, #8 801017a: 46bd mov sp, r7 801017c: bd80 pop {r7, pc} 0801017e : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 801017e: b580 push {r7, lr} 8010180: b086 sub sp, #24 8010182: af00 add r7, sp, #0 8010184: 4603 mov r3, r0 8010186: 60b9 str r1, [r7, #8] 8010188: 607a str r2, [r7, #4] 801018a: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 801018c: 2300 movs r3, #0 801018e: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8010190: f7ff ff42 bl 8010018 <__NVIC_GetPriorityGrouping> 8010194: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8010196: 687a ldr r2, [r7, #4] 8010198: 68b9 ldr r1, [r7, #8] 801019a: 6978 ldr r0, [r7, #20] 801019c: f7ff ff90 bl 80100c0 80101a0: 4602 mov r2, r0 80101a2: f997 300f ldrsb.w r3, [r7, #15] 80101a6: 4611 mov r1, r2 80101a8: 4618 mov r0, r3 80101aa: f7ff ff5f bl 801006c <__NVIC_SetPriority> } 80101ae: bf00 nop 80101b0: 3718 adds r7, #24 80101b2: 46bd mov sp, r7 80101b4: bd80 pop {r7, pc} 080101b6 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80101b6: b580 push {r7, lr} 80101b8: b082 sub sp, #8 80101ba: af00 add r7, sp, #0 80101bc: 4603 mov r3, r0 80101be: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80101c0: f997 3007 ldrsb.w r3, [r7, #7] 80101c4: 4618 mov r0, r3 80101c6: f7ff ff35 bl 8010034 <__NVIC_EnableIRQ> } 80101ca: bf00 nop 80101cc: 3708 adds r7, #8 80101ce: 46bd mov sp, r7 80101d0: bd80 pop {r7, pc} 080101d2 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 80101d2: b580 push {r7, lr} 80101d4: b082 sub sp, #8 80101d6: af00 add r7, sp, #0 80101d8: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 80101da: 6878 ldr r0, [r7, #4] 80101dc: f7ff ffa2 bl 8010124 80101e0: 4603 mov r3, r0 } 80101e2: 4618 mov r0, r3 80101e4: 3708 adds r7, #8 80101e6: 46bd mov sp, r7 80101e8: bd80 pop {r7, pc} 080101ea : * parameters in the CRC_InitTypeDef and create the associated handle. * @param hcrc CRC handle * @retval HAL status */ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) { 80101ea: b580 push {r7, lr} 80101ec: b082 sub sp, #8 80101ee: af00 add r7, sp, #0 80101f0: 6078 str r0, [r7, #4] /* Check the CRC handle allocation */ if (hcrc == NULL) 80101f2: 687b ldr r3, [r7, #4] 80101f4: 2b00 cmp r3, #0 80101f6: d101 bne.n 80101fc { return HAL_ERROR; 80101f8: 2301 movs r3, #1 80101fa: e00e b.n 801021a } /* Check the parameters */ assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); if (hcrc->State == HAL_CRC_STATE_RESET) 80101fc: 687b ldr r3, [r7, #4] 80101fe: 795b ldrb r3, [r3, #5] 8010200: b2db uxtb r3, r3 8010202: 2b00 cmp r3, #0 8010204: d105 bne.n 8010212 { /* Allocate lock resource and initialize it */ hcrc->Lock = HAL_UNLOCKED; 8010206: 687b ldr r3, [r7, #4] 8010208: 2200 movs r2, #0 801020a: 711a strb r2, [r3, #4] /* Init the low level hardware */ HAL_CRC_MspInit(hcrc); 801020c: 6878 ldr r0, [r7, #4] 801020e: f7fb f825 bl 800b25c } /* Change CRC peripheral state */ hcrc->State = HAL_CRC_STATE_READY; 8010212: 687b ldr r3, [r7, #4] 8010214: 2201 movs r2, #1 8010216: 715a strb r2, [r3, #5] /* Return function status */ return HAL_OK; 8010218: 2300 movs r3, #0 } 801021a: 4618 mov r0, r3 801021c: 3708 adds r7, #8 801021e: 46bd mov sp, r7 8010220: bd80 pop {r7, pc} 08010222 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 8010222: b480 push {r7} 8010224: b085 sub sp, #20 8010226: af00 add r7, sp, #0 8010228: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 801022a: 2300 movs r3, #0 801022c: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) 801022e: 687b ldr r3, [r7, #4] 8010230: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8010234: b2db uxtb r3, r3 8010236: 2b02 cmp r3, #2 8010238: d008 beq.n 801024c { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 801023a: 687b ldr r3, [r7, #4] 801023c: 2204 movs r2, #4 801023e: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8010240: 687b ldr r3, [r7, #4] 8010242: 2200 movs r2, #0 8010244: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 8010248: 2301 movs r3, #1 801024a: e020 b.n 801028e } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 801024c: 687b ldr r3, [r7, #4] 801024e: 681b ldr r3, [r3, #0] 8010250: 681a ldr r2, [r3, #0] 8010252: 687b ldr r3, [r7, #4] 8010254: 681b ldr r3, [r3, #0] 8010256: f022 020e bic.w r2, r2, #14 801025a: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 801025c: 687b ldr r3, [r7, #4] 801025e: 681b ldr r3, [r3, #0] 8010260: 681a ldr r2, [r3, #0] 8010262: 687b ldr r3, [r7, #4] 8010264: 681b ldr r3, [r3, #0] 8010266: f022 0201 bic.w r2, r2, #1 801026a: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 801026c: 687b ldr r3, [r7, #4] 801026e: 6c1a ldr r2, [r3, #64] @ 0x40 8010270: 687b ldr r3, [r7, #4] 8010272: 6bdb ldr r3, [r3, #60] @ 0x3c 8010274: 2101 movs r1, #1 8010276: fa01 f202 lsl.w r2, r1, r2 801027a: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 801027c: 687b ldr r3, [r7, #4] 801027e: 2201 movs r2, #1 8010280: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8010284: 687b ldr r3, [r7, #4] 8010286: 2200 movs r2, #0 8010288: f883 2020 strb.w r2, [r3, #32] return status; 801028c: 7bfb ldrb r3, [r7, #15] } 801028e: 4618 mov r0, r3 8010290: 3714 adds r7, #20 8010292: 46bd mov sp, r7 8010294: bc80 pop {r7} 8010296: 4770 bx lr 08010298 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 8010298: b580 push {r7, lr} 801029a: b084 sub sp, #16 801029c: af00 add r7, sp, #0 801029e: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80102a0: 2300 movs r3, #0 80102a2: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) 80102a4: 687b ldr r3, [r7, #4] 80102a6: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 80102aa: b2db uxtb r3, r3 80102ac: 2b02 cmp r3, #2 80102ae: d005 beq.n 80102bc { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80102b0: 687b ldr r3, [r7, #4] 80102b2: 2204 movs r2, #4 80102b4: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; 80102b6: 2301 movs r3, #1 80102b8: 73fb strb r3, [r7, #15] 80102ba: e0d6 b.n 801046a } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80102bc: 687b ldr r3, [r7, #4] 80102be: 681b ldr r3, [r3, #0] 80102c0: 681a ldr r2, [r3, #0] 80102c2: 687b ldr r3, [r7, #4] 80102c4: 681b ldr r3, [r3, #0] 80102c6: f022 020e bic.w r2, r2, #14 80102ca: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80102cc: 687b ldr r3, [r7, #4] 80102ce: 681b ldr r3, [r3, #0] 80102d0: 681a ldr r2, [r3, #0] 80102d2: 687b ldr r3, [r7, #4] 80102d4: 681b ldr r3, [r3, #0] 80102d6: f022 0201 bic.w r2, r2, #1 80102da: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80102dc: 687b ldr r3, [r7, #4] 80102de: 681b ldr r3, [r3, #0] 80102e0: 461a mov r2, r3 80102e2: 4b64 ldr r3, [pc, #400] @ (8010474 ) 80102e4: 429a cmp r2, r3 80102e6: d958 bls.n 801039a 80102e8: 687b ldr r3, [r7, #4] 80102ea: 681b ldr r3, [r3, #0] 80102ec: 4a62 ldr r2, [pc, #392] @ (8010478 ) 80102ee: 4293 cmp r3, r2 80102f0: d04f beq.n 8010392 80102f2: 687b ldr r3, [r7, #4] 80102f4: 681b ldr r3, [r3, #0] 80102f6: 4a61 ldr r2, [pc, #388] @ (801047c ) 80102f8: 4293 cmp r3, r2 80102fa: d048 beq.n 801038e 80102fc: 687b ldr r3, [r7, #4] 80102fe: 681b ldr r3, [r3, #0] 8010300: 4a5f ldr r2, [pc, #380] @ (8010480 ) 8010302: 4293 cmp r3, r2 8010304: d040 beq.n 8010388 8010306: 687b ldr r3, [r7, #4] 8010308: 681b ldr r3, [r3, #0] 801030a: 4a5e ldr r2, [pc, #376] @ (8010484 ) 801030c: 4293 cmp r3, r2 801030e: d038 beq.n 8010382 8010310: 687b ldr r3, [r7, #4] 8010312: 681b ldr r3, [r3, #0] 8010314: 4a5c ldr r2, [pc, #368] @ (8010488 ) 8010316: 4293 cmp r3, r2 8010318: d030 beq.n 801037c 801031a: 687b ldr r3, [r7, #4] 801031c: 681b ldr r3, [r3, #0] 801031e: 4a5b ldr r2, [pc, #364] @ (801048c ) 8010320: 4293 cmp r3, r2 8010322: d028 beq.n 8010376 8010324: 687b ldr r3, [r7, #4] 8010326: 681b ldr r3, [r3, #0] 8010328: 4a52 ldr r2, [pc, #328] @ (8010474 ) 801032a: 4293 cmp r3, r2 801032c: d020 beq.n 8010370 801032e: 687b ldr r3, [r7, #4] 8010330: 681b ldr r3, [r3, #0] 8010332: 4a57 ldr r2, [pc, #348] @ (8010490 ) 8010334: 4293 cmp r3, r2 8010336: d019 beq.n 801036c 8010338: 687b ldr r3, [r7, #4] 801033a: 681b ldr r3, [r3, #0] 801033c: 4a55 ldr r2, [pc, #340] @ (8010494 ) 801033e: 4293 cmp r3, r2 8010340: d012 beq.n 8010368 8010342: 687b ldr r3, [r7, #4] 8010344: 681b ldr r3, [r3, #0] 8010346: 4a54 ldr r2, [pc, #336] @ (8010498 ) 8010348: 4293 cmp r3, r2 801034a: d00a beq.n 8010362 801034c: 687b ldr r3, [r7, #4] 801034e: 681b ldr r3, [r3, #0] 8010350: 4a52 ldr r2, [pc, #328] @ (801049c ) 8010352: 4293 cmp r3, r2 8010354: d102 bne.n 801035c 8010356: f44f 5380 mov.w r3, #4096 @ 0x1000 801035a: e01b b.n 8010394 801035c: f44f 3380 mov.w r3, #65536 @ 0x10000 8010360: e018 b.n 8010394 8010362: f44f 7380 mov.w r3, #256 @ 0x100 8010366: e015 b.n 8010394 8010368: 2310 movs r3, #16 801036a: e013 b.n 8010394 801036c: 2301 movs r3, #1 801036e: e011 b.n 8010394 8010370: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8010374: e00e b.n 8010394 8010376: f44f 1380 mov.w r3, #1048576 @ 0x100000 801037a: e00b b.n 8010394 801037c: f44f 3380 mov.w r3, #65536 @ 0x10000 8010380: e008 b.n 8010394 8010382: f44f 5380 mov.w r3, #4096 @ 0x1000 8010386: e005 b.n 8010394 8010388: f44f 7380 mov.w r3, #256 @ 0x100 801038c: e002 b.n 8010394 801038e: 2310 movs r3, #16 8010390: e000 b.n 8010394 8010392: 2301 movs r3, #1 8010394: 4a42 ldr r2, [pc, #264] @ (80104a0 ) 8010396: 6053 str r3, [r2, #4] 8010398: e057 b.n 801044a 801039a: 687b ldr r3, [r7, #4] 801039c: 681b ldr r3, [r3, #0] 801039e: 4a36 ldr r2, [pc, #216] @ (8010478 ) 80103a0: 4293 cmp r3, r2 80103a2: d04f beq.n 8010444 80103a4: 687b ldr r3, [r7, #4] 80103a6: 681b ldr r3, [r3, #0] 80103a8: 4a34 ldr r2, [pc, #208] @ (801047c ) 80103aa: 4293 cmp r3, r2 80103ac: d048 beq.n 8010440 80103ae: 687b ldr r3, [r7, #4] 80103b0: 681b ldr r3, [r3, #0] 80103b2: 4a33 ldr r2, [pc, #204] @ (8010480 ) 80103b4: 4293 cmp r3, r2 80103b6: d040 beq.n 801043a 80103b8: 687b ldr r3, [r7, #4] 80103ba: 681b ldr r3, [r3, #0] 80103bc: 4a31 ldr r2, [pc, #196] @ (8010484 ) 80103be: 4293 cmp r3, r2 80103c0: d038 beq.n 8010434 80103c2: 687b ldr r3, [r7, #4] 80103c4: 681b ldr r3, [r3, #0] 80103c6: 4a30 ldr r2, [pc, #192] @ (8010488 ) 80103c8: 4293 cmp r3, r2 80103ca: d030 beq.n 801042e 80103cc: 687b ldr r3, [r7, #4] 80103ce: 681b ldr r3, [r3, #0] 80103d0: 4a2e ldr r2, [pc, #184] @ (801048c ) 80103d2: 4293 cmp r3, r2 80103d4: d028 beq.n 8010428 80103d6: 687b ldr r3, [r7, #4] 80103d8: 681b ldr r3, [r3, #0] 80103da: 4a26 ldr r2, [pc, #152] @ (8010474 ) 80103dc: 4293 cmp r3, r2 80103de: d020 beq.n 8010422 80103e0: 687b ldr r3, [r7, #4] 80103e2: 681b ldr r3, [r3, #0] 80103e4: 4a2a ldr r2, [pc, #168] @ (8010490 ) 80103e6: 4293 cmp r3, r2 80103e8: d019 beq.n 801041e 80103ea: 687b ldr r3, [r7, #4] 80103ec: 681b ldr r3, [r3, #0] 80103ee: 4a29 ldr r2, [pc, #164] @ (8010494 ) 80103f0: 4293 cmp r3, r2 80103f2: d012 beq.n 801041a 80103f4: 687b ldr r3, [r7, #4] 80103f6: 681b ldr r3, [r3, #0] 80103f8: 4a27 ldr r2, [pc, #156] @ (8010498 ) 80103fa: 4293 cmp r3, r2 80103fc: d00a beq.n 8010414 80103fe: 687b ldr r3, [r7, #4] 8010400: 681b ldr r3, [r3, #0] 8010402: 4a26 ldr r2, [pc, #152] @ (801049c ) 8010404: 4293 cmp r3, r2 8010406: d102 bne.n 801040e 8010408: f44f 5380 mov.w r3, #4096 @ 0x1000 801040c: e01b b.n 8010446 801040e: f44f 3380 mov.w r3, #65536 @ 0x10000 8010412: e018 b.n 8010446 8010414: f44f 7380 mov.w r3, #256 @ 0x100 8010418: e015 b.n 8010446 801041a: 2310 movs r3, #16 801041c: e013 b.n 8010446 801041e: 2301 movs r3, #1 8010420: e011 b.n 8010446 8010422: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8010426: e00e b.n 8010446 8010428: f44f 1380 mov.w r3, #1048576 @ 0x100000 801042c: e00b b.n 8010446 801042e: f44f 3380 mov.w r3, #65536 @ 0x10000 8010432: e008 b.n 8010446 8010434: f44f 5380 mov.w r3, #4096 @ 0x1000 8010438: e005 b.n 8010446 801043a: f44f 7380 mov.w r3, #256 @ 0x100 801043e: e002 b.n 8010446 8010440: 2310 movs r3, #16 8010442: e000 b.n 8010446 8010444: 2301 movs r3, #1 8010446: 4a17 ldr r2, [pc, #92] @ (80104a4 ) 8010448: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 801044a: 687b ldr r3, [r7, #4] 801044c: 2201 movs r2, #1 801044e: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8010452: 687b ldr r3, [r7, #4] 8010454: 2200 movs r2, #0 8010456: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 801045a: 687b ldr r3, [r7, #4] 801045c: 6b5b ldr r3, [r3, #52] @ 0x34 801045e: 2b00 cmp r3, #0 8010460: d003 beq.n 801046a { hdma->XferAbortCallback(hdma); 8010462: 687b ldr r3, [r7, #4] 8010464: 6b5b ldr r3, [r3, #52] @ 0x34 8010466: 6878 ldr r0, [r7, #4] 8010468: 4798 blx r3 } } return status; 801046a: 7bfb ldrb r3, [r7, #15] } 801046c: 4618 mov r0, r3 801046e: 3710 adds r7, #16 8010470: 46bd mov sp, r7 8010472: bd80 pop {r7, pc} 8010474: 40020080 .word 0x40020080 8010478: 40020008 .word 0x40020008 801047c: 4002001c .word 0x4002001c 8010480: 40020030 .word 0x40020030 8010484: 40020044 .word 0x40020044 8010488: 40020058 .word 0x40020058 801048c: 4002006c .word 0x4002006c 8010490: 40020408 .word 0x40020408 8010494: 4002041c .word 0x4002041c 8010498: 40020430 .word 0x40020430 801049c: 40020444 .word 0x40020444 80104a0: 40020400 .word 0x40020400 80104a4: 40020000 .word 0x40020000 080104a8 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80104a8: b480 push {r7} 80104aa: b08b sub sp, #44 @ 0x2c 80104ac: af00 add r7, sp, #0 80104ae: 6078 str r0, [r7, #4] 80104b0: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 80104b2: 2300 movs r3, #0 80104b4: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 80104b6: 2300 movs r3, #0 80104b8: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80104ba: e169 b.n 8010790 { /* Get the IO position */ ioposition = (0x01uL << position); 80104bc: 2201 movs r2, #1 80104be: 6a7b ldr r3, [r7, #36] @ 0x24 80104c0: fa02 f303 lsl.w r3, r2, r3 80104c4: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80104c6: 683b ldr r3, [r7, #0] 80104c8: 681b ldr r3, [r3, #0] 80104ca: 69fa ldr r2, [r7, #28] 80104cc: 4013 ands r3, r2 80104ce: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 80104d0: 69ba ldr r2, [r7, #24] 80104d2: 69fb ldr r3, [r7, #28] 80104d4: 429a cmp r2, r3 80104d6: f040 8158 bne.w 801078a { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 80104da: 683b ldr r3, [r7, #0] 80104dc: 685b ldr r3, [r3, #4] 80104de: 4a9a ldr r2, [pc, #616] @ (8010748 ) 80104e0: 4293 cmp r3, r2 80104e2: d05e beq.n 80105a2 80104e4: 4a98 ldr r2, [pc, #608] @ (8010748 ) 80104e6: 4293 cmp r3, r2 80104e8: d875 bhi.n 80105d6 80104ea: 4a98 ldr r2, [pc, #608] @ (801074c ) 80104ec: 4293 cmp r3, r2 80104ee: d058 beq.n 80105a2 80104f0: 4a96 ldr r2, [pc, #600] @ (801074c ) 80104f2: 4293 cmp r3, r2 80104f4: d86f bhi.n 80105d6 80104f6: 4a96 ldr r2, [pc, #600] @ (8010750 ) 80104f8: 4293 cmp r3, r2 80104fa: d052 beq.n 80105a2 80104fc: 4a94 ldr r2, [pc, #592] @ (8010750 ) 80104fe: 4293 cmp r3, r2 8010500: d869 bhi.n 80105d6 8010502: 4a94 ldr r2, [pc, #592] @ (8010754 ) 8010504: 4293 cmp r3, r2 8010506: d04c beq.n 80105a2 8010508: 4a92 ldr r2, [pc, #584] @ (8010754 ) 801050a: 4293 cmp r3, r2 801050c: d863 bhi.n 80105d6 801050e: 4a92 ldr r2, [pc, #584] @ (8010758 ) 8010510: 4293 cmp r3, r2 8010512: d046 beq.n 80105a2 8010514: 4a90 ldr r2, [pc, #576] @ (8010758 ) 8010516: 4293 cmp r3, r2 8010518: d85d bhi.n 80105d6 801051a: 2b12 cmp r3, #18 801051c: d82a bhi.n 8010574 801051e: 2b12 cmp r3, #18 8010520: d859 bhi.n 80105d6 8010522: a201 add r2, pc, #4 @ (adr r2, 8010528 ) 8010524: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8010528: 080105a3 .word 0x080105a3 801052c: 0801057d .word 0x0801057d 8010530: 0801058f .word 0x0801058f 8010534: 080105d1 .word 0x080105d1 8010538: 080105d7 .word 0x080105d7 801053c: 080105d7 .word 0x080105d7 8010540: 080105d7 .word 0x080105d7 8010544: 080105d7 .word 0x080105d7 8010548: 080105d7 .word 0x080105d7 801054c: 080105d7 .word 0x080105d7 8010550: 080105d7 .word 0x080105d7 8010554: 080105d7 .word 0x080105d7 8010558: 080105d7 .word 0x080105d7 801055c: 080105d7 .word 0x080105d7 8010560: 080105d7 .word 0x080105d7 8010564: 080105d7 .word 0x080105d7 8010568: 080105d7 .word 0x080105d7 801056c: 08010585 .word 0x08010585 8010570: 08010599 .word 0x08010599 8010574: 4a79 ldr r2, [pc, #484] @ (801075c ) 8010576: 4293 cmp r3, r2 8010578: d013 beq.n 80105a2 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 801057a: e02c b.n 80105d6 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 801057c: 683b ldr r3, [r7, #0] 801057e: 68db ldr r3, [r3, #12] 8010580: 623b str r3, [r7, #32] break; 8010582: e029 b.n 80105d8 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8010584: 683b ldr r3, [r7, #0] 8010586: 68db ldr r3, [r3, #12] 8010588: 3304 adds r3, #4 801058a: 623b str r3, [r7, #32] break; 801058c: e024 b.n 80105d8 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 801058e: 683b ldr r3, [r7, #0] 8010590: 68db ldr r3, [r3, #12] 8010592: 3308 adds r3, #8 8010594: 623b str r3, [r7, #32] break; 8010596: e01f b.n 80105d8 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8010598: 683b ldr r3, [r7, #0] 801059a: 68db ldr r3, [r3, #12] 801059c: 330c adds r3, #12 801059e: 623b str r3, [r7, #32] break; 80105a0: e01a b.n 80105d8 if (GPIO_Init->Pull == GPIO_NOPULL) 80105a2: 683b ldr r3, [r7, #0] 80105a4: 689b ldr r3, [r3, #8] 80105a6: 2b00 cmp r3, #0 80105a8: d102 bne.n 80105b0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80105aa: 2304 movs r3, #4 80105ac: 623b str r3, [r7, #32] break; 80105ae: e013 b.n 80105d8 else if (GPIO_Init->Pull == GPIO_PULLUP) 80105b0: 683b ldr r3, [r7, #0] 80105b2: 689b ldr r3, [r3, #8] 80105b4: 2b01 cmp r3, #1 80105b6: d105 bne.n 80105c4 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80105b8: 2308 movs r3, #8 80105ba: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 80105bc: 687b ldr r3, [r7, #4] 80105be: 69fa ldr r2, [r7, #28] 80105c0: 611a str r2, [r3, #16] break; 80105c2: e009 b.n 80105d8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80105c4: 2308 movs r3, #8 80105c6: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 80105c8: 687b ldr r3, [r7, #4] 80105ca: 69fa ldr r2, [r7, #28] 80105cc: 615a str r2, [r3, #20] break; 80105ce: e003 b.n 80105d8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80105d0: 2300 movs r3, #0 80105d2: 623b str r3, [r7, #32] break; 80105d4: e000 b.n 80105d8 break; 80105d6: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80105d8: 69bb ldr r3, [r7, #24] 80105da: 2bff cmp r3, #255 @ 0xff 80105dc: d801 bhi.n 80105e2 80105de: 687b ldr r3, [r7, #4] 80105e0: e001 b.n 80105e6 80105e2: 687b ldr r3, [r7, #4] 80105e4: 3304 adds r3, #4 80105e6: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 80105e8: 69bb ldr r3, [r7, #24] 80105ea: 2bff cmp r3, #255 @ 0xff 80105ec: d802 bhi.n 80105f4 80105ee: 6a7b ldr r3, [r7, #36] @ 0x24 80105f0: 009b lsls r3, r3, #2 80105f2: e002 b.n 80105fa 80105f4: 6a7b ldr r3, [r7, #36] @ 0x24 80105f6: 3b08 subs r3, #8 80105f8: 009b lsls r3, r3, #2 80105fa: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80105fc: 697b ldr r3, [r7, #20] 80105fe: 681a ldr r2, [r3, #0] 8010600: 210f movs r1, #15 8010602: 693b ldr r3, [r7, #16] 8010604: fa01 f303 lsl.w r3, r1, r3 8010608: 43db mvns r3, r3 801060a: 401a ands r2, r3 801060c: 6a39 ldr r1, [r7, #32] 801060e: 693b ldr r3, [r7, #16] 8010610: fa01 f303 lsl.w r3, r1, r3 8010614: 431a orrs r2, r3 8010616: 697b ldr r3, [r7, #20] 8010618: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 801061a: 683b ldr r3, [r7, #0] 801061c: 685b ldr r3, [r3, #4] 801061e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010622: 2b00 cmp r3, #0 8010624: f000 80b1 beq.w 801078a { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8010628: 4b4d ldr r3, [pc, #308] @ (8010760 ) 801062a: 699b ldr r3, [r3, #24] 801062c: 4a4c ldr r2, [pc, #304] @ (8010760 ) 801062e: f043 0301 orr.w r3, r3, #1 8010632: 6193 str r3, [r2, #24] 8010634: 4b4a ldr r3, [pc, #296] @ (8010760 ) 8010636: 699b ldr r3, [r3, #24] 8010638: f003 0301 and.w r3, r3, #1 801063c: 60bb str r3, [r7, #8] 801063e: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8010640: 4a48 ldr r2, [pc, #288] @ (8010764 ) 8010642: 6a7b ldr r3, [r7, #36] @ 0x24 8010644: 089b lsrs r3, r3, #2 8010646: 3302 adds r3, #2 8010648: f852 3023 ldr.w r3, [r2, r3, lsl #2] 801064c: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 801064e: 6a7b ldr r3, [r7, #36] @ 0x24 8010650: f003 0303 and.w r3, r3, #3 8010654: 009b lsls r3, r3, #2 8010656: 220f movs r2, #15 8010658: fa02 f303 lsl.w r3, r2, r3 801065c: 43db mvns r3, r3 801065e: 68fa ldr r2, [r7, #12] 8010660: 4013 ands r3, r2 8010662: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8010664: 687b ldr r3, [r7, #4] 8010666: 4a40 ldr r2, [pc, #256] @ (8010768 ) 8010668: 4293 cmp r3, r2 801066a: d013 beq.n 8010694 801066c: 687b ldr r3, [r7, #4] 801066e: 4a3f ldr r2, [pc, #252] @ (801076c ) 8010670: 4293 cmp r3, r2 8010672: d00d beq.n 8010690 8010674: 687b ldr r3, [r7, #4] 8010676: 4a3e ldr r2, [pc, #248] @ (8010770 ) 8010678: 4293 cmp r3, r2 801067a: d007 beq.n 801068c 801067c: 687b ldr r3, [r7, #4] 801067e: 4a3d ldr r2, [pc, #244] @ (8010774 ) 8010680: 4293 cmp r3, r2 8010682: d101 bne.n 8010688 8010684: 2303 movs r3, #3 8010686: e006 b.n 8010696 8010688: 2304 movs r3, #4 801068a: e004 b.n 8010696 801068c: 2302 movs r3, #2 801068e: e002 b.n 8010696 8010690: 2301 movs r3, #1 8010692: e000 b.n 8010696 8010694: 2300 movs r3, #0 8010696: 6a7a ldr r2, [r7, #36] @ 0x24 8010698: f002 0203 and.w r2, r2, #3 801069c: 0092 lsls r2, r2, #2 801069e: 4093 lsls r3, r2 80106a0: 68fa ldr r2, [r7, #12] 80106a2: 4313 orrs r3, r2 80106a4: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 80106a6: 492f ldr r1, [pc, #188] @ (8010764 ) 80106a8: 6a7b ldr r3, [r7, #36] @ 0x24 80106aa: 089b lsrs r3, r3, #2 80106ac: 3302 adds r3, #2 80106ae: 68fa ldr r2, [r7, #12] 80106b0: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 80106b4: 683b ldr r3, [r7, #0] 80106b6: 685b ldr r3, [r3, #4] 80106b8: f403 1380 and.w r3, r3, #1048576 @ 0x100000 80106bc: 2b00 cmp r3, #0 80106be: d006 beq.n 80106ce { SET_BIT(EXTI->RTSR, iocurrent); 80106c0: 4b2d ldr r3, [pc, #180] @ (8010778 ) 80106c2: 689a ldr r2, [r3, #8] 80106c4: 492c ldr r1, [pc, #176] @ (8010778 ) 80106c6: 69bb ldr r3, [r7, #24] 80106c8: 4313 orrs r3, r2 80106ca: 608b str r3, [r1, #8] 80106cc: e006 b.n 80106dc } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 80106ce: 4b2a ldr r3, [pc, #168] @ (8010778 ) 80106d0: 689a ldr r2, [r3, #8] 80106d2: 69bb ldr r3, [r7, #24] 80106d4: 43db mvns r3, r3 80106d6: 4928 ldr r1, [pc, #160] @ (8010778 ) 80106d8: 4013 ands r3, r2 80106da: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 80106dc: 683b ldr r3, [r7, #0] 80106de: 685b ldr r3, [r3, #4] 80106e0: f403 1300 and.w r3, r3, #2097152 @ 0x200000 80106e4: 2b00 cmp r3, #0 80106e6: d006 beq.n 80106f6 { SET_BIT(EXTI->FTSR, iocurrent); 80106e8: 4b23 ldr r3, [pc, #140] @ (8010778 ) 80106ea: 68da ldr r2, [r3, #12] 80106ec: 4922 ldr r1, [pc, #136] @ (8010778 ) 80106ee: 69bb ldr r3, [r7, #24] 80106f0: 4313 orrs r3, r2 80106f2: 60cb str r3, [r1, #12] 80106f4: e006 b.n 8010704 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 80106f6: 4b20 ldr r3, [pc, #128] @ (8010778 ) 80106f8: 68da ldr r2, [r3, #12] 80106fa: 69bb ldr r3, [r7, #24] 80106fc: 43db mvns r3, r3 80106fe: 491e ldr r1, [pc, #120] @ (8010778 ) 8010700: 4013 ands r3, r2 8010702: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8010704: 683b ldr r3, [r7, #0] 8010706: 685b ldr r3, [r3, #4] 8010708: f403 3300 and.w r3, r3, #131072 @ 0x20000 801070c: 2b00 cmp r3, #0 801070e: d006 beq.n 801071e { SET_BIT(EXTI->EMR, iocurrent); 8010710: 4b19 ldr r3, [pc, #100] @ (8010778 ) 8010712: 685a ldr r2, [r3, #4] 8010714: 4918 ldr r1, [pc, #96] @ (8010778 ) 8010716: 69bb ldr r3, [r7, #24] 8010718: 4313 orrs r3, r2 801071a: 604b str r3, [r1, #4] 801071c: e006 b.n 801072c } else { CLEAR_BIT(EXTI->EMR, iocurrent); 801071e: 4b16 ldr r3, [pc, #88] @ (8010778 ) 8010720: 685a ldr r2, [r3, #4] 8010722: 69bb ldr r3, [r7, #24] 8010724: 43db mvns r3, r3 8010726: 4914 ldr r1, [pc, #80] @ (8010778 ) 8010728: 4013 ands r3, r2 801072a: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 801072c: 683b ldr r3, [r7, #0] 801072e: 685b ldr r3, [r3, #4] 8010730: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010734: 2b00 cmp r3, #0 8010736: d021 beq.n 801077c { SET_BIT(EXTI->IMR, iocurrent); 8010738: 4b0f ldr r3, [pc, #60] @ (8010778 ) 801073a: 681a ldr r2, [r3, #0] 801073c: 490e ldr r1, [pc, #56] @ (8010778 ) 801073e: 69bb ldr r3, [r7, #24] 8010740: 4313 orrs r3, r2 8010742: 600b str r3, [r1, #0] 8010744: e021 b.n 801078a 8010746: bf00 nop 8010748: 10320000 .word 0x10320000 801074c: 10310000 .word 0x10310000 8010750: 10220000 .word 0x10220000 8010754: 10210000 .word 0x10210000 8010758: 10120000 .word 0x10120000 801075c: 10110000 .word 0x10110000 8010760: 40021000 .word 0x40021000 8010764: 40010000 .word 0x40010000 8010768: 40010800 .word 0x40010800 801076c: 40010c00 .word 0x40010c00 8010770: 40011000 .word 0x40011000 8010774: 40011400 .word 0x40011400 8010778: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 801077c: 4b0b ldr r3, [pc, #44] @ (80107ac ) 801077e: 681a ldr r2, [r3, #0] 8010780: 69bb ldr r3, [r7, #24] 8010782: 43db mvns r3, r3 8010784: 4909 ldr r1, [pc, #36] @ (80107ac ) 8010786: 4013 ands r3, r2 8010788: 600b str r3, [r1, #0] } } } position++; 801078a: 6a7b ldr r3, [r7, #36] @ 0x24 801078c: 3301 adds r3, #1 801078e: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 8010790: 683b ldr r3, [r7, #0] 8010792: 681a ldr r2, [r3, #0] 8010794: 6a7b ldr r3, [r7, #36] @ 0x24 8010796: fa22 f303 lsr.w r3, r2, r3 801079a: 2b00 cmp r3, #0 801079c: f47f ae8e bne.w 80104bc } } 80107a0: bf00 nop 80107a2: bf00 nop 80107a4: 372c adds r7, #44 @ 0x2c 80107a6: 46bd mov sp, r7 80107a8: bc80 pop {r7} 80107aa: 4770 bx lr 80107ac: 40010400 .word 0x40010400 080107b0 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 80107b0: b480 push {r7} 80107b2: b085 sub sp, #20 80107b4: af00 add r7, sp, #0 80107b6: 6078 str r0, [r7, #4] 80107b8: 460b mov r3, r1 80107ba: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 80107bc: 687b ldr r3, [r7, #4] 80107be: 689a ldr r2, [r3, #8] 80107c0: 887b ldrh r3, [r7, #2] 80107c2: 4013 ands r3, r2 80107c4: 2b00 cmp r3, #0 80107c6: d002 beq.n 80107ce { bitstatus = GPIO_PIN_SET; 80107c8: 2301 movs r3, #1 80107ca: 73fb strb r3, [r7, #15] 80107cc: e001 b.n 80107d2 } else { bitstatus = GPIO_PIN_RESET; 80107ce: 2300 movs r3, #0 80107d0: 73fb strb r3, [r7, #15] } return bitstatus; 80107d2: 7bfb ldrb r3, [r7, #15] } 80107d4: 4618 mov r0, r3 80107d6: 3714 adds r7, #20 80107d8: 46bd mov sp, r7 80107da: bc80 pop {r7} 80107dc: 4770 bx lr 080107de : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 80107de: b480 push {r7} 80107e0: b083 sub sp, #12 80107e2: af00 add r7, sp, #0 80107e4: 6078 str r0, [r7, #4] 80107e6: 460b mov r3, r1 80107e8: 807b strh r3, [r7, #2] 80107ea: 4613 mov r3, r2 80107ec: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80107ee: 787b ldrb r3, [r7, #1] 80107f0: 2b00 cmp r3, #0 80107f2: d003 beq.n 80107fc { GPIOx->BSRR = GPIO_Pin; 80107f4: 887a ldrh r2, [r7, #2] 80107f6: 687b ldr r3, [r7, #4] 80107f8: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 80107fa: e003 b.n 8010804 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 80107fc: 887b ldrh r3, [r7, #2] 80107fe: 041a lsls r2, r3, #16 8010800: 687b ldr r3, [r7, #4] 8010802: 611a str r2, [r3, #16] } 8010804: bf00 nop 8010806: 370c adds r7, #12 8010808: 46bd mov sp, r7 801080a: bc80 pop {r7} 801080c: 4770 bx lr ... 08010810 : * @note If the HSE divided by 128 is used as the RTC clock, the * Backup Domain Access should be kept enabled. * @retval None */ void HAL_PWR_EnableBkUpAccess(void) { 8010810: b480 push {r7} 8010812: af00 add r7, sp, #0 /* Enable access to RTC and backup registers */ *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; 8010814: 4b03 ldr r3, [pc, #12] @ (8010824 ) 8010816: 2201 movs r2, #1 8010818: 601a str r2, [r3, #0] } 801081a: bf00 nop 801081c: 46bd mov sp, r7 801081e: bc80 pop {r7} 8010820: 4770 bx lr 8010822: bf00 nop 8010824: 420e0020 .word 0x420e0020 08010828 : * - Peripheral clocks * - LSI, LSE and RTC clocks * @retval HAL_StatusTypeDef */ HAL_StatusTypeDef HAL_RCC_DeInit(void) { 8010828: b580 push {r7, lr} 801082a: b082 sub sp, #8 801082c: af00 add r7, sp, #0 uint32_t tickstart; /* Get Start Tick */ tickstart = HAL_GetTick(); 801082e: f7fd ffcf bl 800e7d0 8010832: 6078 str r0, [r7, #4] /* Set HSION bit */ SET_BIT(RCC->CR, RCC_CR_HSION); 8010834: 4b60 ldr r3, [pc, #384] @ (80109b8 ) 8010836: 681b ldr r3, [r3, #0] 8010838: 4a5f ldr r2, [pc, #380] @ (80109b8 ) 801083a: f043 0301 orr.w r3, r3, #1 801083e: 6013 str r3, [r2, #0] /* Wait till HSI is ready */ while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 8010840: e008 b.n 8010854 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8010842: f7fd ffc5 bl 800e7d0 8010846: 4602 mov r2, r0 8010848: 687b ldr r3, [r7, #4] 801084a: 1ad3 subs r3, r2, r3 801084c: 2b02 cmp r3, #2 801084e: d901 bls.n 8010854 { return HAL_TIMEOUT; 8010850: 2303 movs r3, #3 8010852: e0ac b.n 80109ae while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 8010854: 4b58 ldr r3, [pc, #352] @ (80109b8 ) 8010856: 681b ldr r3, [r3, #0] 8010858: f003 0302 and.w r3, r3, #2 801085c: 2b00 cmp r3, #0 801085e: d0f0 beq.n 8010842 } } /* Set HSITRIM bits to the reset value */ MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, (0x10U << RCC_CR_HSITRIM_Pos)); 8010860: 4b55 ldr r3, [pc, #340] @ (80109b8 ) 8010862: 681b ldr r3, [r3, #0] 8010864: f023 03f8 bic.w r3, r3, #248 @ 0xf8 8010868: 4a53 ldr r2, [pc, #332] @ (80109b8 ) 801086a: f043 0380 orr.w r3, r3, #128 @ 0x80 801086e: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010870: f7fd ffae bl 800e7d0 8010874: 6078 str r0, [r7, #4] /* Reset CFGR register */ CLEAR_REG(RCC->CFGR); 8010876: 4b50 ldr r3, [pc, #320] @ (80109b8 ) 8010878: 2200 movs r2, #0 801087a: 605a str r2, [r3, #4] /* Wait till clock switch is ready */ while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) 801087c: e00a b.n 8010894 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 801087e: f7fd ffa7 bl 800e7d0 8010882: 4602 mov r2, r0 8010884: 687b ldr r3, [r7, #4] 8010886: 1ad3 subs r3, r2, r3 8010888: f241 3288 movw r2, #5000 @ 0x1388 801088c: 4293 cmp r3, r2 801088e: d901 bls.n 8010894 { return HAL_TIMEOUT; 8010890: 2303 movs r3, #3 8010892: e08c b.n 80109ae while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) 8010894: 4b48 ldr r3, [pc, #288] @ (80109b8 ) 8010896: 685b ldr r3, [r3, #4] 8010898: f003 030c and.w r3, r3, #12 801089c: 2b00 cmp r3, #0 801089e: d1ee bne.n 801087e } } /* Update the SystemCoreClock global variable */ SystemCoreClock = HSI_VALUE; 80108a0: 4b46 ldr r3, [pc, #280] @ (80109bc ) 80108a2: 4a47 ldr r2, [pc, #284] @ (80109c0 ) 80108a4: 601a str r2, [r3, #0] /* Adapt Systick interrupt period */ if (HAL_InitTick(uwTickPrio) != HAL_OK) 80108a6: 4b47 ldr r3, [pc, #284] @ (80109c4 ) 80108a8: 681b ldr r3, [r3, #0] 80108aa: 4618 mov r0, r3 80108ac: f7fd ff4e bl 800e74c 80108b0: 4603 mov r3, r0 80108b2: 2b00 cmp r3, #0 80108b4: d001 beq.n 80108ba { return HAL_ERROR; 80108b6: 2301 movs r3, #1 80108b8: e079 b.n 80109ae } /* Get Start Tick */ tickstart = HAL_GetTick(); 80108ba: f7fd ff89 bl 800e7d0 80108be: 6078 str r0, [r7, #4] /* Second step is to clear PLLON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLLON); 80108c0: 4b3d ldr r3, [pc, #244] @ (80109b8 ) 80108c2: 681b ldr r3, [r3, #0] 80108c4: 4a3c ldr r2, [pc, #240] @ (80109b8 ) 80108c6: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000 80108ca: 6013 str r3, [r2, #0] /* Wait till PLL is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) 80108cc: e008 b.n 80108e0 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80108ce: f7fd ff7f bl 800e7d0 80108d2: 4602 mov r2, r0 80108d4: 687b ldr r3, [r7, #4] 80108d6: 1ad3 subs r3, r2, r3 80108d8: 2b02 cmp r3, #2 80108da: d901 bls.n 80108e0 { return HAL_TIMEOUT; 80108dc: 2303 movs r3, #3 80108de: e066 b.n 80109ae while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) 80108e0: 4b35 ldr r3, [pc, #212] @ (80109b8 ) 80108e2: 681b ldr r3, [r3, #0] 80108e4: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80108e8: 2b00 cmp r3, #0 80108ea: d1f0 bne.n 80108ce } } /* Ensure to reset PLLSRC and PLLMUL bits */ CLEAR_REG(RCC->CFGR); 80108ec: 4b32 ldr r3, [pc, #200] @ (80109b8 ) 80108ee: 2200 movs r2, #0 80108f0: 605a str r2, [r3, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 80108f2: f7fd ff6d bl 800e7d0 80108f6: 6078 str r0, [r7, #4] /* Reset HSEON & CSSON bits */ CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_CSSON); 80108f8: 4b2f ldr r3, [pc, #188] @ (80109b8 ) 80108fa: 681b ldr r3, [r3, #0] 80108fc: 4a2e ldr r2, [pc, #184] @ (80109b8 ) 80108fe: f423 2310 bic.w r3, r3, #589824 @ 0x90000 8010902: 6013 str r3, [r2, #0] /* Wait till HSE is disabled */ while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) 8010904: e008 b.n 8010918 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8010906: f7fd ff63 bl 800e7d0 801090a: 4602 mov r2, r0 801090c: 687b ldr r3, [r7, #4] 801090e: 1ad3 subs r3, r2, r3 8010910: 2b64 cmp r3, #100 @ 0x64 8010912: d901 bls.n 8010918 { return HAL_TIMEOUT; 8010914: 2303 movs r3, #3 8010916: e04a b.n 80109ae while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) 8010918: 4b27 ldr r3, [pc, #156] @ (80109b8 ) 801091a: 681b ldr r3, [r3, #0] 801091c: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010920: 2b00 cmp r3, #0 8010922: d1f0 bne.n 8010906 } } /* Reset HSEBYP bit */ CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); 8010924: 4b24 ldr r3, [pc, #144] @ (80109b8 ) 8010926: 681b ldr r3, [r3, #0] 8010928: 4a23 ldr r2, [pc, #140] @ (80109b8 ) 801092a: f423 2380 bic.w r3, r3, #262144 @ 0x40000 801092e: 6013 str r3, [r2, #0] #if defined(RCC_PLL2_SUPPORT) /* Get Start Tick */ tickstart = HAL_GetTick(); 8010930: f7fd ff4e bl 800e7d0 8010934: 6078 str r0, [r7, #4] /* Clear PLL2ON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLL2ON); 8010936: 4b20 ldr r3, [pc, #128] @ (80109b8 ) 8010938: 681b ldr r3, [r3, #0] 801093a: 4a1f ldr r2, [pc, #124] @ (80109b8 ) 801093c: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000 8010940: 6013 str r3, [r2, #0] /* Wait till PLL2 is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) != RESET) 8010942: e008 b.n 8010956 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010944: f7fd ff44 bl 800e7d0 8010948: 4602 mov r2, r0 801094a: 687b ldr r3, [r7, #4] 801094c: 1ad3 subs r3, r2, r3 801094e: 2b64 cmp r3, #100 @ 0x64 8010950: d901 bls.n 8010956 { return HAL_TIMEOUT; 8010952: 2303 movs r3, #3 8010954: e02b b.n 80109ae while (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) != RESET) 8010956: 4b18 ldr r3, [pc, #96] @ (80109b8 ) 8010958: 681b ldr r3, [r3, #0] 801095a: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 801095e: 2b00 cmp r3, #0 8010960: d1f0 bne.n 8010944 } #endif /* RCC_PLL2_SUPPORT */ #if defined(RCC_PLLI2S_SUPPORT) /* Get Start Tick */ tickstart = HAL_GetTick(); 8010962: f7fd ff35 bl 800e7d0 8010966: 6078 str r0, [r7, #4] /* Clear PLL3ON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLL3ON); 8010968: 4b13 ldr r3, [pc, #76] @ (80109b8 ) 801096a: 681b ldr r3, [r3, #0] 801096c: 4a12 ldr r2, [pc, #72] @ (80109b8 ) 801096e: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8010972: 6013 str r3, [r2, #0] /* Wait till PLL3 is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) != RESET) 8010974: e008 b.n 8010988 { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 8010976: f7fd ff2b bl 800e7d0 801097a: 4602 mov r2, r0 801097c: 687b ldr r3, [r7, #4] 801097e: 1ad3 subs r3, r2, r3 8010980: 2b64 cmp r3, #100 @ 0x64 8010982: d901 bls.n 8010988 { return HAL_TIMEOUT; 8010984: 2303 movs r3, #3 8010986: e012 b.n 80109ae while (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) != RESET) 8010988: 4b0b ldr r3, [pc, #44] @ (80109b8 ) 801098a: 681b ldr r3, [r3, #0] 801098c: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8010990: 2b00 cmp r3, #0 8010992: d1f0 bne.n 8010976 } #endif /* RCC_PLLI2S_SUPPORT */ #if defined(RCC_CFGR2_PREDIV1) /* Reset CFGR2 register */ CLEAR_REG(RCC->CFGR2); 8010994: 4b08 ldr r3, [pc, #32] @ (80109b8 ) 8010996: 2200 movs r2, #0 8010998: 62da str r2, [r3, #44] @ 0x2c #endif /* RCC_CFGR2_PREDIV1 */ /* Reset all CSR flags */ SET_BIT(RCC->CSR, RCC_CSR_RMVF); 801099a: 4b07 ldr r3, [pc, #28] @ (80109b8 ) 801099c: 6a5b ldr r3, [r3, #36] @ 0x24 801099e: 4a06 ldr r2, [pc, #24] @ (80109b8 ) 80109a0: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 80109a4: 6253 str r3, [r2, #36] @ 0x24 /* Disable all interrupts */ CLEAR_REG(RCC->CIR); 80109a6: 4b04 ldr r3, [pc, #16] @ (80109b8 ) 80109a8: 2200 movs r2, #0 80109aa: 609a str r2, [r3, #8] return HAL_OK; 80109ac: 2300 movs r3, #0 } 80109ae: 4618 mov r0, r3 80109b0: 3708 adds r7, #8 80109b2: 46bd mov sp, r7 80109b4: bd80 pop {r7, pc} 80109b6: bf00 nop 80109b8: 40021000 .word 0x40021000 80109bc: 2000006c .word 0x2000006c 80109c0: 007a1200 .word 0x007a1200 80109c4: 20000070 .word 0x20000070 080109c8 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 80109c8: b580 push {r7, lr} 80109ca: b086 sub sp, #24 80109cc: af00 add r7, sp, #0 80109ce: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 80109d0: 687b ldr r3, [r7, #4] 80109d2: 2b00 cmp r3, #0 80109d4: d101 bne.n 80109da { return HAL_ERROR; 80109d6: 2301 movs r3, #1 80109d8: e304 b.n 8010fe4 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80109da: 687b ldr r3, [r7, #4] 80109dc: 681b ldr r3, [r3, #0] 80109de: f003 0301 and.w r3, r3, #1 80109e2: 2b00 cmp r3, #0 80109e4: f000 8087 beq.w 8010af6 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 80109e8: 4b92 ldr r3, [pc, #584] @ (8010c34 ) 80109ea: 685b ldr r3, [r3, #4] 80109ec: f003 030c and.w r3, r3, #12 80109f0: 2b04 cmp r3, #4 80109f2: d00c beq.n 8010a0e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 80109f4: 4b8f ldr r3, [pc, #572] @ (8010c34 ) 80109f6: 685b ldr r3, [r3, #4] 80109f8: f003 030c and.w r3, r3, #12 80109fc: 2b08 cmp r3, #8 80109fe: d112 bne.n 8010a26 8010a00: 4b8c ldr r3, [pc, #560] @ (8010c34 ) 8010a02: 685b ldr r3, [r3, #4] 8010a04: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010a08: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010a0c: d10b bne.n 8010a26 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8010a0e: 4b89 ldr r3, [pc, #548] @ (8010c34 ) 8010a10: 681b ldr r3, [r3, #0] 8010a12: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010a16: 2b00 cmp r3, #0 8010a18: d06c beq.n 8010af4 8010a1a: 687b ldr r3, [r7, #4] 8010a1c: 689b ldr r3, [r3, #8] 8010a1e: 2b00 cmp r3, #0 8010a20: d168 bne.n 8010af4 { return HAL_ERROR; 8010a22: 2301 movs r3, #1 8010a24: e2de b.n 8010fe4 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8010a26: 687b ldr r3, [r7, #4] 8010a28: 689b ldr r3, [r3, #8] 8010a2a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010a2e: d106 bne.n 8010a3e 8010a30: 4b80 ldr r3, [pc, #512] @ (8010c34 ) 8010a32: 681b ldr r3, [r3, #0] 8010a34: 4a7f ldr r2, [pc, #508] @ (8010c34 ) 8010a36: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8010a3a: 6013 str r3, [r2, #0] 8010a3c: e02e b.n 8010a9c 8010a3e: 687b ldr r3, [r7, #4] 8010a40: 689b ldr r3, [r3, #8] 8010a42: 2b00 cmp r3, #0 8010a44: d10c bne.n 8010a60 8010a46: 4b7b ldr r3, [pc, #492] @ (8010c34 ) 8010a48: 681b ldr r3, [r3, #0] 8010a4a: 4a7a ldr r2, [pc, #488] @ (8010c34 ) 8010a4c: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8010a50: 6013 str r3, [r2, #0] 8010a52: 4b78 ldr r3, [pc, #480] @ (8010c34 ) 8010a54: 681b ldr r3, [r3, #0] 8010a56: 4a77 ldr r2, [pc, #476] @ (8010c34 ) 8010a58: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8010a5c: 6013 str r3, [r2, #0] 8010a5e: e01d b.n 8010a9c 8010a60: 687b ldr r3, [r7, #4] 8010a62: 689b ldr r3, [r3, #8] 8010a64: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 8010a68: d10c bne.n 8010a84 8010a6a: 4b72 ldr r3, [pc, #456] @ (8010c34 ) 8010a6c: 681b ldr r3, [r3, #0] 8010a6e: 4a71 ldr r2, [pc, #452] @ (8010c34 ) 8010a70: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8010a74: 6013 str r3, [r2, #0] 8010a76: 4b6f ldr r3, [pc, #444] @ (8010c34 ) 8010a78: 681b ldr r3, [r3, #0] 8010a7a: 4a6e ldr r2, [pc, #440] @ (8010c34 ) 8010a7c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8010a80: 6013 str r3, [r2, #0] 8010a82: e00b b.n 8010a9c 8010a84: 4b6b ldr r3, [pc, #428] @ (8010c34 ) 8010a86: 681b ldr r3, [r3, #0] 8010a88: 4a6a ldr r2, [pc, #424] @ (8010c34 ) 8010a8a: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8010a8e: 6013 str r3, [r2, #0] 8010a90: 4b68 ldr r3, [pc, #416] @ (8010c34 ) 8010a92: 681b ldr r3, [r3, #0] 8010a94: 4a67 ldr r2, [pc, #412] @ (8010c34 ) 8010a96: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8010a9a: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 8010a9c: 687b ldr r3, [r7, #4] 8010a9e: 689b ldr r3, [r3, #8] 8010aa0: 2b00 cmp r3, #0 8010aa2: d013 beq.n 8010acc { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010aa4: f7fd fe94 bl 800e7d0 8010aa8: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8010aaa: e008 b.n 8010abe { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8010aac: f7fd fe90 bl 800e7d0 8010ab0: 4602 mov r2, r0 8010ab2: 693b ldr r3, [r7, #16] 8010ab4: 1ad3 subs r3, r2, r3 8010ab6: 2b64 cmp r3, #100 @ 0x64 8010ab8: d901 bls.n 8010abe { return HAL_TIMEOUT; 8010aba: 2303 movs r3, #3 8010abc: e292 b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8010abe: 4b5d ldr r3, [pc, #372] @ (8010c34 ) 8010ac0: 681b ldr r3, [r3, #0] 8010ac2: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010ac6: 2b00 cmp r3, #0 8010ac8: d0f0 beq.n 8010aac 8010aca: e014 b.n 8010af6 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010acc: f7fd fe80 bl 800e7d0 8010ad0: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8010ad2: e008 b.n 8010ae6 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8010ad4: f7fd fe7c bl 800e7d0 8010ad8: 4602 mov r2, r0 8010ada: 693b ldr r3, [r7, #16] 8010adc: 1ad3 subs r3, r2, r3 8010ade: 2b64 cmp r3, #100 @ 0x64 8010ae0: d901 bls.n 8010ae6 { return HAL_TIMEOUT; 8010ae2: 2303 movs r3, #3 8010ae4: e27e b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8010ae6: 4b53 ldr r3, [pc, #332] @ (8010c34 ) 8010ae8: 681b ldr r3, [r3, #0] 8010aea: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010aee: 2b00 cmp r3, #0 8010af0: d1f0 bne.n 8010ad4 8010af2: e000 b.n 8010af6 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8010af4: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8010af6: 687b ldr r3, [r7, #4] 8010af8: 681b ldr r3, [r3, #0] 8010afa: f003 0302 and.w r3, r3, #2 8010afe: 2b00 cmp r3, #0 8010b00: d063 beq.n 8010bca /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8010b02: 4b4c ldr r3, [pc, #304] @ (8010c34 ) 8010b04: 685b ldr r3, [r3, #4] 8010b06: f003 030c and.w r3, r3, #12 8010b0a: 2b00 cmp r3, #0 8010b0c: d00b beq.n 8010b26 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8010b0e: 4b49 ldr r3, [pc, #292] @ (8010c34 ) 8010b10: 685b ldr r3, [r3, #4] 8010b12: f003 030c and.w r3, r3, #12 8010b16: 2b08 cmp r3, #8 8010b18: d11c bne.n 8010b54 8010b1a: 4b46 ldr r3, [pc, #280] @ (8010c34 ) 8010b1c: 685b ldr r3, [r3, #4] 8010b1e: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010b22: 2b00 cmp r3, #0 8010b24: d116 bne.n 8010b54 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8010b26: 4b43 ldr r3, [pc, #268] @ (8010c34 ) 8010b28: 681b ldr r3, [r3, #0] 8010b2a: f003 0302 and.w r3, r3, #2 8010b2e: 2b00 cmp r3, #0 8010b30: d005 beq.n 8010b3e 8010b32: 687b ldr r3, [r7, #4] 8010b34: 695b ldr r3, [r3, #20] 8010b36: 2b01 cmp r3, #1 8010b38: d001 beq.n 8010b3e { return HAL_ERROR; 8010b3a: 2301 movs r3, #1 8010b3c: e252 b.n 8010fe4 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8010b3e: 4b3d ldr r3, [pc, #244] @ (8010c34 ) 8010b40: 681b ldr r3, [r3, #0] 8010b42: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8010b46: 687b ldr r3, [r7, #4] 8010b48: 699b ldr r3, [r3, #24] 8010b4a: 00db lsls r3, r3, #3 8010b4c: 4939 ldr r1, [pc, #228] @ (8010c34 ) 8010b4e: 4313 orrs r3, r2 8010b50: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8010b52: e03a b.n 8010bca } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8010b54: 687b ldr r3, [r7, #4] 8010b56: 695b ldr r3, [r3, #20] 8010b58: 2b00 cmp r3, #0 8010b5a: d020 beq.n 8010b9e { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 8010b5c: 4b36 ldr r3, [pc, #216] @ (8010c38 ) 8010b5e: 2201 movs r2, #1 8010b60: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010b62: f7fd fe35 bl 800e7d0 8010b66: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8010b68: e008 b.n 8010b7c { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8010b6a: f7fd fe31 bl 800e7d0 8010b6e: 4602 mov r2, r0 8010b70: 693b ldr r3, [r7, #16] 8010b72: 1ad3 subs r3, r2, r3 8010b74: 2b02 cmp r3, #2 8010b76: d901 bls.n 8010b7c { return HAL_TIMEOUT; 8010b78: 2303 movs r3, #3 8010b7a: e233 b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8010b7c: 4b2d ldr r3, [pc, #180] @ (8010c34 ) 8010b7e: 681b ldr r3, [r3, #0] 8010b80: f003 0302 and.w r3, r3, #2 8010b84: 2b00 cmp r3, #0 8010b86: d0f0 beq.n 8010b6a } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8010b88: 4b2a ldr r3, [pc, #168] @ (8010c34 ) 8010b8a: 681b ldr r3, [r3, #0] 8010b8c: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8010b90: 687b ldr r3, [r7, #4] 8010b92: 699b ldr r3, [r3, #24] 8010b94: 00db lsls r3, r3, #3 8010b96: 4927 ldr r1, [pc, #156] @ (8010c34 ) 8010b98: 4313 orrs r3, r2 8010b9a: 600b str r3, [r1, #0] 8010b9c: e015 b.n 8010bca } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 8010b9e: 4b26 ldr r3, [pc, #152] @ (8010c38 ) 8010ba0: 2200 movs r2, #0 8010ba2: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010ba4: f7fd fe14 bl 800e7d0 8010ba8: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8010baa: e008 b.n 8010bbe { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8010bac: f7fd fe10 bl 800e7d0 8010bb0: 4602 mov r2, r0 8010bb2: 693b ldr r3, [r7, #16] 8010bb4: 1ad3 subs r3, r2, r3 8010bb6: 2b02 cmp r3, #2 8010bb8: d901 bls.n 8010bbe { return HAL_TIMEOUT; 8010bba: 2303 movs r3, #3 8010bbc: e212 b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8010bbe: 4b1d ldr r3, [pc, #116] @ (8010c34 ) 8010bc0: 681b ldr r3, [r3, #0] 8010bc2: f003 0302 and.w r3, r3, #2 8010bc6: 2b00 cmp r3, #0 8010bc8: d1f0 bne.n 8010bac } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8010bca: 687b ldr r3, [r7, #4] 8010bcc: 681b ldr r3, [r3, #0] 8010bce: f003 0308 and.w r3, r3, #8 8010bd2: 2b00 cmp r3, #0 8010bd4: d03a beq.n 8010c4c { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8010bd6: 687b ldr r3, [r7, #4] 8010bd8: 69db ldr r3, [r3, #28] 8010bda: 2b00 cmp r3, #0 8010bdc: d019 beq.n 8010c12 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8010bde: 4b17 ldr r3, [pc, #92] @ (8010c3c ) 8010be0: 2201 movs r2, #1 8010be2: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010be4: f7fd fdf4 bl 800e7d0 8010be8: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8010bea: e008 b.n 8010bfe { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8010bec: f7fd fdf0 bl 800e7d0 8010bf0: 4602 mov r2, r0 8010bf2: 693b ldr r3, [r7, #16] 8010bf4: 1ad3 subs r3, r2, r3 8010bf6: 2b02 cmp r3, #2 8010bf8: d901 bls.n 8010bfe { return HAL_TIMEOUT; 8010bfa: 2303 movs r3, #3 8010bfc: e1f2 b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8010bfe: 4b0d ldr r3, [pc, #52] @ (8010c34 ) 8010c00: 6a5b ldr r3, [r3, #36] @ 0x24 8010c02: f003 0302 and.w r3, r3, #2 8010c06: 2b00 cmp r3, #0 8010c08: d0f0 beq.n 8010bec } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 8010c0a: 2001 movs r0, #1 8010c0c: f000 fbca bl 80113a4 8010c10: e01c b.n 8010c4c } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8010c12: 4b0a ldr r3, [pc, #40] @ (8010c3c ) 8010c14: 2200 movs r2, #0 8010c16: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010c18: f7fd fdda bl 800e7d0 8010c1c: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8010c1e: e00f b.n 8010c40 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8010c20: f7fd fdd6 bl 800e7d0 8010c24: 4602 mov r2, r0 8010c26: 693b ldr r3, [r7, #16] 8010c28: 1ad3 subs r3, r2, r3 8010c2a: 2b02 cmp r3, #2 8010c2c: d908 bls.n 8010c40 { return HAL_TIMEOUT; 8010c2e: 2303 movs r3, #3 8010c30: e1d8 b.n 8010fe4 8010c32: bf00 nop 8010c34: 40021000 .word 0x40021000 8010c38: 42420000 .word 0x42420000 8010c3c: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8010c40: 4b9b ldr r3, [pc, #620] @ (8010eb0 ) 8010c42: 6a5b ldr r3, [r3, #36] @ 0x24 8010c44: f003 0302 and.w r3, r3, #2 8010c48: 2b00 cmp r3, #0 8010c4a: d1e9 bne.n 8010c20 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8010c4c: 687b ldr r3, [r7, #4] 8010c4e: 681b ldr r3, [r3, #0] 8010c50: f003 0304 and.w r3, r3, #4 8010c54: 2b00 cmp r3, #0 8010c56: f000 80a6 beq.w 8010da6 { FlagStatus pwrclkchanged = RESET; 8010c5a: 2300 movs r3, #0 8010c5c: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8010c5e: 4b94 ldr r3, [pc, #592] @ (8010eb0 ) 8010c60: 69db ldr r3, [r3, #28] 8010c62: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010c66: 2b00 cmp r3, #0 8010c68: d10d bne.n 8010c86 { __HAL_RCC_PWR_CLK_ENABLE(); 8010c6a: 4b91 ldr r3, [pc, #580] @ (8010eb0 ) 8010c6c: 69db ldr r3, [r3, #28] 8010c6e: 4a90 ldr r2, [pc, #576] @ (8010eb0 ) 8010c70: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8010c74: 61d3 str r3, [r2, #28] 8010c76: 4b8e ldr r3, [pc, #568] @ (8010eb0 ) 8010c78: 69db ldr r3, [r3, #28] 8010c7a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010c7e: 60bb str r3, [r7, #8] 8010c80: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8010c82: 2301 movs r3, #1 8010c84: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8010c86: 4b8b ldr r3, [pc, #556] @ (8010eb4 ) 8010c88: 681b ldr r3, [r3, #0] 8010c8a: f403 7380 and.w r3, r3, #256 @ 0x100 8010c8e: 2b00 cmp r3, #0 8010c90: d118 bne.n 8010cc4 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8010c92: 4b88 ldr r3, [pc, #544] @ (8010eb4 ) 8010c94: 681b ldr r3, [r3, #0] 8010c96: 4a87 ldr r2, [pc, #540] @ (8010eb4 ) 8010c98: f443 7380 orr.w r3, r3, #256 @ 0x100 8010c9c: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8010c9e: f7fd fd97 bl 800e7d0 8010ca2: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8010ca4: e008 b.n 8010cb8 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8010ca6: f7fd fd93 bl 800e7d0 8010caa: 4602 mov r2, r0 8010cac: 693b ldr r3, [r7, #16] 8010cae: 1ad3 subs r3, r2, r3 8010cb0: 2b64 cmp r3, #100 @ 0x64 8010cb2: d901 bls.n 8010cb8 { return HAL_TIMEOUT; 8010cb4: 2303 movs r3, #3 8010cb6: e195 b.n 8010fe4 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8010cb8: 4b7e ldr r3, [pc, #504] @ (8010eb4 ) 8010cba: 681b ldr r3, [r3, #0] 8010cbc: f403 7380 and.w r3, r3, #256 @ 0x100 8010cc0: 2b00 cmp r3, #0 8010cc2: d0f0 beq.n 8010ca6 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8010cc4: 687b ldr r3, [r7, #4] 8010cc6: 691b ldr r3, [r3, #16] 8010cc8: 2b01 cmp r3, #1 8010cca: d106 bne.n 8010cda 8010ccc: 4b78 ldr r3, [pc, #480] @ (8010eb0 ) 8010cce: 6a1b ldr r3, [r3, #32] 8010cd0: 4a77 ldr r2, [pc, #476] @ (8010eb0 ) 8010cd2: f043 0301 orr.w r3, r3, #1 8010cd6: 6213 str r3, [r2, #32] 8010cd8: e02d b.n 8010d36 8010cda: 687b ldr r3, [r7, #4] 8010cdc: 691b ldr r3, [r3, #16] 8010cde: 2b00 cmp r3, #0 8010ce0: d10c bne.n 8010cfc 8010ce2: 4b73 ldr r3, [pc, #460] @ (8010eb0 ) 8010ce4: 6a1b ldr r3, [r3, #32] 8010ce6: 4a72 ldr r2, [pc, #456] @ (8010eb0 ) 8010ce8: f023 0301 bic.w r3, r3, #1 8010cec: 6213 str r3, [r2, #32] 8010cee: 4b70 ldr r3, [pc, #448] @ (8010eb0 ) 8010cf0: 6a1b ldr r3, [r3, #32] 8010cf2: 4a6f ldr r2, [pc, #444] @ (8010eb0 ) 8010cf4: f023 0304 bic.w r3, r3, #4 8010cf8: 6213 str r3, [r2, #32] 8010cfa: e01c b.n 8010d36 8010cfc: 687b ldr r3, [r7, #4] 8010cfe: 691b ldr r3, [r3, #16] 8010d00: 2b05 cmp r3, #5 8010d02: d10c bne.n 8010d1e 8010d04: 4b6a ldr r3, [pc, #424] @ (8010eb0 ) 8010d06: 6a1b ldr r3, [r3, #32] 8010d08: 4a69 ldr r2, [pc, #420] @ (8010eb0 ) 8010d0a: f043 0304 orr.w r3, r3, #4 8010d0e: 6213 str r3, [r2, #32] 8010d10: 4b67 ldr r3, [pc, #412] @ (8010eb0 ) 8010d12: 6a1b ldr r3, [r3, #32] 8010d14: 4a66 ldr r2, [pc, #408] @ (8010eb0 ) 8010d16: f043 0301 orr.w r3, r3, #1 8010d1a: 6213 str r3, [r2, #32] 8010d1c: e00b b.n 8010d36 8010d1e: 4b64 ldr r3, [pc, #400] @ (8010eb0 ) 8010d20: 6a1b ldr r3, [r3, #32] 8010d22: 4a63 ldr r2, [pc, #396] @ (8010eb0 ) 8010d24: f023 0301 bic.w r3, r3, #1 8010d28: 6213 str r3, [r2, #32] 8010d2a: 4b61 ldr r3, [pc, #388] @ (8010eb0 ) 8010d2c: 6a1b ldr r3, [r3, #32] 8010d2e: 4a60 ldr r2, [pc, #384] @ (8010eb0 ) 8010d30: f023 0304 bic.w r3, r3, #4 8010d34: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 8010d36: 687b ldr r3, [r7, #4] 8010d38: 691b ldr r3, [r3, #16] 8010d3a: 2b00 cmp r3, #0 8010d3c: d015 beq.n 8010d6a { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010d3e: f7fd fd47 bl 800e7d0 8010d42: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8010d44: e00a b.n 8010d5c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8010d46: f7fd fd43 bl 800e7d0 8010d4a: 4602 mov r2, r0 8010d4c: 693b ldr r3, [r7, #16] 8010d4e: 1ad3 subs r3, r2, r3 8010d50: f241 3288 movw r2, #5000 @ 0x1388 8010d54: 4293 cmp r3, r2 8010d56: d901 bls.n 8010d5c { return HAL_TIMEOUT; 8010d58: 2303 movs r3, #3 8010d5a: e143 b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8010d5c: 4b54 ldr r3, [pc, #336] @ (8010eb0 ) 8010d5e: 6a1b ldr r3, [r3, #32] 8010d60: f003 0302 and.w r3, r3, #2 8010d64: 2b00 cmp r3, #0 8010d66: d0ee beq.n 8010d46 8010d68: e014 b.n 8010d94 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010d6a: f7fd fd31 bl 800e7d0 8010d6e: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8010d70: e00a b.n 8010d88 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8010d72: f7fd fd2d bl 800e7d0 8010d76: 4602 mov r2, r0 8010d78: 693b ldr r3, [r7, #16] 8010d7a: 1ad3 subs r3, r2, r3 8010d7c: f241 3288 movw r2, #5000 @ 0x1388 8010d80: 4293 cmp r3, r2 8010d82: d901 bls.n 8010d88 { return HAL_TIMEOUT; 8010d84: 2303 movs r3, #3 8010d86: e12d b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8010d88: 4b49 ldr r3, [pc, #292] @ (8010eb0 ) 8010d8a: 6a1b ldr r3, [r3, #32] 8010d8c: f003 0302 and.w r3, r3, #2 8010d90: 2b00 cmp r3, #0 8010d92: d1ee bne.n 8010d72 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8010d94: 7dfb ldrb r3, [r7, #23] 8010d96: 2b01 cmp r3, #1 8010d98: d105 bne.n 8010da6 { __HAL_RCC_PWR_CLK_DISABLE(); 8010d9a: 4b45 ldr r3, [pc, #276] @ (8010eb0 ) 8010d9c: 69db ldr r3, [r3, #28] 8010d9e: 4a44 ldr r2, [pc, #272] @ (8010eb0 ) 8010da0: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8010da4: 61d3 str r3, [r2, #28] #if defined(RCC_CR_PLL2ON) /*-------------------------------- PLL2 Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL2(RCC_OscInitStruct->PLL2.PLL2State)); if ((RCC_OscInitStruct->PLL2.PLL2State) != RCC_PLL2_NONE) 8010da6: 687b ldr r3, [r7, #4] 8010da8: 6adb ldr r3, [r3, #44] @ 0x2c 8010daa: 2b00 cmp r3, #0 8010dac: f000 808c beq.w 8010ec8 { /* This bit can not be cleared if the PLL2 clock is used indirectly as system clock (i.e. it is used as PLL clock entry that is used as system clock). */ if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8010db0: 4b3f ldr r3, [pc, #252] @ (8010eb0 ) 8010db2: 685b ldr r3, [r3, #4] 8010db4: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010db8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010dbc: d10e bne.n 8010ddc (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 8010dbe: 4b3c ldr r3, [pc, #240] @ (8010eb0 ) 8010dc0: 685b ldr r3, [r3, #4] 8010dc2: f003 030c and.w r3, r3, #12 if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8010dc6: 2b08 cmp r3, #8 8010dc8: d108 bne.n 8010ddc ((READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) == RCC_CFGR2_PREDIV1SRC_PLL2)) 8010dca: 4b39 ldr r3, [pc, #228] @ (8010eb0 ) 8010dcc: 6adb ldr r3, [r3, #44] @ 0x2c 8010dce: f403 3380 and.w r3, r3, #65536 @ 0x10000 (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 8010dd2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010dd6: d101 bne.n 8010ddc { return HAL_ERROR; 8010dd8: 2301 movs r3, #1 8010dda: e103 b.n 8010fe4 } else { if ((RCC_OscInitStruct->PLL2.PLL2State) == RCC_PLL2_ON) 8010ddc: 687b ldr r3, [r7, #4] 8010dde: 6adb ldr r3, [r3, #44] @ 0x2c 8010de0: 2b02 cmp r3, #2 8010de2: d14e bne.n 8010e82 assert_param(IS_RCC_PLL2_MUL(RCC_OscInitStruct->PLL2.PLL2MUL)); assert_param(IS_RCC_HSE_PREDIV2(RCC_OscInitStruct->PLL2.HSEPrediv2Value)); /* Prediv2 can be written only when the PLLI2S is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 8010de4: 4b32 ldr r3, [pc, #200] @ (8010eb0 ) 8010de6: 681b ldr r3, [r3, #0] 8010de8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010dec: 2b00 cmp r3, #0 8010dee: d009 beq.n 8010e04 (__HAL_RCC_HSE_GET_PREDIV2() != RCC_OscInitStruct->PLL2.HSEPrediv2Value)) 8010df0: 4b2f ldr r3, [pc, #188] @ (8010eb0 ) 8010df2: 6adb ldr r3, [r3, #44] @ 0x2c 8010df4: f003 02f0 and.w r2, r3, #240 @ 0xf0 8010df8: 687b ldr r3, [r7, #4] 8010dfa: 6b5b ldr r3, [r3, #52] @ 0x34 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 8010dfc: 429a cmp r2, r3 8010dfe: d001 beq.n 8010e04 { return HAL_ERROR; 8010e00: 2301 movs r3, #1 8010e02: e0ef b.n 8010fe4 } /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 8010e04: 4b2c ldr r3, [pc, #176] @ (8010eb8 ) 8010e06: 2200 movs r2, #0 8010e08: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010e0a: f7fd fce1 bl 800e7d0 8010e0e: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010e10: e008 b.n 8010e24 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010e12: f7fd fcdd bl 800e7d0 8010e16: 4602 mov r2, r0 8010e18: 693b ldr r3, [r7, #16] 8010e1a: 1ad3 subs r3, r2, r3 8010e1c: 2b64 cmp r3, #100 @ 0x64 8010e1e: d901 bls.n 8010e24 { return HAL_TIMEOUT; 8010e20: 2303 movs r3, #3 8010e22: e0df b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010e24: 4b22 ldr r3, [pc, #136] @ (8010eb0 ) 8010e26: 681b ldr r3, [r3, #0] 8010e28: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010e2c: 2b00 cmp r3, #0 8010e2e: d1f0 bne.n 8010e12 } } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(RCC_OscInitStruct->PLL2.HSEPrediv2Value); 8010e30: 4b1f ldr r3, [pc, #124] @ (8010eb0 ) 8010e32: 6adb ldr r3, [r3, #44] @ 0x2c 8010e34: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8010e38: 687b ldr r3, [r7, #4] 8010e3a: 6b5b ldr r3, [r3, #52] @ 0x34 8010e3c: 491c ldr r1, [pc, #112] @ (8010eb0 ) 8010e3e: 4313 orrs r3, r2 8010e40: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLL2 multiplication factors. */ __HAL_RCC_PLL2_CONFIG(RCC_OscInitStruct->PLL2.PLL2MUL); 8010e42: 4b1b ldr r3, [pc, #108] @ (8010eb0 ) 8010e44: 6adb ldr r3, [r3, #44] @ 0x2c 8010e46: f423 6270 bic.w r2, r3, #3840 @ 0xf00 8010e4a: 687b ldr r3, [r7, #4] 8010e4c: 6b1b ldr r3, [r3, #48] @ 0x30 8010e4e: 4918 ldr r1, [pc, #96] @ (8010eb0 ) 8010e50: 4313 orrs r3, r2 8010e52: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLL2. */ __HAL_RCC_PLL2_ENABLE(); 8010e54: 4b18 ldr r3, [pc, #96] @ (8010eb8 ) 8010e56: 2201 movs r2, #1 8010e58: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010e5a: f7fd fcb9 bl 800e7d0 8010e5e: 6138 str r0, [r7, #16] /* Wait till PLL2 is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 8010e60: e008 b.n 8010e74 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010e62: f7fd fcb5 bl 800e7d0 8010e66: 4602 mov r2, r0 8010e68: 693b ldr r3, [r7, #16] 8010e6a: 1ad3 subs r3, r2, r3 8010e6c: 2b64 cmp r3, #100 @ 0x64 8010e6e: d901 bls.n 8010e74 { return HAL_TIMEOUT; 8010e70: 2303 movs r3, #3 8010e72: e0b7 b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 8010e74: 4b0e ldr r3, [pc, #56] @ (8010eb0 ) 8010e76: 681b ldr r3, [r3, #0] 8010e78: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010e7c: 2b00 cmp r3, #0 8010e7e: d0f0 beq.n 8010e62 8010e80: e022 b.n 8010ec8 } } else { /* Set PREDIV1 source to HSE */ CLEAR_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC); 8010e82: 4b0b ldr r3, [pc, #44] @ (8010eb0 ) 8010e84: 6adb ldr r3, [r3, #44] @ 0x2c 8010e86: 4a0a ldr r2, [pc, #40] @ (8010eb0 ) 8010e88: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8010e8c: 62d3 str r3, [r2, #44] @ 0x2c /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 8010e8e: 4b0a ldr r3, [pc, #40] @ (8010eb8 ) 8010e90: 2200 movs r2, #0 8010e92: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010e94: f7fd fc9c bl 800e7d0 8010e98: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010e9a: e00f b.n 8010ebc { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010e9c: f7fd fc98 bl 800e7d0 8010ea0: 4602 mov r2, r0 8010ea2: 693b ldr r3, [r7, #16] 8010ea4: 1ad3 subs r3, r2, r3 8010ea6: 2b64 cmp r3, #100 @ 0x64 8010ea8: d908 bls.n 8010ebc { return HAL_TIMEOUT; 8010eaa: 2303 movs r3, #3 8010eac: e09a b.n 8010fe4 8010eae: bf00 nop 8010eb0: 40021000 .word 0x40021000 8010eb4: 40007000 .word 0x40007000 8010eb8: 42420068 .word 0x42420068 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010ebc: 4b4b ldr r3, [pc, #300] @ (8010fec ) 8010ebe: 681b ldr r3, [r3, #0] 8010ec0: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010ec4: 2b00 cmp r3, #0 8010ec6: d1e9 bne.n 8010e9c #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8010ec8: 687b ldr r3, [r7, #4] 8010eca: 6a1b ldr r3, [r3, #32] 8010ecc: 2b00 cmp r3, #0 8010ece: f000 8088 beq.w 8010fe2 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8010ed2: 4b46 ldr r3, [pc, #280] @ (8010fec ) 8010ed4: 685b ldr r3, [r3, #4] 8010ed6: f003 030c and.w r3, r3, #12 8010eda: 2b08 cmp r3, #8 8010edc: d068 beq.n 8010fb0 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8010ede: 687b ldr r3, [r7, #4] 8010ee0: 6a1b ldr r3, [r3, #32] 8010ee2: 2b02 cmp r3, #2 8010ee4: d14d bne.n 8010f82 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8010ee6: 4b42 ldr r3, [pc, #264] @ (8010ff0 ) 8010ee8: 2200 movs r2, #0 8010eea: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010eec: f7fd fc70 bl 800e7d0 8010ef0: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8010ef2: e008 b.n 8010f06 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8010ef4: f7fd fc6c bl 800e7d0 8010ef8: 4602 mov r2, r0 8010efa: 693b ldr r3, [r7, #16] 8010efc: 1ad3 subs r3, r2, r3 8010efe: 2b02 cmp r3, #2 8010f00: d901 bls.n 8010f06 { return HAL_TIMEOUT; 8010f02: 2303 movs r3, #3 8010f04: e06e b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8010f06: 4b39 ldr r3, [pc, #228] @ (8010fec ) 8010f08: 681b ldr r3, [r3, #0] 8010f0a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8010f0e: 2b00 cmp r3, #0 8010f10: d1f0 bne.n 8010ef4 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8010f12: 687b ldr r3, [r7, #4] 8010f14: 6a5b ldr r3, [r3, #36] @ 0x24 8010f16: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010f1a: d10f bne.n 8010f3c assert_param(IS_RCC_HSE_PREDIV(RCC_OscInitStruct->HSEPredivValue)); #if defined(RCC_CFGR2_PREDIV1SRC) assert_param(IS_RCC_PREDIV1_SOURCE(RCC_OscInitStruct->Prediv1Source)); /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); 8010f1c: 4b33 ldr r3, [pc, #204] @ (8010fec ) 8010f1e: 6ada ldr r2, [r3, #44] @ 0x2c 8010f20: 687b ldr r3, [r7, #4] 8010f22: 685b ldr r3, [r3, #4] 8010f24: 4931 ldr r1, [pc, #196] @ (8010fec ) 8010f26: 4313 orrs r3, r2 8010f28: 62cb str r3, [r1, #44] @ 0x2c #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8010f2a: 4b30 ldr r3, [pc, #192] @ (8010fec ) 8010f2c: 6adb ldr r3, [r3, #44] @ 0x2c 8010f2e: f023 020f bic.w r2, r3, #15 8010f32: 687b ldr r3, [r7, #4] 8010f34: 68db ldr r3, [r3, #12] 8010f36: 492d ldr r1, [pc, #180] @ (8010fec ) 8010f38: 4313 orrs r3, r2 8010f3a: 62cb str r3, [r1, #44] @ 0x2c } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8010f3c: 4b2b ldr r3, [pc, #172] @ (8010fec ) 8010f3e: 685b ldr r3, [r3, #4] 8010f40: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 8010f44: 687b ldr r3, [r7, #4] 8010f46: 6a59 ldr r1, [r3, #36] @ 0x24 8010f48: 687b ldr r3, [r7, #4] 8010f4a: 6a9b ldr r3, [r3, #40] @ 0x28 8010f4c: 430b orrs r3, r1 8010f4e: 4927 ldr r1, [pc, #156] @ (8010fec ) 8010f50: 4313 orrs r3, r2 8010f52: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8010f54: 4b26 ldr r3, [pc, #152] @ (8010ff0 ) 8010f56: 2201 movs r2, #1 8010f58: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010f5a: f7fd fc39 bl 800e7d0 8010f5e: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8010f60: e008 b.n 8010f74 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8010f62: f7fd fc35 bl 800e7d0 8010f66: 4602 mov r2, r0 8010f68: 693b ldr r3, [r7, #16] 8010f6a: 1ad3 subs r3, r2, r3 8010f6c: 2b02 cmp r3, #2 8010f6e: d901 bls.n 8010f74 { return HAL_TIMEOUT; 8010f70: 2303 movs r3, #3 8010f72: e037 b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8010f74: 4b1d ldr r3, [pc, #116] @ (8010fec ) 8010f76: 681b ldr r3, [r3, #0] 8010f78: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8010f7c: 2b00 cmp r3, #0 8010f7e: d0f0 beq.n 8010f62 8010f80: e02f b.n 8010fe2 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8010f82: 4b1b ldr r3, [pc, #108] @ (8010ff0 ) 8010f84: 2200 movs r2, #0 8010f86: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010f88: f7fd fc22 bl 800e7d0 8010f8c: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8010f8e: e008 b.n 8010fa2 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8010f90: f7fd fc1e bl 800e7d0 8010f94: 4602 mov r2, r0 8010f96: 693b ldr r3, [r7, #16] 8010f98: 1ad3 subs r3, r2, r3 8010f9a: 2b02 cmp r3, #2 8010f9c: d901 bls.n 8010fa2 { return HAL_TIMEOUT; 8010f9e: 2303 movs r3, #3 8010fa0: e020 b.n 8010fe4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8010fa2: 4b12 ldr r3, [pc, #72] @ (8010fec ) 8010fa4: 681b ldr r3, [r3, #0] 8010fa6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8010faa: 2b00 cmp r3, #0 8010fac: d1f0 bne.n 8010f90 8010fae: e018 b.n 8010fe2 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8010fb0: 687b ldr r3, [r7, #4] 8010fb2: 6a1b ldr r3, [r3, #32] 8010fb4: 2b01 cmp r3, #1 8010fb6: d101 bne.n 8010fbc { return HAL_ERROR; 8010fb8: 2301 movs r3, #1 8010fba: e013 b.n 8010fe4 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 8010fbc: 4b0b ldr r3, [pc, #44] @ (8010fec ) 8010fbe: 685b ldr r3, [r3, #4] 8010fc0: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8010fc2: 68fb ldr r3, [r7, #12] 8010fc4: f403 3280 and.w r2, r3, #65536 @ 0x10000 8010fc8: 687b ldr r3, [r7, #4] 8010fca: 6a5b ldr r3, [r3, #36] @ 0x24 8010fcc: 429a cmp r2, r3 8010fce: d106 bne.n 8010fde (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8010fd0: 68fb ldr r3, [r7, #12] 8010fd2: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 8010fd6: 687b ldr r3, [r7, #4] 8010fd8: 6a9b ldr r3, [r3, #40] @ 0x28 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8010fda: 429a cmp r2, r3 8010fdc: d001 beq.n 8010fe2 { return HAL_ERROR; 8010fde: 2301 movs r3, #1 8010fe0: e000 b.n 8010fe4 } } } } return HAL_OK; 8010fe2: 2300 movs r3, #0 } 8010fe4: 4618 mov r0, r3 8010fe6: 3718 adds r7, #24 8010fe8: 46bd mov sp, r7 8010fea: bd80 pop {r7, pc} 8010fec: 40021000 .word 0x40021000 8010ff0: 42420060 .word 0x42420060 08010ff4 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8010ff4: b580 push {r7, lr} 8010ff6: b084 sub sp, #16 8010ff8: af00 add r7, sp, #0 8010ffa: 6078 str r0, [r7, #4] 8010ffc: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 8010ffe: 687b ldr r3, [r7, #4] 8011000: 2b00 cmp r3, #0 8011002: d101 bne.n 8011008 { return HAL_ERROR; 8011004: 2301 movs r3, #1 8011006: e0d0 b.n 80111aa must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8011008: 4b6a ldr r3, [pc, #424] @ (80111b4 ) 801100a: 681b ldr r3, [r3, #0] 801100c: f003 0307 and.w r3, r3, #7 8011010: 683a ldr r2, [r7, #0] 8011012: 429a cmp r2, r3 8011014: d910 bls.n 8011038 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8011016: 4b67 ldr r3, [pc, #412] @ (80111b4 ) 8011018: 681b ldr r3, [r3, #0] 801101a: f023 0207 bic.w r2, r3, #7 801101e: 4965 ldr r1, [pc, #404] @ (80111b4 ) 8011020: 683b ldr r3, [r7, #0] 8011022: 4313 orrs r3, r2 8011024: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8011026: 4b63 ldr r3, [pc, #396] @ (80111b4 ) 8011028: 681b ldr r3, [r3, #0] 801102a: f003 0307 and.w r3, r3, #7 801102e: 683a ldr r2, [r7, #0] 8011030: 429a cmp r2, r3 8011032: d001 beq.n 8011038 { return HAL_ERROR; 8011034: 2301 movs r3, #1 8011036: e0b8 b.n 80111aa } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8011038: 687b ldr r3, [r7, #4] 801103a: 681b ldr r3, [r3, #0] 801103c: f003 0302 and.w r3, r3, #2 8011040: 2b00 cmp r3, #0 8011042: d020 beq.n 8011086 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8011044: 687b ldr r3, [r7, #4] 8011046: 681b ldr r3, [r3, #0] 8011048: f003 0304 and.w r3, r3, #4 801104c: 2b00 cmp r3, #0 801104e: d005 beq.n 801105c { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8011050: 4b59 ldr r3, [pc, #356] @ (80111b8 ) 8011052: 685b ldr r3, [r3, #4] 8011054: 4a58 ldr r2, [pc, #352] @ (80111b8 ) 8011056: f443 63e0 orr.w r3, r3, #1792 @ 0x700 801105a: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 801105c: 687b ldr r3, [r7, #4] 801105e: 681b ldr r3, [r3, #0] 8011060: f003 0308 and.w r3, r3, #8 8011064: 2b00 cmp r3, #0 8011066: d005 beq.n 8011074 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8011068: 4b53 ldr r3, [pc, #332] @ (80111b8 ) 801106a: 685b ldr r3, [r3, #4] 801106c: 4a52 ldr r2, [pc, #328] @ (80111b8 ) 801106e: f443 5360 orr.w r3, r3, #14336 @ 0x3800 8011072: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8011074: 4b50 ldr r3, [pc, #320] @ (80111b8 ) 8011076: 685b ldr r3, [r3, #4] 8011078: f023 02f0 bic.w r2, r3, #240 @ 0xf0 801107c: 687b ldr r3, [r7, #4] 801107e: 689b ldr r3, [r3, #8] 8011080: 494d ldr r1, [pc, #308] @ (80111b8 ) 8011082: 4313 orrs r3, r2 8011084: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8011086: 687b ldr r3, [r7, #4] 8011088: 681b ldr r3, [r3, #0] 801108a: f003 0301 and.w r3, r3, #1 801108e: 2b00 cmp r3, #0 8011090: d040 beq.n 8011114 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8011092: 687b ldr r3, [r7, #4] 8011094: 685b ldr r3, [r3, #4] 8011096: 2b01 cmp r3, #1 8011098: d107 bne.n 80110aa { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 801109a: 4b47 ldr r3, [pc, #284] @ (80111b8 ) 801109c: 681b ldr r3, [r3, #0] 801109e: f403 3300 and.w r3, r3, #131072 @ 0x20000 80110a2: 2b00 cmp r3, #0 80110a4: d115 bne.n 80110d2 { return HAL_ERROR; 80110a6: 2301 movs r3, #1 80110a8: e07f b.n 80111aa } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80110aa: 687b ldr r3, [r7, #4] 80110ac: 685b ldr r3, [r3, #4] 80110ae: 2b02 cmp r3, #2 80110b0: d107 bne.n 80110c2 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80110b2: 4b41 ldr r3, [pc, #260] @ (80111b8 ) 80110b4: 681b ldr r3, [r3, #0] 80110b6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80110ba: 2b00 cmp r3, #0 80110bc: d109 bne.n 80110d2 { return HAL_ERROR; 80110be: 2301 movs r3, #1 80110c0: e073 b.n 80111aa } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80110c2: 4b3d ldr r3, [pc, #244] @ (80111b8 ) 80110c4: 681b ldr r3, [r3, #0] 80110c6: f003 0302 and.w r3, r3, #2 80110ca: 2b00 cmp r3, #0 80110cc: d101 bne.n 80110d2 { return HAL_ERROR; 80110ce: 2301 movs r3, #1 80110d0: e06b b.n 80111aa } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80110d2: 4b39 ldr r3, [pc, #228] @ (80111b8 ) 80110d4: 685b ldr r3, [r3, #4] 80110d6: f023 0203 bic.w r2, r3, #3 80110da: 687b ldr r3, [r7, #4] 80110dc: 685b ldr r3, [r3, #4] 80110de: 4936 ldr r1, [pc, #216] @ (80111b8 ) 80110e0: 4313 orrs r3, r2 80110e2: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 80110e4: f7fd fb74 bl 800e7d0 80110e8: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80110ea: e00a b.n 8011102 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 80110ec: f7fd fb70 bl 800e7d0 80110f0: 4602 mov r2, r0 80110f2: 68fb ldr r3, [r7, #12] 80110f4: 1ad3 subs r3, r2, r3 80110f6: f241 3288 movw r2, #5000 @ 0x1388 80110fa: 4293 cmp r3, r2 80110fc: d901 bls.n 8011102 { return HAL_TIMEOUT; 80110fe: 2303 movs r3, #3 8011100: e053 b.n 80111aa while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8011102: 4b2d ldr r3, [pc, #180] @ (80111b8 ) 8011104: 685b ldr r3, [r3, #4] 8011106: f003 020c and.w r2, r3, #12 801110a: 687b ldr r3, [r7, #4] 801110c: 685b ldr r3, [r3, #4] 801110e: 009b lsls r3, r3, #2 8011110: 429a cmp r2, r3 8011112: d1eb bne.n 80110ec } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 8011114: 4b27 ldr r3, [pc, #156] @ (80111b4 ) 8011116: 681b ldr r3, [r3, #0] 8011118: f003 0307 and.w r3, r3, #7 801111c: 683a ldr r2, [r7, #0] 801111e: 429a cmp r2, r3 8011120: d210 bcs.n 8011144 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8011122: 4b24 ldr r3, [pc, #144] @ (80111b4 ) 8011124: 681b ldr r3, [r3, #0] 8011126: f023 0207 bic.w r2, r3, #7 801112a: 4922 ldr r1, [pc, #136] @ (80111b4 ) 801112c: 683b ldr r3, [r7, #0] 801112e: 4313 orrs r3, r2 8011130: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8011132: 4b20 ldr r3, [pc, #128] @ (80111b4 ) 8011134: 681b ldr r3, [r3, #0] 8011136: f003 0307 and.w r3, r3, #7 801113a: 683a ldr r2, [r7, #0] 801113c: 429a cmp r2, r3 801113e: d001 beq.n 8011144 { return HAL_ERROR; 8011140: 2301 movs r3, #1 8011142: e032 b.n 80111aa } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8011144: 687b ldr r3, [r7, #4] 8011146: 681b ldr r3, [r3, #0] 8011148: f003 0304 and.w r3, r3, #4 801114c: 2b00 cmp r3, #0 801114e: d008 beq.n 8011162 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8011150: 4b19 ldr r3, [pc, #100] @ (80111b8 ) 8011152: 685b ldr r3, [r3, #4] 8011154: f423 62e0 bic.w r2, r3, #1792 @ 0x700 8011158: 687b ldr r3, [r7, #4] 801115a: 68db ldr r3, [r3, #12] 801115c: 4916 ldr r1, [pc, #88] @ (80111b8 ) 801115e: 4313 orrs r3, r2 8011160: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8011162: 687b ldr r3, [r7, #4] 8011164: 681b ldr r3, [r3, #0] 8011166: f003 0308 and.w r3, r3, #8 801116a: 2b00 cmp r3, #0 801116c: d009 beq.n 8011182 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 801116e: 4b12 ldr r3, [pc, #72] @ (80111b8 ) 8011170: 685b ldr r3, [r3, #4] 8011172: f423 5260 bic.w r2, r3, #14336 @ 0x3800 8011176: 687b ldr r3, [r7, #4] 8011178: 691b ldr r3, [r3, #16] 801117a: 00db lsls r3, r3, #3 801117c: 490e ldr r1, [pc, #56] @ (80111b8 ) 801117e: 4313 orrs r3, r2 8011180: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 8011182: f000 f821 bl 80111c8 8011186: 4602 mov r2, r0 8011188: 4b0b ldr r3, [pc, #44] @ (80111b8 ) 801118a: 685b ldr r3, [r3, #4] 801118c: 091b lsrs r3, r3, #4 801118e: f003 030f and.w r3, r3, #15 8011192: 490a ldr r1, [pc, #40] @ (80111bc ) 8011194: 5ccb ldrb r3, [r1, r3] 8011196: fa22 f303 lsr.w r3, r2, r3 801119a: 4a09 ldr r2, [pc, #36] @ (80111c0 ) 801119c: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 801119e: 4b09 ldr r3, [pc, #36] @ (80111c4 ) 80111a0: 681b ldr r3, [r3, #0] 80111a2: 4618 mov r0, r3 80111a4: f7fd fad2 bl 800e74c return HAL_OK; 80111a8: 2300 movs r3, #0 } 80111aa: 4618 mov r0, r3 80111ac: 3710 adds r7, #16 80111ae: 46bd mov sp, r7 80111b0: bd80 pop {r7, pc} 80111b2: bf00 nop 80111b4: 40022000 .word 0x40022000 80111b8: 40021000 .word 0x40021000 80111bc: 08016bcc .word 0x08016bcc 80111c0: 2000006c .word 0x2000006c 80111c4: 20000070 .word 0x20000070 080111c8 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 80111c8: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 80111cc: b08e sub sp, #56 @ 0x38 80111ce: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 80111d0: 2300 movs r3, #0 80111d2: 62fb str r3, [r7, #44] @ 0x2c 80111d4: 2300 movs r3, #0 80111d6: 62bb str r3, [r7, #40] @ 0x28 80111d8: 2300 movs r3, #0 80111da: 637b str r3, [r7, #52] @ 0x34 80111dc: 2300 movs r3, #0 80111de: 627b str r3, [r7, #36] @ 0x24 uint32_t sysclockfreq = 0U; 80111e0: 2300 movs r3, #0 80111e2: 633b str r3, [r7, #48] @ 0x30 #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; 80111e4: 2300 movs r3, #0 80111e6: 623b str r3, [r7, #32] 80111e8: 2300 movs r3, #0 80111ea: 61fb str r3, [r7, #28] #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 80111ec: 4b4e ldr r3, [pc, #312] @ (8011328 ) 80111ee: 685b ldr r3, [r3, #4] 80111f0: 62fb str r3, [r7, #44] @ 0x2c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 80111f2: 6afb ldr r3, [r7, #44] @ 0x2c 80111f4: f003 030c and.w r3, r3, #12 80111f8: 2b04 cmp r3, #4 80111fa: d002 beq.n 8011202 80111fc: 2b08 cmp r3, #8 80111fe: d003 beq.n 8011208 8011200: e089 b.n 8011316 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 8011202: 4b4a ldr r3, [pc, #296] @ (801132c ) 8011204: 633b str r3, [r7, #48] @ 0x30 break; 8011206: e089 b.n 801131c } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8011208: 6afb ldr r3, [r7, #44] @ 0x2c 801120a: 0c9b lsrs r3, r3, #18 801120c: f003 020f and.w r2, r3, #15 8011210: 4b47 ldr r3, [pc, #284] @ (8011330 ) 8011212: 5c9b ldrb r3, [r3, r2] 8011214: 627b str r3, [r7, #36] @ 0x24 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8011216: 6afb ldr r3, [r7, #44] @ 0x2c 8011218: f403 3380 and.w r3, r3, #65536 @ 0x10000 801121c: 2b00 cmp r3, #0 801121e: d072 beq.n 8011306 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 8011220: 4b41 ldr r3, [pc, #260] @ (8011328 ) 8011222: 6adb ldr r3, [r3, #44] @ 0x2c 8011224: f003 020f and.w r2, r3, #15 8011228: 4b42 ldr r3, [pc, #264] @ (8011334 ) 801122a: 5c9b ldrb r3, [r3, r2] 801122c: 62bb str r3, [r7, #40] @ 0x28 #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /*RCC_CFGR2_PREDIV1*/ #if defined(RCC_CFGR2_PREDIV1SRC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 801122e: 4b3e ldr r3, [pc, #248] @ (8011328 ) 8011230: 6adb ldr r3, [r3, #44] @ 0x2c 8011232: f403 3380 and.w r3, r3, #65536 @ 0x10000 8011236: 2b00 cmp r3, #0 8011238: d053 beq.n 80112e2 { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 801123a: 4b3b ldr r3, [pc, #236] @ (8011328 ) 801123c: 6adb ldr r3, [r3, #44] @ 0x2c 801123e: 091b lsrs r3, r3, #4 8011240: f003 030f and.w r3, r3, #15 8011244: 3301 adds r3, #1 8011246: 623b str r3, [r7, #32] pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 8011248: 4b37 ldr r3, [pc, #220] @ (8011328 ) 801124a: 6adb ldr r3, [r3, #44] @ 0x2c 801124c: 0a1b lsrs r3, r3, #8 801124e: f003 030f and.w r3, r3, #15 8011252: 3302 adds r3, #2 8011254: 61fb str r3, [r7, #28] pllclk = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pll2mul * (uint64_t)pllmul) / ((uint64_t)prediv2 * (uint64_t)prediv)); 8011256: 69fb ldr r3, [r7, #28] 8011258: 2200 movs r2, #0 801125a: 469a mov sl, r3 801125c: 4693 mov fp, r2 801125e: 6a7b ldr r3, [r7, #36] @ 0x24 8011260: 2200 movs r2, #0 8011262: 613b str r3, [r7, #16] 8011264: 617a str r2, [r7, #20] 8011266: 693b ldr r3, [r7, #16] 8011268: fb03 f20b mul.w r2, r3, fp 801126c: 697b ldr r3, [r7, #20] 801126e: fb0a f303 mul.w r3, sl, r3 8011272: 4413 add r3, r2 8011274: 693a ldr r2, [r7, #16] 8011276: fbaa 0102 umull r0, r1, sl, r2 801127a: 440b add r3, r1 801127c: 4619 mov r1, r3 801127e: 4b2b ldr r3, [pc, #172] @ (801132c ) 8011280: fb03 f201 mul.w r2, r3, r1 8011284: 2300 movs r3, #0 8011286: fb00 f303 mul.w r3, r0, r3 801128a: 4413 add r3, r2 801128c: 4a27 ldr r2, [pc, #156] @ (801132c ) 801128e: fba0 4502 umull r4, r5, r0, r2 8011292: 442b add r3, r5 8011294: 461d mov r5, r3 8011296: 6a3b ldr r3, [r7, #32] 8011298: 2200 movs r2, #0 801129a: 60bb str r3, [r7, #8] 801129c: 60fa str r2, [r7, #12] 801129e: 6abb ldr r3, [r7, #40] @ 0x28 80112a0: 2200 movs r2, #0 80112a2: 603b str r3, [r7, #0] 80112a4: 607a str r2, [r7, #4] 80112a6: e9d7 0102 ldrd r0, r1, [r7, #8] 80112aa: 460b mov r3, r1 80112ac: e9d7 ab00 ldrd sl, fp, [r7] 80112b0: 4652 mov r2, sl 80112b2: fb02 f203 mul.w r2, r2, r3 80112b6: 465b mov r3, fp 80112b8: 4684 mov ip, r0 80112ba: fb0c f303 mul.w r3, ip, r3 80112be: 4413 add r3, r2 80112c0: 4602 mov r2, r0 80112c2: 4651 mov r1, sl 80112c4: fba2 8901 umull r8, r9, r2, r1 80112c8: 444b add r3, r9 80112ca: 4699 mov r9, r3 80112cc: 4642 mov r2, r8 80112ce: 464b mov r3, r9 80112d0: 4620 mov r0, r4 80112d2: 4629 mov r1, r5 80112d4: f7f7 ffde bl 8009294 <__aeabi_uldivmod> 80112d8: 4602 mov r2, r0 80112da: 460b mov r3, r1 80112dc: 4613 mov r3, r2 80112de: 637b str r3, [r7, #52] @ 0x34 80112e0: e007 b.n 80112f2 } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80112e2: 6a7b ldr r3, [r7, #36] @ 0x24 80112e4: 4a11 ldr r2, [pc, #68] @ (801132c ) 80112e6: fb03 f202 mul.w r2, r3, r2 80112ea: 6abb ldr r3, [r7, #40] @ 0x28 80112ec: fbb2 f3f3 udiv r3, r2, r3 80112f0: 637b str r3, [r7, #52] @ 0x34 } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 80112f2: 4b0f ldr r3, [pc, #60] @ (8011330 ) 80112f4: 7b5b ldrb r3, [r3, #13] 80112f6: 461a mov r2, r3 80112f8: 6a7b ldr r3, [r7, #36] @ 0x24 80112fa: 4293 cmp r3, r2 80112fc: d108 bne.n 8011310 { pllclk = pllclk / 2; 80112fe: 6b7b ldr r3, [r7, #52] @ 0x34 8011300: 085b lsrs r3, r3, #1 8011302: 637b str r3, [r7, #52] @ 0x34 8011304: e004 b.n 8011310 #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8011306: 6a7b ldr r3, [r7, #36] @ 0x24 8011308: 4a0b ldr r2, [pc, #44] @ (8011338 ) 801130a: fb02 f303 mul.w r3, r2, r3 801130e: 637b str r3, [r7, #52] @ 0x34 } sysclockfreq = pllclk; 8011310: 6b7b ldr r3, [r7, #52] @ 0x34 8011312: 633b str r3, [r7, #48] @ 0x30 break; 8011314: e002 b.n 801131c } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 8011316: 4b09 ldr r3, [pc, #36] @ (801133c ) 8011318: 633b str r3, [r7, #48] @ 0x30 break; 801131a: bf00 nop } } return sysclockfreq; 801131c: 6b3b ldr r3, [r7, #48] @ 0x30 } 801131e: 4618 mov r0, r3 8011320: 3738 adds r7, #56 @ 0x38 8011322: 46bd mov sp, r7 8011324: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 8011328: 40021000 .word 0x40021000 801132c: 017d7840 .word 0x017d7840 8011330: 08016be4 .word 0x08016be4 8011334: 08016bf4 .word 0x08016bf4 8011338: 003d0900 .word 0x003d0900 801133c: 007a1200 .word 0x007a1200 08011340 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 8011340: b480 push {r7} 8011342: af00 add r7, sp, #0 return SystemCoreClock; 8011344: 4b02 ldr r3, [pc, #8] @ (8011350 ) 8011346: 681b ldr r3, [r3, #0] } 8011348: 4618 mov r0, r3 801134a: 46bd mov sp, r7 801134c: bc80 pop {r7} 801134e: 4770 bx lr 8011350: 2000006c .word 0x2000006c 08011354 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 8011354: b580 push {r7, lr} 8011356: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8011358: f7ff fff2 bl 8011340 801135c: 4602 mov r2, r0 801135e: 4b05 ldr r3, [pc, #20] @ (8011374 ) 8011360: 685b ldr r3, [r3, #4] 8011362: 0a1b lsrs r3, r3, #8 8011364: f003 0307 and.w r3, r3, #7 8011368: 4903 ldr r1, [pc, #12] @ (8011378 ) 801136a: 5ccb ldrb r3, [r1, r3] 801136c: fa22 f303 lsr.w r3, r2, r3 } 8011370: 4618 mov r0, r3 8011372: bd80 pop {r7, pc} 8011374: 40021000 .word 0x40021000 8011378: 08016bdc .word 0x08016bdc 0801137c : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 801137c: b580 push {r7, lr} 801137e: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8011380: f7ff ffde bl 8011340 8011384: 4602 mov r2, r0 8011386: 4b05 ldr r3, [pc, #20] @ (801139c ) 8011388: 685b ldr r3, [r3, #4] 801138a: 0adb lsrs r3, r3, #11 801138c: f003 0307 and.w r3, r3, #7 8011390: 4903 ldr r1, [pc, #12] @ (80113a0 ) 8011392: 5ccb ldrb r3, [r1, r3] 8011394: fa22 f303 lsr.w r3, r2, r3 } 8011398: 4618 mov r0, r3 801139a: bd80 pop {r7, pc} 801139c: 40021000 .word 0x40021000 80113a0: 08016bdc .word 0x08016bdc 080113a4 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 80113a4: b480 push {r7} 80113a6: b085 sub sp, #20 80113a8: af00 add r7, sp, #0 80113aa: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 80113ac: 4b0a ldr r3, [pc, #40] @ (80113d8 ) 80113ae: 681b ldr r3, [r3, #0] 80113b0: 4a0a ldr r2, [pc, #40] @ (80113dc ) 80113b2: fba2 2303 umull r2, r3, r2, r3 80113b6: 0a5b lsrs r3, r3, #9 80113b8: 687a ldr r2, [r7, #4] 80113ba: fb02 f303 mul.w r3, r2, r3 80113be: 60fb str r3, [r7, #12] do { __NOP(); 80113c0: bf00 nop } while (Delay --); 80113c2: 68fb ldr r3, [r7, #12] 80113c4: 1e5a subs r2, r3, #1 80113c6: 60fa str r2, [r7, #12] 80113c8: 2b00 cmp r3, #0 80113ca: d1f9 bne.n 80113c0 } 80113cc: bf00 nop 80113ce: bf00 nop 80113d0: 3714 adds r7, #20 80113d2: 46bd mov sp, r7 80113d4: bc80 pop {r7} 80113d6: 4770 bx lr 80113d8: 2000006c .word 0x2000006c 80113dc: 10624dd3 .word 0x10624dd3 080113e0 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 80113e0: b580 push {r7, lr} 80113e2: b088 sub sp, #32 80113e4: af00 add r7, sp, #0 80113e6: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 80113e8: 2300 movs r3, #0 80113ea: 617b str r3, [r7, #20] 80113ec: 2300 movs r3, #0 80113ee: 613b str r3, [r7, #16] #if defined(STM32F105xC) || defined(STM32F107xC) uint32_t pllactive = 0U; 80113f0: 2300 movs r3, #0 80113f2: 61fb str r3, [r7, #28] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 80113f4: 687b ldr r3, [r7, #4] 80113f6: 681b ldr r3, [r3, #0] 80113f8: f003 0301 and.w r3, r3, #1 80113fc: 2b00 cmp r3, #0 80113fe: d07d beq.n 80114fc { FlagStatus pwrclkchanged = RESET; 8011400: 2300 movs r3, #0 8011402: 76fb strb r3, [r7, #27] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8011404: 4b8b ldr r3, [pc, #556] @ (8011634 ) 8011406: 69db ldr r3, [r3, #28] 8011408: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 801140c: 2b00 cmp r3, #0 801140e: d10d bne.n 801142c { __HAL_RCC_PWR_CLK_ENABLE(); 8011410: 4b88 ldr r3, [pc, #544] @ (8011634 ) 8011412: 69db ldr r3, [r3, #28] 8011414: 4a87 ldr r2, [pc, #540] @ (8011634 ) 8011416: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 801141a: 61d3 str r3, [r2, #28] 801141c: 4b85 ldr r3, [pc, #532] @ (8011634 ) 801141e: 69db ldr r3, [r3, #28] 8011420: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8011424: 60fb str r3, [r7, #12] 8011426: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; 8011428: 2301 movs r3, #1 801142a: 76fb strb r3, [r7, #27] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 801142c: 4b82 ldr r3, [pc, #520] @ (8011638 ) 801142e: 681b ldr r3, [r3, #0] 8011430: f403 7380 and.w r3, r3, #256 @ 0x100 8011434: 2b00 cmp r3, #0 8011436: d118 bne.n 801146a { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8011438: 4b7f ldr r3, [pc, #508] @ (8011638 ) 801143a: 681b ldr r3, [r3, #0] 801143c: 4a7e ldr r2, [pc, #504] @ (8011638 ) 801143e: f443 7380 orr.w r3, r3, #256 @ 0x100 8011442: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8011444: f7fd f9c4 bl 800e7d0 8011448: 6178 str r0, [r7, #20] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 801144a: e008 b.n 801145e { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 801144c: f7fd f9c0 bl 800e7d0 8011450: 4602 mov r2, r0 8011452: 697b ldr r3, [r7, #20] 8011454: 1ad3 subs r3, r2, r3 8011456: 2b64 cmp r3, #100 @ 0x64 8011458: d901 bls.n 801145e { return HAL_TIMEOUT; 801145a: 2303 movs r3, #3 801145c: e0e5 b.n 801162a while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 801145e: 4b76 ldr r3, [pc, #472] @ (8011638 ) 8011460: 681b ldr r3, [r3, #0] 8011462: f403 7380 and.w r3, r3, #256 @ 0x100 8011466: 2b00 cmp r3, #0 8011468: d0f0 beq.n 801144c } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 801146a: 4b72 ldr r3, [pc, #456] @ (8011634 ) 801146c: 6a1b ldr r3, [r3, #32] 801146e: f403 7340 and.w r3, r3, #768 @ 0x300 8011472: 613b str r3, [r7, #16] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8011474: 693b ldr r3, [r7, #16] 8011476: 2b00 cmp r3, #0 8011478: d02e beq.n 80114d8 801147a: 687b ldr r3, [r7, #4] 801147c: 685b ldr r3, [r3, #4] 801147e: f403 7340 and.w r3, r3, #768 @ 0x300 8011482: 693a ldr r2, [r7, #16] 8011484: 429a cmp r2, r3 8011486: d027 beq.n 80114d8 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8011488: 4b6a ldr r3, [pc, #424] @ (8011634 ) 801148a: 6a1b ldr r3, [r3, #32] 801148c: f423 7340 bic.w r3, r3, #768 @ 0x300 8011490: 613b str r3, [r7, #16] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8011492: 4b6a ldr r3, [pc, #424] @ (801163c ) 8011494: 2201 movs r2, #1 8011496: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8011498: 4b68 ldr r3, [pc, #416] @ (801163c ) 801149a: 2200 movs r2, #0 801149c: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 801149e: 4a65 ldr r2, [pc, #404] @ (8011634 ) 80114a0: 693b ldr r3, [r7, #16] 80114a2: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 80114a4: 693b ldr r3, [r7, #16] 80114a6: f003 0301 and.w r3, r3, #1 80114aa: 2b00 cmp r3, #0 80114ac: d014 beq.n 80114d8 { /* Get Start Tick */ tickstart = HAL_GetTick(); 80114ae: f7fd f98f bl 800e7d0 80114b2: 6178 str r0, [r7, #20] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80114b4: e00a b.n 80114cc { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80114b6: f7fd f98b bl 800e7d0 80114ba: 4602 mov r2, r0 80114bc: 697b ldr r3, [r7, #20] 80114be: 1ad3 subs r3, r2, r3 80114c0: f241 3288 movw r2, #5000 @ 0x1388 80114c4: 4293 cmp r3, r2 80114c6: d901 bls.n 80114cc { return HAL_TIMEOUT; 80114c8: 2303 movs r3, #3 80114ca: e0ae b.n 801162a while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80114cc: 4b59 ldr r3, [pc, #356] @ (8011634 ) 80114ce: 6a1b ldr r3, [r3, #32] 80114d0: f003 0302 and.w r3, r3, #2 80114d4: 2b00 cmp r3, #0 80114d6: d0ee beq.n 80114b6 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 80114d8: 4b56 ldr r3, [pc, #344] @ (8011634 ) 80114da: 6a1b ldr r3, [r3, #32] 80114dc: f423 7240 bic.w r2, r3, #768 @ 0x300 80114e0: 687b ldr r3, [r7, #4] 80114e2: 685b ldr r3, [r3, #4] 80114e4: 4953 ldr r1, [pc, #332] @ (8011634 ) 80114e6: 4313 orrs r3, r2 80114e8: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 80114ea: 7efb ldrb r3, [r7, #27] 80114ec: 2b01 cmp r3, #1 80114ee: d105 bne.n 80114fc { __HAL_RCC_PWR_CLK_DISABLE(); 80114f0: 4b50 ldr r3, [pc, #320] @ (8011634 ) 80114f2: 69db ldr r3, [r3, #28] 80114f4: 4a4f ldr r2, [pc, #316] @ (8011634 ) 80114f6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 80114fa: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 80114fc: 687b ldr r3, [r7, #4] 80114fe: 681b ldr r3, [r3, #0] 8011500: f003 0302 and.w r3, r3, #2 8011504: 2b00 cmp r3, #0 8011506: d008 beq.n 801151a { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8011508: 4b4a ldr r3, [pc, #296] @ (8011634 ) 801150a: 685b ldr r3, [r3, #4] 801150c: f423 4240 bic.w r2, r3, #49152 @ 0xc000 8011510: 687b ldr r3, [r7, #4] 8011512: 689b ldr r3, [r3, #8] 8011514: 4947 ldr r1, [pc, #284] @ (8011634 ) 8011516: 4313 orrs r3, r2 8011518: 604b str r3, [r1, #4] } #if defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ I2S2 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S2) == RCC_PERIPHCLK_I2S2) 801151a: 687b ldr r3, [r7, #4] 801151c: 681b ldr r3, [r3, #0] 801151e: f003 0304 and.w r3, r3, #4 8011522: 2b00 cmp r3, #0 8011524: d008 beq.n 8011538 { /* Check the parameters */ assert_param(IS_RCC_I2S2CLKSOURCE(PeriphClkInit->I2s2ClockSelection)); /* Configure the I2S2 clock source */ __HAL_RCC_I2S2_CONFIG(PeriphClkInit->I2s2ClockSelection); 8011526: 4b43 ldr r3, [pc, #268] @ (8011634 ) 8011528: 6adb ldr r3, [r3, #44] @ 0x2c 801152a: f423 3200 bic.w r2, r3, #131072 @ 0x20000 801152e: 687b ldr r3, [r7, #4] 8011530: 68db ldr r3, [r3, #12] 8011532: 4940 ldr r1, [pc, #256] @ (8011634 ) 8011534: 4313 orrs r3, r2 8011536: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ I2S3 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S3) == RCC_PERIPHCLK_I2S3) 8011538: 687b ldr r3, [r7, #4] 801153a: 681b ldr r3, [r3, #0] 801153c: f003 0308 and.w r3, r3, #8 8011540: 2b00 cmp r3, #0 8011542: d008 beq.n 8011556 { /* Check the parameters */ assert_param(IS_RCC_I2S3CLKSOURCE(PeriphClkInit->I2s3ClockSelection)); /* Configure the I2S3 clock source */ __HAL_RCC_I2S3_CONFIG(PeriphClkInit->I2s3ClockSelection); 8011544: 4b3b ldr r3, [pc, #236] @ (8011634 ) 8011546: 6adb ldr r3, [r3, #44] @ 0x2c 8011548: f423 2280 bic.w r2, r3, #262144 @ 0x40000 801154c: 687b ldr r3, [r7, #4] 801154e: 691b ldr r3, [r3, #16] 8011550: 4938 ldr r1, [pc, #224] @ (8011634 ) 8011552: 4313 orrs r3, r2 8011554: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ PLL I2S Configuration ----------------------*/ /* Check that PLLI2S need to be enabled */ if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S2SRC) || HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S3SRC)) 8011556: 4b37 ldr r3, [pc, #220] @ (8011634 ) 8011558: 6adb ldr r3, [r3, #44] @ 0x2c 801155a: f403 3300 and.w r3, r3, #131072 @ 0x20000 801155e: 2b00 cmp r3, #0 8011560: d105 bne.n 801156e 8011562: 4b34 ldr r3, [pc, #208] @ (8011634 ) 8011564: 6adb ldr r3, [r3, #44] @ 0x2c 8011566: f403 2380 and.w r3, r3, #262144 @ 0x40000 801156a: 2b00 cmp r3, #0 801156c: d001 beq.n 8011572 { /* Update flag to indicate that PLL I2S should be active */ pllactive = 1; 801156e: 2301 movs r3, #1 8011570: 61fb str r3, [r7, #28] } /* Check if PLL I2S need to be enabled */ if (pllactive == 1) 8011572: 69fb ldr r3, [r7, #28] 8011574: 2b01 cmp r3, #1 8011576: d148 bne.n 801160a { /* Enable PLL I2S only if not active */ if (HAL_IS_BIT_CLR(RCC->CR, RCC_CR_PLL3ON)) 8011578: 4b2e ldr r3, [pc, #184] @ (8011634 ) 801157a: 681b ldr r3, [r3, #0] 801157c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8011580: 2b00 cmp r3, #0 8011582: d138 bne.n 80115f6 assert_param(IS_RCC_PLLI2S_MUL(PeriphClkInit->PLLI2S.PLLI2SMUL)); assert_param(IS_RCC_HSE_PREDIV2(PeriphClkInit->PLLI2S.HSEPrediv2Value)); /* Prediv2 can be written only when the PLL2 is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 8011584: 4b2b ldr r3, [pc, #172] @ (8011634 ) 8011586: 681b ldr r3, [r3, #0] 8011588: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 801158c: 2b00 cmp r3, #0 801158e: d009 beq.n 80115a4 (__HAL_RCC_HSE_GET_PREDIV2() != PeriphClkInit->PLLI2S.HSEPrediv2Value)) 8011590: 4b28 ldr r3, [pc, #160] @ (8011634 ) 8011592: 6adb ldr r3, [r3, #44] @ 0x2c 8011594: f003 02f0 and.w r2, r3, #240 @ 0xf0 8011598: 687b ldr r3, [r7, #4] 801159a: 699b ldr r3, [r3, #24] if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 801159c: 429a cmp r2, r3 801159e: d001 beq.n 80115a4 { return HAL_ERROR; 80115a0: 2301 movs r3, #1 80115a2: e042 b.n 801162a } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(PeriphClkInit->PLLI2S.HSEPrediv2Value); 80115a4: 4b23 ldr r3, [pc, #140] @ (8011634 ) 80115a6: 6adb ldr r3, [r3, #44] @ 0x2c 80115a8: f023 02f0 bic.w r2, r3, #240 @ 0xf0 80115ac: 687b ldr r3, [r7, #4] 80115ae: 699b ldr r3, [r3, #24] 80115b0: 4920 ldr r1, [pc, #128] @ (8011634 ) 80115b2: 4313 orrs r3, r2 80115b4: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLLI2S multiplication factors. */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SMUL); 80115b6: 4b1f ldr r3, [pc, #124] @ (8011634 ) 80115b8: 6adb ldr r3, [r3, #44] @ 0x2c 80115ba: f423 4270 bic.w r2, r3, #61440 @ 0xf000 80115be: 687b ldr r3, [r7, #4] 80115c0: 695b ldr r3, [r3, #20] 80115c2: 491c ldr r1, [pc, #112] @ (8011634 ) 80115c4: 4313 orrs r3, r2 80115c6: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLLI2S. */ __HAL_RCC_PLLI2S_ENABLE(); 80115c8: 4b1d ldr r3, [pc, #116] @ (8011640 ) 80115ca: 2201 movs r2, #1 80115cc: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 80115ce: f7fd f8ff bl 800e7d0 80115d2: 6178 str r0, [r7, #20] /* Wait till PLLI2S is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 80115d4: e008 b.n 80115e8 { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 80115d6: f7fd f8fb bl 800e7d0 80115da: 4602 mov r2, r0 80115dc: 697b ldr r3, [r7, #20] 80115de: 1ad3 subs r3, r2, r3 80115e0: 2b64 cmp r3, #100 @ 0x64 80115e2: d901 bls.n 80115e8 { return HAL_TIMEOUT; 80115e4: 2303 movs r3, #3 80115e6: e020 b.n 801162a while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 80115e8: 4b12 ldr r3, [pc, #72] @ (8011634 ) 80115ea: 681b ldr r3, [r3, #0] 80115ec: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 80115f0: 2b00 cmp r3, #0 80115f2: d0f0 beq.n 80115d6 80115f4: e009 b.n 801160a } } else { /* Return an error only if user wants to change the PLLI2SMUL whereas PLLI2S is active */ if (READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL3MUL) != PeriphClkInit->PLLI2S.PLLI2SMUL) 80115f6: 4b0f ldr r3, [pc, #60] @ (8011634 ) 80115f8: 6adb ldr r3, [r3, #44] @ 0x2c 80115fa: f403 4270 and.w r2, r3, #61440 @ 0xf000 80115fe: 687b ldr r3, [r7, #4] 8011600: 695b ldr r3, [r3, #20] 8011602: 429a cmp r2, r3 8011604: d001 beq.n 801160a { return HAL_ERROR; 8011606: 2301 movs r3, #1 8011608: e00f b.n 801162a #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 801160a: 687b ldr r3, [r7, #4] 801160c: 681b ldr r3, [r3, #0] 801160e: f003 0310 and.w r3, r3, #16 8011612: 2b00 cmp r3, #0 8011614: d008 beq.n 8011628 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8011616: 4b07 ldr r3, [pc, #28] @ (8011634 ) 8011618: 685b ldr r3, [r3, #4] 801161a: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 801161e: 687b ldr r3, [r7, #4] 8011620: 69db ldr r3, [r3, #28] 8011622: 4904 ldr r1, [pc, #16] @ (8011634 ) 8011624: 4313 orrs r3, r2 8011626: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8011628: 2300 movs r3, #0 } 801162a: 4618 mov r0, r3 801162c: 3720 adds r7, #32 801162e: 46bd mov sp, r7 8011630: bd80 pop {r7, pc} 8011632: bf00 nop 8011634: 40021000 .word 0x40021000 8011638: 40007000 .word 0x40007000 801163c: 42420440 .word 0x42420440 8011640: 42420070 .word 0x42420070 08011644 : * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock @endif * @retval Frequency in Hz (0: means that no available frequency for the peripheral) */ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) { 8011644: b580 push {r7, lr} 8011646: b08a sub sp, #40 @ 0x28 8011648: af00 add r7, sp, #0 801164a: 6078 str r0, [r7, #4] #if defined(STM32F105xC) || defined(STM32F107xC) static const uint8_t aPLLMULFactorTable[14U] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; static const uint8_t aPredivFactorTable[16U] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; 801164c: 2300 movs r3, #0 801164e: 61fb str r3, [r7, #28] 8011650: 2300 movs r3, #0 8011652: 627b str r3, [r7, #36] @ 0x24 8011654: 2300 movs r3, #0 8011656: 61bb str r3, [r7, #24] uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U; 8011658: 2300 movs r3, #0 801165a: 617b str r3, [r7, #20] 801165c: 2300 movs r3, #0 801165e: 613b str r3, [r7, #16] 8011660: 2300 movs r3, #0 8011662: 60fb str r3, [r7, #12] static const uint8_t aPLLMULFactorTable[16U] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; static const uint8_t aPredivFactorTable[2U] = {1, 2}; uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG */ uint32_t temp_reg = 0U, frequency = 0U; 8011664: 2300 movs r3, #0 8011666: 60bb str r3, [r7, #8] 8011668: 2300 movs r3, #0 801166a: 623b str r3, [r7, #32] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); switch (PeriphClk) 801166c: 687b ldr r3, [r7, #4] 801166e: 3b01 subs r3, #1 8011670: 2b0f cmp r3, #15 8011672: f200 811d bhi.w 80118b0 8011676: a201 add r2, pc, #4 @ (adr r2, 801167c ) 8011678: f852 f023 ldr.w pc, [r2, r3, lsl #2] 801167c: 08011831 .word 0x08011831 8011680: 08011895 .word 0x08011895 8011684: 080118b1 .word 0x080118b1 8011688: 0801178f .word 0x0801178f 801168c: 080118b1 .word 0x080118b1 8011690: 080118b1 .word 0x080118b1 8011694: 080118b1 .word 0x080118b1 8011698: 080117e1 .word 0x080117e1 801169c: 080118b1 .word 0x080118b1 80116a0: 080118b1 .word 0x080118b1 80116a4: 080118b1 .word 0x080118b1 80116a8: 080118b1 .word 0x080118b1 80116ac: 080118b1 .word 0x080118b1 80116b0: 080118b1 .word 0x080118b1 80116b4: 080118b1 .word 0x080118b1 80116b8: 080116bd .word 0x080116bd || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) case RCC_PERIPHCLK_USB: { /* Get RCC configuration ------------------------------------------------------*/ temp_reg = RCC->CFGR; 80116bc: 4b83 ldr r3, [pc, #524] @ (80118cc ) 80116be: 685b ldr r3, [r3, #4] 80116c0: 60bb str r3, [r7, #8] /* Check if PLL is enabled */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLON)) 80116c2: 4b82 ldr r3, [pc, #520] @ (80118cc ) 80116c4: 681b ldr r3, [r3, #0] 80116c6: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 80116ca: 2b00 cmp r3, #0 80116cc: f000 80f2 beq.w 80118b4 { pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80116d0: 68bb ldr r3, [r7, #8] 80116d2: 0c9b lsrs r3, r3, #18 80116d4: f003 030f and.w r3, r3, #15 80116d8: 4a7d ldr r2, [pc, #500] @ (80118d0 ) 80116da: 5cd3 ldrb r3, [r2, r3] 80116dc: 61bb str r3, [r7, #24] if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80116de: 68bb ldr r3, [r7, #8] 80116e0: f403 3380 and.w r3, r3, #65536 @ 0x10000 80116e4: 2b00 cmp r3, #0 80116e6: d03b beq.n 8011760 { #if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\ || defined(STM32F100xE) prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 80116e8: 4b78 ldr r3, [pc, #480] @ (80118cc ) 80116ea: 6adb ldr r3, [r3, #44] @ 0x2c 80116ec: f003 030f and.w r3, r3, #15 80116f0: 4a78 ldr r2, [pc, #480] @ (80118d4 ) 80116f2: 5cd3 ldrb r3, [r2, r3] 80116f4: 61fb str r3, [r7, #28] #else prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ #if defined(STM32F105xC) || defined(STM32F107xC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 80116f6: 4b75 ldr r3, [pc, #468] @ (80118cc ) 80116f8: 6adb ldr r3, [r3, #44] @ 0x2c 80116fa: f403 3380 and.w r3, r3, #65536 @ 0x10000 80116fe: 2b00 cmp r3, #0 8011700: d01c beq.n 801173c { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 8011702: 4b72 ldr r3, [pc, #456] @ (80118cc ) 8011704: 6adb ldr r3, [r3, #44] @ 0x2c 8011706: 091b lsrs r3, r3, #4 8011708: f003 030f and.w r3, r3, #15 801170c: 3301 adds r3, #1 801170e: 60fb str r3, [r7, #12] pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 8011710: 4b6e ldr r3, [pc, #440] @ (80118cc ) 8011712: 6adb ldr r3, [r3, #44] @ 0x2c 8011714: 0a1b lsrs r3, r3, #8 8011716: f003 030f and.w r3, r3, #15 801171a: 3302 adds r3, #2 801171c: 617b str r3, [r7, #20] pllclk = (uint32_t)((((HSE_VALUE / prediv2) * pll2mul) / prediv1) * pllmul); 801171e: 4a6e ldr r2, [pc, #440] @ (80118d8 ) 8011720: 68fb ldr r3, [r7, #12] 8011722: fbb2 f3f3 udiv r3, r2, r3 8011726: 697a ldr r2, [r7, #20] 8011728: fb03 f202 mul.w r2, r3, r2 801172c: 69fb ldr r3, [r7, #28] 801172e: fbb2 f2f3 udiv r2, r2, r3 8011732: 69bb ldr r3, [r7, #24] 8011734: fb02 f303 mul.w r3, r2, r3 8011738: 627b str r3, [r7, #36] @ 0x24 801173a: e007 b.n 801174c } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 801173c: 4a66 ldr r2, [pc, #408] @ (80118d8 ) 801173e: 69fb ldr r3, [r7, #28] 8011740: fbb2 f2f3 udiv r2, r2, r3 8011744: 69bb ldr r3, [r7, #24] 8011746: fb02 f303 mul.w r3, r2, r3 801174a: 627b str r3, [r7, #36] @ 0x24 } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 801174c: 4b60 ldr r3, [pc, #384] @ (80118d0 ) 801174e: 7b5b ldrb r3, [r3, #13] 8011750: 461a mov r2, r3 8011752: 69bb ldr r3, [r7, #24] 8011754: 4293 cmp r3, r2 8011756: d108 bne.n 801176a { pllclk = pllclk / 2; 8011758: 6a7b ldr r3, [r7, #36] @ 0x24 801175a: 085b lsrs r3, r3, #1 801175c: 627b str r3, [r7, #36] @ 0x24 801175e: e004 b.n 801176a #endif /* STM32F105xC || STM32F107xC */ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8011760: 69bb ldr r3, [r7, #24] 8011762: 4a5e ldr r2, [pc, #376] @ (80118dc ) 8011764: fb02 f303 mul.w r3, r2, r3 8011768: 627b str r3, [r7, #36] @ 0x24 } /* Calcul of the USB frequency*/ #if defined(STM32F105xC) || defined(STM32F107xC) /* USBCLK = PLLVCO = (2 x PLLCLK) / USB prescaler */ if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL_DIV2) 801176a: 4b58 ldr r3, [pc, #352] @ (80118cc ) 801176c: 685b ldr r3, [r3, #4] 801176e: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8011772: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8011776: d102 bne.n 801177e { /* Prescaler of 2 selected for USB */ frequency = pllclk; 8011778: 6a7b ldr r3, [r7, #36] @ 0x24 801177a: 623b str r3, [r7, #32] /* Prescaler of 1.5 selected for USB */ frequency = (pllclk * 2) / 3; } #endif } break; 801177c: e09a b.n 80118b4 frequency = (2 * pllclk) / 3; 801177e: 6a7b ldr r3, [r7, #36] @ 0x24 8011780: 005b lsls r3, r3, #1 8011782: 4a57 ldr r2, [pc, #348] @ (80118e0 ) 8011784: fba2 2303 umull r2, r3, r2, r3 8011788: 085b lsrs r3, r3, #1 801178a: 623b str r3, [r7, #32] break; 801178c: e092 b.n 80118b4 { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S2_SOURCE() == RCC_I2S2CLKSOURCE_SYSCLK) 801178e: 4b4f ldr r3, [pc, #316] @ (80118cc ) 8011790: 6adb ldr r3, [r3, #44] @ 0x2c 8011792: f403 3300 and.w r3, r3, #131072 @ 0x20000 8011796: 2b00 cmp r3, #0 8011798: d103 bne.n 80117a2 { /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); 801179a: f7ff fd15 bl 80111c8 801179e: 6238 str r0, [r7, #32] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 80117a0: e08a b.n 80118b8 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 80117a2: 4b4a ldr r3, [pc, #296] @ (80118cc ) 80117a4: 681b ldr r3, [r3, #0] 80117a6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80117aa: 2b00 cmp r3, #0 80117ac: f000 8084 beq.w 80118b8 prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 80117b0: 4b46 ldr r3, [pc, #280] @ (80118cc ) 80117b2: 6adb ldr r3, [r3, #44] @ 0x2c 80117b4: 091b lsrs r3, r3, #4 80117b6: f003 030f and.w r3, r3, #15 80117ba: 3301 adds r3, #1 80117bc: 60fb str r3, [r7, #12] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 80117be: 4b43 ldr r3, [pc, #268] @ (80118cc ) 80117c0: 6adb ldr r3, [r3, #44] @ 0x2c 80117c2: 0b1b lsrs r3, r3, #12 80117c4: f003 030f and.w r3, r3, #15 80117c8: 3302 adds r3, #2 80117ca: 613b str r3, [r7, #16] frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 80117cc: 4a42 ldr r2, [pc, #264] @ (80118d8 ) 80117ce: 68fb ldr r3, [r7, #12] 80117d0: fbb2 f3f3 udiv r3, r2, r3 80117d4: 693a ldr r2, [r7, #16] 80117d6: fb02 f303 mul.w r3, r2, r3 80117da: 005b lsls r3, r3, #1 80117dc: 623b str r3, [r7, #32] break; 80117de: e06b b.n 80118b8 { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S3_SOURCE() == RCC_I2S3CLKSOURCE_SYSCLK) 80117e0: 4b3a ldr r3, [pc, #232] @ (80118cc ) 80117e2: 6adb ldr r3, [r3, #44] @ 0x2c 80117e4: f403 2380 and.w r3, r3, #262144 @ 0x40000 80117e8: 2b00 cmp r3, #0 80117ea: d103 bne.n 80117f4 { /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); 80117ec: f7ff fcec bl 80111c8 80117f0: 6238 str r0, [r7, #32] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 80117f2: e063 b.n 80118bc if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 80117f4: 4b35 ldr r3, [pc, #212] @ (80118cc ) 80117f6: 681b ldr r3, [r3, #0] 80117f8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80117fc: 2b00 cmp r3, #0 80117fe: d05d beq.n 80118bc prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 8011800: 4b32 ldr r3, [pc, #200] @ (80118cc ) 8011802: 6adb ldr r3, [r3, #44] @ 0x2c 8011804: 091b lsrs r3, r3, #4 8011806: f003 030f and.w r3, r3, #15 801180a: 3301 adds r3, #1 801180c: 60fb str r3, [r7, #12] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 801180e: 4b2f ldr r3, [pc, #188] @ (80118cc ) 8011810: 6adb ldr r3, [r3, #44] @ 0x2c 8011812: 0b1b lsrs r3, r3, #12 8011814: f003 030f and.w r3, r3, #15 8011818: 3302 adds r3, #2 801181a: 613b str r3, [r7, #16] frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 801181c: 4a2e ldr r2, [pc, #184] @ (80118d8 ) 801181e: 68fb ldr r3, [r7, #12] 8011820: fbb2 f3f3 udiv r3, r2, r3 8011824: 693a ldr r2, [r7, #16] 8011826: fb02 f303 mul.w r3, r2, r3 801182a: 005b lsls r3, r3, #1 801182c: 623b str r3, [r7, #32] break; 801182e: e045 b.n 80118bc } #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ case RCC_PERIPHCLK_RTC: { /* Get RCC BDCR configuration ------------------------------------------------------*/ temp_reg = RCC->BDCR; 8011830: 4b26 ldr r3, [pc, #152] @ (80118cc ) 8011832: 6a1b ldr r3, [r3, #32] 8011834: 60bb str r3, [r7, #8] /* Check if LSE is ready if RTC clock selection is LSE */ if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) 8011836: 68bb ldr r3, [r7, #8] 8011838: f403 7340 and.w r3, r3, #768 @ 0x300 801183c: f5b3 7f80 cmp.w r3, #256 @ 0x100 8011840: d108 bne.n 8011854 8011842: 68bb ldr r3, [r7, #8] 8011844: f003 0302 and.w r3, r3, #2 8011848: 2b00 cmp r3, #0 801184a: d003 beq.n 8011854 { frequency = LSE_VALUE; 801184c: f44f 4300 mov.w r3, #32768 @ 0x8000 8011850: 623b str r3, [r7, #32] 8011852: e01e b.n 8011892 } /* Check if LSI is ready if RTC clock selection is LSI */ else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) 8011854: 68bb ldr r3, [r7, #8] 8011856: f403 7340 and.w r3, r3, #768 @ 0x300 801185a: f5b3 7f00 cmp.w r3, #512 @ 0x200 801185e: d109 bne.n 8011874 8011860: 4b1a ldr r3, [pc, #104] @ (80118cc ) 8011862: 6a5b ldr r3, [r3, #36] @ 0x24 8011864: f003 0302 and.w r3, r3, #2 8011868: 2b00 cmp r3, #0 801186a: d003 beq.n 8011874 { frequency = LSI_VALUE; 801186c: f649 4340 movw r3, #40000 @ 0x9c40 8011870: 623b str r3, [r7, #32] 8011872: e00e b.n 8011892 } else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) 8011874: 68bb ldr r3, [r7, #8] 8011876: f403 7340 and.w r3, r3, #768 @ 0x300 801187a: f5b3 7f40 cmp.w r3, #768 @ 0x300 801187e: d11f bne.n 80118c0 8011880: 4b12 ldr r3, [pc, #72] @ (80118cc ) 8011882: 681b ldr r3, [r3, #0] 8011884: f403 3300 and.w r3, r3, #131072 @ 0x20000 8011888: 2b00 cmp r3, #0 801188a: d019 beq.n 80118c0 { frequency = HSE_VALUE / 128U; 801188c: 4b15 ldr r3, [pc, #84] @ (80118e4 ) 801188e: 623b str r3, [r7, #32] /* Clock not enabled for RTC*/ else { /* nothing to do: frequency already initialized to 0U */ } break; 8011890: e016 b.n 80118c0 8011892: e015 b.n 80118c0 } case RCC_PERIPHCLK_ADC: { frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); 8011894: f7ff fd72 bl 801137c 8011898: 4602 mov r2, r0 801189a: 4b0c ldr r3, [pc, #48] @ (80118cc ) 801189c: 685b ldr r3, [r3, #4] 801189e: 0b9b lsrs r3, r3, #14 80118a0: f003 0303 and.w r3, r3, #3 80118a4: 3301 adds r3, #1 80118a6: 005b lsls r3, r3, #1 80118a8: fbb2 f3f3 udiv r3, r2, r3 80118ac: 623b str r3, [r7, #32] break; 80118ae: e008 b.n 80118c2 } default: { break; 80118b0: bf00 nop 80118b2: e006 b.n 80118c2 break; 80118b4: bf00 nop 80118b6: e004 b.n 80118c2 break; 80118b8: bf00 nop 80118ba: e002 b.n 80118c2 break; 80118bc: bf00 nop 80118be: e000 b.n 80118c2 break; 80118c0: bf00 nop } } return (frequency); 80118c2: 6a3b ldr r3, [r7, #32] } 80118c4: 4618 mov r0, r3 80118c6: 3728 adds r7, #40 @ 0x28 80118c8: 46bd mov sp, r7 80118ca: bd80 pop {r7, pc} 80118cc: 40021000 .word 0x40021000 80118d0: 08016c04 .word 0x08016c04 80118d4: 08016c14 .word 0x08016c14 80118d8: 017d7840 .word 0x017d7840 80118dc: 003d0900 .word 0x003d0900 80118e0: aaaaaaab .word 0xaaaaaaab 80118e4: 0002faf0 .word 0x0002faf0 080118e8 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { 80118e8: b580 push {r7, lr} 80118ea: b084 sub sp, #16 80118ec: af00 add r7, sp, #0 80118ee: 6078 str r0, [r7, #4] uint32_t prescaler = 0U; 80118f0: 2300 movs r3, #0 80118f2: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 80118f4: 687b ldr r3, [r7, #4] 80118f6: 2b00 cmp r3, #0 80118f8: d101 bne.n 80118fe { return HAL_ERROR; 80118fa: 2301 movs r3, #1 80118fc: e07a b.n 80119f4 { hrtc->MspDeInitCallback = HAL_RTC_MspDeInit; } } #else if (hrtc->State == HAL_RTC_STATE_RESET) 80118fe: 687b ldr r3, [r7, #4] 8011900: 7c5b ldrb r3, [r3, #17] 8011902: b2db uxtb r3, r3 8011904: 2b00 cmp r3, #0 8011906: d105 bne.n 8011914 { /* Allocate lock resource and initialize it */ hrtc->Lock = HAL_UNLOCKED; 8011908: 687b ldr r3, [r7, #4] 801190a: 2200 movs r2, #0 801190c: 741a strb r2, [r3, #16] /* Initialize RTC MSP */ HAL_RTC_MspInit(hrtc); 801190e: 6878 ldr r0, [r7, #4] 8011910: f7fb fc88 bl 800d224 } #endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */ /* Set RTC state */ hrtc->State = HAL_RTC_STATE_BUSY; 8011914: 687b ldr r3, [r7, #4] 8011916: 2202 movs r2, #2 8011918: 745a strb r2, [r3, #17] /* Waiting for synchro */ if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) 801191a: 6878 ldr r0, [r7, #4] 801191c: f000 f870 bl 8011a00 8011920: 4603 mov r3, r0 8011922: 2b00 cmp r3, #0 8011924: d004 beq.n 8011930 { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 8011926: 687b ldr r3, [r7, #4] 8011928: 2204 movs r2, #4 801192a: 745a strb r2, [r3, #17] return HAL_ERROR; 801192c: 2301 movs r3, #1 801192e: e061 b.n 80119f4 } /* Set Initialization mode */ if (RTC_EnterInitMode(hrtc) != HAL_OK) 8011930: 6878 ldr r0, [r7, #4] 8011932: f000 f892 bl 8011a5a 8011936: 4603 mov r3, r0 8011938: 2b00 cmp r3, #0 801193a: d004 beq.n 8011946 { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 801193c: 687b ldr r3, [r7, #4] 801193e: 2204 movs r2, #4 8011940: 745a strb r2, [r3, #17] return HAL_ERROR; 8011942: 2301 movs r3, #1 8011944: e056 b.n 80119f4 } else { /* Clear Flags Bits */ CLEAR_BIT(hrtc->Instance->CRL, (RTC_FLAG_OW | RTC_FLAG_ALRAF | RTC_FLAG_SEC)); 8011946: 687b ldr r3, [r7, #4] 8011948: 681b ldr r3, [r3, #0] 801194a: 685a ldr r2, [r3, #4] 801194c: 687b ldr r3, [r7, #4] 801194e: 681b ldr r3, [r3, #0] 8011950: f022 0207 bic.w r2, r2, #7 8011954: 605a str r2, [r3, #4] if (hrtc->Init.OutPut != RTC_OUTPUTSOURCE_NONE) 8011956: 687b ldr r3, [r7, #4] 8011958: 689b ldr r3, [r3, #8] 801195a: 2b00 cmp r3, #0 801195c: d005 beq.n 801196a { /* Disable the selected Tamper pin */ CLEAR_BIT(BKP->CR, BKP_CR_TPE); 801195e: 4b27 ldr r3, [pc, #156] @ (80119fc ) 8011960: 6b1b ldr r3, [r3, #48] @ 0x30 8011962: 4a26 ldr r2, [pc, #152] @ (80119fc ) 8011964: f023 0301 bic.w r3, r3, #1 8011968: 6313 str r3, [r2, #48] @ 0x30 } /* Set the signal which will be routed to RTC Tamper pin*/ MODIFY_REG(BKP->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), hrtc->Init.OutPut); 801196a: 4b24 ldr r3, [pc, #144] @ (80119fc ) 801196c: 6adb ldr r3, [r3, #44] @ 0x2c 801196e: f423 7260 bic.w r2, r3, #896 @ 0x380 8011972: 687b ldr r3, [r7, #4] 8011974: 689b ldr r3, [r3, #8] 8011976: 4921 ldr r1, [pc, #132] @ (80119fc ) 8011978: 4313 orrs r3, r2 801197a: 62cb str r3, [r1, #44] @ 0x2c if (hrtc->Init.AsynchPrediv != RTC_AUTO_1_SECOND) 801197c: 687b ldr r3, [r7, #4] 801197e: 685b ldr r3, [r3, #4] 8011980: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8011984: d003 beq.n 801198e { /* RTC Prescaler provided directly by end-user*/ prescaler = hrtc->Init.AsynchPrediv; 8011986: 687b ldr r3, [r7, #4] 8011988: 685b ldr r3, [r3, #4] 801198a: 60fb str r3, [r7, #12] 801198c: e00e b.n 80119ac } else { /* RTC Prescaler will be automatically calculated to get 1 second timebase */ /* Get the RTCCLK frequency */ prescaler = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_RTC); 801198e: 2001 movs r0, #1 8011990: f7ff fe58 bl 8011644 8011994: 60f8 str r0, [r7, #12] /* Check that RTC clock is enabled*/ if (prescaler == 0U) 8011996: 68fb ldr r3, [r7, #12] 8011998: 2b00 cmp r3, #0 801199a: d104 bne.n 80119a6 { /* Should not happen. Frequency is not available*/ hrtc->State = HAL_RTC_STATE_ERROR; 801199c: 687b ldr r3, [r7, #4] 801199e: 2204 movs r2, #4 80119a0: 745a strb r2, [r3, #17] return HAL_ERROR; 80119a2: 2301 movs r3, #1 80119a4: e026 b.n 80119f4 } else { /* RTC period = RTCCLK/(RTC_PR + 1) */ prescaler = prescaler - 1U; 80119a6: 68fb ldr r3, [r7, #12] 80119a8: 3b01 subs r3, #1 80119aa: 60fb str r3, [r7, #12] } } /* Configure the RTC_PRLH / RTC_PRLL */ WRITE_REG(hrtc->Instance->PRLH, ((prescaler >> 16U) & RTC_PRLH_PRL)); 80119ac: 68fb ldr r3, [r7, #12] 80119ae: 0c1a lsrs r2, r3, #16 80119b0: 687b ldr r3, [r7, #4] 80119b2: 681b ldr r3, [r3, #0] 80119b4: f002 020f and.w r2, r2, #15 80119b8: 609a str r2, [r3, #8] WRITE_REG(hrtc->Instance->PRLL, (prescaler & RTC_PRLL_PRL)); 80119ba: 687b ldr r3, [r7, #4] 80119bc: 681b ldr r3, [r3, #0] 80119be: 68fa ldr r2, [r7, #12] 80119c0: b292 uxth r2, r2 80119c2: 60da str r2, [r3, #12] /* Wait for synchro */ if (RTC_ExitInitMode(hrtc) != HAL_OK) 80119c4: 6878 ldr r0, [r7, #4] 80119c6: f000 f870 bl 8011aaa 80119ca: 4603 mov r3, r0 80119cc: 2b00 cmp r3, #0 80119ce: d004 beq.n 80119da { hrtc->State = HAL_RTC_STATE_ERROR; 80119d0: 687b ldr r3, [r7, #4] 80119d2: 2204 movs r2, #4 80119d4: 745a strb r2, [r3, #17] return HAL_ERROR; 80119d6: 2301 movs r3, #1 80119d8: e00c b.n 80119f4 } /* Initialize date to 1st of January 2000 */ hrtc->DateToUpdate.Year = 0x00U; 80119da: 687b ldr r3, [r7, #4] 80119dc: 2200 movs r2, #0 80119de: 73da strb r2, [r3, #15] hrtc->DateToUpdate.Month = RTC_MONTH_JANUARY; 80119e0: 687b ldr r3, [r7, #4] 80119e2: 2201 movs r2, #1 80119e4: 735a strb r2, [r3, #13] hrtc->DateToUpdate.Date = 0x01U; 80119e6: 687b ldr r3, [r7, #4] 80119e8: 2201 movs r2, #1 80119ea: 739a strb r2, [r3, #14] /* Set RTC state */ hrtc->State = HAL_RTC_STATE_READY; 80119ec: 687b ldr r3, [r7, #4] 80119ee: 2201 movs r2, #1 80119f0: 745a strb r2, [r3, #17] return HAL_OK; 80119f2: 2300 movs r3, #0 } } 80119f4: 4618 mov r0, r3 80119f6: 3710 adds r7, #16 80119f8: 46bd mov sp, r7 80119fa: bd80 pop {r7, pc} 80119fc: 40006c00 .word 0x40006c00 08011a00 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc) { 8011a00: b580 push {r7, lr} 8011a02: b084 sub sp, #16 8011a04: af00 add r7, sp, #0 8011a06: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8011a08: 2300 movs r3, #0 8011a0a: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 8011a0c: 687b ldr r3, [r7, #4] 8011a0e: 2b00 cmp r3, #0 8011a10: d101 bne.n 8011a16 { return HAL_ERROR; 8011a12: 2301 movs r3, #1 8011a14: e01d b.n 8011a52 } /* Clear RSF flag */ CLEAR_BIT(hrtc->Instance->CRL, RTC_FLAG_RSF); 8011a16: 687b ldr r3, [r7, #4] 8011a18: 681b ldr r3, [r3, #0] 8011a1a: 685a ldr r2, [r3, #4] 8011a1c: 687b ldr r3, [r7, #4] 8011a1e: 681b ldr r3, [r3, #0] 8011a20: f022 0208 bic.w r2, r2, #8 8011a24: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8011a26: f7fc fed3 bl 800e7d0 8011a2a: 60f8 str r0, [r7, #12] /* Wait the registers to be synchronised */ while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 8011a2c: e009 b.n 8011a42 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8011a2e: f7fc fecf bl 800e7d0 8011a32: 4602 mov r2, r0 8011a34: 68fb ldr r3, [r7, #12] 8011a36: 1ad3 subs r3, r2, r3 8011a38: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8011a3c: d901 bls.n 8011a42 { return HAL_TIMEOUT; 8011a3e: 2303 movs r3, #3 8011a40: e007 b.n 8011a52 while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 8011a42: 687b ldr r3, [r7, #4] 8011a44: 681b ldr r3, [r3, #0] 8011a46: 685b ldr r3, [r3, #4] 8011a48: f003 0308 and.w r3, r3, #8 8011a4c: 2b00 cmp r3, #0 8011a4e: d0ee beq.n 8011a2e } } return HAL_OK; 8011a50: 2300 movs r3, #0 } 8011a52: 4618 mov r0, r3 8011a54: 3710 adds r7, #16 8011a56: 46bd mov sp, r7 8011a58: bd80 pop {r7, pc} 08011a5a : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc) { 8011a5a: b580 push {r7, lr} 8011a5c: b084 sub sp, #16 8011a5e: af00 add r7, sp, #0 8011a60: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8011a62: 2300 movs r3, #0 8011a64: 60fb str r3, [r7, #12] tickstart = HAL_GetTick(); 8011a66: f7fc feb3 bl 800e7d0 8011a6a: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011a6c: e009 b.n 8011a82 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8011a6e: f7fc feaf bl 800e7d0 8011a72: 4602 mov r2, r0 8011a74: 68fb ldr r3, [r7, #12] 8011a76: 1ad3 subs r3, r2, r3 8011a78: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8011a7c: d901 bls.n 8011a82 { return HAL_TIMEOUT; 8011a7e: 2303 movs r3, #3 8011a80: e00f b.n 8011aa2 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011a82: 687b ldr r3, [r7, #4] 8011a84: 681b ldr r3, [r3, #0] 8011a86: 685b ldr r3, [r3, #4] 8011a88: f003 0320 and.w r3, r3, #32 8011a8c: 2b00 cmp r3, #0 8011a8e: d0ee beq.n 8011a6e } } /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); 8011a90: 687b ldr r3, [r7, #4] 8011a92: 681b ldr r3, [r3, #0] 8011a94: 685a ldr r2, [r3, #4] 8011a96: 687b ldr r3, [r7, #4] 8011a98: 681b ldr r3, [r3, #0] 8011a9a: f042 0210 orr.w r2, r2, #16 8011a9e: 605a str r2, [r3, #4] return HAL_OK; 8011aa0: 2300 movs r3, #0 } 8011aa2: 4618 mov r0, r3 8011aa4: 3710 adds r7, #16 8011aa6: 46bd mov sp, r7 8011aa8: bd80 pop {r7, pc} 08011aaa : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc) { 8011aaa: b580 push {r7, lr} 8011aac: b084 sub sp, #16 8011aae: af00 add r7, sp, #0 8011ab0: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8011ab2: 2300 movs r3, #0 8011ab4: 60fb str r3, [r7, #12] /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 8011ab6: 687b ldr r3, [r7, #4] 8011ab8: 681b ldr r3, [r3, #0] 8011aba: 685a ldr r2, [r3, #4] 8011abc: 687b ldr r3, [r7, #4] 8011abe: 681b ldr r3, [r3, #0] 8011ac0: f022 0210 bic.w r2, r2, #16 8011ac4: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8011ac6: f7fc fe83 bl 800e7d0 8011aca: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011acc: e009 b.n 8011ae2 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8011ace: f7fc fe7f bl 800e7d0 8011ad2: 4602 mov r2, r0 8011ad4: 68fb ldr r3, [r7, #12] 8011ad6: 1ad3 subs r3, r2, r3 8011ad8: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8011adc: d901 bls.n 8011ae2 { return HAL_TIMEOUT; 8011ade: 2303 movs r3, #3 8011ae0: e007 b.n 8011af2 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011ae2: 687b ldr r3, [r7, #4] 8011ae4: 681b ldr r3, [r3, #0] 8011ae6: 685b ldr r3, [r3, #4] 8011ae8: f003 0320 and.w r3, r3, #32 8011aec: 2b00 cmp r3, #0 8011aee: d0ee beq.n 8011ace } } return HAL_OK; 8011af0: 2300 movs r3, #0 } 8011af2: 4618 mov r0, r3 8011af4: 3710 adds r7, #16 8011af6: 46bd mov sp, r7 8011af8: bd80 pop {r7, pc} 08011afa : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8011afa: b580 push {r7, lr} 8011afc: b082 sub sp, #8 8011afe: af00 add r7, sp, #0 8011b00: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8011b02: 687b ldr r3, [r7, #4] 8011b04: 2b00 cmp r3, #0 8011b06: d101 bne.n 8011b0c { return HAL_ERROR; 8011b08: 2301 movs r3, #1 8011b0a: e041 b.n 8011b90 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8011b0c: 687b ldr r3, [r7, #4] 8011b0e: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8011b12: b2db uxtb r3, r3 8011b14: 2b00 cmp r3, #0 8011b16: d106 bne.n 8011b26 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8011b18: 687b ldr r3, [r7, #4] 8011b1a: 2200 movs r2, #0 8011b1c: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8011b20: 6878 ldr r0, [r7, #4] 8011b22: f7fc fb87 bl 800e234 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8011b26: 687b ldr r3, [r7, #4] 8011b28: 2202 movs r2, #2 8011b2a: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8011b2e: 687b ldr r3, [r7, #4] 8011b30: 681a ldr r2, [r3, #0] 8011b32: 687b ldr r3, [r7, #4] 8011b34: 3304 adds r3, #4 8011b36: 4619 mov r1, r3 8011b38: 4610 mov r0, r2 8011b3a: f000 fab9 bl 80120b0 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8011b3e: 687b ldr r3, [r7, #4] 8011b40: 2201 movs r2, #1 8011b42: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011b46: 687b ldr r3, [r7, #4] 8011b48: 2201 movs r2, #1 8011b4a: f883 203e strb.w r2, [r3, #62] @ 0x3e 8011b4e: 687b ldr r3, [r7, #4] 8011b50: 2201 movs r2, #1 8011b52: f883 203f strb.w r2, [r3, #63] @ 0x3f 8011b56: 687b ldr r3, [r7, #4] 8011b58: 2201 movs r2, #1 8011b5a: f883 2040 strb.w r2, [r3, #64] @ 0x40 8011b5e: 687b ldr r3, [r7, #4] 8011b60: 2201 movs r2, #1 8011b62: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011b66: 687b ldr r3, [r7, #4] 8011b68: 2201 movs r2, #1 8011b6a: f883 2042 strb.w r2, [r3, #66] @ 0x42 8011b6e: 687b ldr r3, [r7, #4] 8011b70: 2201 movs r2, #1 8011b72: f883 2043 strb.w r2, [r3, #67] @ 0x43 8011b76: 687b ldr r3, [r7, #4] 8011b78: 2201 movs r2, #1 8011b7a: f883 2044 strb.w r2, [r3, #68] @ 0x44 8011b7e: 687b ldr r3, [r7, #4] 8011b80: 2201 movs r2, #1 8011b82: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8011b86: 687b ldr r3, [r7, #4] 8011b88: 2201 movs r2, #1 8011b8a: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8011b8e: 2300 movs r3, #0 } 8011b90: 4618 mov r0, r3 8011b92: 3708 adds r7, #8 8011b94: 46bd mov sp, r7 8011b96: bd80 pop {r7, pc} 08011b98 : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 8011b98: b580 push {r7, lr} 8011b9a: b082 sub sp, #8 8011b9c: af00 add r7, sp, #0 8011b9e: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8011ba0: 687b ldr r3, [r7, #4] 8011ba2: 2b00 cmp r3, #0 8011ba4: d101 bne.n 8011baa { return HAL_ERROR; 8011ba6: 2301 movs r3, #1 8011ba8: e041 b.n 8011c2e assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8011baa: 687b ldr r3, [r7, #4] 8011bac: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8011bb0: b2db uxtb r3, r3 8011bb2: 2b00 cmp r3, #0 8011bb4: d106 bne.n 8011bc4 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8011bb6: 687b ldr r3, [r7, #4] 8011bb8: 2200 movs r2, #0 8011bba: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8011bbe: 6878 ldr r0, [r7, #4] 8011bc0: f000 f839 bl 8011c36 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8011bc4: 687b ldr r3, [r7, #4] 8011bc6: 2202 movs r2, #2 8011bc8: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8011bcc: 687b ldr r3, [r7, #4] 8011bce: 681a ldr r2, [r3, #0] 8011bd0: 687b ldr r3, [r7, #4] 8011bd2: 3304 adds r3, #4 8011bd4: 4619 mov r1, r3 8011bd6: 4610 mov r0, r2 8011bd8: f000 fa6a bl 80120b0 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8011bdc: 687b ldr r3, [r7, #4] 8011bde: 2201 movs r2, #1 8011be0: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011be4: 687b ldr r3, [r7, #4] 8011be6: 2201 movs r2, #1 8011be8: f883 203e strb.w r2, [r3, #62] @ 0x3e 8011bec: 687b ldr r3, [r7, #4] 8011bee: 2201 movs r2, #1 8011bf0: f883 203f strb.w r2, [r3, #63] @ 0x3f 8011bf4: 687b ldr r3, [r7, #4] 8011bf6: 2201 movs r2, #1 8011bf8: f883 2040 strb.w r2, [r3, #64] @ 0x40 8011bfc: 687b ldr r3, [r7, #4] 8011bfe: 2201 movs r2, #1 8011c00: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011c04: 687b ldr r3, [r7, #4] 8011c06: 2201 movs r2, #1 8011c08: f883 2042 strb.w r2, [r3, #66] @ 0x42 8011c0c: 687b ldr r3, [r7, #4] 8011c0e: 2201 movs r2, #1 8011c10: f883 2043 strb.w r2, [r3, #67] @ 0x43 8011c14: 687b ldr r3, [r7, #4] 8011c16: 2201 movs r2, #1 8011c18: f883 2044 strb.w r2, [r3, #68] @ 0x44 8011c1c: 687b ldr r3, [r7, #4] 8011c1e: 2201 movs r2, #1 8011c20: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8011c24: 687b ldr r3, [r7, #4] 8011c26: 2201 movs r2, #1 8011c28: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8011c2c: 2300 movs r3, #0 } 8011c2e: 4618 mov r0, r3 8011c30: 3708 adds r7, #8 8011c32: 46bd mov sp, r7 8011c34: bd80 pop {r7, pc} 08011c36 : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 8011c36: b480 push {r7} 8011c38: b083 sub sp, #12 8011c3a: af00 add r7, sp, #0 8011c3c: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 8011c3e: bf00 nop 8011c40: 370c adds r7, #12 8011c42: 46bd mov sp, r7 8011c44: bc80 pop {r7} 8011c46: 4770 bx lr 08011c48 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8011c48: b580 push {r7, lr} 8011c4a: b084 sub sp, #16 8011c4c: af00 add r7, sp, #0 8011c4e: 6078 str r0, [r7, #4] 8011c50: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 8011c52: 683b ldr r3, [r7, #0] 8011c54: 2b00 cmp r3, #0 8011c56: d109 bne.n 8011c6c 8011c58: 687b ldr r3, [r7, #4] 8011c5a: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8011c5e: b2db uxtb r3, r3 8011c60: 2b01 cmp r3, #1 8011c62: bf14 ite ne 8011c64: 2301 movne r3, #1 8011c66: 2300 moveq r3, #0 8011c68: b2db uxtb r3, r3 8011c6a: e022 b.n 8011cb2 8011c6c: 683b ldr r3, [r7, #0] 8011c6e: 2b04 cmp r3, #4 8011c70: d109 bne.n 8011c86 8011c72: 687b ldr r3, [r7, #4] 8011c74: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8011c78: b2db uxtb r3, r3 8011c7a: 2b01 cmp r3, #1 8011c7c: bf14 ite ne 8011c7e: 2301 movne r3, #1 8011c80: 2300 moveq r3, #0 8011c82: b2db uxtb r3, r3 8011c84: e015 b.n 8011cb2 8011c86: 683b ldr r3, [r7, #0] 8011c88: 2b08 cmp r3, #8 8011c8a: d109 bne.n 8011ca0 8011c8c: 687b ldr r3, [r7, #4] 8011c8e: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8011c92: b2db uxtb r3, r3 8011c94: 2b01 cmp r3, #1 8011c96: bf14 ite ne 8011c98: 2301 movne r3, #1 8011c9a: 2300 moveq r3, #0 8011c9c: b2db uxtb r3, r3 8011c9e: e008 b.n 8011cb2 8011ca0: 687b ldr r3, [r7, #4] 8011ca2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8011ca6: b2db uxtb r3, r3 8011ca8: 2b01 cmp r3, #1 8011caa: bf14 ite ne 8011cac: 2301 movne r3, #1 8011cae: 2300 moveq r3, #0 8011cb0: b2db uxtb r3, r3 8011cb2: 2b00 cmp r3, #0 8011cb4: d001 beq.n 8011cba { return HAL_ERROR; 8011cb6: 2301 movs r3, #1 8011cb8: e063 b.n 8011d82 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8011cba: 683b ldr r3, [r7, #0] 8011cbc: 2b00 cmp r3, #0 8011cbe: d104 bne.n 8011cca 8011cc0: 687b ldr r3, [r7, #4] 8011cc2: 2202 movs r2, #2 8011cc4: f883 203e strb.w r2, [r3, #62] @ 0x3e 8011cc8: e013 b.n 8011cf2 8011cca: 683b ldr r3, [r7, #0] 8011ccc: 2b04 cmp r3, #4 8011cce: d104 bne.n 8011cda 8011cd0: 687b ldr r3, [r7, #4] 8011cd2: 2202 movs r2, #2 8011cd4: f883 203f strb.w r2, [r3, #63] @ 0x3f 8011cd8: e00b b.n 8011cf2 8011cda: 683b ldr r3, [r7, #0] 8011cdc: 2b08 cmp r3, #8 8011cde: d104 bne.n 8011cea 8011ce0: 687b ldr r3, [r7, #4] 8011ce2: 2202 movs r2, #2 8011ce4: f883 2040 strb.w r2, [r3, #64] @ 0x40 8011ce8: e003 b.n 8011cf2 8011cea: 687b ldr r3, [r7, #4] 8011cec: 2202 movs r2, #2 8011cee: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8011cf2: 687b ldr r3, [r7, #4] 8011cf4: 681b ldr r3, [r3, #0] 8011cf6: 2201 movs r2, #1 8011cf8: 6839 ldr r1, [r7, #0] 8011cfa: 4618 mov r0, r3 8011cfc: f000 fc6e bl 80125dc if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8011d00: 687b ldr r3, [r7, #4] 8011d02: 681b ldr r3, [r3, #0] 8011d04: 4a21 ldr r2, [pc, #132] @ (8011d8c ) 8011d06: 4293 cmp r3, r2 8011d08: d107 bne.n 8011d1a { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 8011d0a: 687b ldr r3, [r7, #4] 8011d0c: 681b ldr r3, [r3, #0] 8011d0e: 6c5a ldr r2, [r3, #68] @ 0x44 8011d10: 687b ldr r3, [r7, #4] 8011d12: 681b ldr r3, [r3, #0] 8011d14: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8011d18: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8011d1a: 687b ldr r3, [r7, #4] 8011d1c: 681b ldr r3, [r3, #0] 8011d1e: 4a1b ldr r2, [pc, #108] @ (8011d8c ) 8011d20: 4293 cmp r3, r2 8011d22: d013 beq.n 8011d4c 8011d24: 687b ldr r3, [r7, #4] 8011d26: 681b ldr r3, [r3, #0] 8011d28: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8011d2c: d00e beq.n 8011d4c 8011d2e: 687b ldr r3, [r7, #4] 8011d30: 681b ldr r3, [r3, #0] 8011d32: 4a17 ldr r2, [pc, #92] @ (8011d90 ) 8011d34: 4293 cmp r3, r2 8011d36: d009 beq.n 8011d4c 8011d38: 687b ldr r3, [r7, #4] 8011d3a: 681b ldr r3, [r3, #0] 8011d3c: 4a15 ldr r2, [pc, #84] @ (8011d94 ) 8011d3e: 4293 cmp r3, r2 8011d40: d004 beq.n 8011d4c 8011d42: 687b ldr r3, [r7, #4] 8011d44: 681b ldr r3, [r3, #0] 8011d46: 4a14 ldr r2, [pc, #80] @ (8011d98 ) 8011d48: 4293 cmp r3, r2 8011d4a: d111 bne.n 8011d70 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8011d4c: 687b ldr r3, [r7, #4] 8011d4e: 681b ldr r3, [r3, #0] 8011d50: 689b ldr r3, [r3, #8] 8011d52: f003 0307 and.w r3, r3, #7 8011d56: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8011d58: 68fb ldr r3, [r7, #12] 8011d5a: 2b06 cmp r3, #6 8011d5c: d010 beq.n 8011d80 { __HAL_TIM_ENABLE(htim); 8011d5e: 687b ldr r3, [r7, #4] 8011d60: 681b ldr r3, [r3, #0] 8011d62: 681a ldr r2, [r3, #0] 8011d64: 687b ldr r3, [r7, #4] 8011d66: 681b ldr r3, [r3, #0] 8011d68: f042 0201 orr.w r2, r2, #1 8011d6c: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8011d6e: e007 b.n 8011d80 } } else { __HAL_TIM_ENABLE(htim); 8011d70: 687b ldr r3, [r7, #4] 8011d72: 681b ldr r3, [r3, #0] 8011d74: 681a ldr r2, [r3, #0] 8011d76: 687b ldr r3, [r7, #4] 8011d78: 681b ldr r3, [r3, #0] 8011d7a: f042 0201 orr.w r2, r2, #1 8011d7e: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 8011d80: 2300 movs r3, #0 } 8011d82: 4618 mov r0, r3 8011d84: 3710 adds r7, #16 8011d86: 46bd mov sp, r7 8011d88: bd80 pop {r7, pc} 8011d8a: bf00 nop 8011d8c: 40012c00 .word 0x40012c00 8011d90: 40000400 .word 0x40000400 8011d94: 40000800 .word 0x40000800 8011d98: 40000c00 .word 0x40000c00 08011d9c : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8011d9c: b580 push {r7, lr} 8011d9e: b086 sub sp, #24 8011da0: af00 add r7, sp, #0 8011da2: 60f8 str r0, [r7, #12] 8011da4: 60b9 str r1, [r7, #8] 8011da6: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8011da8: 2300 movs r3, #0 8011daa: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 8011dac: 68fb ldr r3, [r7, #12] 8011dae: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8011db2: 2b01 cmp r3, #1 8011db4: d101 bne.n 8011dba 8011db6: 2302 movs r3, #2 8011db8: e0ae b.n 8011f18 8011dba: 68fb ldr r3, [r7, #12] 8011dbc: 2201 movs r2, #1 8011dbe: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 8011dc2: 687b ldr r3, [r7, #4] 8011dc4: 2b0c cmp r3, #12 8011dc6: f200 809f bhi.w 8011f08 8011dca: a201 add r2, pc, #4 @ (adr r2, 8011dd0 ) 8011dcc: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8011dd0: 08011e05 .word 0x08011e05 8011dd4: 08011f09 .word 0x08011f09 8011dd8: 08011f09 .word 0x08011f09 8011ddc: 08011f09 .word 0x08011f09 8011de0: 08011e45 .word 0x08011e45 8011de4: 08011f09 .word 0x08011f09 8011de8: 08011f09 .word 0x08011f09 8011dec: 08011f09 .word 0x08011f09 8011df0: 08011e87 .word 0x08011e87 8011df4: 08011f09 .word 0x08011f09 8011df8: 08011f09 .word 0x08011f09 8011dfc: 08011f09 .word 0x08011f09 8011e00: 08011ec7 .word 0x08011ec7 { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8011e04: 68fb ldr r3, [r7, #12] 8011e06: 681b ldr r3, [r3, #0] 8011e08: 68b9 ldr r1, [r7, #8] 8011e0a: 4618 mov r0, r3 8011e0c: f000 f9c8 bl 80121a0 /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 8011e10: 68fb ldr r3, [r7, #12] 8011e12: 681b ldr r3, [r3, #0] 8011e14: 699a ldr r2, [r3, #24] 8011e16: 68fb ldr r3, [r7, #12] 8011e18: 681b ldr r3, [r3, #0] 8011e1a: f042 0208 orr.w r2, r2, #8 8011e1e: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 8011e20: 68fb ldr r3, [r7, #12] 8011e22: 681b ldr r3, [r3, #0] 8011e24: 699a ldr r2, [r3, #24] 8011e26: 68fb ldr r3, [r7, #12] 8011e28: 681b ldr r3, [r3, #0] 8011e2a: f022 0204 bic.w r2, r2, #4 8011e2e: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 8011e30: 68fb ldr r3, [r7, #12] 8011e32: 681b ldr r3, [r3, #0] 8011e34: 6999 ldr r1, [r3, #24] 8011e36: 68bb ldr r3, [r7, #8] 8011e38: 691a ldr r2, [r3, #16] 8011e3a: 68fb ldr r3, [r7, #12] 8011e3c: 681b ldr r3, [r3, #0] 8011e3e: 430a orrs r2, r1 8011e40: 619a str r2, [r3, #24] break; 8011e42: e064 b.n 8011f0e { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 8011e44: 68fb ldr r3, [r7, #12] 8011e46: 681b ldr r3, [r3, #0] 8011e48: 68b9 ldr r1, [r7, #8] 8011e4a: 4618 mov r0, r3 8011e4c: f000 fa0e bl 801226c /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 8011e50: 68fb ldr r3, [r7, #12] 8011e52: 681b ldr r3, [r3, #0] 8011e54: 699a ldr r2, [r3, #24] 8011e56: 68fb ldr r3, [r7, #12] 8011e58: 681b ldr r3, [r3, #0] 8011e5a: f442 6200 orr.w r2, r2, #2048 @ 0x800 8011e5e: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 8011e60: 68fb ldr r3, [r7, #12] 8011e62: 681b ldr r3, [r3, #0] 8011e64: 699a ldr r2, [r3, #24] 8011e66: 68fb ldr r3, [r7, #12] 8011e68: 681b ldr r3, [r3, #0] 8011e6a: f422 6280 bic.w r2, r2, #1024 @ 0x400 8011e6e: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 8011e70: 68fb ldr r3, [r7, #12] 8011e72: 681b ldr r3, [r3, #0] 8011e74: 6999 ldr r1, [r3, #24] 8011e76: 68bb ldr r3, [r7, #8] 8011e78: 691b ldr r3, [r3, #16] 8011e7a: 021a lsls r2, r3, #8 8011e7c: 68fb ldr r3, [r7, #12] 8011e7e: 681b ldr r3, [r3, #0] 8011e80: 430a orrs r2, r1 8011e82: 619a str r2, [r3, #24] break; 8011e84: e043 b.n 8011f0e { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 8011e86: 68fb ldr r3, [r7, #12] 8011e88: 681b ldr r3, [r3, #0] 8011e8a: 68b9 ldr r1, [r7, #8] 8011e8c: 4618 mov r0, r3 8011e8e: f000 fa57 bl 8012340 /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 8011e92: 68fb ldr r3, [r7, #12] 8011e94: 681b ldr r3, [r3, #0] 8011e96: 69da ldr r2, [r3, #28] 8011e98: 68fb ldr r3, [r7, #12] 8011e9a: 681b ldr r3, [r3, #0] 8011e9c: f042 0208 orr.w r2, r2, #8 8011ea0: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 8011ea2: 68fb ldr r3, [r7, #12] 8011ea4: 681b ldr r3, [r3, #0] 8011ea6: 69da ldr r2, [r3, #28] 8011ea8: 68fb ldr r3, [r7, #12] 8011eaa: 681b ldr r3, [r3, #0] 8011eac: f022 0204 bic.w r2, r2, #4 8011eb0: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 8011eb2: 68fb ldr r3, [r7, #12] 8011eb4: 681b ldr r3, [r3, #0] 8011eb6: 69d9 ldr r1, [r3, #28] 8011eb8: 68bb ldr r3, [r7, #8] 8011eba: 691a ldr r2, [r3, #16] 8011ebc: 68fb ldr r3, [r7, #12] 8011ebe: 681b ldr r3, [r3, #0] 8011ec0: 430a orrs r2, r1 8011ec2: 61da str r2, [r3, #28] break; 8011ec4: e023 b.n 8011f0e { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 8011ec6: 68fb ldr r3, [r7, #12] 8011ec8: 681b ldr r3, [r3, #0] 8011eca: 68b9 ldr r1, [r7, #8] 8011ecc: 4618 mov r0, r3 8011ece: f000 faa1 bl 8012414 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 8011ed2: 68fb ldr r3, [r7, #12] 8011ed4: 681b ldr r3, [r3, #0] 8011ed6: 69da ldr r2, [r3, #28] 8011ed8: 68fb ldr r3, [r7, #12] 8011eda: 681b ldr r3, [r3, #0] 8011edc: f442 6200 orr.w r2, r2, #2048 @ 0x800 8011ee0: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 8011ee2: 68fb ldr r3, [r7, #12] 8011ee4: 681b ldr r3, [r3, #0] 8011ee6: 69da ldr r2, [r3, #28] 8011ee8: 68fb ldr r3, [r7, #12] 8011eea: 681b ldr r3, [r3, #0] 8011eec: f422 6280 bic.w r2, r2, #1024 @ 0x400 8011ef0: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 8011ef2: 68fb ldr r3, [r7, #12] 8011ef4: 681b ldr r3, [r3, #0] 8011ef6: 69d9 ldr r1, [r3, #28] 8011ef8: 68bb ldr r3, [r7, #8] 8011efa: 691b ldr r3, [r3, #16] 8011efc: 021a lsls r2, r3, #8 8011efe: 68fb ldr r3, [r7, #12] 8011f00: 681b ldr r3, [r3, #0] 8011f02: 430a orrs r2, r1 8011f04: 61da str r2, [r3, #28] break; 8011f06: e002 b.n 8011f0e } default: status = HAL_ERROR; 8011f08: 2301 movs r3, #1 8011f0a: 75fb strb r3, [r7, #23] break; 8011f0c: bf00 nop } __HAL_UNLOCK(htim); 8011f0e: 68fb ldr r3, [r7, #12] 8011f10: 2200 movs r2, #0 8011f12: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8011f16: 7dfb ldrb r3, [r7, #23] } 8011f18: 4618 mov r0, r3 8011f1a: 3718 adds r7, #24 8011f1c: 46bd mov sp, r7 8011f1e: bd80 pop {r7, pc} 08011f20 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { 8011f20: b580 push {r7, lr} 8011f22: b084 sub sp, #16 8011f24: af00 add r7, sp, #0 8011f26: 6078 str r0, [r7, #4] 8011f28: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8011f2a: 2300 movs r3, #0 8011f2c: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 8011f2e: 687b ldr r3, [r7, #4] 8011f30: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8011f34: 2b01 cmp r3, #1 8011f36: d101 bne.n 8011f3c 8011f38: 2302 movs r3, #2 8011f3a: e0b4 b.n 80120a6 8011f3c: 687b ldr r3, [r7, #4] 8011f3e: 2201 movs r2, #1 8011f40: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 8011f44: 687b ldr r3, [r7, #4] 8011f46: 2202 movs r2, #2 8011f48: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 8011f4c: 687b ldr r3, [r7, #4] 8011f4e: 681b ldr r3, [r3, #0] 8011f50: 689b ldr r3, [r3, #8] 8011f52: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 8011f54: 68bb ldr r3, [r7, #8] 8011f56: f023 0377 bic.w r3, r3, #119 @ 0x77 8011f5a: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8011f5c: 68bb ldr r3, [r7, #8] 8011f5e: f423 437f bic.w r3, r3, #65280 @ 0xff00 8011f62: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 8011f64: 687b ldr r3, [r7, #4] 8011f66: 681b ldr r3, [r3, #0] 8011f68: 68ba ldr r2, [r7, #8] 8011f6a: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 8011f6c: 683b ldr r3, [r7, #0] 8011f6e: 681b ldr r3, [r3, #0] 8011f70: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8011f74: d03e beq.n 8011ff4 8011f76: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8011f7a: f200 8087 bhi.w 801208c 8011f7e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8011f82: f000 8086 beq.w 8012092 8011f86: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8011f8a: d87f bhi.n 801208c 8011f8c: 2b70 cmp r3, #112 @ 0x70 8011f8e: d01a beq.n 8011fc6 8011f90: 2b70 cmp r3, #112 @ 0x70 8011f92: d87b bhi.n 801208c 8011f94: 2b60 cmp r3, #96 @ 0x60 8011f96: d050 beq.n 801203a 8011f98: 2b60 cmp r3, #96 @ 0x60 8011f9a: d877 bhi.n 801208c 8011f9c: 2b50 cmp r3, #80 @ 0x50 8011f9e: d03c beq.n 801201a 8011fa0: 2b50 cmp r3, #80 @ 0x50 8011fa2: d873 bhi.n 801208c 8011fa4: 2b40 cmp r3, #64 @ 0x40 8011fa6: d058 beq.n 801205a 8011fa8: 2b40 cmp r3, #64 @ 0x40 8011faa: d86f bhi.n 801208c 8011fac: 2b30 cmp r3, #48 @ 0x30 8011fae: d064 beq.n 801207a 8011fb0: 2b30 cmp r3, #48 @ 0x30 8011fb2: d86b bhi.n 801208c 8011fb4: 2b20 cmp r3, #32 8011fb6: d060 beq.n 801207a 8011fb8: 2b20 cmp r3, #32 8011fba: d867 bhi.n 801208c 8011fbc: 2b00 cmp r3, #0 8011fbe: d05c beq.n 801207a 8011fc0: 2b10 cmp r3, #16 8011fc2: d05a beq.n 801207a 8011fc4: e062 b.n 801208c assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 8011fc6: 687b ldr r3, [r7, #4] 8011fc8: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 8011fca: 683b ldr r3, [r7, #0] 8011fcc: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8011fce: 683b ldr r3, [r7, #0] 8011fd0: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8011fd2: 683b ldr r3, [r7, #0] 8011fd4: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 8011fd6: f000 fae2 bl 801259e /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 8011fda: 687b ldr r3, [r7, #4] 8011fdc: 681b ldr r3, [r3, #0] 8011fde: 689b ldr r3, [r3, #8] 8011fe0: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 8011fe2: 68bb ldr r3, [r7, #8] 8011fe4: f043 0377 orr.w r3, r3, #119 @ 0x77 8011fe8: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8011fea: 687b ldr r3, [r7, #4] 8011fec: 681b ldr r3, [r3, #0] 8011fee: 68ba ldr r2, [r7, #8] 8011ff0: 609a str r2, [r3, #8] break; 8011ff2: e04f b.n 8012094 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 8011ff4: 687b ldr r3, [r7, #4] 8011ff6: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 8011ff8: 683b ldr r3, [r7, #0] 8011ffa: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8011ffc: 683b ldr r3, [r7, #0] 8011ffe: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8012000: 683b ldr r3, [r7, #0] 8012002: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 8012004: f000 facb bl 801259e /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 8012008: 687b ldr r3, [r7, #4] 801200a: 681b ldr r3, [r3, #0] 801200c: 689a ldr r2, [r3, #8] 801200e: 687b ldr r3, [r7, #4] 8012010: 681b ldr r3, [r3, #0] 8012012: f442 4280 orr.w r2, r2, #16384 @ 0x4000 8012016: 609a str r2, [r3, #8] break; 8012018: e03c b.n 8012094 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 801201a: 687b ldr r3, [r7, #4] 801201c: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 801201e: 683b ldr r3, [r7, #0] 8012020: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8012022: 683b ldr r3, [r7, #0] 8012024: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 8012026: 461a mov r2, r3 8012028: f000 fa42 bl 80124b0 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 801202c: 687b ldr r3, [r7, #4] 801202e: 681b ldr r3, [r3, #0] 8012030: 2150 movs r1, #80 @ 0x50 8012032: 4618 mov r0, r3 8012034: f000 fa99 bl 801256a break; 8012038: e02c b.n 8012094 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 801203a: 687b ldr r3, [r7, #4] 801203c: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 801203e: 683b ldr r3, [r7, #0] 8012040: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8012042: 683b ldr r3, [r7, #0] 8012044: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, 8012046: 461a mov r2, r3 8012048: f000 fa60 bl 801250c TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 801204c: 687b ldr r3, [r7, #4] 801204e: 681b ldr r3, [r3, #0] 8012050: 2160 movs r1, #96 @ 0x60 8012052: 4618 mov r0, r3 8012054: f000 fa89 bl 801256a break; 8012058: e01c b.n 8012094 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 801205a: 687b ldr r3, [r7, #4] 801205c: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 801205e: 683b ldr r3, [r7, #0] 8012060: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8012062: 683b ldr r3, [r7, #0] 8012064: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 8012066: 461a mov r2, r3 8012068: f000 fa22 bl 80124b0 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 801206c: 687b ldr r3, [r7, #4] 801206e: 681b ldr r3, [r3, #0] 8012070: 2140 movs r1, #64 @ 0x40 8012072: 4618 mov r0, r3 8012074: f000 fa79 bl 801256a break; 8012078: e00c b.n 8012094 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 801207a: 687b ldr r3, [r7, #4] 801207c: 681a ldr r2, [r3, #0] 801207e: 683b ldr r3, [r7, #0] 8012080: 681b ldr r3, [r3, #0] 8012082: 4619 mov r1, r3 8012084: 4610 mov r0, r2 8012086: f000 fa70 bl 801256a break; 801208a: e003 b.n 8012094 } default: status = HAL_ERROR; 801208c: 2301 movs r3, #1 801208e: 73fb strb r3, [r7, #15] break; 8012090: e000 b.n 8012094 break; 8012092: bf00 nop } htim->State = HAL_TIM_STATE_READY; 8012094: 687b ldr r3, [r7, #4] 8012096: 2201 movs r2, #1 8012098: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 801209c: 687b ldr r3, [r7, #4] 801209e: 2200 movs r2, #0 80120a0: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 80120a4: 7bfb ldrb r3, [r7, #15] } 80120a6: 4618 mov r0, r3 80120a8: 3710 adds r7, #16 80120aa: 46bd mov sp, r7 80120ac: bd80 pop {r7, pc} ... 080120b0 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 80120b0: b480 push {r7} 80120b2: b085 sub sp, #20 80120b4: af00 add r7, sp, #0 80120b6: 6078 str r0, [r7, #4] 80120b8: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 80120ba: 687b ldr r3, [r7, #4] 80120bc: 681b ldr r3, [r3, #0] 80120be: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80120c0: 687b ldr r3, [r7, #4] 80120c2: 4a33 ldr r2, [pc, #204] @ (8012190 ) 80120c4: 4293 cmp r3, r2 80120c6: d00f beq.n 80120e8 80120c8: 687b ldr r3, [r7, #4] 80120ca: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80120ce: d00b beq.n 80120e8 80120d0: 687b ldr r3, [r7, #4] 80120d2: 4a30 ldr r2, [pc, #192] @ (8012194 ) 80120d4: 4293 cmp r3, r2 80120d6: d007 beq.n 80120e8 80120d8: 687b ldr r3, [r7, #4] 80120da: 4a2f ldr r2, [pc, #188] @ (8012198 ) 80120dc: 4293 cmp r3, r2 80120de: d003 beq.n 80120e8 80120e0: 687b ldr r3, [r7, #4] 80120e2: 4a2e ldr r2, [pc, #184] @ (801219c ) 80120e4: 4293 cmp r3, r2 80120e6: d108 bne.n 80120fa { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 80120e8: 68fb ldr r3, [r7, #12] 80120ea: f023 0370 bic.w r3, r3, #112 @ 0x70 80120ee: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 80120f0: 683b ldr r3, [r7, #0] 80120f2: 685b ldr r3, [r3, #4] 80120f4: 68fa ldr r2, [r7, #12] 80120f6: 4313 orrs r3, r2 80120f8: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 80120fa: 687b ldr r3, [r7, #4] 80120fc: 4a24 ldr r2, [pc, #144] @ (8012190 ) 80120fe: 4293 cmp r3, r2 8012100: d00f beq.n 8012122 8012102: 687b ldr r3, [r7, #4] 8012104: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8012108: d00b beq.n 8012122 801210a: 687b ldr r3, [r7, #4] 801210c: 4a21 ldr r2, [pc, #132] @ (8012194 ) 801210e: 4293 cmp r3, r2 8012110: d007 beq.n 8012122 8012112: 687b ldr r3, [r7, #4] 8012114: 4a20 ldr r2, [pc, #128] @ (8012198 ) 8012116: 4293 cmp r3, r2 8012118: d003 beq.n 8012122 801211a: 687b ldr r3, [r7, #4] 801211c: 4a1f ldr r2, [pc, #124] @ (801219c ) 801211e: 4293 cmp r3, r2 8012120: d108 bne.n 8012134 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 8012122: 68fb ldr r3, [r7, #12] 8012124: f423 7340 bic.w r3, r3, #768 @ 0x300 8012128: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 801212a: 683b ldr r3, [r7, #0] 801212c: 68db ldr r3, [r3, #12] 801212e: 68fa ldr r2, [r7, #12] 8012130: 4313 orrs r3, r2 8012132: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 8012134: 68fb ldr r3, [r7, #12] 8012136: f023 0280 bic.w r2, r3, #128 @ 0x80 801213a: 683b ldr r3, [r7, #0] 801213c: 695b ldr r3, [r3, #20] 801213e: 4313 orrs r3, r2 8012140: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 8012142: 687b ldr r3, [r7, #4] 8012144: 68fa ldr r2, [r7, #12] 8012146: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8012148: 683b ldr r3, [r7, #0] 801214a: 689a ldr r2, [r3, #8] 801214c: 687b ldr r3, [r7, #4] 801214e: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 8012150: 683b ldr r3, [r7, #0] 8012152: 681a ldr r2, [r3, #0] 8012154: 687b ldr r3, [r7, #4] 8012156: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8012158: 687b ldr r3, [r7, #4] 801215a: 4a0d ldr r2, [pc, #52] @ (8012190 ) 801215c: 4293 cmp r3, r2 801215e: d103 bne.n 8012168 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8012160: 683b ldr r3, [r7, #0] 8012162: 691a ldr r2, [r3, #16] 8012164: 687b ldr r3, [r7, #4] 8012166: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8012168: 687b ldr r3, [r7, #4] 801216a: 2201 movs r2, #1 801216c: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 801216e: 687b ldr r3, [r7, #4] 8012170: 691b ldr r3, [r3, #16] 8012172: f003 0301 and.w r3, r3, #1 8012176: 2b00 cmp r3, #0 8012178: d005 beq.n 8012186 { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 801217a: 687b ldr r3, [r7, #4] 801217c: 691b ldr r3, [r3, #16] 801217e: f023 0201 bic.w r2, r3, #1 8012182: 687b ldr r3, [r7, #4] 8012184: 611a str r2, [r3, #16] } } 8012186: bf00 nop 8012188: 3714 adds r7, #20 801218a: 46bd mov sp, r7 801218c: bc80 pop {r7} 801218e: 4770 bx lr 8012190: 40012c00 .word 0x40012c00 8012194: 40000400 .word 0x40000400 8012198: 40000800 .word 0x40000800 801219c: 40000c00 .word 0x40000c00 080121a0 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80121a0: b480 push {r7} 80121a2: b087 sub sp, #28 80121a4: af00 add r7, sp, #0 80121a6: 6078 str r0, [r7, #4] 80121a8: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80121aa: 687b ldr r3, [r7, #4] 80121ac: 6a1b ldr r3, [r3, #32] 80121ae: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 80121b0: 687b ldr r3, [r7, #4] 80121b2: 6a1b ldr r3, [r3, #32] 80121b4: f023 0201 bic.w r2, r3, #1 80121b8: 687b ldr r3, [r7, #4] 80121ba: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80121bc: 687b ldr r3, [r7, #4] 80121be: 685b ldr r3, [r3, #4] 80121c0: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 80121c2: 687b ldr r3, [r7, #4] 80121c4: 699b ldr r3, [r3, #24] 80121c6: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 80121c8: 68fb ldr r3, [r7, #12] 80121ca: f023 0370 bic.w r3, r3, #112 @ 0x70 80121ce: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 80121d0: 68fb ldr r3, [r7, #12] 80121d2: f023 0303 bic.w r3, r3, #3 80121d6: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 80121d8: 683b ldr r3, [r7, #0] 80121da: 681b ldr r3, [r3, #0] 80121dc: 68fa ldr r2, [r7, #12] 80121de: 4313 orrs r3, r2 80121e0: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 80121e2: 697b ldr r3, [r7, #20] 80121e4: f023 0302 bic.w r3, r3, #2 80121e8: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 80121ea: 683b ldr r3, [r7, #0] 80121ec: 689b ldr r3, [r3, #8] 80121ee: 697a ldr r2, [r7, #20] 80121f0: 4313 orrs r3, r2 80121f2: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 80121f4: 687b ldr r3, [r7, #4] 80121f6: 4a1c ldr r2, [pc, #112] @ (8012268 ) 80121f8: 4293 cmp r3, r2 80121fa: d10c bne.n 8012216 { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 80121fc: 697b ldr r3, [r7, #20] 80121fe: f023 0308 bic.w r3, r3, #8 8012202: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 8012204: 683b ldr r3, [r7, #0] 8012206: 68db ldr r3, [r3, #12] 8012208: 697a ldr r2, [r7, #20] 801220a: 4313 orrs r3, r2 801220c: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 801220e: 697b ldr r3, [r7, #20] 8012210: f023 0304 bic.w r3, r3, #4 8012214: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8012216: 687b ldr r3, [r7, #4] 8012218: 4a13 ldr r2, [pc, #76] @ (8012268 ) 801221a: 4293 cmp r3, r2 801221c: d111 bne.n 8012242 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 801221e: 693b ldr r3, [r7, #16] 8012220: f423 7380 bic.w r3, r3, #256 @ 0x100 8012224: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 8012226: 693b ldr r3, [r7, #16] 8012228: f423 7300 bic.w r3, r3, #512 @ 0x200 801222c: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 801222e: 683b ldr r3, [r7, #0] 8012230: 695b ldr r3, [r3, #20] 8012232: 693a ldr r2, [r7, #16] 8012234: 4313 orrs r3, r2 8012236: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 8012238: 683b ldr r3, [r7, #0] 801223a: 699b ldr r3, [r3, #24] 801223c: 693a ldr r2, [r7, #16] 801223e: 4313 orrs r3, r2 8012240: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8012242: 687b ldr r3, [r7, #4] 8012244: 693a ldr r2, [r7, #16] 8012246: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8012248: 687b ldr r3, [r7, #4] 801224a: 68fa ldr r2, [r7, #12] 801224c: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 801224e: 683b ldr r3, [r7, #0] 8012250: 685a ldr r2, [r3, #4] 8012252: 687b ldr r3, [r7, #4] 8012254: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8012256: 687b ldr r3, [r7, #4] 8012258: 697a ldr r2, [r7, #20] 801225a: 621a str r2, [r3, #32] } 801225c: bf00 nop 801225e: 371c adds r7, #28 8012260: 46bd mov sp, r7 8012262: bc80 pop {r7} 8012264: 4770 bx lr 8012266: bf00 nop 8012268: 40012c00 .word 0x40012c00 0801226c : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 801226c: b480 push {r7} 801226e: b087 sub sp, #28 8012270: af00 add r7, sp, #0 8012272: 6078 str r0, [r7, #4] 8012274: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8012276: 687b ldr r3, [r7, #4] 8012278: 6a1b ldr r3, [r3, #32] 801227a: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 801227c: 687b ldr r3, [r7, #4] 801227e: 6a1b ldr r3, [r3, #32] 8012280: f023 0210 bic.w r2, r3, #16 8012284: 687b ldr r3, [r7, #4] 8012286: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8012288: 687b ldr r3, [r7, #4] 801228a: 685b ldr r3, [r3, #4] 801228c: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 801228e: 687b ldr r3, [r7, #4] 8012290: 699b ldr r3, [r3, #24] 8012292: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8012294: 68fb ldr r3, [r7, #12] 8012296: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 801229a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 801229c: 68fb ldr r3, [r7, #12] 801229e: f423 7340 bic.w r3, r3, #768 @ 0x300 80122a2: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 80122a4: 683b ldr r3, [r7, #0] 80122a6: 681b ldr r3, [r3, #0] 80122a8: 021b lsls r3, r3, #8 80122aa: 68fa ldr r2, [r7, #12] 80122ac: 4313 orrs r3, r2 80122ae: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 80122b0: 697b ldr r3, [r7, #20] 80122b2: f023 0320 bic.w r3, r3, #32 80122b6: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 80122b8: 683b ldr r3, [r7, #0] 80122ba: 689b ldr r3, [r3, #8] 80122bc: 011b lsls r3, r3, #4 80122be: 697a ldr r2, [r7, #20] 80122c0: 4313 orrs r3, r2 80122c2: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 80122c4: 687b ldr r3, [r7, #4] 80122c6: 4a1d ldr r2, [pc, #116] @ (801233c ) 80122c8: 4293 cmp r3, r2 80122ca: d10d bne.n 80122e8 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 80122cc: 697b ldr r3, [r7, #20] 80122ce: f023 0380 bic.w r3, r3, #128 @ 0x80 80122d2: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 80122d4: 683b ldr r3, [r7, #0] 80122d6: 68db ldr r3, [r3, #12] 80122d8: 011b lsls r3, r3, #4 80122da: 697a ldr r2, [r7, #20] 80122dc: 4313 orrs r3, r2 80122de: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 80122e0: 697b ldr r3, [r7, #20] 80122e2: f023 0340 bic.w r3, r3, #64 @ 0x40 80122e6: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80122e8: 687b ldr r3, [r7, #4] 80122ea: 4a14 ldr r2, [pc, #80] @ (801233c ) 80122ec: 4293 cmp r3, r2 80122ee: d113 bne.n 8012318 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 80122f0: 693b ldr r3, [r7, #16] 80122f2: f423 6380 bic.w r3, r3, #1024 @ 0x400 80122f6: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 80122f8: 693b ldr r3, [r7, #16] 80122fa: f423 6300 bic.w r3, r3, #2048 @ 0x800 80122fe: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 8012300: 683b ldr r3, [r7, #0] 8012302: 695b ldr r3, [r3, #20] 8012304: 009b lsls r3, r3, #2 8012306: 693a ldr r2, [r7, #16] 8012308: 4313 orrs r3, r2 801230a: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 801230c: 683b ldr r3, [r7, #0] 801230e: 699b ldr r3, [r3, #24] 8012310: 009b lsls r3, r3, #2 8012312: 693a ldr r2, [r7, #16] 8012314: 4313 orrs r3, r2 8012316: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8012318: 687b ldr r3, [r7, #4] 801231a: 693a ldr r2, [r7, #16] 801231c: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 801231e: 687b ldr r3, [r7, #4] 8012320: 68fa ldr r2, [r7, #12] 8012322: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 8012324: 683b ldr r3, [r7, #0] 8012326: 685a ldr r2, [r3, #4] 8012328: 687b ldr r3, [r7, #4] 801232a: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 801232c: 687b ldr r3, [r7, #4] 801232e: 697a ldr r2, [r7, #20] 8012330: 621a str r2, [r3, #32] } 8012332: bf00 nop 8012334: 371c adds r7, #28 8012336: 46bd mov sp, r7 8012338: bc80 pop {r7} 801233a: 4770 bx lr 801233c: 40012c00 .word 0x40012c00 08012340 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8012340: b480 push {r7} 8012342: b087 sub sp, #28 8012344: af00 add r7, sp, #0 8012346: 6078 str r0, [r7, #4] 8012348: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 801234a: 687b ldr r3, [r7, #4] 801234c: 6a1b ldr r3, [r3, #32] 801234e: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 8012350: 687b ldr r3, [r7, #4] 8012352: 6a1b ldr r3, [r3, #32] 8012354: f423 7280 bic.w r2, r3, #256 @ 0x100 8012358: 687b ldr r3, [r7, #4] 801235a: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 801235c: 687b ldr r3, [r7, #4] 801235e: 685b ldr r3, [r3, #4] 8012360: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8012362: 687b ldr r3, [r7, #4] 8012364: 69db ldr r3, [r3, #28] 8012366: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 8012368: 68fb ldr r3, [r7, #12] 801236a: f023 0370 bic.w r3, r3, #112 @ 0x70 801236e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 8012370: 68fb ldr r3, [r7, #12] 8012372: f023 0303 bic.w r3, r3, #3 8012376: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8012378: 683b ldr r3, [r7, #0] 801237a: 681b ldr r3, [r3, #0] 801237c: 68fa ldr r2, [r7, #12] 801237e: 4313 orrs r3, r2 8012380: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 8012382: 697b ldr r3, [r7, #20] 8012384: f423 7300 bic.w r3, r3, #512 @ 0x200 8012388: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 801238a: 683b ldr r3, [r7, #0] 801238c: 689b ldr r3, [r3, #8] 801238e: 021b lsls r3, r3, #8 8012390: 697a ldr r2, [r7, #20] 8012392: 4313 orrs r3, r2 8012394: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 8012396: 687b ldr r3, [r7, #4] 8012398: 4a1d ldr r2, [pc, #116] @ (8012410 ) 801239a: 4293 cmp r3, r2 801239c: d10d bne.n 80123ba { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 801239e: 697b ldr r3, [r7, #20] 80123a0: f423 6300 bic.w r3, r3, #2048 @ 0x800 80123a4: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 80123a6: 683b ldr r3, [r7, #0] 80123a8: 68db ldr r3, [r3, #12] 80123aa: 021b lsls r3, r3, #8 80123ac: 697a ldr r2, [r7, #20] 80123ae: 4313 orrs r3, r2 80123b0: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 80123b2: 697b ldr r3, [r7, #20] 80123b4: f423 6380 bic.w r3, r3, #1024 @ 0x400 80123b8: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80123ba: 687b ldr r3, [r7, #4] 80123bc: 4a14 ldr r2, [pc, #80] @ (8012410 ) 80123be: 4293 cmp r3, r2 80123c0: d113 bne.n 80123ea /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 80123c2: 693b ldr r3, [r7, #16] 80123c4: f423 5380 bic.w r3, r3, #4096 @ 0x1000 80123c8: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 80123ca: 693b ldr r3, [r7, #16] 80123cc: f423 5300 bic.w r3, r3, #8192 @ 0x2000 80123d0: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 80123d2: 683b ldr r3, [r7, #0] 80123d4: 695b ldr r3, [r3, #20] 80123d6: 011b lsls r3, r3, #4 80123d8: 693a ldr r2, [r7, #16] 80123da: 4313 orrs r3, r2 80123dc: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 80123de: 683b ldr r3, [r7, #0] 80123e0: 699b ldr r3, [r3, #24] 80123e2: 011b lsls r3, r3, #4 80123e4: 693a ldr r2, [r7, #16] 80123e6: 4313 orrs r3, r2 80123e8: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80123ea: 687b ldr r3, [r7, #4] 80123ec: 693a ldr r2, [r7, #16] 80123ee: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 80123f0: 687b ldr r3, [r7, #4] 80123f2: 68fa ldr r2, [r7, #12] 80123f4: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 80123f6: 683b ldr r3, [r7, #0] 80123f8: 685a ldr r2, [r3, #4] 80123fa: 687b ldr r3, [r7, #4] 80123fc: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80123fe: 687b ldr r3, [r7, #4] 8012400: 697a ldr r2, [r7, #20] 8012402: 621a str r2, [r3, #32] } 8012404: bf00 nop 8012406: 371c adds r7, #28 8012408: 46bd mov sp, r7 801240a: bc80 pop {r7} 801240c: 4770 bx lr 801240e: bf00 nop 8012410: 40012c00 .word 0x40012c00 08012414 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8012414: b480 push {r7} 8012416: b087 sub sp, #28 8012418: af00 add r7, sp, #0 801241a: 6078 str r0, [r7, #4] 801241c: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 801241e: 687b ldr r3, [r7, #4] 8012420: 6a1b ldr r3, [r3, #32] 8012422: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 8012424: 687b ldr r3, [r7, #4] 8012426: 6a1b ldr r3, [r3, #32] 8012428: f423 5280 bic.w r2, r3, #4096 @ 0x1000 801242c: 687b ldr r3, [r7, #4] 801242e: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8012430: 687b ldr r3, [r7, #4] 8012432: 685b ldr r3, [r3, #4] 8012434: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8012436: 687b ldr r3, [r7, #4] 8012438: 69db ldr r3, [r3, #28] 801243a: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 801243c: 68fb ldr r3, [r7, #12] 801243e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8012442: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 8012444: 68fb ldr r3, [r7, #12] 8012446: f423 7340 bic.w r3, r3, #768 @ 0x300 801244a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 801244c: 683b ldr r3, [r7, #0] 801244e: 681b ldr r3, [r3, #0] 8012450: 021b lsls r3, r3, #8 8012452: 68fa ldr r2, [r7, #12] 8012454: 4313 orrs r3, r2 8012456: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 8012458: 693b ldr r3, [r7, #16] 801245a: f423 5300 bic.w r3, r3, #8192 @ 0x2000 801245e: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 8012460: 683b ldr r3, [r7, #0] 8012462: 689b ldr r3, [r3, #8] 8012464: 031b lsls r3, r3, #12 8012466: 693a ldr r2, [r7, #16] 8012468: 4313 orrs r3, r2 801246a: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 801246c: 687b ldr r3, [r7, #4] 801246e: 4a0f ldr r2, [pc, #60] @ (80124ac ) 8012470: 4293 cmp r3, r2 8012472: d109 bne.n 8012488 { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8012474: 697b ldr r3, [r7, #20] 8012476: f423 4380 bic.w r3, r3, #16384 @ 0x4000 801247a: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 801247c: 683b ldr r3, [r7, #0] 801247e: 695b ldr r3, [r3, #20] 8012480: 019b lsls r3, r3, #6 8012482: 697a ldr r2, [r7, #20] 8012484: 4313 orrs r3, r2 8012486: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8012488: 687b ldr r3, [r7, #4] 801248a: 697a ldr r2, [r7, #20] 801248c: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 801248e: 687b ldr r3, [r7, #4] 8012490: 68fa ldr r2, [r7, #12] 8012492: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8012494: 683b ldr r3, [r7, #0] 8012496: 685a ldr r2, [r3, #4] 8012498: 687b ldr r3, [r7, #4] 801249a: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 801249c: 687b ldr r3, [r7, #4] 801249e: 693a ldr r2, [r7, #16] 80124a0: 621a str r2, [r3, #32] } 80124a2: bf00 nop 80124a4: 371c adds r7, #28 80124a6: 46bd mov sp, r7 80124a8: bc80 pop {r7} 80124aa: 4770 bx lr 80124ac: 40012c00 .word 0x40012c00 080124b0 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 80124b0: b480 push {r7} 80124b2: b087 sub sp, #28 80124b4: af00 add r7, sp, #0 80124b6: 60f8 str r0, [r7, #12] 80124b8: 60b9 str r1, [r7, #8] 80124ba: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 80124bc: 68fb ldr r3, [r7, #12] 80124be: 6a1b ldr r3, [r3, #32] 80124c0: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 80124c2: 68fb ldr r3, [r7, #12] 80124c4: 6a1b ldr r3, [r3, #32] 80124c6: f023 0201 bic.w r2, r3, #1 80124ca: 68fb ldr r3, [r7, #12] 80124cc: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 80124ce: 68fb ldr r3, [r7, #12] 80124d0: 699b ldr r3, [r3, #24] 80124d2: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 80124d4: 693b ldr r3, [r7, #16] 80124d6: f023 03f0 bic.w r3, r3, #240 @ 0xf0 80124da: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 80124dc: 687b ldr r3, [r7, #4] 80124de: 011b lsls r3, r3, #4 80124e0: 693a ldr r2, [r7, #16] 80124e2: 4313 orrs r3, r2 80124e4: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 80124e6: 697b ldr r3, [r7, #20] 80124e8: f023 030a bic.w r3, r3, #10 80124ec: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 80124ee: 697a ldr r2, [r7, #20] 80124f0: 68bb ldr r3, [r7, #8] 80124f2: 4313 orrs r3, r2 80124f4: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 80124f6: 68fb ldr r3, [r7, #12] 80124f8: 693a ldr r2, [r7, #16] 80124fa: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 80124fc: 68fb ldr r3, [r7, #12] 80124fe: 697a ldr r2, [r7, #20] 8012500: 621a str r2, [r3, #32] } 8012502: bf00 nop 8012504: 371c adds r7, #28 8012506: 46bd mov sp, r7 8012508: bc80 pop {r7} 801250a: 4770 bx lr 0801250c : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 801250c: b480 push {r7} 801250e: b087 sub sp, #28 8012510: af00 add r7, sp, #0 8012512: 60f8 str r0, [r7, #12] 8012514: 60b9 str r1, [r7, #8] 8012516: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; 8012518: 68fb ldr r3, [r7, #12] 801251a: 6a1b ldr r3, [r3, #32] 801251c: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; 801251e: 68fb ldr r3, [r7, #12] 8012520: 6a1b ldr r3, [r3, #32] 8012522: f023 0210 bic.w r2, r3, #16 8012526: 68fb ldr r3, [r7, #12] 8012528: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 801252a: 68fb ldr r3, [r7, #12] 801252c: 699b ldr r3, [r3, #24] 801252e: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 8012530: 693b ldr r3, [r7, #16] 8012532: f423 4370 bic.w r3, r3, #61440 @ 0xf000 8012536: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); 8012538: 687b ldr r3, [r7, #4] 801253a: 031b lsls r3, r3, #12 801253c: 693a ldr r2, [r7, #16] 801253e: 4313 orrs r3, r2 8012540: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 8012542: 697b ldr r3, [r7, #20] 8012544: f023 03a0 bic.w r3, r3, #160 @ 0xa0 8012548: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); 801254a: 68bb ldr r3, [r7, #8] 801254c: 011b lsls r3, r3, #4 801254e: 697a ldr r2, [r7, #20] 8012550: 4313 orrs r3, r2 8012552: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 8012554: 68fb ldr r3, [r7, #12] 8012556: 693a ldr r2, [r7, #16] 8012558: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 801255a: 68fb ldr r3, [r7, #12] 801255c: 697a ldr r2, [r7, #20] 801255e: 621a str r2, [r3, #32] } 8012560: bf00 nop 8012562: 371c adds r7, #28 8012564: 46bd mov sp, r7 8012566: bc80 pop {r7} 8012568: 4770 bx lr 0801256a : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 801256a: b480 push {r7} 801256c: b085 sub sp, #20 801256e: af00 add r7, sp, #0 8012570: 6078 str r0, [r7, #4] 8012572: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 8012574: 687b ldr r3, [r7, #4] 8012576: 689b ldr r3, [r3, #8] 8012578: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 801257a: 68fb ldr r3, [r7, #12] 801257c: f023 0370 bic.w r3, r3, #112 @ 0x70 8012580: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 8012582: 683a ldr r2, [r7, #0] 8012584: 68fb ldr r3, [r7, #12] 8012586: 4313 orrs r3, r2 8012588: f043 0307 orr.w r3, r3, #7 801258c: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 801258e: 687b ldr r3, [r7, #4] 8012590: 68fa ldr r2, [r7, #12] 8012592: 609a str r2, [r3, #8] } 8012594: bf00 nop 8012596: 3714 adds r7, #20 8012598: 46bd mov sp, r7 801259a: bc80 pop {r7} 801259c: 4770 bx lr 0801259e : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 801259e: b480 push {r7} 80125a0: b087 sub sp, #28 80125a2: af00 add r7, sp, #0 80125a4: 60f8 str r0, [r7, #12] 80125a6: 60b9 str r1, [r7, #8] 80125a8: 607a str r2, [r7, #4] 80125aa: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 80125ac: 68fb ldr r3, [r7, #12] 80125ae: 689b ldr r3, [r3, #8] 80125b0: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 80125b2: 697b ldr r3, [r7, #20] 80125b4: f423 437f bic.w r3, r3, #65280 @ 0xff00 80125b8: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 80125ba: 683b ldr r3, [r7, #0] 80125bc: 021a lsls r2, r3, #8 80125be: 687b ldr r3, [r7, #4] 80125c0: 431a orrs r2, r3 80125c2: 68bb ldr r3, [r7, #8] 80125c4: 4313 orrs r3, r2 80125c6: 697a ldr r2, [r7, #20] 80125c8: 4313 orrs r3, r2 80125ca: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 80125cc: 68fb ldr r3, [r7, #12] 80125ce: 697a ldr r2, [r7, #20] 80125d0: 609a str r2, [r3, #8] } 80125d2: bf00 nop 80125d4: 371c adds r7, #28 80125d6: 46bd mov sp, r7 80125d8: bc80 pop {r7} 80125da: 4770 bx lr 080125dc : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 80125dc: b480 push {r7} 80125de: b087 sub sp, #28 80125e0: af00 add r7, sp, #0 80125e2: 60f8 str r0, [r7, #12] 80125e4: 60b9 str r1, [r7, #8] 80125e6: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 80125e8: 68bb ldr r3, [r7, #8] 80125ea: f003 031f and.w r3, r3, #31 80125ee: 2201 movs r2, #1 80125f0: fa02 f303 lsl.w r3, r2, r3 80125f4: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 80125f6: 68fb ldr r3, [r7, #12] 80125f8: 6a1a ldr r2, [r3, #32] 80125fa: 697b ldr r3, [r7, #20] 80125fc: 43db mvns r3, r3 80125fe: 401a ands r2, r3 8012600: 68fb ldr r3, [r7, #12] 8012602: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 8012604: 68fb ldr r3, [r7, #12] 8012606: 6a1a ldr r2, [r3, #32] 8012608: 68bb ldr r3, [r7, #8] 801260a: f003 031f and.w r3, r3, #31 801260e: 6879 ldr r1, [r7, #4] 8012610: fa01 f303 lsl.w r3, r1, r3 8012614: 431a orrs r2, r3 8012616: 68fb ldr r3, [r7, #12] 8012618: 621a str r2, [r3, #32] } 801261a: bf00 nop 801261c: 371c adds r7, #28 801261e: 46bd mov sp, r7 8012620: bc80 pop {r7} 8012622: 4770 bx lr 08012624 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 8012624: b480 push {r7} 8012626: b085 sub sp, #20 8012628: af00 add r7, sp, #0 801262a: 6078 str r0, [r7, #4] 801262c: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 801262e: 687b ldr r3, [r7, #4] 8012630: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8012634: 2b01 cmp r3, #1 8012636: d101 bne.n 801263c 8012638: 2302 movs r3, #2 801263a: e04b b.n 80126d4 801263c: 687b ldr r3, [r7, #4] 801263e: 2201 movs r2, #1 8012640: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 8012644: 687b ldr r3, [r7, #4] 8012646: 2202 movs r2, #2 8012648: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 801264c: 687b ldr r3, [r7, #4] 801264e: 681b ldr r3, [r3, #0] 8012650: 685b ldr r3, [r3, #4] 8012652: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8012654: 687b ldr r3, [r7, #4] 8012656: 681b ldr r3, [r3, #0] 8012658: 689b ldr r3, [r3, #8] 801265a: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 801265c: 68fb ldr r3, [r7, #12] 801265e: f023 0370 bic.w r3, r3, #112 @ 0x70 8012662: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 8012664: 683b ldr r3, [r7, #0] 8012666: 681b ldr r3, [r3, #0] 8012668: 68fa ldr r2, [r7, #12] 801266a: 4313 orrs r3, r2 801266c: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 801266e: 687b ldr r3, [r7, #4] 8012670: 681b ldr r3, [r3, #0] 8012672: 68fa ldr r2, [r7, #12] 8012674: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8012676: 687b ldr r3, [r7, #4] 8012678: 681b ldr r3, [r3, #0] 801267a: 4a19 ldr r2, [pc, #100] @ (80126e0 ) 801267c: 4293 cmp r3, r2 801267e: d013 beq.n 80126a8 8012680: 687b ldr r3, [r7, #4] 8012682: 681b ldr r3, [r3, #0] 8012684: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8012688: d00e beq.n 80126a8 801268a: 687b ldr r3, [r7, #4] 801268c: 681b ldr r3, [r3, #0] 801268e: 4a15 ldr r2, [pc, #84] @ (80126e4 ) 8012690: 4293 cmp r3, r2 8012692: d009 beq.n 80126a8 8012694: 687b ldr r3, [r7, #4] 8012696: 681b ldr r3, [r3, #0] 8012698: 4a13 ldr r2, [pc, #76] @ (80126e8 ) 801269a: 4293 cmp r3, r2 801269c: d004 beq.n 80126a8 801269e: 687b ldr r3, [r7, #4] 80126a0: 681b ldr r3, [r3, #0] 80126a2: 4a12 ldr r2, [pc, #72] @ (80126ec ) 80126a4: 4293 cmp r3, r2 80126a6: d10c bne.n 80126c2 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 80126a8: 68bb ldr r3, [r7, #8] 80126aa: f023 0380 bic.w r3, r3, #128 @ 0x80 80126ae: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 80126b0: 683b ldr r3, [r7, #0] 80126b2: 685b ldr r3, [r3, #4] 80126b4: 68ba ldr r2, [r7, #8] 80126b6: 4313 orrs r3, r2 80126b8: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 80126ba: 687b ldr r3, [r7, #4] 80126bc: 681b ldr r3, [r3, #0] 80126be: 68ba ldr r2, [r7, #8] 80126c0: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 80126c2: 687b ldr r3, [r7, #4] 80126c4: 2201 movs r2, #1 80126c6: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 80126ca: 687b ldr r3, [r7, #4] 80126cc: 2200 movs r2, #0 80126ce: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 80126d2: 2300 movs r3, #0 } 80126d4: 4618 mov r0, r3 80126d6: 3714 adds r7, #20 80126d8: 46bd mov sp, r7 80126da: bc80 pop {r7} 80126dc: 4770 bx lr 80126de: bf00 nop 80126e0: 40012c00 .word 0x40012c00 80126e4: 40000400 .word 0x40000400 80126e8: 40000800 .word 0x40000800 80126ec: 40000c00 .word 0x40000c00 080126f0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 80126f0: b580 push {r7, lr} 80126f2: b082 sub sp, #8 80126f4: af00 add r7, sp, #0 80126f6: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 80126f8: 687b ldr r3, [r7, #4] 80126fa: 2b00 cmp r3, #0 80126fc: d101 bne.n 8012702 { return HAL_ERROR; 80126fe: 2301 movs r3, #1 8012700: e042 b.n 8012788 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 8012702: 687b ldr r3, [r7, #4] 8012704: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8012708: b2db uxtb r3, r3 801270a: 2b00 cmp r3, #0 801270c: d106 bne.n 801271c { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 801270e: 687b ldr r3, [r7, #4] 8012710: 2200 movs r2, #0 8012712: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 8012716: 6878 ldr r0, [r7, #4] 8012718: f7fb fe96 bl 800e448 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 801271c: 687b ldr r3, [r7, #4] 801271e: 2224 movs r2, #36 @ 0x24 8012720: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 8012724: 687b ldr r3, [r7, #4] 8012726: 681b ldr r3, [r3, #0] 8012728: 68da ldr r2, [r3, #12] 801272a: 687b ldr r3, [r7, #4] 801272c: 681b ldr r3, [r3, #0] 801272e: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8012732: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 8012734: 6878 ldr r0, [r7, #4] 8012736: f000 feb3 bl 80134a0 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 801273a: 687b ldr r3, [r7, #4] 801273c: 681b ldr r3, [r3, #0] 801273e: 691a ldr r2, [r3, #16] 8012740: 687b ldr r3, [r7, #4] 8012742: 681b ldr r3, [r3, #0] 8012744: f422 4290 bic.w r2, r2, #18432 @ 0x4800 8012748: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 801274a: 687b ldr r3, [r7, #4] 801274c: 681b ldr r3, [r3, #0] 801274e: 695a ldr r2, [r3, #20] 8012750: 687b ldr r3, [r7, #4] 8012752: 681b ldr r3, [r3, #0] 8012754: f022 022a bic.w r2, r2, #42 @ 0x2a 8012758: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 801275a: 687b ldr r3, [r7, #4] 801275c: 681b ldr r3, [r3, #0] 801275e: 68da ldr r2, [r3, #12] 8012760: 687b ldr r3, [r7, #4] 8012762: 681b ldr r3, [r3, #0] 8012764: f442 5200 orr.w r2, r2, #8192 @ 0x2000 8012768: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 801276a: 687b ldr r3, [r7, #4] 801276c: 2200 movs r2, #0 801276e: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 8012770: 687b ldr r3, [r7, #4] 8012772: 2220 movs r2, #32 8012774: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8012778: 687b ldr r3, [r7, #4] 801277a: 2220 movs r2, #32 801277c: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 8012780: 687b ldr r3, [r7, #4] 8012782: 2200 movs r2, #0 8012784: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 8012786: 2300 movs r3, #0 } 8012788: 4618 mov r0, r3 801278a: 3708 adds r7, #8 801278c: 46bd mov sp, r7 801278e: bd80 pop {r7, pc} 08012790 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { 8012790: b480 push {r7} 8012792: b085 sub sp, #20 8012794: af00 add r7, sp, #0 8012796: 60f8 str r0, [r7, #12] 8012798: 60b9 str r1, [r7, #8] 801279a: 4613 mov r3, r2 801279c: 80fb strh r3, [r7, #6] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 801279e: 68fb ldr r3, [r7, #12] 80127a0: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 80127a4: b2db uxtb r3, r3 80127a6: 2b20 cmp r3, #32 80127a8: d121 bne.n 80127ee { if ((pData == NULL) || (Size == 0U)) 80127aa: 68bb ldr r3, [r7, #8] 80127ac: 2b00 cmp r3, #0 80127ae: d002 beq.n 80127b6 80127b0: 88fb ldrh r3, [r7, #6] 80127b2: 2b00 cmp r3, #0 80127b4: d101 bne.n 80127ba { return HAL_ERROR; 80127b6: 2301 movs r3, #1 80127b8: e01a b.n 80127f0 } huart->pTxBuffPtr = pData; 80127ba: 68fb ldr r3, [r7, #12] 80127bc: 68ba ldr r2, [r7, #8] 80127be: 621a str r2, [r3, #32] huart->TxXferSize = Size; 80127c0: 68fb ldr r3, [r7, #12] 80127c2: 88fa ldrh r2, [r7, #6] 80127c4: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 80127c6: 68fb ldr r3, [r7, #12] 80127c8: 88fa ldrh r2, [r7, #6] 80127ca: 84da strh r2, [r3, #38] @ 0x26 huart->ErrorCode = HAL_UART_ERROR_NONE; 80127cc: 68fb ldr r3, [r7, #12] 80127ce: 2200 movs r2, #0 80127d0: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; 80127d2: 68fb ldr r3, [r7, #12] 80127d4: 2221 movs r2, #33 @ 0x21 80127d6: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the UART Transmit data register empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TXE); 80127da: 68fb ldr r3, [r7, #12] 80127dc: 681b ldr r3, [r3, #0] 80127de: 68da ldr r2, [r3, #12] 80127e0: 68fb ldr r3, [r7, #12] 80127e2: 681b ldr r3, [r3, #0] 80127e4: f042 0280 orr.w r2, r2, #128 @ 0x80 80127e8: 60da str r2, [r3, #12] return HAL_OK; 80127ea: 2300 movs r3, #0 80127ec: e000 b.n 80127f0 } else { return HAL_BUSY; 80127ee: 2302 movs r3, #2 } } 80127f0: 4618 mov r0, r3 80127f2: 3714 adds r7, #20 80127f4: 46bd mov sp, r7 80127f6: bc80 pop {r7} 80127f8: 4770 bx lr 080127fa : * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). * @param Size Amount of data elements (uint8_t or uint16_t) to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 80127fa: b580 push {r7, lr} 80127fc: b08c sub sp, #48 @ 0x30 80127fe: af00 add r7, sp, #0 8012800: 60f8 str r0, [r7, #12] 8012802: 60b9 str r1, [r7, #8] 8012804: 4613 mov r3, r2 8012806: 80fb strh r3, [r7, #6] HAL_StatusTypeDef status; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) 8012808: 68fb ldr r3, [r7, #12] 801280a: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 801280e: b2db uxtb r3, r3 8012810: 2b20 cmp r3, #32 8012812: d14a bne.n 80128aa { if ((pData == NULL) || (Size == 0U)) 8012814: 68bb ldr r3, [r7, #8] 8012816: 2b00 cmp r3, #0 8012818: d002 beq.n 8012820 801281a: 88fb ldrh r3, [r7, #6] 801281c: 2b00 cmp r3, #0 801281e: d101 bne.n 8012824 { return HAL_ERROR; 8012820: 2301 movs r3, #1 8012822: e043 b.n 80128ac } /* Set Reception type to reception till IDLE Event*/ huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; 8012824: 68fb ldr r3, [r7, #12] 8012826: 2201 movs r2, #1 8012828: 631a str r2, [r3, #48] @ 0x30 huart->RxEventType = HAL_UART_RXEVENT_TC; 801282a: 68fb ldr r3, [r7, #12] 801282c: 2200 movs r2, #0 801282e: 635a str r2, [r3, #52] @ 0x34 status = UART_Start_Receive_IT(huart, pData, Size); 8012830: 88fb ldrh r3, [r7, #6] 8012832: 461a mov r2, r3 8012834: 68b9 ldr r1, [r7, #8] 8012836: 68f8 ldr r0, [r7, #12] 8012838: f000 fbfd bl 8013036 801283c: 4603 mov r3, r0 801283e: f887 302f strb.w r3, [r7, #47] @ 0x2f /* Check Rx process has been successfully started */ if (status == HAL_OK) 8012842: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 8012846: 2b00 cmp r3, #0 8012848: d12c bne.n 80128a4 { if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 801284a: 68fb ldr r3, [r7, #12] 801284c: 6b1b ldr r3, [r3, #48] @ 0x30 801284e: 2b01 cmp r3, #1 8012850: d125 bne.n 801289e { __HAL_UART_CLEAR_IDLEFLAG(huart); 8012852: 2300 movs r3, #0 8012854: 613b str r3, [r7, #16] 8012856: 68fb ldr r3, [r7, #12] 8012858: 681b ldr r3, [r3, #0] 801285a: 681b ldr r3, [r3, #0] 801285c: 613b str r3, [r7, #16] 801285e: 68fb ldr r3, [r7, #12] 8012860: 681b ldr r3, [r3, #0] 8012862: 685b ldr r3, [r3, #4] 8012864: 613b str r3, [r7, #16] 8012866: 693b ldr r3, [r7, #16] ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8012868: 68fb ldr r3, [r7, #12] 801286a: 681b ldr r3, [r3, #0] 801286c: 330c adds r3, #12 801286e: 61bb str r3, [r7, #24] */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012870: 69bb ldr r3, [r7, #24] 8012872: e853 3f00 ldrex r3, [r3] 8012876: 617b str r3, [r7, #20] return(result); 8012878: 697b ldr r3, [r7, #20] 801287a: f043 0310 orr.w r3, r3, #16 801287e: 62bb str r3, [r7, #40] @ 0x28 8012880: 68fb ldr r3, [r7, #12] 8012882: 681b ldr r3, [r3, #0] 8012884: 330c adds r3, #12 8012886: 6aba ldr r2, [r7, #40] @ 0x28 8012888: 627a str r2, [r7, #36] @ 0x24 801288a: 623b str r3, [r7, #32] */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801288c: 6a39 ldr r1, [r7, #32] 801288e: 6a7a ldr r2, [r7, #36] @ 0x24 8012890: e841 2300 strex r3, r2, [r1] 8012894: 61fb str r3, [r7, #28] return(result); 8012896: 69fb ldr r3, [r7, #28] 8012898: 2b00 cmp r3, #0 801289a: d1e5 bne.n 8012868 801289c: e002 b.n 80128a4 { /* In case of errors already pending when reception is started, Interrupts may have already been raised and lead to reception abortion. (Overrun error for instance). In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ status = HAL_ERROR; 801289e: 2301 movs r3, #1 80128a0: f887 302f strb.w r3, [r7, #47] @ 0x2f } } return status; 80128a4: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 80128a8: e000 b.n 80128ac } else { return HAL_BUSY; 80128aa: 2302 movs r3, #2 } } 80128ac: 4618 mov r0, r3 80128ae: 3730 adds r7, #48 @ 0x30 80128b0: 46bd mov sp, r7 80128b2: bd80 pop {r7, pc} 080128b4 : * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be * considered as completed only when user abort complete callback is executed (not when exiting function). * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) { 80128b4: b580 push {r7, lr} 80128b6: b0a2 sub sp, #136 @ 0x88 80128b8: af00 add r7, sp, #0 80128ba: 6078 str r0, [r7, #4] uint32_t AbortCplt = 0x01U; 80128bc: 2301 movs r3, #1 80128be: f8c7 3084 str.w r3, [r7, #132] @ 0x84 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); 80128c2: 687b ldr r3, [r7, #4] 80128c4: 681b ldr r3, [r3, #0] 80128c6: 330c adds r3, #12 80128c8: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80128ca: 6e3b ldr r3, [r7, #96] @ 0x60 80128cc: e853 3f00 ldrex r3, [r3] 80128d0: 65fb str r3, [r7, #92] @ 0x5c return(result); 80128d2: 6dfb ldr r3, [r7, #92] @ 0x5c 80128d4: f423 73f0 bic.w r3, r3, #480 @ 0x1e0 80128d8: f8c7 3080 str.w r3, [r7, #128] @ 0x80 80128dc: 687b ldr r3, [r7, #4] 80128de: 681b ldr r3, [r3, #0] 80128e0: 330c adds r3, #12 80128e2: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 80128e6: 66fa str r2, [r7, #108] @ 0x6c 80128e8: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80128ea: 6eb9 ldr r1, [r7, #104] @ 0x68 80128ec: 6efa ldr r2, [r7, #108] @ 0x6c 80128ee: e841 2300 strex r3, r2, [r1] 80128f2: 667b str r3, [r7, #100] @ 0x64 return(result); 80128f4: 6e7b ldr r3, [r7, #100] @ 0x64 80128f6: 2b00 cmp r3, #0 80128f8: d1e3 bne.n 80128c2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80128fa: 687b ldr r3, [r7, #4] 80128fc: 681b ldr r3, [r3, #0] 80128fe: 3314 adds r3, #20 8012900: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012902: 6cfb ldr r3, [r7, #76] @ 0x4c 8012904: e853 3f00 ldrex r3, [r3] 8012908: 64bb str r3, [r7, #72] @ 0x48 return(result); 801290a: 6cbb ldr r3, [r7, #72] @ 0x48 801290c: f023 0301 bic.w r3, r3, #1 8012910: 67fb str r3, [r7, #124] @ 0x7c 8012912: 687b ldr r3, [r7, #4] 8012914: 681b ldr r3, [r3, #0] 8012916: 3314 adds r3, #20 8012918: 6ffa ldr r2, [r7, #124] @ 0x7c 801291a: 65ba str r2, [r7, #88] @ 0x58 801291c: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801291e: 6d79 ldr r1, [r7, #84] @ 0x54 8012920: 6dba ldr r2, [r7, #88] @ 0x58 8012922: e841 2300 strex r3, r2, [r1] 8012926: 653b str r3, [r7, #80] @ 0x50 return(result); 8012928: 6d3b ldr r3, [r7, #80] @ 0x50 801292a: 2b00 cmp r3, #0 801292c: d1e5 bne.n 80128fa /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 801292e: 687b ldr r3, [r7, #4] 8012930: 6b1b ldr r3, [r3, #48] @ 0x30 8012932: 2b01 cmp r3, #1 8012934: d119 bne.n 801296a { ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); 8012936: 687b ldr r3, [r7, #4] 8012938: 681b ldr r3, [r3, #0] 801293a: 330c adds r3, #12 801293c: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 801293e: 6bbb ldr r3, [r7, #56] @ 0x38 8012940: e853 3f00 ldrex r3, [r3] 8012944: 637b str r3, [r7, #52] @ 0x34 return(result); 8012946: 6b7b ldr r3, [r7, #52] @ 0x34 8012948: f023 0310 bic.w r3, r3, #16 801294c: 67bb str r3, [r7, #120] @ 0x78 801294e: 687b ldr r3, [r7, #4] 8012950: 681b ldr r3, [r3, #0] 8012952: 330c adds r3, #12 8012954: 6fba ldr r2, [r7, #120] @ 0x78 8012956: 647a str r2, [r7, #68] @ 0x44 8012958: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801295a: 6c39 ldr r1, [r7, #64] @ 0x40 801295c: 6c7a ldr r2, [r7, #68] @ 0x44 801295e: e841 2300 strex r3, r2, [r1] 8012962: 63fb str r3, [r7, #60] @ 0x3c return(result); 8012964: 6bfb ldr r3, [r7, #60] @ 0x3c 8012966: 2b00 cmp r3, #0 8012968: d1e5 bne.n 8012936 } /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised before any call to DMA Abort functions */ /* DMA Tx Handle is valid */ if (huart->hdmatx != NULL) 801296a: 687b ldr r3, [r7, #4] 801296c: 6b9b ldr r3, [r3, #56] @ 0x38 801296e: 2b00 cmp r3, #0 8012970: d00f beq.n 8012992 { /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. Otherwise, set it to NULL */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 8012972: 687b ldr r3, [r7, #4] 8012974: 681b ldr r3, [r3, #0] 8012976: 695b ldr r3, [r3, #20] 8012978: f003 0380 and.w r3, r3, #128 @ 0x80 801297c: 2b00 cmp r3, #0 801297e: d004 beq.n 801298a { huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback; 8012980: 687b ldr r3, [r7, #4] 8012982: 6b9b ldr r3, [r3, #56] @ 0x38 8012984: 4a53 ldr r2, [pc, #332] @ (8012ad4 ) 8012986: 635a str r2, [r3, #52] @ 0x34 8012988: e003 b.n 8012992 } else { huart->hdmatx->XferAbortCallback = NULL; 801298a: 687b ldr r3, [r7, #4] 801298c: 6b9b ldr r3, [r3, #56] @ 0x38 801298e: 2200 movs r2, #0 8012990: 635a str r2, [r3, #52] @ 0x34 } } /* DMA Rx Handle is valid */ if (huart->hdmarx != NULL) 8012992: 687b ldr r3, [r7, #4] 8012994: 6bdb ldr r3, [r3, #60] @ 0x3c 8012996: 2b00 cmp r3, #0 8012998: d00f beq.n 80129ba { /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. Otherwise, set it to NULL */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 801299a: 687b ldr r3, [r7, #4] 801299c: 681b ldr r3, [r3, #0] 801299e: 695b ldr r3, [r3, #20] 80129a0: f003 0340 and.w r3, r3, #64 @ 0x40 80129a4: 2b00 cmp r3, #0 80129a6: d004 beq.n 80129b2 { huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback; 80129a8: 687b ldr r3, [r7, #4] 80129aa: 6bdb ldr r3, [r3, #60] @ 0x3c 80129ac: 4a4a ldr r2, [pc, #296] @ (8012ad8 ) 80129ae: 635a str r2, [r3, #52] @ 0x34 80129b0: e003 b.n 80129ba } else { huart->hdmarx->XferAbortCallback = NULL; 80129b2: 687b ldr r3, [r7, #4] 80129b4: 6bdb ldr r3, [r3, #60] @ 0x3c 80129b6: 2200 movs r2, #0 80129b8: 635a str r2, [r3, #52] @ 0x34 } } /* Disable the UART DMA Tx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 80129ba: 687b ldr r3, [r7, #4] 80129bc: 681b ldr r3, [r3, #0] 80129be: 695b ldr r3, [r3, #20] 80129c0: f003 0380 and.w r3, r3, #128 @ 0x80 80129c4: 2b00 cmp r3, #0 80129c6: d02d beq.n 8012a24 { /* Disable DMA Tx at UART level */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 80129c8: 687b ldr r3, [r7, #4] 80129ca: 681b ldr r3, [r3, #0] 80129cc: 3314 adds r3, #20 80129ce: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80129d0: 6a7b ldr r3, [r7, #36] @ 0x24 80129d2: e853 3f00 ldrex r3, [r3] 80129d6: 623b str r3, [r7, #32] return(result); 80129d8: 6a3b ldr r3, [r7, #32] 80129da: f023 0380 bic.w r3, r3, #128 @ 0x80 80129de: 677b str r3, [r7, #116] @ 0x74 80129e0: 687b ldr r3, [r7, #4] 80129e2: 681b ldr r3, [r3, #0] 80129e4: 3314 adds r3, #20 80129e6: 6f7a ldr r2, [r7, #116] @ 0x74 80129e8: 633a str r2, [r7, #48] @ 0x30 80129ea: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80129ec: 6af9 ldr r1, [r7, #44] @ 0x2c 80129ee: 6b3a ldr r2, [r7, #48] @ 0x30 80129f0: e841 2300 strex r3, r2, [r1] 80129f4: 62bb str r3, [r7, #40] @ 0x28 return(result); 80129f6: 6abb ldr r3, [r7, #40] @ 0x28 80129f8: 2b00 cmp r3, #0 80129fa: d1e5 bne.n 80129c8 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmatx != NULL) 80129fc: 687b ldr r3, [r7, #4] 80129fe: 6b9b ldr r3, [r3, #56] @ 0x38 8012a00: 2b00 cmp r3, #0 8012a02: d00f beq.n 8012a24 { /* UART Tx DMA Abort callback has already been initialised : will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ /* Abort DMA TX */ if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) 8012a04: 687b ldr r3, [r7, #4] 8012a06: 6b9b ldr r3, [r3, #56] @ 0x38 8012a08: 4618 mov r0, r3 8012a0a: f7fd fc45 bl 8010298 8012a0e: 4603 mov r3, r0 8012a10: 2b00 cmp r3, #0 8012a12: d004 beq.n 8012a1e { huart->hdmatx->XferAbortCallback = NULL; 8012a14: 687b ldr r3, [r7, #4] 8012a16: 6b9b ldr r3, [r3, #56] @ 0x38 8012a18: 2200 movs r2, #0 8012a1a: 635a str r2, [r3, #52] @ 0x34 8012a1c: e002 b.n 8012a24 } else { AbortCplt = 0x00U; 8012a1e: 2300 movs r3, #0 8012a20: f8c7 3084 str.w r3, [r7, #132] @ 0x84 } } } /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012a24: 687b ldr r3, [r7, #4] 8012a26: 681b ldr r3, [r3, #0] 8012a28: 695b ldr r3, [r3, #20] 8012a2a: f003 0340 and.w r3, r3, #64 @ 0x40 8012a2e: 2b00 cmp r3, #0 8012a30: d030 beq.n 8012a94 { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8012a32: 687b ldr r3, [r7, #4] 8012a34: 681b ldr r3, [r3, #0] 8012a36: 3314 adds r3, #20 8012a38: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012a3a: 693b ldr r3, [r7, #16] 8012a3c: e853 3f00 ldrex r3, [r3] 8012a40: 60fb str r3, [r7, #12] return(result); 8012a42: 68fb ldr r3, [r7, #12] 8012a44: f023 0340 bic.w r3, r3, #64 @ 0x40 8012a48: 673b str r3, [r7, #112] @ 0x70 8012a4a: 687b ldr r3, [r7, #4] 8012a4c: 681b ldr r3, [r3, #0] 8012a4e: 3314 adds r3, #20 8012a50: 6f3a ldr r2, [r7, #112] @ 0x70 8012a52: 61fa str r2, [r7, #28] 8012a54: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012a56: 69b9 ldr r1, [r7, #24] 8012a58: 69fa ldr r2, [r7, #28] 8012a5a: e841 2300 strex r3, r2, [r1] 8012a5e: 617b str r3, [r7, #20] return(result); 8012a60: 697b ldr r3, [r7, #20] 8012a62: 2b00 cmp r3, #0 8012a64: d1e5 bne.n 8012a32 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmarx != NULL) 8012a66: 687b ldr r3, [r7, #4] 8012a68: 6bdb ldr r3, [r3, #60] @ 0x3c 8012a6a: 2b00 cmp r3, #0 8012a6c: d012 beq.n 8012a94 { /* UART Rx DMA Abort callback has already been initialised : will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ /* Abort DMA RX */ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8012a6e: 687b ldr r3, [r7, #4] 8012a70: 6bdb ldr r3, [r3, #60] @ 0x3c 8012a72: 4618 mov r0, r3 8012a74: f7fd fc10 bl 8010298 8012a78: 4603 mov r3, r0 8012a7a: 2b00 cmp r3, #0 8012a7c: d007 beq.n 8012a8e { huart->hdmarx->XferAbortCallback = NULL; 8012a7e: 687b ldr r3, [r7, #4] 8012a80: 6bdb ldr r3, [r3, #60] @ 0x3c 8012a82: 2200 movs r2, #0 8012a84: 635a str r2, [r3, #52] @ 0x34 AbortCplt = 0x01U; 8012a86: 2301 movs r3, #1 8012a88: f8c7 3084 str.w r3, [r7, #132] @ 0x84 8012a8c: e002 b.n 8012a94 } else { AbortCplt = 0x00U; 8012a8e: 2300 movs r3, #0 8012a90: f8c7 3084 str.w r3, [r7, #132] @ 0x84 } } } /* if no DMA abort complete callback execution is required => call user Abort Complete callback */ if (AbortCplt == 0x01U) 8012a94: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8012a98: 2b01 cmp r3, #1 8012a9a: d116 bne.n 8012aca { /* Reset Tx and Rx transfer counters */ huart->TxXferCount = 0x00U; 8012a9c: 687b ldr r3, [r7, #4] 8012a9e: 2200 movs r2, #0 8012aa0: 84da strh r2, [r3, #38] @ 0x26 huart->RxXferCount = 0x00U; 8012aa2: 687b ldr r3, [r7, #4] 8012aa4: 2200 movs r2, #0 8012aa6: 85da strh r2, [r3, #46] @ 0x2e /* Reset ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8012aa8: 687b ldr r3, [r7, #4] 8012aaa: 2200 movs r2, #0 8012aac: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState and huart->RxState to Ready */ huart->gState = HAL_UART_STATE_READY; 8012aae: 687b ldr r3, [r7, #4] 8012ab0: 2220 movs r2, #32 8012ab2: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8012ab6: 687b ldr r3, [r7, #4] 8012ab8: 2220 movs r2, #32 8012aba: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8012abe: 687b ldr r3, [r7, #4] 8012ac0: 2200 movs r2, #0 8012ac2: 631a str r2, [r3, #48] @ 0x30 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Abort complete callback */ huart->AbortCpltCallback(huart); #else /* Call legacy weak Abort complete callback */ HAL_UART_AbortCpltCallback(huart); 8012ac4: 6878 ldr r0, [r7, #4] 8012ac6: f000 faad bl 8013024 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; 8012aca: 2300 movs r3, #0 } 8012acc: 4618 mov r0, r3 8012ace: 3788 adds r7, #136 @ 0x88 8012ad0: 46bd mov sp, r7 8012ad2: bd80 pop {r7, pc} 8012ad4: 08013195 .word 0x08013195 8012ad8: 080131f5 .word 0x080131f5 08012adc : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { 8012adc: b580 push {r7, lr} 8012ade: b0ba sub sp, #232 @ 0xe8 8012ae0: af00 add r7, sp, #0 8012ae2: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); 8012ae4: 687b ldr r3, [r7, #4] 8012ae6: 681b ldr r3, [r3, #0] 8012ae8: 681b ldr r3, [r3, #0] 8012aea: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8012aee: 687b ldr r3, [r7, #4] 8012af0: 681b ldr r3, [r3, #0] 8012af2: 68db ldr r3, [r3, #12] 8012af4: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); 8012af8: 687b ldr r3, [r7, #4] 8012afa: 681b ldr r3, [r3, #0] 8012afc: 695b ldr r3, [r3, #20] 8012afe: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; 8012b02: 2300 movs r3, #0 8012b04: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; 8012b08: 2300 movs r3, #0 8012b0a: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); 8012b0e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012b12: f003 030f and.w r3, r3, #15 8012b16: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) 8012b1a: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8012b1e: 2b00 cmp r3, #0 8012b20: d10f bne.n 8012b42 { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8012b22: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012b26: f003 0320 and.w r3, r3, #32 8012b2a: 2b00 cmp r3, #0 8012b2c: d009 beq.n 8012b42 8012b2e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012b32: f003 0320 and.w r3, r3, #32 8012b36: 2b00 cmp r3, #0 8012b38: d003 beq.n 8012b42 { UART_Receive_IT(huart); 8012b3a: 6878 ldr r0, [r7, #4] 8012b3c: f000 fbf1 bl 8013322 return; 8012b40: e25b b.n 8012ffa } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) 8012b42: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8012b46: 2b00 cmp r3, #0 8012b48: f000 80de beq.w 8012d08 8012b4c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012b50: f003 0301 and.w r3, r3, #1 8012b54: 2b00 cmp r3, #0 8012b56: d106 bne.n 8012b66 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8012b58: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012b5c: f403 7390 and.w r3, r3, #288 @ 0x120 8012b60: 2b00 cmp r3, #0 8012b62: f000 80d1 beq.w 8012d08 { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8012b66: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012b6a: f003 0301 and.w r3, r3, #1 8012b6e: 2b00 cmp r3, #0 8012b70: d00b beq.n 8012b8a 8012b72: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012b76: f403 7380 and.w r3, r3, #256 @ 0x100 8012b7a: 2b00 cmp r3, #0 8012b7c: d005 beq.n 8012b8a { huart->ErrorCode |= HAL_UART_ERROR_PE; 8012b7e: 687b ldr r3, [r7, #4] 8012b80: 6c5b ldr r3, [r3, #68] @ 0x44 8012b82: f043 0201 orr.w r2, r3, #1 8012b86: 687b ldr r3, [r7, #4] 8012b88: 645a str r2, [r3, #68] @ 0x44 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8012b8a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012b8e: f003 0304 and.w r3, r3, #4 8012b92: 2b00 cmp r3, #0 8012b94: d00b beq.n 8012bae 8012b96: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012b9a: f003 0301 and.w r3, r3, #1 8012b9e: 2b00 cmp r3, #0 8012ba0: d005 beq.n 8012bae { huart->ErrorCode |= HAL_UART_ERROR_NE; 8012ba2: 687b ldr r3, [r7, #4] 8012ba4: 6c5b ldr r3, [r3, #68] @ 0x44 8012ba6: f043 0202 orr.w r2, r3, #2 8012baa: 687b ldr r3, [r7, #4] 8012bac: 645a str r2, [r3, #68] @ 0x44 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8012bae: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012bb2: f003 0302 and.w r3, r3, #2 8012bb6: 2b00 cmp r3, #0 8012bb8: d00b beq.n 8012bd2 8012bba: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012bbe: f003 0301 and.w r3, r3, #1 8012bc2: 2b00 cmp r3, #0 8012bc4: d005 beq.n 8012bd2 { huart->ErrorCode |= HAL_UART_ERROR_FE; 8012bc6: 687b ldr r3, [r7, #4] 8012bc8: 6c5b ldr r3, [r3, #68] @ 0x44 8012bca: f043 0204 orr.w r2, r3, #4 8012bce: 687b ldr r3, [r7, #4] 8012bd0: 645a str r2, [r3, #68] @ 0x44 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) 8012bd2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012bd6: f003 0308 and.w r3, r3, #8 8012bda: 2b00 cmp r3, #0 8012bdc: d011 beq.n 8012c02 8012bde: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012be2: f003 0320 and.w r3, r3, #32 8012be6: 2b00 cmp r3, #0 8012be8: d105 bne.n 8012bf6 || ((cr3its & USART_CR3_EIE) != RESET))) 8012bea: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012bee: f003 0301 and.w r3, r3, #1 8012bf2: 2b00 cmp r3, #0 8012bf4: d005 beq.n 8012c02 { huart->ErrorCode |= HAL_UART_ERROR_ORE; 8012bf6: 687b ldr r3, [r7, #4] 8012bf8: 6c5b ldr r3, [r3, #68] @ 0x44 8012bfa: f043 0208 orr.w r2, r3, #8 8012bfe: 687b ldr r3, [r7, #4] 8012c00: 645a str r2, [r3, #68] @ 0x44 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) 8012c02: 687b ldr r3, [r7, #4] 8012c04: 6c5b ldr r3, [r3, #68] @ 0x44 8012c06: 2b00 cmp r3, #0 8012c08: f000 81f2 beq.w 8012ff0 { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8012c0c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012c10: f003 0320 and.w r3, r3, #32 8012c14: 2b00 cmp r3, #0 8012c16: d008 beq.n 8012c2a 8012c18: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012c1c: f003 0320 and.w r3, r3, #32 8012c20: 2b00 cmp r3, #0 8012c22: d002 beq.n 8012c2a { UART_Receive_IT(huart); 8012c24: 6878 ldr r0, [r7, #4] 8012c26: f000 fb7c bl 8013322 } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8012c2a: 687b ldr r3, [r7, #4] 8012c2c: 681b ldr r3, [r3, #0] 8012c2e: 695b ldr r3, [r3, #20] 8012c30: f003 0340 and.w r3, r3, #64 @ 0x40 8012c34: 2b00 cmp r3, #0 8012c36: bf14 ite ne 8012c38: 2301 movne r3, #1 8012c3a: 2300 moveq r3, #0 8012c3c: b2db uxtb r3, r3 8012c3e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8012c42: 687b ldr r3, [r7, #4] 8012c44: 6c5b ldr r3, [r3, #68] @ 0x44 8012c46: f003 0308 and.w r3, r3, #8 8012c4a: 2b00 cmp r3, #0 8012c4c: d103 bne.n 8012c56 8012c4e: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 8012c52: 2b00 cmp r3, #0 8012c54: d04f beq.n 8012cf6 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); 8012c56: 6878 ldr r0, [r7, #4] 8012c58: f000 fa26 bl 80130a8 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012c5c: 687b ldr r3, [r7, #4] 8012c5e: 681b ldr r3, [r3, #0] 8012c60: 695b ldr r3, [r3, #20] 8012c62: f003 0340 and.w r3, r3, #64 @ 0x40 8012c66: 2b00 cmp r3, #0 8012c68: d041 beq.n 8012cee { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8012c6a: 687b ldr r3, [r7, #4] 8012c6c: 681b ldr r3, [r3, #0] 8012c6e: 3314 adds r3, #20 8012c70: f8c7 309c str.w r3, [r7, #156] @ 0x9c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012c74: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 8012c78: e853 3f00 ldrex r3, [r3] 8012c7c: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); 8012c80: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8012c84: f023 0340 bic.w r3, r3, #64 @ 0x40 8012c88: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 8012c8c: 687b ldr r3, [r7, #4] 8012c8e: 681b ldr r3, [r3, #0] 8012c90: 3314 adds r3, #20 8012c92: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 8012c96: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 8012c9a: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012c9e: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 8012ca2: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 8012ca6: e841 2300 strex r3, r2, [r1] 8012caa: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); 8012cae: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 8012cb2: 2b00 cmp r3, #0 8012cb4: d1d9 bne.n 8012c6a /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) 8012cb6: 687b ldr r3, [r7, #4] 8012cb8: 6bdb ldr r3, [r3, #60] @ 0x3c 8012cba: 2b00 cmp r3, #0 8012cbc: d013 beq.n 8012ce6 { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8012cbe: 687b ldr r3, [r7, #4] 8012cc0: 6bdb ldr r3, [r3, #60] @ 0x3c 8012cc2: 4a7e ldr r2, [pc, #504] @ (8012ebc ) 8012cc4: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8012cc6: 687b ldr r3, [r7, #4] 8012cc8: 6bdb ldr r3, [r3, #60] @ 0x3c 8012cca: 4618 mov r0, r3 8012ccc: f7fd fae4 bl 8010298 8012cd0: 4603 mov r3, r0 8012cd2: 2b00 cmp r3, #0 8012cd4: d016 beq.n 8012d04 { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); 8012cd6: 687b ldr r3, [r7, #4] 8012cd8: 6bdb ldr r3, [r3, #60] @ 0x3c 8012cda: 6b5b ldr r3, [r3, #52] @ 0x34 8012cdc: 687a ldr r2, [r7, #4] 8012cde: 6bd2 ldr r2, [r2, #60] @ 0x3c 8012ce0: 4610 mov r0, r2 8012ce2: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012ce4: e00e b.n 8012d04 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8012ce6: 6878 ldr r0, [r7, #4] 8012ce8: f000 f993 bl 8013012 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012cec: e00a b.n 8012d04 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8012cee: 6878 ldr r0, [r7, #4] 8012cf0: f000 f98f bl 8013012 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012cf4: e006 b.n 8012d04 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8012cf6: 6878 ldr r0, [r7, #4] 8012cf8: f000 f98b bl 8013012 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8012cfc: 687b ldr r3, [r7, #4] 8012cfe: 2200 movs r2, #0 8012d00: 645a str r2, [r3, #68] @ 0x44 } } return; 8012d02: e175 b.n 8012ff0 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012d04: bf00 nop return; 8012d06: e173 b.n 8012ff0 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8012d08: 687b ldr r3, [r7, #4] 8012d0a: 6b1b ldr r3, [r3, #48] @ 0x30 8012d0c: 2b01 cmp r3, #1 8012d0e: f040 814f bne.w 8012fb0 && ((isrflags & USART_SR_IDLE) != 0U) 8012d12: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012d16: f003 0310 and.w r3, r3, #16 8012d1a: 2b00 cmp r3, #0 8012d1c: f000 8148 beq.w 8012fb0 && ((cr1its & USART_SR_IDLE) != 0U)) 8012d20: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012d24: f003 0310 and.w r3, r3, #16 8012d28: 2b00 cmp r3, #0 8012d2a: f000 8141 beq.w 8012fb0 { __HAL_UART_CLEAR_IDLEFLAG(huart); 8012d2e: 2300 movs r3, #0 8012d30: 60bb str r3, [r7, #8] 8012d32: 687b ldr r3, [r7, #4] 8012d34: 681b ldr r3, [r3, #0] 8012d36: 681b ldr r3, [r3, #0] 8012d38: 60bb str r3, [r7, #8] 8012d3a: 687b ldr r3, [r7, #4] 8012d3c: 681b ldr r3, [r3, #0] 8012d3e: 685b ldr r3, [r3, #4] 8012d40: 60bb str r3, [r7, #8] 8012d42: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012d44: 687b ldr r3, [r7, #4] 8012d46: 681b ldr r3, [r3, #0] 8012d48: 695b ldr r3, [r3, #20] 8012d4a: f003 0340 and.w r3, r3, #64 @ 0x40 8012d4e: 2b00 cmp r3, #0 8012d50: f000 80b6 beq.w 8012ec0 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); 8012d54: 687b ldr r3, [r7, #4] 8012d56: 6bdb ldr r3, [r3, #60] @ 0x3c 8012d58: 681b ldr r3, [r3, #0] 8012d5a: 685b ldr r3, [r3, #4] 8012d5c: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) 8012d60: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe 8012d64: 2b00 cmp r3, #0 8012d66: f000 8145 beq.w 8012ff4 && (nb_remaining_rx_data < huart->RxXferSize)) 8012d6a: 687b ldr r3, [r7, #4] 8012d6c: 8d9b ldrh r3, [r3, #44] @ 0x2c 8012d6e: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 8012d72: 429a cmp r2, r3 8012d74: f080 813e bcs.w 8012ff4 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; 8012d78: 687b ldr r3, [r7, #4] 8012d7a: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 8012d7e: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) 8012d80: 687b ldr r3, [r7, #4] 8012d82: 6bdb ldr r3, [r3, #60] @ 0x3c 8012d84: 699b ldr r3, [r3, #24] 8012d86: 2b20 cmp r3, #32 8012d88: f000 8088 beq.w 8012e9c { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8012d8c: 687b ldr r3, [r7, #4] 8012d8e: 681b ldr r3, [r3, #0] 8012d90: 330c adds r3, #12 8012d92: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012d96: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 8012d9a: e853 3f00 ldrex r3, [r3] 8012d9e: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); 8012da2: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8012da6: f423 7380 bic.w r3, r3, #256 @ 0x100 8012daa: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 8012dae: 687b ldr r3, [r7, #4] 8012db0: 681b ldr r3, [r3, #0] 8012db2: 330c adds r3, #12 8012db4: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 8012db8: f8c7 2094 str.w r2, [r7, #148] @ 0x94 8012dbc: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012dc0: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 8012dc4: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 8012dc8: e841 2300 strex r3, r2, [r1] 8012dcc: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); 8012dd0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8012dd4: 2b00 cmp r3, #0 8012dd6: d1d9 bne.n 8012d8c ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8012dd8: 687b ldr r3, [r7, #4] 8012dda: 681b ldr r3, [r3, #0] 8012ddc: 3314 adds r3, #20 8012dde: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012de0: 6f7b ldr r3, [r7, #116] @ 0x74 8012de2: e853 3f00 ldrex r3, [r3] 8012de6: 673b str r3, [r7, #112] @ 0x70 return(result); 8012de8: 6f3b ldr r3, [r7, #112] @ 0x70 8012dea: f023 0301 bic.w r3, r3, #1 8012dee: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8012df2: 687b ldr r3, [r7, #4] 8012df4: 681b ldr r3, [r3, #0] 8012df6: 3314 adds r3, #20 8012df8: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 8012dfc: f8c7 2080 str.w r2, [r7, #128] @ 0x80 8012e00: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012e02: 6ff9 ldr r1, [r7, #124] @ 0x7c 8012e04: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 8012e08: e841 2300 strex r3, r2, [r1] 8012e0c: 67bb str r3, [r7, #120] @ 0x78 return(result); 8012e0e: 6fbb ldr r3, [r7, #120] @ 0x78 8012e10: 2b00 cmp r3, #0 8012e12: d1e1 bne.n 8012dd8 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8012e14: 687b ldr r3, [r7, #4] 8012e16: 681b ldr r3, [r3, #0] 8012e18: 3314 adds r3, #20 8012e1a: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012e1c: 6e3b ldr r3, [r7, #96] @ 0x60 8012e1e: e853 3f00 ldrex r3, [r3] 8012e22: 65fb str r3, [r7, #92] @ 0x5c return(result); 8012e24: 6dfb ldr r3, [r7, #92] @ 0x5c 8012e26: f023 0340 bic.w r3, r3, #64 @ 0x40 8012e2a: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 8012e2e: 687b ldr r3, [r7, #4] 8012e30: 681b ldr r3, [r3, #0] 8012e32: 3314 adds r3, #20 8012e34: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 8012e38: 66fa str r2, [r7, #108] @ 0x6c 8012e3a: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012e3c: 6eb9 ldr r1, [r7, #104] @ 0x68 8012e3e: 6efa ldr r2, [r7, #108] @ 0x6c 8012e40: e841 2300 strex r3, r2, [r1] 8012e44: 667b str r3, [r7, #100] @ 0x64 return(result); 8012e46: 6e7b ldr r3, [r7, #100] @ 0x64 8012e48: 2b00 cmp r3, #0 8012e4a: d1e3 bne.n 8012e14 /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8012e4c: 687b ldr r3, [r7, #4] 8012e4e: 2220 movs r2, #32 8012e50: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8012e54: 687b ldr r3, [r7, #4] 8012e56: 2200 movs r2, #0 8012e58: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8012e5a: 687b ldr r3, [r7, #4] 8012e5c: 681b ldr r3, [r3, #0] 8012e5e: 330c adds r3, #12 8012e60: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012e62: 6cfb ldr r3, [r7, #76] @ 0x4c 8012e64: e853 3f00 ldrex r3, [r3] 8012e68: 64bb str r3, [r7, #72] @ 0x48 return(result); 8012e6a: 6cbb ldr r3, [r7, #72] @ 0x48 8012e6c: f023 0310 bic.w r3, r3, #16 8012e70: f8c7 30ac str.w r3, [r7, #172] @ 0xac 8012e74: 687b ldr r3, [r7, #4] 8012e76: 681b ldr r3, [r3, #0] 8012e78: 330c adds r3, #12 8012e7a: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac 8012e7e: 65ba str r2, [r7, #88] @ 0x58 8012e80: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012e82: 6d79 ldr r1, [r7, #84] @ 0x54 8012e84: 6dba ldr r2, [r7, #88] @ 0x58 8012e86: e841 2300 strex r3, r2, [r1] 8012e8a: 653b str r3, [r7, #80] @ 0x50 return(result); 8012e8c: 6d3b ldr r3, [r7, #80] @ 0x50 8012e8e: 2b00 cmp r3, #0 8012e90: d1e3 bne.n 8012e5a /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); 8012e92: 687b ldr r3, [r7, #4] 8012e94: 6bdb ldr r3, [r3, #60] @ 0x3c 8012e96: 4618 mov r0, r3 8012e98: f7fd f9c3 bl 8010222 } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 8012e9c: 687b ldr r3, [r7, #4] 8012e9e: 2202 movs r2, #2 8012ea0: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); 8012ea2: 687b ldr r3, [r7, #4] 8012ea4: 8d9a ldrh r2, [r3, #44] @ 0x2c 8012ea6: 687b ldr r3, [r7, #4] 8012ea8: 8ddb ldrh r3, [r3, #46] @ 0x2e 8012eaa: b29b uxth r3, r3 8012eac: 1ad3 subs r3, r2, r3 8012eae: b29b uxth r3, r3 8012eb0: 4619 mov r1, r3 8012eb2: 6878 ldr r0, [r7, #4] 8012eb4: f7fa fa62 bl 800d37c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 8012eb8: e09c b.n 8012ff4 8012eba: bf00 nop 8012ebc: 0801316d .word 0x0801316d else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8012ec0: 687b ldr r3, [r7, #4] 8012ec2: 8d9a ldrh r2, [r3, #44] @ 0x2c 8012ec4: 687b ldr r3, [r7, #4] 8012ec6: 8ddb ldrh r3, [r3, #46] @ 0x2e 8012ec8: b29b uxth r3, r3 8012eca: 1ad3 subs r3, r2, r3 8012ecc: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) 8012ed0: 687b ldr r3, [r7, #4] 8012ed2: 8ddb ldrh r3, [r3, #46] @ 0x2e 8012ed4: b29b uxth r3, r3 8012ed6: 2b00 cmp r3, #0 8012ed8: f000 808e beq.w 8012ff8 && (nb_rx_data > 0U)) 8012edc: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 8012ee0: 2b00 cmp r3, #0 8012ee2: f000 8089 beq.w 8012ff8 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8012ee6: 687b ldr r3, [r7, #4] 8012ee8: 681b ldr r3, [r3, #0] 8012eea: 330c adds r3, #12 8012eec: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012eee: 6bbb ldr r3, [r7, #56] @ 0x38 8012ef0: e853 3f00 ldrex r3, [r3] 8012ef4: 637b str r3, [r7, #52] @ 0x34 return(result); 8012ef6: 6b7b ldr r3, [r7, #52] @ 0x34 8012ef8: f423 7390 bic.w r3, r3, #288 @ 0x120 8012efc: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 8012f00: 687b ldr r3, [r7, #4] 8012f02: 681b ldr r3, [r3, #0] 8012f04: 330c adds r3, #12 8012f06: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 8012f0a: 647a str r2, [r7, #68] @ 0x44 8012f0c: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012f0e: 6c39 ldr r1, [r7, #64] @ 0x40 8012f10: 6c7a ldr r2, [r7, #68] @ 0x44 8012f12: e841 2300 strex r3, r2, [r1] 8012f16: 63fb str r3, [r7, #60] @ 0x3c return(result); 8012f18: 6bfb ldr r3, [r7, #60] @ 0x3c 8012f1a: 2b00 cmp r3, #0 8012f1c: d1e3 bne.n 8012ee6 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8012f1e: 687b ldr r3, [r7, #4] 8012f20: 681b ldr r3, [r3, #0] 8012f22: 3314 adds r3, #20 8012f24: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012f26: 6a7b ldr r3, [r7, #36] @ 0x24 8012f28: e853 3f00 ldrex r3, [r3] 8012f2c: 623b str r3, [r7, #32] return(result); 8012f2e: 6a3b ldr r3, [r7, #32] 8012f30: f023 0301 bic.w r3, r3, #1 8012f34: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 8012f38: 687b ldr r3, [r7, #4] 8012f3a: 681b ldr r3, [r3, #0] 8012f3c: 3314 adds r3, #20 8012f3e: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 8012f42: 633a str r2, [r7, #48] @ 0x30 8012f44: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012f46: 6af9 ldr r1, [r7, #44] @ 0x2c 8012f48: 6b3a ldr r2, [r7, #48] @ 0x30 8012f4a: e841 2300 strex r3, r2, [r1] 8012f4e: 62bb str r3, [r7, #40] @ 0x28 return(result); 8012f50: 6abb ldr r3, [r7, #40] @ 0x28 8012f52: 2b00 cmp r3, #0 8012f54: d1e3 bne.n 8012f1e /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8012f56: 687b ldr r3, [r7, #4] 8012f58: 2220 movs r2, #32 8012f5a: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8012f5e: 687b ldr r3, [r7, #4] 8012f60: 2200 movs r2, #0 8012f62: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8012f64: 687b ldr r3, [r7, #4] 8012f66: 681b ldr r3, [r3, #0] 8012f68: 330c adds r3, #12 8012f6a: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012f6c: 693b ldr r3, [r7, #16] 8012f6e: e853 3f00 ldrex r3, [r3] 8012f72: 60fb str r3, [r7, #12] return(result); 8012f74: 68fb ldr r3, [r7, #12] 8012f76: f023 0310 bic.w r3, r3, #16 8012f7a: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 8012f7e: 687b ldr r3, [r7, #4] 8012f80: 681b ldr r3, [r3, #0] 8012f82: 330c adds r3, #12 8012f84: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 8012f88: 61fa str r2, [r7, #28] 8012f8a: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012f8c: 69b9 ldr r1, [r7, #24] 8012f8e: 69fa ldr r2, [r7, #28] 8012f90: e841 2300 strex r3, r2, [r1] 8012f94: 617b str r3, [r7, #20] return(result); 8012f96: 697b ldr r3, [r7, #20] 8012f98: 2b00 cmp r3, #0 8012f9a: d1e3 bne.n 8012f64 /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 8012f9c: 687b ldr r3, [r7, #4] 8012f9e: 2202 movs r2, #2 8012fa0: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); 8012fa2: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 8012fa6: 4619 mov r1, r3 8012fa8: 6878 ldr r0, [r7, #4] 8012faa: f7fa f9e7 bl 800d37c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 8012fae: e023 b.n 8012ff8 } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8012fb0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012fb4: f003 0380 and.w r3, r3, #128 @ 0x80 8012fb8: 2b00 cmp r3, #0 8012fba: d009 beq.n 8012fd0 8012fbc: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012fc0: f003 0380 and.w r3, r3, #128 @ 0x80 8012fc4: 2b00 cmp r3, #0 8012fc6: d003 beq.n 8012fd0 { UART_Transmit_IT(huart); 8012fc8: 6878 ldr r0, [r7, #4] 8012fca: f000 f943 bl 8013254 return; 8012fce: e014 b.n 8012ffa } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8012fd0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012fd4: f003 0340 and.w r3, r3, #64 @ 0x40 8012fd8: 2b00 cmp r3, #0 8012fda: d00e beq.n 8012ffa 8012fdc: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012fe0: f003 0340 and.w r3, r3, #64 @ 0x40 8012fe4: 2b00 cmp r3, #0 8012fe6: d008 beq.n 8012ffa { UART_EndTransmit_IT(huart); 8012fe8: 6878 ldr r0, [r7, #4] 8012fea: f000 f982 bl 80132f2 return; 8012fee: e004 b.n 8012ffa return; 8012ff0: bf00 nop 8012ff2: e002 b.n 8012ffa return; 8012ff4: bf00 nop 8012ff6: e000 b.n 8012ffa return; 8012ff8: bf00 nop } } 8012ffa: 37e8 adds r7, #232 @ 0xe8 8012ffc: 46bd mov sp, r7 8012ffe: bd80 pop {r7, pc} 08013000 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { 8013000: b480 push {r7} 8013002: b083 sub sp, #12 8013004: af00 add r7, sp, #0 8013006: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } 8013008: bf00 nop 801300a: 370c adds r7, #12 801300c: 46bd mov sp, r7 801300e: bc80 pop {r7} 8013010: 4770 bx lr 08013012 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { 8013012: b480 push {r7} 8013014: b083 sub sp, #12 8013016: af00 add r7, sp, #0 8013018: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } 801301a: bf00 nop 801301c: 370c adds r7, #12 801301e: 46bd mov sp, r7 8013020: bc80 pop {r7} 8013022: 4770 bx lr 08013024 : * @brief UART Abort Complete callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart) { 8013024: b480 push {r7} 8013026: b083 sub sp, #12 8013028: af00 add r7, sp, #0 801302a: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_AbortCpltCallback can be implemented in the user file. */ } 801302c: bf00 nop 801302e: 370c adds r7, #12 8013030: 46bd mov sp, r7 8013032: bc80 pop {r7} 8013034: 4770 bx lr 08013036 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8013036: b480 push {r7} 8013038: b085 sub sp, #20 801303a: af00 add r7, sp, #0 801303c: 60f8 str r0, [r7, #12] 801303e: 60b9 str r1, [r7, #8] 8013040: 4613 mov r3, r2 8013042: 80fb strh r3, [r7, #6] huart->pRxBuffPtr = pData; 8013044: 68fb ldr r3, [r7, #12] 8013046: 68ba ldr r2, [r7, #8] 8013048: 629a str r2, [r3, #40] @ 0x28 huart->RxXferSize = Size; 801304a: 68fb ldr r3, [r7, #12] 801304c: 88fa ldrh r2, [r7, #6] 801304e: 859a strh r2, [r3, #44] @ 0x2c huart->RxXferCount = Size; 8013050: 68fb ldr r3, [r7, #12] 8013052: 88fa ldrh r2, [r7, #6] 8013054: 85da strh r2, [r3, #46] @ 0x2e huart->ErrorCode = HAL_UART_ERROR_NONE; 8013056: 68fb ldr r3, [r7, #12] 8013058: 2200 movs r2, #0 801305a: 645a str r2, [r3, #68] @ 0x44 huart->RxState = HAL_UART_STATE_BUSY_RX; 801305c: 68fb ldr r3, [r7, #12] 801305e: 2222 movs r2, #34 @ 0x22 8013060: f883 2042 strb.w r2, [r3, #66] @ 0x42 if (huart->Init.Parity != UART_PARITY_NONE) 8013064: 68fb ldr r3, [r7, #12] 8013066: 691b ldr r3, [r3, #16] 8013068: 2b00 cmp r3, #0 801306a: d007 beq.n 801307c { /* Enable the UART Parity Error Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 801306c: 68fb ldr r3, [r7, #12] 801306e: 681b ldr r3, [r3, #0] 8013070: 68da ldr r2, [r3, #12] 8013072: 68fb ldr r3, [r7, #12] 8013074: 681b ldr r3, [r3, #0] 8013076: f442 7280 orr.w r2, r2, #256 @ 0x100 801307a: 60da str r2, [r3, #12] } /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 801307c: 68fb ldr r3, [r7, #12] 801307e: 681b ldr r3, [r3, #0] 8013080: 695a ldr r2, [r3, #20] 8013082: 68fb ldr r3, [r7, #12] 8013084: 681b ldr r3, [r3, #0] 8013086: f042 0201 orr.w r2, r2, #1 801308a: 615a str r2, [r3, #20] /* Enable the UART Data Register not empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 801308c: 68fb ldr r3, [r7, #12] 801308e: 681b ldr r3, [r3, #0] 8013090: 68da ldr r2, [r3, #12] 8013092: 68fb ldr r3, [r7, #12] 8013094: 681b ldr r3, [r3, #0] 8013096: f042 0220 orr.w r2, r2, #32 801309a: 60da str r2, [r3, #12] return HAL_OK; 801309c: 2300 movs r3, #0 } 801309e: 4618 mov r0, r3 80130a0: 3714 adds r7, #20 80130a2: 46bd mov sp, r7 80130a4: bc80 pop {r7} 80130a6: 4770 bx lr 080130a8 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 80130a8: b480 push {r7} 80130aa: b095 sub sp, #84 @ 0x54 80130ac: af00 add r7, sp, #0 80130ae: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80130b0: 687b ldr r3, [r7, #4] 80130b2: 681b ldr r3, [r3, #0] 80130b4: 330c adds r3, #12 80130b6: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80130b8: 6b7b ldr r3, [r7, #52] @ 0x34 80130ba: e853 3f00 ldrex r3, [r3] 80130be: 633b str r3, [r7, #48] @ 0x30 return(result); 80130c0: 6b3b ldr r3, [r7, #48] @ 0x30 80130c2: f423 7390 bic.w r3, r3, #288 @ 0x120 80130c6: 64fb str r3, [r7, #76] @ 0x4c 80130c8: 687b ldr r3, [r7, #4] 80130ca: 681b ldr r3, [r3, #0] 80130cc: 330c adds r3, #12 80130ce: 6cfa ldr r2, [r7, #76] @ 0x4c 80130d0: 643a str r2, [r7, #64] @ 0x40 80130d2: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80130d4: 6bf9 ldr r1, [r7, #60] @ 0x3c 80130d6: 6c3a ldr r2, [r7, #64] @ 0x40 80130d8: e841 2300 strex r3, r2, [r1] 80130dc: 63bb str r3, [r7, #56] @ 0x38 return(result); 80130de: 6bbb ldr r3, [r7, #56] @ 0x38 80130e0: 2b00 cmp r3, #0 80130e2: d1e5 bne.n 80130b0 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80130e4: 687b ldr r3, [r7, #4] 80130e6: 681b ldr r3, [r3, #0] 80130e8: 3314 adds r3, #20 80130ea: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80130ec: 6a3b ldr r3, [r7, #32] 80130ee: e853 3f00 ldrex r3, [r3] 80130f2: 61fb str r3, [r7, #28] return(result); 80130f4: 69fb ldr r3, [r7, #28] 80130f6: f023 0301 bic.w r3, r3, #1 80130fa: 64bb str r3, [r7, #72] @ 0x48 80130fc: 687b ldr r3, [r7, #4] 80130fe: 681b ldr r3, [r3, #0] 8013100: 3314 adds r3, #20 8013102: 6cba ldr r2, [r7, #72] @ 0x48 8013104: 62fa str r2, [r7, #44] @ 0x2c 8013106: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013108: 6ab9 ldr r1, [r7, #40] @ 0x28 801310a: 6afa ldr r2, [r7, #44] @ 0x2c 801310c: e841 2300 strex r3, r2, [r1] 8013110: 627b str r3, [r7, #36] @ 0x24 return(result); 8013112: 6a7b ldr r3, [r7, #36] @ 0x24 8013114: 2b00 cmp r3, #0 8013116: d1e5 bne.n 80130e4 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8013118: 687b ldr r3, [r7, #4] 801311a: 6b1b ldr r3, [r3, #48] @ 0x30 801311c: 2b01 cmp r3, #1 801311e: d119 bne.n 8013154 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8013120: 687b ldr r3, [r7, #4] 8013122: 681b ldr r3, [r3, #0] 8013124: 330c adds r3, #12 8013126: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8013128: 68fb ldr r3, [r7, #12] 801312a: e853 3f00 ldrex r3, [r3] 801312e: 60bb str r3, [r7, #8] return(result); 8013130: 68bb ldr r3, [r7, #8] 8013132: f023 0310 bic.w r3, r3, #16 8013136: 647b str r3, [r7, #68] @ 0x44 8013138: 687b ldr r3, [r7, #4] 801313a: 681b ldr r3, [r3, #0] 801313c: 330c adds r3, #12 801313e: 6c7a ldr r2, [r7, #68] @ 0x44 8013140: 61ba str r2, [r7, #24] 8013142: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013144: 6979 ldr r1, [r7, #20] 8013146: 69ba ldr r2, [r7, #24] 8013148: e841 2300 strex r3, r2, [r1] 801314c: 613b str r3, [r7, #16] return(result); 801314e: 693b ldr r3, [r7, #16] 8013150: 2b00 cmp r3, #0 8013152: d1e5 bne.n 8013120 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8013154: 687b ldr r3, [r7, #4] 8013156: 2220 movs r2, #32 8013158: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 801315c: 687b ldr r3, [r7, #4] 801315e: 2200 movs r2, #0 8013160: 631a str r2, [r3, #48] @ 0x30 } 8013162: bf00 nop 8013164: 3754 adds r7, #84 @ 0x54 8013166: 46bd mov sp, r7 8013168: bc80 pop {r7} 801316a: 4770 bx lr 0801316c : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { 801316c: b580 push {r7, lr} 801316e: b084 sub sp, #16 8013170: af00 add r7, sp, #0 8013172: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8013174: 687b ldr r3, [r7, #4] 8013176: 6a5b ldr r3, [r3, #36] @ 0x24 8013178: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; 801317a: 68fb ldr r3, [r7, #12] 801317c: 2200 movs r2, #0 801317e: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; 8013180: 68fb ldr r3, [r7, #12] 8013182: 2200 movs r2, #0 8013184: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8013186: 68f8 ldr r0, [r7, #12] 8013188: f7ff ff43 bl 8013012 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 801318c: bf00 nop 801318e: 3710 adds r7, #16 8013190: 46bd mov sp, r7 8013192: bd80 pop {r7, pc} 08013194 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) { 8013194: b580 push {r7, lr} 8013196: b084 sub sp, #16 8013198: af00 add r7, sp, #0 801319a: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 801319c: 687b ldr r3, [r7, #4] 801319e: 6a5b ldr r3, [r3, #36] @ 0x24 80131a0: 60fb str r3, [r7, #12] huart->hdmatx->XferAbortCallback = NULL; 80131a2: 68fb ldr r3, [r7, #12] 80131a4: 6b9b ldr r3, [r3, #56] @ 0x38 80131a6: 2200 movs r2, #0 80131a8: 635a str r2, [r3, #52] @ 0x34 /* Check if an Abort process is still ongoing */ if (huart->hdmarx != NULL) 80131aa: 68fb ldr r3, [r7, #12] 80131ac: 6bdb ldr r3, [r3, #60] @ 0x3c 80131ae: 2b00 cmp r3, #0 80131b0: d004 beq.n 80131bc { if (huart->hdmarx->XferAbortCallback != NULL) 80131b2: 68fb ldr r3, [r7, #12] 80131b4: 6bdb ldr r3, [r3, #60] @ 0x3c 80131b6: 6b5b ldr r3, [r3, #52] @ 0x34 80131b8: 2b00 cmp r3, #0 80131ba: d117 bne.n 80131ec return; } } /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ huart->TxXferCount = 0x00U; 80131bc: 68fb ldr r3, [r7, #12] 80131be: 2200 movs r2, #0 80131c0: 84da strh r2, [r3, #38] @ 0x26 huart->RxXferCount = 0x00U; 80131c2: 68fb ldr r3, [r7, #12] 80131c4: 2200 movs r2, #0 80131c6: 85da strh r2, [r3, #46] @ 0x2e /* Reset ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 80131c8: 68fb ldr r3, [r7, #12] 80131ca: 2200 movs r2, #0 80131cc: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState and huart->RxState to Ready */ huart->gState = HAL_UART_STATE_READY; 80131ce: 68fb ldr r3, [r7, #12] 80131d0: 2220 movs r2, #32 80131d2: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 80131d6: 68fb ldr r3, [r7, #12] 80131d8: 2220 movs r2, #32 80131da: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80131de: 68fb ldr r3, [r7, #12] 80131e0: 2200 movs r2, #0 80131e2: 631a str r2, [r3, #48] @ 0x30 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Abort complete callback */ huart->AbortCpltCallback(huart); #else /* Call legacy weak Abort complete callback */ HAL_UART_AbortCpltCallback(huart); 80131e4: 68f8 ldr r0, [r7, #12] 80131e6: f7ff ff1d bl 8013024 80131ea: e000 b.n 80131ee return; 80131ec: bf00 nop #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 80131ee: 3710 adds r7, #16 80131f0: 46bd mov sp, r7 80131f2: bd80 pop {r7, pc} 080131f4 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) { 80131f4: b580 push {r7, lr} 80131f6: b084 sub sp, #16 80131f8: af00 add r7, sp, #0 80131fa: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 80131fc: 687b ldr r3, [r7, #4] 80131fe: 6a5b ldr r3, [r3, #36] @ 0x24 8013200: 60fb str r3, [r7, #12] huart->hdmarx->XferAbortCallback = NULL; 8013202: 68fb ldr r3, [r7, #12] 8013204: 6bdb ldr r3, [r3, #60] @ 0x3c 8013206: 2200 movs r2, #0 8013208: 635a str r2, [r3, #52] @ 0x34 /* Check if an Abort process is still ongoing */ if (huart->hdmatx != NULL) 801320a: 68fb ldr r3, [r7, #12] 801320c: 6b9b ldr r3, [r3, #56] @ 0x38 801320e: 2b00 cmp r3, #0 8013210: d004 beq.n 801321c { if (huart->hdmatx->XferAbortCallback != NULL) 8013212: 68fb ldr r3, [r7, #12] 8013214: 6b9b ldr r3, [r3, #56] @ 0x38 8013216: 6b5b ldr r3, [r3, #52] @ 0x34 8013218: 2b00 cmp r3, #0 801321a: d117 bne.n 801324c return; } } /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ huart->TxXferCount = 0x00U; 801321c: 68fb ldr r3, [r7, #12] 801321e: 2200 movs r2, #0 8013220: 84da strh r2, [r3, #38] @ 0x26 huart->RxXferCount = 0x00U; 8013222: 68fb ldr r3, [r7, #12] 8013224: 2200 movs r2, #0 8013226: 85da strh r2, [r3, #46] @ 0x2e /* Reset ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8013228: 68fb ldr r3, [r7, #12] 801322a: 2200 movs r2, #0 801322c: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState and huart->RxState to Ready */ huart->gState = HAL_UART_STATE_READY; 801322e: 68fb ldr r3, [r7, #12] 8013230: 2220 movs r2, #32 8013232: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8013236: 68fb ldr r3, [r7, #12] 8013238: 2220 movs r2, #32 801323a: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 801323e: 68fb ldr r3, [r7, #12] 8013240: 2200 movs r2, #0 8013242: 631a str r2, [r3, #48] @ 0x30 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Abort complete callback */ huart->AbortCpltCallback(huart); #else /* Call legacy weak Abort complete callback */ HAL_UART_AbortCpltCallback(huart); 8013244: 68f8 ldr r0, [r7, #12] 8013246: f7ff feed bl 8013024 801324a: e000 b.n 801324e return; 801324c: bf00 nop #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 801324e: 3710 adds r7, #16 8013250: 46bd mov sp, r7 8013252: bd80 pop {r7, pc} 08013254 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { 8013254: b480 push {r7} 8013256: b085 sub sp, #20 8013258: af00 add r7, sp, #0 801325a: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) 801325c: 687b ldr r3, [r7, #4] 801325e: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8013262: b2db uxtb r3, r3 8013264: 2b21 cmp r3, #33 @ 0x21 8013266: d13e bne.n 80132e6 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8013268: 687b ldr r3, [r7, #4] 801326a: 689b ldr r3, [r3, #8] 801326c: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8013270: d114 bne.n 801329c 8013272: 687b ldr r3, [r7, #4] 8013274: 691b ldr r3, [r3, #16] 8013276: 2b00 cmp r3, #0 8013278: d110 bne.n 801329c { tmp = (const uint16_t *) huart->pTxBuffPtr; 801327a: 687b ldr r3, [r7, #4] 801327c: 6a1b ldr r3, [r3, #32] 801327e: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8013280: 68fb ldr r3, [r7, #12] 8013282: 881b ldrh r3, [r3, #0] 8013284: 461a mov r2, r3 8013286: 687b ldr r3, [r7, #4] 8013288: 681b ldr r3, [r3, #0] 801328a: f3c2 0208 ubfx r2, r2, #0, #9 801328e: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; 8013290: 687b ldr r3, [r7, #4] 8013292: 6a1b ldr r3, [r3, #32] 8013294: 1c9a adds r2, r3, #2 8013296: 687b ldr r3, [r7, #4] 8013298: 621a str r2, [r3, #32] 801329a: e008 b.n 80132ae } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 801329c: 687b ldr r3, [r7, #4] 801329e: 6a1b ldr r3, [r3, #32] 80132a0: 1c59 adds r1, r3, #1 80132a2: 687a ldr r2, [r7, #4] 80132a4: 6211 str r1, [r2, #32] 80132a6: 781a ldrb r2, [r3, #0] 80132a8: 687b ldr r3, [r7, #4] 80132aa: 681b ldr r3, [r3, #0] 80132ac: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) 80132ae: 687b ldr r3, [r7, #4] 80132b0: 8cdb ldrh r3, [r3, #38] @ 0x26 80132b2: b29b uxth r3, r3 80132b4: 3b01 subs r3, #1 80132b6: b29b uxth r3, r3 80132b8: 687a ldr r2, [r7, #4] 80132ba: 4619 mov r1, r3 80132bc: 84d1 strh r1, [r2, #38] @ 0x26 80132be: 2b00 cmp r3, #0 80132c0: d10f bne.n 80132e2 { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 80132c2: 687b ldr r3, [r7, #4] 80132c4: 681b ldr r3, [r3, #0] 80132c6: 68da ldr r2, [r3, #12] 80132c8: 687b ldr r3, [r7, #4] 80132ca: 681b ldr r3, [r3, #0] 80132cc: f022 0280 bic.w r2, r2, #128 @ 0x80 80132d0: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 80132d2: 687b ldr r3, [r7, #4] 80132d4: 681b ldr r3, [r3, #0] 80132d6: 68da ldr r2, [r3, #12] 80132d8: 687b ldr r3, [r7, #4] 80132da: 681b ldr r3, [r3, #0] 80132dc: f042 0240 orr.w r2, r2, #64 @ 0x40 80132e0: 60da str r2, [r3, #12] } return HAL_OK; 80132e2: 2300 movs r3, #0 80132e4: e000 b.n 80132e8 } else { return HAL_BUSY; 80132e6: 2302 movs r3, #2 } } 80132e8: 4618 mov r0, r3 80132ea: 3714 adds r7, #20 80132ec: 46bd mov sp, r7 80132ee: bc80 pop {r7} 80132f0: 4770 bx lr 080132f2 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { 80132f2: b580 push {r7, lr} 80132f4: b082 sub sp, #8 80132f6: af00 add r7, sp, #0 80132f8: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80132fa: 687b ldr r3, [r7, #4] 80132fc: 681b ldr r3, [r3, #0] 80132fe: 68da ldr r2, [r3, #12] 8013300: 687b ldr r3, [r7, #4] 8013302: 681b ldr r3, [r3, #0] 8013304: f022 0240 bic.w r2, r2, #64 @ 0x40 8013308: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 801330a: 687b ldr r3, [r7, #4] 801330c: 2220 movs r2, #32 801330e: f883 2041 strb.w r2, [r3, #65] @ 0x41 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); 8013312: 6878 ldr r0, [r7, #4] 8013314: f7fa f854 bl 800d3c0 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; 8013318: 2300 movs r3, #0 } 801331a: 4618 mov r0, r3 801331c: 3708 adds r7, #8 801331e: 46bd mov sp, r7 8013320: bd80 pop {r7, pc} 08013322 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { 8013322: b580 push {r7, lr} 8013324: b08c sub sp, #48 @ 0x30 8013326: af00 add r7, sp, #0 8013328: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) 801332a: 687b ldr r3, [r7, #4] 801332c: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 8013330: b2db uxtb r3, r3 8013332: 2b22 cmp r3, #34 @ 0x22 8013334: f040 80ae bne.w 8013494 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8013338: 687b ldr r3, [r7, #4] 801333a: 689b ldr r3, [r3, #8] 801333c: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8013340: d117 bne.n 8013372 8013342: 687b ldr r3, [r7, #4] 8013344: 691b ldr r3, [r3, #16] 8013346: 2b00 cmp r3, #0 8013348: d113 bne.n 8013372 { pdata8bits = NULL; 801334a: 2300 movs r3, #0 801334c: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = (uint16_t *) huart->pRxBuffPtr; 801334e: 687b ldr r3, [r7, #4] 8013350: 6a9b ldr r3, [r3, #40] @ 0x28 8013352: 62bb str r3, [r7, #40] @ 0x28 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8013354: 687b ldr r3, [r7, #4] 8013356: 681b ldr r3, [r3, #0] 8013358: 685b ldr r3, [r3, #4] 801335a: b29b uxth r3, r3 801335c: f3c3 0308 ubfx r3, r3, #0, #9 8013360: b29a uxth r2, r3 8013362: 6abb ldr r3, [r7, #40] @ 0x28 8013364: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; 8013366: 687b ldr r3, [r7, #4] 8013368: 6a9b ldr r3, [r3, #40] @ 0x28 801336a: 1c9a adds r2, r3, #2 801336c: 687b ldr r3, [r7, #4] 801336e: 629a str r2, [r3, #40] @ 0x28 8013370: e026 b.n 80133c0 } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; 8013372: 687b ldr r3, [r7, #4] 8013374: 6a9b ldr r3, [r3, #40] @ 0x28 8013376: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = NULL; 8013378: 2300 movs r3, #0 801337a: 62bb str r3, [r7, #40] @ 0x28 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) 801337c: 687b ldr r3, [r7, #4] 801337e: 689b ldr r3, [r3, #8] 8013380: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8013384: d007 beq.n 8013396 8013386: 687b ldr r3, [r7, #4] 8013388: 689b ldr r3, [r3, #8] 801338a: 2b00 cmp r3, #0 801338c: d10a bne.n 80133a4 801338e: 687b ldr r3, [r7, #4] 8013390: 691b ldr r3, [r3, #16] 8013392: 2b00 cmp r3, #0 8013394: d106 bne.n 80133a4 { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8013396: 687b ldr r3, [r7, #4] 8013398: 681b ldr r3, [r3, #0] 801339a: 685b ldr r3, [r3, #4] 801339c: b2da uxtb r2, r3 801339e: 6afb ldr r3, [r7, #44] @ 0x2c 80133a0: 701a strb r2, [r3, #0] 80133a2: e008 b.n 80133b6 } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 80133a4: 687b ldr r3, [r7, #4] 80133a6: 681b ldr r3, [r3, #0] 80133a8: 685b ldr r3, [r3, #4] 80133aa: b2db uxtb r3, r3 80133ac: f003 037f and.w r3, r3, #127 @ 0x7f 80133b0: b2da uxtb r2, r3 80133b2: 6afb ldr r3, [r7, #44] @ 0x2c 80133b4: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; 80133b6: 687b ldr r3, [r7, #4] 80133b8: 6a9b ldr r3, [r3, #40] @ 0x28 80133ba: 1c5a adds r2, r3, #1 80133bc: 687b ldr r3, [r7, #4] 80133be: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) 80133c0: 687b ldr r3, [r7, #4] 80133c2: 8ddb ldrh r3, [r3, #46] @ 0x2e 80133c4: b29b uxth r3, r3 80133c6: 3b01 subs r3, #1 80133c8: b29b uxth r3, r3 80133ca: 687a ldr r2, [r7, #4] 80133cc: 4619 mov r1, r3 80133ce: 85d1 strh r1, [r2, #46] @ 0x2e 80133d0: 2b00 cmp r3, #0 80133d2: d15d bne.n 8013490 { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80133d4: 687b ldr r3, [r7, #4] 80133d6: 681b ldr r3, [r3, #0] 80133d8: 68da ldr r2, [r3, #12] 80133da: 687b ldr r3, [r7, #4] 80133dc: 681b ldr r3, [r3, #0] 80133de: f022 0220 bic.w r2, r2, #32 80133e2: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80133e4: 687b ldr r3, [r7, #4] 80133e6: 681b ldr r3, [r3, #0] 80133e8: 68da ldr r2, [r3, #12] 80133ea: 687b ldr r3, [r7, #4] 80133ec: 681b ldr r3, [r3, #0] 80133ee: f422 7280 bic.w r2, r2, #256 @ 0x100 80133f2: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80133f4: 687b ldr r3, [r7, #4] 80133f6: 681b ldr r3, [r3, #0] 80133f8: 695a ldr r2, [r3, #20] 80133fa: 687b ldr r3, [r7, #4] 80133fc: 681b ldr r3, [r3, #0] 80133fe: f022 0201 bic.w r2, r2, #1 8013402: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8013404: 687b ldr r3, [r7, #4] 8013406: 2220 movs r2, #32 8013408: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Initialize type of RxEvent to Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; 801340c: 687b ldr r3, [r7, #4] 801340e: 2200 movs r2, #0 8013410: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8013412: 687b ldr r3, [r7, #4] 8013414: 6b1b ldr r3, [r3, #48] @ 0x30 8013416: 2b01 cmp r3, #1 8013418: d135 bne.n 8013486 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 801341a: 687b ldr r3, [r7, #4] 801341c: 2200 movs r2, #0 801341e: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8013420: 687b ldr r3, [r7, #4] 8013422: 681b ldr r3, [r3, #0] 8013424: 330c adds r3, #12 8013426: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8013428: 697b ldr r3, [r7, #20] 801342a: e853 3f00 ldrex r3, [r3] 801342e: 613b str r3, [r7, #16] return(result); 8013430: 693b ldr r3, [r7, #16] 8013432: f023 0310 bic.w r3, r3, #16 8013436: 627b str r3, [r7, #36] @ 0x24 8013438: 687b ldr r3, [r7, #4] 801343a: 681b ldr r3, [r3, #0] 801343c: 330c adds r3, #12 801343e: 6a7a ldr r2, [r7, #36] @ 0x24 8013440: 623a str r2, [r7, #32] 8013442: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013444: 69f9 ldr r1, [r7, #28] 8013446: 6a3a ldr r2, [r7, #32] 8013448: e841 2300 strex r3, r2, [r1] 801344c: 61bb str r3, [r7, #24] return(result); 801344e: 69bb ldr r3, [r7, #24] 8013450: 2b00 cmp r3, #0 8013452: d1e5 bne.n 8013420 /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) 8013454: 687b ldr r3, [r7, #4] 8013456: 681b ldr r3, [r3, #0] 8013458: 681b ldr r3, [r3, #0] 801345a: f003 0310 and.w r3, r3, #16 801345e: 2b10 cmp r3, #16 8013460: d10a bne.n 8013478 { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); 8013462: 2300 movs r3, #0 8013464: 60fb str r3, [r7, #12] 8013466: 687b ldr r3, [r7, #4] 8013468: 681b ldr r3, [r3, #0] 801346a: 681b ldr r3, [r3, #0] 801346c: 60fb str r3, [r7, #12] 801346e: 687b ldr r3, [r7, #4] 8013470: 681b ldr r3, [r3, #0] 8013472: 685b ldr r3, [r3, #4] 8013474: 60fb str r3, [r7, #12] 8013476: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); 8013478: 687b ldr r3, [r7, #4] 801347a: 8d9b ldrh r3, [r3, #44] @ 0x2c 801347c: 4619 mov r1, r3 801347e: 6878 ldr r0, [r7, #4] 8013480: f7f9 ff7c bl 800d37c 8013484: e002 b.n 801348c #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); 8013486: 6878 ldr r0, [r7, #4] 8013488: f7ff fdba bl 8013000 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; 801348c: 2300 movs r3, #0 801348e: e002 b.n 8013496 } return HAL_OK; 8013490: 2300 movs r3, #0 8013492: e000 b.n 8013496 } else { return HAL_BUSY; 8013494: 2302 movs r3, #2 } } 8013496: 4618 mov r0, r3 8013498: 3730 adds r7, #48 @ 0x30 801349a: 46bd mov sp, r7 801349c: bd80 pop {r7, pc} ... 080134a0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80134a0: b580 push {r7, lr} 80134a2: b084 sub sp, #16 80134a4: af00 add r7, sp, #0 80134a6: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80134a8: 687b ldr r3, [r7, #4] 80134aa: 681b ldr r3, [r3, #0] 80134ac: 691b ldr r3, [r3, #16] 80134ae: f423 5140 bic.w r1, r3, #12288 @ 0x3000 80134b2: 687b ldr r3, [r7, #4] 80134b4: 68da ldr r2, [r3, #12] 80134b6: 687b ldr r3, [r7, #4] 80134b8: 681b ldr r3, [r3, #0] 80134ba: 430a orrs r2, r1 80134bc: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80134be: 687b ldr r3, [r7, #4] 80134c0: 689a ldr r2, [r3, #8] 80134c2: 687b ldr r3, [r7, #4] 80134c4: 691b ldr r3, [r3, #16] 80134c6: 431a orrs r2, r3 80134c8: 687b ldr r3, [r7, #4] 80134ca: 695b ldr r3, [r3, #20] 80134cc: 4313 orrs r3, r2 80134ce: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 80134d0: 687b ldr r3, [r7, #4] 80134d2: 681b ldr r3, [r3, #0] 80134d4: 68db ldr r3, [r3, #12] 80134d6: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 80134da: f023 030c bic.w r3, r3, #12 80134de: 687a ldr r2, [r7, #4] 80134e0: 6812 ldr r2, [r2, #0] 80134e2: 68b9 ldr r1, [r7, #8] 80134e4: 430b orrs r3, r1 80134e6: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 80134e8: 687b ldr r3, [r7, #4] 80134ea: 681b ldr r3, [r3, #0] 80134ec: 695b ldr r3, [r3, #20] 80134ee: f423 7140 bic.w r1, r3, #768 @ 0x300 80134f2: 687b ldr r3, [r7, #4] 80134f4: 699a ldr r2, [r3, #24] 80134f6: 687b ldr r3, [r7, #4] 80134f8: 681b ldr r3, [r3, #0] 80134fa: 430a orrs r2, r1 80134fc: 615a str r2, [r3, #20] if(huart->Instance == USART1) 80134fe: 687b ldr r3, [r7, #4] 8013500: 681b ldr r3, [r3, #0] 8013502: 4a2c ldr r2, [pc, #176] @ (80135b4 ) 8013504: 4293 cmp r3, r2 8013506: d103 bne.n 8013510 { pclk = HAL_RCC_GetPCLK2Freq(); 8013508: f7fd ff38 bl 801137c 801350c: 60f8 str r0, [r7, #12] 801350e: e002 b.n 8013516 } else { pclk = HAL_RCC_GetPCLK1Freq(); 8013510: f7fd ff20 bl 8011354 8013514: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 8013516: 68fa ldr r2, [r7, #12] 8013518: 4613 mov r3, r2 801351a: 009b lsls r3, r3, #2 801351c: 4413 add r3, r2 801351e: 009a lsls r2, r3, #2 8013520: 441a add r2, r3 8013522: 687b ldr r3, [r7, #4] 8013524: 685b ldr r3, [r3, #4] 8013526: 009b lsls r3, r3, #2 8013528: fbb2 f3f3 udiv r3, r2, r3 801352c: 4a22 ldr r2, [pc, #136] @ (80135b8 ) 801352e: fba2 2303 umull r2, r3, r2, r3 8013532: 095b lsrs r3, r3, #5 8013534: 0119 lsls r1, r3, #4 8013536: 68fa ldr r2, [r7, #12] 8013538: 4613 mov r3, r2 801353a: 009b lsls r3, r3, #2 801353c: 4413 add r3, r2 801353e: 009a lsls r2, r3, #2 8013540: 441a add r2, r3 8013542: 687b ldr r3, [r7, #4] 8013544: 685b ldr r3, [r3, #4] 8013546: 009b lsls r3, r3, #2 8013548: fbb2 f2f3 udiv r2, r2, r3 801354c: 4b1a ldr r3, [pc, #104] @ (80135b8 ) 801354e: fba3 0302 umull r0, r3, r3, r2 8013552: 095b lsrs r3, r3, #5 8013554: 2064 movs r0, #100 @ 0x64 8013556: fb00 f303 mul.w r3, r0, r3 801355a: 1ad3 subs r3, r2, r3 801355c: 011b lsls r3, r3, #4 801355e: 3332 adds r3, #50 @ 0x32 8013560: 4a15 ldr r2, [pc, #84] @ (80135b8 ) 8013562: fba2 2303 umull r2, r3, r2, r3 8013566: 095b lsrs r3, r3, #5 8013568: f003 03f0 and.w r3, r3, #240 @ 0xf0 801356c: 4419 add r1, r3 801356e: 68fa ldr r2, [r7, #12] 8013570: 4613 mov r3, r2 8013572: 009b lsls r3, r3, #2 8013574: 4413 add r3, r2 8013576: 009a lsls r2, r3, #2 8013578: 441a add r2, r3 801357a: 687b ldr r3, [r7, #4] 801357c: 685b ldr r3, [r3, #4] 801357e: 009b lsls r3, r3, #2 8013580: fbb2 f2f3 udiv r2, r2, r3 8013584: 4b0c ldr r3, [pc, #48] @ (80135b8 ) 8013586: fba3 0302 umull r0, r3, r3, r2 801358a: 095b lsrs r3, r3, #5 801358c: 2064 movs r0, #100 @ 0x64 801358e: fb00 f303 mul.w r3, r0, r3 8013592: 1ad3 subs r3, r2, r3 8013594: 011b lsls r3, r3, #4 8013596: 3332 adds r3, #50 @ 0x32 8013598: 4a07 ldr r2, [pc, #28] @ (80135b8 ) 801359a: fba2 2303 umull r2, r3, r2, r3 801359e: 095b lsrs r3, r3, #5 80135a0: f003 020f and.w r2, r3, #15 80135a4: 687b ldr r3, [r7, #4] 80135a6: 681b ldr r3, [r3, #0] 80135a8: 440a add r2, r1 80135aa: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 80135ac: bf00 nop 80135ae: 3710 adds r7, #16 80135b0: 46bd mov sp, r7 80135b2: bd80 pop {r7, pc} 80135b4: 40013800 .word 0x40013800 80135b8: 51eb851f .word 0x51eb851f 080135bc <__cvt>: 80135bc: 2b00 cmp r3, #0 80135be: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80135c2: 461d mov r5, r3 80135c4: bfbb ittet lt 80135c6: f103 4300 addlt.w r3, r3, #2147483648 @ 0x80000000 80135ca: 461d movlt r5, r3 80135cc: 2300 movge r3, #0 80135ce: 232d movlt r3, #45 @ 0x2d 80135d0: b088 sub sp, #32 80135d2: 4614 mov r4, r2 80135d4: bfb8 it lt 80135d6: 4614 movlt r4, r2 80135d8: 9a12 ldr r2, [sp, #72] @ 0x48 80135da: 9e10 ldr r6, [sp, #64] @ 0x40 80135dc: 7013 strb r3, [r2, #0] 80135de: 9b14 ldr r3, [sp, #80] @ 0x50 80135e0: f8dd a04c ldr.w sl, [sp, #76] @ 0x4c 80135e4: f023 0820 bic.w r8, r3, #32 80135e8: f1b8 0f46 cmp.w r8, #70 @ 0x46 80135ec: d005 beq.n 80135fa <__cvt+0x3e> 80135ee: f1b8 0f45 cmp.w r8, #69 @ 0x45 80135f2: d100 bne.n 80135f6 <__cvt+0x3a> 80135f4: 3601 adds r6, #1 80135f6: 2302 movs r3, #2 80135f8: e000 b.n 80135fc <__cvt+0x40> 80135fa: 2303 movs r3, #3 80135fc: aa07 add r2, sp, #28 80135fe: 9204 str r2, [sp, #16] 8013600: aa06 add r2, sp, #24 8013602: e9cd a202 strd sl, r2, [sp, #8] 8013606: e9cd 3600 strd r3, r6, [sp] 801360a: 4622 mov r2, r4 801360c: 462b mov r3, r5 801360e: f000 ff03 bl 8014418 <_dtoa_r> 8013612: f1b8 0f47 cmp.w r8, #71 @ 0x47 8013616: 4607 mov r7, r0 8013618: d119 bne.n 801364e <__cvt+0x92> 801361a: 9b11 ldr r3, [sp, #68] @ 0x44 801361c: 07db lsls r3, r3, #31 801361e: d50e bpl.n 801363e <__cvt+0x82> 8013620: eb00 0906 add.w r9, r0, r6 8013624: 2200 movs r2, #0 8013626: 2300 movs r3, #0 8013628: 4620 mov r0, r4 801362a: 4629 mov r1, r5 801362c: f7f5 fa28 bl 8008a80 <__aeabi_dcmpeq> 8013630: b108 cbz r0, 8013636 <__cvt+0x7a> 8013632: f8cd 901c str.w r9, [sp, #28] 8013636: 2230 movs r2, #48 @ 0x30 8013638: 9b07 ldr r3, [sp, #28] 801363a: 454b cmp r3, r9 801363c: d31e bcc.n 801367c <__cvt+0xc0> 801363e: 4638 mov r0, r7 8013640: 9b07 ldr r3, [sp, #28] 8013642: 9a15 ldr r2, [sp, #84] @ 0x54 8013644: 1bdb subs r3, r3, r7 8013646: 6013 str r3, [r2, #0] 8013648: b008 add sp, #32 801364a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 801364e: f1b8 0f46 cmp.w r8, #70 @ 0x46 8013652: eb00 0906 add.w r9, r0, r6 8013656: d1e5 bne.n 8013624 <__cvt+0x68> 8013658: 7803 ldrb r3, [r0, #0] 801365a: 2b30 cmp r3, #48 @ 0x30 801365c: d10a bne.n 8013674 <__cvt+0xb8> 801365e: 2200 movs r2, #0 8013660: 2300 movs r3, #0 8013662: 4620 mov r0, r4 8013664: 4629 mov r1, r5 8013666: f7f5 fa0b bl 8008a80 <__aeabi_dcmpeq> 801366a: b918 cbnz r0, 8013674 <__cvt+0xb8> 801366c: f1c6 0601 rsb r6, r6, #1 8013670: f8ca 6000 str.w r6, [sl] 8013674: f8da 3000 ldr.w r3, [sl] 8013678: 4499 add r9, r3 801367a: e7d3 b.n 8013624 <__cvt+0x68> 801367c: 1c59 adds r1, r3, #1 801367e: 9107 str r1, [sp, #28] 8013680: 701a strb r2, [r3, #0] 8013682: e7d9 b.n 8013638 <__cvt+0x7c> 08013684 <__exponent>: 8013684: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 8013686: 2900 cmp r1, #0 8013688: bfb6 itet lt 801368a: 232d movlt r3, #45 @ 0x2d 801368c: 232b movge r3, #43 @ 0x2b 801368e: 4249 neglt r1, r1 8013690: 2909 cmp r1, #9 8013692: 7002 strb r2, [r0, #0] 8013694: 7043 strb r3, [r0, #1] 8013696: dd29 ble.n 80136ec <__exponent+0x68> 8013698: f10d 0307 add.w r3, sp, #7 801369c: 461d mov r5, r3 801369e: 270a movs r7, #10 80136a0: fbb1 f6f7 udiv r6, r1, r7 80136a4: 461a mov r2, r3 80136a6: fb07 1416 mls r4, r7, r6, r1 80136aa: 3430 adds r4, #48 @ 0x30 80136ac: f802 4c01 strb.w r4, [r2, #-1] 80136b0: 460c mov r4, r1 80136b2: 2c63 cmp r4, #99 @ 0x63 80136b4: 4631 mov r1, r6 80136b6: f103 33ff add.w r3, r3, #4294967295 @ 0xffffffff 80136ba: dcf1 bgt.n 80136a0 <__exponent+0x1c> 80136bc: 3130 adds r1, #48 @ 0x30 80136be: 1e94 subs r4, r2, #2 80136c0: f803 1c01 strb.w r1, [r3, #-1] 80136c4: 4623 mov r3, r4 80136c6: 1c41 adds r1, r0, #1 80136c8: 42ab cmp r3, r5 80136ca: d30a bcc.n 80136e2 <__exponent+0x5e> 80136cc: f10d 0309 add.w r3, sp, #9 80136d0: 1a9b subs r3, r3, r2 80136d2: 42ac cmp r4, r5 80136d4: bf88 it hi 80136d6: 2300 movhi r3, #0 80136d8: 3302 adds r3, #2 80136da: 4403 add r3, r0 80136dc: 1a18 subs r0, r3, r0 80136de: b003 add sp, #12 80136e0: bdf0 pop {r4, r5, r6, r7, pc} 80136e2: f813 6b01 ldrb.w r6, [r3], #1 80136e6: f801 6f01 strb.w r6, [r1, #1]! 80136ea: e7ed b.n 80136c8 <__exponent+0x44> 80136ec: 2330 movs r3, #48 @ 0x30 80136ee: 3130 adds r1, #48 @ 0x30 80136f0: 7083 strb r3, [r0, #2] 80136f2: 70c1 strb r1, [r0, #3] 80136f4: 1d03 adds r3, r0, #4 80136f6: e7f1 b.n 80136dc <__exponent+0x58> 080136f8 <_printf_float>: 80136f8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80136fc: b091 sub sp, #68 @ 0x44 80136fe: 460c mov r4, r1 8013700: f8dd 8068 ldr.w r8, [sp, #104] @ 0x68 8013704: 4616 mov r6, r2 8013706: 461f mov r7, r3 8013708: 4605 mov r5, r0 801370a: f000 fdbd bl 8014288 <_localeconv_r> 801370e: 6803 ldr r3, [r0, #0] 8013710: 4618 mov r0, r3 8013712: 9308 str r3, [sp, #32] 8013714: f7f4 fd88 bl 8008228 8013718: 2300 movs r3, #0 801371a: 930e str r3, [sp, #56] @ 0x38 801371c: f8d8 3000 ldr.w r3, [r8] 8013720: 9009 str r0, [sp, #36] @ 0x24 8013722: 3307 adds r3, #7 8013724: f023 0307 bic.w r3, r3, #7 8013728: f103 0208 add.w r2, r3, #8 801372c: f894 a018 ldrb.w sl, [r4, #24] 8013730: f8d4 b000 ldr.w fp, [r4] 8013734: f8c8 2000 str.w r2, [r8] 8013738: e9d3 8900 ldrd r8, r9, [r3] 801373c: f029 4300 bic.w r3, r9, #2147483648 @ 0x80000000 8013740: 930b str r3, [sp, #44] @ 0x2c 8013742: f8cd 8028 str.w r8, [sp, #40] @ 0x28 8013746: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 801374a: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 801374e: e9c4 8912 strd r8, r9, [r4, #72] @ 0x48 8013752: 4b9c ldr r3, [pc, #624] @ (80139c4 <_printf_float+0x2cc>) 8013754: f7f5 f9c6 bl 8008ae4 <__aeabi_dcmpun> 8013758: bb70 cbnz r0, 80137b8 <_printf_float+0xc0> 801375a: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 801375e: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8013762: 4b98 ldr r3, [pc, #608] @ (80139c4 <_printf_float+0x2cc>) 8013764: f7f5 f9a0 bl 8008aa8 <__aeabi_dcmple> 8013768: bb30 cbnz r0, 80137b8 <_printf_float+0xc0> 801376a: 2200 movs r2, #0 801376c: 2300 movs r3, #0 801376e: 4640 mov r0, r8 8013770: 4649 mov r1, r9 8013772: f7f5 f98f bl 8008a94 <__aeabi_dcmplt> 8013776: b110 cbz r0, 801377e <_printf_float+0x86> 8013778: 232d movs r3, #45 @ 0x2d 801377a: f884 3043 strb.w r3, [r4, #67] @ 0x43 801377e: 4a92 ldr r2, [pc, #584] @ (80139c8 <_printf_float+0x2d0>) 8013780: 4b92 ldr r3, [pc, #584] @ (80139cc <_printf_float+0x2d4>) 8013782: f1ba 0f47 cmp.w sl, #71 @ 0x47 8013786: bf8c ite hi 8013788: 4690 movhi r8, r2 801378a: 4698 movls r8, r3 801378c: 2303 movs r3, #3 801378e: f04f 0900 mov.w r9, #0 8013792: 6123 str r3, [r4, #16] 8013794: f02b 0304 bic.w r3, fp, #4 8013798: 6023 str r3, [r4, #0] 801379a: 4633 mov r3, r6 801379c: 4621 mov r1, r4 801379e: 4628 mov r0, r5 80137a0: 9700 str r7, [sp, #0] 80137a2: aa0f add r2, sp, #60 @ 0x3c 80137a4: f000 f9d4 bl 8013b50 <_printf_common> 80137a8: 3001 adds r0, #1 80137aa: f040 8090 bne.w 80138ce <_printf_float+0x1d6> 80137ae: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80137b2: b011 add sp, #68 @ 0x44 80137b4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80137b8: 4642 mov r2, r8 80137ba: 464b mov r3, r9 80137bc: 4640 mov r0, r8 80137be: 4649 mov r1, r9 80137c0: f7f5 f990 bl 8008ae4 <__aeabi_dcmpun> 80137c4: b148 cbz r0, 80137da <_printf_float+0xe2> 80137c6: 464b mov r3, r9 80137c8: 2b00 cmp r3, #0 80137ca: bfb8 it lt 80137cc: 232d movlt r3, #45 @ 0x2d 80137ce: 4a80 ldr r2, [pc, #512] @ (80139d0 <_printf_float+0x2d8>) 80137d0: bfb8 it lt 80137d2: f884 3043 strblt.w r3, [r4, #67] @ 0x43 80137d6: 4b7f ldr r3, [pc, #508] @ (80139d4 <_printf_float+0x2dc>) 80137d8: e7d3 b.n 8013782 <_printf_float+0x8a> 80137da: 6863 ldr r3, [r4, #4] 80137dc: f00a 01df and.w r1, sl, #223 @ 0xdf 80137e0: 1c5a adds r2, r3, #1 80137e2: d13f bne.n 8013864 <_printf_float+0x16c> 80137e4: 2306 movs r3, #6 80137e6: 6063 str r3, [r4, #4] 80137e8: 2200 movs r2, #0 80137ea: f44b 6380 orr.w r3, fp, #1024 @ 0x400 80137ee: 6023 str r3, [r4, #0] 80137f0: 9206 str r2, [sp, #24] 80137f2: aa0e add r2, sp, #56 @ 0x38 80137f4: e9cd a204 strd sl, r2, [sp, #16] 80137f8: aa0d add r2, sp, #52 @ 0x34 80137fa: 9203 str r2, [sp, #12] 80137fc: f10d 0233 add.w r2, sp, #51 @ 0x33 8013800: e9cd 3201 strd r3, r2, [sp, #4] 8013804: 6863 ldr r3, [r4, #4] 8013806: 4642 mov r2, r8 8013808: 9300 str r3, [sp, #0] 801380a: 4628 mov r0, r5 801380c: 464b mov r3, r9 801380e: 910a str r1, [sp, #40] @ 0x28 8013810: f7ff fed4 bl 80135bc <__cvt> 8013814: 990a ldr r1, [sp, #40] @ 0x28 8013816: 4680 mov r8, r0 8013818: 2947 cmp r1, #71 @ 0x47 801381a: 990d ldr r1, [sp, #52] @ 0x34 801381c: d128 bne.n 8013870 <_printf_float+0x178> 801381e: 1cc8 adds r0, r1, #3 8013820: db02 blt.n 8013828 <_printf_float+0x130> 8013822: 6863 ldr r3, [r4, #4] 8013824: 4299 cmp r1, r3 8013826: dd40 ble.n 80138aa <_printf_float+0x1b2> 8013828: f1aa 0a02 sub.w sl, sl, #2 801382c: fa5f fa8a uxtb.w sl, sl 8013830: 4652 mov r2, sl 8013832: 3901 subs r1, #1 8013834: f104 0050 add.w r0, r4, #80 @ 0x50 8013838: 910d str r1, [sp, #52] @ 0x34 801383a: f7ff ff23 bl 8013684 <__exponent> 801383e: 9a0e ldr r2, [sp, #56] @ 0x38 8013840: 4681 mov r9, r0 8013842: 1813 adds r3, r2, r0 8013844: 2a01 cmp r2, #1 8013846: 6123 str r3, [r4, #16] 8013848: dc02 bgt.n 8013850 <_printf_float+0x158> 801384a: 6822 ldr r2, [r4, #0] 801384c: 07d2 lsls r2, r2, #31 801384e: d501 bpl.n 8013854 <_printf_float+0x15c> 8013850: 3301 adds r3, #1 8013852: 6123 str r3, [r4, #16] 8013854: f89d 3033 ldrb.w r3, [sp, #51] @ 0x33 8013858: 2b00 cmp r3, #0 801385a: d09e beq.n 801379a <_printf_float+0xa2> 801385c: 232d movs r3, #45 @ 0x2d 801385e: f884 3043 strb.w r3, [r4, #67] @ 0x43 8013862: e79a b.n 801379a <_printf_float+0xa2> 8013864: 2947 cmp r1, #71 @ 0x47 8013866: d1bf bne.n 80137e8 <_printf_float+0xf0> 8013868: 2b00 cmp r3, #0 801386a: d1bd bne.n 80137e8 <_printf_float+0xf0> 801386c: 2301 movs r3, #1 801386e: e7ba b.n 80137e6 <_printf_float+0xee> 8013870: f1ba 0f65 cmp.w sl, #101 @ 0x65 8013874: d9dc bls.n 8013830 <_printf_float+0x138> 8013876: f1ba 0f66 cmp.w sl, #102 @ 0x66 801387a: d118 bne.n 80138ae <_printf_float+0x1b6> 801387c: 2900 cmp r1, #0 801387e: 6863 ldr r3, [r4, #4] 8013880: dd0b ble.n 801389a <_printf_float+0x1a2> 8013882: 6121 str r1, [r4, #16] 8013884: b913 cbnz r3, 801388c <_printf_float+0x194> 8013886: 6822 ldr r2, [r4, #0] 8013888: 07d0 lsls r0, r2, #31 801388a: d502 bpl.n 8013892 <_printf_float+0x19a> 801388c: 3301 adds r3, #1 801388e: 440b add r3, r1 8013890: 6123 str r3, [r4, #16] 8013892: f04f 0900 mov.w r9, #0 8013896: 65a1 str r1, [r4, #88] @ 0x58 8013898: e7dc b.n 8013854 <_printf_float+0x15c> 801389a: b913 cbnz r3, 80138a2 <_printf_float+0x1aa> 801389c: 6822 ldr r2, [r4, #0] 801389e: 07d2 lsls r2, r2, #31 80138a0: d501 bpl.n 80138a6 <_printf_float+0x1ae> 80138a2: 3302 adds r3, #2 80138a4: e7f4 b.n 8013890 <_printf_float+0x198> 80138a6: 2301 movs r3, #1 80138a8: e7f2 b.n 8013890 <_printf_float+0x198> 80138aa: f04f 0a67 mov.w sl, #103 @ 0x67 80138ae: 9b0e ldr r3, [sp, #56] @ 0x38 80138b0: 4299 cmp r1, r3 80138b2: db05 blt.n 80138c0 <_printf_float+0x1c8> 80138b4: 6823 ldr r3, [r4, #0] 80138b6: 6121 str r1, [r4, #16] 80138b8: 07d8 lsls r0, r3, #31 80138ba: d5ea bpl.n 8013892 <_printf_float+0x19a> 80138bc: 1c4b adds r3, r1, #1 80138be: e7e7 b.n 8013890 <_printf_float+0x198> 80138c0: 2900 cmp r1, #0 80138c2: bfcc ite gt 80138c4: 2201 movgt r2, #1 80138c6: f1c1 0202 rsble r2, r1, #2 80138ca: 4413 add r3, r2 80138cc: e7e0 b.n 8013890 <_printf_float+0x198> 80138ce: 6823 ldr r3, [r4, #0] 80138d0: 055a lsls r2, r3, #21 80138d2: d407 bmi.n 80138e4 <_printf_float+0x1ec> 80138d4: 6923 ldr r3, [r4, #16] 80138d6: 4642 mov r2, r8 80138d8: 4631 mov r1, r6 80138da: 4628 mov r0, r5 80138dc: 47b8 blx r7 80138de: 3001 adds r0, #1 80138e0: d12b bne.n 801393a <_printf_float+0x242> 80138e2: e764 b.n 80137ae <_printf_float+0xb6> 80138e4: f1ba 0f65 cmp.w sl, #101 @ 0x65 80138e8: f240 80dc bls.w 8013aa4 <_printf_float+0x3ac> 80138ec: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 80138f0: 2200 movs r2, #0 80138f2: 2300 movs r3, #0 80138f4: f7f5 f8c4 bl 8008a80 <__aeabi_dcmpeq> 80138f8: 2800 cmp r0, #0 80138fa: d033 beq.n 8013964 <_printf_float+0x26c> 80138fc: 2301 movs r3, #1 80138fe: 4631 mov r1, r6 8013900: 4628 mov r0, r5 8013902: 4a35 ldr r2, [pc, #212] @ (80139d8 <_printf_float+0x2e0>) 8013904: 47b8 blx r7 8013906: 3001 adds r0, #1 8013908: f43f af51 beq.w 80137ae <_printf_float+0xb6> 801390c: e9dd 380d ldrd r3, r8, [sp, #52] @ 0x34 8013910: 4543 cmp r3, r8 8013912: db02 blt.n 801391a <_printf_float+0x222> 8013914: 6823 ldr r3, [r4, #0] 8013916: 07d8 lsls r0, r3, #31 8013918: d50f bpl.n 801393a <_printf_float+0x242> 801391a: e9dd 2308 ldrd r2, r3, [sp, #32] 801391e: 4631 mov r1, r6 8013920: 4628 mov r0, r5 8013922: 47b8 blx r7 8013924: 3001 adds r0, #1 8013926: f43f af42 beq.w 80137ae <_printf_float+0xb6> 801392a: f04f 0900 mov.w r9, #0 801392e: f108 38ff add.w r8, r8, #4294967295 @ 0xffffffff 8013932: f104 0a1a add.w sl, r4, #26 8013936: 45c8 cmp r8, r9 8013938: dc09 bgt.n 801394e <_printf_float+0x256> 801393a: 6823 ldr r3, [r4, #0] 801393c: 079b lsls r3, r3, #30 801393e: f100 8102 bmi.w 8013b46 <_printf_float+0x44e> 8013942: 68e0 ldr r0, [r4, #12] 8013944: 9b0f ldr r3, [sp, #60] @ 0x3c 8013946: 4298 cmp r0, r3 8013948: bfb8 it lt 801394a: 4618 movlt r0, r3 801394c: e731 b.n 80137b2 <_printf_float+0xba> 801394e: 2301 movs r3, #1 8013950: 4652 mov r2, sl 8013952: 4631 mov r1, r6 8013954: 4628 mov r0, r5 8013956: 47b8 blx r7 8013958: 3001 adds r0, #1 801395a: f43f af28 beq.w 80137ae <_printf_float+0xb6> 801395e: f109 0901 add.w r9, r9, #1 8013962: e7e8 b.n 8013936 <_printf_float+0x23e> 8013964: 9b0d ldr r3, [sp, #52] @ 0x34 8013966: 2b00 cmp r3, #0 8013968: dc38 bgt.n 80139dc <_printf_float+0x2e4> 801396a: 2301 movs r3, #1 801396c: 4631 mov r1, r6 801396e: 4628 mov r0, r5 8013970: 4a19 ldr r2, [pc, #100] @ (80139d8 <_printf_float+0x2e0>) 8013972: 47b8 blx r7 8013974: 3001 adds r0, #1 8013976: f43f af1a beq.w 80137ae <_printf_float+0xb6> 801397a: e9dd 390d ldrd r3, r9, [sp, #52] @ 0x34 801397e: ea59 0303 orrs.w r3, r9, r3 8013982: d102 bne.n 801398a <_printf_float+0x292> 8013984: 6823 ldr r3, [r4, #0] 8013986: 07d9 lsls r1, r3, #31 8013988: d5d7 bpl.n 801393a <_printf_float+0x242> 801398a: e9dd 2308 ldrd r2, r3, [sp, #32] 801398e: 4631 mov r1, r6 8013990: 4628 mov r0, r5 8013992: 47b8 blx r7 8013994: 3001 adds r0, #1 8013996: f43f af0a beq.w 80137ae <_printf_float+0xb6> 801399a: f04f 0a00 mov.w sl, #0 801399e: f104 0b1a add.w fp, r4, #26 80139a2: 9b0d ldr r3, [sp, #52] @ 0x34 80139a4: 425b negs r3, r3 80139a6: 4553 cmp r3, sl 80139a8: dc01 bgt.n 80139ae <_printf_float+0x2b6> 80139aa: 464b mov r3, r9 80139ac: e793 b.n 80138d6 <_printf_float+0x1de> 80139ae: 2301 movs r3, #1 80139b0: 465a mov r2, fp 80139b2: 4631 mov r1, r6 80139b4: 4628 mov r0, r5 80139b6: 47b8 blx r7 80139b8: 3001 adds r0, #1 80139ba: f43f aef8 beq.w 80137ae <_printf_float+0xb6> 80139be: f10a 0a01 add.w sl, sl, #1 80139c2: e7ee b.n 80139a2 <_printf_float+0x2aa> 80139c4: 7fefffff .word 0x7fefffff 80139c8: 08016c28 .word 0x08016c28 80139cc: 08016c24 .word 0x08016c24 80139d0: 08016c30 .word 0x08016c30 80139d4: 08016c2c .word 0x08016c2c 80139d8: 08016c34 .word 0x08016c34 80139dc: 6da3 ldr r3, [r4, #88] @ 0x58 80139de: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 80139e2: 4553 cmp r3, sl 80139e4: bfa8 it ge 80139e6: 4653 movge r3, sl 80139e8: 2b00 cmp r3, #0 80139ea: 4699 mov r9, r3 80139ec: dc36 bgt.n 8013a5c <_printf_float+0x364> 80139ee: f04f 0b00 mov.w fp, #0 80139f2: ea29 79e9 bic.w r9, r9, r9, asr #31 80139f6: f104 021a add.w r2, r4, #26 80139fa: 6da3 ldr r3, [r4, #88] @ 0x58 80139fc: 930a str r3, [sp, #40] @ 0x28 80139fe: eba3 0309 sub.w r3, r3, r9 8013a02: 455b cmp r3, fp 8013a04: dc31 bgt.n 8013a6a <_printf_float+0x372> 8013a06: 9b0d ldr r3, [sp, #52] @ 0x34 8013a08: 459a cmp sl, r3 8013a0a: dc3a bgt.n 8013a82 <_printf_float+0x38a> 8013a0c: 6823 ldr r3, [r4, #0] 8013a0e: 07da lsls r2, r3, #31 8013a10: d437 bmi.n 8013a82 <_printf_float+0x38a> 8013a12: 9b0d ldr r3, [sp, #52] @ 0x34 8013a14: ebaa 0903 sub.w r9, sl, r3 8013a18: 9b0a ldr r3, [sp, #40] @ 0x28 8013a1a: ebaa 0303 sub.w r3, sl, r3 8013a1e: 4599 cmp r9, r3 8013a20: bfa8 it ge 8013a22: 4699 movge r9, r3 8013a24: f1b9 0f00 cmp.w r9, #0 8013a28: dc33 bgt.n 8013a92 <_printf_float+0x39a> 8013a2a: f04f 0800 mov.w r8, #0 8013a2e: ea29 79e9 bic.w r9, r9, r9, asr #31 8013a32: f104 0b1a add.w fp, r4, #26 8013a36: 9b0d ldr r3, [sp, #52] @ 0x34 8013a38: ebaa 0303 sub.w r3, sl, r3 8013a3c: eba3 0309 sub.w r3, r3, r9 8013a40: 4543 cmp r3, r8 8013a42: f77f af7a ble.w 801393a <_printf_float+0x242> 8013a46: 2301 movs r3, #1 8013a48: 465a mov r2, fp 8013a4a: 4631 mov r1, r6 8013a4c: 4628 mov r0, r5 8013a4e: 47b8 blx r7 8013a50: 3001 adds r0, #1 8013a52: f43f aeac beq.w 80137ae <_printf_float+0xb6> 8013a56: f108 0801 add.w r8, r8, #1 8013a5a: e7ec b.n 8013a36 <_printf_float+0x33e> 8013a5c: 4642 mov r2, r8 8013a5e: 4631 mov r1, r6 8013a60: 4628 mov r0, r5 8013a62: 47b8 blx r7 8013a64: 3001 adds r0, #1 8013a66: d1c2 bne.n 80139ee <_printf_float+0x2f6> 8013a68: e6a1 b.n 80137ae <_printf_float+0xb6> 8013a6a: 2301 movs r3, #1 8013a6c: 4631 mov r1, r6 8013a6e: 4628 mov r0, r5 8013a70: 920a str r2, [sp, #40] @ 0x28 8013a72: 47b8 blx r7 8013a74: 3001 adds r0, #1 8013a76: f43f ae9a beq.w 80137ae <_printf_float+0xb6> 8013a7a: 9a0a ldr r2, [sp, #40] @ 0x28 8013a7c: f10b 0b01 add.w fp, fp, #1 8013a80: e7bb b.n 80139fa <_printf_float+0x302> 8013a82: 4631 mov r1, r6 8013a84: e9dd 2308 ldrd r2, r3, [sp, #32] 8013a88: 4628 mov r0, r5 8013a8a: 47b8 blx r7 8013a8c: 3001 adds r0, #1 8013a8e: d1c0 bne.n 8013a12 <_printf_float+0x31a> 8013a90: e68d b.n 80137ae <_printf_float+0xb6> 8013a92: 9a0a ldr r2, [sp, #40] @ 0x28 8013a94: 464b mov r3, r9 8013a96: 4631 mov r1, r6 8013a98: 4628 mov r0, r5 8013a9a: 4442 add r2, r8 8013a9c: 47b8 blx r7 8013a9e: 3001 adds r0, #1 8013aa0: d1c3 bne.n 8013a2a <_printf_float+0x332> 8013aa2: e684 b.n 80137ae <_printf_float+0xb6> 8013aa4: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 8013aa8: f1ba 0f01 cmp.w sl, #1 8013aac: dc01 bgt.n 8013ab2 <_printf_float+0x3ba> 8013aae: 07db lsls r3, r3, #31 8013ab0: d536 bpl.n 8013b20 <_printf_float+0x428> 8013ab2: 2301 movs r3, #1 8013ab4: 4642 mov r2, r8 8013ab6: 4631 mov r1, r6 8013ab8: 4628 mov r0, r5 8013aba: 47b8 blx r7 8013abc: 3001 adds r0, #1 8013abe: f43f ae76 beq.w 80137ae <_printf_float+0xb6> 8013ac2: e9dd 2308 ldrd r2, r3, [sp, #32] 8013ac6: 4631 mov r1, r6 8013ac8: 4628 mov r0, r5 8013aca: 47b8 blx r7 8013acc: 3001 adds r0, #1 8013ace: f43f ae6e beq.w 80137ae <_printf_float+0xb6> 8013ad2: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 8013ad6: 2200 movs r2, #0 8013ad8: 2300 movs r3, #0 8013ada: f10a 3aff add.w sl, sl, #4294967295 @ 0xffffffff 8013ade: f7f4 ffcf bl 8008a80 <__aeabi_dcmpeq> 8013ae2: b9c0 cbnz r0, 8013b16 <_printf_float+0x41e> 8013ae4: 4653 mov r3, sl 8013ae6: f108 0201 add.w r2, r8, #1 8013aea: 4631 mov r1, r6 8013aec: 4628 mov r0, r5 8013aee: 47b8 blx r7 8013af0: 3001 adds r0, #1 8013af2: d10c bne.n 8013b0e <_printf_float+0x416> 8013af4: e65b b.n 80137ae <_printf_float+0xb6> 8013af6: 2301 movs r3, #1 8013af8: 465a mov r2, fp 8013afa: 4631 mov r1, r6 8013afc: 4628 mov r0, r5 8013afe: 47b8 blx r7 8013b00: 3001 adds r0, #1 8013b02: f43f ae54 beq.w 80137ae <_printf_float+0xb6> 8013b06: f108 0801 add.w r8, r8, #1 8013b0a: 45d0 cmp r8, sl 8013b0c: dbf3 blt.n 8013af6 <_printf_float+0x3fe> 8013b0e: 464b mov r3, r9 8013b10: f104 0250 add.w r2, r4, #80 @ 0x50 8013b14: e6e0 b.n 80138d8 <_printf_float+0x1e0> 8013b16: f04f 0800 mov.w r8, #0 8013b1a: f104 0b1a add.w fp, r4, #26 8013b1e: e7f4 b.n 8013b0a <_printf_float+0x412> 8013b20: 2301 movs r3, #1 8013b22: 4642 mov r2, r8 8013b24: e7e1 b.n 8013aea <_printf_float+0x3f2> 8013b26: 2301 movs r3, #1 8013b28: 464a mov r2, r9 8013b2a: 4631 mov r1, r6 8013b2c: 4628 mov r0, r5 8013b2e: 47b8 blx r7 8013b30: 3001 adds r0, #1 8013b32: f43f ae3c beq.w 80137ae <_printf_float+0xb6> 8013b36: f108 0801 add.w r8, r8, #1 8013b3a: 68e3 ldr r3, [r4, #12] 8013b3c: 990f ldr r1, [sp, #60] @ 0x3c 8013b3e: 1a5b subs r3, r3, r1 8013b40: 4543 cmp r3, r8 8013b42: dcf0 bgt.n 8013b26 <_printf_float+0x42e> 8013b44: e6fd b.n 8013942 <_printf_float+0x24a> 8013b46: f04f 0800 mov.w r8, #0 8013b4a: f104 0919 add.w r9, r4, #25 8013b4e: e7f4 b.n 8013b3a <_printf_float+0x442> 08013b50 <_printf_common>: 8013b50: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8013b54: 4616 mov r6, r2 8013b56: 4698 mov r8, r3 8013b58: 688a ldr r2, [r1, #8] 8013b5a: 690b ldr r3, [r1, #16] 8013b5c: 4607 mov r7, r0 8013b5e: 4293 cmp r3, r2 8013b60: bfb8 it lt 8013b62: 4613 movlt r3, r2 8013b64: 6033 str r3, [r6, #0] 8013b66: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 8013b6a: 460c mov r4, r1 8013b6c: f8dd 9020 ldr.w r9, [sp, #32] 8013b70: b10a cbz r2, 8013b76 <_printf_common+0x26> 8013b72: 3301 adds r3, #1 8013b74: 6033 str r3, [r6, #0] 8013b76: 6823 ldr r3, [r4, #0] 8013b78: 0699 lsls r1, r3, #26 8013b7a: bf42 ittt mi 8013b7c: 6833 ldrmi r3, [r6, #0] 8013b7e: 3302 addmi r3, #2 8013b80: 6033 strmi r3, [r6, #0] 8013b82: 6825 ldr r5, [r4, #0] 8013b84: f015 0506 ands.w r5, r5, #6 8013b88: d106 bne.n 8013b98 <_printf_common+0x48> 8013b8a: f104 0a19 add.w sl, r4, #25 8013b8e: 68e3 ldr r3, [r4, #12] 8013b90: 6832 ldr r2, [r6, #0] 8013b92: 1a9b subs r3, r3, r2 8013b94: 42ab cmp r3, r5 8013b96: dc2b bgt.n 8013bf0 <_printf_common+0xa0> 8013b98: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 8013b9c: 6822 ldr r2, [r4, #0] 8013b9e: 3b00 subs r3, #0 8013ba0: bf18 it ne 8013ba2: 2301 movne r3, #1 8013ba4: 0692 lsls r2, r2, #26 8013ba6: d430 bmi.n 8013c0a <_printf_common+0xba> 8013ba8: 4641 mov r1, r8 8013baa: 4638 mov r0, r7 8013bac: f104 0243 add.w r2, r4, #67 @ 0x43 8013bb0: 47c8 blx r9 8013bb2: 3001 adds r0, #1 8013bb4: d023 beq.n 8013bfe <_printf_common+0xae> 8013bb6: 6823 ldr r3, [r4, #0] 8013bb8: 6922 ldr r2, [r4, #16] 8013bba: f003 0306 and.w r3, r3, #6 8013bbe: 2b04 cmp r3, #4 8013bc0: bf14 ite ne 8013bc2: 2500 movne r5, #0 8013bc4: 6833 ldreq r3, [r6, #0] 8013bc6: f04f 0600 mov.w r6, #0 8013bca: bf08 it eq 8013bcc: 68e5 ldreq r5, [r4, #12] 8013bce: f104 041a add.w r4, r4, #26 8013bd2: bf08 it eq 8013bd4: 1aed subeq r5, r5, r3 8013bd6: f854 3c12 ldr.w r3, [r4, #-18] 8013bda: bf08 it eq 8013bdc: ea25 75e5 biceq.w r5, r5, r5, asr #31 8013be0: 4293 cmp r3, r2 8013be2: bfc4 itt gt 8013be4: 1a9b subgt r3, r3, r2 8013be6: 18ed addgt r5, r5, r3 8013be8: 42b5 cmp r5, r6 8013bea: d11a bne.n 8013c22 <_printf_common+0xd2> 8013bec: 2000 movs r0, #0 8013bee: e008 b.n 8013c02 <_printf_common+0xb2> 8013bf0: 2301 movs r3, #1 8013bf2: 4652 mov r2, sl 8013bf4: 4641 mov r1, r8 8013bf6: 4638 mov r0, r7 8013bf8: 47c8 blx r9 8013bfa: 3001 adds r0, #1 8013bfc: d103 bne.n 8013c06 <_printf_common+0xb6> 8013bfe: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013c02: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8013c06: 3501 adds r5, #1 8013c08: e7c1 b.n 8013b8e <_printf_common+0x3e> 8013c0a: 2030 movs r0, #48 @ 0x30 8013c0c: 18e1 adds r1, r4, r3 8013c0e: f881 0043 strb.w r0, [r1, #67] @ 0x43 8013c12: 1c5a adds r2, r3, #1 8013c14: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 8013c18: 4422 add r2, r4 8013c1a: 3302 adds r3, #2 8013c1c: f882 1043 strb.w r1, [r2, #67] @ 0x43 8013c20: e7c2 b.n 8013ba8 <_printf_common+0x58> 8013c22: 2301 movs r3, #1 8013c24: 4622 mov r2, r4 8013c26: 4641 mov r1, r8 8013c28: 4638 mov r0, r7 8013c2a: 47c8 blx r9 8013c2c: 3001 adds r0, #1 8013c2e: d0e6 beq.n 8013bfe <_printf_common+0xae> 8013c30: 3601 adds r6, #1 8013c32: e7d9 b.n 8013be8 <_printf_common+0x98> 08013c34 <_printf_i>: 8013c34: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 8013c38: 7e0f ldrb r7, [r1, #24] 8013c3a: 4691 mov r9, r2 8013c3c: 2f78 cmp r7, #120 @ 0x78 8013c3e: 4680 mov r8, r0 8013c40: 460c mov r4, r1 8013c42: 469a mov sl, r3 8013c44: 9e0c ldr r6, [sp, #48] @ 0x30 8013c46: f101 0243 add.w r2, r1, #67 @ 0x43 8013c4a: d807 bhi.n 8013c5c <_printf_i+0x28> 8013c4c: 2f62 cmp r7, #98 @ 0x62 8013c4e: d80a bhi.n 8013c66 <_printf_i+0x32> 8013c50: 2f00 cmp r7, #0 8013c52: f000 80d1 beq.w 8013df8 <_printf_i+0x1c4> 8013c56: 2f58 cmp r7, #88 @ 0x58 8013c58: f000 80b8 beq.w 8013dcc <_printf_i+0x198> 8013c5c: f104 0642 add.w r6, r4, #66 @ 0x42 8013c60: f884 7042 strb.w r7, [r4, #66] @ 0x42 8013c64: e03a b.n 8013cdc <_printf_i+0xa8> 8013c66: f1a7 0363 sub.w r3, r7, #99 @ 0x63 8013c6a: 2b15 cmp r3, #21 8013c6c: d8f6 bhi.n 8013c5c <_printf_i+0x28> 8013c6e: a101 add r1, pc, #4 @ (adr r1, 8013c74 <_printf_i+0x40>) 8013c70: f851 f023 ldr.w pc, [r1, r3, lsl #2] 8013c74: 08013ccd .word 0x08013ccd 8013c78: 08013ce1 .word 0x08013ce1 8013c7c: 08013c5d .word 0x08013c5d 8013c80: 08013c5d .word 0x08013c5d 8013c84: 08013c5d .word 0x08013c5d 8013c88: 08013c5d .word 0x08013c5d 8013c8c: 08013ce1 .word 0x08013ce1 8013c90: 08013c5d .word 0x08013c5d 8013c94: 08013c5d .word 0x08013c5d 8013c98: 08013c5d .word 0x08013c5d 8013c9c: 08013c5d .word 0x08013c5d 8013ca0: 08013ddf .word 0x08013ddf 8013ca4: 08013d0b .word 0x08013d0b 8013ca8: 08013d99 .word 0x08013d99 8013cac: 08013c5d .word 0x08013c5d 8013cb0: 08013c5d .word 0x08013c5d 8013cb4: 08013e01 .word 0x08013e01 8013cb8: 08013c5d .word 0x08013c5d 8013cbc: 08013d0b .word 0x08013d0b 8013cc0: 08013c5d .word 0x08013c5d 8013cc4: 08013c5d .word 0x08013c5d 8013cc8: 08013da1 .word 0x08013da1 8013ccc: 6833 ldr r3, [r6, #0] 8013cce: 1d1a adds r2, r3, #4 8013cd0: 681b ldr r3, [r3, #0] 8013cd2: 6032 str r2, [r6, #0] 8013cd4: f104 0642 add.w r6, r4, #66 @ 0x42 8013cd8: f884 3042 strb.w r3, [r4, #66] @ 0x42 8013cdc: 2301 movs r3, #1 8013cde: e09c b.n 8013e1a <_printf_i+0x1e6> 8013ce0: 6833 ldr r3, [r6, #0] 8013ce2: 6820 ldr r0, [r4, #0] 8013ce4: 1d19 adds r1, r3, #4 8013ce6: 6031 str r1, [r6, #0] 8013ce8: 0606 lsls r6, r0, #24 8013cea: d501 bpl.n 8013cf0 <_printf_i+0xbc> 8013cec: 681d ldr r5, [r3, #0] 8013cee: e003 b.n 8013cf8 <_printf_i+0xc4> 8013cf0: 0645 lsls r5, r0, #25 8013cf2: d5fb bpl.n 8013cec <_printf_i+0xb8> 8013cf4: f9b3 5000 ldrsh.w r5, [r3] 8013cf8: 2d00 cmp r5, #0 8013cfa: da03 bge.n 8013d04 <_printf_i+0xd0> 8013cfc: 232d movs r3, #45 @ 0x2d 8013cfe: 426d negs r5, r5 8013d00: f884 3043 strb.w r3, [r4, #67] @ 0x43 8013d04: 230a movs r3, #10 8013d06: 4858 ldr r0, [pc, #352] @ (8013e68 <_printf_i+0x234>) 8013d08: e011 b.n 8013d2e <_printf_i+0xfa> 8013d0a: 6821 ldr r1, [r4, #0] 8013d0c: 6833 ldr r3, [r6, #0] 8013d0e: 0608 lsls r0, r1, #24 8013d10: f853 5b04 ldr.w r5, [r3], #4 8013d14: d402 bmi.n 8013d1c <_printf_i+0xe8> 8013d16: 0649 lsls r1, r1, #25 8013d18: bf48 it mi 8013d1a: b2ad uxthmi r5, r5 8013d1c: 2f6f cmp r7, #111 @ 0x6f 8013d1e: 6033 str r3, [r6, #0] 8013d20: bf14 ite ne 8013d22: 230a movne r3, #10 8013d24: 2308 moveq r3, #8 8013d26: 4850 ldr r0, [pc, #320] @ (8013e68 <_printf_i+0x234>) 8013d28: 2100 movs r1, #0 8013d2a: f884 1043 strb.w r1, [r4, #67] @ 0x43 8013d2e: 6866 ldr r6, [r4, #4] 8013d30: 2e00 cmp r6, #0 8013d32: 60a6 str r6, [r4, #8] 8013d34: db05 blt.n 8013d42 <_printf_i+0x10e> 8013d36: 6821 ldr r1, [r4, #0] 8013d38: 432e orrs r6, r5 8013d3a: f021 0104 bic.w r1, r1, #4 8013d3e: 6021 str r1, [r4, #0] 8013d40: d04b beq.n 8013dda <_printf_i+0x1a6> 8013d42: 4616 mov r6, r2 8013d44: fbb5 f1f3 udiv r1, r5, r3 8013d48: fb03 5711 mls r7, r3, r1, r5 8013d4c: 5dc7 ldrb r7, [r0, r7] 8013d4e: f806 7d01 strb.w r7, [r6, #-1]! 8013d52: 462f mov r7, r5 8013d54: 42bb cmp r3, r7 8013d56: 460d mov r5, r1 8013d58: d9f4 bls.n 8013d44 <_printf_i+0x110> 8013d5a: 2b08 cmp r3, #8 8013d5c: d10b bne.n 8013d76 <_printf_i+0x142> 8013d5e: 6823 ldr r3, [r4, #0] 8013d60: 07df lsls r7, r3, #31 8013d62: d508 bpl.n 8013d76 <_printf_i+0x142> 8013d64: 6923 ldr r3, [r4, #16] 8013d66: 6861 ldr r1, [r4, #4] 8013d68: 4299 cmp r1, r3 8013d6a: bfde ittt le 8013d6c: 2330 movle r3, #48 @ 0x30 8013d6e: f806 3c01 strble.w r3, [r6, #-1] 8013d72: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff 8013d76: 1b92 subs r2, r2, r6 8013d78: 6122 str r2, [r4, #16] 8013d7a: 464b mov r3, r9 8013d7c: 4621 mov r1, r4 8013d7e: 4640 mov r0, r8 8013d80: f8cd a000 str.w sl, [sp] 8013d84: aa03 add r2, sp, #12 8013d86: f7ff fee3 bl 8013b50 <_printf_common> 8013d8a: 3001 adds r0, #1 8013d8c: d14a bne.n 8013e24 <_printf_i+0x1f0> 8013d8e: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013d92: b004 add sp, #16 8013d94: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8013d98: 6823 ldr r3, [r4, #0] 8013d9a: f043 0320 orr.w r3, r3, #32 8013d9e: 6023 str r3, [r4, #0] 8013da0: 2778 movs r7, #120 @ 0x78 8013da2: 4832 ldr r0, [pc, #200] @ (8013e6c <_printf_i+0x238>) 8013da4: f884 7045 strb.w r7, [r4, #69] @ 0x45 8013da8: 6823 ldr r3, [r4, #0] 8013daa: 6831 ldr r1, [r6, #0] 8013dac: 061f lsls r7, r3, #24 8013dae: f851 5b04 ldr.w r5, [r1], #4 8013db2: d402 bmi.n 8013dba <_printf_i+0x186> 8013db4: 065f lsls r7, r3, #25 8013db6: bf48 it mi 8013db8: b2ad uxthmi r5, r5 8013dba: 6031 str r1, [r6, #0] 8013dbc: 07d9 lsls r1, r3, #31 8013dbe: bf44 itt mi 8013dc0: f043 0320 orrmi.w r3, r3, #32 8013dc4: 6023 strmi r3, [r4, #0] 8013dc6: b11d cbz r5, 8013dd0 <_printf_i+0x19c> 8013dc8: 2310 movs r3, #16 8013dca: e7ad b.n 8013d28 <_printf_i+0xf4> 8013dcc: 4826 ldr r0, [pc, #152] @ (8013e68 <_printf_i+0x234>) 8013dce: e7e9 b.n 8013da4 <_printf_i+0x170> 8013dd0: 6823 ldr r3, [r4, #0] 8013dd2: f023 0320 bic.w r3, r3, #32 8013dd6: 6023 str r3, [r4, #0] 8013dd8: e7f6 b.n 8013dc8 <_printf_i+0x194> 8013dda: 4616 mov r6, r2 8013ddc: e7bd b.n 8013d5a <_printf_i+0x126> 8013dde: 6833 ldr r3, [r6, #0] 8013de0: 6825 ldr r5, [r4, #0] 8013de2: 1d18 adds r0, r3, #4 8013de4: 6961 ldr r1, [r4, #20] 8013de6: 6030 str r0, [r6, #0] 8013de8: 062e lsls r6, r5, #24 8013dea: 681b ldr r3, [r3, #0] 8013dec: d501 bpl.n 8013df2 <_printf_i+0x1be> 8013dee: 6019 str r1, [r3, #0] 8013df0: e002 b.n 8013df8 <_printf_i+0x1c4> 8013df2: 0668 lsls r0, r5, #25 8013df4: d5fb bpl.n 8013dee <_printf_i+0x1ba> 8013df6: 8019 strh r1, [r3, #0] 8013df8: 2300 movs r3, #0 8013dfa: 4616 mov r6, r2 8013dfc: 6123 str r3, [r4, #16] 8013dfe: e7bc b.n 8013d7a <_printf_i+0x146> 8013e00: 6833 ldr r3, [r6, #0] 8013e02: 2100 movs r1, #0 8013e04: 1d1a adds r2, r3, #4 8013e06: 6032 str r2, [r6, #0] 8013e08: 681e ldr r6, [r3, #0] 8013e0a: 6862 ldr r2, [r4, #4] 8013e0c: 4630 mov r0, r6 8013e0e: f000 fa3f bl 8014290 8013e12: b108 cbz r0, 8013e18 <_printf_i+0x1e4> 8013e14: 1b80 subs r0, r0, r6 8013e16: 6060 str r0, [r4, #4] 8013e18: 6863 ldr r3, [r4, #4] 8013e1a: 6123 str r3, [r4, #16] 8013e1c: 2300 movs r3, #0 8013e1e: f884 3043 strb.w r3, [r4, #67] @ 0x43 8013e22: e7aa b.n 8013d7a <_printf_i+0x146> 8013e24: 4632 mov r2, r6 8013e26: 4649 mov r1, r9 8013e28: 4640 mov r0, r8 8013e2a: 6923 ldr r3, [r4, #16] 8013e2c: 47d0 blx sl 8013e2e: 3001 adds r0, #1 8013e30: d0ad beq.n 8013d8e <_printf_i+0x15a> 8013e32: 6823 ldr r3, [r4, #0] 8013e34: 079b lsls r3, r3, #30 8013e36: d413 bmi.n 8013e60 <_printf_i+0x22c> 8013e38: 68e0 ldr r0, [r4, #12] 8013e3a: 9b03 ldr r3, [sp, #12] 8013e3c: 4298 cmp r0, r3 8013e3e: bfb8 it lt 8013e40: 4618 movlt r0, r3 8013e42: e7a6 b.n 8013d92 <_printf_i+0x15e> 8013e44: 2301 movs r3, #1 8013e46: 4632 mov r2, r6 8013e48: 4649 mov r1, r9 8013e4a: 4640 mov r0, r8 8013e4c: 47d0 blx sl 8013e4e: 3001 adds r0, #1 8013e50: d09d beq.n 8013d8e <_printf_i+0x15a> 8013e52: 3501 adds r5, #1 8013e54: 68e3 ldr r3, [r4, #12] 8013e56: 9903 ldr r1, [sp, #12] 8013e58: 1a5b subs r3, r3, r1 8013e5a: 42ab cmp r3, r5 8013e5c: dcf2 bgt.n 8013e44 <_printf_i+0x210> 8013e5e: e7eb b.n 8013e38 <_printf_i+0x204> 8013e60: 2500 movs r5, #0 8013e62: f104 0619 add.w r6, r4, #25 8013e66: e7f5 b.n 8013e54 <_printf_i+0x220> 8013e68: 08016c36 .word 0x08016c36 8013e6c: 08016c47 .word 0x08016c47 08013e70 : 8013e70: 2300 movs r3, #0 8013e72: b510 push {r4, lr} 8013e74: 4604 mov r4, r0 8013e76: e9c0 3300 strd r3, r3, [r0] 8013e7a: e9c0 3304 strd r3, r3, [r0, #16] 8013e7e: 6083 str r3, [r0, #8] 8013e80: 8181 strh r1, [r0, #12] 8013e82: 6643 str r3, [r0, #100] @ 0x64 8013e84: 81c2 strh r2, [r0, #14] 8013e86: 6183 str r3, [r0, #24] 8013e88: 4619 mov r1, r3 8013e8a: 2208 movs r2, #8 8013e8c: 305c adds r0, #92 @ 0x5c 8013e8e: f000 f8ff bl 8014090 8013e92: 4b0d ldr r3, [pc, #52] @ (8013ec8 ) 8013e94: 6224 str r4, [r4, #32] 8013e96: 6263 str r3, [r4, #36] @ 0x24 8013e98: 4b0c ldr r3, [pc, #48] @ (8013ecc ) 8013e9a: 62a3 str r3, [r4, #40] @ 0x28 8013e9c: 4b0c ldr r3, [pc, #48] @ (8013ed0 ) 8013e9e: 62e3 str r3, [r4, #44] @ 0x2c 8013ea0: 4b0c ldr r3, [pc, #48] @ (8013ed4 ) 8013ea2: 6323 str r3, [r4, #48] @ 0x30 8013ea4: 4b0c ldr r3, [pc, #48] @ (8013ed8 ) 8013ea6: 429c cmp r4, r3 8013ea8: d006 beq.n 8013eb8 8013eaa: f103 0268 add.w r2, r3, #104 @ 0x68 8013eae: 4294 cmp r4, r2 8013eb0: d002 beq.n 8013eb8 8013eb2: 33d0 adds r3, #208 @ 0xd0 8013eb4: 429c cmp r4, r3 8013eb6: d105 bne.n 8013ec4 8013eb8: f104 0058 add.w r0, r4, #88 @ 0x58 8013ebc: e8bd 4010 ldmia.w sp!, {r4, lr} 8013ec0: f000 b9de b.w 8014280 <__retarget_lock_init_recursive> 8013ec4: bd10 pop {r4, pc} 8013ec6: bf00 nop 8013ec8: 08015ea1 .word 0x08015ea1 8013ecc: 08015ec3 .word 0x08015ec3 8013ed0: 08015efb .word 0x08015efb 8013ed4: 08015f1f .word 0x08015f1f 8013ed8: 20000e64 .word 0x20000e64 08013edc : 8013edc: 4a02 ldr r2, [pc, #8] @ (8013ee8 ) 8013ede: 4903 ldr r1, [pc, #12] @ (8013eec ) 8013ee0: 4803 ldr r0, [pc, #12] @ (8013ef0 ) 8013ee2: f000 b8a5 b.w 8014030 <_fwalk_sglue> 8013ee6: bf00 nop 8013ee8: 20000078 .word 0x20000078 8013eec: 08015745 .word 0x08015745 8013ef0: 20000088 .word 0x20000088 08013ef4 : 8013ef4: 6841 ldr r1, [r0, #4] 8013ef6: 4b0c ldr r3, [pc, #48] @ (8013f28 ) 8013ef8: b510 push {r4, lr} 8013efa: 4299 cmp r1, r3 8013efc: 4604 mov r4, r0 8013efe: d001 beq.n 8013f04 8013f00: f001 fc20 bl 8015744 <_fflush_r> 8013f04: 68a1 ldr r1, [r4, #8] 8013f06: 4b09 ldr r3, [pc, #36] @ (8013f2c ) 8013f08: 4299 cmp r1, r3 8013f0a: d002 beq.n 8013f12 8013f0c: 4620 mov r0, r4 8013f0e: f001 fc19 bl 8015744 <_fflush_r> 8013f12: 68e1 ldr r1, [r4, #12] 8013f14: 4b06 ldr r3, [pc, #24] @ (8013f30 ) 8013f16: 4299 cmp r1, r3 8013f18: d004 beq.n 8013f24 8013f1a: 4620 mov r0, r4 8013f1c: e8bd 4010 ldmia.w sp!, {r4, lr} 8013f20: f001 bc10 b.w 8015744 <_fflush_r> 8013f24: bd10 pop {r4, pc} 8013f26: bf00 nop 8013f28: 20000e64 .word 0x20000e64 8013f2c: 20000ecc .word 0x20000ecc 8013f30: 20000f34 .word 0x20000f34 08013f34 : 8013f34: b510 push {r4, lr} 8013f36: 4b0b ldr r3, [pc, #44] @ (8013f64 ) 8013f38: 4c0b ldr r4, [pc, #44] @ (8013f68 ) 8013f3a: 4a0c ldr r2, [pc, #48] @ (8013f6c ) 8013f3c: 4620 mov r0, r4 8013f3e: 601a str r2, [r3, #0] 8013f40: 2104 movs r1, #4 8013f42: 2200 movs r2, #0 8013f44: f7ff ff94 bl 8013e70 8013f48: f104 0068 add.w r0, r4, #104 @ 0x68 8013f4c: 2201 movs r2, #1 8013f4e: 2109 movs r1, #9 8013f50: f7ff ff8e bl 8013e70 8013f54: f104 00d0 add.w r0, r4, #208 @ 0xd0 8013f58: 2202 movs r2, #2 8013f5a: e8bd 4010 ldmia.w sp!, {r4, lr} 8013f5e: 2112 movs r1, #18 8013f60: f7ff bf86 b.w 8013e70 8013f64: 20000f9c .word 0x20000f9c 8013f68: 20000e64 .word 0x20000e64 8013f6c: 08013edd .word 0x08013edd 08013f70 <__sfp_lock_acquire>: 8013f70: 4801 ldr r0, [pc, #4] @ (8013f78 <__sfp_lock_acquire+0x8>) 8013f72: f000 b986 b.w 8014282 <__retarget_lock_acquire_recursive> 8013f76: bf00 nop 8013f78: 20000fa1 .word 0x20000fa1 08013f7c <__sfp_lock_release>: 8013f7c: 4801 ldr r0, [pc, #4] @ (8013f84 <__sfp_lock_release+0x8>) 8013f7e: f000 b981 b.w 8014284 <__retarget_lock_release_recursive> 8013f82: bf00 nop 8013f84: 20000fa1 .word 0x20000fa1 08013f88 <__sinit>: 8013f88: b510 push {r4, lr} 8013f8a: 4604 mov r4, r0 8013f8c: f7ff fff0 bl 8013f70 <__sfp_lock_acquire> 8013f90: 6a23 ldr r3, [r4, #32] 8013f92: b11b cbz r3, 8013f9c <__sinit+0x14> 8013f94: e8bd 4010 ldmia.w sp!, {r4, lr} 8013f98: f7ff bff0 b.w 8013f7c <__sfp_lock_release> 8013f9c: 4b04 ldr r3, [pc, #16] @ (8013fb0 <__sinit+0x28>) 8013f9e: 6223 str r3, [r4, #32] 8013fa0: 4b04 ldr r3, [pc, #16] @ (8013fb4 <__sinit+0x2c>) 8013fa2: 681b ldr r3, [r3, #0] 8013fa4: 2b00 cmp r3, #0 8013fa6: d1f5 bne.n 8013f94 <__sinit+0xc> 8013fa8: f7ff ffc4 bl 8013f34 8013fac: e7f2 b.n 8013f94 <__sinit+0xc> 8013fae: bf00 nop 8013fb0: 08013ef5 .word 0x08013ef5 8013fb4: 20000f9c .word 0x20000f9c 08013fb8 <_vsniprintf_r>: 8013fb8: b530 push {r4, r5, lr} 8013fba: 4614 mov r4, r2 8013fbc: 2c00 cmp r4, #0 8013fbe: 4605 mov r5, r0 8013fc0: 461a mov r2, r3 8013fc2: b09b sub sp, #108 @ 0x6c 8013fc4: da05 bge.n 8013fd2 <_vsniprintf_r+0x1a> 8013fc6: 238b movs r3, #139 @ 0x8b 8013fc8: 6003 str r3, [r0, #0] 8013fca: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013fce: b01b add sp, #108 @ 0x6c 8013fd0: bd30 pop {r4, r5, pc} 8013fd2: f44f 7302 mov.w r3, #520 @ 0x208 8013fd6: f8ad 300c strh.w r3, [sp, #12] 8013fda: f04f 0300 mov.w r3, #0 8013fde: 9319 str r3, [sp, #100] @ 0x64 8013fe0: bf0c ite eq 8013fe2: 4623 moveq r3, r4 8013fe4: f104 33ff addne.w r3, r4, #4294967295 @ 0xffffffff 8013fe8: 9302 str r3, [sp, #8] 8013fea: 9305 str r3, [sp, #20] 8013fec: f64f 73ff movw r3, #65535 @ 0xffff 8013ff0: 9100 str r1, [sp, #0] 8013ff2: 9104 str r1, [sp, #16] 8013ff4: f8ad 300e strh.w r3, [sp, #14] 8013ff8: 4669 mov r1, sp 8013ffa: 9b1e ldr r3, [sp, #120] @ 0x78 8013ffc: f001 f83c bl 8015078 <_svfiprintf_r> 8014000: 1c43 adds r3, r0, #1 8014002: bfbc itt lt 8014004: 238b movlt r3, #139 @ 0x8b 8014006: 602b strlt r3, [r5, #0] 8014008: 2c00 cmp r4, #0 801400a: d0e0 beq.n 8013fce <_vsniprintf_r+0x16> 801400c: 2200 movs r2, #0 801400e: 9b00 ldr r3, [sp, #0] 8014010: 701a strb r2, [r3, #0] 8014012: e7dc b.n 8013fce <_vsniprintf_r+0x16> 08014014 : 8014014: b507 push {r0, r1, r2, lr} 8014016: 9300 str r3, [sp, #0] 8014018: 4613 mov r3, r2 801401a: 460a mov r2, r1 801401c: 4601 mov r1, r0 801401e: 4803 ldr r0, [pc, #12] @ (801402c ) 8014020: 6800 ldr r0, [r0, #0] 8014022: f7ff ffc9 bl 8013fb8 <_vsniprintf_r> 8014026: b003 add sp, #12 8014028: f85d fb04 ldr.w pc, [sp], #4 801402c: 20000084 .word 0x20000084 08014030 <_fwalk_sglue>: 8014030: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8014034: 4607 mov r7, r0 8014036: 4688 mov r8, r1 8014038: 4614 mov r4, r2 801403a: 2600 movs r6, #0 801403c: e9d4 9501 ldrd r9, r5, [r4, #4] 8014040: f1b9 0901 subs.w r9, r9, #1 8014044: d505 bpl.n 8014052 <_fwalk_sglue+0x22> 8014046: 6824 ldr r4, [r4, #0] 8014048: 2c00 cmp r4, #0 801404a: d1f7 bne.n 801403c <_fwalk_sglue+0xc> 801404c: 4630 mov r0, r6 801404e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8014052: 89ab ldrh r3, [r5, #12] 8014054: 2b01 cmp r3, #1 8014056: d907 bls.n 8014068 <_fwalk_sglue+0x38> 8014058: f9b5 300e ldrsh.w r3, [r5, #14] 801405c: 3301 adds r3, #1 801405e: d003 beq.n 8014068 <_fwalk_sglue+0x38> 8014060: 4629 mov r1, r5 8014062: 4638 mov r0, r7 8014064: 47c0 blx r8 8014066: 4306 orrs r6, r0 8014068: 3568 adds r5, #104 @ 0x68 801406a: e7e9 b.n 8014040 <_fwalk_sglue+0x10> 0801406c : 801406c: b40f push {r0, r1, r2, r3} 801406e: b507 push {r0, r1, r2, lr} 8014070: 4906 ldr r1, [pc, #24] @ (801408c ) 8014072: ab04 add r3, sp, #16 8014074: 6808 ldr r0, [r1, #0] 8014076: f853 2b04 ldr.w r2, [r3], #4 801407a: 6881 ldr r1, [r0, #8] 801407c: 9301 str r3, [sp, #4] 801407e: f001 f91f bl 80152c0 <_vfiprintf_r> 8014082: b003 add sp, #12 8014084: f85d eb04 ldr.w lr, [sp], #4 8014088: b004 add sp, #16 801408a: 4770 bx lr 801408c: 20000084 .word 0x20000084 08014090 : 8014090: 4603 mov r3, r0 8014092: 4402 add r2, r0 8014094: 4293 cmp r3, r2 8014096: d100 bne.n 801409a 8014098: 4770 bx lr 801409a: f803 1b01 strb.w r1, [r3], #1 801409e: e7f9 b.n 8014094 080140a0 : 80140a0: b538 push {r3, r4, r5, lr} 80140a2: 4b0b ldr r3, [pc, #44] @ (80140d0 ) 80140a4: 4604 mov r4, r0 80140a6: 681d ldr r5, [r3, #0] 80140a8: 6b6b ldr r3, [r5, #52] @ 0x34 80140aa: b953 cbnz r3, 80140c2 80140ac: 2024 movs r0, #36 @ 0x24 80140ae: f001 fa1f bl 80154f0 80140b2: 4602 mov r2, r0 80140b4: 6368 str r0, [r5, #52] @ 0x34 80140b6: b920 cbnz r0, 80140c2 80140b8: 213d movs r1, #61 @ 0x3d 80140ba: 4b06 ldr r3, [pc, #24] @ (80140d4 ) 80140bc: 4806 ldr r0, [pc, #24] @ (80140d8 ) 80140be: f000 f903 bl 80142c8 <__assert_func> 80140c2: 4620 mov r0, r4 80140c4: 6b69 ldr r1, [r5, #52] @ 0x34 80140c6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80140ca: f000 b807 b.w 80140dc 80140ce: bf00 nop 80140d0: 20000084 .word 0x20000084 80140d4: 08016c58 .word 0x08016c58 80140d8: 08016c6f .word 0x08016c6f 080140dc : 80140dc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80140e0: 2300 movs r3, #0 80140e2: 460c mov r4, r1 80140e4: e9d0 0100 ldrd r0, r1, [r0] 80140e8: 4a4c ldr r2, [pc, #304] @ (801421c ) 80140ea: f7f5 f883 bl 80091f4 <__aeabi_ldivmod> 80140ee: f44f 6161 mov.w r1, #3600 @ 0xe10 80140f2: 2a00 cmp r2, #0 80140f4: bfbc itt lt 80140f6: f502 32a8 addlt.w r2, r2, #86016 @ 0x15000 80140fa: f502 72c0 addlt.w r2, r2, #384 @ 0x180 80140fe: fbb2 f3f1 udiv r3, r2, r1 8014102: fb01 2213 mls r2, r1, r3, r2 8014106: f04f 013c mov.w r1, #60 @ 0x3c 801410a: 60a3 str r3, [r4, #8] 801410c: fbb2 f3f1 udiv r3, r2, r1 8014110: fb01 2213 mls r2, r1, r3, r2 8014114: 6022 str r2, [r4, #0] 8014116: f04f 0207 mov.w r2, #7 801411a: f500 202f add.w r0, r0, #716800 @ 0xaf000 801411e: bfac ite ge 8014120: f600 206c addwge r0, r0, #2668 @ 0xa6c 8014124: f600 206b addwlt r0, r0, #2667 @ 0xa6b 8014128: 6063 str r3, [r4, #4] 801412a: 1cc3 adds r3, r0, #3 801412c: fb93 f2f2 sdiv r2, r3, r2 8014130: ebc2 02c2 rsb r2, r2, r2, lsl #3 8014134: 1a9b subs r3, r3, r2 8014136: 493a ldr r1, [pc, #232] @ (8014220 ) 8014138: d555 bpl.n 80141e6 801413a: 3307 adds r3, #7 801413c: 61a3 str r3, [r4, #24] 801413e: f5a0 330e sub.w r3, r0, #145408 @ 0x23800 8014142: f5a3 732c sub.w r3, r3, #688 @ 0x2b0 8014146: fb93 f1f1 sdiv r1, r3, r1 801414a: 4b36 ldr r3, [pc, #216] @ (8014224 ) 801414c: f240 5cb4 movw ip, #1460 @ 0x5b4 8014150: fb03 0001 mla r0, r3, r1, r0 8014154: f648 63ac movw r3, #36524 @ 0x8eac 8014158: fbb0 f3f3 udiv r3, r0, r3 801415c: fbb0 f2fc udiv r2, r0, ip 8014160: 4403 add r3, r0 8014162: 1a9b subs r3, r3, r2 8014164: 4a30 ldr r2, [pc, #192] @ (8014228 ) 8014166: f240 176d movw r7, #365 @ 0x16d 801416a: fbb0 f2f2 udiv r2, r0, r2 801416e: 1a9b subs r3, r3, r2 8014170: fbb3 f2f7 udiv r2, r3, r7 8014174: 2664 movs r6, #100 @ 0x64 8014176: fbb3 f3fc udiv r3, r3, ip 801417a: fbb2 f5f6 udiv r5, r2, r6 801417e: 1aeb subs r3, r5, r3 8014180: 4403 add r3, r0 8014182: 2099 movs r0, #153 @ 0x99 8014184: fb07 3312 mls r3, r7, r2, r3 8014188: eb03 0783 add.w r7, r3, r3, lsl #2 801418c: 3702 adds r7, #2 801418e: fbb7 fcf0 udiv ip, r7, r0 8014192: f04f 0805 mov.w r8, #5 8014196: fb00 f00c mul.w r0, r0, ip 801419a: 3002 adds r0, #2 801419c: fbb0 f0f8 udiv r0, r0, r8 80141a0: f103 0e01 add.w lr, r3, #1 80141a4: ebae 0000 sub.w r0, lr, r0 80141a8: f240 5ef9 movw lr, #1529 @ 0x5f9 80141ac: 4577 cmp r7, lr 80141ae: bf8c ite hi 80141b0: f06f 0709 mvnhi.w r7, #9 80141b4: 2702 movls r7, #2 80141b6: 4467 add r7, ip 80141b8: f44f 7cc8 mov.w ip, #400 @ 0x190 80141bc: fb0c 2101 mla r1, ip, r1, r2 80141c0: 2f01 cmp r7, #1 80141c2: bf98 it ls 80141c4: 3101 addls r1, #1 80141c6: f5b3 7f99 cmp.w r3, #306 @ 0x132 80141ca: d312 bcc.n 80141f2 80141cc: f5a3 7399 sub.w r3, r3, #306 @ 0x132 80141d0: 61e3 str r3, [r4, #28] 80141d2: 2300 movs r3, #0 80141d4: f2a1 716c subw r1, r1, #1900 @ 0x76c 80141d8: 60e0 str r0, [r4, #12] 80141da: e9c4 7104 strd r7, r1, [r4, #16] 80141de: 4620 mov r0, r4 80141e0: 6223 str r3, [r4, #32] 80141e2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80141e6: 2800 cmp r0, #0 80141e8: 61a3 str r3, [r4, #24] 80141ea: dba8 blt.n 801413e 80141ec: fb90 f1f1 sdiv r1, r0, r1 80141f0: e7ab b.n 801414a 80141f2: f012 0f03 tst.w r2, #3 80141f6: d102 bne.n 80141fe 80141f8: fb06 2515 mls r5, r6, r5, r2 80141fc: b95d cbnz r5, 8014216 80141fe: f44f 75c8 mov.w r5, #400 @ 0x190 8014202: fbb2 f6f5 udiv r6, r2, r5 8014206: fb05 2216 mls r2, r5, r6, r2 801420a: fab2 f282 clz r2, r2 801420e: 0952 lsrs r2, r2, #5 8014210: 333b adds r3, #59 @ 0x3b 8014212: 4413 add r3, r2 8014214: e7dc b.n 80141d0 8014216: 2201 movs r2, #1 8014218: e7fa b.n 8014210 801421a: bf00 nop 801421c: 00015180 .word 0x00015180 8014220: 00023ab1 .word 0x00023ab1 8014224: fffdc54f .word 0xfffdc54f 8014228: 00023ab0 .word 0x00023ab0 0801422c <__errno>: 801422c: 4b01 ldr r3, [pc, #4] @ (8014234 <__errno+0x8>) 801422e: 6818 ldr r0, [r3, #0] 8014230: 4770 bx lr 8014232: bf00 nop 8014234: 20000084 .word 0x20000084 08014238 <__libc_init_array>: 8014238: b570 push {r4, r5, r6, lr} 801423a: 2600 movs r6, #0 801423c: 4d0c ldr r5, [pc, #48] @ (8014270 <__libc_init_array+0x38>) 801423e: 4c0d ldr r4, [pc, #52] @ (8014274 <__libc_init_array+0x3c>) 8014240: 1b64 subs r4, r4, r5 8014242: 10a4 asrs r4, r4, #2 8014244: 42a6 cmp r6, r4 8014246: d109 bne.n 801425c <__libc_init_array+0x24> 8014248: f002 f906 bl 8016458 <_init> 801424c: 2600 movs r6, #0 801424e: 4d0a ldr r5, [pc, #40] @ (8014278 <__libc_init_array+0x40>) 8014250: 4c0a ldr r4, [pc, #40] @ (801427c <__libc_init_array+0x44>) 8014252: 1b64 subs r4, r4, r5 8014254: 10a4 asrs r4, r4, #2 8014256: 42a6 cmp r6, r4 8014258: d105 bne.n 8014266 <__libc_init_array+0x2e> 801425a: bd70 pop {r4, r5, r6, pc} 801425c: f855 3b04 ldr.w r3, [r5], #4 8014260: 4798 blx r3 8014262: 3601 adds r6, #1 8014264: e7ee b.n 8014244 <__libc_init_array+0xc> 8014266: f855 3b04 ldr.w r3, [r5], #4 801426a: 4798 blx r3 801426c: 3601 adds r6, #1 801426e: e7f2 b.n 8014256 <__libc_init_array+0x1e> 8014270: 08016ffc .word 0x08016ffc 8014274: 08016ffc .word 0x08016ffc 8014278: 08016ffc .word 0x08016ffc 801427c: 08017000 .word 0x08017000 08014280 <__retarget_lock_init_recursive>: 8014280: 4770 bx lr 08014282 <__retarget_lock_acquire_recursive>: 8014282: 4770 bx lr 08014284 <__retarget_lock_release_recursive>: 8014284: 4770 bx lr ... 08014288 <_localeconv_r>: 8014288: 4800 ldr r0, [pc, #0] @ (801428c <_localeconv_r+0x4>) 801428a: 4770 bx lr 801428c: 200001c4 .word 0x200001c4 08014290 : 8014290: 4603 mov r3, r0 8014292: b510 push {r4, lr} 8014294: b2c9 uxtb r1, r1 8014296: 4402 add r2, r0 8014298: 4293 cmp r3, r2 801429a: 4618 mov r0, r3 801429c: d101 bne.n 80142a2 801429e: 2000 movs r0, #0 80142a0: e003 b.n 80142aa 80142a2: 7804 ldrb r4, [r0, #0] 80142a4: 3301 adds r3, #1 80142a6: 428c cmp r4, r1 80142a8: d1f6 bne.n 8014298 80142aa: bd10 pop {r4, pc} 080142ac : 80142ac: 440a add r2, r1 80142ae: 4291 cmp r1, r2 80142b0: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff 80142b4: d100 bne.n 80142b8 80142b6: 4770 bx lr 80142b8: b510 push {r4, lr} 80142ba: f811 4b01 ldrb.w r4, [r1], #1 80142be: 4291 cmp r1, r2 80142c0: f803 4f01 strb.w r4, [r3, #1]! 80142c4: d1f9 bne.n 80142ba 80142c6: bd10 pop {r4, pc} 080142c8 <__assert_func>: 80142c8: b51f push {r0, r1, r2, r3, r4, lr} 80142ca: 4614 mov r4, r2 80142cc: 461a mov r2, r3 80142ce: 4b09 ldr r3, [pc, #36] @ (80142f4 <__assert_func+0x2c>) 80142d0: 4605 mov r5, r0 80142d2: 681b ldr r3, [r3, #0] 80142d4: 68d8 ldr r0, [r3, #12] 80142d6: b14c cbz r4, 80142ec <__assert_func+0x24> 80142d8: 4b07 ldr r3, [pc, #28] @ (80142f8 <__assert_func+0x30>) 80142da: e9cd 3401 strd r3, r4, [sp, #4] 80142de: 9100 str r1, [sp, #0] 80142e0: 462b mov r3, r5 80142e2: 4906 ldr r1, [pc, #24] @ (80142fc <__assert_func+0x34>) 80142e4: f001 fe20 bl 8015f28 80142e8: f001 ffe6 bl 80162b8 80142ec: 4b04 ldr r3, [pc, #16] @ (8014300 <__assert_func+0x38>) 80142ee: 461c mov r4, r3 80142f0: e7f3 b.n 80142da <__assert_func+0x12> 80142f2: bf00 nop 80142f4: 20000084 .word 0x20000084 80142f8: 08016cc7 .word 0x08016cc7 80142fc: 08016cd4 .word 0x08016cd4 8014300: 08016d02 .word 0x08016d02 08014304 : 8014304: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8014308: 6903 ldr r3, [r0, #16] 801430a: 690c ldr r4, [r1, #16] 801430c: 4607 mov r7, r0 801430e: 42a3 cmp r3, r4 8014310: db7e blt.n 8014410 8014312: 3c01 subs r4, #1 8014314: 00a3 lsls r3, r4, #2 8014316: f100 0514 add.w r5, r0, #20 801431a: f101 0814 add.w r8, r1, #20 801431e: 9300 str r3, [sp, #0] 8014320: eb05 0384 add.w r3, r5, r4, lsl #2 8014324: 9301 str r3, [sp, #4] 8014326: f858 3024 ldr.w r3, [r8, r4, lsl #2] 801432a: f855 2024 ldr.w r2, [r5, r4, lsl #2] 801432e: 3301 adds r3, #1 8014330: 429a cmp r2, r3 8014332: fbb2 f6f3 udiv r6, r2, r3 8014336: eb08 0984 add.w r9, r8, r4, lsl #2 801433a: d32e bcc.n 801439a 801433c: f04f 0a00 mov.w sl, #0 8014340: 46c4 mov ip, r8 8014342: 46ae mov lr, r5 8014344: 46d3 mov fp, sl 8014346: f85c 3b04 ldr.w r3, [ip], #4 801434a: b298 uxth r0, r3 801434c: fb06 a000 mla r0, r6, r0, sl 8014350: 0c1b lsrs r3, r3, #16 8014352: 0c02 lsrs r2, r0, #16 8014354: fb06 2303 mla r3, r6, r3, r2 8014358: f8de 2000 ldr.w r2, [lr] 801435c: b280 uxth r0, r0 801435e: b292 uxth r2, r2 8014360: 1a12 subs r2, r2, r0 8014362: 445a add r2, fp 8014364: f8de 0000 ldr.w r0, [lr] 8014368: ea4f 4a13 mov.w sl, r3, lsr #16 801436c: b29b uxth r3, r3 801436e: ebc3 4322 rsb r3, r3, r2, asr #16 8014372: eb03 4310 add.w r3, r3, r0, lsr #16 8014376: b292 uxth r2, r2 8014378: ea42 4203 orr.w r2, r2, r3, lsl #16 801437c: 45e1 cmp r9, ip 801437e: ea4f 4b23 mov.w fp, r3, asr #16 8014382: f84e 2b04 str.w r2, [lr], #4 8014386: d2de bcs.n 8014346 8014388: 9b00 ldr r3, [sp, #0] 801438a: 58eb ldr r3, [r5, r3] 801438c: b92b cbnz r3, 801439a 801438e: 9b01 ldr r3, [sp, #4] 8014390: 3b04 subs r3, #4 8014392: 429d cmp r5, r3 8014394: 461a mov r2, r3 8014396: d32f bcc.n 80143f8 8014398: 613c str r4, [r7, #16] 801439a: 4638 mov r0, r7 801439c: f001 fc78 bl 8015c90 <__mcmp> 80143a0: 2800 cmp r0, #0 80143a2: db25 blt.n 80143f0 80143a4: 4629 mov r1, r5 80143a6: 2000 movs r0, #0 80143a8: f858 2b04 ldr.w r2, [r8], #4 80143ac: f8d1 c000 ldr.w ip, [r1] 80143b0: fa1f fe82 uxth.w lr, r2 80143b4: fa1f f38c uxth.w r3, ip 80143b8: eba3 030e sub.w r3, r3, lr 80143bc: 4403 add r3, r0 80143be: 0c12 lsrs r2, r2, #16 80143c0: ebc2 4223 rsb r2, r2, r3, asr #16 80143c4: eb02 421c add.w r2, r2, ip, lsr #16 80143c8: b29b uxth r3, r3 80143ca: ea43 4302 orr.w r3, r3, r2, lsl #16 80143ce: 45c1 cmp r9, r8 80143d0: ea4f 4022 mov.w r0, r2, asr #16 80143d4: f841 3b04 str.w r3, [r1], #4 80143d8: d2e6 bcs.n 80143a8 80143da: f855 2024 ldr.w r2, [r5, r4, lsl #2] 80143de: eb05 0384 add.w r3, r5, r4, lsl #2 80143e2: b922 cbnz r2, 80143ee 80143e4: 3b04 subs r3, #4 80143e6: 429d cmp r5, r3 80143e8: 461a mov r2, r3 80143ea: d30b bcc.n 8014404 80143ec: 613c str r4, [r7, #16] 80143ee: 3601 adds r6, #1 80143f0: 4630 mov r0, r6 80143f2: b003 add sp, #12 80143f4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80143f8: 6812 ldr r2, [r2, #0] 80143fa: 3b04 subs r3, #4 80143fc: 2a00 cmp r2, #0 80143fe: d1cb bne.n 8014398 8014400: 3c01 subs r4, #1 8014402: e7c6 b.n 8014392 8014404: 6812 ldr r2, [r2, #0] 8014406: 3b04 subs r3, #4 8014408: 2a00 cmp r2, #0 801440a: d1ef bne.n 80143ec 801440c: 3c01 subs r4, #1 801440e: e7ea b.n 80143e6 8014410: 2000 movs r0, #0 8014412: e7ee b.n 80143f2 8014414: 0000 movs r0, r0 ... 08014418 <_dtoa_r>: 8014418: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 801441c: 4614 mov r4, r2 801441e: 461d mov r5, r3 8014420: 69c7 ldr r7, [r0, #28] 8014422: b097 sub sp, #92 @ 0x5c 8014424: 4681 mov r9, r0 8014426: e9cd 4506 strd r4, r5, [sp, #24] 801442a: 9e23 ldr r6, [sp, #140] @ 0x8c 801442c: b97f cbnz r7, 801444e <_dtoa_r+0x36> 801442e: 2010 movs r0, #16 8014430: f001 f85e bl 80154f0 8014434: 4602 mov r2, r0 8014436: f8c9 001c str.w r0, [r9, #28] 801443a: b920 cbnz r0, 8014446 <_dtoa_r+0x2e> 801443c: 21ef movs r1, #239 @ 0xef 801443e: 4bac ldr r3, [pc, #688] @ (80146f0 <_dtoa_r+0x2d8>) 8014440: 48ac ldr r0, [pc, #688] @ (80146f4 <_dtoa_r+0x2dc>) 8014442: f7ff ff41 bl 80142c8 <__assert_func> 8014446: e9c0 7701 strd r7, r7, [r0, #4] 801444a: 6007 str r7, [r0, #0] 801444c: 60c7 str r7, [r0, #12] 801444e: f8d9 301c ldr.w r3, [r9, #28] 8014452: 6819 ldr r1, [r3, #0] 8014454: b159 cbz r1, 801446e <_dtoa_r+0x56> 8014456: 685a ldr r2, [r3, #4] 8014458: 2301 movs r3, #1 801445a: 4093 lsls r3, r2 801445c: 604a str r2, [r1, #4] 801445e: 608b str r3, [r1, #8] 8014460: 4648 mov r0, r9 8014462: f001 f9e3 bl 801582c <_Bfree> 8014466: 2200 movs r2, #0 8014468: f8d9 301c ldr.w r3, [r9, #28] 801446c: 601a str r2, [r3, #0] 801446e: 1e2b subs r3, r5, #0 8014470: bfaf iteee ge 8014472: 2300 movge r3, #0 8014474: 2201 movlt r2, #1 8014476: f023 4300 biclt.w r3, r3, #2147483648 @ 0x80000000 801447a: 9307 strlt r3, [sp, #28] 801447c: bfa8 it ge 801447e: 6033 strge r3, [r6, #0] 8014480: f8dd 801c ldr.w r8, [sp, #28] 8014484: 4b9c ldr r3, [pc, #624] @ (80146f8 <_dtoa_r+0x2e0>) 8014486: bfb8 it lt 8014488: 6032 strlt r2, [r6, #0] 801448a: ea33 0308 bics.w r3, r3, r8 801448e: d112 bne.n 80144b6 <_dtoa_r+0x9e> 8014490: f242 730f movw r3, #9999 @ 0x270f 8014494: 9a22 ldr r2, [sp, #136] @ 0x88 8014496: 6013 str r3, [r2, #0] 8014498: f3c8 0313 ubfx r3, r8, #0, #20 801449c: 4323 orrs r3, r4 801449e: f000 855e beq.w 8014f5e <_dtoa_r+0xb46> 80144a2: 9b24 ldr r3, [sp, #144] @ 0x90 80144a4: f8df a254 ldr.w sl, [pc, #596] @ 80146fc <_dtoa_r+0x2e4> 80144a8: 2b00 cmp r3, #0 80144aa: f000 8560 beq.w 8014f6e <_dtoa_r+0xb56> 80144ae: f10a 0303 add.w r3, sl, #3 80144b2: f000 bd5a b.w 8014f6a <_dtoa_r+0xb52> 80144b6: e9dd 2306 ldrd r2, r3, [sp, #24] 80144ba: e9cd 230c strd r2, r3, [sp, #48] @ 0x30 80144be: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 80144c2: 2200 movs r2, #0 80144c4: 2300 movs r3, #0 80144c6: f7f4 fadb bl 8008a80 <__aeabi_dcmpeq> 80144ca: 4607 mov r7, r0 80144cc: b158 cbz r0, 80144e6 <_dtoa_r+0xce> 80144ce: 2301 movs r3, #1 80144d0: 9a22 ldr r2, [sp, #136] @ 0x88 80144d2: 6013 str r3, [r2, #0] 80144d4: 9b24 ldr r3, [sp, #144] @ 0x90 80144d6: b113 cbz r3, 80144de <_dtoa_r+0xc6> 80144d8: 4b89 ldr r3, [pc, #548] @ (8014700 <_dtoa_r+0x2e8>) 80144da: 9a24 ldr r2, [sp, #144] @ 0x90 80144dc: 6013 str r3, [r2, #0] 80144de: f8df a224 ldr.w sl, [pc, #548] @ 8014704 <_dtoa_r+0x2ec> 80144e2: f000 bd44 b.w 8014f6e <_dtoa_r+0xb56> 80144e6: ab14 add r3, sp, #80 @ 0x50 80144e8: 9301 str r3, [sp, #4] 80144ea: ab15 add r3, sp, #84 @ 0x54 80144ec: 9300 str r3, [sp, #0] 80144ee: 4648 mov r0, r9 80144f0: e9dd 230c ldrd r2, r3, [sp, #48] @ 0x30 80144f4: f001 fc7c bl 8015df0 <__d2b> 80144f8: f3c8 560a ubfx r6, r8, #20, #11 80144fc: 9003 str r0, [sp, #12] 80144fe: 2e00 cmp r6, #0 8014500: d078 beq.n 80145f4 <_dtoa_r+0x1dc> 8014502: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 8014506: 9b0d ldr r3, [sp, #52] @ 0x34 8014508: f2a6 36ff subw r6, r6, #1023 @ 0x3ff 801450c: f3c3 0313 ubfx r3, r3, #0, #20 8014510: f043 537f orr.w r3, r3, #1069547520 @ 0x3fc00000 8014514: f443 1340 orr.w r3, r3, #3145728 @ 0x300000 8014518: 9712 str r7, [sp, #72] @ 0x48 801451a: 4619 mov r1, r3 801451c: 2200 movs r2, #0 801451e: 4b7a ldr r3, [pc, #488] @ (8014708 <_dtoa_r+0x2f0>) 8014520: f7f3 fe8e bl 8008240 <__aeabi_dsub> 8014524: a36c add r3, pc, #432 @ (adr r3, 80146d8 <_dtoa_r+0x2c0>) 8014526: e9d3 2300 ldrd r2, r3, [r3] 801452a: f7f4 f841 bl 80085b0 <__aeabi_dmul> 801452e: a36c add r3, pc, #432 @ (adr r3, 80146e0 <_dtoa_r+0x2c8>) 8014530: e9d3 2300 ldrd r2, r3, [r3] 8014534: f7f3 fe86 bl 8008244 <__adddf3> 8014538: 4604 mov r4, r0 801453a: 4630 mov r0, r6 801453c: 460d mov r5, r1 801453e: f7f3 ffcd bl 80084dc <__aeabi_i2d> 8014542: a369 add r3, pc, #420 @ (adr r3, 80146e8 <_dtoa_r+0x2d0>) 8014544: e9d3 2300 ldrd r2, r3, [r3] 8014548: f7f4 f832 bl 80085b0 <__aeabi_dmul> 801454c: 4602 mov r2, r0 801454e: 460b mov r3, r1 8014550: 4620 mov r0, r4 8014552: 4629 mov r1, r5 8014554: f7f3 fe76 bl 8008244 <__adddf3> 8014558: 4604 mov r4, r0 801455a: 460d mov r5, r1 801455c: f7f4 fad8 bl 8008b10 <__aeabi_d2iz> 8014560: 2200 movs r2, #0 8014562: 4607 mov r7, r0 8014564: 2300 movs r3, #0 8014566: 4620 mov r0, r4 8014568: 4629 mov r1, r5 801456a: f7f4 fa93 bl 8008a94 <__aeabi_dcmplt> 801456e: b140 cbz r0, 8014582 <_dtoa_r+0x16a> 8014570: 4638 mov r0, r7 8014572: f7f3 ffb3 bl 80084dc <__aeabi_i2d> 8014576: 4622 mov r2, r4 8014578: 462b mov r3, r5 801457a: f7f4 fa81 bl 8008a80 <__aeabi_dcmpeq> 801457e: b900 cbnz r0, 8014582 <_dtoa_r+0x16a> 8014580: 3f01 subs r7, #1 8014582: 2f16 cmp r7, #22 8014584: d854 bhi.n 8014630 <_dtoa_r+0x218> 8014586: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 801458a: 4b60 ldr r3, [pc, #384] @ (801470c <_dtoa_r+0x2f4>) 801458c: eb03 03c7 add.w r3, r3, r7, lsl #3 8014590: e9d3 2300 ldrd r2, r3, [r3] 8014594: f7f4 fa7e bl 8008a94 <__aeabi_dcmplt> 8014598: 2800 cmp r0, #0 801459a: d04b beq.n 8014634 <_dtoa_r+0x21c> 801459c: 2300 movs r3, #0 801459e: 3f01 subs r7, #1 80145a0: 930f str r3, [sp, #60] @ 0x3c 80145a2: 9b14 ldr r3, [sp, #80] @ 0x50 80145a4: 1b9b subs r3, r3, r6 80145a6: 1e5a subs r2, r3, #1 80145a8: bf49 itett mi 80145aa: f1c3 0301 rsbmi r3, r3, #1 80145ae: 2300 movpl r3, #0 80145b0: 9304 strmi r3, [sp, #16] 80145b2: 2300 movmi r3, #0 80145b4: 9209 str r2, [sp, #36] @ 0x24 80145b6: bf54 ite pl 80145b8: 9304 strpl r3, [sp, #16] 80145ba: 9309 strmi r3, [sp, #36] @ 0x24 80145bc: 2f00 cmp r7, #0 80145be: db3b blt.n 8014638 <_dtoa_r+0x220> 80145c0: 9b09 ldr r3, [sp, #36] @ 0x24 80145c2: 970e str r7, [sp, #56] @ 0x38 80145c4: 443b add r3, r7 80145c6: 9309 str r3, [sp, #36] @ 0x24 80145c8: 2300 movs r3, #0 80145ca: 930a str r3, [sp, #40] @ 0x28 80145cc: 9b20 ldr r3, [sp, #128] @ 0x80 80145ce: 2b09 cmp r3, #9 80145d0: d865 bhi.n 801469e <_dtoa_r+0x286> 80145d2: 2b05 cmp r3, #5 80145d4: bfc4 itt gt 80145d6: 3b04 subgt r3, #4 80145d8: 9320 strgt r3, [sp, #128] @ 0x80 80145da: 9b20 ldr r3, [sp, #128] @ 0x80 80145dc: bfc8 it gt 80145de: 2400 movgt r4, #0 80145e0: f1a3 0302 sub.w r3, r3, #2 80145e4: bfd8 it le 80145e6: 2401 movle r4, #1 80145e8: 2b03 cmp r3, #3 80145ea: d864 bhi.n 80146b6 <_dtoa_r+0x29e> 80145ec: e8df f003 tbb [pc, r3] 80145f0: 2c385553 .word 0x2c385553 80145f4: e9dd 6314 ldrd r6, r3, [sp, #80] @ 0x50 80145f8: 441e add r6, r3 80145fa: f206 4332 addw r3, r6, #1074 @ 0x432 80145fe: 2b20 cmp r3, #32 8014600: bfc1 itttt gt 8014602: f1c3 0340 rsbgt r3, r3, #64 @ 0x40 8014606: fa08 f803 lslgt.w r8, r8, r3 801460a: f206 4312 addwgt r3, r6, #1042 @ 0x412 801460e: fa24 f303 lsrgt.w r3, r4, r3 8014612: bfd6 itet le 8014614: f1c3 0320 rsble r3, r3, #32 8014618: ea48 0003 orrgt.w r0, r8, r3 801461c: fa04 f003 lslle.w r0, r4, r3 8014620: f7f3 ff4c bl 80084bc <__aeabi_ui2d> 8014624: 2201 movs r2, #1 8014626: f1a1 73f8 sub.w r3, r1, #32505856 @ 0x1f00000 801462a: 3e01 subs r6, #1 801462c: 9212 str r2, [sp, #72] @ 0x48 801462e: e774 b.n 801451a <_dtoa_r+0x102> 8014630: 2301 movs r3, #1 8014632: e7b5 b.n 80145a0 <_dtoa_r+0x188> 8014634: 900f str r0, [sp, #60] @ 0x3c 8014636: e7b4 b.n 80145a2 <_dtoa_r+0x18a> 8014638: 9b04 ldr r3, [sp, #16] 801463a: 1bdb subs r3, r3, r7 801463c: 9304 str r3, [sp, #16] 801463e: 427b negs r3, r7 8014640: 930a str r3, [sp, #40] @ 0x28 8014642: 2300 movs r3, #0 8014644: 930e str r3, [sp, #56] @ 0x38 8014646: e7c1 b.n 80145cc <_dtoa_r+0x1b4> 8014648: 2301 movs r3, #1 801464a: 930b str r3, [sp, #44] @ 0x2c 801464c: 9b21 ldr r3, [sp, #132] @ 0x84 801464e: eb07 0b03 add.w fp, r7, r3 8014652: f10b 0301 add.w r3, fp, #1 8014656: 2b01 cmp r3, #1 8014658: 9308 str r3, [sp, #32] 801465a: bfb8 it lt 801465c: 2301 movlt r3, #1 801465e: e006 b.n 801466e <_dtoa_r+0x256> 8014660: 2301 movs r3, #1 8014662: 930b str r3, [sp, #44] @ 0x2c 8014664: 9b21 ldr r3, [sp, #132] @ 0x84 8014666: 2b00 cmp r3, #0 8014668: dd28 ble.n 80146bc <_dtoa_r+0x2a4> 801466a: 469b mov fp, r3 801466c: 9308 str r3, [sp, #32] 801466e: 2100 movs r1, #0 8014670: 2204 movs r2, #4 8014672: f8d9 001c ldr.w r0, [r9, #28] 8014676: f102 0514 add.w r5, r2, #20 801467a: 429d cmp r5, r3 801467c: d926 bls.n 80146cc <_dtoa_r+0x2b4> 801467e: 6041 str r1, [r0, #4] 8014680: 4648 mov r0, r9 8014682: f001 f893 bl 80157ac <_Balloc> 8014686: 4682 mov sl, r0 8014688: 2800 cmp r0, #0 801468a: d143 bne.n 8014714 <_dtoa_r+0x2fc> 801468c: 4602 mov r2, r0 801468e: f240 11af movw r1, #431 @ 0x1af 8014692: 4b1f ldr r3, [pc, #124] @ (8014710 <_dtoa_r+0x2f8>) 8014694: e6d4 b.n 8014440 <_dtoa_r+0x28> 8014696: 2300 movs r3, #0 8014698: e7e3 b.n 8014662 <_dtoa_r+0x24a> 801469a: 2300 movs r3, #0 801469c: e7d5 b.n 801464a <_dtoa_r+0x232> 801469e: 2401 movs r4, #1 80146a0: 2300 movs r3, #0 80146a2: 940b str r4, [sp, #44] @ 0x2c 80146a4: 9320 str r3, [sp, #128] @ 0x80 80146a6: f04f 3bff mov.w fp, #4294967295 @ 0xffffffff 80146aa: 2200 movs r2, #0 80146ac: 2312 movs r3, #18 80146ae: f8cd b020 str.w fp, [sp, #32] 80146b2: 9221 str r2, [sp, #132] @ 0x84 80146b4: e7db b.n 801466e <_dtoa_r+0x256> 80146b6: 2301 movs r3, #1 80146b8: 930b str r3, [sp, #44] @ 0x2c 80146ba: e7f4 b.n 80146a6 <_dtoa_r+0x28e> 80146bc: f04f 0b01 mov.w fp, #1 80146c0: 465b mov r3, fp 80146c2: f8cd b020 str.w fp, [sp, #32] 80146c6: f8cd b084 str.w fp, [sp, #132] @ 0x84 80146ca: e7d0 b.n 801466e <_dtoa_r+0x256> 80146cc: 3101 adds r1, #1 80146ce: 0052 lsls r2, r2, #1 80146d0: e7d1 b.n 8014676 <_dtoa_r+0x25e> 80146d2: bf00 nop 80146d4: f3af 8000 nop.w 80146d8: 636f4361 .word 0x636f4361 80146dc: 3fd287a7 .word 0x3fd287a7 80146e0: 8b60c8b3 .word 0x8b60c8b3 80146e4: 3fc68a28 .word 0x3fc68a28 80146e8: 509f79fb .word 0x509f79fb 80146ec: 3fd34413 .word 0x3fd34413 80146f0: 08016c58 .word 0x08016c58 80146f4: 08016d10 .word 0x08016d10 80146f8: 7ff00000 .word 0x7ff00000 80146fc: 08016d0c .word 0x08016d0c 8014700: 08016c35 .word 0x08016c35 8014704: 08016c34 .word 0x08016c34 8014708: 3ff80000 .word 0x3ff80000 801470c: 08016e28 .word 0x08016e28 8014710: 08016d68 .word 0x08016d68 8014714: f8d9 301c ldr.w r3, [r9, #28] 8014718: 6018 str r0, [r3, #0] 801471a: 9b08 ldr r3, [sp, #32] 801471c: 2b0e cmp r3, #14 801471e: f200 80a1 bhi.w 8014864 <_dtoa_r+0x44c> 8014722: 2c00 cmp r4, #0 8014724: f000 809e beq.w 8014864 <_dtoa_r+0x44c> 8014728: 2f00 cmp r7, #0 801472a: dd33 ble.n 8014794 <_dtoa_r+0x37c> 801472c: 4b9c ldr r3, [pc, #624] @ (80149a0 <_dtoa_r+0x588>) 801472e: f007 020f and.w r2, r7, #15 8014732: eb03 03c2 add.w r3, r3, r2, lsl #3 8014736: 05f8 lsls r0, r7, #23 8014738: e9d3 3400 ldrd r3, r4, [r3] 801473c: e9cd 3410 strd r3, r4, [sp, #64] @ 0x40 8014740: ea4f 1427 mov.w r4, r7, asr #4 8014744: d516 bpl.n 8014774 <_dtoa_r+0x35c> 8014746: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 801474a: 4b96 ldr r3, [pc, #600] @ (80149a4 <_dtoa_r+0x58c>) 801474c: 2603 movs r6, #3 801474e: e9d3 2308 ldrd r2, r3, [r3, #32] 8014752: f7f4 f857 bl 8008804 <__aeabi_ddiv> 8014756: e9cd 0106 strd r0, r1, [sp, #24] 801475a: f004 040f and.w r4, r4, #15 801475e: 4d91 ldr r5, [pc, #580] @ (80149a4 <_dtoa_r+0x58c>) 8014760: b954 cbnz r4, 8014778 <_dtoa_r+0x360> 8014762: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014766: e9dd 0106 ldrd r0, r1, [sp, #24] 801476a: f7f4 f84b bl 8008804 <__aeabi_ddiv> 801476e: e9cd 0106 strd r0, r1, [sp, #24] 8014772: e028 b.n 80147c6 <_dtoa_r+0x3ae> 8014774: 2602 movs r6, #2 8014776: e7f2 b.n 801475e <_dtoa_r+0x346> 8014778: 07e1 lsls r1, r4, #31 801477a: d508 bpl.n 801478e <_dtoa_r+0x376> 801477c: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8014780: e9d5 2300 ldrd r2, r3, [r5] 8014784: f7f3 ff14 bl 80085b0 <__aeabi_dmul> 8014788: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 801478c: 3601 adds r6, #1 801478e: 1064 asrs r4, r4, #1 8014790: 3508 adds r5, #8 8014792: e7e5 b.n 8014760 <_dtoa_r+0x348> 8014794: f000 80af beq.w 80148f6 <_dtoa_r+0x4de> 8014798: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 801479c: 427c negs r4, r7 801479e: 4b80 ldr r3, [pc, #512] @ (80149a0 <_dtoa_r+0x588>) 80147a0: f004 020f and.w r2, r4, #15 80147a4: eb03 03c2 add.w r3, r3, r2, lsl #3 80147a8: e9d3 2300 ldrd r2, r3, [r3] 80147ac: f7f3 ff00 bl 80085b0 <__aeabi_dmul> 80147b0: 2602 movs r6, #2 80147b2: 2300 movs r3, #0 80147b4: e9cd 0106 strd r0, r1, [sp, #24] 80147b8: 4d7a ldr r5, [pc, #488] @ (80149a4 <_dtoa_r+0x58c>) 80147ba: 1124 asrs r4, r4, #4 80147bc: 2c00 cmp r4, #0 80147be: f040 808f bne.w 80148e0 <_dtoa_r+0x4c8> 80147c2: 2b00 cmp r3, #0 80147c4: d1d3 bne.n 801476e <_dtoa_r+0x356> 80147c6: e9dd 4506 ldrd r4, r5, [sp, #24] 80147ca: 9b0f ldr r3, [sp, #60] @ 0x3c 80147cc: 2b00 cmp r3, #0 80147ce: f000 8094 beq.w 80148fa <_dtoa_r+0x4e2> 80147d2: 2200 movs r2, #0 80147d4: 4620 mov r0, r4 80147d6: 4629 mov r1, r5 80147d8: 4b73 ldr r3, [pc, #460] @ (80149a8 <_dtoa_r+0x590>) 80147da: f7f4 f95b bl 8008a94 <__aeabi_dcmplt> 80147de: 2800 cmp r0, #0 80147e0: f000 808b beq.w 80148fa <_dtoa_r+0x4e2> 80147e4: 9b08 ldr r3, [sp, #32] 80147e6: 2b00 cmp r3, #0 80147e8: f000 8087 beq.w 80148fa <_dtoa_r+0x4e2> 80147ec: f1bb 0f00 cmp.w fp, #0 80147f0: dd34 ble.n 801485c <_dtoa_r+0x444> 80147f2: 4620 mov r0, r4 80147f4: 2200 movs r2, #0 80147f6: 4629 mov r1, r5 80147f8: 4b6c ldr r3, [pc, #432] @ (80149ac <_dtoa_r+0x594>) 80147fa: f7f3 fed9 bl 80085b0 <__aeabi_dmul> 80147fe: 465c mov r4, fp 8014800: e9cd 0106 strd r0, r1, [sp, #24] 8014804: f107 38ff add.w r8, r7, #4294967295 @ 0xffffffff 8014808: 3601 adds r6, #1 801480a: 4630 mov r0, r6 801480c: f7f3 fe66 bl 80084dc <__aeabi_i2d> 8014810: e9dd 2306 ldrd r2, r3, [sp, #24] 8014814: f7f3 fecc bl 80085b0 <__aeabi_dmul> 8014818: 2200 movs r2, #0 801481a: 4b65 ldr r3, [pc, #404] @ (80149b0 <_dtoa_r+0x598>) 801481c: f7f3 fd12 bl 8008244 <__adddf3> 8014820: 4605 mov r5, r0 8014822: f1a1 7650 sub.w r6, r1, #54525952 @ 0x3400000 8014826: 2c00 cmp r4, #0 8014828: d16a bne.n 8014900 <_dtoa_r+0x4e8> 801482a: e9dd 0106 ldrd r0, r1, [sp, #24] 801482e: 2200 movs r2, #0 8014830: 4b60 ldr r3, [pc, #384] @ (80149b4 <_dtoa_r+0x59c>) 8014832: f7f3 fd05 bl 8008240 <__aeabi_dsub> 8014836: 4602 mov r2, r0 8014838: 460b mov r3, r1 801483a: e9cd 2306 strd r2, r3, [sp, #24] 801483e: 462a mov r2, r5 8014840: 4633 mov r3, r6 8014842: f7f4 f945 bl 8008ad0 <__aeabi_dcmpgt> 8014846: 2800 cmp r0, #0 8014848: f040 8298 bne.w 8014d7c <_dtoa_r+0x964> 801484c: e9dd 0106 ldrd r0, r1, [sp, #24] 8014850: 462a mov r2, r5 8014852: f106 4300 add.w r3, r6, #2147483648 @ 0x80000000 8014856: f7f4 f91d bl 8008a94 <__aeabi_dcmplt> 801485a: bb38 cbnz r0, 80148ac <_dtoa_r+0x494> 801485c: e9dd 340c ldrd r3, r4, [sp, #48] @ 0x30 8014860: e9cd 3406 strd r3, r4, [sp, #24] 8014864: 9b15 ldr r3, [sp, #84] @ 0x54 8014866: 2b00 cmp r3, #0 8014868: f2c0 8157 blt.w 8014b1a <_dtoa_r+0x702> 801486c: 2f0e cmp r7, #14 801486e: f300 8154 bgt.w 8014b1a <_dtoa_r+0x702> 8014872: 4b4b ldr r3, [pc, #300] @ (80149a0 <_dtoa_r+0x588>) 8014874: eb03 03c7 add.w r3, r3, r7, lsl #3 8014878: e9d3 3400 ldrd r3, r4, [r3] 801487c: e9cd 3404 strd r3, r4, [sp, #16] 8014880: 9b21 ldr r3, [sp, #132] @ 0x84 8014882: 2b00 cmp r3, #0 8014884: f280 80e5 bge.w 8014a52 <_dtoa_r+0x63a> 8014888: 9b08 ldr r3, [sp, #32] 801488a: 2b00 cmp r3, #0 801488c: f300 80e1 bgt.w 8014a52 <_dtoa_r+0x63a> 8014890: d10c bne.n 80148ac <_dtoa_r+0x494> 8014892: e9dd 0104 ldrd r0, r1, [sp, #16] 8014896: 2200 movs r2, #0 8014898: 4b46 ldr r3, [pc, #280] @ (80149b4 <_dtoa_r+0x59c>) 801489a: f7f3 fe89 bl 80085b0 <__aeabi_dmul> 801489e: e9dd 2306 ldrd r2, r3, [sp, #24] 80148a2: f7f4 f90b bl 8008abc <__aeabi_dcmpge> 80148a6: 2800 cmp r0, #0 80148a8: f000 8266 beq.w 8014d78 <_dtoa_r+0x960> 80148ac: 2400 movs r4, #0 80148ae: 4625 mov r5, r4 80148b0: 9b21 ldr r3, [sp, #132] @ 0x84 80148b2: 4656 mov r6, sl 80148b4: ea6f 0803 mvn.w r8, r3 80148b8: 2700 movs r7, #0 80148ba: 4621 mov r1, r4 80148bc: 4648 mov r0, r9 80148be: f000 ffb5 bl 801582c <_Bfree> 80148c2: 2d00 cmp r5, #0 80148c4: f000 80bd beq.w 8014a42 <_dtoa_r+0x62a> 80148c8: b12f cbz r7, 80148d6 <_dtoa_r+0x4be> 80148ca: 42af cmp r7, r5 80148cc: d003 beq.n 80148d6 <_dtoa_r+0x4be> 80148ce: 4639 mov r1, r7 80148d0: 4648 mov r0, r9 80148d2: f000 ffab bl 801582c <_Bfree> 80148d6: 4629 mov r1, r5 80148d8: 4648 mov r0, r9 80148da: f000 ffa7 bl 801582c <_Bfree> 80148de: e0b0 b.n 8014a42 <_dtoa_r+0x62a> 80148e0: 07e2 lsls r2, r4, #31 80148e2: d505 bpl.n 80148f0 <_dtoa_r+0x4d8> 80148e4: e9d5 2300 ldrd r2, r3, [r5] 80148e8: f7f3 fe62 bl 80085b0 <__aeabi_dmul> 80148ec: 2301 movs r3, #1 80148ee: 3601 adds r6, #1 80148f0: 1064 asrs r4, r4, #1 80148f2: 3508 adds r5, #8 80148f4: e762 b.n 80147bc <_dtoa_r+0x3a4> 80148f6: 2602 movs r6, #2 80148f8: e765 b.n 80147c6 <_dtoa_r+0x3ae> 80148fa: 46b8 mov r8, r7 80148fc: 9c08 ldr r4, [sp, #32] 80148fe: e784 b.n 801480a <_dtoa_r+0x3f2> 8014900: 4b27 ldr r3, [pc, #156] @ (80149a0 <_dtoa_r+0x588>) 8014902: 990b ldr r1, [sp, #44] @ 0x2c 8014904: eb03 03c4 add.w r3, r3, r4, lsl #3 8014908: e953 2302 ldrd r2, r3, [r3, #-8] 801490c: 4454 add r4, sl 801490e: 2900 cmp r1, #0 8014910: d054 beq.n 80149bc <_dtoa_r+0x5a4> 8014912: 2000 movs r0, #0 8014914: 4928 ldr r1, [pc, #160] @ (80149b8 <_dtoa_r+0x5a0>) 8014916: f7f3 ff75 bl 8008804 <__aeabi_ddiv> 801491a: 4633 mov r3, r6 801491c: 462a mov r2, r5 801491e: f7f3 fc8f bl 8008240 <__aeabi_dsub> 8014922: 4656 mov r6, sl 8014924: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8014928: e9dd 0106 ldrd r0, r1, [sp, #24] 801492c: f7f4 f8f0 bl 8008b10 <__aeabi_d2iz> 8014930: 4605 mov r5, r0 8014932: f7f3 fdd3 bl 80084dc <__aeabi_i2d> 8014936: 4602 mov r2, r0 8014938: 460b mov r3, r1 801493a: e9dd 0106 ldrd r0, r1, [sp, #24] 801493e: f7f3 fc7f bl 8008240 <__aeabi_dsub> 8014942: 4602 mov r2, r0 8014944: 460b mov r3, r1 8014946: 3530 adds r5, #48 @ 0x30 8014948: e9cd 2306 strd r2, r3, [sp, #24] 801494c: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014950: f806 5b01 strb.w r5, [r6], #1 8014954: f7f4 f89e bl 8008a94 <__aeabi_dcmplt> 8014958: 2800 cmp r0, #0 801495a: d172 bne.n 8014a42 <_dtoa_r+0x62a> 801495c: e9dd 2306 ldrd r2, r3, [sp, #24] 8014960: 2000 movs r0, #0 8014962: 4911 ldr r1, [pc, #68] @ (80149a8 <_dtoa_r+0x590>) 8014964: f7f3 fc6c bl 8008240 <__aeabi_dsub> 8014968: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 801496c: f7f4 f892 bl 8008a94 <__aeabi_dcmplt> 8014970: 2800 cmp r0, #0 8014972: f040 80b4 bne.w 8014ade <_dtoa_r+0x6c6> 8014976: 42a6 cmp r6, r4 8014978: f43f af70 beq.w 801485c <_dtoa_r+0x444> 801497c: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8014980: 2200 movs r2, #0 8014982: 4b0a ldr r3, [pc, #40] @ (80149ac <_dtoa_r+0x594>) 8014984: f7f3 fe14 bl 80085b0 <__aeabi_dmul> 8014988: 2200 movs r2, #0 801498a: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 801498e: e9dd 0106 ldrd r0, r1, [sp, #24] 8014992: 4b06 ldr r3, [pc, #24] @ (80149ac <_dtoa_r+0x594>) 8014994: f7f3 fe0c bl 80085b0 <__aeabi_dmul> 8014998: e9cd 0106 strd r0, r1, [sp, #24] 801499c: e7c4 b.n 8014928 <_dtoa_r+0x510> 801499e: bf00 nop 80149a0: 08016e28 .word 0x08016e28 80149a4: 08016e00 .word 0x08016e00 80149a8: 3ff00000 .word 0x3ff00000 80149ac: 40240000 .word 0x40240000 80149b0: 401c0000 .word 0x401c0000 80149b4: 40140000 .word 0x40140000 80149b8: 3fe00000 .word 0x3fe00000 80149bc: 4631 mov r1, r6 80149be: 4628 mov r0, r5 80149c0: f7f3 fdf6 bl 80085b0 <__aeabi_dmul> 80149c4: 4656 mov r6, sl 80149c6: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 80149ca: 9413 str r4, [sp, #76] @ 0x4c 80149cc: e9dd 0106 ldrd r0, r1, [sp, #24] 80149d0: f7f4 f89e bl 8008b10 <__aeabi_d2iz> 80149d4: 4605 mov r5, r0 80149d6: f7f3 fd81 bl 80084dc <__aeabi_i2d> 80149da: 4602 mov r2, r0 80149dc: 460b mov r3, r1 80149de: e9dd 0106 ldrd r0, r1, [sp, #24] 80149e2: f7f3 fc2d bl 8008240 <__aeabi_dsub> 80149e6: 4602 mov r2, r0 80149e8: 460b mov r3, r1 80149ea: 3530 adds r5, #48 @ 0x30 80149ec: f806 5b01 strb.w r5, [r6], #1 80149f0: 42a6 cmp r6, r4 80149f2: e9cd 2306 strd r2, r3, [sp, #24] 80149f6: f04f 0200 mov.w r2, #0 80149fa: d124 bne.n 8014a46 <_dtoa_r+0x62e> 80149fc: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8014a00: 4bae ldr r3, [pc, #696] @ (8014cbc <_dtoa_r+0x8a4>) 8014a02: f7f3 fc1f bl 8008244 <__adddf3> 8014a06: 4602 mov r2, r0 8014a08: 460b mov r3, r1 8014a0a: e9dd 0106 ldrd r0, r1, [sp, #24] 8014a0e: f7f4 f85f bl 8008ad0 <__aeabi_dcmpgt> 8014a12: 2800 cmp r0, #0 8014a14: d163 bne.n 8014ade <_dtoa_r+0x6c6> 8014a16: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014a1a: 2000 movs r0, #0 8014a1c: 49a7 ldr r1, [pc, #668] @ (8014cbc <_dtoa_r+0x8a4>) 8014a1e: f7f3 fc0f bl 8008240 <__aeabi_dsub> 8014a22: 4602 mov r2, r0 8014a24: 460b mov r3, r1 8014a26: e9dd 0106 ldrd r0, r1, [sp, #24] 8014a2a: f7f4 f833 bl 8008a94 <__aeabi_dcmplt> 8014a2e: 2800 cmp r0, #0 8014a30: f43f af14 beq.w 801485c <_dtoa_r+0x444> 8014a34: 9e13 ldr r6, [sp, #76] @ 0x4c 8014a36: 1e73 subs r3, r6, #1 8014a38: 9313 str r3, [sp, #76] @ 0x4c 8014a3a: f816 3c01 ldrb.w r3, [r6, #-1] 8014a3e: 2b30 cmp r3, #48 @ 0x30 8014a40: d0f8 beq.n 8014a34 <_dtoa_r+0x61c> 8014a42: 4647 mov r7, r8 8014a44: e03b b.n 8014abe <_dtoa_r+0x6a6> 8014a46: 4b9e ldr r3, [pc, #632] @ (8014cc0 <_dtoa_r+0x8a8>) 8014a48: f7f3 fdb2 bl 80085b0 <__aeabi_dmul> 8014a4c: e9cd 0106 strd r0, r1, [sp, #24] 8014a50: e7bc b.n 80149cc <_dtoa_r+0x5b4> 8014a52: 4656 mov r6, sl 8014a54: e9dd 4506 ldrd r4, r5, [sp, #24] 8014a58: e9dd 2304 ldrd r2, r3, [sp, #16] 8014a5c: 4620 mov r0, r4 8014a5e: 4629 mov r1, r5 8014a60: f7f3 fed0 bl 8008804 <__aeabi_ddiv> 8014a64: f7f4 f854 bl 8008b10 <__aeabi_d2iz> 8014a68: 4680 mov r8, r0 8014a6a: f7f3 fd37 bl 80084dc <__aeabi_i2d> 8014a6e: e9dd 2304 ldrd r2, r3, [sp, #16] 8014a72: f7f3 fd9d bl 80085b0 <__aeabi_dmul> 8014a76: 4602 mov r2, r0 8014a78: 460b mov r3, r1 8014a7a: 4620 mov r0, r4 8014a7c: 4629 mov r1, r5 8014a7e: f7f3 fbdf bl 8008240 <__aeabi_dsub> 8014a82: f108 0430 add.w r4, r8, #48 @ 0x30 8014a86: 9d08 ldr r5, [sp, #32] 8014a88: f806 4b01 strb.w r4, [r6], #1 8014a8c: eba6 040a sub.w r4, r6, sl 8014a90: 42a5 cmp r5, r4 8014a92: 4602 mov r2, r0 8014a94: 460b mov r3, r1 8014a96: d133 bne.n 8014b00 <_dtoa_r+0x6e8> 8014a98: f7f3 fbd4 bl 8008244 <__adddf3> 8014a9c: e9dd 2304 ldrd r2, r3, [sp, #16] 8014aa0: 4604 mov r4, r0 8014aa2: 460d mov r5, r1 8014aa4: f7f4 f814 bl 8008ad0 <__aeabi_dcmpgt> 8014aa8: b9c0 cbnz r0, 8014adc <_dtoa_r+0x6c4> 8014aaa: e9dd 2304 ldrd r2, r3, [sp, #16] 8014aae: 4620 mov r0, r4 8014ab0: 4629 mov r1, r5 8014ab2: f7f3 ffe5 bl 8008a80 <__aeabi_dcmpeq> 8014ab6: b110 cbz r0, 8014abe <_dtoa_r+0x6a6> 8014ab8: f018 0f01 tst.w r8, #1 8014abc: d10e bne.n 8014adc <_dtoa_r+0x6c4> 8014abe: 4648 mov r0, r9 8014ac0: 9903 ldr r1, [sp, #12] 8014ac2: f000 feb3 bl 801582c <_Bfree> 8014ac6: 2300 movs r3, #0 8014ac8: 7033 strb r3, [r6, #0] 8014aca: 9b22 ldr r3, [sp, #136] @ 0x88 8014acc: 3701 adds r7, #1 8014ace: 601f str r7, [r3, #0] 8014ad0: 9b24 ldr r3, [sp, #144] @ 0x90 8014ad2: 2b00 cmp r3, #0 8014ad4: f000 824b beq.w 8014f6e <_dtoa_r+0xb56> 8014ad8: 601e str r6, [r3, #0] 8014ada: e248 b.n 8014f6e <_dtoa_r+0xb56> 8014adc: 46b8 mov r8, r7 8014ade: 4633 mov r3, r6 8014ae0: 461e mov r6, r3 8014ae2: f813 2d01 ldrb.w r2, [r3, #-1]! 8014ae6: 2a39 cmp r2, #57 @ 0x39 8014ae8: d106 bne.n 8014af8 <_dtoa_r+0x6e0> 8014aea: 459a cmp sl, r3 8014aec: d1f8 bne.n 8014ae0 <_dtoa_r+0x6c8> 8014aee: 2230 movs r2, #48 @ 0x30 8014af0: f108 0801 add.w r8, r8, #1 8014af4: f88a 2000 strb.w r2, [sl] 8014af8: 781a ldrb r2, [r3, #0] 8014afa: 3201 adds r2, #1 8014afc: 701a strb r2, [r3, #0] 8014afe: e7a0 b.n 8014a42 <_dtoa_r+0x62a> 8014b00: 2200 movs r2, #0 8014b02: 4b6f ldr r3, [pc, #444] @ (8014cc0 <_dtoa_r+0x8a8>) 8014b04: f7f3 fd54 bl 80085b0 <__aeabi_dmul> 8014b08: 2200 movs r2, #0 8014b0a: 2300 movs r3, #0 8014b0c: 4604 mov r4, r0 8014b0e: 460d mov r5, r1 8014b10: f7f3 ffb6 bl 8008a80 <__aeabi_dcmpeq> 8014b14: 2800 cmp r0, #0 8014b16: d09f beq.n 8014a58 <_dtoa_r+0x640> 8014b18: e7d1 b.n 8014abe <_dtoa_r+0x6a6> 8014b1a: 9a0b ldr r2, [sp, #44] @ 0x2c 8014b1c: 2a00 cmp r2, #0 8014b1e: f000 80ea beq.w 8014cf6 <_dtoa_r+0x8de> 8014b22: 9a20 ldr r2, [sp, #128] @ 0x80 8014b24: 2a01 cmp r2, #1 8014b26: f300 80cd bgt.w 8014cc4 <_dtoa_r+0x8ac> 8014b2a: 9a12 ldr r2, [sp, #72] @ 0x48 8014b2c: 2a00 cmp r2, #0 8014b2e: f000 80c1 beq.w 8014cb4 <_dtoa_r+0x89c> 8014b32: f203 4333 addw r3, r3, #1075 @ 0x433 8014b36: 9c0a ldr r4, [sp, #40] @ 0x28 8014b38: 9e04 ldr r6, [sp, #16] 8014b3a: 9a04 ldr r2, [sp, #16] 8014b3c: 2101 movs r1, #1 8014b3e: 441a add r2, r3 8014b40: 9204 str r2, [sp, #16] 8014b42: 9a09 ldr r2, [sp, #36] @ 0x24 8014b44: 4648 mov r0, r9 8014b46: 441a add r2, r3 8014b48: 9209 str r2, [sp, #36] @ 0x24 8014b4a: f000 ff23 bl 8015994 <__i2b> 8014b4e: 4605 mov r5, r0 8014b50: b166 cbz r6, 8014b6c <_dtoa_r+0x754> 8014b52: 9b09 ldr r3, [sp, #36] @ 0x24 8014b54: 2b00 cmp r3, #0 8014b56: dd09 ble.n 8014b6c <_dtoa_r+0x754> 8014b58: 42b3 cmp r3, r6 8014b5a: bfa8 it ge 8014b5c: 4633 movge r3, r6 8014b5e: 9a04 ldr r2, [sp, #16] 8014b60: 1af6 subs r6, r6, r3 8014b62: 1ad2 subs r2, r2, r3 8014b64: 9204 str r2, [sp, #16] 8014b66: 9a09 ldr r2, [sp, #36] @ 0x24 8014b68: 1ad3 subs r3, r2, r3 8014b6a: 9309 str r3, [sp, #36] @ 0x24 8014b6c: 9b0a ldr r3, [sp, #40] @ 0x28 8014b6e: b30b cbz r3, 8014bb4 <_dtoa_r+0x79c> 8014b70: 9b0b ldr r3, [sp, #44] @ 0x2c 8014b72: 2b00 cmp r3, #0 8014b74: f000 80c6 beq.w 8014d04 <_dtoa_r+0x8ec> 8014b78: 2c00 cmp r4, #0 8014b7a: f000 80c0 beq.w 8014cfe <_dtoa_r+0x8e6> 8014b7e: 4629 mov r1, r5 8014b80: 4622 mov r2, r4 8014b82: 4648 mov r0, r9 8014b84: f000 ffbe bl 8015b04 <__pow5mult> 8014b88: 9a03 ldr r2, [sp, #12] 8014b8a: 4601 mov r1, r0 8014b8c: 4605 mov r5, r0 8014b8e: 4648 mov r0, r9 8014b90: f000 ff16 bl 80159c0 <__multiply> 8014b94: 9903 ldr r1, [sp, #12] 8014b96: 4680 mov r8, r0 8014b98: 4648 mov r0, r9 8014b9a: f000 fe47 bl 801582c <_Bfree> 8014b9e: 9b0a ldr r3, [sp, #40] @ 0x28 8014ba0: 1b1b subs r3, r3, r4 8014ba2: 930a str r3, [sp, #40] @ 0x28 8014ba4: f000 80b1 beq.w 8014d0a <_dtoa_r+0x8f2> 8014ba8: 4641 mov r1, r8 8014baa: 9a0a ldr r2, [sp, #40] @ 0x28 8014bac: 4648 mov r0, r9 8014bae: f000 ffa9 bl 8015b04 <__pow5mult> 8014bb2: 9003 str r0, [sp, #12] 8014bb4: 2101 movs r1, #1 8014bb6: 4648 mov r0, r9 8014bb8: f000 feec bl 8015994 <__i2b> 8014bbc: 9b0e ldr r3, [sp, #56] @ 0x38 8014bbe: 4604 mov r4, r0 8014bc0: 2b00 cmp r3, #0 8014bc2: f000 81d8 beq.w 8014f76 <_dtoa_r+0xb5e> 8014bc6: 461a mov r2, r3 8014bc8: 4601 mov r1, r0 8014bca: 4648 mov r0, r9 8014bcc: f000 ff9a bl 8015b04 <__pow5mult> 8014bd0: 9b20 ldr r3, [sp, #128] @ 0x80 8014bd2: 4604 mov r4, r0 8014bd4: 2b01 cmp r3, #1 8014bd6: f300 809f bgt.w 8014d18 <_dtoa_r+0x900> 8014bda: 9b06 ldr r3, [sp, #24] 8014bdc: 2b00 cmp r3, #0 8014bde: f040 8097 bne.w 8014d10 <_dtoa_r+0x8f8> 8014be2: 9b07 ldr r3, [sp, #28] 8014be4: f3c3 0313 ubfx r3, r3, #0, #20 8014be8: 2b00 cmp r3, #0 8014bea: f040 8093 bne.w 8014d14 <_dtoa_r+0x8fc> 8014bee: 9b07 ldr r3, [sp, #28] 8014bf0: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 8014bf4: 0d1b lsrs r3, r3, #20 8014bf6: 051b lsls r3, r3, #20 8014bf8: b133 cbz r3, 8014c08 <_dtoa_r+0x7f0> 8014bfa: 9b04 ldr r3, [sp, #16] 8014bfc: 3301 adds r3, #1 8014bfe: 9304 str r3, [sp, #16] 8014c00: 9b09 ldr r3, [sp, #36] @ 0x24 8014c02: 3301 adds r3, #1 8014c04: 9309 str r3, [sp, #36] @ 0x24 8014c06: 2301 movs r3, #1 8014c08: 930a str r3, [sp, #40] @ 0x28 8014c0a: 9b0e ldr r3, [sp, #56] @ 0x38 8014c0c: 2b00 cmp r3, #0 8014c0e: f000 81b8 beq.w 8014f82 <_dtoa_r+0xb6a> 8014c12: 6923 ldr r3, [r4, #16] 8014c14: eb04 0383 add.w r3, r4, r3, lsl #2 8014c18: 6918 ldr r0, [r3, #16] 8014c1a: f000 fe6f bl 80158fc <__hi0bits> 8014c1e: f1c0 0020 rsb r0, r0, #32 8014c22: 9b09 ldr r3, [sp, #36] @ 0x24 8014c24: 4418 add r0, r3 8014c26: f010 001f ands.w r0, r0, #31 8014c2a: f000 8082 beq.w 8014d32 <_dtoa_r+0x91a> 8014c2e: f1c0 0320 rsb r3, r0, #32 8014c32: 2b04 cmp r3, #4 8014c34: dd73 ble.n 8014d1e <_dtoa_r+0x906> 8014c36: 9b04 ldr r3, [sp, #16] 8014c38: f1c0 001c rsb r0, r0, #28 8014c3c: 4403 add r3, r0 8014c3e: 9304 str r3, [sp, #16] 8014c40: 9b09 ldr r3, [sp, #36] @ 0x24 8014c42: 4406 add r6, r0 8014c44: 4403 add r3, r0 8014c46: 9309 str r3, [sp, #36] @ 0x24 8014c48: 9b04 ldr r3, [sp, #16] 8014c4a: 2b00 cmp r3, #0 8014c4c: dd05 ble.n 8014c5a <_dtoa_r+0x842> 8014c4e: 461a mov r2, r3 8014c50: 4648 mov r0, r9 8014c52: 9903 ldr r1, [sp, #12] 8014c54: f000 ffb0 bl 8015bb8 <__lshift> 8014c58: 9003 str r0, [sp, #12] 8014c5a: 9b09 ldr r3, [sp, #36] @ 0x24 8014c5c: 2b00 cmp r3, #0 8014c5e: dd05 ble.n 8014c6c <_dtoa_r+0x854> 8014c60: 4621 mov r1, r4 8014c62: 461a mov r2, r3 8014c64: 4648 mov r0, r9 8014c66: f000 ffa7 bl 8015bb8 <__lshift> 8014c6a: 4604 mov r4, r0 8014c6c: 9b0f ldr r3, [sp, #60] @ 0x3c 8014c6e: 2b00 cmp r3, #0 8014c70: d061 beq.n 8014d36 <_dtoa_r+0x91e> 8014c72: 4621 mov r1, r4 8014c74: 9803 ldr r0, [sp, #12] 8014c76: f001 f80b bl 8015c90 <__mcmp> 8014c7a: 2800 cmp r0, #0 8014c7c: da5b bge.n 8014d36 <_dtoa_r+0x91e> 8014c7e: 2300 movs r3, #0 8014c80: 220a movs r2, #10 8014c82: 4648 mov r0, r9 8014c84: 9903 ldr r1, [sp, #12] 8014c86: f000 fdf3 bl 8015870 <__multadd> 8014c8a: 9b0b ldr r3, [sp, #44] @ 0x2c 8014c8c: f107 38ff add.w r8, r7, #4294967295 @ 0xffffffff 8014c90: 9003 str r0, [sp, #12] 8014c92: 2b00 cmp r3, #0 8014c94: f000 8177 beq.w 8014f86 <_dtoa_r+0xb6e> 8014c98: 4629 mov r1, r5 8014c9a: 2300 movs r3, #0 8014c9c: 220a movs r2, #10 8014c9e: 4648 mov r0, r9 8014ca0: f000 fde6 bl 8015870 <__multadd> 8014ca4: f1bb 0f00 cmp.w fp, #0 8014ca8: 4605 mov r5, r0 8014caa: dc6f bgt.n 8014d8c <_dtoa_r+0x974> 8014cac: 9b20 ldr r3, [sp, #128] @ 0x80 8014cae: 2b02 cmp r3, #2 8014cb0: dc49 bgt.n 8014d46 <_dtoa_r+0x92e> 8014cb2: e06b b.n 8014d8c <_dtoa_r+0x974> 8014cb4: 9b14 ldr r3, [sp, #80] @ 0x50 8014cb6: f1c3 0336 rsb r3, r3, #54 @ 0x36 8014cba: e73c b.n 8014b36 <_dtoa_r+0x71e> 8014cbc: 3fe00000 .word 0x3fe00000 8014cc0: 40240000 .word 0x40240000 8014cc4: 9b08 ldr r3, [sp, #32] 8014cc6: 1e5c subs r4, r3, #1 8014cc8: 9b0a ldr r3, [sp, #40] @ 0x28 8014cca: 42a3 cmp r3, r4 8014ccc: db09 blt.n 8014ce2 <_dtoa_r+0x8ca> 8014cce: 1b1c subs r4, r3, r4 8014cd0: 9b08 ldr r3, [sp, #32] 8014cd2: 2b00 cmp r3, #0 8014cd4: f6bf af30 bge.w 8014b38 <_dtoa_r+0x720> 8014cd8: 9b04 ldr r3, [sp, #16] 8014cda: 9a08 ldr r2, [sp, #32] 8014cdc: 1a9e subs r6, r3, r2 8014cde: 2300 movs r3, #0 8014ce0: e72b b.n 8014b3a <_dtoa_r+0x722> 8014ce2: 9b0a ldr r3, [sp, #40] @ 0x28 8014ce4: 9a0e ldr r2, [sp, #56] @ 0x38 8014ce6: 1ae3 subs r3, r4, r3 8014ce8: 441a add r2, r3 8014cea: 940a str r4, [sp, #40] @ 0x28 8014cec: 9e04 ldr r6, [sp, #16] 8014cee: 2400 movs r4, #0 8014cf0: 9b08 ldr r3, [sp, #32] 8014cf2: 920e str r2, [sp, #56] @ 0x38 8014cf4: e721 b.n 8014b3a <_dtoa_r+0x722> 8014cf6: 9c0a ldr r4, [sp, #40] @ 0x28 8014cf8: 9e04 ldr r6, [sp, #16] 8014cfa: 9d0b ldr r5, [sp, #44] @ 0x2c 8014cfc: e728 b.n 8014b50 <_dtoa_r+0x738> 8014cfe: f8dd 800c ldr.w r8, [sp, #12] 8014d02: e751 b.n 8014ba8 <_dtoa_r+0x790> 8014d04: 9a0a ldr r2, [sp, #40] @ 0x28 8014d06: 9903 ldr r1, [sp, #12] 8014d08: e750 b.n 8014bac <_dtoa_r+0x794> 8014d0a: f8cd 800c str.w r8, [sp, #12] 8014d0e: e751 b.n 8014bb4 <_dtoa_r+0x79c> 8014d10: 2300 movs r3, #0 8014d12: e779 b.n 8014c08 <_dtoa_r+0x7f0> 8014d14: 9b06 ldr r3, [sp, #24] 8014d16: e777 b.n 8014c08 <_dtoa_r+0x7f0> 8014d18: 2300 movs r3, #0 8014d1a: 930a str r3, [sp, #40] @ 0x28 8014d1c: e779 b.n 8014c12 <_dtoa_r+0x7fa> 8014d1e: d093 beq.n 8014c48 <_dtoa_r+0x830> 8014d20: 9a04 ldr r2, [sp, #16] 8014d22: 331c adds r3, #28 8014d24: 441a add r2, r3 8014d26: 9204 str r2, [sp, #16] 8014d28: 9a09 ldr r2, [sp, #36] @ 0x24 8014d2a: 441e add r6, r3 8014d2c: 441a add r2, r3 8014d2e: 9209 str r2, [sp, #36] @ 0x24 8014d30: e78a b.n 8014c48 <_dtoa_r+0x830> 8014d32: 4603 mov r3, r0 8014d34: e7f4 b.n 8014d20 <_dtoa_r+0x908> 8014d36: 9b08 ldr r3, [sp, #32] 8014d38: 46b8 mov r8, r7 8014d3a: 2b00 cmp r3, #0 8014d3c: dc20 bgt.n 8014d80 <_dtoa_r+0x968> 8014d3e: 469b mov fp, r3 8014d40: 9b20 ldr r3, [sp, #128] @ 0x80 8014d42: 2b02 cmp r3, #2 8014d44: dd1e ble.n 8014d84 <_dtoa_r+0x96c> 8014d46: f1bb 0f00 cmp.w fp, #0 8014d4a: f47f adb1 bne.w 80148b0 <_dtoa_r+0x498> 8014d4e: 4621 mov r1, r4 8014d50: 465b mov r3, fp 8014d52: 2205 movs r2, #5 8014d54: 4648 mov r0, r9 8014d56: f000 fd8b bl 8015870 <__multadd> 8014d5a: 4601 mov r1, r0 8014d5c: 4604 mov r4, r0 8014d5e: 9803 ldr r0, [sp, #12] 8014d60: f000 ff96 bl 8015c90 <__mcmp> 8014d64: 2800 cmp r0, #0 8014d66: f77f ada3 ble.w 80148b0 <_dtoa_r+0x498> 8014d6a: 4656 mov r6, sl 8014d6c: 2331 movs r3, #49 @ 0x31 8014d6e: f108 0801 add.w r8, r8, #1 8014d72: f806 3b01 strb.w r3, [r6], #1 8014d76: e59f b.n 80148b8 <_dtoa_r+0x4a0> 8014d78: 46b8 mov r8, r7 8014d7a: 9c08 ldr r4, [sp, #32] 8014d7c: 4625 mov r5, r4 8014d7e: e7f4 b.n 8014d6a <_dtoa_r+0x952> 8014d80: f8dd b020 ldr.w fp, [sp, #32] 8014d84: 9b0b ldr r3, [sp, #44] @ 0x2c 8014d86: 2b00 cmp r3, #0 8014d88: f000 8101 beq.w 8014f8e <_dtoa_r+0xb76> 8014d8c: 2e00 cmp r6, #0 8014d8e: dd05 ble.n 8014d9c <_dtoa_r+0x984> 8014d90: 4629 mov r1, r5 8014d92: 4632 mov r2, r6 8014d94: 4648 mov r0, r9 8014d96: f000 ff0f bl 8015bb8 <__lshift> 8014d9a: 4605 mov r5, r0 8014d9c: 9b0a ldr r3, [sp, #40] @ 0x28 8014d9e: 2b00 cmp r3, #0 8014da0: d05c beq.n 8014e5c <_dtoa_r+0xa44> 8014da2: 4648 mov r0, r9 8014da4: 6869 ldr r1, [r5, #4] 8014da6: f000 fd01 bl 80157ac <_Balloc> 8014daa: 4606 mov r6, r0 8014dac: b928 cbnz r0, 8014dba <_dtoa_r+0x9a2> 8014dae: 4602 mov r2, r0 8014db0: f240 21ef movw r1, #751 @ 0x2ef 8014db4: 4b80 ldr r3, [pc, #512] @ (8014fb8 <_dtoa_r+0xba0>) 8014db6: f7ff bb43 b.w 8014440 <_dtoa_r+0x28> 8014dba: 692a ldr r2, [r5, #16] 8014dbc: f105 010c add.w r1, r5, #12 8014dc0: 3202 adds r2, #2 8014dc2: 0092 lsls r2, r2, #2 8014dc4: 300c adds r0, #12 8014dc6: f7ff fa71 bl 80142ac 8014dca: 2201 movs r2, #1 8014dcc: 4631 mov r1, r6 8014dce: 4648 mov r0, r9 8014dd0: f000 fef2 bl 8015bb8 <__lshift> 8014dd4: 462f mov r7, r5 8014dd6: 4605 mov r5, r0 8014dd8: f10a 0301 add.w r3, sl, #1 8014ddc: 9304 str r3, [sp, #16] 8014dde: eb0a 030b add.w r3, sl, fp 8014de2: 930a str r3, [sp, #40] @ 0x28 8014de4: 9b06 ldr r3, [sp, #24] 8014de6: f003 0301 and.w r3, r3, #1 8014dea: 9309 str r3, [sp, #36] @ 0x24 8014dec: 9b04 ldr r3, [sp, #16] 8014dee: 4621 mov r1, r4 8014df0: 9803 ldr r0, [sp, #12] 8014df2: f103 3bff add.w fp, r3, #4294967295 @ 0xffffffff 8014df6: f7ff fa85 bl 8014304 8014dfa: 4603 mov r3, r0 8014dfc: 4639 mov r1, r7 8014dfe: 3330 adds r3, #48 @ 0x30 8014e00: 9006 str r0, [sp, #24] 8014e02: 9803 ldr r0, [sp, #12] 8014e04: 930b str r3, [sp, #44] @ 0x2c 8014e06: f000 ff43 bl 8015c90 <__mcmp> 8014e0a: 462a mov r2, r5 8014e0c: 9008 str r0, [sp, #32] 8014e0e: 4621 mov r1, r4 8014e10: 4648 mov r0, r9 8014e12: f000 ff59 bl 8015cc8 <__mdiff> 8014e16: 68c2 ldr r2, [r0, #12] 8014e18: 4606 mov r6, r0 8014e1a: 9b0b ldr r3, [sp, #44] @ 0x2c 8014e1c: bb02 cbnz r2, 8014e60 <_dtoa_r+0xa48> 8014e1e: 4601 mov r1, r0 8014e20: 9803 ldr r0, [sp, #12] 8014e22: f000 ff35 bl 8015c90 <__mcmp> 8014e26: 4602 mov r2, r0 8014e28: 9b0b ldr r3, [sp, #44] @ 0x2c 8014e2a: 4631 mov r1, r6 8014e2c: 4648 mov r0, r9 8014e2e: e9cd 320b strd r3, r2, [sp, #44] @ 0x2c 8014e32: f000 fcfb bl 801582c <_Bfree> 8014e36: 9b20 ldr r3, [sp, #128] @ 0x80 8014e38: 9a0c ldr r2, [sp, #48] @ 0x30 8014e3a: 9e04 ldr r6, [sp, #16] 8014e3c: ea42 0103 orr.w r1, r2, r3 8014e40: 9b09 ldr r3, [sp, #36] @ 0x24 8014e42: 4319 orrs r1, r3 8014e44: 9b0b ldr r3, [sp, #44] @ 0x2c 8014e46: d10d bne.n 8014e64 <_dtoa_r+0xa4c> 8014e48: 2b39 cmp r3, #57 @ 0x39 8014e4a: d027 beq.n 8014e9c <_dtoa_r+0xa84> 8014e4c: 9a08 ldr r2, [sp, #32] 8014e4e: 2a00 cmp r2, #0 8014e50: dd01 ble.n 8014e56 <_dtoa_r+0xa3e> 8014e52: 9b06 ldr r3, [sp, #24] 8014e54: 3331 adds r3, #49 @ 0x31 8014e56: f88b 3000 strb.w r3, [fp] 8014e5a: e52e b.n 80148ba <_dtoa_r+0x4a2> 8014e5c: 4628 mov r0, r5 8014e5e: e7b9 b.n 8014dd4 <_dtoa_r+0x9bc> 8014e60: 2201 movs r2, #1 8014e62: e7e2 b.n 8014e2a <_dtoa_r+0xa12> 8014e64: 9908 ldr r1, [sp, #32] 8014e66: 2900 cmp r1, #0 8014e68: db04 blt.n 8014e74 <_dtoa_r+0xa5c> 8014e6a: 9820 ldr r0, [sp, #128] @ 0x80 8014e6c: 4301 orrs r1, r0 8014e6e: 9809 ldr r0, [sp, #36] @ 0x24 8014e70: 4301 orrs r1, r0 8014e72: d120 bne.n 8014eb6 <_dtoa_r+0xa9e> 8014e74: 2a00 cmp r2, #0 8014e76: ddee ble.n 8014e56 <_dtoa_r+0xa3e> 8014e78: 2201 movs r2, #1 8014e7a: 9903 ldr r1, [sp, #12] 8014e7c: 4648 mov r0, r9 8014e7e: 9304 str r3, [sp, #16] 8014e80: f000 fe9a bl 8015bb8 <__lshift> 8014e84: 4621 mov r1, r4 8014e86: 9003 str r0, [sp, #12] 8014e88: f000 ff02 bl 8015c90 <__mcmp> 8014e8c: 2800 cmp r0, #0 8014e8e: 9b04 ldr r3, [sp, #16] 8014e90: dc02 bgt.n 8014e98 <_dtoa_r+0xa80> 8014e92: d1e0 bne.n 8014e56 <_dtoa_r+0xa3e> 8014e94: 07da lsls r2, r3, #31 8014e96: d5de bpl.n 8014e56 <_dtoa_r+0xa3e> 8014e98: 2b39 cmp r3, #57 @ 0x39 8014e9a: d1da bne.n 8014e52 <_dtoa_r+0xa3a> 8014e9c: 2339 movs r3, #57 @ 0x39 8014e9e: f88b 3000 strb.w r3, [fp] 8014ea2: 4633 mov r3, r6 8014ea4: 461e mov r6, r3 8014ea6: f816 2c01 ldrb.w r2, [r6, #-1] 8014eaa: 3b01 subs r3, #1 8014eac: 2a39 cmp r2, #57 @ 0x39 8014eae: d04e beq.n 8014f4e <_dtoa_r+0xb36> 8014eb0: 3201 adds r2, #1 8014eb2: 701a strb r2, [r3, #0] 8014eb4: e501 b.n 80148ba <_dtoa_r+0x4a2> 8014eb6: 2a00 cmp r2, #0 8014eb8: dd03 ble.n 8014ec2 <_dtoa_r+0xaaa> 8014eba: 2b39 cmp r3, #57 @ 0x39 8014ebc: d0ee beq.n 8014e9c <_dtoa_r+0xa84> 8014ebe: 3301 adds r3, #1 8014ec0: e7c9 b.n 8014e56 <_dtoa_r+0xa3e> 8014ec2: 9a04 ldr r2, [sp, #16] 8014ec4: 990a ldr r1, [sp, #40] @ 0x28 8014ec6: f802 3c01 strb.w r3, [r2, #-1] 8014eca: 428a cmp r2, r1 8014ecc: d028 beq.n 8014f20 <_dtoa_r+0xb08> 8014ece: 2300 movs r3, #0 8014ed0: 220a movs r2, #10 8014ed2: 9903 ldr r1, [sp, #12] 8014ed4: 4648 mov r0, r9 8014ed6: f000 fccb bl 8015870 <__multadd> 8014eda: 42af cmp r7, r5 8014edc: 9003 str r0, [sp, #12] 8014ede: f04f 0300 mov.w r3, #0 8014ee2: f04f 020a mov.w r2, #10 8014ee6: 4639 mov r1, r7 8014ee8: 4648 mov r0, r9 8014eea: d107 bne.n 8014efc <_dtoa_r+0xae4> 8014eec: f000 fcc0 bl 8015870 <__multadd> 8014ef0: 4607 mov r7, r0 8014ef2: 4605 mov r5, r0 8014ef4: 9b04 ldr r3, [sp, #16] 8014ef6: 3301 adds r3, #1 8014ef8: 9304 str r3, [sp, #16] 8014efa: e777 b.n 8014dec <_dtoa_r+0x9d4> 8014efc: f000 fcb8 bl 8015870 <__multadd> 8014f00: 4629 mov r1, r5 8014f02: 4607 mov r7, r0 8014f04: 2300 movs r3, #0 8014f06: 220a movs r2, #10 8014f08: 4648 mov r0, r9 8014f0a: f000 fcb1 bl 8015870 <__multadd> 8014f0e: 4605 mov r5, r0 8014f10: e7f0 b.n 8014ef4 <_dtoa_r+0xadc> 8014f12: f1bb 0f00 cmp.w fp, #0 8014f16: bfcc ite gt 8014f18: 465e movgt r6, fp 8014f1a: 2601 movle r6, #1 8014f1c: 2700 movs r7, #0 8014f1e: 4456 add r6, sl 8014f20: 2201 movs r2, #1 8014f22: 9903 ldr r1, [sp, #12] 8014f24: 4648 mov r0, r9 8014f26: 9304 str r3, [sp, #16] 8014f28: f000 fe46 bl 8015bb8 <__lshift> 8014f2c: 4621 mov r1, r4 8014f2e: 9003 str r0, [sp, #12] 8014f30: f000 feae bl 8015c90 <__mcmp> 8014f34: 2800 cmp r0, #0 8014f36: dcb4 bgt.n 8014ea2 <_dtoa_r+0xa8a> 8014f38: d102 bne.n 8014f40 <_dtoa_r+0xb28> 8014f3a: 9b04 ldr r3, [sp, #16] 8014f3c: 07db lsls r3, r3, #31 8014f3e: d4b0 bmi.n 8014ea2 <_dtoa_r+0xa8a> 8014f40: 4633 mov r3, r6 8014f42: 461e mov r6, r3 8014f44: f813 2d01 ldrb.w r2, [r3, #-1]! 8014f48: 2a30 cmp r2, #48 @ 0x30 8014f4a: d0fa beq.n 8014f42 <_dtoa_r+0xb2a> 8014f4c: e4b5 b.n 80148ba <_dtoa_r+0x4a2> 8014f4e: 459a cmp sl, r3 8014f50: d1a8 bne.n 8014ea4 <_dtoa_r+0xa8c> 8014f52: 2331 movs r3, #49 @ 0x31 8014f54: f108 0801 add.w r8, r8, #1 8014f58: f88a 3000 strb.w r3, [sl] 8014f5c: e4ad b.n 80148ba <_dtoa_r+0x4a2> 8014f5e: 9b24 ldr r3, [sp, #144] @ 0x90 8014f60: f8df a058 ldr.w sl, [pc, #88] @ 8014fbc <_dtoa_r+0xba4> 8014f64: b11b cbz r3, 8014f6e <_dtoa_r+0xb56> 8014f66: f10a 0308 add.w r3, sl, #8 8014f6a: 9a24 ldr r2, [sp, #144] @ 0x90 8014f6c: 6013 str r3, [r2, #0] 8014f6e: 4650 mov r0, sl 8014f70: b017 add sp, #92 @ 0x5c 8014f72: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8014f76: 9b20 ldr r3, [sp, #128] @ 0x80 8014f78: 2b01 cmp r3, #1 8014f7a: f77f ae2e ble.w 8014bda <_dtoa_r+0x7c2> 8014f7e: 9b0e ldr r3, [sp, #56] @ 0x38 8014f80: 930a str r3, [sp, #40] @ 0x28 8014f82: 2001 movs r0, #1 8014f84: e64d b.n 8014c22 <_dtoa_r+0x80a> 8014f86: f1bb 0f00 cmp.w fp, #0 8014f8a: f77f aed9 ble.w 8014d40 <_dtoa_r+0x928> 8014f8e: 4656 mov r6, sl 8014f90: 4621 mov r1, r4 8014f92: 9803 ldr r0, [sp, #12] 8014f94: f7ff f9b6 bl 8014304 8014f98: f100 0330 add.w r3, r0, #48 @ 0x30 8014f9c: f806 3b01 strb.w r3, [r6], #1 8014fa0: eba6 020a sub.w r2, r6, sl 8014fa4: 4593 cmp fp, r2 8014fa6: ddb4 ble.n 8014f12 <_dtoa_r+0xafa> 8014fa8: 2300 movs r3, #0 8014faa: 220a movs r2, #10 8014fac: 4648 mov r0, r9 8014fae: 9903 ldr r1, [sp, #12] 8014fb0: f000 fc5e bl 8015870 <__multadd> 8014fb4: 9003 str r0, [sp, #12] 8014fb6: e7eb b.n 8014f90 <_dtoa_r+0xb78> 8014fb8: 08016d68 .word 0x08016d68 8014fbc: 08016d03 .word 0x08016d03 08014fc0 <__ssputs_r>: 8014fc0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8014fc4: 461f mov r7, r3 8014fc6: 688e ldr r6, [r1, #8] 8014fc8: 4682 mov sl, r0 8014fca: 42be cmp r6, r7 8014fcc: 460c mov r4, r1 8014fce: 4690 mov r8, r2 8014fd0: 680b ldr r3, [r1, #0] 8014fd2: d82d bhi.n 8015030 <__ssputs_r+0x70> 8014fd4: f9b1 200c ldrsh.w r2, [r1, #12] 8014fd8: f412 6f90 tst.w r2, #1152 @ 0x480 8014fdc: d026 beq.n 801502c <__ssputs_r+0x6c> 8014fde: 6965 ldr r5, [r4, #20] 8014fe0: 6909 ldr r1, [r1, #16] 8014fe2: eb05 0545 add.w r5, r5, r5, lsl #1 8014fe6: eba3 0901 sub.w r9, r3, r1 8014fea: eb05 75d5 add.w r5, r5, r5, lsr #31 8014fee: 1c7b adds r3, r7, #1 8014ff0: 444b add r3, r9 8014ff2: 106d asrs r5, r5, #1 8014ff4: 429d cmp r5, r3 8014ff6: bf38 it cc 8014ff8: 461d movcc r5, r3 8014ffa: 0553 lsls r3, r2, #21 8014ffc: d527 bpl.n 801504e <__ssputs_r+0x8e> 8014ffe: 4629 mov r1, r5 8015000: f000 faa0 bl 8015544 <_malloc_r> 8015004: 4606 mov r6, r0 8015006: b360 cbz r0, 8015062 <__ssputs_r+0xa2> 8015008: 464a mov r2, r9 801500a: 6921 ldr r1, [r4, #16] 801500c: f7ff f94e bl 80142ac 8015010: 89a3 ldrh r3, [r4, #12] 8015012: f423 6390 bic.w r3, r3, #1152 @ 0x480 8015016: f043 0380 orr.w r3, r3, #128 @ 0x80 801501a: 81a3 strh r3, [r4, #12] 801501c: 6126 str r6, [r4, #16] 801501e: 444e add r6, r9 8015020: 6026 str r6, [r4, #0] 8015022: 463e mov r6, r7 8015024: 6165 str r5, [r4, #20] 8015026: eba5 0509 sub.w r5, r5, r9 801502a: 60a5 str r5, [r4, #8] 801502c: 42be cmp r6, r7 801502e: d900 bls.n 8015032 <__ssputs_r+0x72> 8015030: 463e mov r6, r7 8015032: 4632 mov r2, r6 8015034: 4641 mov r1, r8 8015036: 6820 ldr r0, [r4, #0] 8015038: f001 f8ab bl 8016192 801503c: 2000 movs r0, #0 801503e: 68a3 ldr r3, [r4, #8] 8015040: 1b9b subs r3, r3, r6 8015042: 60a3 str r3, [r4, #8] 8015044: 6823 ldr r3, [r4, #0] 8015046: 4433 add r3, r6 8015048: 6023 str r3, [r4, #0] 801504a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 801504e: 462a mov r2, r5 8015050: f000 ff7c bl 8015f4c <_realloc_r> 8015054: 4606 mov r6, r0 8015056: 2800 cmp r0, #0 8015058: d1e0 bne.n 801501c <__ssputs_r+0x5c> 801505a: 4650 mov r0, sl 801505c: 6921 ldr r1, [r4, #16] 801505e: f001 f947 bl 80162f0 <_free_r> 8015062: 230c movs r3, #12 8015064: f8ca 3000 str.w r3, [sl] 8015068: 89a3 ldrh r3, [r4, #12] 801506a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 801506e: f043 0340 orr.w r3, r3, #64 @ 0x40 8015072: 81a3 strh r3, [r4, #12] 8015074: e7e9 b.n 801504a <__ssputs_r+0x8a> ... 08015078 <_svfiprintf_r>: 8015078: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 801507c: 4698 mov r8, r3 801507e: 898b ldrh r3, [r1, #12] 8015080: 4607 mov r7, r0 8015082: 061b lsls r3, r3, #24 8015084: 460d mov r5, r1 8015086: 4614 mov r4, r2 8015088: b09d sub sp, #116 @ 0x74 801508a: d510 bpl.n 80150ae <_svfiprintf_r+0x36> 801508c: 690b ldr r3, [r1, #16] 801508e: b973 cbnz r3, 80150ae <_svfiprintf_r+0x36> 8015090: 2140 movs r1, #64 @ 0x40 8015092: f000 fa57 bl 8015544 <_malloc_r> 8015096: 6028 str r0, [r5, #0] 8015098: 6128 str r0, [r5, #16] 801509a: b930 cbnz r0, 80150aa <_svfiprintf_r+0x32> 801509c: 230c movs r3, #12 801509e: 603b str r3, [r7, #0] 80150a0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80150a4: b01d add sp, #116 @ 0x74 80150a6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80150aa: 2340 movs r3, #64 @ 0x40 80150ac: 616b str r3, [r5, #20] 80150ae: 2300 movs r3, #0 80150b0: 9309 str r3, [sp, #36] @ 0x24 80150b2: 2320 movs r3, #32 80150b4: f88d 3029 strb.w r3, [sp, #41] @ 0x29 80150b8: 2330 movs r3, #48 @ 0x30 80150ba: f04f 0901 mov.w r9, #1 80150be: f8cd 800c str.w r8, [sp, #12] 80150c2: f8df 8198 ldr.w r8, [pc, #408] @ 801525c <_svfiprintf_r+0x1e4> 80150c6: f88d 302a strb.w r3, [sp, #42] @ 0x2a 80150ca: 4623 mov r3, r4 80150cc: 469a mov sl, r3 80150ce: f813 2b01 ldrb.w r2, [r3], #1 80150d2: b10a cbz r2, 80150d8 <_svfiprintf_r+0x60> 80150d4: 2a25 cmp r2, #37 @ 0x25 80150d6: d1f9 bne.n 80150cc <_svfiprintf_r+0x54> 80150d8: ebba 0b04 subs.w fp, sl, r4 80150dc: d00b beq.n 80150f6 <_svfiprintf_r+0x7e> 80150de: 465b mov r3, fp 80150e0: 4622 mov r2, r4 80150e2: 4629 mov r1, r5 80150e4: 4638 mov r0, r7 80150e6: f7ff ff6b bl 8014fc0 <__ssputs_r> 80150ea: 3001 adds r0, #1 80150ec: f000 80a7 beq.w 801523e <_svfiprintf_r+0x1c6> 80150f0: 9a09 ldr r2, [sp, #36] @ 0x24 80150f2: 445a add r2, fp 80150f4: 9209 str r2, [sp, #36] @ 0x24 80150f6: f89a 3000 ldrb.w r3, [sl] 80150fa: 2b00 cmp r3, #0 80150fc: f000 809f beq.w 801523e <_svfiprintf_r+0x1c6> 8015100: 2300 movs r3, #0 8015102: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8015106: e9cd 2305 strd r2, r3, [sp, #20] 801510a: f10a 0a01 add.w sl, sl, #1 801510e: 9304 str r3, [sp, #16] 8015110: 9307 str r3, [sp, #28] 8015112: f88d 3053 strb.w r3, [sp, #83] @ 0x53 8015116: 931a str r3, [sp, #104] @ 0x68 8015118: 4654 mov r4, sl 801511a: 2205 movs r2, #5 801511c: f814 1b01 ldrb.w r1, [r4], #1 8015120: 484e ldr r0, [pc, #312] @ (801525c <_svfiprintf_r+0x1e4>) 8015122: f7ff f8b5 bl 8014290 8015126: 9a04 ldr r2, [sp, #16] 8015128: b9d8 cbnz r0, 8015162 <_svfiprintf_r+0xea> 801512a: 06d0 lsls r0, r2, #27 801512c: bf44 itt mi 801512e: 2320 movmi r3, #32 8015130: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 8015134: 0711 lsls r1, r2, #28 8015136: bf44 itt mi 8015138: 232b movmi r3, #43 @ 0x2b 801513a: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 801513e: f89a 3000 ldrb.w r3, [sl] 8015142: 2b2a cmp r3, #42 @ 0x2a 8015144: d015 beq.n 8015172 <_svfiprintf_r+0xfa> 8015146: 4654 mov r4, sl 8015148: 2000 movs r0, #0 801514a: f04f 0c0a mov.w ip, #10 801514e: 9a07 ldr r2, [sp, #28] 8015150: 4621 mov r1, r4 8015152: f811 3b01 ldrb.w r3, [r1], #1 8015156: 3b30 subs r3, #48 @ 0x30 8015158: 2b09 cmp r3, #9 801515a: d94b bls.n 80151f4 <_svfiprintf_r+0x17c> 801515c: b1b0 cbz r0, 801518c <_svfiprintf_r+0x114> 801515e: 9207 str r2, [sp, #28] 8015160: e014 b.n 801518c <_svfiprintf_r+0x114> 8015162: eba0 0308 sub.w r3, r0, r8 8015166: fa09 f303 lsl.w r3, r9, r3 801516a: 4313 orrs r3, r2 801516c: 46a2 mov sl, r4 801516e: 9304 str r3, [sp, #16] 8015170: e7d2 b.n 8015118 <_svfiprintf_r+0xa0> 8015172: 9b03 ldr r3, [sp, #12] 8015174: 1d19 adds r1, r3, #4 8015176: 681b ldr r3, [r3, #0] 8015178: 9103 str r1, [sp, #12] 801517a: 2b00 cmp r3, #0 801517c: bfbb ittet lt 801517e: 425b neglt r3, r3 8015180: f042 0202 orrlt.w r2, r2, #2 8015184: 9307 strge r3, [sp, #28] 8015186: 9307 strlt r3, [sp, #28] 8015188: bfb8 it lt 801518a: 9204 strlt r2, [sp, #16] 801518c: 7823 ldrb r3, [r4, #0] 801518e: 2b2e cmp r3, #46 @ 0x2e 8015190: d10a bne.n 80151a8 <_svfiprintf_r+0x130> 8015192: 7863 ldrb r3, [r4, #1] 8015194: 2b2a cmp r3, #42 @ 0x2a 8015196: d132 bne.n 80151fe <_svfiprintf_r+0x186> 8015198: 9b03 ldr r3, [sp, #12] 801519a: 3402 adds r4, #2 801519c: 1d1a adds r2, r3, #4 801519e: 681b ldr r3, [r3, #0] 80151a0: 9203 str r2, [sp, #12] 80151a2: ea43 73e3 orr.w r3, r3, r3, asr #31 80151a6: 9305 str r3, [sp, #20] 80151a8: f8df a0b4 ldr.w sl, [pc, #180] @ 8015260 <_svfiprintf_r+0x1e8> 80151ac: 2203 movs r2, #3 80151ae: 4650 mov r0, sl 80151b0: 7821 ldrb r1, [r4, #0] 80151b2: f7ff f86d bl 8014290 80151b6: b138 cbz r0, 80151c8 <_svfiprintf_r+0x150> 80151b8: 2240 movs r2, #64 @ 0x40 80151ba: 9b04 ldr r3, [sp, #16] 80151bc: eba0 000a sub.w r0, r0, sl 80151c0: 4082 lsls r2, r0 80151c2: 4313 orrs r3, r2 80151c4: 3401 adds r4, #1 80151c6: 9304 str r3, [sp, #16] 80151c8: f814 1b01 ldrb.w r1, [r4], #1 80151cc: 2206 movs r2, #6 80151ce: 4825 ldr r0, [pc, #148] @ (8015264 <_svfiprintf_r+0x1ec>) 80151d0: f88d 1028 strb.w r1, [sp, #40] @ 0x28 80151d4: f7ff f85c bl 8014290 80151d8: 2800 cmp r0, #0 80151da: d036 beq.n 801524a <_svfiprintf_r+0x1d2> 80151dc: 4b22 ldr r3, [pc, #136] @ (8015268 <_svfiprintf_r+0x1f0>) 80151de: bb1b cbnz r3, 8015228 <_svfiprintf_r+0x1b0> 80151e0: 9b03 ldr r3, [sp, #12] 80151e2: 3307 adds r3, #7 80151e4: f023 0307 bic.w r3, r3, #7 80151e8: 3308 adds r3, #8 80151ea: 9303 str r3, [sp, #12] 80151ec: 9b09 ldr r3, [sp, #36] @ 0x24 80151ee: 4433 add r3, r6 80151f0: 9309 str r3, [sp, #36] @ 0x24 80151f2: e76a b.n 80150ca <_svfiprintf_r+0x52> 80151f4: 460c mov r4, r1 80151f6: 2001 movs r0, #1 80151f8: fb0c 3202 mla r2, ip, r2, r3 80151fc: e7a8 b.n 8015150 <_svfiprintf_r+0xd8> 80151fe: 2300 movs r3, #0 8015200: f04f 0c0a mov.w ip, #10 8015204: 4619 mov r1, r3 8015206: 3401 adds r4, #1 8015208: 9305 str r3, [sp, #20] 801520a: 4620 mov r0, r4 801520c: f810 2b01 ldrb.w r2, [r0], #1 8015210: 3a30 subs r2, #48 @ 0x30 8015212: 2a09 cmp r2, #9 8015214: d903 bls.n 801521e <_svfiprintf_r+0x1a6> 8015216: 2b00 cmp r3, #0 8015218: d0c6 beq.n 80151a8 <_svfiprintf_r+0x130> 801521a: 9105 str r1, [sp, #20] 801521c: e7c4 b.n 80151a8 <_svfiprintf_r+0x130> 801521e: 4604 mov r4, r0 8015220: 2301 movs r3, #1 8015222: fb0c 2101 mla r1, ip, r1, r2 8015226: e7f0 b.n 801520a <_svfiprintf_r+0x192> 8015228: ab03 add r3, sp, #12 801522a: 9300 str r3, [sp, #0] 801522c: 462a mov r2, r5 801522e: 4638 mov r0, r7 8015230: 4b0e ldr r3, [pc, #56] @ (801526c <_svfiprintf_r+0x1f4>) 8015232: a904 add r1, sp, #16 8015234: f7fe fa60 bl 80136f8 <_printf_float> 8015238: 1c42 adds r2, r0, #1 801523a: 4606 mov r6, r0 801523c: d1d6 bne.n 80151ec <_svfiprintf_r+0x174> 801523e: 89ab ldrh r3, [r5, #12] 8015240: 065b lsls r3, r3, #25 8015242: f53f af2d bmi.w 80150a0 <_svfiprintf_r+0x28> 8015246: 9809 ldr r0, [sp, #36] @ 0x24 8015248: e72c b.n 80150a4 <_svfiprintf_r+0x2c> 801524a: ab03 add r3, sp, #12 801524c: 9300 str r3, [sp, #0] 801524e: 462a mov r2, r5 8015250: 4638 mov r0, r7 8015252: 4b06 ldr r3, [pc, #24] @ (801526c <_svfiprintf_r+0x1f4>) 8015254: a904 add r1, sp, #16 8015256: f7fe fced bl 8013c34 <_printf_i> 801525a: e7ed b.n 8015238 <_svfiprintf_r+0x1c0> 801525c: 08016d79 .word 0x08016d79 8015260: 08016d7f .word 0x08016d7f 8015264: 08016d83 .word 0x08016d83 8015268: 080136f9 .word 0x080136f9 801526c: 08014fc1 .word 0x08014fc1 08015270 <__sfputc_r>: 8015270: 6893 ldr r3, [r2, #8] 8015272: b410 push {r4} 8015274: 3b01 subs r3, #1 8015276: 2b00 cmp r3, #0 8015278: 6093 str r3, [r2, #8] 801527a: da07 bge.n 801528c <__sfputc_r+0x1c> 801527c: 6994 ldr r4, [r2, #24] 801527e: 42a3 cmp r3, r4 8015280: db01 blt.n 8015286 <__sfputc_r+0x16> 8015282: 290a cmp r1, #10 8015284: d102 bne.n 801528c <__sfputc_r+0x1c> 8015286: bc10 pop {r4} 8015288: f000 be8e b.w 8015fa8 <__swbuf_r> 801528c: 6813 ldr r3, [r2, #0] 801528e: 1c58 adds r0, r3, #1 8015290: 6010 str r0, [r2, #0] 8015292: 7019 strb r1, [r3, #0] 8015294: 4608 mov r0, r1 8015296: bc10 pop {r4} 8015298: 4770 bx lr 0801529a <__sfputs_r>: 801529a: b5f8 push {r3, r4, r5, r6, r7, lr} 801529c: 4606 mov r6, r0 801529e: 460f mov r7, r1 80152a0: 4614 mov r4, r2 80152a2: 18d5 adds r5, r2, r3 80152a4: 42ac cmp r4, r5 80152a6: d101 bne.n 80152ac <__sfputs_r+0x12> 80152a8: 2000 movs r0, #0 80152aa: e007 b.n 80152bc <__sfputs_r+0x22> 80152ac: 463a mov r2, r7 80152ae: 4630 mov r0, r6 80152b0: f814 1b01 ldrb.w r1, [r4], #1 80152b4: f7ff ffdc bl 8015270 <__sfputc_r> 80152b8: 1c43 adds r3, r0, #1 80152ba: d1f3 bne.n 80152a4 <__sfputs_r+0xa> 80152bc: bdf8 pop {r3, r4, r5, r6, r7, pc} ... 080152c0 <_vfiprintf_r>: 80152c0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80152c4: 460d mov r5, r1 80152c6: 4614 mov r4, r2 80152c8: 4698 mov r8, r3 80152ca: 4606 mov r6, r0 80152cc: b09d sub sp, #116 @ 0x74 80152ce: b118 cbz r0, 80152d8 <_vfiprintf_r+0x18> 80152d0: 6a03 ldr r3, [r0, #32] 80152d2: b90b cbnz r3, 80152d8 <_vfiprintf_r+0x18> 80152d4: f7fe fe58 bl 8013f88 <__sinit> 80152d8: 6e6b ldr r3, [r5, #100] @ 0x64 80152da: 07d9 lsls r1, r3, #31 80152dc: d405 bmi.n 80152ea <_vfiprintf_r+0x2a> 80152de: 89ab ldrh r3, [r5, #12] 80152e0: 059a lsls r2, r3, #22 80152e2: d402 bmi.n 80152ea <_vfiprintf_r+0x2a> 80152e4: 6da8 ldr r0, [r5, #88] @ 0x58 80152e6: f7fe ffcc bl 8014282 <__retarget_lock_acquire_recursive> 80152ea: 89ab ldrh r3, [r5, #12] 80152ec: 071b lsls r3, r3, #28 80152ee: d501 bpl.n 80152f4 <_vfiprintf_r+0x34> 80152f0: 692b ldr r3, [r5, #16] 80152f2: b99b cbnz r3, 801531c <_vfiprintf_r+0x5c> 80152f4: 4629 mov r1, r5 80152f6: 4630 mov r0, r6 80152f8: f000 fe94 bl 8016024 <__swsetup_r> 80152fc: b170 cbz r0, 801531c <_vfiprintf_r+0x5c> 80152fe: 6e6b ldr r3, [r5, #100] @ 0x64 8015300: 07dc lsls r4, r3, #31 8015302: d504 bpl.n 801530e <_vfiprintf_r+0x4e> 8015304: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8015308: b01d add sp, #116 @ 0x74 801530a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 801530e: 89ab ldrh r3, [r5, #12] 8015310: 0598 lsls r0, r3, #22 8015312: d4f7 bmi.n 8015304 <_vfiprintf_r+0x44> 8015314: 6da8 ldr r0, [r5, #88] @ 0x58 8015316: f7fe ffb5 bl 8014284 <__retarget_lock_release_recursive> 801531a: e7f3 b.n 8015304 <_vfiprintf_r+0x44> 801531c: 2300 movs r3, #0 801531e: 9309 str r3, [sp, #36] @ 0x24 8015320: 2320 movs r3, #32 8015322: f88d 3029 strb.w r3, [sp, #41] @ 0x29 8015326: 2330 movs r3, #48 @ 0x30 8015328: f04f 0901 mov.w r9, #1 801532c: f8cd 800c str.w r8, [sp, #12] 8015330: f8df 81a8 ldr.w r8, [pc, #424] @ 80154dc <_vfiprintf_r+0x21c> 8015334: f88d 302a strb.w r3, [sp, #42] @ 0x2a 8015338: 4623 mov r3, r4 801533a: 469a mov sl, r3 801533c: f813 2b01 ldrb.w r2, [r3], #1 8015340: b10a cbz r2, 8015346 <_vfiprintf_r+0x86> 8015342: 2a25 cmp r2, #37 @ 0x25 8015344: d1f9 bne.n 801533a <_vfiprintf_r+0x7a> 8015346: ebba 0b04 subs.w fp, sl, r4 801534a: d00b beq.n 8015364 <_vfiprintf_r+0xa4> 801534c: 465b mov r3, fp 801534e: 4622 mov r2, r4 8015350: 4629 mov r1, r5 8015352: 4630 mov r0, r6 8015354: f7ff ffa1 bl 801529a <__sfputs_r> 8015358: 3001 adds r0, #1 801535a: f000 80a7 beq.w 80154ac <_vfiprintf_r+0x1ec> 801535e: 9a09 ldr r2, [sp, #36] @ 0x24 8015360: 445a add r2, fp 8015362: 9209 str r2, [sp, #36] @ 0x24 8015364: f89a 3000 ldrb.w r3, [sl] 8015368: 2b00 cmp r3, #0 801536a: f000 809f beq.w 80154ac <_vfiprintf_r+0x1ec> 801536e: 2300 movs r3, #0 8015370: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8015374: e9cd 2305 strd r2, r3, [sp, #20] 8015378: f10a 0a01 add.w sl, sl, #1 801537c: 9304 str r3, [sp, #16] 801537e: 9307 str r3, [sp, #28] 8015380: f88d 3053 strb.w r3, [sp, #83] @ 0x53 8015384: 931a str r3, [sp, #104] @ 0x68 8015386: 4654 mov r4, sl 8015388: 2205 movs r2, #5 801538a: f814 1b01 ldrb.w r1, [r4], #1 801538e: 4853 ldr r0, [pc, #332] @ (80154dc <_vfiprintf_r+0x21c>) 8015390: f7fe ff7e bl 8014290 8015394: 9a04 ldr r2, [sp, #16] 8015396: b9d8 cbnz r0, 80153d0 <_vfiprintf_r+0x110> 8015398: 06d1 lsls r1, r2, #27 801539a: bf44 itt mi 801539c: 2320 movmi r3, #32 801539e: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80153a2: 0713 lsls r3, r2, #28 80153a4: bf44 itt mi 80153a6: 232b movmi r3, #43 @ 0x2b 80153a8: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80153ac: f89a 3000 ldrb.w r3, [sl] 80153b0: 2b2a cmp r3, #42 @ 0x2a 80153b2: d015 beq.n 80153e0 <_vfiprintf_r+0x120> 80153b4: 4654 mov r4, sl 80153b6: 2000 movs r0, #0 80153b8: f04f 0c0a mov.w ip, #10 80153bc: 9a07 ldr r2, [sp, #28] 80153be: 4621 mov r1, r4 80153c0: f811 3b01 ldrb.w r3, [r1], #1 80153c4: 3b30 subs r3, #48 @ 0x30 80153c6: 2b09 cmp r3, #9 80153c8: d94b bls.n 8015462 <_vfiprintf_r+0x1a2> 80153ca: b1b0 cbz r0, 80153fa <_vfiprintf_r+0x13a> 80153cc: 9207 str r2, [sp, #28] 80153ce: e014 b.n 80153fa <_vfiprintf_r+0x13a> 80153d0: eba0 0308 sub.w r3, r0, r8 80153d4: fa09 f303 lsl.w r3, r9, r3 80153d8: 4313 orrs r3, r2 80153da: 46a2 mov sl, r4 80153dc: 9304 str r3, [sp, #16] 80153de: e7d2 b.n 8015386 <_vfiprintf_r+0xc6> 80153e0: 9b03 ldr r3, [sp, #12] 80153e2: 1d19 adds r1, r3, #4 80153e4: 681b ldr r3, [r3, #0] 80153e6: 9103 str r1, [sp, #12] 80153e8: 2b00 cmp r3, #0 80153ea: bfbb ittet lt 80153ec: 425b neglt r3, r3 80153ee: f042 0202 orrlt.w r2, r2, #2 80153f2: 9307 strge r3, [sp, #28] 80153f4: 9307 strlt r3, [sp, #28] 80153f6: bfb8 it lt 80153f8: 9204 strlt r2, [sp, #16] 80153fa: 7823 ldrb r3, [r4, #0] 80153fc: 2b2e cmp r3, #46 @ 0x2e 80153fe: d10a bne.n 8015416 <_vfiprintf_r+0x156> 8015400: 7863 ldrb r3, [r4, #1] 8015402: 2b2a cmp r3, #42 @ 0x2a 8015404: d132 bne.n 801546c <_vfiprintf_r+0x1ac> 8015406: 9b03 ldr r3, [sp, #12] 8015408: 3402 adds r4, #2 801540a: 1d1a adds r2, r3, #4 801540c: 681b ldr r3, [r3, #0] 801540e: 9203 str r2, [sp, #12] 8015410: ea43 73e3 orr.w r3, r3, r3, asr #31 8015414: 9305 str r3, [sp, #20] 8015416: f8df a0c8 ldr.w sl, [pc, #200] @ 80154e0 <_vfiprintf_r+0x220> 801541a: 2203 movs r2, #3 801541c: 4650 mov r0, sl 801541e: 7821 ldrb r1, [r4, #0] 8015420: f7fe ff36 bl 8014290 8015424: b138 cbz r0, 8015436 <_vfiprintf_r+0x176> 8015426: 2240 movs r2, #64 @ 0x40 8015428: 9b04 ldr r3, [sp, #16] 801542a: eba0 000a sub.w r0, r0, sl 801542e: 4082 lsls r2, r0 8015430: 4313 orrs r3, r2 8015432: 3401 adds r4, #1 8015434: 9304 str r3, [sp, #16] 8015436: f814 1b01 ldrb.w r1, [r4], #1 801543a: 2206 movs r2, #6 801543c: 4829 ldr r0, [pc, #164] @ (80154e4 <_vfiprintf_r+0x224>) 801543e: f88d 1028 strb.w r1, [sp, #40] @ 0x28 8015442: f7fe ff25 bl 8014290 8015446: 2800 cmp r0, #0 8015448: d03f beq.n 80154ca <_vfiprintf_r+0x20a> 801544a: 4b27 ldr r3, [pc, #156] @ (80154e8 <_vfiprintf_r+0x228>) 801544c: bb1b cbnz r3, 8015496 <_vfiprintf_r+0x1d6> 801544e: 9b03 ldr r3, [sp, #12] 8015450: 3307 adds r3, #7 8015452: f023 0307 bic.w r3, r3, #7 8015456: 3308 adds r3, #8 8015458: 9303 str r3, [sp, #12] 801545a: 9b09 ldr r3, [sp, #36] @ 0x24 801545c: 443b add r3, r7 801545e: 9309 str r3, [sp, #36] @ 0x24 8015460: e76a b.n 8015338 <_vfiprintf_r+0x78> 8015462: 460c mov r4, r1 8015464: 2001 movs r0, #1 8015466: fb0c 3202 mla r2, ip, r2, r3 801546a: e7a8 b.n 80153be <_vfiprintf_r+0xfe> 801546c: 2300 movs r3, #0 801546e: f04f 0c0a mov.w ip, #10 8015472: 4619 mov r1, r3 8015474: 3401 adds r4, #1 8015476: 9305 str r3, [sp, #20] 8015478: 4620 mov r0, r4 801547a: f810 2b01 ldrb.w r2, [r0], #1 801547e: 3a30 subs r2, #48 @ 0x30 8015480: 2a09 cmp r2, #9 8015482: d903 bls.n 801548c <_vfiprintf_r+0x1cc> 8015484: 2b00 cmp r3, #0 8015486: d0c6 beq.n 8015416 <_vfiprintf_r+0x156> 8015488: 9105 str r1, [sp, #20] 801548a: e7c4 b.n 8015416 <_vfiprintf_r+0x156> 801548c: 4604 mov r4, r0 801548e: 2301 movs r3, #1 8015490: fb0c 2101 mla r1, ip, r1, r2 8015494: e7f0 b.n 8015478 <_vfiprintf_r+0x1b8> 8015496: ab03 add r3, sp, #12 8015498: 9300 str r3, [sp, #0] 801549a: 462a mov r2, r5 801549c: 4630 mov r0, r6 801549e: 4b13 ldr r3, [pc, #76] @ (80154ec <_vfiprintf_r+0x22c>) 80154a0: a904 add r1, sp, #16 80154a2: f7fe f929 bl 80136f8 <_printf_float> 80154a6: 4607 mov r7, r0 80154a8: 1c78 adds r0, r7, #1 80154aa: d1d6 bne.n 801545a <_vfiprintf_r+0x19a> 80154ac: 6e6b ldr r3, [r5, #100] @ 0x64 80154ae: 07d9 lsls r1, r3, #31 80154b0: d405 bmi.n 80154be <_vfiprintf_r+0x1fe> 80154b2: 89ab ldrh r3, [r5, #12] 80154b4: 059a lsls r2, r3, #22 80154b6: d402 bmi.n 80154be <_vfiprintf_r+0x1fe> 80154b8: 6da8 ldr r0, [r5, #88] @ 0x58 80154ba: f7fe fee3 bl 8014284 <__retarget_lock_release_recursive> 80154be: 89ab ldrh r3, [r5, #12] 80154c0: 065b lsls r3, r3, #25 80154c2: f53f af1f bmi.w 8015304 <_vfiprintf_r+0x44> 80154c6: 9809 ldr r0, [sp, #36] @ 0x24 80154c8: e71e b.n 8015308 <_vfiprintf_r+0x48> 80154ca: ab03 add r3, sp, #12 80154cc: 9300 str r3, [sp, #0] 80154ce: 462a mov r2, r5 80154d0: 4630 mov r0, r6 80154d2: 4b06 ldr r3, [pc, #24] @ (80154ec <_vfiprintf_r+0x22c>) 80154d4: a904 add r1, sp, #16 80154d6: f7fe fbad bl 8013c34 <_printf_i> 80154da: e7e4 b.n 80154a6 <_vfiprintf_r+0x1e6> 80154dc: 08016d79 .word 0x08016d79 80154e0: 08016d7f .word 0x08016d7f 80154e4: 08016d83 .word 0x08016d83 80154e8: 080136f9 .word 0x080136f9 80154ec: 0801529b .word 0x0801529b 080154f0 : 80154f0: 4b02 ldr r3, [pc, #8] @ (80154fc ) 80154f2: 4601 mov r1, r0 80154f4: 6818 ldr r0, [r3, #0] 80154f6: f000 b825 b.w 8015544 <_malloc_r> 80154fa: bf00 nop 80154fc: 20000084 .word 0x20000084 08015500 : 8015500: b570 push {r4, r5, r6, lr} 8015502: 4e0f ldr r6, [pc, #60] @ (8015540 ) 8015504: 460c mov r4, r1 8015506: 6831 ldr r1, [r6, #0] 8015508: 4605 mov r5, r0 801550a: b911 cbnz r1, 8015512 801550c: f000 fe90 bl 8016230 <_sbrk_r> 8015510: 6030 str r0, [r6, #0] 8015512: 4621 mov r1, r4 8015514: 4628 mov r0, r5 8015516: f000 fe8b bl 8016230 <_sbrk_r> 801551a: 1c43 adds r3, r0, #1 801551c: d103 bne.n 8015526 801551e: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff 8015522: 4620 mov r0, r4 8015524: bd70 pop {r4, r5, r6, pc} 8015526: 1cc4 adds r4, r0, #3 8015528: f024 0403 bic.w r4, r4, #3 801552c: 42a0 cmp r0, r4 801552e: d0f8 beq.n 8015522 8015530: 1a21 subs r1, r4, r0 8015532: 4628 mov r0, r5 8015534: f000 fe7c bl 8016230 <_sbrk_r> 8015538: 3001 adds r0, #1 801553a: d1f2 bne.n 8015522 801553c: e7ef b.n 801551e 801553e: bf00 nop 8015540: 20000fa4 .word 0x20000fa4 08015544 <_malloc_r>: 8015544: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8015548: 1ccd adds r5, r1, #3 801554a: f025 0503 bic.w r5, r5, #3 801554e: 3508 adds r5, #8 8015550: 2d0c cmp r5, #12 8015552: bf38 it cc 8015554: 250c movcc r5, #12 8015556: 2d00 cmp r5, #0 8015558: 4606 mov r6, r0 801555a: db01 blt.n 8015560 <_malloc_r+0x1c> 801555c: 42a9 cmp r1, r5 801555e: d904 bls.n 801556a <_malloc_r+0x26> 8015560: 230c movs r3, #12 8015562: 6033 str r3, [r6, #0] 8015564: 2000 movs r0, #0 8015566: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 801556a: f8df 80d4 ldr.w r8, [pc, #212] @ 8015640 <_malloc_r+0xfc> 801556e: f000 f911 bl 8015794 <__malloc_lock> 8015572: f8d8 3000 ldr.w r3, [r8] 8015576: 461c mov r4, r3 8015578: bb44 cbnz r4, 80155cc <_malloc_r+0x88> 801557a: 4629 mov r1, r5 801557c: 4630 mov r0, r6 801557e: f7ff ffbf bl 8015500 8015582: 1c43 adds r3, r0, #1 8015584: 4604 mov r4, r0 8015586: d158 bne.n 801563a <_malloc_r+0xf6> 8015588: f8d8 4000 ldr.w r4, [r8] 801558c: 4627 mov r7, r4 801558e: 2f00 cmp r7, #0 8015590: d143 bne.n 801561a <_malloc_r+0xd6> 8015592: 2c00 cmp r4, #0 8015594: d04b beq.n 801562e <_malloc_r+0xea> 8015596: 6823 ldr r3, [r4, #0] 8015598: 4639 mov r1, r7 801559a: 4630 mov r0, r6 801559c: eb04 0903 add.w r9, r4, r3 80155a0: f000 fe46 bl 8016230 <_sbrk_r> 80155a4: 4581 cmp r9, r0 80155a6: d142 bne.n 801562e <_malloc_r+0xea> 80155a8: 6821 ldr r1, [r4, #0] 80155aa: 4630 mov r0, r6 80155ac: 1a6d subs r5, r5, r1 80155ae: 4629 mov r1, r5 80155b0: f7ff ffa6 bl 8015500 80155b4: 3001 adds r0, #1 80155b6: d03a beq.n 801562e <_malloc_r+0xea> 80155b8: 6823 ldr r3, [r4, #0] 80155ba: 442b add r3, r5 80155bc: 6023 str r3, [r4, #0] 80155be: f8d8 3000 ldr.w r3, [r8] 80155c2: 685a ldr r2, [r3, #4] 80155c4: bb62 cbnz r2, 8015620 <_malloc_r+0xdc> 80155c6: f8c8 7000 str.w r7, [r8] 80155ca: e00f b.n 80155ec <_malloc_r+0xa8> 80155cc: 6822 ldr r2, [r4, #0] 80155ce: 1b52 subs r2, r2, r5 80155d0: d420 bmi.n 8015614 <_malloc_r+0xd0> 80155d2: 2a0b cmp r2, #11 80155d4: d917 bls.n 8015606 <_malloc_r+0xc2> 80155d6: 1961 adds r1, r4, r5 80155d8: 42a3 cmp r3, r4 80155da: 6025 str r5, [r4, #0] 80155dc: bf18 it ne 80155de: 6059 strne r1, [r3, #4] 80155e0: 6863 ldr r3, [r4, #4] 80155e2: bf08 it eq 80155e4: f8c8 1000 streq.w r1, [r8] 80155e8: 5162 str r2, [r4, r5] 80155ea: 604b str r3, [r1, #4] 80155ec: 4630 mov r0, r6 80155ee: f000 f8d7 bl 80157a0 <__malloc_unlock> 80155f2: f104 000b add.w r0, r4, #11 80155f6: 1d23 adds r3, r4, #4 80155f8: f020 0007 bic.w r0, r0, #7 80155fc: 1ac2 subs r2, r0, r3 80155fe: bf1c itt ne 8015600: 1a1b subne r3, r3, r0 8015602: 50a3 strne r3, [r4, r2] 8015604: e7af b.n 8015566 <_malloc_r+0x22> 8015606: 6862 ldr r2, [r4, #4] 8015608: 42a3 cmp r3, r4 801560a: bf0c ite eq 801560c: f8c8 2000 streq.w r2, [r8] 8015610: 605a strne r2, [r3, #4] 8015612: e7eb b.n 80155ec <_malloc_r+0xa8> 8015614: 4623 mov r3, r4 8015616: 6864 ldr r4, [r4, #4] 8015618: e7ae b.n 8015578 <_malloc_r+0x34> 801561a: 463c mov r4, r7 801561c: 687f ldr r7, [r7, #4] 801561e: e7b6 b.n 801558e <_malloc_r+0x4a> 8015620: 461a mov r2, r3 8015622: 685b ldr r3, [r3, #4] 8015624: 42a3 cmp r3, r4 8015626: d1fb bne.n 8015620 <_malloc_r+0xdc> 8015628: 2300 movs r3, #0 801562a: 6053 str r3, [r2, #4] 801562c: e7de b.n 80155ec <_malloc_r+0xa8> 801562e: 230c movs r3, #12 8015630: 4630 mov r0, r6 8015632: 6033 str r3, [r6, #0] 8015634: f000 f8b4 bl 80157a0 <__malloc_unlock> 8015638: e794 b.n 8015564 <_malloc_r+0x20> 801563a: 6005 str r5, [r0, #0] 801563c: e7d6 b.n 80155ec <_malloc_r+0xa8> 801563e: bf00 nop 8015640: 20000fa8 .word 0x20000fa8 08015644 <__sflush_r>: 8015644: f9b1 200c ldrsh.w r2, [r1, #12] 8015648: b5f8 push {r3, r4, r5, r6, r7, lr} 801564a: 0716 lsls r6, r2, #28 801564c: 4605 mov r5, r0 801564e: 460c mov r4, r1 8015650: d454 bmi.n 80156fc <__sflush_r+0xb8> 8015652: 684b ldr r3, [r1, #4] 8015654: 2b00 cmp r3, #0 8015656: dc02 bgt.n 801565e <__sflush_r+0x1a> 8015658: 6c0b ldr r3, [r1, #64] @ 0x40 801565a: 2b00 cmp r3, #0 801565c: dd48 ble.n 80156f0 <__sflush_r+0xac> 801565e: 6ae6 ldr r6, [r4, #44] @ 0x2c 8015660: 2e00 cmp r6, #0 8015662: d045 beq.n 80156f0 <__sflush_r+0xac> 8015664: 2300 movs r3, #0 8015666: f412 5280 ands.w r2, r2, #4096 @ 0x1000 801566a: 682f ldr r7, [r5, #0] 801566c: 6a21 ldr r1, [r4, #32] 801566e: 602b str r3, [r5, #0] 8015670: d030 beq.n 80156d4 <__sflush_r+0x90> 8015672: 6d62 ldr r2, [r4, #84] @ 0x54 8015674: 89a3 ldrh r3, [r4, #12] 8015676: 0759 lsls r1, r3, #29 8015678: d505 bpl.n 8015686 <__sflush_r+0x42> 801567a: 6863 ldr r3, [r4, #4] 801567c: 1ad2 subs r2, r2, r3 801567e: 6b63 ldr r3, [r4, #52] @ 0x34 8015680: b10b cbz r3, 8015686 <__sflush_r+0x42> 8015682: 6c23 ldr r3, [r4, #64] @ 0x40 8015684: 1ad2 subs r2, r2, r3 8015686: 2300 movs r3, #0 8015688: 4628 mov r0, r5 801568a: 6ae6 ldr r6, [r4, #44] @ 0x2c 801568c: 6a21 ldr r1, [r4, #32] 801568e: 47b0 blx r6 8015690: 1c43 adds r3, r0, #1 8015692: 89a3 ldrh r3, [r4, #12] 8015694: d106 bne.n 80156a4 <__sflush_r+0x60> 8015696: 6829 ldr r1, [r5, #0] 8015698: 291d cmp r1, #29 801569a: d82b bhi.n 80156f4 <__sflush_r+0xb0> 801569c: 4a28 ldr r2, [pc, #160] @ (8015740 <__sflush_r+0xfc>) 801569e: 40ca lsrs r2, r1 80156a0: 07d6 lsls r6, r2, #31 80156a2: d527 bpl.n 80156f4 <__sflush_r+0xb0> 80156a4: 2200 movs r2, #0 80156a6: 6062 str r2, [r4, #4] 80156a8: 6922 ldr r2, [r4, #16] 80156aa: 04d9 lsls r1, r3, #19 80156ac: 6022 str r2, [r4, #0] 80156ae: d504 bpl.n 80156ba <__sflush_r+0x76> 80156b0: 1c42 adds r2, r0, #1 80156b2: d101 bne.n 80156b8 <__sflush_r+0x74> 80156b4: 682b ldr r3, [r5, #0] 80156b6: b903 cbnz r3, 80156ba <__sflush_r+0x76> 80156b8: 6560 str r0, [r4, #84] @ 0x54 80156ba: 6b61 ldr r1, [r4, #52] @ 0x34 80156bc: 602f str r7, [r5, #0] 80156be: b1b9 cbz r1, 80156f0 <__sflush_r+0xac> 80156c0: f104 0344 add.w r3, r4, #68 @ 0x44 80156c4: 4299 cmp r1, r3 80156c6: d002 beq.n 80156ce <__sflush_r+0x8a> 80156c8: 4628 mov r0, r5 80156ca: f000 fe11 bl 80162f0 <_free_r> 80156ce: 2300 movs r3, #0 80156d0: 6363 str r3, [r4, #52] @ 0x34 80156d2: e00d b.n 80156f0 <__sflush_r+0xac> 80156d4: 2301 movs r3, #1 80156d6: 4628 mov r0, r5 80156d8: 47b0 blx r6 80156da: 4602 mov r2, r0 80156dc: 1c50 adds r0, r2, #1 80156de: d1c9 bne.n 8015674 <__sflush_r+0x30> 80156e0: 682b ldr r3, [r5, #0] 80156e2: 2b00 cmp r3, #0 80156e4: d0c6 beq.n 8015674 <__sflush_r+0x30> 80156e6: 2b1d cmp r3, #29 80156e8: d001 beq.n 80156ee <__sflush_r+0xaa> 80156ea: 2b16 cmp r3, #22 80156ec: d11d bne.n 801572a <__sflush_r+0xe6> 80156ee: 602f str r7, [r5, #0] 80156f0: 2000 movs r0, #0 80156f2: e021 b.n 8015738 <__sflush_r+0xf4> 80156f4: f043 0340 orr.w r3, r3, #64 @ 0x40 80156f8: b21b sxth r3, r3 80156fa: e01a b.n 8015732 <__sflush_r+0xee> 80156fc: 690f ldr r7, [r1, #16] 80156fe: 2f00 cmp r7, #0 8015700: d0f6 beq.n 80156f0 <__sflush_r+0xac> 8015702: 0793 lsls r3, r2, #30 8015704: bf18 it ne 8015706: 2300 movne r3, #0 8015708: 680e ldr r6, [r1, #0] 801570a: bf08 it eq 801570c: 694b ldreq r3, [r1, #20] 801570e: 1bf6 subs r6, r6, r7 8015710: 600f str r7, [r1, #0] 8015712: 608b str r3, [r1, #8] 8015714: 2e00 cmp r6, #0 8015716: ddeb ble.n 80156f0 <__sflush_r+0xac> 8015718: 4633 mov r3, r6 801571a: 463a mov r2, r7 801571c: 4628 mov r0, r5 801571e: 6a21 ldr r1, [r4, #32] 8015720: f8d4 c028 ldr.w ip, [r4, #40] @ 0x28 8015724: 47e0 blx ip 8015726: 2800 cmp r0, #0 8015728: dc07 bgt.n 801573a <__sflush_r+0xf6> 801572a: f9b4 300c ldrsh.w r3, [r4, #12] 801572e: f043 0340 orr.w r3, r3, #64 @ 0x40 8015732: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8015736: 81a3 strh r3, [r4, #12] 8015738: bdf8 pop {r3, r4, r5, r6, r7, pc} 801573a: 4407 add r7, r0 801573c: 1a36 subs r6, r6, r0 801573e: e7e9 b.n 8015714 <__sflush_r+0xd0> 8015740: 20400001 .word 0x20400001 08015744 <_fflush_r>: 8015744: b538 push {r3, r4, r5, lr} 8015746: 690b ldr r3, [r1, #16] 8015748: 4605 mov r5, r0 801574a: 460c mov r4, r1 801574c: b913 cbnz r3, 8015754 <_fflush_r+0x10> 801574e: 2500 movs r5, #0 8015750: 4628 mov r0, r5 8015752: bd38 pop {r3, r4, r5, pc} 8015754: b118 cbz r0, 801575e <_fflush_r+0x1a> 8015756: 6a03 ldr r3, [r0, #32] 8015758: b90b cbnz r3, 801575e <_fflush_r+0x1a> 801575a: f7fe fc15 bl 8013f88 <__sinit> 801575e: f9b4 300c ldrsh.w r3, [r4, #12] 8015762: 2b00 cmp r3, #0 8015764: d0f3 beq.n 801574e <_fflush_r+0xa> 8015766: 6e62 ldr r2, [r4, #100] @ 0x64 8015768: 07d0 lsls r0, r2, #31 801576a: d404 bmi.n 8015776 <_fflush_r+0x32> 801576c: 0599 lsls r1, r3, #22 801576e: d402 bmi.n 8015776 <_fflush_r+0x32> 8015770: 6da0 ldr r0, [r4, #88] @ 0x58 8015772: f7fe fd86 bl 8014282 <__retarget_lock_acquire_recursive> 8015776: 4628 mov r0, r5 8015778: 4621 mov r1, r4 801577a: f7ff ff63 bl 8015644 <__sflush_r> 801577e: 6e63 ldr r3, [r4, #100] @ 0x64 8015780: 4605 mov r5, r0 8015782: 07da lsls r2, r3, #31 8015784: d4e4 bmi.n 8015750 <_fflush_r+0xc> 8015786: 89a3 ldrh r3, [r4, #12] 8015788: 059b lsls r3, r3, #22 801578a: d4e1 bmi.n 8015750 <_fflush_r+0xc> 801578c: 6da0 ldr r0, [r4, #88] @ 0x58 801578e: f7fe fd79 bl 8014284 <__retarget_lock_release_recursive> 8015792: e7dd b.n 8015750 <_fflush_r+0xc> 08015794 <__malloc_lock>: 8015794: 4801 ldr r0, [pc, #4] @ (801579c <__malloc_lock+0x8>) 8015796: f7fe bd74 b.w 8014282 <__retarget_lock_acquire_recursive> 801579a: bf00 nop 801579c: 20000fa0 .word 0x20000fa0 080157a0 <__malloc_unlock>: 80157a0: 4801 ldr r0, [pc, #4] @ (80157a8 <__malloc_unlock+0x8>) 80157a2: f7fe bd6f b.w 8014284 <__retarget_lock_release_recursive> 80157a6: bf00 nop 80157a8: 20000fa0 .word 0x20000fa0 080157ac <_Balloc>: 80157ac: b570 push {r4, r5, r6, lr} 80157ae: 69c6 ldr r6, [r0, #28] 80157b0: 4604 mov r4, r0 80157b2: 460d mov r5, r1 80157b4: b976 cbnz r6, 80157d4 <_Balloc+0x28> 80157b6: 2010 movs r0, #16 80157b8: f7ff fe9a bl 80154f0 80157bc: 4602 mov r2, r0 80157be: 61e0 str r0, [r4, #28] 80157c0: b920 cbnz r0, 80157cc <_Balloc+0x20> 80157c2: 216b movs r1, #107 @ 0x6b 80157c4: 4b17 ldr r3, [pc, #92] @ (8015824 <_Balloc+0x78>) 80157c6: 4818 ldr r0, [pc, #96] @ (8015828 <_Balloc+0x7c>) 80157c8: f7fe fd7e bl 80142c8 <__assert_func> 80157cc: e9c0 6601 strd r6, r6, [r0, #4] 80157d0: 6006 str r6, [r0, #0] 80157d2: 60c6 str r6, [r0, #12] 80157d4: 69e6 ldr r6, [r4, #28] 80157d6: 68f3 ldr r3, [r6, #12] 80157d8: b183 cbz r3, 80157fc <_Balloc+0x50> 80157da: 69e3 ldr r3, [r4, #28] 80157dc: 68db ldr r3, [r3, #12] 80157de: f853 0025 ldr.w r0, [r3, r5, lsl #2] 80157e2: b9b8 cbnz r0, 8015814 <_Balloc+0x68> 80157e4: 2101 movs r1, #1 80157e6: fa01 f605 lsl.w r6, r1, r5 80157ea: 1d72 adds r2, r6, #5 80157ec: 4620 mov r0, r4 80157ee: 0092 lsls r2, r2, #2 80157f0: f000 fd69 bl 80162c6 <_calloc_r> 80157f4: b160 cbz r0, 8015810 <_Balloc+0x64> 80157f6: e9c0 5601 strd r5, r6, [r0, #4] 80157fa: e00e b.n 801581a <_Balloc+0x6e> 80157fc: 2221 movs r2, #33 @ 0x21 80157fe: 2104 movs r1, #4 8015800: 4620 mov r0, r4 8015802: f000 fd60 bl 80162c6 <_calloc_r> 8015806: 69e3 ldr r3, [r4, #28] 8015808: 60f0 str r0, [r6, #12] 801580a: 68db ldr r3, [r3, #12] 801580c: 2b00 cmp r3, #0 801580e: d1e4 bne.n 80157da <_Balloc+0x2e> 8015810: 2000 movs r0, #0 8015812: bd70 pop {r4, r5, r6, pc} 8015814: 6802 ldr r2, [r0, #0] 8015816: f843 2025 str.w r2, [r3, r5, lsl #2] 801581a: 2300 movs r3, #0 801581c: e9c0 3303 strd r3, r3, [r0, #12] 8015820: e7f7 b.n 8015812 <_Balloc+0x66> 8015822: bf00 nop 8015824: 08016c58 .word 0x08016c58 8015828: 08016d8a .word 0x08016d8a 0801582c <_Bfree>: 801582c: b570 push {r4, r5, r6, lr} 801582e: 69c6 ldr r6, [r0, #28] 8015830: 4605 mov r5, r0 8015832: 460c mov r4, r1 8015834: b976 cbnz r6, 8015854 <_Bfree+0x28> 8015836: 2010 movs r0, #16 8015838: f7ff fe5a bl 80154f0 801583c: 4602 mov r2, r0 801583e: 61e8 str r0, [r5, #28] 8015840: b920 cbnz r0, 801584c <_Bfree+0x20> 8015842: 218f movs r1, #143 @ 0x8f 8015844: 4b08 ldr r3, [pc, #32] @ (8015868 <_Bfree+0x3c>) 8015846: 4809 ldr r0, [pc, #36] @ (801586c <_Bfree+0x40>) 8015848: f7fe fd3e bl 80142c8 <__assert_func> 801584c: e9c0 6601 strd r6, r6, [r0, #4] 8015850: 6006 str r6, [r0, #0] 8015852: 60c6 str r6, [r0, #12] 8015854: b13c cbz r4, 8015866 <_Bfree+0x3a> 8015856: 69eb ldr r3, [r5, #28] 8015858: 6862 ldr r2, [r4, #4] 801585a: 68db ldr r3, [r3, #12] 801585c: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8015860: 6021 str r1, [r4, #0] 8015862: f843 4022 str.w r4, [r3, r2, lsl #2] 8015866: bd70 pop {r4, r5, r6, pc} 8015868: 08016c58 .word 0x08016c58 801586c: 08016d8a .word 0x08016d8a 08015870 <__multadd>: 8015870: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8015874: 4607 mov r7, r0 8015876: 460c mov r4, r1 8015878: 461e mov r6, r3 801587a: 2000 movs r0, #0 801587c: 690d ldr r5, [r1, #16] 801587e: f101 0c14 add.w ip, r1, #20 8015882: f8dc 3000 ldr.w r3, [ip] 8015886: 3001 adds r0, #1 8015888: b299 uxth r1, r3 801588a: fb02 6101 mla r1, r2, r1, r6 801588e: 0c1e lsrs r6, r3, #16 8015890: 0c0b lsrs r3, r1, #16 8015892: fb02 3306 mla r3, r2, r6, r3 8015896: b289 uxth r1, r1 8015898: eb01 4103 add.w r1, r1, r3, lsl #16 801589c: 4285 cmp r5, r0 801589e: ea4f 4613 mov.w r6, r3, lsr #16 80158a2: f84c 1b04 str.w r1, [ip], #4 80158a6: dcec bgt.n 8015882 <__multadd+0x12> 80158a8: b30e cbz r6, 80158ee <__multadd+0x7e> 80158aa: 68a3 ldr r3, [r4, #8] 80158ac: 42ab cmp r3, r5 80158ae: dc19 bgt.n 80158e4 <__multadd+0x74> 80158b0: 6861 ldr r1, [r4, #4] 80158b2: 4638 mov r0, r7 80158b4: 3101 adds r1, #1 80158b6: f7ff ff79 bl 80157ac <_Balloc> 80158ba: 4680 mov r8, r0 80158bc: b928 cbnz r0, 80158ca <__multadd+0x5a> 80158be: 4602 mov r2, r0 80158c0: 21ba movs r1, #186 @ 0xba 80158c2: 4b0c ldr r3, [pc, #48] @ (80158f4 <__multadd+0x84>) 80158c4: 480c ldr r0, [pc, #48] @ (80158f8 <__multadd+0x88>) 80158c6: f7fe fcff bl 80142c8 <__assert_func> 80158ca: 6922 ldr r2, [r4, #16] 80158cc: f104 010c add.w r1, r4, #12 80158d0: 3202 adds r2, #2 80158d2: 0092 lsls r2, r2, #2 80158d4: 300c adds r0, #12 80158d6: f7fe fce9 bl 80142ac 80158da: 4621 mov r1, r4 80158dc: 4638 mov r0, r7 80158de: f7ff ffa5 bl 801582c <_Bfree> 80158e2: 4644 mov r4, r8 80158e4: eb04 0385 add.w r3, r4, r5, lsl #2 80158e8: 3501 adds r5, #1 80158ea: 615e str r6, [r3, #20] 80158ec: 6125 str r5, [r4, #16] 80158ee: 4620 mov r0, r4 80158f0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80158f4: 08016d68 .word 0x08016d68 80158f8: 08016d8a .word 0x08016d8a 080158fc <__hi0bits>: 80158fc: 4603 mov r3, r0 80158fe: f5b0 3f80 cmp.w r0, #65536 @ 0x10000 8015902: bf3a itte cc 8015904: 0403 lslcc r3, r0, #16 8015906: 2010 movcc r0, #16 8015908: 2000 movcs r0, #0 801590a: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 801590e: bf3c itt cc 8015910: 021b lslcc r3, r3, #8 8015912: 3008 addcc r0, #8 8015914: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000 8015918: bf3c itt cc 801591a: 011b lslcc r3, r3, #4 801591c: 3004 addcc r0, #4 801591e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8015922: bf3c itt cc 8015924: 009b lslcc r3, r3, #2 8015926: 3002 addcc r0, #2 8015928: 2b00 cmp r3, #0 801592a: db05 blt.n 8015938 <__hi0bits+0x3c> 801592c: f013 4f80 tst.w r3, #1073741824 @ 0x40000000 8015930: f100 0001 add.w r0, r0, #1 8015934: bf08 it eq 8015936: 2020 moveq r0, #32 8015938: 4770 bx lr 0801593a <__lo0bits>: 801593a: 6803 ldr r3, [r0, #0] 801593c: 4602 mov r2, r0 801593e: f013 0007 ands.w r0, r3, #7 8015942: d00b beq.n 801595c <__lo0bits+0x22> 8015944: 07d9 lsls r1, r3, #31 8015946: d421 bmi.n 801598c <__lo0bits+0x52> 8015948: 0798 lsls r0, r3, #30 801594a: bf49 itett mi 801594c: 085b lsrmi r3, r3, #1 801594e: 089b lsrpl r3, r3, #2 8015950: 2001 movmi r0, #1 8015952: 6013 strmi r3, [r2, #0] 8015954: bf5c itt pl 8015956: 2002 movpl r0, #2 8015958: 6013 strpl r3, [r2, #0] 801595a: 4770 bx lr 801595c: b299 uxth r1, r3 801595e: b909 cbnz r1, 8015964 <__lo0bits+0x2a> 8015960: 2010 movs r0, #16 8015962: 0c1b lsrs r3, r3, #16 8015964: b2d9 uxtb r1, r3 8015966: b909 cbnz r1, 801596c <__lo0bits+0x32> 8015968: 3008 adds r0, #8 801596a: 0a1b lsrs r3, r3, #8 801596c: 0719 lsls r1, r3, #28 801596e: bf04 itt eq 8015970: 091b lsreq r3, r3, #4 8015972: 3004 addeq r0, #4 8015974: 0799 lsls r1, r3, #30 8015976: bf04 itt eq 8015978: 089b lsreq r3, r3, #2 801597a: 3002 addeq r0, #2 801597c: 07d9 lsls r1, r3, #31 801597e: d403 bmi.n 8015988 <__lo0bits+0x4e> 8015980: 085b lsrs r3, r3, #1 8015982: f100 0001 add.w r0, r0, #1 8015986: d003 beq.n 8015990 <__lo0bits+0x56> 8015988: 6013 str r3, [r2, #0] 801598a: 4770 bx lr 801598c: 2000 movs r0, #0 801598e: 4770 bx lr 8015990: 2020 movs r0, #32 8015992: 4770 bx lr 08015994 <__i2b>: 8015994: b510 push {r4, lr} 8015996: 460c mov r4, r1 8015998: 2101 movs r1, #1 801599a: f7ff ff07 bl 80157ac <_Balloc> 801599e: 4602 mov r2, r0 80159a0: b928 cbnz r0, 80159ae <__i2b+0x1a> 80159a2: f240 1145 movw r1, #325 @ 0x145 80159a6: 4b04 ldr r3, [pc, #16] @ (80159b8 <__i2b+0x24>) 80159a8: 4804 ldr r0, [pc, #16] @ (80159bc <__i2b+0x28>) 80159aa: f7fe fc8d bl 80142c8 <__assert_func> 80159ae: 2301 movs r3, #1 80159b0: 6144 str r4, [r0, #20] 80159b2: 6103 str r3, [r0, #16] 80159b4: bd10 pop {r4, pc} 80159b6: bf00 nop 80159b8: 08016d68 .word 0x08016d68 80159bc: 08016d8a .word 0x08016d8a 080159c0 <__multiply>: 80159c0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80159c4: 4617 mov r7, r2 80159c6: 690a ldr r2, [r1, #16] 80159c8: 693b ldr r3, [r7, #16] 80159ca: 4689 mov r9, r1 80159cc: 429a cmp r2, r3 80159ce: bfa2 ittt ge 80159d0: 463b movge r3, r7 80159d2: 460f movge r7, r1 80159d4: 4699 movge r9, r3 80159d6: 693d ldr r5, [r7, #16] 80159d8: f8d9 a010 ldr.w sl, [r9, #16] 80159dc: 68bb ldr r3, [r7, #8] 80159de: 6879 ldr r1, [r7, #4] 80159e0: eb05 060a add.w r6, r5, sl 80159e4: 42b3 cmp r3, r6 80159e6: b085 sub sp, #20 80159e8: bfb8 it lt 80159ea: 3101 addlt r1, #1 80159ec: f7ff fede bl 80157ac <_Balloc> 80159f0: b930 cbnz r0, 8015a00 <__multiply+0x40> 80159f2: 4602 mov r2, r0 80159f4: f44f 71b1 mov.w r1, #354 @ 0x162 80159f8: 4b40 ldr r3, [pc, #256] @ (8015afc <__multiply+0x13c>) 80159fa: 4841 ldr r0, [pc, #260] @ (8015b00 <__multiply+0x140>) 80159fc: f7fe fc64 bl 80142c8 <__assert_func> 8015a00: f100 0414 add.w r4, r0, #20 8015a04: 4623 mov r3, r4 8015a06: 2200 movs r2, #0 8015a08: eb04 0e86 add.w lr, r4, r6, lsl #2 8015a0c: 4573 cmp r3, lr 8015a0e: d320 bcc.n 8015a52 <__multiply+0x92> 8015a10: f107 0814 add.w r8, r7, #20 8015a14: f109 0114 add.w r1, r9, #20 8015a18: eb08 0585 add.w r5, r8, r5, lsl #2 8015a1c: eb01 038a add.w r3, r1, sl, lsl #2 8015a20: 9302 str r3, [sp, #8] 8015a22: 1beb subs r3, r5, r7 8015a24: 3b15 subs r3, #21 8015a26: f023 0303 bic.w r3, r3, #3 8015a2a: 3304 adds r3, #4 8015a2c: 3715 adds r7, #21 8015a2e: 42bd cmp r5, r7 8015a30: bf38 it cc 8015a32: 2304 movcc r3, #4 8015a34: 9301 str r3, [sp, #4] 8015a36: 9b02 ldr r3, [sp, #8] 8015a38: 9103 str r1, [sp, #12] 8015a3a: 428b cmp r3, r1 8015a3c: d80c bhi.n 8015a58 <__multiply+0x98> 8015a3e: 2e00 cmp r6, #0 8015a40: dd03 ble.n 8015a4a <__multiply+0x8a> 8015a42: f85e 3d04 ldr.w r3, [lr, #-4]! 8015a46: 2b00 cmp r3, #0 8015a48: d055 beq.n 8015af6 <__multiply+0x136> 8015a4a: 6106 str r6, [r0, #16] 8015a4c: b005 add sp, #20 8015a4e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8015a52: f843 2b04 str.w r2, [r3], #4 8015a56: e7d9 b.n 8015a0c <__multiply+0x4c> 8015a58: f8b1 a000 ldrh.w sl, [r1] 8015a5c: f1ba 0f00 cmp.w sl, #0 8015a60: d01f beq.n 8015aa2 <__multiply+0xe2> 8015a62: 46c4 mov ip, r8 8015a64: 46a1 mov r9, r4 8015a66: 2700 movs r7, #0 8015a68: f85c 2b04 ldr.w r2, [ip], #4 8015a6c: f8d9 3000 ldr.w r3, [r9] 8015a70: fa1f fb82 uxth.w fp, r2 8015a74: b29b uxth r3, r3 8015a76: fb0a 330b mla r3, sl, fp, r3 8015a7a: 443b add r3, r7 8015a7c: f8d9 7000 ldr.w r7, [r9] 8015a80: 0c12 lsrs r2, r2, #16 8015a82: 0c3f lsrs r7, r7, #16 8015a84: fb0a 7202 mla r2, sl, r2, r7 8015a88: eb02 4213 add.w r2, r2, r3, lsr #16 8015a8c: b29b uxth r3, r3 8015a8e: ea43 4302 orr.w r3, r3, r2, lsl #16 8015a92: 4565 cmp r5, ip 8015a94: ea4f 4712 mov.w r7, r2, lsr #16 8015a98: f849 3b04 str.w r3, [r9], #4 8015a9c: d8e4 bhi.n 8015a68 <__multiply+0xa8> 8015a9e: 9b01 ldr r3, [sp, #4] 8015aa0: 50e7 str r7, [r4, r3] 8015aa2: 9b03 ldr r3, [sp, #12] 8015aa4: 3104 adds r1, #4 8015aa6: f8b3 9002 ldrh.w r9, [r3, #2] 8015aaa: f1b9 0f00 cmp.w r9, #0 8015aae: d020 beq.n 8015af2 <__multiply+0x132> 8015ab0: 4647 mov r7, r8 8015ab2: 46a4 mov ip, r4 8015ab4: f04f 0a00 mov.w sl, #0 8015ab8: 6823 ldr r3, [r4, #0] 8015aba: f8b7 b000 ldrh.w fp, [r7] 8015abe: f8bc 2002 ldrh.w r2, [ip, #2] 8015ac2: b29b uxth r3, r3 8015ac4: fb09 220b mla r2, r9, fp, r2 8015ac8: 4452 add r2, sl 8015aca: ea43 4302 orr.w r3, r3, r2, lsl #16 8015ace: f84c 3b04 str.w r3, [ip], #4 8015ad2: f857 3b04 ldr.w r3, [r7], #4 8015ad6: ea4f 4a13 mov.w sl, r3, lsr #16 8015ada: f8bc 3000 ldrh.w r3, [ip] 8015ade: 42bd cmp r5, r7 8015ae0: fb09 330a mla r3, r9, sl, r3 8015ae4: eb03 4312 add.w r3, r3, r2, lsr #16 8015ae8: ea4f 4a13 mov.w sl, r3, lsr #16 8015aec: d8e5 bhi.n 8015aba <__multiply+0xfa> 8015aee: 9a01 ldr r2, [sp, #4] 8015af0: 50a3 str r3, [r4, r2] 8015af2: 3404 adds r4, #4 8015af4: e79f b.n 8015a36 <__multiply+0x76> 8015af6: 3e01 subs r6, #1 8015af8: e7a1 b.n 8015a3e <__multiply+0x7e> 8015afa: bf00 nop 8015afc: 08016d68 .word 0x08016d68 8015b00: 08016d8a .word 0x08016d8a 08015b04 <__pow5mult>: 8015b04: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8015b08: 4615 mov r5, r2 8015b0a: f012 0203 ands.w r2, r2, #3 8015b0e: 4607 mov r7, r0 8015b10: 460e mov r6, r1 8015b12: d007 beq.n 8015b24 <__pow5mult+0x20> 8015b14: 4c25 ldr r4, [pc, #148] @ (8015bac <__pow5mult+0xa8>) 8015b16: 3a01 subs r2, #1 8015b18: 2300 movs r3, #0 8015b1a: f854 2022 ldr.w r2, [r4, r2, lsl #2] 8015b1e: f7ff fea7 bl 8015870 <__multadd> 8015b22: 4606 mov r6, r0 8015b24: 10ad asrs r5, r5, #2 8015b26: d03d beq.n 8015ba4 <__pow5mult+0xa0> 8015b28: 69fc ldr r4, [r7, #28] 8015b2a: b97c cbnz r4, 8015b4c <__pow5mult+0x48> 8015b2c: 2010 movs r0, #16 8015b2e: f7ff fcdf bl 80154f0 8015b32: 4602 mov r2, r0 8015b34: 61f8 str r0, [r7, #28] 8015b36: b928 cbnz r0, 8015b44 <__pow5mult+0x40> 8015b38: f240 11b3 movw r1, #435 @ 0x1b3 8015b3c: 4b1c ldr r3, [pc, #112] @ (8015bb0 <__pow5mult+0xac>) 8015b3e: 481d ldr r0, [pc, #116] @ (8015bb4 <__pow5mult+0xb0>) 8015b40: f7fe fbc2 bl 80142c8 <__assert_func> 8015b44: e9c0 4401 strd r4, r4, [r0, #4] 8015b48: 6004 str r4, [r0, #0] 8015b4a: 60c4 str r4, [r0, #12] 8015b4c: f8d7 801c ldr.w r8, [r7, #28] 8015b50: f8d8 4008 ldr.w r4, [r8, #8] 8015b54: b94c cbnz r4, 8015b6a <__pow5mult+0x66> 8015b56: f240 2171 movw r1, #625 @ 0x271 8015b5a: 4638 mov r0, r7 8015b5c: f7ff ff1a bl 8015994 <__i2b> 8015b60: 2300 movs r3, #0 8015b62: 4604 mov r4, r0 8015b64: f8c8 0008 str.w r0, [r8, #8] 8015b68: 6003 str r3, [r0, #0] 8015b6a: f04f 0900 mov.w r9, #0 8015b6e: 07eb lsls r3, r5, #31 8015b70: d50a bpl.n 8015b88 <__pow5mult+0x84> 8015b72: 4631 mov r1, r6 8015b74: 4622 mov r2, r4 8015b76: 4638 mov r0, r7 8015b78: f7ff ff22 bl 80159c0 <__multiply> 8015b7c: 4680 mov r8, r0 8015b7e: 4631 mov r1, r6 8015b80: 4638 mov r0, r7 8015b82: f7ff fe53 bl 801582c <_Bfree> 8015b86: 4646 mov r6, r8 8015b88: 106d asrs r5, r5, #1 8015b8a: d00b beq.n 8015ba4 <__pow5mult+0xa0> 8015b8c: 6820 ldr r0, [r4, #0] 8015b8e: b938 cbnz r0, 8015ba0 <__pow5mult+0x9c> 8015b90: 4622 mov r2, r4 8015b92: 4621 mov r1, r4 8015b94: 4638 mov r0, r7 8015b96: f7ff ff13 bl 80159c0 <__multiply> 8015b9a: 6020 str r0, [r4, #0] 8015b9c: f8c0 9000 str.w r9, [r0] 8015ba0: 4604 mov r4, r0 8015ba2: e7e4 b.n 8015b6e <__pow5mult+0x6a> 8015ba4: 4630 mov r0, r6 8015ba6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8015baa: bf00 nop 8015bac: 08016df0 .word 0x08016df0 8015bb0: 08016c58 .word 0x08016c58 8015bb4: 08016d8a .word 0x08016d8a 08015bb8 <__lshift>: 8015bb8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8015bbc: 460c mov r4, r1 8015bbe: 4607 mov r7, r0 8015bc0: 4691 mov r9, r2 8015bc2: 6923 ldr r3, [r4, #16] 8015bc4: 6849 ldr r1, [r1, #4] 8015bc6: eb03 1862 add.w r8, r3, r2, asr #5 8015bca: 68a3 ldr r3, [r4, #8] 8015bcc: ea4f 1a62 mov.w sl, r2, asr #5 8015bd0: f108 0601 add.w r6, r8, #1 8015bd4: 42b3 cmp r3, r6 8015bd6: db0b blt.n 8015bf0 <__lshift+0x38> 8015bd8: 4638 mov r0, r7 8015bda: f7ff fde7 bl 80157ac <_Balloc> 8015bde: 4605 mov r5, r0 8015be0: b948 cbnz r0, 8015bf6 <__lshift+0x3e> 8015be2: 4602 mov r2, r0 8015be4: f44f 71ef mov.w r1, #478 @ 0x1de 8015be8: 4b27 ldr r3, [pc, #156] @ (8015c88 <__lshift+0xd0>) 8015bea: 4828 ldr r0, [pc, #160] @ (8015c8c <__lshift+0xd4>) 8015bec: f7fe fb6c bl 80142c8 <__assert_func> 8015bf0: 3101 adds r1, #1 8015bf2: 005b lsls r3, r3, #1 8015bf4: e7ee b.n 8015bd4 <__lshift+0x1c> 8015bf6: 2300 movs r3, #0 8015bf8: f100 0114 add.w r1, r0, #20 8015bfc: f100 0210 add.w r2, r0, #16 8015c00: 4618 mov r0, r3 8015c02: 4553 cmp r3, sl 8015c04: db33 blt.n 8015c6e <__lshift+0xb6> 8015c06: 6920 ldr r0, [r4, #16] 8015c08: ea2a 7aea bic.w sl, sl, sl, asr #31 8015c0c: f104 0314 add.w r3, r4, #20 8015c10: f019 091f ands.w r9, r9, #31 8015c14: eb01 018a add.w r1, r1, sl, lsl #2 8015c18: eb03 0c80 add.w ip, r3, r0, lsl #2 8015c1c: d02b beq.n 8015c76 <__lshift+0xbe> 8015c1e: 468a mov sl, r1 8015c20: 2200 movs r2, #0 8015c22: f1c9 0e20 rsb lr, r9, #32 8015c26: 6818 ldr r0, [r3, #0] 8015c28: fa00 f009 lsl.w r0, r0, r9 8015c2c: 4310 orrs r0, r2 8015c2e: f84a 0b04 str.w r0, [sl], #4 8015c32: f853 2b04 ldr.w r2, [r3], #4 8015c36: 459c cmp ip, r3 8015c38: fa22 f20e lsr.w r2, r2, lr 8015c3c: d8f3 bhi.n 8015c26 <__lshift+0x6e> 8015c3e: ebac 0304 sub.w r3, ip, r4 8015c42: 3b15 subs r3, #21 8015c44: f023 0303 bic.w r3, r3, #3 8015c48: 3304 adds r3, #4 8015c4a: f104 0015 add.w r0, r4, #21 8015c4e: 4560 cmp r0, ip 8015c50: bf88 it hi 8015c52: 2304 movhi r3, #4 8015c54: 50ca str r2, [r1, r3] 8015c56: b10a cbz r2, 8015c5c <__lshift+0xa4> 8015c58: f108 0602 add.w r6, r8, #2 8015c5c: 3e01 subs r6, #1 8015c5e: 4638 mov r0, r7 8015c60: 4621 mov r1, r4 8015c62: 612e str r6, [r5, #16] 8015c64: f7ff fde2 bl 801582c <_Bfree> 8015c68: 4628 mov r0, r5 8015c6a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8015c6e: f842 0f04 str.w r0, [r2, #4]! 8015c72: 3301 adds r3, #1 8015c74: e7c5 b.n 8015c02 <__lshift+0x4a> 8015c76: 3904 subs r1, #4 8015c78: f853 2b04 ldr.w r2, [r3], #4 8015c7c: 459c cmp ip, r3 8015c7e: f841 2f04 str.w r2, [r1, #4]! 8015c82: d8f9 bhi.n 8015c78 <__lshift+0xc0> 8015c84: e7ea b.n 8015c5c <__lshift+0xa4> 8015c86: bf00 nop 8015c88: 08016d68 .word 0x08016d68 8015c8c: 08016d8a .word 0x08016d8a 08015c90 <__mcmp>: 8015c90: 4603 mov r3, r0 8015c92: 690a ldr r2, [r1, #16] 8015c94: 6900 ldr r0, [r0, #16] 8015c96: b530 push {r4, r5, lr} 8015c98: 1a80 subs r0, r0, r2 8015c9a: d10e bne.n 8015cba <__mcmp+0x2a> 8015c9c: 3314 adds r3, #20 8015c9e: 3114 adds r1, #20 8015ca0: eb03 0482 add.w r4, r3, r2, lsl #2 8015ca4: eb01 0182 add.w r1, r1, r2, lsl #2 8015ca8: f854 5d04 ldr.w r5, [r4, #-4]! 8015cac: f851 2d04 ldr.w r2, [r1, #-4]! 8015cb0: 4295 cmp r5, r2 8015cb2: d003 beq.n 8015cbc <__mcmp+0x2c> 8015cb4: d205 bcs.n 8015cc2 <__mcmp+0x32> 8015cb6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8015cba: bd30 pop {r4, r5, pc} 8015cbc: 42a3 cmp r3, r4 8015cbe: d3f3 bcc.n 8015ca8 <__mcmp+0x18> 8015cc0: e7fb b.n 8015cba <__mcmp+0x2a> 8015cc2: 2001 movs r0, #1 8015cc4: e7f9 b.n 8015cba <__mcmp+0x2a> ... 08015cc8 <__mdiff>: 8015cc8: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8015ccc: 4689 mov r9, r1 8015cce: 4606 mov r6, r0 8015cd0: 4611 mov r1, r2 8015cd2: 4648 mov r0, r9 8015cd4: 4614 mov r4, r2 8015cd6: f7ff ffdb bl 8015c90 <__mcmp> 8015cda: 1e05 subs r5, r0, #0 8015cdc: d112 bne.n 8015d04 <__mdiff+0x3c> 8015cde: 4629 mov r1, r5 8015ce0: 4630 mov r0, r6 8015ce2: f7ff fd63 bl 80157ac <_Balloc> 8015ce6: 4602 mov r2, r0 8015ce8: b928 cbnz r0, 8015cf6 <__mdiff+0x2e> 8015cea: f240 2137 movw r1, #567 @ 0x237 8015cee: 4b3e ldr r3, [pc, #248] @ (8015de8 <__mdiff+0x120>) 8015cf0: 483e ldr r0, [pc, #248] @ (8015dec <__mdiff+0x124>) 8015cf2: f7fe fae9 bl 80142c8 <__assert_func> 8015cf6: 2301 movs r3, #1 8015cf8: e9c0 3504 strd r3, r5, [r0, #16] 8015cfc: 4610 mov r0, r2 8015cfe: b003 add sp, #12 8015d00: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8015d04: bfbc itt lt 8015d06: 464b movlt r3, r9 8015d08: 46a1 movlt r9, r4 8015d0a: 4630 mov r0, r6 8015d0c: f8d9 1004 ldr.w r1, [r9, #4] 8015d10: bfba itte lt 8015d12: 461c movlt r4, r3 8015d14: 2501 movlt r5, #1 8015d16: 2500 movge r5, #0 8015d18: f7ff fd48 bl 80157ac <_Balloc> 8015d1c: 4602 mov r2, r0 8015d1e: b918 cbnz r0, 8015d28 <__mdiff+0x60> 8015d20: f240 2145 movw r1, #581 @ 0x245 8015d24: 4b30 ldr r3, [pc, #192] @ (8015de8 <__mdiff+0x120>) 8015d26: e7e3 b.n 8015cf0 <__mdiff+0x28> 8015d28: f100 0b14 add.w fp, r0, #20 8015d2c: f8d9 7010 ldr.w r7, [r9, #16] 8015d30: f109 0310 add.w r3, r9, #16 8015d34: 60c5 str r5, [r0, #12] 8015d36: f04f 0c00 mov.w ip, #0 8015d3a: f109 0514 add.w r5, r9, #20 8015d3e: 46d9 mov r9, fp 8015d40: 6926 ldr r6, [r4, #16] 8015d42: f104 0e14 add.w lr, r4, #20 8015d46: eb05 0887 add.w r8, r5, r7, lsl #2 8015d4a: eb0e 0686 add.w r6, lr, r6, lsl #2 8015d4e: 9301 str r3, [sp, #4] 8015d50: 9b01 ldr r3, [sp, #4] 8015d52: f85e 0b04 ldr.w r0, [lr], #4 8015d56: f853 af04 ldr.w sl, [r3, #4]! 8015d5a: b281 uxth r1, r0 8015d5c: 9301 str r3, [sp, #4] 8015d5e: fa1f f38a uxth.w r3, sl 8015d62: 1a5b subs r3, r3, r1 8015d64: 0c00 lsrs r0, r0, #16 8015d66: 4463 add r3, ip 8015d68: ebc0 401a rsb r0, r0, sl, lsr #16 8015d6c: eb00 4023 add.w r0, r0, r3, asr #16 8015d70: b29b uxth r3, r3 8015d72: ea43 4300 orr.w r3, r3, r0, lsl #16 8015d76: 4576 cmp r6, lr 8015d78: ea4f 4c20 mov.w ip, r0, asr #16 8015d7c: f849 3b04 str.w r3, [r9], #4 8015d80: d8e6 bhi.n 8015d50 <__mdiff+0x88> 8015d82: 1b33 subs r3, r6, r4 8015d84: 3b15 subs r3, #21 8015d86: f023 0303 bic.w r3, r3, #3 8015d8a: 3415 adds r4, #21 8015d8c: 3304 adds r3, #4 8015d8e: 42a6 cmp r6, r4 8015d90: bf38 it cc 8015d92: 2304 movcc r3, #4 8015d94: 441d add r5, r3 8015d96: 445b add r3, fp 8015d98: 461e mov r6, r3 8015d9a: 462c mov r4, r5 8015d9c: 4544 cmp r4, r8 8015d9e: d30e bcc.n 8015dbe <__mdiff+0xf6> 8015da0: f108 0103 add.w r1, r8, #3 8015da4: 1b49 subs r1, r1, r5 8015da6: f021 0103 bic.w r1, r1, #3 8015daa: 3d03 subs r5, #3 8015dac: 45a8 cmp r8, r5 8015dae: bf38 it cc 8015db0: 2100 movcc r1, #0 8015db2: 440b add r3, r1 8015db4: f853 1d04 ldr.w r1, [r3, #-4]! 8015db8: b199 cbz r1, 8015de2 <__mdiff+0x11a> 8015dba: 6117 str r7, [r2, #16] 8015dbc: e79e b.n 8015cfc <__mdiff+0x34> 8015dbe: 46e6 mov lr, ip 8015dc0: f854 1b04 ldr.w r1, [r4], #4 8015dc4: fa1f fc81 uxth.w ip, r1 8015dc8: 44f4 add ip, lr 8015dca: 0c08 lsrs r0, r1, #16 8015dcc: 4471 add r1, lr 8015dce: eb00 402c add.w r0, r0, ip, asr #16 8015dd2: b289 uxth r1, r1 8015dd4: ea41 4100 orr.w r1, r1, r0, lsl #16 8015dd8: ea4f 4c20 mov.w ip, r0, asr #16 8015ddc: f846 1b04 str.w r1, [r6], #4 8015de0: e7dc b.n 8015d9c <__mdiff+0xd4> 8015de2: 3f01 subs r7, #1 8015de4: e7e6 b.n 8015db4 <__mdiff+0xec> 8015de6: bf00 nop 8015de8: 08016d68 .word 0x08016d68 8015dec: 08016d8a .word 0x08016d8a 08015df0 <__d2b>: 8015df0: e92d 4373 stmdb sp!, {r0, r1, r4, r5, r6, r8, r9, lr} 8015df4: 2101 movs r1, #1 8015df6: 4690 mov r8, r2 8015df8: 4699 mov r9, r3 8015dfa: 9e08 ldr r6, [sp, #32] 8015dfc: f7ff fcd6 bl 80157ac <_Balloc> 8015e00: 4604 mov r4, r0 8015e02: b930 cbnz r0, 8015e12 <__d2b+0x22> 8015e04: 4602 mov r2, r0 8015e06: f240 310f movw r1, #783 @ 0x30f 8015e0a: 4b23 ldr r3, [pc, #140] @ (8015e98 <__d2b+0xa8>) 8015e0c: 4823 ldr r0, [pc, #140] @ (8015e9c <__d2b+0xac>) 8015e0e: f7fe fa5b bl 80142c8 <__assert_func> 8015e12: f3c9 550a ubfx r5, r9, #20, #11 8015e16: f3c9 0313 ubfx r3, r9, #0, #20 8015e1a: b10d cbz r5, 8015e20 <__d2b+0x30> 8015e1c: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8015e20: 9301 str r3, [sp, #4] 8015e22: f1b8 0300 subs.w r3, r8, #0 8015e26: d024 beq.n 8015e72 <__d2b+0x82> 8015e28: 4668 mov r0, sp 8015e2a: 9300 str r3, [sp, #0] 8015e2c: f7ff fd85 bl 801593a <__lo0bits> 8015e30: e9dd 1200 ldrd r1, r2, [sp] 8015e34: b1d8 cbz r0, 8015e6e <__d2b+0x7e> 8015e36: f1c0 0320 rsb r3, r0, #32 8015e3a: fa02 f303 lsl.w r3, r2, r3 8015e3e: 430b orrs r3, r1 8015e40: 40c2 lsrs r2, r0 8015e42: 6163 str r3, [r4, #20] 8015e44: 9201 str r2, [sp, #4] 8015e46: 9b01 ldr r3, [sp, #4] 8015e48: 2b00 cmp r3, #0 8015e4a: bf0c ite eq 8015e4c: 2201 moveq r2, #1 8015e4e: 2202 movne r2, #2 8015e50: 61a3 str r3, [r4, #24] 8015e52: 6122 str r2, [r4, #16] 8015e54: b1ad cbz r5, 8015e82 <__d2b+0x92> 8015e56: f2a5 4533 subw r5, r5, #1075 @ 0x433 8015e5a: 4405 add r5, r0 8015e5c: 6035 str r5, [r6, #0] 8015e5e: f1c0 0035 rsb r0, r0, #53 @ 0x35 8015e62: 9b09 ldr r3, [sp, #36] @ 0x24 8015e64: 6018 str r0, [r3, #0] 8015e66: 4620 mov r0, r4 8015e68: b002 add sp, #8 8015e6a: e8bd 8370 ldmia.w sp!, {r4, r5, r6, r8, r9, pc} 8015e6e: 6161 str r1, [r4, #20] 8015e70: e7e9 b.n 8015e46 <__d2b+0x56> 8015e72: a801 add r0, sp, #4 8015e74: f7ff fd61 bl 801593a <__lo0bits> 8015e78: 9b01 ldr r3, [sp, #4] 8015e7a: 2201 movs r2, #1 8015e7c: 6163 str r3, [r4, #20] 8015e7e: 3020 adds r0, #32 8015e80: e7e7 b.n 8015e52 <__d2b+0x62> 8015e82: f2a0 4032 subw r0, r0, #1074 @ 0x432 8015e86: eb04 0382 add.w r3, r4, r2, lsl #2 8015e8a: 6030 str r0, [r6, #0] 8015e8c: 6918 ldr r0, [r3, #16] 8015e8e: f7ff fd35 bl 80158fc <__hi0bits> 8015e92: ebc0 1042 rsb r0, r0, r2, lsl #5 8015e96: e7e4 b.n 8015e62 <__d2b+0x72> 8015e98: 08016d68 .word 0x08016d68 8015e9c: 08016d8a .word 0x08016d8a 08015ea0 <__sread>: 8015ea0: b510 push {r4, lr} 8015ea2: 460c mov r4, r1 8015ea4: f9b1 100e ldrsh.w r1, [r1, #14] 8015ea8: f000 f9b0 bl 801620c <_read_r> 8015eac: 2800 cmp r0, #0 8015eae: bfab itete ge 8015eb0: 6d63 ldrge r3, [r4, #84] @ 0x54 8015eb2: 89a3 ldrhlt r3, [r4, #12] 8015eb4: 181b addge r3, r3, r0 8015eb6: f423 5380 biclt.w r3, r3, #4096 @ 0x1000 8015eba: bfac ite ge 8015ebc: 6563 strge r3, [r4, #84] @ 0x54 8015ebe: 81a3 strhlt r3, [r4, #12] 8015ec0: bd10 pop {r4, pc} 08015ec2 <__swrite>: 8015ec2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8015ec6: 461f mov r7, r3 8015ec8: 898b ldrh r3, [r1, #12] 8015eca: 4605 mov r5, r0 8015ecc: 05db lsls r3, r3, #23 8015ece: 460c mov r4, r1 8015ed0: 4616 mov r6, r2 8015ed2: d505 bpl.n 8015ee0 <__swrite+0x1e> 8015ed4: 2302 movs r3, #2 8015ed6: 2200 movs r2, #0 8015ed8: f9b1 100e ldrsh.w r1, [r1, #14] 8015edc: f000 f984 bl 80161e8 <_lseek_r> 8015ee0: 89a3 ldrh r3, [r4, #12] 8015ee2: 4632 mov r2, r6 8015ee4: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8015ee8: 81a3 strh r3, [r4, #12] 8015eea: 4628 mov r0, r5 8015eec: 463b mov r3, r7 8015eee: f9b4 100e ldrsh.w r1, [r4, #14] 8015ef2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8015ef6: f000 b9ab b.w 8016250 <_write_r> 08015efa <__sseek>: 8015efa: b510 push {r4, lr} 8015efc: 460c mov r4, r1 8015efe: f9b1 100e ldrsh.w r1, [r1, #14] 8015f02: f000 f971 bl 80161e8 <_lseek_r> 8015f06: 1c43 adds r3, r0, #1 8015f08: 89a3 ldrh r3, [r4, #12] 8015f0a: bf15 itete ne 8015f0c: 6560 strne r0, [r4, #84] @ 0x54 8015f0e: f423 5380 biceq.w r3, r3, #4096 @ 0x1000 8015f12: f443 5380 orrne.w r3, r3, #4096 @ 0x1000 8015f16: 81a3 strheq r3, [r4, #12] 8015f18: bf18 it ne 8015f1a: 81a3 strhne r3, [r4, #12] 8015f1c: bd10 pop {r4, pc} 08015f1e <__sclose>: 8015f1e: f9b1 100e ldrsh.w r1, [r1, #14] 8015f22: f000 b9a7 b.w 8016274 <_close_r> ... 08015f28 : 8015f28: b40e push {r1, r2, r3} 8015f2a: b503 push {r0, r1, lr} 8015f2c: 4601 mov r1, r0 8015f2e: ab03 add r3, sp, #12 8015f30: 4805 ldr r0, [pc, #20] @ (8015f48 ) 8015f32: f853 2b04 ldr.w r2, [r3], #4 8015f36: 6800 ldr r0, [r0, #0] 8015f38: 9301 str r3, [sp, #4] 8015f3a: f7ff f9c1 bl 80152c0 <_vfiprintf_r> 8015f3e: b002 add sp, #8 8015f40: f85d eb04 ldr.w lr, [sp], #4 8015f44: b003 add sp, #12 8015f46: 4770 bx lr 8015f48: 20000084 .word 0x20000084 08015f4c <_realloc_r>: 8015f4c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8015f50: 4607 mov r7, r0 8015f52: 4614 mov r4, r2 8015f54: 460d mov r5, r1 8015f56: b921 cbnz r1, 8015f62 <_realloc_r+0x16> 8015f58: 4611 mov r1, r2 8015f5a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8015f5e: f7ff baf1 b.w 8015544 <_malloc_r> 8015f62: b92a cbnz r2, 8015f70 <_realloc_r+0x24> 8015f64: f000 f9c4 bl 80162f0 <_free_r> 8015f68: 4625 mov r5, r4 8015f6a: 4628 mov r0, r5 8015f6c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8015f70: f000 fa18 bl 80163a4 <_malloc_usable_size_r> 8015f74: 4284 cmp r4, r0 8015f76: 4606 mov r6, r0 8015f78: d802 bhi.n 8015f80 <_realloc_r+0x34> 8015f7a: ebb4 0f50 cmp.w r4, r0, lsr #1 8015f7e: d8f4 bhi.n 8015f6a <_realloc_r+0x1e> 8015f80: 4621 mov r1, r4 8015f82: 4638 mov r0, r7 8015f84: f7ff fade bl 8015544 <_malloc_r> 8015f88: 4680 mov r8, r0 8015f8a: b908 cbnz r0, 8015f90 <_realloc_r+0x44> 8015f8c: 4645 mov r5, r8 8015f8e: e7ec b.n 8015f6a <_realloc_r+0x1e> 8015f90: 42b4 cmp r4, r6 8015f92: 4622 mov r2, r4 8015f94: 4629 mov r1, r5 8015f96: bf28 it cs 8015f98: 4632 movcs r2, r6 8015f9a: f7fe f987 bl 80142ac 8015f9e: 4629 mov r1, r5 8015fa0: 4638 mov r0, r7 8015fa2: f000 f9a5 bl 80162f0 <_free_r> 8015fa6: e7f1 b.n 8015f8c <_realloc_r+0x40> 08015fa8 <__swbuf_r>: 8015fa8: b5f8 push {r3, r4, r5, r6, r7, lr} 8015faa: 460e mov r6, r1 8015fac: 4614 mov r4, r2 8015fae: 4605 mov r5, r0 8015fb0: b118 cbz r0, 8015fba <__swbuf_r+0x12> 8015fb2: 6a03 ldr r3, [r0, #32] 8015fb4: b90b cbnz r3, 8015fba <__swbuf_r+0x12> 8015fb6: f7fd ffe7 bl 8013f88 <__sinit> 8015fba: 69a3 ldr r3, [r4, #24] 8015fbc: 60a3 str r3, [r4, #8] 8015fbe: 89a3 ldrh r3, [r4, #12] 8015fc0: 071a lsls r2, r3, #28 8015fc2: d501 bpl.n 8015fc8 <__swbuf_r+0x20> 8015fc4: 6923 ldr r3, [r4, #16] 8015fc6: b943 cbnz r3, 8015fda <__swbuf_r+0x32> 8015fc8: 4621 mov r1, r4 8015fca: 4628 mov r0, r5 8015fcc: f000 f82a bl 8016024 <__swsetup_r> 8015fd0: b118 cbz r0, 8015fda <__swbuf_r+0x32> 8015fd2: f04f 37ff mov.w r7, #4294967295 @ 0xffffffff 8015fd6: 4638 mov r0, r7 8015fd8: bdf8 pop {r3, r4, r5, r6, r7, pc} 8015fda: 6823 ldr r3, [r4, #0] 8015fdc: 6922 ldr r2, [r4, #16] 8015fde: b2f6 uxtb r6, r6 8015fe0: 1a98 subs r0, r3, r2 8015fe2: 6963 ldr r3, [r4, #20] 8015fe4: 4637 mov r7, r6 8015fe6: 4283 cmp r3, r0 8015fe8: dc05 bgt.n 8015ff6 <__swbuf_r+0x4e> 8015fea: 4621 mov r1, r4 8015fec: 4628 mov r0, r5 8015fee: f7ff fba9 bl 8015744 <_fflush_r> 8015ff2: 2800 cmp r0, #0 8015ff4: d1ed bne.n 8015fd2 <__swbuf_r+0x2a> 8015ff6: 68a3 ldr r3, [r4, #8] 8015ff8: 3b01 subs r3, #1 8015ffa: 60a3 str r3, [r4, #8] 8015ffc: 6823 ldr r3, [r4, #0] 8015ffe: 1c5a adds r2, r3, #1 8016000: 6022 str r2, [r4, #0] 8016002: 701e strb r6, [r3, #0] 8016004: 6962 ldr r2, [r4, #20] 8016006: 1c43 adds r3, r0, #1 8016008: 429a cmp r2, r3 801600a: d004 beq.n 8016016 <__swbuf_r+0x6e> 801600c: 89a3 ldrh r3, [r4, #12] 801600e: 07db lsls r3, r3, #31 8016010: d5e1 bpl.n 8015fd6 <__swbuf_r+0x2e> 8016012: 2e0a cmp r6, #10 8016014: d1df bne.n 8015fd6 <__swbuf_r+0x2e> 8016016: 4621 mov r1, r4 8016018: 4628 mov r0, r5 801601a: f7ff fb93 bl 8015744 <_fflush_r> 801601e: 2800 cmp r0, #0 8016020: d0d9 beq.n 8015fd6 <__swbuf_r+0x2e> 8016022: e7d6 b.n 8015fd2 <__swbuf_r+0x2a> 08016024 <__swsetup_r>: 8016024: b538 push {r3, r4, r5, lr} 8016026: 4b29 ldr r3, [pc, #164] @ (80160cc <__swsetup_r+0xa8>) 8016028: 4605 mov r5, r0 801602a: 6818 ldr r0, [r3, #0] 801602c: 460c mov r4, r1 801602e: b118 cbz r0, 8016038 <__swsetup_r+0x14> 8016030: 6a03 ldr r3, [r0, #32] 8016032: b90b cbnz r3, 8016038 <__swsetup_r+0x14> 8016034: f7fd ffa8 bl 8013f88 <__sinit> 8016038: f9b4 300c ldrsh.w r3, [r4, #12] 801603c: 0719 lsls r1, r3, #28 801603e: d422 bmi.n 8016086 <__swsetup_r+0x62> 8016040: 06da lsls r2, r3, #27 8016042: d407 bmi.n 8016054 <__swsetup_r+0x30> 8016044: 2209 movs r2, #9 8016046: 602a str r2, [r5, #0] 8016048: f043 0340 orr.w r3, r3, #64 @ 0x40 801604c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8016050: 81a3 strh r3, [r4, #12] 8016052: e033 b.n 80160bc <__swsetup_r+0x98> 8016054: 0758 lsls r0, r3, #29 8016056: d512 bpl.n 801607e <__swsetup_r+0x5a> 8016058: 6b61 ldr r1, [r4, #52] @ 0x34 801605a: b141 cbz r1, 801606e <__swsetup_r+0x4a> 801605c: f104 0344 add.w r3, r4, #68 @ 0x44 8016060: 4299 cmp r1, r3 8016062: d002 beq.n 801606a <__swsetup_r+0x46> 8016064: 4628 mov r0, r5 8016066: f000 f943 bl 80162f0 <_free_r> 801606a: 2300 movs r3, #0 801606c: 6363 str r3, [r4, #52] @ 0x34 801606e: 89a3 ldrh r3, [r4, #12] 8016070: f023 0324 bic.w r3, r3, #36 @ 0x24 8016074: 81a3 strh r3, [r4, #12] 8016076: 2300 movs r3, #0 8016078: 6063 str r3, [r4, #4] 801607a: 6923 ldr r3, [r4, #16] 801607c: 6023 str r3, [r4, #0] 801607e: 89a3 ldrh r3, [r4, #12] 8016080: f043 0308 orr.w r3, r3, #8 8016084: 81a3 strh r3, [r4, #12] 8016086: 6923 ldr r3, [r4, #16] 8016088: b94b cbnz r3, 801609e <__swsetup_r+0x7a> 801608a: 89a3 ldrh r3, [r4, #12] 801608c: f403 7320 and.w r3, r3, #640 @ 0x280 8016090: f5b3 7f00 cmp.w r3, #512 @ 0x200 8016094: d003 beq.n 801609e <__swsetup_r+0x7a> 8016096: 4621 mov r1, r4 8016098: 4628 mov r0, r5 801609a: f000 f83e bl 801611a <__smakebuf_r> 801609e: f9b4 300c ldrsh.w r3, [r4, #12] 80160a2: f013 0201 ands.w r2, r3, #1 80160a6: d00a beq.n 80160be <__swsetup_r+0x9a> 80160a8: 2200 movs r2, #0 80160aa: 60a2 str r2, [r4, #8] 80160ac: 6962 ldr r2, [r4, #20] 80160ae: 4252 negs r2, r2 80160b0: 61a2 str r2, [r4, #24] 80160b2: 6922 ldr r2, [r4, #16] 80160b4: b942 cbnz r2, 80160c8 <__swsetup_r+0xa4> 80160b6: f013 0080 ands.w r0, r3, #128 @ 0x80 80160ba: d1c5 bne.n 8016048 <__swsetup_r+0x24> 80160bc: bd38 pop {r3, r4, r5, pc} 80160be: 0799 lsls r1, r3, #30 80160c0: bf58 it pl 80160c2: 6962 ldrpl r2, [r4, #20] 80160c4: 60a2 str r2, [r4, #8] 80160c6: e7f4 b.n 80160b2 <__swsetup_r+0x8e> 80160c8: 2000 movs r0, #0 80160ca: e7f7 b.n 80160bc <__swsetup_r+0x98> 80160cc: 20000084 .word 0x20000084 080160d0 <__swhatbuf_r>: 80160d0: b570 push {r4, r5, r6, lr} 80160d2: 460c mov r4, r1 80160d4: f9b1 100e ldrsh.w r1, [r1, #14] 80160d8: 4615 mov r5, r2 80160da: 2900 cmp r1, #0 80160dc: 461e mov r6, r3 80160de: b096 sub sp, #88 @ 0x58 80160e0: da0c bge.n 80160fc <__swhatbuf_r+0x2c> 80160e2: 89a3 ldrh r3, [r4, #12] 80160e4: 2100 movs r1, #0 80160e6: f013 0f80 tst.w r3, #128 @ 0x80 80160ea: bf14 ite ne 80160ec: 2340 movne r3, #64 @ 0x40 80160ee: f44f 6380 moveq.w r3, #1024 @ 0x400 80160f2: 2000 movs r0, #0 80160f4: 6031 str r1, [r6, #0] 80160f6: 602b str r3, [r5, #0] 80160f8: b016 add sp, #88 @ 0x58 80160fa: bd70 pop {r4, r5, r6, pc} 80160fc: 466a mov r2, sp 80160fe: f000 f8c9 bl 8016294 <_fstat_r> 8016102: 2800 cmp r0, #0 8016104: dbed blt.n 80160e2 <__swhatbuf_r+0x12> 8016106: 9901 ldr r1, [sp, #4] 8016108: f401 4170 and.w r1, r1, #61440 @ 0xf000 801610c: f5a1 5300 sub.w r3, r1, #8192 @ 0x2000 8016110: 4259 negs r1, r3 8016112: 4159 adcs r1, r3 8016114: f44f 6380 mov.w r3, #1024 @ 0x400 8016118: e7eb b.n 80160f2 <__swhatbuf_r+0x22> 0801611a <__smakebuf_r>: 801611a: 898b ldrh r3, [r1, #12] 801611c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 801611e: 079d lsls r5, r3, #30 8016120: 4606 mov r6, r0 8016122: 460c mov r4, r1 8016124: d507 bpl.n 8016136 <__smakebuf_r+0x1c> 8016126: f104 0347 add.w r3, r4, #71 @ 0x47 801612a: 6023 str r3, [r4, #0] 801612c: 6123 str r3, [r4, #16] 801612e: 2301 movs r3, #1 8016130: 6163 str r3, [r4, #20] 8016132: b003 add sp, #12 8016134: bdf0 pop {r4, r5, r6, r7, pc} 8016136: 466a mov r2, sp 8016138: ab01 add r3, sp, #4 801613a: f7ff ffc9 bl 80160d0 <__swhatbuf_r> 801613e: 9f00 ldr r7, [sp, #0] 8016140: 4605 mov r5, r0 8016142: 4639 mov r1, r7 8016144: 4630 mov r0, r6 8016146: f7ff f9fd bl 8015544 <_malloc_r> 801614a: b948 cbnz r0, 8016160 <__smakebuf_r+0x46> 801614c: f9b4 300c ldrsh.w r3, [r4, #12] 8016150: 059a lsls r2, r3, #22 8016152: d4ee bmi.n 8016132 <__smakebuf_r+0x18> 8016154: f023 0303 bic.w r3, r3, #3 8016158: f043 0302 orr.w r3, r3, #2 801615c: 81a3 strh r3, [r4, #12] 801615e: e7e2 b.n 8016126 <__smakebuf_r+0xc> 8016160: 89a3 ldrh r3, [r4, #12] 8016162: e9c4 0704 strd r0, r7, [r4, #16] 8016166: f043 0380 orr.w r3, r3, #128 @ 0x80 801616a: 81a3 strh r3, [r4, #12] 801616c: 9b01 ldr r3, [sp, #4] 801616e: 6020 str r0, [r4, #0] 8016170: b15b cbz r3, 801618a <__smakebuf_r+0x70> 8016172: 4630 mov r0, r6 8016174: f9b4 100e ldrsh.w r1, [r4, #14] 8016178: f000 f826 bl 80161c8 <_isatty_r> 801617c: b128 cbz r0, 801618a <__smakebuf_r+0x70> 801617e: 89a3 ldrh r3, [r4, #12] 8016180: f023 0303 bic.w r3, r3, #3 8016184: f043 0301 orr.w r3, r3, #1 8016188: 81a3 strh r3, [r4, #12] 801618a: 89a3 ldrh r3, [r4, #12] 801618c: 431d orrs r5, r3 801618e: 81a5 strh r5, [r4, #12] 8016190: e7cf b.n 8016132 <__smakebuf_r+0x18> 08016192 : 8016192: 4288 cmp r0, r1 8016194: b510 push {r4, lr} 8016196: eb01 0402 add.w r4, r1, r2 801619a: d902 bls.n 80161a2 801619c: 4284 cmp r4, r0 801619e: 4623 mov r3, r4 80161a0: d807 bhi.n 80161b2 80161a2: 1e43 subs r3, r0, #1 80161a4: 42a1 cmp r1, r4 80161a6: d008 beq.n 80161ba 80161a8: f811 2b01 ldrb.w r2, [r1], #1 80161ac: f803 2f01 strb.w r2, [r3, #1]! 80161b0: e7f8 b.n 80161a4 80161b2: 4601 mov r1, r0 80161b4: 4402 add r2, r0 80161b6: 428a cmp r2, r1 80161b8: d100 bne.n 80161bc 80161ba: bd10 pop {r4, pc} 80161bc: f813 4d01 ldrb.w r4, [r3, #-1]! 80161c0: f802 4d01 strb.w r4, [r2, #-1]! 80161c4: e7f7 b.n 80161b6 ... 080161c8 <_isatty_r>: 80161c8: b538 push {r3, r4, r5, lr} 80161ca: 2300 movs r3, #0 80161cc: 4d05 ldr r5, [pc, #20] @ (80161e4 <_isatty_r+0x1c>) 80161ce: 4604 mov r4, r0 80161d0: 4608 mov r0, r1 80161d2: 602b str r3, [r5, #0] 80161d4: f7f7 ff4f bl 800e076 <_isatty> 80161d8: 1c43 adds r3, r0, #1 80161da: d102 bne.n 80161e2 <_isatty_r+0x1a> 80161dc: 682b ldr r3, [r5, #0] 80161de: b103 cbz r3, 80161e2 <_isatty_r+0x1a> 80161e0: 6023 str r3, [r4, #0] 80161e2: bd38 pop {r3, r4, r5, pc} 80161e4: 20000fac .word 0x20000fac 080161e8 <_lseek_r>: 80161e8: b538 push {r3, r4, r5, lr} 80161ea: 4604 mov r4, r0 80161ec: 4608 mov r0, r1 80161ee: 4611 mov r1, r2 80161f0: 2200 movs r2, #0 80161f2: 4d05 ldr r5, [pc, #20] @ (8016208 <_lseek_r+0x20>) 80161f4: 602a str r2, [r5, #0] 80161f6: 461a mov r2, r3 80161f8: f7f7 ff47 bl 800e08a <_lseek> 80161fc: 1c43 adds r3, r0, #1 80161fe: d102 bne.n 8016206 <_lseek_r+0x1e> 8016200: 682b ldr r3, [r5, #0] 8016202: b103 cbz r3, 8016206 <_lseek_r+0x1e> 8016204: 6023 str r3, [r4, #0] 8016206: bd38 pop {r3, r4, r5, pc} 8016208: 20000fac .word 0x20000fac 0801620c <_read_r>: 801620c: b538 push {r3, r4, r5, lr} 801620e: 4604 mov r4, r0 8016210: 4608 mov r0, r1 8016212: 4611 mov r1, r2 8016214: 2200 movs r2, #0 8016216: 4d05 ldr r5, [pc, #20] @ (801622c <_read_r+0x20>) 8016218: 602a str r2, [r5, #0] 801621a: 461a mov r2, r3 801621c: f7f7 fef4 bl 800e008 <_read> 8016220: 1c43 adds r3, r0, #1 8016222: d102 bne.n 801622a <_read_r+0x1e> 8016224: 682b ldr r3, [r5, #0] 8016226: b103 cbz r3, 801622a <_read_r+0x1e> 8016228: 6023 str r3, [r4, #0] 801622a: bd38 pop {r3, r4, r5, pc} 801622c: 20000fac .word 0x20000fac 08016230 <_sbrk_r>: 8016230: b538 push {r3, r4, r5, lr} 8016232: 2300 movs r3, #0 8016234: 4d05 ldr r5, [pc, #20] @ (801624c <_sbrk_r+0x1c>) 8016236: 4604 mov r4, r0 8016238: 4608 mov r0, r1 801623a: 602b str r3, [r5, #0] 801623c: f7f7 ff32 bl 800e0a4 <_sbrk> 8016240: 1c43 adds r3, r0, #1 8016242: d102 bne.n 801624a <_sbrk_r+0x1a> 8016244: 682b ldr r3, [r5, #0] 8016246: b103 cbz r3, 801624a <_sbrk_r+0x1a> 8016248: 6023 str r3, [r4, #0] 801624a: bd38 pop {r3, r4, r5, pc} 801624c: 20000fac .word 0x20000fac 08016250 <_write_r>: 8016250: b538 push {r3, r4, r5, lr} 8016252: 4604 mov r4, r0 8016254: 4608 mov r0, r1 8016256: 4611 mov r1, r2 8016258: 2200 movs r2, #0 801625a: 4d05 ldr r5, [pc, #20] @ (8016270 <_write_r+0x20>) 801625c: 602a str r2, [r5, #0] 801625e: 461a mov r2, r3 8016260: f7f5 f81a bl 800b298 <_write> 8016264: 1c43 adds r3, r0, #1 8016266: d102 bne.n 801626e <_write_r+0x1e> 8016268: 682b ldr r3, [r5, #0] 801626a: b103 cbz r3, 801626e <_write_r+0x1e> 801626c: 6023 str r3, [r4, #0] 801626e: bd38 pop {r3, r4, r5, pc} 8016270: 20000fac .word 0x20000fac 08016274 <_close_r>: 8016274: b538 push {r3, r4, r5, lr} 8016276: 2300 movs r3, #0 8016278: 4d05 ldr r5, [pc, #20] @ (8016290 <_close_r+0x1c>) 801627a: 4604 mov r4, r0 801627c: 4608 mov r0, r1 801627e: 602b str r3, [r5, #0] 8016280: f7f7 fedf bl 800e042 <_close> 8016284: 1c43 adds r3, r0, #1 8016286: d102 bne.n 801628e <_close_r+0x1a> 8016288: 682b ldr r3, [r5, #0] 801628a: b103 cbz r3, 801628e <_close_r+0x1a> 801628c: 6023 str r3, [r4, #0] 801628e: bd38 pop {r3, r4, r5, pc} 8016290: 20000fac .word 0x20000fac 08016294 <_fstat_r>: 8016294: b538 push {r3, r4, r5, lr} 8016296: 2300 movs r3, #0 8016298: 4d06 ldr r5, [pc, #24] @ (80162b4 <_fstat_r+0x20>) 801629a: 4604 mov r4, r0 801629c: 4608 mov r0, r1 801629e: 4611 mov r1, r2 80162a0: 602b str r3, [r5, #0] 80162a2: f7f7 fed9 bl 800e058 <_fstat> 80162a6: 1c43 adds r3, r0, #1 80162a8: d102 bne.n 80162b0 <_fstat_r+0x1c> 80162aa: 682b ldr r3, [r5, #0] 80162ac: b103 cbz r3, 80162b0 <_fstat_r+0x1c> 80162ae: 6023 str r3, [r4, #0] 80162b0: bd38 pop {r3, r4, r5, pc} 80162b2: bf00 nop 80162b4: 20000fac .word 0x20000fac 080162b8 : 80162b8: 2006 movs r0, #6 80162ba: b508 push {r3, lr} 80162bc: f000 f8b0 bl 8016420 80162c0: 2001 movs r0, #1 80162c2: f7f7 fe96 bl 800dff2 <_exit> 080162c6 <_calloc_r>: 80162c6: b570 push {r4, r5, r6, lr} 80162c8: fba1 5402 umull r5, r4, r1, r2 80162cc: b934 cbnz r4, 80162dc <_calloc_r+0x16> 80162ce: 4629 mov r1, r5 80162d0: f7ff f938 bl 8015544 <_malloc_r> 80162d4: 4606 mov r6, r0 80162d6: b928 cbnz r0, 80162e4 <_calloc_r+0x1e> 80162d8: 4630 mov r0, r6 80162da: bd70 pop {r4, r5, r6, pc} 80162dc: 220c movs r2, #12 80162de: 2600 movs r6, #0 80162e0: 6002 str r2, [r0, #0] 80162e2: e7f9 b.n 80162d8 <_calloc_r+0x12> 80162e4: 462a mov r2, r5 80162e6: 4621 mov r1, r4 80162e8: f7fd fed2 bl 8014090 80162ec: e7f4 b.n 80162d8 <_calloc_r+0x12> ... 080162f0 <_free_r>: 80162f0: b538 push {r3, r4, r5, lr} 80162f2: 4605 mov r5, r0 80162f4: 2900 cmp r1, #0 80162f6: d040 beq.n 801637a <_free_r+0x8a> 80162f8: f851 3c04 ldr.w r3, [r1, #-4] 80162fc: 1f0c subs r4, r1, #4 80162fe: 2b00 cmp r3, #0 8016300: bfb8 it lt 8016302: 18e4 addlt r4, r4, r3 8016304: f7ff fa46 bl 8015794 <__malloc_lock> 8016308: 4a1c ldr r2, [pc, #112] @ (801637c <_free_r+0x8c>) 801630a: 6813 ldr r3, [r2, #0] 801630c: b933 cbnz r3, 801631c <_free_r+0x2c> 801630e: 6063 str r3, [r4, #4] 8016310: 6014 str r4, [r2, #0] 8016312: 4628 mov r0, r5 8016314: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8016318: f7ff ba42 b.w 80157a0 <__malloc_unlock> 801631c: 42a3 cmp r3, r4 801631e: d908 bls.n 8016332 <_free_r+0x42> 8016320: 6820 ldr r0, [r4, #0] 8016322: 1821 adds r1, r4, r0 8016324: 428b cmp r3, r1 8016326: bf01 itttt eq 8016328: 6819 ldreq r1, [r3, #0] 801632a: 685b ldreq r3, [r3, #4] 801632c: 1809 addeq r1, r1, r0 801632e: 6021 streq r1, [r4, #0] 8016330: e7ed b.n 801630e <_free_r+0x1e> 8016332: 461a mov r2, r3 8016334: 685b ldr r3, [r3, #4] 8016336: b10b cbz r3, 801633c <_free_r+0x4c> 8016338: 42a3 cmp r3, r4 801633a: d9fa bls.n 8016332 <_free_r+0x42> 801633c: 6811 ldr r1, [r2, #0] 801633e: 1850 adds r0, r2, r1 8016340: 42a0 cmp r0, r4 8016342: d10b bne.n 801635c <_free_r+0x6c> 8016344: 6820 ldr r0, [r4, #0] 8016346: 4401 add r1, r0 8016348: 1850 adds r0, r2, r1 801634a: 4283 cmp r3, r0 801634c: 6011 str r1, [r2, #0] 801634e: d1e0 bne.n 8016312 <_free_r+0x22> 8016350: 6818 ldr r0, [r3, #0] 8016352: 685b ldr r3, [r3, #4] 8016354: 4408 add r0, r1 8016356: 6010 str r0, [r2, #0] 8016358: 6053 str r3, [r2, #4] 801635a: e7da b.n 8016312 <_free_r+0x22> 801635c: d902 bls.n 8016364 <_free_r+0x74> 801635e: 230c movs r3, #12 8016360: 602b str r3, [r5, #0] 8016362: e7d6 b.n 8016312 <_free_r+0x22> 8016364: 6820 ldr r0, [r4, #0] 8016366: 1821 adds r1, r4, r0 8016368: 428b cmp r3, r1 801636a: bf01 itttt eq 801636c: 6819 ldreq r1, [r3, #0] 801636e: 685b ldreq r3, [r3, #4] 8016370: 1809 addeq r1, r1, r0 8016372: 6021 streq r1, [r4, #0] 8016374: 6063 str r3, [r4, #4] 8016376: 6054 str r4, [r2, #4] 8016378: e7cb b.n 8016312 <_free_r+0x22> 801637a: bd38 pop {r3, r4, r5, pc} 801637c: 20000fa8 .word 0x20000fa8 08016380 <__ascii_mbtowc>: 8016380: b082 sub sp, #8 8016382: b901 cbnz r1, 8016386 <__ascii_mbtowc+0x6> 8016384: a901 add r1, sp, #4 8016386: b142 cbz r2, 801639a <__ascii_mbtowc+0x1a> 8016388: b14b cbz r3, 801639e <__ascii_mbtowc+0x1e> 801638a: 7813 ldrb r3, [r2, #0] 801638c: 600b str r3, [r1, #0] 801638e: 7812 ldrb r2, [r2, #0] 8016390: 1e10 subs r0, r2, #0 8016392: bf18 it ne 8016394: 2001 movne r0, #1 8016396: b002 add sp, #8 8016398: 4770 bx lr 801639a: 4610 mov r0, r2 801639c: e7fb b.n 8016396 <__ascii_mbtowc+0x16> 801639e: f06f 0001 mvn.w r0, #1 80163a2: e7f8 b.n 8016396 <__ascii_mbtowc+0x16> 080163a4 <_malloc_usable_size_r>: 80163a4: f851 3c04 ldr.w r3, [r1, #-4] 80163a8: 1f18 subs r0, r3, #4 80163aa: 2b00 cmp r3, #0 80163ac: bfbc itt lt 80163ae: 580b ldrlt r3, [r1, r0] 80163b0: 18c0 addlt r0, r0, r3 80163b2: 4770 bx lr 080163b4 <__ascii_wctomb>: 80163b4: 4603 mov r3, r0 80163b6: 4608 mov r0, r1 80163b8: b141 cbz r1, 80163cc <__ascii_wctomb+0x18> 80163ba: 2aff cmp r2, #255 @ 0xff 80163bc: d904 bls.n 80163c8 <__ascii_wctomb+0x14> 80163be: 228a movs r2, #138 @ 0x8a 80163c0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80163c4: 601a str r2, [r3, #0] 80163c6: 4770 bx lr 80163c8: 2001 movs r0, #1 80163ca: 700a strb r2, [r1, #0] 80163cc: 4770 bx lr 080163ce <_raise_r>: 80163ce: 291f cmp r1, #31 80163d0: b538 push {r3, r4, r5, lr} 80163d2: 4605 mov r5, r0 80163d4: 460c mov r4, r1 80163d6: d904 bls.n 80163e2 <_raise_r+0x14> 80163d8: 2316 movs r3, #22 80163da: 6003 str r3, [r0, #0] 80163dc: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80163e0: bd38 pop {r3, r4, r5, pc} 80163e2: 6bc2 ldr r2, [r0, #60] @ 0x3c 80163e4: b112 cbz r2, 80163ec <_raise_r+0x1e> 80163e6: f852 3021 ldr.w r3, [r2, r1, lsl #2] 80163ea: b94b cbnz r3, 8016400 <_raise_r+0x32> 80163ec: 4628 mov r0, r5 80163ee: f000 f831 bl 8016454 <_getpid_r> 80163f2: 4622 mov r2, r4 80163f4: 4601 mov r1, r0 80163f6: 4628 mov r0, r5 80163f8: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80163fc: f000 b818 b.w 8016430 <_kill_r> 8016400: 2b01 cmp r3, #1 8016402: d00a beq.n 801641a <_raise_r+0x4c> 8016404: 1c59 adds r1, r3, #1 8016406: d103 bne.n 8016410 <_raise_r+0x42> 8016408: 2316 movs r3, #22 801640a: 6003 str r3, [r0, #0] 801640c: 2001 movs r0, #1 801640e: e7e7 b.n 80163e0 <_raise_r+0x12> 8016410: 2100 movs r1, #0 8016412: 4620 mov r0, r4 8016414: f842 1024 str.w r1, [r2, r4, lsl #2] 8016418: 4798 blx r3 801641a: 2000 movs r0, #0 801641c: e7e0 b.n 80163e0 <_raise_r+0x12> ... 08016420 : 8016420: 4b02 ldr r3, [pc, #8] @ (801642c ) 8016422: 4601 mov r1, r0 8016424: 6818 ldr r0, [r3, #0] 8016426: f7ff bfd2 b.w 80163ce <_raise_r> 801642a: bf00 nop 801642c: 20000084 .word 0x20000084 08016430 <_kill_r>: 8016430: b538 push {r3, r4, r5, lr} 8016432: 2300 movs r3, #0 8016434: 4d06 ldr r5, [pc, #24] @ (8016450 <_kill_r+0x20>) 8016436: 4604 mov r4, r0 8016438: 4608 mov r0, r1 801643a: 4611 mov r1, r2 801643c: 602b str r3, [r5, #0] 801643e: f7f7 fdc8 bl 800dfd2 <_kill> 8016442: 1c43 adds r3, r0, #1 8016444: d102 bne.n 801644c <_kill_r+0x1c> 8016446: 682b ldr r3, [r5, #0] 8016448: b103 cbz r3, 801644c <_kill_r+0x1c> 801644a: 6023 str r3, [r4, #0] 801644c: bd38 pop {r3, r4, r5, pc} 801644e: bf00 nop 8016450: 20000fac .word 0x20000fac 08016454 <_getpid_r>: 8016454: f7f7 bdb6 b.w 800dfc4 <_getpid> 08016458 <_init>: 8016458: b5f8 push {r3, r4, r5, r6, r7, lr} 801645a: bf00 nop 801645c: bcf8 pop {r3, r4, r5, r6, r7} 801645e: bc08 pop {r3} 8016460: 469e mov lr, r3 8016462: 4770 bx lr 08016464 <_fini>: 8016464: b5f8 push {r3, r4, r5, r6, r7, lr} 8016466: bf00 nop 8016468: bcf8 pop {r3, r4, r5, r6, r7} 801646a: bc08 pop {r3} 801646c: 469e mov lr, r3 801646e: 4770 bx lr