CCSModuleSW30Web.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e8 08008000 08008000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00010018 080081e8 080081e8 000011e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00001154 08018200 08018200 00011200 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 08019354 08019354 00013258 2**0 CONTENTS 4 .ARM 00000008 08019354 08019354 00012354 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 0801935c 0801935c 00013258 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0801935c 0801935c 0001235c 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .fini_array 00000004 08019360 08019360 00012360 2**2 CONTENTS, ALLOC, LOAD, DATA 8 .data 00000258 20000000 08019364 00013000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 000013c0 20000258 080195bc 00013258 2**3 ALLOC 10 ._user_heap_stack 00000600 20001618 080195bc 00013618 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 00013258 2**0 CONTENTS, READONLY 12 .debug_info 0001eb1d 00000000 00000000 00013281 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00005d86 00000000 00000000 00031d9e 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_loclists 00000feb 00000000 00000000 00037b24 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_aranges 00001858 00000000 00000000 00038b10 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_rnglists 0000131d 00000000 00000000 0003a368 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_macro 00026db7 00000000 00000000 0003b685 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_line 00024f41 00000000 00000000 0006243c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .debug_str 000ca319 00000000 00000000 0008737d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 20 .comment 00000043 00000000 00000000 00151696 2**0 CONTENTS, READONLY 21 .debug_frame 000071c4 00000000 00000000 001516dc 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 22 .debug_line_str 00000063 00000000 00000000 001588a0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080081e8 <__do_global_dtors_aux>: 80081e8: b510 push {r4, lr} 80081ea: 4c05 ldr r4, [pc, #20] @ (8008200 <__do_global_dtors_aux+0x18>) 80081ec: 7823 ldrb r3, [r4, #0] 80081ee: b933 cbnz r3, 80081fe <__do_global_dtors_aux+0x16> 80081f0: 4b04 ldr r3, [pc, #16] @ (8008204 <__do_global_dtors_aux+0x1c>) 80081f2: b113 cbz r3, 80081fa <__do_global_dtors_aux+0x12> 80081f4: 4804 ldr r0, [pc, #16] @ (8008208 <__do_global_dtors_aux+0x20>) 80081f6: f3af 8000 nop.w 80081fa: 2301 movs r3, #1 80081fc: 7023 strb r3, [r4, #0] 80081fe: bd10 pop {r4, pc} 8008200: 20000258 .word 0x20000258 8008204: 00000000 .word 0x00000000 8008208: 080181e8 .word 0x080181e8 0800820c : 800820c: b508 push {r3, lr} 800820e: 4b03 ldr r3, [pc, #12] @ (800821c ) 8008210: b11b cbz r3, 800821a 8008212: 4903 ldr r1, [pc, #12] @ (8008220 ) 8008214: 4803 ldr r0, [pc, #12] @ (8008224 ) 8008216: f3af 8000 nop.w 800821a: bd08 pop {r3, pc} 800821c: 00000000 .word 0x00000000 8008220: 2000025c .word 0x2000025c 8008224: 080181e8 .word 0x080181e8 08008228 : 8008228: 4603 mov r3, r0 800822a: f813 2b01 ldrb.w r2, [r3], #1 800822e: 2a00 cmp r2, #0 8008230: d1fb bne.n 800822a 8008232: 1a18 subs r0, r3, r0 8008234: 3801 subs r0, #1 8008236: 4770 bx lr 08008238 <__aeabi_drsub>: 8008238: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 800823c: e002 b.n 8008244 <__adddf3> 800823e: bf00 nop 08008240 <__aeabi_dsub>: 8008240: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 08008244 <__adddf3>: 8008244: b530 push {r4, r5, lr} 8008246: ea4f 0441 mov.w r4, r1, lsl #1 800824a: ea4f 0543 mov.w r5, r3, lsl #1 800824e: ea94 0f05 teq r4, r5 8008252: bf08 it eq 8008254: ea90 0f02 teqeq r0, r2 8008258: bf1f itttt ne 800825a: ea54 0c00 orrsne.w ip, r4, r0 800825e: ea55 0c02 orrsne.w ip, r5, r2 8008262: ea7f 5c64 mvnsne.w ip, r4, asr #21 8008266: ea7f 5c65 mvnsne.w ip, r5, asr #21 800826a: f000 80e2 beq.w 8008432 <__adddf3+0x1ee> 800826e: ea4f 5454 mov.w r4, r4, lsr #21 8008272: ebd4 5555 rsbs r5, r4, r5, lsr #21 8008276: bfb8 it lt 8008278: 426d neglt r5, r5 800827a: dd0c ble.n 8008296 <__adddf3+0x52> 800827c: 442c add r4, r5 800827e: ea80 0202 eor.w r2, r0, r2 8008282: ea81 0303 eor.w r3, r1, r3 8008286: ea82 0000 eor.w r0, r2, r0 800828a: ea83 0101 eor.w r1, r3, r1 800828e: ea80 0202 eor.w r2, r0, r2 8008292: ea81 0303 eor.w r3, r1, r3 8008296: 2d36 cmp r5, #54 @ 0x36 8008298: bf88 it hi 800829a: bd30 pophi {r4, r5, pc} 800829c: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 80082a0: ea4f 3101 mov.w r1, r1, lsl #12 80082a4: f44f 1c80 mov.w ip, #1048576 @ 0x100000 80082a8: ea4c 3111 orr.w r1, ip, r1, lsr #12 80082ac: d002 beq.n 80082b4 <__adddf3+0x70> 80082ae: 4240 negs r0, r0 80082b0: eb61 0141 sbc.w r1, r1, r1, lsl #1 80082b4: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 80082b8: ea4f 3303 mov.w r3, r3, lsl #12 80082bc: ea4c 3313 orr.w r3, ip, r3, lsr #12 80082c0: d002 beq.n 80082c8 <__adddf3+0x84> 80082c2: 4252 negs r2, r2 80082c4: eb63 0343 sbc.w r3, r3, r3, lsl #1 80082c8: ea94 0f05 teq r4, r5 80082cc: f000 80a7 beq.w 800841e <__adddf3+0x1da> 80082d0: f1a4 0401 sub.w r4, r4, #1 80082d4: f1d5 0e20 rsbs lr, r5, #32 80082d8: db0d blt.n 80082f6 <__adddf3+0xb2> 80082da: fa02 fc0e lsl.w ip, r2, lr 80082de: fa22 f205 lsr.w r2, r2, r5 80082e2: 1880 adds r0, r0, r2 80082e4: f141 0100 adc.w r1, r1, #0 80082e8: fa03 f20e lsl.w r2, r3, lr 80082ec: 1880 adds r0, r0, r2 80082ee: fa43 f305 asr.w r3, r3, r5 80082f2: 4159 adcs r1, r3 80082f4: e00e b.n 8008314 <__adddf3+0xd0> 80082f6: f1a5 0520 sub.w r5, r5, #32 80082fa: f10e 0e20 add.w lr, lr, #32 80082fe: 2a01 cmp r2, #1 8008300: fa03 fc0e lsl.w ip, r3, lr 8008304: bf28 it cs 8008306: f04c 0c02 orrcs.w ip, ip, #2 800830a: fa43 f305 asr.w r3, r3, r5 800830e: 18c0 adds r0, r0, r3 8008310: eb51 71e3 adcs.w r1, r1, r3, asr #31 8008314: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8008318: d507 bpl.n 800832a <__adddf3+0xe6> 800831a: f04f 0e00 mov.w lr, #0 800831e: f1dc 0c00 rsbs ip, ip, #0 8008322: eb7e 0000 sbcs.w r0, lr, r0 8008326: eb6e 0101 sbc.w r1, lr, r1 800832a: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 800832e: d31b bcc.n 8008368 <__adddf3+0x124> 8008330: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 8008334: d30c bcc.n 8008350 <__adddf3+0x10c> 8008336: 0849 lsrs r1, r1, #1 8008338: ea5f 0030 movs.w r0, r0, rrx 800833c: ea4f 0c3c mov.w ip, ip, rrx 8008340: f104 0401 add.w r4, r4, #1 8008344: ea4f 5244 mov.w r2, r4, lsl #21 8008348: f512 0f80 cmn.w r2, #4194304 @ 0x400000 800834c: f080 809a bcs.w 8008484 <__adddf3+0x240> 8008350: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8008354: bf08 it eq 8008356: ea5f 0c50 movseq.w ip, r0, lsr #1 800835a: f150 0000 adcs.w r0, r0, #0 800835e: eb41 5104 adc.w r1, r1, r4, lsl #20 8008362: ea41 0105 orr.w r1, r1, r5 8008366: bd30 pop {r4, r5, pc} 8008368: ea5f 0c4c movs.w ip, ip, lsl #1 800836c: 4140 adcs r0, r0 800836e: eb41 0101 adc.w r1, r1, r1 8008372: 3c01 subs r4, #1 8008374: bf28 it cs 8008376: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 800837a: d2e9 bcs.n 8008350 <__adddf3+0x10c> 800837c: f091 0f00 teq r1, #0 8008380: bf04 itt eq 8008382: 4601 moveq r1, r0 8008384: 2000 moveq r0, #0 8008386: fab1 f381 clz r3, r1 800838a: bf08 it eq 800838c: 3320 addeq r3, #32 800838e: f1a3 030b sub.w r3, r3, #11 8008392: f1b3 0220 subs.w r2, r3, #32 8008396: da0c bge.n 80083b2 <__adddf3+0x16e> 8008398: 320c adds r2, #12 800839a: dd08 ble.n 80083ae <__adddf3+0x16a> 800839c: f102 0c14 add.w ip, r2, #20 80083a0: f1c2 020c rsb r2, r2, #12 80083a4: fa01 f00c lsl.w r0, r1, ip 80083a8: fa21 f102 lsr.w r1, r1, r2 80083ac: e00c b.n 80083c8 <__adddf3+0x184> 80083ae: f102 0214 add.w r2, r2, #20 80083b2: bfd8 it le 80083b4: f1c2 0c20 rsble ip, r2, #32 80083b8: fa01 f102 lsl.w r1, r1, r2 80083bc: fa20 fc0c lsr.w ip, r0, ip 80083c0: bfdc itt le 80083c2: ea41 010c orrle.w r1, r1, ip 80083c6: 4090 lslle r0, r2 80083c8: 1ae4 subs r4, r4, r3 80083ca: bfa2 ittt ge 80083cc: eb01 5104 addge.w r1, r1, r4, lsl #20 80083d0: 4329 orrge r1, r5 80083d2: bd30 popge {r4, r5, pc} 80083d4: ea6f 0404 mvn.w r4, r4 80083d8: 3c1f subs r4, #31 80083da: da1c bge.n 8008416 <__adddf3+0x1d2> 80083dc: 340c adds r4, #12 80083de: dc0e bgt.n 80083fe <__adddf3+0x1ba> 80083e0: f104 0414 add.w r4, r4, #20 80083e4: f1c4 0220 rsb r2, r4, #32 80083e8: fa20 f004 lsr.w r0, r0, r4 80083ec: fa01 f302 lsl.w r3, r1, r2 80083f0: ea40 0003 orr.w r0, r0, r3 80083f4: fa21 f304 lsr.w r3, r1, r4 80083f8: ea45 0103 orr.w r1, r5, r3 80083fc: bd30 pop {r4, r5, pc} 80083fe: f1c4 040c rsb r4, r4, #12 8008402: f1c4 0220 rsb r2, r4, #32 8008406: fa20 f002 lsr.w r0, r0, r2 800840a: fa01 f304 lsl.w r3, r1, r4 800840e: ea40 0003 orr.w r0, r0, r3 8008412: 4629 mov r1, r5 8008414: bd30 pop {r4, r5, pc} 8008416: fa21 f004 lsr.w r0, r1, r4 800841a: 4629 mov r1, r5 800841c: bd30 pop {r4, r5, pc} 800841e: f094 0f00 teq r4, #0 8008422: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 8008426: bf06 itte eq 8008428: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 800842c: 3401 addeq r4, #1 800842e: 3d01 subne r5, #1 8008430: e74e b.n 80082d0 <__adddf3+0x8c> 8008432: ea7f 5c64 mvns.w ip, r4, asr #21 8008436: bf18 it ne 8008438: ea7f 5c65 mvnsne.w ip, r5, asr #21 800843c: d029 beq.n 8008492 <__adddf3+0x24e> 800843e: ea94 0f05 teq r4, r5 8008442: bf08 it eq 8008444: ea90 0f02 teqeq r0, r2 8008448: d005 beq.n 8008456 <__adddf3+0x212> 800844a: ea54 0c00 orrs.w ip, r4, r0 800844e: bf04 itt eq 8008450: 4619 moveq r1, r3 8008452: 4610 moveq r0, r2 8008454: bd30 pop {r4, r5, pc} 8008456: ea91 0f03 teq r1, r3 800845a: bf1e ittt ne 800845c: 2100 movne r1, #0 800845e: 2000 movne r0, #0 8008460: bd30 popne {r4, r5, pc} 8008462: ea5f 5c54 movs.w ip, r4, lsr #21 8008466: d105 bne.n 8008474 <__adddf3+0x230> 8008468: 0040 lsls r0, r0, #1 800846a: 4149 adcs r1, r1 800846c: bf28 it cs 800846e: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 8008472: bd30 pop {r4, r5, pc} 8008474: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 8008478: bf3c itt cc 800847a: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 800847e: bd30 popcc {r4, r5, pc} 8008480: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8008484: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 8008488: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 800848c: f04f 0000 mov.w r0, #0 8008490: bd30 pop {r4, r5, pc} 8008492: ea7f 5c64 mvns.w ip, r4, asr #21 8008496: bf1a itte ne 8008498: 4619 movne r1, r3 800849a: 4610 movne r0, r2 800849c: ea7f 5c65 mvnseq.w ip, r5, asr #21 80084a0: bf1c itt ne 80084a2: 460b movne r3, r1 80084a4: 4602 movne r2, r0 80084a6: ea50 3401 orrs.w r4, r0, r1, lsl #12 80084aa: bf06 itte eq 80084ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80084b0: ea91 0f03 teqeq r1, r3 80084b4: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 80084b8: bd30 pop {r4, r5, pc} 80084ba: bf00 nop 080084bc <__aeabi_ui2d>: 80084bc: f090 0f00 teq r0, #0 80084c0: bf04 itt eq 80084c2: 2100 moveq r1, #0 80084c4: 4770 bxeq lr 80084c6: b530 push {r4, r5, lr} 80084c8: f44f 6480 mov.w r4, #1024 @ 0x400 80084cc: f104 0432 add.w r4, r4, #50 @ 0x32 80084d0: f04f 0500 mov.w r5, #0 80084d4: f04f 0100 mov.w r1, #0 80084d8: e750 b.n 800837c <__adddf3+0x138> 80084da: bf00 nop 080084dc <__aeabi_i2d>: 80084dc: f090 0f00 teq r0, #0 80084e0: bf04 itt eq 80084e2: 2100 moveq r1, #0 80084e4: 4770 bxeq lr 80084e6: b530 push {r4, r5, lr} 80084e8: f44f 6480 mov.w r4, #1024 @ 0x400 80084ec: f104 0432 add.w r4, r4, #50 @ 0x32 80084f0: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 80084f4: bf48 it mi 80084f6: 4240 negmi r0, r0 80084f8: f04f 0100 mov.w r1, #0 80084fc: e73e b.n 800837c <__adddf3+0x138> 80084fe: bf00 nop 08008500 <__aeabi_f2d>: 8008500: 0042 lsls r2, r0, #1 8008502: ea4f 01e2 mov.w r1, r2, asr #3 8008506: ea4f 0131 mov.w r1, r1, rrx 800850a: ea4f 7002 mov.w r0, r2, lsl #28 800850e: bf1f itttt ne 8008510: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 8008514: f093 4f7f teqne r3, #4278190080 @ 0xff000000 8008518: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 800851c: 4770 bxne lr 800851e: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 8008522: bf08 it eq 8008524: 4770 bxeq lr 8008526: f093 4f7f teq r3, #4278190080 @ 0xff000000 800852a: bf04 itt eq 800852c: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 8008530: 4770 bxeq lr 8008532: b530 push {r4, r5, lr} 8008534: f44f 7460 mov.w r4, #896 @ 0x380 8008538: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 800853c: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 8008540: e71c b.n 800837c <__adddf3+0x138> 8008542: bf00 nop 08008544 <__aeabi_ul2d>: 8008544: ea50 0201 orrs.w r2, r0, r1 8008548: bf08 it eq 800854a: 4770 bxeq lr 800854c: b530 push {r4, r5, lr} 800854e: f04f 0500 mov.w r5, #0 8008552: e00a b.n 800856a <__aeabi_l2d+0x16> 08008554 <__aeabi_l2d>: 8008554: ea50 0201 orrs.w r2, r0, r1 8008558: bf08 it eq 800855a: 4770 bxeq lr 800855c: b530 push {r4, r5, lr} 800855e: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 8008562: d502 bpl.n 800856a <__aeabi_l2d+0x16> 8008564: 4240 negs r0, r0 8008566: eb61 0141 sbc.w r1, r1, r1, lsl #1 800856a: f44f 6480 mov.w r4, #1024 @ 0x400 800856e: f104 0432 add.w r4, r4, #50 @ 0x32 8008572: ea5f 5c91 movs.w ip, r1, lsr #22 8008576: f43f aed8 beq.w 800832a <__adddf3+0xe6> 800857a: f04f 0203 mov.w r2, #3 800857e: ea5f 0cdc movs.w ip, ip, lsr #3 8008582: bf18 it ne 8008584: 3203 addne r2, #3 8008586: ea5f 0cdc movs.w ip, ip, lsr #3 800858a: bf18 it ne 800858c: 3203 addne r2, #3 800858e: eb02 02dc add.w r2, r2, ip, lsr #3 8008592: f1c2 0320 rsb r3, r2, #32 8008596: fa00 fc03 lsl.w ip, r0, r3 800859a: fa20 f002 lsr.w r0, r0, r2 800859e: fa01 fe03 lsl.w lr, r1, r3 80085a2: ea40 000e orr.w r0, r0, lr 80085a6: fa21 f102 lsr.w r1, r1, r2 80085aa: 4414 add r4, r2 80085ac: e6bd b.n 800832a <__adddf3+0xe6> 80085ae: bf00 nop 080085b0 <__aeabi_dmul>: 80085b0: b570 push {r4, r5, r6, lr} 80085b2: f04f 0cff mov.w ip, #255 @ 0xff 80085b6: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 80085ba: ea1c 5411 ands.w r4, ip, r1, lsr #20 80085be: bf1d ittte ne 80085c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80085c4: ea94 0f0c teqne r4, ip 80085c8: ea95 0f0c teqne r5, ip 80085cc: f000 f8de bleq 800878c <__aeabi_dmul+0x1dc> 80085d0: 442c add r4, r5 80085d2: ea81 0603 eor.w r6, r1, r3 80085d6: ea21 514c bic.w r1, r1, ip, lsl #21 80085da: ea23 534c bic.w r3, r3, ip, lsl #21 80085de: ea50 3501 orrs.w r5, r0, r1, lsl #12 80085e2: bf18 it ne 80085e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80085e8: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 80085ec: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 80085f0: d038 beq.n 8008664 <__aeabi_dmul+0xb4> 80085f2: fba0 ce02 umull ip, lr, r0, r2 80085f6: f04f 0500 mov.w r5, #0 80085fa: fbe1 e502 umlal lr, r5, r1, r2 80085fe: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 8008602: fbe0 e503 umlal lr, r5, r0, r3 8008606: f04f 0600 mov.w r6, #0 800860a: fbe1 5603 umlal r5, r6, r1, r3 800860e: f09c 0f00 teq ip, #0 8008612: bf18 it ne 8008614: f04e 0e01 orrne.w lr, lr, #1 8008618: f1a4 04ff sub.w r4, r4, #255 @ 0xff 800861c: f5b6 7f00 cmp.w r6, #512 @ 0x200 8008620: f564 7440 sbc.w r4, r4, #768 @ 0x300 8008624: d204 bcs.n 8008630 <__aeabi_dmul+0x80> 8008626: ea5f 0e4e movs.w lr, lr, lsl #1 800862a: 416d adcs r5, r5 800862c: eb46 0606 adc.w r6, r6, r6 8008630: ea42 21c6 orr.w r1, r2, r6, lsl #11 8008634: ea41 5155 orr.w r1, r1, r5, lsr #21 8008638: ea4f 20c5 mov.w r0, r5, lsl #11 800863c: ea40 505e orr.w r0, r0, lr, lsr #21 8008640: ea4f 2ece mov.w lr, lr, lsl #11 8008644: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8008648: bf88 it hi 800864a: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 800864e: d81e bhi.n 800868e <__aeabi_dmul+0xde> 8008650: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 8008654: bf08 it eq 8008656: ea5f 0e50 movseq.w lr, r0, lsr #1 800865a: f150 0000 adcs.w r0, r0, #0 800865e: eb41 5104 adc.w r1, r1, r4, lsl #20 8008662: bd70 pop {r4, r5, r6, pc} 8008664: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 8008668: ea46 0101 orr.w r1, r6, r1 800866c: ea40 0002 orr.w r0, r0, r2 8008670: ea81 0103 eor.w r1, r1, r3 8008674: ebb4 045c subs.w r4, r4, ip, lsr #1 8008678: bfc2 ittt gt 800867a: ebd4 050c rsbsgt r5, r4, ip 800867e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8008682: bd70 popgt {r4, r5, r6, pc} 8008684: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008688: f04f 0e00 mov.w lr, #0 800868c: 3c01 subs r4, #1 800868e: f300 80ab bgt.w 80087e8 <__aeabi_dmul+0x238> 8008692: f114 0f36 cmn.w r4, #54 @ 0x36 8008696: bfde ittt le 8008698: 2000 movle r0, #0 800869a: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 800869e: bd70 pople {r4, r5, r6, pc} 80086a0: f1c4 0400 rsb r4, r4, #0 80086a4: 3c20 subs r4, #32 80086a6: da35 bge.n 8008714 <__aeabi_dmul+0x164> 80086a8: 340c adds r4, #12 80086aa: dc1b bgt.n 80086e4 <__aeabi_dmul+0x134> 80086ac: f104 0414 add.w r4, r4, #20 80086b0: f1c4 0520 rsb r5, r4, #32 80086b4: fa00 f305 lsl.w r3, r0, r5 80086b8: fa20 f004 lsr.w r0, r0, r4 80086bc: fa01 f205 lsl.w r2, r1, r5 80086c0: ea40 0002 orr.w r0, r0, r2 80086c4: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 80086c8: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 80086cc: eb10 70d3 adds.w r0, r0, r3, lsr #31 80086d0: fa21 f604 lsr.w r6, r1, r4 80086d4: eb42 0106 adc.w r1, r2, r6 80086d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80086dc: bf08 it eq 80086de: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80086e2: bd70 pop {r4, r5, r6, pc} 80086e4: f1c4 040c rsb r4, r4, #12 80086e8: f1c4 0520 rsb r5, r4, #32 80086ec: fa00 f304 lsl.w r3, r0, r4 80086f0: fa20 f005 lsr.w r0, r0, r5 80086f4: fa01 f204 lsl.w r2, r1, r4 80086f8: ea40 0002 orr.w r0, r0, r2 80086fc: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8008700: eb10 70d3 adds.w r0, r0, r3, lsr #31 8008704: f141 0100 adc.w r1, r1, #0 8008708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 800870c: bf08 it eq 800870e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8008712: bd70 pop {r4, r5, r6, pc} 8008714: f1c4 0520 rsb r5, r4, #32 8008718: fa00 f205 lsl.w r2, r0, r5 800871c: ea4e 0e02 orr.w lr, lr, r2 8008720: fa20 f304 lsr.w r3, r0, r4 8008724: fa01 f205 lsl.w r2, r1, r5 8008728: ea43 0302 orr.w r3, r3, r2 800872c: fa21 f004 lsr.w r0, r1, r4 8008730: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8008734: fa21 f204 lsr.w r2, r1, r4 8008738: ea20 0002 bic.w r0, r0, r2 800873c: eb00 70d3 add.w r0, r0, r3, lsr #31 8008740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8008744: bf08 it eq 8008746: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800874a: bd70 pop {r4, r5, r6, pc} 800874c: f094 0f00 teq r4, #0 8008750: d10f bne.n 8008772 <__aeabi_dmul+0x1c2> 8008752: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 8008756: 0040 lsls r0, r0, #1 8008758: eb41 0101 adc.w r1, r1, r1 800875c: f411 1f80 tst.w r1, #1048576 @ 0x100000 8008760: bf08 it eq 8008762: 3c01 subeq r4, #1 8008764: d0f7 beq.n 8008756 <__aeabi_dmul+0x1a6> 8008766: ea41 0106 orr.w r1, r1, r6 800876a: f095 0f00 teq r5, #0 800876e: bf18 it ne 8008770: 4770 bxne lr 8008772: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 8008776: 0052 lsls r2, r2, #1 8008778: eb43 0303 adc.w r3, r3, r3 800877c: f413 1f80 tst.w r3, #1048576 @ 0x100000 8008780: bf08 it eq 8008782: 3d01 subeq r5, #1 8008784: d0f7 beq.n 8008776 <__aeabi_dmul+0x1c6> 8008786: ea43 0306 orr.w r3, r3, r6 800878a: 4770 bx lr 800878c: ea94 0f0c teq r4, ip 8008790: ea0c 5513 and.w r5, ip, r3, lsr #20 8008794: bf18 it ne 8008796: ea95 0f0c teqne r5, ip 800879a: d00c beq.n 80087b6 <__aeabi_dmul+0x206> 800879c: ea50 0641 orrs.w r6, r0, r1, lsl #1 80087a0: bf18 it ne 80087a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80087a6: d1d1 bne.n 800874c <__aeabi_dmul+0x19c> 80087a8: ea81 0103 eor.w r1, r1, r3 80087ac: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80087b0: f04f 0000 mov.w r0, #0 80087b4: bd70 pop {r4, r5, r6, pc} 80087b6: ea50 0641 orrs.w r6, r0, r1, lsl #1 80087ba: bf06 itte eq 80087bc: 4610 moveq r0, r2 80087be: 4619 moveq r1, r3 80087c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80087c4: d019 beq.n 80087fa <__aeabi_dmul+0x24a> 80087c6: ea94 0f0c teq r4, ip 80087ca: d102 bne.n 80087d2 <__aeabi_dmul+0x222> 80087cc: ea50 3601 orrs.w r6, r0, r1, lsl #12 80087d0: d113 bne.n 80087fa <__aeabi_dmul+0x24a> 80087d2: ea95 0f0c teq r5, ip 80087d6: d105 bne.n 80087e4 <__aeabi_dmul+0x234> 80087d8: ea52 3603 orrs.w r6, r2, r3, lsl #12 80087dc: bf1c itt ne 80087de: 4610 movne r0, r2 80087e0: 4619 movne r1, r3 80087e2: d10a bne.n 80087fa <__aeabi_dmul+0x24a> 80087e4: ea81 0103 eor.w r1, r1, r3 80087e8: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80087ec: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 80087f0: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 80087f4: f04f 0000 mov.w r0, #0 80087f8: bd70 pop {r4, r5, r6, pc} 80087fa: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 80087fe: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 8008802: bd70 pop {r4, r5, r6, pc} 08008804 <__aeabi_ddiv>: 8008804: b570 push {r4, r5, r6, lr} 8008806: f04f 0cff mov.w ip, #255 @ 0xff 800880a: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 800880e: ea1c 5411 ands.w r4, ip, r1, lsr #20 8008812: bf1d ittte ne 8008814: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8008818: ea94 0f0c teqne r4, ip 800881c: ea95 0f0c teqne r5, ip 8008820: f000 f8a7 bleq 8008972 <__aeabi_ddiv+0x16e> 8008824: eba4 0405 sub.w r4, r4, r5 8008828: ea81 0e03 eor.w lr, r1, r3 800882c: ea52 3503 orrs.w r5, r2, r3, lsl #12 8008830: ea4f 3101 mov.w r1, r1, lsl #12 8008834: f000 8088 beq.w 8008948 <__aeabi_ddiv+0x144> 8008838: ea4f 3303 mov.w r3, r3, lsl #12 800883c: f04f 5580 mov.w r5, #268435456 @ 0x10000000 8008840: ea45 1313 orr.w r3, r5, r3, lsr #4 8008844: ea43 6312 orr.w r3, r3, r2, lsr #24 8008848: ea4f 2202 mov.w r2, r2, lsl #8 800884c: ea45 1511 orr.w r5, r5, r1, lsr #4 8008850: ea45 6510 orr.w r5, r5, r0, lsr #24 8008854: ea4f 2600 mov.w r6, r0, lsl #8 8008858: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000 800885c: 429d cmp r5, r3 800885e: bf08 it eq 8008860: 4296 cmpeq r6, r2 8008862: f144 04fd adc.w r4, r4, #253 @ 0xfd 8008866: f504 7440 add.w r4, r4, #768 @ 0x300 800886a: d202 bcs.n 8008872 <__aeabi_ddiv+0x6e> 800886c: 085b lsrs r3, r3, #1 800886e: ea4f 0232 mov.w r2, r2, rrx 8008872: 1ab6 subs r6, r6, r2 8008874: eb65 0503 sbc.w r5, r5, r3 8008878: 085b lsrs r3, r3, #1 800887a: ea4f 0232 mov.w r2, r2, rrx 800887e: f44f 1080 mov.w r0, #1048576 @ 0x100000 8008882: f44f 2c00 mov.w ip, #524288 @ 0x80000 8008886: ebb6 0e02 subs.w lr, r6, r2 800888a: eb75 0e03 sbcs.w lr, r5, r3 800888e: bf22 ittt cs 8008890: 1ab6 subcs r6, r6, r2 8008892: 4675 movcs r5, lr 8008894: ea40 000c orrcs.w r0, r0, ip 8008898: 085b lsrs r3, r3, #1 800889a: ea4f 0232 mov.w r2, r2, rrx 800889e: ebb6 0e02 subs.w lr, r6, r2 80088a2: eb75 0e03 sbcs.w lr, r5, r3 80088a6: bf22 ittt cs 80088a8: 1ab6 subcs r6, r6, r2 80088aa: 4675 movcs r5, lr 80088ac: ea40 005c orrcs.w r0, r0, ip, lsr #1 80088b0: 085b lsrs r3, r3, #1 80088b2: ea4f 0232 mov.w r2, r2, rrx 80088b6: ebb6 0e02 subs.w lr, r6, r2 80088ba: eb75 0e03 sbcs.w lr, r5, r3 80088be: bf22 ittt cs 80088c0: 1ab6 subcs r6, r6, r2 80088c2: 4675 movcs r5, lr 80088c4: ea40 009c orrcs.w r0, r0, ip, lsr #2 80088c8: 085b lsrs r3, r3, #1 80088ca: ea4f 0232 mov.w r2, r2, rrx 80088ce: ebb6 0e02 subs.w lr, r6, r2 80088d2: eb75 0e03 sbcs.w lr, r5, r3 80088d6: bf22 ittt cs 80088d8: 1ab6 subcs r6, r6, r2 80088da: 4675 movcs r5, lr 80088dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80088e0: ea55 0e06 orrs.w lr, r5, r6 80088e4: d018 beq.n 8008918 <__aeabi_ddiv+0x114> 80088e6: ea4f 1505 mov.w r5, r5, lsl #4 80088ea: ea45 7516 orr.w r5, r5, r6, lsr #28 80088ee: ea4f 1606 mov.w r6, r6, lsl #4 80088f2: ea4f 03c3 mov.w r3, r3, lsl #3 80088f6: ea43 7352 orr.w r3, r3, r2, lsr #29 80088fa: ea4f 02c2 mov.w r2, r2, lsl #3 80088fe: ea5f 1c1c movs.w ip, ip, lsr #4 8008902: d1c0 bne.n 8008886 <__aeabi_ddiv+0x82> 8008904: f411 1f80 tst.w r1, #1048576 @ 0x100000 8008908: d10b bne.n 8008922 <__aeabi_ddiv+0x11e> 800890a: ea41 0100 orr.w r1, r1, r0 800890e: f04f 0000 mov.w r0, #0 8008912: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000 8008916: e7b6 b.n 8008886 <__aeabi_ddiv+0x82> 8008918: f411 1f80 tst.w r1, #1048576 @ 0x100000 800891c: bf04 itt eq 800891e: 4301 orreq r1, r0 8008920: 2000 moveq r0, #0 8008922: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8008926: bf88 it hi 8008928: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 800892c: f63f aeaf bhi.w 800868e <__aeabi_dmul+0xde> 8008930: ebb5 0c03 subs.w ip, r5, r3 8008934: bf04 itt eq 8008936: ebb6 0c02 subseq.w ip, r6, r2 800893a: ea5f 0c50 movseq.w ip, r0, lsr #1 800893e: f150 0000 adcs.w r0, r0, #0 8008942: eb41 5104 adc.w r1, r1, r4, lsl #20 8008946: bd70 pop {r4, r5, r6, pc} 8008948: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000 800894c: ea4e 3111 orr.w r1, lr, r1, lsr #12 8008950: eb14 045c adds.w r4, r4, ip, lsr #1 8008954: bfc2 ittt gt 8008956: ebd4 050c rsbsgt r5, r4, ip 800895a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800895e: bd70 popgt {r4, r5, r6, pc} 8008960: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008964: f04f 0e00 mov.w lr, #0 8008968: 3c01 subs r4, #1 800896a: e690 b.n 800868e <__aeabi_dmul+0xde> 800896c: ea45 0e06 orr.w lr, r5, r6 8008970: e68d b.n 800868e <__aeabi_dmul+0xde> 8008972: ea0c 5513 and.w r5, ip, r3, lsr #20 8008976: ea94 0f0c teq r4, ip 800897a: bf08 it eq 800897c: ea95 0f0c teqeq r5, ip 8008980: f43f af3b beq.w 80087fa <__aeabi_dmul+0x24a> 8008984: ea94 0f0c teq r4, ip 8008988: d10a bne.n 80089a0 <__aeabi_ddiv+0x19c> 800898a: ea50 3401 orrs.w r4, r0, r1, lsl #12 800898e: f47f af34 bne.w 80087fa <__aeabi_dmul+0x24a> 8008992: ea95 0f0c teq r5, ip 8008996: f47f af25 bne.w 80087e4 <__aeabi_dmul+0x234> 800899a: 4610 mov r0, r2 800899c: 4619 mov r1, r3 800899e: e72c b.n 80087fa <__aeabi_dmul+0x24a> 80089a0: ea95 0f0c teq r5, ip 80089a4: d106 bne.n 80089b4 <__aeabi_ddiv+0x1b0> 80089a6: ea52 3503 orrs.w r5, r2, r3, lsl #12 80089aa: f43f aefd beq.w 80087a8 <__aeabi_dmul+0x1f8> 80089ae: 4610 mov r0, r2 80089b0: 4619 mov r1, r3 80089b2: e722 b.n 80087fa <__aeabi_dmul+0x24a> 80089b4: ea50 0641 orrs.w r6, r0, r1, lsl #1 80089b8: bf18 it ne 80089ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80089be: f47f aec5 bne.w 800874c <__aeabi_dmul+0x19c> 80089c2: ea50 0441 orrs.w r4, r0, r1, lsl #1 80089c6: f47f af0d bne.w 80087e4 <__aeabi_dmul+0x234> 80089ca: ea52 0543 orrs.w r5, r2, r3, lsl #1 80089ce: f47f aeeb bne.w 80087a8 <__aeabi_dmul+0x1f8> 80089d2: e712 b.n 80087fa <__aeabi_dmul+0x24a> 080089d4 <__gedf2>: 80089d4: f04f 3cff mov.w ip, #4294967295 80089d8: e006 b.n 80089e8 <__cmpdf2+0x4> 80089da: bf00 nop 080089dc <__ledf2>: 80089dc: f04f 0c01 mov.w ip, #1 80089e0: e002 b.n 80089e8 <__cmpdf2+0x4> 80089e2: bf00 nop 080089e4 <__cmpdf2>: 80089e4: f04f 0c01 mov.w ip, #1 80089e8: f84d cd04 str.w ip, [sp, #-4]! 80089ec: ea4f 0c41 mov.w ip, r1, lsl #1 80089f0: ea7f 5c6c mvns.w ip, ip, asr #21 80089f4: ea4f 0c43 mov.w ip, r3, lsl #1 80089f8: bf18 it ne 80089fa: ea7f 5c6c mvnsne.w ip, ip, asr #21 80089fe: d01b beq.n 8008a38 <__cmpdf2+0x54> 8008a00: b001 add sp, #4 8008a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8008a06: bf0c ite eq 8008a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8008a0c: ea91 0f03 teqne r1, r3 8008a10: bf02 ittt eq 8008a12: ea90 0f02 teqeq r0, r2 8008a16: 2000 moveq r0, #0 8008a18: 4770 bxeq lr 8008a1a: f110 0f00 cmn.w r0, #0 8008a1e: ea91 0f03 teq r1, r3 8008a22: bf58 it pl 8008a24: 4299 cmppl r1, r3 8008a26: bf08 it eq 8008a28: 4290 cmpeq r0, r2 8008a2a: bf2c ite cs 8008a2c: 17d8 asrcs r0, r3, #31 8008a2e: ea6f 70e3 mvncc.w r0, r3, asr #31 8008a32: f040 0001 orr.w r0, r0, #1 8008a36: 4770 bx lr 8008a38: ea4f 0c41 mov.w ip, r1, lsl #1 8008a3c: ea7f 5c6c mvns.w ip, ip, asr #21 8008a40: d102 bne.n 8008a48 <__cmpdf2+0x64> 8008a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8008a46: d107 bne.n 8008a58 <__cmpdf2+0x74> 8008a48: ea4f 0c43 mov.w ip, r3, lsl #1 8008a4c: ea7f 5c6c mvns.w ip, ip, asr #21 8008a50: d1d6 bne.n 8008a00 <__cmpdf2+0x1c> 8008a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8008a56: d0d3 beq.n 8008a00 <__cmpdf2+0x1c> 8008a58: f85d 0b04 ldr.w r0, [sp], #4 8008a5c: 4770 bx lr 8008a5e: bf00 nop 08008a60 <__aeabi_cdrcmple>: 8008a60: 4684 mov ip, r0 8008a62: 4610 mov r0, r2 8008a64: 4662 mov r2, ip 8008a66: 468c mov ip, r1 8008a68: 4619 mov r1, r3 8008a6a: 4663 mov r3, ip 8008a6c: e000 b.n 8008a70 <__aeabi_cdcmpeq> 8008a6e: bf00 nop 08008a70 <__aeabi_cdcmpeq>: 8008a70: b501 push {r0, lr} 8008a72: f7ff ffb7 bl 80089e4 <__cmpdf2> 8008a76: 2800 cmp r0, #0 8008a78: bf48 it mi 8008a7a: f110 0f00 cmnmi.w r0, #0 8008a7e: bd01 pop {r0, pc} 08008a80 <__aeabi_dcmpeq>: 8008a80: f84d ed08 str.w lr, [sp, #-8]! 8008a84: f7ff fff4 bl 8008a70 <__aeabi_cdcmpeq> 8008a88: bf0c ite eq 8008a8a: 2001 moveq r0, #1 8008a8c: 2000 movne r0, #0 8008a8e: f85d fb08 ldr.w pc, [sp], #8 8008a92: bf00 nop 08008a94 <__aeabi_dcmplt>: 8008a94: f84d ed08 str.w lr, [sp, #-8]! 8008a98: f7ff ffea bl 8008a70 <__aeabi_cdcmpeq> 8008a9c: bf34 ite cc 8008a9e: 2001 movcc r0, #1 8008aa0: 2000 movcs r0, #0 8008aa2: f85d fb08 ldr.w pc, [sp], #8 8008aa6: bf00 nop 08008aa8 <__aeabi_dcmple>: 8008aa8: f84d ed08 str.w lr, [sp, #-8]! 8008aac: f7ff ffe0 bl 8008a70 <__aeabi_cdcmpeq> 8008ab0: bf94 ite ls 8008ab2: 2001 movls r0, #1 8008ab4: 2000 movhi r0, #0 8008ab6: f85d fb08 ldr.w pc, [sp], #8 8008aba: bf00 nop 08008abc <__aeabi_dcmpge>: 8008abc: f84d ed08 str.w lr, [sp, #-8]! 8008ac0: f7ff ffce bl 8008a60 <__aeabi_cdrcmple> 8008ac4: bf94 ite ls 8008ac6: 2001 movls r0, #1 8008ac8: 2000 movhi r0, #0 8008aca: f85d fb08 ldr.w pc, [sp], #8 8008ace: bf00 nop 08008ad0 <__aeabi_dcmpgt>: 8008ad0: f84d ed08 str.w lr, [sp, #-8]! 8008ad4: f7ff ffc4 bl 8008a60 <__aeabi_cdrcmple> 8008ad8: bf34 ite cc 8008ada: 2001 movcc r0, #1 8008adc: 2000 movcs r0, #0 8008ade: f85d fb08 ldr.w pc, [sp], #8 8008ae2: bf00 nop 08008ae4 <__aeabi_dcmpun>: 8008ae4: ea4f 0c41 mov.w ip, r1, lsl #1 8008ae8: ea7f 5c6c mvns.w ip, ip, asr #21 8008aec: d102 bne.n 8008af4 <__aeabi_dcmpun+0x10> 8008aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8008af2: d10a bne.n 8008b0a <__aeabi_dcmpun+0x26> 8008af4: ea4f 0c43 mov.w ip, r3, lsl #1 8008af8: ea7f 5c6c mvns.w ip, ip, asr #21 8008afc: d102 bne.n 8008b04 <__aeabi_dcmpun+0x20> 8008afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8008b02: d102 bne.n 8008b0a <__aeabi_dcmpun+0x26> 8008b04: f04f 0000 mov.w r0, #0 8008b08: 4770 bx lr 8008b0a: f04f 0001 mov.w r0, #1 8008b0e: 4770 bx lr 08008b10 <__aeabi_d2iz>: 8008b10: ea4f 0241 mov.w r2, r1, lsl #1 8008b14: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 8008b18: d215 bcs.n 8008b46 <__aeabi_d2iz+0x36> 8008b1a: d511 bpl.n 8008b40 <__aeabi_d2iz+0x30> 8008b1c: f46f 7378 mvn.w r3, #992 @ 0x3e0 8008b20: ebb3 5262 subs.w r2, r3, r2, asr #21 8008b24: d912 bls.n 8008b4c <__aeabi_d2iz+0x3c> 8008b26: ea4f 23c1 mov.w r3, r1, lsl #11 8008b2a: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8008b2e: ea43 5350 orr.w r3, r3, r0, lsr #21 8008b32: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8008b36: fa23 f002 lsr.w r0, r3, r2 8008b3a: bf18 it ne 8008b3c: 4240 negne r0, r0 8008b3e: 4770 bx lr 8008b40: f04f 0000 mov.w r0, #0 8008b44: 4770 bx lr 8008b46: ea50 3001 orrs.w r0, r0, r1, lsl #12 8008b4a: d105 bne.n 8008b58 <__aeabi_d2iz+0x48> 8008b4c: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 8008b50: bf08 it eq 8008b52: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 8008b56: 4770 bx lr 8008b58: f04f 0000 mov.w r0, #0 8008b5c: 4770 bx lr 8008b5e: bf00 nop 08008b60 <__aeabi_d2f>: 8008b60: ea4f 0241 mov.w r2, r1, lsl #1 8008b64: f1b2 43e0 subs.w r3, r2, #1879048192 @ 0x70000000 8008b68: bf24 itt cs 8008b6a: f5b3 1c00 subscs.w ip, r3, #2097152 @ 0x200000 8008b6e: f1dc 5cfe rsbscs ip, ip, #532676608 @ 0x1fc00000 8008b72: d90d bls.n 8008b90 <__aeabi_d2f+0x30> 8008b74: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8008b78: ea4f 02c0 mov.w r2, r0, lsl #3 8008b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29 8008b80: f1b2 4f00 cmp.w r2, #2147483648 @ 0x80000000 8008b84: eb40 0083 adc.w r0, r0, r3, lsl #2 8008b88: bf08 it eq 8008b8a: f020 0001 biceq.w r0, r0, #1 8008b8e: 4770 bx lr 8008b90: f011 4f80 tst.w r1, #1073741824 @ 0x40000000 8008b94: d121 bne.n 8008bda <__aeabi_d2f+0x7a> 8008b96: f113 7238 adds.w r2, r3, #48234496 @ 0x2e00000 8008b9a: bfbc itt lt 8008b9c: f001 4000 andlt.w r0, r1, #2147483648 @ 0x80000000 8008ba0: 4770 bxlt lr 8008ba2: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008ba6: ea4f 5252 mov.w r2, r2, lsr #21 8008baa: f1c2 0218 rsb r2, r2, #24 8008bae: f1c2 0c20 rsb ip, r2, #32 8008bb2: fa10 f30c lsls.w r3, r0, ip 8008bb6: fa20 f002 lsr.w r0, r0, r2 8008bba: bf18 it ne 8008bbc: f040 0001 orrne.w r0, r0, #1 8008bc0: ea4f 23c1 mov.w r3, r1, lsl #11 8008bc4: ea4f 23d3 mov.w r3, r3, lsr #11 8008bc8: fa03 fc0c lsl.w ip, r3, ip 8008bcc: ea40 000c orr.w r0, r0, ip 8008bd0: fa23 f302 lsr.w r3, r3, r2 8008bd4: ea4f 0343 mov.w r3, r3, lsl #1 8008bd8: e7cc b.n 8008b74 <__aeabi_d2f+0x14> 8008bda: ea7f 5362 mvns.w r3, r2, asr #21 8008bde: d107 bne.n 8008bf0 <__aeabi_d2f+0x90> 8008be0: ea50 3301 orrs.w r3, r0, r1, lsl #12 8008be4: bf1e ittt ne 8008be6: f04f 40fe movne.w r0, #2130706432 @ 0x7f000000 8008bea: f440 0040 orrne.w r0, r0, #12582912 @ 0xc00000 8008bee: 4770 bxne lr 8008bf0: f001 4000 and.w r0, r1, #2147483648 @ 0x80000000 8008bf4: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008bf8: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008bfc: 4770 bx lr 8008bfe: bf00 nop 08008c00 <__aeabi_frsub>: 8008c00: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 8008c04: e002 b.n 8008c0c <__addsf3> 8008c06: bf00 nop 08008c08 <__aeabi_fsub>: 8008c08: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 08008c0c <__addsf3>: 8008c0c: 0042 lsls r2, r0, #1 8008c0e: bf1f itttt ne 8008c10: ea5f 0341 movsne.w r3, r1, lsl #1 8008c14: ea92 0f03 teqne r2, r3 8008c18: ea7f 6c22 mvnsne.w ip, r2, asr #24 8008c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24 8008c20: d06a beq.n 8008cf8 <__addsf3+0xec> 8008c22: ea4f 6212 mov.w r2, r2, lsr #24 8008c26: ebd2 6313 rsbs r3, r2, r3, lsr #24 8008c2a: bfc1 itttt gt 8008c2c: 18d2 addgt r2, r2, r3 8008c2e: 4041 eorgt r1, r0 8008c30: 4048 eorgt r0, r1 8008c32: 4041 eorgt r1, r0 8008c34: bfb8 it lt 8008c36: 425b neglt r3, r3 8008c38: 2b19 cmp r3, #25 8008c3a: bf88 it hi 8008c3c: 4770 bxhi lr 8008c3e: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 8008c42: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008c46: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 8008c4a: bf18 it ne 8008c4c: 4240 negne r0, r0 8008c4e: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8008c52: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 8008c56: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 8008c5a: bf18 it ne 8008c5c: 4249 negne r1, r1 8008c5e: ea92 0f03 teq r2, r3 8008c62: d03f beq.n 8008ce4 <__addsf3+0xd8> 8008c64: f1a2 0201 sub.w r2, r2, #1 8008c68: fa41 fc03 asr.w ip, r1, r3 8008c6c: eb10 000c adds.w r0, r0, ip 8008c70: f1c3 0320 rsb r3, r3, #32 8008c74: fa01 f103 lsl.w r1, r1, r3 8008c78: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8008c7c: d502 bpl.n 8008c84 <__addsf3+0x78> 8008c7e: 4249 negs r1, r1 8008c80: eb60 0040 sbc.w r0, r0, r0, lsl #1 8008c84: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 8008c88: d313 bcc.n 8008cb2 <__addsf3+0xa6> 8008c8a: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 8008c8e: d306 bcc.n 8008c9e <__addsf3+0x92> 8008c90: 0840 lsrs r0, r0, #1 8008c92: ea4f 0131 mov.w r1, r1, rrx 8008c96: f102 0201 add.w r2, r2, #1 8008c9a: 2afe cmp r2, #254 @ 0xfe 8008c9c: d251 bcs.n 8008d42 <__addsf3+0x136> 8008c9e: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 8008ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23 8008ca6: bf08 it eq 8008ca8: f020 0001 biceq.w r0, r0, #1 8008cac: ea40 0003 orr.w r0, r0, r3 8008cb0: 4770 bx lr 8008cb2: 0049 lsls r1, r1, #1 8008cb4: eb40 0000 adc.w r0, r0, r0 8008cb8: 3a01 subs r2, #1 8008cba: bf28 it cs 8008cbc: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 8008cc0: d2ed bcs.n 8008c9e <__addsf3+0x92> 8008cc2: fab0 fc80 clz ip, r0 8008cc6: f1ac 0c08 sub.w ip, ip, #8 8008cca: ebb2 020c subs.w r2, r2, ip 8008cce: fa00 f00c lsl.w r0, r0, ip 8008cd2: bfaa itet ge 8008cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23 8008cd8: 4252 neglt r2, r2 8008cda: 4318 orrge r0, r3 8008cdc: bfbc itt lt 8008cde: 40d0 lsrlt r0, r2 8008ce0: 4318 orrlt r0, r3 8008ce2: 4770 bx lr 8008ce4: f092 0f00 teq r2, #0 8008ce8: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 8008cec: bf06 itte eq 8008cee: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 8008cf2: 3201 addeq r2, #1 8008cf4: 3b01 subne r3, #1 8008cf6: e7b5 b.n 8008c64 <__addsf3+0x58> 8008cf8: ea4f 0341 mov.w r3, r1, lsl #1 8008cfc: ea7f 6c22 mvns.w ip, r2, asr #24 8008d00: bf18 it ne 8008d02: ea7f 6c23 mvnsne.w ip, r3, asr #24 8008d06: d021 beq.n 8008d4c <__addsf3+0x140> 8008d08: ea92 0f03 teq r2, r3 8008d0c: d004 beq.n 8008d18 <__addsf3+0x10c> 8008d0e: f092 0f00 teq r2, #0 8008d12: bf08 it eq 8008d14: 4608 moveq r0, r1 8008d16: 4770 bx lr 8008d18: ea90 0f01 teq r0, r1 8008d1c: bf1c itt ne 8008d1e: 2000 movne r0, #0 8008d20: 4770 bxne lr 8008d22: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 8008d26: d104 bne.n 8008d32 <__addsf3+0x126> 8008d28: 0040 lsls r0, r0, #1 8008d2a: bf28 it cs 8008d2c: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 8008d30: 4770 bx lr 8008d32: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 8008d36: bf3c itt cc 8008d38: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 8008d3c: 4770 bxcc lr 8008d3e: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8008d42: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 8008d46: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008d4a: 4770 bx lr 8008d4c: ea7f 6222 mvns.w r2, r2, asr #24 8008d50: bf16 itet ne 8008d52: 4608 movne r0, r1 8008d54: ea7f 6323 mvnseq.w r3, r3, asr #24 8008d58: 4601 movne r1, r0 8008d5a: 0242 lsls r2, r0, #9 8008d5c: bf06 itte eq 8008d5e: ea5f 2341 movseq.w r3, r1, lsl #9 8008d62: ea90 0f01 teqeq r0, r1 8008d66: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 8008d6a: 4770 bx lr 08008d6c <__aeabi_ui2f>: 8008d6c: f04f 0300 mov.w r3, #0 8008d70: e004 b.n 8008d7c <__aeabi_i2f+0x8> 8008d72: bf00 nop 08008d74 <__aeabi_i2f>: 8008d74: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 8008d78: bf48 it mi 8008d7a: 4240 negmi r0, r0 8008d7c: ea5f 0c00 movs.w ip, r0 8008d80: bf08 it eq 8008d82: 4770 bxeq lr 8008d84: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 8008d88: 4601 mov r1, r0 8008d8a: f04f 0000 mov.w r0, #0 8008d8e: e01c b.n 8008dca <__aeabi_l2f+0x2a> 08008d90 <__aeabi_ul2f>: 8008d90: ea50 0201 orrs.w r2, r0, r1 8008d94: bf08 it eq 8008d96: 4770 bxeq lr 8008d98: f04f 0300 mov.w r3, #0 8008d9c: e00a b.n 8008db4 <__aeabi_l2f+0x14> 8008d9e: bf00 nop 08008da0 <__aeabi_l2f>: 8008da0: ea50 0201 orrs.w r2, r0, r1 8008da4: bf08 it eq 8008da6: 4770 bxeq lr 8008da8: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 8008dac: d502 bpl.n 8008db4 <__aeabi_l2f+0x14> 8008dae: 4240 negs r0, r0 8008db0: eb61 0141 sbc.w r1, r1, r1, lsl #1 8008db4: ea5f 0c01 movs.w ip, r1 8008db8: bf02 ittt eq 8008dba: 4684 moveq ip, r0 8008dbc: 4601 moveq r1, r0 8008dbe: 2000 moveq r0, #0 8008dc0: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 8008dc4: bf08 it eq 8008dc6: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 8008dca: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 8008dce: fabc f28c clz r2, ip 8008dd2: 3a08 subs r2, #8 8008dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23 8008dd8: db10 blt.n 8008dfc <__aeabi_l2f+0x5c> 8008dda: fa01 fc02 lsl.w ip, r1, r2 8008dde: 4463 add r3, ip 8008de0: fa00 fc02 lsl.w ip, r0, r2 8008de4: f1c2 0220 rsb r2, r2, #32 8008de8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8008dec: fa20 f202 lsr.w r2, r0, r2 8008df0: eb43 0002 adc.w r0, r3, r2 8008df4: bf08 it eq 8008df6: f020 0001 biceq.w r0, r0, #1 8008dfa: 4770 bx lr 8008dfc: f102 0220 add.w r2, r2, #32 8008e00: fa01 fc02 lsl.w ip, r1, r2 8008e04: f1c2 0220 rsb r2, r2, #32 8008e08: ea50 004c orrs.w r0, r0, ip, lsl #1 8008e0c: fa21 f202 lsr.w r2, r1, r2 8008e10: eb43 0002 adc.w r0, r3, r2 8008e14: bf08 it eq 8008e16: ea20 70dc biceq.w r0, r0, ip, lsr #31 8008e1a: 4770 bx lr 08008e1c <__aeabi_fmul>: 8008e1c: f04f 0cff mov.w ip, #255 @ 0xff 8008e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8008e24: bf1e ittt ne 8008e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8008e2a: ea92 0f0c teqne r2, ip 8008e2e: ea93 0f0c teqne r3, ip 8008e32: d06f beq.n 8008f14 <__aeabi_fmul+0xf8> 8008e34: 441a add r2, r3 8008e36: ea80 0c01 eor.w ip, r0, r1 8008e3a: 0240 lsls r0, r0, #9 8008e3c: bf18 it ne 8008e3e: ea5f 2141 movsne.w r1, r1, lsl #9 8008e42: d01e beq.n 8008e82 <__aeabi_fmul+0x66> 8008e44: f04f 6300 mov.w r3, #134217728 @ 0x8000000 8008e48: ea43 1050 orr.w r0, r3, r0, lsr #5 8008e4c: ea43 1151 orr.w r1, r3, r1, lsr #5 8008e50: fba0 3101 umull r3, r1, r0, r1 8008e54: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8008e58: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 8008e5c: bf3e ittt cc 8008e5e: 0049 lslcc r1, r1, #1 8008e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8008e64: 005b lslcc r3, r3, #1 8008e66: ea40 0001 orr.w r0, r0, r1 8008e6a: f162 027f sbc.w r2, r2, #127 @ 0x7f 8008e6e: 2afd cmp r2, #253 @ 0xfd 8008e70: d81d bhi.n 8008eae <__aeabi_fmul+0x92> 8008e72: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8008e76: eb40 50c2 adc.w r0, r0, r2, lsl #23 8008e7a: bf08 it eq 8008e7c: f020 0001 biceq.w r0, r0, #1 8008e80: 4770 bx lr 8008e82: f090 0f00 teq r0, #0 8008e86: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8008e8a: bf08 it eq 8008e8c: 0249 lsleq r1, r1, #9 8008e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9 8008e92: ea40 2051 orr.w r0, r0, r1, lsr #9 8008e96: 3a7f subs r2, #127 @ 0x7f 8008e98: bfc2 ittt gt 8008e9a: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 8008e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8008ea2: 4770 bxgt lr 8008ea4: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008ea8: f04f 0300 mov.w r3, #0 8008eac: 3a01 subs r2, #1 8008eae: dc5d bgt.n 8008f6c <__aeabi_fmul+0x150> 8008eb0: f112 0f19 cmn.w r2, #25 8008eb4: bfdc itt le 8008eb6: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 8008eba: 4770 bxle lr 8008ebc: f1c2 0200 rsb r2, r2, #0 8008ec0: 0041 lsls r1, r0, #1 8008ec2: fa21 f102 lsr.w r1, r1, r2 8008ec6: f1c2 0220 rsb r2, r2, #32 8008eca: fa00 fc02 lsl.w ip, r0, r2 8008ece: ea5f 0031 movs.w r0, r1, rrx 8008ed2: f140 0000 adc.w r0, r0, #0 8008ed6: ea53 034c orrs.w r3, r3, ip, lsl #1 8008eda: bf08 it eq 8008edc: ea20 70dc biceq.w r0, r0, ip, lsr #31 8008ee0: 4770 bx lr 8008ee2: f092 0f00 teq r2, #0 8008ee6: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 8008eea: bf02 ittt eq 8008eec: 0040 lsleq r0, r0, #1 8008eee: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 8008ef2: 3a01 subeq r2, #1 8008ef4: d0f9 beq.n 8008eea <__aeabi_fmul+0xce> 8008ef6: ea40 000c orr.w r0, r0, ip 8008efa: f093 0f00 teq r3, #0 8008efe: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8008f02: bf02 ittt eq 8008f04: 0049 lsleq r1, r1, #1 8008f06: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8008f0a: 3b01 subeq r3, #1 8008f0c: d0f9 beq.n 8008f02 <__aeabi_fmul+0xe6> 8008f0e: ea41 010c orr.w r1, r1, ip 8008f12: e78f b.n 8008e34 <__aeabi_fmul+0x18> 8008f14: ea0c 53d1 and.w r3, ip, r1, lsr #23 8008f18: ea92 0f0c teq r2, ip 8008f1c: bf18 it ne 8008f1e: ea93 0f0c teqne r3, ip 8008f22: d00a beq.n 8008f3a <__aeabi_fmul+0x11e> 8008f24: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 8008f28: bf18 it ne 8008f2a: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 8008f2e: d1d8 bne.n 8008ee2 <__aeabi_fmul+0xc6> 8008f30: ea80 0001 eor.w r0, r0, r1 8008f34: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8008f38: 4770 bx lr 8008f3a: f090 0f00 teq r0, #0 8008f3e: bf17 itett ne 8008f40: f090 4f00 teqne r0, #2147483648 @ 0x80000000 8008f44: 4608 moveq r0, r1 8008f46: f091 0f00 teqne r1, #0 8008f4a: f091 4f00 teqne r1, #2147483648 @ 0x80000000 8008f4e: d014 beq.n 8008f7a <__aeabi_fmul+0x15e> 8008f50: ea92 0f0c teq r2, ip 8008f54: d101 bne.n 8008f5a <__aeabi_fmul+0x13e> 8008f56: 0242 lsls r2, r0, #9 8008f58: d10f bne.n 8008f7a <__aeabi_fmul+0x15e> 8008f5a: ea93 0f0c teq r3, ip 8008f5e: d103 bne.n 8008f68 <__aeabi_fmul+0x14c> 8008f60: 024b lsls r3, r1, #9 8008f62: bf18 it ne 8008f64: 4608 movne r0, r1 8008f66: d108 bne.n 8008f7a <__aeabi_fmul+0x15e> 8008f68: ea80 0001 eor.w r0, r0, r1 8008f6c: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8008f70: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008f74: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008f78: 4770 bx lr 8008f7a: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008f7e: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 8008f82: 4770 bx lr 08008f84 <__aeabi_fdiv>: 8008f84: f04f 0cff mov.w ip, #255 @ 0xff 8008f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8008f8c: bf1e ittt ne 8008f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8008f92: ea92 0f0c teqne r2, ip 8008f96: ea93 0f0c teqne r3, ip 8008f9a: d069 beq.n 8009070 <__aeabi_fdiv+0xec> 8008f9c: eba2 0203 sub.w r2, r2, r3 8008fa0: ea80 0c01 eor.w ip, r0, r1 8008fa4: 0249 lsls r1, r1, #9 8008fa6: ea4f 2040 mov.w r0, r0, lsl #9 8008faa: d037 beq.n 800901c <__aeabi_fdiv+0x98> 8008fac: f04f 5380 mov.w r3, #268435456 @ 0x10000000 8008fb0: ea43 1111 orr.w r1, r3, r1, lsr #4 8008fb4: ea43 1310 orr.w r3, r3, r0, lsr #4 8008fb8: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8008fbc: 428b cmp r3, r1 8008fbe: bf38 it cc 8008fc0: 005b lslcc r3, r3, #1 8008fc2: f142 027d adc.w r2, r2, #125 @ 0x7d 8008fc6: f44f 0c00 mov.w ip, #8388608 @ 0x800000 8008fca: 428b cmp r3, r1 8008fcc: bf24 itt cs 8008fce: 1a5b subcs r3, r3, r1 8008fd0: ea40 000c orrcs.w r0, r0, ip 8008fd4: ebb3 0f51 cmp.w r3, r1, lsr #1 8008fd8: bf24 itt cs 8008fda: eba3 0351 subcs.w r3, r3, r1, lsr #1 8008fde: ea40 005c orrcs.w r0, r0, ip, lsr #1 8008fe2: ebb3 0f91 cmp.w r3, r1, lsr #2 8008fe6: bf24 itt cs 8008fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2 8008fec: ea40 009c orrcs.w r0, r0, ip, lsr #2 8008ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3 8008ff4: bf24 itt cs 8008ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3 8008ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8008ffe: 011b lsls r3, r3, #4 8009000: bf18 it ne 8009002: ea5f 1c1c movsne.w ip, ip, lsr #4 8009006: d1e0 bne.n 8008fca <__aeabi_fdiv+0x46> 8009008: 2afd cmp r2, #253 @ 0xfd 800900a: f63f af50 bhi.w 8008eae <__aeabi_fmul+0x92> 800900e: 428b cmp r3, r1 8009010: eb40 50c2 adc.w r0, r0, r2, lsl #23 8009014: bf08 it eq 8009016: f020 0001 biceq.w r0, r0, #1 800901a: 4770 bx lr 800901c: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8009020: ea4c 2050 orr.w r0, ip, r0, lsr #9 8009024: 327f adds r2, #127 @ 0x7f 8009026: bfc2 ittt gt 8009028: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 800902c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8009030: 4770 bxgt lr 8009032: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8009036: f04f 0300 mov.w r3, #0 800903a: 3a01 subs r2, #1 800903c: e737 b.n 8008eae <__aeabi_fmul+0x92> 800903e: f092 0f00 teq r2, #0 8009042: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 8009046: bf02 ittt eq 8009048: 0040 lsleq r0, r0, #1 800904a: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 800904e: 3a01 subeq r2, #1 8009050: d0f9 beq.n 8009046 <__aeabi_fdiv+0xc2> 8009052: ea40 000c orr.w r0, r0, ip 8009056: f093 0f00 teq r3, #0 800905a: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 800905e: bf02 ittt eq 8009060: 0049 lsleq r1, r1, #1 8009062: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8009066: 3b01 subeq r3, #1 8009068: d0f9 beq.n 800905e <__aeabi_fdiv+0xda> 800906a: ea41 010c orr.w r1, r1, ip 800906e: e795 b.n 8008f9c <__aeabi_fdiv+0x18> 8009070: ea0c 53d1 and.w r3, ip, r1, lsr #23 8009074: ea92 0f0c teq r2, ip 8009078: d108 bne.n 800908c <__aeabi_fdiv+0x108> 800907a: 0242 lsls r2, r0, #9 800907c: f47f af7d bne.w 8008f7a <__aeabi_fmul+0x15e> 8009080: ea93 0f0c teq r3, ip 8009084: f47f af70 bne.w 8008f68 <__aeabi_fmul+0x14c> 8009088: 4608 mov r0, r1 800908a: e776 b.n 8008f7a <__aeabi_fmul+0x15e> 800908c: ea93 0f0c teq r3, ip 8009090: d104 bne.n 800909c <__aeabi_fdiv+0x118> 8009092: 024b lsls r3, r1, #9 8009094: f43f af4c beq.w 8008f30 <__aeabi_fmul+0x114> 8009098: 4608 mov r0, r1 800909a: e76e b.n 8008f7a <__aeabi_fmul+0x15e> 800909c: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 80090a0: bf18 it ne 80090a2: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 80090a6: d1ca bne.n 800903e <__aeabi_fdiv+0xba> 80090a8: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 80090ac: f47f af5c bne.w 8008f68 <__aeabi_fmul+0x14c> 80090b0: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 80090b4: f47f af3c bne.w 8008f30 <__aeabi_fmul+0x114> 80090b8: e75f b.n 8008f7a <__aeabi_fmul+0x15e> 80090ba: bf00 nop 080090bc <__gesf2>: 80090bc: f04f 3cff mov.w ip, #4294967295 80090c0: e006 b.n 80090d0 <__cmpsf2+0x4> 80090c2: bf00 nop 080090c4 <__lesf2>: 80090c4: f04f 0c01 mov.w ip, #1 80090c8: e002 b.n 80090d0 <__cmpsf2+0x4> 80090ca: bf00 nop 080090cc <__cmpsf2>: 80090cc: f04f 0c01 mov.w ip, #1 80090d0: f84d cd04 str.w ip, [sp, #-4]! 80090d4: ea4f 0240 mov.w r2, r0, lsl #1 80090d8: ea4f 0341 mov.w r3, r1, lsl #1 80090dc: ea7f 6c22 mvns.w ip, r2, asr #24 80090e0: bf18 it ne 80090e2: ea7f 6c23 mvnsne.w ip, r3, asr #24 80090e6: d011 beq.n 800910c <__cmpsf2+0x40> 80090e8: b001 add sp, #4 80090ea: ea52 0c53 orrs.w ip, r2, r3, lsr #1 80090ee: bf18 it ne 80090f0: ea90 0f01 teqne r0, r1 80090f4: bf58 it pl 80090f6: ebb2 0003 subspl.w r0, r2, r3 80090fa: bf88 it hi 80090fc: 17c8 asrhi r0, r1, #31 80090fe: bf38 it cc 8009100: ea6f 70e1 mvncc.w r0, r1, asr #31 8009104: bf18 it ne 8009106: f040 0001 orrne.w r0, r0, #1 800910a: 4770 bx lr 800910c: ea7f 6c22 mvns.w ip, r2, asr #24 8009110: d102 bne.n 8009118 <__cmpsf2+0x4c> 8009112: ea5f 2c40 movs.w ip, r0, lsl #9 8009116: d105 bne.n 8009124 <__cmpsf2+0x58> 8009118: ea7f 6c23 mvns.w ip, r3, asr #24 800911c: d1e4 bne.n 80090e8 <__cmpsf2+0x1c> 800911e: ea5f 2c41 movs.w ip, r1, lsl #9 8009122: d0e1 beq.n 80090e8 <__cmpsf2+0x1c> 8009124: f85d 0b04 ldr.w r0, [sp], #4 8009128: 4770 bx lr 800912a: bf00 nop 0800912c <__aeabi_cfrcmple>: 800912c: 4684 mov ip, r0 800912e: 4608 mov r0, r1 8009130: 4661 mov r1, ip 8009132: e7ff b.n 8009134 <__aeabi_cfcmpeq> 08009134 <__aeabi_cfcmpeq>: 8009134: b50f push {r0, r1, r2, r3, lr} 8009136: f7ff ffc9 bl 80090cc <__cmpsf2> 800913a: 2800 cmp r0, #0 800913c: bf48 it mi 800913e: f110 0f00 cmnmi.w r0, #0 8009142: bd0f pop {r0, r1, r2, r3, pc} 08009144 <__aeabi_fcmpeq>: 8009144: f84d ed08 str.w lr, [sp, #-8]! 8009148: f7ff fff4 bl 8009134 <__aeabi_cfcmpeq> 800914c: bf0c ite eq 800914e: 2001 moveq r0, #1 8009150: 2000 movne r0, #0 8009152: f85d fb08 ldr.w pc, [sp], #8 8009156: bf00 nop 08009158 <__aeabi_fcmplt>: 8009158: f84d ed08 str.w lr, [sp, #-8]! 800915c: f7ff ffea bl 8009134 <__aeabi_cfcmpeq> 8009160: bf34 ite cc 8009162: 2001 movcc r0, #1 8009164: 2000 movcs r0, #0 8009166: f85d fb08 ldr.w pc, [sp], #8 800916a: bf00 nop 0800916c <__aeabi_fcmple>: 800916c: f84d ed08 str.w lr, [sp, #-8]! 8009170: f7ff ffe0 bl 8009134 <__aeabi_cfcmpeq> 8009174: bf94 ite ls 8009176: 2001 movls r0, #1 8009178: 2000 movhi r0, #0 800917a: f85d fb08 ldr.w pc, [sp], #8 800917e: bf00 nop 08009180 <__aeabi_fcmpge>: 8009180: f84d ed08 str.w lr, [sp, #-8]! 8009184: f7ff ffd2 bl 800912c <__aeabi_cfrcmple> 8009188: bf94 ite ls 800918a: 2001 movls r0, #1 800918c: 2000 movhi r0, #0 800918e: f85d fb08 ldr.w pc, [sp], #8 8009192: bf00 nop 08009194 <__aeabi_fcmpgt>: 8009194: f84d ed08 str.w lr, [sp, #-8]! 8009198: f7ff ffc8 bl 800912c <__aeabi_cfrcmple> 800919c: bf34 ite cc 800919e: 2001 movcc r0, #1 80091a0: 2000 movcs r0, #0 80091a2: f85d fb08 ldr.w pc, [sp], #8 80091a6: bf00 nop 080091a8 <__aeabi_f2iz>: 80091a8: ea4f 0240 mov.w r2, r0, lsl #1 80091ac: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 80091b0: d30f bcc.n 80091d2 <__aeabi_f2iz+0x2a> 80091b2: f04f 039e mov.w r3, #158 @ 0x9e 80091b6: ebb3 6212 subs.w r2, r3, r2, lsr #24 80091ba: d90d bls.n 80091d8 <__aeabi_f2iz+0x30> 80091bc: ea4f 2300 mov.w r3, r0, lsl #8 80091c0: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 80091c4: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 80091c8: fa23 f002 lsr.w r0, r3, r2 80091cc: bf18 it ne 80091ce: 4240 negne r0, r0 80091d0: 4770 bx lr 80091d2: f04f 0000 mov.w r0, #0 80091d6: 4770 bx lr 80091d8: f112 0f61 cmn.w r2, #97 @ 0x61 80091dc: d101 bne.n 80091e2 <__aeabi_f2iz+0x3a> 80091de: 0242 lsls r2, r0, #9 80091e0: d105 bne.n 80091ee <__aeabi_f2iz+0x46> 80091e2: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 80091e6: bf08 it eq 80091e8: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 80091ec: 4770 bx lr 80091ee: f04f 0000 mov.w r0, #0 80091f2: 4770 bx lr 080091f4 <__aeabi_uldivmod>: 80091f4: b953 cbnz r3, 800920c <__aeabi_uldivmod+0x18> 80091f6: b94a cbnz r2, 800920c <__aeabi_uldivmod+0x18> 80091f8: 2900 cmp r1, #0 80091fa: bf08 it eq 80091fc: 2800 cmpeq r0, #0 80091fe: bf1c itt ne 8009200: f04f 31ff movne.w r1, #4294967295 8009204: f04f 30ff movne.w r0, #4294967295 8009208: f000 b98c b.w 8009524 <__aeabi_idiv0> 800920c: f1ad 0c08 sub.w ip, sp, #8 8009210: e96d ce04 strd ip, lr, [sp, #-16]! 8009214: f000 f806 bl 8009224 <__udivmoddi4> 8009218: f8dd e004 ldr.w lr, [sp, #4] 800921c: e9dd 2302 ldrd r2, r3, [sp, #8] 8009220: b004 add sp, #16 8009222: 4770 bx lr 08009224 <__udivmoddi4>: 8009224: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8009228: 9d08 ldr r5, [sp, #32] 800922a: 468e mov lr, r1 800922c: 4604 mov r4, r0 800922e: 4688 mov r8, r1 8009230: 2b00 cmp r3, #0 8009232: d14a bne.n 80092ca <__udivmoddi4+0xa6> 8009234: 428a cmp r2, r1 8009236: 4617 mov r7, r2 8009238: d962 bls.n 8009300 <__udivmoddi4+0xdc> 800923a: fab2 f682 clz r6, r2 800923e: b14e cbz r6, 8009254 <__udivmoddi4+0x30> 8009240: f1c6 0320 rsb r3, r6, #32 8009244: fa01 f806 lsl.w r8, r1, r6 8009248: fa20 f303 lsr.w r3, r0, r3 800924c: 40b7 lsls r7, r6 800924e: ea43 0808 orr.w r8, r3, r8 8009252: 40b4 lsls r4, r6 8009254: ea4f 4e17 mov.w lr, r7, lsr #16 8009258: fbb8 f1fe udiv r1, r8, lr 800925c: fa1f fc87 uxth.w ip, r7 8009260: fb0e 8811 mls r8, lr, r1, r8 8009264: fb01 f20c mul.w r2, r1, ip 8009268: 0c23 lsrs r3, r4, #16 800926a: ea43 4308 orr.w r3, r3, r8, lsl #16 800926e: 429a cmp r2, r3 8009270: d909 bls.n 8009286 <__udivmoddi4+0x62> 8009272: 18fb adds r3, r7, r3 8009274: f101 30ff add.w r0, r1, #4294967295 8009278: f080 80eb bcs.w 8009452 <__udivmoddi4+0x22e> 800927c: 429a cmp r2, r3 800927e: f240 80e8 bls.w 8009452 <__udivmoddi4+0x22e> 8009282: 3902 subs r1, #2 8009284: 443b add r3, r7 8009286: 1a9a subs r2, r3, r2 8009288: fbb2 f0fe udiv r0, r2, lr 800928c: fb0e 2210 mls r2, lr, r0, r2 8009290: fb00 fc0c mul.w ip, r0, ip 8009294: b2a3 uxth r3, r4 8009296: ea43 4302 orr.w r3, r3, r2, lsl #16 800929a: 459c cmp ip, r3 800929c: d909 bls.n 80092b2 <__udivmoddi4+0x8e> 800929e: 18fb adds r3, r7, r3 80092a0: f100 32ff add.w r2, r0, #4294967295 80092a4: f080 80d7 bcs.w 8009456 <__udivmoddi4+0x232> 80092a8: 459c cmp ip, r3 80092aa: f240 80d4 bls.w 8009456 <__udivmoddi4+0x232> 80092ae: 443b add r3, r7 80092b0: 3802 subs r0, #2 80092b2: ea40 4001 orr.w r0, r0, r1, lsl #16 80092b6: 2100 movs r1, #0 80092b8: eba3 030c sub.w r3, r3, ip 80092bc: b11d cbz r5, 80092c6 <__udivmoddi4+0xa2> 80092be: 2200 movs r2, #0 80092c0: 40f3 lsrs r3, r6 80092c2: e9c5 3200 strd r3, r2, [r5] 80092c6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80092ca: 428b cmp r3, r1 80092cc: d905 bls.n 80092da <__udivmoddi4+0xb6> 80092ce: b10d cbz r5, 80092d4 <__udivmoddi4+0xb0> 80092d0: e9c5 0100 strd r0, r1, [r5] 80092d4: 2100 movs r1, #0 80092d6: 4608 mov r0, r1 80092d8: e7f5 b.n 80092c6 <__udivmoddi4+0xa2> 80092da: fab3 f183 clz r1, r3 80092de: 2900 cmp r1, #0 80092e0: d146 bne.n 8009370 <__udivmoddi4+0x14c> 80092e2: 4573 cmp r3, lr 80092e4: d302 bcc.n 80092ec <__udivmoddi4+0xc8> 80092e6: 4282 cmp r2, r0 80092e8: f200 8108 bhi.w 80094fc <__udivmoddi4+0x2d8> 80092ec: 1a84 subs r4, r0, r2 80092ee: eb6e 0203 sbc.w r2, lr, r3 80092f2: 2001 movs r0, #1 80092f4: 4690 mov r8, r2 80092f6: 2d00 cmp r5, #0 80092f8: d0e5 beq.n 80092c6 <__udivmoddi4+0xa2> 80092fa: e9c5 4800 strd r4, r8, [r5] 80092fe: e7e2 b.n 80092c6 <__udivmoddi4+0xa2> 8009300: 2a00 cmp r2, #0 8009302: f000 8091 beq.w 8009428 <__udivmoddi4+0x204> 8009306: fab2 f682 clz r6, r2 800930a: 2e00 cmp r6, #0 800930c: f040 80a5 bne.w 800945a <__udivmoddi4+0x236> 8009310: 1a8a subs r2, r1, r2 8009312: 2101 movs r1, #1 8009314: 0c03 lsrs r3, r0, #16 8009316: ea4f 4e17 mov.w lr, r7, lsr #16 800931a: b280 uxth r0, r0 800931c: b2bc uxth r4, r7 800931e: fbb2 fcfe udiv ip, r2, lr 8009322: fb0e 221c mls r2, lr, ip, r2 8009326: ea43 4302 orr.w r3, r3, r2, lsl #16 800932a: fb04 f20c mul.w r2, r4, ip 800932e: 429a cmp r2, r3 8009330: d907 bls.n 8009342 <__udivmoddi4+0x11e> 8009332: 18fb adds r3, r7, r3 8009334: f10c 38ff add.w r8, ip, #4294967295 8009338: d202 bcs.n 8009340 <__udivmoddi4+0x11c> 800933a: 429a cmp r2, r3 800933c: f200 80e3 bhi.w 8009506 <__udivmoddi4+0x2e2> 8009340: 46c4 mov ip, r8 8009342: 1a9b subs r3, r3, r2 8009344: fbb3 f2fe udiv r2, r3, lr 8009348: fb0e 3312 mls r3, lr, r2, r3 800934c: fb02 f404 mul.w r4, r2, r4 8009350: ea40 4303 orr.w r3, r0, r3, lsl #16 8009354: 429c cmp r4, r3 8009356: d907 bls.n 8009368 <__udivmoddi4+0x144> 8009358: 18fb adds r3, r7, r3 800935a: f102 30ff add.w r0, r2, #4294967295 800935e: d202 bcs.n 8009366 <__udivmoddi4+0x142> 8009360: 429c cmp r4, r3 8009362: f200 80cd bhi.w 8009500 <__udivmoddi4+0x2dc> 8009366: 4602 mov r2, r0 8009368: 1b1b subs r3, r3, r4 800936a: ea42 400c orr.w r0, r2, ip, lsl #16 800936e: e7a5 b.n 80092bc <__udivmoddi4+0x98> 8009370: f1c1 0620 rsb r6, r1, #32 8009374: 408b lsls r3, r1 8009376: fa22 f706 lsr.w r7, r2, r6 800937a: 431f orrs r7, r3 800937c: fa2e fa06 lsr.w sl, lr, r6 8009380: ea4f 4917 mov.w r9, r7, lsr #16 8009384: fbba f8f9 udiv r8, sl, r9 8009388: fa0e fe01 lsl.w lr, lr, r1 800938c: fa20 f306 lsr.w r3, r0, r6 8009390: fb09 aa18 mls sl, r9, r8, sl 8009394: fa1f fc87 uxth.w ip, r7 8009398: ea43 030e orr.w r3, r3, lr 800939c: fa00 fe01 lsl.w lr, r0, r1 80093a0: fb08 f00c mul.w r0, r8, ip 80093a4: 0c1c lsrs r4, r3, #16 80093a6: ea44 440a orr.w r4, r4, sl, lsl #16 80093aa: 42a0 cmp r0, r4 80093ac: fa02 f201 lsl.w r2, r2, r1 80093b0: d90a bls.n 80093c8 <__udivmoddi4+0x1a4> 80093b2: 193c adds r4, r7, r4 80093b4: f108 3aff add.w sl, r8, #4294967295 80093b8: f080 809e bcs.w 80094f8 <__udivmoddi4+0x2d4> 80093bc: 42a0 cmp r0, r4 80093be: f240 809b bls.w 80094f8 <__udivmoddi4+0x2d4> 80093c2: f1a8 0802 sub.w r8, r8, #2 80093c6: 443c add r4, r7 80093c8: 1a24 subs r4, r4, r0 80093ca: b298 uxth r0, r3 80093cc: fbb4 f3f9 udiv r3, r4, r9 80093d0: fb09 4413 mls r4, r9, r3, r4 80093d4: fb03 fc0c mul.w ip, r3, ip 80093d8: ea40 4404 orr.w r4, r0, r4, lsl #16 80093dc: 45a4 cmp ip, r4 80093de: d909 bls.n 80093f4 <__udivmoddi4+0x1d0> 80093e0: 193c adds r4, r7, r4 80093e2: f103 30ff add.w r0, r3, #4294967295 80093e6: f080 8085 bcs.w 80094f4 <__udivmoddi4+0x2d0> 80093ea: 45a4 cmp ip, r4 80093ec: f240 8082 bls.w 80094f4 <__udivmoddi4+0x2d0> 80093f0: 3b02 subs r3, #2 80093f2: 443c add r4, r7 80093f4: ea43 4008 orr.w r0, r3, r8, lsl #16 80093f8: eba4 040c sub.w r4, r4, ip 80093fc: fba0 8c02 umull r8, ip, r0, r2 8009400: 4564 cmp r4, ip 8009402: 4643 mov r3, r8 8009404: 46e1 mov r9, ip 8009406: d364 bcc.n 80094d2 <__udivmoddi4+0x2ae> 8009408: d061 beq.n 80094ce <__udivmoddi4+0x2aa> 800940a: b15d cbz r5, 8009424 <__udivmoddi4+0x200> 800940c: ebbe 0203 subs.w r2, lr, r3 8009410: eb64 0409 sbc.w r4, r4, r9 8009414: fa04 f606 lsl.w r6, r4, r6 8009418: fa22 f301 lsr.w r3, r2, r1 800941c: 431e orrs r6, r3 800941e: 40cc lsrs r4, r1 8009420: e9c5 6400 strd r6, r4, [r5] 8009424: 2100 movs r1, #0 8009426: e74e b.n 80092c6 <__udivmoddi4+0xa2> 8009428: fbb1 fcf2 udiv ip, r1, r2 800942c: 0c01 lsrs r1, r0, #16 800942e: ea41 410e orr.w r1, r1, lr, lsl #16 8009432: b280 uxth r0, r0 8009434: ea40 4201 orr.w r2, r0, r1, lsl #16 8009438: 463b mov r3, r7 800943a: fbb1 f1f7 udiv r1, r1, r7 800943e: 4638 mov r0, r7 8009440: 463c mov r4, r7 8009442: 46b8 mov r8, r7 8009444: 46be mov lr, r7 8009446: 2620 movs r6, #32 8009448: eba2 0208 sub.w r2, r2, r8 800944c: ea41 410c orr.w r1, r1, ip, lsl #16 8009450: e765 b.n 800931e <__udivmoddi4+0xfa> 8009452: 4601 mov r1, r0 8009454: e717 b.n 8009286 <__udivmoddi4+0x62> 8009456: 4610 mov r0, r2 8009458: e72b b.n 80092b2 <__udivmoddi4+0x8e> 800945a: f1c6 0120 rsb r1, r6, #32 800945e: fa2e fc01 lsr.w ip, lr, r1 8009462: 40b7 lsls r7, r6 8009464: fa0e fe06 lsl.w lr, lr, r6 8009468: fa20 f101 lsr.w r1, r0, r1 800946c: ea41 010e orr.w r1, r1, lr 8009470: ea4f 4e17 mov.w lr, r7, lsr #16 8009474: fbbc f8fe udiv r8, ip, lr 8009478: b2bc uxth r4, r7 800947a: fb0e cc18 mls ip, lr, r8, ip 800947e: fb08 f904 mul.w r9, r8, r4 8009482: 0c0a lsrs r2, r1, #16 8009484: ea42 420c orr.w r2, r2, ip, lsl #16 8009488: 40b0 lsls r0, r6 800948a: 4591 cmp r9, r2 800948c: ea4f 4310 mov.w r3, r0, lsr #16 8009490: b280 uxth r0, r0 8009492: d93e bls.n 8009512 <__udivmoddi4+0x2ee> 8009494: 18ba adds r2, r7, r2 8009496: f108 3cff add.w ip, r8, #4294967295 800949a: d201 bcs.n 80094a0 <__udivmoddi4+0x27c> 800949c: 4591 cmp r9, r2 800949e: d81f bhi.n 80094e0 <__udivmoddi4+0x2bc> 80094a0: eba2 0209 sub.w r2, r2, r9 80094a4: fbb2 f9fe udiv r9, r2, lr 80094a8: fb09 f804 mul.w r8, r9, r4 80094ac: fb0e 2a19 mls sl, lr, r9, r2 80094b0: b28a uxth r2, r1 80094b2: ea42 420a orr.w r2, r2, sl, lsl #16 80094b6: 4542 cmp r2, r8 80094b8: d229 bcs.n 800950e <__udivmoddi4+0x2ea> 80094ba: 18ba adds r2, r7, r2 80094bc: f109 31ff add.w r1, r9, #4294967295 80094c0: d2c2 bcs.n 8009448 <__udivmoddi4+0x224> 80094c2: 4542 cmp r2, r8 80094c4: d2c0 bcs.n 8009448 <__udivmoddi4+0x224> 80094c6: f1a9 0102 sub.w r1, r9, #2 80094ca: 443a add r2, r7 80094cc: e7bc b.n 8009448 <__udivmoddi4+0x224> 80094ce: 45c6 cmp lr, r8 80094d0: d29b bcs.n 800940a <__udivmoddi4+0x1e6> 80094d2: ebb8 0302 subs.w r3, r8, r2 80094d6: eb6c 0c07 sbc.w ip, ip, r7 80094da: 3801 subs r0, #1 80094dc: 46e1 mov r9, ip 80094de: e794 b.n 800940a <__udivmoddi4+0x1e6> 80094e0: eba7 0909 sub.w r9, r7, r9 80094e4: 444a add r2, r9 80094e6: fbb2 f9fe udiv r9, r2, lr 80094ea: f1a8 0c02 sub.w ip, r8, #2 80094ee: fb09 f804 mul.w r8, r9, r4 80094f2: e7db b.n 80094ac <__udivmoddi4+0x288> 80094f4: 4603 mov r3, r0 80094f6: e77d b.n 80093f4 <__udivmoddi4+0x1d0> 80094f8: 46d0 mov r8, sl 80094fa: e765 b.n 80093c8 <__udivmoddi4+0x1a4> 80094fc: 4608 mov r0, r1 80094fe: e6fa b.n 80092f6 <__udivmoddi4+0xd2> 8009500: 443b add r3, r7 8009502: 3a02 subs r2, #2 8009504: e730 b.n 8009368 <__udivmoddi4+0x144> 8009506: f1ac 0c02 sub.w ip, ip, #2 800950a: 443b add r3, r7 800950c: e719 b.n 8009342 <__udivmoddi4+0x11e> 800950e: 4649 mov r1, r9 8009510: e79a b.n 8009448 <__udivmoddi4+0x224> 8009512: eba2 0209 sub.w r2, r2, r9 8009516: fbb2 f9fe udiv r9, r2, lr 800951a: 46c4 mov ip, r8 800951c: fb09 f804 mul.w r8, r9, r4 8009520: e7c4 b.n 80094ac <__udivmoddi4+0x288> 8009522: bf00 nop 08009524 <__aeabi_idiv0>: 8009524: 4770 bx lr 8009526: bf00 nop 08009528 : static volatile uint16_t adc_dma_raw[6]; volatile ADC_ScanData_t adc_data = {0}; static volatile uint8_t adc_scan_data_ready = 0u; void ADC_ScanStart(void) { 8009528: b580 push {r7, lr} 800952a: af00 add r7, sp, #0 if (HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_raw, 6u) != HAL_OK) 800952c: 2206 movs r2, #6 800952e: 4905 ldr r1, [pc, #20] @ (8009544 ) 8009530: 4805 ldr r0, [pc, #20] @ (8009548 ) 8009532: f006 f98b bl 800f84c 8009536: 4603 mov r3, r0 8009538: 2b00 cmp r3, #0 800953a: d001 beq.n 8009540 { Error_Handler(); 800953c: f001 fc3a bl 800adb4 } } 8009540: bf00 nop 8009542: bd80 pop {r7, pc} 8009544: 20000274 .word 0x20000274 8009548: 20000290 .word 0x20000290 0800954c : ISR_FAST void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc) { if (hadc->Instance != ADC1) 800954c: 4b0e ldr r3, [pc, #56] @ (8009588 ) 800954e: 6802 ldr r2, [r0, #0] 8009550: 429a cmp r2, r3 8009552: d118 bne.n 8009586 adc_data.cp_raw = adc_dma_raw[1]; adc_data.ntc1_raw = adc_dma_raw[2]; adc_data.ntc2_raw = adc_dma_raw[3]; adc_data.temp_sensor_raw = adc_dma_raw[4]; adc_data.vrefint_raw = adc_dma_raw[5]; adc_scan_data_ready = 1u; 8009554: f04f 0c01 mov.w ip, #1 adc_data.in3_raw = adc_dma_raw[0]; 8009558: 4a0c ldr r2, [pc, #48] @ (800958c ) 800955a: 4b0d ldr r3, [pc, #52] @ (8009590 ) 800955c: 8811 ldrh r1, [r2, #0] adc_scan_data_ready = 1u; 800955e: 480d ldr r0, [pc, #52] @ (8009594 ) adc_data.in3_raw = adc_dma_raw[0]; 8009560: b289 uxth r1, r1 8009562: 8019 strh r1, [r3, #0] adc_data.cp_raw = adc_dma_raw[1]; 8009564: 8851 ldrh r1, [r2, #2] 8009566: b289 uxth r1, r1 8009568: 8059 strh r1, [r3, #2] adc_data.ntc1_raw = adc_dma_raw[2]; 800956a: 8891 ldrh r1, [r2, #4] 800956c: b289 uxth r1, r1 800956e: 8099 strh r1, [r3, #4] adc_data.ntc2_raw = adc_dma_raw[3]; 8009570: 88d1 ldrh r1, [r2, #6] 8009572: b289 uxth r1, r1 8009574: 80d9 strh r1, [r3, #6] adc_data.temp_sensor_raw = adc_dma_raw[4]; 8009576: 8911 ldrh r1, [r2, #8] 8009578: b289 uxth r1, r1 800957a: 8119 strh r1, [r3, #8] adc_data.vrefint_raw = adc_dma_raw[5]; 800957c: 8952 ldrh r2, [r2, #10] 800957e: b292 uxth r2, r2 8009580: 815a strh r2, [r3, #10] adc_scan_data_ready = 1u; 8009582: f880 c000 strb.w ip, [r0] } 8009586: 4770 bx lr 8009588: 40012400 .word 0x40012400 800958c: 20000274 .word 0x20000274 8009590: 20000280 .word 0x20000280 8009594: 2000028c .word 0x2000028c 08009598 : ADC_HandleTypeDef hadc1; DMA_HandleTypeDef hdma_adc1; /* ADC1 init function */ void MX_ADC1_Init(void) { 8009598: b580 push {r7, lr} 800959a: b084 sub sp, #16 800959c: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 800959e: 1d3b adds r3, r7, #4 80095a0: 2200 movs r2, #0 80095a2: 601a str r2, [r3, #0] 80095a4: 605a str r2, [r3, #4] 80095a6: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 80095a8: 4b3c ldr r3, [pc, #240] @ (800969c ) 80095aa: 4a3d ldr r2, [pc, #244] @ (80096a0 ) 80095ac: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 80095ae: 4b3b ldr r3, [pc, #236] @ (800969c ) 80095b0: f44f 7280 mov.w r2, #256 @ 0x100 80095b4: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = DISABLE; 80095b6: 4b39 ldr r3, [pc, #228] @ (800969c ) 80095b8: 2200 movs r2, #0 80095ba: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 80095bc: 4b37 ldr r3, [pc, #220] @ (800969c ) 80095be: 2200 movs r2, #0 80095c0: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T3_TRGO; 80095c2: 4b36 ldr r3, [pc, #216] @ (800969c ) 80095c4: f44f 2200 mov.w r2, #524288 @ 0x80000 80095c8: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80095ca: 4b34 ldr r3, [pc, #208] @ (800969c ) 80095cc: 2200 movs r2, #0 80095ce: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 6; 80095d0: 4b32 ldr r3, [pc, #200] @ (800969c ) 80095d2: 2206 movs r2, #6 80095d4: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 80095d6: 4831 ldr r0, [pc, #196] @ (800969c ) 80095d8: f006 f860 bl 800f69c 80095dc: 4603 mov r3, r0 80095de: 2b00 cmp r3, #0 80095e0: d001 beq.n 80095e6 { Error_Handler(); 80095e2: f001 fbe7 bl 800adb4 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_3; 80095e6: 2303 movs r3, #3 80095e8: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 80095ea: 2301 movs r3, #1 80095ec: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_41CYCLES_5; 80095ee: 2304 movs r3, #4 80095f0: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80095f2: 1d3b adds r3, r7, #4 80095f4: 4619 mov r1, r3 80095f6: 4829 ldr r0, [pc, #164] @ (800969c ) 80095f8: f006 fae0 bl 800fbbc 80095fc: 4603 mov r3, r0 80095fe: 2b00 cmp r3, #0 8009600: d001 beq.n 8009606 { Error_Handler(); 8009602: f001 fbd7 bl 800adb4 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_4; 8009606: 2304 movs r3, #4 8009608: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_2; 800960a: 2302 movs r3, #2 800960c: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800960e: 1d3b adds r3, r7, #4 8009610: 4619 mov r1, r3 8009612: 4822 ldr r0, [pc, #136] @ (800969c ) 8009614: f006 fad2 bl 800fbbc 8009618: 4603 mov r3, r0 800961a: 2b00 cmp r3, #0 800961c: d001 beq.n 8009622 { Error_Handler(); 800961e: f001 fbc9 bl 800adb4 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 8009622: 2308 movs r3, #8 8009624: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_3; 8009626: 2303 movs r3, #3 8009628: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800962a: 1d3b adds r3, r7, #4 800962c: 4619 mov r1, r3 800962e: 481b ldr r0, [pc, #108] @ (800969c ) 8009630: f006 fac4 bl 800fbbc 8009634: 4603 mov r3, r0 8009636: 2b00 cmp r3, #0 8009638: d001 beq.n 800963e { Error_Handler(); 800963a: f001 fbbb bl 800adb4 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_9; 800963e: 2309 movs r3, #9 8009640: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_4; 8009642: 2304 movs r3, #4 8009644: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8009646: 1d3b adds r3, r7, #4 8009648: 4619 mov r1, r3 800964a: 4814 ldr r0, [pc, #80] @ (800969c ) 800964c: f006 fab6 bl 800fbbc 8009650: 4603 mov r3, r0 8009652: 2b00 cmp r3, #0 8009654: d001 beq.n 800965a { Error_Handler(); 8009656: f001 fbad bl 800adb4 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_TEMPSENSOR; 800965a: 2310 movs r3, #16 800965c: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_5; 800965e: 2305 movs r3, #5 8009660: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8009662: 1d3b adds r3, r7, #4 8009664: 4619 mov r1, r3 8009666: 480d ldr r0, [pc, #52] @ (800969c ) 8009668: f006 faa8 bl 800fbbc 800966c: 4603 mov r3, r0 800966e: 2b00 cmp r3, #0 8009670: d001 beq.n 8009676 { Error_Handler(); 8009672: f001 fb9f bl 800adb4 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_VREFINT; 8009676: 2311 movs r3, #17 8009678: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_6; 800967a: 2306 movs r3, #6 800967c: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800967e: 1d3b adds r3, r7, #4 8009680: 4619 mov r1, r3 8009682: 4806 ldr r0, [pc, #24] @ (800969c ) 8009684: f006 fa9a bl 800fbbc 8009688: 4603 mov r3, r0 800968a: 2b00 cmp r3, #0 800968c: d001 beq.n 8009692 { Error_Handler(); 800968e: f001 fb91 bl 800adb4 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 8009692: bf00 nop 8009694: 3710 adds r7, #16 8009696: 46bd mov sp, r7 8009698: bd80 pop {r7, pc} 800969a: bf00 nop 800969c: 20000290 .word 0x20000290 80096a0: 40012400 .word 0x40012400 080096a4 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { 80096a4: b580 push {r7, lr} 80096a6: b08a sub sp, #40 @ 0x28 80096a8: af00 add r7, sp, #0 80096aa: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80096ac: f107 0318 add.w r3, r7, #24 80096b0: 2200 movs r2, #0 80096b2: 601a str r2, [r3, #0] 80096b4: 605a str r2, [r3, #4] 80096b6: 609a str r2, [r3, #8] 80096b8: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) 80096ba: 687b ldr r3, [r7, #4] 80096bc: 681b ldr r3, [r3, #0] 80096be: 4a38 ldr r2, [pc, #224] @ (80097a0 ) 80096c0: 4293 cmp r3, r2 80096c2: d168 bne.n 8009796 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 80096c4: 4b37 ldr r3, [pc, #220] @ (80097a4 ) 80096c6: 699b ldr r3, [r3, #24] 80096c8: 4a36 ldr r2, [pc, #216] @ (80097a4 ) 80096ca: f443 7300 orr.w r3, r3, #512 @ 0x200 80096ce: 6193 str r3, [r2, #24] 80096d0: 4b34 ldr r3, [pc, #208] @ (80097a4 ) 80096d2: 699b ldr r3, [r3, #24] 80096d4: f403 7300 and.w r3, r3, #512 @ 0x200 80096d8: 617b str r3, [r7, #20] 80096da: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 80096dc: 4b31 ldr r3, [pc, #196] @ (80097a4 ) 80096de: 699b ldr r3, [r3, #24] 80096e0: 4a30 ldr r2, [pc, #192] @ (80097a4 ) 80096e2: f043 0304 orr.w r3, r3, #4 80096e6: 6193 str r3, [r2, #24] 80096e8: 4b2e ldr r3, [pc, #184] @ (80097a4 ) 80096ea: 699b ldr r3, [r3, #24] 80096ec: f003 0304 and.w r3, r3, #4 80096f0: 613b str r3, [r7, #16] 80096f2: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 80096f4: 4b2b ldr r3, [pc, #172] @ (80097a4 ) 80096f6: 699b ldr r3, [r3, #24] 80096f8: 4a2a ldr r2, [pc, #168] @ (80097a4 ) 80096fa: f043 0308 orr.w r3, r3, #8 80096fe: 6193 str r3, [r2, #24] 8009700: 4b28 ldr r3, [pc, #160] @ (80097a4 ) 8009702: 699b ldr r3, [r3, #24] 8009704: f003 0308 and.w r3, r3, #8 8009708: 60fb str r3, [r7, #12] 800970a: 68fb ldr r3, [r7, #12] PA3 ------> ADC1_IN3 PA4 ------> ADC1_IN4 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = GPIO_PIN_3|CP_ADC_Pin; 800970c: 2318 movs r3, #24 800970e: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8009710: 2303 movs r3, #3 8009712: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8009714: f107 0318 add.w r3, r7, #24 8009718: 4619 mov r1, r3 800971a: 4823 ldr r0, [pc, #140] @ (80097a8 ) 800971c: f008 f98c bl 8011a38 GPIO_InitStruct.Pin = ADC_NTC1_Pin|ADC_NTC2_Pin; 8009720: 2303 movs r3, #3 8009722: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8009724: 2303 movs r3, #3 8009726: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8009728: f107 0318 add.w r3, r7, #24 800972c: 4619 mov r1, r3 800972e: 481f ldr r0, [pc, #124] @ (80097ac ) 8009730: f008 f982 bl 8011a38 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; 8009734: 4b1e ldr r3, [pc, #120] @ (80097b0 ) 8009736: 4a1f ldr r2, [pc, #124] @ (80097b4 ) 8009738: 601a str r2, [r3, #0] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 800973a: 4b1d ldr r3, [pc, #116] @ (80097b0 ) 800973c: 2200 movs r2, #0 800973e: 605a str r2, [r3, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 8009740: 4b1b ldr r3, [pc, #108] @ (80097b0 ) 8009742: 2200 movs r2, #0 8009744: 609a str r2, [r3, #8] hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8009746: 4b1a ldr r3, [pc, #104] @ (80097b0 ) 8009748: 2280 movs r2, #128 @ 0x80 800974a: 60da str r2, [r3, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 800974c: 4b18 ldr r3, [pc, #96] @ (80097b0 ) 800974e: f44f 7280 mov.w r2, #256 @ 0x100 8009752: 611a str r2, [r3, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 8009754: 4b16 ldr r3, [pc, #88] @ (80097b0 ) 8009756: f44f 6280 mov.w r2, #1024 @ 0x400 800975a: 615a str r2, [r3, #20] hdma_adc1.Init.Mode = DMA_CIRCULAR; 800975c: 4b14 ldr r3, [pc, #80] @ (80097b0 ) 800975e: 2220 movs r2, #32 8009760: 619a str r2, [r3, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_MEDIUM; 8009762: 4b13 ldr r3, [pc, #76] @ (80097b0 ) 8009764: f44f 5280 mov.w r2, #4096 @ 0x1000 8009768: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 800976a: 4811 ldr r0, [pc, #68] @ (80097b0 ) 800976c: f007 fcd6 bl 801111c 8009770: 4603 mov r3, r0 8009772: 2b00 cmp r3, #0 8009774: d001 beq.n 800977a { Error_Handler(); 8009776: f001 fb1d bl 800adb4 } __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1); 800977a: 687b ldr r3, [r7, #4] 800977c: 4a0c ldr r2, [pc, #48] @ (80097b0 ) 800977e: 621a str r2, [r3, #32] 8009780: 4a0b ldr r2, [pc, #44] @ (80097b0 ) 8009782: 687b ldr r3, [r7, #4] 8009784: 6253 str r3, [r2, #36] @ 0x24 /* ADC1 interrupt Init */ HAL_NVIC_SetPriority(ADC1_2_IRQn, 7, 0); 8009786: 2200 movs r2, #0 8009788: 2107 movs r1, #7 800978a: 2012 movs r0, #18 800978c: f007 fc73 bl 8011076 HAL_NVIC_EnableIRQ(ADC1_2_IRQn); 8009790: 2012 movs r0, #18 8009792: f007 fc8c bl 80110ae /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 8009796: bf00 nop 8009798: 3728 adds r7, #40 @ 0x28 800979a: 46bd mov sp, r7 800979c: bd80 pop {r7, pc} 800979e: bf00 nop 80097a0: 40012400 .word 0x40012400 80097a4: 40021000 .word 0x40021000 80097a8: 40010800 .word 0x40010800 80097ac: 40010c00 .word 0x40010c00 80097b0: 200002c0 .word 0x200002c0 80097b4: 40020008 .word 0x40020008 080097b8 : uint8_t RELAY_State[RELAY_COUNT]; static volatile uint8_t adc_lock = 0; static SMAFilter_t conn_temp_adc_filter[2]; void RELAY_Write(relay_t num, uint8_t state){ 80097b8: b580 push {r7, lr} 80097ba: b082 sub sp, #8 80097bc: af00 add r7, sp, #0 80097be: 4603 mov r3, r0 80097c0: 460a mov r2, r1 80097c2: 71fb strb r3, [r7, #7] 80097c4: 4613 mov r3, r2 80097c6: 71bb strb r3, [r7, #6] switch (num) { 80097c8: 79fb ldrb r3, [r7, #7] 80097ca: 2b07 cmp r3, #7 80097cc: d850 bhi.n 8009870 80097ce: a201 add r2, pc, #4 @ (adr r2, 80097d4 ) 80097d0: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80097d4: 080097f5 .word 0x080097f5 80097d8: 08009805 .word 0x08009805 80097dc: 08009815 .word 0x08009815 80097e0: 08009825 .word 0x08009825 80097e4: 08009835 .word 0x08009835 80097e8: 08009845 .word 0x08009845 80097ec: 08009853 .word 0x08009853 80097f0: 08009863 .word 0x08009863 case RELAY_AUX0: HAL_GPIO_WritePin(RELAY1_GPIO_Port, RELAY1_Pin, state); 80097f4: 79bb ldrb r3, [r7, #6] 80097f6: 461a mov r2, r3 80097f8: f44f 7180 mov.w r1, #256 @ 0x100 80097fc: 4821 ldr r0, [pc, #132] @ (8009884 ) 80097fe: f008 fab6 bl 8011d6e break; 8009802: e036 b.n 8009872 case RELAY_AUX1: HAL_GPIO_WritePin(RELAY2_GPIO_Port, RELAY2_Pin, state); 8009804: 79bb ldrb r3, [r7, #6] 8009806: 461a mov r2, r3 8009808: f44f 7100 mov.w r1, #512 @ 0x200 800980c: 481d ldr r0, [pc, #116] @ (8009884 ) 800980e: f008 faae bl 8011d6e break; 8009812: e02e b.n 8009872 case RELAY3: HAL_GPIO_WritePin(RELAY3_GPIO_Port, RELAY3_Pin, state); 8009814: 79bb ldrb r3, [r7, #6] 8009816: 461a mov r2, r3 8009818: f44f 6180 mov.w r1, #1024 @ 0x400 800981c: 4819 ldr r0, [pc, #100] @ (8009884 ) 800981e: f008 faa6 bl 8011d6e break; 8009822: e026 b.n 8009872 case RELAY_DC: HAL_GPIO_WritePin(RELAY4_GPIO_Port, RELAY4_Pin, state); 8009824: 79bb ldrb r3, [r7, #6] 8009826: 461a mov r2, r3 8009828: f44f 6100 mov.w r1, #2048 @ 0x800 800982c: 4815 ldr r0, [pc, #84] @ (8009884 ) 800982e: f008 fa9e bl 8011d6e break; 8009832: e01e b.n 8009872 case RELAY_AC: HAL_GPIO_WritePin(RELAY5_GPIO_Port, RELAY5_Pin, state); 8009834: 79bb ldrb r3, [r7, #6] 8009836: 461a mov r2, r3 8009838: f44f 5180 mov.w r1, #4096 @ 0x1000 800983c: 4811 ldr r0, [pc, #68] @ (8009884 ) 800983e: f008 fa96 bl 8011d6e break; 8009842: e016 b.n 8009872 case RELAY_CP: HAL_GPIO_WritePin(RELAY_CP_GPIO_Port, RELAY_CP_Pin, state); 8009844: 79bb ldrb r3, [r7, #6] 8009846: 461a mov r2, r3 8009848: 2108 movs r1, #8 800984a: 480f ldr r0, [pc, #60] @ (8009888 ) 800984c: f008 fa8f bl 8011d6e break; 8009850: e00f b.n 8009872 case RELAY_CC: HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, state); 8009852: 79bb ldrb r3, [r7, #6] 8009854: 461a mov r2, r3 8009856: f44f 4100 mov.w r1, #32768 @ 0x8000 800985a: 480c ldr r0, [pc, #48] @ (800988c ) 800985c: f008 fa87 bl 8011d6e break; 8009860: e007 b.n 8009872 case RELAY_DC1: HAL_GPIO_WritePin(RELAY_DC_GPIO_Port, RELAY_DC_Pin, state); 8009862: 79bb ldrb r3, [r7, #6] 8009864: 461a mov r2, r3 8009866: 2108 movs r1, #8 8009868: 4809 ldr r0, [pc, #36] @ (8009890 ) 800986a: f008 fa80 bl 8011d6e break; 800986e: e000 b.n 8009872 default: break; 8009870: bf00 nop } RELAY_State[num] = state; 8009872: 79fb ldrb r3, [r7, #7] 8009874: 4907 ldr r1, [pc, #28] @ (8009894 ) 8009876: 79ba ldrb r2, [r7, #6] 8009878: 54ca strb r2, [r1, r3] } 800987a: bf00 nop 800987c: 3708 adds r7, #8 800987e: 46bd mov sp, r7 8009880: bd80 pop {r7, pc} 8009882: bf00 nop 8009884: 40011800 .word 0x40011800 8009888: 40011000 .word 0x40011000 800988c: 40010800 .word 0x40010800 8009890: 40011400 .word 0x40011400 8009894: 20000304 .word 0x20000304 08009898 : uint8_t RELAY_Read(relay_t num){ 8009898: b480 push {r7} 800989a: b083 sub sp, #12 800989c: af00 add r7, sp, #0 800989e: 4603 mov r3, r0 80098a0: 71fb strb r3, [r7, #7] return RELAY_State[num]; 80098a2: 79fb ldrb r3, [r7, #7] 80098a4: 4a03 ldr r2, [pc, #12] @ (80098b4 ) 80098a6: 5cd3 ldrb r3, [r2, r3] } 80098a8: 4618 mov r0, r3 80098aa: 370c adds r7, #12 80098ac: 46bd mov sp, r7 80098ae: bc80 pop {r7} 80098b0: 4770 bx lr 80098b2: bf00 nop 80098b4: 20000304 .word 0x20000304 080098b8 : uint8_t IN_ReadInput(inputNum_t input_n){ 80098b8: b580 push {r7, lr} 80098ba: b082 sub sp, #8 80098bc: af00 add r7, sp, #0 80098be: 4603 mov r3, r0 80098c0: 71fb strb r3, [r7, #7] switch(input_n){ 80098c2: 79fb ldrb r3, [r7, #7] 80098c4: 2b06 cmp r3, #6 80098c6: d83b bhi.n 8009940 80098c8: a201 add r2, pc, #4 @ (adr r2, 80098d0 ) 80098ca: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80098ce: bf00 nop 80098d0: 080098ed .word 0x080098ed 80098d4: 080098f9 .word 0x080098f9 80098d8: 08009905 .word 0x08009905 80098dc: 08009911 .word 0x08009911 80098e0: 0800991d .word 0x0800991d 80098e4: 08009929 .word 0x08009929 80098e8: 08009935 .word 0x08009935 case IN_SW0: return HAL_GPIO_ReadPin(IN_SW0_GPIO_Port, IN_SW0_Pin); 80098ec: 2102 movs r1, #2 80098ee: 4817 ldr r0, [pc, #92] @ (800994c ) 80098f0: f008 fa26 bl 8011d40 80098f4: 4603 mov r3, r0 80098f6: e024 b.n 8009942 case IN_SW1: return HAL_GPIO_ReadPin(IN_SW1_GPIO_Port, IN_SW1_Pin); 80098f8: 2104 movs r1, #4 80098fa: 4814 ldr r0, [pc, #80] @ (800994c ) 80098fc: f008 fa20 bl 8011d40 8009900: 4603 mov r3, r0 8009902: e01e b.n 8009942 case IN0: return HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 8009904: 2180 movs r1, #128 @ 0x80 8009906: 4812 ldr r0, [pc, #72] @ (8009950 ) 8009908: f008 fa1a bl 8011d40 800990c: 4603 mov r3, r0 800990e: e018 b.n 8009942 case IN_ESTOP: return HAL_GPIO_ReadPin(IN_ESTOP_GPIO_Port, IN_ESTOP_Pin); 8009910: 2180 movs r1, #128 @ 0x80 8009912: 4810 ldr r0, [pc, #64] @ (8009954 ) 8009914: f008 fa14 bl 8011d40 8009918: 4603 mov r3, r0 800991a: e012 b.n 8009942 case IN_FB1: return HAL_GPIO_ReadPin(IN_FB1_GPIO_Port, IN_FB1_Pin); 800991c: 2110 movs r1, #16 800991e: 480e ldr r0, [pc, #56] @ (8009958 ) 8009920: f008 fa0e bl 8011d40 8009924: 4603 mov r3, r0 8009926: e00c b.n 8009942 case IN_CONT_FB_DC: return HAL_GPIO_ReadPin(IN_FB2_GPIO_Port, IN_FB2_Pin); 8009928: 2108 movs r1, #8 800992a: 480b ldr r0, [pc, #44] @ (8009958 ) 800992c: f008 fa08 bl 8011d40 8009930: 4603 mov r3, r0 8009932: e006 b.n 8009942 case ISO_IN: return HAL_GPIO_ReadPin(ISO_IN_GPIO_Port, ISO_IN_Pin); 8009934: 2102 movs r1, #2 8009936: 4806 ldr r0, [pc, #24] @ (8009950 ) 8009938: f008 fa02 bl 8011d40 800993c: 4603 mov r3, r0 800993e: e000 b.n 8009942 default: return 0; 8009940: 2300 movs r3, #0 } } 8009942: 4618 mov r0, r3 8009944: 3708 adds r7, #8 8009946: 46bd mov sp, r7 8009948: bd80 pop {r7, pc} 800994a: bf00 nop 800994c: 40010800 .word 0x40010800 8009950: 40011800 .word 0x40011800 8009954: 40011400 .word 0x40011400 8009958: 40010c00 .word 0x40010c00 0800995c : /** * @brief Force PC12 (HEATER) as GPIO output via CRH/ODR, overriding UART5 MspInit. * CubeMX assigns PC12 to UART5_TX; on the board it drives the heater relay. */ static void Heater_PinForceOutput(void) { 800995c: b480 push {r7} 800995e: b083 sub sp, #12 8009960: af00 add r7, sp, #0 const uint32_t pin_cfg = GPIO_SPEED_FREQ_LOW; /* MODE=10, CNF=00: GP output PP, 2 MHz */ 8009962: 2302 movs r3, #2 8009964: 607b str r3, [r7, #4] __HAL_RCC_GPIOC_CLK_ENABLE(); 8009966: 4b0f ldr r3, [pc, #60] @ (80099a4 ) 8009968: 699b ldr r3, [r3, #24] 800996a: 4a0e ldr r2, [pc, #56] @ (80099a4 ) 800996c: f043 0310 orr.w r3, r3, #16 8009970: 6193 str r3, [r2, #24] 8009972: 4b0c ldr r3, [pc, #48] @ (80099a4 ) 8009974: 699b ldr r3, [r3, #24] 8009976: f003 0310 and.w r3, r3, #16 800997a: 603b str r3, [r7, #0] 800997c: 683b ldr r3, [r7, #0] MODIFY_REG(HEATER_GPIO_Port->CRH, 800997e: 4b0a ldr r3, [pc, #40] @ (80099a8 ) 8009980: 685b ldr r3, [r3, #4] 8009982: f423 2270 bic.w r2, r3, #983040 @ 0xf0000 8009986: 687b ldr r3, [r7, #4] 8009988: 041b lsls r3, r3, #16 800998a: 4907 ldr r1, [pc, #28] @ (80099a8 ) 800998c: 4313 orrs r3, r2 800998e: 604b str r3, [r1, #4] (GPIO_CRH_MODE12 | GPIO_CRH_CNF12), (pin_cfg << GPIO_CRH_MODE12_Pos)); HEATER_GPIO_Port->BSRR = (uint32_t)HEATER_Pin << 16U; 8009990: 4b05 ldr r3, [pc, #20] @ (80099a8 ) 8009992: f04f 5280 mov.w r2, #268435456 @ 0x10000000 8009996: 611a str r2, [r3, #16] } 8009998: bf00 nop 800999a: 370c adds r7, #12 800999c: 46bd mov sp, r7 800999e: bc80 pop {r7} 80099a0: 4770 bx lr 80099a2: bf00 nop 80099a4: 40021000 .word 0x40021000 80099a8: 40011000 .word 0x40011000 080099ac : void Init_Peripheral(){ 80099ac: b580 push {r7, lr} 80099ae: af00 add r7, sp, #0 Heater_PinForceOutput(); 80099b0: f7ff ffd4 bl 800995c HAL_GPIO_WritePin(HEATER_GPIO_Port, HEATER_Pin, GPIO_PIN_RESET); 80099b4: 2200 movs r2, #0 80099b6: f44f 5180 mov.w r1, #4096 @ 0x1000 80099ba: 4818 ldr r0, [pc, #96] @ (8009a1c ) 80099bc: f008 f9d7 bl 8011d6e HAL_ADCEx_Calibration_Start(&hadc1); 80099c0: 4817 ldr r0, [pc, #92] @ (8009a20 ) 80099c2: f006 faf5 bl 800ffb0 ADC_ScanStart(); 80099c6: f7ff fdaf bl 8009528 RELAY_Write(RELAY_AUX0, 0); 80099ca: 2100 movs r1, #0 80099cc: 2000 movs r0, #0 80099ce: f7ff fef3 bl 80097b8 RELAY_Write(RELAY_AUX1, 0); 80099d2: 2100 movs r1, #0 80099d4: 2001 movs r0, #1 80099d6: f7ff feef bl 80097b8 RELAY_Write(RELAY3, 0); 80099da: 2100 movs r1, #0 80099dc: 2002 movs r0, #2 80099de: f7ff feeb bl 80097b8 RELAY_Write(RELAY_DC, 0); 80099e2: 2100 movs r1, #0 80099e4: 2003 movs r0, #3 80099e6: f7ff fee7 bl 80097b8 RELAY_Write(RELAY_AC, 0); 80099ea: 2100 movs r1, #0 80099ec: 2004 movs r0, #4 80099ee: f7ff fee3 bl 80097b8 RELAY_Write(RELAY_CP, 0); 80099f2: 2100 movs r1, #0 80099f4: 2005 movs r0, #5 80099f6: f7ff fedf bl 80097b8 RELAY_Write(RELAY_CC, 0); 80099fa: 2100 movs r1, #0 80099fc: 2006 movs r0, #6 80099fe: f7ff fedb bl 80097b8 RELAY_Write(RELAY_DC1, 0); 8009a02: 2100 movs r1, #0 8009a04: 2007 movs r0, #7 8009a06: f7ff fed7 bl 80097b8 SMAFilter_Init(&conn_temp_adc_filter[0]); 8009a0a: 4806 ldr r0, [pc, #24] @ (8009a24 ) 8009a0c: f004 fece bl 800e7ac SMAFilter_Init(&conn_temp_adc_filter[1]); 8009a10: 4805 ldr r0, [pc, #20] @ (8009a28 ) 8009a12: f004 fecb bl 800e7ac } 8009a16: bf00 nop 8009a18: bd80 pop {r7, pc} 8009a1a: bf00 nop 8009a1c: 40011000 .word 0x40011000 8009a20: 20000290 .word 0x20000290 8009a24: 2000030c .word 0x2000030c 8009a28: 20000334 .word 0x20000334 08009a2c : float pt1000_to_temperature(float resistance) { 8009a2c: b590 push {r4, r7, lr} 8009a2e: b087 sub sp, #28 8009a30: af00 add r7, sp, #0 8009a32: 6078 str r0, [r7, #4] // Константы для PT1000 const float R0 = 1000.0; // Сопротивление при 0 °C 8009a34: 4b0c ldr r3, [pc, #48] @ (8009a68 ) 8009a36: 617b str r3, [r7, #20] const float C_A = 3.9083E-3f; 8009a38: 4b0c ldr r3, [pc, #48] @ (8009a6c ) 8009a3a: 613b str r3, [r7, #16] float temperature = (resistance-R0) / ( R0 * C_A); 8009a3c: 6979 ldr r1, [r7, #20] 8009a3e: 6878 ldr r0, [r7, #4] 8009a40: f7ff f8e2 bl 8008c08 <__aeabi_fsub> 8009a44: 4603 mov r3, r0 8009a46: 461c mov r4, r3 8009a48: 6939 ldr r1, [r7, #16] 8009a4a: 6978 ldr r0, [r7, #20] 8009a4c: f7ff f9e6 bl 8008e1c <__aeabi_fmul> 8009a50: 4603 mov r3, r0 8009a52: 4619 mov r1, r3 8009a54: 4620 mov r0, r4 8009a56: f7ff fa95 bl 8008f84 <__aeabi_fdiv> 8009a5a: 4603 mov r3, r0 8009a5c: 60fb str r3, [r7, #12] return temperature; 8009a5e: 68fb ldr r3, [r7, #12] } 8009a60: 4618 mov r0, r3 8009a62: 371c adds r7, #28 8009a64: 46bd mov sp, r7 8009a66: bd90 pop {r4, r7, pc} 8009a68: 447a0000 .word 0x447a0000 8009a6c: 3b801132 .word 0x3b801132 08009a70 : float calculate_NTC_resistance(int adc_value, float Vref, float Vin, float R) { 8009a70: b5b0 push {r4, r5, r7, lr} 8009a72: b086 sub sp, #24 8009a74: af00 add r7, sp, #0 8009a76: 60f8 str r0, [r7, #12] 8009a78: 60b9 str r1, [r7, #8] 8009a7a: 607a str r2, [r7, #4] 8009a7c: 603b str r3, [r7, #0] // Преобразуем значение АЦП в выходное напряжение float Vout = (adc_value / 4095.0) * Vref; 8009a7e: 68f8 ldr r0, [r7, #12] 8009a80: f7fe fd2c bl 80084dc <__aeabi_i2d> 8009a84: a31c add r3, pc, #112 @ (adr r3, 8009af8 ) 8009a86: e9d3 2300 ldrd r2, r3, [r3] 8009a8a: f7fe febb bl 8008804 <__aeabi_ddiv> 8009a8e: 4602 mov r2, r0 8009a90: 460b mov r3, r1 8009a92: 4614 mov r4, r2 8009a94: 461d mov r5, r3 8009a96: 68b8 ldr r0, [r7, #8] 8009a98: f7fe fd32 bl 8008500 <__aeabi_f2d> 8009a9c: 4602 mov r2, r0 8009a9e: 460b mov r3, r1 8009aa0: 4620 mov r0, r4 8009aa2: 4629 mov r1, r5 8009aa4: f7fe fd84 bl 80085b0 <__aeabi_dmul> 8009aa8: 4602 mov r2, r0 8009aaa: 460b mov r3, r1 8009aac: 4610 mov r0, r2 8009aae: 4619 mov r1, r3 8009ab0: f7ff f856 bl 8008b60 <__aeabi_d2f> 8009ab4: 4603 mov r3, r0 8009ab6: 617b str r3, [r7, #20] // Проверяем, чтобы Vout не было равно Vin if (Vout >= Vin) { 8009ab8: 6879 ldr r1, [r7, #4] 8009aba: 6978 ldr r0, [r7, #20] 8009abc: f7ff fb60 bl 8009180 <__aeabi_fcmpge> 8009ac0: 4603 mov r3, r0 8009ac2: 2b00 cmp r3, #0 8009ac4: d001 beq.n 8009aca return -1; // Ошибка: Vout не может быть больше или равно Vin 8009ac6: 4b0e ldr r3, [pc, #56] @ (8009b00 ) 8009ac8: e010 b.n 8009aec } // Вычисляем сопротивление термистора float R_NTC = R * (Vout / (Vin - Vout)); 8009aca: 6979 ldr r1, [r7, #20] 8009acc: 6878 ldr r0, [r7, #4] 8009ace: f7ff f89b bl 8008c08 <__aeabi_fsub> 8009ad2: 4603 mov r3, r0 8009ad4: 4619 mov r1, r3 8009ad6: 6978 ldr r0, [r7, #20] 8009ad8: f7ff fa54 bl 8008f84 <__aeabi_fdiv> 8009adc: 4603 mov r3, r0 8009ade: 4619 mov r1, r3 8009ae0: 6838 ldr r0, [r7, #0] 8009ae2: f7ff f99b bl 8008e1c <__aeabi_fmul> 8009ae6: 4603 mov r3, r0 8009ae8: 613b str r3, [r7, #16] return R_NTC; 8009aea: 693b ldr r3, [r7, #16] } 8009aec: 4618 mov r0, r3 8009aee: 3718 adds r7, #24 8009af0: 46bd mov sp, r7 8009af2: bdb0 pop {r4, r5, r7, pc} 8009af4: f3af 8000 nop.w 8009af8: 00000000 .word 0x00000000 8009afc: 40affe00 .word 0x40affe00 8009b00: bf800000 .word 0xbf800000 08009b04 : int16_t CONN_ReadTemp(uint8_t ch){ 8009b04: b580 push {r7, lr} 8009b06: b088 sub sp, #32 8009b08: af00 add r7, sp, #0 8009b0a: 4603 mov r3, r0 8009b0c: 71fb strb r3, [r7, #7] uint32_t adcValue = 0u; 8009b0e: 2300 movs r3, #0 8009b10: 61fb str r3, [r7, #28] adcValue = ch ? adc_data.ntc2_raw : adc_data.ntc1_raw; 8009b12: 79fb ldrb r3, [r7, #7] 8009b14: 2b00 cmp r3, #0 8009b16: d003 beq.n 8009b20 8009b18: 4b1c ldr r3, [pc, #112] @ (8009b8c ) 8009b1a: 88db ldrh r3, [r3, #6] 8009b1c: b29b uxth r3, r3 8009b1e: e002 b.n 8009b26 8009b20: 4b1a ldr r3, [pc, #104] @ (8009b8c ) 8009b22: 889b ldrh r3, [r3, #4] 8009b24: b29b uxth r3, r3 8009b26: 61fb str r3, [r7, #28] int32_t adc_filtered = SMAFilter_Update(&conn_temp_adc_filter[ch ? 1u : 0u], (int32_t)adcValue); 8009b28: 79fb ldrb r3, [r7, #7] 8009b2a: 2b00 cmp r3, #0 8009b2c: d001 beq.n 8009b32 8009b2e: 2201 movs r2, #1 8009b30: e000 b.n 8009b34 8009b32: 2200 movs r2, #0 8009b34: 4613 mov r3, r2 8009b36: 009b lsls r3, r3, #2 8009b38: 4413 add r3, r2 8009b3a: 00db lsls r3, r3, #3 8009b3c: 4a14 ldr r2, [pc, #80] @ (8009b90 ) 8009b3e: 4413 add r3, r2 8009b40: 69fa ldr r2, [r7, #28] 8009b42: 4611 mov r1, r2 8009b44: 4618 mov r0, r3 8009b46: f004 fe56 bl 800e7f6 8009b4a: 61b8 str r0, [r7, #24] if((uint32_t)adc_filtered > 4000u) { 8009b4c: 69bb ldr r3, [r7, #24] 8009b4e: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 8009b52: d901 bls.n 8009b58 return 20; //Термодатчик не подключен 8009b54: 2314 movs r3, #20 8009b56: e015 b.n 8009b84 } float Vref = 3.3; // Напряжение опорное 8009b58: 4b0e ldr r3, [pc, #56] @ (8009b94 ) 8009b5a: 617b str r3, [r7, #20] float Vin = 5.0; // Входное напряжение 8009b5c: 4b0e ldr r3, [pc, #56] @ (8009b98 ) 8009b5e: 613b str r3, [r7, #16] float R = 1000; // Сопротивление резистора в Омах 8009b60: 4b0e ldr r3, [pc, #56] @ (8009b9c ) 8009b62: 60fb str r3, [r7, #12] float temp = pt1000_to_temperature(calculate_NTC_resistance((int)adc_filtered, Vref, Vin, R)); 8009b64: 68fb ldr r3, [r7, #12] 8009b66: 693a ldr r2, [r7, #16] 8009b68: 6979 ldr r1, [r7, #20] 8009b6a: 69b8 ldr r0, [r7, #24] 8009b6c: f7ff ff80 bl 8009a70 8009b70: 4603 mov r3, r0 8009b72: 4618 mov r0, r3 8009b74: f7ff ff5a bl 8009a2c 8009b78: 60b8 str r0, [r7, #8] return (int16_t)temp; 8009b7a: 68b8 ldr r0, [r7, #8] 8009b7c: f7ff fb14 bl 80091a8 <__aeabi_f2iz> 8009b80: 4603 mov r3, r0 8009b82: b21b sxth r3, r3 } 8009b84: 4618 mov r0, r3 8009b86: 3720 adds r7, #32 8009b88: 46bd mov sp, r7 8009b8a: bd80 pop {r7, pc} 8009b8c: 20000280 .word 0x20000280 8009b90: 2000030c .word 0x2000030c 8009b94: 40533333 .word 0x40533333 8009b98: 40a00000 .word 0x40a00000 8009b9c: 447a0000 .word 0x447a0000 08009ba0 : CAN_HandleTypeDef hcan1; CAN_HandleTypeDef hcan2; /* CAN1 init function */ void MX_CAN1_Init(void) { 8009ba0: b580 push {r7, lr} 8009ba2: af00 add r7, sp, #0 /* USER CODE END CAN1_Init 0 */ /* USER CODE BEGIN CAN1_Init 1 */ /* USER CODE END CAN1_Init 1 */ hcan1.Instance = CAN1; 8009ba4: 4b17 ldr r3, [pc, #92] @ (8009c04 ) 8009ba6: 4a18 ldr r2, [pc, #96] @ (8009c08 ) 8009ba8: 601a str r2, [r3, #0] hcan1.Init.Prescaler = 8; 8009baa: 4b16 ldr r3, [pc, #88] @ (8009c04 ) 8009bac: 2208 movs r2, #8 8009bae: 605a str r2, [r3, #4] hcan1.Init.Mode = CAN_MODE_NORMAL; 8009bb0: 4b14 ldr r3, [pc, #80] @ (8009c04 ) 8009bb2: 2200 movs r2, #0 8009bb4: 609a str r2, [r3, #8] hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ; 8009bb6: 4b13 ldr r3, [pc, #76] @ (8009c04 ) 8009bb8: 2200 movs r2, #0 8009bba: 60da str r2, [r3, #12] hcan1.Init.TimeSeg1 = CAN_BS1_15TQ; 8009bbc: 4b11 ldr r3, [pc, #68] @ (8009c04 ) 8009bbe: f44f 2260 mov.w r2, #917504 @ 0xe0000 8009bc2: 611a str r2, [r3, #16] hcan1.Init.TimeSeg2 = CAN_BS2_2TQ; 8009bc4: 4b0f ldr r3, [pc, #60] @ (8009c04 ) 8009bc6: f44f 1280 mov.w r2, #1048576 @ 0x100000 8009bca: 615a str r2, [r3, #20] hcan1.Init.TimeTriggeredMode = DISABLE; 8009bcc: 4b0d ldr r3, [pc, #52] @ (8009c04 ) 8009bce: 2200 movs r2, #0 8009bd0: 761a strb r2, [r3, #24] hcan1.Init.AutoBusOff = ENABLE; 8009bd2: 4b0c ldr r3, [pc, #48] @ (8009c04 ) 8009bd4: 2201 movs r2, #1 8009bd6: 765a strb r2, [r3, #25] hcan1.Init.AutoWakeUp = ENABLE; 8009bd8: 4b0a ldr r3, [pc, #40] @ (8009c04 ) 8009bda: 2201 movs r2, #1 8009bdc: 769a strb r2, [r3, #26] hcan1.Init.AutoRetransmission = ENABLE; 8009bde: 4b09 ldr r3, [pc, #36] @ (8009c04 ) 8009be0: 2201 movs r2, #1 8009be2: 76da strb r2, [r3, #27] hcan1.Init.ReceiveFifoLocked = DISABLE; 8009be4: 4b07 ldr r3, [pc, #28] @ (8009c04 ) 8009be6: 2200 movs r2, #0 8009be8: 771a strb r2, [r3, #28] hcan1.Init.TransmitFifoPriority = ENABLE; 8009bea: 4b06 ldr r3, [pc, #24] @ (8009c04 ) 8009bec: 2201 movs r2, #1 8009bee: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan1) != HAL_OK) 8009bf0: 4804 ldr r0, [pc, #16] @ (8009c04 ) 8009bf2: f006 fa94 bl 801011e 8009bf6: 4603 mov r3, r0 8009bf8: 2b00 cmp r3, #0 8009bfa: d001 beq.n 8009c00 { Error_Handler(); 8009bfc: f001 f8da bl 800adb4 } /* USER CODE BEGIN CAN1_Init 2 */ /* USER CODE END CAN1_Init 2 */ } 8009c00: bf00 nop 8009c02: bd80 pop {r7, pc} 8009c04: 2000035c .word 0x2000035c 8009c08: 40006400 .word 0x40006400 08009c0c : /* CAN2 init function */ void MX_CAN2_Init(void) { 8009c0c: b580 push {r7, lr} 8009c0e: af00 add r7, sp, #0 /* USER CODE END CAN2_Init 0 */ /* USER CODE BEGIN CAN2_Init 1 */ /* USER CODE END CAN2_Init 1 */ hcan2.Instance = CAN2; 8009c10: 4b17 ldr r3, [pc, #92] @ (8009c70 ) 8009c12: 4a18 ldr r2, [pc, #96] @ (8009c74 ) 8009c14: 601a str r2, [r3, #0] hcan2.Init.Prescaler = 16; 8009c16: 4b16 ldr r3, [pc, #88] @ (8009c70 ) 8009c18: 2210 movs r2, #16 8009c1a: 605a str r2, [r3, #4] hcan2.Init.Mode = CAN_MODE_NORMAL; 8009c1c: 4b14 ldr r3, [pc, #80] @ (8009c70 ) 8009c1e: 2200 movs r2, #0 8009c20: 609a str r2, [r3, #8] hcan2.Init.SyncJumpWidth = CAN_SJW_1TQ; 8009c22: 4b13 ldr r3, [pc, #76] @ (8009c70 ) 8009c24: 2200 movs r2, #0 8009c26: 60da str r2, [r3, #12] hcan2.Init.TimeSeg1 = CAN_BS1_15TQ; 8009c28: 4b11 ldr r3, [pc, #68] @ (8009c70 ) 8009c2a: f44f 2260 mov.w r2, #917504 @ 0xe0000 8009c2e: 611a str r2, [r3, #16] hcan2.Init.TimeSeg2 = CAN_BS2_2TQ; 8009c30: 4b0f ldr r3, [pc, #60] @ (8009c70 ) 8009c32: f44f 1280 mov.w r2, #1048576 @ 0x100000 8009c36: 615a str r2, [r3, #20] hcan2.Init.TimeTriggeredMode = DISABLE; 8009c38: 4b0d ldr r3, [pc, #52] @ (8009c70 ) 8009c3a: 2200 movs r2, #0 8009c3c: 761a strb r2, [r3, #24] hcan2.Init.AutoBusOff = ENABLE; 8009c3e: 4b0c ldr r3, [pc, #48] @ (8009c70 ) 8009c40: 2201 movs r2, #1 8009c42: 765a strb r2, [r3, #25] hcan2.Init.AutoWakeUp = ENABLE; 8009c44: 4b0a ldr r3, [pc, #40] @ (8009c70 ) 8009c46: 2201 movs r2, #1 8009c48: 769a strb r2, [r3, #26] hcan2.Init.AutoRetransmission = ENABLE; 8009c4a: 4b09 ldr r3, [pc, #36] @ (8009c70 ) 8009c4c: 2201 movs r2, #1 8009c4e: 76da strb r2, [r3, #27] hcan2.Init.ReceiveFifoLocked = DISABLE; 8009c50: 4b07 ldr r3, [pc, #28] @ (8009c70 ) 8009c52: 2200 movs r2, #0 8009c54: 771a strb r2, [r3, #28] hcan2.Init.TransmitFifoPriority = ENABLE; 8009c56: 4b06 ldr r3, [pc, #24] @ (8009c70 ) 8009c58: 2201 movs r2, #1 8009c5a: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan2) != HAL_OK) 8009c5c: 4804 ldr r0, [pc, #16] @ (8009c70 ) 8009c5e: f006 fa5e bl 801011e 8009c62: 4603 mov r3, r0 8009c64: 2b00 cmp r3, #0 8009c66: d001 beq.n 8009c6c { Error_Handler(); 8009c68: f001 f8a4 bl 800adb4 } /* USER CODE BEGIN CAN2_Init 2 */ /* USER CODE END CAN2_Init 2 */ } 8009c6c: bf00 nop 8009c6e: bd80 pop {r7, pc} 8009c70: 20000384 .word 0x20000384 8009c74: 40006800 .word 0x40006800 08009c78 : static uint32_t HAL_RCC_CAN1_CLK_ENABLED=0; void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle) { 8009c78: b580 push {r7, lr} 8009c7a: b08e sub sp, #56 @ 0x38 8009c7c: af00 add r7, sp, #0 8009c7e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8009c80: f107 0320 add.w r3, r7, #32 8009c84: 2200 movs r2, #0 8009c86: 601a str r2, [r3, #0] 8009c88: 605a str r2, [r3, #4] 8009c8a: 609a str r2, [r3, #8] 8009c8c: 60da str r2, [r3, #12] if(canHandle->Instance==CAN1) 8009c8e: 687b ldr r3, [r7, #4] 8009c90: 681b ldr r3, [r3, #0] 8009c92: 4a61 ldr r2, [pc, #388] @ (8009e18 ) 8009c94: 4293 cmp r3, r2 8009c96: d153 bne.n 8009d40 { /* USER CODE BEGIN CAN1_MspInit 0 */ /* USER CODE END CAN1_MspInit 0 */ /* CAN1 clock enable */ HAL_RCC_CAN1_CLK_ENABLED++; 8009c98: 4b60 ldr r3, [pc, #384] @ (8009e1c ) 8009c9a: 681b ldr r3, [r3, #0] 8009c9c: 3301 adds r3, #1 8009c9e: 4a5f ldr r2, [pc, #380] @ (8009e1c ) 8009ca0: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8009ca2: 4b5e ldr r3, [pc, #376] @ (8009e1c ) 8009ca4: 681b ldr r3, [r3, #0] 8009ca6: 2b01 cmp r3, #1 8009ca8: d10b bne.n 8009cc2 __HAL_RCC_CAN1_CLK_ENABLE(); 8009caa: 4b5d ldr r3, [pc, #372] @ (8009e20 ) 8009cac: 69db ldr r3, [r3, #28] 8009cae: 4a5c ldr r2, [pc, #368] @ (8009e20 ) 8009cb0: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8009cb4: 61d3 str r3, [r2, #28] 8009cb6: 4b5a ldr r3, [pc, #360] @ (8009e20 ) 8009cb8: 69db ldr r3, [r3, #28] 8009cba: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8009cbe: 61fb str r3, [r7, #28] 8009cc0: 69fb ldr r3, [r7, #28] } __HAL_RCC_GPIOD_CLK_ENABLE(); 8009cc2: 4b57 ldr r3, [pc, #348] @ (8009e20 ) 8009cc4: 699b ldr r3, [r3, #24] 8009cc6: 4a56 ldr r2, [pc, #344] @ (8009e20 ) 8009cc8: f043 0320 orr.w r3, r3, #32 8009ccc: 6193 str r3, [r2, #24] 8009cce: 4b54 ldr r3, [pc, #336] @ (8009e20 ) 8009cd0: 699b ldr r3, [r3, #24] 8009cd2: f003 0320 and.w r3, r3, #32 8009cd6: 61bb str r3, [r7, #24] 8009cd8: 69bb ldr r3, [r7, #24] /**CAN1 GPIO Configuration PD0 ------> CAN1_RX PD1 ------> CAN1_TX */ GPIO_InitStruct.Pin = GPIO_PIN_0; 8009cda: 2301 movs r3, #1 8009cdc: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8009cde: 2300 movs r3, #0 8009ce0: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8009ce2: 2300 movs r3, #0 8009ce4: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8009ce6: f107 0320 add.w r3, r7, #32 8009cea: 4619 mov r1, r3 8009cec: 484d ldr r0, [pc, #308] @ (8009e24 ) 8009cee: f007 fea3 bl 8011a38 GPIO_InitStruct.Pin = GPIO_PIN_1; 8009cf2: 2302 movs r3, #2 8009cf4: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8009cf6: 2302 movs r3, #2 8009cf8: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8009cfa: 2303 movs r3, #3 8009cfc: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8009cfe: f107 0320 add.w r3, r7, #32 8009d02: 4619 mov r1, r3 8009d04: 4847 ldr r0, [pc, #284] @ (8009e24 ) 8009d06: f007 fe97 bl 8011a38 __HAL_AFIO_REMAP_CAN1_3(); 8009d0a: 4b47 ldr r3, [pc, #284] @ (8009e28 ) 8009d0c: 685b ldr r3, [r3, #4] 8009d0e: 633b str r3, [r7, #48] @ 0x30 8009d10: 6b3b ldr r3, [r7, #48] @ 0x30 8009d12: f423 43c0 bic.w r3, r3, #24576 @ 0x6000 8009d16: 633b str r3, [r7, #48] @ 0x30 8009d18: 6b3b ldr r3, [r7, #48] @ 0x30 8009d1a: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8009d1e: 633b str r3, [r7, #48] @ 0x30 8009d20: 6b3b ldr r3, [r7, #48] @ 0x30 8009d22: f443 43c0 orr.w r3, r3, #24576 @ 0x6000 8009d26: 633b str r3, [r7, #48] @ 0x30 8009d28: 4a3f ldr r2, [pc, #252] @ (8009e28 ) 8009d2a: 6b3b ldr r3, [r7, #48] @ 0x30 8009d2c: 6053 str r3, [r2, #4] /* CAN1 interrupt Init */ HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 3, 0); 8009d2e: 2200 movs r2, #0 8009d30: 2103 movs r1, #3 8009d32: 2014 movs r0, #20 8009d34: f007 f99f bl 8011076 HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn); 8009d38: 2014 movs r0, #20 8009d3a: f007 f9b8 bl 80110ae HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); /* USER CODE BEGIN CAN2_MspInit 1 */ /* USER CODE END CAN2_MspInit 1 */ } } 8009d3e: e067 b.n 8009e10 else if(canHandle->Instance==CAN2) 8009d40: 687b ldr r3, [r7, #4] 8009d42: 681b ldr r3, [r3, #0] 8009d44: 4a39 ldr r2, [pc, #228] @ (8009e2c ) 8009d46: 4293 cmp r3, r2 8009d48: d162 bne.n 8009e10 __HAL_RCC_CAN2_CLK_ENABLE(); 8009d4a: 4b35 ldr r3, [pc, #212] @ (8009e20 ) 8009d4c: 69db ldr r3, [r3, #28] 8009d4e: 4a34 ldr r2, [pc, #208] @ (8009e20 ) 8009d50: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000 8009d54: 61d3 str r3, [r2, #28] 8009d56: 4b32 ldr r3, [pc, #200] @ (8009e20 ) 8009d58: 69db ldr r3, [r3, #28] 8009d5a: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8009d5e: 617b str r3, [r7, #20] 8009d60: 697b ldr r3, [r7, #20] HAL_RCC_CAN1_CLK_ENABLED++; 8009d62: 4b2e ldr r3, [pc, #184] @ (8009e1c ) 8009d64: 681b ldr r3, [r3, #0] 8009d66: 3301 adds r3, #1 8009d68: 4a2c ldr r2, [pc, #176] @ (8009e1c ) 8009d6a: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8009d6c: 4b2b ldr r3, [pc, #172] @ (8009e1c ) 8009d6e: 681b ldr r3, [r3, #0] 8009d70: 2b01 cmp r3, #1 8009d72: d10b bne.n 8009d8c __HAL_RCC_CAN1_CLK_ENABLE(); 8009d74: 4b2a ldr r3, [pc, #168] @ (8009e20 ) 8009d76: 69db ldr r3, [r3, #28] 8009d78: 4a29 ldr r2, [pc, #164] @ (8009e20 ) 8009d7a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8009d7e: 61d3 str r3, [r2, #28] 8009d80: 4b27 ldr r3, [pc, #156] @ (8009e20 ) 8009d82: 69db ldr r3, [r3, #28] 8009d84: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8009d88: 613b str r3, [r7, #16] 8009d8a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8009d8c: 4b24 ldr r3, [pc, #144] @ (8009e20 ) 8009d8e: 699b ldr r3, [r3, #24] 8009d90: 4a23 ldr r2, [pc, #140] @ (8009e20 ) 8009d92: f043 0308 orr.w r3, r3, #8 8009d96: 6193 str r3, [r2, #24] 8009d98: 4b21 ldr r3, [pc, #132] @ (8009e20 ) 8009d9a: 699b ldr r3, [r3, #24] 8009d9c: f003 0308 and.w r3, r3, #8 8009da0: 60fb str r3, [r7, #12] 8009da2: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_5; 8009da4: 2320 movs r3, #32 8009da6: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8009da8: 2300 movs r3, #0 8009daa: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8009dac: 2300 movs r3, #0 8009dae: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8009db0: f107 0320 add.w r3, r7, #32 8009db4: 4619 mov r1, r3 8009db6: 481e ldr r0, [pc, #120] @ (8009e30 ) 8009db8: f007 fe3e bl 8011a38 GPIO_InitStruct.Pin = GPIO_PIN_6; 8009dbc: 2340 movs r3, #64 @ 0x40 8009dbe: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8009dc0: 2302 movs r3, #2 8009dc2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8009dc4: 2303 movs r3, #3 8009dc6: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8009dc8: f107 0320 add.w r3, r7, #32 8009dcc: 4619 mov r1, r3 8009dce: 4818 ldr r0, [pc, #96] @ (8009e30 ) 8009dd0: f007 fe32 bl 8011a38 __HAL_AFIO_REMAP_CAN2_ENABLE(); 8009dd4: 4b14 ldr r3, [pc, #80] @ (8009e28 ) 8009dd6: 685b ldr r3, [r3, #4] 8009dd8: 637b str r3, [r7, #52] @ 0x34 8009dda: 6b7b ldr r3, [r7, #52] @ 0x34 8009ddc: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8009de0: 637b str r3, [r7, #52] @ 0x34 8009de2: 6b7b ldr r3, [r7, #52] @ 0x34 8009de4: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 8009de8: 637b str r3, [r7, #52] @ 0x34 8009dea: 4a0f ldr r2, [pc, #60] @ (8009e28 ) 8009dec: 6b7b ldr r3, [r7, #52] @ 0x34 8009dee: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(CAN2_TX_IRQn, 0, 0); 8009df0: 2200 movs r2, #0 8009df2: 2100 movs r1, #0 8009df4: 203f movs r0, #63 @ 0x3f 8009df6: f007 f93e bl 8011076 HAL_NVIC_EnableIRQ(CAN2_TX_IRQn); 8009dfa: 203f movs r0, #63 @ 0x3f 8009dfc: f007 f957 bl 80110ae HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 3, 0); 8009e00: 2200 movs r2, #0 8009e02: 2103 movs r1, #3 8009e04: 2041 movs r0, #65 @ 0x41 8009e06: f007 f936 bl 8011076 HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); 8009e0a: 2041 movs r0, #65 @ 0x41 8009e0c: f007 f94f bl 80110ae } 8009e10: bf00 nop 8009e12: 3738 adds r7, #56 @ 0x38 8009e14: 46bd mov sp, r7 8009e16: bd80 pop {r7, pc} 8009e18: 40006400 .word 0x40006400 8009e1c: 200003ac .word 0x200003ac 8009e20: 40021000 .word 0x40021000 8009e24: 40011400 .word 0x40011400 8009e28: 40010000 .word 0x40010000 8009e2c: 40006800 .word 0x40006800 8009e30: 40010c00 .word 0x40010c00 08009e34 : #include "psu_control.h" ChargingConnector_t CONN; CONN_State_t connectorState; void CONN_Init(){ 8009e34: b480 push {r7} 8009e36: af00 add r7, sp, #0 CONN.connControl = CMD_NONE; 8009e38: 4b13 ldr r3, [pc, #76] @ (8009e88 ) 8009e3a: 2200 movs r2, #0 8009e3c: 701a strb r2, [r3, #0] CONN.connState = Unknown; 8009e3e: 4b12 ldr r3, [pc, #72] @ (8009e88 ) 8009e40: 2200 movs r2, #0 8009e42: 705a strb r2, [r3, #1] CONN.RequestedVoltage = PSU_MIN_VOLTAGE; 8009e44: 4b10 ldr r3, [pc, #64] @ (8009e88 ) 8009e46: 2200 movs r2, #0 8009e48: f062 0269 orn r2, r2, #105 @ 0x69 8009e4c: 73da strb r2, [r3, #15] 8009e4e: 2200 movs r2, #0 8009e50: 741a strb r2, [r3, #16] CONN.ChargingTime = 0; 8009e52: 4b0d ldr r3, [pc, #52] @ (8009e88 ) 8009e54: 2200 movs r2, #0 8009e56: 77da strb r2, [r3, #31] 8009e58: 2200 movs r2, #0 8009e5a: f883 2020 strb.w r2, [r3, #32] 8009e5e: 2200 movs r2, #0 8009e60: f883 2021 strb.w r2, [r3, #33] @ 0x21 8009e64: 2200 movs r2, #0 8009e66: f883 2022 strb.w r2, [r3, #34] @ 0x22 CONN.hv_limit = 0u; 8009e6a: 4b07 ldr r3, [pc, #28] @ (8009e88 ) 8009e6c: 2200 movs r2, #0 8009e6e: f883 2023 strb.w r2, [r3, #35] @ 0x23 CONN.hv_tick = 0u; 8009e72: 4b05 ldr r3, [pc, #20] @ (8009e88 ) 8009e74: 2200 movs r2, #0 8009e76: 625a str r2, [r3, #36] @ 0x24 CONN.hv_limit_count = 0u; 8009e78: 4b03 ldr r3, [pc, #12] @ (8009e88 ) 8009e7a: 2200 movs r2, #0 8009e7c: f883 2028 strb.w r2, [r3, #40] @ 0x28 } 8009e80: bf00 nop 8009e82: 46bd mov sp, r7 8009e84: bc80 pop {r7} 8009e86: 4770 bx lr 8009e88: 200003b0 .word 0x200003b0 08009e8c : void CONN_Loop(){ 8009e8c: b580 push {r7, lr} 8009e8e: af00 add r7, sp, #0 static uint32_t charging_time_tick = 0; static CONN_State_t last_connState = Unknown; if(last_connState != CONN.connState){ 8009e90: 4b34 ldr r3, [pc, #208] @ (8009f64 ) 8009e92: 785a ldrb r2, [r3, #1] 8009e94: 4b34 ldr r3, [pc, #208] @ (8009f68 ) 8009e96: 781b ldrb r3, [r3, #0] 8009e98: 429a cmp r2, r3 8009e9a: d006 beq.n 8009eaa last_connState = CONN.connState; 8009e9c: 4b31 ldr r3, [pc, #196] @ (8009f64 ) 8009e9e: 785a ldrb r2, [r3, #1] 8009ea0: 4b31 ldr r3, [pc, #196] @ (8009f68 ) 8009ea2: 701a strb r2, [r3, #0] CONN.connControl = CMD_NONE; 8009ea4: 4b2f ldr r3, [pc, #188] @ (8009f64 ) 8009ea6: 2200 movs r2, #0 8009ea8: 701a strb r2, [r3, #0] } if (FireAlarm_IsLatched()) { 8009eaa: f000 fc41 bl 800a730 8009eae: 4603 mov r3, r0 8009eb0: 2b00 cmp r3, #0 8009eb2: d003 beq.n 8009ebc CONN.chargingError = CONN_ERR_FIRE_ALARM; 8009eb4: 4b2b ldr r3, [pc, #172] @ (8009f64 ) 8009eb6: 220b movs r2, #11 8009eb8: 775a strb r2, [r3, #29] 8009eba: e016 b.n 8009eea } else if(PSU0.cont_fault){ 8009ebc: 4b2b ldr r3, [pc, #172] @ (8009f6c ) 8009ebe: 7b1b ldrb r3, [r3, #12] 8009ec0: 2b00 cmp r3, #0 8009ec2: d003 beq.n 8009ecc CONN.chargingError = CONN_ERR_CONTACTOR; 8009ec4: 4b27 ldr r3, [pc, #156] @ (8009f64 ) 8009ec6: 2207 movs r2, #7 8009ec8: 775a strb r2, [r3, #29] 8009eca: e00e b.n 8009eea } else if(PSU0.psu_fault){ 8009ecc: 4b27 ldr r3, [pc, #156] @ (8009f6c ) 8009ece: 7b5b ldrb r3, [r3, #13] 8009ed0: 2b00 cmp r3, #0 8009ed2: d003 beq.n 8009edc CONN.chargingError = CONN_ERR_PSU_FAULT; 8009ed4: 4b23 ldr r3, [pc, #140] @ (8009f64 ) 8009ed6: 220a movs r2, #10 8009ed8: 775a strb r2, [r3, #29] 8009eda: e006 b.n 8009eea }else if (CONN.EvConnected == 0){ 8009edc: 4b21 ldr r3, [pc, #132] @ (8009f64 ) 8009ede: 7f9b ldrb r3, [r3, #30] 8009ee0: 2b00 cmp r3, #0 8009ee2: d102 bne.n 8009eea CONN.chargingError = CONN_NO_ERROR; 8009ee4: 4b1f ldr r3, [pc, #124] @ (8009f64 ) 8009ee6: 2200 movs r2, #0 8009ee8: 775a strb r2, [r3, #29] } if(ED_TraceWarning(CONN.chargingError, 0)) { 8009eea: 4b1e ldr r3, [pc, #120] @ (8009f64 ) 8009eec: 7f5b ldrb r3, [r3, #29] 8009eee: 2100 movs r1, #0 8009ef0: 4618 mov r0, r3 8009ef2: f000 fda1 bl 800aa38 8009ef6: 4603 mov r3, r0 8009ef8: 2b00 cmp r3, #0 8009efa: d006 beq.n 8009f0a log_printf(LOG_WARN, "CONN0 Error: %d\n", (int)CONN.chargingError); 8009efc: 4b19 ldr r3, [pc, #100] @ (8009f64 ) 8009efe: 7f5b ldrb r3, [r3, #29] 8009f00: 461a mov r2, r3 8009f02: 491b ldr r1, [pc, #108] @ (8009f70 ) 8009f04: 2005 movs r0, #5 8009f06: f000 fb9f bl 800a648 } if (HAL_GetTick() - charging_time_tick >= 1000U) { 8009f0a: f005 fb99 bl 800f640 8009f0e: 4602 mov r2, r0 8009f10: 4b18 ldr r3, [pc, #96] @ (8009f74 ) 8009f12: 681b ldr r3, [r3, #0] 8009f14: 1ad3 subs r3, r2, r3 8009f16: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8009f1a: d320 bcc.n 8009f5e charging_time_tick += 1000U; 8009f1c: 4b15 ldr r3, [pc, #84] @ (8009f74 ) 8009f1e: 681b ldr r3, [r3, #0] 8009f20: f503 737a add.w r3, r3, #1000 @ 0x3e8 8009f24: 4a13 ldr r2, [pc, #76] @ (8009f74 ) 8009f26: 6013 str r3, [r2, #0] if (CONN.connState == Charging) { 8009f28: 4b0e ldr r3, [pc, #56] @ (8009f64 ) 8009f2a: 785b ldrb r3, [r3, #1] 8009f2c: 2b08 cmp r3, #8 8009f2e: d106 bne.n 8009f3e CONN.ChargingTime++; 8009f30: 4b0c ldr r3, [pc, #48] @ (8009f64 ) 8009f32: f8d3 301f ldr.w r3, [r3, #31] 8009f36: 3301 adds r3, #1 8009f38: 4a0a ldr r2, [pc, #40] @ (8009f64 ) 8009f3a: f8c2 301f str.w r3, [r2, #31] } if (CONN.connState == Unplugged) { 8009f3e: 4b09 ldr r3, [pc, #36] @ (8009f64 ) 8009f40: 785b ldrb r3, [r3, #1] 8009f42: 2b01 cmp r3, #1 8009f44: d10b bne.n 8009f5e CONN.ChargingTime = 0; 8009f46: 4b07 ldr r3, [pc, #28] @ (8009f64 ) 8009f48: 2200 movs r2, #0 8009f4a: 77da strb r2, [r3, #31] 8009f4c: 2200 movs r2, #0 8009f4e: f883 2020 strb.w r2, [r3, #32] 8009f52: 2200 movs r2, #0 8009f54: f883 2021 strb.w r2, [r3, #33] @ 0x21 8009f58: 2200 movs r2, #0 8009f5a: f883 2022 strb.w r2, [r3, #34] @ 0x22 } } } 8009f5e: bf00 nop 8009f60: bd80 pop {r7, pc} 8009f62: bf00 nop 8009f64: 200003b0 .word 0x200003b0 8009f68: 200003da .word 0x200003da 8009f6c: 2000092c .word 0x2000092c 8009f70: 08018200 .word 0x08018200 8009f74: 200003dc .word 0x200003dc 08009f78 : void CONN_GetElapsedForMonitoring(uint16_t *min, uint8_t *sec) { 8009f78: b480 push {r7} 8009f7a: b085 sub sp, #20 8009f7c: af00 add r7, sp, #0 8009f7e: 6078 str r0, [r7, #4] 8009f80: 6039 str r1, [r7, #0] uint32_t elapsed_sec = CONN.ChargingTime; 8009f82: 4b12 ldr r3, [pc, #72] @ (8009fcc ) 8009f84: f8d3 301f ldr.w r3, [r3, #31] 8009f88: 60fb str r3, [r7, #12] if (min != NULL) { 8009f8a: 687b ldr r3, [r7, #4] 8009f8c: 2b00 cmp r3, #0 8009f8e: d007 beq.n 8009fa0 *min = (uint16_t)(elapsed_sec / 60U); 8009f90: 68fb ldr r3, [r7, #12] 8009f92: 4a0f ldr r2, [pc, #60] @ (8009fd0 ) 8009f94: fba2 2303 umull r2, r3, r2, r3 8009f98: 095b lsrs r3, r3, #5 8009f9a: b29a uxth r2, r3 8009f9c: 687b ldr r3, [r7, #4] 8009f9e: 801a strh r2, [r3, #0] } if (sec != NULL) { 8009fa0: 683b ldr r3, [r7, #0] 8009fa2: 2b00 cmp r3, #0 8009fa4: d00c beq.n 8009fc0 *sec = (uint8_t)(elapsed_sec % 60U); 8009fa6: 68f9 ldr r1, [r7, #12] 8009fa8: 4b09 ldr r3, [pc, #36] @ (8009fd0 ) 8009faa: fba3 2301 umull r2, r3, r3, r1 8009fae: 095a lsrs r2, r3, #5 8009fb0: 4613 mov r3, r2 8009fb2: 011b lsls r3, r3, #4 8009fb4: 1a9b subs r3, r3, r2 8009fb6: 009b lsls r3, r3, #2 8009fb8: 1aca subs r2, r1, r3 8009fba: b2d2 uxtb r2, r2 8009fbc: 683b ldr r3, [r7, #0] 8009fbe: 701a strb r2, [r3, #0] } } 8009fc0: bf00 nop 8009fc2: 3714 adds r7, #20 8009fc4: 46bd mov sp, r7 8009fc6: bc80 pop {r7} 8009fc8: 4770 bx lr 8009fca: bf00 nop 8009fcc: 200003b0 .word 0x200003b0 8009fd0: 88888889 .word 0x88888889 08009fd4 : void CONN_SetState(CONN_State_t state){ 8009fd4: b580 push {r7, lr} 8009fd6: b082 sub sp, #8 8009fd8: af00 add r7, sp, #0 8009fda: 4603 mov r3, r0 8009fdc: 71fb strb r3, [r7, #7] if (connectorState == state) { 8009fde: 4b41 ldr r3, [pc, #260] @ (800a0e4 ) 8009fe0: 781b ldrb r3, [r3, #0] 8009fe2: 79fa ldrb r2, [r7, #7] 8009fe4: 429a cmp r2, r3 8009fe6: d103 bne.n 8009ff0 CONN.connState = state; 8009fe8: 4a3f ldr r2, [pc, #252] @ (800a0e8 ) 8009fea: 79fb ldrb r3, [r7, #7] 8009fec: 7053 strb r3, [r2, #1] return; 8009fee: e075 b.n 800a0dc } connectorState = state; 8009ff0: 4a3c ldr r2, [pc, #240] @ (800a0e4 ) 8009ff2: 79fb ldrb r3, [r7, #7] 8009ff4: 7013 strb r3, [r2, #0] if(connectorState == Unknown) log_printf(LOG_INFO, "Connector: Unknown\n"); 8009ff6: 4b3b ldr r3, [pc, #236] @ (800a0e4 ) 8009ff8: 781b ldrb r3, [r3, #0] 8009ffa: 2b00 cmp r3, #0 8009ffc: d103 bne.n 800a006 8009ffe: 493b ldr r1, [pc, #236] @ (800a0ec ) 800a000: 2007 movs r0, #7 800a002: f000 fb21 bl 800a648 if(connectorState == Unplugged) log_printf(LOG_INFO, "Connector: Unplugged\n"); 800a006: 4b37 ldr r3, [pc, #220] @ (800a0e4 ) 800a008: 781b ldrb r3, [r3, #0] 800a00a: 2b01 cmp r3, #1 800a00c: d103 bne.n 800a016 800a00e: 4938 ldr r1, [pc, #224] @ (800a0f0 ) 800a010: 2007 movs r0, #7 800a012: f000 fb19 bl 800a648 if(connectorState == Disabled) log_printf(LOG_INFO, "Connector: Disabled\n"); 800a016: 4b33 ldr r3, [pc, #204] @ (800a0e4 ) 800a018: 781b ldrb r3, [r3, #0] 800a01a: 2b02 cmp r3, #2 800a01c: d103 bne.n 800a026 800a01e: 4935 ldr r1, [pc, #212] @ (800a0f4 ) 800a020: 2007 movs r0, #7 800a022: f000 fb11 bl 800a648 if(connectorState == Preparing) log_printf(LOG_INFO, "Connector: Preparing\n"); 800a026: 4b2f ldr r3, [pc, #188] @ (800a0e4 ) 800a028: 781b ldrb r3, [r3, #0] 800a02a: 2b03 cmp r3, #3 800a02c: d103 bne.n 800a036 800a02e: 4932 ldr r1, [pc, #200] @ (800a0f8 ) 800a030: 2007 movs r0, #7 800a032: f000 fb09 bl 800a648 if(connectorState == AuthRequired) log_printf(LOG_INFO, "Connector: AuthRequired\n"); 800a036: 4b2b ldr r3, [pc, #172] @ (800a0e4 ) 800a038: 781b ldrb r3, [r3, #0] 800a03a: 2b04 cmp r3, #4 800a03c: d103 bne.n 800a046 800a03e: 492f ldr r1, [pc, #188] @ (800a0fc ) 800a040: 2007 movs r0, #7 800a042: f000 fb01 bl 800a648 if(connectorState == WaitingForEnergy) log_printf(LOG_INFO, "Connector: WaitingForEnergy\n"); 800a046: 4b27 ldr r3, [pc, #156] @ (800a0e4 ) 800a048: 781b ldrb r3, [r3, #0] 800a04a: 2b05 cmp r3, #5 800a04c: d103 bne.n 800a056 800a04e: 492c ldr r1, [pc, #176] @ (800a100 ) 800a050: 2007 movs r0, #7 800a052: f000 faf9 bl 800a648 if(connectorState == ChargingPausedEV) log_printf(LOG_INFO, "Connector: ChargingPausedEV\n"); 800a056: 4b23 ldr r3, [pc, #140] @ (800a0e4 ) 800a058: 781b ldrb r3, [r3, #0] 800a05a: 2b06 cmp r3, #6 800a05c: d103 bne.n 800a066 800a05e: 4929 ldr r1, [pc, #164] @ (800a104 ) 800a060: 2007 movs r0, #7 800a062: f000 faf1 bl 800a648 if(connectorState == ChargingPausedEVSE) log_printf(LOG_INFO, "Connector: ChargingPausedEVSE\n"); 800a066: 4b1f ldr r3, [pc, #124] @ (800a0e4 ) 800a068: 781b ldrb r3, [r3, #0] 800a06a: 2b07 cmp r3, #7 800a06c: d103 bne.n 800a076 800a06e: 4926 ldr r1, [pc, #152] @ (800a108 ) 800a070: 2007 movs r0, #7 800a072: f000 fae9 bl 800a648 if(connectorState == Charging) log_printf(LOG_INFO, "Connector: Charging\n"); 800a076: 4b1b ldr r3, [pc, #108] @ (800a0e4 ) 800a078: 781b ldrb r3, [r3, #0] 800a07a: 2b08 cmp r3, #8 800a07c: d103 bne.n 800a086 800a07e: 4923 ldr r1, [pc, #140] @ (800a10c ) 800a080: 2007 movs r0, #7 800a082: f000 fae1 bl 800a648 if(connectorState == AuthTimeout) log_printf(LOG_INFO, "Connector: AuthTimeout\n"); 800a086: 4b17 ldr r3, [pc, #92] @ (800a0e4 ) 800a088: 781b ldrb r3, [r3, #0] 800a08a: 2b09 cmp r3, #9 800a08c: d103 bne.n 800a096 800a08e: 4920 ldr r1, [pc, #128] @ (800a110 ) 800a090: 2007 movs r0, #7 800a092: f000 fad9 bl 800a648 if(connectorState == Finished) log_printf(LOG_INFO, "Connector: Finished\n"); 800a096: 4b13 ldr r3, [pc, #76] @ (800a0e4 ) 800a098: 781b ldrb r3, [r3, #0] 800a09a: 2b0a cmp r3, #10 800a09c: d103 bne.n 800a0a6 800a09e: 491d ldr r1, [pc, #116] @ (800a114 ) 800a0a0: 2007 movs r0, #7 800a0a2: f000 fad1 bl 800a648 if(connectorState == FinishedEVSE) log_printf(LOG_INFO, "Connector: FinishedEVSE\n"); 800a0a6: 4b0f ldr r3, [pc, #60] @ (800a0e4 ) 800a0a8: 781b ldrb r3, [r3, #0] 800a0aa: 2b0b cmp r3, #11 800a0ac: d103 bne.n 800a0b6 800a0ae: 491a ldr r1, [pc, #104] @ (800a118 ) 800a0b0: 2007 movs r0, #7 800a0b2: f000 fac9 bl 800a648 if(connectorState == FinishedEV) log_printf(LOG_INFO, "Connector: FinishedEV\n"); 800a0b6: 4b0b ldr r3, [pc, #44] @ (800a0e4 ) 800a0b8: 781b ldrb r3, [r3, #0] 800a0ba: 2b0c cmp r3, #12 800a0bc: d103 bne.n 800a0c6 800a0be: 4917 ldr r1, [pc, #92] @ (800a11c ) 800a0c0: 2007 movs r0, #7 800a0c2: f000 fac1 bl 800a648 if(connectorState == Replugging) log_printf(LOG_INFO, "Connector: Replugging\n"); 800a0c6: 4b07 ldr r3, [pc, #28] @ (800a0e4 ) 800a0c8: 781b ldrb r3, [r3, #0] 800a0ca: 2b0d cmp r3, #13 800a0cc: d103 bne.n 800a0d6 800a0ce: 4914 ldr r1, [pc, #80] @ (800a120 ) 800a0d0: 2007 movs r0, #7 800a0d2: f000 fab9 bl 800a648 CONN.connState = state; 800a0d6: 4a04 ldr r2, [pc, #16] @ (800a0e8 ) 800a0d8: 79fb ldrb r3, [r7, #7] 800a0da: 7053 strb r3, [r2, #1] } 800a0dc: 3708 adds r7, #8 800a0de: 46bd mov sp, r7 800a0e0: bd80 pop {r7, pc} 800a0e2: bf00 nop 800a0e4: 200003d9 .word 0x200003d9 800a0e8: 200003b0 .word 0x200003b0 800a0ec: 08018214 .word 0x08018214 800a0f0: 08018228 .word 0x08018228 800a0f4: 08018240 .word 0x08018240 800a0f8: 08018258 .word 0x08018258 800a0fc: 08018270 .word 0x08018270 800a100: 0801828c .word 0x0801828c 800a104: 080182ac .word 0x080182ac 800a108: 080182cc .word 0x080182cc 800a10c: 080182ec .word 0x080182ec 800a110: 08018304 .word 0x08018304 800a114: 0801831c .word 0x0801831c 800a118: 08018334 .word 0x08018334 800a11c: 08018350 .word 0x08018350 800a120: 08018368 .word 0x08018368 0800a124 : CP_State_t cp_state_buffer = EV_STATE_ACQUIRING; #define VREFINT_CAL_ADDR ((uint16_t*)0x1FFFF7BA) // для STM32F1! static int32_t CP_ReadVoltageMv(void) { 800a124: b480 push {r7} 800a126: b087 sub sp, #28 800a128: af00 add r7, sp, #0 uint32_t adc_cp = adc_data.cp_raw; 800a12a: 4b13 ldr r3, [pc, #76] @ (800a178 ) 800a12c: 885b ldrh r3, [r3, #2] 800a12e: b29b uxth r3, r3 800a130: 617b str r3, [r7, #20] uint32_t adc_vref = adc_data.vrefint_raw; // нужно измерять! 800a132: 4b11 ldr r3, [pc, #68] @ (800a178 ) 800a134: 895b ldrh r3, [r3, #10] 800a136: b29b uxth r3, r3 800a138: 613b str r3, [r7, #16] // VREFINT в мВ (берётся из даташита или калибровки MCU) const int32_t VREFINT_MV = 1210; 800a13a: f240 43ba movw r3, #1210 @ 0x4ba 800a13e: 60fb str r3, [r7, #12] // напряжение на входе АЦП int32_t v_adc_mv = (adc_cp * VREFINT_MV) / adc_vref; 800a140: 68fb ldr r3, [r7, #12] 800a142: 697a ldr r2, [r7, #20] 800a144: fb03 f202 mul.w r2, r3, r2 800a148: 693b ldr r3, [r7, #16] 800a14a: fbb2 f3f3 udiv r3, r2, r3 800a14e: 60bb str r3, [r7, #8] // дальше твоя формула int32_t v_out_mv = ((v_adc_mv - 1723) * 7704) / 1000; 800a150: 68bb ldr r3, [r7, #8] 800a152: f2a3 63bb subw r3, r3, #1723 @ 0x6bb 800a156: f641 6218 movw r2, #7704 @ 0x1e18 800a15a: fb02 f303 mul.w r3, r2, r3 800a15e: 4a07 ldr r2, [pc, #28] @ (800a17c ) 800a160: fb82 1203 smull r1, r2, r2, r3 800a164: 1192 asrs r2, r2, #6 800a166: 17db asrs r3, r3, #31 800a168: 1ad3 subs r3, r2, r3 800a16a: 607b str r3, [r7, #4] return v_out_mv; 800a16c: 687b ldr r3, [r7, #4] } 800a16e: 4618 mov r0, r3 800a170: 371c adds r7, #28 800a172: 46bd mov sp, r7 800a174: bc80 pop {r7} 800a176: 4770 bx lr 800a178: 20000280 .word 0x20000280 800a17c: 10624dd3 .word 0x10624dd3 0800a180 : void CP_Init(void) { 800a180: b580 push {r7, lr} 800a182: af00 add r7, sp, #0 /* TIM3_CH2 (PA7): set 1kHz PWM like original CCS logic. */ htim3.Instance->PSC = 160 - 1; 800a184: 4b0e ldr r3, [pc, #56] @ (800a1c0 ) 800a186: 681b ldr r3, [r3, #0] 800a188: 229f movs r2, #159 @ 0x9f 800a18a: 629a str r2, [r3, #40] @ 0x28 htim3.Instance->ARR = MAX_DUTY - 1; 800a18c: 4b0c ldr r3, [pc, #48] @ (800a1c0 ) 800a18e: 681b ldr r3, [r3, #0] 800a190: f240 12c1 movw r2, #449 @ 0x1c1 800a194: 62da str r2, [r3, #44] @ 0x2c #if DUTY_INVERT == 0 htim3.Instance->CCR2 = MAX_DUTY; 800a196: 4b0a ldr r3, [pc, #40] @ (800a1c0 ) 800a198: 681b ldr r3, [r3, #0] 800a19a: f44f 72e1 mov.w r2, #450 @ 0x1c2 800a19e: 639a str r2, [r3, #56] @ 0x38 htim3.Instance->CCR1 = MAX_DUTY + 5; 800a1a0: 4b07 ldr r3, [pc, #28] @ (800a1c0 ) 800a1a2: 681b ldr r3, [r3, #0] 800a1a4: f240 12c7 movw r2, #455 @ 0x1c7 800a1a8: 635a str r2, [r3, #52] @ 0x34 #else htim3.Instance->CCR2 = 0; htim3.Instance->CCR1 = 0; #endif HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_2); 800a1aa: 2104 movs r1, #4 800a1ac: 4804 ldr r0, [pc, #16] @ (800a1c0 ) 800a1ae: f009 f915 bl 80133dc HAL_TIM_OC_Start(&htim3, TIM_CHANNEL_1); 800a1b2: 2100 movs r1, #0 800a1b4: 4802 ldr r0, [pc, #8] @ (800a1c0 ) 800a1b6: f009 f80f bl 80131d8 } 800a1ba: bf00 nop 800a1bc: bd80 pop {r7, pc} 800a1be: bf00 nop 800a1c0: 20001208 .word 0x20001208 0800a1c4 : void CP_SetDuty(uint8_t percentage) { 800a1c4: b480 push {r7} 800a1c6: b085 sub sp, #20 800a1c8: af00 add r7, sp, #0 800a1ca: 4603 mov r3, r0 800a1cc: 71fb strb r3, [r7, #7] uint32_t pwmduty = MAX_DUTY * percentage / 100; 800a1ce: 79fb ldrb r3, [r7, #7] 800a1d0: f44f 72e1 mov.w r2, #450 @ 0x1c2 800a1d4: fb02 f303 mul.w r3, r2, r3 800a1d8: 4a0b ldr r2, [pc, #44] @ (800a208 ) 800a1da: fb82 1203 smull r1, r2, r2, r3 800a1de: 1152 asrs r2, r2, #5 800a1e0: 17db asrs r3, r3, #31 800a1e2: 1ad3 subs r3, r2, r3 800a1e4: 60fb str r3, [r7, #12] cp_duty = percentage; 800a1e6: 4a09 ldr r2, [pc, #36] @ (800a20c ) 800a1e8: 79fb ldrb r3, [r7, #7] 800a1ea: 7013 strb r3, [r2, #0] #if DUTY_INVERT == 0 htim3.Instance->CCR2 = pwmduty; 800a1ec: 4b08 ldr r3, [pc, #32] @ (800a210 ) 800a1ee: 681b ldr r3, [r3, #0] 800a1f0: 68fa ldr r2, [r7, #12] 800a1f2: 639a str r2, [r3, #56] @ 0x38 htim3.Instance->CCR1 = 0 + 1; 800a1f4: 4b06 ldr r3, [pc, #24] @ (800a210 ) 800a1f6: 681b ldr r3, [r3, #0] 800a1f8: 2201 movs r2, #1 800a1fa: 635a str r2, [r3, #52] @ 0x34 #else htim3.Instance->CCR2 = MAX_DUTY - pwmduty; htim3.Instance->CCR1 = MAX_DUTY - pwmduty + 5; #endif } 800a1fc: bf00 nop 800a1fe: 3714 adds r7, #20 800a200: 46bd mov sp, r7 800a202: bc80 pop {r7} 800a204: 4770 bx lr 800a206: bf00 nop 800a208: 51eb851f .word 0x51eb851f 800a20c: 200003e4 .word 0x200003e4 800a210: 20001208 .word 0x20001208 0800a214 : uint8_t CP_GetDuty(void) { 800a214: b480 push {r7} 800a216: af00 add r7, sp, #0 return cp_duty; 800a218: 4b02 ldr r3, [pc, #8] @ (800a224 ) 800a21a: 781b ldrb r3, [r3, #0] } 800a21c: 4618 mov r0, r3 800a21e: 46bd mov sp, r7 800a220: bc80 pop {r7} 800a222: 4770 bx lr 800a224: 200003e4 .word 0x200003e4 0800a228 : int32_t CP_GetVoltage(void) { 800a228: b580 push {r7, lr} 800a22a: af00 add r7, sp, #0 cp_voltage_mv = CP_ReadVoltageMv(); 800a22c: f7ff ff7a bl 800a124 800a230: 4603 mov r3, r0 800a232: 4a03 ldr r2, [pc, #12] @ (800a240 ) 800a234: 6013 str r3, [r2, #0] return cp_voltage_mv; 800a236: 4b02 ldr r3, [pc, #8] @ (800a240 ) 800a238: 681b ldr r3, [r3, #0] } 800a23a: 4618 mov r0, r3 800a23c: bd80 pop {r7, pc} 800a23e: bf00 nop 800a240: 200003e0 .word 0x200003e0 0800a244 : CP_State_t CP_GetState(void) { 800a244: b580 push {r7, lr} 800a246: b082 sub sp, #8 800a248: af00 add r7, sp, #0 int32_t voltage_real = CP_GetVoltage(); 800a24a: f7ff ffed bl 800a228 800a24e: 6078 str r0, [r7, #4] if(fake_cp_state != EV_STATE_ACQUIRING) { 800a250: 4b21 ldr r3, [pc, #132] @ (800a2d8 ) 800a252: 781b ldrb r3, [r3, #0] 800a254: 2b06 cmp r3, #6 800a256: d002 beq.n 800a25e return fake_cp_state; 800a258: 4b1f ldr r3, [pc, #124] @ (800a2d8 ) 800a25a: 781b ldrb r3, [r3, #0] 800a25c: e038 b.n 800a2d0 } if (voltage_real >= (12000-1000)) { 800a25e: 687b ldr r3, [r7, #4] 800a260: f642 22f7 movw r2, #10999 @ 0x2af7 800a264: 4293 cmp r3, r2 800a266: dd01 ble.n 800a26c return EV_STATE_A_IDLE; 800a268: 2300 movs r3, #0 800a26a: e031 b.n 800a2d0 } else if (voltage_real >= (9000-1000) && voltage_real <= (9000+1000)) { 800a26c: 687b ldr r3, [r7, #4] 800a26e: f5b3 5ffa cmp.w r3, #8000 @ 0x1f40 800a272: db06 blt.n 800a282 800a274: 687b ldr r3, [r7, #4] 800a276: f242 7210 movw r2, #10000 @ 0x2710 800a27a: 4293 cmp r3, r2 800a27c: dc01 bgt.n 800a282 return EV_STATE_B_CONN_PREP; 800a27e: 2301 movs r3, #1 800a280: e026 b.n 800a2d0 } else if (voltage_real >= (6000-1000) && voltage_real <= (6000+1000)) { 800a282: 687b ldr r3, [r7, #4] 800a284: f241 3287 movw r2, #4999 @ 0x1387 800a288: 4293 cmp r3, r2 800a28a: dd06 ble.n 800a29a 800a28c: 687b ldr r3, [r7, #4] 800a28e: f641 3258 movw r2, #7000 @ 0x1b58 800a292: 4293 cmp r3, r2 800a294: dc01 bgt.n 800a29a return EV_STATE_C_CONN_ACTIVE; 800a296: 2302 movs r3, #2 800a298: e01a b.n 800a2d0 } else if (voltage_real >= (3000-1000) && voltage_real <= (3000 + 1000)) { 800a29a: 687b ldr r3, [r7, #4] 800a29c: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800a2a0: db05 blt.n 800a2ae 800a2a2: 687b ldr r3, [r7, #4] 800a2a4: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800a2a8: dc01 bgt.n 800a2ae return EV_STATE_D_CONN_ACT_VENT; 800a2aa: 2303 movs r3, #3 800a2ac: e010 b.n 800a2d0 } else if (voltage_real >= (0-1000) && voltage_real <= (0+2000)){ 800a2ae: 687b ldr r3, [r7, #4] 800a2b0: f513 7f7a cmn.w r3, #1000 @ 0x3e8 800a2b4: db05 blt.n 800a2c2 800a2b6: 687b ldr r3, [r7, #4] 800a2b8: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800a2bc: dc01 bgt.n 800a2c2 return EV_STATE_E_NO_POWER; 800a2be: 2304 movs r3, #4 800a2c0: e006 b.n 800a2d0 } else if (voltage_real <= (-12000+1000)) { 800a2c2: 687b ldr r3, [r7, #4] 800a2c4: 4a05 ldr r2, [pc, #20] @ (800a2dc ) 800a2c6: 4293 cmp r3, r2 800a2c8: da01 bge.n 800a2ce return EV_STATE_F_ERROR; 800a2ca: 2305 movs r3, #5 800a2cc: e000 b.n 800a2d0 } else { return EV_STATE_ACQUIRING; 800a2ce: 2306 movs r3, #6 } } 800a2d0: 4618 mov r0, r3 800a2d2: 3708 adds r7, #8 800a2d4: 46bd mov sp, r7 800a2d6: bd80 pop {r7, pc} 800a2d8: 20000004 .word 0x20000004 800a2dc: ffffd509 .word 0xffffd509 0800a2e0 : CP_State_t CP_GetFilteredState(void) { 800a2e0: b480 push {r7} 800a2e2: af00 add r7, sp, #0 return cp_state_buffer; 800a2e4: 4b02 ldr r3, [pc, #8] @ (800a2f0 ) 800a2e6: 781b ldrb r3, [r3, #0] } 800a2e8: 4618 mov r0, r3 800a2ea: 46bd mov sp, r7 800a2ec: bc80 pop {r7} 800a2ee: 4770 bx lr 800a2f0: 20000005 .word 0x20000005 0800a2f4 : void CP_FilterState(void) { 800a2f4: b580 push {r7, lr} 800a2f6: b082 sub sp, #8 800a2f8: af00 add r7, sp, #0 static CP_State_t pending_state = EV_STATE_ACQUIRING; static uint8_t stable_count = 0u; CP_State_t current_state = CP_GetState(); 800a2fa: f7ff ffa3 bl 800a244 800a2fe: 4603 mov r3, r0 800a300: 71fb strb r3, [r7, #7] /* Keep last accepted state while CP is still acquiring. */ if (current_state == EV_STATE_ACQUIRING) { 800a302: 79fb ldrb r3, [r7, #7] 800a304: 2b06 cmp r3, #6 800a306: d106 bne.n 800a316 pending_state = EV_STATE_ACQUIRING; 800a308: 4b13 ldr r3, [pc, #76] @ (800a358 ) 800a30a: 2206 movs r2, #6 800a30c: 701a strb r2, [r3, #0] stable_count = 0u; 800a30e: 4b13 ldr r3, [pc, #76] @ (800a35c ) 800a310: 2200 movs r2, #0 800a312: 701a strb r2, [r3, #0] return; 800a314: e01d b.n 800a352 } if (current_state != pending_state) { 800a316: 4b10 ldr r3, [pc, #64] @ (800a358 ) 800a318: 781b ldrb r3, [r3, #0] 800a31a: 79fa ldrb r2, [r7, #7] 800a31c: 429a cmp r2, r3 800a31e: d006 beq.n 800a32e pending_state = current_state; 800a320: 4a0d ldr r2, [pc, #52] @ (800a358 ) 800a322: 79fb ldrb r3, [r7, #7] 800a324: 7013 strb r3, [r2, #0] stable_count = 1u; 800a326: 4b0d ldr r3, [pc, #52] @ (800a35c ) 800a328: 2201 movs r2, #1 800a32a: 701a strb r2, [r3, #0] return; 800a32c: e011 b.n 800a352 } if (stable_count < FILTER_ORDER) { 800a32e: 4b0b ldr r3, [pc, #44] @ (800a35c ) 800a330: 781b ldrb r3, [r3, #0] 800a332: 2b63 cmp r3, #99 @ 0x63 800a334: d805 bhi.n 800a342 stable_count++; 800a336: 4b09 ldr r3, [pc, #36] @ (800a35c ) 800a338: 781b ldrb r3, [r3, #0] 800a33a: 3301 adds r3, #1 800a33c: b2da uxtb r2, r3 800a33e: 4b07 ldr r3, [pc, #28] @ (800a35c ) 800a340: 701a strb r2, [r3, #0] } if (stable_count >= FILTER_ORDER) { 800a342: 4b06 ldr r3, [pc, #24] @ (800a35c ) 800a344: 781b ldrb r3, [r3, #0] 800a346: 2b63 cmp r3, #99 @ 0x63 800a348: d903 bls.n 800a352 cp_state_buffer = pending_state; 800a34a: 4b03 ldr r3, [pc, #12] @ (800a358 ) 800a34c: 781a ldrb r2, [r3, #0] 800a34e: 4b04 ldr r3, [pc, #16] @ (800a360 ) 800a350: 701a strb r2, [r3, #0] } } 800a352: 3708 adds r7, #8 800a354: 46bd mov sp, r7 800a356: bd80 pop {r7, pc} 800a358: 20000006 .word 0x20000006 800a35c: 200003e5 .word 0x200003e5 800a360: 20000005 .word 0x20000005 0800a364 : void CP_Loop(void) { 800a364: b580 push {r7, lr} 800a366: b082 sub sp, #8 800a368: af00 add r7, sp, #0 static uint32_t tick; if ((int32_t)(HAL_GetTick() - tick) < 1) return; 800a36a: f005 f969 bl 800f640 800a36e: 4602 mov r2, r0 800a370: 4b22 ldr r3, [pc, #136] @ (800a3fc ) 800a372: 681b ldr r3, [r3, #0] 800a374: 1ad3 subs r3, r2, r3 800a376: 2b00 cmp r3, #0 800a378: dd3c ble.n 800a3f4 tick = HAL_GetTick(); 800a37a: f005 f961 bl 800f640 800a37e: 4603 mov r3, r0 800a380: 4a1e ldr r2, [pc, #120] @ (800a3fc ) 800a382: 6013 str r3, [r2, #0] static uint8_t initialized = 0; static CP_State_t prev_state = EV_STATE_ACQUIRING; static uint8_t prev_duty = 0; CP_FilterState(); 800a384: f7ff ffb6 bl 800a2f4 CP_State_t current_state = CP_GetFilteredState(); 800a388: f7ff ffaa bl 800a2e0 800a38c: 4603 mov r3, r0 800a38e: 71fb strb r3, [r7, #7] uint8_t current_duty = cp_duty; 800a390: 4b1b ldr r3, [pc, #108] @ (800a400 ) 800a392: 781b ldrb r3, [r3, #0] 800a394: 71bb strb r3, [r7, #6] if (!initialized) { 800a396: 4b1b ldr r3, [pc, #108] @ (800a404 ) 800a398: 781b ldrb r3, [r3, #0] 800a39a: 2b00 cmp r3, #0 800a39c: d109 bne.n 800a3b2 prev_state = current_state; 800a39e: 4a1a ldr r2, [pc, #104] @ (800a408 ) 800a3a0: 79fb ldrb r3, [r7, #7] 800a3a2: 7013 strb r3, [r2, #0] prev_duty = current_duty; 800a3a4: 4a19 ldr r2, [pc, #100] @ (800a40c ) 800a3a6: 79bb ldrb r3, [r7, #6] 800a3a8: 7013 strb r3, [r2, #0] initialized = 1; 800a3aa: 4b16 ldr r3, [pc, #88] @ (800a404 ) 800a3ac: 2201 movs r2, #1 800a3ae: 701a strb r2, [r3, #0] return; 800a3b0: e021 b.n 800a3f6 } if (current_state != prev_state) { 800a3b2: 4b15 ldr r3, [pc, #84] @ (800a408 ) 800a3b4: 781b ldrb r3, [r3, #0] 800a3b6: 79fa ldrb r2, [r7, #7] 800a3b8: 429a cmp r2, r3 800a3ba: d00a beq.n 800a3d2 log_printf(LOG_INFO, "CP state changed: %d -> %d\n", prev_state, current_state); 800a3bc: 4b12 ldr r3, [pc, #72] @ (800a408 ) 800a3be: 781b ldrb r3, [r3, #0] 800a3c0: 461a mov r2, r3 800a3c2: 79fb ldrb r3, [r7, #7] 800a3c4: 4912 ldr r1, [pc, #72] @ (800a410 ) 800a3c6: 2007 movs r0, #7 800a3c8: f000 f93e bl 800a648 prev_state = current_state; 800a3cc: 4a0e ldr r2, [pc, #56] @ (800a408 ) 800a3ce: 79fb ldrb r3, [r7, #7] 800a3d0: 7013 strb r3, [r2, #0] } if (current_duty != prev_duty) { 800a3d2: 4b0e ldr r3, [pc, #56] @ (800a40c ) 800a3d4: 781b ldrb r3, [r3, #0] 800a3d6: 79ba ldrb r2, [r7, #6] 800a3d8: 429a cmp r2, r3 800a3da: d00c beq.n 800a3f6 log_printf(LOG_INFO, "CP duty changed: %u -> %u\n", prev_duty, current_duty); 800a3dc: 4b0b ldr r3, [pc, #44] @ (800a40c ) 800a3de: 781b ldrb r3, [r3, #0] 800a3e0: 461a mov r2, r3 800a3e2: 79bb ldrb r3, [r7, #6] 800a3e4: 490b ldr r1, [pc, #44] @ (800a414 ) 800a3e6: 2007 movs r0, #7 800a3e8: f000 f92e bl 800a648 prev_duty = current_duty; 800a3ec: 4a07 ldr r2, [pc, #28] @ (800a40c ) 800a3ee: 79bb ldrb r3, [r7, #6] 800a3f0: 7013 strb r3, [r2, #0] 800a3f2: e000 b.n 800a3f6 if ((int32_t)(HAL_GetTick() - tick) < 1) return; 800a3f4: bf00 nop } } 800a3f6: 3708 adds r7, #8 800a3f8: 46bd mov sp, r7 800a3fa: bd80 pop {r7, pc} 800a3fc: 200003e8 .word 0x200003e8 800a400: 200003e4 .word 0x200003e4 800a404: 200003ec .word 0x200003ec 800a408: 20000007 .word 0x20000007 800a40c: 200003ed .word 0x200003ed 800a410: 08018380 .word 0x08018380 800a414: 0801839c .word 0x0801839c 0800a418 : CRC_HandleTypeDef hcrc; /* CRC init function */ void MX_CRC_Init(void) { 800a418: b580 push {r7, lr} 800a41a: af00 add r7, sp, #0 /* USER CODE END CRC_Init 0 */ /* USER CODE BEGIN CRC_Init 1 */ /* USER CODE END CRC_Init 1 */ hcrc.Instance = CRC; 800a41c: 4b06 ldr r3, [pc, #24] @ (800a438 ) 800a41e: 4a07 ldr r2, [pc, #28] @ (800a43c ) 800a420: 601a str r2, [r3, #0] if (HAL_CRC_Init(&hcrc) != HAL_OK) 800a422: 4805 ldr r0, [pc, #20] @ (800a438 ) 800a424: f006 fe5d bl 80110e2 800a428: 4603 mov r3, r0 800a42a: 2b00 cmp r3, #0 800a42c: d001 beq.n 800a432 { Error_Handler(); 800a42e: f000 fcc1 bl 800adb4 } /* USER CODE BEGIN CRC_Init 2 */ /* USER CODE END CRC_Init 2 */ } 800a432: bf00 nop 800a434: bd80 pop {r7, pc} 800a436: bf00 nop 800a438: 200003f0 .word 0x200003f0 800a43c: 40023000 .word 0x40023000 0800a440 : void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle) { 800a440: b480 push {r7} 800a442: b085 sub sp, #20 800a444: af00 add r7, sp, #0 800a446: 6078 str r0, [r7, #4] if(crcHandle->Instance==CRC) 800a448: 687b ldr r3, [r7, #4] 800a44a: 681b ldr r3, [r3, #0] 800a44c: 4a09 ldr r2, [pc, #36] @ (800a474 ) 800a44e: 4293 cmp r3, r2 800a450: d10b bne.n 800a46a { /* USER CODE BEGIN CRC_MspInit 0 */ /* USER CODE END CRC_MspInit 0 */ /* CRC clock enable */ __HAL_RCC_CRC_CLK_ENABLE(); 800a452: 4b09 ldr r3, [pc, #36] @ (800a478 ) 800a454: 695b ldr r3, [r3, #20] 800a456: 4a08 ldr r2, [pc, #32] @ (800a478 ) 800a458: f043 0340 orr.w r3, r3, #64 @ 0x40 800a45c: 6153 str r3, [r2, #20] 800a45e: 4b06 ldr r3, [pc, #24] @ (800a478 ) 800a460: 695b ldr r3, [r3, #20] 800a462: f003 0340 and.w r3, r3, #64 @ 0x40 800a466: 60fb str r3, [r7, #12] 800a468: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN CRC_MspInit 1 */ /* USER CODE END CRC_MspInit 1 */ } } 800a46a: bf00 nop 800a46c: 3714 adds r7, #20 800a46e: 46bd mov sp, r7 800a470: bc80 pop {r7} 800a472: 4770 bx lr 800a474: 40023000 .word 0x40023000 800a478: 40021000 .word 0x40021000 0800a47c <_write>: #if defined(__GNUC__) int _write(int fd, char * ptr, int len) { 800a47c: b580 push {r7, lr} 800a47e: b084 sub sp, #16 800a480: af00 add r7, sp, #0 800a482: 60f8 str r0, [r7, #12] 800a484: 60b9 str r1, [r7, #8] 800a486: 607a str r2, [r7, #4] debug_buffer_add((const uint8_t*)ptr, len); 800a488: 687b ldr r3, [r7, #4] 800a48a: b29b uxth r3, r3 800a48c: 4619 mov r1, r3 800a48e: 68b8 ldr r0, [r7, #8] 800a490: f000 f806 bl 800a4a0 return len; 800a494: 687b ldr r3, [r7, #4] } 800a496: 4618 mov r0, r3 800a498: 3710 adds r7, #16 800a49a: 46bd mov sp, r7 800a49c: bd80 pop {r7, pc} ... 0800a4a0 : #endif // Добавляет данные в кольцевой буфер void debug_buffer_add(const uint8_t* data, uint16_t len) { 800a4a0: b480 push {r7} 800a4a2: b085 sub sp, #20 800a4a4: af00 add r7, sp, #0 800a4a6: 6078 str r0, [r7, #4] 800a4a8: 460b mov r3, r1 800a4aa: 807b strh r3, [r7, #2] \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800a4ac: b672 cpsid i } 800a4ae: bf00 nop __disable_irq(); for (uint16_t i = 0; i < len; i++) { 800a4b0: 2300 movs r3, #0 800a4b2: 81fb strh r3, [r7, #14] 800a4b4: e045 b.n 800a542 // Если буфер полон, перезаписываем старые данные if (debug_buffer.count >= DEBUG_BUFFER_SIZE) { 800a4b6: 4b28 ldr r3, [pc, #160] @ (800a558 ) 800a4b8: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800a4bc: b29b uxth r3, r3 800a4be: f5b3 6f80 cmp.w r3, #1024 @ 0x400 800a4c2: d318 bcc.n 800a4f6 debug_buffer.read_index = (debug_buffer.read_index + 1) % DEBUG_BUFFER_SIZE; 800a4c4: 4b24 ldr r3, [pc, #144] @ (800a558 ) 800a4c6: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800a4ca: b29b uxth r3, r3 800a4cc: 3301 adds r3, #1 800a4ce: 425a negs r2, r3 800a4d0: f3c3 0309 ubfx r3, r3, #0, #10 800a4d4: f3c2 0209 ubfx r2, r2, #0, #10 800a4d8: bf58 it pl 800a4da: 4253 negpl r3, r2 800a4dc: b29a uxth r2, r3 800a4de: 4b1e ldr r3, [pc, #120] @ (800a558 ) 800a4e0: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402 debug_buffer.count--; 800a4e4: 4b1c ldr r3, [pc, #112] @ (800a558 ) 800a4e6: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800a4ea: b29b uxth r3, r3 800a4ec: 3b01 subs r3, #1 800a4ee: b29a uxth r2, r3 800a4f0: 4b19 ldr r3, [pc, #100] @ (800a558 ) 800a4f2: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 } debug_buffer.buffer[debug_buffer.write_index] = data[i]; 800a4f6: 89fb ldrh r3, [r7, #14] 800a4f8: 687a ldr r2, [r7, #4] 800a4fa: 4413 add r3, r2 800a4fc: 4a16 ldr r2, [pc, #88] @ (800a558 ) 800a4fe: f8b2 2400 ldrh.w r2, [r2, #1024] @ 0x400 800a502: b292 uxth r2, r2 800a504: 7819 ldrb r1, [r3, #0] 800a506: 4b14 ldr r3, [pc, #80] @ (800a558 ) 800a508: 5499 strb r1, [r3, r2] debug_buffer.write_index = (debug_buffer.write_index + 1) % DEBUG_BUFFER_SIZE; 800a50a: 4b13 ldr r3, [pc, #76] @ (800a558 ) 800a50c: f8b3 3400 ldrh.w r3, [r3, #1024] @ 0x400 800a510: b29b uxth r3, r3 800a512: 3301 adds r3, #1 800a514: 425a negs r2, r3 800a516: f3c3 0309 ubfx r3, r3, #0, #10 800a51a: f3c2 0209 ubfx r2, r2, #0, #10 800a51e: bf58 it pl 800a520: 4253 negpl r3, r2 800a522: b29a uxth r2, r3 800a524: 4b0c ldr r3, [pc, #48] @ (800a558 ) 800a526: f8a3 2400 strh.w r2, [r3, #1024] @ 0x400 debug_buffer.count++; 800a52a: 4b0b ldr r3, [pc, #44] @ (800a558 ) 800a52c: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800a530: b29b uxth r3, r3 800a532: 3301 adds r3, #1 800a534: b29a uxth r2, r3 800a536: 4b08 ldr r3, [pc, #32] @ (800a558 ) 800a538: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 for (uint16_t i = 0; i < len; i++) { 800a53c: 89fb ldrh r3, [r7, #14] 800a53e: 3301 adds r3, #1 800a540: 81fb strh r3, [r7, #14] 800a542: 89fa ldrh r2, [r7, #14] 800a544: 887b ldrh r3, [r7, #2] 800a546: 429a cmp r2, r3 800a548: d3b5 bcc.n 800a4b6 __ASM volatile ("cpsie i" : : : "memory"); 800a54a: b662 cpsie i } 800a54c: bf00 nop } __enable_irq(); } 800a54e: bf00 nop 800a550: 3714 adds r7, #20 800a552: 46bd mov sp, r7 800a554: bc80 pop {r7} 800a556: 4770 bx lr 800a558: 200003f8 .word 0x200003f8 0800a55c : // Возвращает количество доступных данных в буфере uint16_t debug_buffer_available(void) { 800a55c: b480 push {r7} 800a55e: b083 sub sp, #12 800a560: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800a562: b672 cpsid i } 800a564: bf00 nop __disable_irq(); uint16_t count = debug_buffer.count; 800a566: 4b06 ldr r3, [pc, #24] @ (800a580 ) 800a568: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800a56c: 80fb strh r3, [r7, #6] __ASM volatile ("cpsie i" : : : "memory"); 800a56e: b662 cpsie i } 800a570: bf00 nop __enable_irq(); return count; 800a572: 88fb ldrh r3, [r7, #6] } 800a574: 4618 mov r0, r3 800a576: 370c adds r7, #12 800a578: 46bd mov sp, r7 800a57a: bc80 pop {r7} 800a57c: 4770 bx lr 800a57e: bf00 nop 800a580: 200003f8 .word 0x200003f8 0800a584 : // Отправляет один пакет данных из буфера через SC_SendPacket (не более 250 байт) void debug_buffer_send(void) { 800a584: b580 push {r7, lr} 800a586: b082 sub sp, #8 800a588: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800a58a: b672 cpsid i } 800a58c: bf00 nop __disable_irq(); // Если буфер пуст, ничего не делаем if (debug_buffer.count == 0) { 800a58e: 4b2d ldr r3, [pc, #180] @ (800a644 ) 800a590: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800a594: b29b uxth r3, r3 800a596: 2b00 cmp r3, #0 800a598: d102 bne.n 800a5a0 __ASM volatile ("cpsie i" : : : "memory"); 800a59a: b662 cpsie i } 800a59c: bf00 nop __enable_irq(); return; 800a59e: e04e b.n 800a63e } // Определяем сколько байт можно отправить (не более 250) uint16_t bytes_to_send = debug_buffer.count; 800a5a0: 4b28 ldr r3, [pc, #160] @ (800a644 ) 800a5a2: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800a5a6: 80fb strh r3, [r7, #6] if (bytes_to_send > DEBUG_BUFFER_MAX_COUNT) { 800a5a8: 88fb ldrh r3, [r7, #6] 800a5aa: 2b80 cmp r3, #128 @ 0x80 800a5ac: d901 bls.n 800a5b2 bytes_to_send = DEBUG_BUFFER_MAX_COUNT; 800a5ae: 2380 movs r3, #128 @ 0x80 800a5b0: 80fb strh r3, [r7, #6] } // Вычисляем сколько байт до конца буфера uint16_t bytes_to_end = DEBUG_BUFFER_SIZE - debug_buffer.read_index; 800a5b2: 4b24 ldr r3, [pc, #144] @ (800a644 ) 800a5b4: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800a5b8: b29b uxth r3, r3 800a5ba: f5c3 6380 rsb r3, r3, #1024 @ 0x400 800a5be: 80bb strh r3, [r7, #4] // Отправляем только непрерывный блок (до конца буфера или до bytes_to_send) if (bytes_to_send > bytes_to_end) { 800a5c0: 88fa ldrh r2, [r7, #6] 800a5c2: 88bb ldrh r3, [r7, #4] 800a5c4: 429a cmp r2, r3 800a5c6: d901 bls.n 800a5cc bytes_to_send = bytes_to_end; 800a5c8: 88bb ldrh r3, [r7, #4] 800a5ca: 80fb strh r3, [r7, #6] } // Отправляем данные напрямую из буфера if(bytes_to_send == debug_buffer.count){ 800a5cc: 4b1d ldr r3, [pc, #116] @ (800a644 ) 800a5ce: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800a5d2: b29b uxth r3, r3 800a5d4: 88fa ldrh r2, [r7, #6] 800a5d6: 429a cmp r2, r3 800a5d8: d10c bne.n 800a5f4 SC_SendPacket(&debug_buffer.buffer[debug_buffer.read_index], bytes_to_send, CMD_GET_LOG); 800a5da: 4b1a ldr r3, [pc, #104] @ (800a644 ) 800a5dc: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800a5e0: b29b uxth r3, r3 800a5e2: 461a mov r2, r3 800a5e4: 4b17 ldr r3, [pc, #92] @ (800a644 ) 800a5e6: 4413 add r3, r2 800a5e8: 88f9 ldrh r1, [r7, #6] 800a5ea: 2250 movs r2, #80 @ 0x50 800a5ec: 4618 mov r0, r3 800a5ee: f003 fd3f bl 800e070 800a5f2: e00b b.n 800a60c }else{ SC_SendPacket(&debug_buffer.buffer[debug_buffer.read_index], bytes_to_send, CMD_GET_LOG_CONTINUE); 800a5f4: 4b13 ldr r3, [pc, #76] @ (800a644 ) 800a5f6: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800a5fa: b29b uxth r3, r3 800a5fc: 461a mov r2, r3 800a5fe: 4b11 ldr r3, [pc, #68] @ (800a644 ) 800a600: 4413 add r3, r2 800a602: 88f9 ldrh r1, [r7, #6] 800a604: 2251 movs r2, #81 @ 0x51 800a606: 4618 mov r0, r3 800a608: f003 fd32 bl 800e070 } debug_buffer.read_index = (debug_buffer.read_index + bytes_to_send) % DEBUG_BUFFER_SIZE; 800a60c: 4b0d ldr r3, [pc, #52] @ (800a644 ) 800a60e: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800a612: b29a uxth r2, r3 800a614: 88fb ldrh r3, [r7, #6] 800a616: 4413 add r3, r2 800a618: b29b uxth r3, r3 800a61a: f3c3 0309 ubfx r3, r3, #0, #10 800a61e: b29a uxth r2, r3 800a620: 4b08 ldr r3, [pc, #32] @ (800a644 ) 800a622: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402 debug_buffer.count -= bytes_to_send; 800a626: 4b07 ldr r3, [pc, #28] @ (800a644 ) 800a628: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800a62c: b29a uxth r2, r3 800a62e: 88fb ldrh r3, [r7, #6] 800a630: 1ad3 subs r3, r2, r3 800a632: b29a uxth r2, r3 800a634: 4b03 ldr r3, [pc, #12] @ (800a644 ) 800a636: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 __ASM volatile ("cpsie i" : : : "memory"); 800a63a: b662 cpsie i } 800a63c: bf00 nop __enable_irq(); } 800a63e: 3708 adds r7, #8 800a640: 46bd mov sp, r7 800a642: bd80 pop {r7, pc} 800a644: 200003f8 .word 0x200003f8 0800a648 : #define LOG_BUFFER_SIZE 128 uint8_t log_buffer[LOG_BUFFER_SIZE]; // Кастомный printf с приоритетом лога int log_printf(LogLevel_t level, const char *format, ...) { 800a648: b40e push {r1, r2, r3} 800a64a: b580 push {r7, lr} 800a64c: b085 sub sp, #20 800a64e: af00 add r7, sp, #0 800a650: 4603 mov r3, r0 800a652: 71fb strb r3, [r7, #7] va_list args; int result; // Добавляем приоритет первым байтом log_buffer[0] = (uint8_t)level; 800a654: 4a15 ldr r2, [pc, #84] @ (800a6ac ) 800a656: 79fb ldrb r3, [r7, #7] 800a658: 7013 strb r3, [r2, #0] // Форматируем строку начиная со второго байта va_start(args, format); 800a65a: f107 0320 add.w r3, r7, #32 800a65e: 60bb str r3, [r7, #8] result = vsnprintf((char*)&log_buffer[1], LOG_BUFFER_SIZE - 2, format, args); 800a660: 68bb ldr r3, [r7, #8] 800a662: 69fa ldr r2, [r7, #28] 800a664: 217e movs r1, #126 @ 0x7e 800a666: 4812 ldr r0, [pc, #72] @ (800a6b0 ) 800a668: f00b fcda bl 8016020 800a66c: 60f8 str r0, [r7, #12] va_end(args); // Проверяем, не переполнился ли буфер if (result < 0) { 800a66e: 68fb ldr r3, [r7, #12] 800a670: 2b00 cmp r3, #0 800a672: da01 bge.n 800a678 return result; 800a674: 68fb ldr r3, [r7, #12] 800a676: e012 b.n 800a69e } // Ограничиваем размер, чтобы оставить место для нуль-терминатора if (result >= (LOG_BUFFER_SIZE - 2)) { 800a678: 68fb ldr r3, [r7, #12] 800a67a: 2b7d cmp r3, #125 @ 0x7d 800a67c: dd01 ble.n 800a682 result = LOG_BUFFER_SIZE - 2; 800a67e: 237e movs r3, #126 @ 0x7e 800a680: 60fb str r3, [r7, #12] } // Добавляем нуль-терминатор в конец log_buffer[result + 1] = '\0'; 800a682: 68fb ldr r3, [r7, #12] 800a684: 3301 adds r3, #1 800a686: 4a09 ldr r2, [pc, #36] @ (800a6ac ) 800a688: 2100 movs r1, #0 800a68a: 54d1 strb r1, [r2, r3] // Отправляем в буфер (приоритет + строка + нуль-терминатор) debug_buffer_add(log_buffer, result + 2); 800a68c: 68fb ldr r3, [r7, #12] 800a68e: b29b uxth r3, r3 800a690: 3302 adds r3, #2 800a692: b29b uxth r3, r3 800a694: 4619 mov r1, r3 800a696: 4805 ldr r0, [pc, #20] @ (800a6ac ) 800a698: f7ff ff02 bl 800a4a0 return result; 800a69c: 68fb ldr r3, [r7, #12] } 800a69e: 4618 mov r0, r3 800a6a0: 3714 adds r7, #20 800a6a2: 46bd mov sp, r7 800a6a4: e8bd 4080 ldmia.w sp!, {r7, lr} 800a6a8: b003 add sp, #12 800a6aa: 4770 bx lr 800a6ac: 20000800 .word 0x20000800 800a6b0: 20000801 .word 0x20000801 0800a6b4 : /** * Enable DMA controller clock */ void MX_DMA_Init(void) { 800a6b4: b580 push {r7, lr} 800a6b6: b082 sub sp, #8 800a6b8: af00 add r7, sp, #0 /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); 800a6ba: 4b1c ldr r3, [pc, #112] @ (800a72c ) 800a6bc: 695b ldr r3, [r3, #20] 800a6be: 4a1b ldr r2, [pc, #108] @ (800a72c ) 800a6c0: f043 0301 orr.w r3, r3, #1 800a6c4: 6153 str r3, [r2, #20] 800a6c6: 4b19 ldr r3, [pc, #100] @ (800a72c ) 800a6c8: 695b ldr r3, [r3, #20] 800a6ca: f003 0301 and.w r3, r3, #1 800a6ce: 607b str r3, [r7, #4] 800a6d0: 687b ldr r3, [r7, #4] /* DMA interrupt init */ /* DMA1_Channel1_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 1, 0); 800a6d2: 2200 movs r2, #0 800a6d4: 2101 movs r1, #1 800a6d6: 200b movs r0, #11 800a6d8: f006 fccd bl 8011076 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 800a6dc: 200b movs r0, #11 800a6de: f006 fce6 bl 80110ae /* DMA1_Channel2_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 4, 0); 800a6e2: 2200 movs r2, #0 800a6e4: 2104 movs r1, #4 800a6e6: 200c movs r0, #12 800a6e8: f006 fcc5 bl 8011076 HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn); 800a6ec: 200c movs r0, #12 800a6ee: f006 fcde bl 80110ae /* DMA1_Channel3_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 1, 0); 800a6f2: 2200 movs r2, #0 800a6f4: 2101 movs r1, #1 800a6f6: 200d movs r0, #13 800a6f8: f006 fcbd bl 8011076 HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn); 800a6fc: 200d movs r0, #13 800a6fe: f006 fcd6 bl 80110ae /* DMA1_Channel6_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 1, 0); 800a702: 2200 movs r2, #0 800a704: 2101 movs r1, #1 800a706: 2010 movs r0, #16 800a708: f006 fcb5 bl 8011076 HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn); 800a70c: 2010 movs r0, #16 800a70e: f006 fcce bl 80110ae /* DMA1_Channel7_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 4, 0); 800a712: 2200 movs r2, #0 800a714: 2104 movs r1, #4 800a716: 2011 movs r0, #17 800a718: f006 fcad bl 8011076 HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn); 800a71c: 2011 movs r0, #17 800a71e: f006 fcc6 bl 80110ae } 800a722: bf00 nop 800a724: 3708 adds r7, #8 800a726: 46bd mov sp, r7 800a728: bd80 pop {r7, pc} 800a72a: bf00 nop 800a72c: 40021000 .word 0x40021000 0800a730 : #include "debug.h" #include "serial.h" static uint8_t fire_alarm_latched = 0; uint8_t FireAlarm_IsLatched(void) { 800a730: b480 push {r7} 800a732: af00 add r7, sp, #0 return fire_alarm_latched; 800a734: 4b02 ldr r3, [pc, #8] @ (800a740 ) 800a736: 781b ldrb r3, [r3, #0] } 800a738: 4618 mov r0, r3 800a73a: 46bd mov sp, r7 800a73c: bc80 pop {r7} 800a73e: 4770 bx lr 800a740: 20000880 .word 0x20000880 0800a744 : void FireAlarm_Activate(void) { 800a744: b580 push {r7, lr} 800a746: af00 add r7, sp, #0 if (fire_alarm_latched) { 800a748: 4b06 ldr r3, [pc, #24] @ (800a764 ) 800a74a: 781b ldrb r3, [r3, #0] 800a74c: 2b00 cmp r3, #0 800a74e: d107 bne.n 800a760 return; } fire_alarm_latched = 1; 800a750: 4b04 ldr r3, [pc, #16] @ (800a764 ) 800a752: 2201 movs r2, #1 800a754: 701a strb r2, [r3, #0] log_printf(LOG_ERR, "FIRE ALARM activated\n"); 800a756: 4904 ldr r1, [pc, #16] @ (800a768 ) 800a758: 2004 movs r0, #4 800a75a: f7ff ff75 bl 800a648 800a75e: e000 b.n 800a762 return; 800a760: bf00 nop } 800a762: bd80 pop {r7, pc} 800a764: 20000880 .word 0x20000880 800a768: 080183b8 .word 0x080183b8 0800a76c : * EXTI PB8 ------> I2C1_SCL PB9 ------> I2C1_SDA */ void MX_GPIO_Init(void) { 800a76c: b580 push {r7, lr} 800a76e: b08a sub sp, #40 @ 0x28 800a770: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800a772: f107 0314 add.w r3, r7, #20 800a776: 2200 movs r2, #0 800a778: 601a str r2, [r3, #0] 800a77a: 605a str r2, [r3, #4] 800a77c: 609a str r2, [r3, #8] 800a77e: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 800a780: 4b94 ldr r3, [pc, #592] @ (800a9d4 ) 800a782: 699b ldr r3, [r3, #24] 800a784: 4a93 ldr r2, [pc, #588] @ (800a9d4 ) 800a786: f043 0310 orr.w r3, r3, #16 800a78a: 6193 str r3, [r2, #24] 800a78c: 4b91 ldr r3, [pc, #580] @ (800a9d4 ) 800a78e: 699b ldr r3, [r3, #24] 800a790: f003 0310 and.w r3, r3, #16 800a794: 613b str r3, [r7, #16] 800a796: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 800a798: 4b8e ldr r3, [pc, #568] @ (800a9d4 ) 800a79a: 699b ldr r3, [r3, #24] 800a79c: 4a8d ldr r2, [pc, #564] @ (800a9d4 ) 800a79e: f043 0304 orr.w r3, r3, #4 800a7a2: 6193 str r3, [r2, #24] 800a7a4: 4b8b ldr r3, [pc, #556] @ (800a9d4 ) 800a7a6: 699b ldr r3, [r3, #24] 800a7a8: f003 0304 and.w r3, r3, #4 800a7ac: 60fb str r3, [r7, #12] 800a7ae: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOB_CLK_ENABLE(); 800a7b0: 4b88 ldr r3, [pc, #544] @ (800a9d4 ) 800a7b2: 699b ldr r3, [r3, #24] 800a7b4: 4a87 ldr r2, [pc, #540] @ (800a9d4 ) 800a7b6: f043 0308 orr.w r3, r3, #8 800a7ba: 6193 str r3, [r2, #24] 800a7bc: 4b85 ldr r3, [pc, #532] @ (800a9d4 ) 800a7be: 699b ldr r3, [r3, #24] 800a7c0: f003 0308 and.w r3, r3, #8 800a7c4: 60bb str r3, [r7, #8] 800a7c6: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOE_CLK_ENABLE(); 800a7c8: 4b82 ldr r3, [pc, #520] @ (800a9d4 ) 800a7ca: 699b ldr r3, [r3, #24] 800a7cc: 4a81 ldr r2, [pc, #516] @ (800a9d4 ) 800a7ce: f043 0340 orr.w r3, r3, #64 @ 0x40 800a7d2: 6193 str r3, [r2, #24] 800a7d4: 4b7f ldr r3, [pc, #508] @ (800a9d4 ) 800a7d6: 699b ldr r3, [r3, #24] 800a7d8: f003 0340 and.w r3, r3, #64 @ 0x40 800a7dc: 607b str r3, [r7, #4] 800a7de: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 800a7e0: 4b7c ldr r3, [pc, #496] @ (800a9d4 ) 800a7e2: 699b ldr r3, [r3, #24] 800a7e4: 4a7b ldr r2, [pc, #492] @ (800a9d4 ) 800a7e6: f043 0320 orr.w r3, r3, #32 800a7ea: 6193 str r3, [r2, #24] 800a7ec: 4b79 ldr r3, [pc, #484] @ (800a9d4 ) 800a7ee: 699b ldr r3, [r3, #24] 800a7f0: f003 0320 and.w r3, r3, #32 800a7f4: 603b str r3, [r7, #0] 800a7f6: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, DBG1_Pin|RELAY_CP_Pin|LOCK_A_Pin|LOCK_B_Pin 800a7f8: 2200 movs r2, #0 800a7fa: f44f 710f mov.w r1, #572 @ 0x23c 800a7fe: 4876 ldr r0, [pc, #472] @ (800a9d8 ) 800a800: f007 fab5 bl 8011d6e |LED_DATA_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, DBG2_Pin|DBG3_Pin|RELAY_CC_Pin, GPIO_PIN_RESET); 800a804: 2200 movs r2, #0 800a806: f248 0160 movw r1, #32864 @ 0x8060 800a80a: 4874 ldr r0, [pc, #464] @ (800a9dc ) 800a80c: f007 faaf bl 8011d6e /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, RELAY1_Pin|RELAY2_Pin|RELAY3_Pin|RELAY4_Pin 800a810: 2200 movs r2, #0 800a812: f44f 51f8 mov.w r1, #7936 @ 0x1f00 800a816: 4872 ldr r0, [pc, #456] @ (800a9e0 ) 800a818: f007 faa9 bl 8011d6e |RELAY5_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, DBG5_Pin|DBG4_Pin|EE_WP_Pin, GPIO_PIN_RESET); 800a81c: 2200 movs r2, #0 800a81e: f44f 6148 mov.w r1, #3200 @ 0xc80 800a822: 4870 ldr r0, [pc, #448] @ (800a9e4 ) 800a824: f007 faa3 bl 8011d6e /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, RELAY_DC_Pin|USART2_DIR_Pin, GPIO_PIN_RESET); 800a828: 2200 movs r2, #0 800a82a: 2118 movs r1, #24 800a82c: 486e ldr r0, [pc, #440] @ (800a9e8 ) 800a82e: f007 fa9e bl 8011d6e /*Configure GPIO pins : DBG1_Pin LED_DATA_Pin */ GPIO_InitStruct.Pin = DBG1_Pin|LED_DATA_Pin; 800a832: f44f 7301 mov.w r3, #516 @ 0x204 800a836: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800a838: 2301 movs r3, #1 800a83a: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a83c: 2300 movs r3, #0 800a83e: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800a840: 2303 movs r3, #3 800a842: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800a844: f107 0314 add.w r3, r7, #20 800a848: 4619 mov r1, r3 800a84a: 4863 ldr r0, [pc, #396] @ (800a9d8 ) 800a84c: f007 f8f4 bl 8011a38 /*Configure GPIO pins : RELAY_CP_Pin LOCK_A_Pin LOCK_B_Pin */ GPIO_InitStruct.Pin = RELAY_CP_Pin|LOCK_A_Pin|LOCK_B_Pin; 800a850: 2338 movs r3, #56 @ 0x38 800a852: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800a854: 2301 movs r3, #1 800a856: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a858: 2300 movs r3, #0 800a85a: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800a85c: 2302 movs r3, #2 800a85e: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800a860: f107 0314 add.w r3, r7, #20 800a864: 4619 mov r1, r3 800a866: 485c ldr r0, [pc, #368] @ (800a9d8 ) 800a868: f007 f8e6 bl 8011a38 /*Configure GPIO pin : IN_SW0_Pin */ GPIO_InitStruct.Pin = IN_SW0_Pin; 800a86c: 2302 movs r3, #2 800a86e: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800a870: 2300 movs r3, #0 800a872: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a874: 2300 movs r3, #0 800a876: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_SW0_GPIO_Port, &GPIO_InitStruct); 800a878: f107 0314 add.w r3, r7, #20 800a87c: 4619 mov r1, r3 800a87e: 4857 ldr r0, [pc, #348] @ (800a9dc ) 800a880: f007 f8da bl 8011a38 /*Configure GPIO pin : IN_SW1_Pin */ GPIO_InitStruct.Pin = IN_SW1_Pin; 800a884: 2304 movs r3, #4 800a886: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800a888: 2300 movs r3, #0 800a88a: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 800a88c: 2302 movs r3, #2 800a88e: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_SW1_GPIO_Port, &GPIO_InitStruct); 800a890: f107 0314 add.w r3, r7, #20 800a894: 4619 mov r1, r3 800a896: 4851 ldr r0, [pc, #324] @ (800a9dc ) 800a898: f007 f8ce bl 8011a38 /*Configure GPIO pins : DBG2_Pin DBG3_Pin */ GPIO_InitStruct.Pin = DBG2_Pin|DBG3_Pin; 800a89c: 2360 movs r3, #96 @ 0x60 800a89e: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800a8a0: 2301 movs r3, #1 800a8a2: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a8a4: 2300 movs r3, #0 800a8a6: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800a8a8: 2303 movs r3, #3 800a8aa: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800a8ac: f107 0314 add.w r3, r7, #20 800a8b0: 4619 mov r1, r3 800a8b2: 484a ldr r0, [pc, #296] @ (800a9dc ) 800a8b4: f007 f8c0 bl 8011a38 /*Configure GPIO pins : IN0_Pin AC_OK_Pin ISO_IN_Pin */ GPIO_InitStruct.Pin = IN0_Pin|AC_OK_Pin|ISO_IN_Pin; 800a8b8: f244 0382 movw r3, #16514 @ 0x4082 800a8bc: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800a8be: 2300 movs r3, #0 800a8c0: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a8c2: 2300 movs r3, #0 800a8c4: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800a8c6: f107 0314 add.w r3, r7, #20 800a8ca: 4619 mov r1, r3 800a8cc: 4844 ldr r0, [pc, #272] @ (800a9e0 ) 800a8ce: f007 f8b3 bl 8011a38 /*Configure GPIO pins : RELAY1_Pin RELAY2_Pin RELAY3_Pin RELAY4_Pin RELAY5_Pin */ GPIO_InitStruct.Pin = RELAY1_Pin|RELAY2_Pin|RELAY3_Pin|RELAY4_Pin 800a8d2: f44f 53f8 mov.w r3, #7936 @ 0x1f00 800a8d6: 617b str r3, [r7, #20] |RELAY5_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800a8d8: 2301 movs r3, #1 800a8da: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a8dc: 2300 movs r3, #0 800a8de: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800a8e0: 2302 movs r3, #2 800a8e2: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800a8e4: f107 0314 add.w r3, r7, #20 800a8e8: 4619 mov r1, r3 800a8ea: 483d ldr r0, [pc, #244] @ (800a9e0 ) 800a8ec: f007 f8a4 bl 8011a38 /*Configure GPIO pins : DBG5_Pin DBG4_Pin */ GPIO_InitStruct.Pin = DBG5_Pin|DBG4_Pin; 800a8f0: f44f 6340 mov.w r3, #3072 @ 0xc00 800a8f4: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800a8f6: 2301 movs r3, #1 800a8f8: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a8fa: 2300 movs r3, #0 800a8fc: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800a8fe: 2303 movs r3, #3 800a900: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800a902: f107 0314 add.w r3, r7, #20 800a906: 4619 mov r1, r3 800a908: 4836 ldr r0, [pc, #216] @ (800a9e4 ) 800a90a: f007 f895 bl 8011a38 /*Configure GPIO pin : RELAY_CC_Pin */ GPIO_InitStruct.Pin = RELAY_CC_Pin; 800a90e: f44f 4300 mov.w r3, #32768 @ 0x8000 800a912: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800a914: 2301 movs r3, #1 800a916: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a918: 2300 movs r3, #0 800a91a: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800a91c: 2302 movs r3, #2 800a91e: 623b str r3, [r7, #32] HAL_GPIO_Init(RELAY_CC_GPIO_Port, &GPIO_InitStruct); 800a920: f107 0314 add.w r3, r7, #20 800a924: 4619 mov r1, r3 800a926: 482d ldr r0, [pc, #180] @ (800a9dc ) 800a928: f007 f886 bl 8011a38 /*Configure GPIO pins : RELAY_DC_Pin USART2_DIR_Pin */ GPIO_InitStruct.Pin = RELAY_DC_Pin|USART2_DIR_Pin; 800a92c: 2318 movs r3, #24 800a92e: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800a930: 2301 movs r3, #1 800a932: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a934: 2300 movs r3, #0 800a936: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800a938: 2302 movs r3, #2 800a93a: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800a93c: f107 0314 add.w r3, r7, #20 800a940: 4619 mov r1, r3 800a942: 4829 ldr r0, [pc, #164] @ (800a9e8 ) 800a944: f007 f878 bl 8011a38 /*Configure GPIO pin : IN_ESTOP_Pin */ GPIO_InitStruct.Pin = IN_ESTOP_Pin; 800a948: 2380 movs r3, #128 @ 0x80 800a94a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800a94c: 2300 movs r3, #0 800a94e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a950: 2300 movs r3, #0 800a952: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_ESTOP_GPIO_Port, &GPIO_InitStruct); 800a954: f107 0314 add.w r3, r7, #20 800a958: 4619 mov r1, r3 800a95a: 4823 ldr r0, [pc, #140] @ (800a9e8 ) 800a95c: f007 f86c bl 8011a38 /*Configure GPIO pins : IN_FB2_Pin IN_FB1_Pin */ GPIO_InitStruct.Pin = IN_FB2_Pin|IN_FB1_Pin; 800a960: 2318 movs r3, #24 800a962: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800a964: 2300 movs r3, #0 800a966: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a968: 2300 movs r3, #0 800a96a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800a96c: f107 0314 add.w r3, r7, #20 800a970: 4619 mov r1, r3 800a972: 481c ldr r0, [pc, #112] @ (800a9e4 ) 800a974: f007 f860 bl 8011a38 /*Configure GPIO pin : EE_WP_Pin */ GPIO_InitStruct.Pin = EE_WP_Pin; 800a978: 2380 movs r3, #128 @ 0x80 800a97a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800a97c: 2301 movs r3, #1 800a97e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800a980: 2300 movs r3, #0 800a982: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800a984: 2302 movs r3, #2 800a986: 623b str r3, [r7, #32] HAL_GPIO_Init(EE_WP_GPIO_Port, &GPIO_InitStruct); 800a988: f107 0314 add.w r3, r7, #20 800a98c: 4619 mov r1, r3 800a98e: 4815 ldr r0, [pc, #84] @ (800a9e4 ) 800a990: f007 f852 bl 8011a38 /*Configure GPIO pins : PB8 PB9 */ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; 800a994: f44f 7340 mov.w r3, #768 @ 0x300 800a998: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 800a99a: 2312 movs r3, #18 800a99c: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800a99e: 2303 movs r3, #3 800a9a0: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800a9a2: f107 0314 add.w r3, r7, #20 800a9a6: 4619 mov r1, r3 800a9a8: 480e ldr r0, [pc, #56] @ (800a9e4 ) 800a9aa: f007 f845 bl 8011a38 /*Configure peripheral I/O remapping */ __HAL_AFIO_REMAP_I2C1_ENABLE(); 800a9ae: 4b0f ldr r3, [pc, #60] @ (800a9ec ) 800a9b0: 685b ldr r3, [r3, #4] 800a9b2: 627b str r3, [r7, #36] @ 0x24 800a9b4: 6a7b ldr r3, [r7, #36] @ 0x24 800a9b6: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800a9ba: 627b str r3, [r7, #36] @ 0x24 800a9bc: 6a7b ldr r3, [r7, #36] @ 0x24 800a9be: f043 0302 orr.w r3, r3, #2 800a9c2: 627b str r3, [r7, #36] @ 0x24 800a9c4: 4a09 ldr r2, [pc, #36] @ (800a9ec ) 800a9c6: 6a7b ldr r3, [r7, #36] @ 0x24 800a9c8: 6053 str r3, [r2, #4] } 800a9ca: bf00 nop 800a9cc: 3728 adds r7, #40 @ 0x28 800a9ce: 46bd mov sp, r7 800a9d0: bd80 pop {r7, pc} 800a9d2: bf00 nop 800a9d4: 40021000 .word 0x40021000 800a9d8: 40011000 .word 0x40011000 800a9dc: 40010800 .word 0x40010800 800a9e0: 40011800 .word 0x40011800 800a9e4: 40010c00 .word 0x40010c00 800a9e8: 40011400 .word 0x40011400 800a9ec: 40010000 .word 0x40010000 0800a9f0 <__NVIC_SystemReset>: /** \brief System Reset \details Initiates a system reset request to reset the MCU. */ __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) { 800a9f0: b480 push {r7} 800a9f2: af00 add r7, sp, #0 \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __STATIC_FORCEINLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 800a9f4: f3bf 8f4f dsb sy } 800a9f8: bf00 nop __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 800a9fa: 4b06 ldr r3, [pc, #24] @ (800aa14 <__NVIC_SystemReset+0x24>) 800a9fc: 68db ldr r3, [r3, #12] 800a9fe: f403 62e0 and.w r2, r3, #1792 @ 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800aa02: 4904 ldr r1, [pc, #16] @ (800aa14 <__NVIC_SystemReset+0x24>) 800aa04: 4b04 ldr r3, [pc, #16] @ (800aa18 <__NVIC_SystemReset+0x28>) 800aa06: 4313 orrs r3, r2 800aa08: 60cb str r3, [r1, #12] __ASM volatile ("dsb 0xF":::"memory"); 800aa0a: f3bf 8f4f dsb sy } 800aa0e: bf00 nop SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ __DSB(); /* Ensure completion of memory access */ for(;;) /* wait until reset */ { __NOP(); 800aa10: bf00 nop 800aa12: e7fd b.n 800aa10 <__NVIC_SystemReset+0x20> 800aa14: e000ed00 .word 0xe000ed00 800aa18: 05fa0004 .word 0x05fa0004 0800aa1c : * bootloader before starting this program. Unfortunately, function * SystemInit() overwrites this change again. * @return none. */ static void VectorBase_Config(void) { 800aa1c: b480 push {r7} 800aa1e: af00 add r7, sp, #0 * c-startup code. */ extern const unsigned long g_pfnVectors[]; /* Remap the vector table to where the vector table is located for this program. */ SCB->VTOR = (unsigned long)&g_pfnVectors[0]; 800aa20: 4b03 ldr r3, [pc, #12] @ (800aa30 ) 800aa22: 4a04 ldr r2, [pc, #16] @ (800aa34 ) 800aa24: 609a str r2, [r3, #8] } 800aa26: bf00 nop 800aa28: 46bd mov sp, r7 800aa2a: bc80 pop {r7} 800aa2c: 4770 bx lr 800aa2e: bf00 nop 800aa30: e000ed00 .word 0xe000ed00 800aa34: 08008000 .word 0x08008000 0800aa38 : uint8_t ED_TraceWarning(uint8_t flag, uint8_t id){ 800aa38: b480 push {r7} 800aa3a: b085 sub sp, #20 800aa3c: af00 add r7, sp, #0 800aa3e: 4603 mov r3, r0 800aa40: 460a mov r2, r1 800aa42: 71fb strb r3, [r7, #7] 800aa44: 4613 mov r3, r2 800aa46: 71bb strb r3, [r7, #6] static uint8_t memory[32]; if(id > 31) return 0; 800aa48: 79bb ldrb r3, [r7, #6] 800aa4a: 2b1f cmp r3, #31 800aa4c: d901 bls.n 800aa52 800aa4e: 2300 movs r3, #0 800aa50: e00e b.n 800aa70 uint8_t result = 0; 800aa52: 2300 movs r3, #0 800aa54: 73fb strb r3, [r7, #15] if(memory[id] != flag){ 800aa56: 79bb ldrb r3, [r7, #6] 800aa58: 4a08 ldr r2, [pc, #32] @ (800aa7c ) 800aa5a: 5cd3 ldrb r3, [r2, r3] 800aa5c: 79fa ldrb r2, [r7, #7] 800aa5e: 429a cmp r2, r3 800aa60: d001 beq.n 800aa66 result = 1; 800aa62: 2301 movs r3, #1 800aa64: 73fb strb r3, [r7, #15] } memory[id] = flag; 800aa66: 79bb ldrb r3, [r7, #6] 800aa68: 4904 ldr r1, [pc, #16] @ (800aa7c ) 800aa6a: 79fa ldrb r2, [r7, #7] 800aa6c: 54ca strb r2, [r1, r3] return result; 800aa6e: 7bfb ldrb r3, [r7, #15] } 800aa70: 4618 mov r0, r3 800aa72: 3714 adds r7, #20 800aa74: 46bd mov sp, r7 800aa76: bc80 pop {r7} 800aa78: 4770 bx lr 800aa7a: bf00 nop 800aa7c: 20000884 .word 0x20000884 0800aa80 : void ED_Delay(uint32_t Delay) { 800aa80: b580 push {r7, lr} 800aa82: b084 sub sp, #16 800aa84: af00 add r7, sp, #0 800aa86: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 800aa88: f004 fdda bl 800f640 800aa8c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800aa8e: 687b ldr r3, [r7, #4] 800aa90: 60fb str r3, [r7, #12] if (wait < HAL_MAX_DELAY) 800aa92: 68fb ldr r3, [r7, #12] 800aa94: f1b3 3fff cmp.w r3, #4294967295 800aa98: d010 beq.n 800aabc { wait += (uint32_t)(uwTickFreq); 800aa9a: 4b0f ldr r3, [pc, #60] @ (800aad8 ) 800aa9c: 781b ldrb r3, [r3, #0] 800aa9e: 461a mov r2, r3 800aaa0: 68fb ldr r3, [r7, #12] 800aaa2: 4413 add r3, r2 800aaa4: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait){ 800aaa6: e009 b.n 800aabc CCS_SerialLoop(); 800aaa8: f002 fb1a bl 800d0e0 StopButtonControl(); 800aaac: f000 f816 bl 800aadc CP_Loop(); 800aab0: f7ff fc58 bl 800a364 LED_Task(); 800aab4: f002 f8d6 bl 800cc64 SC_Task(); 800aab8: f003 f980 bl 800ddbc while ((HAL_GetTick() - tickstart) < wait){ 800aabc: f004 fdc0 bl 800f640 800aac0: 4602 mov r2, r0 800aac2: 68bb ldr r3, [r7, #8] 800aac4: 1ad3 subs r3, r2, r3 800aac6: 68fa ldr r2, [r7, #12] 800aac8: 429a cmp r2, r3 800aaca: d8ed bhi.n 800aaa8 } } 800aacc: bf00 nop 800aace: bf00 nop 800aad0: 3710 adds r7, #16 800aad2: 46bd mov sp, r7 800aad4: bd80 pop {r7, pc} 800aad6: bf00 nop 800aad8: 2000008c .word 0x2000008c 0800aadc : static void StopButtonControl(void){ 800aadc: b580 push {r7, lr} 800aade: b082 sub sp, #8 800aae0: af00 add r7, sp, #0 static uint32_t tick; static uint32_t hold_time; static uint8_t stop_btn_fault = 1; uint32_t now = HAL_GetTick(); 800aae2: f004 fdad bl 800f640 800aae6: 6078 str r0, [r7, #4] /* Run no faster than once per 10 ms. */ if((now - tick) < 10){ 800aae8: 4b2a ldr r3, [pc, #168] @ (800ab94 ) 800aaea: 681b ldr r3, [r3, #0] 800aaec: 687a ldr r2, [r7, #4] 800aaee: 1ad3 subs r3, r2, r3 800aaf0: 2b09 cmp r3, #9 800aaf2: d949 bls.n 800ab88 return; } tick = now; 800aaf4: 4a27 ldr r2, [pc, #156] @ (800ab94 ) 800aaf6: 687b ldr r3, [r7, #4] 800aaf8: 6013 str r3, [r2, #0] uint8_t pressed = !IN_ReadInput(IN_ESTOP); 800aafa: 2003 movs r0, #3 800aafc: f7fe fedc bl 80098b8 800ab00: 4603 mov r3, r0 800ab02: 2b00 cmp r3, #0 800ab04: bf0c ite eq 800ab06: 2301 moveq r3, #1 800ab08: 2300 movne r3, #0 800ab0a: b2db uxtb r3, r3 800ab0c: 70fb strb r3, [r7, #3] if(!pressed){ 800ab0e: 78fb ldrb r3, [r7, #3] 800ab10: 2b00 cmp r3, #0 800ab12: d102 bne.n 800ab1a stop_btn_fault = 0; 800ab14: 4b20 ldr r3, [pc, #128] @ (800ab98 ) 800ab16: 2200 movs r2, #0 800ab18: 701a strb r2, [r3, #0] } if(stop_btn_fault){ 800ab1a: 4b1f ldr r3, [pc, #124] @ (800ab98 ) 800ab1c: 781b ldrb r3, [r3, #0] 800ab1e: 2b00 cmp r3, #0 800ab20: d134 bne.n 800ab8c return; } if(pressed){ 800ab22: 78fb ldrb r3, [r7, #3] 800ab24: 2b00 cmp r3, #0 800ab26: d02b beq.n 800ab80 if(hold_time == 0){ 800ab28: 4b1c ldr r3, [pc, #112] @ (800ab9c ) 800ab2a: 681b ldr r3, [r3, #0] 800ab2c: 2b00 cmp r3, #0 800ab2e: d102 bne.n 800ab36 CONN.connControl = CMD_STOP; 800ab30: 4b1b ldr r3, [pc, #108] @ (800aba0 ) 800ab32: 2201 movs r2, #1 800ab34: 701a strb r2, [r3, #0] } hold_time += 10; 800ab36: 4b19 ldr r3, [pc, #100] @ (800ab9c ) 800ab38: 681b ldr r3, [r3, #0] 800ab3a: 330a adds r3, #10 800ab3c: 4a17 ldr r2, [pc, #92] @ (800ab9c ) 800ab3e: 6013 str r3, [r2, #0] if(hold_time == 5000){ 800ab40: 4b16 ldr r3, [pc, #88] @ (800ab9c ) 800ab42: 681b ldr r3, [r3, #0] 800ab44: f241 3288 movw r2, #5000 @ 0x1388 800ab48: 4293 cmp r3, r2 800ab4a: d102 bne.n 800ab52 CONN.connControl = CMD_FORCE_UNLOCK; 800ab4c: 4b14 ldr r3, [pc, #80] @ (800aba0 ) 800ab4e: 2203 movs r2, #3 800ab50: 701a strb r2, [r3, #0] } if(hold_time > 40000){ 800ab52: 4b12 ldr r3, [pc, #72] @ (800ab9c ) 800ab54: 681b ldr r3, [r3, #0] 800ab56: f649 4240 movw r2, #40000 @ 0x9c40 800ab5a: 4293 cmp r3, r2 800ab5c: d917 bls.n 800ab8e SC_SendPacket(NULL, 0, RESP_SUCCESS); 800ab5e: 2212 movs r2, #18 800ab60: 2100 movs r1, #0 800ab62: 2000 movs r0, #0 800ab64: f003 fa84 bl 800e070 while(huart2.gState == HAL_UART_STATE_BUSY_TX); 800ab68: bf00 nop 800ab6a: 4b0e ldr r3, [pc, #56] @ (800aba4 ) 800ab6c: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800ab70: b2db uxtb r3, r3 800ab72: 2b21 cmp r3, #33 @ 0x21 800ab74: d0f9 beq.n 800ab6a HAL_Delay(10); 800ab76: 200a movs r0, #10 800ab78: f004 fd6c bl 800f654 NVIC_SystemReset(); 800ab7c: f7ff ff38 bl 800a9f0 <__NVIC_SystemReset> } } else{ hold_time = 0; 800ab80: 4b06 ldr r3, [pc, #24] @ (800ab9c ) 800ab82: 2200 movs r2, #0 800ab84: 601a str r2, [r3, #0] 800ab86: e002 b.n 800ab8e return; 800ab88: bf00 nop 800ab8a: e000 b.n 800ab8e return; 800ab8c: bf00 nop } } 800ab8e: 3708 adds r7, #8 800ab90: 46bd mov sp, r7 800ab92: bd80 pop {r7, pc} 800ab94: 200008a4 .word 0x200008a4 800ab98: 20000008 .word 0x20000008 800ab9c: 200008a8 .word 0x200008a8 800aba0: 200003b0 .word 0x200003b0 800aba4: 20001328 .word 0x20001328 0800aba8 : static void CAN1_MinimalReInit(void) { 800aba8: b580 push {r7, lr} 800abaa: af00 add r7, sp, #0 HAL_CAN_Stop(&hcan1); 800abac: 480b ldr r0, [pc, #44] @ (800abdc ) 800abae: f005 fcd5 bl 801055c MX_CAN1_Init(); 800abb2: f7fe fff5 bl 8009ba0 if (HAL_CAN_Start(&hcan1) != HAL_OK) { 800abb6: 4809 ldr r0, [pc, #36] @ (800abdc ) 800abb8: f005 fc8c bl 80104d4 800abbc: 4603 mov r3, r0 800abbe: 2b00 cmp r3, #0 800abc0: d001 beq.n 800abc6 Error_Handler(); 800abc2: f000 f8f7 bl 800adb4 } if (HAL_CAN_ActivateNotification(&hcan1, CAN_IT_RX_FIFO0_MSG_PENDING) != HAL_OK) { 800abc6: 2102 movs r1, #2 800abc8: 4804 ldr r0, [pc, #16] @ (800abdc ) 800abca: f005 ff34 bl 8010a36 800abce: 4603 mov r3, r0 800abd0: 2b00 cmp r3, #0 800abd2: d001 beq.n 800abd8 Error_Handler(); 800abd4: f000 f8ee bl 800adb4 } } 800abd8: bf00 nop 800abda: bd80 pop {r7, pc} 800abdc: 2000035c .word 0x2000035c 0800abe0
: /** * @brief The application entry point. * @retval int */ int main(void) { 800abe0: b580 push {r7, lr} 800abe2: b082 sub sp, #8 800abe4: af02 add r7, sp, #8 /* USER CODE BEGIN 1 */ VectorBase_Config(); 800abe6: f7ff ff19 bl 800aa1c /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 800abea: f004 fcd1 bl 800f590 /* USER CODE BEGIN Init */ HAL_RCC_DeInit(); 800abee: f007 f8e3 bl 8011db8 /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 800abf2: f000 f86f bl 800acd4 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 800abf6: f7ff fdb9 bl 800a76c MX_DMA_Init(); 800abfa: f7ff fd5b bl 800a6b4 MX_ADC1_Init(); 800abfe: f7fe fccb bl 8009598 MX_CAN1_Init(); 800ac02: f7fe ffcd bl 8009ba0 MX_CAN2_Init(); 800ac06: f7ff f801 bl 8009c0c MX_RTC_Init(); 800ac0a: f002 f8cf bl 800cdac MX_TIM4_Init(); 800ac0e: f004 f8c7 bl 800eda0 MX_USART2_UART_Init(); 800ac12: f004 fa45 bl 800f0a0 MX_CRC_Init(); 800ac16: f7ff fbff bl 800a418 MX_UART5_Init(); 800ac1a: f004 f9ed bl 800eff8 MX_USART1_UART_Init(); 800ac1e: f004 fa15 bl 800f04c MX_USART3_UART_Init(); 800ac22: f004 fa67 bl 800f0f4 MX_TIM3_Init(); 800ac26: f004 f82d bl 800ec84 /* USER CODE BEGIN 2 */ Init_Peripheral(); 800ac2a: f7fe febf bl 80099ac LED_Init(); 800ac2e: f001 fff5 bl 800cc1c HAL_Delay(300); 800ac32: f44f 7096 mov.w r0, #300 @ 0x12c 800ac36: f004 fd0d bl 800f654 CCS_Init(); 800ac3a: f002 fd19 bl 800d670 SC_Init(); 800ac3e: f003 f893 bl 800dd68 log_printf(LOG_INFO, "CCS module start\n"); 800ac42: 491f ldr r1, [pc, #124] @ (800acc0 ) 800ac44: 2007 movs r0, #7 800ac46: f7ff fcff bl 800a648 ReadVersion(); 800ac4a: f003 f869 bl 800dd20 log_printf(LOG_INFO, "Serial number: %d\n", infoPacket.serialNumber); 800ac4e: 4b1d ldr r3, [pc, #116] @ (800acc4 ) 800ac50: 881b ldrh r3, [r3, #0] 800ac52: b29b uxth r3, r3 800ac54: 461a mov r2, r3 800ac56: 491c ldr r1, [pc, #112] @ (800acc8 ) 800ac58: 2007 movs r0, #7 800ac5a: f7ff fcf5 bl 800a648 log_printf(LOG_INFO, "Board revision: %d\n", infoPacket.boardVersion); 800ac5e: 4b19 ldr r3, [pc, #100] @ (800acc4 ) 800ac60: 789b ldrb r3, [r3, #2] 800ac62: 461a mov r2, r3 800ac64: 4919 ldr r1, [pc, #100] @ (800accc ) 800ac66: 2007 movs r0, #7 800ac68: f7ff fcee bl 800a648 log_printf(LOG_INFO, "FW version: %d.%d.%d\n", infoPacket.fw_version_major, infoPacket.fw_version_minor, infoPacket.fw_version_patch); 800ac6c: 4b15 ldr r3, [pc, #84] @ (800acc4 ) 800ac6e: 889b ldrh r3, [r3, #4] 800ac70: b29b uxth r3, r3 800ac72: 461a mov r2, r3 800ac74: 4b13 ldr r3, [pc, #76] @ (800acc4 ) 800ac76: 88db ldrh r3, [r3, #6] 800ac78: b29b uxth r3, r3 800ac7a: 4619 mov r1, r3 800ac7c: 4b11 ldr r3, [pc, #68] @ (800acc4 ) 800ac7e: 891b ldrh r3, [r3, #8] 800ac80: b29b uxth r3, r3 800ac82: 9300 str r3, [sp, #0] 800ac84: 460b mov r3, r1 800ac86: 4912 ldr r1, [pc, #72] @ (800acd0 ) 800ac88: 2007 movs r0, #7 800ac8a: f7ff fcdd bl 800a648 CAN1_MinimalReInit(); 800ac8e: f7ff ff8b bl 800aba8 PSU_Init(); 800ac92: f000 ff67 bl 800bb64 CONN_Init(); 800ac96: f7ff f8cd bl 8009e34 /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ PSU_ReadWrite(); 800ac9a: f001 f87d bl 800bd98 PSU_Task(); 800ac9e: f001 f927 bl 800bef0 ED_Delay(10); 800aca2: 200a movs r0, #10 800aca4: f7ff feec bl 800aa80 METER_CalculateEnergy(); 800aca8: f000 f88a bl 800adc0 CONN_Loop(); 800acac: f7ff f8ee bl 8009e8c LED_Write(); 800acb0: f001 fc74 bl 800c59c ED_Delay(10); 800acb4: 200a movs r0, #10 800acb6: f7ff fee3 bl 800aa80 PSU_ReadWrite(); 800acba: bf00 nop 800acbc: e7ed b.n 800ac9a 800acbe: bf00 nop 800acc0: 08018434 .word 0x08018434 800acc4: 200011f0 .word 0x200011f0 800acc8: 08018448 .word 0x08018448 800accc: 0801845c .word 0x0801845c 800acd0: 08018470 .word 0x08018470 0800acd4 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 800acd4: b580 push {r7, lr} 800acd6: b09c sub sp, #112 @ 0x70 800acd8: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 800acda: f107 0338 add.w r3, r7, #56 @ 0x38 800acde: 2238 movs r2, #56 @ 0x38 800ace0: 2100 movs r1, #0 800ace2: 4618 mov r0, r3 800ace4: f00b f9aa bl 801603c RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800ace8: f107 0324 add.w r3, r7, #36 @ 0x24 800acec: 2200 movs r2, #0 800acee: 601a str r2, [r3, #0] 800acf0: 605a str r2, [r3, #4] 800acf2: 609a str r2, [r3, #8] 800acf4: 60da str r2, [r3, #12] 800acf6: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 800acf8: 1d3b adds r3, r7, #4 800acfa: 2220 movs r2, #32 800acfc: 2100 movs r1, #0 800acfe: 4618 mov r0, r3 800ad00: f00b f99c bl 801603c /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; 800ad04: 2305 movs r3, #5 800ad06: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 800ad08: f44f 3380 mov.w r3, #65536 @ 0x10000 800ad0c: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5; 800ad0e: 2304 movs r3, #4 800ad10: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.LSEState = RCC_LSE_ON; 800ad12: 2301 movs r3, #1 800ad14: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 800ad16: 2301 movs r3, #1 800ad18: 64fb str r3, [r7, #76] @ 0x4c RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2; 800ad1a: f44f 3380 mov.w r3, #65536 @ 0x10000 800ad1e: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 800ad20: 2302 movs r3, #2 800ad22: 65bb str r3, [r7, #88] @ 0x58 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 800ad24: f44f 3380 mov.w r3, #65536 @ 0x10000 800ad28: 65fb str r3, [r7, #92] @ 0x5c RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 800ad2a: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000 800ad2e: 663b str r3, [r7, #96] @ 0x60 RCC_OscInitStruct.PLL2.PLL2State = RCC_PLL2_ON; 800ad30: 2302 movs r3, #2 800ad32: 667b str r3, [r7, #100] @ 0x64 RCC_OscInitStruct.PLL2.PLL2MUL = RCC_PLL2_MUL8; 800ad34: f44f 63c0 mov.w r3, #1536 @ 0x600 800ad38: 66bb str r3, [r7, #104] @ 0x68 RCC_OscInitStruct.PLL2.HSEPrediv2Value = RCC_HSE_PREDIV2_DIV5; 800ad3a: 2340 movs r3, #64 @ 0x40 800ad3c: 66fb str r3, [r7, #108] @ 0x6c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800ad3e: f107 0338 add.w r3, r7, #56 @ 0x38 800ad42: 4618 mov r0, r3 800ad44: f007 f908 bl 8011f58 800ad48: 4603 mov r3, r0 800ad4a: 2b00 cmp r3, #0 800ad4c: d001 beq.n 800ad52 { Error_Handler(); 800ad4e: f000 f831 bl 800adb4 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800ad52: 230f movs r3, #15 800ad54: 627b str r3, [r7, #36] @ 0x24 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 800ad56: 2302 movs r3, #2 800ad58: 62bb str r3, [r7, #40] @ 0x28 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800ad5a: 2300 movs r3, #0 800ad5c: 62fb str r3, [r7, #44] @ 0x2c RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 800ad5e: f44f 6380 mov.w r3, #1024 @ 0x400 800ad62: 633b str r3, [r7, #48] @ 0x30 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800ad64: 2300 movs r3, #0 800ad66: 637b str r3, [r7, #52] @ 0x34 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 800ad68: f107 0324 add.w r3, r7, #36 @ 0x24 800ad6c: 2102 movs r1, #2 800ad6e: 4618 mov r0, r3 800ad70: f007 fc08 bl 8012584 800ad74: 4603 mov r3, r0 800ad76: 2b00 cmp r3, #0 800ad78: d001 beq.n 800ad7e { Error_Handler(); 800ad7a: f000 f81b bl 800adb4 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC; 800ad7e: 2303 movs r3, #3 800ad80: 607b str r3, [r7, #4] PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 800ad82: f44f 7380 mov.w r3, #256 @ 0x100 800ad86: 60bb str r3, [r7, #8] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 800ad88: f44f 4300 mov.w r3, #32768 @ 0x8000 800ad8c: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 800ad8e: 1d3b adds r3, r7, #4 800ad90: 4618 mov r0, r3 800ad92: f007 fded bl 8012970 800ad96: 4603 mov r3, r0 800ad98: 2b00 cmp r3, #0 800ad9a: d001 beq.n 800ada0 { Error_Handler(); 800ad9c: f000 f80a bl 800adb4 } /** Configure the Systick interrupt time */ __HAL_RCC_PLLI2S_ENABLE(); 800ada0: 4b03 ldr r3, [pc, #12] @ (800adb0 ) 800ada2: 2201 movs r2, #1 800ada4: 601a str r2, [r3, #0] } 800ada6: bf00 nop 800ada8: 3770 adds r7, #112 @ 0x70 800adaa: 46bd mov sp, r7 800adac: bd80 pop {r7, pc} 800adae: bf00 nop 800adb0: 42420070 .word 0x42420070 0800adb4 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 800adb4: b480 push {r7} 800adb6: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800adb8: b672 cpsid i } 800adba: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 800adbc: bf00 nop 800adbe: e7fd b.n 800adbc 0800adc0 : METER_t METER; // Функция для расчета и накопления энергии c дробной частью без счетчиков void METER_CalculateEnergy() { 800adc0: e92d 43b0 stmdb sp!, {r4, r5, r7, r8, r9, lr} 800adc4: b084 sub sp, #16 800adc6: af00 add r7, sp, #0 // Проверяем, что индекс находится в пределах массива METER.online = 0; 800adc8: 4b2c ldr r3, [pc, #176] @ (800ae7c ) 800adca: 2200 movs r2, #0 800adcc: 701a strb r2, [r3, #0] if(CONN.connState == Charging){ 800adce: 4b2c ldr r3, [pc, #176] @ (800ae80 ) 800add0: 785b ldrb r3, [r3, #1] 800add2: 2b08 cmp r3, #8 800add4: d103 bne.n 800adde METER.enable = 1; 800add6: 4b29 ldr r3, [pc, #164] @ (800ae7c ) 800add8: 2201 movs r2, #1 800adda: 761a strb r2, [r3, #24] 800addc: e002 b.n 800ade4 }else{ METER.enable = 0; 800adde: 4b27 ldr r3, [pc, #156] @ (800ae7c ) 800ade0: 2200 movs r2, #0 800ade2: 761a strb r2, [r3, #24] } uint32_t currentTick = HAL_GetTick(); // Получаем текущее время в миллисекундах 800ade4: f004 fc2c bl 800f640 800ade8: 60f8 str r0, [r7, #12] uint32_t elapsedTimeMs = currentTick - METER.lastTick; // Вычисляем время, прошедшее с последнего вызова в секундах 800adea: 4b24 ldr r3, [pc, #144] @ (800ae7c ) 800adec: 685b ldr r3, [r3, #4] 800adee: 68fa ldr r2, [r7, #12] 800adf0: 1ad3 subs r3, r2, r3 800adf2: 60bb str r3, [r7, #8] METER.lastTick = currentTick; // Обновляем время последнего вызова для текущего коннектора 800adf4: 4a21 ldr r2, [pc, #132] @ (800ae7c ) 800adf6: 68fb ldr r3, [r7, #12] 800adf8: 6053 str r3, [r2, #4] uint32_t energyWs = CONN.Power * elapsedTimeMs / 1000; // Рассчитываем энергию в ватт-секундах за прошедший промежуток времени 800adfa: 4b21 ldr r3, [pc, #132] @ (800ae80 ) 800adfc: f8d3 3003 ldr.w r3, [r3, #3] 800ae00: 68ba ldr r2, [r7, #8] 800ae02: fb02 f303 mul.w r3, r2, r3 800ae06: 4a1f ldr r2, [pc, #124] @ (800ae84 ) 800ae08: fba2 2303 umull r2, r3, r2, r3 800ae0c: 099b lsrs r3, r3, #6 800ae0e: 607b str r3, [r7, #4] //Расчет энергии теперь идет всегда, смещение берем суммарное METER.EnergyPSU_Ws += energyWs; 800ae10: 4b1a ldr r3, [pc, #104] @ (800ae7c ) 800ae12: e9d3 2302 ldrd r2, r3, [r3, #8] 800ae16: 6879 ldr r1, [r7, #4] 800ae18: 2000 movs r0, #0 800ae1a: 460c mov r4, r1 800ae1c: 4605 mov r5, r0 800ae1e: eb12 0804 adds.w r8, r2, r4 800ae22: eb43 0905 adc.w r9, r3, r5 800ae26: 4b15 ldr r3, [pc, #84] @ (800ae7c ) 800ae28: e9c3 8902 strd r8, r9, [r3, #8] // Абсолютное значение энергии разъема складывается из накопленной дробной части и значения со счетчиков METER.AbsoluteEnergy = (uint32_t)METER.EnergyPSU_Ws/3600; //переводим в Вт*час 800ae2c: 4b13 ldr r3, [pc, #76] @ (800ae7c ) 800ae2e: e9d3 2302 ldrd r2, r3, [r3, #8] 800ae32: 4b15 ldr r3, [pc, #84] @ (800ae88 ) 800ae34: fba3 2302 umull r2, r3, r3, r2 800ae38: 0adb lsrs r3, r3, #11 800ae3a: 4a10 ldr r2, [pc, #64] @ (800ae7c ) 800ae3c: 6113 str r3, [r2, #16] if(METER.enable) { 800ae3e: 4b0f ldr r3, [pc, #60] @ (800ae7c ) 800ae40: 7e1b ldrb r3, [r3, #24] 800ae42: 2b00 cmp r3, #0 800ae44: d008 beq.n 800ae58 //enabled state CONN.Energy = METER.AbsoluteEnergy - METER.EnergyOffset;//переводим в Вт*час 800ae46: 4b0d ldr r3, [pc, #52] @ (800ae7c ) 800ae48: 691a ldr r2, [r3, #16] 800ae4a: 4b0c ldr r3, [pc, #48] @ (800ae7c ) 800ae4c: 695b ldr r3, [r3, #20] 800ae4e: 1ad3 subs r3, r2, r3 800ae50: 4a0b ldr r2, [pc, #44] @ (800ae80 ) 800ae52: f8c2 3007 str.w r3, [r2, #7] METER.EnergyOffset = METER.AbsoluteEnergy; } } 800ae56: e00c b.n 800ae72 CONN.Energy = 0; 800ae58: 4b09 ldr r3, [pc, #36] @ (800ae80 ) 800ae5a: 2200 movs r2, #0 800ae5c: 71da strb r2, [r3, #7] 800ae5e: 2200 movs r2, #0 800ae60: 721a strb r2, [r3, #8] 800ae62: 2200 movs r2, #0 800ae64: 725a strb r2, [r3, #9] 800ae66: 2200 movs r2, #0 800ae68: 729a strb r2, [r3, #10] METER.EnergyOffset = METER.AbsoluteEnergy; 800ae6a: 4b04 ldr r3, [pc, #16] @ (800ae7c ) 800ae6c: 691b ldr r3, [r3, #16] 800ae6e: 4a03 ldr r2, [pc, #12] @ (800ae7c ) 800ae70: 6153 str r3, [r2, #20] } 800ae72: bf00 nop 800ae74: 3710 adds r7, #16 800ae76: 46bd mov sp, r7 800ae78: e8bd 83b0 ldmia.w sp!, {r4, r5, r7, r8, r9, pc} 800ae7c: 200008b0 .word 0x200008b0 800ae80: 200003b0 .word 0x200003b0 800ae84: 10624dd3 .word 0x10624dd3 800ae88: 91a2b3c5 .word 0x91a2b3c5 0800ae8c : static uint8_t fast_discharge_count; static uint32_t last_fast_discharge_ms; static uint32_t measured_high_current_since_ms; static uint8_t session_ended_state(CONN_State_t state) { 800ae8c: b480 push {r7} 800ae8e: b083 sub sp, #12 800ae90: af00 add r7, sp, #0 800ae92: 4603 mov r3, r0 800ae94: 71fb strb r3, [r7, #7] return (state == Unknown) || (state == Unplugged) || (state == Finished) || (state == FinishedEV) || (state == FinishedEVSE); 800ae96: 79fb ldrb r3, [r7, #7] 800ae98: 2b00 cmp r3, #0 800ae9a: d00b beq.n 800aeb4 return (state == Unknown) || (state == Unplugged) || (state == Finished) || 800ae9c: 79fb ldrb r3, [r7, #7] 800ae9e: 2b01 cmp r3, #1 800aea0: d008 beq.n 800aeb4 800aea2: 79fb ldrb r3, [r7, #7] 800aea4: 2b0a cmp r3, #10 800aea6: d005 beq.n 800aeb4 800aea8: 79fb ldrb r3, [r7, #7] 800aeaa: 2b0c cmp r3, #12 800aeac: d002 beq.n 800aeb4 (state == FinishedEV) || (state == FinishedEVSE); 800aeae: 79fb ldrb r3, [r7, #7] 800aeb0: 2b0b cmp r3, #11 800aeb2: d101 bne.n 800aeb8 800aeb4: 2301 movs r3, #1 800aeb6: e000 b.n 800aeba 800aeb8: 2300 movs r3, #0 800aeba: b2db uxtb r3, r3 } 800aebc: 4618 mov r0, r3 800aebe: 370c adds r7, #12 800aec0: 46bd mov sp, r7 800aec2: bc80 pop {r7} 800aec4: 4770 bx lr ... 0800aec8 : void PowerSetpoint_Init(void) { 800aec8: b480 push {r7} 800aeca: af00 add r7, sp, #0 applied.voltage_V = PSU_MIN_VOLTAGE; 800aecc: 4b11 ldr r3, [pc, #68] @ (800af14 ) 800aece: 2296 movs r2, #150 @ 0x96 800aed0: 801a strh r2, [r3, #0] applied.current_0p1A = 0u; 800aed2: 4b10 ldr r3, [pc, #64] @ (800af14 ) 800aed4: 2200 movs r2, #0 800aed6: 805a strh r2, [r3, #2] pending = applied; 800aed8: 4a0f ldr r2, [pc, #60] @ (800af18 ) 800aeda: 4b0e ldr r3, [pc, #56] @ (800af14 ) 800aedc: 681b ldr r3, [r3, #0] 800aede: 6013 str r3, [r2, #0] fd_target = applied; 800aee0: 4a0e ldr r2, [pc, #56] @ (800af1c ) 800aee2: 4b0c ldr r3, [pc, #48] @ (800af14 ) 800aee4: 681b ldr r3, [r3, #0] 800aee6: 6013 str r3, [r2, #0] setpoint_dirty = 0u; 800aee8: 4b0d ldr r3, [pc, #52] @ (800af20 ) 800aeea: 2200 movs r2, #0 800aeec: 701a strb r2, [r3, #0] fd_active = 0u; 800aeee: 4b0d ldr r3, [pc, #52] @ (800af24 ) 800aef0: 2200 movs r2, #0 800aef2: 701a strb r2, [r3, #0] power_delivery_latched = 0u; 800aef4: 4b0c ldr r3, [pc, #48] @ (800af28 ) 800aef6: 2200 movs r2, #0 800aef8: 701a strb r2, [r3, #0] fast_discharge_count = 0u; 800aefa: 4b0c ldr r3, [pc, #48] @ (800af2c ) 800aefc: 2200 movs r2, #0 800aefe: 701a strb r2, [r3, #0] last_fast_discharge_ms = 0u; 800af00: 4b0b ldr r3, [pc, #44] @ (800af30 ) 800af02: 2200 movs r2, #0 800af04: 601a str r2, [r3, #0] measured_high_current_since_ms = 0u; 800af06: 4b0b ldr r3, [pc, #44] @ (800af34 ) 800af08: 2200 movs r2, #0 800af0a: 601a str r2, [r3, #0] } 800af0c: bf00 nop 800af0e: 46bd mov sp, r7 800af10: bc80 pop {r7} 800af12: 4770 bx lr 800af14: 200008d0 .word 0x200008d0 800af18: 200008d4 .word 0x200008d4 800af1c: 200008d8 .word 0x200008d8 800af20: 200008dc .word 0x200008dc 800af24: 200008dd .word 0x200008dd 800af28: 200008de .word 0x200008de 800af2c: 200008df .word 0x200008df 800af30: 200008e0 .word 0x200008e0 800af34: 200008e4 .word 0x200008e4 0800af38 : void PowerSetpoint_OnCommand(uint16_t voltage_V, uint16_t current_0p1A) { 800af38: b480 push {r7} 800af3a: b083 sub sp, #12 800af3c: af00 add r7, sp, #0 800af3e: 4603 mov r3, r0 800af40: 460a mov r2, r1 800af42: 80fb strh r3, [r7, #6] 800af44: 4613 mov r3, r2 800af46: 80bb strh r3, [r7, #4] #if PSD_ENABLE pending.voltage_V = voltage_V; 800af48: 4a06 ldr r2, [pc, #24] @ (800af64 ) 800af4a: 88fb ldrh r3, [r7, #6] 800af4c: 8013 strh r3, [r2, #0] pending.current_0p1A = current_0p1A; 800af4e: 4a05 ldr r2, [pc, #20] @ (800af64 ) 800af50: 88bb ldrh r3, [r7, #4] 800af52: 8053 strh r3, [r2, #2] setpoint_dirty = 1u; 800af54: 4b04 ldr r3, [pc, #16] @ (800af68 ) 800af56: 2201 movs r2, #1 800af58: 701a strb r2, [r3, #0] #else (void)voltage_V; (void)current_0p1A; #endif } 800af5a: bf00 nop 800af5c: 370c adds r7, #12 800af5e: 46bd mov sp, r7 800af60: bc80 pop {r7} 800af62: 4770 bx lr 800af64: 200008d4 .word 0x200008d4 800af68: 200008dc .word 0x200008dc 0800af6c : void PowerSetpoint_UpdateDeliveryLatch(void) { 800af6c: b580 push {r7, lr} 800af6e: b082 sub sp, #8 800af70: af00 add r7, sp, #0 #if PSD_ENABLE uint32_t now = HAL_GetTick(); 800af72: f004 fb65 bl 800f640 800af76: 6078 str r0, [r7, #4] if (!CONN.EnableOutput || !CONN.EvConnected || session_ended_state(CCS_EvseState)) { 800af78: 4b25 ldr r3, [pc, #148] @ (800b010 ) 800af7a: 7ddb ldrb r3, [r3, #23] 800af7c: 2b00 cmp r3, #0 800af7e: d00b beq.n 800af98 800af80: 4b23 ldr r3, [pc, #140] @ (800b010 ) 800af82: 7f9b ldrb r3, [r3, #30] 800af84: 2b00 cmp r3, #0 800af86: d007 beq.n 800af98 800af88: 4b22 ldr r3, [pc, #136] @ (800b014 ) 800af8a: 781b ldrb r3, [r3, #0] 800af8c: 4618 mov r0, r3 800af8e: f7ff ff7d bl 800ae8c 800af92: 4603 mov r3, r0 800af94: 2b00 cmp r3, #0 800af96: d00c beq.n 800afb2 power_delivery_latched = 0u; 800af98: 4b1f ldr r3, [pc, #124] @ (800b018 ) 800af9a: 2200 movs r2, #0 800af9c: 701a strb r2, [r3, #0] fast_discharge_count = 0u; 800af9e: 4b1f ldr r3, [pc, #124] @ (800b01c ) 800afa0: 2200 movs r2, #0 800afa2: 701a strb r2, [r3, #0] last_fast_discharge_ms = 0u; 800afa4: 4b1e ldr r3, [pc, #120] @ (800b020 ) 800afa6: 2200 movs r2, #0 800afa8: 601a str r2, [r3, #0] measured_high_current_since_ms = 0u; 800afaa: 4b1e ldr r3, [pc, #120] @ (800b024 ) 800afac: 2200 movs r2, #0 800afae: 601a str r2, [r3, #0] return; 800afb0: e02b b.n 800b00a } if (CONN.WantedCurrent > PSD_MAX_CMD_CURRENT_0P1A) { 800afb2: 4b17 ldr r3, [pc, #92] @ (800b010 ) 800afb4: f8b3 301b ldrh.w r3, [r3, #27] 800afb8: b29b uxth r3, r3 800afba: 2b14 cmp r3, #20 800afbc: d902 bls.n 800afc4 power_delivery_latched = 1u; 800afbe: 4b16 ldr r3, [pc, #88] @ (800b018 ) 800afc0: 2201 movs r2, #1 800afc2: 701a strb r2, [r3, #0] } if (CCS_EvseState == Charging) { 800afc4: 4b13 ldr r3, [pc, #76] @ (800b014 ) 800afc6: 781b ldrb r3, [r3, #0] 800afc8: 2b08 cmp r3, #8 800afca: d102 bne.n 800afd2 power_delivery_latched = 1u; 800afcc: 4b12 ldr r3, [pc, #72] @ (800b018 ) 800afce: 2201 movs r2, #1 800afd0: 701a strb r2, [r3, #0] } if (CONN.MeasuredCurrent >= PSD_MAX_MEASURED_CURRENT_0P1A) { 800afd2: 4b0f ldr r3, [pc, #60] @ (800b010 ) 800afd4: f8b3 3015 ldrh.w r3, [r3, #21] 800afd8: b29b uxth r3, r3 800afda: 2b1d cmp r3, #29 800afdc: d912 bls.n 800b004 if (measured_high_current_since_ms == 0u) { 800afde: 4b11 ldr r3, [pc, #68] @ (800b024 ) 800afe0: 681b ldr r3, [r3, #0] 800afe2: 2b00 cmp r3, #0 800afe4: d103 bne.n 800afee measured_high_current_since_ms = now; 800afe6: 4a0f ldr r2, [pc, #60] @ (800b024 ) 800afe8: 687b ldr r3, [r7, #4] 800afea: 6013 str r3, [r2, #0] 800afec: e00d b.n 800b00a } else if ((now - measured_high_current_since_ms) >= PSD_MEASURED_LATCH_MS) { 800afee: 4b0d ldr r3, [pc, #52] @ (800b024 ) 800aff0: 681b ldr r3, [r3, #0] 800aff2: 687a ldr r2, [r7, #4] 800aff4: 1ad3 subs r3, r2, r3 800aff6: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800affa: d306 bcc.n 800b00a power_delivery_latched = 1u; 800affc: 4b06 ldr r3, [pc, #24] @ (800b018 ) 800affe: 2201 movs r2, #1 800b000: 701a strb r2, [r3, #0] 800b002: e002 b.n 800b00a } } else { measured_high_current_since_ms = 0u; 800b004: 4b07 ldr r3, [pc, #28] @ (800b024 ) 800b006: 2200 movs r2, #0 800b008: 601a str r2, [r3, #0] } #endif } 800b00a: 3708 adds r7, #8 800b00c: 46bd mov sp, r7 800b00e: bd80 pop {r7, pc} 800b010: 200003b0 .word 0x200003b0 800b014: 20000d50 .word 0x20000d50 800b018: 200008de .word 0x200008de 800b01c: 200008df .word 0x200008df 800b020: 200008e0 .word 0x200008e0 800b024: 200008e4 .word 0x200008e4 0800b028 : uint8_t PowerSetpoint_HasPending(void) { 800b028: b480 push {r7} 800b02a: af00 add r7, sp, #0 #if PSD_ENABLE return setpoint_dirty; 800b02c: 4b02 ldr r3, [pc, #8] @ (800b038 ) 800b02e: 781b ldrb r3, [r3, #0] #else return 0u; #endif } 800b030: 4618 mov r0, r3 800b032: 46bd mov sp, r7 800b034: bc80 pop {r7} 800b036: 4770 bx lr 800b038: 200008dc .word 0x200008dc 0800b03c : uint8_t PowerSetpoint_IsBusy(void) { 800b03c: b480 push {r7} 800b03e: af00 add r7, sp, #0 #if PSD_ENABLE if (!fd_active) { 800b040: 4b08 ldr r3, [pc, #32] @ (800b064 ) 800b042: 781b ldrb r3, [r3, #0] 800b044: 2b00 cmp r3, #0 800b046: d101 bne.n 800b04c return 0u; 800b048: 2300 movs r3, #0 800b04a: e007 b.n 800b05c } switch (PSU0.state) { 800b04c: 4b06 ldr r3, [pc, #24] @ (800b068 ) 800b04e: 79db ldrb r3, [r3, #7] 800b050: 3b06 subs r3, #6 800b052: 2b04 cmp r3, #4 800b054: d801 bhi.n 800b05a case PSU_FAST_DISCHARGE_OFF: case PSU_FAST_DISCHARGE_WAIT: case PSU_FAST_DISCHARGE_SET: case PSU_FAST_DISCHARGE_ON: case PSU_FAST_DISCHARGE_ON_WAIT: return 1u; 800b056: 2301 movs r3, #1 800b058: e000 b.n 800b05c default: return 0u; 800b05a: 2300 movs r3, #0 } #else return 0u; #endif } 800b05c: 4618 mov r0, r3 800b05e: 46bd mov sp, r7 800b060: bc80 pop {r7} 800b062: 4770 bx lr 800b064: 200008dd .word 0x200008dd 800b068: 2000092c .word 0x2000092c 0800b06c : static PowerPathContext_t build_context(void) { 800b06c: b5b0 push {r4, r5, r7, lr} 800b06e: b088 sub sp, #32 800b070: af00 add r7, sp, #0 800b072: 6078 str r0, [r7, #4] PowerPathContext_t ctx; ctx.dc_contactor_closed = PSU0.CONT_enabled; 800b074: 4b1c ldr r3, [pc, #112] @ (800b0e8 ) 800b076: 7adb ldrb r3, [r3, #11] 800b078: 733b strb r3, [r7, #12] ctx.psu_hv_enabled = PSU0.PSU_enabled; 800b07a: 4b1b ldr r3, [pc, #108] @ (800b0e8 ) 800b07c: 7a9b ldrb r3, [r3, #10] 800b07e: 737b strb r3, [r7, #13] ctx.measured_voltage_V = CONN.MeasuredVoltage; 800b080: 4b1a ldr r3, [pc, #104] @ (800b0ec ) 800b082: f8b3 3013 ldrh.w r3, [r3, #19] 800b086: b29b uxth r3, r3 800b088: 81fb strh r3, [r7, #14] ctx.measured_current_0p1A = (uint16_t)CONN.MeasuredCurrent; 800b08a: 4b18 ldr r3, [pc, #96] @ (800b0ec ) 800b08c: f8b3 3015 ldrh.w r3, [r3, #21] 800b090: b29b uxth r3, r3 800b092: 823b strh r3, [r7, #16] ctx.power_delivery_active = power_delivery_latched; 800b094: 4b16 ldr r3, [pc, #88] @ (800b0f0 ) 800b096: 781b ldrb r3, [r3, #0] 800b098: 74bb strb r3, [r7, #18] ctx.enable_output = CONN.EnableOutput; 800b09a: 4b14 ldr r3, [pc, #80] @ (800b0ec ) 800b09c: 7ddb ldrb r3, [r3, #23] 800b09e: 74fb strb r3, [r7, #19] ctx.psu_state_connected = (PSU0.state == PSU_CONNECTED) ? 1u : 0u; 800b0a0: 4b11 ldr r3, [pc, #68] @ (800b0e8 ) 800b0a2: 79db ldrb r3, [r3, #7] 800b0a4: 2b05 cmp r3, #5 800b0a6: d101 bne.n 800b0ac 800b0a8: 2301 movs r3, #1 800b0aa: e000 b.n 800b0ae 800b0ac: 2300 movs r3, #0 800b0ae: 753b strb r3, [r7, #20] ctx.psu_cont_fault = PSU0.cont_fault; 800b0b0: 4b0d ldr r3, [pc, #52] @ (800b0e8 ) 800b0b2: 7b1b ldrb r3, [r3, #12] 800b0b4: 757b strb r3, [r7, #21] ctx.psu_fault = PSU0.psu_fault; 800b0b6: 4b0c ldr r3, [pc, #48] @ (800b0e8 ) 800b0b8: 7b5b ldrb r3, [r3, #13] 800b0ba: 75bb strb r3, [r7, #22] ctx.fast_discharge_count = fast_discharge_count; 800b0bc: 4b0d ldr r3, [pc, #52] @ (800b0f4 ) 800b0be: 781b ldrb r3, [r3, #0] 800b0c0: 75fb strb r3, [r7, #23] ctx.last_fast_discharge_ms = last_fast_discharge_ms; 800b0c2: 4b0d ldr r3, [pc, #52] @ (800b0f8 ) 800b0c4: 681b ldr r3, [r3, #0] 800b0c6: 61bb str r3, [r7, #24] ctx.now_ms = HAL_GetTick(); 800b0c8: f004 faba bl 800f640 800b0cc: 4603 mov r3, r0 800b0ce: 61fb str r3, [r7, #28] return ctx; 800b0d0: 687b ldr r3, [r7, #4] 800b0d2: 461d mov r5, r3 800b0d4: f107 040c add.w r4, r7, #12 800b0d8: cc0f ldmia r4!, {r0, r1, r2, r3} 800b0da: c50f stmia r5!, {r0, r1, r2, r3} 800b0dc: 6823 ldr r3, [r4, #0] 800b0de: 602b str r3, [r5, #0] } 800b0e0: 6878 ldr r0, [r7, #4] 800b0e2: 3720 adds r7, #32 800b0e4: 46bd mov sp, r7 800b0e6: bdb0 pop {r4, r5, r7, pc} 800b0e8: 2000092c .word 0x2000092c 800b0ec: 200003b0 .word 0x200003b0 800b0f0: 200008de .word 0x200008de 800b0f4: 200008df .word 0x200008df 800b0f8: 200008e0 .word 0x200008e0 0800b0fc : PowerSetpointTryResult_t PowerSetpoint_TryApply(void) { 800b0fc: b5b0 push {r4, r5, r7, lr} 800b0fe: b08e sub sp, #56 @ 0x38 800b100: af02 add r7, sp, #8 #if PSD_ENABLE PowerPathContext_t ctx; PowerSetpointAction_t action; if (!setpoint_dirty || fd_active) { 800b102: 4b2b ldr r3, [pc, #172] @ (800b1b0 ) 800b104: 781b ldrb r3, [r3, #0] 800b106: 2b00 cmp r3, #0 800b108: d003 beq.n 800b112 800b10a: 4b2a ldr r3, [pc, #168] @ (800b1b4 ) 800b10c: 781b ldrb r3, [r3, #0] 800b10e: 2b00 cmp r3, #0 800b110: d001 beq.n 800b116 return PSD_TRY_IDLE; 800b112: 2300 movs r3, #0 800b114: e048 b.n 800b1a8 } ctx = build_context(); 800b116: 463b mov r3, r7 800b118: 4618 mov r0, r3 800b11a: f7ff ffa7 bl 800b06c 800b11e: f107 0418 add.w r4, r7, #24 800b122: 463d mov r5, r7 800b124: cd0f ldmia r5!, {r0, r1, r2, r3} 800b126: c40f stmia r4!, {r0, r1, r2, r3} 800b128: 682b ldr r3, [r5, #0] 800b12a: 6023 str r3, [r4, #0] action = PowerSetpoint_Decide(&applied, &pending, &ctx); 800b12c: f107 0318 add.w r3, r7, #24 800b130: 461a mov r2, r3 800b132: 4921 ldr r1, [pc, #132] @ (800b1b8 ) 800b134: 4821 ldr r0, [pc, #132] @ (800b1bc ) 800b136: f000 f8ad bl 800b294 800b13a: 4603 mov r3, r0 800b13c: f887 302f strb.w r3, [r7, #47] @ 0x2f if (action == POWER_SETPOINT_FAST_DISCHARGE) { 800b140: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 800b144: 2b01 cmp r3, #1 800b146: d119 bne.n 800b17c fd_target = pending; 800b148: 4a1d ldr r2, [pc, #116] @ (800b1c0 ) 800b14a: 4b1b ldr r3, [pc, #108] @ (800b1b8 ) 800b14c: 681b ldr r3, [r3, #0] 800b14e: 6013 str r3, [r2, #0] fd_active = 1u; 800b150: 4b18 ldr r3, [pc, #96] @ (800b1b4 ) 800b152: 2201 movs r2, #1 800b154: 701a strb r2, [r3, #0] setpoint_dirty = 0u; 800b156: 4b16 ldr r3, [pc, #88] @ (800b1b0 ) 800b158: 2200 movs r2, #0 800b15a: 701a strb r2, [r3, #0] log_printf(LOG_INFO, "Fast discharge trigger %u->%u I=%u\n", (unsigned)applied.voltage_V, 800b15c: 4b17 ldr r3, [pc, #92] @ (800b1bc ) 800b15e: 881b ldrh r3, [r3, #0] log_printf(LOG_INFO, "Fast discharge trigger %u->%u I=%u\n", 800b160: 461a mov r2, r3 (unsigned)fd_target.voltage_V, 800b162: 4b17 ldr r3, [pc, #92] @ (800b1c0 ) 800b164: 881b ldrh r3, [r3, #0] log_printf(LOG_INFO, "Fast discharge trigger %u->%u I=%u\n", 800b166: 4619 mov r1, r3 (unsigned)fd_target.current_0p1A); 800b168: 4b15 ldr r3, [pc, #84] @ (800b1c0 ) 800b16a: 885b ldrh r3, [r3, #2] log_printf(LOG_INFO, "Fast discharge trigger %u->%u I=%u\n", 800b16c: 9300 str r3, [sp, #0] 800b16e: 460b mov r3, r1 800b170: 4914 ldr r1, [pc, #80] @ (800b1c4 ) 800b172: 2007 movs r0, #7 800b174: f7ff fa68 bl 800a648 return PSD_TRY_START_FAST_DISCHARGE; 800b178: 2302 movs r3, #2 800b17a: e015 b.n 800b1a8 } if (!PSU0.ready) { 800b17c: 4b12 ldr r3, [pc, #72] @ (800b1c8 ) 800b17e: 7a5b ldrb r3, [r3, #9] 800b180: 2b00 cmp r3, #0 800b182: d101 bne.n 800b188 return PSD_TRY_IDLE; 800b184: 2300 movs r3, #0 800b186: e00f b.n 800b1a8 } PSU_SetVoltageCurrent(0, pending.voltage_V, pending.current_0p1A); 800b188: 4b0b ldr r3, [pc, #44] @ (800b1b8 ) 800b18a: 881b ldrh r3, [r3, #0] 800b18c: 4a0a ldr r2, [pc, #40] @ (800b1b8 ) 800b18e: 8852 ldrh r2, [r2, #2] 800b190: 4619 mov r1, r3 800b192: 2000 movs r0, #0 800b194: f000 fd44 bl 800bc20 applied = pending; 800b198: 4a08 ldr r2, [pc, #32] @ (800b1bc ) 800b19a: 4b07 ldr r3, [pc, #28] @ (800b1b8 ) 800b19c: 681b ldr r3, [r3, #0] 800b19e: 6013 str r3, [r2, #0] setpoint_dirty = 0u; 800b1a0: 4b03 ldr r3, [pc, #12] @ (800b1b0 ) 800b1a2: 2200 movs r2, #0 800b1a4: 701a strb r2, [r3, #0] return PSD_TRY_APPLIED_NORMAL; 800b1a6: 2301 movs r3, #1 #else return PSD_TRY_IDLE; #endif } 800b1a8: 4618 mov r0, r3 800b1aa: 3730 adds r7, #48 @ 0x30 800b1ac: 46bd mov sp, r7 800b1ae: bdb0 pop {r4, r5, r7, pc} 800b1b0: 200008dc .word 0x200008dc 800b1b4: 200008dd .word 0x200008dd 800b1b8: 200008d4 .word 0x200008d4 800b1bc: 200008d0 .word 0x200008d0 800b1c0: 200008d8 .word 0x200008d8 800b1c4: 080183d0 .word 0x080183d0 800b1c8: 2000092c .word 0x2000092c 0800b1cc : void PowerSetpoint_GetFastDischargeTarget(PowerSetpoint_t *target) { 800b1cc: b480 push {r7} 800b1ce: b083 sub sp, #12 800b1d0: af00 add r7, sp, #0 800b1d2: 6078 str r0, [r7, #4] if (target != 0) { 800b1d4: 687b ldr r3, [r7, #4] 800b1d6: 2b00 cmp r3, #0 800b1d8: d003 beq.n 800b1e2 *target = fd_target; 800b1da: 687b ldr r3, [r7, #4] 800b1dc: 4a03 ldr r2, [pc, #12] @ (800b1ec ) 800b1de: 6810 ldr r0, [r2, #0] 800b1e0: 6018 str r0, [r3, #0] } } 800b1e2: bf00 nop 800b1e4: 370c adds r7, #12 800b1e6: 46bd mov sp, r7 800b1e8: bc80 pop {r7} 800b1ea: 4770 bx lr 800b1ec: 200008d8 .word 0x200008d8 0800b1f0 : void PowerSetpoint_OnFastDischargeComplete(void) { 800b1f0: b580 push {r7, lr} 800b1f2: af00 add r7, sp, #0 #if PSD_ENABLE applied = fd_target; 800b1f4: 4a0e ldr r2, [pc, #56] @ (800b230 ) 800b1f6: 4b0f ldr r3, [pc, #60] @ (800b234 ) 800b1f8: 681b ldr r3, [r3, #0] 800b1fa: 6013 str r3, [r2, #0] fd_active = 0u; 800b1fc: 4b0e ldr r3, [pc, #56] @ (800b238 ) 800b1fe: 2200 movs r2, #0 800b200: 701a strb r2, [r3, #0] fast_discharge_count++; 800b202: 4b0e ldr r3, [pc, #56] @ (800b23c ) 800b204: 781b ldrb r3, [r3, #0] 800b206: 3301 adds r3, #1 800b208: b2da uxtb r2, r3 800b20a: 4b0c ldr r3, [pc, #48] @ (800b23c ) 800b20c: 701a strb r2, [r3, #0] last_fast_discharge_ms = HAL_GetTick(); 800b20e: f004 fa17 bl 800f640 800b212: 4603 mov r3, r0 800b214: 4a0a ldr r2, [pc, #40] @ (800b240 ) 800b216: 6013 str r3, [r2, #0] log_printf(LOG_INFO, "Fast discharge complete, V=%u\n", (unsigned)CONN.MeasuredVoltage); 800b218: 4b0a ldr r3, [pc, #40] @ (800b244 ) 800b21a: f8b3 3013 ldrh.w r3, [r3, #19] 800b21e: b29b uxth r3, r3 800b220: 461a mov r2, r3 800b222: 4909 ldr r1, [pc, #36] @ (800b248 ) 800b224: 2007 movs r0, #7 800b226: f7ff fa0f bl 800a648 #endif } 800b22a: bf00 nop 800b22c: bd80 pop {r7, pc} 800b22e: bf00 nop 800b230: 200008d0 .word 0x200008d0 800b234: 200008d8 .word 0x200008d8 800b238: 200008dd .word 0x200008dd 800b23c: 200008df .word 0x200008df 800b240: 200008e0 .word 0x200008e0 800b244: 200003b0 .word 0x200003b0 800b248: 080183f4 .word 0x080183f4 0800b24c : void PowerSetpoint_OnFastDischargeAbort(void) { 800b24c: b580 push {r7, lr} 800b24e: af00 add r7, sp, #0 #if PSD_ENABLE fd_active = 0u; 800b250: 4b0a ldr r3, [pc, #40] @ (800b27c ) 800b252: 2200 movs r2, #0 800b254: 701a strb r2, [r3, #0] pending = fd_target; 800b256: 4a0a ldr r2, [pc, #40] @ (800b280 ) 800b258: 4b0a ldr r3, [pc, #40] @ (800b284 ) 800b25a: 681b ldr r3, [r3, #0] 800b25c: 6013 str r3, [r2, #0] setpoint_dirty = 1u; 800b25e: 4b0a ldr r3, [pc, #40] @ (800b288 ) 800b260: 2201 movs r2, #1 800b262: 701a strb r2, [r3, #0] log_printf(LOG_WARN, "Fast discharge aborted, V=%u\n", (unsigned)CONN.MeasuredVoltage); 800b264: 4b09 ldr r3, [pc, #36] @ (800b28c ) 800b266: f8b3 3013 ldrh.w r3, [r3, #19] 800b26a: b29b uxth r3, r3 800b26c: 461a mov r2, r3 800b26e: 4908 ldr r1, [pc, #32] @ (800b290 ) 800b270: 2005 movs r0, #5 800b272: f7ff f9e9 bl 800a648 #endif } 800b276: bf00 nop 800b278: bd80 pop {r7, pc} 800b27a: bf00 nop 800b27c: 200008dd .word 0x200008dd 800b280: 200008d4 .word 0x200008d4 800b284: 200008d8 .word 0x200008d8 800b288: 200008dc .word 0x200008dc 800b28c: 200003b0 .word 0x200003b0 800b290: 08018414 .word 0x08018414 0800b294 : PowerSetpointAction_t PowerSetpoint_Decide( const PowerSetpoint_t *applied, const PowerSetpoint_t *next, const PowerPathContext_t *ctx) { 800b294: b480 push {r7} 800b296: b087 sub sp, #28 800b298: af00 add r7, sp, #0 800b29a: 60f8 str r0, [r7, #12] 800b29c: 60b9 str r1, [r7, #8] 800b29e: 607a str r2, [r7, #4] (void)ctx; return POWER_SETPOINT_NORMAL; #else uint16_t delta_v; if (applied == 0 || next == 0 || ctx == 0) { 800b2a0: 68fb ldr r3, [r7, #12] 800b2a2: 2b00 cmp r3, #0 800b2a4: d005 beq.n 800b2b2 800b2a6: 68bb ldr r3, [r7, #8] 800b2a8: 2b00 cmp r3, #0 800b2aa: d002 beq.n 800b2b2 800b2ac: 687b ldr r3, [r7, #4] 800b2ae: 2b00 cmp r3, #0 800b2b0: d101 bne.n 800b2b6 return POWER_SETPOINT_NORMAL; 800b2b2: 2300 movs r3, #0 800b2b4: e069 b.n 800b38a } if (next->voltage_V >= applied->voltage_V) { 800b2b6: 68bb ldr r3, [r7, #8] 800b2b8: 881a ldrh r2, [r3, #0] 800b2ba: 68fb ldr r3, [r7, #12] 800b2bc: 881b ldrh r3, [r3, #0] 800b2be: 429a cmp r2, r3 800b2c0: d301 bcc.n 800b2c6 return POWER_SETPOINT_NORMAL; 800b2c2: 2300 movs r3, #0 800b2c4: e061 b.n 800b38a } delta_v = (uint16_t)(applied->voltage_V - next->voltage_V); 800b2c6: 68fb ldr r3, [r7, #12] 800b2c8: 881a ldrh r2, [r3, #0] 800b2ca: 68bb ldr r3, [r7, #8] 800b2cc: 881b ldrh r3, [r3, #0] 800b2ce: 1ad3 subs r3, r2, r3 800b2d0: 82fb strh r3, [r7, #22] if (delta_v < PSD_MIN_VOLTAGE_STEP_V) { 800b2d2: 8afb ldrh r3, [r7, #22] 800b2d4: 2b31 cmp r3, #49 @ 0x31 800b2d6: d801 bhi.n 800b2dc return POWER_SETPOINT_NORMAL; 800b2d8: 2300 movs r3, #0 800b2da: e056 b.n 800b38a } if (applied->current_0p1A > PSD_MAX_CMD_CURRENT_0P1A || 800b2dc: 68fb ldr r3, [r7, #12] 800b2de: 885b ldrh r3, [r3, #2] 800b2e0: 2b14 cmp r3, #20 800b2e2: d803 bhi.n 800b2ec next->current_0p1A > PSD_MAX_CMD_CURRENT_0P1A) { 800b2e4: 68bb ldr r3, [r7, #8] 800b2e6: 885b ldrh r3, [r3, #2] if (applied->current_0p1A > PSD_MAX_CMD_CURRENT_0P1A || 800b2e8: 2b14 cmp r3, #20 800b2ea: d901 bls.n 800b2f0 return POWER_SETPOINT_NORMAL; 800b2ec: 2300 movs r3, #0 800b2ee: e04c b.n 800b38a } if (ctx->measured_current_0p1A >= PSD_MAX_MEASURED_CURRENT_0P1A) { 800b2f0: 687b ldr r3, [r7, #4] 800b2f2: 889b ldrh r3, [r3, #4] 800b2f4: 2b1d cmp r3, #29 800b2f6: d901 bls.n 800b2fc return POWER_SETPOINT_NORMAL; 800b2f8: 2300 movs r3, #0 800b2fa: e046 b.n 800b38a } if (ctx->measured_voltage_V <= (uint16_t)(next->voltage_V + PSD_DISCHARGE_MARGIN_V)) { 800b2fc: 687b ldr r3, [r7, #4] 800b2fe: 885a ldrh r2, [r3, #2] 800b300: 68bb ldr r3, [r7, #8] 800b302: 881b ldrh r3, [r3, #0] 800b304: 330f adds r3, #15 800b306: b29b uxth r3, r3 800b308: 429a cmp r2, r3 800b30a: d801 bhi.n 800b310 return POWER_SETPOINT_NORMAL; 800b30c: 2300 movs r3, #0 800b30e: e03c b.n 800b38a } if (ctx->power_delivery_active) { 800b310: 687b ldr r3, [r7, #4] 800b312: 799b ldrb r3, [r3, #6] 800b314: 2b00 cmp r3, #0 800b316: d001 beq.n 800b31c return POWER_SETPOINT_NORMAL; 800b318: 2300 movs r3, #0 800b31a: e036 b.n 800b38a } if (!ctx->enable_output) { 800b31c: 687b ldr r3, [r7, #4] 800b31e: 79db ldrb r3, [r3, #7] 800b320: 2b00 cmp r3, #0 800b322: d101 bne.n 800b328 return POWER_SETPOINT_NORMAL; 800b324: 2300 movs r3, #0 800b326: e030 b.n 800b38a } if (!ctx->psu_state_connected) { 800b328: 687b ldr r3, [r7, #4] 800b32a: 7a1b ldrb r3, [r3, #8] 800b32c: 2b00 cmp r3, #0 800b32e: d101 bne.n 800b334 return POWER_SETPOINT_NORMAL; 800b330: 2300 movs r3, #0 800b332: e02a b.n 800b38a } if (!ctx->dc_contactor_closed) { 800b334: 687b ldr r3, [r7, #4] 800b336: 781b ldrb r3, [r3, #0] 800b338: 2b00 cmp r3, #0 800b33a: d101 bne.n 800b340 return POWER_SETPOINT_NORMAL; 800b33c: 2300 movs r3, #0 800b33e: e024 b.n 800b38a } if (!ctx->psu_hv_enabled) { 800b340: 687b ldr r3, [r7, #4] 800b342: 785b ldrb r3, [r3, #1] 800b344: 2b00 cmp r3, #0 800b346: d101 bne.n 800b34c return POWER_SETPOINT_NORMAL; 800b348: 2300 movs r3, #0 800b34a: e01e b.n 800b38a } if (ctx->psu_cont_fault || ctx->psu_fault) { 800b34c: 687b ldr r3, [r7, #4] 800b34e: 7a5b ldrb r3, [r3, #9] 800b350: 2b00 cmp r3, #0 800b352: d103 bne.n 800b35c 800b354: 687b ldr r3, [r7, #4] 800b356: 7a9b ldrb r3, [r3, #10] 800b358: 2b00 cmp r3, #0 800b35a: d001 beq.n 800b360 return POWER_SETPOINT_NORMAL; 800b35c: 2300 movs r3, #0 800b35e: e014 b.n 800b38a } if (ctx->fast_discharge_count >= PSD_MAX_PER_SESSION) { 800b360: 687b ldr r3, [r7, #4] 800b362: 7adb ldrb r3, [r3, #11] 800b364: 2b03 cmp r3, #3 800b366: d901 bls.n 800b36c return POWER_SETPOINT_NORMAL; 800b368: 2300 movs r3, #0 800b36a: e00e b.n 800b38a } if (ctx->last_fast_discharge_ms != 0u && 800b36c: 687b ldr r3, [r7, #4] 800b36e: 68db ldr r3, [r3, #12] 800b370: 2b00 cmp r3, #0 800b372: d009 beq.n 800b388 (ctx->now_ms - ctx->last_fast_discharge_ms) < PSD_DEBOUNCE_MS) { 800b374: 687b ldr r3, [r7, #4] 800b376: 691a ldr r2, [r3, #16] 800b378: 687b ldr r3, [r7, #4] 800b37a: 68db ldr r3, [r3, #12] 800b37c: 1ad3 subs r3, r2, r3 if (ctx->last_fast_discharge_ms != 0u && 800b37e: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800b382: d201 bcs.n 800b388 return POWER_SETPOINT_NORMAL; 800b384: 2300 movs r3, #0 800b386: e000 b.n 800b38a } return POWER_SETPOINT_FAST_DISCHARGE; 800b388: 2301 movs r3, #1 #endif } 800b38a: 4618 mov r0, r3 800b38c: 371c adds r7, #28 800b38e: 46bd mov sp, r7 800b390: bc80 pop {r7} 800b392: 4770 bx lr 0800b394 : static uint16_t psu_last_can_i_0p1A; static void PSU_SendCmd(uint8_t source, uint8_t destination, uint8_t cmd, void *data); static const char *PSU_StateName(PSU_State_t state) { 800b394: b480 push {r7} 800b396: b083 sub sp, #12 800b398: af00 add r7, sp, #0 800b39a: 4603 mov r3, r0 800b39c: 71fb strb r3, [r7, #7] switch (state) { 800b39e: 79fb ldrb r3, [r7, #7] 800b3a0: 2b0e cmp r3, #14 800b3a2: d83f bhi.n 800b424 800b3a4: a201 add r2, pc, #4 @ (adr r2, 800b3ac ) 800b3a6: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800b3aa: bf00 nop 800b3ac: 0800b3e9 .word 0x0800b3e9 800b3b0: 0800b3ed .word 0x0800b3ed 800b3b4: 0800b3f1 .word 0x0800b3f1 800b3b8: 0800b3f5 .word 0x0800b3f5 800b3bc: 0800b3f9 .word 0x0800b3f9 800b3c0: 0800b3fd .word 0x0800b3fd 800b3c4: 0800b401 .word 0x0800b401 800b3c8: 0800b405 .word 0x0800b405 800b3cc: 0800b409 .word 0x0800b409 800b3d0: 0800b40d .word 0x0800b40d 800b3d4: 0800b411 .word 0x0800b411 800b3d8: 0800b415 .word 0x0800b415 800b3dc: 0800b41d .word 0x0800b41d 800b3e0: 0800b419 .word 0x0800b419 800b3e4: 0800b421 .word 0x0800b421 case PSU_UNREADY: return "UNREADY"; 800b3e8: 4b11 ldr r3, [pc, #68] @ (800b430 ) 800b3ea: e01c b.n 800b426 case PSU_INITIALIZING: return "INIT"; 800b3ec: 4b11 ldr r3, [pc, #68] @ (800b434 ) 800b3ee: e01a b.n 800b426 case PSU_READY: return "READY"; 800b3f0: 4b11 ldr r3, [pc, #68] @ (800b438 ) 800b3f2: e018 b.n 800b426 case PSU_WAIT_ACK_ON: return "WAIT_ON"; 800b3f4: 4b11 ldr r3, [pc, #68] @ (800b43c ) 800b3f6: e016 b.n 800b426 case PSU_CONT_WAIT_ACK_ON: return "CONT_ON"; 800b3f8: 4b11 ldr r3, [pc, #68] @ (800b440 ) 800b3fa: e014 b.n 800b426 case PSU_CONNECTED: return "CONNECTED"; 800b3fc: 4b11 ldr r3, [pc, #68] @ (800b444 ) 800b3fe: e012 b.n 800b426 case PSU_FAST_DISCHARGE_OFF: return "FD_OFF"; 800b400: 4b11 ldr r3, [pc, #68] @ (800b448 ) 800b402: e010 b.n 800b426 case PSU_FAST_DISCHARGE_WAIT: return "FD_WAIT"; 800b404: 4b11 ldr r3, [pc, #68] @ (800b44c ) 800b406: e00e b.n 800b426 case PSU_FAST_DISCHARGE_SET: return "FD_SET"; 800b408: 4b11 ldr r3, [pc, #68] @ (800b450 ) 800b40a: e00c b.n 800b426 case PSU_FAST_DISCHARGE_ON: return "FD_ON"; 800b40c: 4b11 ldr r3, [pc, #68] @ (800b454 ) 800b40e: e00a b.n 800b426 case PSU_FAST_DISCHARGE_ON_WAIT: return "FD_ON_WAIT"; 800b410: 4b11 ldr r3, [pc, #68] @ (800b458 ) 800b412: e008 b.n 800b426 case PSU_CURRENT_DROP: return "CUR_DROP"; 800b414: 4b11 ldr r3, [pc, #68] @ (800b45c ) 800b416: e006 b.n 800b426 case PSU_CONT_WAIT_ACK_OFF: return "CONT_OFF"; 800b418: 4b11 ldr r3, [pc, #68] @ (800b460 ) 800b41a: e004 b.n 800b426 case PSU_WAIT_ACK_OFF: return "WAIT_OFF"; 800b41c: 4b11 ldr r3, [pc, #68] @ (800b464 ) 800b41e: e002 b.n 800b426 case PSU_OFF_PAUSE: return "OFF_PAUSE"; 800b420: 4b11 ldr r3, [pc, #68] @ (800b468 ) 800b422: e000 b.n 800b426 default: return "?"; 800b424: 4b11 ldr r3, [pc, #68] @ (800b46c ) } } 800b426: 4618 mov r0, r3 800b428: 370c adds r7, #12 800b42a: 46bd mov sp, r7 800b42c: bc80 pop {r7} 800b42e: 4770 bx lr 800b430: 08018488 .word 0x08018488 800b434: 08018490 .word 0x08018490 800b438: 08018498 .word 0x08018498 800b43c: 080184a0 .word 0x080184a0 800b440: 080184a8 .word 0x080184a8 800b444: 080184b0 .word 0x080184b0 800b448: 080184bc .word 0x080184bc 800b44c: 080184c4 .word 0x080184c4 800b450: 080184cc .word 0x080184cc 800b454: 080184d4 .word 0x080184d4 800b458: 080184dc .word 0x080184dc 800b45c: 080184e8 .word 0x080184e8 800b460: 080184f4 .word 0x080184f4 800b464: 08018500 .word 0x08018500 800b468: 0801850c .word 0x0801850c 800b46c: 08018518 .word 0x08018518 0800b470 : static void PSU_LogPeriodicDiag(void) { 800b470: b5f0 push {r4, r5, r6, r7, lr} 800b472: b0ad sub sp, #180 @ 0xb4 800b474: af18 add r7, sp, #96 @ 0x60 static uint32_t last_log_ms; uint32_t now = HAL_GetTick(); 800b476: f004 f8e3 bl 800f640 800b47a: 64f8 str r0, [r7, #76] @ 0x4c uint8_t block_setpoint; if ((now - last_log_ms) < PSU_DIAG_LOG_MS) { 800b47c: 4b7b ldr r3, [pc, #492] @ (800b66c ) 800b47e: 681b ldr r3, [r3, #0] 800b480: 6cfa ldr r2, [r7, #76] @ 0x4c 800b482: 1ad3 subs r3, r2, r3 800b484: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800b488: f0c0 80ec bcc.w 800b664 return; } last_log_ms = now; 800b48c: 4a77 ldr r2, [pc, #476] @ (800b66c ) 800b48e: 6cfb ldr r3, [r7, #76] @ 0x4c 800b490: 6013 str r3, [r2, #0] #if PSD_ENABLE block_setpoint = PowerSetpoint_HasPending() || PowerSetpoint_IsBusy(); 800b492: f7ff fdc9 bl 800b028 800b496: 4603 mov r3, r0 800b498: 2b00 cmp r3, #0 800b49a: d104 bne.n 800b4a6 800b49c: f7ff fdce bl 800b03c 800b4a0: 4603 mov r3, r0 800b4a2: 2b00 cmp r3, #0 800b4a4: d001 beq.n 800b4aa 800b4a6: 2301 movs r3, #1 800b4a8: e000 b.n 800b4ac 800b4aa: 2300 movs r3, #0 800b4ac: f887 304b strb.w r3, [r7, #75] @ 0x4b #else block_setpoint = 0u; #endif log_printf(LOG_INFO, 800b4b0: 4b6f ldr r3, [pc, #444] @ (800b670 ) 800b4b2: 79db ldrb r3, [r3, #7] 800b4b4: 4618 mov r0, r3 800b4b6: f7ff ff6d bl 800b394 800b4ba: 4684 mov ip, r0 "PSU diag st=%s req=%uV/%u.%uA want=%uV/%u.%uA " "can=%uV/%u.%uA meas=%uV/%d.%uA " "enOut=%u out=%u rdy=%u on=%u cont=%u ac=%u hv=%u psd_blk=%u " "err=%u s0=0x%02x s1=0x%02x s2=0x%02x can_age=%lums\n", PSU_StateName(PSU0.state), (unsigned)CONN.RequestedVoltage, 800b4bc: 4b6d ldr r3, [pc, #436] @ (800b674 ) 800b4be: f8b3 300f ldrh.w r3, [r3, #15] 800b4c2: b29b uxth r3, r3 log_printf(LOG_INFO, 800b4c4: 469e mov lr, r3 (unsigned)(CONN.RequestedCurrent / 10u), 800b4c6: 4b6b ldr r3, [pc, #428] @ (800b674 ) 800b4c8: f8b3 3011 ldrh.w r3, [r3, #17] 800b4cc: b29b uxth r3, r3 log_printf(LOG_INFO, 800b4ce: 4a6a ldr r2, [pc, #424] @ (800b678 ) 800b4d0: fba2 2303 umull r2, r3, r2, r3 800b4d4: 08db lsrs r3, r3, #3 800b4d6: b29b uxth r3, r3 800b4d8: 647b str r3, [r7, #68] @ 0x44 (unsigned)(CONN.RequestedCurrent % 10u), 800b4da: 4b66 ldr r3, [pc, #408] @ (800b674 ) 800b4dc: f8b3 3011 ldrh.w r3, [r3, #17] 800b4e0: b29a uxth r2, r3 log_printf(LOG_INFO, 800b4e2: 4b65 ldr r3, [pc, #404] @ (800b678 ) 800b4e4: fba3 1302 umull r1, r3, r3, r2 800b4e8: 08d9 lsrs r1, r3, #3 800b4ea: 460b mov r3, r1 800b4ec: 009b lsls r3, r3, #2 800b4ee: 440b add r3, r1 800b4f0: 005b lsls r3, r3, #1 800b4f2: 1ad3 subs r3, r2, r3 800b4f4: b29b uxth r3, r3 800b4f6: 643b str r3, [r7, #64] @ 0x40 (unsigned)CONN.RequestedVoltage, 800b4f8: 4b5e ldr r3, [pc, #376] @ (800b674 ) 800b4fa: f8b3 300f ldrh.w r3, [r3, #15] 800b4fe: b29b uxth r3, r3 log_printf(LOG_INFO, 800b500: 63fb str r3, [r7, #60] @ 0x3c (unsigned)(CONN.WantedCurrent / 10u), 800b502: 4b5c ldr r3, [pc, #368] @ (800b674 ) 800b504: f8b3 301b ldrh.w r3, [r3, #27] 800b508: b29b uxth r3, r3 log_printf(LOG_INFO, 800b50a: 4a5b ldr r2, [pc, #364] @ (800b678 ) 800b50c: fba2 2303 umull r2, r3, r2, r3 800b510: 08db lsrs r3, r3, #3 800b512: b29b uxth r3, r3 800b514: 63bb str r3, [r7, #56] @ 0x38 (unsigned)(CONN.WantedCurrent % 10u), 800b516: 4b57 ldr r3, [pc, #348] @ (800b674 ) 800b518: f8b3 301b ldrh.w r3, [r3, #27] 800b51c: b29a uxth r2, r3 log_printf(LOG_INFO, 800b51e: 4b56 ldr r3, [pc, #344] @ (800b678 ) 800b520: fba3 1302 umull r1, r3, r3, r2 800b524: 08d9 lsrs r1, r3, #3 800b526: 460b mov r3, r1 800b528: 009b lsls r3, r3, #2 800b52a: 440b add r3, r1 800b52c: 005b lsls r3, r3, #1 800b52e: 1ad3 subs r3, r2, r3 800b530: b29b uxth r3, r3 800b532: 637b str r3, [r7, #52] @ 0x34 800b534: 4b51 ldr r3, [pc, #324] @ (800b67c ) 800b536: 881b ldrh r3, [r3, #0] 800b538: 633b str r3, [r7, #48] @ 0x30 800b53a: 4b51 ldr r3, [pc, #324] @ (800b680 ) 800b53c: 881b ldrh r3, [r3, #0] 800b53e: 4a4e ldr r2, [pc, #312] @ (800b678 ) 800b540: fba2 2303 umull r2, r3, r2, r3 800b544: 08db lsrs r3, r3, #3 800b546: b29b uxth r3, r3 800b548: 62fb str r3, [r7, #44] @ 0x2c 800b54a: 4b4d ldr r3, [pc, #308] @ (800b680 ) 800b54c: 881a ldrh r2, [r3, #0] 800b54e: 4b4a ldr r3, [pc, #296] @ (800b678 ) 800b550: fba3 1302 umull r1, r3, r3, r2 800b554: 08d9 lsrs r1, r3, #3 800b556: 460b mov r3, r1 800b558: 009b lsls r3, r3, #2 800b55a: 440b add r3, r1 800b55c: 005b lsls r3, r3, #1 800b55e: 1ad3 subs r3, r2, r3 800b560: b29b uxth r3, r3 800b562: 62bb str r3, [r7, #40] @ 0x28 (unsigned)psu_last_can_v, (unsigned)(psu_last_can_i_0p1A / 10u), (unsigned)(psu_last_can_i_0p1A % 10u), (unsigned)CONN.MeasuredVoltage, 800b564: 4b43 ldr r3, [pc, #268] @ (800b674 ) 800b566: f8b3 3013 ldrh.w r3, [r3, #19] 800b56a: b29b uxth r3, r3 log_printf(LOG_INFO, 800b56c: 627b str r3, [r7, #36] @ 0x24 (int)(CONN.MeasuredCurrent / 10), 800b56e: 4b41 ldr r3, [pc, #260] @ (800b674 ) 800b570: f8b3 3015 ldrh.w r3, [r3, #21] 800b574: b29b uxth r3, r3 log_printf(LOG_INFO, 800b576: 4a40 ldr r2, [pc, #256] @ (800b678 ) 800b578: fba2 2303 umull r2, r3, r2, r3 800b57c: 08db lsrs r3, r3, #3 800b57e: b29b uxth r3, r3 800b580: 623b str r3, [r7, #32] (unsigned)(((CONN.MeasuredCurrent < 0) ? -CONN.MeasuredCurrent : CONN.MeasuredCurrent) % 10), 800b582: 4b3c ldr r3, [pc, #240] @ (800b674 ) 800b584: f8b3 3015 ldrh.w r3, [r3, #21] 800b588: b29b uxth r3, r3 800b58a: 4619 mov r1, r3 800b58c: 4b3d ldr r3, [pc, #244] @ (800b684 ) 800b58e: fb83 2301 smull r2, r3, r3, r1 800b592: 109a asrs r2, r3, #2 800b594: 17cb asrs r3, r1, #31 800b596: 1ad2 subs r2, r2, r3 800b598: 4613 mov r3, r2 800b59a: 009b lsls r3, r3, #2 800b59c: 4413 add r3, r2 800b59e: 005b lsls r3, r3, #1 800b5a0: 1aca subs r2, r1, r3 log_printf(LOG_INFO, 800b5a2: 61fa str r2, [r7, #28] (unsigned)CONN.EnableOutput, 800b5a4: 4b33 ldr r3, [pc, #204] @ (800b674 ) 800b5a6: 7ddb ldrb r3, [r3, #23] log_printf(LOG_INFO, 800b5a8: 61bb str r3, [r7, #24] (unsigned)CONN.outputEnabled, 800b5aa: 4b32 ldr r3, [pc, #200] @ (800b674 ) 800b5ac: 7e1b ldrb r3, [r3, #24] log_printf(LOG_INFO, 800b5ae: 617b str r3, [r7, #20] (unsigned)PSU0.ready, 800b5b0: 4b2f ldr r3, [pc, #188] @ (800b670 ) 800b5b2: 7a5b ldrb r3, [r3, #9] log_printf(LOG_INFO, 800b5b4: 613b str r3, [r7, #16] (unsigned)PSU0.PSU_enabled, 800b5b6: 4b2e ldr r3, [pc, #184] @ (800b670 ) 800b5b8: 7a9b ldrb r3, [r3, #10] log_printf(LOG_INFO, 800b5ba: 60fb str r3, [r7, #12] (unsigned)PSU0.CONT_enabled, 800b5bc: 4b2c ldr r3, [pc, #176] @ (800b670 ) 800b5be: 7adb ldrb r3, [r3, #11] log_printf(LOG_INFO, 800b5c0: 60bb str r3, [r7, #8] (unsigned)PSU0.enableAC, 800b5c2: 4b2b ldr r3, [pc, #172] @ (800b670 ) 800b5c4: 781b ldrb r3, [r3, #0] log_printf(LOG_INFO, 800b5c6: 607b str r3, [r7, #4] (unsigned)CONN.hv_limit, 800b5c8: 4b2a ldr r3, [pc, #168] @ (800b674 ) 800b5ca: f893 3023 ldrb.w r3, [r3, #35] @ 0x23 log_printf(LOG_INFO, 800b5ce: 603b str r3, [r7, #0] 800b5d0: f897 004b ldrb.w r0, [r7, #75] @ 0x4b (unsigned)block_setpoint, (unsigned)CONN.chargingError, 800b5d4: 4b27 ldr r3, [pc, #156] @ (800b674 ) 800b5d6: 7f5b ldrb r3, [r3, #29] log_printf(LOG_INFO, 800b5d8: 461e mov r6, r3 (unsigned)PSU0.status0.raw, 800b5da: 4b25 ldr r3, [pc, #148] @ (800b670 ) 800b5dc: 7f1b ldrb r3, [r3, #28] log_printf(LOG_INFO, 800b5de: 461d mov r5, r3 (unsigned)PSU0.status1.raw, 800b5e0: 4b23 ldr r3, [pc, #140] @ (800b670 ) 800b5e2: 7f5b ldrb r3, [r3, #29] log_printf(LOG_INFO, 800b5e4: 461c mov r4, r3 (unsigned)PSU0.status2.raw, 800b5e6: 4b22 ldr r3, [pc, #136] @ (800b670 ) 800b5e8: 7f9b ldrb r3, [r3, #30] log_printf(LOG_INFO, 800b5ea: 4619 mov r1, r3 (unsigned long)(can_lastpacket ? (now - can_lastpacket) : 9999u)); 800b5ec: 4b26 ldr r3, [pc, #152] @ (800b688 ) 800b5ee: 681b ldr r3, [r3, #0] log_printf(LOG_INFO, 800b5f0: 2b00 cmp r3, #0 800b5f2: d004 beq.n 800b5fe (unsigned long)(can_lastpacket ? (now - can_lastpacket) : 9999u)); 800b5f4: 4b24 ldr r3, [pc, #144] @ (800b688 ) 800b5f6: 681a ldr r2, [r3, #0] log_printf(LOG_INFO, 800b5f8: 6cfb ldr r3, [r7, #76] @ 0x4c 800b5fa: 1a9b subs r3, r3, r2 800b5fc: e001 b.n 800b602 800b5fe: f242 730f movw r3, #9999 @ 0x270f 800b602: 9317 str r3, [sp, #92] @ 0x5c 800b604: 9116 str r1, [sp, #88] @ 0x58 800b606: 9415 str r4, [sp, #84] @ 0x54 800b608: 9514 str r5, [sp, #80] @ 0x50 800b60a: 9613 str r6, [sp, #76] @ 0x4c 800b60c: 9012 str r0, [sp, #72] @ 0x48 800b60e: 683b ldr r3, [r7, #0] 800b610: 9311 str r3, [sp, #68] @ 0x44 800b612: 687b ldr r3, [r7, #4] 800b614: 9310 str r3, [sp, #64] @ 0x40 800b616: 68bb ldr r3, [r7, #8] 800b618: 930f str r3, [sp, #60] @ 0x3c 800b61a: 68fb ldr r3, [r7, #12] 800b61c: 930e str r3, [sp, #56] @ 0x38 800b61e: 693b ldr r3, [r7, #16] 800b620: 930d str r3, [sp, #52] @ 0x34 800b622: 697b ldr r3, [r7, #20] 800b624: 930c str r3, [sp, #48] @ 0x30 800b626: 69bb ldr r3, [r7, #24] 800b628: 930b str r3, [sp, #44] @ 0x2c 800b62a: 69fb ldr r3, [r7, #28] 800b62c: 930a str r3, [sp, #40] @ 0x28 800b62e: 6a3b ldr r3, [r7, #32] 800b630: 9309 str r3, [sp, #36] @ 0x24 800b632: 6a7b ldr r3, [r7, #36] @ 0x24 800b634: 9308 str r3, [sp, #32] 800b636: 6abb ldr r3, [r7, #40] @ 0x28 800b638: 9307 str r3, [sp, #28] 800b63a: 6afb ldr r3, [r7, #44] @ 0x2c 800b63c: 9306 str r3, [sp, #24] 800b63e: 6b3b ldr r3, [r7, #48] @ 0x30 800b640: 9305 str r3, [sp, #20] 800b642: 6b7b ldr r3, [r7, #52] @ 0x34 800b644: 9304 str r3, [sp, #16] 800b646: 6bbb ldr r3, [r7, #56] @ 0x38 800b648: 9303 str r3, [sp, #12] 800b64a: 6bfb ldr r3, [r7, #60] @ 0x3c 800b64c: 9302 str r3, [sp, #8] 800b64e: 6c3b ldr r3, [r7, #64] @ 0x40 800b650: 9301 str r3, [sp, #4] 800b652: 6c7b ldr r3, [r7, #68] @ 0x44 800b654: 9300 str r3, [sp, #0] 800b656: 4673 mov r3, lr 800b658: 4662 mov r2, ip 800b65a: 490c ldr r1, [pc, #48] @ (800b68c ) 800b65c: 2007 movs r0, #7 800b65e: f7fe fff3 bl 800a648 800b662: e000 b.n 800b666 return; 800b664: bf00 nop } 800b666: 3754 adds r7, #84 @ 0x54 800b668: 46bd mov sp, r7 800b66a: bdf0 pop {r4, r5, r6, r7, pc} 800b66c: 20000954 .word 0x20000954 800b670: 2000092c .word 0x2000092c 800b674: 200003b0 .word 0x200003b0 800b678: cccccccd .word 0xcccccccd 800b67c: 20000950 .word 0x20000950 800b680: 20000952 .word 0x20000952 800b684: 66666667 .word 0x66666667 800b688: 2000094c .word 0x2000094c 800b68c: 0801851c .word 0x0801851c 0800b690 : static void PSU_HvControl(void) { 800b690: b580 push {r7, lr} 800b692: b082 sub sp, #8 800b694: af02 add r7, sp, #8 if (CONN.EnableOutput == 0u) { 800b696: 4b8e ldr r3, [pc, #568] @ (800b8d0 ) 800b698: 7ddb ldrb r3, [r3, #23] 800b69a: 2b00 cmp r3, #0 800b69c: d123 bne.n 800b6e6 if ((CONN.hv_limit != 0u) || (CONN.hv_limit_count != 0u)) { 800b69e: 4b8c ldr r3, [pc, #560] @ (800b8d0 ) 800b6a0: f893 3023 ldrb.w r3, [r3, #35] @ 0x23 800b6a4: 2b00 cmp r3, #0 800b6a6: d104 bne.n 800b6b2 800b6a8: 4b89 ldr r3, [pc, #548] @ (800b8d0 ) 800b6aa: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800b6ae: 2b00 cmp r3, #0 800b6b0: d003 beq.n 800b6ba log_printf(LOG_INFO, "HV limit reset output off\n"); 800b6b2: 4988 ldr r1, [pc, #544] @ (800b8d4 ) 800b6b4: 2007 movs r0, #7 800b6b6: f7fe ffc7 bl 800a648 } CONN.hv_limit = 0u; 800b6ba: 4b85 ldr r3, [pc, #532] @ (800b8d0 ) 800b6bc: 2200 movs r2, #0 800b6be: f883 2023 strb.w r2, [r3, #35] @ 0x23 CONN.hv_tick = 0u; 800b6c2: 4b83 ldr r3, [pc, #524] @ (800b8d0 ) 800b6c4: 2200 movs r2, #0 800b6c6: f883 2024 strb.w r2, [r3, #36] @ 0x24 800b6ca: 2200 movs r2, #0 800b6cc: f883 2025 strb.w r2, [r3, #37] @ 0x25 800b6d0: 2200 movs r2, #0 800b6d2: f883 2026 strb.w r2, [r3, #38] @ 0x26 800b6d6: 2200 movs r2, #0 800b6d8: f883 2027 strb.w r2, [r3, #39] @ 0x27 CONN.hv_limit_count = 0u; 800b6dc: 4b7c ldr r3, [pc, #496] @ (800b8d0 ) 800b6de: 2200 movs r2, #0 800b6e0: f883 2028 strb.w r2, [r3, #40] @ 0x28 return; 800b6e4: e0f2 b.n 800b8cc } if (!PSU0.online) { 800b6e6: 4b7c ldr r3, [pc, #496] @ (800b8d8 ) 800b6e8: 7a1b ldrb r3, [r3, #8] 800b6ea: 2b00 cmp r3, #0 800b6ec: d123 bne.n 800b736 if ((CONN.hv_limit != 0u) || (CONN.hv_limit_count != 0u)) { 800b6ee: 4b78 ldr r3, [pc, #480] @ (800b8d0 ) 800b6f0: f893 3023 ldrb.w r3, [r3, #35] @ 0x23 800b6f4: 2b00 cmp r3, #0 800b6f6: d104 bne.n 800b702 800b6f8: 4b75 ldr r3, [pc, #468] @ (800b8d0 ) 800b6fa: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800b6fe: 2b00 cmp r3, #0 800b700: d003 beq.n 800b70a log_printf(LOG_INFO, "HV limit reset no PSU\n"); 800b702: 4976 ldr r1, [pc, #472] @ (800b8dc ) 800b704: 2007 movs r0, #7 800b706: f7fe ff9f bl 800a648 } CONN.hv_limit = 0u; 800b70a: 4b71 ldr r3, [pc, #452] @ (800b8d0 ) 800b70c: 2200 movs r2, #0 800b70e: f883 2023 strb.w r2, [r3, #35] @ 0x23 CONN.hv_tick = 0u; 800b712: 4b6f ldr r3, [pc, #444] @ (800b8d0 ) 800b714: 2200 movs r2, #0 800b716: f883 2024 strb.w r2, [r3, #36] @ 0x24 800b71a: 2200 movs r2, #0 800b71c: f883 2025 strb.w r2, [r3, #37] @ 0x25 800b720: 2200 movs r2, #0 800b722: f883 2026 strb.w r2, [r3, #38] @ 0x26 800b726: 2200 movs r2, #0 800b728: f883 2027 strb.w r2, [r3, #39] @ 0x27 CONN.hv_limit_count = 0u; 800b72c: 4b68 ldr r3, [pc, #416] @ (800b8d0 ) 800b72e: 2200 movs r2, #0 800b730: f883 2028 strb.w r2, [r3, #40] @ 0x28 return; 800b734: e0ca b.n 800b8cc } if (CONN.hv_limit == 0u) { 800b736: 4b66 ldr r3, [pc, #408] @ (800b8d0 ) 800b738: f893 3023 ldrb.w r3, [r3, #35] @ 0x23 800b73c: 2b00 cmp r3, #0 800b73e: d16e bne.n 800b81e if ((CONN.hv_limit_count < PSU_HV_LIMIT_MAX_COUNT) && 800b740: 4b63 ldr r3, [pc, #396] @ (800b8d0 ) 800b742: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800b746: 2b02 cmp r3, #2 800b748: d85b bhi.n 800b802 (CONN.MeasuredVoltage < PSU_HV_LIMIT_ON_THRESHOLD) && 800b74a: 4b61 ldr r3, [pc, #388] @ (800b8d0 ) 800b74c: f8b3 3013 ldrh.w r3, [r3, #19] 800b750: b29b uxth r3, r3 if ((CONN.hv_limit_count < PSU_HV_LIMIT_MAX_COUNT) && 800b752: f5b3 7ff0 cmp.w r3, #480 @ 0x1e0 800b756: d254 bcs.n 800b802 (CONN.MeasuredCurrent > PSU_HV_LOAD_CURRENT)) { 800b758: 4b5d ldr r3, [pc, #372] @ (800b8d0 ) 800b75a: f8b3 3015 ldrh.w r3, [r3, #21] 800b75e: b29b uxth r3, r3 (CONN.MeasuredVoltage < PSU_HV_LIMIT_ON_THRESHOLD) && 800b760: f5b3 7f96 cmp.w r3, #300 @ 0x12c 800b764: d94d bls.n 800b802 if (CONN.hv_tick == 0u) { 800b766: 4b5a ldr r3, [pc, #360] @ (800b8d0 ) 800b768: 6a5b ldr r3, [r3, #36] @ 0x24 800b76a: 2b00 cmp r3, #0 800b76c: d105 bne.n 800b77a CONN.hv_tick = HAL_GetTick(); 800b76e: f003 ff67 bl 800f640 800b772: 4603 mov r3, r0 800b774: 4a56 ldr r2, [pc, #344] @ (800b8d0 ) 800b776: 6253 str r3, [r2, #36] @ 0x24 if (CONN.hv_tick == 0u) { 800b778: e0a5 b.n 800b8c6 } else if ((HAL_GetTick() - CONN.hv_tick) >= PSU_HV_SWITCH_DELAY_MS) { 800b77a: f003 ff61 bl 800f640 800b77e: 4602 mov r2, r0 800b780: 4b53 ldr r3, [pc, #332] @ (800b8d0 ) 800b782: 6a5b ldr r3, [r3, #36] @ 0x24 800b784: 1ad3 subs r3, r2, r3 800b786: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800b78a: f0c0 809c bcc.w 800b8c6 CONN.hv_limit = 1u; 800b78e: 4b50 ldr r3, [pc, #320] @ (800b8d0 ) 800b790: 2201 movs r2, #1 800b792: f883 2023 strb.w r2, [r3, #35] @ 0x23 CONN.hv_limit_count++; 800b796: 4b4e ldr r3, [pc, #312] @ (800b8d0 ) 800b798: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800b79c: 3301 adds r3, #1 800b79e: b2da uxtb r2, r3 800b7a0: 4b4b ldr r3, [pc, #300] @ (800b8d0 ) 800b7a2: f883 2028 strb.w r2, [r3, #40] @ 0x28 CONN.hv_tick = 0u; 800b7a6: 4b4a ldr r3, [pc, #296] @ (800b8d0 ) 800b7a8: 2200 movs r2, #0 800b7aa: f883 2024 strb.w r2, [r3, #36] @ 0x24 800b7ae: 2200 movs r2, #0 800b7b0: f883 2025 strb.w r2, [r3, #37] @ 0x25 800b7b4: 2200 movs r2, #0 800b7b6: f883 2026 strb.w r2, [r3, #38] @ 0x26 800b7ba: 2200 movs r2, #0 800b7bc: f883 2027 strb.w r2, [r3, #39] @ 0x27 log_printf(LOG_WARN, "HV limit ON V=%d I=%d cnt=%d\n", (int)CONN.MeasuredVoltage, 800b7c0: 4b43 ldr r3, [pc, #268] @ (800b8d0 ) 800b7c2: f8b3 3013 ldrh.w r3, [r3, #19] 800b7c6: b29b uxth r3, r3 log_printf(LOG_WARN, "HV limit ON V=%d I=%d cnt=%d\n", 800b7c8: 461a mov r2, r3 (int)CONN.MeasuredCurrent, 800b7ca: 4b41 ldr r3, [pc, #260] @ (800b8d0 ) 800b7cc: f8b3 3015 ldrh.w r3, [r3, #21] 800b7d0: b29b uxth r3, r3 log_printf(LOG_WARN, "HV limit ON V=%d I=%d cnt=%d\n", 800b7d2: 4619 mov r1, r3 (int)CONN.hv_limit_count); 800b7d4: 4b3e ldr r3, [pc, #248] @ (800b8d0 ) 800b7d6: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 log_printf(LOG_WARN, "HV limit ON V=%d I=%d cnt=%d\n", 800b7da: 9300 str r3, [sp, #0] 800b7dc: 460b mov r3, r1 800b7de: 4940 ldr r1, [pc, #256] @ (800b8e0 ) 800b7e0: 2005 movs r0, #5 800b7e2: f7fe ff31 bl 800a648 if (CONN.hv_limit_count >= PSU_HV_LIMIT_MAX_COUNT) { 800b7e6: 4b3a ldr r3, [pc, #232] @ (800b8d0 ) 800b7e8: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800b7ec: 2b02 cmp r3, #2 800b7ee: d96a bls.n 800b8c6 log_printf(LOG_WARN, "HV limit locked cnt=%d\n", (int)CONN.hv_limit_count); 800b7f0: 4b37 ldr r3, [pc, #220] @ (800b8d0 ) 800b7f2: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 log_printf(LOG_WARN, "HV limit locked cnt=%d\n", 800b7f6: 461a mov r2, r3 800b7f8: 493a ldr r1, [pc, #232] @ (800b8e4 ) 800b7fa: 2005 movs r0, #5 800b7fc: f7fe ff24 bl 800a648 if (CONN.hv_tick == 0u) { 800b800: e061 b.n 800b8c6 } } } else { CONN.hv_tick = 0u; 800b802: 4b33 ldr r3, [pc, #204] @ (800b8d0 ) 800b804: 2200 movs r2, #0 800b806: f883 2024 strb.w r2, [r3, #36] @ 0x24 800b80a: 2200 movs r2, #0 800b80c: f883 2025 strb.w r2, [r3, #37] @ 0x25 800b810: 2200 movs r2, #0 800b812: f883 2026 strb.w r2, [r3, #38] @ 0x26 800b816: 2200 movs r2, #0 800b818: f883 2027 strb.w r2, [r3, #39] @ 0x27 800b81c: e056 b.n 800b8cc } } else { if ((CONN.MeasuredVoltage > PSU_HV_LIMIT_OFF_THRESHOLD) || 800b81e: 4b2c ldr r3, [pc, #176] @ (800b8d0 ) 800b820: f8b3 3013 ldrh.w r3, [r3, #19] 800b824: b29b uxth r3, r3 800b826: f5b3 7ff8 cmp.w r3, #496 @ 0x1f0 800b82a: d206 bcs.n 800b83a (CONN.MeasuredCurrent <= PSU_HV_LOAD_CURRENT)) { 800b82c: 4b28 ldr r3, [pc, #160] @ (800b8d0 ) 800b82e: f8b3 3015 ldrh.w r3, [r3, #21] 800b832: b29b uxth r3, r3 if ((CONN.MeasuredVoltage > PSU_HV_LIMIT_OFF_THRESHOLD) || 800b834: f5b3 7f96 cmp.w r3, #300 @ 0x12c 800b838: d837 bhi.n 800b8aa if (CONN.hv_tick == 0u) { 800b83a: 4b25 ldr r3, [pc, #148] @ (800b8d0 ) 800b83c: 6a5b ldr r3, [r3, #36] @ 0x24 800b83e: 2b00 cmp r3, #0 800b840: d105 bne.n 800b84e CONN.hv_tick = HAL_GetTick(); 800b842: f003 fefd bl 800f640 800b846: 4603 mov r3, r0 800b848: 4a21 ldr r2, [pc, #132] @ (800b8d0 ) 800b84a: 6253 str r3, [r2, #36] @ 0x24 if (CONN.hv_tick == 0u) { 800b84c: e03d b.n 800b8ca } else if ((HAL_GetTick() - CONN.hv_tick) >= PSU_HV_SWITCH_DELAY_MS) { 800b84e: f003 fef7 bl 800f640 800b852: 4602 mov r2, r0 800b854: 4b1e ldr r3, [pc, #120] @ (800b8d0 ) 800b856: 6a5b ldr r3, [r3, #36] @ 0x24 800b858: 1ad3 subs r3, r2, r3 800b85a: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800b85e: d334 bcc.n 800b8ca CONN.hv_limit = 0u; 800b860: 4b1b ldr r3, [pc, #108] @ (800b8d0 ) 800b862: 2200 movs r2, #0 800b864: f883 2023 strb.w r2, [r3, #35] @ 0x23 CONN.hv_tick = 0u; 800b868: 4b19 ldr r3, [pc, #100] @ (800b8d0 ) 800b86a: 2200 movs r2, #0 800b86c: f883 2024 strb.w r2, [r3, #36] @ 0x24 800b870: 2200 movs r2, #0 800b872: f883 2025 strb.w r2, [r3, #37] @ 0x25 800b876: 2200 movs r2, #0 800b878: f883 2026 strb.w r2, [r3, #38] @ 0x26 800b87c: 2200 movs r2, #0 800b87e: f883 2027 strb.w r2, [r3, #39] @ 0x27 log_printf(LOG_INFO, "HV limit OFF V=%d I=%d cnt=%d\n", (int)CONN.MeasuredVoltage, 800b882: 4b13 ldr r3, [pc, #76] @ (800b8d0 ) 800b884: f8b3 3013 ldrh.w r3, [r3, #19] 800b888: b29b uxth r3, r3 log_printf(LOG_INFO, "HV limit OFF V=%d I=%d cnt=%d\n", 800b88a: 461a mov r2, r3 (int)CONN.MeasuredCurrent, 800b88c: 4b10 ldr r3, [pc, #64] @ (800b8d0 ) 800b88e: f8b3 3015 ldrh.w r3, [r3, #21] 800b892: b29b uxth r3, r3 log_printf(LOG_INFO, "HV limit OFF V=%d I=%d cnt=%d\n", 800b894: 4619 mov r1, r3 (int)CONN.hv_limit_count); 800b896: 4b0e ldr r3, [pc, #56] @ (800b8d0 ) 800b898: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 log_printf(LOG_INFO, "HV limit OFF V=%d I=%d cnt=%d\n", 800b89c: 9300 str r3, [sp, #0] 800b89e: 460b mov r3, r1 800b8a0: 4911 ldr r1, [pc, #68] @ (800b8e8 ) 800b8a2: 2007 movs r0, #7 800b8a4: f7fe fed0 bl 800a648 if (CONN.hv_tick == 0u) { 800b8a8: e00f b.n 800b8ca } } else { CONN.hv_tick = 0u; 800b8aa: 4b09 ldr r3, [pc, #36] @ (800b8d0 ) 800b8ac: 2200 movs r2, #0 800b8ae: f883 2024 strb.w r2, [r3, #36] @ 0x24 800b8b2: 2200 movs r2, #0 800b8b4: f883 2025 strb.w r2, [r3, #37] @ 0x25 800b8b8: 2200 movs r2, #0 800b8ba: f883 2026 strb.w r2, [r3, #38] @ 0x26 800b8be: 2200 movs r2, #0 800b8c0: f883 2027 strb.w r2, [r3, #39] @ 0x27 800b8c4: e002 b.n 800b8cc if (CONN.hv_tick == 0u) { 800b8c6: bf00 nop 800b8c8: e000 b.n 800b8cc if (CONN.hv_tick == 0u) { 800b8ca: bf00 nop } } } 800b8cc: 46bd mov sp, r7 800b8ce: bd80 pop {r7, pc} 800b8d0: 200003b0 .word 0x200003b0 800b8d4: 080185dc .word 0x080185dc 800b8d8: 2000092c .word 0x2000092c 800b8dc: 080185f8 .word 0x080185f8 800b8e0: 08018610 .word 0x08018610 800b8e4: 08018630 .word 0x08018630 800b8e8: 08018648 .word 0x08018648 0800b8ec : static void PSU_SwitchState(PSU_State_t state){ 800b8ec: b5f0 push {r4, r5, r6, r7, lr} 800b8ee: b089 sub sp, #36 @ 0x24 800b8f0: af06 add r7, sp, #24 800b8f2: 4603 mov r3, r0 800b8f4: 71fb strb r3, [r7, #7] if (PSU0.state != state) { 800b8f6: 4b1a ldr r3, [pc, #104] @ (800b960 ) 800b8f8: 79db ldrb r3, [r3, #7] 800b8fa: 79fa ldrb r2, [r7, #7] 800b8fc: 429a cmp r2, r3 800b8fe: d022 beq.n 800b946 log_printf(LOG_INFO, 800b900: 4b17 ldr r3, [pc, #92] @ (800b960 ) 800b902: 79db ldrb r3, [r3, #7] 800b904: 4618 mov r0, r3 800b906: f7ff fd45 bl 800b394 800b90a: 4604 mov r4, r0 800b90c: 79fb ldrb r3, [r7, #7] 800b90e: 4618 mov r0, r3 800b910: f7ff fd40 bl 800b394 800b914: 4603 mov r3, r0 "PSU st %s->%s enOut=%u rdy=%u on=%u cont=%u err=%u\n", PSU_StateName(PSU0.state), PSU_StateName(state), (unsigned)CONN.EnableOutput, 800b916: 4a13 ldr r2, [pc, #76] @ (800b964 ) 800b918: 7dd2 ldrb r2, [r2, #23] log_printf(LOG_INFO, 800b91a: 4611 mov r1, r2 (unsigned)PSU0.ready, 800b91c: 4a10 ldr r2, [pc, #64] @ (800b960 ) 800b91e: 7a52 ldrb r2, [r2, #9] log_printf(LOG_INFO, 800b920: 4610 mov r0, r2 (unsigned)PSU0.PSU_enabled, 800b922: 4a0f ldr r2, [pc, #60] @ (800b960 ) 800b924: 7a92 ldrb r2, [r2, #10] log_printf(LOG_INFO, 800b926: 4615 mov r5, r2 (unsigned)PSU0.CONT_enabled, 800b928: 4a0d ldr r2, [pc, #52] @ (800b960 ) 800b92a: 7ad2 ldrb r2, [r2, #11] log_printf(LOG_INFO, 800b92c: 4616 mov r6, r2 (unsigned)CONN.chargingError); 800b92e: 4a0d ldr r2, [pc, #52] @ (800b964 ) 800b930: 7f52 ldrb r2, [r2, #29] log_printf(LOG_INFO, 800b932: 9204 str r2, [sp, #16] 800b934: 9603 str r6, [sp, #12] 800b936: 9502 str r5, [sp, #8] 800b938: 9001 str r0, [sp, #4] 800b93a: 9100 str r1, [sp, #0] 800b93c: 4622 mov r2, r4 800b93e: 490a ldr r1, [pc, #40] @ (800b968 ) 800b940: 2007 movs r0, #7 800b942: f7fe fe81 bl 800a648 } PSU0.state = state; 800b946: 4a06 ldr r2, [pc, #24] @ (800b960 ) 800b948: 79fb ldrb r3, [r7, #7] 800b94a: 71d3 strb r3, [r2, #7] PSU0.statetick = HAL_GetTick(); 800b94c: f003 fe78 bl 800f640 800b950: 4603 mov r3, r0 800b952: 4a03 ldr r2, [pc, #12] @ (800b960 ) 800b954: 6113 str r3, [r2, #16] } 800b956: bf00 nop 800b958: 370c adds r7, #12 800b95a: 46bd mov sp, r7 800b95c: bdf0 pop {r4, r5, r6, r7, pc} 800b95e: bf00 nop 800b960: 2000092c .word 0x2000092c 800b964: 200003b0 .word 0x200003b0 800b968: 08018668 .word 0x08018668 0800b96c : static uint32_t PSU_StateTime(void){ 800b96c: b580 push {r7, lr} 800b96e: af00 add r7, sp, #0 return HAL_GetTick() - PSU0.statetick; 800b970: f003 fe66 bl 800f640 800b974: 4602 mov r2, r0 800b976: 4b02 ldr r3, [pc, #8] @ (800b980 ) 800b978: 691b ldr r3, [r3, #16] 800b97a: 1ad3 subs r3, r2, r3 } 800b97c: 4618 mov r0, r3 800b97e: bd80 pop {r7, pc} 800b980: 2000092c .word 0x2000092c 0800b984 : static void PSU_FastDischarge_PushTarget(void) { 800b984: b580 push {r7, lr} 800b986: b082 sub sp, #8 800b988: af00 add r7, sp, #0 PowerSetpoint_t fd_sp; PowerSetpoint_GetFastDischargeTarget(&fd_sp); 800b98a: 1d3b adds r3, r7, #4 800b98c: 4618 mov r0, r3 800b98e: f7ff fc1d bl 800b1cc PSU_SetVoltageCurrent(0, fd_sp.voltage_V, fd_sp.current_0p1A); 800b992: 88bb ldrh r3, [r7, #4] 800b994: 88fa ldrh r2, [r7, #6] 800b996: 4619 mov r1, r3 800b998: 2000 movs r0, #0 800b99a: f000 f941 bl 800bc20 PSU_Enable(0, 1); 800b99e: 2101 movs r1, #1 800b9a0: 2000 movs r0, #0 800b9a2: f000 f90d bl 800bbc0 } 800b9a6: bf00 nop 800b9a8: 3708 adds r7, #8 800b9aa: 46bd mov sp, r7 800b9ac: bd80 pop {r7, pc} 800b9ae: bf00 nop 0800b9b0 : static void PSU_FastDischarge_AbortToConnected(void) { 800b9b0: b580 push {r7, lr} 800b9b2: af00 add r7, sp, #0 PowerSetpoint_OnFastDischargeAbort(); 800b9b4: f7ff fc4a bl 800b24c if (!PSU0.PSU_enabled) { 800b9b8: 4b05 ldr r3, [pc, #20] @ (800b9d0 ) 800b9ba: 7a9b ldrb r3, [r3, #10] 800b9bc: 2b00 cmp r3, #0 800b9be: d101 bne.n 800b9c4 PSU_FastDischarge_PushTarget(); 800b9c0: f7ff ffe0 bl 800b984 } PSU_SwitchState(PSU_CONNECTED); 800b9c4: 2005 movs r0, #5 800b9c6: f7ff ff91 bl 800b8ec } 800b9ca: bf00 nop 800b9cc: bd80 pop {r7, pc} 800b9ce: bf00 nop 800b9d0: 2000092c .word 0x2000092c 0800b9d4 : ISR_FAST void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan){ 800b9d4: b538 push {r3, r4, r5, lr} static CAN_RxHeaderTypeDef RxHeader; static uint8_t RxData[8] = {0,}; CanId_t CanId; if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO1, &RxHeader, RxData) == HAL_OK) 800b9d6: 4c41 ldr r4, [pc, #260] @ (800badc ) 800b9d8: 4d41 ldr r5, [pc, #260] @ (800bae0 ) 800b9da: 4623 mov r3, r4 800b9dc: 462a mov r2, r5 800b9de: 2101 movs r1, #1 800b9e0: f004 ff08 bl 80107f4 800b9e4: b910 cbnz r0, 800b9ec { memcpy(&CanId, &RxHeader.ExtId, sizeof(CanId_t)); 800b9e6: 686d ldr r5, [r5, #4] /* Для DC30 поддерживается только один силовой модуль (source == 0) */ if(CanId.source != 0) return; 800b9e8: b2eb uxtb r3, r5 800b9ea: b103 cbz r3, 800b9ee CONN.outputEnabled = PSU0.PSU_enabled; } } } } } 800b9ec: bd38 pop {r3, r4, r5, pc} can_lastpacket = HAL_GetTick(); 800b9ee: f003 fe27 bl 800f640 if(CanId.command==0x02){ 800b9f2: f3c5 4505 ubfx r5, r5, #16, #6 can_lastpacket = HAL_GetTick(); 800b9f6: 4b3b ldr r3, [pc, #236] @ (800bae4 ) if(CanId.command==0x02){ 800b9f8: 2d02 cmp r5, #2 can_lastpacket = HAL_GetTick(); 800b9fa: 6018 str r0, [r3, #0] if(CanId.command==0x02){ 800b9fc: d010 beq.n 800ba20 if(CanId.command==0x04){ 800b9fe: 2d04 cmp r5, #4 800ba00: d114 bne.n 800ba2c memcpy(&PSU_04, RxData, 8); 800ba02: e894 0003 ldmia.w r4, {r0, r1} 800ba06: 4b38 ldr r3, [pc, #224] @ (800bae8 ) PSU0.tempAmbient = PSU_04.moduleTemperature; 800ba08: 4a38 ldr r2, [pc, #224] @ (800baec ) memcpy(&PSU_04, RxData, 8); 800ba0a: e883 0003 stmia.w r3, {r0, r1} PSU0.status0.raw = PSU_04.modularForm0; 800ba0e: 7a18 ldrb r0, [r3, #8] PSU0.tempAmbient = PSU_04.moduleTemperature; 800ba10: 791c ldrb r4, [r3, #4] PSU0.status1.raw = PSU_04.modularForm1; 800ba12: 79d9 ldrb r1, [r3, #7] PSU0.status2.raw = PSU_04.modularForm2; 800ba14: 799b ldrb r3, [r3, #6] PSU0.tempAmbient = PSU_04.moduleTemperature; 800ba16: 6194 str r4, [r2, #24] PSU0.status0.raw = PSU_04.modularForm0; 800ba18: 7710 strb r0, [r2, #28] PSU0.status1.raw = PSU_04.modularForm1; 800ba1a: 7751 strb r1, [r2, #29] PSU0.status2.raw = PSU_04.modularForm2; 800ba1c: 7793 strb r3, [r2, #30] } 800ba1e: bd38 pop {r3, r4, r5, pc} memcpy(&PSU_02, RxData, 8); 800ba20: 4b33 ldr r3, [pc, #204] @ (800baf0 ) 800ba22: e894 0003 ldmia.w r4, {r0, r1} 800ba26: e883 0003 stmia.w r3, {r0, r1} } 800ba2a: bd38 pop {r3, r4, r5, pc} if(CanId.command==0x06){ 800ba2c: 2d06 cmp r5, #6 800ba2e: d111 bne.n 800ba54 memcpy(&PSU_06, RxData, 8); 800ba30: e894 0003 ldmia.w r4, {r0, r1} 800ba34: 4b2f ldr r3, [pc, #188] @ (800baf4 ) 800ba36: e883 0003 stmia.w r3, {r0, r1} PSU_06.VAB = PSU_06.VABLo+(PSU_06.VABHi<<8); 800ba3a: 8818 ldrh r0, [r3, #0] PSU_06.VBC = PSU_06.VBCLo+(PSU_06.VBCHi<<8); 800ba3c: 8859 ldrh r1, [r3, #2] PSU_06.VCA = PSU_06.VCALo+(PSU_06.VCAHi<<8); 800ba3e: 889a ldrh r2, [r3, #4] PSU_06.VAB = PSU_06.VABLo+(PSU_06.VABHi<<8); 800ba40: ba40 rev16 r0, r0 PSU_06.VBC = PSU_06.VBCLo+(PSU_06.VBCHi<<8); 800ba42: ba49 rev16 r1, r1 PSU_06.VCA = PSU_06.VCALo+(PSU_06.VCAHi<<8); 800ba44: ba52 rev16 r2, r2 PSU_06.VAB = PSU_06.VABLo+(PSU_06.VABHi<<8); 800ba46: b280 uxth r0, r0 PSU_06.VBC = PSU_06.VBCLo+(PSU_06.VBCHi<<8); 800ba48: b289 uxth r1, r1 PSU_06.VCA = PSU_06.VCALo+(PSU_06.VCAHi<<8); 800ba4a: b292 uxth r2, r2 PSU_06.VBC = PSU_06.VBCLo+(PSU_06.VBCHi<<8); 800ba4c: e9c3 0102 strd r0, r1, [r3, #8] PSU_06.VCA = PSU_06.VCALo+(PSU_06.VCAHi<<8); 800ba50: 611a str r2, [r3, #16] } 800ba52: bd38 pop {r3, r4, r5, pc} if(CanId.command==0x08){ 800ba54: 2d08 cmp r5, #8 800ba56: d03a beq.n 800bace if(CanId.command==0x09){ 800ba58: 2d09 cmp r5, #9 800ba5a: d1c7 bne.n 800b9ec memcpy(&PSU_09, RxData, 8); 800ba5c: e894 0003 ldmia.w r4, {r0, r1} PSU0.temperature = PSU_04.moduleTemperature; 800ba60: 4b21 ldr r3, [pc, #132] @ (800bae8 ) memcpy(&PSU_09, RxData, 8); 800ba62: 4d25 ldr r5, [pc, #148] @ (800baf8 ) PSU0.outputVoltage = v; 800ba64: 4c21 ldr r4, [pc, #132] @ (800baec ) PSU0.temperature = PSU_04.moduleTemperature; 800ba66: f893 c004 ldrb.w ip, [r3, #4] uint16_t v = PSU_09.moduleNVoltage / 1000; 800ba6a: 4a24 ldr r2, [pc, #144] @ (800bafc ) memcpy(&PSU_09, RxData, 8); 800ba6c: e885 0003 stmia.w r5, {r0, r1} PSU_09.moduleNCurrent = PSU_09.moduleNCurrent_[3]; 800ba70: ba00 rev r0, r0 PSU0.temperature = PSU_04.moduleTemperature; 800ba72: f884 c006 strb.w ip, [r4, #6] uint16_t v = PSU_09.moduleNVoltage / 1000; 800ba76: fba2 c200 umull ip, r2, r2, r0 800ba7a: ba09 rev r1, r1 PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[0]<<24; 800ba7c: e9c5 0102 strd r0, r1, [r5, #8] uint16_t v = PSU_09.moduleNVoltage / 1000; 800ba80: f3c2 108f ubfx r0, r2, #6, #16 PSU0.PSU_enabled = (v >= PSU_VOLTAGE_THRESHOLD); 800ba84: 2813 cmp r0, #19 PSU0.online = 1; 800ba86: f04f 0e01 mov.w lr, #1 PSU0.PSU_enabled = (v >= PSU_VOLTAGE_THRESHOLD); 800ba8a: bf94 ite ls 800ba8c: 2500 movls r5, #0 800ba8e: 2501 movhi r5, #1 int16_t i = PSU_09.moduleNCurrent / 100; 800ba90: 4b1b ldr r3, [pc, #108] @ (800bb00 ) PSU0.online = 1; 800ba92: f884 e008 strb.w lr, [r4, #8] int16_t i = PSU_09.moduleNCurrent / 100; 800ba96: fba3 c301 umull ip, r3, r3, r1 if(PSU0.state >= PSU_READY){ 800ba9a: 79e1 ldrb r1, [r4, #7] int16_t i = PSU_09.moduleNCurrent / 100; 800ba9c: 095b lsrs r3, r3, #5 if(PSU0.state >= PSU_READY){ 800ba9e: 4571 cmp r1, lr PSU0.outputVoltage = v; 800baa0: 8060 strh r0, [r4, #2] int16_t i = PSU_09.moduleNCurrent / 100; 800baa2: 80a3 strh r3, [r4, #4] uint16_t v = PSU_09.moduleNVoltage / 1000; 800baa4: ea4f 1292 mov.w r2, r2, lsr #6 PSU0.PSU_enabled = (v >= PSU_VOLTAGE_THRESHOLD); 800baa8: 72a5 strb r5, [r4, #10] if(PSU0.state >= PSU_READY){ 800baaa: d99f bls.n 800b9ec CONN.Power = CONN.MeasuredCurrent * CONN.MeasuredVoltage / 10; 800baac: b299 uxth r1, r3 800baae: b292 uxth r2, r2 800bab0: fb01 f202 mul.w r2, r1, r2 800bab4: 4c13 ldr r4, [pc, #76] @ (800bb04 ) CONN.MeasuredVoltage = PSU0.outputVoltage; 800bab6: 4914 ldr r1, [pc, #80] @ (800bb08 ) CONN.Power = CONN.MeasuredCurrent * CONN.MeasuredVoltage / 10; 800bab8: fba4 4202 umull r4, r2, r4, r2 CONN.MeasuredCurrent = PSU0.outputCurrent; 800babc: f8a1 3015 strh.w r3, [r1, #21] CONN.outputEnabled = PSU0.PSU_enabled; 800bac0: 760d strb r5, [r1, #24] CONN.Power = CONN.MeasuredCurrent * CONN.MeasuredVoltage / 10; 800bac2: 08d3 lsrs r3, r2, #3 CONN.MeasuredVoltage = PSU0.outputVoltage; 800bac4: f8a1 0013 strh.w r0, [r1, #19] CONN.Power = CONN.MeasuredCurrent * CONN.MeasuredVoltage / 10; 800bac8: f8c1 3003 str.w r3, [r1, #3] } 800bacc: bd38 pop {r3, r4, r5, pc} memcpy(&PSU_08, RxData, 8); 800bace: 4b0f ldr r3, [pc, #60] @ (800bb0c ) 800bad0: e894 0003 ldmia.w r4, {r0, r1} 800bad4: e883 0003 stmia.w r3, {r0, r1} } 800bad8: bd38 pop {r3, r4, r5, pc} 800bada: bf00 nop 800badc: 20000974 .word 0x20000974 800bae0: 20000958 .word 0x20000958 800bae4: 2000094c .word 0x2000094c 800bae8: 200008f4 .word 0x200008f4 800baec: 2000092c .word 0x2000092c 800baf0: 200008e8 .word 0x200008e8 800baf4: 20000900 .word 0x20000900 800baf8: 2000091c .word 0x2000091c 800bafc: 10624dd3 .word 0x10624dd3 800bb00: 51eb851f .word 0x51eb851f 800bb04: cccccccd .word 0xcccccccd 800bb08: 200003b0 .word 0x200003b0 800bb0c: 20000914 .word 0x20000914 0800bb10 : void PSU_CAN_FilterInit(){ 800bb10: b580 push {r7, lr} 800bb12: b08a sub sp, #40 @ 0x28 800bb14: af00 add r7, sp, #0 CAN_FilterTypeDef sFilterConfig; sFilterConfig.FilterBank = 14; 800bb16: 230e movs r3, #14 800bb18: 617b str r3, [r7, #20] sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; 800bb1a: 2300 movs r3, #0 800bb1c: 61bb str r3, [r7, #24] sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; 800bb1e: 2301 movs r3, #1 800bb20: 61fb str r3, [r7, #28] sFilterConfig.FilterIdHigh = 0x0000; 800bb22: 2300 movs r3, #0 800bb24: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = 0x0000; 800bb26: 2300 movs r3, #0 800bb28: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 800bb2a: 2300 movs r3, #0 800bb2c: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = 0x0000; 800bb2e: 2300 movs r3, #0 800bb30: 60fb str r3, [r7, #12] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0; 800bb32: 2300 movs r3, #0 800bb34: 613b str r3, [r7, #16] sFilterConfig.FilterActivation = ENABLE; 800bb36: 2301 movs r3, #1 800bb38: 623b str r3, [r7, #32] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO1; 800bb3a: 2301 movs r3, #1 800bb3c: 613b str r3, [r7, #16] sFilterConfig.SlaveStartFilterBank = 14; 800bb3e: 230e movs r3, #14 800bb40: 627b str r3, [r7, #36] @ 0x24 if(HAL_CAN_ConfigFilter(&hcan2, &sFilterConfig) != HAL_OK) 800bb42: 463b mov r3, r7 800bb44: 4619 mov r1, r3 800bb46: 4806 ldr r0, [pc, #24] @ (800bb60 ) 800bb48: f004 fbe4 bl 8010314 800bb4c: 4603 mov r3, r0 800bb4e: 2b00 cmp r3, #0 800bb50: d001 beq.n 800bb56 { Error_Handler(); 800bb52: f7ff f92f bl 800adb4 } } 800bb56: bf00 nop 800bb58: 3728 adds r7, #40 @ 0x28 800bb5a: 46bd mov sp, r7 800bb5c: bd80 pop {r7, pc} 800bb5e: bf00 nop 800bb60: 20000384 .word 0x20000384 0800bb64 : void PSU_Init(){ 800bb64: b580 push {r7, lr} 800bb66: af00 add r7, sp, #0 HAL_CAN_Stop(&hcan2); 800bb68: 4813 ldr r0, [pc, #76] @ (800bbb8 ) 800bb6a: f004 fcf7 bl 801055c MX_CAN2_Init(); 800bb6e: f7fe f84d bl 8009c0c PSU_CAN_FilterInit(); 800bb72: f7ff ffcd bl 800bb10 HAL_CAN_Start(&hcan2); 800bb76: 4810 ldr r0, [pc, #64] @ (800bbb8 ) 800bb78: f004 fcac bl 80104d4 HAL_CAN_ActivateNotification(&hcan2, CAN_IT_RX_FIFO1_MSG_PENDING /* | CAN_IT_ERROR | CAN_IT_BUSOFF | CAN_IT_LAST_ERROR_CODE | CAN_IT_TX_MAILBOX_EMPTY*/); 800bb7c: 2110 movs r1, #16 800bb7e: 480e ldr r0, [pc, #56] @ (800bbb8 ) 800bb80: f004 ff59 bl 8010a36 memset(&PSU0, 0, sizeof(PSU0)); 800bb84: 2220 movs r2, #32 800bb86: 2100 movs r1, #0 800bb88: 480c ldr r0, [pc, #48] @ (800bbbc ) 800bb8a: f00a fa57 bl 801603c PSU0.state = PSU_UNREADY; 800bb8e: 4b0b ldr r3, [pc, #44] @ (800bbbc ) 800bb90: 2200 movs r2, #0 800bb92: 71da strb r2, [r3, #7] PSU0.statetick = HAL_GetTick(); 800bb94: f003 fd54 bl 800f640 800bb98: 4603 mov r3, r0 800bb9a: 4a08 ldr r2, [pc, #32] @ (800bbbc ) 800bb9c: 6113 str r3, [r2, #16] PSU0.power_limit = PSU_MAX_POWER; // kW 800bb9e: 4b07 ldr r3, [pc, #28] @ (800bbbc ) 800bba0: f649 4240 movw r2, #40000 @ 0x9c40 800bba4: 615a str r2, [r3, #20] PSU_Enable(0, 0); 800bba6: 2100 movs r1, #0 800bba8: 2000 movs r0, #0 800bbaa: f000 f809 bl 800bbc0 PowerSetpoint_Init(); 800bbae: f7ff f98b bl 800aec8 } 800bbb2: bf00 nop 800bbb4: bd80 pop {r7, pc} 800bbb6: bf00 nop 800bbb8: 20000384 .word 0x20000384 800bbbc: 2000092c .word 0x2000092c 0800bbc0 : void PSU_Enable(uint8_t addr, uint8_t enable){ 800bbc0: b580 push {r7, lr} 800bbc2: b084 sub sp, #16 800bbc4: af00 add r7, sp, #0 800bbc6: 4603 mov r3, r0 800bbc8: 460a mov r2, r1 800bbca: 71fb strb r3, [r7, #7] 800bbcc: 4613 mov r3, r2 800bbce: 71bb strb r3, [r7, #6] PSU_1A_t data; memset(&data, 0, sizeof(data)); 800bbd0: f107 0308 add.w r3, r7, #8 800bbd4: 2208 movs r2, #8 800bbd6: 2100 movs r1, #0 800bbd8: 4618 mov r0, r3 800bbda: f00a fa2f bl 801603c /* Для DC30 поддерживается только один модуль с адресом 0 */ if(addr != 0) return; 800bbde: 79fb ldrb r3, [r7, #7] 800bbe0: 2b00 cmp r3, #0 800bbe2: d115 bne.n 800bc10 if(PSU0.online == 0) return; 800bbe4: 4b0d ldr r3, [pc, #52] @ (800bc1c ) 800bbe6: 7a1b ldrb r3, [r3, #8] 800bbe8: 2b00 cmp r3, #0 800bbea: d013 beq.n 800bc14 data.enable = !enable; 800bbec: 79bb ldrb r3, [r7, #6] 800bbee: 2b00 cmp r3, #0 800bbf0: bf0c ite eq 800bbf2: 2301 moveq r3, #1 800bbf4: 2300 movne r3, #0 800bbf6: b2db uxtb r3, r3 800bbf8: 723b strb r3, [r7, #8] PSU_SendCmd(0xF0, addr, 0x1A, &data); 800bbfa: f107 0308 add.w r3, r7, #8 800bbfe: 79f9 ldrb r1, [r7, #7] 800bc00: 221a movs r2, #26 800bc02: 20f0 movs r0, #240 @ 0xf0 800bc04: f000 f872 bl 800bcec ED_Delay(CAN_DELAY); 800bc08: 2014 movs r0, #20 800bc0a: f7fe ff39 bl 800aa80 800bc0e: e002 b.n 800bc16 if(addr != 0) return; 800bc10: bf00 nop 800bc12: e000 b.n 800bc16 if(PSU0.online == 0) return; 800bc14: bf00 nop } 800bc16: 3710 adds r7, #16 800bc18: 46bd mov sp, r7 800bc1a: bd80 pop {r7, pc} 800bc1c: 2000092c .word 0x2000092c 0800bc20 : memset(&data, 0, sizeof(data)); data.enable = !enable; if(addr != 0) return; PSU_SendCmd(0xF0, addr, 0x1D, &data); } void PSU_SetVoltageCurrent(uint8_t addr, uint16_t voltage, uint16_t current){ 800bc20: b580 push {r7, lr} 800bc22: b086 sub sp, #24 800bc24: af00 add r7, sp, #0 800bc26: 4603 mov r3, r0 800bc28: 71fb strb r3, [r7, #7] 800bc2a: 460b mov r3, r1 800bc2c: 80bb strh r3, [r7, #4] 800bc2e: 4613 mov r3, r2 800bc30: 807b strh r3, [r7, #2] PSU_1C_t data; memset(&data, 0, sizeof(data)); 800bc32: f107 0308 add.w r3, r7, #8 800bc36: 2208 movs r2, #8 800bc38: 2100 movs r1, #0 800bc3a: 4618 mov r0, r3 800bc3c: f00a f9fe bl 801603c if(addr != 0) return; 800bc40: 79fb ldrb r3, [r7, #7] 800bc42: 2b00 cmp r3, #0 800bc44: d147 bne.n 800bcd6 if(voltage 800bc4c: 2396 movs r3, #150 @ 0x96 800bc4e: 80bb strh r3, [r7, #4] if((CONN.hv_limit != 0u) && (voltage > PSU_LV_CLAMP_V)){ 800bc50: 4b23 ldr r3, [pc, #140] @ (800bce0 ) 800bc52: f893 3023 ldrb.w r3, [r3, #35] @ 0x23 800bc56: 2b00 cmp r3, #0 800bc58: d006 beq.n 800bc68 800bc5a: 88bb ldrh r3, [r7, #4] 800bc5c: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800bc60: d302 bcc.n 800bc68 voltage = PSU_LV_CLAMP_V; 800bc62: f240 13f3 movw r3, #499 @ 0x1f3 800bc66: 80bb strh r3, [r7, #4] } uint32_t current_ma = current * 100; 800bc68: 887b ldrh r3, [r7, #2] 800bc6a: 2264 movs r2, #100 @ 0x64 800bc6c: fb02 f303 mul.w r3, r2, r3 800bc70: 617b str r3, [r7, #20] uint32_t voltage_mv = voltage * 1000; 800bc72: 88bb ldrh r3, [r7, #4] 800bc74: f44f 727a mov.w r2, #1000 @ 0x3e8 800bc78: fb02 f303 mul.w r3, r2, r3 800bc7c: 613b str r3, [r7, #16] data.moduleCurrentTotal[0] = (current_ma >> 24) & 0xFF; 800bc7e: 697b ldr r3, [r7, #20] 800bc80: 0e1b lsrs r3, r3, #24 800bc82: b2db uxtb r3, r3 800bc84: 733b strb r3, [r7, #12] data.moduleCurrentTotal[1] = (current_ma >> 16) & 0xFF; 800bc86: 697b ldr r3, [r7, #20] 800bc88: 0c1b lsrs r3, r3, #16 800bc8a: b2db uxtb r3, r3 800bc8c: 737b strb r3, [r7, #13] data.moduleCurrentTotal[2] = (current_ma >> 8) & 0xFF; 800bc8e: 697b ldr r3, [r7, #20] 800bc90: 0a1b lsrs r3, r3, #8 800bc92: b2db uxtb r3, r3 800bc94: 73bb strb r3, [r7, #14] data.moduleCurrentTotal[3] = (current_ma >> 0) & 0xFF; 800bc96: 697b ldr r3, [r7, #20] 800bc98: b2db uxtb r3, r3 800bc9a: 73fb strb r3, [r7, #15] data.moduleVoltage[0] = (voltage_mv >> 24) & 0xFF; 800bc9c: 693b ldr r3, [r7, #16] 800bc9e: 0e1b lsrs r3, r3, #24 800bca0: b2db uxtb r3, r3 800bca2: 723b strb r3, [r7, #8] data.moduleVoltage[1] = (voltage_mv >> 16) & 0xFF; 800bca4: 693b ldr r3, [r7, #16] 800bca6: 0c1b lsrs r3, r3, #16 800bca8: b2db uxtb r3, r3 800bcaa: 727b strb r3, [r7, #9] data.moduleVoltage[2] = (voltage_mv >> 8) & 0xFF; 800bcac: 693b ldr r3, [r7, #16] 800bcae: 0a1b lsrs r3, r3, #8 800bcb0: b2db uxtb r3, r3 800bcb2: 72bb strb r3, [r7, #10] data.moduleVoltage[3] = (voltage_mv >> 0) & 0xFF; 800bcb4: 693b ldr r3, [r7, #16] 800bcb6: b2db uxtb r3, r3 800bcb8: 72fb strb r3, [r7, #11] psu_last_can_v = voltage; 800bcba: 4a0a ldr r2, [pc, #40] @ (800bce4 ) 800bcbc: 88bb ldrh r3, [r7, #4] 800bcbe: 8013 strh r3, [r2, #0] psu_last_can_i_0p1A = current; 800bcc0: 4a09 ldr r2, [pc, #36] @ (800bce8 ) 800bcc2: 887b ldrh r3, [r7, #2] 800bcc4: 8013 strh r3, [r2, #0] PSU_SendCmd(0xF0, addr, 0x1C, &data); 800bcc6: f107 0308 add.w r3, r7, #8 800bcca: 79f9 ldrb r1, [r7, #7] 800bccc: 221c movs r2, #28 800bcce: 20f0 movs r0, #240 @ 0xf0 800bcd0: f000 f80c bl 800bcec 800bcd4: e000 b.n 800bcd8 if(addr != 0) return; 800bcd6: bf00 nop } 800bcd8: 3718 adds r7, #24 800bcda: 46bd mov sp, r7 800bcdc: bd80 pop {r7, pc} 800bcde: bf00 nop 800bce0: 200003b0 .word 0x200003b0 800bce4: 20000950 .word 0x20000950 800bce8: 20000952 .word 0x20000952 0800bcec : void PSU_SendCmd(uint8_t source, uint8_t destination, uint8_t cmd, void *data){ 800bcec: b580 push {r7, lr} 800bcee: b08c sub sp, #48 @ 0x30 800bcf0: af00 add r7, sp, #0 800bcf2: 603b str r3, [r7, #0] 800bcf4: 4603 mov r3, r0 800bcf6: 71fb strb r3, [r7, #7] 800bcf8: 460b mov r3, r1 800bcfa: 71bb strb r3, [r7, #6] 800bcfc: 4613 mov r3, r2 800bcfe: 717b strb r3, [r7, #5] CanId_t CanId; CanId.source = source; 800bd00: 79fb ldrb r3, [r7, #7] 800bd02: f887 3028 strb.w r3, [r7, #40] @ 0x28 CanId.destination = destination; 800bd06: 79bb ldrb r3, [r7, #6] 800bd08: f887 3029 strb.w r3, [r7, #41] @ 0x29 CanId.command = cmd; 800bd0c: 797b ldrb r3, [r7, #5] 800bd0e: f003 033f and.w r3, r3, #63 @ 0x3f 800bd12: b2da uxtb r2, r3 800bd14: f897 302a ldrb.w r3, [r7, #42] @ 0x2a 800bd18: f362 0305 bfi r3, r2, #0, #6 800bd1c: f887 302a strb.w r3, [r7, #42] @ 0x2a CanId.device = 0x0A; 800bd20: 8d7b ldrh r3, [r7, #42] @ 0x2a 800bd22: 220a movs r2, #10 800bd24: f362 1389 bfi r3, r2, #6, #4 800bd28: 857b strh r3, [r7, #42] @ 0x2a int8_t retry_counter = 10; 800bd2a: 230a movs r3, #10 800bd2c: f887 302f strb.w r3, [r7, #47] @ 0x2f CAN_TxHeaderTypeDef tx_header; uint32_t tx_mailbox; HAL_StatusTypeDef CAN_result; memcpy(&tx_header.ExtId, &CanId, sizeof(CanId_t)); 800bd30: 6abb ldr r3, [r7, #40] @ 0x28 800bd32: 617b str r3, [r7, #20] tx_header.RTR = CAN_RTR_DATA; 800bd34: 2300 movs r3, #0 800bd36: 61fb str r3, [r7, #28] tx_header.IDE = CAN_ID_EXT; 800bd38: 2304 movs r3, #4 800bd3a: 61bb str r3, [r7, #24] tx_header.DLC = 8; 800bd3c: 2308 movs r3, #8 800bd3e: 623b str r3, [r7, #32] while(retry_counter>0){ //если буфер полон, ждем пока он освободится 800bd40: e01e b.n 800bd80 if (HAL_CAN_GetTxMailboxesFreeLevel(&hcan2) > 0){ 800bd42: 4814 ldr r0, [pc, #80] @ (800bd94 ) 800bd44: f004 fd22 bl 801078c 800bd48: 4603 mov r3, r0 800bd4a: 2b00 cmp r3, #0 800bd4c: d00e beq.n 800bd6c /* отправка сообщения */ CAN_result = HAL_CAN_AddTxMessage(&hcan2, &tx_header, (uint8_t*)data, &tx_mailbox); 800bd4e: f107 030c add.w r3, r7, #12 800bd52: f107 0110 add.w r1, r7, #16 800bd56: 683a ldr r2, [r7, #0] 800bd58: 480e ldr r0, [pc, #56] @ (800bd94 ) 800bd5a: f004 fc48 bl 80105ee 800bd5e: 4603 mov r3, r0 800bd60: f887 302e strb.w r3, [r7, #46] @ 0x2e /* если отправка удалась, выход */ if(CAN_result == HAL_OK) { 800bd64: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 800bd68: 2b00 cmp r3, #0 800bd6a: d00e beq.n 800bd8a return; } } ED_Delay(1); 800bd6c: 2001 movs r0, #1 800bd6e: f7fe fe87 bl 800aa80 retry_counter--; 800bd72: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f 800bd76: b2db uxtb r3, r3 800bd78: 3b01 subs r3, #1 800bd7a: b2db uxtb r3, r3 800bd7c: f887 302f strb.w r3, [r7, #47] @ 0x2f while(retry_counter>0){ //если буфер полон, ждем пока он освободится 800bd80: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f 800bd84: 2b00 cmp r3, #0 800bd86: dcdc bgt.n 800bd42 800bd88: e000 b.n 800bd8c return; 800bd8a: bf00 nop } } 800bd8c: 3730 adds r7, #48 @ 0x30 800bd8e: 46bd mov sp, r7 800bd90: bd80 pop {r7, pc} 800bd92: bf00 nop 800bd94: 20000384 .word 0x20000384 0800bd98 : void PSU_ReadWrite(){ 800bd98: b580 push {r7, lr} 800bd9a: b084 sub sp, #16 800bd9c: af00 add r7, sp, #0 uint8_t zero_data[8] = {0,0,0,0,0,0,0,0}; 800bd9e: 1d3b adds r3, r7, #4 800bda0: 2200 movs r2, #0 800bda2: 601a str r2, [r3, #0] 800bda4: 605a str r2, [r3, #4] PSU_SendCmd(0xF0, 0, 0x04, zero_data);ED_Delay(CAN_DELAY); 800bda6: 1d3b adds r3, r7, #4 800bda8: 2204 movs r2, #4 800bdaa: 2100 movs r1, #0 800bdac: 20f0 movs r0, #240 @ 0xf0 800bdae: f7ff ff9d bl 800bcec 800bdb2: 2014 movs r0, #20 800bdb4: f7fe fe64 bl 800aa80 PSU_SendCmd(0xF0, 0, 0x06, zero_data);ED_Delay(CAN_DELAY); 800bdb8: 1d3b adds r3, r7, #4 800bdba: 2206 movs r2, #6 800bdbc: 2100 movs r1, #0 800bdbe: 20f0 movs r0, #240 @ 0xf0 800bdc0: f7ff ff94 bl 800bcec 800bdc4: 2014 movs r0, #20 800bdc6: f7fe fe5b bl 800aa80 // PSU_SendCmd(0xF0, 0, 0x08, zero_data);ED_Delay(CAN_DELAY); PSU_SendCmd(0xF0, 0, 0x09, zero_data);ED_Delay(CAN_DELAY); 800bdca: 1d3b adds r3, r7, #4 800bdcc: 2209 movs r2, #9 800bdce: 2100 movs r1, #0 800bdd0: 20f0 movs r0, #240 @ 0xf0 800bdd2: f7ff ff8b bl 800bcec 800bdd6: 2014 movs r0, #20 800bdd8: f7fe fe52 bl 800aa80 // Power Limit if ((CONN.WantedCurrent/10) * CONN.MeasuredVoltage > PSU0.power_limit){ 800bddc: 4b40 ldr r3, [pc, #256] @ (800bee0 ) 800bdde: f8b3 301b ldrh.w r3, [r3, #27] 800bde2: b29b uxth r3, r3 800bde4: 4a3f ldr r2, [pc, #252] @ (800bee4 ) 800bde6: fba2 2303 umull r2, r3, r2, r3 800bdea: 08db lsrs r3, r3, #3 800bdec: b29b uxth r3, r3 800bdee: 461a mov r2, r3 800bdf0: 4b3b ldr r3, [pc, #236] @ (800bee0 ) 800bdf2: f8b3 3013 ldrh.w r3, [r3, #19] 800bdf6: b29b uxth r3, r3 800bdf8: fb02 f303 mul.w r3, r2, r3 800bdfc: 461a mov r2, r3 800bdfe: 4b3a ldr r3, [pc, #232] @ (800bee8 ) 800be00: 695b ldr r3, [r3, #20] 800be02: 429a cmp r2, r3 800be04: d911 bls.n 800be2a CONN.RequestedCurrent = PSU0.power_limit * 10 / CONN.MeasuredVoltage; 800be06: 4b38 ldr r3, [pc, #224] @ (800bee8 ) 800be08: 695a ldr r2, [r3, #20] 800be0a: 4613 mov r3, r2 800be0c: 009b lsls r3, r3, #2 800be0e: 4413 add r3, r2 800be10: 005b lsls r3, r3, #1 800be12: 461a mov r2, r3 800be14: 4b32 ldr r3, [pc, #200] @ (800bee0 ) 800be16: f8b3 3013 ldrh.w r3, [r3, #19] 800be1a: b29b uxth r3, r3 800be1c: fbb2 f3f3 udiv r3, r2, r3 800be20: b29a uxth r2, r3 800be22: 4b2f ldr r3, [pc, #188] @ (800bee0 ) 800be24: f8a3 2011 strh.w r2, [r3, #17] 800be28: e006 b.n 800be38 }else{ CONN.RequestedCurrent = CONN.WantedCurrent; 800be2a: 4b2d ldr r3, [pc, #180] @ (800bee0 ) 800be2c: f8b3 301b ldrh.w r3, [r3, #27] 800be30: b29a uxth r2, r3 800be32: 4b2b ldr r3, [pc, #172] @ (800bee0 ) 800be34: f8a3 2011 strh.w r2, [r3, #17] } if(CONN.RequestedCurrent > (PSU_MAX_CURRENT*10)){ 800be38: 4b29 ldr r3, [pc, #164] @ (800bee0 ) 800be3a: f8b3 3011 ldrh.w r3, [r3, #17] 800be3e: b29b uxth r3, r3 800be40: f240 5232 movw r2, #1330 @ 0x532 800be44: 4293 cmp r3, r2 800be46: d908 bls.n 800be5a CONN.RequestedCurrent = PSU_MAX_CURRENT*10; 800be48: 4b25 ldr r3, [pc, #148] @ (800bee0 ) 800be4a: 2200 movs r2, #0 800be4c: f042 0232 orr.w r2, r2, #50 @ 0x32 800be50: 745a strb r2, [r3, #17] 800be52: 2200 movs r2, #0 800be54: f042 0205 orr.w r2, r2, #5 800be58: 749a strb r2, [r3, #18] } CONN.RequestedPower = CONN.RequestedCurrent * CONN.RequestedVoltage / 10; 800be5a: 4b21 ldr r3, [pc, #132] @ (800bee0 ) 800be5c: f8b3 3011 ldrh.w r3, [r3, #17] 800be60: b29b uxth r3, r3 800be62: 461a mov r2, r3 800be64: 4b1e ldr r3, [pc, #120] @ (800bee0 ) 800be66: f8b3 300f ldrh.w r3, [r3, #15] 800be6a: b29b uxth r3, r3 800be6c: fb02 f303 mul.w r3, r2, r3 800be70: 4a1e ldr r2, [pc, #120] @ (800beec ) 800be72: fb82 1203 smull r1, r2, r2, r3 800be76: 1092 asrs r2, r2, #2 800be78: 17db asrs r3, r3, #31 800be7a: 1ad3 subs r3, r2, r3 800be7c: 461a mov r2, r3 800be7e: 4b18 ldr r3, [pc, #96] @ (800bee0 ) 800be80: f8c3 200b str.w r2, [r3, #11] #if PSD_ENABLE { uint8_t block_setpoint = PowerSetpoint_HasPending() || PowerSetpoint_IsBusy(); 800be84: f7ff f8d0 bl 800b028 800be88: 4603 mov r3, r0 800be8a: 2b00 cmp r3, #0 800be8c: d104 bne.n 800be98 800be8e: f7ff f8d5 bl 800b03c 800be92: 4603 mov r3, r0 800be94: 2b00 cmp r3, #0 800be96: d001 beq.n 800be9c 800be98: 2301 movs r3, #1 800be9a: e000 b.n 800be9e 800be9c: 2300 movs r3, #0 800be9e: 73fb strb r3, [r7, #15] if (PSU0.ready && !block_setpoint) { 800bea0: 4b11 ldr r3, [pc, #68] @ (800bee8 ) 800bea2: 7a5b ldrb r3, [r3, #9] 800bea4: 2b00 cmp r3, #0 800bea6: d011 beq.n 800becc 800bea8: 7bfb ldrb r3, [r7, #15] 800beaa: 2b00 cmp r3, #0 800beac: d10e bne.n 800becc PSU_SetVoltageCurrent(0, CONN.RequestedVoltage, CONN.RequestedCurrent); 800beae: 4b0c ldr r3, [pc, #48] @ (800bee0 ) 800beb0: f8b3 300f ldrh.w r3, [r3, #15] 800beb4: b29b uxth r3, r3 800beb6: 4a0a ldr r2, [pc, #40] @ (800bee0 ) 800beb8: f8b2 2011 ldrh.w r2, [r2, #17] 800bebc: b292 uxth r2, r2 800bebe: 4619 mov r1, r3 800bec0: 2000 movs r0, #0 800bec2: f7ff fead bl 800bc20 ED_Delay(CAN_DELAY); 800bec6: 2014 movs r0, #20 800bec8: f7fe fdda bl 800aa80 PSU_SetVoltageCurrent(0, CONN.RequestedVoltage, CONN.RequestedCurrent); // Normal mode ED_Delay(CAN_DELAY); } #endif if (PSU0.ready) { 800becc: 4b06 ldr r3, [pc, #24] @ (800bee8 ) 800bece: 7a5b ldrb r3, [r3, #9] 800bed0: 2b00 cmp r3, #0 800bed2: d001 beq.n 800bed8 PSU_HvControl(); 800bed4: f7ff fbdc bl 800b690 } } 800bed8: bf00 nop 800beda: 3710 adds r7, #16 800bedc: 46bd mov sp, r7 800bede: bd80 pop {r7, pc} 800bee0: 200003b0 .word 0x200003b0 800bee4: cccccccd .word 0xcccccccd 800bee8: 2000092c .word 0x2000092c 800beec: 66666667 .word 0x66666667 0800bef0 : void PSU_Task(void){ 800bef0: b590 push {r4, r7, lr} 800bef2: b085 sub sp, #20 800bef4: af00 add r7, sp, #0 static uint32_t cont_ok_tick = 0; static uint32_t fd_on_last_cmd_ms = 0; PowerSetpointTryResult_t psd_result; #if PSD_ENABLE PowerSetpoint_UpdateDeliveryLatch(); 800bef6: f7ff f839 bl 800af6c if (PowerSetpoint_HasPending()) { 800befa: f7ff f895 bl 800b028 800befe: 4603 mov r3, r0 800bf00: 2b00 cmp r3, #0 800bf02: d009 beq.n 800bf18 psd_result = PowerSetpoint_TryApply(); 800bf04: f7ff f8fa bl 800b0fc 800bf08: 4603 mov r3, r0 800bf0a: 73fb strb r3, [r7, #15] if (psd_result == PSD_TRY_START_FAST_DISCHARGE) { 800bf0c: 7bfb ldrb r3, [r7, #15] 800bf0e: 2b02 cmp r3, #2 800bf10: d102 bne.n 800bf18 PSU_SwitchState(PSU_FAST_DISCHARGE_OFF); 800bf12: 2006 movs r0, #6 800bf14: f7ff fcea bl 800b8ec } } #endif // Обновляем ONLINE/READY по таймауту if((HAL_GetTick() - can_lastpacket) > PSU_ONLINE_TIMEOUT){ 800bf18: f003 fb92 bl 800f640 800bf1c: 4602 mov r2, r0 800bf1e: 4bb8 ldr r3, [pc, #736] @ (800c200 ) 800bf20: 681b ldr r3, [r3, #0] 800bf22: 1ad3 subs r3, r2, r3 800bf24: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800bf28: d92f bls.n 800bf8a if (PSU0.online) { 800bf2a: 4bb6 ldr r3, [pc, #728] @ (800c204 ) 800bf2c: 7a1b ldrb r3, [r3, #8] 800bf2e: 2b00 cmp r3, #0 800bf30: d00a beq.n 800bf48 log_printf(LOG_WARN, "PSU CAN timeout age=%lums -> offline\n", (unsigned long)(HAL_GetTick() - can_lastpacket)); 800bf32: f003 fb85 bl 800f640 800bf36: 4602 mov r2, r0 log_printf(LOG_WARN, "PSU CAN timeout age=%lums -> offline\n", 800bf38: 4bb1 ldr r3, [pc, #708] @ (800c200 ) 800bf3a: 681b ldr r3, [r3, #0] (unsigned long)(HAL_GetTick() - can_lastpacket)); 800bf3c: 1ad3 subs r3, r2, r3 log_printf(LOG_WARN, "PSU CAN timeout age=%lums -> offline\n", 800bf3e: 461a mov r2, r3 800bf40: 49b1 ldr r1, [pc, #708] @ (800c208 ) 800bf42: 2005 movs r0, #5 800bf44: f7fe fb80 bl 800a648 } PSU0.online = 0; 800bf48: 4bae ldr r3, [pc, #696] @ (800c204 ) 800bf4a: 2200 movs r2, #0 800bf4c: 721a strb r2, [r3, #8] PSU0.PSU_enabled = 0; 800bf4e: 4bad ldr r3, [pc, #692] @ (800c204 ) 800bf50: 2200 movs r2, #0 800bf52: 729a strb r2, [r3, #10] PSU_04.moduleTemperature = 0; 800bf54: 4bad ldr r3, [pc, #692] @ (800c20c ) 800bf56: 2200 movs r2, #0 800bf58: 711a strb r2, [r3, #4] PSU_04.modularForm0 = 0; 800bf5a: 4bac ldr r3, [pc, #688] @ (800c20c ) 800bf5c: 2200 movs r2, #0 800bf5e: 721a strb r2, [r3, #8] PSU_04.modularForm1 = 0; 800bf60: 4baa ldr r3, [pc, #680] @ (800c20c ) 800bf62: 2200 movs r2, #0 800bf64: 71da strb r2, [r3, #7] PSU_04.modularForm2 = 0; 800bf66: 4ba9 ldr r3, [pc, #676] @ (800c20c ) 800bf68: 2200 movs r2, #0 800bf6a: 719a strb r2, [r3, #6] PSU_06.VAB = 0; 800bf6c: 4ba8 ldr r3, [pc, #672] @ (800c210 ) 800bf6e: 2200 movs r2, #0 800bf70: 609a str r2, [r3, #8] PSU_06.VBC = 0; 800bf72: 4ba7 ldr r3, [pc, #668] @ (800c210 ) 800bf74: 2200 movs r2, #0 800bf76: 60da str r2, [r3, #12] PSU_06.VCA = 0; 800bf78: 4ba5 ldr r3, [pc, #660] @ (800c210 ) 800bf7a: 2200 movs r2, #0 800bf7c: 611a str r2, [r3, #16] PSU_09.moduleNCurrent = 0; 800bf7e: 4ba5 ldr r3, [pc, #660] @ (800c214 ) 800bf80: 2200 movs r2, #0 800bf82: 60da str r2, [r3, #12] PSU_09.moduleNVoltage = 0; 800bf84: 4ba3 ldr r3, [pc, #652] @ (800c214 ) 800bf86: 2200 movs r2, #0 800bf88: 609a str r2, [r3, #8] } if(!PSU0.online || !PSU0.enableAC){ 800bf8a: 4b9e ldr r3, [pc, #632] @ (800c204 ) 800bf8c: 7a1b ldrb r3, [r3, #8] 800bf8e: 2b00 cmp r3, #0 800bf90: d003 beq.n 800bf9a 800bf92: 4b9c ldr r3, [pc, #624] @ (800c204 ) 800bf94: 781b ldrb r3, [r3, #0] 800bf96: 2b00 cmp r3, #0 800bf98: d10c bne.n 800bfb4 CONN.MeasuredVoltage = 0; 800bf9a: 4b9f ldr r3, [pc, #636] @ (800c218 ) 800bf9c: 2200 movs r2, #0 800bf9e: 74da strb r2, [r3, #19] 800bfa0: 2200 movs r2, #0 800bfa2: 751a strb r2, [r3, #20] CONN.MeasuredCurrent = 0; 800bfa4: 4b9c ldr r3, [pc, #624] @ (800c218 ) 800bfa6: 2200 movs r2, #0 800bfa8: 755a strb r2, [r3, #21] 800bfaa: 2200 movs r2, #0 800bfac: 759a strb r2, [r3, #22] CONN.outputEnabled = 0; 800bfae: 4b9a ldr r3, [pc, #616] @ (800c218 ) 800bfb0: 2200 movs r2, #0 800bfb2: 761a strb r2, [r3, #24] } // Управление AC-контактором с задержкой отключения 1 минута if(CONN.EvConnected){ 800bfb4: 4b98 ldr r3, [pc, #608] @ (800c218 ) 800bfb6: 7f9b ldrb r3, [r3, #30] 800bfb8: 2b00 cmp r3, #0 800bfba: d00c beq.n 800bfd6 RELAY_Write(RELAY_AC, 1); 800bfbc: 2101 movs r1, #1 800bfbe: 2004 movs r0, #4 800bfc0: f7fd fbfa bl 80097b8 psu_on_tick = HAL_GetTick(); 800bfc4: f003 fb3c bl 800f640 800bfc8: 4603 mov r3, r0 800bfca: 4a94 ldr r2, [pc, #592] @ (800c21c ) 800bfcc: 6013 str r3, [r2, #0] PSU0.enableAC = 1; 800bfce: 4b8d ldr r3, [pc, #564] @ (800c204 ) 800bfd0: 2201 movs r2, #1 800bfd2: 701a strb r2, [r3, #0] 800bfd4: e010 b.n 800bff8 }else{ if((HAL_GetTick() - psu_on_tick) > 1 * 60000){ 800bfd6: f003 fb33 bl 800f640 800bfda: 4602 mov r2, r0 800bfdc: 4b8f ldr r3, [pc, #572] @ (800c21c ) 800bfde: 681b ldr r3, [r3, #0] 800bfe0: 1ad3 subs r3, r2, r3 800bfe2: f64e 2260 movw r2, #60000 @ 0xea60 800bfe6: 4293 cmp r3, r2 800bfe8: d906 bls.n 800bff8 RELAY_Write(RELAY_AC, 0); 800bfea: 2100 movs r1, #0 800bfec: 2004 movs r0, #4 800bfee: f7fd fbe3 bl 80097b8 PSU0.enableAC = 0; 800bff2: 4b84 ldr r3, [pc, #528] @ (800c204 ) 800bff4: 2200 movs r2, #0 800bff6: 701a strb r2, [r3, #0] } } // Текущее состояние DC-контактора по обратной связи PSU0.CONT_enabled = IN_ReadInput(IN_CONT_FB_DC); 800bff8: 2005 movs r0, #5 800bffa: f7fd fc5d bl 80098b8 800bffe: 4603 mov r3, r0 800c000: 461a mov r2, r3 800c002: 4b80 ldr r3, [pc, #512] @ (800c204 ) 800c004: 72da strb r2, [r3, #11] // Обновляем ready с учётом ошибок if(PSU0.online && !PSU0.cont_fault && PSU0.enableAC){ 800c006: 4b7f ldr r3, [pc, #508] @ (800c204 ) 800c008: 7a1b ldrb r3, [r3, #8] 800c00a: 2b00 cmp r3, #0 800c00c: d007 beq.n 800c01e 800c00e: 4b7d ldr r3, [pc, #500] @ (800c204 ) 800c010: 7b1b ldrb r3, [r3, #12] 800c012: 2b00 cmp r3, #0 800c014: d103 bne.n 800c01e 800c016: 4b7b ldr r3, [pc, #492] @ (800c204 ) 800c018: 781b ldrb r3, [r3, #0] 800c01a: 2b00 cmp r3, #0 800c01c: d102 bne.n 800c024 // PSU0.ready = 1; }else{ PSU0.ready = 0; 800c01e: 4b79 ldr r3, [pc, #484] @ (800c204 ) 800c020: 2200 movs r2, #0 800c022: 725a strb r2, [r3, #9] } switch(PSU0.state){ 800c024: 4b77 ldr r3, [pc, #476] @ (800c204 ) 800c026: 79db ldrb r3, [r3, #7] 800c028: 2b0e cmp r3, #14 800c02a: f200 8290 bhi.w 800c54e 800c02e: a201 add r2, pc, #4 @ (adr r2, 800c034 ) 800c030: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800c034: 0800c071 .word 0x0800c071 800c038: 0800c0a5 .word 0x0800c0a5 800c03c: 0800c0c1 .word 0x0800c0c1 800c040: 0800c11d .word 0x0800c11d 800c044: 0800c161 .word 0x0800c161 800c048: 0800c1a3 .word 0x0800c1a3 800c04c: 0800c239 .word 0x0800c239 800c050: 0800c27d .word 0x0800c27d 800c054: 0800c307 .word 0x0800c307 800c058: 0800c357 .word 0x0800c357 800c05c: 0800c3a5 .word 0x0800c3a5 800c060: 0800c45f .word 0x0800c45f 800c064: 0800c501 .word 0x0800c501 800c068: 0800c48b .word 0x0800c48b 800c06c: 0800c53b .word 0x0800c53b case PSU_UNREADY: PSU0.enableOutput = 0; 800c070: 4b64 ldr r3, [pc, #400] @ (800c204 ) 800c072: 2200 movs r2, #0 800c074: 705a strb r2, [r3, #1] RELAY_Write(RELAY_DC, 0); 800c076: 2100 movs r1, #0 800c078: 2003 movs r0, #3 800c07a: f7fd fb9d bl 80097b8 if(PSU0.online && PSU0.enableAC && !PSU0.cont_fault){ 800c07e: 4b61 ldr r3, [pc, #388] @ (800c204 ) 800c080: 7a1b ldrb r3, [r3, #8] 800c082: 2b00 cmp r3, #0 800c084: f000 8267 beq.w 800c556 800c088: 4b5e ldr r3, [pc, #376] @ (800c204 ) 800c08a: 781b ldrb r3, [r3, #0] 800c08c: 2b00 cmp r3, #0 800c08e: f000 8262 beq.w 800c556 800c092: 4b5c ldr r3, [pc, #368] @ (800c204 ) 800c094: 7b1b ldrb r3, [r3, #12] 800c096: 2b00 cmp r3, #0 800c098: f040 825d bne.w 800c556 PSU_SwitchState(PSU_INITIALIZING); 800c09c: 2001 movs r0, #1 800c09e: f7ff fc25 bl 800b8ec } break; 800c0a2: e258 b.n 800c556 case PSU_INITIALIZING: if(PSU_StateTime() > 4000){ // Wait 4s for PSU to initialize 800c0a4: f7ff fc62 bl 800b96c 800c0a8: 4603 mov r3, r0 800c0aa: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800c0ae: f240 8254 bls.w 800c55a PSU0.ready = 1; 800c0b2: 4b54 ldr r3, [pc, #336] @ (800c204 ) 800c0b4: 2201 movs r2, #1 800c0b6: 725a strb r2, [r3, #9] PSU_SwitchState(PSU_READY); 800c0b8: 2002 movs r0, #2 800c0ba: f7ff fc17 bl 800b8ec } break; 800c0be: e24c b.n 800c55a case PSU_READY: // модуль готов, но выключен CONN.hv_limit = 0u; 800c0c0: 4b55 ldr r3, [pc, #340] @ (800c218 ) 800c0c2: 2200 movs r2, #0 800c0c4: f883 2023 strb.w r2, [r3, #35] @ 0x23 CONN.hv_tick = 0u; 800c0c8: 4b53 ldr r3, [pc, #332] @ (800c218 ) 800c0ca: 2200 movs r2, #0 800c0cc: f883 2024 strb.w r2, [r3, #36] @ 0x24 800c0d0: 2200 movs r2, #0 800c0d2: f883 2025 strb.w r2, [r3, #37] @ 0x25 800c0d6: 2200 movs r2, #0 800c0d8: f883 2026 strb.w r2, [r3, #38] @ 0x26 800c0dc: 2200 movs r2, #0 800c0de: f883 2027 strb.w r2, [r3, #39] @ 0x27 CONN.hv_limit_count = 0u; 800c0e2: 4b4d ldr r3, [pc, #308] @ (800c218 ) 800c0e4: 2200 movs r2, #0 800c0e6: f883 2028 strb.w r2, [r3, #40] @ 0x28 RELAY_Write(RELAY_DC, 0); 800c0ea: 2100 movs r1, #0 800c0ec: 2003 movs r0, #3 800c0ee: f7fd fb63 bl 80097b8 if(!PSU0.ready){ 800c0f2: 4b44 ldr r3, [pc, #272] @ (800c204 ) 800c0f4: 7a5b ldrb r3, [r3, #9] 800c0f6: 2b00 cmp r3, #0 800c0f8: d103 bne.n 800c102 PSU_SwitchState(PSU_UNREADY); 800c0fa: 2000 movs r0, #0 800c0fc: f7ff fbf6 bl 800b8ec break; 800c100: e240 b.n 800c584 } if(CONN.EnableOutput){ 800c102: 4b45 ldr r3, [pc, #276] @ (800c218 ) 800c104: 7ddb ldrb r3, [r3, #23] 800c106: 2b00 cmp r3, #0 800c108: f000 8229 beq.w 800c55e PSU_Enable(0, 1); 800c10c: 2101 movs r1, #1 800c10e: 2000 movs r0, #0 800c110: f7ff fd56 bl 800bbc0 PSU_SwitchState(PSU_WAIT_ACK_ON); 800c114: 2003 movs r0, #3 800c116: f7ff fbe9 bl 800b8ec } break; 800c11a: e220 b.n 800c55e case PSU_WAIT_ACK_ON: if(PSU0.PSU_enabled && PSU0.ready){ 800c11c: 4b39 ldr r3, [pc, #228] @ (800c204 ) 800c11e: 7a9b ldrb r3, [r3, #10] 800c120: 2b00 cmp r3, #0 800c122: d007 beq.n 800c134 800c124: 4b37 ldr r3, [pc, #220] @ (800c204 ) 800c126: 7a5b ldrb r3, [r3, #9] 800c128: 2b00 cmp r3, #0 800c12a: d003 beq.n 800c134 PSU_SwitchState(PSU_CONT_WAIT_ACK_ON); 800c12c: 2004 movs r0, #4 800c12e: f7ff fbdd bl 800b8ec PSU0.psu_fault = 1; CONN.chargingError = CONN_ERR_PSU_FAULT; PSU_SwitchState(PSU_UNREADY); log_printf(LOG_ERR, "PSU on timeout\n"); } break; 800c132: e216 b.n 800c562 }else if(PSU_StateTime() > 10000){ 800c134: f7ff fc1a bl 800b96c 800c138: 4603 mov r3, r0 800c13a: f242 7210 movw r2, #10000 @ 0x2710 800c13e: 4293 cmp r3, r2 800c140: f240 820f bls.w 800c562 PSU0.psu_fault = 1; 800c144: 4b2f ldr r3, [pc, #188] @ (800c204 ) 800c146: 2201 movs r2, #1 800c148: 735a strb r2, [r3, #13] CONN.chargingError = CONN_ERR_PSU_FAULT; 800c14a: 4b33 ldr r3, [pc, #204] @ (800c218 ) 800c14c: 220a movs r2, #10 800c14e: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_UNREADY); 800c150: 2000 movs r0, #0 800c152: f7ff fbcb bl 800b8ec log_printf(LOG_ERR, "PSU on timeout\n"); 800c156: 4932 ldr r1, [pc, #200] @ (800c220 ) 800c158: 2004 movs r0, #4 800c15a: f7fe fa75 bl 800a648 break; 800c15e: e200 b.n 800c562 case PSU_CONT_WAIT_ACK_ON: // замыкаем DC-контактор и ждём подтверждение RELAY_Write(RELAY_DC, 1); 800c160: 2101 movs r1, #1 800c162: 2003 movs r0, #3 800c164: f7fd fb28 bl 80097b8 if(PSU0.CONT_enabled){ 800c168: 4b26 ldr r3, [pc, #152] @ (800c204 ) 800c16a: 7adb ldrb r3, [r3, #11] 800c16c: 2b00 cmp r3, #0 800c16e: d003 beq.n 800c178 PSU_SwitchState(PSU_CONNECTED); 800c170: 2005 movs r0, #5 800c172: f7ff fbbb bl 800b8ec PSU0.cont_fault = 1; CONN.chargingError = CONN_ERR_CONTACTOR; PSU_SwitchState(PSU_CURRENT_DROP); log_printf(LOG_ERR, "Contactor error, stopping...\n"); } break; 800c176: e1f6 b.n 800c566 }else if(PSU_StateTime() > 1000){ 800c178: f7ff fbf8 bl 800b96c 800c17c: 4603 mov r3, r0 800c17e: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800c182: f240 81f0 bls.w 800c566 PSU0.cont_fault = 1; 800c186: 4b1f ldr r3, [pc, #124] @ (800c204 ) 800c188: 2201 movs r2, #1 800c18a: 731a strb r2, [r3, #12] CONN.chargingError = CONN_ERR_CONTACTOR; 800c18c: 4b22 ldr r3, [pc, #136] @ (800c218 ) 800c18e: 2207 movs r2, #7 800c190: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_CURRENT_DROP); 800c192: 200b movs r0, #11 800c194: f7ff fbaa bl 800b8ec log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800c198: 4922 ldr r1, [pc, #136] @ (800c224 ) 800c19a: 2004 movs r0, #4 800c19c: f7fe fa54 bl 800a648 break; 800c1a0: e1e1 b.n 800c566 case PSU_CONNECTED: // Основное рабочее состояние if(!CONN.EnableOutput || !PSU0.ready){ 800c1a2: 4b1d ldr r3, [pc, #116] @ (800c218 ) 800c1a4: 7ddb ldrb r3, [r3, #23] 800c1a6: 2b00 cmp r3, #0 800c1a8: d003 beq.n 800c1b2 800c1aa: 4b16 ldr r3, [pc, #88] @ (800c204 ) 800c1ac: 7a5b ldrb r3, [r3, #9] 800c1ae: 2b00 cmp r3, #0 800c1b0: d103 bne.n 800c1ba PSU_SwitchState(PSU_CURRENT_DROP); 800c1b2: 200b movs r0, #11 800c1b4: f7ff fb9a bl 800b8ec break; 800c1b8: e1e4 b.n 800c584 } // контроль контактора: 1 c таймаут if (IN_ReadInput(IN_CONT_FB_DC) != RELAY_Read(RELAY_DC)){ 800c1ba: 2005 movs r0, #5 800c1bc: f7fd fb7c bl 80098b8 800c1c0: 4603 mov r3, r0 800c1c2: 461c mov r4, r3 800c1c4: 2003 movs r0, #3 800c1c6: f7fd fb67 bl 8009898 800c1ca: 4603 mov r3, r0 800c1cc: 429c cmp r4, r3 800c1ce: d02d beq.n 800c22c if((HAL_GetTick() - cont_ok_tick) > 1000){ 800c1d0: f003 fa36 bl 800f640 800c1d4: 4602 mov r2, r0 800c1d6: 4b14 ldr r3, [pc, #80] @ (800c228 ) 800c1d8: 681b ldr r3, [r3, #0] 800c1da: 1ad3 subs r3, r2, r3 800c1dc: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800c1e0: f240 81c3 bls.w 800c56a CONN.chargingError = CONN_ERR_CONTACTOR; 800c1e4: 4b0c ldr r3, [pc, #48] @ (800c218 ) 800c1e6: 2207 movs r2, #7 800c1e8: 775a strb r2, [r3, #29] PSU0.cont_fault = 1; 800c1ea: 4b06 ldr r3, [pc, #24] @ (800c204 ) 800c1ec: 2201 movs r2, #1 800c1ee: 731a strb r2, [r3, #12] PSU_SwitchState(PSU_CURRENT_DROP); 800c1f0: 200b movs r0, #11 800c1f2: f7ff fb7b bl 800b8ec log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800c1f6: 490b ldr r1, [pc, #44] @ (800c224 ) 800c1f8: 2004 movs r0, #4 800c1fa: f7fe fa25 bl 800a648 } }else{ cont_ok_tick = HAL_GetTick(); } break; 800c1fe: e1b4 b.n 800c56a 800c200: 2000094c .word 0x2000094c 800c204: 2000092c .word 0x2000092c 800c208: 0801869c .word 0x0801869c 800c20c: 200008f4 .word 0x200008f4 800c210: 20000900 .word 0x20000900 800c214: 2000091c .word 0x2000091c 800c218: 200003b0 .word 0x200003b0 800c21c: 2000097c .word 0x2000097c 800c220: 080186c4 .word 0x080186c4 800c224: 080186d4 .word 0x080186d4 800c228: 20000980 .word 0x20000980 cont_ok_tick = HAL_GetTick(); 800c22c: f003 fa08 bl 800f640 800c230: 4603 mov r3, r0 800c232: 4aaa ldr r2, [pc, #680] @ (800c4dc ) 800c234: 6013 str r3, [r2, #0] break; 800c236: e198 b.n 800c56a case PSU_FAST_DISCHARGE_OFF: if (!CONN.EnableOutput || !PSU0.ready || PSU0.cont_fault || PSU0.psu_fault) { 800c238: 4ba9 ldr r3, [pc, #676] @ (800c4e0 ) 800c23a: 7ddb ldrb r3, [r3, #23] 800c23c: 2b00 cmp r3, #0 800c23e: d00b beq.n 800c258 800c240: 4ba8 ldr r3, [pc, #672] @ (800c4e4 ) 800c242: 7a5b ldrb r3, [r3, #9] 800c244: 2b00 cmp r3, #0 800c246: d007 beq.n 800c258 800c248: 4ba6 ldr r3, [pc, #664] @ (800c4e4 ) 800c24a: 7b1b ldrb r3, [r3, #12] 800c24c: 2b00 cmp r3, #0 800c24e: d103 bne.n 800c258 800c250: 4ba4 ldr r3, [pc, #656] @ (800c4e4 ) 800c252: 7b5b ldrb r3, [r3, #13] 800c254: 2b00 cmp r3, #0 800c256: d009 beq.n 800c26c log_printf(LOG_WARN, "Fast discharge abort -> stop\n"); 800c258: 49a3 ldr r1, [pc, #652] @ (800c4e8 ) 800c25a: 2005 movs r0, #5 800c25c: f7fe f9f4 bl 800a648 PowerSetpoint_OnFastDischargeAbort(); 800c260: f7fe fff4 bl 800b24c PSU_SwitchState(PSU_CURRENT_DROP); 800c264: 200b movs r0, #11 800c266: f7ff fb41 bl 800b8ec break; 800c26a: e18b b.n 800c584 } PSU_Enable(0, 0); 800c26c: 2100 movs r1, #0 800c26e: 2000 movs r0, #0 800c270: f7ff fca6 bl 800bbc0 PSU_SwitchState(PSU_FAST_DISCHARGE_WAIT); 800c274: 2007 movs r0, #7 800c276: f7ff fb39 bl 800b8ec break; 800c27a: e183 b.n 800c584 case PSU_FAST_DISCHARGE_WAIT: { PowerSetpoint_t fd_sp; if (!CONN.EnableOutput || !PSU0.ready || PSU0.cont_fault || PSU0.psu_fault) { 800c27c: 4b98 ldr r3, [pc, #608] @ (800c4e0 ) 800c27e: 7ddb ldrb r3, [r3, #23] 800c280: 2b00 cmp r3, #0 800c282: d00b beq.n 800c29c 800c284: 4b97 ldr r3, [pc, #604] @ (800c4e4 ) 800c286: 7a5b ldrb r3, [r3, #9] 800c288: 2b00 cmp r3, #0 800c28a: d007 beq.n 800c29c 800c28c: 4b95 ldr r3, [pc, #596] @ (800c4e4 ) 800c28e: 7b1b ldrb r3, [r3, #12] 800c290: 2b00 cmp r3, #0 800c292: d103 bne.n 800c29c 800c294: 4b93 ldr r3, [pc, #588] @ (800c4e4 ) 800c296: 7b5b ldrb r3, [r3, #13] 800c298: 2b00 cmp r3, #0 800c29a: d009 beq.n 800c2b0 log_printf(LOG_WARN, "Fast discharge abort -> stop\n"); 800c29c: 4992 ldr r1, [pc, #584] @ (800c4e8 ) 800c29e: 2005 movs r0, #5 800c2a0: f7fe f9d2 bl 800a648 PowerSetpoint_OnFastDischargeAbort(); 800c2a4: f7fe ffd2 bl 800b24c PSU_SwitchState(PSU_CURRENT_DROP); 800c2a8: 200b movs r0, #11 800c2aa: f7ff fb1f bl 800b8ec break; 800c2ae: e169 b.n 800c584 } /* Как PSU_WAIT_ACK_OFF: 0–20 V на телеметрии = модуль выключен */ if (!PSU0.PSU_enabled) { 800c2b0: 4b8c ldr r3, [pc, #560] @ (800c4e4 ) 800c2b2: 7a9b ldrb r3, [r3, #10] 800c2b4: 2b00 cmp r3, #0 800c2b6: d112 bne.n 800c2de PowerSetpoint_GetFastDischargeTarget(&fd_sp); 800c2b8: f107 0308 add.w r3, r7, #8 800c2bc: 4618 mov r0, r3 800c2be: f7fe ff85 bl 800b1cc log_printf(LOG_INFO, "Fast discharge off ack, V=%u -> set %u\n", (unsigned)CONN.MeasuredVoltage, (unsigned)fd_sp.voltage_V); 800c2c2: 4b87 ldr r3, [pc, #540] @ (800c4e0 ) 800c2c4: f8b3 3013 ldrh.w r3, [r3, #19] 800c2c8: b29b uxth r3, r3 log_printf(LOG_INFO, "Fast discharge off ack, V=%u -> set %u\n", 800c2ca: 461a mov r2, r3 (unsigned)CONN.MeasuredVoltage, (unsigned)fd_sp.voltage_V); 800c2cc: 893b ldrh r3, [r7, #8] log_printf(LOG_INFO, "Fast discharge off ack, V=%u -> set %u\n", 800c2ce: 4987 ldr r1, [pc, #540] @ (800c4ec ) 800c2d0: 2007 movs r0, #7 800c2d2: f7fe f9b9 bl 800a648 PSU_SwitchState(PSU_FAST_DISCHARGE_SET); 800c2d6: 2008 movs r0, #8 800c2d8: f7ff fb08 bl 800b8ec } else if (PSU_StateTime() > PSD_OFF_TIMEOUT_MS) { log_printf(LOG_WARN, "Fast discharge off timeout, V=%u\n", (unsigned)CONN.MeasuredVoltage); PSU_FastDischarge_AbortToConnected(); } break; 800c2dc: e147 b.n 800c56e } else if (PSU_StateTime() > PSD_OFF_TIMEOUT_MS) { 800c2de: f7ff fb45 bl 800b96c 800c2e2: 4603 mov r3, r0 800c2e4: f242 7210 movw r2, #10000 @ 0x2710 800c2e8: 4293 cmp r3, r2 800c2ea: f240 8140 bls.w 800c56e (unsigned)CONN.MeasuredVoltage); 800c2ee: 4b7c ldr r3, [pc, #496] @ (800c4e0 ) 800c2f0: f8b3 3013 ldrh.w r3, [r3, #19] 800c2f4: b29b uxth r3, r3 log_printf(LOG_WARN, "Fast discharge off timeout, V=%u\n", 800c2f6: 461a mov r2, r3 800c2f8: 497d ldr r1, [pc, #500] @ (800c4f0 ) 800c2fa: 2005 movs r0, #5 800c2fc: f7fe f9a4 bl 800a648 PSU_FastDischarge_AbortToConnected(); 800c300: f7ff fb56 bl 800b9b0 break; 800c304: e133 b.n 800c56e } case PSU_FAST_DISCHARGE_SET: { PowerSetpoint_t fd_sp; if (!CONN.EnableOutput || !PSU0.ready || PSU0.cont_fault || PSU0.psu_fault) { 800c306: 4b76 ldr r3, [pc, #472] @ (800c4e0 ) 800c308: 7ddb ldrb r3, [r3, #23] 800c30a: 2b00 cmp r3, #0 800c30c: d00b beq.n 800c326 800c30e: 4b75 ldr r3, [pc, #468] @ (800c4e4 ) 800c310: 7a5b ldrb r3, [r3, #9] 800c312: 2b00 cmp r3, #0 800c314: d007 beq.n 800c326 800c316: 4b73 ldr r3, [pc, #460] @ (800c4e4 ) 800c318: 7b1b ldrb r3, [r3, #12] 800c31a: 2b00 cmp r3, #0 800c31c: d103 bne.n 800c326 800c31e: 4b71 ldr r3, [pc, #452] @ (800c4e4 ) 800c320: 7b5b ldrb r3, [r3, #13] 800c322: 2b00 cmp r3, #0 800c324: d009 beq.n 800c33a log_printf(LOG_WARN, "Fast discharge abort -> stop\n"); 800c326: 4970 ldr r1, [pc, #448] @ (800c4e8 ) 800c328: 2005 movs r0, #5 800c32a: f7fe f98d bl 800a648 PowerSetpoint_OnFastDischargeAbort(); 800c32e: f7fe ff8d bl 800b24c PSU_SwitchState(PSU_CURRENT_DROP); 800c332: 200b movs r0, #11 800c334: f7ff fada bl 800b8ec break; 800c338: e124 b.n 800c584 } PowerSetpoint_GetFastDischargeTarget(&fd_sp); 800c33a: 1d3b adds r3, r7, #4 800c33c: 4618 mov r0, r3 800c33e: f7fe ff45 bl 800b1cc PSU_SetVoltageCurrent(0, fd_sp.voltage_V, fd_sp.current_0p1A); 800c342: 88bb ldrh r3, [r7, #4] 800c344: 88fa ldrh r2, [r7, #6] 800c346: 4619 mov r1, r3 800c348: 2000 movs r0, #0 800c34a: f7ff fc69 bl 800bc20 PSU_SwitchState(PSU_FAST_DISCHARGE_ON); 800c34e: 2009 movs r0, #9 800c350: f7ff facc bl 800b8ec break; 800c354: e116 b.n 800c584 } case PSU_FAST_DISCHARGE_ON: if (!CONN.EnableOutput || !PSU0.ready || PSU0.cont_fault || PSU0.psu_fault) { 800c356: 4b62 ldr r3, [pc, #392] @ (800c4e0 ) 800c358: 7ddb ldrb r3, [r3, #23] 800c35a: 2b00 cmp r3, #0 800c35c: d00b beq.n 800c376 800c35e: 4b61 ldr r3, [pc, #388] @ (800c4e4 ) 800c360: 7a5b ldrb r3, [r3, #9] 800c362: 2b00 cmp r3, #0 800c364: d007 beq.n 800c376 800c366: 4b5f ldr r3, [pc, #380] @ (800c4e4 ) 800c368: 7b1b ldrb r3, [r3, #12] 800c36a: 2b00 cmp r3, #0 800c36c: d103 bne.n 800c376 800c36e: 4b5d ldr r3, [pc, #372] @ (800c4e4 ) 800c370: 7b5b ldrb r3, [r3, #13] 800c372: 2b00 cmp r3, #0 800c374: d009 beq.n 800c38a log_printf(LOG_WARN, "Fast discharge abort -> stop\n"); 800c376: 495c ldr r1, [pc, #368] @ (800c4e8 ) 800c378: 2005 movs r0, #5 800c37a: f7fe f965 bl 800a648 PowerSetpoint_OnFastDischargeAbort(); 800c37e: f7fe ff65 bl 800b24c PSU_SwitchState(PSU_CURRENT_DROP); 800c382: 200b movs r0, #11 800c384: f7ff fab2 bl 800b8ec break; 800c388: e0fc b.n 800c584 } PSU_Enable(0, 1); 800c38a: 2101 movs r1, #1 800c38c: 2000 movs r0, #0 800c38e: f7ff fc17 bl 800bbc0 fd_on_last_cmd_ms = HAL_GetTick(); 800c392: f003 f955 bl 800f640 800c396: 4603 mov r3, r0 800c398: 4a56 ldr r2, [pc, #344] @ (800c4f4 ) 800c39a: 6013 str r3, [r2, #0] PSU_SwitchState(PSU_FAST_DISCHARGE_ON_WAIT); 800c39c: 200a movs r0, #10 800c39e: f7ff faa5 bl 800b8ec break; 800c3a2: e0ef b.n 800c584 case PSU_FAST_DISCHARGE_ON_WAIT: { PowerSetpoint_t fd_sp; uint16_t v_low; if (!CONN.EnableOutput || !PSU0.ready || PSU0.cont_fault || PSU0.psu_fault) { 800c3a4: 4b4e ldr r3, [pc, #312] @ (800c4e0 ) 800c3a6: 7ddb ldrb r3, [r3, #23] 800c3a8: 2b00 cmp r3, #0 800c3aa: d00b beq.n 800c3c4 800c3ac: 4b4d ldr r3, [pc, #308] @ (800c4e4 ) 800c3ae: 7a5b ldrb r3, [r3, #9] 800c3b0: 2b00 cmp r3, #0 800c3b2: d007 beq.n 800c3c4 800c3b4: 4b4b ldr r3, [pc, #300] @ (800c4e4 ) 800c3b6: 7b1b ldrb r3, [r3, #12] 800c3b8: 2b00 cmp r3, #0 800c3ba: d103 bne.n 800c3c4 800c3bc: 4b49 ldr r3, [pc, #292] @ (800c4e4 ) 800c3be: 7b5b ldrb r3, [r3, #13] 800c3c0: 2b00 cmp r3, #0 800c3c2: d009 beq.n 800c3d8 log_printf(LOG_WARN, "Fast discharge abort -> stop\n"); 800c3c4: 4948 ldr r1, [pc, #288] @ (800c4e8 ) 800c3c6: 2005 movs r0, #5 800c3c8: f7fe f93e bl 800a648 PowerSetpoint_OnFastDischargeAbort(); 800c3cc: f7fe ff3e bl 800b24c PSU_SwitchState(PSU_CURRENT_DROP); 800c3d0: 200b movs r0, #11 800c3d2: f7ff fa8b bl 800b8ec break; 800c3d6: e0d5 b.n 800c584 } PowerSetpoint_GetFastDischargeTarget(&fd_sp); 800c3d8: 463b mov r3, r7 800c3da: 4618 mov r0, r3 800c3dc: f7fe fef6 bl 800b1cc v_low = (fd_sp.voltage_V > PSD_PRECHARGE_TOLERANCE_V) ? 800c3e0: 883b ldrh r3, [r7, #0] 800c3e2: 2b28 cmp r3, #40 @ 0x28 800c3e4: d903 bls.n 800c3ee (uint16_t)(fd_sp.voltage_V - PSD_PRECHARGE_TOLERANCE_V) : 0u; 800c3e6: 883b ldrh r3, [r7, #0] v_low = (fd_sp.voltage_V > PSD_PRECHARGE_TOLERANCE_V) ? 800c3e8: 3b28 subs r3, #40 @ 0x28 800c3ea: b29b uxth r3, r3 800c3ec: e000 b.n 800c3f0 800c3ee: 2300 movs r3, #0 800c3f0: 81bb strh r3, [r7, #12] if (PSU0.PSU_enabled && CONN.MeasuredVoltage >= v_low) { 800c3f2: 4b3c ldr r3, [pc, #240] @ (800c4e4 ) 800c3f4: 7a9b ldrb r3, [r3, #10] 800c3f6: 2b00 cmp r3, #0 800c3f8: d00c beq.n 800c414 800c3fa: 4b39 ldr r3, [pc, #228] @ (800c4e0 ) 800c3fc: f8b3 3013 ldrh.w r3, [r3, #19] 800c400: b29b uxth r3, r3 800c402: 89ba ldrh r2, [r7, #12] 800c404: 429a cmp r2, r3 800c406: d805 bhi.n 800c414 PowerSetpoint_OnFastDischargeComplete(); 800c408: f7fe fef2 bl 800b1f0 PSU_SwitchState(PSU_CONNECTED); 800c40c: 2005 movs r0, #5 800c40e: f7ff fa6d bl 800b8ec log_printf(LOG_WARN, "Fast discharge on timeout, V=%u (target %u)\n", (unsigned)CONN.MeasuredVoltage, (unsigned)fd_sp.voltage_V); PSU_FastDischarge_AbortToConnected(); } } break; 800c412: e0ae b.n 800c572 if ((HAL_GetTick() - fd_on_last_cmd_ms) >= PSD_ON_RETRY_MS) { 800c414: f003 f914 bl 800f640 800c418: 4602 mov r2, r0 800c41a: 4b36 ldr r3, [pc, #216] @ (800c4f4 ) 800c41c: 681b ldr r3, [r3, #0] 800c41e: 1ad3 subs r3, r2, r3 800c420: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800c424: d306 bcc.n 800c434 PSU_FastDischarge_PushTarget(); 800c426: f7ff faad bl 800b984 fd_on_last_cmd_ms = HAL_GetTick(); 800c42a: f003 f909 bl 800f640 800c42e: 4603 mov r3, r0 800c430: 4a30 ldr r2, [pc, #192] @ (800c4f4 ) 800c432: 6013 str r3, [r2, #0] if (PSU_StateTime() > PSD_ON_TIMEOUT_MS) { 800c434: f7ff fa9a bl 800b96c 800c438: 4603 mov r3, r0 800c43a: f242 7210 movw r2, #10000 @ 0x2710 800c43e: 4293 cmp r3, r2 800c440: f240 8097 bls.w 800c572 (unsigned)CONN.MeasuredVoltage, (unsigned)fd_sp.voltage_V); 800c444: 4b26 ldr r3, [pc, #152] @ (800c4e0 ) 800c446: f8b3 3013 ldrh.w r3, [r3, #19] 800c44a: b29b uxth r3, r3 log_printf(LOG_WARN, "Fast discharge on timeout, V=%u (target %u)\n", 800c44c: 461a mov r2, r3 (unsigned)CONN.MeasuredVoltage, (unsigned)fd_sp.voltage_V); 800c44e: 883b ldrh r3, [r7, #0] log_printf(LOG_WARN, "Fast discharge on timeout, V=%u (target %u)\n", 800c450: 4929 ldr r1, [pc, #164] @ (800c4f8 ) 800c452: 2005 movs r0, #5 800c454: f7fe f8f8 bl 800a648 PSU_FastDischarge_AbortToConnected(); 800c458: f7ff faaa bl 800b9b0 break; 800c45c: e089 b.n 800c572 } case PSU_CURRENT_DROP: // снижаем ток до нуля перед отключением DC CONN.RequestedCurrent = 0; 800c45e: 4b20 ldr r3, [pc, #128] @ (800c4e0 ) 800c460: 2200 movs r2, #0 800c462: 745a strb r2, [r3, #17] 800c464: 2200 movs r2, #0 800c466: 749a strb r2, [r3, #18] // если ток действительно упал или вышло время, отключаем DC if((CONN.MeasuredCurrent < 30) || (PSU_StateTime() > 5000)){ 800c468: 4b1d ldr r3, [pc, #116] @ (800c4e0 ) 800c46a: f8b3 3015 ldrh.w r3, [r3, #21] 800c46e: b29b uxth r3, r3 800c470: 2b1d cmp r3, #29 800c472: d906 bls.n 800c482 800c474: f7ff fa7a bl 800b96c 800c478: 4603 mov r3, r0 800c47a: f241 3288 movw r2, #5000 @ 0x1388 800c47e: 4293 cmp r3, r2 800c480: d979 bls.n 800c576 PSU_SwitchState(PSU_CONT_WAIT_ACK_OFF); 800c482: 200d movs r0, #13 800c484: f7ff fa32 bl 800b8ec } break; 800c488: e075 b.n 800c576 case PSU_CONT_WAIT_ACK_OFF: RELAY_Write(RELAY_DC, 0); 800c48a: 2100 movs r1, #0 800c48c: 2003 movs r0, #3 800c48e: f7fd f993 bl 80097b8 if(!PSU0.CONT_enabled){ 800c492: 4b14 ldr r3, [pc, #80] @ (800c4e4 ) 800c494: 7adb ldrb r3, [r3, #11] 800c496: 2b00 cmp r3, #0 800c498: d107 bne.n 800c4aa PSU_Enable(0, 0); 800c49a: 2100 movs r1, #0 800c49c: 2000 movs r0, #0 800c49e: f7ff fb8f bl 800bbc0 PSU_SwitchState(PSU_WAIT_ACK_OFF); 800c4a2: 200c movs r0, #12 800c4a4: f7ff fa22 bl 800b8ec CONN.chargingError = CONN_ERR_CONTACTOR; PSU_Enable(0, 0); PSU_SwitchState(PSU_WAIT_ACK_OFF); log_printf(LOG_ERR, "Contactor error, stopping...\n"); } break; 800c4a8: e067 b.n 800c57a }else if(PSU_StateTime() > 1000){ 800c4aa: f7ff fa5f bl 800b96c 800c4ae: 4603 mov r3, r0 800c4b0: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800c4b4: d961 bls.n 800c57a PSU0.cont_fault = 1; 800c4b6: 4b0b ldr r3, [pc, #44] @ (800c4e4 ) 800c4b8: 2201 movs r2, #1 800c4ba: 731a strb r2, [r3, #12] CONN.chargingError = CONN_ERR_CONTACTOR; 800c4bc: 4b08 ldr r3, [pc, #32] @ (800c4e0 ) 800c4be: 2207 movs r2, #7 800c4c0: 775a strb r2, [r3, #29] PSU_Enable(0, 0); 800c4c2: 2100 movs r1, #0 800c4c4: 2000 movs r0, #0 800c4c6: f7ff fb7b bl 800bbc0 PSU_SwitchState(PSU_WAIT_ACK_OFF); 800c4ca: 200c movs r0, #12 800c4cc: f7ff fa0e bl 800b8ec log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800c4d0: 490a ldr r1, [pc, #40] @ (800c4fc ) 800c4d2: 2004 movs r0, #4 800c4d4: f7fe f8b8 bl 800a648 break; 800c4d8: e04f b.n 800c57a 800c4da: bf00 nop 800c4dc: 20000980 .word 0x20000980 800c4e0: 200003b0 .word 0x200003b0 800c4e4: 2000092c .word 0x2000092c 800c4e8: 080186f4 .word 0x080186f4 800c4ec: 08018714 .word 0x08018714 800c4f0: 0801873c .word 0x0801873c 800c4f4: 20000984 .word 0x20000984 800c4f8: 08018760 .word 0x08018760 800c4fc: 080186d4 .word 0x080186d4 case PSU_WAIT_ACK_OFF: if(!PSU0.PSU_enabled){ 800c500: 4b23 ldr r3, [pc, #140] @ (800c590 ) 800c502: 7a9b ldrb r3, [r3, #10] 800c504: 2b00 cmp r3, #0 800c506: d103 bne.n 800c510 PSU_SwitchState(PSU_OFF_PAUSE); 800c508: 200e movs r0, #14 800c50a: f7ff f9ef bl 800b8ec PSU0.psu_fault = 1; CONN.chargingError = CONN_ERR_PSU_FAULT; PSU_SwitchState(PSU_UNREADY); log_printf(LOG_ERR, "PSU off timeout\n"); } break; 800c50e: e036 b.n 800c57e }else if(PSU_StateTime() > 10000){ 800c510: f7ff fa2c bl 800b96c 800c514: 4603 mov r3, r0 800c516: f242 7210 movw r2, #10000 @ 0x2710 800c51a: 4293 cmp r3, r2 800c51c: d92f bls.n 800c57e PSU0.psu_fault = 1; 800c51e: 4b1c ldr r3, [pc, #112] @ (800c590 ) 800c520: 2201 movs r2, #1 800c522: 735a strb r2, [r3, #13] CONN.chargingError = CONN_ERR_PSU_FAULT; 800c524: 4b1b ldr r3, [pc, #108] @ (800c594 ) 800c526: 220a movs r2, #10 800c528: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_UNREADY); 800c52a: 2000 movs r0, #0 800c52c: f7ff f9de bl 800b8ec log_printf(LOG_ERR, "PSU off timeout\n"); 800c530: 4919 ldr r1, [pc, #100] @ (800c598 ) 800c532: 2004 movs r0, #4 800c534: f7fe f888 bl 800a648 break; 800c538: e021 b.n 800c57e case PSU_OFF_PAUSE: if(PSU_StateTime() > 4000){ 800c53a: f7ff fa17 bl 800b96c 800c53e: 4603 mov r3, r0 800c540: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800c544: d91d bls.n 800c582 PSU_SwitchState(PSU_READY); 800c546: 2002 movs r0, #2 800c548: f7ff f9d0 bl 800b8ec } break; 800c54c: e019 b.n 800c582 default: PSU_SwitchState(PSU_UNREADY); 800c54e: 2000 movs r0, #0 800c550: f7ff f9cc bl 800b8ec break; 800c554: e016 b.n 800c584 break; 800c556: bf00 nop 800c558: e014 b.n 800c584 break; 800c55a: bf00 nop 800c55c: e012 b.n 800c584 break; 800c55e: bf00 nop 800c560: e010 b.n 800c584 break; 800c562: bf00 nop 800c564: e00e b.n 800c584 break; 800c566: bf00 nop 800c568: e00c b.n 800c584 break; 800c56a: bf00 nop 800c56c: e00a b.n 800c584 break; 800c56e: bf00 nop 800c570: e008 b.n 800c584 break; 800c572: bf00 nop 800c574: e006 b.n 800c584 break; 800c576: bf00 nop 800c578: e004 b.n 800c584 break; 800c57a: bf00 nop 800c57c: e002 b.n 800c584 break; 800c57e: bf00 nop 800c580: e000 b.n 800c584 break; 800c582: bf00 nop } PSU_LogPeriodicDiag(); 800c584: f7fe ff74 bl 800b470 } 800c588: bf00 nop 800c58a: 3714 adds r7, #20 800c58c: 46bd mov sp, r7 800c58e: bd90 pop {r4, r7, pc} 800c590: 2000092c .word 0x2000092c 800c594: 200003b0 .word 0x200003b0 800c598: 08018790 .word 0x08018790 0800c59c : .Th = 10, .Tf = 50, .Tl = 0, }; void LED_Write(){ 800c59c: b580 push {r7, lr} 800c59e: af00 add r7, sp, #0 if(CONN.chargingError != CONN_NO_ERROR){ 800c5a0: 4b3c ldr r3, [pc, #240] @ (800c694 ) 800c5a2: 7f5b ldrb r3, [r3, #29] 800c5a4: 2b00 cmp r3, #0 800c5a6: d003 beq.n 800c5b0 LED_SetColor(&color_error); 800c5a8: 483b ldr r0, [pc, #236] @ (800c698 ) 800c5aa: f000 fb25 bl 800cbf8 return; 800c5ae: e06f b.n 800c690 } if(CONN.connControl == CMD_FORCE_UNLOCK){ 800c5b0: 4b38 ldr r3, [pc, #224] @ (800c694 ) 800c5b2: 781b ldrb r3, [r3, #0] 800c5b4: 2b03 cmp r3, #3 800c5b6: d103 bne.n 800c5c0 LED_SetColor(&color_unlock); 800c5b8: 4838 ldr r0, [pc, #224] @ (800c69c ) 800c5ba: f000 fb1d bl 800cbf8 return; 800c5be: e067 b.n 800c690 } if(CONN.connControl == CMD_STOP){ 800c5c0: 4b34 ldr r3, [pc, #208] @ (800c694 ) 800c5c2: 781b ldrb r3, [r3, #0] 800c5c4: 2b01 cmp r3, #1 800c5c6: d103 bne.n 800c5d0 LED_SetColor(&color_estop); 800c5c8: 4835 ldr r0, [pc, #212] @ (800c6a0 ) 800c5ca: f000 fb15 bl 800cbf8 return; 800c5ce: e05f b.n 800c690 } switch(CONN.connState){ 800c5d0: 4b30 ldr r3, [pc, #192] @ (800c694 ) 800c5d2: 785b ldrb r3, [r3, #1] 800c5d4: 2b0d cmp r3, #13 800c5d6: d857 bhi.n 800c688 800c5d8: a201 add r2, pc, #4 @ (adr r2, 800c5e0 ) 800c5da: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800c5de: bf00 nop 800c5e0: 0800c619 .word 0x0800c619 800c5e4: 0800c621 .word 0x0800c621 800c5e8: 0800c629 .word 0x0800c629 800c5ec: 0800c631 .word 0x0800c631 800c5f0: 0800c639 .word 0x0800c639 800c5f4: 0800c641 .word 0x0800c641 800c5f8: 0800c649 .word 0x0800c649 800c5fc: 0800c651 .word 0x0800c651 800c600: 0800c659 .word 0x0800c659 800c604: 0800c661 .word 0x0800c661 800c608: 0800c669 .word 0x0800c669 800c60c: 0800c671 .word 0x0800c671 800c610: 0800c679 .word 0x0800c679 800c614: 0800c681 .word 0x0800c681 case Unknown: LED_SetColor(&color_unknown); 800c618: 4822 ldr r0, [pc, #136] @ (800c6a4 ) 800c61a: f000 faed bl 800cbf8 break; 800c61e: e037 b.n 800c690 case Unplugged: LED_SetColor(&color_unplugged); 800c620: 4821 ldr r0, [pc, #132] @ (800c6a8 ) 800c622: f000 fae9 bl 800cbf8 break; 800c626: e033 b.n 800c690 case Disabled: LED_SetColor(&color_error); 800c628: 481b ldr r0, [pc, #108] @ (800c698 ) 800c62a: f000 fae5 bl 800cbf8 break; 800c62e: e02f b.n 800c690 case Preparing: LED_SetColor(&color_preparing); 800c630: 481e ldr r0, [pc, #120] @ (800c6ac ) 800c632: f000 fae1 bl 800cbf8 break; 800c636: e02b b.n 800c690 case AuthRequired: LED_SetColor(&color_preparing); 800c638: 481c ldr r0, [pc, #112] @ (800c6ac ) 800c63a: f000 fadd bl 800cbf8 break; 800c63e: e027 b.n 800c690 case WaitingForEnergy: LED_SetColor(&color_charging); 800c640: 481b ldr r0, [pc, #108] @ (800c6b0 ) 800c642: f000 fad9 bl 800cbf8 break; 800c646: e023 b.n 800c690 case ChargingPausedEV: LED_SetColor(&color_charging); 800c648: 4819 ldr r0, [pc, #100] @ (800c6b0 ) 800c64a: f000 fad5 bl 800cbf8 break; 800c64e: e01f b.n 800c690 case ChargingPausedEVSE: LED_SetColor(&color_charging); 800c650: 4817 ldr r0, [pc, #92] @ (800c6b0 ) 800c652: f000 fad1 bl 800cbf8 break; 800c656: e01b b.n 800c690 case Charging: LED_SetColor(&color_charging); 800c658: 4815 ldr r0, [pc, #84] @ (800c6b0 ) 800c65a: f000 facd bl 800cbf8 break; 800c65e: e017 b.n 800c690 case AuthTimeout: LED_SetColor(&color_finished); 800c660: 4814 ldr r0, [pc, #80] @ (800c6b4 ) 800c662: f000 fac9 bl 800cbf8 break; 800c666: e013 b.n 800c690 case Finished: LED_SetColor(&color_finished); 800c668: 4812 ldr r0, [pc, #72] @ (800c6b4 ) 800c66a: f000 fac5 bl 800cbf8 break; 800c66e: e00f b.n 800c690 case FinishedEVSE: LED_SetColor(&color_finished); 800c670: 4810 ldr r0, [pc, #64] @ (800c6b4 ) 800c672: f000 fac1 bl 800cbf8 break; 800c676: e00b b.n 800c690 case FinishedEV: LED_SetColor(&color_finished); 800c678: 480e ldr r0, [pc, #56] @ (800c6b4 ) 800c67a: f000 fabd bl 800cbf8 break; 800c67e: e007 b.n 800c690 case Replugging: LED_SetColor(&color_preparing); 800c680: 480a ldr r0, [pc, #40] @ (800c6ac ) 800c682: f000 fab9 bl 800cbf8 break; 800c686: e003 b.n 800c690 default: LED_SetColor(&color_unknown); 800c688: 4806 ldr r0, [pc, #24] @ (800c6a4 ) 800c68a: f000 fab5 bl 800cbf8 break; 800c68e: bf00 nop } } 800c690: bd80 pop {r7, pc} 800c692: bf00 nop 800c694: 200003b0 .word 0x200003b0 800c698: 20000060 .word 0x20000060 800c69c: 20000018 .word 0x20000018 800c6a0: 2000000c .word 0x2000000c 800c6a4: 20000024 .word 0x20000024 800c6a8: 20000030 .word 0x20000030 800c6ac: 2000003c .word 0x2000003c 800c6b0: 20000048 .word 0x20000048 800c6b4: 20000054 .word 0x20000054 0800c6b8 : void interpolateColors(RGB_t* color1, RGB_t* color2, uint16_t a, uint16_t b, RGB_t *result) { 800c6b8: b480 push {r7} 800c6ba: b087 sub sp, #28 800c6bc: af00 add r7, sp, #0 800c6be: 60f8 str r0, [r7, #12] 800c6c0: 60b9 str r1, [r7, #8] 800c6c2: 4611 mov r1, r2 800c6c4: 461a mov r2, r3 800c6c6: 460b mov r3, r1 800c6c8: 80fb strh r3, [r7, #6] 800c6ca: 4613 mov r3, r2 800c6cc: 80bb strh r3, [r7, #4] // Проверяем, чтобы a не выходила за пределы диапазона if (a > b) a = b; 800c6ce: 88fa ldrh r2, [r7, #6] 800c6d0: 88bb ldrh r3, [r7, #4] 800c6d2: 429a cmp r2, r3 800c6d4: d901 bls.n 800c6da 800c6d6: 88bb ldrh r3, [r7, #4] 800c6d8: 80fb strh r3, [r7, #6] if(b==0) b = 1; 800c6da: 88bb ldrh r3, [r7, #4] 800c6dc: 2b00 cmp r3, #0 800c6de: d101 bne.n 800c6e4 800c6e0: 2301 movs r3, #1 800c6e2: 80bb strh r3, [r7, #4] // Вычисляем коэффициент смешивания в виде целого числа uint16_t t = (a * 255) / b; // t будет от 0 до 255 800c6e4: 88fa ldrh r2, [r7, #6] 800c6e6: 4613 mov r3, r2 800c6e8: 021b lsls r3, r3, #8 800c6ea: 1a9a subs r2, r3, r2 800c6ec: 88bb ldrh r3, [r7, #4] 800c6ee: fb92 f3f3 sdiv r3, r2, r3 800c6f2: 82fb strh r3, [r7, #22] // Линейная интерполяция с использованием целых чисел result->R = (color1->R * (255 - t) + color2->R * t) / 255; 800c6f4: 68fb ldr r3, [r7, #12] 800c6f6: 781b ldrb r3, [r3, #0] 800c6f8: 461a mov r2, r3 800c6fa: 8afb ldrh r3, [r7, #22] 800c6fc: f1c3 03ff rsb r3, r3, #255 @ 0xff 800c700: fb03 f202 mul.w r2, r3, r2 800c704: 68bb ldr r3, [r7, #8] 800c706: 781b ldrb r3, [r3, #0] 800c708: 4619 mov r1, r3 800c70a: 8afb ldrh r3, [r7, #22] 800c70c: fb01 f303 mul.w r3, r1, r3 800c710: 4413 add r3, r2 800c712: 4a20 ldr r2, [pc, #128] @ (800c794 ) 800c714: fb82 1203 smull r1, r2, r2, r3 800c718: 441a add r2, r3 800c71a: 11d2 asrs r2, r2, #7 800c71c: 17db asrs r3, r3, #31 800c71e: 1ad3 subs r3, r2, r3 800c720: b2da uxtb r2, r3 800c722: 6a3b ldr r3, [r7, #32] 800c724: 701a strb r2, [r3, #0] result->G = (color1->G * (255 - t) + color2->G * t) / 255; 800c726: 68fb ldr r3, [r7, #12] 800c728: 785b ldrb r3, [r3, #1] 800c72a: 461a mov r2, r3 800c72c: 8afb ldrh r3, [r7, #22] 800c72e: f1c3 03ff rsb r3, r3, #255 @ 0xff 800c732: fb03 f202 mul.w r2, r3, r2 800c736: 68bb ldr r3, [r7, #8] 800c738: 785b ldrb r3, [r3, #1] 800c73a: 4619 mov r1, r3 800c73c: 8afb ldrh r3, [r7, #22] 800c73e: fb01 f303 mul.w r3, r1, r3 800c742: 4413 add r3, r2 800c744: 4a13 ldr r2, [pc, #76] @ (800c794 ) 800c746: fb82 1203 smull r1, r2, r2, r3 800c74a: 441a add r2, r3 800c74c: 11d2 asrs r2, r2, #7 800c74e: 17db asrs r3, r3, #31 800c750: 1ad3 subs r3, r2, r3 800c752: b2da uxtb r2, r3 800c754: 6a3b ldr r3, [r7, #32] 800c756: 705a strb r2, [r3, #1] result->B = (color1->B * (255 - t) + color2->B * t) / 255; 800c758: 68fb ldr r3, [r7, #12] 800c75a: 789b ldrb r3, [r3, #2] 800c75c: 461a mov r2, r3 800c75e: 8afb ldrh r3, [r7, #22] 800c760: f1c3 03ff rsb r3, r3, #255 @ 0xff 800c764: fb03 f202 mul.w r2, r3, r2 800c768: 68bb ldr r3, [r7, #8] 800c76a: 789b ldrb r3, [r3, #2] 800c76c: 4619 mov r1, r3 800c76e: 8afb ldrh r3, [r7, #22] 800c770: fb01 f303 mul.w r3, r1, r3 800c774: 4413 add r3, r2 800c776: 4a07 ldr r2, [pc, #28] @ (800c794 ) 800c778: fb82 1203 smull r1, r2, r2, r3 800c77c: 441a add r2, r3 800c77e: 11d2 asrs r2, r2, #7 800c780: 17db asrs r3, r3, #31 800c782: 1ad3 subs r3, r2, r3 800c784: b2da uxtb r2, r3 800c786: 6a3b ldr r3, [r7, #32] 800c788: 709a strb r2, [r3, #2] } 800c78a: bf00 nop 800c78c: 371c adds r7, #28 800c78e: 46bd mov sp, r7 800c790: bc80 pop {r7} 800c792: 4770 bx lr 800c794: 80808081 .word 0x80808081 0800c798 : #define _WS2812_DELAY_NOPS(n) __asm volatile(".rept " #n "\nnop\n.endr" ::: "memory") #define WS2812_DELAY_NOPS(n) _WS2812_DELAY_NOPS(n) static void ws2812_send_pixel(uint8_t r, uint8_t g, uint8_t b) { uint32_t tmp = ~(((uint32_t)g << 16) | ((uint32_t)r << 8) | (uint32_t)b); 800c798: ea42 2200 orr.w r2, r2, r0, lsl #8 800c79c: ea42 4201 orr.w r2, r2, r1, lsl #16 { 800c7a0: b430 push {r4, r5} uint32_t tmp = ~(((uint32_t)g << 16) | ((uint32_t)r << 8) | (uint32_t)b); 800c7a2: f04f 0c18 mov.w ip, #24 for (int i = 0; i < 24; i++) { LED_DATA_GPIO_Port->BSRR = LED_DATA_Pin; 800c7a6: f44f 7500 mov.w r5, #512 @ 0x200 uint32_t tmp = ~(((uint32_t)g << 16) | ((uint32_t)r << 8) | (uint32_t)b); 800c7aa: 43d3 mvns r3, r2 LED_DATA_GPIO_Port->BSRR = LED_DATA_Pin; 800c7ac: 4c56 ldr r4, [pc, #344] @ (800c908 ) 800c7ae: e052 b.n 800c856 if (tmp & (1U << 23)) { WS2812_DELAY_NOPS(WS2812_T0H_NOP); 800c7b0: bf00 nop 800c7b2: bf00 nop 800c7b4: bf00 nop 800c7b6: bf00 nop 800c7b8: bf00 nop 800c7ba: bf00 nop 800c7bc: bf00 nop 800c7be: bf00 nop 800c7c0: bf00 nop 800c7c2: bf00 nop 800c7c4: bf00 nop 800c7c6: bf00 nop 800c7c8: bf00 nop 800c7ca: bf00 nop 800c7cc: bf00 nop 800c7ce: bf00 nop 800c7d0: bf00 nop 800c7d2: bf00 nop 800c7d4: bf00 nop 800c7d6: bf00 nop 800c7d8: bf00 nop 800c7da: bf00 nop 800c7dc: bf00 nop 800c7de: bf00 nop 800c7e0: bf00 nop LED_DATA_GPIO_Port->BRR = LED_DATA_Pin; 800c7e2: 6165 str r5, [r4, #20] WS2812_DELAY_NOPS(WS2812_T0L_NOP); 800c7e4: bf00 nop 800c7e6: bf00 nop 800c7e8: bf00 nop 800c7ea: bf00 nop 800c7ec: bf00 nop 800c7ee: bf00 nop 800c7f0: bf00 nop 800c7f2: bf00 nop 800c7f4: bf00 nop 800c7f6: bf00 nop 800c7f8: bf00 nop 800c7fa: bf00 nop 800c7fc: bf00 nop 800c7fe: bf00 nop 800c800: bf00 nop 800c802: bf00 nop 800c804: bf00 nop 800c806: bf00 nop 800c808: bf00 nop 800c80a: bf00 nop 800c80c: bf00 nop 800c80e: bf00 nop 800c810: bf00 nop 800c812: bf00 nop 800c814: bf00 nop 800c816: bf00 nop 800c818: bf00 nop 800c81a: bf00 nop 800c81c: bf00 nop 800c81e: bf00 nop 800c820: bf00 nop 800c822: bf00 nop 800c824: bf00 nop 800c826: bf00 nop 800c828: bf00 nop 800c82a: bf00 nop 800c82c: bf00 nop 800c82e: bf00 nop 800c830: bf00 nop 800c832: bf00 nop 800c834: bf00 nop 800c836: bf00 nop 800c838: bf00 nop 800c83a: bf00 nop 800c83c: bf00 nop 800c83e: bf00 nop 800c840: bf00 nop 800c842: bf00 nop 800c844: bf00 nop 800c846: bf00 nop 800c848: bf00 nop 800c84a: bf00 nop for (int i = 0; i < 24; i++) { 800c84c: f1bc 0c01 subs.w ip, ip, #1 } else { WS2812_DELAY_NOPS(WS2812_T1H_NOP); LED_DATA_GPIO_Port->BRR = LED_DATA_Pin; WS2812_DELAY_NOPS(WS2812_T1L_NOP); } tmp <<= 1; 800c850: ea4f 0343 mov.w r3, r3, lsl #1 for (int i = 0; i < 24; i++) { 800c854: d055 beq.n 800c902 if (tmp & (1U << 23)) { 800c856: 021a lsls r2, r3, #8 LED_DATA_GPIO_Port->BSRR = LED_DATA_Pin; 800c858: 6125 str r5, [r4, #16] if (tmp & (1U << 23)) { 800c85a: d4a9 bmi.n 800c7b0 WS2812_DELAY_NOPS(WS2812_T1H_NOP); 800c85c: bf00 nop 800c85e: bf00 nop 800c860: bf00 nop 800c862: bf00 nop 800c864: bf00 nop 800c866: bf00 nop 800c868: bf00 nop 800c86a: bf00 nop 800c86c: bf00 nop 800c86e: bf00 nop 800c870: bf00 nop 800c872: bf00 nop 800c874: bf00 nop 800c876: bf00 nop 800c878: bf00 nop 800c87a: bf00 nop 800c87c: bf00 nop 800c87e: bf00 nop 800c880: bf00 nop 800c882: bf00 nop 800c884: bf00 nop 800c886: bf00 nop 800c888: bf00 nop 800c88a: bf00 nop 800c88c: bf00 nop 800c88e: bf00 nop 800c890: bf00 nop 800c892: bf00 nop 800c894: bf00 nop 800c896: bf00 nop 800c898: bf00 nop 800c89a: bf00 nop 800c89c: bf00 nop 800c89e: bf00 nop 800c8a0: bf00 nop 800c8a2: bf00 nop 800c8a4: bf00 nop 800c8a6: bf00 nop 800c8a8: bf00 nop 800c8aa: bf00 nop 800c8ac: bf00 nop 800c8ae: bf00 nop 800c8b0: bf00 nop 800c8b2: bf00 nop 800c8b4: bf00 nop 800c8b6: bf00 nop 800c8b8: bf00 nop 800c8ba: bf00 nop 800c8bc: bf00 nop 800c8be: bf00 nop 800c8c0: bf00 nop 800c8c2: bf00 nop LED_DATA_GPIO_Port->BRR = LED_DATA_Pin; 800c8c4: 6165 str r5, [r4, #20] WS2812_DELAY_NOPS(WS2812_T1L_NOP); 800c8c6: bf00 nop 800c8c8: bf00 nop 800c8ca: bf00 nop 800c8cc: bf00 nop 800c8ce: bf00 nop 800c8d0: bf00 nop 800c8d2: bf00 nop 800c8d4: bf00 nop 800c8d6: bf00 nop 800c8d8: bf00 nop 800c8da: bf00 nop 800c8dc: bf00 nop 800c8de: bf00 nop 800c8e0: bf00 nop 800c8e2: bf00 nop 800c8e4: bf00 nop 800c8e6: bf00 nop 800c8e8: bf00 nop 800c8ea: bf00 nop 800c8ec: bf00 nop 800c8ee: bf00 nop 800c8f0: bf00 nop 800c8f2: bf00 nop 800c8f4: bf00 nop 800c8f6: bf00 nop for (int i = 0; i < 24; i++) { 800c8f8: f1bc 0c01 subs.w ip, ip, #1 tmp <<= 1; 800c8fc: ea4f 0343 mov.w r3, r3, lsl #1 for (int i = 0; i < 24; i++) { 800c900: d1a9 bne.n 800c856 } } 800c902: bc30 pop {r4, r5} 800c904: 4770 bx lr 800c906: bf00 nop 800c908: 40011000 .word 0x40011000 0800c90c : static void ws2812_update(RGB_t *led0, RGB_t *led1) { 800c90c: b538 push {r3, r4, r5, lr} 800c90e: 460c mov r4, r1 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 800c910: f3ef 8510 mrs r5, PRIMASK __ASM volatile ("cpsid i" : : : "memory"); 800c914: b672 cpsid i uint32_t primask = __get_PRIMASK(); __disable_irq(); ws2812_send_pixel(led0->R, led0->G, led0->B); 800c916: 7882 ldrb r2, [r0, #2] 800c918: 7841 ldrb r1, [r0, #1] 800c91a: 7800 ldrb r0, [r0, #0] 800c91c: f7ff ff3c bl 800c798 ws2812_send_pixel(led1->R, led1->G, led1->B); 800c920: 78a2 ldrb r2, [r4, #2] 800c922: 7861 ldrb r1, [r4, #1] 800c924: 7820 ldrb r0, [r4, #0] 800c926: f7ff ff37 bl 800c798 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 800c92a: f385 8810 msr PRIMASK, r5 __set_PRIMASK(primask); } 800c92e: bd38 pop {r3, r4, r5, pc} 0800c930 : #pragma GCC pop_options static RGB_t RGB_ScaleBrightness(const RGB_t *color) { 800c930: b480 push {r7} 800c932: b085 sub sp, #20 800c934: af00 add r7, sp, #0 800c936: 6078 str r0, [r7, #4] RGB_t out = { .R = (uint8_t)((uint16_t)color->R * WS2812_BRIGHTNESS / 255), 800c938: 687b ldr r3, [r7, #4] 800c93a: 781b ldrb r3, [r3, #0] 800c93c: 461a mov r2, r3 800c93e: 4613 mov r3, r2 800c940: 011b lsls r3, r3, #4 800c942: 1a9b subs r3, r3, r2 800c944: 009b lsls r3, r3, #2 800c946: 4a21 ldr r2, [pc, #132] @ (800c9cc ) 800c948: fb82 1203 smull r1, r2, r2, r3 800c94c: 441a add r2, r3 800c94e: 11d2 asrs r2, r2, #7 800c950: 17db asrs r3, r3, #31 800c952: 1ad3 subs r3, r2, r3 800c954: b2db uxtb r3, r3 RGB_t out = { 800c956: 723b strb r3, [r7, #8] .G = (uint8_t)((uint16_t)color->G * WS2812_BRIGHTNESS / 255), 800c958: 687b ldr r3, [r7, #4] 800c95a: 785b ldrb r3, [r3, #1] 800c95c: 461a mov r2, r3 800c95e: 4613 mov r3, r2 800c960: 011b lsls r3, r3, #4 800c962: 1a9b subs r3, r3, r2 800c964: 009b lsls r3, r3, #2 800c966: 4a19 ldr r2, [pc, #100] @ (800c9cc ) 800c968: fb82 1203 smull r1, r2, r2, r3 800c96c: 441a add r2, r3 800c96e: 11d2 asrs r2, r2, #7 800c970: 17db asrs r3, r3, #31 800c972: 1ad3 subs r3, r2, r3 800c974: b2db uxtb r3, r3 RGB_t out = { 800c976: 727b strb r3, [r7, #9] .B = (uint8_t)((uint16_t)color->B * WS2812_BRIGHTNESS / 255), 800c978: 687b ldr r3, [r7, #4] 800c97a: 789b ldrb r3, [r3, #2] 800c97c: 461a mov r2, r3 800c97e: 4613 mov r3, r2 800c980: 011b lsls r3, r3, #4 800c982: 1a9b subs r3, r3, r2 800c984: 009b lsls r3, r3, #2 800c986: 4a11 ldr r2, [pc, #68] @ (800c9cc ) 800c988: fb82 1203 smull r1, r2, r2, r3 800c98c: 441a add r2, r3 800c98e: 11d2 asrs r2, r2, #7 800c990: 17db asrs r3, r3, #31 800c992: 1ad3 subs r3, r2, r3 800c994: b2db uxtb r3, r3 RGB_t out = { 800c996: 72bb strb r3, [r7, #10] }; return out; 800c998: f107 030c add.w r3, r7, #12 800c99c: f107 0208 add.w r2, r7, #8 800c9a0: 6812 ldr r2, [r2, #0] 800c9a2: 4611 mov r1, r2 800c9a4: 8019 strh r1, [r3, #0] 800c9a6: 3302 adds r3, #2 800c9a8: 0c12 lsrs r2, r2, #16 800c9aa: 701a strb r2, [r3, #0] 800c9ac: 2300 movs r3, #0 800c9ae: 7b3a ldrb r2, [r7, #12] 800c9b0: f362 0307 bfi r3, r2, #0, #8 800c9b4: 7b7a ldrb r2, [r7, #13] 800c9b6: f362 230f bfi r3, r2, #8, #8 800c9ba: 7bba ldrb r2, [r7, #14] 800c9bc: f362 4317 bfi r3, r2, #16, #8 } 800c9c0: 4618 mov r0, r3 800c9c2: 3714 adds r7, #20 800c9c4: 46bd mov sp, r7 800c9c6: bc80 pop {r7} 800c9c8: 4770 bx lr 800c9ca: bf00 nop 800c9cc: 80808081 .word 0x80808081 0800c9d0 : * Моргание красным на втором WS2812 при chargingError > 0. * Логика как Slave-LB24 LED_Task: N вспышек = код ошибки, пауза 30×100 ms. * Вызывается из LED_Task каждые 20 ms; шаг FSM — 100 ms. */ static void LED_Ws2812ErrorBlinkUpdate(void) { 800c9d0: b580 push {r7, lr} 800c9d2: b082 sub sp, #8 800c9d4: af00 add r7, sp, #0 static uint8_t led_pause; static uint32_t blink_tick; static uint32_t flash_until; static CONN_Error_t last_error = CONN_NO_ERROR; const CONN_Error_t err = CONN.chargingError; 800c9d6: 4b4c ldr r3, [pc, #304] @ (800cb08 ) 800c9d8: 7f5b ldrb r3, [r3, #29] 800c9da: 71bb strb r3, [r7, #6] const uint32_t now = HAL_GetTick(); 800c9dc: f002 fe30 bl 800f640 800c9e0: 6038 str r0, [r7, #0] if (err == CONN_NO_ERROR) { 800c9e2: 79bb ldrb r3, [r7, #6] 800c9e4: 2b00 cmp r3, #0 800c9e6: d118 bne.n 800ca1a err_counter = 0; 800c9e8: 4b48 ldr r3, [pc, #288] @ (800cb0c ) 800c9ea: 2200 movs r2, #0 800c9ec: 701a strb r2, [r3, #0] led_state = 0; 800c9ee: 4b48 ldr r3, [pc, #288] @ (800cb10 ) 800c9f0: 2200 movs r2, #0 800c9f2: 701a strb r2, [r3, #0] led_pause = 0; 800c9f4: 4b47 ldr r3, [pc, #284] @ (800cb14 ) 800c9f6: 2200 movs r2, #0 800c9f8: 701a strb r2, [r3, #0] flash_until = 0; 800c9fa: 4b47 ldr r3, [pc, #284] @ (800cb18 ) 800c9fc: 2200 movs r2, #0 800c9fe: 601a str r2, [r3, #0] last_error = CONN_NO_ERROR; 800ca00: 4b46 ldr r3, [pc, #280] @ (800cb1c ) 800ca02: 2200 movs r2, #0 800ca04: 701a strb r2, [r3, #0] ws2812_led1.R = 0; 800ca06: 4b46 ldr r3, [pc, #280] @ (800cb20 ) 800ca08: 2200 movs r2, #0 800ca0a: 701a strb r2, [r3, #0] ws2812_led1.G = 0; 800ca0c: 4b44 ldr r3, [pc, #272] @ (800cb20 ) 800ca0e: 2200 movs r2, #0 800ca10: 705a strb r2, [r3, #1] ws2812_led1.B = 0; 800ca12: 4b43 ldr r3, [pc, #268] @ (800cb20 ) 800ca14: 2200 movs r2, #0 800ca16: 709a strb r2, [r3, #2] return; 800ca18: e072 b.n 800cb00 } if (err != last_error) { 800ca1a: 4b40 ldr r3, [pc, #256] @ (800cb1c ) 800ca1c: 781b ldrb r3, [r3, #0] 800ca1e: 79ba ldrb r2, [r7, #6] 800ca20: 429a cmp r2, r3 800ca22: d00e beq.n 800ca42 err_counter = 0; 800ca24: 4b39 ldr r3, [pc, #228] @ (800cb0c ) 800ca26: 2200 movs r2, #0 800ca28: 701a strb r2, [r3, #0] led_state = 0; 800ca2a: 4b39 ldr r3, [pc, #228] @ (800cb10 ) 800ca2c: 2200 movs r2, #0 800ca2e: 701a strb r2, [r3, #0] led_pause = 0; 800ca30: 4b38 ldr r3, [pc, #224] @ (800cb14 ) 800ca32: 2200 movs r2, #0 800ca34: 701a strb r2, [r3, #0] flash_until = 0; 800ca36: 4b38 ldr r3, [pc, #224] @ (800cb18 ) 800ca38: 2200 movs r2, #0 800ca3a: 601a str r2, [r3, #0] last_error = err; 800ca3c: 4a37 ldr r2, [pc, #220] @ (800cb1c ) 800ca3e: 79bb ldrb r3, [r7, #6] 800ca40: 7013 strb r3, [r2, #0] } if (now < flash_until) { 800ca42: 4b35 ldr r3, [pc, #212] @ (800cb18 ) 800ca44: 681b ldr r3, [r3, #0] 800ca46: 683a ldr r2, [r7, #0] 800ca48: 429a cmp r2, r3 800ca4a: d209 bcs.n 800ca60 ws2812_led1.R = 255; 800ca4c: 4b34 ldr r3, [pc, #208] @ (800cb20 ) 800ca4e: 22ff movs r2, #255 @ 0xff 800ca50: 701a strb r2, [r3, #0] ws2812_led1.G = 0; 800ca52: 4b33 ldr r3, [pc, #204] @ (800cb20 ) 800ca54: 2200 movs r2, #0 800ca56: 705a strb r2, [r3, #1] ws2812_led1.B = 0; 800ca58: 4b31 ldr r3, [pc, #196] @ (800cb20 ) 800ca5a: 2200 movs r2, #0 800ca5c: 709a strb r2, [r3, #2] return; 800ca5e: e04f b.n 800cb00 } ws2812_led1.R = 0; 800ca60: 4b2f ldr r3, [pc, #188] @ (800cb20 ) 800ca62: 2200 movs r2, #0 800ca64: 701a strb r2, [r3, #0] ws2812_led1.G = 0; 800ca66: 4b2e ldr r3, [pc, #184] @ (800cb20 ) 800ca68: 2200 movs r2, #0 800ca6a: 705a strb r2, [r3, #1] ws2812_led1.B = 0; 800ca6c: 4b2c ldr r3, [pc, #176] @ (800cb20 ) 800ca6e: 2200 movs r2, #0 800ca70: 709a strb r2, [r3, #2] if ((now - blink_tick) < WS2812_ERROR_BLINK_MS) { 800ca72: 4b2c ldr r3, [pc, #176] @ (800cb24 ) 800ca74: 681b ldr r3, [r3, #0] 800ca76: 683a ldr r2, [r7, #0] 800ca78: 1ad3 subs r3, r2, r3 800ca7a: 2b63 cmp r3, #99 @ 0x63 800ca7c: d93f bls.n 800cafe return; } blink_tick = now; 800ca7e: 4a29 ldr r2, [pc, #164] @ (800cb24 ) 800ca80: 683b ldr r3, [r7, #0] 800ca82: 6013 str r3, [r2, #0] uint8_t led_flash = 0; 800ca84: 2300 movs r3, #0 800ca86: 71fb strb r3, [r7, #7] if (led_pause > 0) { 800ca88: 4b22 ldr r3, [pc, #136] @ (800cb14 ) 800ca8a: 781b ldrb r3, [r3, #0] 800ca8c: 2b00 cmp r3, #0 800ca8e: d006 beq.n 800ca9e led_pause--; 800ca90: 4b20 ldr r3, [pc, #128] @ (800cb14 ) 800ca92: 781b ldrb r3, [r3, #0] 800ca94: 3b01 subs r3, #1 800ca96: b2da uxtb r2, r3 800ca98: 4b1e ldr r3, [pc, #120] @ (800cb14 ) 800ca9a: 701a strb r2, [r3, #0] 800ca9c: e01e b.n 800cadc } else if (err_counter < (uint8_t)err) { 800ca9e: 4b1b ldr r3, [pc, #108] @ (800cb0c ) 800caa0: 781b ldrb r3, [r3, #0] 800caa2: 79ba ldrb r2, [r7, #6] 800caa4: 429a cmp r2, r3 800caa6: d913 bls.n 800cad0 if (led_state == 0) { 800caa8: 4b19 ldr r3, [pc, #100] @ (800cb10 ) 800caaa: 781b ldrb r3, [r3, #0] 800caac: 2b00 cmp r3, #0 800caae: d103 bne.n 800cab8 led_state = 1; 800cab0: 4b17 ldr r3, [pc, #92] @ (800cb10 ) 800cab2: 2201 movs r2, #1 800cab4: 701a strb r2, [r3, #0] 800cab6: e011 b.n 800cadc } else { led_flash = 1; 800cab8: 2301 movs r3, #1 800caba: 71fb strb r3, [r7, #7] led_state = 0; 800cabc: 4b14 ldr r3, [pc, #80] @ (800cb10 ) 800cabe: 2200 movs r2, #0 800cac0: 701a strb r2, [r3, #0] err_counter++; 800cac2: 4b12 ldr r3, [pc, #72] @ (800cb0c ) 800cac4: 781b ldrb r3, [r3, #0] 800cac6: 3301 adds r3, #1 800cac8: b2da uxtb r2, r3 800caca: 4b10 ldr r3, [pc, #64] @ (800cb0c ) 800cacc: 701a strb r2, [r3, #0] 800cace: e005 b.n 800cadc } } else { err_counter = 0; 800cad0: 4b0e ldr r3, [pc, #56] @ (800cb0c ) 800cad2: 2200 movs r2, #0 800cad4: 701a strb r2, [r3, #0] led_pause = WS2812_ERROR_BLINK_PAUSE; 800cad6: 4b0f ldr r3, [pc, #60] @ (800cb14 ) 800cad8: 221e movs r2, #30 800cada: 701a strb r2, [r3, #0] } if (led_flash) { 800cadc: 79fb ldrb r3, [r7, #7] 800cade: 2b00 cmp r3, #0 800cae0: d00e beq.n 800cb00 flash_until = now + WS2812_ERROR_BLINK_MS; 800cae2: 683b ldr r3, [r7, #0] 800cae4: 3364 adds r3, #100 @ 0x64 800cae6: 4a0c ldr r2, [pc, #48] @ (800cb18 ) 800cae8: 6013 str r3, [r2, #0] ws2812_led1.R = 255; 800caea: 4b0d ldr r3, [pc, #52] @ (800cb20 ) 800caec: 22ff movs r2, #255 @ 0xff 800caee: 701a strb r2, [r3, #0] ws2812_led1.G = 0; 800caf0: 4b0b ldr r3, [pc, #44] @ (800cb20 ) 800caf2: 2200 movs r2, #0 800caf4: 705a strb r2, [r3, #1] ws2812_led1.B = 0; 800caf6: 4b0a ldr r3, [pc, #40] @ (800cb20 ) 800caf8: 2200 movs r2, #0 800cafa: 709a strb r2, [r3, #2] 800cafc: e000 b.n 800cb00 return; 800cafe: bf00 nop } } 800cb00: 3708 adds r7, #8 800cb02: 46bd mov sp, r7 800cb04: bd80 pop {r7, pc} 800cb06: bf00 nop 800cb08: 200003b0 .word 0x200003b0 800cb0c: 2000099e .word 0x2000099e 800cb10: 2000099f .word 0x2000099f 800cb14: 200009a0 .word 0x200009a0 800cb18: 200009a4 .word 0x200009a4 800cb1c: 200009a8 .word 0x200009a8 800cb20: 20000988 .word 0x20000988 800cb24: 200009ac .word 0x200009ac 0800cb28 : void RGB_SetColor(RGB_t *color){ 800cb28: b480 push {r7} 800cb2a: b083 sub sp, #12 800cb2c: af00 add r7, sp, #0 800cb2e: 6078 str r0, [r7, #4] htim4.Instance->CCR2 = color->R * 100 / 255; 800cb30: 687b ldr r3, [r7, #4] 800cb32: 781b ldrb r3, [r3, #0] 800cb34: 461a mov r2, r3 800cb36: 2364 movs r3, #100 @ 0x64 800cb38: fb02 f303 mul.w r3, r2, r3 800cb3c: 4a17 ldr r2, [pc, #92] @ (800cb9c ) 800cb3e: fb82 1203 smull r1, r2, r2, r3 800cb42: 441a add r2, r3 800cb44: 11d2 asrs r2, r2, #7 800cb46: 17db asrs r3, r3, #31 800cb48: 1ad2 subs r2, r2, r3 800cb4a: 4b15 ldr r3, [pc, #84] @ (800cba0 ) 800cb4c: 681b ldr r3, [r3, #0] 800cb4e: 639a str r2, [r3, #56] @ 0x38 htim4.Instance->CCR3 = color->G * 100 / 255; 800cb50: 687b ldr r3, [r7, #4] 800cb52: 785b ldrb r3, [r3, #1] 800cb54: 461a mov r2, r3 800cb56: 2364 movs r3, #100 @ 0x64 800cb58: fb02 f303 mul.w r3, r2, r3 800cb5c: 4a0f ldr r2, [pc, #60] @ (800cb9c ) 800cb5e: fb82 1203 smull r1, r2, r2, r3 800cb62: 441a add r2, r3 800cb64: 11d2 asrs r2, r2, #7 800cb66: 17db asrs r3, r3, #31 800cb68: 1ad2 subs r2, r2, r3 800cb6a: 4b0d ldr r3, [pc, #52] @ (800cba0 ) 800cb6c: 681b ldr r3, [r3, #0] 800cb6e: 63da str r2, [r3, #60] @ 0x3c htim4.Instance->CCR4 = color->B * 100 / 255; 800cb70: 687b ldr r3, [r7, #4] 800cb72: 789b ldrb r3, [r3, #2] 800cb74: 461a mov r2, r3 800cb76: 2364 movs r3, #100 @ 0x64 800cb78: fb02 f303 mul.w r3, r2, r3 800cb7c: 4a07 ldr r2, [pc, #28] @ (800cb9c ) 800cb7e: fb82 1203 smull r1, r2, r2, r3 800cb82: 441a add r2, r3 800cb84: 11d2 asrs r2, r2, #7 800cb86: 17db asrs r3, r3, #31 800cb88: 1ad2 subs r2, r2, r3 800cb8a: 4b05 ldr r3, [pc, #20] @ (800cba0 ) 800cb8c: 681b ldr r3, [r3, #0] 800cb8e: 641a str r2, [r3, #64] @ 0x40 } 800cb90: bf00 nop 800cb92: 370c adds r7, #12 800cb94: 46bd mov sp, r7 800cb96: bc80 pop {r7} 800cb98: 4770 bx lr 800cb9a: bf00 nop 800cb9c: 80808081 .word 0x80808081 800cba0: 20001250 .word 0x20001250 0800cba4 : void WS2812_SetColor(RGB_t *color){ 800cba4: b580 push {r7, lr} 800cba6: b084 sub sp, #16 800cba8: af00 add r7, sp, #0 800cbaa: 6078 str r0, [r7, #4] RGB_t led0 = RGB_ScaleBrightness(color); 800cbac: 6878 ldr r0, [r7, #4] 800cbae: f7ff febf bl 800c930 800cbb2: 4603 mov r3, r0 800cbb4: 461a mov r2, r3 800cbb6: 733a strb r2, [r7, #12] 800cbb8: f3c3 2207 ubfx r2, r3, #8, #8 800cbbc: 737a strb r2, [r7, #13] 800cbbe: f3c3 4307 ubfx r3, r3, #16, #8 800cbc2: 73bb strb r3, [r7, #14] RGB_t led1 = RGB_ScaleBrightness(&ws2812_led1); 800cbc4: 480b ldr r0, [pc, #44] @ (800cbf4 ) 800cbc6: f7ff feb3 bl 800c930 800cbca: 4603 mov r3, r0 800cbcc: 461a mov r2, r3 800cbce: 723a strb r2, [r7, #8] 800cbd0: f3c3 2207 ubfx r2, r3, #8, #8 800cbd4: 727a strb r2, [r7, #9] 800cbd6: f3c3 4307 ubfx r3, r3, #16, #8 800cbda: 72bb strb r3, [r7, #10] ws2812_update(&led0, &led1); 800cbdc: f107 0208 add.w r2, r7, #8 800cbe0: f107 030c add.w r3, r7, #12 800cbe4: 4611 mov r1, r2 800cbe6: 4618 mov r0, r3 800cbe8: f7ff fe90 bl 800c90c } 800cbec: bf00 nop 800cbee: 3710 adds r7, #16 800cbf0: 46bd mov sp, r7 800cbf2: bd80 pop {r7, pc} 800cbf4: 20000988 .word 0x20000988 0800cbf8 : void LED_SetColor(RGB_Cycle_t *color){ 800cbf8: b480 push {r7} 800cbfa: b083 sub sp, #12 800cbfc: af00 add r7, sp, #0 800cbfe: 6078 str r0, [r7, #4] memcpy(&LED_Cycle, color, sizeof(RGB_Cycle_t)); 800cc00: 4b05 ldr r3, [pc, #20] @ (800cc18 ) 800cc02: 687a ldr r2, [r7, #4] 800cc04: 6810 ldr r0, [r2, #0] 800cc06: 6851 ldr r1, [r2, #4] 800cc08: c303 stmia r3!, {r0, r1} 800cc0a: 8912 ldrh r2, [r2, #8] 800cc0c: 801a strh r2, [r3, #0] } 800cc0e: bf00 nop 800cc10: 370c adds r7, #12 800cc12: 46bd mov sp, r7 800cc14: bc80 pop {r7} 800cc16: 4770 bx lr 800cc18: 20000994 .word 0x20000994 0800cc1c : void LED_Init(){ 800cc1c: b580 push {r7, lr} 800cc1e: b082 sub sp, #8 800cc20: af00 add r7, sp, #0 RGB_t color = {.R=0, .G=0, .B=0}; 800cc22: 2300 movs r3, #0 800cc24: 713b strb r3, [r7, #4] 800cc26: 2300 movs r3, #0 800cc28: 717b strb r3, [r7, #5] 800cc2a: 2300 movs r3, #0 800cc2c: 71bb strb r3, [r7, #6] HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_2); 800cc2e: 2104 movs r1, #4 800cc30: 480b ldr r0, [pc, #44] @ (800cc60 ) 800cc32: f006 fbd3 bl 80133dc HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); 800cc36: 2108 movs r1, #8 800cc38: 4809 ldr r0, [pc, #36] @ (800cc60 ) 800cc3a: f006 fbcf bl 80133dc HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_4); 800cc3e: 210c movs r1, #12 800cc40: 4807 ldr r0, [pc, #28] @ (800cc60 ) 800cc42: f006 fbcb bl 80133dc RGB_SetColor(&color); 800cc46: 1d3b adds r3, r7, #4 800cc48: 4618 mov r0, r3 800cc4a: f7ff ff6d bl 800cb28 WS2812_SetColor(&color); 800cc4e: 1d3b adds r3, r7, #4 800cc50: 4618 mov r0, r3 800cc52: f7ff ffa7 bl 800cba4 } 800cc56: bf00 nop 800cc58: 3708 adds r7, #8 800cc5a: 46bd mov sp, r7 800cc5c: bd80 pop {r7, pc} 800cc5e: bf00 nop 800cc60: 20001250 .word 0x20001250 0800cc64 : void LED_Task(){ 800cc64: b580 push {r7, lr} 800cc66: b082 sub sp, #8 800cc68: af02 add r7, sp, #8 static uint32_t led_tick; if((HAL_GetTick() - led_tick) > 20){ 800cc6a: f002 fce9 bl 800f640 800cc6e: 4602 mov r2, r0 800cc70: 4b49 ldr r3, [pc, #292] @ (800cd98 ) 800cc72: 681b ldr r3, [r3, #0] 800cc74: 1ad3 subs r3, r2, r3 800cc76: 2b14 cmp r3, #20 800cc78: f240 808a bls.w 800cd90 led_tick = HAL_GetTick(); 800cc7c: f002 fce0 bl 800f640 800cc80: 4603 mov r3, r0 800cc82: 4a45 ldr r2, [pc, #276] @ (800cd98 ) 800cc84: 6013 str r3, [r2, #0] LED_State.tick++; 800cc86: 4b45 ldr r3, [pc, #276] @ (800cd9c ) 800cc88: 885b ldrh r3, [r3, #2] 800cc8a: 3301 adds r3, #1 800cc8c: b29a uxth r2, r3 800cc8e: 4b43 ldr r3, [pc, #268] @ (800cd9c ) 800cc90: 805a strh r2, [r3, #2] switch(LED_State.state){ 800cc92: 4b42 ldr r3, [pc, #264] @ (800cd9c ) 800cc94: 781b ldrb r3, [r3, #0] 800cc96: 2b03 cmp r3, #3 800cc98: d867 bhi.n 800cd6a 800cc9a: a201 add r2, pc, #4 @ (adr r2, 800cca0 ) 800cc9c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800cca0: 0800ccb1 .word 0x0800ccb1 800cca4: 0800cce3 .word 0x0800cce3 800cca8: 0800cd0f .word 0x0800cd0f 800ccac: 0800cd41 .word 0x0800cd41 case LED_RISING: interpolateColors(&LED_Cycle.Color2, &LED_Cycle.Color1, LED_State.tick, LED_Cycle.Tr, &LED_State.color); 800ccb0: 4b3a ldr r3, [pc, #232] @ (800cd9c ) 800ccb2: 885a ldrh r2, [r3, #2] 800ccb4: 4b3a ldr r3, [pc, #232] @ (800cda0 ) 800ccb6: 78db ldrb r3, [r3, #3] 800ccb8: 4619 mov r1, r3 800ccba: 4b3a ldr r3, [pc, #232] @ (800cda4 ) 800ccbc: 9300 str r3, [sp, #0] 800ccbe: 460b mov r3, r1 800ccc0: 4937 ldr r1, [pc, #220] @ (800cda0 ) 800ccc2: 4839 ldr r0, [pc, #228] @ (800cda8 ) 800ccc4: f7ff fcf8 bl 800c6b8 if(LED_State.tick>LED_Cycle.Tr){ 800ccc8: 4b34 ldr r3, [pc, #208] @ (800cd9c ) 800ccca: 885b ldrh r3, [r3, #2] 800cccc: 4a34 ldr r2, [pc, #208] @ (800cda0 ) 800ccce: 78d2 ldrb r2, [r2, #3] 800ccd0: 4293 cmp r3, r2 800ccd2: d94e bls.n 800cd72 LED_State.state = LED_HIGH; 800ccd4: 4b31 ldr r3, [pc, #196] @ (800cd9c ) 800ccd6: 2201 movs r2, #1 800ccd8: 701a strb r2, [r3, #0] LED_State.tick = 0; 800ccda: 4b30 ldr r3, [pc, #192] @ (800cd9c ) 800ccdc: 2200 movs r2, #0 800ccde: 805a strh r2, [r3, #2] } break; 800cce0: e047 b.n 800cd72 case LED_HIGH: memcpy(&LED_State.color, &LED_Cycle.Color1, sizeof(RGB_t)); 800cce2: 4b2e ldr r3, [pc, #184] @ (800cd9c ) 800cce4: 4a2e ldr r2, [pc, #184] @ (800cda0 ) 800cce6: 3304 adds r3, #4 800cce8: 6812 ldr r2, [r2, #0] 800ccea: 4611 mov r1, r2 800ccec: 8019 strh r1, [r3, #0] 800ccee: 3302 adds r3, #2 800ccf0: 0c12 lsrs r2, r2, #16 800ccf2: 701a strb r2, [r3, #0] if(LED_State.tick>LED_Cycle.Th){ 800ccf4: 4b29 ldr r3, [pc, #164] @ (800cd9c ) 800ccf6: 885b ldrh r3, [r3, #2] 800ccf8: 4a29 ldr r2, [pc, #164] @ (800cda0 ) 800ccfa: 7912 ldrb r2, [r2, #4] 800ccfc: 4293 cmp r3, r2 800ccfe: d93a bls.n 800cd76 LED_State.state = LED_FALLING; 800cd00: 4b26 ldr r3, [pc, #152] @ (800cd9c ) 800cd02: 2202 movs r2, #2 800cd04: 701a strb r2, [r3, #0] LED_State.tick = 0; 800cd06: 4b25 ldr r3, [pc, #148] @ (800cd9c ) 800cd08: 2200 movs r2, #0 800cd0a: 805a strh r2, [r3, #2] } break; 800cd0c: e033 b.n 800cd76 case LED_FALLING: interpolateColors(&LED_Cycle.Color1, &LED_Cycle.Color2, LED_State.tick, LED_Cycle.Tf, &LED_State.color); 800cd0e: 4b23 ldr r3, [pc, #140] @ (800cd9c ) 800cd10: 885a ldrh r2, [r3, #2] 800cd12: 4b23 ldr r3, [pc, #140] @ (800cda0 ) 800cd14: 795b ldrb r3, [r3, #5] 800cd16: 4619 mov r1, r3 800cd18: 4b22 ldr r3, [pc, #136] @ (800cda4 ) 800cd1a: 9300 str r3, [sp, #0] 800cd1c: 460b mov r3, r1 800cd1e: 4922 ldr r1, [pc, #136] @ (800cda8 ) 800cd20: 481f ldr r0, [pc, #124] @ (800cda0 ) 800cd22: f7ff fcc9 bl 800c6b8 if(LED_State.tick>LED_Cycle.Tf){ 800cd26: 4b1d ldr r3, [pc, #116] @ (800cd9c ) 800cd28: 885b ldrh r3, [r3, #2] 800cd2a: 4a1d ldr r2, [pc, #116] @ (800cda0 ) 800cd2c: 7952 ldrb r2, [r2, #5] 800cd2e: 4293 cmp r3, r2 800cd30: d923 bls.n 800cd7a LED_State.state = LED_LOW; 800cd32: 4b1a ldr r3, [pc, #104] @ (800cd9c ) 800cd34: 2203 movs r2, #3 800cd36: 701a strb r2, [r3, #0] LED_State.tick = 0; 800cd38: 4b18 ldr r3, [pc, #96] @ (800cd9c ) 800cd3a: 2200 movs r2, #0 800cd3c: 805a strh r2, [r3, #2] } break; 800cd3e: e01c b.n 800cd7a case LED_LOW: memcpy(&LED_State.color, &LED_Cycle.Color2, sizeof(RGB_t)); 800cd40: 4b16 ldr r3, [pc, #88] @ (800cd9c ) 800cd42: 4a17 ldr r2, [pc, #92] @ (800cda0 ) 800cd44: 3304 adds r3, #4 800cd46: 3207 adds r2, #7 800cd48: 8811 ldrh r1, [r2, #0] 800cd4a: 7892 ldrb r2, [r2, #2] 800cd4c: 8019 strh r1, [r3, #0] 800cd4e: 709a strb r2, [r3, #2] if(LED_State.tick>LED_Cycle.Tl){ 800cd50: 4b12 ldr r3, [pc, #72] @ (800cd9c ) 800cd52: 885b ldrh r3, [r3, #2] 800cd54: 4a12 ldr r2, [pc, #72] @ (800cda0 ) 800cd56: 7992 ldrb r2, [r2, #6] 800cd58: 4293 cmp r3, r2 800cd5a: d910 bls.n 800cd7e LED_State.state = LED_RISING; 800cd5c: 4b0f ldr r3, [pc, #60] @ (800cd9c ) 800cd5e: 2200 movs r2, #0 800cd60: 701a strb r2, [r3, #0] LED_State.tick = 0; 800cd62: 4b0e ldr r3, [pc, #56] @ (800cd9c ) 800cd64: 2200 movs r2, #0 800cd66: 805a strh r2, [r3, #2] } break; 800cd68: e009 b.n 800cd7e default: LED_State.state = LED_RISING; 800cd6a: 4b0c ldr r3, [pc, #48] @ (800cd9c ) 800cd6c: 2200 movs r2, #0 800cd6e: 701a strb r2, [r3, #0] 800cd70: e006 b.n 800cd80 break; 800cd72: bf00 nop 800cd74: e004 b.n 800cd80 break; 800cd76: bf00 nop 800cd78: e002 b.n 800cd80 break; 800cd7a: bf00 nop 800cd7c: e000 b.n 800cd80 break; 800cd7e: bf00 nop } LED_Ws2812ErrorBlinkUpdate(); 800cd80: f7ff fe26 bl 800c9d0 RGB_SetColor(&LED_State.color); 800cd84: 4807 ldr r0, [pc, #28] @ (800cda4 ) 800cd86: f7ff fecf bl 800cb28 WS2812_SetColor(&LED_State.color); 800cd8a: 4806 ldr r0, [pc, #24] @ (800cda4 ) 800cd8c: f7ff ff0a bl 800cba4 } } 800cd90: bf00 nop 800cd92: 46bd mov sp, r7 800cd94: bd80 pop {r7, pc} 800cd96: bf00 nop 800cd98: 200009b0 .word 0x200009b0 800cd9c: 2000098c .word 0x2000098c 800cda0: 20000994 .word 0x20000994 800cda4: 20000990 .word 0x20000990 800cda8: 2000099b .word 0x2000099b 0800cdac : RTC_HandleTypeDef hrtc; /* RTC init function */ void MX_RTC_Init(void) { 800cdac: b580 push {r7, lr} 800cdae: af00 add r7, sp, #0 /* USER CODE END RTC_Init 1 */ /** Initialize RTC Only */ hrtc.Instance = RTC; 800cdb0: 4b0a ldr r3, [pc, #40] @ (800cddc ) 800cdb2: 4a0b ldr r2, [pc, #44] @ (800cde0 ) 800cdb4: 601a str r2, [r3, #0] hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND; 800cdb6: 4b09 ldr r3, [pc, #36] @ (800cddc ) 800cdb8: f04f 32ff mov.w r2, #4294967295 800cdbc: 605a str r2, [r3, #4] hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM; 800cdbe: 4b07 ldr r3, [pc, #28] @ (800cddc ) 800cdc0: f44f 7280 mov.w r2, #256 @ 0x100 800cdc4: 609a str r2, [r3, #8] if (HAL_RTC_Init(&hrtc) != HAL_OK) 800cdc6: 4805 ldr r0, [pc, #20] @ (800cddc ) 800cdc8: f006 f856 bl 8012e78 800cdcc: 4603 mov r3, r0 800cdce: 2b00 cmp r3, #0 800cdd0: d001 beq.n 800cdd6 { Error_Handler(); 800cdd2: f7fd ffef bl 800adb4 } /* USER CODE BEGIN RTC_Init 2 */ /* USER CODE END RTC_Init 2 */ } 800cdd6: bf00 nop 800cdd8: bd80 pop {r7, pc} 800cdda: bf00 nop 800cddc: 200009b4 .word 0x200009b4 800cde0: 40002800 .word 0x40002800 0800cde4 : void HAL_RTC_MspInit(RTC_HandleTypeDef* rtcHandle) { 800cde4: b580 push {r7, lr} 800cde6: b084 sub sp, #16 800cde8: af00 add r7, sp, #0 800cdea: 6078 str r0, [r7, #4] if(rtcHandle->Instance==RTC) 800cdec: 687b ldr r3, [r7, #4] 800cdee: 681b ldr r3, [r3, #0] 800cdf0: 4a0b ldr r2, [pc, #44] @ (800ce20 ) 800cdf2: 4293 cmp r3, r2 800cdf4: d110 bne.n 800ce18 { /* USER CODE BEGIN RTC_MspInit 0 */ /* USER CODE END RTC_MspInit 0 */ HAL_PWR_EnableBkUpAccess(); 800cdf6: f004 ffd3 bl 8011da0 /* Enable BKP CLK enable for backup registers */ __HAL_RCC_BKP_CLK_ENABLE(); 800cdfa: 4b0a ldr r3, [pc, #40] @ (800ce24 ) 800cdfc: 69db ldr r3, [r3, #28] 800cdfe: 4a09 ldr r2, [pc, #36] @ (800ce24 ) 800ce00: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 800ce04: 61d3 str r3, [r2, #28] 800ce06: 4b07 ldr r3, [pc, #28] @ (800ce24 ) 800ce08: 69db ldr r3, [r3, #28] 800ce0a: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 800ce0e: 60fb str r3, [r7, #12] 800ce10: 68fb ldr r3, [r7, #12] /* RTC clock enable */ __HAL_RCC_RTC_ENABLE(); 800ce12: 4b05 ldr r3, [pc, #20] @ (800ce28 ) 800ce14: 2201 movs r2, #1 800ce16: 601a str r2, [r3, #0] /* USER CODE BEGIN RTC_MspInit 1 */ /* USER CODE END RTC_MspInit 1 */ } } 800ce18: bf00 nop 800ce1a: 3710 adds r7, #16 800ce1c: 46bd mov sp, r7 800ce1e: bd80 pop {r7, pc} 800ce20: 40002800 .word 0x40002800 800ce24: 40021000 .word 0x40021000 800ce28: 4242043c .word 0x4242043c 0800ce2c : ISR_FAST static uint8_t process_received_packet(const uint8_t* packet, uint16_t packet_len); static void CCS_UART3_Watchdog(void); static void CCS_LogUart3Error(const char *tag); ISR_FAST static void uart3_log_hal_error(uint8_t uart_num, uint32_t err) { 800ce2c: 4602 mov r2, r0 if (err == HAL_UART_ERROR_NONE) { 800ce2e: b359 cbz r1, 800ce88 ISR_FAST static void uart3_log_hal_error(uint8_t uart_num, uint32_t err) { 800ce30: b570 push {r4, r5, r6, lr} 800ce32: 460c mov r4, r1 log_printf(LOG_ERR, "UART%u HAL error decode: NONE\n", uart_num); return; } log_printf(LOG_ERR, "UART%u HAL error decode: %s%s%s%s%s%s raw=0x%08lx\n", 800ce34: 07cb lsls r3, r1, #31 800ce36: bf58 it pl 800ce38: 4915 ldrpl r1, [pc, #84] @ (800ce90 ) 800ce3a: 4d15 ldr r5, [pc, #84] @ (800ce90 ) 800ce3c: bf48 it mi 800ce3e: 4914 ldrmi r1, [pc, #80] @ (800ce90 ) ISR_FAST static void uart3_log_hal_error(uint8_t uart_num, uint32_t err) { 800ce40: b086 sub sp, #24 log_printf(LOG_ERR, "UART%u HAL error decode: %s%s%s%s%s%s raw=0x%08lx\n", 800ce42: bf54 ite pl 800ce44: 460b movpl r3, r1 800ce46: 4b13 ldrmi r3, [pc, #76] @ (800ce94 ) 800ce48: f014 0f02 tst.w r4, #2 800ce4c: 9104 str r1, [sp, #16] 800ce4e: 4912 ldr r1, [pc, #72] @ (800ce98 ) 800ce50: bf08 it eq 800ce52: 4629 moveq r1, r5 800ce54: f014 0f04 tst.w r4, #4 800ce58: 4810 ldr r0, [pc, #64] @ (800ce9c ) 800ce5a: bf08 it eq 800ce5c: 4628 moveq r0, r5 800ce5e: f014 0f08 tst.w r4, #8 800ce62: 9001 str r0, [sp, #4] 800ce64: 480e ldr r0, [pc, #56] @ (800cea0 ) 800ce66: 4e0f ldr r6, [pc, #60] @ (800cea4 ) 800ce68: bf08 it eq 800ce6a: 462e moveq r6, r5 800ce6c: f014 0f10 tst.w r4, #16 800ce70: bf18 it ne 800ce72: 4605 movne r5, r0 800ce74: 9100 str r1, [sp, #0] 800ce76: e9cd 6502 strd r6, r5, [sp, #8] 800ce7a: 490b ldr r1, [pc, #44] @ (800cea8 ) 800ce7c: 9405 str r4, [sp, #20] 800ce7e: 2004 movs r0, #4 800ce80: f7fd fbe2 bl 800a648 (err & HAL_UART_ERROR_INVALID_CALLBACK) ? "INV_CB " : "", #else "", #endif (unsigned long)err); } 800ce84: b006 add sp, #24 800ce86: bd70 pop {r4, r5, r6, pc} log_printf(LOG_ERR, "UART%u HAL error decode: NONE\n", uart_num); 800ce88: 2004 movs r0, #4 800ce8a: 4908 ldr r1, [pc, #32] @ (800ceac ) 800ce8c: f7fd bbdc b.w 800a648 800ce90: 08018bd4 .word 0x08018bd4 800ce94: 080187a4 .word 0x080187a4 800ce98: 080187a8 .word 0x080187a8 800ce9c: 080187ac .word 0x080187ac 800cea0: 080187b8 .word 0x080187b8 800cea4: 080187b0 .word 0x080187b0 800cea8: 080187e0 .word 0x080187e0 800ceac: 080187c0 .word 0x080187c0 0800ceb0 : ISR_FAST static void uart3_arm_rx_or_log(const char *where) { 800ceb0: b530 push {r4, r5, lr} HAL_StatusTypeDef st = HAL_UARTEx_ReceiveToIdle_DMA(&huart3, rx_buffer, sizeof(rx_buffer)); 800ceb2: f44f 7280 mov.w r2, #256 @ 0x100 ISR_FAST static void uart3_arm_rx_or_log(const char *where) { 800ceb6: 4605 mov r5, r0 800ceb8: b083 sub sp, #12 HAL_StatusTypeDef st = HAL_UARTEx_ReceiveToIdle_DMA(&huart3, rx_buffer, sizeof(rx_buffer)); 800ceba: 4911 ldr r1, [pc, #68] @ (800cf00 ) 800cebc: 4811 ldr r0, [pc, #68] @ (800cf04 ) 800cebe: f007 fa88 bl 80143d2 if (st == HAL_OK) { 800cec2: b908 cbnz r0, 800cec8 uart3_log_hal_error(3u, err_after); CCS_LogUart3Error("UART3 RX arm failed details"); if (err_after != HAL_UART_ERROR_NONE) { (void)HAL_UART_AbortReceive(&huart3); } } 800cec4: b003 add sp, #12 800cec6: bd30 pop {r4, r5, pc} uint32_t err_after = HAL_UART_GetError(&huart3); 800cec8: 4604 mov r4, r0 800ceca: 480e ldr r0, [pc, #56] @ (800cf04 ) 800cecc: f007 fe93 bl 8014bf6 800ced0: 4602 mov r2, r0 log_printf(LOG_ERR, 800ced2: 4623 mov r3, r4 uint32_t err_after = HAL_UART_GetError(&huart3); 800ced4: 4614 mov r4, r2 log_printf(LOG_ERR, 800ced6: 490c ldr r1, [pc, #48] @ (800cf08 ) 800ced8: 462a mov r2, r5 800ceda: 2004 movs r0, #4 800cedc: 9400 str r4, [sp, #0] 800cede: f7fd fbb3 bl 800a648 uart3_log_hal_error(3u, err_after); 800cee2: 2003 movs r0, #3 800cee4: 4621 mov r1, r4 800cee6: f7ff ffa1 bl 800ce2c CCS_LogUart3Error("UART3 RX arm failed details"); 800ceea: 4808 ldr r0, [pc, #32] @ (800cf0c ) 800ceec: f000 fef2 bl 800dcd4 if (err_after != HAL_UART_ERROR_NONE) { 800cef0: 2c00 cmp r4, #0 800cef2: d0e7 beq.n 800cec4 (void)HAL_UART_AbortReceive(&huart3); 800cef4: 4803 ldr r0, [pc, #12] @ (800cf04 ) } 800cef6: b003 add sp, #12 800cef8: e8bd 4030 ldmia.w sp!, {r4, r5, lr} (void)HAL_UART_AbortReceive(&huart3); 800cefc: f007 bb2a b.w 8014554 800cf00: 200009ec .word 0x200009ec 800cf04: 20001370 .word 0x20001370 800cf08: 08018814 .word 0x08018814 800cf0c: 08018850 .word 0x08018850 0800cf10 : ISR_FAST void CCS_RxEventCallback(UART_HandleTypeDef *huart, uint16_t size) { 800cf10: b538 push {r3, r4, r5, lr} if (huart != &huart3) { 800cf12: 4b1a ldr r3, [pc, #104] @ (800cf7c ) ISR_FAST void CCS_RxEventCallback(UART_HandleTypeDef *huart, uint16_t size) { 800cf14: 460c mov r4, r1 if (huart != &huart3) { 800cf16: 4283 cmp r3, r0 800cf18: d113 bne.n 800cf42 log_printf(LOG_WARN, "UART3 RX drop: wrong huart in RxEventCallback (size=%u)\n", (unsigned)size); return; } if (size == 0u) { 800cf1a: b329 cbz r1, 800cf68 log_printf(LOG_WARN, "UART3 RX drop: RxEvent size=0 (idle, no payload)\n"); uart3_arm_rx_or_log("RxEventCallback"); return; } if (size > sizeof(rx_buffer)) { 800cf1c: f5b1 7f80 cmp.w r1, #256 @ 0x100 800cf20: d816 bhi.n 800cf50 log_printf(LOG_ERR, "UART3 RX drop: size=%u > rx_buffer %u (overflow, not parsed)\n", (unsigned)size, (unsigned)sizeof(rx_buffer)); uart3_arm_rx_or_log("RxEventCallback"); return; } uart3_last_packet_tick = HAL_GetTick(); 800cf22: f002 fb8d bl 800f640 800cf26: 4603 mov r3, r0 800cf28: 4d15 ldr r5, [pc, #84] @ (800cf80 ) uart3_last_reinit_tick = uart3_last_packet_tick; 800cf2a: 4a16 ldr r2, [pc, #88] @ (800cf84 ) process_received_packet(rx_buffer, size); 800cf2c: 4621 mov r1, r4 800cf2e: 4816 ldr r0, [pc, #88] @ (800cf88 ) uart3_last_packet_tick = HAL_GetTick(); 800cf30: 602b str r3, [r5, #0] uart3_last_reinit_tick = uart3_last_packet_tick; 800cf32: 6013 str r3, [r2, #0] process_received_packet(rx_buffer, size); 800cf34: f000 fe26 bl 800db84 uart3_arm_rx_or_log("RxEventCallback"); } 800cf38: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} uart3_arm_rx_or_log("RxEventCallback"); 800cf3c: 4813 ldr r0, [pc, #76] @ (800cf8c ) 800cf3e: f7ff bfb7 b.w 800ceb0 log_printf(LOG_WARN, "UART3 RX drop: wrong huart in RxEventCallback (size=%u)\n", 800cf42: 460a mov r2, r1 } 800cf44: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} log_printf(LOG_WARN, "UART3 RX drop: wrong huart in RxEventCallback (size=%u)\n", 800cf48: 2005 movs r0, #5 800cf4a: 4911 ldr r1, [pc, #68] @ (800cf90 ) 800cf4c: f7fd bb7c b.w 800a648 log_printf(LOG_ERR, "UART3 RX drop: size=%u > rx_buffer %u (overflow, not parsed)\n", 800cf50: f44f 7380 mov.w r3, #256 @ 0x100 800cf54: 460a mov r2, r1 800cf56: 2004 movs r0, #4 800cf58: 490e ldr r1, [pc, #56] @ (800cf94 ) 800cf5a: f7fd fb75 bl 800a648 } 800cf5e: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} uart3_arm_rx_or_log("RxEventCallback"); 800cf62: 480a ldr r0, [pc, #40] @ (800cf8c ) 800cf64: f7ff bfa4 b.w 800ceb0 log_printf(LOG_WARN, "UART3 RX drop: RxEvent size=0 (idle, no payload)\n"); 800cf68: 2005 movs r0, #5 800cf6a: 490b ldr r1, [pc, #44] @ (800cf98 ) 800cf6c: f7fd fb6c bl 800a648 } 800cf70: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} uart3_arm_rx_or_log("RxEventCallback"); 800cf74: 4805 ldr r0, [pc, #20] @ (800cf8c ) 800cf76: f7ff bf9b b.w 800ceb0 800cf7a: bf00 nop 800cf7c: 20001370 .word 0x20001370 800cf80: 20000cfc .word 0x20000cfc 800cf84: 20000d00 .word 0x20000d00 800cf88: 200009ec .word 0x200009ec 800cf8c: 080188dc .word 0x080188dc 800cf90: 0801886c .word 0x0801886c 800cf94: 080188ec .word 0x080188ec 800cf98: 080188a8 .word 0x080188a8 0800cf9c : ISR_FAST void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { 800cf9c: b5f8 push {r3, r4, r5, r6, r7, lr} 800cf9e: 4604 mov r4, r0 uint32_t error = HAL_UART_GetError(huart); 800cfa0: f007 fe29 bl 8014bf6 uint8_t uart_num = 800cfa4: 4b29 ldr r3, [pc, #164] @ (800d04c ) uint32_t error = HAL_UART_GetError(huart); 800cfa6: 4605 mov r5, r0 uint8_t uart_num = 800cfa8: 429c cmp r4, r3 800cfaa: d032 beq.n 800d012 800cfac: 4e28 ldr r6, [pc, #160] @ (800d050 ) 800cfae: 42b4 cmp r4, r6 800cfb0: d017 beq.n 800cfe2 800cfb2: 4b28 ldr r3, [pc, #160] @ (800d054 ) 800cfb4: 429c cmp r4, r3 800cfb6: d045 beq.n 800d044 (huart == &huart2) ? 2 : (huart == &huart3) ? 3 : (huart == &huart5) ? 5 : 0; log_printf(LOG_ERR, 800cfb8: 4603 mov r3, r0 800cfba: 2200 movs r2, #0 800cfbc: 4926 ldr r1, [pc, #152] @ (800d058 ) 800cfbe: 2004 movs r0, #4 800cfc0: f7fd fb42 bl 800a648 "UART%u HAL error (ISR): raw=0x%08lx — RX may be corrupted until re-arm\n", uart_num, (unsigned long)error); uart3_log_hal_error(uart_num, error); 800cfc4: 4629 mov r1, r5 800cfc6: 2000 movs r0, #0 800cfc8: f7ff ff30 bl 800ce2c (void)HAL_UART_AbortReceive(huart); 800cfcc: 4620 mov r0, r4 800cfce: f007 fac1 bl 8014554 (void)HAL_UART_AbortTransmit(huart); 800cfd2: 4620 mov r0, r4 800cfd4: f007 fa56 bl 8014484 if (huart == &huart3) { uart3_tx_busy = 0; uart3_arm_rx_or_log("ErrorCallback"); } else { SC_RecoverUartDma(huart); 800cfd8: 4620 mov r0, r4 } } 800cfda: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} SC_RecoverUartDma(huart); 800cfde: f001 b935 b.w 800e24c log_printf(LOG_ERR, 800cfe2: 4603 mov r3, r0 800cfe4: 2203 movs r2, #3 800cfe6: 491c ldr r1, [pc, #112] @ (800d058 ) 800cfe8: 2004 movs r0, #4 800cfea: f7fd fb2d bl 800a648 uart3_log_hal_error(uart_num, error); 800cfee: 4629 mov r1, r5 800cff0: 2003 movs r0, #3 800cff2: f7ff ff1b bl 800ce2c (void)HAL_UART_AbortReceive(huart); 800cff6: 4620 mov r0, r4 800cff8: f007 faac bl 8014554 (void)HAL_UART_AbortTransmit(huart); 800cffc: 4620 mov r0, r4 800cffe: f007 fa41 bl 8014484 uart3_tx_busy = 0; 800d002: 2200 movs r2, #0 800d004: 4b15 ldr r3, [pc, #84] @ (800d05c ) uart3_arm_rx_or_log("ErrorCallback"); 800d006: 4816 ldr r0, [pc, #88] @ (800d060 ) uart3_tx_busy = 0; 800d008: 701a strb r2, [r3, #0] } 800d00a: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} uart3_arm_rx_or_log("ErrorCallback"); 800d00e: f7ff bf4f b.w 800ceb0 800d012: 2202 movs r2, #2 uint8_t uart_num = 800d014: 4617 mov r7, r2 800d016: 4e0e ldr r6, [pc, #56] @ (800d050 ) log_printf(LOG_ERR, 800d018: 462b mov r3, r5 800d01a: 490f ldr r1, [pc, #60] @ (800d058 ) 800d01c: 2004 movs r0, #4 800d01e: f7fd fb13 bl 800a648 uart3_log_hal_error(uart_num, error); 800d022: 4629 mov r1, r5 800d024: 4638 mov r0, r7 800d026: f7ff ff01 bl 800ce2c (void)HAL_UART_AbortReceive(huart); 800d02a: 4620 mov r0, r4 800d02c: f007 fa92 bl 8014554 (void)HAL_UART_AbortTransmit(huart); 800d030: 4620 mov r0, r4 800d032: f007 fa27 bl 8014484 if (huart == &huart3) { 800d036: 42b4 cmp r4, r6 800d038: d0e3 beq.n 800d002 SC_RecoverUartDma(huart); 800d03a: 4620 mov r0, r4 } 800d03c: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} SC_RecoverUartDma(huart); 800d040: f001 b904 b.w 800e24c 800d044: 2205 movs r2, #5 uint8_t uart_num = 800d046: 4617 mov r7, r2 800d048: e7e6 b.n 800d018 800d04a: bf00 nop 800d04c: 20001328 .word 0x20001328 800d050: 20001370 .word 0x20001370 800d054: 20001298 .word 0x20001298 800d058: 0801892c .word 0x0801892c 800d05c: 20000cee .word 0x20000cee 800d060: 08018978 .word 0x08018978 0800d064 : void CCS_TxCpltCallback(UART_HandleTypeDef *huart) { 800d064: b580 push {r7, lr} 800d066: b082 sub sp, #8 800d068: af00 add r7, sp, #0 800d06a: 6078 str r0, [r7, #4] if (huart != &huart3) { 800d06c: 687b ldr r3, [r7, #4] 800d06e: 4a16 ldr r2, [pc, #88] @ (800d0c8 ) 800d070: 4293 cmp r3, r2 800d072: d124 bne.n 800d0be return; } uart3_tx_busy = 0; 800d074: 4b15 ldr r3, [pc, #84] @ (800d0cc ) 800d076: 2200 movs r2, #0 800d078: 701a strb r2, [r3, #0] if (tx_pending_len > 0) { 800d07a: 4b15 ldr r3, [pc, #84] @ (800d0d0 ) 800d07c: 881b ldrh r3, [r3, #0] 800d07e: 2b00 cmp r3, #0 800d080: d01e beq.n 800d0c0 memcpy(tx_buffer, tx_pending_buffer, tx_pending_len); 800d082: 4b13 ldr r3, [pc, #76] @ (800d0d0 ) 800d084: 881b ldrh r3, [r3, #0] 800d086: 461a mov r2, r3 800d088: 4912 ldr r1, [pc, #72] @ (800d0d4 ) 800d08a: 4813 ldr r0, [pc, #76] @ (800d0d8 ) 800d08c: f009 f863 bl 8016156 uart3_tx_busy = 1; 800d090: 4b0e ldr r3, [pc, #56] @ (800d0cc ) 800d092: 2201 movs r2, #1 800d094: 701a strb r2, [r3, #0] if (HAL_UART_Transmit_DMA(&huart3, tx_buffer, tx_pending_len) != HAL_OK) { 800d096: 4b0e ldr r3, [pc, #56] @ (800d0d0 ) 800d098: 881b ldrh r3, [r3, #0] 800d09a: 461a mov r2, r3 800d09c: 490e ldr r1, [pc, #56] @ (800d0d8 ) 800d09e: 480a ldr r0, [pc, #40] @ (800d0c8 ) 800d0a0: f007 f8ca bl 8014238 800d0a4: 4603 mov r3, r0 800d0a6: 2b00 cmp r3, #0 800d0a8: d005 beq.n 800d0b6 uart3_tx_busy = 0; 800d0aa: 4b08 ldr r3, [pc, #32] @ (800d0cc ) 800d0ac: 2200 movs r2, #0 800d0ae: 701a strb r2, [r3, #0] CCS_LogUart3Error("UART3 TX DMA resend failed"); 800d0b0: 480a ldr r0, [pc, #40] @ (800d0dc ) 800d0b2: f000 fe0f bl 800dcd4 } tx_pending_len = 0; 800d0b6: 4b06 ldr r3, [pc, #24] @ (800d0d0 ) 800d0b8: 2200 movs r2, #0 800d0ba: 801a strh r2, [r3, #0] 800d0bc: e000 b.n 800d0c0 return; 800d0be: bf00 nop } } 800d0c0: 3708 adds r7, #8 800d0c2: 46bd mov sp, r7 800d0c4: bd80 pop {r7, pc} 800d0c6: bf00 nop 800d0c8: 20001370 .word 0x20001370 800d0cc: 20000cee .word 0x20000cee 800d0d0: 20000cec .word 0x20000cec 800d0d4: 20000bec .word 0x20000bec 800d0d8: 20000aec .word 0x20000aec 800d0dc: 08018988 .word 0x08018988 0800d0e0 : void CCS_SerialLoop(void) { 800d0e0: b5b0 push {r4, r5, r7, lr} 800d0e2: b086 sub sp, #24 800d0e4: af04 add r7, sp, #16 static uint32_t tick; if ((int32_t)(HAL_GetTick() - tick) < 1) return; 800d0e6: f002 faab bl 800f640 800d0ea: 4602 mov r2, r0 800d0ec: 4ba5 ldr r3, [pc, #660] @ (800d384 ) 800d0ee: 681b ldr r3, [r3, #0] 800d0f0: 1ad3 subs r3, r2, r3 800d0f2: 2b00 cmp r3, #0 800d0f4: f340 8298 ble.w 800d628 tick = HAL_GetTick(); 800d0f8: f002 faa2 bl 800f640 800d0fc: 4603 mov r3, r0 800d0fe: 4aa1 ldr r2, [pc, #644] @ (800d384 ) 800d100: 6013 str r3, [r2, #0] static uint32_t replug_watchdog1_tick = 0; static uint32_t last_state_sent = 0; static uint32_t force_unlock_tick = 0; static uint32_t stop_tick = 0; CCS_UART3_Watchdog(); 800d102: f000 fdad bl 800dc60 if (CONN.connControl != CMD_NONE) { 800d106: 4ba0 ldr r3, [pc, #640] @ (800d388 ) 800d108: 781b ldrb r3, [r3, #0] 800d10a: 2b00 cmp r3, #0 800d10c: d003 beq.n 800d116 last_cmd = CONN.connControl; 800d10e: 4b9e ldr r3, [pc, #632] @ (800d388 ) 800d110: 781a ldrb r2, [r3, #0] 800d112: 4b9e ldr r3, [pc, #632] @ (800d38c ) 800d114: 701a strb r2, [r3, #0] } if (CONN.connControl == CMD_FORCE_UNLOCK) { 800d116: 4b9c ldr r3, [pc, #624] @ (800d388 ) 800d118: 781b ldrb r3, [r3, #0] 800d11a: 2b03 cmp r3, #3 800d11c: d11b bne.n 800d156 if (force_unlock_tick == 0) { 800d11e: 4b9c ldr r3, [pc, #624] @ (800d390 ) 800d120: 681b ldr r3, [r3, #0] 800d122: 2b00 cmp r3, #0 800d124: d105 bne.n 800d132 force_unlock_tick = HAL_GetTick(); 800d126: f002 fa8b bl 800f640 800d12a: 4603 mov r3, r0 800d12c: 4a98 ldr r2, [pc, #608] @ (800d390 ) 800d12e: 6013 str r3, [r2, #0] 800d130: e014 b.n 800d15c } else if ((int32_t)(HAL_GetTick() - force_unlock_tick) >= 10000) { 800d132: f002 fa85 bl 800f640 800d136: 4602 mov r2, r0 800d138: 4b95 ldr r3, [pc, #596] @ (800d390 ) 800d13a: 681b ldr r3, [r3, #0] 800d13c: 1ad3 subs r3, r2, r3 800d13e: 461a mov r2, r3 800d140: f242 730f movw r3, #9999 @ 0x270f 800d144: 429a cmp r2, r3 800d146: dd09 ble.n 800d15c CONN.connControl = CMD_NONE; 800d148: 4b8f ldr r3, [pc, #572] @ (800d388 ) 800d14a: 2200 movs r2, #0 800d14c: 701a strb r2, [r3, #0] force_unlock_tick = 0; 800d14e: 4b90 ldr r3, [pc, #576] @ (800d390 ) 800d150: 2200 movs r2, #0 800d152: 601a str r2, [r3, #0] 800d154: e002 b.n 800d15c } } else { force_unlock_tick = 0; 800d156: 4b8e ldr r3, [pc, #568] @ (800d390 ) 800d158: 2200 movs r2, #0 800d15a: 601a str r2, [r3, #0] } if (CONN.connControl == CMD_STOP) { 800d15c: 4b8a ldr r3, [pc, #552] @ (800d388 ) 800d15e: 781b ldrb r3, [r3, #0] 800d160: 2b01 cmp r3, #1 800d162: d119 bne.n 800d198 if (stop_tick == 0) { 800d164: 4b8b ldr r3, [pc, #556] @ (800d394 ) 800d166: 681b ldr r3, [r3, #0] 800d168: 2b00 cmp r3, #0 800d16a: d105 bne.n 800d178 stop_tick = HAL_GetTick(); 800d16c: f002 fa68 bl 800f640 800d170: 4603 mov r3, r0 800d172: 4a88 ldr r2, [pc, #544] @ (800d394 ) 800d174: 6013 str r3, [r2, #0] 800d176: e012 b.n 800d19e } else if ((int32_t)(HAL_GetTick() - stop_tick) >= 1000) { 800d178: f002 fa62 bl 800f640 800d17c: 4602 mov r2, r0 800d17e: 4b85 ldr r3, [pc, #532] @ (800d394 ) 800d180: 681b ldr r3, [r3, #0] 800d182: 1ad3 subs r3, r2, r3 800d184: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800d188: db09 blt.n 800d19e CONN.connControl = CMD_NONE; 800d18a: 4b7f ldr r3, [pc, #508] @ (800d388 ) 800d18c: 2200 movs r2, #0 800d18e: 701a strb r2, [r3, #0] stop_tick = 0; 800d190: 4b80 ldr r3, [pc, #512] @ (800d394 ) 800d192: 2200 movs r2, #0 800d194: 601a str r2, [r3, #0] 800d196: e002 b.n 800d19e } } else { stop_tick = 0; 800d198: 4b7e ldr r3, [pc, #504] @ (800d394 ) 800d19a: 2200 movs r2, #0 800d19c: 601a str r2, [r3, #0] } if((int32_t)(HAL_GetTick() - last_cmd_sent) > (int32_t)CMD_INTERVAL){ 800d19e: f002 fa4f bl 800f640 800d1a2: 4602 mov r2, r0 800d1a4: 4b7c ldr r3, [pc, #496] @ (800d398 ) 800d1a6: 681b ldr r3, [r3, #0] 800d1a8: 1ad3 subs r3, r2, r3 800d1aa: 2b0a cmp r3, #10 800d1ac: dd5e ble.n 800d26c if ((int32_t)(HAL_GetTick() - last_state_sent) >= 200) { 800d1ae: f002 fa47 bl 800f640 800d1b2: 4602 mov r2, r0 800d1b4: 4b79 ldr r3, [pc, #484] @ (800d39c ) 800d1b6: 681b ldr r3, [r3, #0] 800d1b8: 1ad3 subs r3, r2, r3 800d1ba: 2bc7 cmp r3, #199 @ 0xc7 800d1bc: dd06 ble.n 800d1cc send_state(); 800d1be: f000 fbcb bl 800d958 last_state_sent = HAL_GetTick(); 800d1c2: f002 fa3d bl 800f640 800d1c6: 4603 mov r3, r0 800d1c8: 4a74 ldr r2, [pc, #464] @ (800d39c ) 800d1ca: 6013 str r3, [r2, #0] } if (ESTOP) { 800d1cc: 4b74 ldr r3, [pc, #464] @ (800d3a0 ) 800d1ce: 781b ldrb r3, [r3, #0] 800d1d0: 2b00 cmp r3, #0 800d1d2: d008 beq.n 800d1e6 log_printf(LOG_ERR, "ESTOP triggered\n"); 800d1d4: 4973 ldr r1, [pc, #460] @ (800d3a4 ) 800d1d6: 2004 movs r0, #4 800d1d8: f7fd fa36 bl 800a648 CCS_SendEmergencyStop(); 800d1dc: f000 fb5c bl 800d898 ESTOP = 0; 800d1e0: 4b6f ldr r3, [pc, #444] @ (800d3a0 ) 800d1e2: 2200 movs r2, #0 800d1e4: 701a strb r2, [r3, #0] } if (((CONN.connControl == CMD_STOP) || 800d1e6: 4b68 ldr r3, [pc, #416] @ (800d388 ) 800d1e8: 781b ldrb r3, [r3, #0] 800d1ea: 2b01 cmp r3, #1 800d1ec: d007 beq.n 800d1fe (CONN.connControl == CMD_FORCE_UNLOCK) || 800d1ee: 4b66 ldr r3, [pc, #408] @ (800d388 ) 800d1f0: 781b ldrb r3, [r3, #0] if (((CONN.connControl == CMD_STOP) || 800d1f2: 2b03 cmp r3, #3 800d1f4: d003 beq.n 800d1fe (CONN.chargingError != CONN_NO_ERROR)) && 800d1f6: 4b64 ldr r3, [pc, #400] @ (800d388 ) 800d1f8: 7f5b ldrb r3, [r3, #29] (CONN.connControl == CMD_FORCE_UNLOCK) || 800d1fa: 2b00 cmp r3, #0 800d1fc: d01a beq.n 800d234 ((int32_t)(HAL_GetTick() - last_stop_sent) > 1000)) { 800d1fe: f002 fa1f bl 800f640 800d202: 4602 mov r2, r0 800d204: 4b68 ldr r3, [pc, #416] @ (800d3a8 ) 800d206: 681b ldr r3, [r3, #0] 800d208: 1ad3 subs r3, r2, r3 (CONN.chargingError != CONN_NO_ERROR)) && 800d20a: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800d20e: dd11 ble.n 800d234 last_stop_sent = HAL_GetTick(); 800d210: f002 fa16 bl 800f640 800d214: 4603 mov r3, r0 800d216: 4a64 ldr r2, [pc, #400] @ (800d3a8 ) 800d218: 6013 str r3, [r2, #0] log_printf(LOG_WARN, "Stopping charging...\n"); 800d21a: 4964 ldr r1, [pc, #400] @ (800d3ac ) 800d21c: 2005 movs r0, #5 800d21e: f7fd fa13 bl 800a648 if (CONN.connControl == CMD_FORCE_UNLOCK) { 800d222: 4b59 ldr r3, [pc, #356] @ (800d388 ) 800d224: 781b ldrb r3, [r3, #0] 800d226: 2b03 cmp r3, #3 800d228: d102 bne.n 800d230 CP_SetDuty(100); 800d22a: 2064 movs r0, #100 @ 0x64 800d22c: f7fc ffca bl 800a1c4 } CCS_SendEmergencyStop(); 800d230: f000 fb32 bl 800d898 } if (((CCS_EvseState == FinishedEV) || (CCS_EvseState == FinishedEVSE)) && 800d234: 4b5e ldr r3, [pc, #376] @ (800d3b0 ) 800d236: 781b ldrb r3, [r3, #0] 800d238: 2b0c cmp r3, #12 800d23a: d003 beq.n 800d244 800d23c: 4b5c ldr r3, [pc, #368] @ (800d3b0 ) 800d23e: 781b ldrb r3, [r3, #0] 800d240: 2b0b cmp r3, #11 800d242: d113 bne.n 800d26c ((int32_t)(HAL_GetTick() - last_stop_sent) > 1000)) { 800d244: f002 f9fc bl 800f640 800d248: 4602 mov r2, r0 800d24a: 4b57 ldr r3, [pc, #348] @ (800d3a8 ) 800d24c: 681b ldr r3, [r3, #0] 800d24e: 1ad3 subs r3, r2, r3 if (((CCS_EvseState == FinishedEV) || (CCS_EvseState == FinishedEVSE)) && 800d250: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800d254: dd0a ble.n 800d26c last_stop_sent = HAL_GetTick(); 800d256: f002 f9f3 bl 800f640 800d25a: 4603 mov r3, r0 800d25c: 4a52 ldr r2, [pc, #328] @ (800d3a8 ) 800d25e: 6013 str r3, [r2, #0] log_printf(LOG_WARN, "FinishedEV, stopping...\n"); 800d260: 4954 ldr r1, [pc, #336] @ (800d3b4 ) 800d262: 2005 movs r0, #5 800d264: f7fd f9f0 bl 800a648 CCS_SendEmergencyStop(); 800d268: f000 fb16 bl 800d898 } (void)replug_watchdog_tick; (void)replug_watchdog1_tick; uint8_t host_timeout_warn = (last_host_seen > 0u) && ((int32_t)(HAL_GetTick() - last_host_seen) > (int32_t)EVEREST_TIMEOUT_WARN_MS); 800d26c: 4b52 ldr r3, [pc, #328] @ (800d3b8 ) 800d26e: 681b ldr r3, [r3, #0] 800d270: 2b00 cmp r3, #0 800d272: d00c beq.n 800d28e 800d274: f002 f9e4 bl 800f640 800d278: 4602 mov r2, r0 800d27a: 4b4f ldr r3, [pc, #316] @ (800d3b8 ) 800d27c: 681b ldr r3, [r3, #0] 800d27e: 1ad3 subs r3, r2, r3 800d280: 461a mov r2, r3 800d282: f241 3388 movw r3, #5000 @ 0x1388 800d286: 429a cmp r2, r3 800d288: dd01 ble.n 800d28e 800d28a: 2301 movs r3, #1 800d28c: e000 b.n 800d290 800d28e: 2300 movs r3, #0 800d290: 71bb strb r3, [r7, #6] uint8_t host_timeout_stop = (last_host_seen > 0u) && ((int32_t)(HAL_GetTick() - last_host_seen) > (int32_t)EVEREST_TIMEOUT_STOP_MS); 800d292: 4b49 ldr r3, [pc, #292] @ (800d3b8 ) 800d294: 681b ldr r3, [r3, #0] 800d296: 2b00 cmp r3, #0 800d298: d00c beq.n 800d2b4 800d29a: f002 f9d1 bl 800f640 800d29e: 4602 mov r2, r0 800d2a0: 4b45 ldr r3, [pc, #276] @ (800d3b8 ) 800d2a2: 681b ldr r3, [r3, #0] 800d2a4: 1ad3 subs r3, r2, r3 800d2a6: 461a mov r2, r3 800d2a8: f242 7310 movw r3, #10000 @ 0x2710 800d2ac: 429a cmp r2, r3 800d2ae: dd01 ble.n 800d2b4 800d2b0: 2301 movs r3, #1 800d2b2: e000 b.n 800d2b6 800d2b4: 2300 movs r3, #0 800d2b6: 717b strb r3, [r7, #5] uint8_t host_timed_out = host_timeout_stop; 800d2b8: 797b ldrb r3, [r7, #5] 800d2ba: 713b strb r3, [r7, #4] if (host_timeout_warn && !everest_timeout_warn_latched) { 800d2bc: 79bb ldrb r3, [r7, #6] 800d2be: 2b00 cmp r3, #0 800d2c0: d00a beq.n 800d2d8 800d2c2: 4b3e ldr r3, [pc, #248] @ (800d3bc ) 800d2c4: 781b ldrb r3, [r3, #0] 800d2c6: 2b00 cmp r3, #0 800d2c8: d106 bne.n 800d2d8 log_printf(LOG_ERR, "Everest timeout\n"); 800d2ca: 493d ldr r1, [pc, #244] @ (800d3c0 ) 800d2cc: 2004 movs r0, #4 800d2ce: f7fd f9bb bl 800a648 everest_timeout_warn_latched = 1; 800d2d2: 4b3a ldr r3, [pc, #232] @ (800d3bc ) 800d2d4: 2201 movs r2, #1 800d2d6: 701a strb r2, [r3, #0] } if (host_timeout_stop && !everest_timeout_stop_latched) { 800d2d8: 797b ldrb r3, [r7, #5] 800d2da: 2b00 cmp r3, #0 800d2dc: d00a beq.n 800d2f4 800d2de: 4b39 ldr r3, [pc, #228] @ (800d3c4 ) 800d2e0: 781b ldrb r3, [r3, #0] 800d2e2: 2b00 cmp r3, #0 800d2e4: d106 bne.n 800d2f4 log_printf(LOG_ERR, "Everest timeout, stopping charging...\n"); 800d2e6: 4938 ldr r1, [pc, #224] @ (800d3c8 ) 800d2e8: 2004 movs r0, #4 800d2ea: f7fd f9ad bl 800a648 everest_timeout_stop_latched = 1; 800d2ee: 4b35 ldr r3, [pc, #212] @ (800d3c4 ) 800d2f0: 2201 movs r2, #1 800d2f2: 701a strb r2, [r3, #0] } if (!host_timeout_warn) { 800d2f4: 79bb ldrb r3, [r7, #6] 800d2f6: 2b00 cmp r3, #0 800d2f8: d105 bne.n 800d306 everest_timeout_warn_latched = 0; 800d2fa: 4b30 ldr r3, [pc, #192] @ (800d3bc ) 800d2fc: 2200 movs r2, #0 800d2fe: 701a strb r2, [r3, #0] everest_timeout_stop_latched = 0; 800d300: 4b30 ldr r3, [pc, #192] @ (800d3c4 ) 800d302: 2200 movs r2, #0 800d304: 701a strb r2, [r3, #0] } everest_timed_out = host_timeout_stop; 800d306: 4a31 ldr r2, [pc, #196] @ (800d3cc ) 800d308: 797b ldrb r3, [r7, #5] 800d30a: 7013 strb r3, [r2, #0] switch(CCS_ConnectorState){ 800d30c: 4b30 ldr r3, [pc, #192] @ (800d3d0 ) 800d30e: 781b ldrb r3, [r3, #0] 800d310: 2b05 cmp r3, #5 800d312: f200 8113 bhi.w 800d53c 800d316: a201 add r2, pc, #4 @ (adr r2, 800d31c ) 800d318: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d31c: 0800d335 .word 0x0800d335 800d320: 0800d35d .word 0x0800d35d 800d324: 0800d3d9 .word 0x0800d3d9 800d328: 0800d41d .word 0x0800d41d 800d32c: 0800d459 .word 0x0800d459 800d330: 0800d4b1 .word 0x0800d4b1 case CCS_UNKNOWN: RELAY_Write(RELAY_CP, 0); 800d334: 2100 movs r1, #0 800d336: 2005 movs r0, #5 800d338: f7fc fa3e bl 80097b8 CONN_SetState(Unknown); 800d33c: 2000 movs r0, #0 800d33e: f7fc fe49 bl 8009fd4 if (config_initialized && !host_timed_out) { 800d342: 4b24 ldr r3, [pc, #144] @ (800d3d4 ) 800d344: 781b ldrb r3, [r3, #0] 800d346: 2b00 cmp r3, #0 800d348: f000 80ed beq.w 800d526 800d34c: 793b ldrb r3, [r7, #4] 800d34e: 2b00 cmp r3, #0 800d350: f040 80e9 bne.w 800d526 CCS_ConnectorState = CCS_UNPLUGGED; 800d354: 4b1e ldr r3, [pc, #120] @ (800d3d0 ) 800d356: 2202 movs r2, #2 800d358: 701a strb r2, [r3, #0] } break; 800d35a: e0e4 b.n 800d526 case CCS_DISABLED: RELAY_Write(RELAY_CP, 0); 800d35c: 2100 movs r1, #0 800d35e: 2005 movs r0, #5 800d360: f7fc fa2a bl 80097b8 CONN_SetState(Disabled); 800d364: 2002 movs r0, #2 800d366: f7fc fe35 bl 8009fd4 if ((CONN.chargingError == CONN_NO_ERROR) && !host_timed_out){ 800d36a: 4b07 ldr r3, [pc, #28] @ (800d388 ) 800d36c: 7f5b ldrb r3, [r3, #29] 800d36e: 2b00 cmp r3, #0 800d370: f040 80db bne.w 800d52a 800d374: 793b ldrb r3, [r7, #4] 800d376: 2b00 cmp r3, #0 800d378: f040 80d7 bne.w 800d52a CCS_ConnectorState = CCS_UNPLUGGED; 800d37c: 4b14 ldr r3, [pc, #80] @ (800d3d0 ) 800d37e: 2202 movs r2, #2 800d380: 701a strb r2, [r3, #0] } break; 800d382: e0d2 b.n 800d52a 800d384: 20000d54 .word 0x20000d54 800d388: 200003b0 .word 0x200003b0 800d38c: 200009e8 .word 0x200009e8 800d390: 20000d58 .word 0x20000d58 800d394: 20000d5c .word 0x20000d5c 800d398: 200009e0 .word 0x200009e0 800d39c: 20000d60 .word 0x20000d60 800d3a0: 20000cef .word 0x20000cef 800d3a4: 080189a4 .word 0x080189a4 800d3a8: 200009e4 .word 0x200009e4 800d3ac: 080189b8 .word 0x080189b8 800d3b0: 20000d50 .word 0x20000d50 800d3b4: 080189d0 .word 0x080189d0 800d3b8: 20000cf4 .word 0x20000cf4 800d3bc: 20000cf9 .word 0x20000cf9 800d3c0: 080189ec .word 0x080189ec 800d3c4: 20000cfa .word 0x20000cfa 800d3c8: 08018a00 .word 0x08018a00 800d3cc: 20000cf8 .word 0x20000cf8 800d3d0: 20000d51 .word 0x20000d51 800d3d4: 20001200 .word 0x20001200 case CCS_UNPLUGGED: RELAY_Write(RELAY_CP, 1); 800d3d8: 2101 movs r1, #1 800d3da: 2005 movs r0, #5 800d3dc: f7fc f9ec bl 80097b8 CONN_SetState(Unplugged); 800d3e0: 2001 movs r0, #1 800d3e2: f7fc fdf7 bl 8009fd4 if ((cp_state_buffer == EV_STATE_B_CONN_PREP) || (cp_state_buffer == EV_STATE_C_CONN_ACTIVE)){ 800d3e6: 4b92 ldr r3, [pc, #584] @ (800d630 ) 800d3e8: 781b ldrb r3, [r3, #0] 800d3ea: 2b01 cmp r3, #1 800d3ec: d003 beq.n 800d3f6 800d3ee: 4b90 ldr r3, [pc, #576] @ (800d630 ) 800d3f0: 781b ldrb r3, [r3, #0] 800d3f2: 2b02 cmp r3, #2 800d3f4: d102 bne.n 800d3fc CCS_ConnectorState = CCS_AUTH_REQUIRED; 800d3f6: 4b8f ldr r3, [pc, #572] @ (800d634 ) 800d3f8: 2203 movs r2, #3 800d3fa: 701a strb r2, [r3, #0] } if (CONN.chargingError != CONN_NO_ERROR){ 800d3fc: 4b8e ldr r3, [pc, #568] @ (800d638 ) 800d3fe: 7f5b ldrb r3, [r3, #29] 800d400: 2b00 cmp r3, #0 800d402: f000 8094 beq.w 800d52e log_printf(LOG_ERR, "Charging error %d, state -> disabled\n", CONN.chargingError); 800d406: 4b8c ldr r3, [pc, #560] @ (800d638 ) 800d408: 7f5b ldrb r3, [r3, #29] 800d40a: 461a mov r2, r3 800d40c: 498b ldr r1, [pc, #556] @ (800d63c ) 800d40e: 2004 movs r0, #4 800d410: f7fd f91a bl 800a648 CCS_ConnectorState = CCS_DISABLED; 800d414: 4b87 ldr r3, [pc, #540] @ (800d634 ) 800d416: 2201 movs r2, #1 800d418: 701a strb r2, [r3, #0] } break; 800d41a: e088 b.n 800d52e case CCS_AUTH_REQUIRED: RELAY_Write(RELAY_CP, 1); 800d41c: 2101 movs r1, #1 800d41e: 2005 movs r0, #5 800d420: f7fc f9ca bl 80097b8 CONN_SetState(AuthRequired); 800d424: 2004 movs r0, #4 800d426: f7fc fdd5 bl 8009fd4 if(CONN.connControl == CMD_START){ 800d42a: 4b83 ldr r3, [pc, #524] @ (800d638 ) 800d42c: 781b ldrb r3, [r3, #0] 800d42e: 2b02 cmp r3, #2 800d430: d106 bne.n 800d440 log_printf(LOG_INFO, "Charging permitted, start charging\n"); 800d432: 4983 ldr r1, [pc, #524] @ (800d640 ) 800d434: 2007 movs r0, #7 800d436: f7fd f907 bl 800a648 CCS_ConnectorState = CCS_CONNECTED; 800d43a: 4b7e ldr r3, [pc, #504] @ (800d634 ) 800d43c: 2204 movs r2, #4 800d43e: 701a strb r2, [r3, #0] } if (cp_state_buffer == EV_STATE_A_IDLE){ 800d440: 4b7b ldr r3, [pc, #492] @ (800d630 ) 800d442: 781b ldrb r3, [r3, #0] 800d444: 2b00 cmp r3, #0 800d446: d174 bne.n 800d532 log_printf(LOG_INFO, "Car unplugged\n"); 800d448: 497e ldr r1, [pc, #504] @ (800d644 ) 800d44a: 2007 movs r0, #7 800d44c: f7fd f8fc bl 800a648 CCS_ConnectorState = CCS_UNPLUGGED; 800d450: 4b78 ldr r3, [pc, #480] @ (800d634 ) 800d452: 2202 movs r2, #2 800d454: 701a strb r2, [r3, #0] } break; 800d456: e06c b.n 800d532 case CCS_CONNECTED: RELAY_Write(RELAY_CP, 1); 800d458: 2101 movs r1, #1 800d45a: 2005 movs r0, #5 800d45c: f7fc f9ac bl 80097b8 if((CCS_EvseState < Preparing) || (CCS_EvseState == AuthRequired)) { 800d460: 4b79 ldr r3, [pc, #484] @ (800d648 ) 800d462: 781b ldrb r3, [r3, #0] 800d464: 2b02 cmp r3, #2 800d466: d903 bls.n 800d470 800d468: 4b77 ldr r3, [pc, #476] @ (800d648 ) 800d46a: 781b ldrb r3, [r3, #0] 800d46c: 2b04 cmp r3, #4 800d46e: d103 bne.n 800d478 CONN_SetState(Preparing); 800d470: 2003 movs r0, #3 800d472: f7fc fdaf bl 8009fd4 800d476: e004 b.n 800d482 } else { CONN_SetState(CCS_EvseState); 800d478: 4b73 ldr r3, [pc, #460] @ (800d648 ) 800d47a: 781b ldrb r3, [r3, #0] 800d47c: 4618 mov r0, r3 800d47e: f7fc fda9 bl 8009fd4 } if (cp_state_buffer == EV_STATE_A_IDLE){ 800d482: 4b6b ldr r3, [pc, #428] @ (800d630 ) 800d484: 781b ldrb r3, [r3, #0] 800d486: 2b00 cmp r3, #0 800d488: d106 bne.n 800d498 log_printf(LOG_INFO, "Car unplugged\n"); 800d48a: 496e ldr r1, [pc, #440] @ (800d644 ) 800d48c: 2007 movs r0, #7 800d48e: f7fd f8db bl 800a648 CCS_ConnectorState = CCS_UNPLUGGED; 800d492: 4b68 ldr r3, [pc, #416] @ (800d634 ) 800d494: 2202 movs r2, #2 800d496: 701a strb r2, [r3, #0] } if(REPLUG > 0){ 800d498: 4b6c ldr r3, [pc, #432] @ (800d64c ) 800d49a: 781b ldrb r3, [r3, #0] 800d49c: 2b00 cmp r3, #0 800d49e: d04a beq.n 800d536 log_printf(LOG_INFO, "Replugging...\n"); 800d4a0: 496b ldr r1, [pc, #428] @ (800d650 ) 800d4a2: 2007 movs r0, #7 800d4a4: f7fd f8d0 bl 800a648 CCS_ConnectorState = CCS_REPLUGGING; 800d4a8: 4b62 ldr r3, [pc, #392] @ (800d634 ) 800d4aa: 2205 movs r2, #5 800d4ac: 701a strb r2, [r3, #0] } break; 800d4ae: e042 b.n 800d536 case CCS_REPLUGGING: RELAY_Write(RELAY_CP, 0); 800d4b0: 2100 movs r1, #0 800d4b2: 2005 movs r0, #5 800d4b4: f7fc f980 bl 80097b8 CONN_SetState(Replugging); 800d4b8: 200d movs r0, #13 800d4ba: f7fc fd8b bl 8009fd4 if((int32_t)(HAL_GetTick() - replug_tick) > 1000){ 800d4be: f002 f8bf bl 800f640 800d4c2: 4602 mov r2, r0 800d4c4: 4b63 ldr r3, [pc, #396] @ (800d654 ) 800d4c6: 681b ldr r3, [r3, #0] 800d4c8: 1ad3 subs r3, r2, r3 800d4ca: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800d4ce: dd1a ble.n 800d506 replug_tick = HAL_GetTick(); 800d4d0: f002 f8b6 bl 800f640 800d4d4: 4603 mov r3, r0 800d4d6: 4a5f ldr r2, [pc, #380] @ (800d654 ) 800d4d8: 6013 str r3, [r2, #0] if(REPLUG > 0){ 800d4da: 4b5c ldr r3, [pc, #368] @ (800d64c ) 800d4dc: 781b ldrb r3, [r3, #0] 800d4de: 2b00 cmp r3, #0 800d4e0: d00a beq.n 800d4f8 if (REPLUG != 0xFF) REPLUG--; 800d4e2: 4b5a ldr r3, [pc, #360] @ (800d64c ) 800d4e4: 781b ldrb r3, [r3, #0] 800d4e6: 2bff cmp r3, #255 @ 0xff 800d4e8: d00d beq.n 800d506 800d4ea: 4b58 ldr r3, [pc, #352] @ (800d64c ) 800d4ec: 781b ldrb r3, [r3, #0] 800d4ee: 3b01 subs r3, #1 800d4f0: b2da uxtb r2, r3 800d4f2: 4b56 ldr r3, [pc, #344] @ (800d64c ) 800d4f4: 701a strb r2, [r3, #0] 800d4f6: e006 b.n 800d506 } else { log_printf(LOG_INFO, "Replugging finished, but car unplugged\n"); 800d4f8: 4957 ldr r1, [pc, #348] @ (800d658 ) 800d4fa: 2007 movs r0, #7 800d4fc: f7fd f8a4 bl 800a648 CCS_ConnectorState = CCS_UNPLUGGED; 800d500: 4b4c ldr r3, [pc, #304] @ (800d634 ) 800d502: 2202 movs r2, #2 800d504: 701a strb r2, [r3, #0] } } if(REPLUG == 0){ 800d506: 4b51 ldr r3, [pc, #324] @ (800d64c ) 800d508: 781b ldrb r3, [r3, #0] 800d50a: 2b00 cmp r3, #0 800d50c: d115 bne.n 800d53a if(cp_state_buffer == EV_STATE_B_CONN_PREP){ 800d50e: 4b48 ldr r3, [pc, #288] @ (800d630 ) 800d510: 781b ldrb r3, [r3, #0] 800d512: 2b01 cmp r3, #1 800d514: d111 bne.n 800d53a log_printf(LOG_INFO, "Replugging finished, car plugged, state -> auth required\n"); 800d516: 4951 ldr r1, [pc, #324] @ (800d65c ) 800d518: 2007 movs r0, #7 800d51a: f7fd f895 bl 800a648 CCS_ConnectorState = CCS_AUTH_REQUIRED; 800d51e: 4b45 ldr r3, [pc, #276] @ (800d634 ) 800d520: 2203 movs r2, #3 800d522: 701a strb r2, [r3, #0] } } break; 800d524: e009 b.n 800d53a break; 800d526: bf00 nop 800d528: e008 b.n 800d53c break; 800d52a: bf00 nop 800d52c: e006 b.n 800d53c break; 800d52e: bf00 nop 800d530: e004 b.n 800d53c break; 800d532: bf00 nop 800d534: e002 b.n 800d53c break; 800d536: bf00 nop 800d538: e000 b.n 800d53c break; 800d53a: bf00 nop // 10s timeout: enforce safe-state until host communication recovers. { static uint8_t prev_enable_output = 0xFFu; uint8_t new_enable_output; if (host_timeout_stop) { 800d53c: 797b ldrb r3, [r7, #5] 800d53e: 2b00 cmp r3, #0 800d540: d016 beq.n 800d570 CONN.EnableOutput = 0; 800d542: 4b3d ldr r3, [pc, #244] @ (800d638 ) 800d544: 2200 movs r2, #0 800d546: 75da strb r2, [r3, #23] CCS_EvseState = Unknown; 800d548: 4b3f ldr r3, [pc, #252] @ (800d648 ) 800d54a: 2200 movs r2, #0 800d54c: 701a strb r2, [r3, #0] CP_SetDuty(100); 800d54e: 2064 movs r0, #100 @ 0x64 800d550: f7fc fe38 bl 800a1c4 if (CCS_ConnectorState != CCS_DISABLED && CCS_ConnectorState != CCS_UNKNOWN) { 800d554: 4b37 ldr r3, [pc, #220] @ (800d634 ) 800d556: 781b ldrb r3, [r3, #0] 800d558: 2b01 cmp r3, #1 800d55a: d006 beq.n 800d56a 800d55c: 4b35 ldr r3, [pc, #212] @ (800d634 ) 800d55e: 781b ldrb r3, [r3, #0] 800d560: 2b00 cmp r3, #0 800d562: d002 beq.n 800d56a CCS_ConnectorState = CCS_DISABLED; 800d564: 4b33 ldr r3, [pc, #204] @ (800d634 ) 800d566: 2201 movs r2, #1 800d568: 701a strb r2, [r3, #0] } new_enable_output = 0u; 800d56a: 2300 movs r3, #0 800d56c: 71fb strb r3, [r7, #7] 800d56e: e01f b.n 800d5b0 } else { if (last_cmd == CMD_STOP) { 800d570: 4b3b ldr r3, [pc, #236] @ (800d660 ) 800d572: 781b ldrb r3, [r3, #0] 800d574: 2b01 cmp r3, #1 800d576: d103 bne.n 800d580 CONN.EnableOutput = 0; 800d578: 4b2f ldr r3, [pc, #188] @ (800d638 ) 800d57a: 2200 movs r2, #0 800d57c: 75da strb r2, [r3, #23] 800d57e: e014 b.n 800d5aa } else { CONN.EnableOutput = ev_enable_output ? 1 : 0; 800d580: 4b38 ldr r3, [pc, #224] @ (800d664 ) 800d582: 781b ldrb r3, [r3, #0] 800d584: 2b00 cmp r3, #0 800d586: bf14 ite ne 800d588: 2301 movne r3, #1 800d58a: 2300 moveq r3, #0 800d58c: b2db uxtb r3, r3 800d58e: 461a mov r2, r3 800d590: 4b29 ldr r3, [pc, #164] @ (800d638 ) 800d592: 75da strb r2, [r3, #23] if((CONN.EnableOutput == 0) && (CONN.connState == Preparing)){ 800d594: 4b28 ldr r3, [pc, #160] @ (800d638 ) 800d596: 7ddb ldrb r3, [r3, #23] 800d598: 2b00 cmp r3, #0 800d59a: d106 bne.n 800d5aa 800d59c: 4b26 ldr r3, [pc, #152] @ (800d638 ) 800d59e: 785b ldrb r3, [r3, #1] 800d5a0: 2b03 cmp r3, #3 800d5a2: d102 bne.n 800d5aa CONN.EnableOutput = 0; 800d5a4: 4b24 ldr r3, [pc, #144] @ (800d638 ) 800d5a6: 2200 movs r2, #0 800d5a8: 75da strb r2, [r3, #23] } } new_enable_output = CONN.EnableOutput; 800d5aa: 4b23 ldr r3, [pc, #140] @ (800d638 ) 800d5ac: 7ddb ldrb r3, [r3, #23] 800d5ae: 71fb strb r3, [r7, #7] } if (prev_enable_output != 0xFFu && prev_enable_output != new_enable_output) { 800d5b0: 4b2d ldr r3, [pc, #180] @ (800d668 ) 800d5b2: 781b ldrb r3, [r3, #0] 800d5b4: 2bff cmp r3, #255 @ 0xff 800d5b6: d020 beq.n 800d5fa 800d5b8: 4b2b ldr r3, [pc, #172] @ (800d668 ) 800d5ba: 781b ldrb r3, [r3, #0] 800d5bc: 79fa ldrb r2, [r7, #7] 800d5be: 429a cmp r2, r3 800d5c0: d01b beq.n 800d5fa log_printf(LOG_INFO, 800d5c2: 4b29 ldr r3, [pc, #164] @ (800d668 ) 800d5c4: 781b ldrb r3, [r3, #0] 800d5c6: 461d mov r5, r3 800d5c8: 79fa ldrb r2, [r7, #7] 800d5ca: 4b26 ldr r3, [pc, #152] @ (800d664 ) 800d5cc: 781b ldrb r3, [r3, #0] 800d5ce: 4618 mov r0, r3 800d5d0: 4b23 ldr r3, [pc, #140] @ (800d660 ) 800d5d2: 781b ldrb r3, [r3, #0] 800d5d4: 2b01 cmp r3, #1 800d5d6: bf0c ite eq 800d5d8: 2301 moveq r3, #1 800d5da: 2300 movne r3, #0 800d5dc: b2db uxtb r3, r3 800d5de: 461c mov r4, r3 800d5e0: 797b ldrb r3, [r7, #5] (unsigned)prev_enable_output, (unsigned)new_enable_output, (unsigned)ev_enable_output, (unsigned)(last_cmd == CMD_STOP), (unsigned)host_timeout_stop, (unsigned)CONN.chargingError); 800d5e2: 4915 ldr r1, [pc, #84] @ (800d638 ) 800d5e4: 7f49 ldrb r1, [r1, #29] log_printf(LOG_INFO, 800d5e6: 9103 str r1, [sp, #12] 800d5e8: 9302 str r3, [sp, #8] 800d5ea: 9401 str r4, [sp, #4] 800d5ec: 9000 str r0, [sp, #0] 800d5ee: 4613 mov r3, r2 800d5f0: 462a mov r2, r5 800d5f2: 491e ldr r1, [pc, #120] @ (800d66c ) 800d5f4: 2007 movs r0, #7 800d5f6: f7fd f827 bl 800a648 } prev_enable_output = new_enable_output; 800d5fa: 4a1b ldr r2, [pc, #108] @ (800d668 ) 800d5fc: 79fb ldrb r3, [r7, #7] 800d5fe: 7013 strb r3, [r2, #0] } if ((cp_state_buffer == EV_STATE_B_CONN_PREP) || 800d600: 4b0b ldr r3, [pc, #44] @ (800d630 ) 800d602: 781b ldrb r3, [r3, #0] 800d604: 2b01 cmp r3, #1 800d606: d007 beq.n 800d618 (cp_state_buffer == EV_STATE_C_CONN_ACTIVE) || 800d608: 4b09 ldr r3, [pc, #36] @ (800d630 ) 800d60a: 781b ldrb r3, [r3, #0] if ((cp_state_buffer == EV_STATE_B_CONN_PREP) || 800d60c: 2b02 cmp r3, #2 800d60e: d003 beq.n 800d618 (cp_state_buffer == EV_STATE_D_CONN_ACT_VENT)) { 800d610: 4b07 ldr r3, [pc, #28] @ (800d630 ) 800d612: 781b ldrb r3, [r3, #0] (cp_state_buffer == EV_STATE_C_CONN_ACTIVE) || 800d614: 2b03 cmp r3, #3 800d616: d103 bne.n 800d620 CONN.EvConnected = 1; 800d618: 4b07 ldr r3, [pc, #28] @ (800d638 ) 800d61a: 2201 movs r2, #1 800d61c: 779a strb r2, [r3, #30] 800d61e: e004 b.n 800d62a } else { CONN.EvConnected = 0; 800d620: 4b05 ldr r3, [pc, #20] @ (800d638 ) 800d622: 2200 movs r2, #0 800d624: 779a strb r2, [r3, #30] 800d626: e000 b.n 800d62a if ((int32_t)(HAL_GetTick() - tick) < 1) return; 800d628: bf00 nop } } 800d62a: 3708 adds r7, #8 800d62c: 46bd mov sp, r7 800d62e: bdb0 pop {r4, r5, r7, pc} 800d630: 20000005 .word 0x20000005 800d634: 20000d51 .word 0x20000d51 800d638: 200003b0 .word 0x200003b0 800d63c: 08018a28 .word 0x08018a28 800d640: 08018a50 .word 0x08018a50 800d644: 08018a74 .word 0x08018a74 800d648: 20000d50 .word 0x20000d50 800d64c: 20000cf0 .word 0x20000cf0 800d650: 08018a84 .word 0x08018a84 800d654: 20000d64 .word 0x20000d64 800d658: 08018a94 .word 0x08018a94 800d65c: 08018abc .word 0x08018abc 800d660: 200009e8 .word 0x200009e8 800d664: 200009e9 .word 0x200009e9 800d668: 2000006b .word 0x2000006b 800d66c: 08018af8 .word 0x08018af8 0800d670 : void CCS_Init(void){ 800d670: b580 push {r7, lr} 800d672: af00 add r7, sp, #0 CP_Init(); 800d674: f7fc fd84 bl 800a180 CP_SetDuty(100); 800d678: 2064 movs r0, #100 @ 0x64 800d67a: f7fc fda3 bl 800a1c4 CCS_MaxLoad.maxVoltage = PSU_MAX_VOLTAGE; // 1000V 800d67e: 4b13 ldr r3, [pc, #76] @ (800d6cc ) 800d680: f44f 727a mov.w r2, #1000 @ 0x3e8 800d684: 801a strh r2, [r3, #0] CCS_MaxLoad.minVoltage = PSU_MIN_VOLTAGE; //150V 800d686: 4b11 ldr r3, [pc, #68] @ (800d6cc ) 800d688: 2296 movs r2, #150 @ 0x96 800d68a: 805a strh r2, [r3, #2] CCS_MaxLoad.maxCurrent = PSU_MAX_CURRENT*10; //100A 800d68c: 4b0f ldr r3, [pc, #60] @ (800d6cc ) 800d68e: f240 5232 movw r2, #1330 @ 0x532 800d692: 809a strh r2, [r3, #4] CCS_MaxLoad.minCurrent = PSU_MIN_CURRENT*10; //1A 800d694: 4b0d ldr r3, [pc, #52] @ (800d6cc ) 800d696: 220a movs r2, #10 800d698: 80da strh r2, [r3, #6] CCS_MaxLoad.maxPower = PSU_MAX_POWER; //30000W 800d69a: 4b0c ldr r3, [pc, #48] @ (800d6cc ) 800d69c: f649 4240 movw r2, #40000 @ 0x9c40 800d6a0: 609a str r2, [r3, #8] uart3_last_packet_tick = HAL_GetTick(); 800d6a2: f001 ffcd bl 800f640 800d6a6: 4603 mov r3, r0 800d6a8: 4a09 ldr r2, [pc, #36] @ (800d6d0 ) 800d6aa: 6013 str r3, [r2, #0] uart3_last_reinit_tick = uart3_last_packet_tick; 800d6ac: 4b08 ldr r3, [pc, #32] @ (800d6d0 ) 800d6ae: 681b ldr r3, [r3, #0] 800d6b0: 4a08 ldr r2, [pc, #32] @ (800d6d4 ) 800d6b2: 6013 str r3, [r2, #0] uart3_arm_rx_or_log("Init"); 800d6b4: 4808 ldr r0, [pc, #32] @ (800d6d8 ) 800d6b6: f7ff fbfb bl 800ceb0 CCS_SendResetReason(); 800d6ba: f000 f8e3 bl 800d884 log_printf(LOG_INFO, "CCS init\n"); 800d6be: 4907 ldr r1, [pc, #28] @ (800d6dc ) 800d6c0: 2007 movs r0, #7 800d6c2: f7fc ffc1 bl 800a648 } 800d6c6: bf00 nop 800d6c8: bd80 pop {r7, pc} 800d6ca: bf00 nop 800d6cc: 200009c8 .word 0x200009c8 800d6d0: 20000cfc .word 0x20000cfc 800d6d4: 20000d00 .word 0x20000d00 800d6d8: 08018b30 .word 0x08018b30 800d6dc: 08018b38 .word 0x08018b38 0800d6e0 : ISR_FAST static uint16_t crc16_ibm(const uint8_t* data, uint16_t length) { uint16_t crc = 0xFFFFu; for (uint16_t i = 0; i < length; i++) { 800d6e0: b3e9 cbz r1, 800d75e 800d6e2: 4684 mov ip, r0 ISR_FAST static uint16_t crc16_ibm(const uint8_t* data, uint16_t length) { 800d6e4: b500 push {lr} 800d6e6: 468e mov lr, r1 uint16_t crc = 0xFFFFu; 800d6e8: f64f 70ff movw r0, #65535 @ 0xffff crc ^= data[i]; for (uint8_t j = 0; j < 8; j++) { if (crc & 1u) { 800d6ec: 491d ldr r1, [pc, #116] @ (800d764 ) 800d6ee: 44e6 add lr, ip crc ^= data[i]; 800d6f0: f81c 2b01 ldrb.w r2, [ip], #1 800d6f4: 4042 eors r2, r0 if (crc & 1u) { 800d6f6: f342 0300 sbfx r3, r2, #0, #1 800d6fa: 400b ands r3, r1 800d6fc: ea83 0352 eor.w r3, r3, r2, lsr #1 800d700: f343 0200 sbfx r2, r3, #0, #1 800d704: 400a ands r2, r1 crc = (crc >> 1) ^ 0xA001u; } else { crc >>= 1; 800d706: f3c3 034e ubfx r3, r3, #1, #15 if (crc & 1u) { 800d70a: 405a eors r2, r3 800d70c: f342 0300 sbfx r3, r2, #0, #1 800d710: 400b ands r3, r1 crc >>= 1; 800d712: f3c2 024e ubfx r2, r2, #1, #15 if (crc & 1u) { 800d716: 4053 eors r3, r2 800d718: f343 0200 sbfx r2, r3, #0, #1 800d71c: 400a ands r2, r1 crc >>= 1; 800d71e: f3c3 034e ubfx r3, r3, #1, #15 if (crc & 1u) { 800d722: 405a eors r2, r3 800d724: f342 0300 sbfx r3, r2, #0, #1 800d728: 400b ands r3, r1 crc >>= 1; 800d72a: f3c2 024e ubfx r2, r2, #1, #15 if (crc & 1u) { 800d72e: 4053 eors r3, r2 800d730: f343 0200 sbfx r2, r3, #0, #1 800d734: 400a ands r2, r1 crc >>= 1; 800d736: f3c3 034e ubfx r3, r3, #1, #15 if (crc & 1u) { 800d73a: 405a eors r2, r3 800d73c: f342 0300 sbfx r3, r2, #0, #1 800d740: 400b ands r3, r1 crc >>= 1; 800d742: f3c2 024e ubfx r2, r2, #1, #15 if (crc & 1u) { 800d746: 4053 eors r3, r2 800d748: f343 0000 sbfx r0, r3, #0, #1 800d74c: 4008 ands r0, r1 crc >>= 1; 800d74e: f3c3 034e ubfx r3, r3, #1, #15 if (crc & 1u) { 800d752: 4058 eors r0, r3 for (uint16_t i = 0; i < length; i++) { 800d754: 45e6 cmp lr, ip if (crc & 1u) { 800d756: b280 uxth r0, r0 for (uint16_t i = 0; i < length; i++) { 800d758: d1ca bne.n 800d6f0 } } } return crc; } 800d75a: f85d fb04 ldr.w pc, [sp], #4 uint16_t crc = 0xFFFFu; 800d75e: f64f 70ff movw r0, #65535 @ 0xffff } 800d762: 4770 bx lr 800d764: ffffa001 .word 0xffffa001 0800d768 : static uint16_t CCS_BuildPacket(uint8_t cmd, const void* payload, uint16_t payload_len, uint8_t* out, uint16_t out_max) { 800d768: b580 push {r7, lr} 800d76a: b086 sub sp, #24 800d76c: af00 add r7, sp, #0 800d76e: 60b9 str r1, [r7, #8] 800d770: 607b str r3, [r7, #4] 800d772: 4603 mov r3, r0 800d774: 73fb strb r3, [r7, #15] 800d776: 4613 mov r3, r2 800d778: 81bb strh r3, [r7, #12] uint16_t total_len = (uint16_t)(1u + payload_len + 2u); 800d77a: 89bb ldrh r3, [r7, #12] 800d77c: 3303 adds r3, #3 800d77e: 82fb strh r3, [r7, #22] if (total_len > out_max) return 0; 800d780: 8afa ldrh r2, [r7, #22] 800d782: 8c3b ldrh r3, [r7, #32] 800d784: 429a cmp r2, r3 800d786: d901 bls.n 800d78c 800d788: 2300 movs r3, #0 800d78a: e029 b.n 800d7e0 out[0] = cmd; 800d78c: 687b ldr r3, [r7, #4] 800d78e: 7bfa ldrb r2, [r7, #15] 800d790: 701a strb r2, [r3, #0] if (payload_len && payload != NULL) { 800d792: 89bb ldrh r3, [r7, #12] 800d794: 2b00 cmp r3, #0 800d796: d009 beq.n 800d7ac 800d798: 68bb ldr r3, [r7, #8] 800d79a: 2b00 cmp r3, #0 800d79c: d006 beq.n 800d7ac memcpy(&out[1], payload, payload_len); 800d79e: 687b ldr r3, [r7, #4] 800d7a0: 3301 adds r3, #1 800d7a2: 89ba ldrh r2, [r7, #12] 800d7a4: 68b9 ldr r1, [r7, #8] 800d7a6: 4618 mov r0, r3 800d7a8: f008 fcd5 bl 8016156 } uint16_t crc = crc16_ibm(out, (uint16_t)(1u + payload_len)); 800d7ac: 89bb ldrh r3, [r7, #12] 800d7ae: 3301 adds r3, #1 800d7b0: b29b uxth r3, r3 800d7b2: 4619 mov r1, r3 800d7b4: 6878 ldr r0, [r7, #4] 800d7b6: f7ff ff93 bl 800d6e0 800d7ba: 4603 mov r3, r0 800d7bc: 82bb strh r3, [r7, #20] out[1u + payload_len] = (uint8_t)(crc & 0xFFu); 800d7be: 89bb ldrh r3, [r7, #12] 800d7c0: 3301 adds r3, #1 800d7c2: 687a ldr r2, [r7, #4] 800d7c4: 4413 add r3, r2 800d7c6: 8aba ldrh r2, [r7, #20] 800d7c8: b2d2 uxtb r2, r2 800d7ca: 701a strb r2, [r3, #0] out[1u + payload_len + 1u] = (uint8_t)((crc >> 8) & 0xFFu); 800d7cc: 8abb ldrh r3, [r7, #20] 800d7ce: 0a1b lsrs r3, r3, #8 800d7d0: b299 uxth r1, r3 800d7d2: 89bb ldrh r3, [r7, #12] 800d7d4: 3302 adds r3, #2 800d7d6: 687a ldr r2, [r7, #4] 800d7d8: 4413 add r3, r2 800d7da: b2ca uxtb r2, r1 800d7dc: 701a strb r2, [r3, #0] return total_len; 800d7de: 8afb ldrh r3, [r7, #22] } 800d7e0: 4618 mov r0, r3 800d7e2: 3718 adds r7, #24 800d7e4: 46bd mov sp, r7 800d7e6: bd80 pop {r7, pc} 0800d7e8 : static void CCS_SendPacket(uint8_t cmd, const void* payload, uint16_t payload_len) { 800d7e8: b580 push {r7, lr} 800d7ea: b086 sub sp, #24 800d7ec: af02 add r7, sp, #8 800d7ee: 4603 mov r3, r0 800d7f0: 6039 str r1, [r7, #0] 800d7f2: 71fb strb r3, [r7, #7] 800d7f4: 4613 mov r3, r2 800d7f6: 80bb strh r3, [r7, #4] uint16_t len = CCS_BuildPacket(cmd, payload, payload_len, tx_buffer, sizeof(tx_buffer)); 800d7f8: 88ba ldrh r2, [r7, #4] 800d7fa: 79f8 ldrb r0, [r7, #7] 800d7fc: f44f 7380 mov.w r3, #256 @ 0x100 800d800: 9300 str r3, [sp, #0] 800d802: 4b19 ldr r3, [pc, #100] @ (800d868 ) 800d804: 6839 ldr r1, [r7, #0] 800d806: f7ff ffaf bl 800d768 800d80a: 4603 mov r3, r0 800d80c: 81fb strh r3, [r7, #14] if (len > 0) { 800d80e: 89fb ldrh r3, [r7, #14] 800d810: 2b00 cmp r3, #0 800d812: d01f beq.n 800d854 if (uart3_tx_busy) { 800d814: 4b15 ldr r3, [pc, #84] @ (800d86c ) 800d816: 781b ldrb r3, [r3, #0] 800d818: 2b00 cmp r3, #0 800d81a: d009 beq.n 800d830 memcpy(tx_pending_buffer, tx_buffer, len); 800d81c: 89fb ldrh r3, [r7, #14] 800d81e: 461a mov r2, r3 800d820: 4911 ldr r1, [pc, #68] @ (800d868 ) 800d822: 4813 ldr r0, [pc, #76] @ (800d870 ) 800d824: f008 fc97 bl 8016156 tx_pending_len = len; 800d828: 4a12 ldr r2, [pc, #72] @ (800d874 ) 800d82a: 89fb ldrh r3, [r7, #14] 800d82c: 8013 strh r3, [r2, #0] 800d82e: e011 b.n 800d854 } else { uart3_tx_busy = 1; 800d830: 4b0e ldr r3, [pc, #56] @ (800d86c ) 800d832: 2201 movs r2, #1 800d834: 701a strb r2, [r3, #0] if (HAL_UART_Transmit_DMA(&huart3, tx_buffer, len) != HAL_OK) { 800d836: 89fb ldrh r3, [r7, #14] 800d838: 461a mov r2, r3 800d83a: 490b ldr r1, [pc, #44] @ (800d868 ) 800d83c: 480e ldr r0, [pc, #56] @ (800d878 ) 800d83e: f006 fcfb bl 8014238 800d842: 4603 mov r3, r0 800d844: 2b00 cmp r3, #0 800d846: d005 beq.n 800d854 uart3_tx_busy = 0; 800d848: 4b08 ldr r3, [pc, #32] @ (800d86c ) 800d84a: 2200 movs r2, #0 800d84c: 701a strb r2, [r3, #0] CCS_LogUart3Error("UART3 TX DMA start failed"); 800d84e: 480b ldr r0, [pc, #44] @ (800d87c ) 800d850: f000 fa40 bl 800dcd4 } } } last_cmd_sent = HAL_GetTick(); 800d854: f001 fef4 bl 800f640 800d858: 4603 mov r3, r0 800d85a: 4a09 ldr r2, [pc, #36] @ (800d880 ) 800d85c: 6013 str r3, [r2, #0] } 800d85e: bf00 nop 800d860: 3710 adds r7, #16 800d862: 46bd mov sp, r7 800d864: bd80 pop {r7, pc} 800d866: bf00 nop 800d868: 20000aec .word 0x20000aec 800d86c: 20000cee .word 0x20000cee 800d870: 20000bec .word 0x20000bec 800d874: 20000cec .word 0x20000cec 800d878: 20001370 .word 0x20001370 800d87c: 08018b44 .word 0x08018b44 800d880: 200009e0 .word 0x200009e0 0800d884 : static void CCS_SendResetReason(void) { 800d884: b580 push {r7, lr} 800d886: af00 add r7, sp, #0 CCS_SendPacket(CMD_M2E_RESET, NULL, 0); 800d888: 2200 movs r2, #0 800d88a: 2100 movs r1, #0 800d88c: 2052 movs r0, #82 @ 0x52 800d88e: f7ff ffab bl 800d7e8 } 800d892: bf00 nop 800d894: bd80 pop {r7, pc} 800d896: bf00 nop 0800d898 : void CCS_SendEmergencyStop(void) { 800d898: b580 push {r7, lr} 800d89a: af00 add r7, sp, #0 CCS_SendPacket(CMD_M2E_ESTOP, NULL, 0); 800d89c: 2200 movs r2, #0 800d89e: 2100 movs r1, #0 800d8a0: 2053 movs r0, #83 @ 0x53 800d8a2: f7ff ffa1 bl 800d7e8 } 800d8a6: bf00 nop 800d8a8: bd80 pop {r7, pc} 800d8aa: bf00 nop 0800d8ac : void CCS_SendStart(void) { CCS_SendPacket(CMD_M2E_START, NULL, 0); } static void CCS_CalculateEnergy(void) { 800d8ac: b580 push {r7, lr} 800d8ae: b082 sub sp, #8 800d8b0: af00 add r7, sp, #0 static uint32_t lastTick = 0; uint32_t currentTick = HAL_GetTick(); 800d8b2: f001 fec5 bl 800f640 800d8b6: 6078 str r0, [r7, #4] uint32_t elapsedTimeMs = currentTick - lastTick; 800d8b8: 4b1e ldr r3, [pc, #120] @ (800d934 ) 800d8ba: 681b ldr r3, [r3, #0] 800d8bc: 687a ldr r2, [r7, #4] 800d8be: 1ad3 subs r3, r2, r3 800d8c0: 603b str r3, [r7, #0] lastTick = currentTick; 800d8c2: 4a1c ldr r2, [pc, #112] @ (800d934 ) 800d8c4: 687b ldr r3, [r7, #4] 800d8c6: 6013 str r3, [r2, #0] CCS_Power = CONN.MeasuredVoltage * CONN.MeasuredCurrent / 10; 800d8c8: 4b1b ldr r3, [pc, #108] @ (800d938 ) 800d8ca: f8b3 3013 ldrh.w r3, [r3, #19] 800d8ce: b29b uxth r3, r3 800d8d0: 461a mov r2, r3 800d8d2: 4b19 ldr r3, [pc, #100] @ (800d938 ) 800d8d4: f8b3 3015 ldrh.w r3, [r3, #21] 800d8d8: b29b uxth r3, r3 800d8da: fb02 f303 mul.w r3, r2, r3 800d8de: 4a17 ldr r2, [pc, #92] @ (800d93c ) 800d8e0: fb82 1203 smull r1, r2, r2, r3 800d8e4: 1092 asrs r2, r2, #2 800d8e6: 17db asrs r3, r3, #31 800d8e8: 1ad3 subs r3, r2, r3 800d8ea: 461a mov r2, r3 800d8ec: 4b14 ldr r3, [pc, #80] @ (800d940 ) 800d8ee: 601a str r2, [r3, #0] CCS_EnergyWs += (CCS_Power * elapsedTimeMs) / 1000; 800d8f0: 4b13 ldr r3, [pc, #76] @ (800d940 ) 800d8f2: 681b ldr r3, [r3, #0] 800d8f4: 683a ldr r2, [r7, #0] 800d8f6: fb02 f303 mul.w r3, r2, r3 800d8fa: 4a12 ldr r2, [pc, #72] @ (800d944 ) 800d8fc: fba2 2303 umull r2, r3, r2, r3 800d900: 099a lsrs r2, r3, #6 800d902: 4b11 ldr r3, [pc, #68] @ (800d948 ) 800d904: 681b ldr r3, [r3, #0] 800d906: 4413 add r3, r2 800d908: 4a0f ldr r2, [pc, #60] @ (800d948 ) 800d90a: 6013 str r3, [r2, #0] if(CCS_EvseState == Unplugged) { 800d90c: 4b0f ldr r3, [pc, #60] @ (800d94c ) 800d90e: 781b ldrb r3, [r3, #0] 800d910: 2b01 cmp r3, #1 800d912: d102 bne.n 800d91a CCS_EnergyWs = 0; 800d914: 4b0c ldr r3, [pc, #48] @ (800d948 ) 800d916: 2200 movs r2, #0 800d918: 601a str r2, [r3, #0] } CCS_Energy = CCS_EnergyWs / 3600; 800d91a: 4b0b ldr r3, [pc, #44] @ (800d948 ) 800d91c: 681b ldr r3, [r3, #0] 800d91e: 4a0c ldr r2, [pc, #48] @ (800d950 ) 800d920: fba2 2303 umull r2, r3, r2, r3 800d924: 0adb lsrs r3, r3, #11 800d926: 4a0b ldr r2, [pc, #44] @ (800d954 ) 800d928: 6013 str r3, [r2, #0] } 800d92a: bf00 nop 800d92c: 3708 adds r7, #8 800d92e: 46bd mov sp, r7 800d930: bd80 pop {r7, pc} 800d932: bf00 nop 800d934: 20000d68 .word 0x20000d68 800d938: 200003b0 .word 0x200003b0 800d93c: 66666667 .word 0x66666667 800d940: 200009d4 .word 0x200009d4 800d944: 10624dd3 .word 0x10624dd3 800d948: 200009d8 .word 0x200009d8 800d94c: 20000d50 .word 0x20000d50 800d950: 91a2b3c5 .word 0x91a2b3c5 800d954: 200009dc .word 0x200009dc 0800d958 : static void send_state(void) { 800d958: b580 push {r7, lr} 800d95a: af00 add r7, sp, #0 CCS_CalculateEnergy(); 800d95c: f7ff ffa6 bl 800d8ac CCS_State.DutyCycle = CP_GetDuty(); 800d960: f7fc fc58 bl 800a214 800d964: 4603 mov r3, r0 800d966: 461a mov r2, r3 800d968: 4b2a ldr r3, [pc, #168] @ (800da14 ) 800d96a: 701a strb r2, [r3, #0] CCS_State.OutputEnabled = PSU0.CONT_enabled; 800d96c: 4b2a ldr r3, [pc, #168] @ (800da18 ) 800d96e: 7ada ldrb r2, [r3, #11] 800d970: 4b28 ldr r3, [pc, #160] @ (800da14 ) 800d972: 705a strb r2, [r3, #1] CCS_State.MeasuredVoltage = (uint16_t)CONN.MeasuredVoltage; 800d974: 4b29 ldr r3, [pc, #164] @ (800da1c ) 800d976: f8b3 3013 ldrh.w r3, [r3, #19] 800d97a: b29a uxth r2, r3 800d97c: 4b25 ldr r3, [pc, #148] @ (800da14 ) 800d97e: 805a strh r2, [r3, #2] CCS_State.MeasuredCurrent = (uint16_t)CONN.MeasuredCurrent; 800d980: 4b26 ldr r3, [pc, #152] @ (800da1c ) 800d982: f8b3 3015 ldrh.w r3, [r3, #21] 800d986: b29a uxth r2, r3 800d988: 4b22 ldr r3, [pc, #136] @ (800da14 ) 800d98a: 809a strh r2, [r3, #4] CCS_State.Power = CCS_Power; 800d98c: 4b24 ldr r3, [pc, #144] @ (800da20 ) 800d98e: 681b ldr r3, [r3, #0] 800d990: 4a20 ldr r2, [pc, #128] @ (800da14 ) 800d992: f8c2 3006 str.w r3, [r2, #6] CCS_State.Energy = CCS_Energy; 800d996: 4b23 ldr r3, [pc, #140] @ (800da24 ) 800d998: 681b ldr r3, [r3, #0] 800d99a: 4a1e ldr r2, [pc, #120] @ (800da14 ) 800d99c: f8c2 300a str.w r3, [r2, #10] if(CCS_ConnectorState == CCS_CONNECTED){ 800d9a0: 4b21 ldr r3, [pc, #132] @ (800da28 ) 800d9a2: 781b ldrb r3, [r3, #0] 800d9a4: 2b04 cmp r3, #4 800d9a6: d104 bne.n 800d9b2 CCS_State.CpState = cp_state_buffer; 800d9a8: 4b20 ldr r3, [pc, #128] @ (800da2c ) 800d9aa: 781a ldrb r2, [r3, #0] 800d9ac: 4b19 ldr r3, [pc, #100] @ (800da14 ) 800d9ae: 74da strb r2, [r3, #19] 800d9b0: e002 b.n 800d9b8 } else { CCS_State.CpState = EV_STATE_A_IDLE; 800d9b2: 4b18 ldr r3, [pc, #96] @ (800da14 ) 800d9b4: 2200 movs r2, #0 800d9b6: 74da strb r2, [r3, #19] } CCS_State.MaxVoltage = CCS_MaxLoad.maxVoltage; 800d9b8: 4b1d ldr r3, [pc, #116] @ (800da30 ) 800d9ba: 881a ldrh r2, [r3, #0] 800d9bc: 4b15 ldr r3, [pc, #84] @ (800da14 ) 800d9be: 829a strh r2, [r3, #20] CCS_State.MinVoltage = CCS_MaxLoad.minVoltage; 800d9c0: 4b1b ldr r3, [pc, #108] @ (800da30 ) 800d9c2: 885a ldrh r2, [r3, #2] 800d9c4: 4b13 ldr r3, [pc, #76] @ (800da14 ) 800d9c6: 82da strh r2, [r3, #22] CCS_State.MaxCurrent = CCS_MaxLoad.maxCurrent; 800d9c8: 4b19 ldr r3, [pc, #100] @ (800da30 ) 800d9ca: 889a ldrh r2, [r3, #4] 800d9cc: 4b11 ldr r3, [pc, #68] @ (800da14 ) 800d9ce: 831a strh r2, [r3, #24] CCS_State.MinCurrent = CCS_MaxLoad.minCurrent; 800d9d0: 4b17 ldr r3, [pc, #92] @ (800da30 ) 800d9d2: 88da ldrh r2, [r3, #6] 800d9d4: 4b0f ldr r3, [pc, #60] @ (800da14 ) 800d9d6: 835a strh r2, [r3, #26] CCS_State.MaxPower = CCS_MaxLoad.maxPower; 800d9d8: 4b15 ldr r3, [pc, #84] @ (800da30 ) 800d9da: 689b ldr r3, [r3, #8] 800d9dc: 4a0d ldr r2, [pc, #52] @ (800da14 ) 800d9de: 61d3 str r3, [r2, #28] CCS_State.IsolationValid = isolation_enable; 800d9e0: 4b14 ldr r3, [pc, #80] @ (800da34 ) 800d9e2: 781a ldrb r2, [r3, #0] 800d9e4: 4b0b ldr r3, [pc, #44] @ (800da14 ) 800d9e6: 749a strb r2, [r3, #18] CCS_State.IsolationResistance = 900000; 800d9e8: 4a0a ldr r2, [pc, #40] @ (800da14 ) 800d9ea: 2300 movs r3, #0 800d9ec: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800d9f0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800d9f4: f443 433b orr.w r3, r3, #47872 @ 0xbb00 800d9f8: f043 03a0 orr.w r3, r3, #160 @ 0xa0 800d9fc: 81d3 strh r3, [r2, #14] 800d9fe: 2300 movs r3, #0 800da00: f043 030d orr.w r3, r3, #13 800da04: 8213 strh r3, [r2, #16] CCS_SendPacket(CMD_M2E_STATE, &CCS_State, sizeof(CCS_State)); 800da06: 2220 movs r2, #32 800da08: 4902 ldr r1, [pc, #8] @ (800da14 ) 800da0a: 2050 movs r0, #80 @ 0x50 800da0c: f7ff feec bl 800d7e8 } 800da10: bf00 nop 800da12: bd80 pop {r7, pc} 800da14: 20000d04 .word 0x20000d04 800da18: 2000092c .word 0x2000092c 800da1c: 200003b0 .word 0x200003b0 800da20: 200009d4 .word 0x200009d4 800da24: 200009dc .word 0x200009dc 800da28: 20000d51 .word 0x20000d51 800da2c: 20000005 .word 0x20000005 800da30: 200009c8 .word 0x200009c8 800da34: 20000cf2 .word 0x20000cf2 0800da38 : ISR_FAST static uint16_t expected_payload_len(uint8_t cmd) { switch (cmd) { 800da38: 3840 subs r0, #64 @ 0x40 800da3a: b2c0 uxtb r0, r0 800da3c: 2809 cmp r0, #9 800da3e: bf9a itte ls 800da40: 4b02 ldrls r3, [pc, #8] @ (800da4c ) 800da42: f833 0010 ldrhls.w r0, [r3, r0, lsl #1] ISR_FAST static uint16_t expected_payload_len(uint8_t cmd) { 800da46: f64f 70ff movwhi r0, #65535 @ 0xffff case CMD_E2M_EV_INFO: return sizeof(CCS_EvInfo_t); case CMD_E2M_EVSE_STATE: return sizeof(CONN_State_t); case CMD_E2M_KEEP_ALIVE: return 0; default: return 0xFFFFu; } } 800da4a: 4770 bx lr 800da4c: 08018f74 .word 0x08018f74 0800da50 : ISR_FAST static void apply_command(uint8_t cmd, const uint8_t* payload, uint16_t payload_len) { 800da50: b5f8 push {r3, r4, r5, r6, r7, lr} 800da52: 4604 mov r4, r0 800da54: 460d mov r5, r1 (void)payload_len; last_host_seen = HAL_GetTick(); 800da56: f001 fdf3 bl 800f640 everest_timed_out = 0; 800da5a: 2300 movs r3, #0 800da5c: 4a3b ldr r2, [pc, #236] @ (800db4c ) last_host_seen = HAL_GetTick(); 800da5e: 4e3c ldr r6, [pc, #240] @ (800db50 ) everest_timed_out = 0; 800da60: 7013 strb r3, [r2, #0] everest_timeout_warn_latched = 0; 800da62: 4a3c ldr r2, [pc, #240] @ (800db54 ) last_host_seen = HAL_GetTick(); 800da64: 6030 str r0, [r6, #0] everest_timeout_warn_latched = 0; 800da66: 7013 strb r3, [r2, #0] everest_timeout_stop_latched = 0; 800da68: 4a3b ldr r2, [pc, #236] @ (800db58 ) 800da6a: 7013 strb r3, [r2, #0] switch (cmd) { 800da6c: f1a4 0340 sub.w r3, r4, #64 @ 0x40 800da70: 2b09 cmp r3, #9 800da72: d863 bhi.n 800db3c 800da74: e8df f003 tbb [pc, r3] 800da78: 4c591409 .word 0x4c591409 800da7c: 2c281b53 .word 0x2c281b53 800da80: 0548 .short 0x0548 (void)payload; CP_SetDuty(pwm_duty_percent); break; } case CMD_E2M_KEEP_ALIVE: { last_host_seen = HAL_GetTick(); 800da82: f001 fddd bl 800f640 800da86: 6030 str r0, [r6, #0] log_printf(LOG_WARN, "UART3 RX warn: cmd 0x%02x CRC/len OK but no switch case (expected_payload vs apply_command)\n", cmd); break; } } 800da88: bdf8 pop {r3, r4, r5, r6, r7, pc} if (duty > 100) duty = 100; 800da8a: 7828 ldrb r0, [r5, #0] if (CONN.connControl != CMD_FORCE_UNLOCK) { 800da8c: 4b33 ldr r3, [pc, #204] @ (800db5c ) if (duty > 100) duty = 100; 800da8e: 2864 cmp r0, #100 @ 0x64 800da90: bf28 it cs 800da92: 2064 movcs r0, #100 @ 0x64 if (CONN.connControl != CMD_FORCE_UNLOCK) { 800da94: 781b ldrb r3, [r3, #0] pwm_duty_percent = duty; 800da96: 4a32 ldr r2, [pc, #200] @ (800db60 ) if (CONN.connControl != CMD_FORCE_UNLOCK) { 800da98: 2b03 cmp r3, #3 pwm_duty_percent = duty; 800da9a: 7010 strb r0, [r2, #0] if (CONN.connControl != CMD_FORCE_UNLOCK) { 800da9c: d141 bne.n 800db22 } 800da9e: bdf8 pop {r3, r4, r5, r6, r7, pc} ev_enable_output = (p->enable_output != 0); 800daa0: 782b ldrb r3, [r5, #0] 800daa2: 4a30 ldr r2, [pc, #192] @ (800db64 ) 800daa4: 3b00 subs r3, #0 800daa6: bf18 it ne 800daa8: 2301 movne r3, #1 800daaa: 7013 strb r3, [r2, #0] } 800daac: bdf8 pop {r3, r4, r5, r6, r7, pc} CONN.RequestedVoltage = p->voltage_V; 800daae: 8828 ldrh r0, [r5, #0] 800dab0: 4b2a ldr r3, [pc, #168] @ (800db5c ) 800dab2: f8a3 000f strh.w r0, [r3, #15] CONN.WantedCurrent = p->current_0p1A; 800dab6: 886a ldrh r2, [r5, #2] PowerSetpoint_OnCommand(p->voltage_V, p->current_0p1A); 800dab8: b280 uxth r0, r0 CONN.WantedCurrent = p->current_0p1A; 800daba: f8a3 201b strh.w r2, [r3, #27] PowerSetpoint_OnCommand(p->voltage_V, p->current_0p1A); 800dabe: b291 uxth r1, r2 } 800dac0: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} PowerSetpoint_OnCommand(p->voltage_V, p->current_0p1A); 800dac4: f7fd ba38 b.w 800af38 isolation_enable = p->command; 800dac8: 782a ldrb r2, [r5, #0] 800daca: 4b27 ldr r3, [pc, #156] @ (800db68 ) 800dacc: 701a strb r2, [r3, #0] } 800dace: bdf8 pop {r3, r4, r5, r6, r7, pc} memcpy(&CCS_EvInfo, payload, sizeof(CCS_EvInfo_t)); 800dad0: 4f26 ldr r7, [pc, #152] @ (800db6c ) 800dad2: 462c mov r4, r5 800dad4: 463e mov r6, r7 800dad6: f105 0c20 add.w ip, r5, #32 800dada: 4635 mov r5, r6 800dadc: 6820 ldr r0, [r4, #0] 800dade: 6861 ldr r1, [r4, #4] 800dae0: 68a2 ldr r2, [r4, #8] 800dae2: 68e3 ldr r3, [r4, #12] 800dae4: 3410 adds r4, #16 800dae6: 4564 cmp r4, ip 800dae8: c50f stmia r5!, {r0, r1, r2, r3} 800daea: f106 0610 add.w r6, r6, #16 800daee: d1f4 bne.n 800dada 800daf0: 6861 ldr r1, [r4, #4] 800daf2: 68a2 ldr r2, [r4, #8] 800daf4: 6820 ldr r0, [r4, #0] 800daf6: c607 stmia r6!, {r0, r1, r2} CONN.SOC = (uint8_t)(CCS_EvInfo.soc / 10); 800daf8: 4a1d ldr r2, [pc, #116] @ (800db70 ) 800dafa: 887b ldrh r3, [r7, #2] 800dafc: 4917 ldr r1, [pc, #92] @ (800db5c ) 800dafe: fba2 2303 umull r2, r3, r2, r3 800db02: 08db lsrs r3, r3, #3 800db04: 708b strb r3, [r1, #2] } 800db06: bdf8 pop {r3, r4, r5, r6, r7, pc} CCS_EvseState = (CONN_State_t)payload[0]; 800db08: 782a ldrb r2, [r5, #0] 800db0a: 4b1a ldr r3, [pc, #104] @ (800db74 ) 800db0c: 701a strb r2, [r3, #0] } 800db0e: bdf8 pop {r3, r4, r5, r6, r7, pc} enabled = (p->enable != 0); 800db10: 782b ldrb r3, [r5, #0] 800db12: 4a19 ldr r2, [pc, #100] @ (800db78 ) 800db14: 3b00 subs r3, #0 800db16: bf18 it ne 800db18: 2301 movne r3, #1 800db1a: 7013 strb r3, [r2, #0] } 800db1c: bdf8 pop {r3, r4, r5, r6, r7, pc} CP_SetDuty(pwm_duty_percent); 800db1e: 4b10 ldr r3, [pc, #64] @ (800db60 ) 800db20: 7818 ldrb r0, [r3, #0] } 800db22: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} CP_SetDuty(pwm_duty_percent); 800db26: f7fc bb4d b.w 800a1c4 if (p->reset) { 800db2a: 782b ldrb r3, [r5, #0] 800db2c: 2b00 cmp r3, #0 800db2e: d0ab beq.n 800da88 } 800db30: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} log_printf(LOG_WARN, "Everest reset command\n"); 800db34: 2005 movs r0, #5 800db36: 4911 ldr r1, [pc, #68] @ (800db7c ) 800db38: f7fc bd86 b.w 800a648 log_printf(LOG_WARN, 800db3c: 4622 mov r2, r4 } 800db3e: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} log_printf(LOG_WARN, 800db42: 2005 movs r0, #5 800db44: 490e ldr r1, [pc, #56] @ (800db80 ) 800db46: f7fc bd7f b.w 800a648 800db4a: bf00 nop 800db4c: 20000cf8 .word 0x20000cf8 800db50: 20000cf4 .word 0x20000cf4 800db54: 20000cf9 .word 0x20000cf9 800db58: 20000cfa .word 0x20000cfa 800db5c: 200003b0 .word 0x200003b0 800db60: 2000006a .word 0x2000006a 800db64: 200009e9 .word 0x200009e9 800db68: 20000cf2 .word 0x20000cf2 800db6c: 20000d24 .word 0x20000d24 800db70: cccccccd .word 0xcccccccd 800db74: 20000d50 .word 0x20000d50 800db78: 20000cf1 .word 0x20000cf1 800db7c: 08018b60 .word 0x08018b60 800db80: 08018b78 .word 0x08018b78 0800db84 : ISR_FAST static uint8_t process_received_packet(const uint8_t* packet, uint16_t packet_len) { 800db84: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if (packet_len < 3u) { 800db88: 2902 cmp r1, #2 ISR_FAST static uint8_t process_received_packet(const uint8_t* packet, uint16_t packet_len) { 800db8a: 460c mov r4, r1 800db8c: 4605 mov r5, r0 800db8e: b084 sub sp, #16 if (packet_len < 3u) { 800db90: d930 bls.n 800dbf4 uint8_t cmd = packet[0]; uint16_t payload_len = (uint16_t)(packet_len - 3u); uint16_t received_crc = (uint16_t)packet[packet_len - 2u] | (uint16_t)packet[packet_len - 1u] << 8; 800db92: 1843 adds r3, r0, r1 uint16_t received_crc = (uint16_t)packet[packet_len - 2u] | 800db94: f813 2c01 ldrb.w r2, [r3, #-1] 800db98: f813 7c02 ldrb.w r7, [r3, #-2] uint16_t payload_len = (uint16_t)(packet_len - 3u); 800db9c: 1ece subs r6, r1, #3 uint16_t calculated_crc = crc16_ibm(packet, (uint16_t)(1u + payload_len)); 800db9e: 3902 subs r1, #2 800dba0: b289 uxth r1, r1 uint16_t received_crc = (uint16_t)packet[packet_len - 2u] | 800dba2: ea47 2702 orr.w r7, r7, r2, lsl #8 uint8_t cmd = packet[0]; 800dba6: f890 8000 ldrb.w r8, [r0] uint16_t calculated_crc = crc16_ibm(packet, (uint16_t)(1u + payload_len)); 800dbaa: f7ff fd99 bl 800d6e0 if (received_crc != calculated_crc) { 800dbae: 4287 cmp r7, r0 uint16_t payload_len = (uint16_t)(packet_len - 3u); 800dbb0: b2b6 uxth r6, r6 if (received_crc != calculated_crc) { 800dbb2: d112 bne.n 800dbda cmd, (unsigned)packet_len, (unsigned)payload_len, (unsigned)received_crc, (unsigned)calculated_crc); return 0; } uint16_t expected_len = expected_payload_len(cmd); 800dbb4: 4640 mov r0, r8 800dbb6: f7ff ff3f bl 800da38 if (expected_len == 0xFFFFu) { 800dbba: f64f 72ff movw r2, #65535 @ 0xffff 800dbbe: 4290 cmp r0, r2 800dbc0: d03a beq.n 800dc38 log_printf(LOG_WARN, "UART3 RX drop: unknown_cmd cmd=0x%02x total_len=%u payload_len=%u\n", cmd, (unsigned)packet_len, (unsigned)payload_len); return 0; } if (expected_len != payload_len) { 800dbc2: 4286 cmp r6, r0 800dbc4: d12a bne.n 800dc1c cmd, (unsigned)expected_len, (unsigned)payload_len, (unsigned)packet_len); return 0; } if (payload_len > 0) { apply_command(cmd, &packet[1], payload_len); 800dbc6: 4632 mov r2, r6 if (payload_len > 0) { 800dbc8: b9fe cbnz r6, 800dc0a } else { apply_command(cmd, NULL, 0); 800dbca: 4631 mov r1, r6 800dbcc: 4640 mov r0, r8 800dbce: f7ff ff3f bl 800da50 } return 1; 800dbd2: 2001 movs r0, #1 } 800dbd4: b004 add sp, #16 800dbd6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} log_printf(LOG_ERR, 800dbda: 9002 str r0, [sp, #8] 800dbdc: 4623 mov r3, r4 800dbde: 4642 mov r2, r8 800dbe0: 2004 movs r0, #4 800dbe2: e9cd 6700 strd r6, r7, [sp] 800dbe6: 4918 ldr r1, [pc, #96] @ (800dc48 ) 800dbe8: f7fc fd2e bl 800a648 return 0; 800dbec: 2000 movs r0, #0 } 800dbee: b004 add sp, #16 800dbf0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} if (packet_len == 0u) { 800dbf4: b1d9 cbz r1, 800dc2e } else if (packet_len == 1u) { 800dbf6: 2901 cmp r1, #1 log_printf(LOG_WARN, "UART3 RX drop: too_short len=1 b0=0x%02x\n", packet[0]); 800dbf8: 7802 ldrb r2, [r0, #0] 800dbfa: f04f 0005 mov.w r0, #5 } else if (packet_len == 1u) { 800dbfe: d009 beq.n 800dc14 log_printf(LOG_WARN, "UART3 RX drop: too_short len=2 b0=0x%02x b1=0x%02x\n", 800dc00: 786b ldrb r3, [r5, #1] 800dc02: 4912 ldr r1, [pc, #72] @ (800dc4c ) 800dc04: f7fc fd20 bl 800a648 800dc08: e7f0 b.n 800dbec apply_command(cmd, &packet[1], payload_len); 800dc0a: 4640 mov r0, r8 800dc0c: 1c69 adds r1, r5, #1 800dc0e: f7ff ff1f bl 800da50 800dc12: e7de b.n 800dbd2 log_printf(LOG_WARN, "UART3 RX drop: too_short len=1 b0=0x%02x\n", packet[0]); 800dc14: 490e ldr r1, [pc, #56] @ (800dc50 ) 800dc16: f7fc fd17 bl 800a648 800dc1a: e7e7 b.n 800dbec log_printf(LOG_ERR, 800dc1c: 4603 mov r3, r0 800dc1e: 4642 mov r2, r8 800dc20: e9cd 6400 strd r6, r4, [sp] 800dc24: 490b ldr r1, [pc, #44] @ (800dc54 ) 800dc26: 2004 movs r0, #4 800dc28: f7fc fd0e bl 800a648 return 0; 800dc2c: e7de b.n 800dbec log_printf(LOG_WARN, "UART3 RX drop: too_short len=0 (empty chunk)\n"); 800dc2e: 490a ldr r1, [pc, #40] @ (800dc58 ) 800dc30: 2005 movs r0, #5 800dc32: f7fc fd09 bl 800a648 800dc36: e7d9 b.n 800dbec log_printf(LOG_WARN, 800dc38: 4623 mov r3, r4 800dc3a: 4642 mov r2, r8 800dc3c: 4907 ldr r1, [pc, #28] @ (800dc5c ) 800dc3e: 9600 str r6, [sp, #0] 800dc40: 2005 movs r0, #5 800dc42: f7fc fd01 bl 800a648 return 0; 800dc46: e7d1 b.n 800dbec 800dc48: 08018c68 .word 0x08018c68 800dc4c: 08018c34 .word 0x08018c34 800dc50: 08018c08 .word 0x08018c08 800dc54: 08018d10 .word 0x08018d10 800dc58: 08018bd8 .word 0x08018bd8 800dc5c: 08018ccc .word 0x08018ccc 0800dc60 : static void CCS_UART3_Watchdog(void) { 800dc60: b580 push {r7, lr} 800dc62: b082 sub sp, #8 800dc64: af00 add r7, sp, #0 const int32_t since_last_packet = (int32_t)(HAL_GetTick() - uart3_last_packet_tick); 800dc66: f001 fceb bl 800f640 800dc6a: 4602 mov r2, r0 800dc6c: 4b14 ldr r3, [pc, #80] @ (800dcc0 ) 800dc6e: 681b ldr r3, [r3, #0] 800dc70: 1ad3 subs r3, r2, r3 800dc72: 607b str r3, [r7, #4] const int32_t since_last_reinit = (int32_t)(HAL_GetTick() - uart3_last_reinit_tick); 800dc74: f001 fce4 bl 800f640 800dc78: 4602 mov r2, r0 800dc7a: 4b12 ldr r3, [pc, #72] @ (800dcc4 ) 800dc7c: 681b ldr r3, [r3, #0] 800dc7e: 1ad3 subs r3, r2, r3 800dc80: 603b str r3, [r7, #0] if ((since_last_packet >= (int32_t)UART3_REINIT_TIMEOUT_MS) && 800dc82: 687b ldr r3, [r7, #4] 800dc84: f240 52db movw r2, #1499 @ 0x5db 800dc88: 4293 cmp r3, r2 800dc8a: dd15 ble.n 800dcb8 800dc8c: 683b ldr r3, [r7, #0] 800dc8e: f240 52db movw r2, #1499 @ 0x5db 800dc92: 4293 cmp r3, r2 800dc94: dd10 ble.n 800dcb8 (since_last_reinit >= (int32_t)UART3_REINIT_TIMEOUT_MS) && (huart3.RxState == HAL_UART_STATE_READY)) { 800dc96: 4b0c ldr r3, [pc, #48] @ (800dcc8 ) 800dc98: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800dc9c: b2db uxtb r3, r3 (since_last_reinit >= (int32_t)UART3_REINIT_TIMEOUT_MS) && 800dc9e: 2b20 cmp r3, #32 800dca0: d10a bne.n 800dcb8 uart3_arm_rx_or_log("Watchdog"); 800dca2: 480a ldr r0, [pc, #40] @ (800dccc ) 800dca4: f7ff f904 bl 800ceb0 CCS_LogUart3Error("UART3 watchdog rearm"); 800dca8: 4809 ldr r0, [pc, #36] @ (800dcd0 ) 800dcaa: f000 f813 bl 800dcd4 uart3_last_reinit_tick = HAL_GetTick(); 800dcae: f001 fcc7 bl 800f640 800dcb2: 4603 mov r3, r0 800dcb4: 4a03 ldr r2, [pc, #12] @ (800dcc4 ) 800dcb6: 6013 str r3, [r2, #0] } } 800dcb8: bf00 nop 800dcba: 3708 adds r7, #8 800dcbc: 46bd mov sp, r7 800dcbe: bd80 pop {r7, pc} 800dcc0: 20000cfc .word 0x20000cfc 800dcc4: 20000d00 .word 0x20000d00 800dcc8: 20001370 .word 0x20001370 800dccc: 08018d68 .word 0x08018d68 800dcd0: 08018d74 .word 0x08018d74 0800dcd4 : static void CCS_LogUart3Error(const char *tag) { 800dcd4: b580 push {r7, lr} 800dcd6: b086 sub sp, #24 800dcd8: af04 add r7, sp, #16 800dcda: 6078 str r0, [r7, #4] log_printf(LOG_ERR, "%s: err=0x%08lx g=%lu rx=%lu tx_busy=%u\n", tag, (unsigned long)HAL_UART_GetError(&huart3), 800dcdc: 480d ldr r0, [pc, #52] @ (800dd14 ) 800dcde: f006 ff8a bl 8014bf6 800dce2: 4603 mov r3, r0 (unsigned long)huart3.gState, 800dce4: 4a0b ldr r2, [pc, #44] @ (800dd14 ) 800dce6: f892 2041 ldrb.w r2, [r2, #65] @ 0x41 800dcea: b2d2 uxtb r2, r2 log_printf(LOG_ERR, "%s: err=0x%08lx g=%lu rx=%lu tx_busy=%u\n", 800dcec: 4611 mov r1, r2 (unsigned long)huart3.RxState, 800dcee: 4a09 ldr r2, [pc, #36] @ (800dd14 ) 800dcf0: f892 2042 ldrb.w r2, [r2, #66] @ 0x42 800dcf4: b2d2 uxtb r2, r2 log_printf(LOG_ERR, "%s: err=0x%08lx g=%lu rx=%lu tx_busy=%u\n", 800dcf6: 4610 mov r0, r2 800dcf8: 4a07 ldr r2, [pc, #28] @ (800dd18 ) 800dcfa: 7812 ldrb r2, [r2, #0] 800dcfc: 9202 str r2, [sp, #8] 800dcfe: 9001 str r0, [sp, #4] 800dd00: 9100 str r1, [sp, #0] 800dd02: 687a ldr r2, [r7, #4] 800dd04: 4905 ldr r1, [pc, #20] @ (800dd1c ) 800dd06: 2004 movs r0, #4 800dd08: f7fc fc9e bl 800a648 (unsigned)uart3_tx_busy); } 800dd0c: bf00 nop 800dd0e: 3708 adds r7, #8 800dd10: 46bd mov sp, r7 800dd12: bd80 pop {r7, pc} 800dd14: 20001370 .word 0x20001370 800dd18: 20000cee .word 0x20000cee 800dd1c: 08018d8c .word 0x08018d8c 0800dd20 : .fw_version_major = 0, .fw_version_minor = 0, .fw_version_patch = 0, }; void ReadVersion(){ 800dd20: b480 push {r7} 800dd22: af00 add r7, sp, #0 infoPacket.serialNumber = InfoBlock->serialNumber; 800dd24: 4b0e ldr r3, [pc, #56] @ (800dd60 ) 800dd26: 681b ldr r3, [r3, #0] 800dd28: 681b ldr r3, [r3, #0] 800dd2a: b29a uxth r2, r3 800dd2c: 4b0d ldr r3, [pc, #52] @ (800dd64 ) 800dd2e: 801a strh r2, [r3, #0] infoPacket.boardVersion = InfoBlock->boardVersion; 800dd30: 4b0b ldr r3, [pc, #44] @ (800dd60 ) 800dd32: 681b ldr r3, [r3, #0] 800dd34: 795a ldrb r2, [r3, #5] 800dd36: 4b0b ldr r3, [pc, #44] @ (800dd64 ) 800dd38: 709a strb r2, [r3, #2] infoPacket.stationType = InfoBlock->stationType; 800dd3a: 4b09 ldr r3, [pc, #36] @ (800dd60 ) 800dd3c: 681b ldr r3, [r3, #0] 800dd3e: 791a ldrb r2, [r3, #4] 800dd40: 4b08 ldr r3, [pc, #32] @ (800dd64 ) 800dd42: 70da strb r2, [r3, #3] infoPacket.fw_version_major = FW_VERSION_MAJOR; 800dd44: 4b07 ldr r3, [pc, #28] @ (800dd64 ) 800dd46: 2201 movs r2, #1 800dd48: 809a strh r2, [r3, #4] infoPacket.fw_version_minor = FW_VERSION_MINOR; 800dd4a: 4b06 ldr r3, [pc, #24] @ (800dd64 ) 800dd4c: 2200 movs r2, #0 800dd4e: 80da strh r2, [r3, #6] infoPacket.fw_version_patch = FW_VERSION_PATCH; 800dd50: 4b04 ldr r3, [pc, #16] @ (800dd64 ) 800dd52: 221b movs r2, #27 800dd54: 811a strh r2, [r3, #8] } 800dd56: bf00 nop 800dd58: 46bd mov sp, r7 800dd5a: bc80 pop {r7} 800dd5c: 4770 bx lr 800dd5e: bf00 nop 800dd60: 20000000 .word 0x20000000 800dd64: 200011f0 .word 0x200011f0 0800dd68 : // Внешняя функция обработки команд (определена в serial_handler.c) extern void SC_CommandHandler(ReceivedCommand_t* cmd); void SC_Init() { 800dd68: b580 push {r7, lr} 800dd6a: af00 add r7, sp, #0 // Обнуляем структуру memset(&serial_control, 0, sizeof(SerialControl_t)); 800dd6c: f44f 7204 mov.w r2, #528 @ 0x210 800dd70: 2100 movs r1, #0 800dd72: 480d ldr r0, [pc, #52] @ (800dda8 ) 800dd74: f008 f962 bl 801603c memset(&serial_iso, 0, sizeof(serial_iso)); 800dd78: f44f 7204 mov.w r2, #528 @ 0x210 800dd7c: 2100 movs r1, #0 800dd7e: 480b ldr r0, [pc, #44] @ (800ddac ) 800dd80: f008 f95c bl 801603c sc_uart2_timed_out = 0; 800dd84: 4b0a ldr r3, [pc, #40] @ (800ddb0 ) 800dd86: 2200 movs r2, #0 800dd88: 701a strb r2, [r3, #0] sc_uart2_last_packet_tick = HAL_GetTick(); 800dd8a: f001 fc59 bl 800f640 800dd8e: 4603 mov r3, r0 800dd90: 4a08 ldr r2, [pc, #32] @ (800ddb4 ) 800dd92: 6013 str r3, [r2, #0] sc_uart2_last_recover_tick = sc_uart2_last_packet_tick; 800dd94: 4b07 ldr r3, [pc, #28] @ (800ddb4 ) 800dd96: 681b ldr r3, [r3, #0] 800dd98: 4a07 ldr r2, [pc, #28] @ (800ddb8 ) 800dd9a: 6013 str r3, [r2, #0] SC_ArmUart2RxDma(); 800dd9c: f000 fa14 bl 800e1c8 SC_ArmUart5RxDma(); 800dda0: f000 fa36 bl 800e210 } 800dda4: bf00 nop 800dda6: bd80 pop {r7, pc} 800dda8: 20000d6c .word 0x20000d6c 800ddac: 20000f7c .word 0x20000f7c 800ddb0: 2000118d .word 0x2000118d 800ddb4: 20001190 .word 0x20001190 800ddb8: 20001194 .word 0x20001194 0800ddbc : void SC_Task() { 800ddbc: b580 push {r7, lr} 800ddbe: af00 add r7, sp, #0 static uint32_t tick; if ((int32_t)(HAL_GetTick() - tick) < 1) return; 800ddc0: f001 fc3e bl 800f640 800ddc4: 4602 mov r2, r0 800ddc6: 4b21 ldr r3, [pc, #132] @ (800de4c ) 800ddc8: 681b ldr r3, [r3, #0] 800ddca: 1ad3 subs r3, r2, r3 800ddcc: 2b00 cmp r3, #0 800ddce: dd3b ble.n 800de48 tick = HAL_GetTick(); 800ddd0: f001 fc36 bl 800f640 800ddd4: 4603 mov r3, r0 800ddd6: 4a1d ldr r2, [pc, #116] @ (800de4c ) 800ddd8: 6013 str r3, [r2, #0] SC_UART2_Watchdog(); 800ddda: f000 f9ad bl 800e138 // Запуск приема в режиме DMA + idle SC_ArmUart2RxDma(); 800ddde: f000 f9f3 bl 800e1c8 SC_ArmUart5RxDma(); 800dde2: f000 fa15 bl 800e210 // Проверка таймаута отправки пакета (больше 100 мс) if (huart2.gState == HAL_UART_STATE_BUSY_TX && serial_control.tx_tick != 0) { 800dde6: 4b1a ldr r3, [pc, #104] @ (800de50 ) 800dde8: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800ddec: b2db uxtb r3, r3 800ddee: 2b21 cmp r3, #33 @ 0x21 800ddf0: d114 bne.n 800de1c 800ddf2: 4b18 ldr r3, [pc, #96] @ (800de54 ) 800ddf4: f8d3 320c ldr.w r3, [r3, #524] @ 0x20c 800ddf8: 2b00 cmp r3, #0 800ddfa: d00f beq.n 800de1c if ((int32_t)(HAL_GetTick() - serial_control.tx_tick) > 100) { 800ddfc: f001 fc20 bl 800f640 800de00: 4602 mov r2, r0 800de02: 4b14 ldr r3, [pc, #80] @ (800de54 ) 800de04: f8d3 320c ldr.w r3, [r3, #524] @ 0x20c 800de08: 1ad3 subs r3, r2, r3 800de0a: 2b64 cmp r3, #100 @ 0x64 800de0c: dd06 ble.n 800de1c // Таймаут: принудительно сбрасываем передачу (void)HAL_UART_AbortTransmit(&huart2); 800de0e: 4810 ldr r0, [pc, #64] @ (800de50 ) 800de10: f006 fb38 bl 8014484 serial_control.tx_tick = 0; // Сбрасываем tick 800de14: 4b0f ldr r3, [pc, #60] @ (800de54 ) 800de16: 2200 movs r2, #0 800de18: f8c3 220c str.w r2, [r3, #524] @ 0x20c } } // Проверка наличия принятой команды для обработки if (serial_control.command_ready && (huart2.gState != HAL_UART_STATE_BUSY_TX)) { 800de1c: 4b0d ldr r3, [pc, #52] @ (800de54 ) 800de1e: f893 3208 ldrb.w r3, [r3, #520] @ 0x208 800de22: b2db uxtb r3, r3 800de24: 2b00 cmp r3, #0 800de26: d010 beq.n 800de4a 800de28: 4b09 ldr r3, [pc, #36] @ (800de50 ) 800de2a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800de2e: b2db uxtb r3, r3 800de30: 2b21 cmp r3, #33 @ 0x21 800de32: d00a beq.n 800de4a // HAL_Delay(2); SC_CommandHandler((ReceivedCommand_t*)&serial_control.received_command); 800de34: 4808 ldr r0, [pc, #32] @ (800de58 ) 800de36: f000 fa87 bl 800e348 serial_control.command_ready = 0; // Сбрасываем флаг 800de3a: 4b06 ldr r3, [pc, #24] @ (800de54 ) 800de3c: 2200 movs r2, #0 800de3e: f883 2208 strb.w r2, [r3, #520] @ 0x208 SC_ArmUart2RxDma(); 800de42: f000 f9c1 bl 800e1c8 800de46: e000 b.n 800de4a if ((int32_t)(HAL_GetTick() - tick) < 1) return; 800de48: bf00 nop } } 800de4a: bd80 pop {r7, pc} 800de4c: 200011fc .word 0x200011fc 800de50: 20001328 .word 0x20001328 800de54: 20000d6c .word 0x20000d6c 800de58: 20000f6c .word 0x20000f6c 0800de5c : ISR_FAST void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { if (huart->Instance == huart2.Instance) { 800de5c: 4b2e ldr r3, [pc, #184] @ (800df18 ) ISR_FAST void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { 800de5e: b570 push {r4, r5, r6, lr} if (huart->Instance == huart2.Instance) { 800de60: 681a ldr r2, [r3, #0] 800de62: 6803 ldr r3, [r0, #0] ISR_FAST void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { 800de64: 460c mov r4, r1 if (huart->Instance == huart2.Instance) { 800de66: 4293 cmp r3, r2 800de68: d019 beq.n 800de9e log_printf(LOG_WARN, "UART2 RX invalid packet len=%u\n", (unsigned)Size); SC_SendPacket(NULL, 0, RESP_INVALID); } g_sc_command_source = SC_SOURCE_UART2; SC_ArmUart2RxDma(); } else if (huart->Instance == huart5.Instance) { 800de6a: 4a2c ldr r2, [pc, #176] @ (800df1c ) 800de6c: 6812 ldr r2, [r2, #0] 800de6e: 4293 cmp r3, r2 800de70: d004 beq.n 800de7c SC_CommandHandler((ReceivedCommand_t*)&serial_iso.received_command); } else { log_printf(LOG_WARN, "UART5 RX invalid packet len=%u\n", (unsigned)Size); } SC_ArmUart5RxDma(); } else if (huart->Instance == huart3.Instance) { 800de72: 4a2b ldr r2, [pc, #172] @ (800df20 ) 800de74: 6812 ldr r2, [r2, #0] 800de76: 4293 cmp r3, r2 800de78: d04a beq.n 800df10 CCS_RxEventCallback(huart, Size); } } 800de7a: bd70 pop {r4, r5, r6, pc} if (Size == 0u) { 800de7c: b399 cbz r1, 800dee6 if (process_received_packet(&serial_iso, serial_iso.rx_buffer, Size)) { 800de7e: 4929 ldr r1, [pc, #164] @ (800df24 ) 800de80: 4622 mov r2, r4 800de82: f5a1 7080 sub.w r0, r1, #256 @ 0x100 800de86: f000 f949 bl 800e11c 800de8a: bb10 cbnz r0, 800ded2 log_printf(LOG_WARN, "UART5 RX invalid packet len=%u\n", (unsigned)Size); 800de8c: 4622 mov r2, r4 800de8e: 2005 movs r0, #5 800de90: 4925 ldr r1, [pc, #148] @ (800df28 ) 800de92: f7fc fbd9 bl 800a648 } 800de96: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} SC_ArmUart5RxDma(); 800de9a: f000 b9b9 b.w 800e210 if (Size == 0u) { 800de9e: b391 cbz r1, 800df06 sc_uart2_last_packet_tick = HAL_GetTick(); 800dea0: f001 fbce bl 800f640 sc_uart2_timed_out = 0; 800dea4: 2200 movs r2, #0 800dea6: 4b21 ldr r3, [pc, #132] @ (800df2c ) if(!process_received_packet(&serial_control, serial_control.rx_buffer, Size)){ 800dea8: 4921 ldr r1, [pc, #132] @ (800df30 ) sc_uart2_timed_out = 0; 800deaa: 701a strb r2, [r3, #0] sc_uart2_last_packet_tick = HAL_GetTick(); 800deac: 4603 mov r3, r0 sc_uart2_last_recover_tick = sc_uart2_last_packet_tick; 800deae: 4d21 ldr r5, [pc, #132] @ (800df34 ) sc_uart2_last_packet_tick = HAL_GetTick(); 800deb0: 4e21 ldr r6, [pc, #132] @ (800df38 ) if(!process_received_packet(&serial_control, serial_control.rx_buffer, Size)){ 800deb2: 4622 mov r2, r4 800deb4: f5a1 7080 sub.w r0, r1, #256 @ 0x100 sc_uart2_last_recover_tick = sc_uart2_last_packet_tick; 800deb8: 602b str r3, [r5, #0] sc_uart2_last_packet_tick = HAL_GetTick(); 800deba: 6033 str r3, [r6, #0] if(!process_received_packet(&serial_control, serial_control.rx_buffer, Size)){ 800debc: f000 f92e bl 800e11c 800dec0: 4605 mov r5, r0 800dec2: b1a8 cbz r0, 800def0 g_sc_command_source = SC_SOURCE_UART2; 800dec4: 2200 movs r2, #0 800dec6: 4b1d ldr r3, [pc, #116] @ (800df3c ) 800dec8: 701a strb r2, [r3, #0] } 800deca: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} SC_ArmUart2RxDma(); 800dece: f000 b97b b.w 800e1c8 g_sc_command_source = SC_SOURCE_UART5; 800ded2: 2201 movs r2, #1 800ded4: 4b19 ldr r3, [pc, #100] @ (800df3c ) SC_CommandHandler((ReceivedCommand_t*)&serial_iso.received_command); 800ded6: 481a ldr r0, [pc, #104] @ (800df40 ) g_sc_command_source = SC_SOURCE_UART5; 800ded8: 701a strb r2, [r3, #0] SC_CommandHandler((ReceivedCommand_t*)&serial_iso.received_command); 800deda: f000 fa35 bl 800e348 } 800dede: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} SC_ArmUart5RxDma(); 800dee2: f000 b995 b.w 800e210 log_printf(LOG_WARN, "UART5 RX idle event with zero size\n"); 800dee6: 4917 ldr r1, [pc, #92] @ (800df44 ) 800dee8: 2005 movs r0, #5 800deea: f7fc fbad bl 800a648 800deee: e7c6 b.n 800de7e log_printf(LOG_WARN, "UART2 RX invalid packet len=%u\n", (unsigned)Size); 800def0: 4622 mov r2, r4 800def2: 4915 ldr r1, [pc, #84] @ (800df48 ) 800def4: 2005 movs r0, #5 800def6: f7fc fba7 bl 800a648 SC_SendPacket(NULL, 0, RESP_INVALID); 800defa: 2214 movs r2, #20 800defc: 4629 mov r1, r5 800defe: 4628 mov r0, r5 800df00: f000 f8b6 bl 800e070 800df04: e7de b.n 800dec4 log_printf(LOG_WARN, "UART2 RX idle event with zero size\n"); 800df06: 4911 ldr r1, [pc, #68] @ (800df4c ) 800df08: 2005 movs r0, #5 800df0a: f7fc fb9d bl 800a648 800df0e: e7c7 b.n 800dea0 } 800df10: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} CCS_RxEventCallback(huart, Size); 800df14: f7fe bffc b.w 800cf10 800df18: 20001328 .word 0x20001328 800df1c: 20001298 .word 0x20001298 800df20: 20001370 .word 0x20001370 800df24: 2000107c .word 0x2000107c 800df28: 08018e20 .word 0x08018e20 800df2c: 2000118d .word 0x2000118d 800df30: 20000e6c .word 0x20000e6c 800df34: 20001194 .word 0x20001194 800df38: 20001190 .word 0x20001190 800df3c: 2000118c .word 0x2000118c 800df40: 2000117c .word 0x2000117c 800df44: 08018dfc .word 0x08018dfc 800df48: 08018ddc .word 0x08018ddc 800df4c: 08018db8 .word 0x08018db8 0800df50 : ISR_FAST void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { if (huart->Instance == huart2.Instance) { 800df50: 4b08 ldr r3, [pc, #32] @ (800df74 ) 800df52: 681a ldr r2, [r3, #0] 800df54: 6803 ldr r3, [r0, #0] 800df56: 4293 cmp r3, r2 800df58: d004 beq.n 800df64 serial_control.tx_tick = 0; } else if (huart->Instance == huart3.Instance) { 800df5a: 4a07 ldr r2, [pc, #28] @ (800df78 ) 800df5c: 6812 ldr r2, [r2, #0] 800df5e: 4293 cmp r3, r2 800df60: d005 beq.n 800df6e CCS_TxCpltCallback(huart); } } 800df62: 4770 bx lr serial_control.tx_tick = 0; 800df64: 2200 movs r2, #0 800df66: 4b05 ldr r3, [pc, #20] @ (800df7c ) 800df68: f8c3 220c str.w r2, [r3, #524] @ 0x20c 800df6c: 4770 bx lr CCS_TxCpltCallback(huart); 800df6e: f7ff b879 b.w 800d064 800df72: bf00 nop 800df74: 20001328 .word 0x20001328 800df78: 20001370 .word 0x20001370 800df7c: 20000d6c .word 0x20000d6c 0800df80 : // Полностью программная реализация CRC-32 (полином CRC32_POLYNOMIAL, порядок little-endian) ISR_FAST static uint32_t calculate_crc32(const uint8_t* data, uint16_t length) { uint32_t crc = 0xFFFFFFFFu; for (uint16_t i = 0; i < length; i++) { 800df80: b3c9 cbz r1, 800dff6 uint32_t crc = 0xFFFFFFFFu; 800df82: f04f 33ff mov.w r3, #4294967295 ISR_FAST static uint32_t calculate_crc32(const uint8_t* data, uint16_t length) { 800df86: b500 push {lr} crc ^= data[i]; for (uint8_t bit = 0; bit < 8; bit++) { if (crc & 0x1u) { 800df88: 4a1c ldr r2, [pc, #112] @ (800dffc ) 800df8a: 4401 add r1, r0 crc ^= data[i]; 800df8c: f810 eb01 ldrb.w lr, [r0], #1 800df90: ea8e 0e03 eor.w lr, lr, r3 if (crc & 0x1u) { 800df94: f34e 0300 sbfx r3, lr, #0, #1 800df98: f34e 0c40 sbfx ip, lr, #1, #1 800df9c: 4013 ands r3, r2 800df9e: ea83 035e eor.w r3, r3, lr, lsr #1 800dfa2: ea0c 0c02 and.w ip, ip, r2 800dfa6: ea8c 0c53 eor.w ip, ip, r3, lsr #1 800dfaa: f343 0340 sbfx r3, r3, #1, #1 800dfae: f34c 0e40 sbfx lr, ip, #1, #1 800dfb2: 4013 ands r3, r2 800dfb4: ea83 035c eor.w r3, r3, ip, lsr #1 800dfb8: ea0e 0e02 and.w lr, lr, r2 800dfbc: ea8e 0e53 eor.w lr, lr, r3, lsr #1 800dfc0: f343 0340 sbfx r3, r3, #1, #1 800dfc4: f34e 0c40 sbfx ip, lr, #1, #1 800dfc8: 4013 ands r3, r2 800dfca: ea83 035e eor.w r3, r3, lr, lsr #1 800dfce: ea0c 0c02 and.w ip, ip, r2 800dfd2: ea8c 0c53 eor.w ip, ip, r3, lsr #1 800dfd6: f343 0340 sbfx r3, r3, #1, #1 800dfda: 4013 ands r3, r2 800dfdc: f34c 0e40 sbfx lr, ip, #1, #1 800dfe0: ea83 035c eor.w r3, r3, ip, lsr #1 for (uint16_t i = 0; i < length; i++) { 800dfe4: 4281 cmp r1, r0 if (crc & 0x1u) { 800dfe6: ea0e 0c02 and.w ip, lr, r2 800dfea: ea8c 0353 eor.w r3, ip, r3, lsr #1 for (uint16_t i = 0; i < length; i++) { 800dfee: d1cd bne.n 800df8c crc >>= 1; } } } return crc ^ 0xFFFFFFFFu; 800dff0: 43d8 mvns r0, r3 } 800dff2: f85d fb04 ldr.w pc, [sp], #4 for (uint16_t i = 0; i < length; i++) { 800dff6: 4608 mov r0, r1 } 800dff8: 4770 bx lr 800dffa: bf00 nop 800dffc: edb88320 .word 0xedb88320 0800e000 : ISR_FAST static uint16_t encode_packet(const uint8_t* payload, uint16_t payload_len, uint8_t* output, uint8_t response_code) { 800e000: b570 push {r4, r5, r6, lr} 800e002: 4615 mov r5, r2 uint16_t out_index = 0; output[out_index++] = response_code; 800e004: 7013 strb r3, [r2, #0] if (payload != NULL) { 800e006: b360 cbz r0, 800e062 // Просто копируем полезную нагрузку без какого‑либо экранирования for (uint16_t i = 0; i < payload_len; i++) { 800e008: b359 cbz r1, 800e062 output[out_index++] = payload[i]; 800e00a: 4694 mov ip, r2 800e00c: 2302 movs r3, #2 800e00e: 7802 ldrb r2, [r0, #0] 800e010: 1e4c subs r4, r1, #1 800e012: b2a4 uxth r4, r4 800e014: 441c add r4, r3 800e016: f80c 2f01 strb.w r2, [ip, #1]! // Проверка переполнения if (out_index >= MAX_TX_BUFFER_SIZE - 5) { // 4 байта CRC + END_BYTE 800e01a: e005 b.n 800e028 output[out_index++] = payload[i]; 800e01c: f810 1f01 ldrb.w r1, [r0, #1]! if (out_index >= MAX_TX_BUFFER_SIZE - 5) { // 4 байта CRC + END_BYTE 800e020: 2bfb cmp r3, #251 @ 0xfb output[out_index++] = payload[i]; 800e022: f80c 1f01 strb.w r1, [ip, #1]! if (out_index >= MAX_TX_BUFFER_SIZE - 5) { // 4 байта CRC + END_BYTE 800e026: d020 beq.n 800e06a for (uint16_t i = 0; i < payload_len; i++) { 800e028: 42a3 cmp r3, r4 if (out_index >= MAX_TX_BUFFER_SIZE - 5) { // 4 байта CRC + END_BYTE 800e02a: f103 0301 add.w r3, r3, #1 for (uint16_t i = 0; i < payload_len; i++) { 800e02e: d1f5 bne.n 800e01c 800e030: b2a1 uxth r1, r4 output[out_index++] = payload[i]; 800e032: 1c4e adds r6, r1, #1 800e034: b2b6 uxth r6, r6 } } } // Вычисляем CRC для всего содержимого (код ответа + полезная нагрузка) uint32_t crc = calculate_crc32(output, out_index); 800e036: 4628 mov r0, r5 800e038: f7ff ffa2 bl 800df80 800e03c: 4603 mov r3, r0 uint8_t* crc_bytes = (uint8_t*)&crc; // Добавляем CRC без экранирования for (int i = 0; i < 4; i++) { output[out_index++] = crc_bytes[i]; 800e03e: 1c71 adds r1, r6, #1 800e040: 1cb2 adds r2, r6, #2 800e042: 552b strb r3, [r5, r4] 800e044: f3c3 2c07 ubfx ip, r3, #8, #8 800e048: f3c3 4407 ubfx r4, r3, #16, #8 800e04c: b289 uxth r1, r1 800e04e: b292 uxth r2, r2 800e050: f3c3 6307 ubfx r3, r3, #24, #8 800e054: f805 c006 strb.w ip, [r5, r6] 800e058: 1cf0 adds r0, r6, #3 800e05a: 546c strb r4, [r5, r1] 800e05c: 54ab strb r3, [r5, r2] 800e05e: b280 uxth r0, r0 return 0; } } return out_index; } 800e060: bd70 pop {r4, r5, r6, pc} for (uint16_t i = 0; i < payload_len; i++) { 800e062: 2401 movs r4, #1 800e064: 2602 movs r6, #2 output[out_index++] = response_code; 800e066: 4621 mov r1, r4 800e068: e7e5 b.n 800e036 return 0; 800e06a: 2000 movs r0, #0 } 800e06c: bd70 pop {r4, r5, r6, pc} 800e06e: bf00 nop 0800e070 : ISR_FAST void SC_SendPacket(const uint8_t* payload, uint16_t payload_len, uint8_t response_code) { 800e070: b538 push {r3, r4, r5, lr} 800e072: 4613 mov r3, r2 uint16_t packet_len = encode_packet(payload, payload_len, serial_control.tx_buffer, response_code); 800e074: 4a11 ldr r2, [pc, #68] @ (800e0bc ) 800e076: f7ff ffc3 bl 800e000 if (packet_len > 0) { 800e07a: b180 cbz r0, 800e09e if (huart2.gState != HAL_UART_STATE_READY) { 800e07c: 4604 mov r4, r0 800e07e: 4810 ldr r0, [pc, #64] @ (800e0c0 ) 800e080: f890 3041 ldrb.w r3, [r0, #65] @ 0x41 800e084: 2b20 cmp r3, #32 800e086: d10b bne.n 800e0a0 (void)HAL_UART_AbortTransmit(&huart2); log_printf(LOG_WARN, "UART2 TX busy, abort transmit before resend\n"); } if (HAL_UART_Transmit_DMA(&huart2, serial_control.tx_buffer, packet_len) != HAL_OK) { 800e088: 4d0c ldr r5, [pc, #48] @ (800e0bc ) 800e08a: 4622 mov r2, r4 800e08c: 4629 mov r1, r5 800e08e: 480c ldr r0, [pc, #48] @ (800e0c0 ) 800e090: f006 f8d2 bl 8014238 800e094: b958 cbnz r0, 800e0ae SC_LogUartError("UART2 TX DMA start failed", &huart2); return; } serial_control.tx_tick = HAL_GetTick(); 800e096: f001 fad3 bl 800f640 800e09a: f8c5 020c str.w r0, [r5, #524] @ 0x20c } } 800e09e: bd38 pop {r3, r4, r5, pc} (void)HAL_UART_AbortTransmit(&huart2); 800e0a0: f006 f9f0 bl 8014484 log_printf(LOG_WARN, "UART2 TX busy, abort transmit before resend\n"); 800e0a4: 4907 ldr r1, [pc, #28] @ (800e0c4 ) 800e0a6: 2005 movs r0, #5 800e0a8: f7fc face bl 800a648 800e0ac: e7ec b.n 800e088 SC_LogUartError("UART2 TX DMA start failed", &huart2); 800e0ae: 4904 ldr r1, [pc, #16] @ (800e0c0 ) 800e0b0: 4805 ldr r0, [pc, #20] @ (800e0c8 ) } 800e0b2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} SC_LogUartError("UART2 TX DMA start failed", &huart2); 800e0b6: f000 b905 b.w 800e2c4 800e0ba: bf00 nop 800e0bc: 20000d6c .word 0x20000d6c 800e0c0: 20001328 .word 0x20001328 800e0c4: 08018e40 .word 0x08018e40 800e0c8: 08018e70 .word 0x08018e70 0800e0cc : ISR_FAST static uint8_t parse_packet(const uint8_t* packet_data, uint16_t packet_len, ReceivedCommand_t* out_cmd) { 800e0cc: e92d 4178 stmdb sp!, {r3, r4, r5, r6, r8, lr} // }else{ // test_crc_invalid = 5; // } // Минимальный размер: 1 байт команды + 4 байта CRC if (packet_len < 5) return 0; 800e0d0: 1f4b subs r3, r1, #5 800e0d2: 2bfb cmp r3, #251 @ 0xfb 800e0d4: d813 bhi.n 800e0fe if (packet_len > MAX_RX_BUFFER_SIZE) return 0; uint16_t payload_length = packet_len - 4; 800e0d6: 3904 subs r1, #4 800e0d8: b28c uxth r4, r1 // Извлекаем принятую CRC (последние 4 байта, little-endian) uint32_t received_checksum = ((uint32_t)packet_data[payload_length] << 0) | ((uint32_t)packet_data[payload_length + 1] << 8) | 800e0da: 1903 adds r3, r0, r4 ((uint32_t)packet_data[payload_length + 2] << 16) | 800e0dc: 789d ldrb r5, [r3, #2] 800e0de: 4690 mov r8, r2 ((uint32_t)packet_data[payload_length + 1] << 8) | 800e0e0: 785a ldrb r2, [r3, #1] ((uint32_t)packet_data[payload_length + 2] << 16) | 800e0e2: 042d lsls r5, r5, #16 ((uint32_t)packet_data[payload_length + 1] << 8) | 800e0e4: ea45 2502 orr.w r5, r5, r2, lsl #8 ((uint32_t)packet_data[payload_length] << 0) | 800e0e8: 5d02 ldrb r2, [r0, r4] ((uint32_t)packet_data[payload_length + 3] << 24); 800e0ea: 78db ldrb r3, [r3, #3] ((uint32_t)packet_data[payload_length + 1] << 8) | 800e0ec: 4315 orrs r5, r2 // Вычисляем CRC для полезной нагрузки uint32_t calculated_checksum = calculate_crc32(packet_data, payload_length); 800e0ee: 4621 mov r1, r4 uint32_t received_checksum = 800e0f0: ea45 6503 orr.w r5, r5, r3, lsl #24 uint32_t calculated_checksum = calculate_crc32(packet_data, payload_length); 800e0f4: 4606 mov r6, r0 800e0f6: f7ff ff43 bl 800df80 if (received_checksum != calculated_checksum) return 0; // CRC не совпадает 800e0fa: 4285 cmp r5, r0 800e0fc: d002 beq.n 800e104 if (packet_len < 5) return 0; 800e0fe: 2000 movs r0, #0 out_cmd->argument = (void *)&packet_data[1]; out_cmd->command = packet_data[0]; out_cmd->argument_length = (uint8_t)(payload_length - 1); return 1; } 800e100: e8bd 8178 ldmia.w sp!, {r3, r4, r5, r6, r8, pc} out_cmd->argument = (void *)&packet_data[1]; 800e104: 1c73 adds r3, r6, #1 800e106: f8c8 3004 str.w r3, [r8, #4] out_cmd->command = packet_data[0]; 800e10a: 7833 ldrb r3, [r6, #0] out_cmd->argument_length = (uint8_t)(payload_length - 1); 800e10c: 3c01 subs r4, #1 out_cmd->command = packet_data[0]; 800e10e: f888 3000 strb.w r3, [r8] out_cmd->argument_length = (uint8_t)(payload_length - 1); 800e112: f888 4001 strb.w r4, [r8, #1] return 1; 800e116: 2001 movs r0, #1 } 800e118: e8bd 8178 ldmia.w sp!, {r3, r4, r5, r6, r8, pc} 0800e11c : ISR_FAST static uint8_t process_received_packet(SerialControl_t *ctx, const uint8_t* packet_data, uint16_t packet_len) { 800e11c: b510 push {r4, lr} 800e11e: 4604 mov r4, r0 if (!parse_packet(packet_data, packet_len, (ReceivedCommand_t *)&ctx->received_command)) { 800e120: 4608 mov r0, r1 800e122: 4611 mov r1, r2 800e124: f504 7200 add.w r2, r4, #512 @ 0x200 800e128: f7ff ffd0 bl 800e0cc 800e12c: b118 cbz r0, 800e136 return 0; } ctx->command_ready = 1; 800e12e: 2301 movs r3, #1 return 1; 800e130: 4618 mov r0, r3 ctx->command_ready = 1; 800e132: f884 3208 strb.w r3, [r4, #520] @ 0x208 } 800e136: bd10 pop {r4, pc} 0800e138 : static void SC_UART2_Watchdog(void) { 800e138: b580 push {r7, lr} 800e13a: b082 sub sp, #8 800e13c: af00 add r7, sp, #0 const uint32_t now = HAL_GetTick(); 800e13e: f001 fa7f bl 800f640 800e142: 6078 str r0, [r7, #4] const int32_t since_last_packet = (int32_t)(now - sc_uart2_last_packet_tick); 800e144: 4b1a ldr r3, [pc, #104] @ (800e1b0 ) 800e146: 681b ldr r3, [r3, #0] 800e148: 687a ldr r2, [r7, #4] 800e14a: 1ad3 subs r3, r2, r3 800e14c: 603b str r3, [r7, #0] if (since_last_packet >= (int32_t)SC_UART2_PACKET_TIMEOUT_MS) { 800e14e: 683b ldr r3, [r7, #0] 800e150: f241 3287 movw r2, #4999 @ 0x1387 800e154: 4293 cmp r3, r2 800e156: dd12 ble.n 800e17e if (sc_uart2_timed_out == 0u) { 800e158: 4b16 ldr r3, [pc, #88] @ (800e1b4 ) 800e15a: 781b ldrb r3, [r3, #0] 800e15c: b2db uxtb r3, r3 800e15e: 2b00 cmp r3, #0 800e160: d109 bne.n 800e176 serial_control.command_ready = 0; 800e162: 4b15 ldr r3, [pc, #84] @ (800e1b8 ) 800e164: 2200 movs r2, #0 800e166: f883 2208 strb.w r2, [r3, #520] @ 0x208 log_printf(LOG_WARN, "UART2 RX packet timeout (%u ms)\n", (unsigned)SC_UART2_PACKET_TIMEOUT_MS); 800e16a: f241 3288 movw r2, #5000 @ 0x1388 800e16e: 4913 ldr r1, [pc, #76] @ (800e1bc ) 800e170: 2005 movs r0, #5 800e172: f7fc fa69 bl 800a648 } sc_uart2_timed_out = 1; 800e176: 4b0f ldr r3, [pc, #60] @ (800e1b4 ) 800e178: 2201 movs r2, #1 800e17a: 701a strb r2, [r3, #0] 800e17c: e002 b.n 800e184 } else { sc_uart2_timed_out = 0; 800e17e: 4b0d ldr r3, [pc, #52] @ (800e1b4 ) 800e180: 2200 movs r2, #0 800e182: 701a strb r2, [r3, #0] } if ((huart2.RxState == HAL_UART_STATE_READY) && 800e184: 4b0e ldr r3, [pc, #56] @ (800e1c0 ) 800e186: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800e18a: b2db uxtb r3, r3 800e18c: 2b20 cmp r3, #32 800e18e: d10a bne.n 800e1a6 ((int32_t)(now - sc_uart2_last_recover_tick) >= (int32_t)SC_UART2_RECOVER_GUARD_MS)) { 800e190: 4b0c ldr r3, [pc, #48] @ (800e1c4 ) 800e192: 681b ldr r3, [r3, #0] 800e194: 687a ldr r2, [r7, #4] 800e196: 1ad3 subs r3, r2, r3 if ((huart2.RxState == HAL_UART_STATE_READY) && 800e198: 2bc7 cmp r3, #199 @ 0xc7 800e19a: dd04 ble.n 800e1a6 SC_ArmUart2RxDma(); 800e19c: f000 f814 bl 800e1c8 sc_uart2_last_recover_tick = now; 800e1a0: 4a08 ldr r2, [pc, #32] @ (800e1c4 ) 800e1a2: 687b ldr r3, [r7, #4] 800e1a4: 6013 str r3, [r2, #0] } } 800e1a6: bf00 nop 800e1a8: 3708 adds r7, #8 800e1aa: 46bd mov sp, r7 800e1ac: bd80 pop {r7, pc} 800e1ae: bf00 nop 800e1b0: 20001190 .word 0x20001190 800e1b4: 2000118d .word 0x2000118d 800e1b8: 20000d6c .word 0x20000d6c 800e1bc: 08018e8c .word 0x08018e8c 800e1c0: 20001328 .word 0x20001328 800e1c4: 20001194 .word 0x20001194 0800e1c8 : static void SC_ArmUart2RxDma(void) { 800e1c8: b580 push {r7, lr} 800e1ca: af00 add r7, sp, #0 if ((huart2.RxState == HAL_UART_STATE_READY) && (serial_control.command_ready == 0)) { 800e1cc: 4b0c ldr r3, [pc, #48] @ (800e200 ) 800e1ce: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800e1d2: b2db uxtb r3, r3 800e1d4: 2b20 cmp r3, #32 800e1d6: d111 bne.n 800e1fc 800e1d8: 4b0a ldr r3, [pc, #40] @ (800e204 ) 800e1da: f893 3208 ldrb.w r3, [r3, #520] @ 0x208 800e1de: b2db uxtb r3, r3 800e1e0: 2b00 cmp r3, #0 800e1e2: d10b bne.n 800e1fc if (HAL_UARTEx_ReceiveToIdle_DMA(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1) != HAL_OK) { 800e1e4: 22ff movs r2, #255 @ 0xff 800e1e6: 4908 ldr r1, [pc, #32] @ (800e208 ) 800e1e8: 4805 ldr r0, [pc, #20] @ (800e200 ) 800e1ea: f006 f8f2 bl 80143d2 800e1ee: 4603 mov r3, r0 800e1f0: 2b00 cmp r3, #0 800e1f2: d003 beq.n 800e1fc SC_LogUartError("UART2 RX DMA arm failed", &huart2); 800e1f4: 4902 ldr r1, [pc, #8] @ (800e200 ) 800e1f6: 4805 ldr r0, [pc, #20] @ (800e20c ) 800e1f8: f000 f864 bl 800e2c4 } } } 800e1fc: bf00 nop 800e1fe: bd80 pop {r7, pc} 800e200: 20001328 .word 0x20001328 800e204: 20000d6c .word 0x20000d6c 800e208: 20000e6c .word 0x20000e6c 800e20c: 08018eb0 .word 0x08018eb0 0800e210 : static void SC_ArmUart5RxDma(void) { 800e210: b580 push {r7, lr} 800e212: af00 add r7, sp, #0 if (huart5.RxState == HAL_UART_STATE_READY) { 800e214: 4b0a ldr r3, [pc, #40] @ (800e240 ) 800e216: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800e21a: b2db uxtb r3, r3 800e21c: 2b20 cmp r3, #32 800e21e: d10d bne.n 800e23c if (HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1) == HAL_OK) { 800e220: 22ff movs r2, #255 @ 0xff 800e222: 4908 ldr r1, [pc, #32] @ (800e244 ) 800e224: 4806 ldr r0, [pc, #24] @ (800e240 ) 800e226: f006 f877 bl 8014318 800e22a: 4603 mov r3, r0 800e22c: 2b00 cmp r3, #0 800e22e: d004 beq.n 800e23a return; } SC_LogUartError("UART5 RX IT arm failed", &huart5); 800e230: 4903 ldr r1, [pc, #12] @ (800e240 ) 800e232: 4805 ldr r0, [pc, #20] @ (800e248 ) 800e234: f000 f846 bl 800e2c4 800e238: e000 b.n 800e23c return; 800e23a: bf00 nop } } 800e23c: bd80 pop {r7, pc} 800e23e: bf00 nop 800e240: 20001298 .word 0x20001298 800e244: 2000107c .word 0x2000107c 800e248: 08018ec8 .word 0x08018ec8 0800e24c : void SC_RecoverUartDma(UART_HandleTypeDef *huart) { 800e24c: b580 push {r7, lr} 800e24e: b082 sub sp, #8 800e250: af00 add r7, sp, #0 800e252: 6078 str r0, [r7, #4] if (huart == &huart2) { 800e254: 687b ldr r3, [r7, #4] 800e256: 4a15 ldr r2, [pc, #84] @ (800e2ac ) 800e258: 4293 cmp r3, r2 800e25a: d115 bne.n 800e288 SC_LogUartError("UART2 recover start", &huart2); 800e25c: 4913 ldr r1, [pc, #76] @ (800e2ac ) 800e25e: 4814 ldr r0, [pc, #80] @ (800e2b0 ) 800e260: f000 f830 bl 800e2c4 (void)HAL_UART_AbortReceive(&huart2); 800e264: 4811 ldr r0, [pc, #68] @ (800e2ac ) 800e266: f006 f975 bl 8014554 (void)HAL_UART_AbortTransmit(&huart2); 800e26a: 4810 ldr r0, [pc, #64] @ (800e2ac ) 800e26c: f006 f90a bl 8014484 serial_control.tx_tick = 0; 800e270: 4b10 ldr r3, [pc, #64] @ (800e2b4 ) 800e272: 2200 movs r2, #0 800e274: f8c3 220c str.w r2, [r3, #524] @ 0x20c SC_ArmUart2RxDma(); 800e278: f7ff ffa6 bl 800e1c8 sc_uart2_last_recover_tick = HAL_GetTick(); 800e27c: f001 f9e0 bl 800f640 800e280: 4603 mov r3, r0 800e282: 4a0d ldr r2, [pc, #52] @ (800e2b8 ) 800e284: 6013 str r3, [r2, #0] } else if (huart == &huart5) { SC_LogUartError("UART5 recover start", &huart5); (void)HAL_UART_AbortReceive(&huart5); SC_ArmUart5RxDma(); } } 800e286: e00c b.n 800e2a2 } else if (huart == &huart5) { 800e288: 687b ldr r3, [r7, #4] 800e28a: 4a0c ldr r2, [pc, #48] @ (800e2bc ) 800e28c: 4293 cmp r3, r2 800e28e: d108 bne.n 800e2a2 SC_LogUartError("UART5 recover start", &huart5); 800e290: 490a ldr r1, [pc, #40] @ (800e2bc ) 800e292: 480b ldr r0, [pc, #44] @ (800e2c0 ) 800e294: f000 f816 bl 800e2c4 (void)HAL_UART_AbortReceive(&huart5); 800e298: 4808 ldr r0, [pc, #32] @ (800e2bc ) 800e29a: f006 f95b bl 8014554 SC_ArmUart5RxDma(); 800e29e: f7ff ffb7 bl 800e210 } 800e2a2: bf00 nop 800e2a4: 3708 adds r7, #8 800e2a6: 46bd mov sp, r7 800e2a8: bd80 pop {r7, pc} 800e2aa: bf00 nop 800e2ac: 20001328 .word 0x20001328 800e2b0: 08018ee0 .word 0x08018ee0 800e2b4: 20000d6c .word 0x20000d6c 800e2b8: 20001194 .word 0x20001194 800e2bc: 20001298 .word 0x20001298 800e2c0: 08018ef4 .word 0x08018ef4 0800e2c4 : static void SC_LogUartError(const char *tag, UART_HandleTypeDef *huart) { 800e2c4: b590 push {r4, r7, lr} 800e2c6: b087 sub sp, #28 800e2c8: af04 add r7, sp, #16 800e2ca: 6078 str r0, [r7, #4] 800e2cc: 6039 str r1, [r7, #0] if (tag == NULL || huart == NULL) { 800e2ce: 687b ldr r3, [r7, #4] 800e2d0: 2b00 cmp r3, #0 800e2d2: d01c beq.n 800e30e 800e2d4: 683b ldr r3, [r7, #0] 800e2d6: 2b00 cmp r3, #0 800e2d8: d019 beq.n 800e30e return; } log_printf(LOG_ERR, "%s: instance=0x%08lx err=0x%08lx g=%lu rx=%lu\n", tag, (unsigned long)huart->Instance, 800e2da: 683b ldr r3, [r7, #0] 800e2dc: 681b ldr r3, [r3, #0] log_printf(LOG_ERR, "%s: instance=0x%08lx err=0x%08lx g=%lu rx=%lu\n", 800e2de: 461c mov r4, r3 (unsigned long)HAL_UART_GetError(huart), 800e2e0: 6838 ldr r0, [r7, #0] 800e2e2: f006 fc88 bl 8014bf6 800e2e6: 4602 mov r2, r0 (unsigned long)huart->gState, 800e2e8: 683b ldr r3, [r7, #0] 800e2ea: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800e2ee: b2db uxtb r3, r3 log_printf(LOG_ERR, "%s: instance=0x%08lx err=0x%08lx g=%lu rx=%lu\n", 800e2f0: 4619 mov r1, r3 (unsigned long)huart->RxState); 800e2f2: 683b ldr r3, [r7, #0] 800e2f4: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800e2f8: b2db uxtb r3, r3 log_printf(LOG_ERR, "%s: instance=0x%08lx err=0x%08lx g=%lu rx=%lu\n", 800e2fa: 9302 str r3, [sp, #8] 800e2fc: 9101 str r1, [sp, #4] 800e2fe: 9200 str r2, [sp, #0] 800e300: 4623 mov r3, r4 800e302: 687a ldr r2, [r7, #4] 800e304: 4904 ldr r1, [pc, #16] @ (800e318 ) 800e306: 2004 movs r0, #4 800e308: f7fc f99e bl 800a648 800e30c: e000 b.n 800e310 return; 800e30e: bf00 nop } 800e310: 370c adds r7, #12 800e312: 46bd mov sp, r7 800e314: bd90 pop {r4, r7, pc} 800e316: bf00 nop 800e318: 08018f08 .word 0x08018f08 0800e31c <__NVIC_SystemReset>: { 800e31c: b480 push {r7} 800e31e: af00 add r7, sp, #0 __ASM volatile ("dsb 0xF":::"memory"); 800e320: f3bf 8f4f dsb sy } 800e324: bf00 nop (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 800e326: 4b06 ldr r3, [pc, #24] @ (800e340 <__NVIC_SystemReset+0x24>) 800e328: 68db ldr r3, [r3, #12] 800e32a: f403 62e0 and.w r2, r3, #1792 @ 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800e32e: 4904 ldr r1, [pc, #16] @ (800e340 <__NVIC_SystemReset+0x24>) 800e330: 4b04 ldr r3, [pc, #16] @ (800e344 <__NVIC_SystemReset+0x28>) 800e332: 4313 orrs r3, r2 800e334: 60cb str r3, [r1, #12] __ASM volatile ("dsb 0xF":::"memory"); 800e336: f3bf 8f4f dsb sy } 800e33a: bf00 nop __NOP(); 800e33c: bf00 nop 800e33e: e7fd b.n 800e33c <__NVIC_SystemReset+0x20> 800e340: e000ed00 .word 0xe000ed00 800e344: 05fa0004 .word 0x05fa0004 0800e348 : .chargerNumber = 00001, .unixTime = 1721651966, }; // Единая функция-обработчик всех команд со switch-case void SC_CommandHandler(ReceivedCommand_t* cmd) { 800e348: b580 push {r7, lr} 800e34a: b084 sub sp, #16 800e34c: af00 add r7, sp, #0 800e34e: 6078 str r0, [r7, #4] uint8_t response_code = RESP_FAILED; 800e350: 2313 movs r3, #19 800e352: 73fb strb r3, [r7, #15] switch (cmd->command) { 800e354: 687b ldr r3, [r7, #4] 800e356: 781b ldrb r3, [r3, #0] 800e358: 2bc2 cmp r3, #194 @ 0xc2 800e35a: f300 80d1 bgt.w 800e500 800e35e: 2bb0 cmp r3, #176 @ 0xb0 800e360: da0f bge.n 800e382 800e362: 2b60 cmp r3, #96 @ 0x60 800e364: d042 beq.n 800e3ec 800e366: 2b60 cmp r3, #96 @ 0x60 800e368: f300 80ca bgt.w 800e500 800e36c: 2b50 cmp r3, #80 @ 0x50 800e36e: d043 beq.n 800e3f8 800e370: 2b50 cmp r3, #80 @ 0x50 800e372: f300 80c5 bgt.w 800e500 800e376: 2b01 cmp r3, #1 800e378: f000 80ab beq.w 800e4d2 800e37c: 2b40 cmp r3, #64 @ 0x40 800e37e: d02d beq.n 800e3dc 800e380: e0be b.n 800e500 800e382: 3bb0 subs r3, #176 @ 0xb0 800e384: 2b12 cmp r3, #18 800e386: f200 80bb bhi.w 800e500 800e38a: a201 add r2, pc, #4 @ (adr r2, 800e390 ) 800e38c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800e390: 0800e3ff .word 0x0800e3ff 800e394: 0800e501 .word 0x0800e501 800e398: 0800e501 .word 0x0800e501 800e39c: 0800e501 .word 0x0800e501 800e3a0: 0800e501 .word 0x0800e501 800e3a4: 0800e4b1 .word 0x0800e4b1 800e3a8: 0800e501 .word 0x0800e501 800e3ac: 0800e4a7 .word 0x0800e4a7 800e3b0: 0800e501 .word 0x0800e501 800e3b4: 0800e501 .word 0x0800e501 800e3b8: 0800e501 .word 0x0800e501 800e3bc: 0800e501 .word 0x0800e501 800e3c0: 0800e501 .word 0x0800e501 800e3c4: 0800e501 .word 0x0800e501 800e3c8: 0800e501 .word 0x0800e501 800e3cc: 0800e501 .word 0x0800e501 800e3d0: 0800e43d .word 0x0800e43d 800e3d4: 0800e4a1 .word 0x0800e4a1 800e3d8: 0800e475 .word 0x0800e475 // Команды БЕЗ аргументов case CMD_GET_STATUS: // Логика получения информации monitoring_data_callback(); 800e3dc: f000 f8b6 bl 800e54c // Отправляем с нормальным приоритетом SC_SendPacket((uint8_t*)&statusPacket, sizeof(statusPacket), CMD_GET_STATUS); 800e3e0: 2240 movs r2, #64 @ 0x40 800e3e2: 2158 movs r1, #88 @ 0x58 800e3e4: 484d ldr r0, [pc, #308] @ (800e51c ) 800e3e6: f7ff fe43 bl 800e070 return; // Специальный ответ уже отправлен 800e3ea: e094 b.n 800e516 case CMD_GET_INFO: SC_SendPacket((uint8_t*)&infoPacket, sizeof(infoPacket), CMD_GET_INFO); 800e3ec: 2260 movs r2, #96 @ 0x60 800e3ee: 210a movs r1, #10 800e3f0: 484b ldr r0, [pc, #300] @ (800e520 ) 800e3f2: f7ff fe3d bl 800e070 return; 800e3f6: e08e b.n 800e516 case CMD_GET_LOG: debug_buffer_send(); 800e3f8: f7fc f8c4 bl 800a584 return; // Ответ формируется внутри debug_buffer_send 800e3fc: e08b b.n 800e516 // Команды С аргументами case CMD_SET_CONFIG: if (cmd->argument_length == sizeof(ConfigBlock_t)) { 800e3fe: 687b ldr r3, [r7, #4] 800e400: 785b ldrb r3, [r3, #1] 800e402: 2b0b cmp r3, #11 800e404: d117 bne.n 800e436 memcpy(&config, cmd->argument, sizeof(ConfigBlock_t)); 800e406: 687b ldr r3, [r7, #4] 800e408: 685a ldr r2, [r3, #4] 800e40a: 4b46 ldr r3, [pc, #280] @ (800e524 ) 800e40c: 6810 ldr r0, [r2, #0] 800e40e: 6851 ldr r1, [r2, #4] 800e410: c303 stmia r3!, {r0, r1} 800e412: 8911 ldrh r1, [r2, #8] 800e414: 7a92 ldrb r2, [r2, #10] 800e416: 8019 strh r1, [r3, #0] 800e418: 709a strb r2, [r3, #2] config_initialized = 1; 800e41a: 4b43 ldr r3, [pc, #268] @ (800e528 ) 800e41c: 2201 movs r2, #1 800e41e: 701a strb r2, [r3, #0] log_printf(LOG_INFO, "Set Config: %s %d\n", config.location, config.chargerNumber); 800e420: 4b40 ldr r3, [pc, #256] @ (800e524 ) 800e422: f8d3 3003 ldr.w r3, [r3, #3] 800e426: 4a3f ldr r2, [pc, #252] @ (800e524 ) 800e428: 4940 ldr r1, [pc, #256] @ (800e52c ) 800e42a: 2007 movs r0, #7 800e42c: f7fc f90c bl 800a648 response_code = RESP_SUCCESS; 800e430: 2312 movs r3, #18 800e432: 73fb strb r3, [r7, #15] break; 800e434: e067 b.n 800e506 } response_code = RESP_FAILED; 800e436: 2313 movs r3, #19 800e438: 73fb strb r3, [r7, #15] break; 800e43a: e064 b.n 800e506 case CMD_SET_POWER_LIMIT: if (cmd->argument_length == 1) { 800e43c: 687b ldr r3, [r7, #4] 800e43e: 785b ldrb r3, [r3, #1] 800e440: 2b01 cmp r3, #1 800e442: d114 bne.n 800e46e PSU0.power_limit = ((uint8_t*)cmd->argument)[0] * 1000; 800e444: 687b ldr r3, [r7, #4] 800e446: 685b ldr r3, [r3, #4] 800e448: 781b ldrb r3, [r3, #0] 800e44a: 461a mov r2, r3 800e44c: f44f 737a mov.w r3, #1000 @ 0x3e8 800e450: fb02 f303 mul.w r3, r2, r3 800e454: 461a mov r2, r3 800e456: 4b36 ldr r3, [pc, #216] @ (800e530 ) 800e458: 615a str r2, [r3, #20] log_printf(LOG_INFO, "Power limit: %d\n", PSU0.power_limit); 800e45a: 4b35 ldr r3, [pc, #212] @ (800e530 ) 800e45c: 695b ldr r3, [r3, #20] 800e45e: 461a mov r2, r3 800e460: 4934 ldr r1, [pc, #208] @ (800e534 ) 800e462: 2007 movs r0, #7 800e464: f7fc f8f0 bl 800a648 //CONN.connState = (((uint8_t*)cmd->argument)[0])/4; response_code = RESP_SUCCESS; 800e468: 2312 movs r3, #18 800e46a: 73fb strb r3, [r7, #15] break; 800e46c: e04b b.n 800e506 } response_code = RESP_FAILED; 800e46e: 2313 movs r3, #19 800e470: 73fb strb r3, [r7, #15] break; 800e472: e048 b.n 800e506 case CMD_CHARGE_PERMIT: if (cmd->argument_length == 1) { 800e474: 687b ldr r3, [r7, #4] 800e476: 785b ldrb r3, [r3, #1] 800e478: 2b01 cmp r3, #1 800e47a: d10e bne.n 800e49a CONN.connControl = ((uint8_t*)cmd->argument)[0]; 800e47c: 687b ldr r3, [r7, #4] 800e47e: 685b ldr r3, [r3, #4] 800e480: 781a ldrb r2, [r3, #0] 800e482: 4b2d ldr r3, [pc, #180] @ (800e538 ) 800e484: 701a strb r2, [r3, #0] log_printf(LOG_INFO, "Charge permit: %d\n", CONN.connControl); 800e486: 4b2c ldr r3, [pc, #176] @ (800e538 ) 800e488: 781b ldrb r3, [r3, #0] 800e48a: 461a mov r2, r3 800e48c: 492b ldr r1, [pc, #172] @ (800e53c ) 800e48e: 2007 movs r0, #7 800e490: f7fc f8da bl 800a648 response_code = RESP_SUCCESS; 800e494: 2312 movs r3, #18 800e496: 73fb strb r3, [r7, #15] break; 800e498: e035 b.n 800e506 } response_code = RESP_FAILED; 800e49a: 2313 movs r3, #19 800e49c: 73fb strb r3, [r7, #15] break; 800e49e: e032 b.n 800e506 // memcpy(&PSU_TestMode, cmd->argument, sizeof(PSU_TestMode_t)); // log_printf(LOG_INFO, "Test PSU: %d %d %d\n", PSU_TestMode.enable, PSU_TestMode.voltage, PSU_TestMode.current); // response_code = RESP_SUCCESS; // break; // } response_code = RESP_FAILED; 800e4a0: 2313 movs r3, #19 800e4a2: 73fb strb r3, [r7, #15] break; 800e4a4: e02f b.n 800e506 case CMD_FIRE_ALARM: FireAlarm_Activate(); 800e4a6: f7fc f94d bl 800a744 response_code = RESP_SUCCESS; 800e4aa: 2312 movs r3, #18 800e4ac: 73fb strb r3, [r7, #15] break; 800e4ae: e02a b.n 800e506 case CMD_DEVICE_RESET: // 2. Отправляем SUCCESS (хост может успеть получить его перед ребутом) SC_SendPacket(NULL, 0, RESP_SUCCESS); 800e4b0: 2212 movs r2, #18 800e4b2: 2100 movs r1, #0 800e4b4: 2000 movs r0, #0 800e4b6: f7ff fddb bl 800e070 while(huart2.gState == HAL_UART_STATE_BUSY_TX); // Ожидание завершения передачи 800e4ba: bf00 nop 800e4bc: 4b20 ldr r3, [pc, #128] @ (800e540 ) 800e4be: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800e4c2: b2db uxtb r3, r3 800e4c4: 2b21 cmp r3, #33 @ 0x21 800e4c6: d0f9 beq.n 800e4bc HAL_Delay(10); 800e4c8: 200a movs r0, #10 800e4ca: f001 f8c3 bl 800f654 // 3. Выполняем программный сброс NVIC_SystemReset(); 800e4ce: f7ff ff25 bl 800e31c <__NVIC_SystemReset> return; // Сюда код уже не дойдет, но для компилятора нxужно case CMD_ISOLATION_STATUS: if (cmd->argument_length == sizeof(IsolationStatusPacket_t)) { 800e4d2: 687b ldr r3, [r7, #4] 800e4d4: 785b ldrb r3, [r3, #1] 800e4d6: 2b09 cmp r3, #9 800e4d8: d10f bne.n 800e4fa memcpy(&ISO, cmd->argument, sizeof(IsolationStatusPacket_t)); 800e4da: 687b ldr r3, [r7, #4] 800e4dc: 685a ldr r2, [r3, #4] 800e4de: 4b19 ldr r3, [pc, #100] @ (800e544 ) 800e4e0: 6810 ldr r0, [r2, #0] 800e4e2: 6851 ldr r1, [r2, #4] 800e4e4: c303 stmia r3!, {r0, r1} 800e4e6: 7a12 ldrb r2, [r2, #8] 800e4e8: 701a strb r2, [r3, #0] // Для однонаправленного UART5 ответ не нужен if (g_sc_command_source == SC_SOURCE_UART5) { 800e4ea: 4b17 ldr r3, [pc, #92] @ (800e548 ) 800e4ec: 781b ldrb r3, [r3, #0] 800e4ee: b2db uxtb r3, r3 800e4f0: 2b01 cmp r3, #1 800e4f2: d00f beq.n 800e514 return; } response_code = RESP_SUCCESS; 800e4f4: 2312 movs r3, #18 800e4f6: 73fb strb r3, [r7, #15] break; 800e4f8: e005 b.n 800e506 } response_code = RESP_FAILED; 800e4fa: 2313 movs r3, #19 800e4fc: 73fb strb r3, [r7, #15] break; 800e4fe: e002 b.n 800e506 default: // Неизвестная команда response_code = RESP_FAILED; 800e500: 2313 movs r3, #19 800e502: 73fb strb r3, [r7, #15] break; 800e504: bf00 nop } // Отправляем финальный ответ (для команд без собственного ответа) SC_SendPacket(NULL, 0, response_code); 800e506: 7bfb ldrb r3, [r7, #15] 800e508: 461a mov r2, r3 800e50a: 2100 movs r1, #0 800e50c: 2000 movs r0, #0 800e50e: f7ff fdaf bl 800e070 800e512: e000 b.n 800e516 return; 800e514: bf00 nop } 800e516: 3710 adds r7, #16 800e518: 46bd mov sp, r7 800e51a: bd80 pop {r7, pc} 800e51c: 20001198 .word 0x20001198 800e520: 200011f0 .word 0x200011f0 800e524: 20000078 .word 0x20000078 800e528: 20001200 .word 0x20001200 800e52c: 08018f38 .word 0x08018f38 800e530: 2000092c .word 0x2000092c 800e534: 08018f4c .word 0x08018f4c 800e538: 200003b0 .word 0x200003b0 800e53c: 08018f60 .word 0x08018f60 800e540: 20001328 .word 0x20001328 800e544: 2000006c .word 0x2000006c 800e548: 2000118c .word 0x2000118c 0800e54c : // Колбэк для заполнения данных мониторинга static void monitoring_data_callback(void) { 800e54c: b580 push {r7, lr} 800e54e: af00 add r7, sp, #0 // Информация о зарядной сессии statusPacket.SOC = CONN.SOC; 800e550: 4b8d ldr r3, [pc, #564] @ (800e788 ) 800e552: 789a ldrb r2, [r3, #2] 800e554: 4b8d ldr r3, [pc, #564] @ (800e78c ) 800e556: 709a strb r2, [r3, #2] statusPacket.Energy = CONN.Energy; 800e558: 4b8b ldr r3, [pc, #556] @ (800e788 ) 800e55a: f8d3 3007 ldr.w r3, [r3, #7] 800e55e: 4a8b ldr r2, [pc, #556] @ (800e78c ) 800e560: f8c2 3003 str.w r3, [r2, #3] statusPacket.RequestedVoltage = CONN.RequestedVoltage; 800e564: 4b88 ldr r3, [pc, #544] @ (800e788 ) 800e566: f8b3 300f ldrh.w r3, [r3, #15] 800e56a: b29a uxth r2, r3 800e56c: 4b87 ldr r3, [pc, #540] @ (800e78c ) 800e56e: f8a3 2007 strh.w r2, [r3, #7] statusPacket.RequestedCurrent = CONN.WantedCurrent; 800e572: 4b85 ldr r3, [pc, #532] @ (800e788 ) 800e574: f8b3 301b ldrh.w r3, [r3, #27] 800e578: b29a uxth r2, r3 800e57a: 4b84 ldr r3, [pc, #528] @ (800e78c ) 800e57c: f8a3 2009 strh.w r2, [r3, #9] statusPacket.MeasuredVoltage = CONN.MeasuredVoltage; 800e580: 4b81 ldr r3, [pc, #516] @ (800e788 ) 800e582: f8b3 3013 ldrh.w r3, [r3, #19] 800e586: b29a uxth r2, r3 800e588: 4b80 ldr r3, [pc, #512] @ (800e78c ) 800e58a: f8a3 200b strh.w r2, [r3, #11] statusPacket.MeasuredCurrent = CONN.MeasuredCurrent; 800e58e: 4b7e ldr r3, [pc, #504] @ (800e788 ) 800e590: f8b3 3015 ldrh.w r3, [r3, #21] 800e594: b29a uxth r2, r3 800e596: 4b7d ldr r3, [pc, #500] @ (800e78c ) 800e598: f8a3 200d strh.w r2, [r3, #13] statusPacket.outputEnabled = CONN.outputEnabled; 800e59c: 4b7a ldr r3, [pc, #488] @ (800e788 ) 800e59e: 7e1a ldrb r2, [r3, #24] 800e5a0: 4b7a ldr r3, [pc, #488] @ (800e78c ) 800e5a2: 73da strb r2, [r3, #15] statusPacket.chargingError = CONN.chargingError; 800e5a4: 4b78 ldr r3, [pc, #480] @ (800e788 ) 800e5a6: 7f5a ldrb r2, [r3, #29] 800e5a8: 4b78 ldr r3, [pc, #480] @ (800e78c ) 800e5aa: 705a strb r2, [r3, #1] statusPacket.connState = CONN.connState; 800e5ac: 4b76 ldr r3, [pc, #472] @ (800e788 ) 800e5ae: 785a ldrb r2, [r3, #1] 800e5b0: 4b76 ldr r3, [pc, #472] @ (800e78c ) 800e5b2: 701a strb r2, [r3, #0] CONN_GetElapsedForMonitoring( 800e5b4: 4976 ldr r1, [pc, #472] @ (800e790 ) 800e5b6: 4877 ldr r0, [pc, #476] @ (800e794 ) 800e5b8: f7fb fcde bl 8009f78 &statusPacket.chargingElapsedTimeMin, &statusPacket.chargingElapsedTimeSec); statusPacket.estimatedRemainingChargingTime = 0; 800e5bc: 4b73 ldr r3, [pc, #460] @ (800e78c ) 800e5be: 2200 movs r2, #0 800e5c0: 74da strb r2, [r3, #19] 800e5c2: 2200 movs r2, #0 800e5c4: 751a strb r2, [r3, #20] // состояние зарядной станции statusPacket.relayAC = RELAY_Read(RELAY_AC); 800e5c6: 2004 movs r0, #4 800e5c8: f7fb f966 bl 8009898 800e5cc: 4603 mov r3, r0 800e5ce: f003 0301 and.w r3, r3, #1 800e5d2: b2d9 uxtb r1, r3 800e5d4: 4a6d ldr r2, [pc, #436] @ (800e78c ) 800e5d6: 7d53 ldrb r3, [r2, #21] 800e5d8: f361 0300 bfi r3, r1, #0, #1 800e5dc: 7553 strb r3, [r2, #21] statusPacket.relayDC = RELAY_Read(RELAY_DC); 800e5de: 2003 movs r0, #3 800e5e0: f7fb f95a bl 8009898 800e5e4: 4603 mov r3, r0 800e5e6: f003 0301 and.w r3, r3, #1 800e5ea: b2d9 uxtb r1, r3 800e5ec: 4a67 ldr r2, [pc, #412] @ (800e78c ) 800e5ee: 7d53 ldrb r3, [r2, #21] 800e5f0: f361 0341 bfi r3, r1, #1, #1 800e5f4: 7553 strb r3, [r2, #21] statusPacket.relayAUX = RELAY_Read(RELAY_AUX0); 800e5f6: 2000 movs r0, #0 800e5f8: f7fb f94e bl 8009898 800e5fc: 4603 mov r3, r0 800e5fe: f003 0301 and.w r3, r3, #1 800e602: b2d9 uxtb r1, r3 800e604: 4a61 ldr r2, [pc, #388] @ (800e78c ) 800e606: 7d53 ldrb r3, [r2, #21] 800e608: f361 0382 bfi r3, r1, #2, #1 800e60c: 7553 strb r3, [r2, #21] statusPacket.lockState = 0; 800e60e: 4a5f ldr r2, [pc, #380] @ (800e78c ) 800e610: 7d53 ldrb r3, [r2, #21] 800e612: f023 0308 bic.w r3, r3, #8 800e616: 7553 strb r3, [r2, #21] statusPacket.stopButton = !IN_ReadInput(IN_ESTOP); 800e618: 2003 movs r0, #3 800e61a: f7fb f94d bl 80098b8 800e61e: 4603 mov r3, r0 800e620: 2b00 cmp r3, #0 800e622: bf0c ite eq 800e624: 2301 moveq r3, #1 800e626: 2300 movne r3, #0 800e628: b2d9 uxtb r1, r3 800e62a: 4a58 ldr r2, [pc, #352] @ (800e78c ) 800e62c: 7d53 ldrb r3, [r2, #21] 800e62e: f361 1304 bfi r3, r1, #4, #1 800e632: 7553 strb r3, [r2, #21] statusPacket.logAvailable = (debug_buffer_available()>0)?1:0; 800e634: f7fb ff92 bl 800a55c 800e638: 4603 mov r3, r0 800e63a: 2b00 cmp r3, #0 800e63c: bf14 ite ne 800e63e: 2301 movne r3, #1 800e640: 2300 moveq r3, #0 800e642: b2d9 uxtb r1, r3 800e644: 4a51 ldr r2, [pc, #324] @ (800e78c ) 800e646: 7d53 ldrb r3, [r2, #21] 800e648: f361 1345 bfi r3, r1, #5, #1 800e64c: 7553 strb r3, [r2, #21] statusPacket.evInfoAvailable = 0; 800e64e: 4a4f ldr r2, [pc, #316] @ (800e78c ) 800e650: 7d53 ldrb r3, [r2, #21] 800e652: f023 0340 bic.w r3, r3, #64 @ 0x40 800e656: 7553 strb r3, [r2, #21] statusPacket.psuOnline = PSU0.online; 800e658: 4b4f ldr r3, [pc, #316] @ (800e798 ) 800e65a: 7a1b ldrb r3, [r3, #8] 800e65c: f003 0301 and.w r3, r3, #1 800e660: b2d9 uxtb r1, r3 800e662: 4a4a ldr r2, [pc, #296] @ (800e78c ) 800e664: 7d53 ldrb r3, [r2, #21] 800e666: f361 13c7 bfi r3, r1, #7, #1 800e66a: 7553 strb r3, [r2, #21] statusPacket.tempConnector0 = CONN_ReadTemp(0); // температура коннектора 800e66c: 2000 movs r0, #0 800e66e: f7fb fa49 bl 8009b04 800e672: 4603 mov r3, r0 800e674: b25a sxtb r2, r3 800e676: 4b45 ldr r3, [pc, #276] @ (800e78c ) 800e678: 765a strb r2, [r3, #25] statusPacket.tempConnector1 = CONN_ReadTemp(1); 800e67a: 2001 movs r0, #1 800e67c: f7fb fa42 bl 8009b04 800e680: 4603 mov r3, r0 800e682: b25a sxtb r2, r3 800e684: 4b41 ldr r3, [pc, #260] @ (800e78c ) 800e686: 769a strb r2, [r3, #26] statusPacket.tempAmbient = PSU0.tempAmbient; // температура окружающего воздуха 800e688: 4b43 ldr r3, [pc, #268] @ (800e798 ) 800e68a: 699b ldr r3, [r3, #24] 800e68c: b25a sxtb r2, r3 800e68e: 4b3f ldr r3, [pc, #252] @ (800e78c ) 800e690: 76da strb r2, [r3, #27] statusPacket.tempBatteryMax = 0; 800e692: 4b3e ldr r3, [pc, #248] @ (800e78c ) 800e694: 2200 movs r2, #0 800e696: 771a strb r2, [r3, #28] statusPacket.tempBatteryMin = 0; 800e698: 4b3c ldr r3, [pc, #240] @ (800e78c ) 800e69a: 2200 movs r2, #0 800e69c: 775a strb r2, [r3, #29] statusPacket.highestVoltageOfBatteryCell = 0; 800e69e: 4b3b ldr r3, [pc, #236] @ (800e78c ) 800e6a0: 2200 movs r2, #0 800e6a2: 779a strb r2, [r3, #30] 800e6a4: 2200 movs r2, #0 800e6a6: 77da strb r2, [r3, #31] statusPacket.batteryStatus = 0; 800e6a8: 4b38 ldr r3, [pc, #224] @ (800e78c ) 800e6aa: 2200 movs r2, #0 800e6ac: f883 2020 strb.w r2, [r3, #32] statusPacket.phaseVoltageAB = PSU_06.VAB; 800e6b0: 4b3a ldr r3, [pc, #232] @ (800e79c ) 800e6b2: 689b ldr r3, [r3, #8] 800e6b4: b29a uxth r2, r3 800e6b6: 4b35 ldr r3, [pc, #212] @ (800e78c ) 800e6b8: f8a3 2021 strh.w r2, [r3, #33] @ 0x21 statusPacket.phaseVoltageBC = PSU_06.VBC; 800e6bc: 4b37 ldr r3, [pc, #220] @ (800e79c ) 800e6be: 68db ldr r3, [r3, #12] 800e6c0: b29a uxth r2, r3 800e6c2: 4b32 ldr r3, [pc, #200] @ (800e78c ) 800e6c4: f8a3 2023 strh.w r2, [r3, #35] @ 0x23 statusPacket.phaseVoltageCA = PSU_06.VCA; 800e6c8: 4b34 ldr r3, [pc, #208] @ (800e79c ) 800e6ca: 691b ldr r3, [r3, #16] 800e6cc: b29a uxth r2, r3 800e6ce: 4b2f ldr r3, [pc, #188] @ (800e78c ) 800e6d0: f8a3 2025 strh.w r2, [r3, #37] @ 0x25 // GBT TODO memset(statusPacket.VIN, 0, sizeof(statusPacket.VIN)); 800e6d4: 2211 movs r2, #17 800e6d6: 2100 movs r1, #0 800e6d8: 4831 ldr r0, [pc, #196] @ (800e7a0 ) 800e6da: f007 fcaf bl 801603c // GBT TODO statusPacket.batteryType = 0; 800e6de: 4b2b ldr r3, [pc, #172] @ (800e78c ) 800e6e0: 2200 movs r2, #0 800e6e2: f883 2038 strb.w r2, [r3, #56] @ 0x38 statusPacket.batteryCapacity = 0; 800e6e6: 4b29 ldr r3, [pc, #164] @ (800e78c ) 800e6e8: 2200 movs r2, #0 800e6ea: f883 2039 strb.w r2, [r3, #57] @ 0x39 800e6ee: 2200 movs r2, #0 800e6f0: f883 203a strb.w r2, [r3, #58] @ 0x3a statusPacket.batteryVoltage = 0; 800e6f4: 4b25 ldr r3, [pc, #148] @ (800e78c ) 800e6f6: 2200 movs r2, #0 800e6f8: f883 203b strb.w r2, [r3, #59] @ 0x3b 800e6fc: 2200 movs r2, #0 800e6fe: f883 203c strb.w r2, [r3, #60] @ 0x3c memset(statusPacket.batteryVendor, 0, sizeof(statusPacket.batteryVendor)); 800e702: 2204 movs r2, #4 800e704: 2100 movs r1, #0 800e706: 4827 ldr r0, [pc, #156] @ (800e7a4 ) 800e708: f007 fc98 bl 801603c statusPacket.batterySN = 0; 800e70c: 4b1f ldr r3, [pc, #124] @ (800e78c ) 800e70e: 2200 movs r2, #0 800e710: f883 2041 strb.w r2, [r3, #65] @ 0x41 800e714: 2200 movs r2, #0 800e716: f883 2042 strb.w r2, [r3, #66] @ 0x42 800e71a: 2200 movs r2, #0 800e71c: f883 2043 strb.w r2, [r3, #67] @ 0x43 800e720: 2200 movs r2, #0 800e722: f883 2044 strb.w r2, [r3, #68] @ 0x44 statusPacket.batteryManuD = 0; 800e726: 4b19 ldr r3, [pc, #100] @ (800e78c ) 800e728: 2200 movs r2, #0 800e72a: f883 2047 strb.w r2, [r3, #71] @ 0x47 statusPacket.batteryManuM = 0; 800e72e: 4b17 ldr r3, [pc, #92] @ (800e78c ) 800e730: 2200 movs r2, #0 800e732: f883 2046 strb.w r2, [r3, #70] @ 0x46 statusPacket.batteryManuY = 0; 800e736: 4b15 ldr r3, [pc, #84] @ (800e78c ) 800e738: 2200 movs r2, #0 800e73a: f883 2045 strb.w r2, [r3, #69] @ 0x45 statusPacket.batteryCycleCount = 0; 800e73e: 4b13 ldr r3, [pc, #76] @ (800e78c ) 800e740: 2200 movs r2, #0 800e742: f883 2048 strb.w r2, [r3, #72] @ 0x48 800e746: 2200 movs r2, #0 800e748: f883 2049 strb.w r2, [r3, #73] @ 0x49 statusPacket.ownAuto = 0; 800e74c: 4b0f ldr r3, [pc, #60] @ (800e78c ) 800e74e: 2200 movs r2, #0 800e750: f883 204a strb.w r2, [r3, #74] @ 0x4a memset(statusPacket.EV_SW_VER, 0, sizeof(statusPacket.EV_SW_VER)); 800e754: 2208 movs r2, #8 800e756: 2100 movs r1, #0 800e758: 4813 ldr r0, [pc, #76] @ (800e7a8 ) 800e75a: f007 fc6f bl 801603c statusPacket.testMode = 0; 800e75e: 4b0b ldr r3, [pc, #44] @ (800e78c ) 800e760: 2200 movs r2, #0 800e762: f883 2053 strb.w r2, [r3, #83] @ 0x53 statusPacket.testVoltage = 0; 800e766: 4b09 ldr r3, [pc, #36] @ (800e78c ) 800e768: 2200 movs r2, #0 800e76a: f883 2054 strb.w r2, [r3, #84] @ 0x54 800e76e: 2200 movs r2, #0 800e770: f883 2055 strb.w r2, [r3, #85] @ 0x55 statusPacket.testCurrent = 0; 800e774: 4b05 ldr r3, [pc, #20] @ (800e78c ) 800e776: 2200 movs r2, #0 800e778: f883 2056 strb.w r2, [r3, #86] @ 0x56 800e77c: 2200 movs r2, #0 800e77e: f883 2057 strb.w r2, [r3, #87] @ 0x57 // В debug.c есть CONN_SetState, предполагаем наличие CONN_GetState() // Если такой функции нет, закомментируйте следующую строку: // statusPacket.connState = CONN_GetState(); } 800e782: bf00 nop 800e784: bd80 pop {r7, pc} 800e786: bf00 nop 800e788: 200003b0 .word 0x200003b0 800e78c: 20001198 .word 0x20001198 800e790: 200011aa .word 0x200011aa 800e794: 200011a8 .word 0x200011a8 800e798: 2000092c .word 0x2000092c 800e79c: 20000900 .word 0x20000900 800e7a0: 200011bf .word 0x200011bf 800e7a4: 200011d5 .word 0x200011d5 800e7a8: 200011e3 .word 0x200011e3 0800e7ac : #include "sma_filter.h" void SMAFilter_Init(SMAFilter_t* f) { 800e7ac: b480 push {r7} 800e7ae: b085 sub sp, #20 800e7b0: af00 add r7, sp, #0 800e7b2: 6078 str r0, [r7, #4] if (f == 0) return; 800e7b4: 687b ldr r3, [r7, #4] 800e7b6: 2b00 cmp r3, #0 800e7b8: d018 beq.n 800e7ec f->sum = 0; 800e7ba: 687b ldr r3, [r7, #4] 800e7bc: 2200 movs r2, #0 800e7be: 601a str r2, [r3, #0] f->idx = 0; 800e7c0: 687b ldr r3, [r7, #4] 800e7c2: 2200 movs r2, #0 800e7c4: 809a strh r2, [r3, #4] f->count = 0; 800e7c6: 687b ldr r3, [r7, #4] 800e7c8: 2200 movs r2, #0 800e7ca: 80da strh r2, [r3, #6] for (uint16_t i = 0; i < SMA_FILTER_WINDOW; i++) { 800e7cc: 2300 movs r3, #0 800e7ce: 81fb strh r3, [r7, #14] 800e7d0: e008 b.n 800e7e4 f->buffer[i] = 0; 800e7d2: 89fa ldrh r2, [r7, #14] 800e7d4: 687b ldr r3, [r7, #4] 800e7d6: 3202 adds r2, #2 800e7d8: 2100 movs r1, #0 800e7da: f843 1022 str.w r1, [r3, r2, lsl #2] for (uint16_t i = 0; i < SMA_FILTER_WINDOW; i++) { 800e7de: 89fb ldrh r3, [r7, #14] 800e7e0: 3301 adds r3, #1 800e7e2: 81fb strh r3, [r7, #14] 800e7e4: 89fb ldrh r3, [r7, #14] 800e7e6: 2b07 cmp r3, #7 800e7e8: d9f3 bls.n 800e7d2 800e7ea: e000 b.n 800e7ee if (f == 0) return; 800e7ec: bf00 nop } } 800e7ee: 3714 adds r7, #20 800e7f0: 46bd mov sp, r7 800e7f2: bc80 pop {r7} 800e7f4: 4770 bx lr 0800e7f6 : int32_t SMAFilter_Update(SMAFilter_t* f, int32_t x) { 800e7f6: b480 push {r7} 800e7f8: b085 sub sp, #20 800e7fa: af00 add r7, sp, #0 800e7fc: 6078 str r0, [r7, #4] 800e7fe: 6039 str r1, [r7, #0] if (f == 0) return x; 800e800: 687b ldr r3, [r7, #4] 800e802: 2b00 cmp r3, #0 800e804: d101 bne.n 800e80a 800e806: 683b ldr r3, [r7, #0] 800e808: e056 b.n 800e8b8 // Пока окно не заполнено полностью, делим по фактическому count. if (f->count < SMA_FILTER_WINDOW) { 800e80a: 687b ldr r3, [r7, #4] 800e80c: 88db ldrh r3, [r3, #6] 800e80e: 2b07 cmp r3, #7 800e810: d827 bhi.n 800e862 f->buffer[f->idx] = x; 800e812: 687b ldr r3, [r7, #4] 800e814: 889b ldrh r3, [r3, #4] 800e816: 461a mov r2, r3 800e818: 687b ldr r3, [r7, #4] 800e81a: 3202 adds r2, #2 800e81c: 6839 ldr r1, [r7, #0] 800e81e: f843 1022 str.w r1, [r3, r2, lsl #2] f->sum += x; 800e822: 687b ldr r3, [r7, #4] 800e824: 681a ldr r2, [r3, #0] 800e826: 683b ldr r3, [r7, #0] 800e828: 441a add r2, r3 800e82a: 687b ldr r3, [r7, #4] 800e82c: 601a str r2, [r3, #0] f->idx++; 800e82e: 687b ldr r3, [r7, #4] 800e830: 889b ldrh r3, [r3, #4] 800e832: 3301 adds r3, #1 800e834: b29a uxth r2, r3 800e836: 687b ldr r3, [r7, #4] 800e838: 809a strh r2, [r3, #4] if (f->idx >= SMA_FILTER_WINDOW) f->idx = 0; 800e83a: 687b ldr r3, [r7, #4] 800e83c: 889b ldrh r3, [r3, #4] 800e83e: 2b07 cmp r3, #7 800e840: d902 bls.n 800e848 800e842: 687b ldr r3, [r7, #4] 800e844: 2200 movs r2, #0 800e846: 809a strh r2, [r3, #4] f->count++; 800e848: 687b ldr r3, [r7, #4] 800e84a: 88db ldrh r3, [r3, #6] 800e84c: 3301 adds r3, #1 800e84e: b29a uxth r2, r3 800e850: 687b ldr r3, [r7, #4] 800e852: 80da strh r2, [r3, #6] return (int32_t)(f->sum / (int32_t)f->count); 800e854: 687b ldr r3, [r7, #4] 800e856: 681b ldr r3, [r3, #0] 800e858: 687a ldr r2, [r7, #4] 800e85a: 88d2 ldrh r2, [r2, #6] 800e85c: fb93 f3f2 sdiv r3, r3, r2 800e860: e02a b.n 800e8b8 } // Окно заполнено: "вычитаем старое + добавляем новое". int32_t old = f->buffer[f->idx]; 800e862: 687b ldr r3, [r7, #4] 800e864: 889b ldrh r3, [r3, #4] 800e866: 461a mov r2, r3 800e868: 687b ldr r3, [r7, #4] 800e86a: 3202 adds r2, #2 800e86c: f853 3022 ldr.w r3, [r3, r2, lsl #2] 800e870: 60fb str r3, [r7, #12] f->buffer[f->idx] = x; 800e872: 687b ldr r3, [r7, #4] 800e874: 889b ldrh r3, [r3, #4] 800e876: 461a mov r2, r3 800e878: 687b ldr r3, [r7, #4] 800e87a: 3202 adds r2, #2 800e87c: 6839 ldr r1, [r7, #0] 800e87e: f843 1022 str.w r1, [r3, r2, lsl #2] f->sum += (x - old); 800e882: 687b ldr r3, [r7, #4] 800e884: 681a ldr r2, [r3, #0] 800e886: 6839 ldr r1, [r7, #0] 800e888: 68fb ldr r3, [r7, #12] 800e88a: 1acb subs r3, r1, r3 800e88c: 441a add r2, r3 800e88e: 687b ldr r3, [r7, #4] 800e890: 601a str r2, [r3, #0] f->idx++; 800e892: 687b ldr r3, [r7, #4] 800e894: 889b ldrh r3, [r3, #4] 800e896: 3301 adds r3, #1 800e898: b29a uxth r2, r3 800e89a: 687b ldr r3, [r7, #4] 800e89c: 809a strh r2, [r3, #4] if (f->idx >= SMA_FILTER_WINDOW) f->idx = 0; 800e89e: 687b ldr r3, [r7, #4] 800e8a0: 889b ldrh r3, [r3, #4] 800e8a2: 2b07 cmp r3, #7 800e8a4: d902 bls.n 800e8ac 800e8a6: 687b ldr r3, [r7, #4] 800e8a8: 2200 movs r2, #0 800e8aa: 809a strh r2, [r3, #4] return (int32_t)(f->sum / (int32_t)SMA_FILTER_WINDOW); 800e8ac: 687b ldr r3, [r7, #4] 800e8ae: 681b ldr r3, [r3, #0] 800e8b0: 2b00 cmp r3, #0 800e8b2: da00 bge.n 800e8b6 800e8b4: 3307 adds r3, #7 800e8b6: 10db asrs r3, r3, #3 } 800e8b8: 4618 mov r0, r3 800e8ba: 3714 adds r7, #20 800e8bc: 46bd mov sp, r7 800e8be: bc80 pop {r7} 800e8c0: 4770 bx lr ... 0800e8c4 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 800e8c4: b480 push {r7} 800e8c6: b085 sub sp, #20 800e8c8: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800e8ca: 4b15 ldr r3, [pc, #84] @ (800e920 ) 800e8cc: 699b ldr r3, [r3, #24] 800e8ce: 4a14 ldr r2, [pc, #80] @ (800e920 ) 800e8d0: f043 0301 orr.w r3, r3, #1 800e8d4: 6193 str r3, [r2, #24] 800e8d6: 4b12 ldr r3, [pc, #72] @ (800e920 ) 800e8d8: 699b ldr r3, [r3, #24] 800e8da: f003 0301 and.w r3, r3, #1 800e8de: 60bb str r3, [r7, #8] 800e8e0: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 800e8e2: 4b0f ldr r3, [pc, #60] @ (800e920 ) 800e8e4: 69db ldr r3, [r3, #28] 800e8e6: 4a0e ldr r2, [pc, #56] @ (800e920 ) 800e8e8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 800e8ec: 61d3 str r3, [r2, #28] 800e8ee: 4b0c ldr r3, [pc, #48] @ (800e920 ) 800e8f0: 69db ldr r3, [r3, #28] 800e8f2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800e8f6: 607b str r3, [r7, #4] 800e8f8: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800e8fa: 4b0a ldr r3, [pc, #40] @ (800e924 ) 800e8fc: 685b ldr r3, [r3, #4] 800e8fe: 60fb str r3, [r7, #12] 800e900: 68fb ldr r3, [r7, #12] 800e902: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 800e906: 60fb str r3, [r7, #12] 800e908: 68fb ldr r3, [r7, #12] 800e90a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 800e90e: 60fb str r3, [r7, #12] 800e910: 4a04 ldr r2, [pc, #16] @ (800e924 ) 800e912: 68fb ldr r3, [r7, #12] 800e914: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800e916: bf00 nop 800e918: 3714 adds r7, #20 800e91a: 46bd mov sp, r7 800e91c: bc80 pop {r7} 800e91e: 4770 bx lr 800e920: 40021000 .word 0x40021000 800e924: 40010000 .word 0x40010000 0800e928 : { /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 800e928: e7fe b.n 800e928 800e92a: bf00 nop 0800e92c : void HardFault_Handler(void) { /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 800e92c: e7fe b.n 800e92c 800e92e: bf00 nop 0800e930 : void MemManage_Handler(void) { /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 800e930: e7fe b.n 800e930 800e932: bf00 nop 0800e934 : void BusFault_Handler(void) { /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 800e934: e7fe b.n 800e934 800e936: bf00 nop 0800e938 : void UsageFault_Handler(void) { /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 800e938: e7fe b.n 800e938 800e93a: bf00 nop 0800e93c : /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 800e93c: 4770 bx lr 800e93e: bf00 nop 0800e940 : /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 800e940: 4770 bx lr 800e942: bf00 nop 0800e944 : /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 800e944: 4770 bx lr 800e946: bf00 nop 0800e948 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 800e948: f000 be68 b.w 800f61c 0800e94c : /** * @brief This function handles DMA1 channel1 global interrupt. */ void DMA1_Channel1_IRQHandler(void) { 800e94c: b510 push {r4, lr} /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_SET); 800e94e: 4c09 ldr r4, [pc, #36] @ (800e974 ) 800e950: 2201 movs r2, #1 800e952: f44f 6100 mov.w r1, #2048 @ 0x800 800e956: 4620 mov r0, r4 800e958: f003 fa09 bl 8011d6e /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 800e95c: 4806 ldr r0, [pc, #24] @ (800e978 ) 800e95e: f002 fdf7 bl 8011550 /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET); 800e962: 4620 mov r0, r4 /* USER CODE END DMA1_Channel1_IRQn 1 */ } 800e964: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET); 800e968: 2200 movs r2, #0 800e96a: f44f 6100 mov.w r1, #2048 @ 0x800 800e96e: f003 b9fe b.w 8011d6e 800e972: bf00 nop 800e974: 40010c00 .word 0x40010c00 800e978: 200002c0 .word 0x200002c0 0800e97c : void DMA1_Channel2_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */ /* USER CODE END DMA1_Channel2_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart3_tx); 800e97c: 4801 ldr r0, [pc, #4] @ (800e984 ) 800e97e: f002 bde7 b.w 8011550 800e982: bf00 nop 800e984: 20001484 .word 0x20001484 0800e988 : void DMA1_Channel3_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel3_IRQn 0 */ /* USER CODE END DMA1_Channel3_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart3_rx); 800e988: 4801 ldr r0, [pc, #4] @ (800e990 ) 800e98a: f002 bde1 b.w 8011550 800e98e: bf00 nop 800e990: 20001440 .word 0x20001440 0800e994 : void DMA1_Channel6_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel6_IRQn 0 */ /* USER CODE END DMA1_Channel6_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_rx); 800e994: 4801 ldr r0, [pc, #4] @ (800e99c ) 800e996: f002 bddb b.w 8011550 800e99a: bf00 nop 800e99c: 200013b8 .word 0x200013b8 0800e9a0 : void DMA1_Channel7_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel7_IRQn 0 */ /* USER CODE END DMA1_Channel7_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_tx); 800e9a0: 4801 ldr r0, [pc, #4] @ (800e9a8 ) 800e9a2: f002 bdd5 b.w 8011550 800e9a6: bf00 nop 800e9a8: 200013fc .word 0x200013fc 0800e9ac : /** * @brief This function handles ADC1 and ADC2 global interrupts. */ void ADC1_2_IRQHandler(void) { 800e9ac: b510 push {r4, lr} /* USER CODE BEGIN ADC1_2_IRQn 0 */ HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_SET); 800e9ae: 4c09 ldr r4, [pc, #36] @ (800e9d4 ) 800e9b0: 2201 movs r2, #1 800e9b2: f44f 6100 mov.w r1, #2048 @ 0x800 800e9b6: 4620 mov r0, r4 800e9b8: f003 f9d9 bl 8011d6e /* USER CODE END ADC1_2_IRQn 0 */ HAL_ADC_IRQHandler(&hadc1); 800e9bc: 4806 ldr r0, [pc, #24] @ (800e9d8 ) 800e9be: f001 f823 bl 800fa08 /* USER CODE BEGIN ADC1_2_IRQn 1 */ HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET); 800e9c2: 4620 mov r0, r4 /* USER CODE END ADC1_2_IRQn 1 */ } 800e9c4: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET); 800e9c8: 2200 movs r2, #0 800e9ca: f44f 6100 mov.w r1, #2048 @ 0x800 800e9ce: f003 b9ce b.w 8011d6e 800e9d2: bf00 nop 800e9d4: 40010c00 .word 0x40010c00 800e9d8: 20000290 .word 0x20000290 0800e9dc : /** * @brief This function handles CAN1 RX0 interrupt. */ void CAN1_RX0_IRQHandler(void) { 800e9dc: b510 push {r4, lr} /* USER CODE BEGIN CAN1_RX0_IRQn 0 */ HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_SET); 800e9de: 4c09 ldr r4, [pc, #36] @ (800ea04 ) 800e9e0: 2201 movs r2, #1 800e9e2: f44f 6180 mov.w r1, #1024 @ 0x400 800e9e6: 4620 mov r0, r4 800e9e8: f003 f9c1 bl 8011d6e /* USER CODE END CAN1_RX0_IRQn 0 */ HAL_CAN_IRQHandler(&hcan1); 800e9ec: 4806 ldr r0, [pc, #24] @ (800ea08 ) 800e9ee: f002 f847 bl 8010a80 /* USER CODE BEGIN CAN1_RX0_IRQn 1 */ HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET); 800e9f2: 4620 mov r0, r4 /* USER CODE END CAN1_RX0_IRQn 1 */ } 800e9f4: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET); 800e9f8: 2200 movs r2, #0 800e9fa: f44f 6180 mov.w r1, #1024 @ 0x400 800e9fe: f003 b9b6 b.w 8011d6e 800ea02: bf00 nop 800ea04: 40010c00 .word 0x40010c00 800ea08: 2000035c .word 0x2000035c 0800ea0c : /** * @brief This function handles TIM3 global interrupt. */ void TIM3_IRQHandler(void) { 800ea0c: b510 push {r4, lr} /* USER CODE BEGIN TIM3_IRQn 0 */ HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_SET); 800ea0e: 4c09 ldr r4, [pc, #36] @ (800ea34 ) 800ea10: 2201 movs r2, #1 800ea12: f44f 6100 mov.w r1, #2048 @ 0x800 800ea16: 4620 mov r0, r4 800ea18: f003 f9a9 bl 8011d6e /* USER CODE END TIM3_IRQn 0 */ HAL_TIM_IRQHandler(&htim3); 800ea1c: 4806 ldr r0, [pc, #24] @ (800ea38 ) 800ea1e: f004 fd87 bl 8013530 /* USER CODE BEGIN TIM3_IRQn 1 */ HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET); 800ea22: 4620 mov r0, r4 /* USER CODE END TIM3_IRQn 1 */ } 800ea24: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET); 800ea28: 2200 movs r2, #0 800ea2a: f44f 6100 mov.w r1, #2048 @ 0x800 800ea2e: f003 b99e b.w 8011d6e 800ea32: bf00 nop 800ea34: 40010c00 .word 0x40010c00 800ea38: 20001208 .word 0x20001208 0800ea3c : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 800ea3c: 4801 ldr r0, [pc, #4] @ (800ea44 ) 800ea3e: f005 be2d b.w 801469c 800ea42: bf00 nop 800ea44: 200012e0 .word 0x200012e0 0800ea48 : /** * @brief This function handles USART2 global interrupt. */ void USART2_IRQHandler(void) { 800ea48: b510 push {r4, lr} /* USER CODE BEGIN USART2_IRQn 0 */ HAL_GPIO_WritePin(DBG2_GPIO_Port, DBG2_Pin, GPIO_PIN_SET); 800ea4a: 4c08 ldr r4, [pc, #32] @ (800ea6c ) 800ea4c: 2201 movs r2, #1 800ea4e: 2120 movs r1, #32 800ea50: 4620 mov r0, r4 800ea52: f003 f98c bl 8011d6e /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 800ea56: 4806 ldr r0, [pc, #24] @ (800ea70 ) 800ea58: f005 fe20 bl 801469c /* USER CODE BEGIN USART2_IRQn 1 */ HAL_GPIO_WritePin(DBG2_GPIO_Port, DBG2_Pin, GPIO_PIN_RESET); 800ea5c: 4620 mov r0, r4 /* USER CODE END USART2_IRQn 1 */ } 800ea5e: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(DBG2_GPIO_Port, DBG2_Pin, GPIO_PIN_RESET); 800ea62: 2200 movs r2, #0 800ea64: 2120 movs r1, #32 800ea66: f003 b982 b.w 8011d6e 800ea6a: bf00 nop 800ea6c: 40010800 .word 0x40010800 800ea70: 20001328 .word 0x20001328 0800ea74 : /** * @brief This function handles USART3 global interrupt. */ void USART3_IRQHandler(void) { 800ea74: b510 push {r4, lr} /* USER CODE BEGIN USART3_IRQn 0 */ HAL_GPIO_WritePin(DBG3_GPIO_Port, DBG3_Pin, GPIO_PIN_SET); 800ea76: 4c08 ldr r4, [pc, #32] @ (800ea98 ) 800ea78: 2201 movs r2, #1 800ea7a: 2140 movs r1, #64 @ 0x40 800ea7c: 4620 mov r0, r4 800ea7e: f003 f976 bl 8011d6e /* USER CODE END USART3_IRQn 0 */ HAL_UART_IRQHandler(&huart3); 800ea82: 4806 ldr r0, [pc, #24] @ (800ea9c ) 800ea84: f005 fe0a bl 801469c /* USER CODE BEGIN USART3_IRQn 1 */ HAL_GPIO_WritePin(DBG3_GPIO_Port, DBG3_Pin, GPIO_PIN_RESET); 800ea88: 4620 mov r0, r4 /* USER CODE END USART3_IRQn 1 */ } 800ea8a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(DBG3_GPIO_Port, DBG3_Pin, GPIO_PIN_RESET); 800ea8e: 2200 movs r2, #0 800ea90: 2140 movs r1, #64 @ 0x40 800ea92: f003 b96c b.w 8011d6e 800ea96: bf00 nop 800ea98: 40010800 .word 0x40010800 800ea9c: 20001370 .word 0x20001370 0800eaa0 : /** * @brief This function handles UART5 global interrupt. */ void UART5_IRQHandler(void) { 800eaa0: b510 push {r4, lr} /* USER CODE BEGIN UART5_IRQn 0 */ HAL_GPIO_WritePin(DBG1_GPIO_Port, DBG1_Pin, GPIO_PIN_SET); 800eaa2: 4c08 ldr r4, [pc, #32] @ (800eac4 ) 800eaa4: 2201 movs r2, #1 800eaa6: 2104 movs r1, #4 800eaa8: 4620 mov r0, r4 800eaaa: f003 f960 bl 8011d6e /* USER CODE END UART5_IRQn 0 */ HAL_UART_IRQHandler(&huart5); 800eaae: 4806 ldr r0, [pc, #24] @ (800eac8 ) 800eab0: f005 fdf4 bl 801469c /* USER CODE BEGIN UART5_IRQn 1 */ HAL_GPIO_WritePin(DBG1_GPIO_Port, DBG1_Pin, GPIO_PIN_RESET); 800eab4: 4620 mov r0, r4 /* USER CODE END UART5_IRQn 1 */ } 800eab6: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(DBG1_GPIO_Port, DBG1_Pin, GPIO_PIN_RESET); 800eaba: 2200 movs r2, #0 800eabc: 2104 movs r1, #4 800eabe: f003 b956 b.w 8011d6e 800eac2: bf00 nop 800eac4: 40011000 .word 0x40011000 800eac8: 20001298 .word 0x20001298 0800eacc : /** * @brief This function handles CAN2 TX interrupt. */ void CAN2_TX_IRQHandler(void) { 800eacc: b510 push {r4, lr} /* USER CODE BEGIN CAN2_TX_IRQn 0 */ HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_SET); 800eace: 4c09 ldr r4, [pc, #36] @ (800eaf4 ) 800ead0: 2201 movs r2, #1 800ead2: f44f 6180 mov.w r1, #1024 @ 0x400 800ead6: 4620 mov r0, r4 800ead8: f003 f949 bl 8011d6e /* USER CODE END CAN2_TX_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 800eadc: 4806 ldr r0, [pc, #24] @ (800eaf8 ) 800eade: f001 ffcf bl 8010a80 /* USER CODE BEGIN CAN2_TX_IRQn 1 */ HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET); 800eae2: 4620 mov r0, r4 /* USER CODE END CAN2_TX_IRQn 1 */ } 800eae4: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET); 800eae8: 2200 movs r2, #0 800eaea: f44f 6180 mov.w r1, #1024 @ 0x400 800eaee: f003 b93e b.w 8011d6e 800eaf2: bf00 nop 800eaf4: 40010c00 .word 0x40010c00 800eaf8: 20000384 .word 0x20000384 0800eafc : /** * @brief This function handles CAN2 RX1 interrupt. */ void CAN2_RX1_IRQHandler(void) { 800eafc: b510 push {r4, lr} /* USER CODE BEGIN CAN2_RX1_IRQn 0 */ HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_SET); 800eafe: 4c09 ldr r4, [pc, #36] @ (800eb24 ) 800eb00: 2201 movs r2, #1 800eb02: f44f 6180 mov.w r1, #1024 @ 0x400 800eb06: 4620 mov r0, r4 800eb08: f003 f931 bl 8011d6e /* USER CODE END CAN2_RX1_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 800eb0c: 4806 ldr r0, [pc, #24] @ (800eb28 ) 800eb0e: f001 ffb7 bl 8010a80 /* USER CODE BEGIN CAN2_RX1_IRQn 1 */ HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET); 800eb12: 4620 mov r0, r4 /* USER CODE END CAN2_RX1_IRQn 1 */ } 800eb14: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET); 800eb18: 2200 movs r2, #0 800eb1a: f44f 6180 mov.w r1, #1024 @ 0x400 800eb1e: f003 b926 b.w 8011d6e 800eb22: bf00 nop 800eb24: 40010c00 .word 0x40010c00 800eb28: 20000384 .word 0x20000384 0800eb2c <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 800eb2c: b480 push {r7} 800eb2e: af00 add r7, sp, #0 return 1; 800eb30: 2301 movs r3, #1 } 800eb32: 4618 mov r0, r3 800eb34: 46bd mov sp, r7 800eb36: bc80 pop {r7} 800eb38: 4770 bx lr 0800eb3a <_kill>: int _kill(int pid, int sig) { 800eb3a: b580 push {r7, lr} 800eb3c: b082 sub sp, #8 800eb3e: af00 add r7, sp, #0 800eb40: 6078 str r0, [r7, #4] 800eb42: 6039 str r1, [r7, #0] (void)pid; (void)sig; errno = EINVAL; 800eb44: f007 facc bl 80160e0 <__errno> 800eb48: 4603 mov r3, r0 800eb4a: 2216 movs r2, #22 800eb4c: 601a str r2, [r3, #0] return -1; 800eb4e: f04f 33ff mov.w r3, #4294967295 } 800eb52: 4618 mov r0, r3 800eb54: 3708 adds r7, #8 800eb56: 46bd mov sp, r7 800eb58: bd80 pop {r7, pc} 0800eb5a <_exit>: void _exit (int status) { 800eb5a: b580 push {r7, lr} 800eb5c: b082 sub sp, #8 800eb5e: af00 add r7, sp, #0 800eb60: 6078 str r0, [r7, #4] _kill(status, -1); 800eb62: f04f 31ff mov.w r1, #4294967295 800eb66: 6878 ldr r0, [r7, #4] 800eb68: f7ff ffe7 bl 800eb3a <_kill> while (1) {} /* Make sure we hang here */ 800eb6c: bf00 nop 800eb6e: e7fd b.n 800eb6c <_exit+0x12> 0800eb70 <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 800eb70: b580 push {r7, lr} 800eb72: b086 sub sp, #24 800eb74: af00 add r7, sp, #0 800eb76: 60f8 str r0, [r7, #12] 800eb78: 60b9 str r1, [r7, #8] 800eb7a: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800eb7c: 2300 movs r3, #0 800eb7e: 617b str r3, [r7, #20] 800eb80: e00a b.n 800eb98 <_read+0x28> { *ptr++ = __io_getchar(); 800eb82: f3af 8000 nop.w 800eb86: 4601 mov r1, r0 800eb88: 68bb ldr r3, [r7, #8] 800eb8a: 1c5a adds r2, r3, #1 800eb8c: 60ba str r2, [r7, #8] 800eb8e: b2ca uxtb r2, r1 800eb90: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 800eb92: 697b ldr r3, [r7, #20] 800eb94: 3301 adds r3, #1 800eb96: 617b str r3, [r7, #20] 800eb98: 697a ldr r2, [r7, #20] 800eb9a: 687b ldr r3, [r7, #4] 800eb9c: 429a cmp r2, r3 800eb9e: dbf0 blt.n 800eb82 <_read+0x12> } return len; 800eba0: 687b ldr r3, [r7, #4] } 800eba2: 4618 mov r0, r3 800eba4: 3718 adds r7, #24 800eba6: 46bd mov sp, r7 800eba8: bd80 pop {r7, pc} 0800ebaa <_close>: } return len; } int _close(int file) { 800ebaa: b480 push {r7} 800ebac: b083 sub sp, #12 800ebae: af00 add r7, sp, #0 800ebb0: 6078 str r0, [r7, #4] (void)file; return -1; 800ebb2: f04f 33ff mov.w r3, #4294967295 } 800ebb6: 4618 mov r0, r3 800ebb8: 370c adds r7, #12 800ebba: 46bd mov sp, r7 800ebbc: bc80 pop {r7} 800ebbe: 4770 bx lr 0800ebc0 <_fstat>: int _fstat(int file, struct stat *st) { 800ebc0: b480 push {r7} 800ebc2: b083 sub sp, #12 800ebc4: af00 add r7, sp, #0 800ebc6: 6078 str r0, [r7, #4] 800ebc8: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; 800ebca: 683b ldr r3, [r7, #0] 800ebcc: f44f 5200 mov.w r2, #8192 @ 0x2000 800ebd0: 605a str r2, [r3, #4] return 0; 800ebd2: 2300 movs r3, #0 } 800ebd4: 4618 mov r0, r3 800ebd6: 370c adds r7, #12 800ebd8: 46bd mov sp, r7 800ebda: bc80 pop {r7} 800ebdc: 4770 bx lr 0800ebde <_isatty>: int _isatty(int file) { 800ebde: b480 push {r7} 800ebe0: b083 sub sp, #12 800ebe2: af00 add r7, sp, #0 800ebe4: 6078 str r0, [r7, #4] (void)file; return 1; 800ebe6: 2301 movs r3, #1 } 800ebe8: 4618 mov r0, r3 800ebea: 370c adds r7, #12 800ebec: 46bd mov sp, r7 800ebee: bc80 pop {r7} 800ebf0: 4770 bx lr 0800ebf2 <_lseek>: int _lseek(int file, int ptr, int dir) { 800ebf2: b480 push {r7} 800ebf4: b085 sub sp, #20 800ebf6: af00 add r7, sp, #0 800ebf8: 60f8 str r0, [r7, #12] 800ebfa: 60b9 str r1, [r7, #8] 800ebfc: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; 800ebfe: 2300 movs r3, #0 } 800ec00: 4618 mov r0, r3 800ec02: 3714 adds r7, #20 800ec04: 46bd mov sp, r7 800ec06: bc80 pop {r7} 800ec08: 4770 bx lr ... 0800ec0c <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 800ec0c: b580 push {r7, lr} 800ec0e: b086 sub sp, #24 800ec10: af00 add r7, sp, #0 800ec12: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 800ec14: 4a14 ldr r2, [pc, #80] @ (800ec68 <_sbrk+0x5c>) 800ec16: 4b15 ldr r3, [pc, #84] @ (800ec6c <_sbrk+0x60>) 800ec18: 1ad3 subs r3, r2, r3 800ec1a: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 800ec1c: 697b ldr r3, [r7, #20] 800ec1e: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 800ec20: 4b13 ldr r3, [pc, #76] @ (800ec70 <_sbrk+0x64>) 800ec22: 681b ldr r3, [r3, #0] 800ec24: 2b00 cmp r3, #0 800ec26: d102 bne.n 800ec2e <_sbrk+0x22> { __sbrk_heap_end = &_end; 800ec28: 4b11 ldr r3, [pc, #68] @ (800ec70 <_sbrk+0x64>) 800ec2a: 4a12 ldr r2, [pc, #72] @ (800ec74 <_sbrk+0x68>) 800ec2c: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 800ec2e: 4b10 ldr r3, [pc, #64] @ (800ec70 <_sbrk+0x64>) 800ec30: 681a ldr r2, [r3, #0] 800ec32: 687b ldr r3, [r7, #4] 800ec34: 4413 add r3, r2 800ec36: 693a ldr r2, [r7, #16] 800ec38: 429a cmp r2, r3 800ec3a: d207 bcs.n 800ec4c <_sbrk+0x40> { errno = ENOMEM; 800ec3c: f007 fa50 bl 80160e0 <__errno> 800ec40: 4603 mov r3, r0 800ec42: 220c movs r2, #12 800ec44: 601a str r2, [r3, #0] return (void *)-1; 800ec46: f04f 33ff mov.w r3, #4294967295 800ec4a: e009 b.n 800ec60 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 800ec4c: 4b08 ldr r3, [pc, #32] @ (800ec70 <_sbrk+0x64>) 800ec4e: 681b ldr r3, [r3, #0] 800ec50: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 800ec52: 4b07 ldr r3, [pc, #28] @ (800ec70 <_sbrk+0x64>) 800ec54: 681a ldr r2, [r3, #0] 800ec56: 687b ldr r3, [r7, #4] 800ec58: 4413 add r3, r2 800ec5a: 4a05 ldr r2, [pc, #20] @ (800ec70 <_sbrk+0x64>) 800ec5c: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 800ec5e: 68fb ldr r3, [r7, #12] } 800ec60: 4618 mov r0, r3 800ec62: 3718 adds r7, #24 800ec64: 46bd mov sp, r7 800ec66: bd80 pop {r7, pc} 800ec68: 20010000 .word 0x20010000 800ec6c: 00000400 .word 0x00000400 800ec70: 20001204 .word 0x20001204 800ec74: 20001618 .word 0x20001618 0800ec78 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 800ec78: b480 push {r7} 800ec7a: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 800ec7c: bf00 nop 800ec7e: 46bd mov sp, r7 800ec80: bc80 pop {r7} 800ec82: 4770 bx lr 0800ec84 : TIM_HandleTypeDef htim3; TIM_HandleTypeDef htim4; /* TIM3 init function */ void MX_TIM3_Init(void) { 800ec84: b580 push {r7, lr} 800ec86: b08e sub sp, #56 @ 0x38 800ec88: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 800ec8a: f107 0328 add.w r3, r7, #40 @ 0x28 800ec8e: 2200 movs r2, #0 800ec90: 601a str r2, [r3, #0] 800ec92: 605a str r2, [r3, #4] 800ec94: 609a str r2, [r3, #8] 800ec96: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 800ec98: f107 0320 add.w r3, r7, #32 800ec9c: 2200 movs r2, #0 800ec9e: 601a str r2, [r3, #0] 800eca0: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 800eca2: 1d3b adds r3, r7, #4 800eca4: 2200 movs r2, #0 800eca6: 601a str r2, [r3, #0] 800eca8: 605a str r2, [r3, #4] 800ecaa: 609a str r2, [r3, #8] 800ecac: 60da str r2, [r3, #12] 800ecae: 611a str r2, [r3, #16] 800ecb0: 615a str r2, [r3, #20] 800ecb2: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; 800ecb4: 4b38 ldr r3, [pc, #224] @ (800ed98 ) 800ecb6: 4a39 ldr r2, [pc, #228] @ (800ed9c ) 800ecb8: 601a str r2, [r3, #0] htim3.Init.Prescaler = 0; 800ecba: 4b37 ldr r3, [pc, #220] @ (800ed98 ) 800ecbc: 2200 movs r2, #0 800ecbe: 605a str r2, [r3, #4] htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 800ecc0: 4b35 ldr r3, [pc, #212] @ (800ed98 ) 800ecc2: 2200 movs r2, #0 800ecc4: 609a str r2, [r3, #8] htim3.Init.Period = 65535; 800ecc6: 4b34 ldr r3, [pc, #208] @ (800ed98 ) 800ecc8: f64f 72ff movw r2, #65535 @ 0xffff 800eccc: 60da str r2, [r3, #12] htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 800ecce: 4b32 ldr r3, [pc, #200] @ (800ed98 ) 800ecd0: 2200 movs r2, #0 800ecd2: 611a str r2, [r3, #16] htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 800ecd4: 4b30 ldr r3, [pc, #192] @ (800ed98 ) 800ecd6: 2200 movs r2, #0 800ecd8: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim3) != HAL_OK) 800ecda: 482f ldr r0, [pc, #188] @ (800ed98 ) 800ecdc: f004 f9d5 bl 801308a 800ece0: 4603 mov r3, r0 800ece2: 2b00 cmp r3, #0 800ece4: d001 beq.n 800ecea { Error_Handler(); 800ece6: f7fc f865 bl 800adb4 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 800ecea: f44f 5380 mov.w r3, #4096 @ 0x1000 800ecee: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) 800ecf0: f107 0328 add.w r3, r7, #40 @ 0x28 800ecf4: 4619 mov r1, r3 800ecf6: 4828 ldr r0, [pc, #160] @ (800ed98 ) 800ecf8: f004 fe28 bl 801394c 800ecfc: 4603 mov r3, r0 800ecfe: 2b00 cmp r3, #0 800ed00: d001 beq.n 800ed06 { Error_Handler(); 800ed02: f7fc f857 bl 800adb4 } if (HAL_TIM_OC_Init(&htim3) != HAL_OK) 800ed06: 4824 ldr r0, [pc, #144] @ (800ed98 ) 800ed08: f004 fa0e bl 8013128 800ed0c: 4603 mov r3, r0 800ed0e: 2b00 cmp r3, #0 800ed10: d001 beq.n 800ed16 { Error_Handler(); 800ed12: f7fc f84f bl 800adb4 } if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) 800ed16: 4820 ldr r0, [pc, #128] @ (800ed98 ) 800ed18: f004 fb08 bl 801332c 800ed1c: 4603 mov r3, r0 800ed1e: 2b00 cmp r3, #0 800ed20: d001 beq.n 800ed26 { Error_Handler(); 800ed22: f7fc f847 bl 800adb4 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_OC1; 800ed26: 2330 movs r3, #48 @ 0x30 800ed28: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800ed2a: 2300 movs r3, #0 800ed2c: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 800ed2e: f107 0320 add.w r3, r7, #32 800ed32: 4619 mov r1, r3 800ed34: 4818 ldr r0, [pc, #96] @ (800ed98 ) 800ed36: f005 f9b7 bl 80140a8 800ed3a: 4603 mov r3, r0 800ed3c: 2b00 cmp r3, #0 800ed3e: d001 beq.n 800ed44 { Error_Handler(); 800ed40: f7fc f838 bl 800adb4 } sConfigOC.OCMode = TIM_OCMODE_TIMING; 800ed44: 2300 movs r3, #0 800ed46: 607b str r3, [r7, #4] sConfigOC.Pulse = 1; 800ed48: 2301 movs r3, #1 800ed4a: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800ed4c: 2300 movs r3, #0 800ed4e: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 800ed50: 2300 movs r3, #0 800ed52: 617b str r3, [r7, #20] if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 800ed54: 1d3b adds r3, r7, #4 800ed56: 2200 movs r2, #0 800ed58: 4619 mov r1, r3 800ed5a: 480f ldr r0, [pc, #60] @ (800ed98 ) 800ed5c: f004 fcd8 bl 8013710 800ed60: 4603 mov r3, r0 800ed62: 2b00 cmp r3, #0 800ed64: d001 beq.n 800ed6a { Error_Handler(); 800ed66: f7fc f825 bl 800adb4 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 800ed6a: 2360 movs r3, #96 @ 0x60 800ed6c: 607b str r3, [r7, #4] sConfigOC.Pulse = 0; 800ed6e: 2300 movs r3, #0 800ed70: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 800ed72: 1d3b adds r3, r7, #4 800ed74: 2204 movs r2, #4 800ed76: 4619 mov r1, r3 800ed78: 4807 ldr r0, [pc, #28] @ (800ed98 ) 800ed7a: f004 fd25 bl 80137c8 800ed7e: 4603 mov r3, r0 800ed80: 2b00 cmp r3, #0 800ed82: d001 beq.n 800ed88 { Error_Handler(); 800ed84: f7fc f816 bl 800adb4 } /* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */ HAL_TIM_MspPostInit(&htim3); 800ed88: 4803 ldr r0, [pc, #12] @ (800ed98 ) 800ed8a: f000 f8cf bl 800ef2c } 800ed8e: bf00 nop 800ed90: 3738 adds r7, #56 @ 0x38 800ed92: 46bd mov sp, r7 800ed94: bd80 pop {r7, pc} 800ed96: bf00 nop 800ed98: 20001208 .word 0x20001208 800ed9c: 40000400 .word 0x40000400 0800eda0 : /* TIM4 init function */ void MX_TIM4_Init(void) { 800eda0: b580 push {r7, lr} 800eda2: b08e sub sp, #56 @ 0x38 800eda4: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 800eda6: f107 0328 add.w r3, r7, #40 @ 0x28 800edaa: 2200 movs r2, #0 800edac: 601a str r2, [r3, #0] 800edae: 605a str r2, [r3, #4] 800edb0: 609a str r2, [r3, #8] 800edb2: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 800edb4: f107 0320 add.w r3, r7, #32 800edb8: 2200 movs r2, #0 800edba: 601a str r2, [r3, #0] 800edbc: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 800edbe: 1d3b adds r3, r7, #4 800edc0: 2200 movs r2, #0 800edc2: 601a str r2, [r3, #0] 800edc4: 605a str r2, [r3, #4] 800edc6: 609a str r2, [r3, #8] 800edc8: 60da str r2, [r3, #12] 800edca: 611a str r2, [r3, #16] 800edcc: 615a str r2, [r3, #20] 800edce: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 800edd0: 4b37 ldr r3, [pc, #220] @ (800eeb0 ) 800edd2: 4a38 ldr r2, [pc, #224] @ (800eeb4 ) 800edd4: 601a str r2, [r3, #0] htim4.Init.Prescaler = 720; 800edd6: 4b36 ldr r3, [pc, #216] @ (800eeb0 ) 800edd8: f44f 7234 mov.w r2, #720 @ 0x2d0 800eddc: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 800edde: 4b34 ldr r3, [pc, #208] @ (800eeb0 ) 800ede0: 2200 movs r2, #0 800ede2: 609a str r2, [r3, #8] htim4.Init.Period = 100; 800ede4: 4b32 ldr r3, [pc, #200] @ (800eeb0 ) 800ede6: 2264 movs r2, #100 @ 0x64 800ede8: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 800edea: 4b31 ldr r3, [pc, #196] @ (800eeb0 ) 800edec: 2200 movs r2, #0 800edee: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 800edf0: 4b2f ldr r3, [pc, #188] @ (800eeb0 ) 800edf2: 2200 movs r2, #0 800edf4: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 800edf6: 482e ldr r0, [pc, #184] @ (800eeb0 ) 800edf8: f004 f947 bl 801308a 800edfc: 4603 mov r3, r0 800edfe: 2b00 cmp r3, #0 800ee00: d001 beq.n 800ee06 { Error_Handler(); 800ee02: f7fb ffd7 bl 800adb4 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 800ee06: f44f 5380 mov.w r3, #4096 @ 0x1000 800ee0a: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 800ee0c: f107 0328 add.w r3, r7, #40 @ 0x28 800ee10: 4619 mov r1, r3 800ee12: 4827 ldr r0, [pc, #156] @ (800eeb0 ) 800ee14: f004 fd9a bl 801394c 800ee18: 4603 mov r3, r0 800ee1a: 2b00 cmp r3, #0 800ee1c: d001 beq.n 800ee22 { Error_Handler(); 800ee1e: f7fb ffc9 bl 800adb4 } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 800ee22: 4823 ldr r0, [pc, #140] @ (800eeb0 ) 800ee24: f004 fa82 bl 801332c 800ee28: 4603 mov r3, r0 800ee2a: 2b00 cmp r3, #0 800ee2c: d001 beq.n 800ee32 { Error_Handler(); 800ee2e: f7fb ffc1 bl 800adb4 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800ee32: 2300 movs r3, #0 800ee34: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800ee36: 2300 movs r3, #0 800ee38: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 800ee3a: f107 0320 add.w r3, r7, #32 800ee3e: 4619 mov r1, r3 800ee40: 481b ldr r0, [pc, #108] @ (800eeb0 ) 800ee42: f005 f931 bl 80140a8 800ee46: 4603 mov r3, r0 800ee48: 2b00 cmp r3, #0 800ee4a: d001 beq.n 800ee50 { Error_Handler(); 800ee4c: f7fb ffb2 bl 800adb4 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 800ee50: 2360 movs r3, #96 @ 0x60 800ee52: 607b str r3, [r7, #4] sConfigOC.Pulse = 0; 800ee54: 2300 movs r3, #0 800ee56: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800ee58: 2300 movs r3, #0 800ee5a: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 800ee5c: 2300 movs r3, #0 800ee5e: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 800ee60: 1d3b adds r3, r7, #4 800ee62: 2204 movs r2, #4 800ee64: 4619 mov r1, r3 800ee66: 4812 ldr r0, [pc, #72] @ (800eeb0 ) 800ee68: f004 fcae bl 80137c8 800ee6c: 4603 mov r3, r0 800ee6e: 2b00 cmp r3, #0 800ee70: d001 beq.n 800ee76 { Error_Handler(); 800ee72: f7fb ff9f bl 800adb4 } if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 800ee76: 1d3b adds r3, r7, #4 800ee78: 2208 movs r2, #8 800ee7a: 4619 mov r1, r3 800ee7c: 480c ldr r0, [pc, #48] @ (800eeb0 ) 800ee7e: f004 fca3 bl 80137c8 800ee82: 4603 mov r3, r0 800ee84: 2b00 cmp r3, #0 800ee86: d001 beq.n 800ee8c { Error_Handler(); 800ee88: f7fb ff94 bl 800adb4 } if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 800ee8c: 1d3b adds r3, r7, #4 800ee8e: 220c movs r2, #12 800ee90: 4619 mov r1, r3 800ee92: 4807 ldr r0, [pc, #28] @ (800eeb0 ) 800ee94: f004 fc98 bl 80137c8 800ee98: 4603 mov r3, r0 800ee9a: 2b00 cmp r3, #0 800ee9c: d001 beq.n 800eea2 { Error_Handler(); 800ee9e: f7fb ff89 bl 800adb4 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 800eea2: 4803 ldr r0, [pc, #12] @ (800eeb0 ) 800eea4: f000 f842 bl 800ef2c } 800eea8: bf00 nop 800eeaa: 3738 adds r7, #56 @ 0x38 800eeac: 46bd mov sp, r7 800eeae: bd80 pop {r7, pc} 800eeb0: 20001250 .word 0x20001250 800eeb4: 40000800 .word 0x40000800 0800eeb8 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { 800eeb8: b580 push {r7, lr} 800eeba: b084 sub sp, #16 800eebc: af00 add r7, sp, #0 800eebe: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM3) 800eec0: 687b ldr r3, [r7, #4] 800eec2: 681b ldr r3, [r3, #0] 800eec4: 4a16 ldr r2, [pc, #88] @ (800ef20 ) 800eec6: 4293 cmp r3, r2 800eec8: d114 bne.n 800eef4 { /* USER CODE BEGIN TIM3_MspInit 0 */ /* USER CODE END TIM3_MspInit 0 */ /* TIM3 clock enable */ __HAL_RCC_TIM3_CLK_ENABLE(); 800eeca: 4b16 ldr r3, [pc, #88] @ (800ef24 ) 800eecc: 69db ldr r3, [r3, #28] 800eece: 4a15 ldr r2, [pc, #84] @ (800ef24 ) 800eed0: f043 0302 orr.w r3, r3, #2 800eed4: 61d3 str r3, [r2, #28] 800eed6: 4b13 ldr r3, [pc, #76] @ (800ef24 ) 800eed8: 69db ldr r3, [r3, #28] 800eeda: f003 0302 and.w r3, r3, #2 800eede: 60fb str r3, [r7, #12] 800eee0: 68fb ldr r3, [r7, #12] /* TIM3 interrupt Init */ HAL_NVIC_SetPriority(TIM3_IRQn, 6, 0); 800eee2: 2200 movs r2, #0 800eee4: 2106 movs r1, #6 800eee6: 201d movs r0, #29 800eee8: f002 f8c5 bl 8011076 HAL_NVIC_EnableIRQ(TIM3_IRQn); 800eeec: 201d movs r0, #29 800eeee: f002 f8de bl 80110ae __HAL_RCC_TIM4_CLK_ENABLE(); /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 800eef2: e010 b.n 800ef16 else if(tim_baseHandle->Instance==TIM4) 800eef4: 687b ldr r3, [r7, #4] 800eef6: 681b ldr r3, [r3, #0] 800eef8: 4a0b ldr r2, [pc, #44] @ (800ef28 ) 800eefa: 4293 cmp r3, r2 800eefc: d10b bne.n 800ef16 __HAL_RCC_TIM4_CLK_ENABLE(); 800eefe: 4b09 ldr r3, [pc, #36] @ (800ef24 ) 800ef00: 69db ldr r3, [r3, #28] 800ef02: 4a08 ldr r2, [pc, #32] @ (800ef24 ) 800ef04: f043 0304 orr.w r3, r3, #4 800ef08: 61d3 str r3, [r2, #28] 800ef0a: 4b06 ldr r3, [pc, #24] @ (800ef24 ) 800ef0c: 69db ldr r3, [r3, #28] 800ef0e: f003 0304 and.w r3, r3, #4 800ef12: 60bb str r3, [r7, #8] 800ef14: 68bb ldr r3, [r7, #8] } 800ef16: bf00 nop 800ef18: 3710 adds r7, #16 800ef1a: 46bd mov sp, r7 800ef1c: bd80 pop {r7, pc} 800ef1e: bf00 nop 800ef20: 40000400 .word 0x40000400 800ef24: 40021000 .word 0x40021000 800ef28: 40000800 .word 0x40000800 0800ef2c : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) { 800ef2c: b580 push {r7, lr} 800ef2e: b08a sub sp, #40 @ 0x28 800ef30: af00 add r7, sp, #0 800ef32: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800ef34: f107 0314 add.w r3, r7, #20 800ef38: 2200 movs r2, #0 800ef3a: 601a str r2, [r3, #0] 800ef3c: 605a str r2, [r3, #4] 800ef3e: 609a str r2, [r3, #8] 800ef40: 60da str r2, [r3, #12] if(timHandle->Instance==TIM3) 800ef42: 687b ldr r3, [r7, #4] 800ef44: 681b ldr r3, [r3, #0] 800ef46: 4a26 ldr r2, [pc, #152] @ (800efe0 ) 800ef48: 4293 cmp r3, r2 800ef4a: d118 bne.n 800ef7e { /* USER CODE BEGIN TIM3_MspPostInit 0 */ /* USER CODE END TIM3_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); 800ef4c: 4b25 ldr r3, [pc, #148] @ (800efe4 ) 800ef4e: 699b ldr r3, [r3, #24] 800ef50: 4a24 ldr r2, [pc, #144] @ (800efe4 ) 800ef52: f043 0304 orr.w r3, r3, #4 800ef56: 6193 str r3, [r2, #24] 800ef58: 4b22 ldr r3, [pc, #136] @ (800efe4 ) 800ef5a: 699b ldr r3, [r3, #24] 800ef5c: f003 0304 and.w r3, r3, #4 800ef60: 613b str r3, [r7, #16] 800ef62: 693b ldr r3, [r7, #16] /**TIM3 GPIO Configuration PA7 ------> TIM3_CH2 */ GPIO_InitStruct.Pin = CP_PWM_Pin; 800ef64: 2380 movs r3, #128 @ 0x80 800ef66: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800ef68: 2302 movs r3, #2 800ef6a: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800ef6c: 2302 movs r3, #2 800ef6e: 623b str r3, [r7, #32] HAL_GPIO_Init(CP_PWM_GPIO_Port, &GPIO_InitStruct); 800ef70: f107 0314 add.w r3, r7, #20 800ef74: 4619 mov r1, r3 800ef76: 481c ldr r0, [pc, #112] @ (800efe8 ) 800ef78: f002 fd5e bl 8011a38 /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 800ef7c: e02b b.n 800efd6 else if(timHandle->Instance==TIM4) 800ef7e: 687b ldr r3, [r7, #4] 800ef80: 681b ldr r3, [r3, #0] 800ef82: 4a1a ldr r2, [pc, #104] @ (800efec ) 800ef84: 4293 cmp r3, r2 800ef86: d126 bne.n 800efd6 __HAL_RCC_GPIOD_CLK_ENABLE(); 800ef88: 4b16 ldr r3, [pc, #88] @ (800efe4 ) 800ef8a: 699b ldr r3, [r3, #24] 800ef8c: 4a15 ldr r2, [pc, #84] @ (800efe4 ) 800ef8e: f043 0320 orr.w r3, r3, #32 800ef92: 6193 str r3, [r2, #24] 800ef94: 4b13 ldr r3, [pc, #76] @ (800efe4 ) 800ef96: 699b ldr r3, [r3, #24] 800ef98: f003 0320 and.w r3, r3, #32 800ef9c: 60fb str r3, [r7, #12] 800ef9e: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; 800efa0: f44f 4360 mov.w r3, #57344 @ 0xe000 800efa4: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800efa6: 2302 movs r3, #2 800efa8: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800efaa: 2302 movs r3, #2 800efac: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800efae: f107 0314 add.w r3, r7, #20 800efb2: 4619 mov r1, r3 800efb4: 480e ldr r0, [pc, #56] @ (800eff0 ) 800efb6: f002 fd3f bl 8011a38 __HAL_AFIO_REMAP_TIM4_ENABLE(); 800efba: 4b0e ldr r3, [pc, #56] @ (800eff4 ) 800efbc: 685b ldr r3, [r3, #4] 800efbe: 627b str r3, [r7, #36] @ 0x24 800efc0: 6a7b ldr r3, [r7, #36] @ 0x24 800efc2: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800efc6: 627b str r3, [r7, #36] @ 0x24 800efc8: 6a7b ldr r3, [r7, #36] @ 0x24 800efca: f443 5380 orr.w r3, r3, #4096 @ 0x1000 800efce: 627b str r3, [r7, #36] @ 0x24 800efd0: 4a08 ldr r2, [pc, #32] @ (800eff4 ) 800efd2: 6a7b ldr r3, [r7, #36] @ 0x24 800efd4: 6053 str r3, [r2, #4] } 800efd6: bf00 nop 800efd8: 3728 adds r7, #40 @ 0x28 800efda: 46bd mov sp, r7 800efdc: bd80 pop {r7, pc} 800efde: bf00 nop 800efe0: 40000400 .word 0x40000400 800efe4: 40021000 .word 0x40021000 800efe8: 40010800 .word 0x40010800 800efec: 40000800 .word 0x40000800 800eff0: 40011400 .word 0x40011400 800eff4: 40010000 .word 0x40010000 0800eff8 : DMA_HandleTypeDef hdma_usart3_rx; DMA_HandleTypeDef hdma_usart3_tx; /* UART5 init function */ void MX_UART5_Init(void) { 800eff8: b580 push {r7, lr} 800effa: af00 add r7, sp, #0 /* USER CODE END UART5_Init 0 */ /* USER CODE BEGIN UART5_Init 1 */ /* USER CODE END UART5_Init 1 */ huart5.Instance = UART5; 800effc: 4b11 ldr r3, [pc, #68] @ (800f044 ) 800effe: 4a12 ldr r2, [pc, #72] @ (800f048 ) 800f000: 601a str r2, [r3, #0] huart5.Init.BaudRate = 9600; 800f002: 4b10 ldr r3, [pc, #64] @ (800f044 ) 800f004: f44f 5216 mov.w r2, #9600 @ 0x2580 800f008: 605a str r2, [r3, #4] huart5.Init.WordLength = UART_WORDLENGTH_8B; 800f00a: 4b0e ldr r3, [pc, #56] @ (800f044 ) 800f00c: 2200 movs r2, #0 800f00e: 609a str r2, [r3, #8] huart5.Init.StopBits = UART_STOPBITS_1; 800f010: 4b0c ldr r3, [pc, #48] @ (800f044 ) 800f012: 2200 movs r2, #0 800f014: 60da str r2, [r3, #12] huart5.Init.Parity = UART_PARITY_NONE; 800f016: 4b0b ldr r3, [pc, #44] @ (800f044 ) 800f018: 2200 movs r2, #0 800f01a: 611a str r2, [r3, #16] huart5.Init.Mode = UART_MODE_TX_RX; 800f01c: 4b09 ldr r3, [pc, #36] @ (800f044 ) 800f01e: 220c movs r2, #12 800f020: 615a str r2, [r3, #20] huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800f022: 4b08 ldr r3, [pc, #32] @ (800f044 ) 800f024: 2200 movs r2, #0 800f026: 619a str r2, [r3, #24] huart5.Init.OverSampling = UART_OVERSAMPLING_16; 800f028: 4b06 ldr r3, [pc, #24] @ (800f044 ) 800f02a: 2200 movs r2, #0 800f02c: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart5) != HAL_OK) 800f02e: 4805 ldr r0, [pc, #20] @ (800f044 ) 800f030: f005 f8b2 bl 8014198 800f034: 4603 mov r3, r0 800f036: 2b00 cmp r3, #0 800f038: d001 beq.n 800f03e { Error_Handler(); 800f03a: f7fb febb bl 800adb4 } /* USER CODE BEGIN UART5_Init 2 */ /* USER CODE END UART5_Init 2 */ } 800f03e: bf00 nop 800f040: bd80 pop {r7, pc} 800f042: bf00 nop 800f044: 20001298 .word 0x20001298 800f048: 40005000 .word 0x40005000 0800f04c : /* USART1 init function */ void MX_USART1_UART_Init(void) { 800f04c: b580 push {r7, lr} 800f04e: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 800f050: 4b11 ldr r3, [pc, #68] @ (800f098 ) 800f052: 4a12 ldr r2, [pc, #72] @ (800f09c ) 800f054: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 800f056: 4b10 ldr r3, [pc, #64] @ (800f098 ) 800f058: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800f05c: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 800f05e: 4b0e ldr r3, [pc, #56] @ (800f098 ) 800f060: 2200 movs r2, #0 800f062: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 800f064: 4b0c ldr r3, [pc, #48] @ (800f098 ) 800f066: 2200 movs r2, #0 800f068: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 800f06a: 4b0b ldr r3, [pc, #44] @ (800f098 ) 800f06c: 2200 movs r2, #0 800f06e: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 800f070: 4b09 ldr r3, [pc, #36] @ (800f098 ) 800f072: 220c movs r2, #12 800f074: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800f076: 4b08 ldr r3, [pc, #32] @ (800f098 ) 800f078: 2200 movs r2, #0 800f07a: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 800f07c: 4b06 ldr r3, [pc, #24] @ (800f098 ) 800f07e: 2200 movs r2, #0 800f080: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 800f082: 4805 ldr r0, [pc, #20] @ (800f098 ) 800f084: f005 f888 bl 8014198 800f088: 4603 mov r3, r0 800f08a: 2b00 cmp r3, #0 800f08c: d001 beq.n 800f092 { Error_Handler(); 800f08e: f7fb fe91 bl 800adb4 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 800f092: bf00 nop 800f094: bd80 pop {r7, pc} 800f096: bf00 nop 800f098: 200012e0 .word 0x200012e0 800f09c: 40013800 .word 0x40013800 0800f0a0 : /* USART2 init function */ void MX_USART2_UART_Init(void) { 800f0a0: b580 push {r7, lr} 800f0a2: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 800f0a4: 4b11 ldr r3, [pc, #68] @ (800f0ec ) 800f0a6: 4a12 ldr r2, [pc, #72] @ (800f0f0 ) 800f0a8: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 800f0aa: 4b10 ldr r3, [pc, #64] @ (800f0ec ) 800f0ac: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800f0b0: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 800f0b2: 4b0e ldr r3, [pc, #56] @ (800f0ec ) 800f0b4: 2200 movs r2, #0 800f0b6: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 800f0b8: 4b0c ldr r3, [pc, #48] @ (800f0ec ) 800f0ba: 2200 movs r2, #0 800f0bc: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 800f0be: 4b0b ldr r3, [pc, #44] @ (800f0ec ) 800f0c0: 2200 movs r2, #0 800f0c2: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 800f0c4: 4b09 ldr r3, [pc, #36] @ (800f0ec ) 800f0c6: 220c movs r2, #12 800f0c8: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800f0ca: 4b08 ldr r3, [pc, #32] @ (800f0ec ) 800f0cc: 2200 movs r2, #0 800f0ce: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 800f0d0: 4b06 ldr r3, [pc, #24] @ (800f0ec ) 800f0d2: 2200 movs r2, #0 800f0d4: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 800f0d6: 4805 ldr r0, [pc, #20] @ (800f0ec ) 800f0d8: f005 f85e bl 8014198 800f0dc: 4603 mov r3, r0 800f0de: 2b00 cmp r3, #0 800f0e0: d001 beq.n 800f0e6 { Error_Handler(); 800f0e2: f7fb fe67 bl 800adb4 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } 800f0e6: bf00 nop 800f0e8: bd80 pop {r7, pc} 800f0ea: bf00 nop 800f0ec: 20001328 .word 0x20001328 800f0f0: 40004400 .word 0x40004400 0800f0f4 : /* USART3 init function */ void MX_USART3_UART_Init(void) { 800f0f4: b580 push {r7, lr} 800f0f6: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; 800f0f8: 4b11 ldr r3, [pc, #68] @ (800f140 ) 800f0fa: 4a12 ldr r2, [pc, #72] @ (800f144 ) 800f0fc: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; 800f0fe: 4b10 ldr r3, [pc, #64] @ (800f140 ) 800f100: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800f104: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; 800f106: 4b0e ldr r3, [pc, #56] @ (800f140 ) 800f108: 2200 movs r2, #0 800f10a: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; 800f10c: 4b0c ldr r3, [pc, #48] @ (800f140 ) 800f10e: 2200 movs r2, #0 800f110: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; 800f112: 4b0b ldr r3, [pc, #44] @ (800f140 ) 800f114: 2200 movs r2, #0 800f116: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; 800f118: 4b09 ldr r3, [pc, #36] @ (800f140 ) 800f11a: 220c movs r2, #12 800f11c: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800f11e: 4b08 ldr r3, [pc, #32] @ (800f140 ) 800f120: 2200 movs r2, #0 800f122: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; 800f124: 4b06 ldr r3, [pc, #24] @ (800f140 ) 800f126: 2200 movs r2, #0 800f128: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart3) != HAL_OK) 800f12a: 4805 ldr r0, [pc, #20] @ (800f140 ) 800f12c: f005 f834 bl 8014198 800f130: 4603 mov r3, r0 800f132: 2b00 cmp r3, #0 800f134: d001 beq.n 800f13a { Error_Handler(); 800f136: f7fb fe3d bl 800adb4 } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } 800f13a: bf00 nop 800f13c: bd80 pop {r7, pc} 800f13e: bf00 nop 800f140: 20001370 .word 0x20001370 800f144: 40004800 .word 0x40004800 0800f148 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { 800f148: b580 push {r7, lr} 800f14a: b092 sub sp, #72 @ 0x48 800f14c: af00 add r7, sp, #0 800f14e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800f150: f107 0330 add.w r3, r7, #48 @ 0x30 800f154: 2200 movs r2, #0 800f156: 601a str r2, [r3, #0] 800f158: 605a str r2, [r3, #4] 800f15a: 609a str r2, [r3, #8] 800f15c: 60da str r2, [r3, #12] if(uartHandle->Instance==UART5) 800f15e: 687b ldr r3, [r7, #4] 800f160: 681b ldr r3, [r3, #0] 800f162: 4a92 ldr r2, [pc, #584] @ (800f3ac ) 800f164: 4293 cmp r3, r2 800f166: d145 bne.n 800f1f4 { /* USER CODE BEGIN UART5_MspInit 0 */ /* USER CODE END UART5_MspInit 0 */ /* UART5 clock enable */ __HAL_RCC_UART5_CLK_ENABLE(); 800f168: 4b91 ldr r3, [pc, #580] @ (800f3b0 ) 800f16a: 69db ldr r3, [r3, #28] 800f16c: 4a90 ldr r2, [pc, #576] @ (800f3b0 ) 800f16e: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 800f172: 61d3 str r3, [r2, #28] 800f174: 4b8e ldr r3, [pc, #568] @ (800f3b0 ) 800f176: 69db ldr r3, [r3, #28] 800f178: f403 1380 and.w r3, r3, #1048576 @ 0x100000 800f17c: 62fb str r3, [r7, #44] @ 0x2c 800f17e: 6afb ldr r3, [r7, #44] @ 0x2c __HAL_RCC_GPIOC_CLK_ENABLE(); 800f180: 4b8b ldr r3, [pc, #556] @ (800f3b0 ) 800f182: 699b ldr r3, [r3, #24] 800f184: 4a8a ldr r2, [pc, #552] @ (800f3b0 ) 800f186: f043 0310 orr.w r3, r3, #16 800f18a: 6193 str r3, [r2, #24] 800f18c: 4b88 ldr r3, [pc, #544] @ (800f3b0 ) 800f18e: 699b ldr r3, [r3, #24] 800f190: f003 0310 and.w r3, r3, #16 800f194: 62bb str r3, [r7, #40] @ 0x28 800f196: 6abb ldr r3, [r7, #40] @ 0x28 __HAL_RCC_GPIOD_CLK_ENABLE(); 800f198: 4b85 ldr r3, [pc, #532] @ (800f3b0 ) 800f19a: 699b ldr r3, [r3, #24] 800f19c: 4a84 ldr r2, [pc, #528] @ (800f3b0 ) 800f19e: f043 0320 orr.w r3, r3, #32 800f1a2: 6193 str r3, [r2, #24] 800f1a4: 4b82 ldr r3, [pc, #520] @ (800f3b0 ) 800f1a6: 699b ldr r3, [r3, #24] 800f1a8: f003 0320 and.w r3, r3, #32 800f1ac: 627b str r3, [r7, #36] @ 0x24 800f1ae: 6a7b ldr r3, [r7, #36] @ 0x24 /**UART5 GPIO Configuration PC12 ------> UART5_TX PD2 ------> UART5_RX */ GPIO_InitStruct.Pin = HEATER_Pin; 800f1b0: f44f 5380 mov.w r3, #4096 @ 0x1000 800f1b4: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800f1b6: 2302 movs r3, #2 800f1b8: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800f1ba: 2303 movs r3, #3 800f1bc: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(HEATER_GPIO_Port, &GPIO_InitStruct); 800f1be: f107 0330 add.w r3, r7, #48 @ 0x30 800f1c2: 4619 mov r1, r3 800f1c4: 487b ldr r0, [pc, #492] @ (800f3b4 ) 800f1c6: f002 fc37 bl 8011a38 GPIO_InitStruct.Pin = GPIO_PIN_2; 800f1ca: 2304 movs r3, #4 800f1cc: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800f1ce: 2300 movs r3, #0 800f1d0: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800f1d2: 2300 movs r3, #0 800f1d4: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800f1d6: f107 0330 add.w r3, r7, #48 @ 0x30 800f1da: 4619 mov r1, r3 800f1dc: 4876 ldr r0, [pc, #472] @ (800f3b8 ) 800f1de: f002 fc2b bl 8011a38 /* UART5 interrupt Init */ HAL_NVIC_SetPriority(UART5_IRQn, 5, 0); 800f1e2: 2200 movs r2, #0 800f1e4: 2105 movs r1, #5 800f1e6: 2035 movs r0, #53 @ 0x35 800f1e8: f001 ff45 bl 8011076 HAL_NVIC_EnableIRQ(UART5_IRQn); 800f1ec: 2035 movs r0, #53 @ 0x35 800f1ee: f001 ff5e bl 80110ae HAL_NVIC_EnableIRQ(USART3_IRQn); /* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */ } } 800f1f2: e193 b.n 800f51c else if(uartHandle->Instance==USART1) 800f1f4: 687b ldr r3, [r7, #4] 800f1f6: 681b ldr r3, [r3, #0] 800f1f8: 4a70 ldr r2, [pc, #448] @ (800f3bc ) 800f1fa: 4293 cmp r3, r2 800f1fc: d13a bne.n 800f274 __HAL_RCC_USART1_CLK_ENABLE(); 800f1fe: 4b6c ldr r3, [pc, #432] @ (800f3b0 ) 800f200: 699b ldr r3, [r3, #24] 800f202: 4a6b ldr r2, [pc, #428] @ (800f3b0 ) 800f204: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800f208: 6193 str r3, [r2, #24] 800f20a: 4b69 ldr r3, [pc, #420] @ (800f3b0 ) 800f20c: 699b ldr r3, [r3, #24] 800f20e: f403 4380 and.w r3, r3, #16384 @ 0x4000 800f212: 623b str r3, [r7, #32] 800f214: 6a3b ldr r3, [r7, #32] __HAL_RCC_GPIOA_CLK_ENABLE(); 800f216: 4b66 ldr r3, [pc, #408] @ (800f3b0 ) 800f218: 699b ldr r3, [r3, #24] 800f21a: 4a65 ldr r2, [pc, #404] @ (800f3b0 ) 800f21c: f043 0304 orr.w r3, r3, #4 800f220: 6193 str r3, [r2, #24] 800f222: 4b63 ldr r3, [pc, #396] @ (800f3b0 ) 800f224: 699b ldr r3, [r3, #24] 800f226: f003 0304 and.w r3, r3, #4 800f22a: 61fb str r3, [r7, #28] 800f22c: 69fb ldr r3, [r7, #28] GPIO_InitStruct.Pin = GPIO_PIN_9; 800f22e: f44f 7300 mov.w r3, #512 @ 0x200 800f232: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800f234: 2302 movs r3, #2 800f236: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800f238: 2303 movs r3, #3 800f23a: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800f23c: f107 0330 add.w r3, r7, #48 @ 0x30 800f240: 4619 mov r1, r3 800f242: 485f ldr r0, [pc, #380] @ (800f3c0 ) 800f244: f002 fbf8 bl 8011a38 GPIO_InitStruct.Pin = GPIO_PIN_10; 800f248: f44f 6380 mov.w r3, #1024 @ 0x400 800f24c: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800f24e: 2300 movs r3, #0 800f250: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800f252: 2300 movs r3, #0 800f254: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800f256: f107 0330 add.w r3, r7, #48 @ 0x30 800f25a: 4619 mov r1, r3 800f25c: 4858 ldr r0, [pc, #352] @ (800f3c0 ) 800f25e: f002 fbeb bl 8011a38 HAL_NVIC_SetPriority(USART1_IRQn, 5, 0); 800f262: 2200 movs r2, #0 800f264: 2105 movs r1, #5 800f266: 2025 movs r0, #37 @ 0x25 800f268: f001 ff05 bl 8011076 HAL_NVIC_EnableIRQ(USART1_IRQn); 800f26c: 2025 movs r0, #37 @ 0x25 800f26e: f001 ff1e bl 80110ae } 800f272: e153 b.n 800f51c else if(uartHandle->Instance==USART2) 800f274: 687b ldr r3, [r7, #4] 800f276: 681b ldr r3, [r3, #0] 800f278: 4a52 ldr r2, [pc, #328] @ (800f3c4 ) 800f27a: 4293 cmp r3, r2 800f27c: f040 80ae bne.w 800f3dc __HAL_RCC_USART2_CLK_ENABLE(); 800f280: 4b4b ldr r3, [pc, #300] @ (800f3b0 ) 800f282: 69db ldr r3, [r3, #28] 800f284: 4a4a ldr r2, [pc, #296] @ (800f3b0 ) 800f286: f443 3300 orr.w r3, r3, #131072 @ 0x20000 800f28a: 61d3 str r3, [r2, #28] 800f28c: 4b48 ldr r3, [pc, #288] @ (800f3b0 ) 800f28e: 69db ldr r3, [r3, #28] 800f290: f403 3300 and.w r3, r3, #131072 @ 0x20000 800f294: 61bb str r3, [r7, #24] 800f296: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); 800f298: 4b45 ldr r3, [pc, #276] @ (800f3b0 ) 800f29a: 699b ldr r3, [r3, #24] 800f29c: 4a44 ldr r2, [pc, #272] @ (800f3b0 ) 800f29e: f043 0320 orr.w r3, r3, #32 800f2a2: 6193 str r3, [r2, #24] 800f2a4: 4b42 ldr r3, [pc, #264] @ (800f3b0 ) 800f2a6: 699b ldr r3, [r3, #24] 800f2a8: f003 0320 and.w r3, r3, #32 800f2ac: 617b str r3, [r7, #20] 800f2ae: 697b ldr r3, [r7, #20] GPIO_InitStruct.Pin = GPIO_PIN_5; 800f2b0: 2320 movs r3, #32 800f2b2: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800f2b4: 2302 movs r3, #2 800f2b6: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800f2b8: 2303 movs r3, #3 800f2ba: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800f2bc: f107 0330 add.w r3, r7, #48 @ 0x30 800f2c0: 4619 mov r1, r3 800f2c2: 483d ldr r0, [pc, #244] @ (800f3b8 ) 800f2c4: f002 fbb8 bl 8011a38 GPIO_InitStruct.Pin = GPIO_PIN_6; 800f2c8: 2340 movs r3, #64 @ 0x40 800f2ca: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800f2cc: 2300 movs r3, #0 800f2ce: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800f2d0: 2300 movs r3, #0 800f2d2: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800f2d4: f107 0330 add.w r3, r7, #48 @ 0x30 800f2d8: 4619 mov r1, r3 800f2da: 4837 ldr r0, [pc, #220] @ (800f3b8 ) 800f2dc: f002 fbac bl 8011a38 __HAL_AFIO_REMAP_USART2_ENABLE(); 800f2e0: 4b39 ldr r3, [pc, #228] @ (800f3c8 ) 800f2e2: 685b ldr r3, [r3, #4] 800f2e4: 643b str r3, [r7, #64] @ 0x40 800f2e6: 6c3b ldr r3, [r7, #64] @ 0x40 800f2e8: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800f2ec: 643b str r3, [r7, #64] @ 0x40 800f2ee: 6c3b ldr r3, [r7, #64] @ 0x40 800f2f0: f043 0308 orr.w r3, r3, #8 800f2f4: 643b str r3, [r7, #64] @ 0x40 800f2f6: 4a34 ldr r2, [pc, #208] @ (800f3c8 ) 800f2f8: 6c3b ldr r3, [r7, #64] @ 0x40 800f2fa: 6053 str r3, [r2, #4] hdma_usart2_rx.Instance = DMA1_Channel6; 800f2fc: 4b33 ldr r3, [pc, #204] @ (800f3cc ) 800f2fe: 4a34 ldr r2, [pc, #208] @ (800f3d0 ) 800f300: 601a str r2, [r3, #0] hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 800f302: 4b32 ldr r3, [pc, #200] @ (800f3cc ) 800f304: 2200 movs r2, #0 800f306: 605a str r2, [r3, #4] hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE; 800f308: 4b30 ldr r3, [pc, #192] @ (800f3cc ) 800f30a: 2200 movs r2, #0 800f30c: 609a str r2, [r3, #8] hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; 800f30e: 4b2f ldr r3, [pc, #188] @ (800f3cc ) 800f310: 2280 movs r2, #128 @ 0x80 800f312: 60da str r2, [r3, #12] hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800f314: 4b2d ldr r3, [pc, #180] @ (800f3cc ) 800f316: 2200 movs r2, #0 800f318: 611a str r2, [r3, #16] hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 800f31a: 4b2c ldr r3, [pc, #176] @ (800f3cc ) 800f31c: 2200 movs r2, #0 800f31e: 615a str r2, [r3, #20] hdma_usart2_rx.Init.Mode = DMA_NORMAL; 800f320: 4b2a ldr r3, [pc, #168] @ (800f3cc ) 800f322: 2200 movs r2, #0 800f324: 619a str r2, [r3, #24] hdma_usart2_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH; 800f326: 4b29 ldr r3, [pc, #164] @ (800f3cc ) 800f328: f44f 5240 mov.w r2, #12288 @ 0x3000 800f32c: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) 800f32e: 4827 ldr r0, [pc, #156] @ (800f3cc ) 800f330: f001 fef4 bl 801111c 800f334: 4603 mov r3, r0 800f336: 2b00 cmp r3, #0 800f338: d001 beq.n 800f33e Error_Handler(); 800f33a: f7fb fd3b bl 800adb4 __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx); 800f33e: 687b ldr r3, [r7, #4] 800f340: 4a22 ldr r2, [pc, #136] @ (800f3cc ) 800f342: 63da str r2, [r3, #60] @ 0x3c 800f344: 4a21 ldr r2, [pc, #132] @ (800f3cc ) 800f346: 687b ldr r3, [r7, #4] 800f348: 6253 str r3, [r2, #36] @ 0x24 hdma_usart2_tx.Instance = DMA1_Channel7; 800f34a: 4b22 ldr r3, [pc, #136] @ (800f3d4 ) 800f34c: 4a22 ldr r2, [pc, #136] @ (800f3d8 ) 800f34e: 601a str r2, [r3, #0] hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 800f350: 4b20 ldr r3, [pc, #128] @ (800f3d4 ) 800f352: 2210 movs r2, #16 800f354: 605a str r2, [r3, #4] hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; 800f356: 4b1f ldr r3, [pc, #124] @ (800f3d4 ) 800f358: 2200 movs r2, #0 800f35a: 609a str r2, [r3, #8] hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; 800f35c: 4b1d ldr r3, [pc, #116] @ (800f3d4 ) 800f35e: 2280 movs r2, #128 @ 0x80 800f360: 60da str r2, [r3, #12] hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800f362: 4b1c ldr r3, [pc, #112] @ (800f3d4 ) 800f364: 2200 movs r2, #0 800f366: 611a str r2, [r3, #16] hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 800f368: 4b1a ldr r3, [pc, #104] @ (800f3d4 ) 800f36a: 2200 movs r2, #0 800f36c: 615a str r2, [r3, #20] hdma_usart2_tx.Init.Mode = DMA_NORMAL; 800f36e: 4b19 ldr r3, [pc, #100] @ (800f3d4 ) 800f370: 2200 movs r2, #0 800f372: 619a str r2, [r3, #24] hdma_usart2_tx.Init.Priority = DMA_PRIORITY_HIGH; 800f374: 4b17 ldr r3, [pc, #92] @ (800f3d4 ) 800f376: f44f 5200 mov.w r2, #8192 @ 0x2000 800f37a: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK) 800f37c: 4815 ldr r0, [pc, #84] @ (800f3d4 ) 800f37e: f001 fecd bl 801111c 800f382: 4603 mov r3, r0 800f384: 2b00 cmp r3, #0 800f386: d001 beq.n 800f38c Error_Handler(); 800f388: f7fb fd14 bl 800adb4 __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx); 800f38c: 687b ldr r3, [r7, #4] 800f38e: 4a11 ldr r2, [pc, #68] @ (800f3d4 ) 800f390: 639a str r2, [r3, #56] @ 0x38 800f392: 4a10 ldr r2, [pc, #64] @ (800f3d4 ) 800f394: 687b ldr r3, [r7, #4] 800f396: 6253 str r3, [r2, #36] @ 0x24 HAL_NVIC_SetPriority(USART2_IRQn, 2, 0); 800f398: 2200 movs r2, #0 800f39a: 2102 movs r1, #2 800f39c: 2026 movs r0, #38 @ 0x26 800f39e: f001 fe6a bl 8011076 HAL_NVIC_EnableIRQ(USART2_IRQn); 800f3a2: 2026 movs r0, #38 @ 0x26 800f3a4: f001 fe83 bl 80110ae } 800f3a8: e0b8 b.n 800f51c 800f3aa: bf00 nop 800f3ac: 40005000 .word 0x40005000 800f3b0: 40021000 .word 0x40021000 800f3b4: 40011000 .word 0x40011000 800f3b8: 40011400 .word 0x40011400 800f3bc: 40013800 .word 0x40013800 800f3c0: 40010800 .word 0x40010800 800f3c4: 40004400 .word 0x40004400 800f3c8: 40010000 .word 0x40010000 800f3cc: 200013b8 .word 0x200013b8 800f3d0: 4002006c .word 0x4002006c 800f3d4: 200013fc .word 0x200013fc 800f3d8: 40020080 .word 0x40020080 else if(uartHandle->Instance==USART3) 800f3dc: 687b ldr r3, [r7, #4] 800f3de: 681b ldr r3, [r3, #0] 800f3e0: 4a50 ldr r2, [pc, #320] @ (800f524 ) 800f3e2: 4293 cmp r3, r2 800f3e4: f040 809a bne.w 800f51c __HAL_RCC_USART3_CLK_ENABLE(); 800f3e8: 4b4f ldr r3, [pc, #316] @ (800f528 ) 800f3ea: 69db ldr r3, [r3, #28] 800f3ec: 4a4e ldr r2, [pc, #312] @ (800f528 ) 800f3ee: f443 2380 orr.w r3, r3, #262144 @ 0x40000 800f3f2: 61d3 str r3, [r2, #28] 800f3f4: 4b4c ldr r3, [pc, #304] @ (800f528 ) 800f3f6: 69db ldr r3, [r3, #28] 800f3f8: f403 2380 and.w r3, r3, #262144 @ 0x40000 800f3fc: 613b str r3, [r7, #16] 800f3fe: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOC_CLK_ENABLE(); 800f400: 4b49 ldr r3, [pc, #292] @ (800f528 ) 800f402: 699b ldr r3, [r3, #24] 800f404: 4a48 ldr r2, [pc, #288] @ (800f528 ) 800f406: f043 0310 orr.w r3, r3, #16 800f40a: 6193 str r3, [r2, #24] 800f40c: 4b46 ldr r3, [pc, #280] @ (800f528 ) 800f40e: 699b ldr r3, [r3, #24] 800f410: f003 0310 and.w r3, r3, #16 800f414: 60fb str r3, [r7, #12] 800f416: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_10; 800f418: f44f 6380 mov.w r3, #1024 @ 0x400 800f41c: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800f41e: 2302 movs r3, #2 800f420: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800f422: 2303 movs r3, #3 800f424: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800f426: f107 0330 add.w r3, r7, #48 @ 0x30 800f42a: 4619 mov r1, r3 800f42c: 483f ldr r0, [pc, #252] @ (800f52c ) 800f42e: f002 fb03 bl 8011a38 GPIO_InitStruct.Pin = GPIO_PIN_11; 800f432: f44f 6300 mov.w r3, #2048 @ 0x800 800f436: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800f438: 2300 movs r3, #0 800f43a: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800f43c: 2300 movs r3, #0 800f43e: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800f440: f107 0330 add.w r3, r7, #48 @ 0x30 800f444: 4619 mov r1, r3 800f446: 4839 ldr r0, [pc, #228] @ (800f52c ) 800f448: f002 faf6 bl 8011a38 __HAL_AFIO_REMAP_USART3_PARTIAL(); 800f44c: 4b38 ldr r3, [pc, #224] @ (800f530 ) 800f44e: 685b ldr r3, [r3, #4] 800f450: 647b str r3, [r7, #68] @ 0x44 800f452: 6c7b ldr r3, [r7, #68] @ 0x44 800f454: f023 0330 bic.w r3, r3, #48 @ 0x30 800f458: 647b str r3, [r7, #68] @ 0x44 800f45a: 6c7b ldr r3, [r7, #68] @ 0x44 800f45c: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800f460: 647b str r3, [r7, #68] @ 0x44 800f462: 6c7b ldr r3, [r7, #68] @ 0x44 800f464: f043 0310 orr.w r3, r3, #16 800f468: 647b str r3, [r7, #68] @ 0x44 800f46a: 4a31 ldr r2, [pc, #196] @ (800f530 ) 800f46c: 6c7b ldr r3, [r7, #68] @ 0x44 800f46e: 6053 str r3, [r2, #4] hdma_usart3_rx.Instance = DMA1_Channel3; 800f470: 4b30 ldr r3, [pc, #192] @ (800f534 ) 800f472: 4a31 ldr r2, [pc, #196] @ (800f538 ) 800f474: 601a str r2, [r3, #0] hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 800f476: 4b2f ldr r3, [pc, #188] @ (800f534 ) 800f478: 2200 movs r2, #0 800f47a: 605a str r2, [r3, #4] hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE; 800f47c: 4b2d ldr r3, [pc, #180] @ (800f534 ) 800f47e: 2200 movs r2, #0 800f480: 609a str r2, [r3, #8] hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE; 800f482: 4b2c ldr r3, [pc, #176] @ (800f534 ) 800f484: 2280 movs r2, #128 @ 0x80 800f486: 60da str r2, [r3, #12] hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800f488: 4b2a ldr r3, [pc, #168] @ (800f534 ) 800f48a: 2200 movs r2, #0 800f48c: 611a str r2, [r3, #16] hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 800f48e: 4b29 ldr r3, [pc, #164] @ (800f534 ) 800f490: 2200 movs r2, #0 800f492: 615a str r2, [r3, #20] hdma_usart3_rx.Init.Mode = DMA_NORMAL; 800f494: 4b27 ldr r3, [pc, #156] @ (800f534 ) 800f496: 2200 movs r2, #0 800f498: 619a str r2, [r3, #24] hdma_usart3_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH; 800f49a: 4b26 ldr r3, [pc, #152] @ (800f534 ) 800f49c: f44f 5240 mov.w r2, #12288 @ 0x3000 800f4a0: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK) 800f4a2: 4824 ldr r0, [pc, #144] @ (800f534 ) 800f4a4: f001 fe3a bl 801111c 800f4a8: 4603 mov r3, r0 800f4aa: 2b00 cmp r3, #0 800f4ac: d001 beq.n 800f4b2 Error_Handler(); 800f4ae: f7fb fc81 bl 800adb4 __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart3_rx); 800f4b2: 687b ldr r3, [r7, #4] 800f4b4: 4a1f ldr r2, [pc, #124] @ (800f534 ) 800f4b6: 63da str r2, [r3, #60] @ 0x3c 800f4b8: 4a1e ldr r2, [pc, #120] @ (800f534 ) 800f4ba: 687b ldr r3, [r7, #4] 800f4bc: 6253 str r3, [r2, #36] @ 0x24 hdma_usart3_tx.Instance = DMA1_Channel2; 800f4be: 4b1f ldr r3, [pc, #124] @ (800f53c ) 800f4c0: 4a1f ldr r2, [pc, #124] @ (800f540 ) 800f4c2: 601a str r2, [r3, #0] hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 800f4c4: 4b1d ldr r3, [pc, #116] @ (800f53c ) 800f4c6: 2210 movs r2, #16 800f4c8: 605a str r2, [r3, #4] hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE; 800f4ca: 4b1c ldr r3, [pc, #112] @ (800f53c ) 800f4cc: 2200 movs r2, #0 800f4ce: 609a str r2, [r3, #8] hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE; 800f4d0: 4b1a ldr r3, [pc, #104] @ (800f53c ) 800f4d2: 2280 movs r2, #128 @ 0x80 800f4d4: 60da str r2, [r3, #12] hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800f4d6: 4b19 ldr r3, [pc, #100] @ (800f53c ) 800f4d8: 2200 movs r2, #0 800f4da: 611a str r2, [r3, #16] hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 800f4dc: 4b17 ldr r3, [pc, #92] @ (800f53c ) 800f4de: 2200 movs r2, #0 800f4e0: 615a str r2, [r3, #20] hdma_usart3_tx.Init.Mode = DMA_NORMAL; 800f4e2: 4b16 ldr r3, [pc, #88] @ (800f53c ) 800f4e4: 2200 movs r2, #0 800f4e6: 619a str r2, [r3, #24] hdma_usart3_tx.Init.Priority = DMA_PRIORITY_HIGH; 800f4e8: 4b14 ldr r3, [pc, #80] @ (800f53c ) 800f4ea: f44f 5200 mov.w r2, #8192 @ 0x2000 800f4ee: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK) 800f4f0: 4812 ldr r0, [pc, #72] @ (800f53c ) 800f4f2: f001 fe13 bl 801111c 800f4f6: 4603 mov r3, r0 800f4f8: 2b00 cmp r3, #0 800f4fa: d001 beq.n 800f500 Error_Handler(); 800f4fc: f7fb fc5a bl 800adb4 __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart3_tx); 800f500: 687b ldr r3, [r7, #4] 800f502: 4a0e ldr r2, [pc, #56] @ (800f53c ) 800f504: 639a str r2, [r3, #56] @ 0x38 800f506: 4a0d ldr r2, [pc, #52] @ (800f53c ) 800f508: 687b ldr r3, [r7, #4] 800f50a: 6253 str r3, [r2, #36] @ 0x24 HAL_NVIC_SetPriority(USART3_IRQn, 2, 0); 800f50c: 2200 movs r2, #0 800f50e: 2102 movs r1, #2 800f510: 2027 movs r0, #39 @ 0x27 800f512: f001 fdb0 bl 8011076 HAL_NVIC_EnableIRQ(USART3_IRQn); 800f516: 2027 movs r0, #39 @ 0x27 800f518: f001 fdc9 bl 80110ae } 800f51c: bf00 nop 800f51e: 3748 adds r7, #72 @ 0x48 800f520: 46bd mov sp, r7 800f522: bd80 pop {r7, pc} 800f524: 40004800 .word 0x40004800 800f528: 40021000 .word 0x40021000 800f52c: 40011000 .word 0x40011000 800f530: 40010000 .word 0x40010000 800f534: 20001440 .word 0x20001440 800f538: 40020030 .word 0x40020030 800f53c: 20001484 .word 0x20001484 800f540: 4002001c .word 0x4002001c 0800f544 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit 800f544: f7ff fb98 bl 800ec78 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 800f548: 480b ldr r0, [pc, #44] @ (800f578 ) ldr r1, =_edata 800f54a: 490c ldr r1, [pc, #48] @ (800f57c ) ldr r2, =_sidata 800f54c: 4a0c ldr r2, [pc, #48] @ (800f580 ) movs r3, #0 800f54e: 2300 movs r3, #0 b LoopCopyDataInit 800f550: e002 b.n 800f558 0800f552 : CopyDataInit: ldr r4, [r2, r3] 800f552: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800f554: 50c4 str r4, [r0, r3] adds r3, r3, #4 800f556: 3304 adds r3, #4 0800f558 : LoopCopyDataInit: adds r4, r0, r3 800f558: 18c4 adds r4, r0, r3 cmp r4, r1 800f55a: 428c cmp r4, r1 bcc CopyDataInit 800f55c: d3f9 bcc.n 800f552 /* Zero fill the bss segment. */ ldr r2, =_sbss 800f55e: 4a09 ldr r2, [pc, #36] @ (800f584 ) ldr r4, =_ebss 800f560: 4c09 ldr r4, [pc, #36] @ (800f588 ) movs r3, #0 800f562: 2300 movs r3, #0 b LoopFillZerobss 800f564: e001 b.n 800f56a 0800f566 : FillZerobss: str r3, [r2] 800f566: 6013 str r3, [r2, #0] adds r2, r2, #4 800f568: 3204 adds r2, #4 0800f56a : LoopFillZerobss: cmp r2, r4 800f56a: 42a2 cmp r2, r4 bcc FillZerobss 800f56c: d3fb bcc.n 800f566 /* Call static constructors */ bl __libc_init_array 800f56e: f006 fdbd bl 80160ec <__libc_init_array> /* Call the application's entry point.*/ bl main 800f572: f7fb fb35 bl 800abe0
bx lr 800f576: 4770 bx lr ldr r0, =_sdata 800f578: 20000000 .word 0x20000000 ldr r1, =_edata 800f57c: 20000258 .word 0x20000258 ldr r2, =_sidata 800f580: 08019364 .word 0x08019364 ldr r2, =_sbss 800f584: 20000258 .word 0x20000258 ldr r4, =_ebss 800f588: 20001618 .word 0x20001618 0800f58c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800f58c: e7fe b.n 800f58c ... 0800f590 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 800f590: b580 push {r7, lr} 800f592: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800f594: 4b08 ldr r3, [pc, #32] @ (800f5b8 ) 800f596: 681b ldr r3, [r3, #0] 800f598: 4a07 ldr r2, [pc, #28] @ (800f5b8 ) 800f59a: f043 0310 orr.w r3, r3, #16 800f59e: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800f5a0: 2003 movs r0, #3 800f5a2: f001 fd5d bl 8011060 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 800f5a6: 200f movs r0, #15 800f5a8: f000 f808 bl 800f5bc /* Init the low level hardware */ HAL_MspInit(); 800f5ac: f7ff f98a bl 800e8c4 /* Return function status */ return HAL_OK; 800f5b0: 2300 movs r3, #0 } 800f5b2: 4618 mov r0, r3 800f5b4: bd80 pop {r7, pc} 800f5b6: bf00 nop 800f5b8: 40022000 .word 0x40022000 0800f5bc : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800f5bc: b580 push {r7, lr} 800f5be: b082 sub sp, #8 800f5c0: af00 add r7, sp, #0 800f5c2: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800f5c4: 4b12 ldr r3, [pc, #72] @ (800f610 ) 800f5c6: 681a ldr r2, [r3, #0] 800f5c8: 4b12 ldr r3, [pc, #72] @ (800f614 ) 800f5ca: 781b ldrb r3, [r3, #0] 800f5cc: 4619 mov r1, r3 800f5ce: f44f 737a mov.w r3, #1000 @ 0x3e8 800f5d2: fbb3 f3f1 udiv r3, r3, r1 800f5d6: fbb2 f3f3 udiv r3, r2, r3 800f5da: 4618 mov r0, r3 800f5dc: f001 fd75 bl 80110ca 800f5e0: 4603 mov r3, r0 800f5e2: 2b00 cmp r3, #0 800f5e4: d001 beq.n 800f5ea { return HAL_ERROR; 800f5e6: 2301 movs r3, #1 800f5e8: e00e b.n 800f608 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800f5ea: 687b ldr r3, [r7, #4] 800f5ec: 2b0f cmp r3, #15 800f5ee: d80a bhi.n 800f606 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 800f5f0: 2200 movs r2, #0 800f5f2: 6879 ldr r1, [r7, #4] 800f5f4: f04f 30ff mov.w r0, #4294967295 800f5f8: f001 fd3d bl 8011076 uwTickPrio = TickPriority; 800f5fc: 4a06 ldr r2, [pc, #24] @ (800f618 ) 800f5fe: 687b ldr r3, [r7, #4] 800f600: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 800f602: 2300 movs r3, #0 800f604: e000 b.n 800f608 return HAL_ERROR; 800f606: 2301 movs r3, #1 } 800f608: 4618 mov r0, r3 800f60a: 3708 adds r7, #8 800f60c: 46bd mov sp, r7 800f60e: bd80 pop {r7, pc} 800f610: 20000084 .word 0x20000084 800f614: 2000008c .word 0x2000008c 800f618: 20000088 .word 0x20000088 0800f61c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 800f61c: b480 push {r7} 800f61e: af00 add r7, sp, #0 uwTick += uwTickFreq; 800f620: 4b05 ldr r3, [pc, #20] @ (800f638 ) 800f622: 781b ldrb r3, [r3, #0] 800f624: 461a mov r2, r3 800f626: 4b05 ldr r3, [pc, #20] @ (800f63c ) 800f628: 681b ldr r3, [r3, #0] 800f62a: 4413 add r3, r2 800f62c: 4a03 ldr r2, [pc, #12] @ (800f63c ) 800f62e: 6013 str r3, [r2, #0] } 800f630: bf00 nop 800f632: 46bd mov sp, r7 800f634: bc80 pop {r7} 800f636: 4770 bx lr 800f638: 2000008c .word 0x2000008c 800f63c: 200014c8 .word 0x200014c8 0800f640 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 800f640: b480 push {r7} 800f642: af00 add r7, sp, #0 return uwTick; 800f644: 4b02 ldr r3, [pc, #8] @ (800f650 ) 800f646: 681b ldr r3, [r3, #0] } 800f648: 4618 mov r0, r3 800f64a: 46bd mov sp, r7 800f64c: bc80 pop {r7} 800f64e: 4770 bx lr 800f650: 200014c8 .word 0x200014c8 0800f654 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 800f654: b580 push {r7, lr} 800f656: b084 sub sp, #16 800f658: af00 add r7, sp, #0 800f65a: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 800f65c: f7ff fff0 bl 800f640 800f660: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800f662: 687b ldr r3, [r7, #4] 800f664: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800f666: 68fb ldr r3, [r7, #12] 800f668: f1b3 3fff cmp.w r3, #4294967295 800f66c: d005 beq.n 800f67a { wait += (uint32_t)(uwTickFreq); 800f66e: 4b0a ldr r3, [pc, #40] @ (800f698 ) 800f670: 781b ldrb r3, [r3, #0] 800f672: 461a mov r2, r3 800f674: 68fb ldr r3, [r7, #12] 800f676: 4413 add r3, r2 800f678: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 800f67a: bf00 nop 800f67c: f7ff ffe0 bl 800f640 800f680: 4602 mov r2, r0 800f682: 68bb ldr r3, [r7, #8] 800f684: 1ad3 subs r3, r2, r3 800f686: 68fa ldr r2, [r7, #12] 800f688: 429a cmp r2, r3 800f68a: d8f7 bhi.n 800f67c { } } 800f68c: bf00 nop 800f68e: bf00 nop 800f690: 3710 adds r7, #16 800f692: 46bd mov sp, r7 800f694: bd80 pop {r7, pc} 800f696: bf00 nop 800f698: 2000008c .word 0x2000008c 0800f69c : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 800f69c: b580 push {r7, lr} 800f69e: b086 sub sp, #24 800f6a0: af00 add r7, sp, #0 800f6a2: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800f6a4: 2300 movs r3, #0 800f6a6: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 800f6a8: 2300 movs r3, #0 800f6aa: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 800f6ac: 2300 movs r3, #0 800f6ae: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 800f6b0: 2300 movs r3, #0 800f6b2: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 800f6b4: 687b ldr r3, [r7, #4] 800f6b6: 2b00 cmp r3, #0 800f6b8: d101 bne.n 800f6be { return HAL_ERROR; 800f6ba: 2301 movs r3, #1 800f6bc: e0be b.n 800f83c assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 800f6be: 687b ldr r3, [r7, #4] 800f6c0: 689b ldr r3, [r3, #8] 800f6c2: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 800f6c4: 687b ldr r3, [r7, #4] 800f6c6: 6a9b ldr r3, [r3, #40] @ 0x28 800f6c8: 2b00 cmp r3, #0 800f6ca: d109 bne.n 800f6e0 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 800f6cc: 687b ldr r3, [r7, #4] 800f6ce: 2200 movs r2, #0 800f6d0: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 800f6d2: 687b ldr r3, [r7, #4] 800f6d4: 2200 movs r2, #0 800f6d6: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 800f6da: 6878 ldr r0, [r7, #4] 800f6dc: f7f9 ffe2 bl 80096a4 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800f6e0: 6878 ldr r0, [r7, #4] 800f6e2: f000 fbbd bl 800fe60 800f6e6: 4603 mov r3, r0 800f6e8: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 800f6ea: 687b ldr r3, [r7, #4] 800f6ec: 6a9b ldr r3, [r3, #40] @ 0x28 800f6ee: f003 0310 and.w r3, r3, #16 800f6f2: 2b00 cmp r3, #0 800f6f4: f040 8099 bne.w 800f82a 800f6f8: 7dfb ldrb r3, [r7, #23] 800f6fa: 2b00 cmp r3, #0 800f6fc: f040 8095 bne.w 800f82a (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800f700: 687b ldr r3, [r7, #4] 800f702: 6a9b ldr r3, [r3, #40] @ 0x28 800f704: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800f708: f023 0302 bic.w r3, r3, #2 800f70c: f043 0202 orr.w r2, r3, #2 800f710: 687b ldr r3, [r7, #4] 800f712: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 800f714: 687b ldr r3, [r7, #4] 800f716: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800f718: 687b ldr r3, [r7, #4] 800f71a: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 800f71c: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 800f71e: 687b ldr r3, [r7, #4] 800f720: 7b1b ldrb r3, [r3, #12] 800f722: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800f724: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 800f726: 68ba ldr r2, [r7, #8] 800f728: 4313 orrs r3, r2 800f72a: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 800f72c: 687b ldr r3, [r7, #4] 800f72e: 689b ldr r3, [r3, #8] 800f730: f5b3 7f80 cmp.w r3, #256 @ 0x100 800f734: d003 beq.n 800f73e 800f736: 687b ldr r3, [r7, #4] 800f738: 689b ldr r3, [r3, #8] 800f73a: 2b01 cmp r3, #1 800f73c: d102 bne.n 800f744 800f73e: f44f 7380 mov.w r3, #256 @ 0x100 800f742: e000 b.n 800f746 800f744: 2300 movs r3, #0 800f746: 693a ldr r2, [r7, #16] 800f748: 4313 orrs r3, r2 800f74a: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 800f74c: 687b ldr r3, [r7, #4] 800f74e: 7d1b ldrb r3, [r3, #20] 800f750: 2b01 cmp r3, #1 800f752: d119 bne.n 800f788 { if (hadc->Init.ContinuousConvMode == DISABLE) 800f754: 687b ldr r3, [r7, #4] 800f756: 7b1b ldrb r3, [r3, #12] 800f758: 2b00 cmp r3, #0 800f75a: d109 bne.n 800f770 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 800f75c: 687b ldr r3, [r7, #4] 800f75e: 699b ldr r3, [r3, #24] 800f760: 3b01 subs r3, #1 800f762: 035a lsls r2, r3, #13 800f764: 693b ldr r3, [r7, #16] 800f766: 4313 orrs r3, r2 800f768: f443 6300 orr.w r3, r3, #2048 @ 0x800 800f76c: 613b str r3, [r7, #16] 800f76e: e00b b.n 800f788 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800f770: 687b ldr r3, [r7, #4] 800f772: 6a9b ldr r3, [r3, #40] @ 0x28 800f774: f043 0220 orr.w r2, r3, #32 800f778: 687b ldr r3, [r7, #4] 800f77a: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800f77c: 687b ldr r3, [r7, #4] 800f77e: 6adb ldr r3, [r3, #44] @ 0x2c 800f780: f043 0201 orr.w r2, r3, #1 800f784: 687b ldr r3, [r7, #4] 800f786: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 800f788: 687b ldr r3, [r7, #4] 800f78a: 681b ldr r3, [r3, #0] 800f78c: 685b ldr r3, [r3, #4] 800f78e: f423 4169 bic.w r1, r3, #59648 @ 0xe900 800f792: 687b ldr r3, [r7, #4] 800f794: 681b ldr r3, [r3, #0] 800f796: 693a ldr r2, [r7, #16] 800f798: 430a orrs r2, r1 800f79a: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 800f79c: 687b ldr r3, [r7, #4] 800f79e: 681b ldr r3, [r3, #0] 800f7a0: 689a ldr r2, [r3, #8] 800f7a2: 4b28 ldr r3, [pc, #160] @ (800f844 ) 800f7a4: 4013 ands r3, r2 800f7a6: 687a ldr r2, [r7, #4] 800f7a8: 6812 ldr r2, [r2, #0] 800f7aa: 68b9 ldr r1, [r7, #8] 800f7ac: 430b orrs r3, r1 800f7ae: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 800f7b0: 687b ldr r3, [r7, #4] 800f7b2: 689b ldr r3, [r3, #8] 800f7b4: f5b3 7f80 cmp.w r3, #256 @ 0x100 800f7b8: d003 beq.n 800f7c2 800f7ba: 687b ldr r3, [r7, #4] 800f7bc: 689b ldr r3, [r3, #8] 800f7be: 2b01 cmp r3, #1 800f7c0: d104 bne.n 800f7cc { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 800f7c2: 687b ldr r3, [r7, #4] 800f7c4: 691b ldr r3, [r3, #16] 800f7c6: 3b01 subs r3, #1 800f7c8: 051b lsls r3, r3, #20 800f7ca: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 800f7cc: 687b ldr r3, [r7, #4] 800f7ce: 681b ldr r3, [r3, #0] 800f7d0: 6adb ldr r3, [r3, #44] @ 0x2c 800f7d2: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 800f7d6: 687b ldr r3, [r7, #4] 800f7d8: 681b ldr r3, [r3, #0] 800f7da: 68fa ldr r2, [r7, #12] 800f7dc: 430a orrs r2, r1 800f7de: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800f7e0: 687b ldr r3, [r7, #4] 800f7e2: 681b ldr r3, [r3, #0] 800f7e4: 689a ldr r2, [r3, #8] 800f7e6: 4b18 ldr r3, [pc, #96] @ (800f848 ) 800f7e8: 4013 ands r3, r2 800f7ea: 68ba ldr r2, [r7, #8] 800f7ec: 429a cmp r2, r3 800f7ee: d10b bne.n 800f808 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 800f7f0: 687b ldr r3, [r7, #4] 800f7f2: 2200 movs r2, #0 800f7f4: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 800f7f6: 687b ldr r3, [r7, #4] 800f7f8: 6a9b ldr r3, [r3, #40] @ 0x28 800f7fa: f023 0303 bic.w r3, r3, #3 800f7fe: f043 0201 orr.w r2, r3, #1 800f802: 687b ldr r3, [r7, #4] 800f804: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800f806: e018 b.n 800f83a HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800f808: 687b ldr r3, [r7, #4] 800f80a: 6a9b ldr r3, [r3, #40] @ 0x28 800f80c: f023 0312 bic.w r3, r3, #18 800f810: f043 0210 orr.w r2, r3, #16 800f814: 687b ldr r3, [r7, #4] 800f816: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800f818: 687b ldr r3, [r7, #4] 800f81a: 6adb ldr r3, [r3, #44] @ 0x2c 800f81c: f043 0201 orr.w r2, r3, #1 800f820: 687b ldr r3, [r7, #4] 800f822: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 800f824: 2301 movs r3, #1 800f826: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800f828: e007 b.n 800f83a } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800f82a: 687b ldr r3, [r7, #4] 800f82c: 6a9b ldr r3, [r3, #40] @ 0x28 800f82e: f043 0210 orr.w r2, r3, #16 800f832: 687b ldr r3, [r7, #4] 800f834: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 800f836: 2301 movs r3, #1 800f838: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 800f83a: 7dfb ldrb r3, [r7, #23] } 800f83c: 4618 mov r0, r3 800f83e: 3718 adds r7, #24 800f840: 46bd mov sp, r7 800f842: bd80 pop {r7, pc} 800f844: ffe1f7fd .word 0xffe1f7fd 800f848: ff1f0efe .word 0xff1f0efe 0800f84c : * @param pData: The destination Buffer address. * @param Length: The length of data to be transferred from ADC peripheral to memory. * @retval None */ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) { 800f84c: b580 push {r7, lr} 800f84e: b086 sub sp, #24 800f850: af00 add r7, sp, #0 800f852: 60f8 str r0, [r7, #12] 800f854: 60b9 str r1, [r7, #8] 800f856: 607a str r2, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800f858: 2300 movs r3, #0 800f85a: 75fb strb r3, [r7, #23] assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance)); /* Verification if multimode is disabled (for devices with several ADC) */ /* If multimode is enabled, dedicated function multimode conversion */ /* start DMA must be used. */ if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 800f85c: 68fb ldr r3, [r7, #12] 800f85e: 681b ldr r3, [r3, #0] 800f860: 4a64 ldr r2, [pc, #400] @ (800f9f4 ) 800f862: 4293 cmp r3, r2 800f864: d004 beq.n 800f870 800f866: 68fb ldr r3, [r7, #12] 800f868: 681b ldr r3, [r3, #0] 800f86a: 4a63 ldr r2, [pc, #396] @ (800f9f8 ) 800f86c: 4293 cmp r3, r2 800f86e: d106 bne.n 800f87e 800f870: 4b60 ldr r3, [pc, #384] @ (800f9f4 ) 800f872: 685b ldr r3, [r3, #4] 800f874: f403 2370 and.w r3, r3, #983040 @ 0xf0000 800f878: 2b00 cmp r3, #0 800f87a: f040 80b3 bne.w 800f9e4 { /* Process locked */ __HAL_LOCK(hadc); 800f87e: 68fb ldr r3, [r7, #12] 800f880: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800f884: 2b01 cmp r3, #1 800f886: d101 bne.n 800f88c 800f888: 2302 movs r3, #2 800f88a: e0ae b.n 800f9ea 800f88c: 68fb ldr r3, [r7, #12] 800f88e: 2201 movs r2, #1 800f890: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 800f894: 68f8 ldr r0, [r7, #12] 800f896: f000 fa89 bl 800fdac 800f89a: 4603 mov r3, r0 800f89c: 75fb strb r3, [r7, #23] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 800f89e: 7dfb ldrb r3, [r7, #23] 800f8a0: 2b00 cmp r3, #0 800f8a2: f040 809a bne.w 800f9da { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 800f8a6: 68fb ldr r3, [r7, #12] 800f8a8: 6a9b ldr r3, [r3, #40] @ 0x28 800f8aa: f423 6370 bic.w r3, r3, #3840 @ 0xf00 800f8ae: f023 0301 bic.w r3, r3, #1 800f8b2: f443 7280 orr.w r2, r3, #256 @ 0x100 800f8b6: 68fb ldr r3, [r7, #12] 800f8b8: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 800f8ba: 68fb ldr r3, [r7, #12] 800f8bc: 681b ldr r3, [r3, #0] 800f8be: 4a4e ldr r2, [pc, #312] @ (800f9f8 ) 800f8c0: 4293 cmp r3, r2 800f8c2: d105 bne.n 800f8d0 800f8c4: 4b4b ldr r3, [pc, #300] @ (800f9f4 ) 800f8c6: 685b ldr r3, [r3, #4] 800f8c8: f403 2370 and.w r3, r3, #983040 @ 0xf0000 800f8cc: 2b00 cmp r3, #0 800f8ce: d115 bne.n 800f8fc { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800f8d0: 68fb ldr r3, [r7, #12] 800f8d2: 6a9b ldr r3, [r3, #40] @ 0x28 800f8d4: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 800f8d8: 68fb ldr r3, [r7, #12] 800f8da: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800f8dc: 68fb ldr r3, [r7, #12] 800f8de: 681b ldr r3, [r3, #0] 800f8e0: 685b ldr r3, [r3, #4] 800f8e2: f403 6380 and.w r3, r3, #1024 @ 0x400 800f8e6: 2b00 cmp r3, #0 800f8e8: d026 beq.n 800f938 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800f8ea: 68fb ldr r3, [r7, #12] 800f8ec: 6a9b ldr r3, [r3, #40] @ 0x28 800f8ee: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800f8f2: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800f8f6: 68fb ldr r3, [r7, #12] 800f8f8: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800f8fa: e01d b.n 800f938 } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800f8fc: 68fb ldr r3, [r7, #12] 800f8fe: 6a9b ldr r3, [r3, #40] @ 0x28 800f900: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800f904: 68fb ldr r3, [r7, #12] 800f906: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 800f908: 68fb ldr r3, [r7, #12] 800f90a: 681b ldr r3, [r3, #0] 800f90c: 4a39 ldr r2, [pc, #228] @ (800f9f4 ) 800f90e: 4293 cmp r3, r2 800f910: d004 beq.n 800f91c 800f912: 68fb ldr r3, [r7, #12] 800f914: 681b ldr r3, [r3, #0] 800f916: 4a38 ldr r2, [pc, #224] @ (800f9f8 ) 800f918: 4293 cmp r3, r2 800f91a: d10d bne.n 800f938 800f91c: 4b35 ldr r3, [pc, #212] @ (800f9f4 ) 800f91e: 685b ldr r3, [r3, #4] 800f920: f403 6380 and.w r3, r3, #1024 @ 0x400 800f924: 2b00 cmp r3, #0 800f926: d007 beq.n 800f938 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800f928: 68fb ldr r3, [r7, #12] 800f92a: 6a9b ldr r3, [r3, #40] @ 0x28 800f92c: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800f930: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800f934: 68fb ldr r3, [r7, #12] 800f936: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800f938: 68fb ldr r3, [r7, #12] 800f93a: 6a9b ldr r3, [r3, #40] @ 0x28 800f93c: f403 5380 and.w r3, r3, #4096 @ 0x1000 800f940: 2b00 cmp r3, #0 800f942: d006 beq.n 800f952 { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 800f944: 68fb ldr r3, [r7, #12] 800f946: 6adb ldr r3, [r3, #44] @ 0x2c 800f948: f023 0206 bic.w r2, r3, #6 800f94c: 68fb ldr r3, [r7, #12] 800f94e: 62da str r2, [r3, #44] @ 0x2c 800f950: e002 b.n 800f958 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 800f952: 68fb ldr r3, [r7, #12] 800f954: 2200 movs r2, #0 800f956: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 800f958: 68fb ldr r3, [r7, #12] 800f95a: 2200 movs r2, #0 800f95c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Set the DMA transfer complete callback */ hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 800f960: 68fb ldr r3, [r7, #12] 800f962: 6a1b ldr r3, [r3, #32] 800f964: 4a25 ldr r2, [pc, #148] @ (800f9fc ) 800f966: 629a str r2, [r3, #40] @ 0x28 /* Set the DMA half transfer complete callback */ hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 800f968: 68fb ldr r3, [r7, #12] 800f96a: 6a1b ldr r3, [r3, #32] 800f96c: 4a24 ldr r2, [pc, #144] @ (800fa00 ) 800f96e: 62da str r2, [r3, #44] @ 0x2c /* Set the DMA error callback */ hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 800f970: 68fb ldr r3, [r7, #12] 800f972: 6a1b ldr r3, [r3, #32] 800f974: 4a23 ldr r2, [pc, #140] @ (800fa04 ) 800f976: 631a str r2, [r3, #48] @ 0x30 /* start (in case of SW start): */ /* Clear regular group conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC */ /* operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 800f978: 68fb ldr r3, [r7, #12] 800f97a: 681b ldr r3, [r3, #0] 800f97c: f06f 0202 mvn.w r2, #2 800f980: 601a str r2, [r3, #0] /* Enable ADC DMA mode */ SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA); 800f982: 68fb ldr r3, [r7, #12] 800f984: 681b ldr r3, [r3, #0] 800f986: 689a ldr r2, [r3, #8] 800f988: 68fb ldr r3, [r7, #12] 800f98a: 681b ldr r3, [r3, #0] 800f98c: f442 7280 orr.w r2, r2, #256 @ 0x100 800f990: 609a str r2, [r3, #8] /* Start the DMA channel */ HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 800f992: 68fb ldr r3, [r7, #12] 800f994: 6a18 ldr r0, [r3, #32] 800f996: 68fb ldr r3, [r7, #12] 800f998: 681b ldr r3, [r3, #0] 800f99a: 334c adds r3, #76 @ 0x4c 800f99c: 4619 mov r1, r3 800f99e: 68ba ldr r2, [r7, #8] 800f9a0: 687b ldr r3, [r7, #4] 800f9a2: f001 fc31 bl 8011208 /* Enable conversion of regular group. */ /* If software start has been selected, conversion starts immediately. */ /* If external trigger has been selected, conversion will start at next */ /* trigger event. */ if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) 800f9a6: 68fb ldr r3, [r7, #12] 800f9a8: 681b ldr r3, [r3, #0] 800f9aa: 689b ldr r3, [r3, #8] 800f9ac: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800f9b0: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800f9b4: d108 bne.n 800f9c8 { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 800f9b6: 68fb ldr r3, [r7, #12] 800f9b8: 681b ldr r3, [r3, #0] 800f9ba: 689a ldr r2, [r3, #8] 800f9bc: 68fb ldr r3, [r7, #12] 800f9be: 681b ldr r3, [r3, #0] 800f9c0: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 800f9c4: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 800f9c6: e00f b.n 800f9e8 } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 800f9c8: 68fb ldr r3, [r7, #12] 800f9ca: 681b ldr r3, [r3, #0] 800f9cc: 689a ldr r2, [r3, #8] 800f9ce: 68fb ldr r3, [r7, #12] 800f9d0: 681b ldr r3, [r3, #0] 800f9d2: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 800f9d6: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 800f9d8: e006 b.n 800f9e8 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 800f9da: 68fb ldr r3, [r7, #12] 800f9dc: 2200 movs r2, #0 800f9de: f883 2024 strb.w r2, [r3, #36] @ 0x24 if (tmp_hal_status == HAL_OK) 800f9e2: e001 b.n 800f9e8 } } else { tmp_hal_status = HAL_ERROR; 800f9e4: 2301 movs r3, #1 800f9e6: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 800f9e8: 7dfb ldrb r3, [r7, #23] } 800f9ea: 4618 mov r0, r3 800f9ec: 3718 adds r7, #24 800f9ee: 46bd mov sp, r7 800f9f0: bd80 pop {r7, pc} 800f9f2: bf00 nop 800f9f4: 40012400 .word 0x40012400 800f9f8: 40012800 .word 0x40012800 800f9fc: 0800fee3 .word 0x0800fee3 800fa00: 0800ff5f .word 0x0800ff5f 800fa04: 0800ff7b .word 0x0800ff7b 0800fa08 : * @brief Handles ADC interrupt request * @param hadc: ADC handle * @retval None */ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) { 800fa08: b580 push {r7, lr} 800fa0a: b084 sub sp, #16 800fa0c: af00 add r7, sp, #0 800fa0e: 6078 str r0, [r7, #4] uint32_t tmp_sr = hadc->Instance->SR; 800fa10: 687b ldr r3, [r7, #4] 800fa12: 681b ldr r3, [r3, #0] 800fa14: 681b ldr r3, [r3, #0] 800fa16: 60fb str r3, [r7, #12] uint32_t tmp_cr1 = hadc->Instance->CR1; 800fa18: 687b ldr r3, [r7, #4] 800fa1a: 681b ldr r3, [r3, #0] 800fa1c: 685b ldr r3, [r3, #4] 800fa1e: 60bb str r3, [r7, #8] assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion)); /* ========== Check End of Conversion flag for regular group ========== */ if((tmp_cr1 & ADC_IT_EOC) == ADC_IT_EOC) 800fa20: 68bb ldr r3, [r7, #8] 800fa22: f003 0320 and.w r3, r3, #32 800fa26: 2b00 cmp r3, #0 800fa28: d03e beq.n 800faa8 { if((tmp_sr & ADC_FLAG_EOC) == ADC_FLAG_EOC) 800fa2a: 68fb ldr r3, [r7, #12] 800fa2c: f003 0302 and.w r3, r3, #2 800fa30: 2b00 cmp r3, #0 800fa32: d039 beq.n 800faa8 { /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) 800fa34: 687b ldr r3, [r7, #4] 800fa36: 6a9b ldr r3, [r3, #40] @ 0x28 800fa38: f003 0310 and.w r3, r3, #16 800fa3c: 2b00 cmp r3, #0 800fa3e: d105 bne.n 800fa4c { /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 800fa40: 687b ldr r3, [r7, #4] 800fa42: 6a9b ldr r3, [r3, #40] @ 0x28 800fa44: f443 7200 orr.w r2, r3, #512 @ 0x200 800fa48: 687b ldr r3, [r7, #4] 800fa4a: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800fa4c: 687b ldr r3, [r7, #4] 800fa4e: 681b ldr r3, [r3, #0] 800fa50: 689b ldr r3, [r3, #8] 800fa52: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800fa56: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800fa5a: d11d bne.n 800fa98 (hadc->Init.ContinuousConvMode == DISABLE) ) 800fa5c: 687b ldr r3, [r7, #4] 800fa5e: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800fa60: 2b00 cmp r3, #0 800fa62: d119 bne.n 800fa98 { /* Disable ADC end of conversion interrupt on group regular */ __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); 800fa64: 687b ldr r3, [r7, #4] 800fa66: 681b ldr r3, [r3, #0] 800fa68: 685a ldr r2, [r3, #4] 800fa6a: 687b ldr r3, [r7, #4] 800fa6c: 681b ldr r3, [r3, #0] 800fa6e: f022 0220 bic.w r2, r2, #32 800fa72: 605a str r2, [r3, #4] /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 800fa74: 687b ldr r3, [r7, #4] 800fa76: 6a9b ldr r3, [r3, #40] @ 0x28 800fa78: f423 7280 bic.w r2, r3, #256 @ 0x100 800fa7c: 687b ldr r3, [r7, #4] 800fa7e: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800fa80: 687b ldr r3, [r7, #4] 800fa82: 6a9b ldr r3, [r3, #40] @ 0x28 800fa84: f403 5380 and.w r3, r3, #4096 @ 0x1000 800fa88: 2b00 cmp r3, #0 800fa8a: d105 bne.n 800fa98 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 800fa8c: 687b ldr r3, [r7, #4] 800fa8e: 6a9b ldr r3, [r3, #40] @ 0x28 800fa90: f043 0201 orr.w r2, r3, #1 800fa94: 687b ldr r3, [r7, #4] 800fa96: 629a str r2, [r3, #40] @ 0x28 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvCpltCallback(hadc); #else HAL_ADC_ConvCpltCallback(hadc); 800fa98: 6878 ldr r0, [r7, #4] 800fa9a: f7f9 fd57 bl 800954c #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Clear regular group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC); 800fa9e: 687b ldr r3, [r7, #4] 800faa0: 681b ldr r3, [r3, #0] 800faa2: f06f 0212 mvn.w r2, #18 800faa6: 601a str r2, [r3, #0] } } /* ========== Check End of Conversion flag for injected group ========== */ if((tmp_cr1 & ADC_IT_JEOC) == ADC_IT_JEOC) 800faa8: 68bb ldr r3, [r7, #8] 800faaa: f003 0380 and.w r3, r3, #128 @ 0x80 800faae: 2b00 cmp r3, #0 800fab0: d04d beq.n 800fb4e { if((tmp_sr & ADC_FLAG_JEOC) == ADC_FLAG_JEOC) 800fab2: 68fb ldr r3, [r7, #12] 800fab4: f003 0304 and.w r3, r3, #4 800fab8: 2b00 cmp r3, #0 800faba: d048 beq.n 800fb4e { /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) 800fabc: 687b ldr r3, [r7, #4] 800fabe: 6a9b ldr r3, [r3, #40] @ 0x28 800fac0: f003 0310 and.w r3, r3, #16 800fac4: 2b00 cmp r3, #0 800fac6: d105 bne.n 800fad4 { /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); 800fac8: 687b ldr r3, [r7, #4] 800faca: 6a9b ldr r3, [r3, #40] @ 0x28 800facc: f443 5200 orr.w r2, r3, #8192 @ 0x2000 800fad0: 687b ldr r3, [r7, #4] 800fad2: 629a str r2, [r3, #40] @ 0x28 /* conversion from group regular (same conditions as group regular */ /* interruption disabling above). */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_INJECTED(hadc) || 800fad4: 687b ldr r3, [r7, #4] 800fad6: 681b ldr r3, [r3, #0] 800fad8: 689b ldr r3, [r3, #8] 800fada: f403 43e0 and.w r3, r3, #28672 @ 0x7000 800fade: f5b3 4fe0 cmp.w r3, #28672 @ 0x7000 800fae2: d012 beq.n 800fb0a (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) && 800fae4: 687b ldr r3, [r7, #4] 800fae6: 681b ldr r3, [r3, #0] 800fae8: 685b ldr r3, [r3, #4] 800faea: f403 6380 and.w r3, r3, #1024 @ 0x400 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) || 800faee: 2b00 cmp r3, #0 800faf0: d125 bne.n 800fb3e (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800faf2: 687b ldr r3, [r7, #4] 800faf4: 681b ldr r3, [r3, #0] 800faf6: 689b ldr r3, [r3, #8] 800faf8: f403 2360 and.w r3, r3, #917504 @ 0xe0000 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) && 800fafc: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800fb00: d11d bne.n 800fb3e (hadc->Init.ContinuousConvMode == DISABLE) ) ) ) 800fb02: 687b ldr r3, [r7, #4] 800fb04: 7b1b ldrb r3, [r3, #12] (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800fb06: 2b00 cmp r3, #0 800fb08: d119 bne.n 800fb3e { /* Disable ADC end of conversion interrupt on group injected */ __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); 800fb0a: 687b ldr r3, [r7, #4] 800fb0c: 681b ldr r3, [r3, #0] 800fb0e: 685a ldr r2, [r3, #4] 800fb10: 687b ldr r3, [r7, #4] 800fb12: 681b ldr r3, [r3, #0] 800fb14: f022 0280 bic.w r2, r2, #128 @ 0x80 800fb18: 605a str r2, [r3, #4] /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 800fb1a: 687b ldr r3, [r7, #4] 800fb1c: 6a9b ldr r3, [r3, #40] @ 0x28 800fb1e: f423 5280 bic.w r2, r3, #4096 @ 0x1000 800fb22: 687b ldr r3, [r7, #4] 800fb24: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) 800fb26: 687b ldr r3, [r7, #4] 800fb28: 6a9b ldr r3, [r3, #40] @ 0x28 800fb2a: f403 7380 and.w r3, r3, #256 @ 0x100 800fb2e: 2b00 cmp r3, #0 800fb30: d105 bne.n 800fb3e { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 800fb32: 687b ldr r3, [r7, #4] 800fb34: 6a9b ldr r3, [r3, #40] @ 0x28 800fb36: f043 0201 orr.w r2, r3, #1 800fb3a: 687b ldr r3, [r7, #4] 800fb3c: 629a str r2, [r3, #40] @ 0x28 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->InjectedConvCpltCallback(hadc); #else HAL_ADCEx_InjectedConvCpltCallback(hadc); 800fb3e: 6878 ldr r0, [r7, #4] 800fb40: f000 fae4 bl 801010c #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Clear injected group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC)); 800fb44: 687b ldr r3, [r7, #4] 800fb46: 681b ldr r3, [r3, #0] 800fb48: f06f 020c mvn.w r2, #12 800fb4c: 601a str r2, [r3, #0] } } /* ========== Check Analog watchdog flags ========== */ if((tmp_cr1 & ADC_IT_AWD) == ADC_IT_AWD) 800fb4e: 68bb ldr r3, [r7, #8] 800fb50: f003 0340 and.w r3, r3, #64 @ 0x40 800fb54: 2b00 cmp r3, #0 800fb56: d012 beq.n 800fb7e { if((tmp_sr & ADC_FLAG_AWD) == ADC_FLAG_AWD) 800fb58: 68fb ldr r3, [r7, #12] 800fb5a: f003 0301 and.w r3, r3, #1 800fb5e: 2b00 cmp r3, #0 800fb60: d00d beq.n 800fb7e { /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); 800fb62: 687b ldr r3, [r7, #4] 800fb64: 6a9b ldr r3, [r3, #40] @ 0x28 800fb66: f443 3280 orr.w r2, r3, #65536 @ 0x10000 800fb6a: 687b ldr r3, [r7, #4] 800fb6c: 629a str r2, [r3, #40] @ 0x28 /* Level out of window callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->LevelOutOfWindowCallback(hadc); #else HAL_ADC_LevelOutOfWindowCallback(hadc); 800fb6e: 6878 ldr r0, [r7, #4] 800fb70: f000 f812 bl 800fb98 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Clear the ADC analog watchdog flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); 800fb74: 687b ldr r3, [r7, #4] 800fb76: 681b ldr r3, [r3, #0] 800fb78: f06f 0201 mvn.w r2, #1 800fb7c: 601a str r2, [r3, #0] } } } 800fb7e: bf00 nop 800fb80: 3710 adds r7, #16 800fb82: 46bd mov sp, r7 800fb84: bd80 pop {r7, pc} 0800fb86 : * @brief Conversion DMA half-transfer callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) { 800fb86: b480 push {r7} 800fb88: b083 sub sp, #12 800fb8a: af00 add r7, sp, #0 800fb8c: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. */ } 800fb8e: bf00 nop 800fb90: 370c adds r7, #12 800fb92: 46bd mov sp, r7 800fb94: bc80 pop {r7} 800fb96: 4770 bx lr 0800fb98 : * @brief Analog watchdog callback in non blocking mode. * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) { 800fb98: b480 push {r7} 800fb9a: b083 sub sp, #12 800fb9c: af00 add r7, sp, #0 800fb9e: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file. */ } 800fba0: bf00 nop 800fba2: 370c adds r7, #12 800fba4: 46bd mov sp, r7 800fba6: bc80 pop {r7} 800fba8: 4770 bx lr 0800fbaa : * (ADC conversion with interruption or transfer by DMA) * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) { 800fbaa: b480 push {r7} 800fbac: b083 sub sp, #12 800fbae: af00 add r7, sp, #0 800fbb0: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ErrorCallback must be implemented in the user file. */ } 800fbb2: bf00 nop 800fbb4: 370c adds r7, #12 800fbb6: 46bd mov sp, r7 800fbb8: bc80 pop {r7} 800fbba: 4770 bx lr 0800fbbc : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 800fbbc: b480 push {r7} 800fbbe: b085 sub sp, #20 800fbc0: af00 add r7, sp, #0 800fbc2: 6078 str r0, [r7, #4] 800fbc4: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800fbc6: 2300 movs r3, #0 800fbc8: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 800fbca: 2300 movs r3, #0 800fbcc: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 800fbce: 687b ldr r3, [r7, #4] 800fbd0: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800fbd4: 2b01 cmp r3, #1 800fbd6: d101 bne.n 800fbdc 800fbd8: 2302 movs r3, #2 800fbda: e0dc b.n 800fd96 800fbdc: 687b ldr r3, [r7, #4] 800fbde: 2201 movs r2, #1 800fbe0: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 800fbe4: 683b ldr r3, [r7, #0] 800fbe6: 685b ldr r3, [r3, #4] 800fbe8: 2b06 cmp r3, #6 800fbea: d81c bhi.n 800fc26 { MODIFY_REG(hadc->Instance->SQR3 , 800fbec: 687b ldr r3, [r7, #4] 800fbee: 681b ldr r3, [r3, #0] 800fbf0: 6b59 ldr r1, [r3, #52] @ 0x34 800fbf2: 683b ldr r3, [r7, #0] 800fbf4: 685a ldr r2, [r3, #4] 800fbf6: 4613 mov r3, r2 800fbf8: 009b lsls r3, r3, #2 800fbfa: 4413 add r3, r2 800fbfc: 3b05 subs r3, #5 800fbfe: 221f movs r2, #31 800fc00: fa02 f303 lsl.w r3, r2, r3 800fc04: 43db mvns r3, r3 800fc06: 4019 ands r1, r3 800fc08: 683b ldr r3, [r7, #0] 800fc0a: 6818 ldr r0, [r3, #0] 800fc0c: 683b ldr r3, [r7, #0] 800fc0e: 685a ldr r2, [r3, #4] 800fc10: 4613 mov r3, r2 800fc12: 009b lsls r3, r3, #2 800fc14: 4413 add r3, r2 800fc16: 3b05 subs r3, #5 800fc18: fa00 f203 lsl.w r2, r0, r3 800fc1c: 687b ldr r3, [r7, #4] 800fc1e: 681b ldr r3, [r3, #0] 800fc20: 430a orrs r2, r1 800fc22: 635a str r2, [r3, #52] @ 0x34 800fc24: e03c b.n 800fca0 ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 800fc26: 683b ldr r3, [r7, #0] 800fc28: 685b ldr r3, [r3, #4] 800fc2a: 2b0c cmp r3, #12 800fc2c: d81c bhi.n 800fc68 { MODIFY_REG(hadc->Instance->SQR2 , 800fc2e: 687b ldr r3, [r7, #4] 800fc30: 681b ldr r3, [r3, #0] 800fc32: 6b19 ldr r1, [r3, #48] @ 0x30 800fc34: 683b ldr r3, [r7, #0] 800fc36: 685a ldr r2, [r3, #4] 800fc38: 4613 mov r3, r2 800fc3a: 009b lsls r3, r3, #2 800fc3c: 4413 add r3, r2 800fc3e: 3b23 subs r3, #35 @ 0x23 800fc40: 221f movs r2, #31 800fc42: fa02 f303 lsl.w r3, r2, r3 800fc46: 43db mvns r3, r3 800fc48: 4019 ands r1, r3 800fc4a: 683b ldr r3, [r7, #0] 800fc4c: 6818 ldr r0, [r3, #0] 800fc4e: 683b ldr r3, [r7, #0] 800fc50: 685a ldr r2, [r3, #4] 800fc52: 4613 mov r3, r2 800fc54: 009b lsls r3, r3, #2 800fc56: 4413 add r3, r2 800fc58: 3b23 subs r3, #35 @ 0x23 800fc5a: fa00 f203 lsl.w r2, r0, r3 800fc5e: 687b ldr r3, [r7, #4] 800fc60: 681b ldr r3, [r3, #0] 800fc62: 430a orrs r2, r1 800fc64: 631a str r2, [r3, #48] @ 0x30 800fc66: e01b b.n 800fca0 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 800fc68: 687b ldr r3, [r7, #4] 800fc6a: 681b ldr r3, [r3, #0] 800fc6c: 6ad9 ldr r1, [r3, #44] @ 0x2c 800fc6e: 683b ldr r3, [r7, #0] 800fc70: 685a ldr r2, [r3, #4] 800fc72: 4613 mov r3, r2 800fc74: 009b lsls r3, r3, #2 800fc76: 4413 add r3, r2 800fc78: 3b41 subs r3, #65 @ 0x41 800fc7a: 221f movs r2, #31 800fc7c: fa02 f303 lsl.w r3, r2, r3 800fc80: 43db mvns r3, r3 800fc82: 4019 ands r1, r3 800fc84: 683b ldr r3, [r7, #0] 800fc86: 6818 ldr r0, [r3, #0] 800fc88: 683b ldr r3, [r7, #0] 800fc8a: 685a ldr r2, [r3, #4] 800fc8c: 4613 mov r3, r2 800fc8e: 009b lsls r3, r3, #2 800fc90: 4413 add r3, r2 800fc92: 3b41 subs r3, #65 @ 0x41 800fc94: fa00 f203 lsl.w r2, r0, r3 800fc98: 687b ldr r3, [r7, #4] 800fc9a: 681b ldr r3, [r3, #0] 800fc9c: 430a orrs r2, r1 800fc9e: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 800fca0: 683b ldr r3, [r7, #0] 800fca2: 681b ldr r3, [r3, #0] 800fca4: 2b09 cmp r3, #9 800fca6: d91c bls.n 800fce2 { MODIFY_REG(hadc->Instance->SMPR1 , 800fca8: 687b ldr r3, [r7, #4] 800fcaa: 681b ldr r3, [r3, #0] 800fcac: 68d9 ldr r1, [r3, #12] 800fcae: 683b ldr r3, [r7, #0] 800fcb0: 681a ldr r2, [r3, #0] 800fcb2: 4613 mov r3, r2 800fcb4: 005b lsls r3, r3, #1 800fcb6: 4413 add r3, r2 800fcb8: 3b1e subs r3, #30 800fcba: 2207 movs r2, #7 800fcbc: fa02 f303 lsl.w r3, r2, r3 800fcc0: 43db mvns r3, r3 800fcc2: 4019 ands r1, r3 800fcc4: 683b ldr r3, [r7, #0] 800fcc6: 6898 ldr r0, [r3, #8] 800fcc8: 683b ldr r3, [r7, #0] 800fcca: 681a ldr r2, [r3, #0] 800fccc: 4613 mov r3, r2 800fcce: 005b lsls r3, r3, #1 800fcd0: 4413 add r3, r2 800fcd2: 3b1e subs r3, #30 800fcd4: fa00 f203 lsl.w r2, r0, r3 800fcd8: 687b ldr r3, [r7, #4] 800fcda: 681b ldr r3, [r3, #0] 800fcdc: 430a orrs r2, r1 800fcde: 60da str r2, [r3, #12] 800fce0: e019 b.n 800fd16 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 800fce2: 687b ldr r3, [r7, #4] 800fce4: 681b ldr r3, [r3, #0] 800fce6: 6919 ldr r1, [r3, #16] 800fce8: 683b ldr r3, [r7, #0] 800fcea: 681a ldr r2, [r3, #0] 800fcec: 4613 mov r3, r2 800fcee: 005b lsls r3, r3, #1 800fcf0: 4413 add r3, r2 800fcf2: 2207 movs r2, #7 800fcf4: fa02 f303 lsl.w r3, r2, r3 800fcf8: 43db mvns r3, r3 800fcfa: 4019 ands r1, r3 800fcfc: 683b ldr r3, [r7, #0] 800fcfe: 6898 ldr r0, [r3, #8] 800fd00: 683b ldr r3, [r7, #0] 800fd02: 681a ldr r2, [r3, #0] 800fd04: 4613 mov r3, r2 800fd06: 005b lsls r3, r3, #1 800fd08: 4413 add r3, r2 800fd0a: fa00 f203 lsl.w r2, r0, r3 800fd0e: 687b ldr r3, [r7, #4] 800fd10: 681b ldr r3, [r3, #0] 800fd12: 430a orrs r2, r1 800fd14: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800fd16: 683b ldr r3, [r7, #0] 800fd18: 681b ldr r3, [r3, #0] 800fd1a: 2b10 cmp r3, #16 800fd1c: d003 beq.n 800fd26 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 800fd1e: 683b ldr r3, [r7, #0] 800fd20: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800fd22: 2b11 cmp r3, #17 800fd24: d132 bne.n 800fd8c { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 800fd26: 687b ldr r3, [r7, #4] 800fd28: 681b ldr r3, [r3, #0] 800fd2a: 4a1d ldr r2, [pc, #116] @ (800fda0 ) 800fd2c: 4293 cmp r3, r2 800fd2e: d125 bne.n 800fd7c { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 800fd30: 687b ldr r3, [r7, #4] 800fd32: 681b ldr r3, [r3, #0] 800fd34: 689b ldr r3, [r3, #8] 800fd36: f403 0300 and.w r3, r3, #8388608 @ 0x800000 800fd3a: 2b00 cmp r3, #0 800fd3c: d126 bne.n 800fd8c { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 800fd3e: 687b ldr r3, [r7, #4] 800fd40: 681b ldr r3, [r3, #0] 800fd42: 689a ldr r2, [r3, #8] 800fd44: 687b ldr r3, [r7, #4] 800fd46: 681b ldr r3, [r3, #0] 800fd48: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 800fd4c: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 800fd4e: 683b ldr r3, [r7, #0] 800fd50: 681b ldr r3, [r3, #0] 800fd52: 2b10 cmp r3, #16 800fd54: d11a bne.n 800fd8c { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 800fd56: 4b13 ldr r3, [pc, #76] @ (800fda4 ) 800fd58: 681b ldr r3, [r3, #0] 800fd5a: 4a13 ldr r2, [pc, #76] @ (800fda8 ) 800fd5c: fba2 2303 umull r2, r3, r2, r3 800fd60: 0c9a lsrs r2, r3, #18 800fd62: 4613 mov r3, r2 800fd64: 009b lsls r3, r3, #2 800fd66: 4413 add r3, r2 800fd68: 005b lsls r3, r3, #1 800fd6a: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800fd6c: e002 b.n 800fd74 { wait_loop_index--; 800fd6e: 68bb ldr r3, [r7, #8] 800fd70: 3b01 subs r3, #1 800fd72: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800fd74: 68bb ldr r3, [r7, #8] 800fd76: 2b00 cmp r3, #0 800fd78: d1f9 bne.n 800fd6e 800fd7a: e007 b.n 800fd8c } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800fd7c: 687b ldr r3, [r7, #4] 800fd7e: 6a9b ldr r3, [r3, #40] @ 0x28 800fd80: f043 0220 orr.w r2, r3, #32 800fd84: 687b ldr r3, [r7, #4] 800fd86: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 800fd88: 2301 movs r3, #1 800fd8a: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 800fd8c: 687b ldr r3, [r7, #4] 800fd8e: 2200 movs r2, #0 800fd90: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800fd94: 7bfb ldrb r3, [r7, #15] } 800fd96: 4618 mov r0, r3 800fd98: 3714 adds r7, #20 800fd9a: 46bd mov sp, r7 800fd9c: bc80 pop {r7} 800fd9e: 4770 bx lr 800fda0: 40012400 .word 0x40012400 800fda4: 20000084 .word 0x20000084 800fda8: 431bde83 .word 0x431bde83 0800fdac : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 800fdac: b580 push {r7, lr} 800fdae: b084 sub sp, #16 800fdb0: af00 add r7, sp, #0 800fdb2: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800fdb4: 2300 movs r3, #0 800fdb6: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 800fdb8: 2300 movs r3, #0 800fdba: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 800fdbc: 687b ldr r3, [r7, #4] 800fdbe: 681b ldr r3, [r3, #0] 800fdc0: 689b ldr r3, [r3, #8] 800fdc2: f003 0301 and.w r3, r3, #1 800fdc6: 2b01 cmp r3, #1 800fdc8: d040 beq.n 800fe4c { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 800fdca: 687b ldr r3, [r7, #4] 800fdcc: 681b ldr r3, [r3, #0] 800fdce: 689a ldr r2, [r3, #8] 800fdd0: 687b ldr r3, [r7, #4] 800fdd2: 681b ldr r3, [r3, #0] 800fdd4: f042 0201 orr.w r2, r2, #1 800fdd8: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 800fdda: 4b1f ldr r3, [pc, #124] @ (800fe58 ) 800fddc: 681b ldr r3, [r3, #0] 800fdde: 4a1f ldr r2, [pc, #124] @ (800fe5c ) 800fde0: fba2 2303 umull r2, r3, r2, r3 800fde4: 0c9b lsrs r3, r3, #18 800fde6: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800fde8: e002 b.n 800fdf0 { wait_loop_index--; 800fdea: 68bb ldr r3, [r7, #8] 800fdec: 3b01 subs r3, #1 800fdee: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800fdf0: 68bb ldr r3, [r7, #8] 800fdf2: 2b00 cmp r3, #0 800fdf4: d1f9 bne.n 800fdea } /* Get tick count */ tickstart = HAL_GetTick(); 800fdf6: f7ff fc23 bl 800f640 800fdfa: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 800fdfc: e01f b.n 800fe3e { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 800fdfe: f7ff fc1f bl 800f640 800fe02: 4602 mov r2, r0 800fe04: 68fb ldr r3, [r7, #12] 800fe06: 1ad3 subs r3, r2, r3 800fe08: 2b02 cmp r3, #2 800fe0a: d918 bls.n 800fe3e { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 800fe0c: 687b ldr r3, [r7, #4] 800fe0e: 681b ldr r3, [r3, #0] 800fe10: 689b ldr r3, [r3, #8] 800fe12: f003 0301 and.w r3, r3, #1 800fe16: 2b01 cmp r3, #1 800fe18: d011 beq.n 800fe3e { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800fe1a: 687b ldr r3, [r7, #4] 800fe1c: 6a9b ldr r3, [r3, #40] @ 0x28 800fe1e: f043 0210 orr.w r2, r3, #16 800fe22: 687b ldr r3, [r7, #4] 800fe24: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800fe26: 687b ldr r3, [r7, #4] 800fe28: 6adb ldr r3, [r3, #44] @ 0x2c 800fe2a: f043 0201 orr.w r2, r3, #1 800fe2e: 687b ldr r3, [r7, #4] 800fe30: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 800fe32: 687b ldr r3, [r7, #4] 800fe34: 2200 movs r2, #0 800fe36: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fe3a: 2301 movs r3, #1 800fe3c: e007 b.n 800fe4e while(ADC_IS_ENABLE(hadc) == RESET) 800fe3e: 687b ldr r3, [r7, #4] 800fe40: 681b ldr r3, [r3, #0] 800fe42: 689b ldr r3, [r3, #8] 800fe44: f003 0301 and.w r3, r3, #1 800fe48: 2b01 cmp r3, #1 800fe4a: d1d8 bne.n 800fdfe } } } /* Return HAL status */ return HAL_OK; 800fe4c: 2300 movs r3, #0 } 800fe4e: 4618 mov r0, r3 800fe50: 3710 adds r7, #16 800fe52: 46bd mov sp, r7 800fe54: bd80 pop {r7, pc} 800fe56: bf00 nop 800fe58: 20000084 .word 0x20000084 800fe5c: 431bde83 .word 0x431bde83 0800fe60 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 800fe60: b580 push {r7, lr} 800fe62: b084 sub sp, #16 800fe64: af00 add r7, sp, #0 800fe66: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800fe68: 2300 movs r3, #0 800fe6a: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 800fe6c: 687b ldr r3, [r7, #4] 800fe6e: 681b ldr r3, [r3, #0] 800fe70: 689b ldr r3, [r3, #8] 800fe72: f003 0301 and.w r3, r3, #1 800fe76: 2b01 cmp r3, #1 800fe78: d12e bne.n 800fed8 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 800fe7a: 687b ldr r3, [r7, #4] 800fe7c: 681b ldr r3, [r3, #0] 800fe7e: 689a ldr r2, [r3, #8] 800fe80: 687b ldr r3, [r7, #4] 800fe82: 681b ldr r3, [r3, #0] 800fe84: f022 0201 bic.w r2, r2, #1 800fe88: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 800fe8a: f7ff fbd9 bl 800f640 800fe8e: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 800fe90: e01b b.n 800feca { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 800fe92: f7ff fbd5 bl 800f640 800fe96: 4602 mov r2, r0 800fe98: 68fb ldr r3, [r7, #12] 800fe9a: 1ad3 subs r3, r2, r3 800fe9c: 2b02 cmp r3, #2 800fe9e: d914 bls.n 800feca { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 800fea0: 687b ldr r3, [r7, #4] 800fea2: 681b ldr r3, [r3, #0] 800fea4: 689b ldr r3, [r3, #8] 800fea6: f003 0301 and.w r3, r3, #1 800feaa: 2b01 cmp r3, #1 800feac: d10d bne.n 800feca { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800feae: 687b ldr r3, [r7, #4] 800feb0: 6a9b ldr r3, [r3, #40] @ 0x28 800feb2: f043 0210 orr.w r2, r3, #16 800feb6: 687b ldr r3, [r7, #4] 800feb8: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800feba: 687b ldr r3, [r7, #4] 800febc: 6adb ldr r3, [r3, #44] @ 0x2c 800febe: f043 0201 orr.w r2, r3, #1 800fec2: 687b ldr r3, [r7, #4] 800fec4: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 800fec6: 2301 movs r3, #1 800fec8: e007 b.n 800feda while(ADC_IS_ENABLE(hadc) != RESET) 800feca: 687b ldr r3, [r7, #4] 800fecc: 681b ldr r3, [r3, #0] 800fece: 689b ldr r3, [r3, #8] 800fed0: f003 0301 and.w r3, r3, #1 800fed4: 2b01 cmp r3, #1 800fed6: d0dc beq.n 800fe92 } } } /* Return HAL status */ return HAL_OK; 800fed8: 2300 movs r3, #0 } 800feda: 4618 mov r0, r3 800fedc: 3710 adds r7, #16 800fede: 46bd mov sp, r7 800fee0: bd80 pop {r7, pc} 0800fee2 : * @brief DMA transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) { 800fee2: b580 push {r7, lr} 800fee4: b084 sub sp, #16 800fee6: af00 add r7, sp, #0 800fee8: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800feea: 687b ldr r3, [r7, #4] 800feec: 6a5b ldr r3, [r3, #36] @ 0x24 800feee: 60fb str r3, [r7, #12] /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) 800fef0: 68fb ldr r3, [r7, #12] 800fef2: 6a9b ldr r3, [r3, #40] @ 0x28 800fef4: f003 0350 and.w r3, r3, #80 @ 0x50 800fef8: 2b00 cmp r3, #0 800fefa: d127 bne.n 800ff4c { /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 800fefc: 68fb ldr r3, [r7, #12] 800fefe: 6a9b ldr r3, [r3, #40] @ 0x28 800ff00: f443 7200 orr.w r2, r3, #512 @ 0x200 800ff04: 68fb ldr r3, [r7, #12] 800ff06: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ff08: 68fb ldr r3, [r7, #12] 800ff0a: 681b ldr r3, [r3, #0] 800ff0c: 689b ldr r3, [r3, #8] 800ff0e: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800ff12: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800ff16: d115 bne.n 800ff44 (hadc->Init.ContinuousConvMode == DISABLE) ) 800ff18: 68fb ldr r3, [r7, #12] 800ff1a: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ff1c: 2b00 cmp r3, #0 800ff1e: d111 bne.n 800ff44 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 800ff20: 68fb ldr r3, [r7, #12] 800ff22: 6a9b ldr r3, [r3, #40] @ 0x28 800ff24: f423 7280 bic.w r2, r3, #256 @ 0x100 800ff28: 68fb ldr r3, [r7, #12] 800ff2a: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800ff2c: 68fb ldr r3, [r7, #12] 800ff2e: 6a9b ldr r3, [r3, #40] @ 0x28 800ff30: f403 5380 and.w r3, r3, #4096 @ 0x1000 800ff34: 2b00 cmp r3, #0 800ff36: d105 bne.n 800ff44 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 800ff38: 68fb ldr r3, [r7, #12] 800ff3a: 6a9b ldr r3, [r3, #40] @ 0x28 800ff3c: f043 0201 orr.w r2, r3, #1 800ff40: 68fb ldr r3, [r7, #12] 800ff42: 629a str r2, [r3, #40] @ 0x28 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvCpltCallback(hadc); #else HAL_ADC_ConvCpltCallback(hadc); 800ff44: 68f8 ldr r0, [r7, #12] 800ff46: f7f9 fb01 bl 800954c else { /* Call DMA error callback */ hadc->DMA_Handle->XferErrorCallback(hdma); } } 800ff4a: e004 b.n 800ff56 hadc->DMA_Handle->XferErrorCallback(hdma); 800ff4c: 68fb ldr r3, [r7, #12] 800ff4e: 6a1b ldr r3, [r3, #32] 800ff50: 6b1b ldr r3, [r3, #48] @ 0x30 800ff52: 6878 ldr r0, [r7, #4] 800ff54: 4798 blx r3 } 800ff56: bf00 nop 800ff58: 3710 adds r7, #16 800ff5a: 46bd mov sp, r7 800ff5c: bd80 pop {r7, pc} 0800ff5e : * @brief DMA half transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) { 800ff5e: b580 push {r7, lr} 800ff60: b084 sub sp, #16 800ff62: af00 add r7, sp, #0 800ff64: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800ff66: 687b ldr r3, [r7, #4] 800ff68: 6a5b ldr r3, [r3, #36] @ 0x24 800ff6a: 60fb str r3, [r7, #12] /* Half conversion callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvHalfCpltCallback(hadc); #else HAL_ADC_ConvHalfCpltCallback(hadc); 800ff6c: 68f8 ldr r0, [r7, #12] 800ff6e: f7ff fe0a bl 800fb86 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 800ff72: bf00 nop 800ff74: 3710 adds r7, #16 800ff76: 46bd mov sp, r7 800ff78: bd80 pop {r7, pc} 0800ff7a : * @brief DMA error callback * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAError(DMA_HandleTypeDef *hdma) { 800ff7a: b580 push {r7, lr} 800ff7c: b084 sub sp, #16 800ff7e: af00 add r7, sp, #0 800ff80: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800ff82: 687b ldr r3, [r7, #4] 800ff84: 6a5b ldr r3, [r3, #36] @ 0x24 800ff86: 60fb str r3, [r7, #12] /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 800ff88: 68fb ldr r3, [r7, #12] 800ff8a: 6a9b ldr r3, [r3, #40] @ 0x28 800ff8c: f043 0240 orr.w r2, r3, #64 @ 0x40 800ff90: 68fb ldr r3, [r7, #12] 800ff92: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to DMA error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); 800ff94: 68fb ldr r3, [r7, #12] 800ff96: 6adb ldr r3, [r3, #44] @ 0x2c 800ff98: f043 0204 orr.w r2, r3, #4 800ff9c: 68fb ldr r3, [r7, #12] 800ff9e: 62da str r2, [r3, #44] @ 0x2c /* Error callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ErrorCallback(hadc); #else HAL_ADC_ErrorCallback(hadc); 800ffa0: 68f8 ldr r0, [r7, #12] 800ffa2: f7ff fe02 bl 800fbaa #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 800ffa6: bf00 nop 800ffa8: 3710 adds r7, #16 800ffaa: 46bd mov sp, r7 800ffac: bd80 pop {r7, pc} ... 0800ffb0 : * the completion of this function. * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) { 800ffb0: b590 push {r4, r7, lr} 800ffb2: b087 sub sp, #28 800ffb4: af00 add r7, sp, #0 800ffb6: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800ffb8: 2300 movs r3, #0 800ffba: 75fb strb r3, [r7, #23] uint32_t tickstart; __IO uint32_t wait_loop_index = 0U; 800ffbc: 2300 movs r3, #0 800ffbe: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800ffc0: 687b ldr r3, [r7, #4] 800ffc2: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800ffc6: 2b01 cmp r3, #1 800ffc8: d101 bne.n 800ffce 800ffca: 2302 movs r3, #2 800ffcc: e097 b.n 80100fe 800ffce: 687b ldr r3, [r7, #4] 800ffd0: 2201 movs r2, #1 800ffd2: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* 1. Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800ffd6: 6878 ldr r0, [r7, #4] 800ffd8: f7ff ff42 bl 800fe60 800ffdc: 4603 mov r3, r0 800ffde: 75fb strb r3, [r7, #23] /* 2. Calibration prerequisite delay before starting the calibration. */ /* - ADC must be enabled for at least two ADC clock cycles */ tmp_hal_status = ADC_Enable(hadc); 800ffe0: 6878 ldr r0, [r7, #4] 800ffe2: f7ff fee3 bl 800fdac 800ffe6: 4603 mov r3, r0 800ffe8: 75fb strb r3, [r7, #23] /* Check if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 800ffea: 7dfb ldrb r3, [r7, #23] 800ffec: 2b00 cmp r3, #0 800ffee: f040 8081 bne.w 80100f4 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800fff2: 687b ldr r3, [r7, #4] 800fff4: 6a9b ldr r3, [r3, #40] @ 0x28 800fff6: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800fffa: f023 0302 bic.w r3, r3, #2 800fffe: f043 0202 orr.w r2, r3, #2 8010002: 687b ldr r3, [r7, #4] 8010004: 629a str r2, [r3, #40] @ 0x28 /* Hardware prerequisite: delay before starting the calibration. */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles. */ /* - Wait for the expected ADC clock cycles delay */ wait_loop_index = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 8010006: 4b40 ldr r3, [pc, #256] @ (8010108 ) 8010008: 681c ldr r4, [r3, #0] 801000a: 2002 movs r0, #2 801000c: f002 fde2 bl 8012bd4 8010010: 4603 mov r3, r0 8010012: fbb4 f3f3 udiv r3, r4, r3 * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES ); 8010016: 005b lsls r3, r3, #1 wait_loop_index = ((SystemCoreClock 8010018: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 801001a: e002 b.n 8010022 { wait_loop_index--; 801001c: 68fb ldr r3, [r7, #12] 801001e: 3b01 subs r3, #1 8010020: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 8010022: 68fb ldr r3, [r7, #12] 8010024: 2b00 cmp r3, #0 8010026: d1f9 bne.n 801001c } /* 3. Resets ADC calibration registers */ SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL); 8010028: 687b ldr r3, [r7, #4] 801002a: 681b ldr r3, [r3, #0] 801002c: 689a ldr r2, [r3, #8] 801002e: 687b ldr r3, [r7, #4] 8010030: 681b ldr r3, [r3, #0] 8010032: f042 0208 orr.w r2, r2, #8 8010036: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 8010038: f7ff fb02 bl 800f640 801003c: 6138 str r0, [r7, #16] /* Wait for calibration reset completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 801003e: e01b b.n 8010078 { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 8010040: f7ff fafe bl 800f640 8010044: 4602 mov r2, r0 8010046: 693b ldr r3, [r7, #16] 8010048: 1ad3 subs r3, r2, r3 801004a: 2b0a cmp r3, #10 801004c: d914 bls.n 8010078 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 801004e: 687b ldr r3, [r7, #4] 8010050: 681b ldr r3, [r3, #0] 8010052: 689b ldr r3, [r3, #8] 8010054: f003 0308 and.w r3, r3, #8 8010058: 2b00 cmp r3, #0 801005a: d00d beq.n 8010078 { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 801005c: 687b ldr r3, [r7, #4] 801005e: 6a9b ldr r3, [r3, #40] @ 0x28 8010060: f023 0312 bic.w r3, r3, #18 8010064: f043 0210 orr.w r2, r3, #16 8010068: 687b ldr r3, [r7, #4] 801006a: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 801006c: 687b ldr r3, [r7, #4] 801006e: 2200 movs r2, #0 8010070: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 8010074: 2301 movs r3, #1 8010076: e042 b.n 80100fe while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 8010078: 687b ldr r3, [r7, #4] 801007a: 681b ldr r3, [r3, #0] 801007c: 689b ldr r3, [r3, #8] 801007e: f003 0308 and.w r3, r3, #8 8010082: 2b00 cmp r3, #0 8010084: d1dc bne.n 8010040 } } } /* 4. Start ADC calibration */ SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL); 8010086: 687b ldr r3, [r7, #4] 8010088: 681b ldr r3, [r3, #0] 801008a: 689a ldr r2, [r3, #8] 801008c: 687b ldr r3, [r7, #4] 801008e: 681b ldr r3, [r3, #0] 8010090: f042 0204 orr.w r2, r2, #4 8010094: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 8010096: f7ff fad3 bl 800f640 801009a: 6138 str r0, [r7, #16] /* Wait for calibration completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 801009c: e01b b.n 80100d6 { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 801009e: f7ff facf bl 800f640 80100a2: 4602 mov r2, r0 80100a4: 693b ldr r3, [r7, #16] 80100a6: 1ad3 subs r3, r2, r3 80100a8: 2b0a cmp r3, #10 80100aa: d914 bls.n 80100d6 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 80100ac: 687b ldr r3, [r7, #4] 80100ae: 681b ldr r3, [r3, #0] 80100b0: 689b ldr r3, [r3, #8] 80100b2: f003 0304 and.w r3, r3, #4 80100b6: 2b00 cmp r3, #0 80100b8: d00d beq.n 80100d6 { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 80100ba: 687b ldr r3, [r7, #4] 80100bc: 6a9b ldr r3, [r3, #40] @ 0x28 80100be: f023 0312 bic.w r3, r3, #18 80100c2: f043 0210 orr.w r2, r3, #16 80100c6: 687b ldr r3, [r7, #4] 80100c8: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 80100ca: 687b ldr r3, [r7, #4] 80100cc: 2200 movs r2, #0 80100ce: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 80100d2: 2301 movs r3, #1 80100d4: e013 b.n 80100fe while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 80100d6: 687b ldr r3, [r7, #4] 80100d8: 681b ldr r3, [r3, #0] 80100da: 689b ldr r3, [r3, #8] 80100dc: f003 0304 and.w r3, r3, #4 80100e0: 2b00 cmp r3, #0 80100e2: d1dc bne.n 801009e } } } /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 80100e4: 687b ldr r3, [r7, #4] 80100e6: 6a9b ldr r3, [r3, #40] @ 0x28 80100e8: f023 0303 bic.w r3, r3, #3 80100ec: f043 0201 orr.w r2, r3, #1 80100f0: 687b ldr r3, [r7, #4] 80100f2: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 80100f4: 687b ldr r3, [r7, #4] 80100f6: 2200 movs r2, #0 80100f8: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 80100fc: 7dfb ldrb r3, [r7, #23] } 80100fe: 4618 mov r0, r3 8010100: 371c adds r7, #28 8010102: 46bd mov sp, r7 8010104: bd90 pop {r4, r7, pc} 8010106: bf00 nop 8010108: 20000084 .word 0x20000084 0801010c : * @brief Injected conversion complete callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc) { 801010c: b480 push {r7} 801010e: b083 sub sp, #12 8010110: af00 add r7, sp, #0 8010112: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file */ } 8010114: bf00 nop 8010116: 370c adds r7, #12 8010118: 46bd mov sp, r7 801011a: bc80 pop {r7} 801011c: 4770 bx lr 0801011e : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) { 801011e: b580 push {r7, lr} 8010120: b084 sub sp, #16 8010122: af00 add r7, sp, #0 8010124: 6078 str r0, [r7, #4] uint32_t tickstart; /* Check CAN handle */ if (hcan == NULL) 8010126: 687b ldr r3, [r7, #4] 8010128: 2b00 cmp r3, #0 801012a: d101 bne.n 8010130 { return HAL_ERROR; 801012c: 2301 movs r3, #1 801012e: e0ed b.n 801030c /* Init the low level hardware: CLOCK, NVIC */ hcan->MspInitCallback(hcan); } #else if (hcan->State == HAL_CAN_STATE_RESET) 8010130: 687b ldr r3, [r7, #4] 8010132: f893 3020 ldrb.w r3, [r3, #32] 8010136: b2db uxtb r3, r3 8010138: 2b00 cmp r3, #0 801013a: d102 bne.n 8010142 { /* Init the low level hardware: CLOCK, NVIC */ HAL_CAN_MspInit(hcan); 801013c: 6878 ldr r0, [r7, #4] 801013e: f7f9 fd9b bl 8009c78 } #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 8010142: 687b ldr r3, [r7, #4] 8010144: 681b ldr r3, [r3, #0] 8010146: 681a ldr r2, [r3, #0] 8010148: 687b ldr r3, [r7, #4] 801014a: 681b ldr r3, [r3, #0] 801014c: f042 0201 orr.w r2, r2, #1 8010150: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8010152: f7ff fa75 bl 800f640 8010156: 60f8 str r0, [r7, #12] /* Wait initialisation acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 8010158: e012 b.n 8010180 { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 801015a: f7ff fa71 bl 800f640 801015e: 4602 mov r2, r0 8010160: 68fb ldr r3, [r7, #12] 8010162: 1ad3 subs r3, r2, r3 8010164: 2b0a cmp r3, #10 8010166: d90b bls.n 8010180 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 8010168: 687b ldr r3, [r7, #4] 801016a: 6a5b ldr r3, [r3, #36] @ 0x24 801016c: f443 3200 orr.w r2, r3, #131072 @ 0x20000 8010170: 687b ldr r3, [r7, #4] 8010172: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 8010174: 687b ldr r3, [r7, #4] 8010176: 2205 movs r2, #5 8010178: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 801017c: 2301 movs r3, #1 801017e: e0c5 b.n 801030c while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 8010180: 687b ldr r3, [r7, #4] 8010182: 681b ldr r3, [r3, #0] 8010184: 685b ldr r3, [r3, #4] 8010186: f003 0301 and.w r3, r3, #1 801018a: 2b00 cmp r3, #0 801018c: d0e5 beq.n 801015a } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 801018e: 687b ldr r3, [r7, #4] 8010190: 681b ldr r3, [r3, #0] 8010192: 681a ldr r2, [r3, #0] 8010194: 687b ldr r3, [r7, #4] 8010196: 681b ldr r3, [r3, #0] 8010198: f022 0202 bic.w r2, r2, #2 801019c: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 801019e: f7ff fa4f bl 800f640 80101a2: 60f8 str r0, [r7, #12] /* Check Sleep mode leave acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 80101a4: e012 b.n 80101cc { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 80101a6: f7ff fa4b bl 800f640 80101aa: 4602 mov r2, r0 80101ac: 68fb ldr r3, [r7, #12] 80101ae: 1ad3 subs r3, r2, r3 80101b0: 2b0a cmp r3, #10 80101b2: d90b bls.n 80101cc { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 80101b4: 687b ldr r3, [r7, #4] 80101b6: 6a5b ldr r3, [r3, #36] @ 0x24 80101b8: f443 3200 orr.w r2, r3, #131072 @ 0x20000 80101bc: 687b ldr r3, [r7, #4] 80101be: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 80101c0: 687b ldr r3, [r7, #4] 80101c2: 2205 movs r2, #5 80101c4: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 80101c8: 2301 movs r3, #1 80101ca: e09f b.n 801030c while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 80101cc: 687b ldr r3, [r7, #4] 80101ce: 681b ldr r3, [r3, #0] 80101d0: 685b ldr r3, [r3, #4] 80101d2: f003 0302 and.w r3, r3, #2 80101d6: 2b00 cmp r3, #0 80101d8: d1e5 bne.n 80101a6 } } /* Set the time triggered communication mode */ if (hcan->Init.TimeTriggeredMode == ENABLE) 80101da: 687b ldr r3, [r7, #4] 80101dc: 7e1b ldrb r3, [r3, #24] 80101de: 2b01 cmp r3, #1 80101e0: d108 bne.n 80101f4 { SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 80101e2: 687b ldr r3, [r7, #4] 80101e4: 681b ldr r3, [r3, #0] 80101e6: 681a ldr r2, [r3, #0] 80101e8: 687b ldr r3, [r7, #4] 80101ea: 681b ldr r3, [r3, #0] 80101ec: f042 0280 orr.w r2, r2, #128 @ 0x80 80101f0: 601a str r2, [r3, #0] 80101f2: e007 b.n 8010204 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 80101f4: 687b ldr r3, [r7, #4] 80101f6: 681b ldr r3, [r3, #0] 80101f8: 681a ldr r2, [r3, #0] 80101fa: 687b ldr r3, [r7, #4] 80101fc: 681b ldr r3, [r3, #0] 80101fe: f022 0280 bic.w r2, r2, #128 @ 0x80 8010202: 601a str r2, [r3, #0] } /* Set the automatic bus-off management */ if (hcan->Init.AutoBusOff == ENABLE) 8010204: 687b ldr r3, [r7, #4] 8010206: 7e5b ldrb r3, [r3, #25] 8010208: 2b01 cmp r3, #1 801020a: d108 bne.n 801021e { SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 801020c: 687b ldr r3, [r7, #4] 801020e: 681b ldr r3, [r3, #0] 8010210: 681a ldr r2, [r3, #0] 8010212: 687b ldr r3, [r7, #4] 8010214: 681b ldr r3, [r3, #0] 8010216: f042 0240 orr.w r2, r2, #64 @ 0x40 801021a: 601a str r2, [r3, #0] 801021c: e007 b.n 801022e } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 801021e: 687b ldr r3, [r7, #4] 8010220: 681b ldr r3, [r3, #0] 8010222: 681a ldr r2, [r3, #0] 8010224: 687b ldr r3, [r7, #4] 8010226: 681b ldr r3, [r3, #0] 8010228: f022 0240 bic.w r2, r2, #64 @ 0x40 801022c: 601a str r2, [r3, #0] } /* Set the automatic wake-up mode */ if (hcan->Init.AutoWakeUp == ENABLE) 801022e: 687b ldr r3, [r7, #4] 8010230: 7e9b ldrb r3, [r3, #26] 8010232: 2b01 cmp r3, #1 8010234: d108 bne.n 8010248 { SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 8010236: 687b ldr r3, [r7, #4] 8010238: 681b ldr r3, [r3, #0] 801023a: 681a ldr r2, [r3, #0] 801023c: 687b ldr r3, [r7, #4] 801023e: 681b ldr r3, [r3, #0] 8010240: f042 0220 orr.w r2, r2, #32 8010244: 601a str r2, [r3, #0] 8010246: e007 b.n 8010258 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 8010248: 687b ldr r3, [r7, #4] 801024a: 681b ldr r3, [r3, #0] 801024c: 681a ldr r2, [r3, #0] 801024e: 687b ldr r3, [r7, #4] 8010250: 681b ldr r3, [r3, #0] 8010252: f022 0220 bic.w r2, r2, #32 8010256: 601a str r2, [r3, #0] } /* Set the automatic retransmission */ if (hcan->Init.AutoRetransmission == ENABLE) 8010258: 687b ldr r3, [r7, #4] 801025a: 7edb ldrb r3, [r3, #27] 801025c: 2b01 cmp r3, #1 801025e: d108 bne.n 8010272 { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); 8010260: 687b ldr r3, [r7, #4] 8010262: 681b ldr r3, [r3, #0] 8010264: 681a ldr r2, [r3, #0] 8010266: 687b ldr r3, [r7, #4] 8010268: 681b ldr r3, [r3, #0] 801026a: f022 0210 bic.w r2, r2, #16 801026e: 601a str r2, [r3, #0] 8010270: e007 b.n 8010282 } else { SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); 8010272: 687b ldr r3, [r7, #4] 8010274: 681b ldr r3, [r3, #0] 8010276: 681a ldr r2, [r3, #0] 8010278: 687b ldr r3, [r7, #4] 801027a: 681b ldr r3, [r3, #0] 801027c: f042 0210 orr.w r2, r2, #16 8010280: 601a str r2, [r3, #0] } /* Set the receive FIFO locked mode */ if (hcan->Init.ReceiveFifoLocked == ENABLE) 8010282: 687b ldr r3, [r7, #4] 8010284: 7f1b ldrb r3, [r3, #28] 8010286: 2b01 cmp r3, #1 8010288: d108 bne.n 801029c { SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 801028a: 687b ldr r3, [r7, #4] 801028c: 681b ldr r3, [r3, #0] 801028e: 681a ldr r2, [r3, #0] 8010290: 687b ldr r3, [r7, #4] 8010292: 681b ldr r3, [r3, #0] 8010294: f042 0208 orr.w r2, r2, #8 8010298: 601a str r2, [r3, #0] 801029a: e007 b.n 80102ac } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 801029c: 687b ldr r3, [r7, #4] 801029e: 681b ldr r3, [r3, #0] 80102a0: 681a ldr r2, [r3, #0] 80102a2: 687b ldr r3, [r7, #4] 80102a4: 681b ldr r3, [r3, #0] 80102a6: f022 0208 bic.w r2, r2, #8 80102aa: 601a str r2, [r3, #0] } /* Set the transmit FIFO priority */ if (hcan->Init.TransmitFifoPriority == ENABLE) 80102ac: 687b ldr r3, [r7, #4] 80102ae: 7f5b ldrb r3, [r3, #29] 80102b0: 2b01 cmp r3, #1 80102b2: d108 bne.n 80102c6 { SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 80102b4: 687b ldr r3, [r7, #4] 80102b6: 681b ldr r3, [r3, #0] 80102b8: 681a ldr r2, [r3, #0] 80102ba: 687b ldr r3, [r7, #4] 80102bc: 681b ldr r3, [r3, #0] 80102be: f042 0204 orr.w r2, r2, #4 80102c2: 601a str r2, [r3, #0] 80102c4: e007 b.n 80102d6 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 80102c6: 687b ldr r3, [r7, #4] 80102c8: 681b ldr r3, [r3, #0] 80102ca: 681a ldr r2, [r3, #0] 80102cc: 687b ldr r3, [r7, #4] 80102ce: 681b ldr r3, [r3, #0] 80102d0: f022 0204 bic.w r2, r2, #4 80102d4: 601a str r2, [r3, #0] } /* Set the bit timing register */ WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | 80102d6: 687b ldr r3, [r7, #4] 80102d8: 689a ldr r2, [r3, #8] 80102da: 687b ldr r3, [r7, #4] 80102dc: 68db ldr r3, [r3, #12] 80102de: 431a orrs r2, r3 80102e0: 687b ldr r3, [r7, #4] 80102e2: 691b ldr r3, [r3, #16] 80102e4: 431a orrs r2, r3 80102e6: 687b ldr r3, [r7, #4] 80102e8: 695b ldr r3, [r3, #20] 80102ea: ea42 0103 orr.w r1, r2, r3 80102ee: 687b ldr r3, [r7, #4] 80102f0: 685b ldr r3, [r3, #4] 80102f2: 1e5a subs r2, r3, #1 80102f4: 687b ldr r3, [r7, #4] 80102f6: 681b ldr r3, [r3, #0] 80102f8: 430a orrs r2, r1 80102fa: 61da str r2, [r3, #28] hcan->Init.TimeSeg1 | hcan->Init.TimeSeg2 | (hcan->Init.Prescaler - 1U))); /* Initialize the error code */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 80102fc: 687b ldr r3, [r7, #4] 80102fe: 2200 movs r2, #0 8010300: 625a str r2, [r3, #36] @ 0x24 /* Initialize the CAN state */ hcan->State = HAL_CAN_STATE_READY; 8010302: 687b ldr r3, [r7, #4] 8010304: 2201 movs r2, #1 8010306: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 801030a: 2300 movs r3, #0 } 801030c: 4618 mov r0, r3 801030e: 3710 adds r7, #16 8010310: 46bd mov sp, r7 8010312: bd80 pop {r7, pc} 08010314 : * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that * contains the filter configuration information. * @retval None */ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig) { 8010314: b480 push {r7} 8010316: b087 sub sp, #28 8010318: af00 add r7, sp, #0 801031a: 6078 str r0, [r7, #4] 801031c: 6039 str r1, [r7, #0] uint32_t filternbrbitpos; CAN_TypeDef *can_ip = hcan->Instance; 801031e: 687b ldr r3, [r7, #4] 8010320: 681b ldr r3, [r3, #0] 8010322: 617b str r3, [r7, #20] HAL_CAN_StateTypeDef state = hcan->State; 8010324: 687b ldr r3, [r7, #4] 8010326: f893 3020 ldrb.w r3, [r3, #32] 801032a: 74fb strb r3, [r7, #19] if ((state == HAL_CAN_STATE_READY) || 801032c: 7cfb ldrb r3, [r7, #19] 801032e: 2b01 cmp r3, #1 8010330: d003 beq.n 801033a 8010332: 7cfb ldrb r3, [r7, #19] 8010334: 2b02 cmp r3, #2 8010336: f040 80be bne.w 80104b6 assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); #if defined(CAN2) /* CAN1 and CAN2 are dual instances with 28 common filters banks */ /* Select master instance to access the filter banks */ can_ip = CAN1; 801033a: 4b65 ldr r3, [pc, #404] @ (80104d0 ) 801033c: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); #endif /* CAN3 */ /* Initialisation mode for the filter */ SET_BIT(can_ip->FMR, CAN_FMR_FINIT); 801033e: 697b ldr r3, [r7, #20] 8010340: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 8010344: f043 0201 orr.w r2, r3, #1 8010348: 697b ldr r3, [r7, #20] 801034a: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #if defined(CAN2) /* Select the start filter number of CAN2 slave instance */ CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); 801034e: 697b ldr r3, [r7, #20] 8010350: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 8010354: f423 527c bic.w r2, r3, #16128 @ 0x3f00 8010358: 697b ldr r3, [r7, #20] 801035a: f8c3 2200 str.w r2, [r3, #512] @ 0x200 SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); 801035e: 697b ldr r3, [r7, #20] 8010360: f8d3 2200 ldr.w r2, [r3, #512] @ 0x200 8010364: 683b ldr r3, [r7, #0] 8010366: 6a5b ldr r3, [r3, #36] @ 0x24 8010368: 021b lsls r3, r3, #8 801036a: 431a orrs r2, r3 801036c: 697b ldr r3, [r7, #20] 801036e: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #endif /* CAN3 */ /* Convert filter number into bit position */ filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); 8010372: 683b ldr r3, [r7, #0] 8010374: 695b ldr r3, [r3, #20] 8010376: f003 031f and.w r3, r3, #31 801037a: 2201 movs r2, #1 801037c: fa02 f303 lsl.w r3, r2, r3 8010380: 60fb str r3, [r7, #12] /* Filter Deactivation */ CLEAR_BIT(can_ip->FA1R, filternbrbitpos); 8010382: 697b ldr r3, [r7, #20] 8010384: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 8010388: 68fb ldr r3, [r7, #12] 801038a: 43db mvns r3, r3 801038c: 401a ands r2, r3 801038e: 697b ldr r3, [r7, #20] 8010390: f8c3 221c str.w r2, [r3, #540] @ 0x21c /* Filter Scale */ if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) 8010394: 683b ldr r3, [r7, #0] 8010396: 69db ldr r3, [r3, #28] 8010398: 2b00 cmp r3, #0 801039a: d123 bne.n 80103e4 { /* 16-bit scale for the filter */ CLEAR_BIT(can_ip->FS1R, filternbrbitpos); 801039c: 697b ldr r3, [r7, #20] 801039e: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 80103a2: 68fb ldr r3, [r7, #12] 80103a4: 43db mvns r3, r3 80103a6: 401a ands r2, r3 80103a8: 697b ldr r3, [r7, #20] 80103aa: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* First 16-bit identifier and First 16-bit mask */ /* Or First 16-bit identifier and Second 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 80103ae: 683b ldr r3, [r7, #0] 80103b0: 68db ldr r3, [r3, #12] 80103b2: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 80103b4: 683b ldr r3, [r7, #0] 80103b6: 685b ldr r3, [r3, #4] 80103b8: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 80103ba: 683a ldr r2, [r7, #0] 80103bc: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 80103be: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 80103c0: 697b ldr r3, [r7, #20] 80103c2: 3248 adds r2, #72 @ 0x48 80103c4: f843 1032 str.w r1, [r3, r2, lsl #3] /* Second 16-bit identifier and Second 16-bit mask */ /* Or Third 16-bit identifier and Fourth 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 80103c8: 683b ldr r3, [r7, #0] 80103ca: 689b ldr r3, [r3, #8] 80103cc: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); 80103ce: 683b ldr r3, [r7, #0] 80103d0: 681b ldr r3, [r3, #0] 80103d2: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 80103d4: 683b ldr r3, [r7, #0] 80103d6: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 80103d8: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 80103da: 6979 ldr r1, [r7, #20] 80103dc: 3348 adds r3, #72 @ 0x48 80103de: 00db lsls r3, r3, #3 80103e0: 440b add r3, r1 80103e2: 605a str r2, [r3, #4] } if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) 80103e4: 683b ldr r3, [r7, #0] 80103e6: 69db ldr r3, [r3, #28] 80103e8: 2b01 cmp r3, #1 80103ea: d122 bne.n 8010432 { /* 32-bit scale for the filter */ SET_BIT(can_ip->FS1R, filternbrbitpos); 80103ec: 697b ldr r3, [r7, #20] 80103ee: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 80103f2: 68fb ldr r3, [r7, #12] 80103f4: 431a orrs r2, r3 80103f6: 697b ldr r3, [r7, #20] 80103f8: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* 32-bit identifier or First 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 80103fc: 683b ldr r3, [r7, #0] 80103fe: 681b ldr r3, [r3, #0] 8010400: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 8010402: 683b ldr r3, [r7, #0] 8010404: 685b ldr r3, [r3, #4] 8010406: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 8010408: 683a ldr r2, [r7, #0] 801040a: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 801040c: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 801040e: 697b ldr r3, [r7, #20] 8010410: 3248 adds r2, #72 @ 0x48 8010412: f843 1032 str.w r1, [r3, r2, lsl #3] /* 32-bit mask or Second 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 8010416: 683b ldr r3, [r7, #0] 8010418: 689b ldr r3, [r3, #8] 801041a: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); 801041c: 683b ldr r3, [r7, #0] 801041e: 68db ldr r3, [r3, #12] 8010420: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 8010422: 683b ldr r3, [r7, #0] 8010424: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 8010426: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 8010428: 6979 ldr r1, [r7, #20] 801042a: 3348 adds r3, #72 @ 0x48 801042c: 00db lsls r3, r3, #3 801042e: 440b add r3, r1 8010430: 605a str r2, [r3, #4] } /* Filter Mode */ if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) 8010432: 683b ldr r3, [r7, #0] 8010434: 699b ldr r3, [r3, #24] 8010436: 2b00 cmp r3, #0 8010438: d109 bne.n 801044e { /* Id/Mask mode for the filter*/ CLEAR_BIT(can_ip->FM1R, filternbrbitpos); 801043a: 697b ldr r3, [r7, #20] 801043c: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 8010440: 68fb ldr r3, [r7, #12] 8010442: 43db mvns r3, r3 8010444: 401a ands r2, r3 8010446: 697b ldr r3, [r7, #20] 8010448: f8c3 2204 str.w r2, [r3, #516] @ 0x204 801044c: e007 b.n 801045e } else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ { /* Identifier list mode for the filter*/ SET_BIT(can_ip->FM1R, filternbrbitpos); 801044e: 697b ldr r3, [r7, #20] 8010450: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 8010454: 68fb ldr r3, [r7, #12] 8010456: 431a orrs r2, r3 8010458: 697b ldr r3, [r7, #20] 801045a: f8c3 2204 str.w r2, [r3, #516] @ 0x204 } /* Filter FIFO assignment */ if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) 801045e: 683b ldr r3, [r7, #0] 8010460: 691b ldr r3, [r3, #16] 8010462: 2b00 cmp r3, #0 8010464: d109 bne.n 801047a { /* FIFO 0 assignation for the filter */ CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); 8010466: 697b ldr r3, [r7, #20] 8010468: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 801046c: 68fb ldr r3, [r7, #12] 801046e: 43db mvns r3, r3 8010470: 401a ands r2, r3 8010472: 697b ldr r3, [r7, #20] 8010474: f8c3 2214 str.w r2, [r3, #532] @ 0x214 8010478: e007 b.n 801048a } else { /* FIFO 1 assignation for the filter */ SET_BIT(can_ip->FFA1R, filternbrbitpos); 801047a: 697b ldr r3, [r7, #20] 801047c: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 8010480: 68fb ldr r3, [r7, #12] 8010482: 431a orrs r2, r3 8010484: 697b ldr r3, [r7, #20] 8010486: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } /* Filter activation */ if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) 801048a: 683b ldr r3, [r7, #0] 801048c: 6a1b ldr r3, [r3, #32] 801048e: 2b01 cmp r3, #1 8010490: d107 bne.n 80104a2 { SET_BIT(can_ip->FA1R, filternbrbitpos); 8010492: 697b ldr r3, [r7, #20] 8010494: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 8010498: 68fb ldr r3, [r7, #12] 801049a: 431a orrs r2, r3 801049c: 697b ldr r3, [r7, #20] 801049e: f8c3 221c str.w r2, [r3, #540] @ 0x21c } /* Leave the initialisation mode for the filter */ CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); 80104a2: 697b ldr r3, [r7, #20] 80104a4: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 80104a8: f023 0201 bic.w r2, r3, #1 80104ac: 697b ldr r3, [r7, #20] 80104ae: f8c3 2200 str.w r2, [r3, #512] @ 0x200 /* Return function status */ return HAL_OK; 80104b2: 2300 movs r3, #0 80104b4: e006 b.n 80104c4 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 80104b6: 687b ldr r3, [r7, #4] 80104b8: 6a5b ldr r3, [r3, #36] @ 0x24 80104ba: f443 2280 orr.w r2, r3, #262144 @ 0x40000 80104be: 687b ldr r3, [r7, #4] 80104c0: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 80104c2: 2301 movs r3, #1 } } 80104c4: 4618 mov r0, r3 80104c6: 371c adds r7, #28 80104c8: 46bd mov sp, r7 80104ca: bc80 pop {r7} 80104cc: 4770 bx lr 80104ce: bf00 nop 80104d0: 40006400 .word 0x40006400 080104d4 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) { 80104d4: b580 push {r7, lr} 80104d6: b084 sub sp, #16 80104d8: af00 add r7, sp, #0 80104da: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_READY) 80104dc: 687b ldr r3, [r7, #4] 80104de: f893 3020 ldrb.w r3, [r3, #32] 80104e2: b2db uxtb r3, r3 80104e4: 2b01 cmp r3, #1 80104e6: d12e bne.n 8010546 { /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_LISTENING; 80104e8: 687b ldr r3, [r7, #4] 80104ea: 2202 movs r2, #2 80104ec: f883 2020 strb.w r2, [r3, #32] /* Request leave initialisation */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 80104f0: 687b ldr r3, [r7, #4] 80104f2: 681b ldr r3, [r3, #0] 80104f4: 681a ldr r2, [r3, #0] 80104f6: 687b ldr r3, [r7, #4] 80104f8: 681b ldr r3, [r3, #0] 80104fa: f022 0201 bic.w r2, r2, #1 80104fe: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8010500: f7ff f89e bl 800f640 8010504: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 8010506: e012 b.n 801052e { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 8010508: f7ff f89a bl 800f640 801050c: 4602 mov r2, r0 801050e: 68fb ldr r3, [r7, #12] 8010510: 1ad3 subs r3, r2, r3 8010512: 2b0a cmp r3, #10 8010514: d90b bls.n 801052e { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 8010516: 687b ldr r3, [r7, #4] 8010518: 6a5b ldr r3, [r3, #36] @ 0x24 801051a: f443 3200 orr.w r2, r3, #131072 @ 0x20000 801051e: 687b ldr r3, [r7, #4] 8010520: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 8010522: 687b ldr r3, [r7, #4] 8010524: 2205 movs r2, #5 8010526: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 801052a: 2301 movs r3, #1 801052c: e012 b.n 8010554 while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 801052e: 687b ldr r3, [r7, #4] 8010530: 681b ldr r3, [r3, #0] 8010532: 685b ldr r3, [r3, #4] 8010534: f003 0301 and.w r3, r3, #1 8010538: 2b00 cmp r3, #0 801053a: d1e5 bne.n 8010508 } } /* Reset the CAN ErrorCode */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 801053c: 687b ldr r3, [r7, #4] 801053e: 2200 movs r2, #0 8010540: 625a str r2, [r3, #36] @ 0x24 /* Return function status */ return HAL_OK; 8010542: 2300 movs r3, #0 8010544: e006 b.n 8010554 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; 8010546: 687b ldr r3, [r7, #4] 8010548: 6a5b ldr r3, [r3, #36] @ 0x24 801054a: f443 2200 orr.w r2, r3, #524288 @ 0x80000 801054e: 687b ldr r3, [r7, #4] 8010550: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8010552: 2301 movs r3, #1 } } 8010554: 4618 mov r0, r3 8010556: 3710 adds r7, #16 8010558: 46bd mov sp, r7 801055a: bd80 pop {r7, pc} 0801055c : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) { 801055c: b580 push {r7, lr} 801055e: b084 sub sp, #16 8010560: af00 add r7, sp, #0 8010562: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_LISTENING) 8010564: 687b ldr r3, [r7, #4] 8010566: f893 3020 ldrb.w r3, [r3, #32] 801056a: b2db uxtb r3, r3 801056c: 2b02 cmp r3, #2 801056e: d133 bne.n 80105d8 { /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 8010570: 687b ldr r3, [r7, #4] 8010572: 681b ldr r3, [r3, #0] 8010574: 681a ldr r2, [r3, #0] 8010576: 687b ldr r3, [r7, #4] 8010578: 681b ldr r3, [r3, #0] 801057a: f042 0201 orr.w r2, r2, #1 801057e: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8010580: f7ff f85e bl 800f640 8010584: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 8010586: e012 b.n 80105ae { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 8010588: f7ff f85a bl 800f640 801058c: 4602 mov r2, r0 801058e: 68fb ldr r3, [r7, #12] 8010590: 1ad3 subs r3, r2, r3 8010592: 2b0a cmp r3, #10 8010594: d90b bls.n 80105ae { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 8010596: 687b ldr r3, [r7, #4] 8010598: 6a5b ldr r3, [r3, #36] @ 0x24 801059a: f443 3200 orr.w r2, r3, #131072 @ 0x20000 801059e: 687b ldr r3, [r7, #4] 80105a0: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 80105a2: 687b ldr r3, [r7, #4] 80105a4: 2205 movs r2, #5 80105a6: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 80105aa: 2301 movs r3, #1 80105ac: e01b b.n 80105e6 while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 80105ae: 687b ldr r3, [r7, #4] 80105b0: 681b ldr r3, [r3, #0] 80105b2: 685b ldr r3, [r3, #4] 80105b4: f003 0301 and.w r3, r3, #1 80105b8: 2b00 cmp r3, #0 80105ba: d0e5 beq.n 8010588 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 80105bc: 687b ldr r3, [r7, #4] 80105be: 681b ldr r3, [r3, #0] 80105c0: 681a ldr r2, [r3, #0] 80105c2: 687b ldr r3, [r7, #4] 80105c4: 681b ldr r3, [r3, #0] 80105c6: f022 0202 bic.w r2, r2, #2 80105ca: 601a str r2, [r3, #0] /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_READY; 80105cc: 687b ldr r3, [r7, #4] 80105ce: 2201 movs r2, #1 80105d0: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 80105d4: 2300 movs r3, #0 80105d6: e006 b.n 80105e6 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; 80105d8: 687b ldr r3, [r7, #4] 80105da: 6a5b ldr r3, [r3, #36] @ 0x24 80105dc: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 80105e0: 687b ldr r3, [r7, #4] 80105e2: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 80105e4: 2301 movs r3, #1 } } 80105e6: 4618 mov r0, r3 80105e8: 3710 adds r7, #16 80105ea: 46bd mov sp, r7 80105ec: bd80 pop {r7, pc} 080105ee : * This parameter can be a value of @arg CAN_Tx_Mailboxes. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, const uint8_t aData[], uint32_t *pTxMailbox) { 80105ee: b480 push {r7} 80105f0: b089 sub sp, #36 @ 0x24 80105f2: af00 add r7, sp, #0 80105f4: 60f8 str r0, [r7, #12] 80105f6: 60b9 str r1, [r7, #8] 80105f8: 607a str r2, [r7, #4] 80105fa: 603b str r3, [r7, #0] uint32_t transmitmailbox; HAL_CAN_StateTypeDef state = hcan->State; 80105fc: 68fb ldr r3, [r7, #12] 80105fe: f893 3020 ldrb.w r3, [r3, #32] 8010602: 77fb strb r3, [r7, #31] uint32_t tsr = READ_REG(hcan->Instance->TSR); 8010604: 68fb ldr r3, [r7, #12] 8010606: 681b ldr r3, [r3, #0] 8010608: 689b ldr r3, [r3, #8] 801060a: 61bb str r3, [r7, #24] { assert_param(IS_CAN_EXTID(pHeader->ExtId)); } assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); if ((state == HAL_CAN_STATE_READY) || 801060c: 7ffb ldrb r3, [r7, #31] 801060e: 2b01 cmp r3, #1 8010610: d003 beq.n 801061a 8010612: 7ffb ldrb r3, [r7, #31] 8010614: 2b02 cmp r3, #2 8010616: f040 80ad bne.w 8010774 (state == HAL_CAN_STATE_LISTENING)) { /* Check that all the Tx mailboxes are not full */ if (((tsr & CAN_TSR_TME0) != 0U) || 801061a: 69bb ldr r3, [r7, #24] 801061c: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8010620: 2b00 cmp r3, #0 8010622: d10a bne.n 801063a ((tsr & CAN_TSR_TME1) != 0U) || 8010624: 69bb ldr r3, [r7, #24] 8010626: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 if (((tsr & CAN_TSR_TME0) != 0U) || 801062a: 2b00 cmp r3, #0 801062c: d105 bne.n 801063a ((tsr & CAN_TSR_TME2) != 0U)) 801062e: 69bb ldr r3, [r7, #24] 8010630: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 ((tsr & CAN_TSR_TME1) != 0U) || 8010634: 2b00 cmp r3, #0 8010636: f000 8095 beq.w 8010764 { /* Select an empty transmit mailbox */ transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; 801063a: 69bb ldr r3, [r7, #24] 801063c: 0e1b lsrs r3, r3, #24 801063e: f003 0303 and.w r3, r3, #3 8010642: 617b str r3, [r7, #20] /* Store the Tx mailbox */ *pTxMailbox = (uint32_t)1 << transmitmailbox; 8010644: 2201 movs r2, #1 8010646: 697b ldr r3, [r7, #20] 8010648: 409a lsls r2, r3 801064a: 683b ldr r3, [r7, #0] 801064c: 601a str r2, [r3, #0] /* Set up the Id */ if (pHeader->IDE == CAN_ID_STD) 801064e: 68bb ldr r3, [r7, #8] 8010650: 689b ldr r3, [r3, #8] 8010652: 2b00 cmp r3, #0 8010654: d10d bne.n 8010672 { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 8010656: 68bb ldr r3, [r7, #8] 8010658: 681b ldr r3, [r3, #0] 801065a: 055a lsls r2, r3, #21 pHeader->RTR); 801065c: 68bb ldr r3, [r7, #8] 801065e: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 8010660: 68f9 ldr r1, [r7, #12] 8010662: 6809 ldr r1, [r1, #0] 8010664: 431a orrs r2, r3 8010666: 697b ldr r3, [r7, #20] 8010668: 3318 adds r3, #24 801066a: 011b lsls r3, r3, #4 801066c: 440b add r3, r1 801066e: 601a str r2, [r3, #0] 8010670: e00f b.n 8010692 } else { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 8010672: 68bb ldr r3, [r7, #8] 8010674: 685b ldr r3, [r3, #4] 8010676: 00da lsls r2, r3, #3 pHeader->IDE | 8010678: 68bb ldr r3, [r7, #8] 801067a: 689b ldr r3, [r3, #8] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 801067c: 431a orrs r2, r3 pHeader->RTR); 801067e: 68bb ldr r3, [r7, #8] 8010680: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 8010682: 68f9 ldr r1, [r7, #12] 8010684: 6809 ldr r1, [r1, #0] pHeader->IDE | 8010686: 431a orrs r2, r3 hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 8010688: 697b ldr r3, [r7, #20] 801068a: 3318 adds r3, #24 801068c: 011b lsls r3, r3, #4 801068e: 440b add r3, r1 8010690: 601a str r2, [r3, #0] } /* Set up the DLC */ hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); 8010692: 68fb ldr r3, [r7, #12] 8010694: 6819 ldr r1, [r3, #0] 8010696: 68bb ldr r3, [r7, #8] 8010698: 691a ldr r2, [r3, #16] 801069a: 697b ldr r3, [r7, #20] 801069c: 3318 adds r3, #24 801069e: 011b lsls r3, r3, #4 80106a0: 440b add r3, r1 80106a2: 3304 adds r3, #4 80106a4: 601a str r2, [r3, #0] /* Set up the Transmit Global Time mode */ if (pHeader->TransmitGlobalTime == ENABLE) 80106a6: 68bb ldr r3, [r7, #8] 80106a8: 7d1b ldrb r3, [r3, #20] 80106aa: 2b01 cmp r3, #1 80106ac: d111 bne.n 80106d2 { SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); 80106ae: 68fb ldr r3, [r7, #12] 80106b0: 681a ldr r2, [r3, #0] 80106b2: 697b ldr r3, [r7, #20] 80106b4: 3318 adds r3, #24 80106b6: 011b lsls r3, r3, #4 80106b8: 4413 add r3, r2 80106ba: 3304 adds r3, #4 80106bc: 681b ldr r3, [r3, #0] 80106be: 68fa ldr r2, [r7, #12] 80106c0: 6811 ldr r1, [r2, #0] 80106c2: f443 7280 orr.w r2, r3, #256 @ 0x100 80106c6: 697b ldr r3, [r7, #20] 80106c8: 3318 adds r3, #24 80106ca: 011b lsls r3, r3, #4 80106cc: 440b add r3, r1 80106ce: 3304 adds r3, #4 80106d0: 601a str r2, [r3, #0] } /* Set up the data field */ WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, 80106d2: 687b ldr r3, [r7, #4] 80106d4: 3307 adds r3, #7 80106d6: 781b ldrb r3, [r3, #0] 80106d8: 061a lsls r2, r3, #24 80106da: 687b ldr r3, [r7, #4] 80106dc: 3306 adds r3, #6 80106de: 781b ldrb r3, [r3, #0] 80106e0: 041b lsls r3, r3, #16 80106e2: 431a orrs r2, r3 80106e4: 687b ldr r3, [r7, #4] 80106e6: 3305 adds r3, #5 80106e8: 781b ldrb r3, [r3, #0] 80106ea: 021b lsls r3, r3, #8 80106ec: 4313 orrs r3, r2 80106ee: 687a ldr r2, [r7, #4] 80106f0: 3204 adds r2, #4 80106f2: 7812 ldrb r2, [r2, #0] 80106f4: 4610 mov r0, r2 80106f6: 68fa ldr r2, [r7, #12] 80106f8: 6811 ldr r1, [r2, #0] 80106fa: ea43 0200 orr.w r2, r3, r0 80106fe: 697b ldr r3, [r7, #20] 8010700: 011b lsls r3, r3, #4 8010702: 440b add r3, r1 8010704: f503 73c6 add.w r3, r3, #396 @ 0x18c 8010708: 601a str r2, [r3, #0] ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, 801070a: 687b ldr r3, [r7, #4] 801070c: 3303 adds r3, #3 801070e: 781b ldrb r3, [r3, #0] 8010710: 061a lsls r2, r3, #24 8010712: 687b ldr r3, [r7, #4] 8010714: 3302 adds r3, #2 8010716: 781b ldrb r3, [r3, #0] 8010718: 041b lsls r3, r3, #16 801071a: 431a orrs r2, r3 801071c: 687b ldr r3, [r7, #4] 801071e: 3301 adds r3, #1 8010720: 781b ldrb r3, [r3, #0] 8010722: 021b lsls r3, r3, #8 8010724: 4313 orrs r3, r2 8010726: 687a ldr r2, [r7, #4] 8010728: 7812 ldrb r2, [r2, #0] 801072a: 4610 mov r0, r2 801072c: 68fa ldr r2, [r7, #12] 801072e: 6811 ldr r1, [r2, #0] 8010730: ea43 0200 orr.w r2, r3, r0 8010734: 697b ldr r3, [r7, #20] 8010736: 011b lsls r3, r3, #4 8010738: 440b add r3, r1 801073a: f503 73c4 add.w r3, r3, #392 @ 0x188 801073e: 601a str r2, [r3, #0] ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); /* Request transmission */ SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); 8010740: 68fb ldr r3, [r7, #12] 8010742: 681a ldr r2, [r3, #0] 8010744: 697b ldr r3, [r7, #20] 8010746: 3318 adds r3, #24 8010748: 011b lsls r3, r3, #4 801074a: 4413 add r3, r2 801074c: 681b ldr r3, [r3, #0] 801074e: 68fa ldr r2, [r7, #12] 8010750: 6811 ldr r1, [r2, #0] 8010752: f043 0201 orr.w r2, r3, #1 8010756: 697b ldr r3, [r7, #20] 8010758: 3318 adds r3, #24 801075a: 011b lsls r3, r3, #4 801075c: 440b add r3, r1 801075e: 601a str r2, [r3, #0] /* Return function status */ return HAL_OK; 8010760: 2300 movs r3, #0 8010762: e00e b.n 8010782 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 8010764: 68fb ldr r3, [r7, #12] 8010766: 6a5b ldr r3, [r3, #36] @ 0x24 8010768: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 801076c: 68fb ldr r3, [r7, #12] 801076e: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8010770: 2301 movs r3, #1 8010772: e006 b.n 8010782 } } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 8010774: 68fb ldr r3, [r7, #12] 8010776: 6a5b ldr r3, [r3, #36] @ 0x24 8010778: f443 2280 orr.w r2, r3, #262144 @ 0x40000 801077c: 68fb ldr r3, [r7, #12] 801077e: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8010780: 2301 movs r3, #1 } } 8010782: 4618 mov r0, r3 8010784: 3724 adds r7, #36 @ 0x24 8010786: 46bd mov sp, r7 8010788: bc80 pop {r7} 801078a: 4770 bx lr 0801078c : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval Number of free Tx Mailboxes. */ uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan) { 801078c: b480 push {r7} 801078e: b085 sub sp, #20 8010790: af00 add r7, sp, #0 8010792: 6078 str r0, [r7, #4] uint32_t freelevel = 0U; 8010794: 2300 movs r3, #0 8010796: 60fb str r3, [r7, #12] HAL_CAN_StateTypeDef state = hcan->State; 8010798: 687b ldr r3, [r7, #4] 801079a: f893 3020 ldrb.w r3, [r3, #32] 801079e: 72fb strb r3, [r7, #11] if ((state == HAL_CAN_STATE_READY) || 80107a0: 7afb ldrb r3, [r7, #11] 80107a2: 2b01 cmp r3, #1 80107a4: d002 beq.n 80107ac 80107a6: 7afb ldrb r3, [r7, #11] 80107a8: 2b02 cmp r3, #2 80107aa: d11d bne.n 80107e8 (state == HAL_CAN_STATE_LISTENING)) { /* Check Tx Mailbox 0 status */ if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) 80107ac: 687b ldr r3, [r7, #4] 80107ae: 681b ldr r3, [r3, #0] 80107b0: 689b ldr r3, [r3, #8] 80107b2: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 80107b6: 2b00 cmp r3, #0 80107b8: d002 beq.n 80107c0 { freelevel++; 80107ba: 68fb ldr r3, [r7, #12] 80107bc: 3301 adds r3, #1 80107be: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 1 status */ if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) 80107c0: 687b ldr r3, [r7, #4] 80107c2: 681b ldr r3, [r3, #0] 80107c4: 689b ldr r3, [r3, #8] 80107c6: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 80107ca: 2b00 cmp r3, #0 80107cc: d002 beq.n 80107d4 { freelevel++; 80107ce: 68fb ldr r3, [r7, #12] 80107d0: 3301 adds r3, #1 80107d2: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 2 status */ if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) 80107d4: 687b ldr r3, [r7, #4] 80107d6: 681b ldr r3, [r3, #0] 80107d8: 689b ldr r3, [r3, #8] 80107da: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80107de: 2b00 cmp r3, #0 80107e0: d002 beq.n 80107e8 { freelevel++; 80107e2: 68fb ldr r3, [r7, #12] 80107e4: 3301 adds r3, #1 80107e6: 60fb str r3, [r7, #12] } } /* Return Tx Mailboxes free level */ return freelevel; 80107e8: 68fb ldr r3, [r7, #12] } 80107ea: 4618 mov r0, r3 80107ec: 3714 adds r7, #20 80107ee: 46bd mov sp, r7 80107f0: bc80 pop {r7} 80107f2: 4770 bx lr 080107f4 : * @param aData array where the payload of the Rx frame will be stored. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) { 80107f4: b480 push {r7} 80107f6: b087 sub sp, #28 80107f8: af00 add r7, sp, #0 80107fa: 60f8 str r0, [r7, #12] 80107fc: 60b9 str r1, [r7, #8] 80107fe: 607a str r2, [r7, #4] 8010800: 603b str r3, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 8010802: 68fb ldr r3, [r7, #12] 8010804: f893 3020 ldrb.w r3, [r3, #32] 8010808: 75fb strb r3, [r7, #23] assert_param(IS_CAN_RX_FIFO(RxFifo)); if ((state == HAL_CAN_STATE_READY) || 801080a: 7dfb ldrb r3, [r7, #23] 801080c: 2b01 cmp r3, #1 801080e: d003 beq.n 8010818 8010810: 7dfb ldrb r3, [r7, #23] 8010812: 2b02 cmp r3, #2 8010814: f040 8103 bne.w 8010a1e (state == HAL_CAN_STATE_LISTENING)) { /* Check the Rx FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 8010818: 68bb ldr r3, [r7, #8] 801081a: 2b00 cmp r3, #0 801081c: d10e bne.n 801083c { /* Check that the Rx FIFO 0 is not empty */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) 801081e: 68fb ldr r3, [r7, #12] 8010820: 681b ldr r3, [r3, #0] 8010822: 68db ldr r3, [r3, #12] 8010824: f003 0303 and.w r3, r3, #3 8010828: 2b00 cmp r3, #0 801082a: d116 bne.n 801085a { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 801082c: 68fb ldr r3, [r7, #12] 801082e: 6a5b ldr r3, [r3, #36] @ 0x24 8010830: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 8010834: 68fb ldr r3, [r7, #12] 8010836: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8010838: 2301 movs r3, #1 801083a: e0f7 b.n 8010a2c } } else /* Rx element is assigned to Rx FIFO 1 */ { /* Check that the Rx FIFO 1 is not empty */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) 801083c: 68fb ldr r3, [r7, #12] 801083e: 681b ldr r3, [r3, #0] 8010840: 691b ldr r3, [r3, #16] 8010842: f003 0303 and.w r3, r3, #3 8010846: 2b00 cmp r3, #0 8010848: d107 bne.n 801085a { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 801084a: 68fb ldr r3, [r7, #12] 801084c: 6a5b ldr r3, [r3, #36] @ 0x24 801084e: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 8010852: 68fb ldr r3, [r7, #12] 8010854: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8010856: 2301 movs r3, #1 8010858: e0e8 b.n 8010a2c } } /* Get the header */ pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; 801085a: 68fb ldr r3, [r7, #12] 801085c: 681a ldr r2, [r3, #0] 801085e: 68bb ldr r3, [r7, #8] 8010860: 331b adds r3, #27 8010862: 011b lsls r3, r3, #4 8010864: 4413 add r3, r2 8010866: 681b ldr r3, [r3, #0] 8010868: f003 0204 and.w r2, r3, #4 801086c: 687b ldr r3, [r7, #4] 801086e: 609a str r2, [r3, #8] if (pHeader->IDE == CAN_ID_STD) 8010870: 687b ldr r3, [r7, #4] 8010872: 689b ldr r3, [r3, #8] 8010874: 2b00 cmp r3, #0 8010876: d10c bne.n 8010892 { pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; 8010878: 68fb ldr r3, [r7, #12] 801087a: 681a ldr r2, [r3, #0] 801087c: 68bb ldr r3, [r7, #8] 801087e: 331b adds r3, #27 8010880: 011b lsls r3, r3, #4 8010882: 4413 add r3, r2 8010884: 681b ldr r3, [r3, #0] 8010886: 0d5b lsrs r3, r3, #21 8010888: f3c3 020a ubfx r2, r3, #0, #11 801088c: 687b ldr r3, [r7, #4] 801088e: 601a str r2, [r3, #0] 8010890: e00b b.n 80108aa } else { pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; 8010892: 68fb ldr r3, [r7, #12] 8010894: 681a ldr r2, [r3, #0] 8010896: 68bb ldr r3, [r7, #8] 8010898: 331b adds r3, #27 801089a: 011b lsls r3, r3, #4 801089c: 4413 add r3, r2 801089e: 681b ldr r3, [r3, #0] 80108a0: 08db lsrs r3, r3, #3 80108a2: f023 4260 bic.w r2, r3, #3758096384 @ 0xe0000000 pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & 80108a6: 687b ldr r3, [r7, #4] 80108a8: 605a str r2, [r3, #4] } pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); 80108aa: 68fb ldr r3, [r7, #12] 80108ac: 681a ldr r2, [r3, #0] 80108ae: 68bb ldr r3, [r7, #8] 80108b0: 331b adds r3, #27 80108b2: 011b lsls r3, r3, #4 80108b4: 4413 add r3, r2 80108b6: 681b ldr r3, [r3, #0] 80108b8: f003 0202 and.w r2, r3, #2 80108bc: 687b ldr r3, [r7, #4] 80108be: 60da str r2, [r3, #12] if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) 80108c0: 68fb ldr r3, [r7, #12] 80108c2: 681a ldr r2, [r3, #0] 80108c4: 68bb ldr r3, [r7, #8] 80108c6: 331b adds r3, #27 80108c8: 011b lsls r3, r3, #4 80108ca: 4413 add r3, r2 80108cc: 3304 adds r3, #4 80108ce: 681b ldr r3, [r3, #0] 80108d0: f003 0308 and.w r3, r3, #8 80108d4: 2b00 cmp r3, #0 80108d6: d003 beq.n 80108e0 { /* Truncate DLC to 8 if received field is over range */ pHeader->DLC = 8U; 80108d8: 687b ldr r3, [r7, #4] 80108da: 2208 movs r2, #8 80108dc: 611a str r2, [r3, #16] 80108de: e00b b.n 80108f8 } else { pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; 80108e0: 68fb ldr r3, [r7, #12] 80108e2: 681a ldr r2, [r3, #0] 80108e4: 68bb ldr r3, [r7, #8] 80108e6: 331b adds r3, #27 80108e8: 011b lsls r3, r3, #4 80108ea: 4413 add r3, r2 80108ec: 3304 adds r3, #4 80108ee: 681b ldr r3, [r3, #0] 80108f0: f003 020f and.w r2, r3, #15 80108f4: 687b ldr r3, [r7, #4] 80108f6: 611a str r2, [r3, #16] } pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; 80108f8: 68fb ldr r3, [r7, #12] 80108fa: 681a ldr r2, [r3, #0] 80108fc: 68bb ldr r3, [r7, #8] 80108fe: 331b adds r3, #27 8010900: 011b lsls r3, r3, #4 8010902: 4413 add r3, r2 8010904: 3304 adds r3, #4 8010906: 681b ldr r3, [r3, #0] 8010908: 0a1b lsrs r3, r3, #8 801090a: b2da uxtb r2, r3 801090c: 687b ldr r3, [r7, #4] 801090e: 619a str r2, [r3, #24] pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; 8010910: 68fb ldr r3, [r7, #12] 8010912: 681a ldr r2, [r3, #0] 8010914: 68bb ldr r3, [r7, #8] 8010916: 331b adds r3, #27 8010918: 011b lsls r3, r3, #4 801091a: 4413 add r3, r2 801091c: 3304 adds r3, #4 801091e: 681b ldr r3, [r3, #0] 8010920: 0c1b lsrs r3, r3, #16 8010922: b29a uxth r2, r3 8010924: 687b ldr r3, [r7, #4] 8010926: 615a str r2, [r3, #20] /* Get the data */ aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos); 8010928: 68fb ldr r3, [r7, #12] 801092a: 681a ldr r2, [r3, #0] 801092c: 68bb ldr r3, [r7, #8] 801092e: 011b lsls r3, r3, #4 8010930: 4413 add r3, r2 8010932: f503 73dc add.w r3, r3, #440 @ 0x1b8 8010936: 681b ldr r3, [r3, #0] 8010938: b2da uxtb r2, r3 801093a: 683b ldr r3, [r7, #0] 801093c: 701a strb r2, [r3, #0] aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos); 801093e: 68fb ldr r3, [r7, #12] 8010940: 681a ldr r2, [r3, #0] 8010942: 68bb ldr r3, [r7, #8] 8010944: 011b lsls r3, r3, #4 8010946: 4413 add r3, r2 8010948: f503 73dc add.w r3, r3, #440 @ 0x1b8 801094c: 681b ldr r3, [r3, #0] 801094e: 0a1a lsrs r2, r3, #8 8010950: 683b ldr r3, [r7, #0] 8010952: 3301 adds r3, #1 8010954: b2d2 uxtb r2, r2 8010956: 701a strb r2, [r3, #0] aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos); 8010958: 68fb ldr r3, [r7, #12] 801095a: 681a ldr r2, [r3, #0] 801095c: 68bb ldr r3, [r7, #8] 801095e: 011b lsls r3, r3, #4 8010960: 4413 add r3, r2 8010962: f503 73dc add.w r3, r3, #440 @ 0x1b8 8010966: 681b ldr r3, [r3, #0] 8010968: 0c1a lsrs r2, r3, #16 801096a: 683b ldr r3, [r7, #0] 801096c: 3302 adds r3, #2 801096e: b2d2 uxtb r2, r2 8010970: 701a strb r2, [r3, #0] aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos); 8010972: 68fb ldr r3, [r7, #12] 8010974: 681a ldr r2, [r3, #0] 8010976: 68bb ldr r3, [r7, #8] 8010978: 011b lsls r3, r3, #4 801097a: 4413 add r3, r2 801097c: f503 73dc add.w r3, r3, #440 @ 0x1b8 8010980: 681b ldr r3, [r3, #0] 8010982: 0e1a lsrs r2, r3, #24 8010984: 683b ldr r3, [r7, #0] 8010986: 3303 adds r3, #3 8010988: b2d2 uxtb r2, r2 801098a: 701a strb r2, [r3, #0] aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos); 801098c: 68fb ldr r3, [r7, #12] 801098e: 681a ldr r2, [r3, #0] 8010990: 68bb ldr r3, [r7, #8] 8010992: 011b lsls r3, r3, #4 8010994: 4413 add r3, r2 8010996: f503 73de add.w r3, r3, #444 @ 0x1bc 801099a: 681a ldr r2, [r3, #0] 801099c: 683b ldr r3, [r7, #0] 801099e: 3304 adds r3, #4 80109a0: b2d2 uxtb r2, r2 80109a2: 701a strb r2, [r3, #0] aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos); 80109a4: 68fb ldr r3, [r7, #12] 80109a6: 681a ldr r2, [r3, #0] 80109a8: 68bb ldr r3, [r7, #8] 80109aa: 011b lsls r3, r3, #4 80109ac: 4413 add r3, r2 80109ae: f503 73de add.w r3, r3, #444 @ 0x1bc 80109b2: 681b ldr r3, [r3, #0] 80109b4: 0a1a lsrs r2, r3, #8 80109b6: 683b ldr r3, [r7, #0] 80109b8: 3305 adds r3, #5 80109ba: b2d2 uxtb r2, r2 80109bc: 701a strb r2, [r3, #0] aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos); 80109be: 68fb ldr r3, [r7, #12] 80109c0: 681a ldr r2, [r3, #0] 80109c2: 68bb ldr r3, [r7, #8] 80109c4: 011b lsls r3, r3, #4 80109c6: 4413 add r3, r2 80109c8: f503 73de add.w r3, r3, #444 @ 0x1bc 80109cc: 681b ldr r3, [r3, #0] 80109ce: 0c1a lsrs r2, r3, #16 80109d0: 683b ldr r3, [r7, #0] 80109d2: 3306 adds r3, #6 80109d4: b2d2 uxtb r2, r2 80109d6: 701a strb r2, [r3, #0] aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos); 80109d8: 68fb ldr r3, [r7, #12] 80109da: 681a ldr r2, [r3, #0] 80109dc: 68bb ldr r3, [r7, #8] 80109de: 011b lsls r3, r3, #4 80109e0: 4413 add r3, r2 80109e2: f503 73de add.w r3, r3, #444 @ 0x1bc 80109e6: 681b ldr r3, [r3, #0] 80109e8: 0e1a lsrs r2, r3, #24 80109ea: 683b ldr r3, [r7, #0] 80109ec: 3307 adds r3, #7 80109ee: b2d2 uxtb r2, r2 80109f0: 701a strb r2, [r3, #0] /* Release the FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 80109f2: 68bb ldr r3, [r7, #8] 80109f4: 2b00 cmp r3, #0 80109f6: d108 bne.n 8010a0a { /* Release RX FIFO 0 */ SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); 80109f8: 68fb ldr r3, [r7, #12] 80109fa: 681b ldr r3, [r3, #0] 80109fc: 68da ldr r2, [r3, #12] 80109fe: 68fb ldr r3, [r7, #12] 8010a00: 681b ldr r3, [r3, #0] 8010a02: f042 0220 orr.w r2, r2, #32 8010a06: 60da str r2, [r3, #12] 8010a08: e007 b.n 8010a1a } else /* Rx element is assigned to Rx FIFO 1 */ { /* Release RX FIFO 1 */ SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); 8010a0a: 68fb ldr r3, [r7, #12] 8010a0c: 681b ldr r3, [r3, #0] 8010a0e: 691a ldr r2, [r3, #16] 8010a10: 68fb ldr r3, [r7, #12] 8010a12: 681b ldr r3, [r3, #0] 8010a14: f042 0220 orr.w r2, r2, #32 8010a18: 611a str r2, [r3, #16] } /* Return function status */ return HAL_OK; 8010a1a: 2300 movs r3, #0 8010a1c: e006 b.n 8010a2c } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 8010a1e: 68fb ldr r3, [r7, #12] 8010a20: 6a5b ldr r3, [r3, #36] @ 0x24 8010a22: f443 2280 orr.w r2, r3, #262144 @ 0x40000 8010a26: 68fb ldr r3, [r7, #12] 8010a28: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8010a2a: 2301 movs r3, #1 } } 8010a2c: 4618 mov r0, r3 8010a2e: 371c adds r7, #28 8010a30: 46bd mov sp, r7 8010a32: bc80 pop {r7} 8010a34: 4770 bx lr 08010a36 : * @param ActiveITs indicates which interrupts will be enabled. * This parameter can be any combination of @arg CAN_Interrupts. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) { 8010a36: b480 push {r7} 8010a38: b085 sub sp, #20 8010a3a: af00 add r7, sp, #0 8010a3c: 6078 str r0, [r7, #4] 8010a3e: 6039 str r1, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 8010a40: 687b ldr r3, [r7, #4] 8010a42: f893 3020 ldrb.w r3, [r3, #32] 8010a46: 73fb strb r3, [r7, #15] /* Check function parameters */ assert_param(IS_CAN_IT(ActiveITs)); if ((state == HAL_CAN_STATE_READY) || 8010a48: 7bfb ldrb r3, [r7, #15] 8010a4a: 2b01 cmp r3, #1 8010a4c: d002 beq.n 8010a54 8010a4e: 7bfb ldrb r3, [r7, #15] 8010a50: 2b02 cmp r3, #2 8010a52: d109 bne.n 8010a68 (state == HAL_CAN_STATE_LISTENING)) { /* Enable the selected interrupts */ __HAL_CAN_ENABLE_IT(hcan, ActiveITs); 8010a54: 687b ldr r3, [r7, #4] 8010a56: 681b ldr r3, [r3, #0] 8010a58: 6959 ldr r1, [r3, #20] 8010a5a: 687b ldr r3, [r7, #4] 8010a5c: 681b ldr r3, [r3, #0] 8010a5e: 683a ldr r2, [r7, #0] 8010a60: 430a orrs r2, r1 8010a62: 615a str r2, [r3, #20] /* Return function status */ return HAL_OK; 8010a64: 2300 movs r3, #0 8010a66: e006 b.n 8010a76 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 8010a68: 687b ldr r3, [r7, #4] 8010a6a: 6a5b ldr r3, [r3, #36] @ 0x24 8010a6c: f443 2280 orr.w r2, r3, #262144 @ 0x40000 8010a70: 687b ldr r3, [r7, #4] 8010a72: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8010a74: 2301 movs r3, #1 } } 8010a76: 4618 mov r0, r3 8010a78: 3714 adds r7, #20 8010a7a: 46bd mov sp, r7 8010a7c: bc80 pop {r7} 8010a7e: 4770 bx lr 08010a80 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) { 8010a80: b580 push {r7, lr} 8010a82: b08a sub sp, #40 @ 0x28 8010a84: af00 add r7, sp, #0 8010a86: 6078 str r0, [r7, #4] uint32_t errorcode = HAL_CAN_ERROR_NONE; 8010a88: 2300 movs r3, #0 8010a8a: 627b str r3, [r7, #36] @ 0x24 uint32_t interrupts = READ_REG(hcan->Instance->IER); 8010a8c: 687b ldr r3, [r7, #4] 8010a8e: 681b ldr r3, [r3, #0] 8010a90: 695b ldr r3, [r3, #20] 8010a92: 623b str r3, [r7, #32] uint32_t msrflags = READ_REG(hcan->Instance->MSR); 8010a94: 687b ldr r3, [r7, #4] 8010a96: 681b ldr r3, [r3, #0] 8010a98: 685b ldr r3, [r3, #4] 8010a9a: 61fb str r3, [r7, #28] uint32_t tsrflags = READ_REG(hcan->Instance->TSR); 8010a9c: 687b ldr r3, [r7, #4] 8010a9e: 681b ldr r3, [r3, #0] 8010aa0: 689b ldr r3, [r3, #8] 8010aa2: 61bb str r3, [r7, #24] uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); 8010aa4: 687b ldr r3, [r7, #4] 8010aa6: 681b ldr r3, [r3, #0] 8010aa8: 68db ldr r3, [r3, #12] 8010aaa: 617b str r3, [r7, #20] uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); 8010aac: 687b ldr r3, [r7, #4] 8010aae: 681b ldr r3, [r3, #0] 8010ab0: 691b ldr r3, [r3, #16] 8010ab2: 613b str r3, [r7, #16] uint32_t esrflags = READ_REG(hcan->Instance->ESR); 8010ab4: 687b ldr r3, [r7, #4] 8010ab6: 681b ldr r3, [r3, #0] 8010ab8: 699b ldr r3, [r3, #24] 8010aba: 60fb str r3, [r7, #12] /* Transmit Mailbox empty interrupt management *****************************/ if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) 8010abc: 6a3b ldr r3, [r7, #32] 8010abe: f003 0301 and.w r3, r3, #1 8010ac2: 2b00 cmp r3, #0 8010ac4: d07c beq.n 8010bc0 { /* Transmit Mailbox 0 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP0) != 0U) 8010ac6: 69bb ldr r3, [r7, #24] 8010ac8: f003 0301 and.w r3, r3, #1 8010acc: 2b00 cmp r3, #0 8010ace: d023 beq.n 8010b18 { /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); 8010ad0: 687b ldr r3, [r7, #4] 8010ad2: 681b ldr r3, [r3, #0] 8010ad4: 2201 movs r2, #1 8010ad6: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK0) != 0U) 8010ad8: 69bb ldr r3, [r7, #24] 8010ada: f003 0302 and.w r3, r3, #2 8010ade: 2b00 cmp r3, #0 8010ae0: d003 beq.n 8010aea #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0CompleteCallback(hcan); 8010ae2: 6878 ldr r0, [r7, #4] 8010ae4: f000 f983 bl 8010dee 8010ae8: e016 b.n 8010b18 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST0) != 0U) 8010aea: 69bb ldr r3, [r7, #24] 8010aec: f003 0304 and.w r3, r3, #4 8010af0: 2b00 cmp r3, #0 8010af2: d004 beq.n 8010afe { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST0; 8010af4: 6a7b ldr r3, [r7, #36] @ 0x24 8010af6: f443 6300 orr.w r3, r3, #2048 @ 0x800 8010afa: 627b str r3, [r7, #36] @ 0x24 8010afc: e00c b.n 8010b18 } else if ((tsrflags & CAN_TSR_TERR0) != 0U) 8010afe: 69bb ldr r3, [r7, #24] 8010b00: f003 0308 and.w r3, r3, #8 8010b04: 2b00 cmp r3, #0 8010b06: d004 beq.n 8010b12 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR0; 8010b08: 6a7b ldr r3, [r7, #36] @ 0x24 8010b0a: f443 5380 orr.w r3, r3, #4096 @ 0x1000 8010b0e: 627b str r3, [r7, #36] @ 0x24 8010b10: e002 b.n 8010b18 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0AbortCallback(hcan); 8010b12: 6878 ldr r0, [r7, #4] 8010b14: f000 f986 bl 8010e24 } } } /* Transmit Mailbox 1 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP1) != 0U) 8010b18: 69bb ldr r3, [r7, #24] 8010b1a: f403 7380 and.w r3, r3, #256 @ 0x100 8010b1e: 2b00 cmp r3, #0 8010b20: d024 beq.n 8010b6c { /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); 8010b22: 687b ldr r3, [r7, #4] 8010b24: 681b ldr r3, [r3, #0] 8010b26: f44f 7280 mov.w r2, #256 @ 0x100 8010b2a: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK1) != 0U) 8010b2c: 69bb ldr r3, [r7, #24] 8010b2e: f403 7300 and.w r3, r3, #512 @ 0x200 8010b32: 2b00 cmp r3, #0 8010b34: d003 beq.n 8010b3e #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1CompleteCallback(hcan); 8010b36: 6878 ldr r0, [r7, #4] 8010b38: f000 f962 bl 8010e00 8010b3c: e016 b.n 8010b6c #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST1) != 0U) 8010b3e: 69bb ldr r3, [r7, #24] 8010b40: f403 6380 and.w r3, r3, #1024 @ 0x400 8010b44: 2b00 cmp r3, #0 8010b46: d004 beq.n 8010b52 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST1; 8010b48: 6a7b ldr r3, [r7, #36] @ 0x24 8010b4a: f443 5300 orr.w r3, r3, #8192 @ 0x2000 8010b4e: 627b str r3, [r7, #36] @ 0x24 8010b50: e00c b.n 8010b6c } else if ((tsrflags & CAN_TSR_TERR1) != 0U) 8010b52: 69bb ldr r3, [r7, #24] 8010b54: f403 6300 and.w r3, r3, #2048 @ 0x800 8010b58: 2b00 cmp r3, #0 8010b5a: d004 beq.n 8010b66 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR1; 8010b5c: 6a7b ldr r3, [r7, #36] @ 0x24 8010b5e: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8010b62: 627b str r3, [r7, #36] @ 0x24 8010b64: e002 b.n 8010b6c #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1AbortCallback(hcan); 8010b66: 6878 ldr r0, [r7, #4] 8010b68: f000 f965 bl 8010e36 } } } /* Transmit Mailbox 2 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP2) != 0U) 8010b6c: 69bb ldr r3, [r7, #24] 8010b6e: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010b72: 2b00 cmp r3, #0 8010b74: d024 beq.n 8010bc0 { /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); 8010b76: 687b ldr r3, [r7, #4] 8010b78: 681b ldr r3, [r3, #0] 8010b7a: f44f 3280 mov.w r2, #65536 @ 0x10000 8010b7e: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK2) != 0U) 8010b80: 69bb ldr r3, [r7, #24] 8010b82: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010b86: 2b00 cmp r3, #0 8010b88: d003 beq.n 8010b92 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2CompleteCallback(hcan); 8010b8a: 6878 ldr r0, [r7, #4] 8010b8c: f000 f941 bl 8010e12 8010b90: e016 b.n 8010bc0 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST2) != 0U) 8010b92: 69bb ldr r3, [r7, #24] 8010b94: f403 2380 and.w r3, r3, #262144 @ 0x40000 8010b98: 2b00 cmp r3, #0 8010b9a: d004 beq.n 8010ba6 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST2; 8010b9c: 6a7b ldr r3, [r7, #36] @ 0x24 8010b9e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8010ba2: 627b str r3, [r7, #36] @ 0x24 8010ba4: e00c b.n 8010bc0 } else if ((tsrflags & CAN_TSR_TERR2) != 0U) 8010ba6: 69bb ldr r3, [r7, #24] 8010ba8: f403 2300 and.w r3, r3, #524288 @ 0x80000 8010bac: 2b00 cmp r3, #0 8010bae: d004 beq.n 8010bba { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR2; 8010bb0: 6a7b ldr r3, [r7, #36] @ 0x24 8010bb2: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8010bb6: 627b str r3, [r7, #36] @ 0x24 8010bb8: e002 b.n 8010bc0 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2AbortCallback(hcan); 8010bba: 6878 ldr r0, [r7, #4] 8010bbc: f000 f944 bl 8010e48 } } } /* Receive FIFO 0 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) 8010bc0: 6a3b ldr r3, [r7, #32] 8010bc2: f003 0308 and.w r3, r3, #8 8010bc6: 2b00 cmp r3, #0 8010bc8: d00c beq.n 8010be4 { if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) 8010bca: 697b ldr r3, [r7, #20] 8010bcc: f003 0310 and.w r3, r3, #16 8010bd0: 2b00 cmp r3, #0 8010bd2: d007 beq.n 8010be4 { /* Set CAN error code to Rx Fifo 0 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV0; 8010bd4: 6a7b ldr r3, [r7, #36] @ 0x24 8010bd6: f443 7300 orr.w r3, r3, #512 @ 0x200 8010bda: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO0 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); 8010bdc: 687b ldr r3, [r7, #4] 8010bde: 681b ldr r3, [r3, #0] 8010be0: 2210 movs r2, #16 8010be2: 60da str r2, [r3, #12] } } /* Receive FIFO 0 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) 8010be4: 6a3b ldr r3, [r7, #32] 8010be6: f003 0304 and.w r3, r3, #4 8010bea: 2b00 cmp r3, #0 8010bec: d00b beq.n 8010c06 { if ((rf0rflags & CAN_RF0R_FULL0) != 0U) 8010bee: 697b ldr r3, [r7, #20] 8010bf0: f003 0308 and.w r3, r3, #8 8010bf4: 2b00 cmp r3, #0 8010bf6: d006 beq.n 8010c06 { /* Clear FIFO 0 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); 8010bf8: 687b ldr r3, [r7, #4] 8010bfa: 681b ldr r3, [r3, #0] 8010bfc: 2208 movs r2, #8 8010bfe: 60da str r2, [r3, #12] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0FullCallback(hcan); 8010c00: 6878 ldr r0, [r7, #4] 8010c02: f000 f933 bl 8010e6c #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 0 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) 8010c06: 6a3b ldr r3, [r7, #32] 8010c08: f003 0302 and.w r3, r3, #2 8010c0c: 2b00 cmp r3, #0 8010c0e: d009 beq.n 8010c24 { /* Check if message is still pending */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) 8010c10: 687b ldr r3, [r7, #4] 8010c12: 681b ldr r3, [r3, #0] 8010c14: 68db ldr r3, [r3, #12] 8010c16: f003 0303 and.w r3, r3, #3 8010c1a: 2b00 cmp r3, #0 8010c1c: d002 beq.n 8010c24 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0MsgPendingCallback(hcan); 8010c1e: 6878 ldr r0, [r7, #4] 8010c20: f000 f91b bl 8010e5a #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) 8010c24: 6a3b ldr r3, [r7, #32] 8010c26: f003 0340 and.w r3, r3, #64 @ 0x40 8010c2a: 2b00 cmp r3, #0 8010c2c: d00c beq.n 8010c48 { if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) 8010c2e: 693b ldr r3, [r7, #16] 8010c30: f003 0310 and.w r3, r3, #16 8010c34: 2b00 cmp r3, #0 8010c36: d007 beq.n 8010c48 { /* Set CAN error code to Rx Fifo 1 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV1; 8010c38: 6a7b ldr r3, [r7, #36] @ 0x24 8010c3a: f443 6380 orr.w r3, r3, #1024 @ 0x400 8010c3e: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO1 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); 8010c40: 687b ldr r3, [r7, #4] 8010c42: 681b ldr r3, [r3, #0] 8010c44: 2210 movs r2, #16 8010c46: 611a str r2, [r3, #16] } } /* Receive FIFO 1 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) 8010c48: 6a3b ldr r3, [r7, #32] 8010c4a: f003 0320 and.w r3, r3, #32 8010c4e: 2b00 cmp r3, #0 8010c50: d00b beq.n 8010c6a { if ((rf1rflags & CAN_RF1R_FULL1) != 0U) 8010c52: 693b ldr r3, [r7, #16] 8010c54: f003 0308 and.w r3, r3, #8 8010c58: 2b00 cmp r3, #0 8010c5a: d006 beq.n 8010c6a { /* Clear FIFO 1 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); 8010c5c: 687b ldr r3, [r7, #4] 8010c5e: 681b ldr r3, [r3, #0] 8010c60: 2208 movs r2, #8 8010c62: 611a str r2, [r3, #16] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1FullCallback(hcan); 8010c64: 6878 ldr r0, [r7, #4] 8010c66: f000 f90a bl 8010e7e #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) 8010c6a: 6a3b ldr r3, [r7, #32] 8010c6c: f003 0310 and.w r3, r3, #16 8010c70: 2b00 cmp r3, #0 8010c72: d009 beq.n 8010c88 { /* Check if message is still pending */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) 8010c74: 687b ldr r3, [r7, #4] 8010c76: 681b ldr r3, [r3, #0] 8010c78: 691b ldr r3, [r3, #16] 8010c7a: f003 0303 and.w r3, r3, #3 8010c7e: 2b00 cmp r3, #0 8010c80: d002 beq.n 8010c88 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1MsgPendingCallback(hcan); 8010c82: 6878 ldr r0, [r7, #4] 8010c84: f7fa fea6 bl 800b9d4 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Sleep interrupt management *********************************************/ if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) 8010c88: 6a3b ldr r3, [r7, #32] 8010c8a: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010c8e: 2b00 cmp r3, #0 8010c90: d00b beq.n 8010caa { if ((msrflags & CAN_MSR_SLAKI) != 0U) 8010c92: 69fb ldr r3, [r7, #28] 8010c94: f003 0310 and.w r3, r3, #16 8010c98: 2b00 cmp r3, #0 8010c9a: d006 beq.n 8010caa { /* Clear Sleep interrupt Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); 8010c9c: 687b ldr r3, [r7, #4] 8010c9e: 681b ldr r3, [r3, #0] 8010ca0: 2210 movs r2, #16 8010ca2: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->SleepCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_SleepCallback(hcan); 8010ca4: 6878 ldr r0, [r7, #4] 8010ca6: f000 f8f3 bl 8010e90 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* WakeUp interrupt management *********************************************/ if ((interrupts & CAN_IT_WAKEUP) != 0U) 8010caa: 6a3b ldr r3, [r7, #32] 8010cac: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010cb0: 2b00 cmp r3, #0 8010cb2: d00b beq.n 8010ccc { if ((msrflags & CAN_MSR_WKUI) != 0U) 8010cb4: 69fb ldr r3, [r7, #28] 8010cb6: f003 0308 and.w r3, r3, #8 8010cba: 2b00 cmp r3, #0 8010cbc: d006 beq.n 8010ccc { /* Clear WakeUp Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); 8010cbe: 687b ldr r3, [r7, #4] 8010cc0: 681b ldr r3, [r3, #0] 8010cc2: 2208 movs r2, #8 8010cc4: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->WakeUpFromRxMsgCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_WakeUpFromRxMsgCallback(hcan); 8010cc6: 6878 ldr r0, [r7, #4] 8010cc8: f000 f8eb bl 8010ea2 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Error interrupts management *********************************************/ if ((interrupts & CAN_IT_ERROR) != 0U) 8010ccc: 6a3b ldr r3, [r7, #32] 8010cce: f403 4300 and.w r3, r3, #32768 @ 0x8000 8010cd2: 2b00 cmp r3, #0 8010cd4: d07b beq.n 8010dce { if ((msrflags & CAN_MSR_ERRI) != 0U) 8010cd6: 69fb ldr r3, [r7, #28] 8010cd8: f003 0304 and.w r3, r3, #4 8010cdc: 2b00 cmp r3, #0 8010cde: d072 beq.n 8010dc6 { /* Check Error Warning Flag */ if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 8010ce0: 6a3b ldr r3, [r7, #32] 8010ce2: f403 7380 and.w r3, r3, #256 @ 0x100 8010ce6: 2b00 cmp r3, #0 8010ce8: d008 beq.n 8010cfc ((esrflags & CAN_ESR_EWGF) != 0U)) 8010cea: 68fb ldr r3, [r7, #12] 8010cec: f003 0301 and.w r3, r3, #1 if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 8010cf0: 2b00 cmp r3, #0 8010cf2: d003 beq.n 8010cfc { /* Set CAN error code to Error Warning */ errorcode |= HAL_CAN_ERROR_EWG; 8010cf4: 6a7b ldr r3, [r7, #36] @ 0x24 8010cf6: f043 0301 orr.w r3, r3, #1 8010cfa: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Warning Flag as read-only */ } /* Check Error Passive Flag */ if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 8010cfc: 6a3b ldr r3, [r7, #32] 8010cfe: f403 7300 and.w r3, r3, #512 @ 0x200 8010d02: 2b00 cmp r3, #0 8010d04: d008 beq.n 8010d18 ((esrflags & CAN_ESR_EPVF) != 0U)) 8010d06: 68fb ldr r3, [r7, #12] 8010d08: f003 0302 and.w r3, r3, #2 if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 8010d0c: 2b00 cmp r3, #0 8010d0e: d003 beq.n 8010d18 { /* Set CAN error code to Error Passive */ errorcode |= HAL_CAN_ERROR_EPV; 8010d10: 6a7b ldr r3, [r7, #36] @ 0x24 8010d12: f043 0302 orr.w r3, r3, #2 8010d16: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Passive Flag as read-only */ } /* Check Bus-off Flag */ if (((interrupts & CAN_IT_BUSOFF) != 0U) && 8010d18: 6a3b ldr r3, [r7, #32] 8010d1a: f403 6380 and.w r3, r3, #1024 @ 0x400 8010d1e: 2b00 cmp r3, #0 8010d20: d008 beq.n 8010d34 ((esrflags & CAN_ESR_BOFF) != 0U)) 8010d22: 68fb ldr r3, [r7, #12] 8010d24: f003 0304 and.w r3, r3, #4 if (((interrupts & CAN_IT_BUSOFF) != 0U) && 8010d28: 2b00 cmp r3, #0 8010d2a: d003 beq.n 8010d34 { /* Set CAN error code to Bus-Off */ errorcode |= HAL_CAN_ERROR_BOF; 8010d2c: 6a7b ldr r3, [r7, #36] @ 0x24 8010d2e: f043 0304 orr.w r3, r3, #4 8010d32: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Bus-Off as read-only */ } /* Check Last Error Code Flag */ if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 8010d34: 6a3b ldr r3, [r7, #32] 8010d36: f403 6300 and.w r3, r3, #2048 @ 0x800 8010d3a: 2b00 cmp r3, #0 8010d3c: d043 beq.n 8010dc6 ((esrflags & CAN_ESR_LEC) != 0U)) 8010d3e: 68fb ldr r3, [r7, #12] 8010d40: f003 0370 and.w r3, r3, #112 @ 0x70 if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 8010d44: 2b00 cmp r3, #0 8010d46: d03e beq.n 8010dc6 { switch (esrflags & CAN_ESR_LEC) 8010d48: 68fb ldr r3, [r7, #12] 8010d4a: f003 0370 and.w r3, r3, #112 @ 0x70 8010d4e: 2b60 cmp r3, #96 @ 0x60 8010d50: d02b beq.n 8010daa 8010d52: 2b60 cmp r3, #96 @ 0x60 8010d54: d82e bhi.n 8010db4 8010d56: 2b50 cmp r3, #80 @ 0x50 8010d58: d022 beq.n 8010da0 8010d5a: 2b50 cmp r3, #80 @ 0x50 8010d5c: d82a bhi.n 8010db4 8010d5e: 2b40 cmp r3, #64 @ 0x40 8010d60: d019 beq.n 8010d96 8010d62: 2b40 cmp r3, #64 @ 0x40 8010d64: d826 bhi.n 8010db4 8010d66: 2b30 cmp r3, #48 @ 0x30 8010d68: d010 beq.n 8010d8c 8010d6a: 2b30 cmp r3, #48 @ 0x30 8010d6c: d822 bhi.n 8010db4 8010d6e: 2b10 cmp r3, #16 8010d70: d002 beq.n 8010d78 8010d72: 2b20 cmp r3, #32 8010d74: d005 beq.n 8010d82 case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): /* Set CAN error code to CRC error */ errorcode |= HAL_CAN_ERROR_CRC; break; default: break; 8010d76: e01d b.n 8010db4 errorcode |= HAL_CAN_ERROR_STF; 8010d78: 6a7b ldr r3, [r7, #36] @ 0x24 8010d7a: f043 0308 orr.w r3, r3, #8 8010d7e: 627b str r3, [r7, #36] @ 0x24 break; 8010d80: e019 b.n 8010db6 errorcode |= HAL_CAN_ERROR_FOR; 8010d82: 6a7b ldr r3, [r7, #36] @ 0x24 8010d84: f043 0310 orr.w r3, r3, #16 8010d88: 627b str r3, [r7, #36] @ 0x24 break; 8010d8a: e014 b.n 8010db6 errorcode |= HAL_CAN_ERROR_ACK; 8010d8c: 6a7b ldr r3, [r7, #36] @ 0x24 8010d8e: f043 0320 orr.w r3, r3, #32 8010d92: 627b str r3, [r7, #36] @ 0x24 break; 8010d94: e00f b.n 8010db6 errorcode |= HAL_CAN_ERROR_BR; 8010d96: 6a7b ldr r3, [r7, #36] @ 0x24 8010d98: f043 0340 orr.w r3, r3, #64 @ 0x40 8010d9c: 627b str r3, [r7, #36] @ 0x24 break; 8010d9e: e00a b.n 8010db6 errorcode |= HAL_CAN_ERROR_BD; 8010da0: 6a7b ldr r3, [r7, #36] @ 0x24 8010da2: f043 0380 orr.w r3, r3, #128 @ 0x80 8010da6: 627b str r3, [r7, #36] @ 0x24 break; 8010da8: e005 b.n 8010db6 errorcode |= HAL_CAN_ERROR_CRC; 8010daa: 6a7b ldr r3, [r7, #36] @ 0x24 8010dac: f443 7380 orr.w r3, r3, #256 @ 0x100 8010db0: 627b str r3, [r7, #36] @ 0x24 break; 8010db2: e000 b.n 8010db6 break; 8010db4: bf00 nop } /* Clear Last error code Flag */ CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); 8010db6: 687b ldr r3, [r7, #4] 8010db8: 681b ldr r3, [r3, #0] 8010dba: 699a ldr r2, [r3, #24] 8010dbc: 687b ldr r3, [r7, #4] 8010dbe: 681b ldr r3, [r3, #0] 8010dc0: f022 0270 bic.w r2, r2, #112 @ 0x70 8010dc4: 619a str r2, [r3, #24] } } /* Clear ERRI Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); 8010dc6: 687b ldr r3, [r7, #4] 8010dc8: 681b ldr r3, [r3, #0] 8010dca: 2204 movs r2, #4 8010dcc: 605a str r2, [r3, #4] } /* Call the Error call Back in case of Errors */ if (errorcode != HAL_CAN_ERROR_NONE) 8010dce: 6a7b ldr r3, [r7, #36] @ 0x24 8010dd0: 2b00 cmp r3, #0 8010dd2: d008 beq.n 8010de6 { /* Update error code in handle */ hcan->ErrorCode |= errorcode; 8010dd4: 687b ldr r3, [r7, #4] 8010dd6: 6a5a ldr r2, [r3, #36] @ 0x24 8010dd8: 6a7b ldr r3, [r7, #36] @ 0x24 8010dda: 431a orrs r2, r3 8010ddc: 687b ldr r3, [r7, #4] 8010dde: 625a str r2, [r3, #36] @ 0x24 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->ErrorCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_ErrorCallback(hcan); 8010de0: 6878 ldr r0, [r7, #4] 8010de2: f000 f867 bl 8010eb4 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } 8010de6: bf00 nop 8010de8: 3728 adds r7, #40 @ 0x28 8010dea: 46bd mov sp, r7 8010dec: bd80 pop {r7, pc} 08010dee : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) { 8010dee: b480 push {r7} 8010df0: b083 sub sp, #12 8010df2: af00 add r7, sp, #0 8010df4: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the user file */ } 8010df6: bf00 nop 8010df8: 370c adds r7, #12 8010dfa: 46bd mov sp, r7 8010dfc: bc80 pop {r7} 8010dfe: 4770 bx lr 08010e00 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) { 8010e00: b480 push {r7} 8010e02: b083 sub sp, #12 8010e04: af00 add r7, sp, #0 8010e06: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the user file */ } 8010e08: bf00 nop 8010e0a: 370c adds r7, #12 8010e0c: 46bd mov sp, r7 8010e0e: bc80 pop {r7} 8010e10: 4770 bx lr 08010e12 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) { 8010e12: b480 push {r7} 8010e14: b083 sub sp, #12 8010e16: af00 add r7, sp, #0 8010e18: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the user file */ } 8010e1a: bf00 nop 8010e1c: 370c adds r7, #12 8010e1e: 46bd mov sp, r7 8010e20: bc80 pop {r7} 8010e22: 4770 bx lr 08010e24 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) { 8010e24: b480 push {r7} 8010e26: b083 sub sp, #12 8010e28: af00 add r7, sp, #0 8010e2a: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0AbortCallback could be implemented in the user file */ } 8010e2c: bf00 nop 8010e2e: 370c adds r7, #12 8010e30: 46bd mov sp, r7 8010e32: bc80 pop {r7} 8010e34: 4770 bx lr 08010e36 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) { 8010e36: b480 push {r7} 8010e38: b083 sub sp, #12 8010e3a: af00 add r7, sp, #0 8010e3c: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1AbortCallback could be implemented in the user file */ } 8010e3e: bf00 nop 8010e40: 370c adds r7, #12 8010e42: 46bd mov sp, r7 8010e44: bc80 pop {r7} 8010e46: 4770 bx lr 08010e48 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) { 8010e48: b480 push {r7} 8010e4a: b083 sub sp, #12 8010e4c: af00 add r7, sp, #0 8010e4e: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2AbortCallback could be implemented in the user file */ } 8010e50: bf00 nop 8010e52: 370c adds r7, #12 8010e54: 46bd mov sp, r7 8010e56: bc80 pop {r7} 8010e58: 4770 bx lr 08010e5a : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) { 8010e5a: b480 push {r7} 8010e5c: b083 sub sp, #12 8010e5e: af00 add r7, sp, #0 8010e60: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the user file */ } 8010e62: bf00 nop 8010e64: 370c adds r7, #12 8010e66: 46bd mov sp, r7 8010e68: bc80 pop {r7} 8010e6a: 4770 bx lr 08010e6c : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) { 8010e6c: b480 push {r7} 8010e6e: b083 sub sp, #12 8010e70: af00 add r7, sp, #0 8010e72: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo0FullCallback could be implemented in the user file */ } 8010e74: bf00 nop 8010e76: 370c adds r7, #12 8010e78: 46bd mov sp, r7 8010e7a: bc80 pop {r7} 8010e7c: 4770 bx lr 08010e7e : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) { 8010e7e: b480 push {r7} 8010e80: b083 sub sp, #12 8010e82: af00 add r7, sp, #0 8010e84: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo1FullCallback could be implemented in the user file */ } 8010e86: bf00 nop 8010e88: 370c adds r7, #12 8010e8a: 46bd mov sp, r7 8010e8c: bc80 pop {r7} 8010e8e: 4770 bx lr 08010e90 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) { 8010e90: b480 push {r7} 8010e92: b083 sub sp, #12 8010e94: af00 add r7, sp, #0 8010e96: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_SleepCallback could be implemented in the user file */ } 8010e98: bf00 nop 8010e9a: 370c adds r7, #12 8010e9c: 46bd mov sp, r7 8010e9e: bc80 pop {r7} 8010ea0: 4770 bx lr 08010ea2 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) { 8010ea2: b480 push {r7} 8010ea4: b083 sub sp, #12 8010ea6: af00 add r7, sp, #0 8010ea8: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the user file */ } 8010eaa: bf00 nop 8010eac: 370c adds r7, #12 8010eae: 46bd mov sp, r7 8010eb0: bc80 pop {r7} 8010eb2: 4770 bx lr 08010eb4 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) { 8010eb4: b480 push {r7} 8010eb6: b083 sub sp, #12 8010eb8: af00 add r7, sp, #0 8010eba: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_ErrorCallback could be implemented in the user file */ } 8010ebc: bf00 nop 8010ebe: 370c adds r7, #12 8010ec0: 46bd mov sp, r7 8010ec2: bc80 pop {r7} 8010ec4: 4770 bx lr ... 08010ec8 <__NVIC_SetPriorityGrouping>: { 8010ec8: b480 push {r7} 8010eca: b085 sub sp, #20 8010ecc: af00 add r7, sp, #0 8010ece: 6078 str r0, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8010ed0: 687b ldr r3, [r7, #4] 8010ed2: f003 0307 and.w r3, r3, #7 8010ed6: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8010ed8: 4b0c ldr r3, [pc, #48] @ (8010f0c <__NVIC_SetPriorityGrouping+0x44>) 8010eda: 68db ldr r3, [r3, #12] 8010edc: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8010ede: 68ba ldr r2, [r7, #8] 8010ee0: f64f 03ff movw r3, #63743 @ 0xf8ff 8010ee4: 4013 ands r3, r2 8010ee6: 60bb str r3, [r7, #8] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8010ee8: 68fb ldr r3, [r7, #12] 8010eea: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8010eec: 68bb ldr r3, [r7, #8] 8010eee: 4313 orrs r3, r2 reg_value = (reg_value | 8010ef0: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8010ef4: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8010ef8: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8010efa: 4a04 ldr r2, [pc, #16] @ (8010f0c <__NVIC_SetPriorityGrouping+0x44>) 8010efc: 68bb ldr r3, [r7, #8] 8010efe: 60d3 str r3, [r2, #12] } 8010f00: bf00 nop 8010f02: 3714 adds r7, #20 8010f04: 46bd mov sp, r7 8010f06: bc80 pop {r7} 8010f08: 4770 bx lr 8010f0a: bf00 nop 8010f0c: e000ed00 .word 0xe000ed00 08010f10 <__NVIC_GetPriorityGrouping>: { 8010f10: b480 push {r7} 8010f12: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8010f14: 4b04 ldr r3, [pc, #16] @ (8010f28 <__NVIC_GetPriorityGrouping+0x18>) 8010f16: 68db ldr r3, [r3, #12] 8010f18: 0a1b lsrs r3, r3, #8 8010f1a: f003 0307 and.w r3, r3, #7 } 8010f1e: 4618 mov r0, r3 8010f20: 46bd mov sp, r7 8010f22: bc80 pop {r7} 8010f24: 4770 bx lr 8010f26: bf00 nop 8010f28: e000ed00 .word 0xe000ed00 08010f2c <__NVIC_EnableIRQ>: { 8010f2c: b480 push {r7} 8010f2e: b083 sub sp, #12 8010f30: af00 add r7, sp, #0 8010f32: 4603 mov r3, r0 8010f34: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8010f36: f997 3007 ldrsb.w r3, [r7, #7] 8010f3a: 2b00 cmp r3, #0 8010f3c: db0b blt.n 8010f56 <__NVIC_EnableIRQ+0x2a> NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8010f3e: 79fb ldrb r3, [r7, #7] 8010f40: f003 021f and.w r2, r3, #31 8010f44: 4906 ldr r1, [pc, #24] @ (8010f60 <__NVIC_EnableIRQ+0x34>) 8010f46: f997 3007 ldrsb.w r3, [r7, #7] 8010f4a: 095b lsrs r3, r3, #5 8010f4c: 2001 movs r0, #1 8010f4e: fa00 f202 lsl.w r2, r0, r2 8010f52: f841 2023 str.w r2, [r1, r3, lsl #2] } 8010f56: bf00 nop 8010f58: 370c adds r7, #12 8010f5a: 46bd mov sp, r7 8010f5c: bc80 pop {r7} 8010f5e: 4770 bx lr 8010f60: e000e100 .word 0xe000e100 08010f64 <__NVIC_SetPriority>: { 8010f64: b480 push {r7} 8010f66: b083 sub sp, #12 8010f68: af00 add r7, sp, #0 8010f6a: 4603 mov r3, r0 8010f6c: 6039 str r1, [r7, #0] 8010f6e: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8010f70: f997 3007 ldrsb.w r3, [r7, #7] 8010f74: 2b00 cmp r3, #0 8010f76: db0a blt.n 8010f8e <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8010f78: 683b ldr r3, [r7, #0] 8010f7a: b2da uxtb r2, r3 8010f7c: 490c ldr r1, [pc, #48] @ (8010fb0 <__NVIC_SetPriority+0x4c>) 8010f7e: f997 3007 ldrsb.w r3, [r7, #7] 8010f82: 0112 lsls r2, r2, #4 8010f84: b2d2 uxtb r2, r2 8010f86: 440b add r3, r1 8010f88: f883 2300 strb.w r2, [r3, #768] @ 0x300 } 8010f8c: e00a b.n 8010fa4 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8010f8e: 683b ldr r3, [r7, #0] 8010f90: b2da uxtb r2, r3 8010f92: 4908 ldr r1, [pc, #32] @ (8010fb4 <__NVIC_SetPriority+0x50>) 8010f94: 79fb ldrb r3, [r7, #7] 8010f96: f003 030f and.w r3, r3, #15 8010f9a: 3b04 subs r3, #4 8010f9c: 0112 lsls r2, r2, #4 8010f9e: b2d2 uxtb r2, r2 8010fa0: 440b add r3, r1 8010fa2: 761a strb r2, [r3, #24] } 8010fa4: bf00 nop 8010fa6: 370c adds r7, #12 8010fa8: 46bd mov sp, r7 8010faa: bc80 pop {r7} 8010fac: 4770 bx lr 8010fae: bf00 nop 8010fb0: e000e100 .word 0xe000e100 8010fb4: e000ed00 .word 0xe000ed00 08010fb8 : { 8010fb8: b480 push {r7} 8010fba: b089 sub sp, #36 @ 0x24 8010fbc: af00 add r7, sp, #0 8010fbe: 60f8 str r0, [r7, #12] 8010fc0: 60b9 str r1, [r7, #8] 8010fc2: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8010fc4: 68fb ldr r3, [r7, #12] 8010fc6: f003 0307 and.w r3, r3, #7 8010fca: 61fb str r3, [r7, #28] PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8010fcc: 69fb ldr r3, [r7, #28] 8010fce: f1c3 0307 rsb r3, r3, #7 8010fd2: 2b04 cmp r3, #4 8010fd4: bf28 it cs 8010fd6: 2304 movcs r3, #4 8010fd8: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8010fda: 69fb ldr r3, [r7, #28] 8010fdc: 3304 adds r3, #4 8010fde: 2b06 cmp r3, #6 8010fe0: d902 bls.n 8010fe8 8010fe2: 69fb ldr r3, [r7, #28] 8010fe4: 3b03 subs r3, #3 8010fe6: e000 b.n 8010fea 8010fe8: 2300 movs r3, #0 8010fea: 617b str r3, [r7, #20] ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8010fec: f04f 32ff mov.w r2, #4294967295 8010ff0: 69bb ldr r3, [r7, #24] 8010ff2: fa02 f303 lsl.w r3, r2, r3 8010ff6: 43da mvns r2, r3 8010ff8: 68bb ldr r3, [r7, #8] 8010ffa: 401a ands r2, r3 8010ffc: 697b ldr r3, [r7, #20] 8010ffe: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8011000: f04f 31ff mov.w r1, #4294967295 8011004: 697b ldr r3, [r7, #20] 8011006: fa01 f303 lsl.w r3, r1, r3 801100a: 43d9 mvns r1, r3 801100c: 687b ldr r3, [r7, #4] 801100e: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8011010: 4313 orrs r3, r2 } 8011012: 4618 mov r0, r3 8011014: 3724 adds r7, #36 @ 0x24 8011016: 46bd mov sp, r7 8011018: bc80 pop {r7} 801101a: 4770 bx lr 0801101c : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 801101c: b580 push {r7, lr} 801101e: b082 sub sp, #8 8011020: af00 add r7, sp, #0 8011022: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8011024: 687b ldr r3, [r7, #4] 8011026: 3b01 subs r3, #1 8011028: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 801102c: d301 bcc.n 8011032 { return (1UL); /* Reload value impossible */ 801102e: 2301 movs r3, #1 8011030: e00f b.n 8011052 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8011032: 4a0a ldr r2, [pc, #40] @ (801105c ) 8011034: 687b ldr r3, [r7, #4] 8011036: 3b01 subs r3, #1 8011038: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 801103a: 210f movs r1, #15 801103c: f04f 30ff mov.w r0, #4294967295 8011040: f7ff ff90 bl 8010f64 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8011044: 4b05 ldr r3, [pc, #20] @ (801105c ) 8011046: 2200 movs r2, #0 8011048: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 801104a: 4b04 ldr r3, [pc, #16] @ (801105c ) 801104c: 2207 movs r2, #7 801104e: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8011050: 2300 movs r3, #0 } 8011052: 4618 mov r0, r3 8011054: 3708 adds r7, #8 8011056: 46bd mov sp, r7 8011058: bd80 pop {r7, pc} 801105a: bf00 nop 801105c: e000e010 .word 0xe000e010 08011060 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8011060: b580 push {r7, lr} 8011062: b082 sub sp, #8 8011064: af00 add r7, sp, #0 8011066: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8011068: 6878 ldr r0, [r7, #4] 801106a: f7ff ff2d bl 8010ec8 <__NVIC_SetPriorityGrouping> } 801106e: bf00 nop 8011070: 3708 adds r7, #8 8011072: 46bd mov sp, r7 8011074: bd80 pop {r7, pc} 08011076 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8011076: b580 push {r7, lr} 8011078: b086 sub sp, #24 801107a: af00 add r7, sp, #0 801107c: 4603 mov r3, r0 801107e: 60b9 str r1, [r7, #8] 8011080: 607a str r2, [r7, #4] 8011082: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8011084: 2300 movs r3, #0 8011086: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8011088: f7ff ff42 bl 8010f10 <__NVIC_GetPriorityGrouping> 801108c: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 801108e: 687a ldr r2, [r7, #4] 8011090: 68b9 ldr r1, [r7, #8] 8011092: 6978 ldr r0, [r7, #20] 8011094: f7ff ff90 bl 8010fb8 8011098: 4602 mov r2, r0 801109a: f997 300f ldrsb.w r3, [r7, #15] 801109e: 4611 mov r1, r2 80110a0: 4618 mov r0, r3 80110a2: f7ff ff5f bl 8010f64 <__NVIC_SetPriority> } 80110a6: bf00 nop 80110a8: 3718 adds r7, #24 80110aa: 46bd mov sp, r7 80110ac: bd80 pop {r7, pc} 080110ae : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80110ae: b580 push {r7, lr} 80110b0: b082 sub sp, #8 80110b2: af00 add r7, sp, #0 80110b4: 4603 mov r3, r0 80110b6: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80110b8: f997 3007 ldrsb.w r3, [r7, #7] 80110bc: 4618 mov r0, r3 80110be: f7ff ff35 bl 8010f2c <__NVIC_EnableIRQ> } 80110c2: bf00 nop 80110c4: 3708 adds r7, #8 80110c6: 46bd mov sp, r7 80110c8: bd80 pop {r7, pc} 080110ca : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 80110ca: b580 push {r7, lr} 80110cc: b082 sub sp, #8 80110ce: af00 add r7, sp, #0 80110d0: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 80110d2: 6878 ldr r0, [r7, #4] 80110d4: f7ff ffa2 bl 801101c 80110d8: 4603 mov r3, r0 } 80110da: 4618 mov r0, r3 80110dc: 3708 adds r7, #8 80110de: 46bd mov sp, r7 80110e0: bd80 pop {r7, pc} 080110e2 : * parameters in the CRC_InitTypeDef and create the associated handle. * @param hcrc CRC handle * @retval HAL status */ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) { 80110e2: b580 push {r7, lr} 80110e4: b082 sub sp, #8 80110e6: af00 add r7, sp, #0 80110e8: 6078 str r0, [r7, #4] /* Check the CRC handle allocation */ if (hcrc == NULL) 80110ea: 687b ldr r3, [r7, #4] 80110ec: 2b00 cmp r3, #0 80110ee: d101 bne.n 80110f4 { return HAL_ERROR; 80110f0: 2301 movs r3, #1 80110f2: e00e b.n 8011112 } /* Check the parameters */ assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); if (hcrc->State == HAL_CRC_STATE_RESET) 80110f4: 687b ldr r3, [r7, #4] 80110f6: 795b ldrb r3, [r3, #5] 80110f8: b2db uxtb r3, r3 80110fa: 2b00 cmp r3, #0 80110fc: d105 bne.n 801110a { /* Allocate lock resource and initialize it */ hcrc->Lock = HAL_UNLOCKED; 80110fe: 687b ldr r3, [r7, #4] 8011100: 2200 movs r2, #0 8011102: 711a strb r2, [r3, #4] /* Init the low level hardware */ HAL_CRC_MspInit(hcrc); 8011104: 6878 ldr r0, [r7, #4] 8011106: f7f9 f99b bl 800a440 } /* Change CRC peripheral state */ hcrc->State = HAL_CRC_STATE_READY; 801110a: 687b ldr r3, [r7, #4] 801110c: 2201 movs r2, #1 801110e: 715a strb r2, [r3, #5] /* Return function status */ return HAL_OK; 8011110: 2300 movs r3, #0 } 8011112: 4618 mov r0, r3 8011114: 3708 adds r7, #8 8011116: 46bd mov sp, r7 8011118: bd80 pop {r7, pc} ... 0801111c : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 801111c: b480 push {r7} 801111e: b085 sub sp, #20 8011120: af00 add r7, sp, #0 8011122: 6078 str r0, [r7, #4] uint32_t tmp = 0U; 8011124: 2300 movs r3, #0 8011126: 60fb str r3, [r7, #12] /* Check the DMA handle allocation */ if(hdma == NULL) 8011128: 687b ldr r3, [r7, #4] 801112a: 2b00 cmp r3, #0 801112c: d101 bne.n 8011132 { return HAL_ERROR; 801112e: 2301 movs r3, #1 8011130: e059 b.n 80111e6 assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (DMA2) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 8011132: 687b ldr r3, [r7, #4] 8011134: 681b ldr r3, [r3, #0] 8011136: 461a mov r2, r3 8011138: 4b2d ldr r3, [pc, #180] @ (80111f0 ) 801113a: 429a cmp r2, r3 801113c: d80f bhi.n 801115e { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 801113e: 687b ldr r3, [r7, #4] 8011140: 681b ldr r3, [r3, #0] 8011142: 461a mov r2, r3 8011144: 4b2b ldr r3, [pc, #172] @ (80111f4 ) 8011146: 4413 add r3, r2 8011148: 4a2b ldr r2, [pc, #172] @ (80111f8 ) 801114a: fba2 2303 umull r2, r3, r2, r3 801114e: 091b lsrs r3, r3, #4 8011150: 009a lsls r2, r3, #2 8011152: 687b ldr r3, [r7, #4] 8011154: 641a str r2, [r3, #64] @ 0x40 hdma->DmaBaseAddress = DMA1; 8011156: 687b ldr r3, [r7, #4] 8011158: 4a28 ldr r2, [pc, #160] @ (80111fc ) 801115a: 63da str r2, [r3, #60] @ 0x3c 801115c: e00e b.n 801117c } else { /* DMA2 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 801115e: 687b ldr r3, [r7, #4] 8011160: 681b ldr r3, [r3, #0] 8011162: 461a mov r2, r3 8011164: 4b26 ldr r3, [pc, #152] @ (8011200 ) 8011166: 4413 add r3, r2 8011168: 4a23 ldr r2, [pc, #140] @ (80111f8 ) 801116a: fba2 2303 umull r2, r3, r2, r3 801116e: 091b lsrs r3, r3, #4 8011170: 009a lsls r2, r3, #2 8011172: 687b ldr r3, [r7, #4] 8011174: 641a str r2, [r3, #64] @ 0x40 hdma->DmaBaseAddress = DMA2; 8011176: 687b ldr r3, [r7, #4] 8011178: 4a22 ldr r2, [pc, #136] @ (8011204 ) 801117a: 63da str r2, [r3, #60] @ 0x3c hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; hdma->DmaBaseAddress = DMA1; #endif /* DMA2 */ /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 801117c: 687b ldr r3, [r7, #4] 801117e: 2202 movs r2, #2 8011180: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Get the CR register value */ tmp = hdma->Instance->CCR; 8011184: 687b ldr r3, [r7, #4] 8011186: 681b ldr r3, [r3, #0] 8011188: 681b ldr r3, [r3, #0] 801118a: 60fb str r3, [r7, #12] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 801118c: 68fb ldr r3, [r7, #12] 801118e: f423 537f bic.w r3, r3, #16320 @ 0x3fc0 8011192: f023 0330 bic.w r3, r3, #48 @ 0x30 8011196: 60fb str r3, [r7, #12] DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 8011198: 687b ldr r3, [r7, #4] 801119a: 685a ldr r2, [r3, #4] hdma->Init.PeriphInc | hdma->Init.MemInc | 801119c: 687b ldr r3, [r7, #4] 801119e: 689b ldr r3, [r3, #8] tmp |= hdma->Init.Direction | 80111a0: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | 80111a2: 687b ldr r3, [r7, #4] 80111a4: 68db ldr r3, [r3, #12] 80111a6: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80111a8: 687b ldr r3, [r7, #4] 80111aa: 691b ldr r3, [r3, #16] hdma->Init.PeriphInc | hdma->Init.MemInc | 80111ac: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80111ae: 687b ldr r3, [r7, #4] 80111b0: 695b ldr r3, [r3, #20] 80111b2: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 80111b4: 687b ldr r3, [r7, #4] 80111b6: 699b ldr r3, [r3, #24] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80111b8: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 80111ba: 687b ldr r3, [r7, #4] 80111bc: 69db ldr r3, [r3, #28] 80111be: 4313 orrs r3, r2 tmp |= hdma->Init.Direction | 80111c0: 68fa ldr r2, [r7, #12] 80111c2: 4313 orrs r3, r2 80111c4: 60fb str r3, [r7, #12] /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 80111c6: 687b ldr r3, [r7, #4] 80111c8: 681b ldr r3, [r3, #0] 80111ca: 68fa ldr r2, [r7, #12] 80111cc: 601a str r2, [r3, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80111ce: 687b ldr r3, [r7, #4] 80111d0: 2200 movs r2, #0 80111d2: 639a str r2, [r3, #56] @ 0x38 /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 80111d4: 687b ldr r3, [r7, #4] 80111d6: 2201 movs r2, #1 80111d8: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 80111dc: 687b ldr r3, [r7, #4] 80111de: 2200 movs r2, #0 80111e0: f883 2020 strb.w r2, [r3, #32] return HAL_OK; 80111e4: 2300 movs r3, #0 } 80111e6: 4618 mov r0, r3 80111e8: 3714 adds r7, #20 80111ea: 46bd mov sp, r7 80111ec: bc80 pop {r7} 80111ee: 4770 bx lr 80111f0: 40020407 .word 0x40020407 80111f4: bffdfff8 .word 0xbffdfff8 80111f8: cccccccd .word 0xcccccccd 80111fc: 40020000 .word 0x40020000 8011200: bffdfbf8 .word 0xbffdfbf8 8011204: 40020400 .word 0x40020400 08011208 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8011208: b580 push {r7, lr} 801120a: b086 sub sp, #24 801120c: af00 add r7, sp, #0 801120e: 60f8 str r0, [r7, #12] 8011210: 60b9 str r1, [r7, #8] 8011212: 607a str r2, [r7, #4] 8011214: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8011216: 2300 movs r3, #0 8011218: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 801121a: 68fb ldr r3, [r7, #12] 801121c: f893 3020 ldrb.w r3, [r3, #32] 8011220: 2b01 cmp r3, #1 8011222: d101 bne.n 8011228 8011224: 2302 movs r3, #2 8011226: e04b b.n 80112c0 8011228: 68fb ldr r3, [r7, #12] 801122a: 2201 movs r2, #1 801122c: f883 2020 strb.w r2, [r3, #32] if(HAL_DMA_STATE_READY == hdma->State) 8011230: 68fb ldr r3, [r7, #12] 8011232: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8011236: b2db uxtb r3, r3 8011238: 2b01 cmp r3, #1 801123a: d13a bne.n 80112b2 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 801123c: 68fb ldr r3, [r7, #12] 801123e: 2202 movs r2, #2 8011240: f883 2021 strb.w r2, [r3, #33] @ 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8011244: 68fb ldr r3, [r7, #12] 8011246: 2200 movs r2, #0 8011248: 639a str r2, [r3, #56] @ 0x38 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 801124a: 68fb ldr r3, [r7, #12] 801124c: 681b ldr r3, [r3, #0] 801124e: 681a ldr r2, [r3, #0] 8011250: 68fb ldr r3, [r7, #12] 8011252: 681b ldr r3, [r3, #0] 8011254: f022 0201 bic.w r2, r2, #1 8011258: 601a str r2, [r3, #0] /* Configure the source, destination address and the data length & clear flags*/ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); 801125a: 683b ldr r3, [r7, #0] 801125c: 687a ldr r2, [r7, #4] 801125e: 68b9 ldr r1, [r7, #8] 8011260: 68f8 ldr r0, [r7, #12] 8011262: f000 fbbc bl 80119de /* Enable the transfer complete interrupt */ /* Enable the transfer Error interrupt */ if(NULL != hdma->XferHalfCpltCallback) 8011266: 68fb ldr r3, [r7, #12] 8011268: 6adb ldr r3, [r3, #44] @ 0x2c 801126a: 2b00 cmp r3, #0 801126c: d008 beq.n 8011280 { /* Enable the Half transfer complete interrupt as well */ __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 801126e: 68fb ldr r3, [r7, #12] 8011270: 681b ldr r3, [r3, #0] 8011272: 681a ldr r2, [r3, #0] 8011274: 68fb ldr r3, [r7, #12] 8011276: 681b ldr r3, [r3, #0] 8011278: f042 020e orr.w r2, r2, #14 801127c: 601a str r2, [r3, #0] 801127e: e00f b.n 80112a0 } else { __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8011280: 68fb ldr r3, [r7, #12] 8011282: 681b ldr r3, [r3, #0] 8011284: 681a ldr r2, [r3, #0] 8011286: 68fb ldr r3, [r7, #12] 8011288: 681b ldr r3, [r3, #0] 801128a: f022 0204 bic.w r2, r2, #4 801128e: 601a str r2, [r3, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8011290: 68fb ldr r3, [r7, #12] 8011292: 681b ldr r3, [r3, #0] 8011294: 681a ldr r2, [r3, #0] 8011296: 68fb ldr r3, [r7, #12] 8011298: 681b ldr r3, [r3, #0] 801129a: f042 020a orr.w r2, r2, #10 801129e: 601a str r2, [r3, #0] } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); 80112a0: 68fb ldr r3, [r7, #12] 80112a2: 681b ldr r3, [r3, #0] 80112a4: 681a ldr r2, [r3, #0] 80112a6: 68fb ldr r3, [r7, #12] 80112a8: 681b ldr r3, [r3, #0] 80112aa: f042 0201 orr.w r2, r2, #1 80112ae: 601a str r2, [r3, #0] 80112b0: e005 b.n 80112be } else { /* Process Unlocked */ __HAL_UNLOCK(hdma); 80112b2: 68fb ldr r3, [r7, #12] 80112b4: 2200 movs r2, #0 80112b6: f883 2020 strb.w r2, [r3, #32] /* Remain BUSY */ status = HAL_BUSY; 80112ba: 2302 movs r3, #2 80112bc: 75fb strb r3, [r7, #23] } return status; 80112be: 7dfb ldrb r3, [r7, #23] } 80112c0: 4618 mov r0, r3 80112c2: 3718 adds r7, #24 80112c4: 46bd mov sp, r7 80112c6: bd80 pop {r7, pc} 080112c8 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 80112c8: b480 push {r7} 80112ca: b085 sub sp, #20 80112cc: af00 add r7, sp, #0 80112ce: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80112d0: 2300 movs r3, #0 80112d2: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) 80112d4: 687b ldr r3, [r7, #4] 80112d6: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 80112da: b2db uxtb r3, r3 80112dc: 2b02 cmp r3, #2 80112de: d008 beq.n 80112f2 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80112e0: 687b ldr r3, [r7, #4] 80112e2: 2204 movs r2, #4 80112e4: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); 80112e6: 687b ldr r3, [r7, #4] 80112e8: 2200 movs r2, #0 80112ea: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 80112ee: 2301 movs r3, #1 80112f0: e020 b.n 8011334 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80112f2: 687b ldr r3, [r7, #4] 80112f4: 681b ldr r3, [r3, #0] 80112f6: 681a ldr r2, [r3, #0] 80112f8: 687b ldr r3, [r7, #4] 80112fa: 681b ldr r3, [r3, #0] 80112fc: f022 020e bic.w r2, r2, #14 8011300: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8011302: 687b ldr r3, [r7, #4] 8011304: 681b ldr r3, [r3, #0] 8011306: 681a ldr r2, [r3, #0] 8011308: 687b ldr r3, [r7, #4] 801130a: 681b ldr r3, [r3, #0] 801130c: f022 0201 bic.w r2, r2, #1 8011310: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8011312: 687b ldr r3, [r7, #4] 8011314: 6c1a ldr r2, [r3, #64] @ 0x40 8011316: 687b ldr r3, [r7, #4] 8011318: 6bdb ldr r3, [r3, #60] @ 0x3c 801131a: 2101 movs r1, #1 801131c: fa01 f202 lsl.w r2, r1, r2 8011320: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8011322: 687b ldr r3, [r7, #4] 8011324: 2201 movs r2, #1 8011326: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 801132a: 687b ldr r3, [r7, #4] 801132c: 2200 movs r2, #0 801132e: f883 2020 strb.w r2, [r3, #32] return status; 8011332: 7bfb ldrb r3, [r7, #15] } 8011334: 4618 mov r0, r3 8011336: 3714 adds r7, #20 8011338: 46bd mov sp, r7 801133a: bc80 pop {r7} 801133c: 4770 bx lr ... 08011340 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 8011340: b580 push {r7, lr} 8011342: b084 sub sp, #16 8011344: af00 add r7, sp, #0 8011346: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8011348: 2300 movs r3, #0 801134a: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) 801134c: 687b ldr r3, [r7, #4] 801134e: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8011352: b2db uxtb r3, r3 8011354: 2b02 cmp r3, #2 8011356: d005 beq.n 8011364 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8011358: 687b ldr r3, [r7, #4] 801135a: 2204 movs r2, #4 801135c: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; 801135e: 2301 movs r3, #1 8011360: 73fb strb r3, [r7, #15] 8011362: e0d6 b.n 8011512 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8011364: 687b ldr r3, [r7, #4] 8011366: 681b ldr r3, [r3, #0] 8011368: 681a ldr r2, [r3, #0] 801136a: 687b ldr r3, [r7, #4] 801136c: 681b ldr r3, [r3, #0] 801136e: f022 020e bic.w r2, r2, #14 8011372: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8011374: 687b ldr r3, [r7, #4] 8011376: 681b ldr r3, [r3, #0] 8011378: 681a ldr r2, [r3, #0] 801137a: 687b ldr r3, [r7, #4] 801137c: 681b ldr r3, [r3, #0] 801137e: f022 0201 bic.w r2, r2, #1 8011382: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8011384: 687b ldr r3, [r7, #4] 8011386: 681b ldr r3, [r3, #0] 8011388: 461a mov r2, r3 801138a: 4b64 ldr r3, [pc, #400] @ (801151c ) 801138c: 429a cmp r2, r3 801138e: d958 bls.n 8011442 8011390: 687b ldr r3, [r7, #4] 8011392: 681b ldr r3, [r3, #0] 8011394: 4a62 ldr r2, [pc, #392] @ (8011520 ) 8011396: 4293 cmp r3, r2 8011398: d04f beq.n 801143a 801139a: 687b ldr r3, [r7, #4] 801139c: 681b ldr r3, [r3, #0] 801139e: 4a61 ldr r2, [pc, #388] @ (8011524 ) 80113a0: 4293 cmp r3, r2 80113a2: d048 beq.n 8011436 80113a4: 687b ldr r3, [r7, #4] 80113a6: 681b ldr r3, [r3, #0] 80113a8: 4a5f ldr r2, [pc, #380] @ (8011528 ) 80113aa: 4293 cmp r3, r2 80113ac: d040 beq.n 8011430 80113ae: 687b ldr r3, [r7, #4] 80113b0: 681b ldr r3, [r3, #0] 80113b2: 4a5e ldr r2, [pc, #376] @ (801152c ) 80113b4: 4293 cmp r3, r2 80113b6: d038 beq.n 801142a 80113b8: 687b ldr r3, [r7, #4] 80113ba: 681b ldr r3, [r3, #0] 80113bc: 4a5c ldr r2, [pc, #368] @ (8011530 ) 80113be: 4293 cmp r3, r2 80113c0: d030 beq.n 8011424 80113c2: 687b ldr r3, [r7, #4] 80113c4: 681b ldr r3, [r3, #0] 80113c6: 4a5b ldr r2, [pc, #364] @ (8011534 ) 80113c8: 4293 cmp r3, r2 80113ca: d028 beq.n 801141e 80113cc: 687b ldr r3, [r7, #4] 80113ce: 681b ldr r3, [r3, #0] 80113d0: 4a52 ldr r2, [pc, #328] @ (801151c ) 80113d2: 4293 cmp r3, r2 80113d4: d020 beq.n 8011418 80113d6: 687b ldr r3, [r7, #4] 80113d8: 681b ldr r3, [r3, #0] 80113da: 4a57 ldr r2, [pc, #348] @ (8011538 ) 80113dc: 4293 cmp r3, r2 80113de: d019 beq.n 8011414 80113e0: 687b ldr r3, [r7, #4] 80113e2: 681b ldr r3, [r3, #0] 80113e4: 4a55 ldr r2, [pc, #340] @ (801153c ) 80113e6: 4293 cmp r3, r2 80113e8: d012 beq.n 8011410 80113ea: 687b ldr r3, [r7, #4] 80113ec: 681b ldr r3, [r3, #0] 80113ee: 4a54 ldr r2, [pc, #336] @ (8011540 ) 80113f0: 4293 cmp r3, r2 80113f2: d00a beq.n 801140a 80113f4: 687b ldr r3, [r7, #4] 80113f6: 681b ldr r3, [r3, #0] 80113f8: 4a52 ldr r2, [pc, #328] @ (8011544 ) 80113fa: 4293 cmp r3, r2 80113fc: d102 bne.n 8011404 80113fe: f44f 5380 mov.w r3, #4096 @ 0x1000 8011402: e01b b.n 801143c 8011404: f44f 3380 mov.w r3, #65536 @ 0x10000 8011408: e018 b.n 801143c 801140a: f44f 7380 mov.w r3, #256 @ 0x100 801140e: e015 b.n 801143c 8011410: 2310 movs r3, #16 8011412: e013 b.n 801143c 8011414: 2301 movs r3, #1 8011416: e011 b.n 801143c 8011418: f04f 7380 mov.w r3, #16777216 @ 0x1000000 801141c: e00e b.n 801143c 801141e: f44f 1380 mov.w r3, #1048576 @ 0x100000 8011422: e00b b.n 801143c 8011424: f44f 3380 mov.w r3, #65536 @ 0x10000 8011428: e008 b.n 801143c 801142a: f44f 5380 mov.w r3, #4096 @ 0x1000 801142e: e005 b.n 801143c 8011430: f44f 7380 mov.w r3, #256 @ 0x100 8011434: e002 b.n 801143c 8011436: 2310 movs r3, #16 8011438: e000 b.n 801143c 801143a: 2301 movs r3, #1 801143c: 4a42 ldr r2, [pc, #264] @ (8011548 ) 801143e: 6053 str r3, [r2, #4] 8011440: e057 b.n 80114f2 8011442: 687b ldr r3, [r7, #4] 8011444: 681b ldr r3, [r3, #0] 8011446: 4a36 ldr r2, [pc, #216] @ (8011520 ) 8011448: 4293 cmp r3, r2 801144a: d04f beq.n 80114ec 801144c: 687b ldr r3, [r7, #4] 801144e: 681b ldr r3, [r3, #0] 8011450: 4a34 ldr r2, [pc, #208] @ (8011524 ) 8011452: 4293 cmp r3, r2 8011454: d048 beq.n 80114e8 8011456: 687b ldr r3, [r7, #4] 8011458: 681b ldr r3, [r3, #0] 801145a: 4a33 ldr r2, [pc, #204] @ (8011528 ) 801145c: 4293 cmp r3, r2 801145e: d040 beq.n 80114e2 8011460: 687b ldr r3, [r7, #4] 8011462: 681b ldr r3, [r3, #0] 8011464: 4a31 ldr r2, [pc, #196] @ (801152c ) 8011466: 4293 cmp r3, r2 8011468: d038 beq.n 80114dc 801146a: 687b ldr r3, [r7, #4] 801146c: 681b ldr r3, [r3, #0] 801146e: 4a30 ldr r2, [pc, #192] @ (8011530 ) 8011470: 4293 cmp r3, r2 8011472: d030 beq.n 80114d6 8011474: 687b ldr r3, [r7, #4] 8011476: 681b ldr r3, [r3, #0] 8011478: 4a2e ldr r2, [pc, #184] @ (8011534 ) 801147a: 4293 cmp r3, r2 801147c: d028 beq.n 80114d0 801147e: 687b ldr r3, [r7, #4] 8011480: 681b ldr r3, [r3, #0] 8011482: 4a26 ldr r2, [pc, #152] @ (801151c ) 8011484: 4293 cmp r3, r2 8011486: d020 beq.n 80114ca 8011488: 687b ldr r3, [r7, #4] 801148a: 681b ldr r3, [r3, #0] 801148c: 4a2a ldr r2, [pc, #168] @ (8011538 ) 801148e: 4293 cmp r3, r2 8011490: d019 beq.n 80114c6 8011492: 687b ldr r3, [r7, #4] 8011494: 681b ldr r3, [r3, #0] 8011496: 4a29 ldr r2, [pc, #164] @ (801153c ) 8011498: 4293 cmp r3, r2 801149a: d012 beq.n 80114c2 801149c: 687b ldr r3, [r7, #4] 801149e: 681b ldr r3, [r3, #0] 80114a0: 4a27 ldr r2, [pc, #156] @ (8011540 ) 80114a2: 4293 cmp r3, r2 80114a4: d00a beq.n 80114bc 80114a6: 687b ldr r3, [r7, #4] 80114a8: 681b ldr r3, [r3, #0] 80114aa: 4a26 ldr r2, [pc, #152] @ (8011544 ) 80114ac: 4293 cmp r3, r2 80114ae: d102 bne.n 80114b6 80114b0: f44f 5380 mov.w r3, #4096 @ 0x1000 80114b4: e01b b.n 80114ee 80114b6: f44f 3380 mov.w r3, #65536 @ 0x10000 80114ba: e018 b.n 80114ee 80114bc: f44f 7380 mov.w r3, #256 @ 0x100 80114c0: e015 b.n 80114ee 80114c2: 2310 movs r3, #16 80114c4: e013 b.n 80114ee 80114c6: 2301 movs r3, #1 80114c8: e011 b.n 80114ee 80114ca: f04f 7380 mov.w r3, #16777216 @ 0x1000000 80114ce: e00e b.n 80114ee 80114d0: f44f 1380 mov.w r3, #1048576 @ 0x100000 80114d4: e00b b.n 80114ee 80114d6: f44f 3380 mov.w r3, #65536 @ 0x10000 80114da: e008 b.n 80114ee 80114dc: f44f 5380 mov.w r3, #4096 @ 0x1000 80114e0: e005 b.n 80114ee 80114e2: f44f 7380 mov.w r3, #256 @ 0x100 80114e6: e002 b.n 80114ee 80114e8: 2310 movs r3, #16 80114ea: e000 b.n 80114ee 80114ec: 2301 movs r3, #1 80114ee: 4a17 ldr r2, [pc, #92] @ (801154c ) 80114f0: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 80114f2: 687b ldr r3, [r7, #4] 80114f4: 2201 movs r2, #1 80114f6: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 80114fa: 687b ldr r3, [r7, #4] 80114fc: 2200 movs r2, #0 80114fe: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8011502: 687b ldr r3, [r7, #4] 8011504: 6b5b ldr r3, [r3, #52] @ 0x34 8011506: 2b00 cmp r3, #0 8011508: d003 beq.n 8011512 { hdma->XferAbortCallback(hdma); 801150a: 687b ldr r3, [r7, #4] 801150c: 6b5b ldr r3, [r3, #52] @ 0x34 801150e: 6878 ldr r0, [r7, #4] 8011510: 4798 blx r3 } } return status; 8011512: 7bfb ldrb r3, [r7, #15] } 8011514: 4618 mov r0, r3 8011516: 3710 adds r7, #16 8011518: 46bd mov sp, r7 801151a: bd80 pop {r7, pc} 801151c: 40020080 .word 0x40020080 8011520: 40020008 .word 0x40020008 8011524: 4002001c .word 0x4002001c 8011528: 40020030 .word 0x40020030 801152c: 40020044 .word 0x40020044 8011530: 40020058 .word 0x40020058 8011534: 4002006c .word 0x4002006c 8011538: 40020408 .word 0x40020408 801153c: 4002041c .word 0x4002041c 8011540: 40020430 .word 0x40020430 8011544: 40020444 .word 0x40020444 8011548: 40020400 .word 0x40020400 801154c: 40020000 .word 0x40020000 08011550 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { 8011550: b580 push {r7, lr} 8011552: b084 sub sp, #16 8011554: af00 add r7, sp, #0 8011556: 6078 str r0, [r7, #4] uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8011558: 687b ldr r3, [r7, #4] 801155a: 6bdb ldr r3, [r3, #60] @ 0x3c 801155c: 681b ldr r3, [r3, #0] 801155e: 60fb str r3, [r7, #12] uint32_t source_it = hdma->Instance->CCR; 8011560: 687b ldr r3, [r7, #4] 8011562: 681b ldr r3, [r3, #0] 8011564: 681b ldr r3, [r3, #0] 8011566: 60bb str r3, [r7, #8] /* Half Transfer Complete Interrupt management ******************************/ if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8011568: 687b ldr r3, [r7, #4] 801156a: 6c1b ldr r3, [r3, #64] @ 0x40 801156c: 2204 movs r2, #4 801156e: 409a lsls r2, r3 8011570: 68fb ldr r3, [r7, #12] 8011572: 4013 ands r3, r2 8011574: 2b00 cmp r3, #0 8011576: f000 80f1 beq.w 801175c 801157a: 68bb ldr r3, [r7, #8] 801157c: f003 0304 and.w r3, r3, #4 8011580: 2b00 cmp r3, #0 8011582: f000 80eb beq.w 801175c { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8011586: 687b ldr r3, [r7, #4] 8011588: 681b ldr r3, [r3, #0] 801158a: 681b ldr r3, [r3, #0] 801158c: f003 0320 and.w r3, r3, #32 8011590: 2b00 cmp r3, #0 8011592: d107 bne.n 80115a4 { /* Disable the half transfer interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8011594: 687b ldr r3, [r7, #4] 8011596: 681b ldr r3, [r3, #0] 8011598: 681a ldr r2, [r3, #0] 801159a: 687b ldr r3, [r7, #4] 801159c: 681b ldr r3, [r3, #0] 801159e: f022 0204 bic.w r2, r2, #4 80115a2: 601a str r2, [r3, #0] } /* Clear the half transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80115a4: 687b ldr r3, [r7, #4] 80115a6: 681b ldr r3, [r3, #0] 80115a8: 461a mov r2, r3 80115aa: 4b5f ldr r3, [pc, #380] @ (8011728 ) 80115ac: 429a cmp r2, r3 80115ae: d958 bls.n 8011662 80115b0: 687b ldr r3, [r7, #4] 80115b2: 681b ldr r3, [r3, #0] 80115b4: 4a5d ldr r2, [pc, #372] @ (801172c ) 80115b6: 4293 cmp r3, r2 80115b8: d04f beq.n 801165a 80115ba: 687b ldr r3, [r7, #4] 80115bc: 681b ldr r3, [r3, #0] 80115be: 4a5c ldr r2, [pc, #368] @ (8011730 ) 80115c0: 4293 cmp r3, r2 80115c2: d048 beq.n 8011656 80115c4: 687b ldr r3, [r7, #4] 80115c6: 681b ldr r3, [r3, #0] 80115c8: 4a5a ldr r2, [pc, #360] @ (8011734 ) 80115ca: 4293 cmp r3, r2 80115cc: d040 beq.n 8011650 80115ce: 687b ldr r3, [r7, #4] 80115d0: 681b ldr r3, [r3, #0] 80115d2: 4a59 ldr r2, [pc, #356] @ (8011738 ) 80115d4: 4293 cmp r3, r2 80115d6: d038 beq.n 801164a 80115d8: 687b ldr r3, [r7, #4] 80115da: 681b ldr r3, [r3, #0] 80115dc: 4a57 ldr r2, [pc, #348] @ (801173c ) 80115de: 4293 cmp r3, r2 80115e0: d030 beq.n 8011644 80115e2: 687b ldr r3, [r7, #4] 80115e4: 681b ldr r3, [r3, #0] 80115e6: 4a56 ldr r2, [pc, #344] @ (8011740 ) 80115e8: 4293 cmp r3, r2 80115ea: d028 beq.n 801163e 80115ec: 687b ldr r3, [r7, #4] 80115ee: 681b ldr r3, [r3, #0] 80115f0: 4a4d ldr r2, [pc, #308] @ (8011728 ) 80115f2: 4293 cmp r3, r2 80115f4: d020 beq.n 8011638 80115f6: 687b ldr r3, [r7, #4] 80115f8: 681b ldr r3, [r3, #0] 80115fa: 4a52 ldr r2, [pc, #328] @ (8011744 ) 80115fc: 4293 cmp r3, r2 80115fe: d019 beq.n 8011634 8011600: 687b ldr r3, [r7, #4] 8011602: 681b ldr r3, [r3, #0] 8011604: 4a50 ldr r2, [pc, #320] @ (8011748 ) 8011606: 4293 cmp r3, r2 8011608: d012 beq.n 8011630 801160a: 687b ldr r3, [r7, #4] 801160c: 681b ldr r3, [r3, #0] 801160e: 4a4f ldr r2, [pc, #316] @ (801174c ) 8011610: 4293 cmp r3, r2 8011612: d00a beq.n 801162a 8011614: 687b ldr r3, [r7, #4] 8011616: 681b ldr r3, [r3, #0] 8011618: 4a4d ldr r2, [pc, #308] @ (8011750 ) 801161a: 4293 cmp r3, r2 801161c: d102 bne.n 8011624 801161e: f44f 4380 mov.w r3, #16384 @ 0x4000 8011622: e01b b.n 801165c 8011624: f44f 2380 mov.w r3, #262144 @ 0x40000 8011628: e018 b.n 801165c 801162a: f44f 6380 mov.w r3, #1024 @ 0x400 801162e: e015 b.n 801165c 8011630: 2340 movs r3, #64 @ 0x40 8011632: e013 b.n 801165c 8011634: 2304 movs r3, #4 8011636: e011 b.n 801165c 8011638: f04f 6380 mov.w r3, #67108864 @ 0x4000000 801163c: e00e b.n 801165c 801163e: f44f 0380 mov.w r3, #4194304 @ 0x400000 8011642: e00b b.n 801165c 8011644: f44f 2380 mov.w r3, #262144 @ 0x40000 8011648: e008 b.n 801165c 801164a: f44f 4380 mov.w r3, #16384 @ 0x4000 801164e: e005 b.n 801165c 8011650: f44f 6380 mov.w r3, #1024 @ 0x400 8011654: e002 b.n 801165c 8011656: 2340 movs r3, #64 @ 0x40 8011658: e000 b.n 801165c 801165a: 2304 movs r3, #4 801165c: 4a3d ldr r2, [pc, #244] @ (8011754 ) 801165e: 6053 str r3, [r2, #4] 8011660: e057 b.n 8011712 8011662: 687b ldr r3, [r7, #4] 8011664: 681b ldr r3, [r3, #0] 8011666: 4a31 ldr r2, [pc, #196] @ (801172c ) 8011668: 4293 cmp r3, r2 801166a: d04f beq.n 801170c 801166c: 687b ldr r3, [r7, #4] 801166e: 681b ldr r3, [r3, #0] 8011670: 4a2f ldr r2, [pc, #188] @ (8011730 ) 8011672: 4293 cmp r3, r2 8011674: d048 beq.n 8011708 8011676: 687b ldr r3, [r7, #4] 8011678: 681b ldr r3, [r3, #0] 801167a: 4a2e ldr r2, [pc, #184] @ (8011734 ) 801167c: 4293 cmp r3, r2 801167e: d040 beq.n 8011702 8011680: 687b ldr r3, [r7, #4] 8011682: 681b ldr r3, [r3, #0] 8011684: 4a2c ldr r2, [pc, #176] @ (8011738 ) 8011686: 4293 cmp r3, r2 8011688: d038 beq.n 80116fc 801168a: 687b ldr r3, [r7, #4] 801168c: 681b ldr r3, [r3, #0] 801168e: 4a2b ldr r2, [pc, #172] @ (801173c ) 8011690: 4293 cmp r3, r2 8011692: d030 beq.n 80116f6 8011694: 687b ldr r3, [r7, #4] 8011696: 681b ldr r3, [r3, #0] 8011698: 4a29 ldr r2, [pc, #164] @ (8011740 ) 801169a: 4293 cmp r3, r2 801169c: d028 beq.n 80116f0 801169e: 687b ldr r3, [r7, #4] 80116a0: 681b ldr r3, [r3, #0] 80116a2: 4a21 ldr r2, [pc, #132] @ (8011728 ) 80116a4: 4293 cmp r3, r2 80116a6: d020 beq.n 80116ea 80116a8: 687b ldr r3, [r7, #4] 80116aa: 681b ldr r3, [r3, #0] 80116ac: 4a25 ldr r2, [pc, #148] @ (8011744 ) 80116ae: 4293 cmp r3, r2 80116b0: d019 beq.n 80116e6 80116b2: 687b ldr r3, [r7, #4] 80116b4: 681b ldr r3, [r3, #0] 80116b6: 4a24 ldr r2, [pc, #144] @ (8011748 ) 80116b8: 4293 cmp r3, r2 80116ba: d012 beq.n 80116e2 80116bc: 687b ldr r3, [r7, #4] 80116be: 681b ldr r3, [r3, #0] 80116c0: 4a22 ldr r2, [pc, #136] @ (801174c ) 80116c2: 4293 cmp r3, r2 80116c4: d00a beq.n 80116dc 80116c6: 687b ldr r3, [r7, #4] 80116c8: 681b ldr r3, [r3, #0] 80116ca: 4a21 ldr r2, [pc, #132] @ (8011750 ) 80116cc: 4293 cmp r3, r2 80116ce: d102 bne.n 80116d6 80116d0: f44f 4380 mov.w r3, #16384 @ 0x4000 80116d4: e01b b.n 801170e 80116d6: f44f 2380 mov.w r3, #262144 @ 0x40000 80116da: e018 b.n 801170e 80116dc: f44f 6380 mov.w r3, #1024 @ 0x400 80116e0: e015 b.n 801170e 80116e2: 2340 movs r3, #64 @ 0x40 80116e4: e013 b.n 801170e 80116e6: 2304 movs r3, #4 80116e8: e011 b.n 801170e 80116ea: f04f 6380 mov.w r3, #67108864 @ 0x4000000 80116ee: e00e b.n 801170e 80116f0: f44f 0380 mov.w r3, #4194304 @ 0x400000 80116f4: e00b b.n 801170e 80116f6: f44f 2380 mov.w r3, #262144 @ 0x40000 80116fa: e008 b.n 801170e 80116fc: f44f 4380 mov.w r3, #16384 @ 0x4000 8011700: e005 b.n 801170e 8011702: f44f 6380 mov.w r3, #1024 @ 0x400 8011706: e002 b.n 801170e 8011708: 2340 movs r3, #64 @ 0x40 801170a: e000 b.n 801170e 801170c: 2304 movs r3, #4 801170e: 4a12 ldr r2, [pc, #72] @ (8011758 ) 8011710: 6053 str r3, [r2, #4] /* DMA peripheral state is not updated in Half Transfer */ /* but in Transfer Complete case */ if(hdma->XferHalfCpltCallback != NULL) 8011712: 687b ldr r3, [r7, #4] 8011714: 6adb ldr r3, [r3, #44] @ 0x2c 8011716: 2b00 cmp r3, #0 8011718: f000 8136 beq.w 8011988 { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); 801171c: 687b ldr r3, [r7, #4] 801171e: 6adb ldr r3, [r3, #44] @ 0x2c 8011720: 6878 ldr r0, [r7, #4] 8011722: 4798 blx r3 if(hdma->XferHalfCpltCallback != NULL) 8011724: e130 b.n 8011988 8011726: bf00 nop 8011728: 40020080 .word 0x40020080 801172c: 40020008 .word 0x40020008 8011730: 4002001c .word 0x4002001c 8011734: 40020030 .word 0x40020030 8011738: 40020044 .word 0x40020044 801173c: 40020058 .word 0x40020058 8011740: 4002006c .word 0x4002006c 8011744: 40020408 .word 0x40020408 8011748: 4002041c .word 0x4002041c 801174c: 40020430 .word 0x40020430 8011750: 40020444 .word 0x40020444 8011754: 40020400 .word 0x40020400 8011758: 40020000 .word 0x40020000 } } /* Transfer Complete Interrupt management ***********************************/ else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 801175c: 687b ldr r3, [r7, #4] 801175e: 6c1b ldr r3, [r3, #64] @ 0x40 8011760: 2202 movs r2, #2 8011762: 409a lsls r2, r3 8011764: 68fb ldr r3, [r7, #12] 8011766: 4013 ands r3, r2 8011768: 2b00 cmp r3, #0 801176a: f000 80dd beq.w 8011928 801176e: 68bb ldr r3, [r7, #8] 8011770: f003 0302 and.w r3, r3, #2 8011774: 2b00 cmp r3, #0 8011776: f000 80d7 beq.w 8011928 { if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 801177a: 687b ldr r3, [r7, #4] 801177c: 681b ldr r3, [r3, #0] 801177e: 681b ldr r3, [r3, #0] 8011780: f003 0320 and.w r3, r3, #32 8011784: 2b00 cmp r3, #0 8011786: d10b bne.n 80117a0 { /* Disable the transfer complete and error interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8011788: 687b ldr r3, [r7, #4] 801178a: 681b ldr r3, [r3, #0] 801178c: 681a ldr r2, [r3, #0] 801178e: 687b ldr r3, [r7, #4] 8011790: 681b ldr r3, [r3, #0] 8011792: f022 020a bic.w r2, r2, #10 8011796: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8011798: 687b ldr r3, [r7, #4] 801179a: 2201 movs r2, #1 801179c: f883 2021 strb.w r2, [r3, #33] @ 0x21 } /* Clear the transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 80117a0: 687b ldr r3, [r7, #4] 80117a2: 681b ldr r3, [r3, #0] 80117a4: 461a mov r2, r3 80117a6: 4b7b ldr r3, [pc, #492] @ (8011994 ) 80117a8: 429a cmp r2, r3 80117aa: d958 bls.n 801185e 80117ac: 687b ldr r3, [r7, #4] 80117ae: 681b ldr r3, [r3, #0] 80117b0: 4a79 ldr r2, [pc, #484] @ (8011998 ) 80117b2: 4293 cmp r3, r2 80117b4: d04f beq.n 8011856 80117b6: 687b ldr r3, [r7, #4] 80117b8: 681b ldr r3, [r3, #0] 80117ba: 4a78 ldr r2, [pc, #480] @ (801199c ) 80117bc: 4293 cmp r3, r2 80117be: d048 beq.n 8011852 80117c0: 687b ldr r3, [r7, #4] 80117c2: 681b ldr r3, [r3, #0] 80117c4: 4a76 ldr r2, [pc, #472] @ (80119a0 ) 80117c6: 4293 cmp r3, r2 80117c8: d040 beq.n 801184c 80117ca: 687b ldr r3, [r7, #4] 80117cc: 681b ldr r3, [r3, #0] 80117ce: 4a75 ldr r2, [pc, #468] @ (80119a4 ) 80117d0: 4293 cmp r3, r2 80117d2: d038 beq.n 8011846 80117d4: 687b ldr r3, [r7, #4] 80117d6: 681b ldr r3, [r3, #0] 80117d8: 4a73 ldr r2, [pc, #460] @ (80119a8 ) 80117da: 4293 cmp r3, r2 80117dc: d030 beq.n 8011840 80117de: 687b ldr r3, [r7, #4] 80117e0: 681b ldr r3, [r3, #0] 80117e2: 4a72 ldr r2, [pc, #456] @ (80119ac ) 80117e4: 4293 cmp r3, r2 80117e6: d028 beq.n 801183a 80117e8: 687b ldr r3, [r7, #4] 80117ea: 681b ldr r3, [r3, #0] 80117ec: 4a69 ldr r2, [pc, #420] @ (8011994 ) 80117ee: 4293 cmp r3, r2 80117f0: d020 beq.n 8011834 80117f2: 687b ldr r3, [r7, #4] 80117f4: 681b ldr r3, [r3, #0] 80117f6: 4a6e ldr r2, [pc, #440] @ (80119b0 ) 80117f8: 4293 cmp r3, r2 80117fa: d019 beq.n 8011830 80117fc: 687b ldr r3, [r7, #4] 80117fe: 681b ldr r3, [r3, #0] 8011800: 4a6c ldr r2, [pc, #432] @ (80119b4 ) 8011802: 4293 cmp r3, r2 8011804: d012 beq.n 801182c 8011806: 687b ldr r3, [r7, #4] 8011808: 681b ldr r3, [r3, #0] 801180a: 4a6b ldr r2, [pc, #428] @ (80119b8 ) 801180c: 4293 cmp r3, r2 801180e: d00a beq.n 8011826 8011810: 687b ldr r3, [r7, #4] 8011812: 681b ldr r3, [r3, #0] 8011814: 4a69 ldr r2, [pc, #420] @ (80119bc ) 8011816: 4293 cmp r3, r2 8011818: d102 bne.n 8011820 801181a: f44f 5300 mov.w r3, #8192 @ 0x2000 801181e: e01b b.n 8011858 8011820: f44f 3300 mov.w r3, #131072 @ 0x20000 8011824: e018 b.n 8011858 8011826: f44f 7300 mov.w r3, #512 @ 0x200 801182a: e015 b.n 8011858 801182c: 2320 movs r3, #32 801182e: e013 b.n 8011858 8011830: 2302 movs r3, #2 8011832: e011 b.n 8011858 8011834: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8011838: e00e b.n 8011858 801183a: f44f 1300 mov.w r3, #2097152 @ 0x200000 801183e: e00b b.n 8011858 8011840: f44f 3300 mov.w r3, #131072 @ 0x20000 8011844: e008 b.n 8011858 8011846: f44f 5300 mov.w r3, #8192 @ 0x2000 801184a: e005 b.n 8011858 801184c: f44f 7300 mov.w r3, #512 @ 0x200 8011850: e002 b.n 8011858 8011852: 2320 movs r3, #32 8011854: e000 b.n 8011858 8011856: 2302 movs r3, #2 8011858: 4a59 ldr r2, [pc, #356] @ (80119c0 ) 801185a: 6053 str r3, [r2, #4] 801185c: e057 b.n 801190e 801185e: 687b ldr r3, [r7, #4] 8011860: 681b ldr r3, [r3, #0] 8011862: 4a4d ldr r2, [pc, #308] @ (8011998 ) 8011864: 4293 cmp r3, r2 8011866: d04f beq.n 8011908 8011868: 687b ldr r3, [r7, #4] 801186a: 681b ldr r3, [r3, #0] 801186c: 4a4b ldr r2, [pc, #300] @ (801199c ) 801186e: 4293 cmp r3, r2 8011870: d048 beq.n 8011904 8011872: 687b ldr r3, [r7, #4] 8011874: 681b ldr r3, [r3, #0] 8011876: 4a4a ldr r2, [pc, #296] @ (80119a0 ) 8011878: 4293 cmp r3, r2 801187a: d040 beq.n 80118fe 801187c: 687b ldr r3, [r7, #4] 801187e: 681b ldr r3, [r3, #0] 8011880: 4a48 ldr r2, [pc, #288] @ (80119a4 ) 8011882: 4293 cmp r3, r2 8011884: d038 beq.n 80118f8 8011886: 687b ldr r3, [r7, #4] 8011888: 681b ldr r3, [r3, #0] 801188a: 4a47 ldr r2, [pc, #284] @ (80119a8 ) 801188c: 4293 cmp r3, r2 801188e: d030 beq.n 80118f2 8011890: 687b ldr r3, [r7, #4] 8011892: 681b ldr r3, [r3, #0] 8011894: 4a45 ldr r2, [pc, #276] @ (80119ac ) 8011896: 4293 cmp r3, r2 8011898: d028 beq.n 80118ec 801189a: 687b ldr r3, [r7, #4] 801189c: 681b ldr r3, [r3, #0] 801189e: 4a3d ldr r2, [pc, #244] @ (8011994 ) 80118a0: 4293 cmp r3, r2 80118a2: d020 beq.n 80118e6 80118a4: 687b ldr r3, [r7, #4] 80118a6: 681b ldr r3, [r3, #0] 80118a8: 4a41 ldr r2, [pc, #260] @ (80119b0 ) 80118aa: 4293 cmp r3, r2 80118ac: d019 beq.n 80118e2 80118ae: 687b ldr r3, [r7, #4] 80118b0: 681b ldr r3, [r3, #0] 80118b2: 4a40 ldr r2, [pc, #256] @ (80119b4 ) 80118b4: 4293 cmp r3, r2 80118b6: d012 beq.n 80118de 80118b8: 687b ldr r3, [r7, #4] 80118ba: 681b ldr r3, [r3, #0] 80118bc: 4a3e ldr r2, [pc, #248] @ (80119b8 ) 80118be: 4293 cmp r3, r2 80118c0: d00a beq.n 80118d8 80118c2: 687b ldr r3, [r7, #4] 80118c4: 681b ldr r3, [r3, #0] 80118c6: 4a3d ldr r2, [pc, #244] @ (80119bc ) 80118c8: 4293 cmp r3, r2 80118ca: d102 bne.n 80118d2 80118cc: f44f 5300 mov.w r3, #8192 @ 0x2000 80118d0: e01b b.n 801190a 80118d2: f44f 3300 mov.w r3, #131072 @ 0x20000 80118d6: e018 b.n 801190a 80118d8: f44f 7300 mov.w r3, #512 @ 0x200 80118dc: e015 b.n 801190a 80118de: 2320 movs r3, #32 80118e0: e013 b.n 801190a 80118e2: 2302 movs r3, #2 80118e4: e011 b.n 801190a 80118e6: f04f 7300 mov.w r3, #33554432 @ 0x2000000 80118ea: e00e b.n 801190a 80118ec: f44f 1300 mov.w r3, #2097152 @ 0x200000 80118f0: e00b b.n 801190a 80118f2: f44f 3300 mov.w r3, #131072 @ 0x20000 80118f6: e008 b.n 801190a 80118f8: f44f 5300 mov.w r3, #8192 @ 0x2000 80118fc: e005 b.n 801190a 80118fe: f44f 7300 mov.w r3, #512 @ 0x200 8011902: e002 b.n 801190a 8011904: 2320 movs r3, #32 8011906: e000 b.n 801190a 8011908: 2302 movs r3, #2 801190a: 4a2e ldr r2, [pc, #184] @ (80119c4 ) 801190c: 6053 str r3, [r2, #4] /* Process Unlocked */ __HAL_UNLOCK(hdma); 801190e: 687b ldr r3, [r7, #4] 8011910: 2200 movs r2, #0 8011912: f883 2020 strb.w r2, [r3, #32] if(hdma->XferCpltCallback != NULL) 8011916: 687b ldr r3, [r7, #4] 8011918: 6a9b ldr r3, [r3, #40] @ 0x28 801191a: 2b00 cmp r3, #0 801191c: d034 beq.n 8011988 { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); 801191e: 687b ldr r3, [r7, #4] 8011920: 6a9b ldr r3, [r3, #40] @ 0x28 8011922: 6878 ldr r0, [r7, #4] 8011924: 4798 blx r3 if(hdma->XferCpltCallback != NULL) 8011926: e02f b.n 8011988 } } /* Transfer Error Interrupt management **************************************/ else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8011928: 687b ldr r3, [r7, #4] 801192a: 6c1b ldr r3, [r3, #64] @ 0x40 801192c: 2208 movs r2, #8 801192e: 409a lsls r2, r3 8011930: 68fb ldr r3, [r7, #12] 8011932: 4013 ands r3, r2 8011934: 2b00 cmp r3, #0 8011936: d028 beq.n 801198a 8011938: 68bb ldr r3, [r7, #8] 801193a: f003 0308 and.w r3, r3, #8 801193e: 2b00 cmp r3, #0 8011940: d023 beq.n 801198a { /* When a DMA transfer error occurs */ /* A hardware clear of its EN bits is performed */ /* Disable ALL DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8011942: 687b ldr r3, [r7, #4] 8011944: 681b ldr r3, [r3, #0] 8011946: 681a ldr r2, [r3, #0] 8011948: 687b ldr r3, [r7, #4] 801194a: 681b ldr r3, [r3, #0] 801194c: f022 020e bic.w r2, r2, #14 8011950: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8011952: 687b ldr r3, [r7, #4] 8011954: 6c1a ldr r2, [r3, #64] @ 0x40 8011956: 687b ldr r3, [r7, #4] 8011958: 6bdb ldr r3, [r3, #60] @ 0x3c 801195a: 2101 movs r1, #1 801195c: fa01 f202 lsl.w r2, r1, r2 8011960: 605a str r2, [r3, #4] /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TE; 8011962: 687b ldr r3, [r7, #4] 8011964: 2201 movs r2, #1 8011966: 639a str r2, [r3, #56] @ 0x38 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8011968: 687b ldr r3, [r7, #4] 801196a: 2201 movs r2, #1 801196c: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8011970: 687b ldr r3, [r7, #4] 8011972: 2200 movs r2, #0 8011974: f883 2020 strb.w r2, [r3, #32] if (hdma->XferErrorCallback != NULL) 8011978: 687b ldr r3, [r7, #4] 801197a: 6b1b ldr r3, [r3, #48] @ 0x30 801197c: 2b00 cmp r3, #0 801197e: d004 beq.n 801198a { /* Transfer error callback */ hdma->XferErrorCallback(hdma); 8011980: 687b ldr r3, [r7, #4] 8011982: 6b1b ldr r3, [r3, #48] @ 0x30 8011984: 6878 ldr r0, [r7, #4] 8011986: 4798 blx r3 } } return; 8011988: bf00 nop 801198a: bf00 nop } 801198c: 3710 adds r7, #16 801198e: 46bd mov sp, r7 8011990: bd80 pop {r7, pc} 8011992: bf00 nop 8011994: 40020080 .word 0x40020080 8011998: 40020008 .word 0x40020008 801199c: 4002001c .word 0x4002001c 80119a0: 40020030 .word 0x40020030 80119a4: 40020044 .word 0x40020044 80119a8: 40020058 .word 0x40020058 80119ac: 4002006c .word 0x4002006c 80119b0: 40020408 .word 0x40020408 80119b4: 4002041c .word 0x4002041c 80119b8: 40020430 .word 0x40020430 80119bc: 40020444 .word 0x40020444 80119c0: 40020400 .word 0x40020400 80119c4: 40020000 .word 0x40020000 080119c8 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval DMA Error Code */ uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) { 80119c8: b480 push {r7} 80119ca: b083 sub sp, #12 80119cc: af00 add r7, sp, #0 80119ce: 6078 str r0, [r7, #4] return hdma->ErrorCode; 80119d0: 687b ldr r3, [r7, #4] 80119d2: 6b9b ldr r3, [r3, #56] @ 0x38 } 80119d4: 4618 mov r0, r3 80119d6: 370c adds r7, #12 80119d8: 46bd mov sp, r7 80119da: bc80 pop {r7} 80119dc: 4770 bx lr 080119de : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 80119de: b480 push {r7} 80119e0: b085 sub sp, #20 80119e2: af00 add r7, sp, #0 80119e4: 60f8 str r0, [r7, #12] 80119e6: 60b9 str r1, [r7, #8] 80119e8: 607a str r2, [r7, #4] 80119ea: 603b str r3, [r7, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 80119ec: 68fb ldr r3, [r7, #12] 80119ee: 6c1a ldr r2, [r3, #64] @ 0x40 80119f0: 68fb ldr r3, [r7, #12] 80119f2: 6bdb ldr r3, [r3, #60] @ 0x3c 80119f4: 2101 movs r1, #1 80119f6: fa01 f202 lsl.w r2, r1, r2 80119fa: 605a str r2, [r3, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 80119fc: 68fb ldr r3, [r7, #12] 80119fe: 681b ldr r3, [r3, #0] 8011a00: 683a ldr r2, [r7, #0] 8011a02: 605a str r2, [r3, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8011a04: 68fb ldr r3, [r7, #12] 8011a06: 685b ldr r3, [r3, #4] 8011a08: 2b10 cmp r3, #16 8011a0a: d108 bne.n 8011a1e { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 8011a0c: 68fb ldr r3, [r7, #12] 8011a0e: 681b ldr r3, [r3, #0] 8011a10: 687a ldr r2, [r7, #4] 8011a12: 609a str r2, [r3, #8] /* Configure DMA Channel source address */ hdma->Instance->CMAR = SrcAddress; 8011a14: 68fb ldr r3, [r7, #12] 8011a16: 681b ldr r3, [r3, #0] 8011a18: 68ba ldr r2, [r7, #8] 8011a1a: 60da str r2, [r3, #12] hdma->Instance->CPAR = SrcAddress; /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; } } 8011a1c: e007 b.n 8011a2e hdma->Instance->CPAR = SrcAddress; 8011a1e: 68fb ldr r3, [r7, #12] 8011a20: 681b ldr r3, [r3, #0] 8011a22: 68ba ldr r2, [r7, #8] 8011a24: 609a str r2, [r3, #8] hdma->Instance->CMAR = DstAddress; 8011a26: 68fb ldr r3, [r7, #12] 8011a28: 681b ldr r3, [r3, #0] 8011a2a: 687a ldr r2, [r7, #4] 8011a2c: 60da str r2, [r3, #12] } 8011a2e: bf00 nop 8011a30: 3714 adds r7, #20 8011a32: 46bd mov sp, r7 8011a34: bc80 pop {r7} 8011a36: 4770 bx lr 08011a38 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8011a38: b480 push {r7} 8011a3a: b08b sub sp, #44 @ 0x2c 8011a3c: af00 add r7, sp, #0 8011a3e: 6078 str r0, [r7, #4] 8011a40: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 8011a42: 2300 movs r3, #0 8011a44: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 8011a46: 2300 movs r3, #0 8011a48: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8011a4a: e169 b.n 8011d20 { /* Get the IO position */ ioposition = (0x01uL << position); 8011a4c: 2201 movs r2, #1 8011a4e: 6a7b ldr r3, [r7, #36] @ 0x24 8011a50: fa02 f303 lsl.w r3, r2, r3 8011a54: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8011a56: 683b ldr r3, [r7, #0] 8011a58: 681b ldr r3, [r3, #0] 8011a5a: 69fa ldr r2, [r7, #28] 8011a5c: 4013 ands r3, r2 8011a5e: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 8011a60: 69ba ldr r2, [r7, #24] 8011a62: 69fb ldr r3, [r7, #28] 8011a64: 429a cmp r2, r3 8011a66: f040 8158 bne.w 8011d1a { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 8011a6a: 683b ldr r3, [r7, #0] 8011a6c: 685b ldr r3, [r3, #4] 8011a6e: 4a9a ldr r2, [pc, #616] @ (8011cd8 ) 8011a70: 4293 cmp r3, r2 8011a72: d05e beq.n 8011b32 8011a74: 4a98 ldr r2, [pc, #608] @ (8011cd8 ) 8011a76: 4293 cmp r3, r2 8011a78: d875 bhi.n 8011b66 8011a7a: 4a98 ldr r2, [pc, #608] @ (8011cdc ) 8011a7c: 4293 cmp r3, r2 8011a7e: d058 beq.n 8011b32 8011a80: 4a96 ldr r2, [pc, #600] @ (8011cdc ) 8011a82: 4293 cmp r3, r2 8011a84: d86f bhi.n 8011b66 8011a86: 4a96 ldr r2, [pc, #600] @ (8011ce0 ) 8011a88: 4293 cmp r3, r2 8011a8a: d052 beq.n 8011b32 8011a8c: 4a94 ldr r2, [pc, #592] @ (8011ce0 ) 8011a8e: 4293 cmp r3, r2 8011a90: d869 bhi.n 8011b66 8011a92: 4a94 ldr r2, [pc, #592] @ (8011ce4 ) 8011a94: 4293 cmp r3, r2 8011a96: d04c beq.n 8011b32 8011a98: 4a92 ldr r2, [pc, #584] @ (8011ce4 ) 8011a9a: 4293 cmp r3, r2 8011a9c: d863 bhi.n 8011b66 8011a9e: 4a92 ldr r2, [pc, #584] @ (8011ce8 ) 8011aa0: 4293 cmp r3, r2 8011aa2: d046 beq.n 8011b32 8011aa4: 4a90 ldr r2, [pc, #576] @ (8011ce8 ) 8011aa6: 4293 cmp r3, r2 8011aa8: d85d bhi.n 8011b66 8011aaa: 2b12 cmp r3, #18 8011aac: d82a bhi.n 8011b04 8011aae: 2b12 cmp r3, #18 8011ab0: d859 bhi.n 8011b66 8011ab2: a201 add r2, pc, #4 @ (adr r2, 8011ab8 ) 8011ab4: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8011ab8: 08011b33 .word 0x08011b33 8011abc: 08011b0d .word 0x08011b0d 8011ac0: 08011b1f .word 0x08011b1f 8011ac4: 08011b61 .word 0x08011b61 8011ac8: 08011b67 .word 0x08011b67 8011acc: 08011b67 .word 0x08011b67 8011ad0: 08011b67 .word 0x08011b67 8011ad4: 08011b67 .word 0x08011b67 8011ad8: 08011b67 .word 0x08011b67 8011adc: 08011b67 .word 0x08011b67 8011ae0: 08011b67 .word 0x08011b67 8011ae4: 08011b67 .word 0x08011b67 8011ae8: 08011b67 .word 0x08011b67 8011aec: 08011b67 .word 0x08011b67 8011af0: 08011b67 .word 0x08011b67 8011af4: 08011b67 .word 0x08011b67 8011af8: 08011b67 .word 0x08011b67 8011afc: 08011b15 .word 0x08011b15 8011b00: 08011b29 .word 0x08011b29 8011b04: 4a79 ldr r2, [pc, #484] @ (8011cec ) 8011b06: 4293 cmp r3, r2 8011b08: d013 beq.n 8011b32 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 8011b0a: e02c b.n 8011b66 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8011b0c: 683b ldr r3, [r7, #0] 8011b0e: 68db ldr r3, [r3, #12] 8011b10: 623b str r3, [r7, #32] break; 8011b12: e029 b.n 8011b68 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8011b14: 683b ldr r3, [r7, #0] 8011b16: 68db ldr r3, [r3, #12] 8011b18: 3304 adds r3, #4 8011b1a: 623b str r3, [r7, #32] break; 8011b1c: e024 b.n 8011b68 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8011b1e: 683b ldr r3, [r7, #0] 8011b20: 68db ldr r3, [r3, #12] 8011b22: 3308 adds r3, #8 8011b24: 623b str r3, [r7, #32] break; 8011b26: e01f b.n 8011b68 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8011b28: 683b ldr r3, [r7, #0] 8011b2a: 68db ldr r3, [r3, #12] 8011b2c: 330c adds r3, #12 8011b2e: 623b str r3, [r7, #32] break; 8011b30: e01a b.n 8011b68 if (GPIO_Init->Pull == GPIO_NOPULL) 8011b32: 683b ldr r3, [r7, #0] 8011b34: 689b ldr r3, [r3, #8] 8011b36: 2b00 cmp r3, #0 8011b38: d102 bne.n 8011b40 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8011b3a: 2304 movs r3, #4 8011b3c: 623b str r3, [r7, #32] break; 8011b3e: e013 b.n 8011b68 else if (GPIO_Init->Pull == GPIO_PULLUP) 8011b40: 683b ldr r3, [r7, #0] 8011b42: 689b ldr r3, [r3, #8] 8011b44: 2b01 cmp r3, #1 8011b46: d105 bne.n 8011b54 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8011b48: 2308 movs r3, #8 8011b4a: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 8011b4c: 687b ldr r3, [r7, #4] 8011b4e: 69fa ldr r2, [r7, #28] 8011b50: 611a str r2, [r3, #16] break; 8011b52: e009 b.n 8011b68 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8011b54: 2308 movs r3, #8 8011b56: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 8011b58: 687b ldr r3, [r7, #4] 8011b5a: 69fa ldr r2, [r7, #28] 8011b5c: 615a str r2, [r3, #20] break; 8011b5e: e003 b.n 8011b68 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8011b60: 2300 movs r3, #0 8011b62: 623b str r3, [r7, #32] break; 8011b64: e000 b.n 8011b68 break; 8011b66: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8011b68: 69bb ldr r3, [r7, #24] 8011b6a: 2bff cmp r3, #255 @ 0xff 8011b6c: d801 bhi.n 8011b72 8011b6e: 687b ldr r3, [r7, #4] 8011b70: e001 b.n 8011b76 8011b72: 687b ldr r3, [r7, #4] 8011b74: 3304 adds r3, #4 8011b76: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 8011b78: 69bb ldr r3, [r7, #24] 8011b7a: 2bff cmp r3, #255 @ 0xff 8011b7c: d802 bhi.n 8011b84 8011b7e: 6a7b ldr r3, [r7, #36] @ 0x24 8011b80: 009b lsls r3, r3, #2 8011b82: e002 b.n 8011b8a 8011b84: 6a7b ldr r3, [r7, #36] @ 0x24 8011b86: 3b08 subs r3, #8 8011b88: 009b lsls r3, r3, #2 8011b8a: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8011b8c: 697b ldr r3, [r7, #20] 8011b8e: 681a ldr r2, [r3, #0] 8011b90: 210f movs r1, #15 8011b92: 693b ldr r3, [r7, #16] 8011b94: fa01 f303 lsl.w r3, r1, r3 8011b98: 43db mvns r3, r3 8011b9a: 401a ands r2, r3 8011b9c: 6a39 ldr r1, [r7, #32] 8011b9e: 693b ldr r3, [r7, #16] 8011ba0: fa01 f303 lsl.w r3, r1, r3 8011ba4: 431a orrs r2, r3 8011ba6: 697b ldr r3, [r7, #20] 8011ba8: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8011baa: 683b ldr r3, [r7, #0] 8011bac: 685b ldr r3, [r3, #4] 8011bae: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8011bb2: 2b00 cmp r3, #0 8011bb4: f000 80b1 beq.w 8011d1a { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8011bb8: 4b4d ldr r3, [pc, #308] @ (8011cf0 ) 8011bba: 699b ldr r3, [r3, #24] 8011bbc: 4a4c ldr r2, [pc, #304] @ (8011cf0 ) 8011bbe: f043 0301 orr.w r3, r3, #1 8011bc2: 6193 str r3, [r2, #24] 8011bc4: 4b4a ldr r3, [pc, #296] @ (8011cf0 ) 8011bc6: 699b ldr r3, [r3, #24] 8011bc8: f003 0301 and.w r3, r3, #1 8011bcc: 60bb str r3, [r7, #8] 8011bce: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8011bd0: 4a48 ldr r2, [pc, #288] @ (8011cf4 ) 8011bd2: 6a7b ldr r3, [r7, #36] @ 0x24 8011bd4: 089b lsrs r3, r3, #2 8011bd6: 3302 adds r3, #2 8011bd8: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8011bdc: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8011bde: 6a7b ldr r3, [r7, #36] @ 0x24 8011be0: f003 0303 and.w r3, r3, #3 8011be4: 009b lsls r3, r3, #2 8011be6: 220f movs r2, #15 8011be8: fa02 f303 lsl.w r3, r2, r3 8011bec: 43db mvns r3, r3 8011bee: 68fa ldr r2, [r7, #12] 8011bf0: 4013 ands r3, r2 8011bf2: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8011bf4: 687b ldr r3, [r7, #4] 8011bf6: 4a40 ldr r2, [pc, #256] @ (8011cf8 ) 8011bf8: 4293 cmp r3, r2 8011bfa: d013 beq.n 8011c24 8011bfc: 687b ldr r3, [r7, #4] 8011bfe: 4a3f ldr r2, [pc, #252] @ (8011cfc ) 8011c00: 4293 cmp r3, r2 8011c02: d00d beq.n 8011c20 8011c04: 687b ldr r3, [r7, #4] 8011c06: 4a3e ldr r2, [pc, #248] @ (8011d00 ) 8011c08: 4293 cmp r3, r2 8011c0a: d007 beq.n 8011c1c 8011c0c: 687b ldr r3, [r7, #4] 8011c0e: 4a3d ldr r2, [pc, #244] @ (8011d04 ) 8011c10: 4293 cmp r3, r2 8011c12: d101 bne.n 8011c18 8011c14: 2303 movs r3, #3 8011c16: e006 b.n 8011c26 8011c18: 2304 movs r3, #4 8011c1a: e004 b.n 8011c26 8011c1c: 2302 movs r3, #2 8011c1e: e002 b.n 8011c26 8011c20: 2301 movs r3, #1 8011c22: e000 b.n 8011c26 8011c24: 2300 movs r3, #0 8011c26: 6a7a ldr r2, [r7, #36] @ 0x24 8011c28: f002 0203 and.w r2, r2, #3 8011c2c: 0092 lsls r2, r2, #2 8011c2e: 4093 lsls r3, r2 8011c30: 68fa ldr r2, [r7, #12] 8011c32: 4313 orrs r3, r2 8011c34: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 8011c36: 492f ldr r1, [pc, #188] @ (8011cf4 ) 8011c38: 6a7b ldr r3, [r7, #36] @ 0x24 8011c3a: 089b lsrs r3, r3, #2 8011c3c: 3302 adds r3, #2 8011c3e: 68fa ldr r2, [r7, #12] 8011c40: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8011c44: 683b ldr r3, [r7, #0] 8011c46: 685b ldr r3, [r3, #4] 8011c48: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8011c4c: 2b00 cmp r3, #0 8011c4e: d006 beq.n 8011c5e { SET_BIT(EXTI->RTSR, iocurrent); 8011c50: 4b2d ldr r3, [pc, #180] @ (8011d08 ) 8011c52: 689a ldr r2, [r3, #8] 8011c54: 492c ldr r1, [pc, #176] @ (8011d08 ) 8011c56: 69bb ldr r3, [r7, #24] 8011c58: 4313 orrs r3, r2 8011c5a: 608b str r3, [r1, #8] 8011c5c: e006 b.n 8011c6c } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8011c5e: 4b2a ldr r3, [pc, #168] @ (8011d08 ) 8011c60: 689a ldr r2, [r3, #8] 8011c62: 69bb ldr r3, [r7, #24] 8011c64: 43db mvns r3, r3 8011c66: 4928 ldr r1, [pc, #160] @ (8011d08 ) 8011c68: 4013 ands r3, r2 8011c6a: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8011c6c: 683b ldr r3, [r7, #0] 8011c6e: 685b ldr r3, [r3, #4] 8011c70: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8011c74: 2b00 cmp r3, #0 8011c76: d006 beq.n 8011c86 { SET_BIT(EXTI->FTSR, iocurrent); 8011c78: 4b23 ldr r3, [pc, #140] @ (8011d08 ) 8011c7a: 68da ldr r2, [r3, #12] 8011c7c: 4922 ldr r1, [pc, #136] @ (8011d08 ) 8011c7e: 69bb ldr r3, [r7, #24] 8011c80: 4313 orrs r3, r2 8011c82: 60cb str r3, [r1, #12] 8011c84: e006 b.n 8011c94 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8011c86: 4b20 ldr r3, [pc, #128] @ (8011d08 ) 8011c88: 68da ldr r2, [r3, #12] 8011c8a: 69bb ldr r3, [r7, #24] 8011c8c: 43db mvns r3, r3 8011c8e: 491e ldr r1, [pc, #120] @ (8011d08 ) 8011c90: 4013 ands r3, r2 8011c92: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8011c94: 683b ldr r3, [r7, #0] 8011c96: 685b ldr r3, [r3, #4] 8011c98: f403 3300 and.w r3, r3, #131072 @ 0x20000 8011c9c: 2b00 cmp r3, #0 8011c9e: d006 beq.n 8011cae { SET_BIT(EXTI->EMR, iocurrent); 8011ca0: 4b19 ldr r3, [pc, #100] @ (8011d08 ) 8011ca2: 685a ldr r2, [r3, #4] 8011ca4: 4918 ldr r1, [pc, #96] @ (8011d08 ) 8011ca6: 69bb ldr r3, [r7, #24] 8011ca8: 4313 orrs r3, r2 8011caa: 604b str r3, [r1, #4] 8011cac: e006 b.n 8011cbc } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8011cae: 4b16 ldr r3, [pc, #88] @ (8011d08 ) 8011cb0: 685a ldr r2, [r3, #4] 8011cb2: 69bb ldr r3, [r7, #24] 8011cb4: 43db mvns r3, r3 8011cb6: 4914 ldr r1, [pc, #80] @ (8011d08 ) 8011cb8: 4013 ands r3, r2 8011cba: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8011cbc: 683b ldr r3, [r7, #0] 8011cbe: 685b ldr r3, [r3, #4] 8011cc0: f403 3380 and.w r3, r3, #65536 @ 0x10000 8011cc4: 2b00 cmp r3, #0 8011cc6: d021 beq.n 8011d0c { SET_BIT(EXTI->IMR, iocurrent); 8011cc8: 4b0f ldr r3, [pc, #60] @ (8011d08 ) 8011cca: 681a ldr r2, [r3, #0] 8011ccc: 490e ldr r1, [pc, #56] @ (8011d08 ) 8011cce: 69bb ldr r3, [r7, #24] 8011cd0: 4313 orrs r3, r2 8011cd2: 600b str r3, [r1, #0] 8011cd4: e021 b.n 8011d1a 8011cd6: bf00 nop 8011cd8: 10320000 .word 0x10320000 8011cdc: 10310000 .word 0x10310000 8011ce0: 10220000 .word 0x10220000 8011ce4: 10210000 .word 0x10210000 8011ce8: 10120000 .word 0x10120000 8011cec: 10110000 .word 0x10110000 8011cf0: 40021000 .word 0x40021000 8011cf4: 40010000 .word 0x40010000 8011cf8: 40010800 .word 0x40010800 8011cfc: 40010c00 .word 0x40010c00 8011d00: 40011000 .word 0x40011000 8011d04: 40011400 .word 0x40011400 8011d08: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8011d0c: 4b0b ldr r3, [pc, #44] @ (8011d3c ) 8011d0e: 681a ldr r2, [r3, #0] 8011d10: 69bb ldr r3, [r7, #24] 8011d12: 43db mvns r3, r3 8011d14: 4909 ldr r1, [pc, #36] @ (8011d3c ) 8011d16: 4013 ands r3, r2 8011d18: 600b str r3, [r1, #0] } } } position++; 8011d1a: 6a7b ldr r3, [r7, #36] @ 0x24 8011d1c: 3301 adds r3, #1 8011d1e: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 8011d20: 683b ldr r3, [r7, #0] 8011d22: 681a ldr r2, [r3, #0] 8011d24: 6a7b ldr r3, [r7, #36] @ 0x24 8011d26: fa22 f303 lsr.w r3, r2, r3 8011d2a: 2b00 cmp r3, #0 8011d2c: f47f ae8e bne.w 8011a4c } } 8011d30: bf00 nop 8011d32: bf00 nop 8011d34: 372c adds r7, #44 @ 0x2c 8011d36: 46bd mov sp, r7 8011d38: bc80 pop {r7} 8011d3a: 4770 bx lr 8011d3c: 40010400 .word 0x40010400 08011d40 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8011d40: b480 push {r7} 8011d42: b085 sub sp, #20 8011d44: af00 add r7, sp, #0 8011d46: 6078 str r0, [r7, #4] 8011d48: 460b mov r3, r1 8011d4a: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8011d4c: 687b ldr r3, [r7, #4] 8011d4e: 689a ldr r2, [r3, #8] 8011d50: 887b ldrh r3, [r7, #2] 8011d52: 4013 ands r3, r2 8011d54: 2b00 cmp r3, #0 8011d56: d002 beq.n 8011d5e { bitstatus = GPIO_PIN_SET; 8011d58: 2301 movs r3, #1 8011d5a: 73fb strb r3, [r7, #15] 8011d5c: e001 b.n 8011d62 } else { bitstatus = GPIO_PIN_RESET; 8011d5e: 2300 movs r3, #0 8011d60: 73fb strb r3, [r7, #15] } return bitstatus; 8011d62: 7bfb ldrb r3, [r7, #15] } 8011d64: 4618 mov r0, r3 8011d66: 3714 adds r7, #20 8011d68: 46bd mov sp, r7 8011d6a: bc80 pop {r7} 8011d6c: 4770 bx lr 08011d6e : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8011d6e: b480 push {r7} 8011d70: b083 sub sp, #12 8011d72: af00 add r7, sp, #0 8011d74: 6078 str r0, [r7, #4] 8011d76: 460b mov r3, r1 8011d78: 807b strh r3, [r7, #2] 8011d7a: 4613 mov r3, r2 8011d7c: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8011d7e: 787b ldrb r3, [r7, #1] 8011d80: 2b00 cmp r3, #0 8011d82: d003 beq.n 8011d8c { GPIOx->BSRR = GPIO_Pin; 8011d84: 887a ldrh r2, [r7, #2] 8011d86: 687b ldr r3, [r7, #4] 8011d88: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 8011d8a: e003 b.n 8011d94 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 8011d8c: 887b ldrh r3, [r7, #2] 8011d8e: 041a lsls r2, r3, #16 8011d90: 687b ldr r3, [r7, #4] 8011d92: 611a str r2, [r3, #16] } 8011d94: bf00 nop 8011d96: 370c adds r7, #12 8011d98: 46bd mov sp, r7 8011d9a: bc80 pop {r7} 8011d9c: 4770 bx lr ... 08011da0 : * @note If the HSE divided by 128 is used as the RTC clock, the * Backup Domain Access should be kept enabled. * @retval None */ void HAL_PWR_EnableBkUpAccess(void) { 8011da0: b480 push {r7} 8011da2: af00 add r7, sp, #0 /* Enable access to RTC and backup registers */ *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; 8011da4: 4b03 ldr r3, [pc, #12] @ (8011db4 ) 8011da6: 2201 movs r2, #1 8011da8: 601a str r2, [r3, #0] } 8011daa: bf00 nop 8011dac: 46bd mov sp, r7 8011dae: bc80 pop {r7} 8011db0: 4770 bx lr 8011db2: bf00 nop 8011db4: 420e0020 .word 0x420e0020 08011db8 : * - Peripheral clocks * - LSI, LSE and RTC clocks * @retval HAL_StatusTypeDef */ HAL_StatusTypeDef HAL_RCC_DeInit(void) { 8011db8: b580 push {r7, lr} 8011dba: b082 sub sp, #8 8011dbc: af00 add r7, sp, #0 uint32_t tickstart; /* Get Start Tick */ tickstart = HAL_GetTick(); 8011dbe: f7fd fc3f bl 800f640 8011dc2: 6078 str r0, [r7, #4] /* Set HSION bit */ SET_BIT(RCC->CR, RCC_CR_HSION); 8011dc4: 4b60 ldr r3, [pc, #384] @ (8011f48 ) 8011dc6: 681b ldr r3, [r3, #0] 8011dc8: 4a5f ldr r2, [pc, #380] @ (8011f48 ) 8011dca: f043 0301 orr.w r3, r3, #1 8011dce: 6013 str r3, [r2, #0] /* Wait till HSI is ready */ while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 8011dd0: e008 b.n 8011de4 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8011dd2: f7fd fc35 bl 800f640 8011dd6: 4602 mov r2, r0 8011dd8: 687b ldr r3, [r7, #4] 8011dda: 1ad3 subs r3, r2, r3 8011ddc: 2b02 cmp r3, #2 8011dde: d901 bls.n 8011de4 { return HAL_TIMEOUT; 8011de0: 2303 movs r3, #3 8011de2: e0ac b.n 8011f3e while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 8011de4: 4b58 ldr r3, [pc, #352] @ (8011f48 ) 8011de6: 681b ldr r3, [r3, #0] 8011de8: f003 0302 and.w r3, r3, #2 8011dec: 2b00 cmp r3, #0 8011dee: d0f0 beq.n 8011dd2 } } /* Set HSITRIM bits to the reset value */ MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, (0x10U << RCC_CR_HSITRIM_Pos)); 8011df0: 4b55 ldr r3, [pc, #340] @ (8011f48 ) 8011df2: 681b ldr r3, [r3, #0] 8011df4: f023 03f8 bic.w r3, r3, #248 @ 0xf8 8011df8: 4a53 ldr r2, [pc, #332] @ (8011f48 ) 8011dfa: f043 0380 orr.w r3, r3, #128 @ 0x80 8011dfe: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8011e00: f7fd fc1e bl 800f640 8011e04: 6078 str r0, [r7, #4] /* Reset CFGR register */ CLEAR_REG(RCC->CFGR); 8011e06: 4b50 ldr r3, [pc, #320] @ (8011f48 ) 8011e08: 2200 movs r2, #0 8011e0a: 605a str r2, [r3, #4] /* Wait till clock switch is ready */ while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) 8011e0c: e00a b.n 8011e24 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8011e0e: f7fd fc17 bl 800f640 8011e12: 4602 mov r2, r0 8011e14: 687b ldr r3, [r7, #4] 8011e16: 1ad3 subs r3, r2, r3 8011e18: f241 3288 movw r2, #5000 @ 0x1388 8011e1c: 4293 cmp r3, r2 8011e1e: d901 bls.n 8011e24 { return HAL_TIMEOUT; 8011e20: 2303 movs r3, #3 8011e22: e08c b.n 8011f3e while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) 8011e24: 4b48 ldr r3, [pc, #288] @ (8011f48 ) 8011e26: 685b ldr r3, [r3, #4] 8011e28: f003 030c and.w r3, r3, #12 8011e2c: 2b00 cmp r3, #0 8011e2e: d1ee bne.n 8011e0e } } /* Update the SystemCoreClock global variable */ SystemCoreClock = HSI_VALUE; 8011e30: 4b46 ldr r3, [pc, #280] @ (8011f4c ) 8011e32: 4a47 ldr r2, [pc, #284] @ (8011f50 ) 8011e34: 601a str r2, [r3, #0] /* Adapt Systick interrupt period */ if (HAL_InitTick(uwTickPrio) != HAL_OK) 8011e36: 4b47 ldr r3, [pc, #284] @ (8011f54 ) 8011e38: 681b ldr r3, [r3, #0] 8011e3a: 4618 mov r0, r3 8011e3c: f7fd fbbe bl 800f5bc 8011e40: 4603 mov r3, r0 8011e42: 2b00 cmp r3, #0 8011e44: d001 beq.n 8011e4a { return HAL_ERROR; 8011e46: 2301 movs r3, #1 8011e48: e079 b.n 8011f3e } /* Get Start Tick */ tickstart = HAL_GetTick(); 8011e4a: f7fd fbf9 bl 800f640 8011e4e: 6078 str r0, [r7, #4] /* Second step is to clear PLLON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLLON); 8011e50: 4b3d ldr r3, [pc, #244] @ (8011f48 ) 8011e52: 681b ldr r3, [r3, #0] 8011e54: 4a3c ldr r2, [pc, #240] @ (8011f48 ) 8011e56: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000 8011e5a: 6013 str r3, [r2, #0] /* Wait till PLL is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) 8011e5c: e008 b.n 8011e70 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8011e5e: f7fd fbef bl 800f640 8011e62: 4602 mov r2, r0 8011e64: 687b ldr r3, [r7, #4] 8011e66: 1ad3 subs r3, r2, r3 8011e68: 2b02 cmp r3, #2 8011e6a: d901 bls.n 8011e70 { return HAL_TIMEOUT; 8011e6c: 2303 movs r3, #3 8011e6e: e066 b.n 8011f3e while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) 8011e70: 4b35 ldr r3, [pc, #212] @ (8011f48 ) 8011e72: 681b ldr r3, [r3, #0] 8011e74: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8011e78: 2b00 cmp r3, #0 8011e7a: d1f0 bne.n 8011e5e } } /* Ensure to reset PLLSRC and PLLMUL bits */ CLEAR_REG(RCC->CFGR); 8011e7c: 4b32 ldr r3, [pc, #200] @ (8011f48 ) 8011e7e: 2200 movs r2, #0 8011e80: 605a str r2, [r3, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 8011e82: f7fd fbdd bl 800f640 8011e86: 6078 str r0, [r7, #4] /* Reset HSEON & CSSON bits */ CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_CSSON); 8011e88: 4b2f ldr r3, [pc, #188] @ (8011f48 ) 8011e8a: 681b ldr r3, [r3, #0] 8011e8c: 4a2e ldr r2, [pc, #184] @ (8011f48 ) 8011e8e: f423 2310 bic.w r3, r3, #589824 @ 0x90000 8011e92: 6013 str r3, [r2, #0] /* Wait till HSE is disabled */ while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) 8011e94: e008 b.n 8011ea8 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8011e96: f7fd fbd3 bl 800f640 8011e9a: 4602 mov r2, r0 8011e9c: 687b ldr r3, [r7, #4] 8011e9e: 1ad3 subs r3, r2, r3 8011ea0: 2b64 cmp r3, #100 @ 0x64 8011ea2: d901 bls.n 8011ea8 { return HAL_TIMEOUT; 8011ea4: 2303 movs r3, #3 8011ea6: e04a b.n 8011f3e while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) 8011ea8: 4b27 ldr r3, [pc, #156] @ (8011f48 ) 8011eaa: 681b ldr r3, [r3, #0] 8011eac: f403 3300 and.w r3, r3, #131072 @ 0x20000 8011eb0: 2b00 cmp r3, #0 8011eb2: d1f0 bne.n 8011e96 } } /* Reset HSEBYP bit */ CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); 8011eb4: 4b24 ldr r3, [pc, #144] @ (8011f48 ) 8011eb6: 681b ldr r3, [r3, #0] 8011eb8: 4a23 ldr r2, [pc, #140] @ (8011f48 ) 8011eba: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8011ebe: 6013 str r3, [r2, #0] #if defined(RCC_PLL2_SUPPORT) /* Get Start Tick */ tickstart = HAL_GetTick(); 8011ec0: f7fd fbbe bl 800f640 8011ec4: 6078 str r0, [r7, #4] /* Clear PLL2ON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLL2ON); 8011ec6: 4b20 ldr r3, [pc, #128] @ (8011f48 ) 8011ec8: 681b ldr r3, [r3, #0] 8011eca: 4a1f ldr r2, [pc, #124] @ (8011f48 ) 8011ecc: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000 8011ed0: 6013 str r3, [r2, #0] /* Wait till PLL2 is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) != RESET) 8011ed2: e008 b.n 8011ee6 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8011ed4: f7fd fbb4 bl 800f640 8011ed8: 4602 mov r2, r0 8011eda: 687b ldr r3, [r7, #4] 8011edc: 1ad3 subs r3, r2, r3 8011ede: 2b64 cmp r3, #100 @ 0x64 8011ee0: d901 bls.n 8011ee6 { return HAL_TIMEOUT; 8011ee2: 2303 movs r3, #3 8011ee4: e02b b.n 8011f3e while (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) != RESET) 8011ee6: 4b18 ldr r3, [pc, #96] @ (8011f48 ) 8011ee8: 681b ldr r3, [r3, #0] 8011eea: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8011eee: 2b00 cmp r3, #0 8011ef0: d1f0 bne.n 8011ed4 } #endif /* RCC_PLL2_SUPPORT */ #if defined(RCC_PLLI2S_SUPPORT) /* Get Start Tick */ tickstart = HAL_GetTick(); 8011ef2: f7fd fba5 bl 800f640 8011ef6: 6078 str r0, [r7, #4] /* Clear PLL3ON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLL3ON); 8011ef8: 4b13 ldr r3, [pc, #76] @ (8011f48 ) 8011efa: 681b ldr r3, [r3, #0] 8011efc: 4a12 ldr r2, [pc, #72] @ (8011f48 ) 8011efe: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8011f02: 6013 str r3, [r2, #0] /* Wait till PLL3 is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) != RESET) 8011f04: e008 b.n 8011f18 { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 8011f06: f7fd fb9b bl 800f640 8011f0a: 4602 mov r2, r0 8011f0c: 687b ldr r3, [r7, #4] 8011f0e: 1ad3 subs r3, r2, r3 8011f10: 2b64 cmp r3, #100 @ 0x64 8011f12: d901 bls.n 8011f18 { return HAL_TIMEOUT; 8011f14: 2303 movs r3, #3 8011f16: e012 b.n 8011f3e while (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) != RESET) 8011f18: 4b0b ldr r3, [pc, #44] @ (8011f48 ) 8011f1a: 681b ldr r3, [r3, #0] 8011f1c: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8011f20: 2b00 cmp r3, #0 8011f22: d1f0 bne.n 8011f06 } #endif /* RCC_PLLI2S_SUPPORT */ #if defined(RCC_CFGR2_PREDIV1) /* Reset CFGR2 register */ CLEAR_REG(RCC->CFGR2); 8011f24: 4b08 ldr r3, [pc, #32] @ (8011f48 ) 8011f26: 2200 movs r2, #0 8011f28: 62da str r2, [r3, #44] @ 0x2c #endif /* RCC_CFGR2_PREDIV1 */ /* Reset all CSR flags */ SET_BIT(RCC->CSR, RCC_CSR_RMVF); 8011f2a: 4b07 ldr r3, [pc, #28] @ (8011f48 ) 8011f2c: 6a5b ldr r3, [r3, #36] @ 0x24 8011f2e: 4a06 ldr r2, [pc, #24] @ (8011f48 ) 8011f30: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8011f34: 6253 str r3, [r2, #36] @ 0x24 /* Disable all interrupts */ CLEAR_REG(RCC->CIR); 8011f36: 4b04 ldr r3, [pc, #16] @ (8011f48 ) 8011f38: 2200 movs r2, #0 8011f3a: 609a str r2, [r3, #8] return HAL_OK; 8011f3c: 2300 movs r3, #0 } 8011f3e: 4618 mov r0, r3 8011f40: 3708 adds r7, #8 8011f42: 46bd mov sp, r7 8011f44: bd80 pop {r7, pc} 8011f46: bf00 nop 8011f48: 40021000 .word 0x40021000 8011f4c: 20000084 .word 0x20000084 8011f50: 007a1200 .word 0x007a1200 8011f54: 20000088 .word 0x20000088 08011f58 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8011f58: b580 push {r7, lr} 8011f5a: b086 sub sp, #24 8011f5c: af00 add r7, sp, #0 8011f5e: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8011f60: 687b ldr r3, [r7, #4] 8011f62: 2b00 cmp r3, #0 8011f64: d101 bne.n 8011f6a { return HAL_ERROR; 8011f66: 2301 movs r3, #1 8011f68: e304 b.n 8012574 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8011f6a: 687b ldr r3, [r7, #4] 8011f6c: 681b ldr r3, [r3, #0] 8011f6e: f003 0301 and.w r3, r3, #1 8011f72: 2b00 cmp r3, #0 8011f74: f000 8087 beq.w 8012086 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8011f78: 4b92 ldr r3, [pc, #584] @ (80121c4 ) 8011f7a: 685b ldr r3, [r3, #4] 8011f7c: f003 030c and.w r3, r3, #12 8011f80: 2b04 cmp r3, #4 8011f82: d00c beq.n 8011f9e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8011f84: 4b8f ldr r3, [pc, #572] @ (80121c4 ) 8011f86: 685b ldr r3, [r3, #4] 8011f88: f003 030c and.w r3, r3, #12 8011f8c: 2b08 cmp r3, #8 8011f8e: d112 bne.n 8011fb6 8011f90: 4b8c ldr r3, [pc, #560] @ (80121c4 ) 8011f92: 685b ldr r3, [r3, #4] 8011f94: f403 3380 and.w r3, r3, #65536 @ 0x10000 8011f98: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8011f9c: d10b bne.n 8011fb6 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8011f9e: 4b89 ldr r3, [pc, #548] @ (80121c4 ) 8011fa0: 681b ldr r3, [r3, #0] 8011fa2: f403 3300 and.w r3, r3, #131072 @ 0x20000 8011fa6: 2b00 cmp r3, #0 8011fa8: d06c beq.n 8012084 8011faa: 687b ldr r3, [r7, #4] 8011fac: 689b ldr r3, [r3, #8] 8011fae: 2b00 cmp r3, #0 8011fb0: d168 bne.n 8012084 { return HAL_ERROR; 8011fb2: 2301 movs r3, #1 8011fb4: e2de b.n 8012574 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8011fb6: 687b ldr r3, [r7, #4] 8011fb8: 689b ldr r3, [r3, #8] 8011fba: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8011fbe: d106 bne.n 8011fce 8011fc0: 4b80 ldr r3, [pc, #512] @ (80121c4 ) 8011fc2: 681b ldr r3, [r3, #0] 8011fc4: 4a7f ldr r2, [pc, #508] @ (80121c4 ) 8011fc6: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8011fca: 6013 str r3, [r2, #0] 8011fcc: e02e b.n 801202c 8011fce: 687b ldr r3, [r7, #4] 8011fd0: 689b ldr r3, [r3, #8] 8011fd2: 2b00 cmp r3, #0 8011fd4: d10c bne.n 8011ff0 8011fd6: 4b7b ldr r3, [pc, #492] @ (80121c4 ) 8011fd8: 681b ldr r3, [r3, #0] 8011fda: 4a7a ldr r2, [pc, #488] @ (80121c4 ) 8011fdc: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8011fe0: 6013 str r3, [r2, #0] 8011fe2: 4b78 ldr r3, [pc, #480] @ (80121c4 ) 8011fe4: 681b ldr r3, [r3, #0] 8011fe6: 4a77 ldr r2, [pc, #476] @ (80121c4 ) 8011fe8: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8011fec: 6013 str r3, [r2, #0] 8011fee: e01d b.n 801202c 8011ff0: 687b ldr r3, [r7, #4] 8011ff2: 689b ldr r3, [r3, #8] 8011ff4: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 8011ff8: d10c bne.n 8012014 8011ffa: 4b72 ldr r3, [pc, #456] @ (80121c4 ) 8011ffc: 681b ldr r3, [r3, #0] 8011ffe: 4a71 ldr r2, [pc, #452] @ (80121c4 ) 8012000: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8012004: 6013 str r3, [r2, #0] 8012006: 4b6f ldr r3, [pc, #444] @ (80121c4 ) 8012008: 681b ldr r3, [r3, #0] 801200a: 4a6e ldr r2, [pc, #440] @ (80121c4 ) 801200c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8012010: 6013 str r3, [r2, #0] 8012012: e00b b.n 801202c 8012014: 4b6b ldr r3, [pc, #428] @ (80121c4 ) 8012016: 681b ldr r3, [r3, #0] 8012018: 4a6a ldr r2, [pc, #424] @ (80121c4 ) 801201a: f423 3380 bic.w r3, r3, #65536 @ 0x10000 801201e: 6013 str r3, [r2, #0] 8012020: 4b68 ldr r3, [pc, #416] @ (80121c4 ) 8012022: 681b ldr r3, [r3, #0] 8012024: 4a67 ldr r2, [pc, #412] @ (80121c4 ) 8012026: f423 2380 bic.w r3, r3, #262144 @ 0x40000 801202a: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 801202c: 687b ldr r3, [r7, #4] 801202e: 689b ldr r3, [r3, #8] 8012030: 2b00 cmp r3, #0 8012032: d013 beq.n 801205c { /* Get Start Tick */ tickstart = HAL_GetTick(); 8012034: f7fd fb04 bl 800f640 8012038: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 801203a: e008 b.n 801204e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 801203c: f7fd fb00 bl 800f640 8012040: 4602 mov r2, r0 8012042: 693b ldr r3, [r7, #16] 8012044: 1ad3 subs r3, r2, r3 8012046: 2b64 cmp r3, #100 @ 0x64 8012048: d901 bls.n 801204e { return HAL_TIMEOUT; 801204a: 2303 movs r3, #3 801204c: e292 b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 801204e: 4b5d ldr r3, [pc, #372] @ (80121c4 ) 8012050: 681b ldr r3, [r3, #0] 8012052: f403 3300 and.w r3, r3, #131072 @ 0x20000 8012056: 2b00 cmp r3, #0 8012058: d0f0 beq.n 801203c 801205a: e014 b.n 8012086 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 801205c: f7fd faf0 bl 800f640 8012060: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8012062: e008 b.n 8012076 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8012064: f7fd faec bl 800f640 8012068: 4602 mov r2, r0 801206a: 693b ldr r3, [r7, #16] 801206c: 1ad3 subs r3, r2, r3 801206e: 2b64 cmp r3, #100 @ 0x64 8012070: d901 bls.n 8012076 { return HAL_TIMEOUT; 8012072: 2303 movs r3, #3 8012074: e27e b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8012076: 4b53 ldr r3, [pc, #332] @ (80121c4 ) 8012078: 681b ldr r3, [r3, #0] 801207a: f403 3300 and.w r3, r3, #131072 @ 0x20000 801207e: 2b00 cmp r3, #0 8012080: d1f0 bne.n 8012064 8012082: e000 b.n 8012086 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8012084: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8012086: 687b ldr r3, [r7, #4] 8012088: 681b ldr r3, [r3, #0] 801208a: f003 0302 and.w r3, r3, #2 801208e: 2b00 cmp r3, #0 8012090: d063 beq.n 801215a /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8012092: 4b4c ldr r3, [pc, #304] @ (80121c4 ) 8012094: 685b ldr r3, [r3, #4] 8012096: f003 030c and.w r3, r3, #12 801209a: 2b00 cmp r3, #0 801209c: d00b beq.n 80120b6 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 801209e: 4b49 ldr r3, [pc, #292] @ (80121c4 ) 80120a0: 685b ldr r3, [r3, #4] 80120a2: f003 030c and.w r3, r3, #12 80120a6: 2b08 cmp r3, #8 80120a8: d11c bne.n 80120e4 80120aa: 4b46 ldr r3, [pc, #280] @ (80121c4 ) 80120ac: 685b ldr r3, [r3, #4] 80120ae: f403 3380 and.w r3, r3, #65536 @ 0x10000 80120b2: 2b00 cmp r3, #0 80120b4: d116 bne.n 80120e4 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80120b6: 4b43 ldr r3, [pc, #268] @ (80121c4 ) 80120b8: 681b ldr r3, [r3, #0] 80120ba: f003 0302 and.w r3, r3, #2 80120be: 2b00 cmp r3, #0 80120c0: d005 beq.n 80120ce 80120c2: 687b ldr r3, [r7, #4] 80120c4: 695b ldr r3, [r3, #20] 80120c6: 2b01 cmp r3, #1 80120c8: d001 beq.n 80120ce { return HAL_ERROR; 80120ca: 2301 movs r3, #1 80120cc: e252 b.n 8012574 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80120ce: 4b3d ldr r3, [pc, #244] @ (80121c4 ) 80120d0: 681b ldr r3, [r3, #0] 80120d2: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80120d6: 687b ldr r3, [r7, #4] 80120d8: 699b ldr r3, [r3, #24] 80120da: 00db lsls r3, r3, #3 80120dc: 4939 ldr r1, [pc, #228] @ (80121c4 ) 80120de: 4313 orrs r3, r2 80120e0: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80120e2: e03a b.n 801215a } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 80120e4: 687b ldr r3, [r7, #4] 80120e6: 695b ldr r3, [r3, #20] 80120e8: 2b00 cmp r3, #0 80120ea: d020 beq.n 801212e { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 80120ec: 4b36 ldr r3, [pc, #216] @ (80121c8 ) 80120ee: 2201 movs r2, #1 80120f0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80120f2: f7fd faa5 bl 800f640 80120f6: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80120f8: e008 b.n 801210c { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80120fa: f7fd faa1 bl 800f640 80120fe: 4602 mov r2, r0 8012100: 693b ldr r3, [r7, #16] 8012102: 1ad3 subs r3, r2, r3 8012104: 2b02 cmp r3, #2 8012106: d901 bls.n 801210c { return HAL_TIMEOUT; 8012108: 2303 movs r3, #3 801210a: e233 b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 801210c: 4b2d ldr r3, [pc, #180] @ (80121c4 ) 801210e: 681b ldr r3, [r3, #0] 8012110: f003 0302 and.w r3, r3, #2 8012114: 2b00 cmp r3, #0 8012116: d0f0 beq.n 80120fa } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8012118: 4b2a ldr r3, [pc, #168] @ (80121c4 ) 801211a: 681b ldr r3, [r3, #0] 801211c: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8012120: 687b ldr r3, [r7, #4] 8012122: 699b ldr r3, [r3, #24] 8012124: 00db lsls r3, r3, #3 8012126: 4927 ldr r1, [pc, #156] @ (80121c4 ) 8012128: 4313 orrs r3, r2 801212a: 600b str r3, [r1, #0] 801212c: e015 b.n 801215a } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 801212e: 4b26 ldr r3, [pc, #152] @ (80121c8 ) 8012130: 2200 movs r2, #0 8012132: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8012134: f7fd fa84 bl 800f640 8012138: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 801213a: e008 b.n 801214e { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 801213c: f7fd fa80 bl 800f640 8012140: 4602 mov r2, r0 8012142: 693b ldr r3, [r7, #16] 8012144: 1ad3 subs r3, r2, r3 8012146: 2b02 cmp r3, #2 8012148: d901 bls.n 801214e { return HAL_TIMEOUT; 801214a: 2303 movs r3, #3 801214c: e212 b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 801214e: 4b1d ldr r3, [pc, #116] @ (80121c4 ) 8012150: 681b ldr r3, [r3, #0] 8012152: f003 0302 and.w r3, r3, #2 8012156: 2b00 cmp r3, #0 8012158: d1f0 bne.n 801213c } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 801215a: 687b ldr r3, [r7, #4] 801215c: 681b ldr r3, [r3, #0] 801215e: f003 0308 and.w r3, r3, #8 8012162: 2b00 cmp r3, #0 8012164: d03a beq.n 80121dc { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8012166: 687b ldr r3, [r7, #4] 8012168: 69db ldr r3, [r3, #28] 801216a: 2b00 cmp r3, #0 801216c: d019 beq.n 80121a2 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 801216e: 4b17 ldr r3, [pc, #92] @ (80121cc ) 8012170: 2201 movs r2, #1 8012172: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8012174: f7fd fa64 bl 800f640 8012178: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 801217a: e008 b.n 801218e { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 801217c: f7fd fa60 bl 800f640 8012180: 4602 mov r2, r0 8012182: 693b ldr r3, [r7, #16] 8012184: 1ad3 subs r3, r2, r3 8012186: 2b02 cmp r3, #2 8012188: d901 bls.n 801218e { return HAL_TIMEOUT; 801218a: 2303 movs r3, #3 801218c: e1f2 b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 801218e: 4b0d ldr r3, [pc, #52] @ (80121c4 ) 8012190: 6a5b ldr r3, [r3, #36] @ 0x24 8012192: f003 0302 and.w r3, r3, #2 8012196: 2b00 cmp r3, #0 8012198: d0f0 beq.n 801217c } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 801219a: 2001 movs r0, #1 801219c: f000 fbca bl 8012934 80121a0: e01c b.n 80121dc } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 80121a2: 4b0a ldr r3, [pc, #40] @ (80121cc ) 80121a4: 2200 movs r2, #0 80121a6: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80121a8: f7fd fa4a bl 800f640 80121ac: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80121ae: e00f b.n 80121d0 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 80121b0: f7fd fa46 bl 800f640 80121b4: 4602 mov r2, r0 80121b6: 693b ldr r3, [r7, #16] 80121b8: 1ad3 subs r3, r2, r3 80121ba: 2b02 cmp r3, #2 80121bc: d908 bls.n 80121d0 { return HAL_TIMEOUT; 80121be: 2303 movs r3, #3 80121c0: e1d8 b.n 8012574 80121c2: bf00 nop 80121c4: 40021000 .word 0x40021000 80121c8: 42420000 .word 0x42420000 80121cc: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80121d0: 4b9b ldr r3, [pc, #620] @ (8012440 ) 80121d2: 6a5b ldr r3, [r3, #36] @ 0x24 80121d4: f003 0302 and.w r3, r3, #2 80121d8: 2b00 cmp r3, #0 80121da: d1e9 bne.n 80121b0 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80121dc: 687b ldr r3, [r7, #4] 80121de: 681b ldr r3, [r3, #0] 80121e0: f003 0304 and.w r3, r3, #4 80121e4: 2b00 cmp r3, #0 80121e6: f000 80a6 beq.w 8012336 { FlagStatus pwrclkchanged = RESET; 80121ea: 2300 movs r3, #0 80121ec: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 80121ee: 4b94 ldr r3, [pc, #592] @ (8012440 ) 80121f0: 69db ldr r3, [r3, #28] 80121f2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80121f6: 2b00 cmp r3, #0 80121f8: d10d bne.n 8012216 { __HAL_RCC_PWR_CLK_ENABLE(); 80121fa: 4b91 ldr r3, [pc, #580] @ (8012440 ) 80121fc: 69db ldr r3, [r3, #28] 80121fe: 4a90 ldr r2, [pc, #576] @ (8012440 ) 8012200: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8012204: 61d3 str r3, [r2, #28] 8012206: 4b8e ldr r3, [pc, #568] @ (8012440 ) 8012208: 69db ldr r3, [r3, #28] 801220a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 801220e: 60bb str r3, [r7, #8] 8012210: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8012212: 2301 movs r3, #1 8012214: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8012216: 4b8b ldr r3, [pc, #556] @ (8012444 ) 8012218: 681b ldr r3, [r3, #0] 801221a: f403 7380 and.w r3, r3, #256 @ 0x100 801221e: 2b00 cmp r3, #0 8012220: d118 bne.n 8012254 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8012222: 4b88 ldr r3, [pc, #544] @ (8012444 ) 8012224: 681b ldr r3, [r3, #0] 8012226: 4a87 ldr r2, [pc, #540] @ (8012444 ) 8012228: f443 7380 orr.w r3, r3, #256 @ 0x100 801222c: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 801222e: f7fd fa07 bl 800f640 8012232: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8012234: e008 b.n 8012248 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8012236: f7fd fa03 bl 800f640 801223a: 4602 mov r2, r0 801223c: 693b ldr r3, [r7, #16] 801223e: 1ad3 subs r3, r2, r3 8012240: 2b64 cmp r3, #100 @ 0x64 8012242: d901 bls.n 8012248 { return HAL_TIMEOUT; 8012244: 2303 movs r3, #3 8012246: e195 b.n 8012574 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8012248: 4b7e ldr r3, [pc, #504] @ (8012444 ) 801224a: 681b ldr r3, [r3, #0] 801224c: f403 7380 and.w r3, r3, #256 @ 0x100 8012250: 2b00 cmp r3, #0 8012252: d0f0 beq.n 8012236 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8012254: 687b ldr r3, [r7, #4] 8012256: 691b ldr r3, [r3, #16] 8012258: 2b01 cmp r3, #1 801225a: d106 bne.n 801226a 801225c: 4b78 ldr r3, [pc, #480] @ (8012440 ) 801225e: 6a1b ldr r3, [r3, #32] 8012260: 4a77 ldr r2, [pc, #476] @ (8012440 ) 8012262: f043 0301 orr.w r3, r3, #1 8012266: 6213 str r3, [r2, #32] 8012268: e02d b.n 80122c6 801226a: 687b ldr r3, [r7, #4] 801226c: 691b ldr r3, [r3, #16] 801226e: 2b00 cmp r3, #0 8012270: d10c bne.n 801228c 8012272: 4b73 ldr r3, [pc, #460] @ (8012440 ) 8012274: 6a1b ldr r3, [r3, #32] 8012276: 4a72 ldr r2, [pc, #456] @ (8012440 ) 8012278: f023 0301 bic.w r3, r3, #1 801227c: 6213 str r3, [r2, #32] 801227e: 4b70 ldr r3, [pc, #448] @ (8012440 ) 8012280: 6a1b ldr r3, [r3, #32] 8012282: 4a6f ldr r2, [pc, #444] @ (8012440 ) 8012284: f023 0304 bic.w r3, r3, #4 8012288: 6213 str r3, [r2, #32] 801228a: e01c b.n 80122c6 801228c: 687b ldr r3, [r7, #4] 801228e: 691b ldr r3, [r3, #16] 8012290: 2b05 cmp r3, #5 8012292: d10c bne.n 80122ae 8012294: 4b6a ldr r3, [pc, #424] @ (8012440 ) 8012296: 6a1b ldr r3, [r3, #32] 8012298: 4a69 ldr r2, [pc, #420] @ (8012440 ) 801229a: f043 0304 orr.w r3, r3, #4 801229e: 6213 str r3, [r2, #32] 80122a0: 4b67 ldr r3, [pc, #412] @ (8012440 ) 80122a2: 6a1b ldr r3, [r3, #32] 80122a4: 4a66 ldr r2, [pc, #408] @ (8012440 ) 80122a6: f043 0301 orr.w r3, r3, #1 80122aa: 6213 str r3, [r2, #32] 80122ac: e00b b.n 80122c6 80122ae: 4b64 ldr r3, [pc, #400] @ (8012440 ) 80122b0: 6a1b ldr r3, [r3, #32] 80122b2: 4a63 ldr r2, [pc, #396] @ (8012440 ) 80122b4: f023 0301 bic.w r3, r3, #1 80122b8: 6213 str r3, [r2, #32] 80122ba: 4b61 ldr r3, [pc, #388] @ (8012440 ) 80122bc: 6a1b ldr r3, [r3, #32] 80122be: 4a60 ldr r2, [pc, #384] @ (8012440 ) 80122c0: f023 0304 bic.w r3, r3, #4 80122c4: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 80122c6: 687b ldr r3, [r7, #4] 80122c8: 691b ldr r3, [r3, #16] 80122ca: 2b00 cmp r3, #0 80122cc: d015 beq.n 80122fa { /* Get Start Tick */ tickstart = HAL_GetTick(); 80122ce: f7fd f9b7 bl 800f640 80122d2: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80122d4: e00a b.n 80122ec { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80122d6: f7fd f9b3 bl 800f640 80122da: 4602 mov r2, r0 80122dc: 693b ldr r3, [r7, #16] 80122de: 1ad3 subs r3, r2, r3 80122e0: f241 3288 movw r2, #5000 @ 0x1388 80122e4: 4293 cmp r3, r2 80122e6: d901 bls.n 80122ec { return HAL_TIMEOUT; 80122e8: 2303 movs r3, #3 80122ea: e143 b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80122ec: 4b54 ldr r3, [pc, #336] @ (8012440 ) 80122ee: 6a1b ldr r3, [r3, #32] 80122f0: f003 0302 and.w r3, r3, #2 80122f4: 2b00 cmp r3, #0 80122f6: d0ee beq.n 80122d6 80122f8: e014 b.n 8012324 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80122fa: f7fd f9a1 bl 800f640 80122fe: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8012300: e00a b.n 8012318 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8012302: f7fd f99d bl 800f640 8012306: 4602 mov r2, r0 8012308: 693b ldr r3, [r7, #16] 801230a: 1ad3 subs r3, r2, r3 801230c: f241 3288 movw r2, #5000 @ 0x1388 8012310: 4293 cmp r3, r2 8012312: d901 bls.n 8012318 { return HAL_TIMEOUT; 8012314: 2303 movs r3, #3 8012316: e12d b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8012318: 4b49 ldr r3, [pc, #292] @ (8012440 ) 801231a: 6a1b ldr r3, [r3, #32] 801231c: f003 0302 and.w r3, r3, #2 8012320: 2b00 cmp r3, #0 8012322: d1ee bne.n 8012302 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8012324: 7dfb ldrb r3, [r7, #23] 8012326: 2b01 cmp r3, #1 8012328: d105 bne.n 8012336 { __HAL_RCC_PWR_CLK_DISABLE(); 801232a: 4b45 ldr r3, [pc, #276] @ (8012440 ) 801232c: 69db ldr r3, [r3, #28] 801232e: 4a44 ldr r2, [pc, #272] @ (8012440 ) 8012330: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8012334: 61d3 str r3, [r2, #28] #if defined(RCC_CR_PLL2ON) /*-------------------------------- PLL2 Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL2(RCC_OscInitStruct->PLL2.PLL2State)); if ((RCC_OscInitStruct->PLL2.PLL2State) != RCC_PLL2_NONE) 8012336: 687b ldr r3, [r7, #4] 8012338: 6adb ldr r3, [r3, #44] @ 0x2c 801233a: 2b00 cmp r3, #0 801233c: f000 808c beq.w 8012458 { /* This bit can not be cleared if the PLL2 clock is used indirectly as system clock (i.e. it is used as PLL clock entry that is used as system clock). */ if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8012340: 4b3f ldr r3, [pc, #252] @ (8012440 ) 8012342: 685b ldr r3, [r3, #4] 8012344: f403 3380 and.w r3, r3, #65536 @ 0x10000 8012348: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 801234c: d10e bne.n 801236c (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 801234e: 4b3c ldr r3, [pc, #240] @ (8012440 ) 8012350: 685b ldr r3, [r3, #4] 8012352: f003 030c and.w r3, r3, #12 if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8012356: 2b08 cmp r3, #8 8012358: d108 bne.n 801236c ((READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) == RCC_CFGR2_PREDIV1SRC_PLL2)) 801235a: 4b39 ldr r3, [pc, #228] @ (8012440 ) 801235c: 6adb ldr r3, [r3, #44] @ 0x2c 801235e: f403 3380 and.w r3, r3, #65536 @ 0x10000 (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 8012362: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8012366: d101 bne.n 801236c { return HAL_ERROR; 8012368: 2301 movs r3, #1 801236a: e103 b.n 8012574 } else { if ((RCC_OscInitStruct->PLL2.PLL2State) == RCC_PLL2_ON) 801236c: 687b ldr r3, [r7, #4] 801236e: 6adb ldr r3, [r3, #44] @ 0x2c 8012370: 2b02 cmp r3, #2 8012372: d14e bne.n 8012412 assert_param(IS_RCC_PLL2_MUL(RCC_OscInitStruct->PLL2.PLL2MUL)); assert_param(IS_RCC_HSE_PREDIV2(RCC_OscInitStruct->PLL2.HSEPrediv2Value)); /* Prediv2 can be written only when the PLLI2S is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 8012374: 4b32 ldr r3, [pc, #200] @ (8012440 ) 8012376: 681b ldr r3, [r3, #0] 8012378: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 801237c: 2b00 cmp r3, #0 801237e: d009 beq.n 8012394 (__HAL_RCC_HSE_GET_PREDIV2() != RCC_OscInitStruct->PLL2.HSEPrediv2Value)) 8012380: 4b2f ldr r3, [pc, #188] @ (8012440 ) 8012382: 6adb ldr r3, [r3, #44] @ 0x2c 8012384: f003 02f0 and.w r2, r3, #240 @ 0xf0 8012388: 687b ldr r3, [r7, #4] 801238a: 6b5b ldr r3, [r3, #52] @ 0x34 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 801238c: 429a cmp r2, r3 801238e: d001 beq.n 8012394 { return HAL_ERROR; 8012390: 2301 movs r3, #1 8012392: e0ef b.n 8012574 } /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 8012394: 4b2c ldr r3, [pc, #176] @ (8012448 ) 8012396: 2200 movs r2, #0 8012398: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 801239a: f7fd f951 bl 800f640 801239e: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 80123a0: e008 b.n 80123b4 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 80123a2: f7fd f94d bl 800f640 80123a6: 4602 mov r2, r0 80123a8: 693b ldr r3, [r7, #16] 80123aa: 1ad3 subs r3, r2, r3 80123ac: 2b64 cmp r3, #100 @ 0x64 80123ae: d901 bls.n 80123b4 { return HAL_TIMEOUT; 80123b0: 2303 movs r3, #3 80123b2: e0df b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 80123b4: 4b22 ldr r3, [pc, #136] @ (8012440 ) 80123b6: 681b ldr r3, [r3, #0] 80123b8: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 80123bc: 2b00 cmp r3, #0 80123be: d1f0 bne.n 80123a2 } } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(RCC_OscInitStruct->PLL2.HSEPrediv2Value); 80123c0: 4b1f ldr r3, [pc, #124] @ (8012440 ) 80123c2: 6adb ldr r3, [r3, #44] @ 0x2c 80123c4: f023 02f0 bic.w r2, r3, #240 @ 0xf0 80123c8: 687b ldr r3, [r7, #4] 80123ca: 6b5b ldr r3, [r3, #52] @ 0x34 80123cc: 491c ldr r1, [pc, #112] @ (8012440 ) 80123ce: 4313 orrs r3, r2 80123d0: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLL2 multiplication factors. */ __HAL_RCC_PLL2_CONFIG(RCC_OscInitStruct->PLL2.PLL2MUL); 80123d2: 4b1b ldr r3, [pc, #108] @ (8012440 ) 80123d4: 6adb ldr r3, [r3, #44] @ 0x2c 80123d6: f423 6270 bic.w r2, r3, #3840 @ 0xf00 80123da: 687b ldr r3, [r7, #4] 80123dc: 6b1b ldr r3, [r3, #48] @ 0x30 80123de: 4918 ldr r1, [pc, #96] @ (8012440 ) 80123e0: 4313 orrs r3, r2 80123e2: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLL2. */ __HAL_RCC_PLL2_ENABLE(); 80123e4: 4b18 ldr r3, [pc, #96] @ (8012448 ) 80123e6: 2201 movs r2, #1 80123e8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80123ea: f7fd f929 bl 800f640 80123ee: 6138 str r0, [r7, #16] /* Wait till PLL2 is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 80123f0: e008 b.n 8012404 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 80123f2: f7fd f925 bl 800f640 80123f6: 4602 mov r2, r0 80123f8: 693b ldr r3, [r7, #16] 80123fa: 1ad3 subs r3, r2, r3 80123fc: 2b64 cmp r3, #100 @ 0x64 80123fe: d901 bls.n 8012404 { return HAL_TIMEOUT; 8012400: 2303 movs r3, #3 8012402: e0b7 b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 8012404: 4b0e ldr r3, [pc, #56] @ (8012440 ) 8012406: 681b ldr r3, [r3, #0] 8012408: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 801240c: 2b00 cmp r3, #0 801240e: d0f0 beq.n 80123f2 8012410: e022 b.n 8012458 } } else { /* Set PREDIV1 source to HSE */ CLEAR_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC); 8012412: 4b0b ldr r3, [pc, #44] @ (8012440 ) 8012414: 6adb ldr r3, [r3, #44] @ 0x2c 8012416: 4a0a ldr r2, [pc, #40] @ (8012440 ) 8012418: f423 3380 bic.w r3, r3, #65536 @ 0x10000 801241c: 62d3 str r3, [r2, #44] @ 0x2c /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 801241e: 4b0a ldr r3, [pc, #40] @ (8012448 ) 8012420: 2200 movs r2, #0 8012422: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8012424: f7fd f90c bl 800f640 8012428: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 801242a: e00f b.n 801244c { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 801242c: f7fd f908 bl 800f640 8012430: 4602 mov r2, r0 8012432: 693b ldr r3, [r7, #16] 8012434: 1ad3 subs r3, r2, r3 8012436: 2b64 cmp r3, #100 @ 0x64 8012438: d908 bls.n 801244c { return HAL_TIMEOUT; 801243a: 2303 movs r3, #3 801243c: e09a b.n 8012574 801243e: bf00 nop 8012440: 40021000 .word 0x40021000 8012444: 40007000 .word 0x40007000 8012448: 42420068 .word 0x42420068 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 801244c: 4b4b ldr r3, [pc, #300] @ (801257c ) 801244e: 681b ldr r3, [r3, #0] 8012450: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8012454: 2b00 cmp r3, #0 8012456: d1e9 bne.n 801242c #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8012458: 687b ldr r3, [r7, #4] 801245a: 6a1b ldr r3, [r3, #32] 801245c: 2b00 cmp r3, #0 801245e: f000 8088 beq.w 8012572 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8012462: 4b46 ldr r3, [pc, #280] @ (801257c ) 8012464: 685b ldr r3, [r3, #4] 8012466: f003 030c and.w r3, r3, #12 801246a: 2b08 cmp r3, #8 801246c: d068 beq.n 8012540 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 801246e: 687b ldr r3, [r7, #4] 8012470: 6a1b ldr r3, [r3, #32] 8012472: 2b02 cmp r3, #2 8012474: d14d bne.n 8012512 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8012476: 4b42 ldr r3, [pc, #264] @ (8012580 ) 8012478: 2200 movs r2, #0 801247a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 801247c: f7fd f8e0 bl 800f640 8012480: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8012482: e008 b.n 8012496 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8012484: f7fd f8dc bl 800f640 8012488: 4602 mov r2, r0 801248a: 693b ldr r3, [r7, #16] 801248c: 1ad3 subs r3, r2, r3 801248e: 2b02 cmp r3, #2 8012490: d901 bls.n 8012496 { return HAL_TIMEOUT; 8012492: 2303 movs r3, #3 8012494: e06e b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8012496: 4b39 ldr r3, [pc, #228] @ (801257c ) 8012498: 681b ldr r3, [r3, #0] 801249a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 801249e: 2b00 cmp r3, #0 80124a0: d1f0 bne.n 8012484 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 80124a2: 687b ldr r3, [r7, #4] 80124a4: 6a5b ldr r3, [r3, #36] @ 0x24 80124a6: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 80124aa: d10f bne.n 80124cc assert_param(IS_RCC_HSE_PREDIV(RCC_OscInitStruct->HSEPredivValue)); #if defined(RCC_CFGR2_PREDIV1SRC) assert_param(IS_RCC_PREDIV1_SOURCE(RCC_OscInitStruct->Prediv1Source)); /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); 80124ac: 4b33 ldr r3, [pc, #204] @ (801257c ) 80124ae: 6ada ldr r2, [r3, #44] @ 0x2c 80124b0: 687b ldr r3, [r7, #4] 80124b2: 685b ldr r3, [r3, #4] 80124b4: 4931 ldr r1, [pc, #196] @ (801257c ) 80124b6: 4313 orrs r3, r2 80124b8: 62cb str r3, [r1, #44] @ 0x2c #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 80124ba: 4b30 ldr r3, [pc, #192] @ (801257c ) 80124bc: 6adb ldr r3, [r3, #44] @ 0x2c 80124be: f023 020f bic.w r2, r3, #15 80124c2: 687b ldr r3, [r7, #4] 80124c4: 68db ldr r3, [r3, #12] 80124c6: 492d ldr r1, [pc, #180] @ (801257c ) 80124c8: 4313 orrs r3, r2 80124ca: 62cb str r3, [r1, #44] @ 0x2c } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 80124cc: 4b2b ldr r3, [pc, #172] @ (801257c ) 80124ce: 685b ldr r3, [r3, #4] 80124d0: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 80124d4: 687b ldr r3, [r7, #4] 80124d6: 6a59 ldr r1, [r3, #36] @ 0x24 80124d8: 687b ldr r3, [r7, #4] 80124da: 6a9b ldr r3, [r3, #40] @ 0x28 80124dc: 430b orrs r3, r1 80124de: 4927 ldr r1, [pc, #156] @ (801257c ) 80124e0: 4313 orrs r3, r2 80124e2: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 80124e4: 4b26 ldr r3, [pc, #152] @ (8012580 ) 80124e6: 2201 movs r2, #1 80124e8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80124ea: f7fd f8a9 bl 800f640 80124ee: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80124f0: e008 b.n 8012504 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80124f2: f7fd f8a5 bl 800f640 80124f6: 4602 mov r2, r0 80124f8: 693b ldr r3, [r7, #16] 80124fa: 1ad3 subs r3, r2, r3 80124fc: 2b02 cmp r3, #2 80124fe: d901 bls.n 8012504 { return HAL_TIMEOUT; 8012500: 2303 movs r3, #3 8012502: e037 b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8012504: 4b1d ldr r3, [pc, #116] @ (801257c ) 8012506: 681b ldr r3, [r3, #0] 8012508: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 801250c: 2b00 cmp r3, #0 801250e: d0f0 beq.n 80124f2 8012510: e02f b.n 8012572 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8012512: 4b1b ldr r3, [pc, #108] @ (8012580 ) 8012514: 2200 movs r2, #0 8012516: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8012518: f7fd f892 bl 800f640 801251c: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 801251e: e008 b.n 8012532 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8012520: f7fd f88e bl 800f640 8012524: 4602 mov r2, r0 8012526: 693b ldr r3, [r7, #16] 8012528: 1ad3 subs r3, r2, r3 801252a: 2b02 cmp r3, #2 801252c: d901 bls.n 8012532 { return HAL_TIMEOUT; 801252e: 2303 movs r3, #3 8012530: e020 b.n 8012574 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8012532: 4b12 ldr r3, [pc, #72] @ (801257c ) 8012534: 681b ldr r3, [r3, #0] 8012536: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 801253a: 2b00 cmp r3, #0 801253c: d1f0 bne.n 8012520 801253e: e018 b.n 8012572 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8012540: 687b ldr r3, [r7, #4] 8012542: 6a1b ldr r3, [r3, #32] 8012544: 2b01 cmp r3, #1 8012546: d101 bne.n 801254c { return HAL_ERROR; 8012548: 2301 movs r3, #1 801254a: e013 b.n 8012574 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 801254c: 4b0b ldr r3, [pc, #44] @ (801257c ) 801254e: 685b ldr r3, [r3, #4] 8012550: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8012552: 68fb ldr r3, [r7, #12] 8012554: f403 3280 and.w r2, r3, #65536 @ 0x10000 8012558: 687b ldr r3, [r7, #4] 801255a: 6a5b ldr r3, [r3, #36] @ 0x24 801255c: 429a cmp r2, r3 801255e: d106 bne.n 801256e (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8012560: 68fb ldr r3, [r7, #12] 8012562: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 8012566: 687b ldr r3, [r7, #4] 8012568: 6a9b ldr r3, [r3, #40] @ 0x28 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 801256a: 429a cmp r2, r3 801256c: d001 beq.n 8012572 { return HAL_ERROR; 801256e: 2301 movs r3, #1 8012570: e000 b.n 8012574 } } } } return HAL_OK; 8012572: 2300 movs r3, #0 } 8012574: 4618 mov r0, r3 8012576: 3718 adds r7, #24 8012578: 46bd mov sp, r7 801257a: bd80 pop {r7, pc} 801257c: 40021000 .word 0x40021000 8012580: 42420060 .word 0x42420060 08012584 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8012584: b580 push {r7, lr} 8012586: b084 sub sp, #16 8012588: af00 add r7, sp, #0 801258a: 6078 str r0, [r7, #4] 801258c: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 801258e: 687b ldr r3, [r7, #4] 8012590: 2b00 cmp r3, #0 8012592: d101 bne.n 8012598 { return HAL_ERROR; 8012594: 2301 movs r3, #1 8012596: e0d0 b.n 801273a must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8012598: 4b6a ldr r3, [pc, #424] @ (8012744 ) 801259a: 681b ldr r3, [r3, #0] 801259c: f003 0307 and.w r3, r3, #7 80125a0: 683a ldr r2, [r7, #0] 80125a2: 429a cmp r2, r3 80125a4: d910 bls.n 80125c8 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80125a6: 4b67 ldr r3, [pc, #412] @ (8012744 ) 80125a8: 681b ldr r3, [r3, #0] 80125aa: f023 0207 bic.w r2, r3, #7 80125ae: 4965 ldr r1, [pc, #404] @ (8012744 ) 80125b0: 683b ldr r3, [r7, #0] 80125b2: 4313 orrs r3, r2 80125b4: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80125b6: 4b63 ldr r3, [pc, #396] @ (8012744 ) 80125b8: 681b ldr r3, [r3, #0] 80125ba: f003 0307 and.w r3, r3, #7 80125be: 683a ldr r2, [r7, #0] 80125c0: 429a cmp r2, r3 80125c2: d001 beq.n 80125c8 { return HAL_ERROR; 80125c4: 2301 movs r3, #1 80125c6: e0b8 b.n 801273a } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 80125c8: 687b ldr r3, [r7, #4] 80125ca: 681b ldr r3, [r3, #0] 80125cc: f003 0302 and.w r3, r3, #2 80125d0: 2b00 cmp r3, #0 80125d2: d020 beq.n 8012616 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80125d4: 687b ldr r3, [r7, #4] 80125d6: 681b ldr r3, [r3, #0] 80125d8: f003 0304 and.w r3, r3, #4 80125dc: 2b00 cmp r3, #0 80125de: d005 beq.n 80125ec { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 80125e0: 4b59 ldr r3, [pc, #356] @ (8012748 ) 80125e2: 685b ldr r3, [r3, #4] 80125e4: 4a58 ldr r2, [pc, #352] @ (8012748 ) 80125e6: f443 63e0 orr.w r3, r3, #1792 @ 0x700 80125ea: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80125ec: 687b ldr r3, [r7, #4] 80125ee: 681b ldr r3, [r3, #0] 80125f0: f003 0308 and.w r3, r3, #8 80125f4: 2b00 cmp r3, #0 80125f6: d005 beq.n 8012604 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 80125f8: 4b53 ldr r3, [pc, #332] @ (8012748 ) 80125fa: 685b ldr r3, [r3, #4] 80125fc: 4a52 ldr r2, [pc, #328] @ (8012748 ) 80125fe: f443 5360 orr.w r3, r3, #14336 @ 0x3800 8012602: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8012604: 4b50 ldr r3, [pc, #320] @ (8012748 ) 8012606: 685b ldr r3, [r3, #4] 8012608: f023 02f0 bic.w r2, r3, #240 @ 0xf0 801260c: 687b ldr r3, [r7, #4] 801260e: 689b ldr r3, [r3, #8] 8012610: 494d ldr r1, [pc, #308] @ (8012748 ) 8012612: 4313 orrs r3, r2 8012614: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8012616: 687b ldr r3, [r7, #4] 8012618: 681b ldr r3, [r3, #0] 801261a: f003 0301 and.w r3, r3, #1 801261e: 2b00 cmp r3, #0 8012620: d040 beq.n 80126a4 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8012622: 687b ldr r3, [r7, #4] 8012624: 685b ldr r3, [r3, #4] 8012626: 2b01 cmp r3, #1 8012628: d107 bne.n 801263a { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 801262a: 4b47 ldr r3, [pc, #284] @ (8012748 ) 801262c: 681b ldr r3, [r3, #0] 801262e: f403 3300 and.w r3, r3, #131072 @ 0x20000 8012632: 2b00 cmp r3, #0 8012634: d115 bne.n 8012662 { return HAL_ERROR; 8012636: 2301 movs r3, #1 8012638: e07f b.n 801273a } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 801263a: 687b ldr r3, [r7, #4] 801263c: 685b ldr r3, [r3, #4] 801263e: 2b02 cmp r3, #2 8012640: d107 bne.n 8012652 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8012642: 4b41 ldr r3, [pc, #260] @ (8012748 ) 8012644: 681b ldr r3, [r3, #0] 8012646: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 801264a: 2b00 cmp r3, #0 801264c: d109 bne.n 8012662 { return HAL_ERROR; 801264e: 2301 movs r3, #1 8012650: e073 b.n 801273a } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8012652: 4b3d ldr r3, [pc, #244] @ (8012748 ) 8012654: 681b ldr r3, [r3, #0] 8012656: f003 0302 and.w r3, r3, #2 801265a: 2b00 cmp r3, #0 801265c: d101 bne.n 8012662 { return HAL_ERROR; 801265e: 2301 movs r3, #1 8012660: e06b b.n 801273a } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8012662: 4b39 ldr r3, [pc, #228] @ (8012748 ) 8012664: 685b ldr r3, [r3, #4] 8012666: f023 0203 bic.w r2, r3, #3 801266a: 687b ldr r3, [r7, #4] 801266c: 685b ldr r3, [r3, #4] 801266e: 4936 ldr r1, [pc, #216] @ (8012748 ) 8012670: 4313 orrs r3, r2 8012672: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 8012674: f7fc ffe4 bl 800f640 8012678: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 801267a: e00a b.n 8012692 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 801267c: f7fc ffe0 bl 800f640 8012680: 4602 mov r2, r0 8012682: 68fb ldr r3, [r7, #12] 8012684: 1ad3 subs r3, r2, r3 8012686: f241 3288 movw r2, #5000 @ 0x1388 801268a: 4293 cmp r3, r2 801268c: d901 bls.n 8012692 { return HAL_TIMEOUT; 801268e: 2303 movs r3, #3 8012690: e053 b.n 801273a while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8012692: 4b2d ldr r3, [pc, #180] @ (8012748 ) 8012694: 685b ldr r3, [r3, #4] 8012696: f003 020c and.w r2, r3, #12 801269a: 687b ldr r3, [r7, #4] 801269c: 685b ldr r3, [r3, #4] 801269e: 009b lsls r3, r3, #2 80126a0: 429a cmp r2, r3 80126a2: d1eb bne.n 801267c } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 80126a4: 4b27 ldr r3, [pc, #156] @ (8012744 ) 80126a6: 681b ldr r3, [r3, #0] 80126a8: f003 0307 and.w r3, r3, #7 80126ac: 683a ldr r2, [r7, #0] 80126ae: 429a cmp r2, r3 80126b0: d210 bcs.n 80126d4 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80126b2: 4b24 ldr r3, [pc, #144] @ (8012744 ) 80126b4: 681b ldr r3, [r3, #0] 80126b6: f023 0207 bic.w r2, r3, #7 80126ba: 4922 ldr r1, [pc, #136] @ (8012744 ) 80126bc: 683b ldr r3, [r7, #0] 80126be: 4313 orrs r3, r2 80126c0: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80126c2: 4b20 ldr r3, [pc, #128] @ (8012744 ) 80126c4: 681b ldr r3, [r3, #0] 80126c6: f003 0307 and.w r3, r3, #7 80126ca: 683a ldr r2, [r7, #0] 80126cc: 429a cmp r2, r3 80126ce: d001 beq.n 80126d4 { return HAL_ERROR; 80126d0: 2301 movs r3, #1 80126d2: e032 b.n 801273a } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80126d4: 687b ldr r3, [r7, #4] 80126d6: 681b ldr r3, [r3, #0] 80126d8: f003 0304 and.w r3, r3, #4 80126dc: 2b00 cmp r3, #0 80126de: d008 beq.n 80126f2 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 80126e0: 4b19 ldr r3, [pc, #100] @ (8012748 ) 80126e2: 685b ldr r3, [r3, #4] 80126e4: f423 62e0 bic.w r2, r3, #1792 @ 0x700 80126e8: 687b ldr r3, [r7, #4] 80126ea: 68db ldr r3, [r3, #12] 80126ec: 4916 ldr r1, [pc, #88] @ (8012748 ) 80126ee: 4313 orrs r3, r2 80126f0: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80126f2: 687b ldr r3, [r7, #4] 80126f4: 681b ldr r3, [r3, #0] 80126f6: f003 0308 and.w r3, r3, #8 80126fa: 2b00 cmp r3, #0 80126fc: d009 beq.n 8012712 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 80126fe: 4b12 ldr r3, [pc, #72] @ (8012748 ) 8012700: 685b ldr r3, [r3, #4] 8012702: f423 5260 bic.w r2, r3, #14336 @ 0x3800 8012706: 687b ldr r3, [r7, #4] 8012708: 691b ldr r3, [r3, #16] 801270a: 00db lsls r3, r3, #3 801270c: 490e ldr r1, [pc, #56] @ (8012748 ) 801270e: 4313 orrs r3, r2 8012710: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 8012712: f000 f821 bl 8012758 8012716: 4602 mov r2, r0 8012718: 4b0b ldr r3, [pc, #44] @ (8012748 ) 801271a: 685b ldr r3, [r3, #4] 801271c: 091b lsrs r3, r3, #4 801271e: f003 030f and.w r3, r3, #15 8012722: 490a ldr r1, [pc, #40] @ (801274c ) 8012724: 5ccb ldrb r3, [r1, r3] 8012726: fa22 f303 lsr.w r3, r2, r3 801272a: 4a09 ldr r2, [pc, #36] @ (8012750 ) 801272c: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 801272e: 4b09 ldr r3, [pc, #36] @ (8012754 ) 8012730: 681b ldr r3, [r3, #0] 8012732: 4618 mov r0, r3 8012734: f7fc ff42 bl 800f5bc return HAL_OK; 8012738: 2300 movs r3, #0 } 801273a: 4618 mov r0, r3 801273c: 3710 adds r7, #16 801273e: 46bd mov sp, r7 8012740: bd80 pop {r7, pc} 8012742: bf00 nop 8012744: 40022000 .word 0x40022000 8012748: 40021000 .word 0x40021000 801274c: 08018f88 .word 0x08018f88 8012750: 20000084 .word 0x20000084 8012754: 20000088 .word 0x20000088 08012758 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 8012758: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 801275c: b08e sub sp, #56 @ 0x38 801275e: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 8012760: 2300 movs r3, #0 8012762: 62fb str r3, [r7, #44] @ 0x2c 8012764: 2300 movs r3, #0 8012766: 62bb str r3, [r7, #40] @ 0x28 8012768: 2300 movs r3, #0 801276a: 637b str r3, [r7, #52] @ 0x34 801276c: 2300 movs r3, #0 801276e: 627b str r3, [r7, #36] @ 0x24 uint32_t sysclockfreq = 0U; 8012770: 2300 movs r3, #0 8012772: 633b str r3, [r7, #48] @ 0x30 #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; 8012774: 2300 movs r3, #0 8012776: 623b str r3, [r7, #32] 8012778: 2300 movs r3, #0 801277a: 61fb str r3, [r7, #28] #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 801277c: 4b4e ldr r3, [pc, #312] @ (80128b8 ) 801277e: 685b ldr r3, [r3, #4] 8012780: 62fb str r3, [r7, #44] @ 0x2c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 8012782: 6afb ldr r3, [r7, #44] @ 0x2c 8012784: f003 030c and.w r3, r3, #12 8012788: 2b04 cmp r3, #4 801278a: d002 beq.n 8012792 801278c: 2b08 cmp r3, #8 801278e: d003 beq.n 8012798 8012790: e089 b.n 80128a6 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 8012792: 4b4a ldr r3, [pc, #296] @ (80128bc ) 8012794: 633b str r3, [r7, #48] @ 0x30 break; 8012796: e089 b.n 80128ac } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8012798: 6afb ldr r3, [r7, #44] @ 0x2c 801279a: 0c9b lsrs r3, r3, #18 801279c: f003 020f and.w r2, r3, #15 80127a0: 4b47 ldr r3, [pc, #284] @ (80128c0 ) 80127a2: 5c9b ldrb r3, [r3, r2] 80127a4: 627b str r3, [r7, #36] @ 0x24 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80127a6: 6afb ldr r3, [r7, #44] @ 0x2c 80127a8: f403 3380 and.w r3, r3, #65536 @ 0x10000 80127ac: 2b00 cmp r3, #0 80127ae: d072 beq.n 8012896 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 80127b0: 4b41 ldr r3, [pc, #260] @ (80128b8 ) 80127b2: 6adb ldr r3, [r3, #44] @ 0x2c 80127b4: f003 020f and.w r2, r3, #15 80127b8: 4b42 ldr r3, [pc, #264] @ (80128c4 ) 80127ba: 5c9b ldrb r3, [r3, r2] 80127bc: 62bb str r3, [r7, #40] @ 0x28 #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /*RCC_CFGR2_PREDIV1*/ #if defined(RCC_CFGR2_PREDIV1SRC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 80127be: 4b3e ldr r3, [pc, #248] @ (80128b8 ) 80127c0: 6adb ldr r3, [r3, #44] @ 0x2c 80127c2: f403 3380 and.w r3, r3, #65536 @ 0x10000 80127c6: 2b00 cmp r3, #0 80127c8: d053 beq.n 8012872 { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 80127ca: 4b3b ldr r3, [pc, #236] @ (80128b8 ) 80127cc: 6adb ldr r3, [r3, #44] @ 0x2c 80127ce: 091b lsrs r3, r3, #4 80127d0: f003 030f and.w r3, r3, #15 80127d4: 3301 adds r3, #1 80127d6: 623b str r3, [r7, #32] pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 80127d8: 4b37 ldr r3, [pc, #220] @ (80128b8 ) 80127da: 6adb ldr r3, [r3, #44] @ 0x2c 80127dc: 0a1b lsrs r3, r3, #8 80127de: f003 030f and.w r3, r3, #15 80127e2: 3302 adds r3, #2 80127e4: 61fb str r3, [r7, #28] pllclk = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pll2mul * (uint64_t)pllmul) / ((uint64_t)prediv2 * (uint64_t)prediv)); 80127e6: 69fb ldr r3, [r7, #28] 80127e8: 2200 movs r2, #0 80127ea: 469a mov sl, r3 80127ec: 4693 mov fp, r2 80127ee: 6a7b ldr r3, [r7, #36] @ 0x24 80127f0: 2200 movs r2, #0 80127f2: 613b str r3, [r7, #16] 80127f4: 617a str r2, [r7, #20] 80127f6: 693b ldr r3, [r7, #16] 80127f8: fb03 f20b mul.w r2, r3, fp 80127fc: 697b ldr r3, [r7, #20] 80127fe: fb0a f303 mul.w r3, sl, r3 8012802: 4413 add r3, r2 8012804: 693a ldr r2, [r7, #16] 8012806: fbaa 0102 umull r0, r1, sl, r2 801280a: 440b add r3, r1 801280c: 4619 mov r1, r3 801280e: 4b2b ldr r3, [pc, #172] @ (80128bc ) 8012810: fb03 f201 mul.w r2, r3, r1 8012814: 2300 movs r3, #0 8012816: fb00 f303 mul.w r3, r0, r3 801281a: 4413 add r3, r2 801281c: 4a27 ldr r2, [pc, #156] @ (80128bc ) 801281e: fba0 4502 umull r4, r5, r0, r2 8012822: 442b add r3, r5 8012824: 461d mov r5, r3 8012826: 6a3b ldr r3, [r7, #32] 8012828: 2200 movs r2, #0 801282a: 60bb str r3, [r7, #8] 801282c: 60fa str r2, [r7, #12] 801282e: 6abb ldr r3, [r7, #40] @ 0x28 8012830: 2200 movs r2, #0 8012832: 603b str r3, [r7, #0] 8012834: 607a str r2, [r7, #4] 8012836: e9d7 0102 ldrd r0, r1, [r7, #8] 801283a: 460b mov r3, r1 801283c: e9d7 ab00 ldrd sl, fp, [r7] 8012840: 4652 mov r2, sl 8012842: fb02 f203 mul.w r2, r2, r3 8012846: 465b mov r3, fp 8012848: 4684 mov ip, r0 801284a: fb0c f303 mul.w r3, ip, r3 801284e: 4413 add r3, r2 8012850: 4602 mov r2, r0 8012852: 4651 mov r1, sl 8012854: fba2 8901 umull r8, r9, r2, r1 8012858: 444b add r3, r9 801285a: 4699 mov r9, r3 801285c: 4642 mov r2, r8 801285e: 464b mov r3, r9 8012860: 4620 mov r0, r4 8012862: 4629 mov r1, r5 8012864: f7f6 fcc6 bl 80091f4 <__aeabi_uldivmod> 8012868: 4602 mov r2, r0 801286a: 460b mov r3, r1 801286c: 4613 mov r3, r2 801286e: 637b str r3, [r7, #52] @ 0x34 8012870: e007 b.n 8012882 } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8012872: 6a7b ldr r3, [r7, #36] @ 0x24 8012874: 4a11 ldr r2, [pc, #68] @ (80128bc ) 8012876: fb03 f202 mul.w r2, r3, r2 801287a: 6abb ldr r3, [r7, #40] @ 0x28 801287c: fbb2 f3f3 udiv r3, r2, r3 8012880: 637b str r3, [r7, #52] @ 0x34 } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 8012882: 4b0f ldr r3, [pc, #60] @ (80128c0 ) 8012884: 7b5b ldrb r3, [r3, #13] 8012886: 461a mov r2, r3 8012888: 6a7b ldr r3, [r7, #36] @ 0x24 801288a: 4293 cmp r3, r2 801288c: d108 bne.n 80128a0 { pllclk = pllclk / 2; 801288e: 6b7b ldr r3, [r7, #52] @ 0x34 8012890: 085b lsrs r3, r3, #1 8012892: 637b str r3, [r7, #52] @ 0x34 8012894: e004 b.n 80128a0 #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8012896: 6a7b ldr r3, [r7, #36] @ 0x24 8012898: 4a0b ldr r2, [pc, #44] @ (80128c8 ) 801289a: fb02 f303 mul.w r3, r2, r3 801289e: 637b str r3, [r7, #52] @ 0x34 } sysclockfreq = pllclk; 80128a0: 6b7b ldr r3, [r7, #52] @ 0x34 80128a2: 633b str r3, [r7, #48] @ 0x30 break; 80128a4: e002 b.n 80128ac } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 80128a6: 4b09 ldr r3, [pc, #36] @ (80128cc ) 80128a8: 633b str r3, [r7, #48] @ 0x30 break; 80128aa: bf00 nop } } return sysclockfreq; 80128ac: 6b3b ldr r3, [r7, #48] @ 0x30 } 80128ae: 4618 mov r0, r3 80128b0: 3738 adds r7, #56 @ 0x38 80128b2: 46bd mov sp, r7 80128b4: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 80128b8: 40021000 .word 0x40021000 80128bc: 017d7840 .word 0x017d7840 80128c0: 08018fa0 .word 0x08018fa0 80128c4: 08018fb0 .word 0x08018fb0 80128c8: 003d0900 .word 0x003d0900 80128cc: 007a1200 .word 0x007a1200 080128d0 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 80128d0: b480 push {r7} 80128d2: af00 add r7, sp, #0 return SystemCoreClock; 80128d4: 4b02 ldr r3, [pc, #8] @ (80128e0 ) 80128d6: 681b ldr r3, [r3, #0] } 80128d8: 4618 mov r0, r3 80128da: 46bd mov sp, r7 80128dc: bc80 pop {r7} 80128de: 4770 bx lr 80128e0: 20000084 .word 0x20000084 080128e4 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 80128e4: b580 push {r7, lr} 80128e6: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 80128e8: f7ff fff2 bl 80128d0 80128ec: 4602 mov r2, r0 80128ee: 4b05 ldr r3, [pc, #20] @ (8012904 ) 80128f0: 685b ldr r3, [r3, #4] 80128f2: 0a1b lsrs r3, r3, #8 80128f4: f003 0307 and.w r3, r3, #7 80128f8: 4903 ldr r1, [pc, #12] @ (8012908 ) 80128fa: 5ccb ldrb r3, [r1, r3] 80128fc: fa22 f303 lsr.w r3, r2, r3 } 8012900: 4618 mov r0, r3 8012902: bd80 pop {r7, pc} 8012904: 40021000 .word 0x40021000 8012908: 08018f98 .word 0x08018f98 0801290c : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 801290c: b580 push {r7, lr} 801290e: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8012910: f7ff ffde bl 80128d0 8012914: 4602 mov r2, r0 8012916: 4b05 ldr r3, [pc, #20] @ (801292c ) 8012918: 685b ldr r3, [r3, #4] 801291a: 0adb lsrs r3, r3, #11 801291c: f003 0307 and.w r3, r3, #7 8012920: 4903 ldr r1, [pc, #12] @ (8012930 ) 8012922: 5ccb ldrb r3, [r1, r3] 8012924: fa22 f303 lsr.w r3, r2, r3 } 8012928: 4618 mov r0, r3 801292a: bd80 pop {r7, pc} 801292c: 40021000 .word 0x40021000 8012930: 08018f98 .word 0x08018f98 08012934 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 8012934: b480 push {r7} 8012936: b085 sub sp, #20 8012938: af00 add r7, sp, #0 801293a: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 801293c: 4b0a ldr r3, [pc, #40] @ (8012968 ) 801293e: 681b ldr r3, [r3, #0] 8012940: 4a0a ldr r2, [pc, #40] @ (801296c ) 8012942: fba2 2303 umull r2, r3, r2, r3 8012946: 0a5b lsrs r3, r3, #9 8012948: 687a ldr r2, [r7, #4] 801294a: fb02 f303 mul.w r3, r2, r3 801294e: 60fb str r3, [r7, #12] do { __NOP(); 8012950: bf00 nop } while (Delay --); 8012952: 68fb ldr r3, [r7, #12] 8012954: 1e5a subs r2, r3, #1 8012956: 60fa str r2, [r7, #12] 8012958: 2b00 cmp r3, #0 801295a: d1f9 bne.n 8012950 } 801295c: bf00 nop 801295e: bf00 nop 8012960: 3714 adds r7, #20 8012962: 46bd mov sp, r7 8012964: bc80 pop {r7} 8012966: 4770 bx lr 8012968: 20000084 .word 0x20000084 801296c: 10624dd3 .word 0x10624dd3 08012970 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 8012970: b580 push {r7, lr} 8012972: b088 sub sp, #32 8012974: af00 add r7, sp, #0 8012976: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 8012978: 2300 movs r3, #0 801297a: 617b str r3, [r7, #20] 801297c: 2300 movs r3, #0 801297e: 613b str r3, [r7, #16] #if defined(STM32F105xC) || defined(STM32F107xC) uint32_t pllactive = 0U; 8012980: 2300 movs r3, #0 8012982: 61fb str r3, [r7, #28] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8012984: 687b ldr r3, [r7, #4] 8012986: 681b ldr r3, [r3, #0] 8012988: f003 0301 and.w r3, r3, #1 801298c: 2b00 cmp r3, #0 801298e: d07d beq.n 8012a8c { FlagStatus pwrclkchanged = RESET; 8012990: 2300 movs r3, #0 8012992: 76fb strb r3, [r7, #27] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8012994: 4b8b ldr r3, [pc, #556] @ (8012bc4 ) 8012996: 69db ldr r3, [r3, #28] 8012998: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 801299c: 2b00 cmp r3, #0 801299e: d10d bne.n 80129bc { __HAL_RCC_PWR_CLK_ENABLE(); 80129a0: 4b88 ldr r3, [pc, #544] @ (8012bc4 ) 80129a2: 69db ldr r3, [r3, #28] 80129a4: 4a87 ldr r2, [pc, #540] @ (8012bc4 ) 80129a6: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80129aa: 61d3 str r3, [r2, #28] 80129ac: 4b85 ldr r3, [pc, #532] @ (8012bc4 ) 80129ae: 69db ldr r3, [r3, #28] 80129b0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80129b4: 60fb str r3, [r7, #12] 80129b6: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; 80129b8: 2301 movs r3, #1 80129ba: 76fb strb r3, [r7, #27] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80129bc: 4b82 ldr r3, [pc, #520] @ (8012bc8 ) 80129be: 681b ldr r3, [r3, #0] 80129c0: f403 7380 and.w r3, r3, #256 @ 0x100 80129c4: 2b00 cmp r3, #0 80129c6: d118 bne.n 80129fa { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80129c8: 4b7f ldr r3, [pc, #508] @ (8012bc8 ) 80129ca: 681b ldr r3, [r3, #0] 80129cc: 4a7e ldr r2, [pc, #504] @ (8012bc8 ) 80129ce: f443 7380 orr.w r3, r3, #256 @ 0x100 80129d2: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80129d4: f7fc fe34 bl 800f640 80129d8: 6178 str r0, [r7, #20] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80129da: e008 b.n 80129ee { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80129dc: f7fc fe30 bl 800f640 80129e0: 4602 mov r2, r0 80129e2: 697b ldr r3, [r7, #20] 80129e4: 1ad3 subs r3, r2, r3 80129e6: 2b64 cmp r3, #100 @ 0x64 80129e8: d901 bls.n 80129ee { return HAL_TIMEOUT; 80129ea: 2303 movs r3, #3 80129ec: e0e5 b.n 8012bba while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80129ee: 4b76 ldr r3, [pc, #472] @ (8012bc8 ) 80129f0: 681b ldr r3, [r3, #0] 80129f2: f403 7380 and.w r3, r3, #256 @ 0x100 80129f6: 2b00 cmp r3, #0 80129f8: d0f0 beq.n 80129dc } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 80129fa: 4b72 ldr r3, [pc, #456] @ (8012bc4 ) 80129fc: 6a1b ldr r3, [r3, #32] 80129fe: f403 7340 and.w r3, r3, #768 @ 0x300 8012a02: 613b str r3, [r7, #16] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8012a04: 693b ldr r3, [r7, #16] 8012a06: 2b00 cmp r3, #0 8012a08: d02e beq.n 8012a68 8012a0a: 687b ldr r3, [r7, #4] 8012a0c: 685b ldr r3, [r3, #4] 8012a0e: f403 7340 and.w r3, r3, #768 @ 0x300 8012a12: 693a ldr r2, [r7, #16] 8012a14: 429a cmp r2, r3 8012a16: d027 beq.n 8012a68 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8012a18: 4b6a ldr r3, [pc, #424] @ (8012bc4 ) 8012a1a: 6a1b ldr r3, [r3, #32] 8012a1c: f423 7340 bic.w r3, r3, #768 @ 0x300 8012a20: 613b str r3, [r7, #16] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8012a22: 4b6a ldr r3, [pc, #424] @ (8012bcc ) 8012a24: 2201 movs r2, #1 8012a26: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8012a28: 4b68 ldr r3, [pc, #416] @ (8012bcc ) 8012a2a: 2200 movs r2, #0 8012a2c: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 8012a2e: 4a65 ldr r2, [pc, #404] @ (8012bc4 ) 8012a30: 693b ldr r3, [r7, #16] 8012a32: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 8012a34: 693b ldr r3, [r7, #16] 8012a36: f003 0301 and.w r3, r3, #1 8012a3a: 2b00 cmp r3, #0 8012a3c: d014 beq.n 8012a68 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8012a3e: f7fc fdff bl 800f640 8012a42: 6178 str r0, [r7, #20] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8012a44: e00a b.n 8012a5c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8012a46: f7fc fdfb bl 800f640 8012a4a: 4602 mov r2, r0 8012a4c: 697b ldr r3, [r7, #20] 8012a4e: 1ad3 subs r3, r2, r3 8012a50: f241 3288 movw r2, #5000 @ 0x1388 8012a54: 4293 cmp r3, r2 8012a56: d901 bls.n 8012a5c { return HAL_TIMEOUT; 8012a58: 2303 movs r3, #3 8012a5a: e0ae b.n 8012bba while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8012a5c: 4b59 ldr r3, [pc, #356] @ (8012bc4 ) 8012a5e: 6a1b ldr r3, [r3, #32] 8012a60: f003 0302 and.w r3, r3, #2 8012a64: 2b00 cmp r3, #0 8012a66: d0ee beq.n 8012a46 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8012a68: 4b56 ldr r3, [pc, #344] @ (8012bc4 ) 8012a6a: 6a1b ldr r3, [r3, #32] 8012a6c: f423 7240 bic.w r2, r3, #768 @ 0x300 8012a70: 687b ldr r3, [r7, #4] 8012a72: 685b ldr r3, [r3, #4] 8012a74: 4953 ldr r1, [pc, #332] @ (8012bc4 ) 8012a76: 4313 orrs r3, r2 8012a78: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8012a7a: 7efb ldrb r3, [r7, #27] 8012a7c: 2b01 cmp r3, #1 8012a7e: d105 bne.n 8012a8c { __HAL_RCC_PWR_CLK_DISABLE(); 8012a80: 4b50 ldr r3, [pc, #320] @ (8012bc4 ) 8012a82: 69db ldr r3, [r3, #28] 8012a84: 4a4f ldr r2, [pc, #316] @ (8012bc4 ) 8012a86: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8012a8a: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8012a8c: 687b ldr r3, [r7, #4] 8012a8e: 681b ldr r3, [r3, #0] 8012a90: f003 0302 and.w r3, r3, #2 8012a94: 2b00 cmp r3, #0 8012a96: d008 beq.n 8012aaa { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8012a98: 4b4a ldr r3, [pc, #296] @ (8012bc4 ) 8012a9a: 685b ldr r3, [r3, #4] 8012a9c: f423 4240 bic.w r2, r3, #49152 @ 0xc000 8012aa0: 687b ldr r3, [r7, #4] 8012aa2: 689b ldr r3, [r3, #8] 8012aa4: 4947 ldr r1, [pc, #284] @ (8012bc4 ) 8012aa6: 4313 orrs r3, r2 8012aa8: 604b str r3, [r1, #4] } #if defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ I2S2 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S2) == RCC_PERIPHCLK_I2S2) 8012aaa: 687b ldr r3, [r7, #4] 8012aac: 681b ldr r3, [r3, #0] 8012aae: f003 0304 and.w r3, r3, #4 8012ab2: 2b00 cmp r3, #0 8012ab4: d008 beq.n 8012ac8 { /* Check the parameters */ assert_param(IS_RCC_I2S2CLKSOURCE(PeriphClkInit->I2s2ClockSelection)); /* Configure the I2S2 clock source */ __HAL_RCC_I2S2_CONFIG(PeriphClkInit->I2s2ClockSelection); 8012ab6: 4b43 ldr r3, [pc, #268] @ (8012bc4 ) 8012ab8: 6adb ldr r3, [r3, #44] @ 0x2c 8012aba: f423 3200 bic.w r2, r3, #131072 @ 0x20000 8012abe: 687b ldr r3, [r7, #4] 8012ac0: 68db ldr r3, [r3, #12] 8012ac2: 4940 ldr r1, [pc, #256] @ (8012bc4 ) 8012ac4: 4313 orrs r3, r2 8012ac6: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ I2S3 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S3) == RCC_PERIPHCLK_I2S3) 8012ac8: 687b ldr r3, [r7, #4] 8012aca: 681b ldr r3, [r3, #0] 8012acc: f003 0308 and.w r3, r3, #8 8012ad0: 2b00 cmp r3, #0 8012ad2: d008 beq.n 8012ae6 { /* Check the parameters */ assert_param(IS_RCC_I2S3CLKSOURCE(PeriphClkInit->I2s3ClockSelection)); /* Configure the I2S3 clock source */ __HAL_RCC_I2S3_CONFIG(PeriphClkInit->I2s3ClockSelection); 8012ad4: 4b3b ldr r3, [pc, #236] @ (8012bc4 ) 8012ad6: 6adb ldr r3, [r3, #44] @ 0x2c 8012ad8: f423 2280 bic.w r2, r3, #262144 @ 0x40000 8012adc: 687b ldr r3, [r7, #4] 8012ade: 691b ldr r3, [r3, #16] 8012ae0: 4938 ldr r1, [pc, #224] @ (8012bc4 ) 8012ae2: 4313 orrs r3, r2 8012ae4: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ PLL I2S Configuration ----------------------*/ /* Check that PLLI2S need to be enabled */ if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S2SRC) || HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S3SRC)) 8012ae6: 4b37 ldr r3, [pc, #220] @ (8012bc4 ) 8012ae8: 6adb ldr r3, [r3, #44] @ 0x2c 8012aea: f403 3300 and.w r3, r3, #131072 @ 0x20000 8012aee: 2b00 cmp r3, #0 8012af0: d105 bne.n 8012afe 8012af2: 4b34 ldr r3, [pc, #208] @ (8012bc4 ) 8012af4: 6adb ldr r3, [r3, #44] @ 0x2c 8012af6: f403 2380 and.w r3, r3, #262144 @ 0x40000 8012afa: 2b00 cmp r3, #0 8012afc: d001 beq.n 8012b02 { /* Update flag to indicate that PLL I2S should be active */ pllactive = 1; 8012afe: 2301 movs r3, #1 8012b00: 61fb str r3, [r7, #28] } /* Check if PLL I2S need to be enabled */ if (pllactive == 1) 8012b02: 69fb ldr r3, [r7, #28] 8012b04: 2b01 cmp r3, #1 8012b06: d148 bne.n 8012b9a { /* Enable PLL I2S only if not active */ if (HAL_IS_BIT_CLR(RCC->CR, RCC_CR_PLL3ON)) 8012b08: 4b2e ldr r3, [pc, #184] @ (8012bc4 ) 8012b0a: 681b ldr r3, [r3, #0] 8012b0c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8012b10: 2b00 cmp r3, #0 8012b12: d138 bne.n 8012b86 assert_param(IS_RCC_PLLI2S_MUL(PeriphClkInit->PLLI2S.PLLI2SMUL)); assert_param(IS_RCC_HSE_PREDIV2(PeriphClkInit->PLLI2S.HSEPrediv2Value)); /* Prediv2 can be written only when the PLL2 is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 8012b14: 4b2b ldr r3, [pc, #172] @ (8012bc4 ) 8012b16: 681b ldr r3, [r3, #0] 8012b18: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8012b1c: 2b00 cmp r3, #0 8012b1e: d009 beq.n 8012b34 (__HAL_RCC_HSE_GET_PREDIV2() != PeriphClkInit->PLLI2S.HSEPrediv2Value)) 8012b20: 4b28 ldr r3, [pc, #160] @ (8012bc4 ) 8012b22: 6adb ldr r3, [r3, #44] @ 0x2c 8012b24: f003 02f0 and.w r2, r3, #240 @ 0xf0 8012b28: 687b ldr r3, [r7, #4] 8012b2a: 699b ldr r3, [r3, #24] if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 8012b2c: 429a cmp r2, r3 8012b2e: d001 beq.n 8012b34 { return HAL_ERROR; 8012b30: 2301 movs r3, #1 8012b32: e042 b.n 8012bba } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(PeriphClkInit->PLLI2S.HSEPrediv2Value); 8012b34: 4b23 ldr r3, [pc, #140] @ (8012bc4 ) 8012b36: 6adb ldr r3, [r3, #44] @ 0x2c 8012b38: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8012b3c: 687b ldr r3, [r7, #4] 8012b3e: 699b ldr r3, [r3, #24] 8012b40: 4920 ldr r1, [pc, #128] @ (8012bc4 ) 8012b42: 4313 orrs r3, r2 8012b44: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLLI2S multiplication factors. */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SMUL); 8012b46: 4b1f ldr r3, [pc, #124] @ (8012bc4 ) 8012b48: 6adb ldr r3, [r3, #44] @ 0x2c 8012b4a: f423 4270 bic.w r2, r3, #61440 @ 0xf000 8012b4e: 687b ldr r3, [r7, #4] 8012b50: 695b ldr r3, [r3, #20] 8012b52: 491c ldr r1, [pc, #112] @ (8012bc4 ) 8012b54: 4313 orrs r3, r2 8012b56: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLLI2S. */ __HAL_RCC_PLLI2S_ENABLE(); 8012b58: 4b1d ldr r3, [pc, #116] @ (8012bd0 ) 8012b5a: 2201 movs r2, #1 8012b5c: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8012b5e: f7fc fd6f bl 800f640 8012b62: 6178 str r0, [r7, #20] /* Wait till PLLI2S is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 8012b64: e008 b.n 8012b78 { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 8012b66: f7fc fd6b bl 800f640 8012b6a: 4602 mov r2, r0 8012b6c: 697b ldr r3, [r7, #20] 8012b6e: 1ad3 subs r3, r2, r3 8012b70: 2b64 cmp r3, #100 @ 0x64 8012b72: d901 bls.n 8012b78 { return HAL_TIMEOUT; 8012b74: 2303 movs r3, #3 8012b76: e020 b.n 8012bba while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 8012b78: 4b12 ldr r3, [pc, #72] @ (8012bc4 ) 8012b7a: 681b ldr r3, [r3, #0] 8012b7c: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8012b80: 2b00 cmp r3, #0 8012b82: d0f0 beq.n 8012b66 8012b84: e009 b.n 8012b9a } } else { /* Return an error only if user wants to change the PLLI2SMUL whereas PLLI2S is active */ if (READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL3MUL) != PeriphClkInit->PLLI2S.PLLI2SMUL) 8012b86: 4b0f ldr r3, [pc, #60] @ (8012bc4 ) 8012b88: 6adb ldr r3, [r3, #44] @ 0x2c 8012b8a: f403 4270 and.w r2, r3, #61440 @ 0xf000 8012b8e: 687b ldr r3, [r7, #4] 8012b90: 695b ldr r3, [r3, #20] 8012b92: 429a cmp r2, r3 8012b94: d001 beq.n 8012b9a { return HAL_ERROR; 8012b96: 2301 movs r3, #1 8012b98: e00f b.n 8012bba #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 8012b9a: 687b ldr r3, [r7, #4] 8012b9c: 681b ldr r3, [r3, #0] 8012b9e: f003 0310 and.w r3, r3, #16 8012ba2: 2b00 cmp r3, #0 8012ba4: d008 beq.n 8012bb8 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8012ba6: 4b07 ldr r3, [pc, #28] @ (8012bc4 ) 8012ba8: 685b ldr r3, [r3, #4] 8012baa: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 8012bae: 687b ldr r3, [r7, #4] 8012bb0: 69db ldr r3, [r3, #28] 8012bb2: 4904 ldr r1, [pc, #16] @ (8012bc4 ) 8012bb4: 4313 orrs r3, r2 8012bb6: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8012bb8: 2300 movs r3, #0 } 8012bba: 4618 mov r0, r3 8012bbc: 3720 adds r7, #32 8012bbe: 46bd mov sp, r7 8012bc0: bd80 pop {r7, pc} 8012bc2: bf00 nop 8012bc4: 40021000 .word 0x40021000 8012bc8: 40007000 .word 0x40007000 8012bcc: 42420440 .word 0x42420440 8012bd0: 42420070 .word 0x42420070 08012bd4 : * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock @endif * @retval Frequency in Hz (0: means that no available frequency for the peripheral) */ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) { 8012bd4: b580 push {r7, lr} 8012bd6: b08a sub sp, #40 @ 0x28 8012bd8: af00 add r7, sp, #0 8012bda: 6078 str r0, [r7, #4] #if defined(STM32F105xC) || defined(STM32F107xC) static const uint8_t aPLLMULFactorTable[14U] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; static const uint8_t aPredivFactorTable[16U] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; 8012bdc: 2300 movs r3, #0 8012bde: 61fb str r3, [r7, #28] 8012be0: 2300 movs r3, #0 8012be2: 627b str r3, [r7, #36] @ 0x24 8012be4: 2300 movs r3, #0 8012be6: 61bb str r3, [r7, #24] uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U; 8012be8: 2300 movs r3, #0 8012bea: 617b str r3, [r7, #20] 8012bec: 2300 movs r3, #0 8012bee: 613b str r3, [r7, #16] 8012bf0: 2300 movs r3, #0 8012bf2: 60fb str r3, [r7, #12] static const uint8_t aPLLMULFactorTable[16U] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; static const uint8_t aPredivFactorTable[2U] = {1, 2}; uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG */ uint32_t temp_reg = 0U, frequency = 0U; 8012bf4: 2300 movs r3, #0 8012bf6: 60bb str r3, [r7, #8] 8012bf8: 2300 movs r3, #0 8012bfa: 623b str r3, [r7, #32] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); switch (PeriphClk) 8012bfc: 687b ldr r3, [r7, #4] 8012bfe: 3b01 subs r3, #1 8012c00: 2b0f cmp r3, #15 8012c02: f200 811d bhi.w 8012e40 8012c06: a201 add r2, pc, #4 @ (adr r2, 8012c0c ) 8012c08: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8012c0c: 08012dc1 .word 0x08012dc1 8012c10: 08012e25 .word 0x08012e25 8012c14: 08012e41 .word 0x08012e41 8012c18: 08012d1f .word 0x08012d1f 8012c1c: 08012e41 .word 0x08012e41 8012c20: 08012e41 .word 0x08012e41 8012c24: 08012e41 .word 0x08012e41 8012c28: 08012d71 .word 0x08012d71 8012c2c: 08012e41 .word 0x08012e41 8012c30: 08012e41 .word 0x08012e41 8012c34: 08012e41 .word 0x08012e41 8012c38: 08012e41 .word 0x08012e41 8012c3c: 08012e41 .word 0x08012e41 8012c40: 08012e41 .word 0x08012e41 8012c44: 08012e41 .word 0x08012e41 8012c48: 08012c4d .word 0x08012c4d || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) case RCC_PERIPHCLK_USB: { /* Get RCC configuration ------------------------------------------------------*/ temp_reg = RCC->CFGR; 8012c4c: 4b83 ldr r3, [pc, #524] @ (8012e5c ) 8012c4e: 685b ldr r3, [r3, #4] 8012c50: 60bb str r3, [r7, #8] /* Check if PLL is enabled */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLON)) 8012c52: 4b82 ldr r3, [pc, #520] @ (8012e5c ) 8012c54: 681b ldr r3, [r3, #0] 8012c56: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 8012c5a: 2b00 cmp r3, #0 8012c5c: f000 80f2 beq.w 8012e44 { pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8012c60: 68bb ldr r3, [r7, #8] 8012c62: 0c9b lsrs r3, r3, #18 8012c64: f003 030f and.w r3, r3, #15 8012c68: 4a7d ldr r2, [pc, #500] @ (8012e60 ) 8012c6a: 5cd3 ldrb r3, [r2, r3] 8012c6c: 61bb str r3, [r7, #24] if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8012c6e: 68bb ldr r3, [r7, #8] 8012c70: f403 3380 and.w r3, r3, #65536 @ 0x10000 8012c74: 2b00 cmp r3, #0 8012c76: d03b beq.n 8012cf0 { #if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\ || defined(STM32F100xE) prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 8012c78: 4b78 ldr r3, [pc, #480] @ (8012e5c ) 8012c7a: 6adb ldr r3, [r3, #44] @ 0x2c 8012c7c: f003 030f and.w r3, r3, #15 8012c80: 4a78 ldr r2, [pc, #480] @ (8012e64 ) 8012c82: 5cd3 ldrb r3, [r2, r3] 8012c84: 61fb str r3, [r7, #28] #else prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ #if defined(STM32F105xC) || defined(STM32F107xC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 8012c86: 4b75 ldr r3, [pc, #468] @ (8012e5c ) 8012c88: 6adb ldr r3, [r3, #44] @ 0x2c 8012c8a: f403 3380 and.w r3, r3, #65536 @ 0x10000 8012c8e: 2b00 cmp r3, #0 8012c90: d01c beq.n 8012ccc { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 8012c92: 4b72 ldr r3, [pc, #456] @ (8012e5c ) 8012c94: 6adb ldr r3, [r3, #44] @ 0x2c 8012c96: 091b lsrs r3, r3, #4 8012c98: f003 030f and.w r3, r3, #15 8012c9c: 3301 adds r3, #1 8012c9e: 60fb str r3, [r7, #12] pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 8012ca0: 4b6e ldr r3, [pc, #440] @ (8012e5c ) 8012ca2: 6adb ldr r3, [r3, #44] @ 0x2c 8012ca4: 0a1b lsrs r3, r3, #8 8012ca6: f003 030f and.w r3, r3, #15 8012caa: 3302 adds r3, #2 8012cac: 617b str r3, [r7, #20] pllclk = (uint32_t)((((HSE_VALUE / prediv2) * pll2mul) / prediv1) * pllmul); 8012cae: 4a6e ldr r2, [pc, #440] @ (8012e68 ) 8012cb0: 68fb ldr r3, [r7, #12] 8012cb2: fbb2 f3f3 udiv r3, r2, r3 8012cb6: 697a ldr r2, [r7, #20] 8012cb8: fb03 f202 mul.w r2, r3, r2 8012cbc: 69fb ldr r3, [r7, #28] 8012cbe: fbb2 f2f3 udiv r2, r2, r3 8012cc2: 69bb ldr r3, [r7, #24] 8012cc4: fb02 f303 mul.w r3, r2, r3 8012cc8: 627b str r3, [r7, #36] @ 0x24 8012cca: e007 b.n 8012cdc } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 8012ccc: 4a66 ldr r2, [pc, #408] @ (8012e68 ) 8012cce: 69fb ldr r3, [r7, #28] 8012cd0: fbb2 f2f3 udiv r2, r2, r3 8012cd4: 69bb ldr r3, [r7, #24] 8012cd6: fb02 f303 mul.w r3, r2, r3 8012cda: 627b str r3, [r7, #36] @ 0x24 } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 8012cdc: 4b60 ldr r3, [pc, #384] @ (8012e60 ) 8012cde: 7b5b ldrb r3, [r3, #13] 8012ce0: 461a mov r2, r3 8012ce2: 69bb ldr r3, [r7, #24] 8012ce4: 4293 cmp r3, r2 8012ce6: d108 bne.n 8012cfa { pllclk = pllclk / 2; 8012ce8: 6a7b ldr r3, [r7, #36] @ 0x24 8012cea: 085b lsrs r3, r3, #1 8012cec: 627b str r3, [r7, #36] @ 0x24 8012cee: e004 b.n 8012cfa #endif /* STM32F105xC || STM32F107xC */ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8012cf0: 69bb ldr r3, [r7, #24] 8012cf2: 4a5e ldr r2, [pc, #376] @ (8012e6c ) 8012cf4: fb02 f303 mul.w r3, r2, r3 8012cf8: 627b str r3, [r7, #36] @ 0x24 } /* Calcul of the USB frequency*/ #if defined(STM32F105xC) || defined(STM32F107xC) /* USBCLK = PLLVCO = (2 x PLLCLK) / USB prescaler */ if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL_DIV2) 8012cfa: 4b58 ldr r3, [pc, #352] @ (8012e5c ) 8012cfc: 685b ldr r3, [r3, #4] 8012cfe: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8012d02: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8012d06: d102 bne.n 8012d0e { /* Prescaler of 2 selected for USB */ frequency = pllclk; 8012d08: 6a7b ldr r3, [r7, #36] @ 0x24 8012d0a: 623b str r3, [r7, #32] /* Prescaler of 1.5 selected for USB */ frequency = (pllclk * 2) / 3; } #endif } break; 8012d0c: e09a b.n 8012e44 frequency = (2 * pllclk) / 3; 8012d0e: 6a7b ldr r3, [r7, #36] @ 0x24 8012d10: 005b lsls r3, r3, #1 8012d12: 4a57 ldr r2, [pc, #348] @ (8012e70 ) 8012d14: fba2 2303 umull r2, r3, r2, r3 8012d18: 085b lsrs r3, r3, #1 8012d1a: 623b str r3, [r7, #32] break; 8012d1c: e092 b.n 8012e44 { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S2_SOURCE() == RCC_I2S2CLKSOURCE_SYSCLK) 8012d1e: 4b4f ldr r3, [pc, #316] @ (8012e5c ) 8012d20: 6adb ldr r3, [r3, #44] @ 0x2c 8012d22: f403 3300 and.w r3, r3, #131072 @ 0x20000 8012d26: 2b00 cmp r3, #0 8012d28: d103 bne.n 8012d32 { /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); 8012d2a: f7ff fd15 bl 8012758 8012d2e: 6238 str r0, [r7, #32] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 8012d30: e08a b.n 8012e48 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 8012d32: 4b4a ldr r3, [pc, #296] @ (8012e5c ) 8012d34: 681b ldr r3, [r3, #0] 8012d36: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8012d3a: 2b00 cmp r3, #0 8012d3c: f000 8084 beq.w 8012e48 prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 8012d40: 4b46 ldr r3, [pc, #280] @ (8012e5c ) 8012d42: 6adb ldr r3, [r3, #44] @ 0x2c 8012d44: 091b lsrs r3, r3, #4 8012d46: f003 030f and.w r3, r3, #15 8012d4a: 3301 adds r3, #1 8012d4c: 60fb str r3, [r7, #12] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 8012d4e: 4b43 ldr r3, [pc, #268] @ (8012e5c ) 8012d50: 6adb ldr r3, [r3, #44] @ 0x2c 8012d52: 0b1b lsrs r3, r3, #12 8012d54: f003 030f and.w r3, r3, #15 8012d58: 3302 adds r3, #2 8012d5a: 613b str r3, [r7, #16] frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 8012d5c: 4a42 ldr r2, [pc, #264] @ (8012e68 ) 8012d5e: 68fb ldr r3, [r7, #12] 8012d60: fbb2 f3f3 udiv r3, r2, r3 8012d64: 693a ldr r2, [r7, #16] 8012d66: fb02 f303 mul.w r3, r2, r3 8012d6a: 005b lsls r3, r3, #1 8012d6c: 623b str r3, [r7, #32] break; 8012d6e: e06b b.n 8012e48 { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S3_SOURCE() == RCC_I2S3CLKSOURCE_SYSCLK) 8012d70: 4b3a ldr r3, [pc, #232] @ (8012e5c ) 8012d72: 6adb ldr r3, [r3, #44] @ 0x2c 8012d74: f403 2380 and.w r3, r3, #262144 @ 0x40000 8012d78: 2b00 cmp r3, #0 8012d7a: d103 bne.n 8012d84 { /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); 8012d7c: f7ff fcec bl 8012758 8012d80: 6238 str r0, [r7, #32] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 8012d82: e063 b.n 8012e4c if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 8012d84: 4b35 ldr r3, [pc, #212] @ (8012e5c ) 8012d86: 681b ldr r3, [r3, #0] 8012d88: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8012d8c: 2b00 cmp r3, #0 8012d8e: d05d beq.n 8012e4c prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 8012d90: 4b32 ldr r3, [pc, #200] @ (8012e5c ) 8012d92: 6adb ldr r3, [r3, #44] @ 0x2c 8012d94: 091b lsrs r3, r3, #4 8012d96: f003 030f and.w r3, r3, #15 8012d9a: 3301 adds r3, #1 8012d9c: 60fb str r3, [r7, #12] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 8012d9e: 4b2f ldr r3, [pc, #188] @ (8012e5c ) 8012da0: 6adb ldr r3, [r3, #44] @ 0x2c 8012da2: 0b1b lsrs r3, r3, #12 8012da4: f003 030f and.w r3, r3, #15 8012da8: 3302 adds r3, #2 8012daa: 613b str r3, [r7, #16] frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 8012dac: 4a2e ldr r2, [pc, #184] @ (8012e68 ) 8012dae: 68fb ldr r3, [r7, #12] 8012db0: fbb2 f3f3 udiv r3, r2, r3 8012db4: 693a ldr r2, [r7, #16] 8012db6: fb02 f303 mul.w r3, r2, r3 8012dba: 005b lsls r3, r3, #1 8012dbc: 623b str r3, [r7, #32] break; 8012dbe: e045 b.n 8012e4c } #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ case RCC_PERIPHCLK_RTC: { /* Get RCC BDCR configuration ------------------------------------------------------*/ temp_reg = RCC->BDCR; 8012dc0: 4b26 ldr r3, [pc, #152] @ (8012e5c ) 8012dc2: 6a1b ldr r3, [r3, #32] 8012dc4: 60bb str r3, [r7, #8] /* Check if LSE is ready if RTC clock selection is LSE */ if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) 8012dc6: 68bb ldr r3, [r7, #8] 8012dc8: f403 7340 and.w r3, r3, #768 @ 0x300 8012dcc: f5b3 7f80 cmp.w r3, #256 @ 0x100 8012dd0: d108 bne.n 8012de4 8012dd2: 68bb ldr r3, [r7, #8] 8012dd4: f003 0302 and.w r3, r3, #2 8012dd8: 2b00 cmp r3, #0 8012dda: d003 beq.n 8012de4 { frequency = LSE_VALUE; 8012ddc: f44f 4300 mov.w r3, #32768 @ 0x8000 8012de0: 623b str r3, [r7, #32] 8012de2: e01e b.n 8012e22 } /* Check if LSI is ready if RTC clock selection is LSI */ else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) 8012de4: 68bb ldr r3, [r7, #8] 8012de6: f403 7340 and.w r3, r3, #768 @ 0x300 8012dea: f5b3 7f00 cmp.w r3, #512 @ 0x200 8012dee: d109 bne.n 8012e04 8012df0: 4b1a ldr r3, [pc, #104] @ (8012e5c ) 8012df2: 6a5b ldr r3, [r3, #36] @ 0x24 8012df4: f003 0302 and.w r3, r3, #2 8012df8: 2b00 cmp r3, #0 8012dfa: d003 beq.n 8012e04 { frequency = LSI_VALUE; 8012dfc: f649 4340 movw r3, #40000 @ 0x9c40 8012e00: 623b str r3, [r7, #32] 8012e02: e00e b.n 8012e22 } else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) 8012e04: 68bb ldr r3, [r7, #8] 8012e06: f403 7340 and.w r3, r3, #768 @ 0x300 8012e0a: f5b3 7f40 cmp.w r3, #768 @ 0x300 8012e0e: d11f bne.n 8012e50 8012e10: 4b12 ldr r3, [pc, #72] @ (8012e5c ) 8012e12: 681b ldr r3, [r3, #0] 8012e14: f403 3300 and.w r3, r3, #131072 @ 0x20000 8012e18: 2b00 cmp r3, #0 8012e1a: d019 beq.n 8012e50 { frequency = HSE_VALUE / 128U; 8012e1c: 4b15 ldr r3, [pc, #84] @ (8012e74 ) 8012e1e: 623b str r3, [r7, #32] /* Clock not enabled for RTC*/ else { /* nothing to do: frequency already initialized to 0U */ } break; 8012e20: e016 b.n 8012e50 8012e22: e015 b.n 8012e50 } case RCC_PERIPHCLK_ADC: { frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); 8012e24: f7ff fd72 bl 801290c 8012e28: 4602 mov r2, r0 8012e2a: 4b0c ldr r3, [pc, #48] @ (8012e5c ) 8012e2c: 685b ldr r3, [r3, #4] 8012e2e: 0b9b lsrs r3, r3, #14 8012e30: f003 0303 and.w r3, r3, #3 8012e34: 3301 adds r3, #1 8012e36: 005b lsls r3, r3, #1 8012e38: fbb2 f3f3 udiv r3, r2, r3 8012e3c: 623b str r3, [r7, #32] break; 8012e3e: e008 b.n 8012e52 } default: { break; 8012e40: bf00 nop 8012e42: e006 b.n 8012e52 break; 8012e44: bf00 nop 8012e46: e004 b.n 8012e52 break; 8012e48: bf00 nop 8012e4a: e002 b.n 8012e52 break; 8012e4c: bf00 nop 8012e4e: e000 b.n 8012e52 break; 8012e50: bf00 nop } } return (frequency); 8012e52: 6a3b ldr r3, [r7, #32] } 8012e54: 4618 mov r0, r3 8012e56: 3728 adds r7, #40 @ 0x28 8012e58: 46bd mov sp, r7 8012e5a: bd80 pop {r7, pc} 8012e5c: 40021000 .word 0x40021000 8012e60: 08018fc0 .word 0x08018fc0 8012e64: 08018fd0 .word 0x08018fd0 8012e68: 017d7840 .word 0x017d7840 8012e6c: 003d0900 .word 0x003d0900 8012e70: aaaaaaab .word 0xaaaaaaab 8012e74: 0002faf0 .word 0x0002faf0 08012e78 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { 8012e78: b580 push {r7, lr} 8012e7a: b084 sub sp, #16 8012e7c: af00 add r7, sp, #0 8012e7e: 6078 str r0, [r7, #4] uint32_t prescaler = 0U; 8012e80: 2300 movs r3, #0 8012e82: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 8012e84: 687b ldr r3, [r7, #4] 8012e86: 2b00 cmp r3, #0 8012e88: d101 bne.n 8012e8e { return HAL_ERROR; 8012e8a: 2301 movs r3, #1 8012e8c: e07a b.n 8012f84 { hrtc->MspDeInitCallback = HAL_RTC_MspDeInit; } } #else if (hrtc->State == HAL_RTC_STATE_RESET) 8012e8e: 687b ldr r3, [r7, #4] 8012e90: 7c5b ldrb r3, [r3, #17] 8012e92: b2db uxtb r3, r3 8012e94: 2b00 cmp r3, #0 8012e96: d105 bne.n 8012ea4 { /* Allocate lock resource and initialize it */ hrtc->Lock = HAL_UNLOCKED; 8012e98: 687b ldr r3, [r7, #4] 8012e9a: 2200 movs r2, #0 8012e9c: 741a strb r2, [r3, #16] /* Initialize RTC MSP */ HAL_RTC_MspInit(hrtc); 8012e9e: 6878 ldr r0, [r7, #4] 8012ea0: f7f9 ffa0 bl 800cde4 } #endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */ /* Set RTC state */ hrtc->State = HAL_RTC_STATE_BUSY; 8012ea4: 687b ldr r3, [r7, #4] 8012ea6: 2202 movs r2, #2 8012ea8: 745a strb r2, [r3, #17] /* Waiting for synchro */ if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) 8012eaa: 6878 ldr r0, [r7, #4] 8012eac: f000 f870 bl 8012f90 8012eb0: 4603 mov r3, r0 8012eb2: 2b00 cmp r3, #0 8012eb4: d004 beq.n 8012ec0 { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 8012eb6: 687b ldr r3, [r7, #4] 8012eb8: 2204 movs r2, #4 8012eba: 745a strb r2, [r3, #17] return HAL_ERROR; 8012ebc: 2301 movs r3, #1 8012ebe: e061 b.n 8012f84 } /* Set Initialization mode */ if (RTC_EnterInitMode(hrtc) != HAL_OK) 8012ec0: 6878 ldr r0, [r7, #4] 8012ec2: f000 f892 bl 8012fea 8012ec6: 4603 mov r3, r0 8012ec8: 2b00 cmp r3, #0 8012eca: d004 beq.n 8012ed6 { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 8012ecc: 687b ldr r3, [r7, #4] 8012ece: 2204 movs r2, #4 8012ed0: 745a strb r2, [r3, #17] return HAL_ERROR; 8012ed2: 2301 movs r3, #1 8012ed4: e056 b.n 8012f84 } else { /* Clear Flags Bits */ CLEAR_BIT(hrtc->Instance->CRL, (RTC_FLAG_OW | RTC_FLAG_ALRAF | RTC_FLAG_SEC)); 8012ed6: 687b ldr r3, [r7, #4] 8012ed8: 681b ldr r3, [r3, #0] 8012eda: 685a ldr r2, [r3, #4] 8012edc: 687b ldr r3, [r7, #4] 8012ede: 681b ldr r3, [r3, #0] 8012ee0: f022 0207 bic.w r2, r2, #7 8012ee4: 605a str r2, [r3, #4] if (hrtc->Init.OutPut != RTC_OUTPUTSOURCE_NONE) 8012ee6: 687b ldr r3, [r7, #4] 8012ee8: 689b ldr r3, [r3, #8] 8012eea: 2b00 cmp r3, #0 8012eec: d005 beq.n 8012efa { /* Disable the selected Tamper pin */ CLEAR_BIT(BKP->CR, BKP_CR_TPE); 8012eee: 4b27 ldr r3, [pc, #156] @ (8012f8c ) 8012ef0: 6b1b ldr r3, [r3, #48] @ 0x30 8012ef2: 4a26 ldr r2, [pc, #152] @ (8012f8c ) 8012ef4: f023 0301 bic.w r3, r3, #1 8012ef8: 6313 str r3, [r2, #48] @ 0x30 } /* Set the signal which will be routed to RTC Tamper pin*/ MODIFY_REG(BKP->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), hrtc->Init.OutPut); 8012efa: 4b24 ldr r3, [pc, #144] @ (8012f8c ) 8012efc: 6adb ldr r3, [r3, #44] @ 0x2c 8012efe: f423 7260 bic.w r2, r3, #896 @ 0x380 8012f02: 687b ldr r3, [r7, #4] 8012f04: 689b ldr r3, [r3, #8] 8012f06: 4921 ldr r1, [pc, #132] @ (8012f8c ) 8012f08: 4313 orrs r3, r2 8012f0a: 62cb str r3, [r1, #44] @ 0x2c if (hrtc->Init.AsynchPrediv != RTC_AUTO_1_SECOND) 8012f0c: 687b ldr r3, [r7, #4] 8012f0e: 685b ldr r3, [r3, #4] 8012f10: f1b3 3fff cmp.w r3, #4294967295 8012f14: d003 beq.n 8012f1e { /* RTC Prescaler provided directly by end-user*/ prescaler = hrtc->Init.AsynchPrediv; 8012f16: 687b ldr r3, [r7, #4] 8012f18: 685b ldr r3, [r3, #4] 8012f1a: 60fb str r3, [r7, #12] 8012f1c: e00e b.n 8012f3c } else { /* RTC Prescaler will be automatically calculated to get 1 second timebase */ /* Get the RTCCLK frequency */ prescaler = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_RTC); 8012f1e: 2001 movs r0, #1 8012f20: f7ff fe58 bl 8012bd4 8012f24: 60f8 str r0, [r7, #12] /* Check that RTC clock is enabled*/ if (prescaler == 0U) 8012f26: 68fb ldr r3, [r7, #12] 8012f28: 2b00 cmp r3, #0 8012f2a: d104 bne.n 8012f36 { /* Should not happen. Frequency is not available*/ hrtc->State = HAL_RTC_STATE_ERROR; 8012f2c: 687b ldr r3, [r7, #4] 8012f2e: 2204 movs r2, #4 8012f30: 745a strb r2, [r3, #17] return HAL_ERROR; 8012f32: 2301 movs r3, #1 8012f34: e026 b.n 8012f84 } else { /* RTC period = RTCCLK/(RTC_PR + 1) */ prescaler = prescaler - 1U; 8012f36: 68fb ldr r3, [r7, #12] 8012f38: 3b01 subs r3, #1 8012f3a: 60fb str r3, [r7, #12] } } /* Configure the RTC_PRLH / RTC_PRLL */ WRITE_REG(hrtc->Instance->PRLH, ((prescaler >> 16U) & RTC_PRLH_PRL)); 8012f3c: 68fb ldr r3, [r7, #12] 8012f3e: 0c1a lsrs r2, r3, #16 8012f40: 687b ldr r3, [r7, #4] 8012f42: 681b ldr r3, [r3, #0] 8012f44: f002 020f and.w r2, r2, #15 8012f48: 609a str r2, [r3, #8] WRITE_REG(hrtc->Instance->PRLL, (prescaler & RTC_PRLL_PRL)); 8012f4a: 687b ldr r3, [r7, #4] 8012f4c: 681b ldr r3, [r3, #0] 8012f4e: 68fa ldr r2, [r7, #12] 8012f50: b292 uxth r2, r2 8012f52: 60da str r2, [r3, #12] /* Wait for synchro */ if (RTC_ExitInitMode(hrtc) != HAL_OK) 8012f54: 6878 ldr r0, [r7, #4] 8012f56: f000 f870 bl 801303a 8012f5a: 4603 mov r3, r0 8012f5c: 2b00 cmp r3, #0 8012f5e: d004 beq.n 8012f6a { hrtc->State = HAL_RTC_STATE_ERROR; 8012f60: 687b ldr r3, [r7, #4] 8012f62: 2204 movs r2, #4 8012f64: 745a strb r2, [r3, #17] return HAL_ERROR; 8012f66: 2301 movs r3, #1 8012f68: e00c b.n 8012f84 } /* Initialize date to 1st of January 2000 */ hrtc->DateToUpdate.Year = 0x00U; 8012f6a: 687b ldr r3, [r7, #4] 8012f6c: 2200 movs r2, #0 8012f6e: 73da strb r2, [r3, #15] hrtc->DateToUpdate.Month = RTC_MONTH_JANUARY; 8012f70: 687b ldr r3, [r7, #4] 8012f72: 2201 movs r2, #1 8012f74: 735a strb r2, [r3, #13] hrtc->DateToUpdate.Date = 0x01U; 8012f76: 687b ldr r3, [r7, #4] 8012f78: 2201 movs r2, #1 8012f7a: 739a strb r2, [r3, #14] /* Set RTC state */ hrtc->State = HAL_RTC_STATE_READY; 8012f7c: 687b ldr r3, [r7, #4] 8012f7e: 2201 movs r2, #1 8012f80: 745a strb r2, [r3, #17] return HAL_OK; 8012f82: 2300 movs r3, #0 } } 8012f84: 4618 mov r0, r3 8012f86: 3710 adds r7, #16 8012f88: 46bd mov sp, r7 8012f8a: bd80 pop {r7, pc} 8012f8c: 40006c00 .word 0x40006c00 08012f90 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc) { 8012f90: b580 push {r7, lr} 8012f92: b084 sub sp, #16 8012f94: af00 add r7, sp, #0 8012f96: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8012f98: 2300 movs r3, #0 8012f9a: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 8012f9c: 687b ldr r3, [r7, #4] 8012f9e: 2b00 cmp r3, #0 8012fa0: d101 bne.n 8012fa6 { return HAL_ERROR; 8012fa2: 2301 movs r3, #1 8012fa4: e01d b.n 8012fe2 } /* Clear RSF flag */ CLEAR_BIT(hrtc->Instance->CRL, RTC_FLAG_RSF); 8012fa6: 687b ldr r3, [r7, #4] 8012fa8: 681b ldr r3, [r3, #0] 8012faa: 685a ldr r2, [r3, #4] 8012fac: 687b ldr r3, [r7, #4] 8012fae: 681b ldr r3, [r3, #0] 8012fb0: f022 0208 bic.w r2, r2, #8 8012fb4: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8012fb6: f7fc fb43 bl 800f640 8012fba: 60f8 str r0, [r7, #12] /* Wait the registers to be synchronised */ while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 8012fbc: e009 b.n 8012fd2 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8012fbe: f7fc fb3f bl 800f640 8012fc2: 4602 mov r2, r0 8012fc4: 68fb ldr r3, [r7, #12] 8012fc6: 1ad3 subs r3, r2, r3 8012fc8: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8012fcc: d901 bls.n 8012fd2 { return HAL_TIMEOUT; 8012fce: 2303 movs r3, #3 8012fd0: e007 b.n 8012fe2 while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 8012fd2: 687b ldr r3, [r7, #4] 8012fd4: 681b ldr r3, [r3, #0] 8012fd6: 685b ldr r3, [r3, #4] 8012fd8: f003 0308 and.w r3, r3, #8 8012fdc: 2b00 cmp r3, #0 8012fde: d0ee beq.n 8012fbe } } return HAL_OK; 8012fe0: 2300 movs r3, #0 } 8012fe2: 4618 mov r0, r3 8012fe4: 3710 adds r7, #16 8012fe6: 46bd mov sp, r7 8012fe8: bd80 pop {r7, pc} 08012fea : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc) { 8012fea: b580 push {r7, lr} 8012fec: b084 sub sp, #16 8012fee: af00 add r7, sp, #0 8012ff0: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8012ff2: 2300 movs r3, #0 8012ff4: 60fb str r3, [r7, #12] tickstart = HAL_GetTick(); 8012ff6: f7fc fb23 bl 800f640 8012ffa: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8012ffc: e009 b.n 8013012 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8012ffe: f7fc fb1f bl 800f640 8013002: 4602 mov r2, r0 8013004: 68fb ldr r3, [r7, #12] 8013006: 1ad3 subs r3, r2, r3 8013008: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 801300c: d901 bls.n 8013012 { return HAL_TIMEOUT; 801300e: 2303 movs r3, #3 8013010: e00f b.n 8013032 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8013012: 687b ldr r3, [r7, #4] 8013014: 681b ldr r3, [r3, #0] 8013016: 685b ldr r3, [r3, #4] 8013018: f003 0320 and.w r3, r3, #32 801301c: 2b00 cmp r3, #0 801301e: d0ee beq.n 8012ffe } } /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); 8013020: 687b ldr r3, [r7, #4] 8013022: 681b ldr r3, [r3, #0] 8013024: 685a ldr r2, [r3, #4] 8013026: 687b ldr r3, [r7, #4] 8013028: 681b ldr r3, [r3, #0] 801302a: f042 0210 orr.w r2, r2, #16 801302e: 605a str r2, [r3, #4] return HAL_OK; 8013030: 2300 movs r3, #0 } 8013032: 4618 mov r0, r3 8013034: 3710 adds r7, #16 8013036: 46bd mov sp, r7 8013038: bd80 pop {r7, pc} 0801303a : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc) { 801303a: b580 push {r7, lr} 801303c: b084 sub sp, #16 801303e: af00 add r7, sp, #0 8013040: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8013042: 2300 movs r3, #0 8013044: 60fb str r3, [r7, #12] /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 8013046: 687b ldr r3, [r7, #4] 8013048: 681b ldr r3, [r3, #0] 801304a: 685a ldr r2, [r3, #4] 801304c: 687b ldr r3, [r7, #4] 801304e: 681b ldr r3, [r3, #0] 8013050: f022 0210 bic.w r2, r2, #16 8013054: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8013056: f7fc faf3 bl 800f640 801305a: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 801305c: e009 b.n 8013072 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 801305e: f7fc faef bl 800f640 8013062: 4602 mov r2, r0 8013064: 68fb ldr r3, [r7, #12] 8013066: 1ad3 subs r3, r2, r3 8013068: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 801306c: d901 bls.n 8013072 { return HAL_TIMEOUT; 801306e: 2303 movs r3, #3 8013070: e007 b.n 8013082 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8013072: 687b ldr r3, [r7, #4] 8013074: 681b ldr r3, [r3, #0] 8013076: 685b ldr r3, [r3, #4] 8013078: f003 0320 and.w r3, r3, #32 801307c: 2b00 cmp r3, #0 801307e: d0ee beq.n 801305e } } return HAL_OK; 8013080: 2300 movs r3, #0 } 8013082: 4618 mov r0, r3 8013084: 3710 adds r7, #16 8013086: 46bd mov sp, r7 8013088: bd80 pop {r7, pc} 0801308a : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 801308a: b580 push {r7, lr} 801308c: b082 sub sp, #8 801308e: af00 add r7, sp, #0 8013090: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8013092: 687b ldr r3, [r7, #4] 8013094: 2b00 cmp r3, #0 8013096: d101 bne.n 801309c { return HAL_ERROR; 8013098: 2301 movs r3, #1 801309a: e041 b.n 8013120 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 801309c: 687b ldr r3, [r7, #4] 801309e: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80130a2: b2db uxtb r3, r3 80130a4: 2b00 cmp r3, #0 80130a6: d106 bne.n 80130b6 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 80130a8: 687b ldr r3, [r7, #4] 80130aa: 2200 movs r2, #0 80130ac: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 80130b0: 6878 ldr r0, [r7, #4] 80130b2: f7fb ff01 bl 800eeb8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 80130b6: 687b ldr r3, [r7, #4] 80130b8: 2202 movs r2, #2 80130ba: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 80130be: 687b ldr r3, [r7, #4] 80130c0: 681a ldr r2, [r3, #0] 80130c2: 687b ldr r3, [r7, #4] 80130c4: 3304 adds r3, #4 80130c6: 4619 mov r1, r3 80130c8: 4610 mov r0, r2 80130ca: f000 fd33 bl 8013b34 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 80130ce: 687b ldr r3, [r7, #4] 80130d0: 2201 movs r2, #1 80130d2: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 80130d6: 687b ldr r3, [r7, #4] 80130d8: 2201 movs r2, #1 80130da: f883 203e strb.w r2, [r3, #62] @ 0x3e 80130de: 687b ldr r3, [r7, #4] 80130e0: 2201 movs r2, #1 80130e2: f883 203f strb.w r2, [r3, #63] @ 0x3f 80130e6: 687b ldr r3, [r7, #4] 80130e8: 2201 movs r2, #1 80130ea: f883 2040 strb.w r2, [r3, #64] @ 0x40 80130ee: 687b ldr r3, [r7, #4] 80130f0: 2201 movs r2, #1 80130f2: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 80130f6: 687b ldr r3, [r7, #4] 80130f8: 2201 movs r2, #1 80130fa: f883 2042 strb.w r2, [r3, #66] @ 0x42 80130fe: 687b ldr r3, [r7, #4] 8013100: 2201 movs r2, #1 8013102: f883 2043 strb.w r2, [r3, #67] @ 0x43 8013106: 687b ldr r3, [r7, #4] 8013108: 2201 movs r2, #1 801310a: f883 2044 strb.w r2, [r3, #68] @ 0x44 801310e: 687b ldr r3, [r7, #4] 8013110: 2201 movs r2, #1 8013112: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8013116: 687b ldr r3, [r7, #4] 8013118: 2201 movs r2, #1 801311a: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 801311e: 2300 movs r3, #0 } 8013120: 4618 mov r0, r3 8013122: 3708 adds r7, #8 8013124: 46bd mov sp, r7 8013126: bd80 pop {r7, pc} 08013128 : * Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init() * @param htim TIM Output Compare handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim) { 8013128: b580 push {r7, lr} 801312a: b082 sub sp, #8 801312c: af00 add r7, sp, #0 801312e: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8013130: 687b ldr r3, [r7, #4] 8013132: 2b00 cmp r3, #0 8013134: d101 bne.n 801313a { return HAL_ERROR; 8013136: 2301 movs r3, #1 8013138: e041 b.n 80131be assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 801313a: 687b ldr r3, [r7, #4] 801313c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8013140: b2db uxtb r3, r3 8013142: 2b00 cmp r3, #0 8013144: d106 bne.n 8013154 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8013146: 687b ldr r3, [r7, #4] 8013148: 2200 movs r2, #0 801314a: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->OC_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_OC_MspInit(htim); 801314e: 6878 ldr r0, [r7, #4] 8013150: f000 f839 bl 80131c6 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8013154: 687b ldr r3, [r7, #4] 8013156: 2202 movs r2, #2 8013158: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the Output Compare */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 801315c: 687b ldr r3, [r7, #4] 801315e: 681a ldr r2, [r3, #0] 8013160: 687b ldr r3, [r7, #4] 8013162: 3304 adds r3, #4 8013164: 4619 mov r1, r3 8013166: 4610 mov r0, r2 8013168: f000 fce4 bl 8013b34 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 801316c: 687b ldr r3, [r7, #4] 801316e: 2201 movs r2, #1 8013170: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8013174: 687b ldr r3, [r7, #4] 8013176: 2201 movs r2, #1 8013178: f883 203e strb.w r2, [r3, #62] @ 0x3e 801317c: 687b ldr r3, [r7, #4] 801317e: 2201 movs r2, #1 8013180: f883 203f strb.w r2, [r3, #63] @ 0x3f 8013184: 687b ldr r3, [r7, #4] 8013186: 2201 movs r2, #1 8013188: f883 2040 strb.w r2, [r3, #64] @ 0x40 801318c: 687b ldr r3, [r7, #4] 801318e: 2201 movs r2, #1 8013190: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8013194: 687b ldr r3, [r7, #4] 8013196: 2201 movs r2, #1 8013198: f883 2042 strb.w r2, [r3, #66] @ 0x42 801319c: 687b ldr r3, [r7, #4] 801319e: 2201 movs r2, #1 80131a0: f883 2043 strb.w r2, [r3, #67] @ 0x43 80131a4: 687b ldr r3, [r7, #4] 80131a6: 2201 movs r2, #1 80131a8: f883 2044 strb.w r2, [r3, #68] @ 0x44 80131ac: 687b ldr r3, [r7, #4] 80131ae: 2201 movs r2, #1 80131b0: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 80131b4: 687b ldr r3, [r7, #4] 80131b6: 2201 movs r2, #1 80131b8: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 80131bc: 2300 movs r3, #0 } 80131be: 4618 mov r0, r3 80131c0: 3708 adds r7, #8 80131c2: 46bd mov sp, r7 80131c4: bd80 pop {r7, pc} 080131c6 : * @brief Initializes the TIM Output Compare MSP. * @param htim TIM Output Compare handle * @retval None */ __weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim) { 80131c6: b480 push {r7} 80131c8: b083 sub sp, #12 80131ca: af00 add r7, sp, #0 80131cc: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_MspInit could be implemented in the user file */ } 80131ce: bf00 nop 80131d0: 370c adds r7, #12 80131d2: 46bd mov sp, r7 80131d4: bc80 pop {r7} 80131d6: 4770 bx lr 080131d8 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 80131d8: b580 push {r7, lr} 80131da: b084 sub sp, #16 80131dc: af00 add r7, sp, #0 80131de: 6078 str r0, [r7, #4] 80131e0: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 80131e2: 683b ldr r3, [r7, #0] 80131e4: 2b00 cmp r3, #0 80131e6: d109 bne.n 80131fc 80131e8: 687b ldr r3, [r7, #4] 80131ea: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80131ee: b2db uxtb r3, r3 80131f0: 2b01 cmp r3, #1 80131f2: bf14 ite ne 80131f4: 2301 movne r3, #1 80131f6: 2300 moveq r3, #0 80131f8: b2db uxtb r3, r3 80131fa: e022 b.n 8013242 80131fc: 683b ldr r3, [r7, #0] 80131fe: 2b04 cmp r3, #4 8013200: d109 bne.n 8013216 8013202: 687b ldr r3, [r7, #4] 8013204: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8013208: b2db uxtb r3, r3 801320a: 2b01 cmp r3, #1 801320c: bf14 ite ne 801320e: 2301 movne r3, #1 8013210: 2300 moveq r3, #0 8013212: b2db uxtb r3, r3 8013214: e015 b.n 8013242 8013216: 683b ldr r3, [r7, #0] 8013218: 2b08 cmp r3, #8 801321a: d109 bne.n 8013230 801321c: 687b ldr r3, [r7, #4] 801321e: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8013222: b2db uxtb r3, r3 8013224: 2b01 cmp r3, #1 8013226: bf14 ite ne 8013228: 2301 movne r3, #1 801322a: 2300 moveq r3, #0 801322c: b2db uxtb r3, r3 801322e: e008 b.n 8013242 8013230: 687b ldr r3, [r7, #4] 8013232: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8013236: b2db uxtb r3, r3 8013238: 2b01 cmp r3, #1 801323a: bf14 ite ne 801323c: 2301 movne r3, #1 801323e: 2300 moveq r3, #0 8013240: b2db uxtb r3, r3 8013242: 2b00 cmp r3, #0 8013244: d001 beq.n 801324a { return HAL_ERROR; 8013246: 2301 movs r3, #1 8013248: e063 b.n 8013312 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 801324a: 683b ldr r3, [r7, #0] 801324c: 2b00 cmp r3, #0 801324e: d104 bne.n 801325a 8013250: 687b ldr r3, [r7, #4] 8013252: 2202 movs r2, #2 8013254: f883 203e strb.w r2, [r3, #62] @ 0x3e 8013258: e013 b.n 8013282 801325a: 683b ldr r3, [r7, #0] 801325c: 2b04 cmp r3, #4 801325e: d104 bne.n 801326a 8013260: 687b ldr r3, [r7, #4] 8013262: 2202 movs r2, #2 8013264: f883 203f strb.w r2, [r3, #63] @ 0x3f 8013268: e00b b.n 8013282 801326a: 683b ldr r3, [r7, #0] 801326c: 2b08 cmp r3, #8 801326e: d104 bne.n 801327a 8013270: 687b ldr r3, [r7, #4] 8013272: 2202 movs r2, #2 8013274: f883 2040 strb.w r2, [r3, #64] @ 0x40 8013278: e003 b.n 8013282 801327a: 687b ldr r3, [r7, #4] 801327c: 2202 movs r2, #2 801327e: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Output compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8013282: 687b ldr r3, [r7, #4] 8013284: 681b ldr r3, [r3, #0] 8013286: 2201 movs r2, #1 8013288: 6839 ldr r1, [r7, #0] 801328a: 4618 mov r0, r3 801328c: f000 fee8 bl 8014060 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8013290: 687b ldr r3, [r7, #4] 8013292: 681b ldr r3, [r3, #0] 8013294: 4a21 ldr r2, [pc, #132] @ (801331c ) 8013296: 4293 cmp r3, r2 8013298: d107 bne.n 80132aa { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 801329a: 687b ldr r3, [r7, #4] 801329c: 681b ldr r3, [r3, #0] 801329e: 6c5a ldr r2, [r3, #68] @ 0x44 80132a0: 687b ldr r3, [r7, #4] 80132a2: 681b ldr r3, [r3, #0] 80132a4: f442 4200 orr.w r2, r2, #32768 @ 0x8000 80132a8: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 80132aa: 687b ldr r3, [r7, #4] 80132ac: 681b ldr r3, [r3, #0] 80132ae: 4a1b ldr r2, [pc, #108] @ (801331c ) 80132b0: 4293 cmp r3, r2 80132b2: d013 beq.n 80132dc 80132b4: 687b ldr r3, [r7, #4] 80132b6: 681b ldr r3, [r3, #0] 80132b8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80132bc: d00e beq.n 80132dc 80132be: 687b ldr r3, [r7, #4] 80132c0: 681b ldr r3, [r3, #0] 80132c2: 4a17 ldr r2, [pc, #92] @ (8013320 ) 80132c4: 4293 cmp r3, r2 80132c6: d009 beq.n 80132dc 80132c8: 687b ldr r3, [r7, #4] 80132ca: 681b ldr r3, [r3, #0] 80132cc: 4a15 ldr r2, [pc, #84] @ (8013324 ) 80132ce: 4293 cmp r3, r2 80132d0: d004 beq.n 80132dc 80132d2: 687b ldr r3, [r7, #4] 80132d4: 681b ldr r3, [r3, #0] 80132d6: 4a14 ldr r2, [pc, #80] @ (8013328 ) 80132d8: 4293 cmp r3, r2 80132da: d111 bne.n 8013300 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 80132dc: 687b ldr r3, [r7, #4] 80132de: 681b ldr r3, [r3, #0] 80132e0: 689b ldr r3, [r3, #8] 80132e2: f003 0307 and.w r3, r3, #7 80132e6: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80132e8: 68fb ldr r3, [r7, #12] 80132ea: 2b06 cmp r3, #6 80132ec: d010 beq.n 8013310 { __HAL_TIM_ENABLE(htim); 80132ee: 687b ldr r3, [r7, #4] 80132f0: 681b ldr r3, [r3, #0] 80132f2: 681a ldr r2, [r3, #0] 80132f4: 687b ldr r3, [r7, #4] 80132f6: 681b ldr r3, [r3, #0] 80132f8: f042 0201 orr.w r2, r2, #1 80132fc: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80132fe: e007 b.n 8013310 } } else { __HAL_TIM_ENABLE(htim); 8013300: 687b ldr r3, [r7, #4] 8013302: 681b ldr r3, [r3, #0] 8013304: 681a ldr r2, [r3, #0] 8013306: 687b ldr r3, [r7, #4] 8013308: 681b ldr r3, [r3, #0] 801330a: f042 0201 orr.w r2, r2, #1 801330e: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 8013310: 2300 movs r3, #0 } 8013312: 4618 mov r0, r3 8013314: 3710 adds r7, #16 8013316: 46bd mov sp, r7 8013318: bd80 pop {r7, pc} 801331a: bf00 nop 801331c: 40012c00 .word 0x40012c00 8013320: 40000400 .word 0x40000400 8013324: 40000800 .word 0x40000800 8013328: 40000c00 .word 0x40000c00 0801332c : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 801332c: b580 push {r7, lr} 801332e: b082 sub sp, #8 8013330: af00 add r7, sp, #0 8013332: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8013334: 687b ldr r3, [r7, #4] 8013336: 2b00 cmp r3, #0 8013338: d101 bne.n 801333e { return HAL_ERROR; 801333a: 2301 movs r3, #1 801333c: e041 b.n 80133c2 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 801333e: 687b ldr r3, [r7, #4] 8013340: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8013344: b2db uxtb r3, r3 8013346: 2b00 cmp r3, #0 8013348: d106 bne.n 8013358 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 801334a: 687b ldr r3, [r7, #4] 801334c: 2200 movs r2, #0 801334e: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8013352: 6878 ldr r0, [r7, #4] 8013354: f000 f839 bl 80133ca #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8013358: 687b ldr r3, [r7, #4] 801335a: 2202 movs r2, #2 801335c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8013360: 687b ldr r3, [r7, #4] 8013362: 681a ldr r2, [r3, #0] 8013364: 687b ldr r3, [r7, #4] 8013366: 3304 adds r3, #4 8013368: 4619 mov r1, r3 801336a: 4610 mov r0, r2 801336c: f000 fbe2 bl 8013b34 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8013370: 687b ldr r3, [r7, #4] 8013372: 2201 movs r2, #1 8013374: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8013378: 687b ldr r3, [r7, #4] 801337a: 2201 movs r2, #1 801337c: f883 203e strb.w r2, [r3, #62] @ 0x3e 8013380: 687b ldr r3, [r7, #4] 8013382: 2201 movs r2, #1 8013384: f883 203f strb.w r2, [r3, #63] @ 0x3f 8013388: 687b ldr r3, [r7, #4] 801338a: 2201 movs r2, #1 801338c: f883 2040 strb.w r2, [r3, #64] @ 0x40 8013390: 687b ldr r3, [r7, #4] 8013392: 2201 movs r2, #1 8013394: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8013398: 687b ldr r3, [r7, #4] 801339a: 2201 movs r2, #1 801339c: f883 2042 strb.w r2, [r3, #66] @ 0x42 80133a0: 687b ldr r3, [r7, #4] 80133a2: 2201 movs r2, #1 80133a4: f883 2043 strb.w r2, [r3, #67] @ 0x43 80133a8: 687b ldr r3, [r7, #4] 80133aa: 2201 movs r2, #1 80133ac: f883 2044 strb.w r2, [r3, #68] @ 0x44 80133b0: 687b ldr r3, [r7, #4] 80133b2: 2201 movs r2, #1 80133b4: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 80133b8: 687b ldr r3, [r7, #4] 80133ba: 2201 movs r2, #1 80133bc: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 80133c0: 2300 movs r3, #0 } 80133c2: 4618 mov r0, r3 80133c4: 3708 adds r7, #8 80133c6: 46bd mov sp, r7 80133c8: bd80 pop {r7, pc} 080133ca : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 80133ca: b480 push {r7} 80133cc: b083 sub sp, #12 80133ce: af00 add r7, sp, #0 80133d0: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 80133d2: bf00 nop 80133d4: 370c adds r7, #12 80133d6: 46bd mov sp, r7 80133d8: bc80 pop {r7} 80133da: 4770 bx lr 080133dc : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 80133dc: b580 push {r7, lr} 80133de: b084 sub sp, #16 80133e0: af00 add r7, sp, #0 80133e2: 6078 str r0, [r7, #4] 80133e4: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 80133e6: 683b ldr r3, [r7, #0] 80133e8: 2b00 cmp r3, #0 80133ea: d109 bne.n 8013400 80133ec: 687b ldr r3, [r7, #4] 80133ee: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80133f2: b2db uxtb r3, r3 80133f4: 2b01 cmp r3, #1 80133f6: bf14 ite ne 80133f8: 2301 movne r3, #1 80133fa: 2300 moveq r3, #0 80133fc: b2db uxtb r3, r3 80133fe: e022 b.n 8013446 8013400: 683b ldr r3, [r7, #0] 8013402: 2b04 cmp r3, #4 8013404: d109 bne.n 801341a 8013406: 687b ldr r3, [r7, #4] 8013408: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 801340c: b2db uxtb r3, r3 801340e: 2b01 cmp r3, #1 8013410: bf14 ite ne 8013412: 2301 movne r3, #1 8013414: 2300 moveq r3, #0 8013416: b2db uxtb r3, r3 8013418: e015 b.n 8013446 801341a: 683b ldr r3, [r7, #0] 801341c: 2b08 cmp r3, #8 801341e: d109 bne.n 8013434 8013420: 687b ldr r3, [r7, #4] 8013422: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8013426: b2db uxtb r3, r3 8013428: 2b01 cmp r3, #1 801342a: bf14 ite ne 801342c: 2301 movne r3, #1 801342e: 2300 moveq r3, #0 8013430: b2db uxtb r3, r3 8013432: e008 b.n 8013446 8013434: 687b ldr r3, [r7, #4] 8013436: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 801343a: b2db uxtb r3, r3 801343c: 2b01 cmp r3, #1 801343e: bf14 ite ne 8013440: 2301 movne r3, #1 8013442: 2300 moveq r3, #0 8013444: b2db uxtb r3, r3 8013446: 2b00 cmp r3, #0 8013448: d001 beq.n 801344e { return HAL_ERROR; 801344a: 2301 movs r3, #1 801344c: e063 b.n 8013516 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 801344e: 683b ldr r3, [r7, #0] 8013450: 2b00 cmp r3, #0 8013452: d104 bne.n 801345e 8013454: 687b ldr r3, [r7, #4] 8013456: 2202 movs r2, #2 8013458: f883 203e strb.w r2, [r3, #62] @ 0x3e 801345c: e013 b.n 8013486 801345e: 683b ldr r3, [r7, #0] 8013460: 2b04 cmp r3, #4 8013462: d104 bne.n 801346e 8013464: 687b ldr r3, [r7, #4] 8013466: 2202 movs r2, #2 8013468: f883 203f strb.w r2, [r3, #63] @ 0x3f 801346c: e00b b.n 8013486 801346e: 683b ldr r3, [r7, #0] 8013470: 2b08 cmp r3, #8 8013472: d104 bne.n 801347e 8013474: 687b ldr r3, [r7, #4] 8013476: 2202 movs r2, #2 8013478: f883 2040 strb.w r2, [r3, #64] @ 0x40 801347c: e003 b.n 8013486 801347e: 687b ldr r3, [r7, #4] 8013480: 2202 movs r2, #2 8013482: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8013486: 687b ldr r3, [r7, #4] 8013488: 681b ldr r3, [r3, #0] 801348a: 2201 movs r2, #1 801348c: 6839 ldr r1, [r7, #0] 801348e: 4618 mov r0, r3 8013490: f000 fde6 bl 8014060 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8013494: 687b ldr r3, [r7, #4] 8013496: 681b ldr r3, [r3, #0] 8013498: 4a21 ldr r2, [pc, #132] @ (8013520 ) 801349a: 4293 cmp r3, r2 801349c: d107 bne.n 80134ae { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 801349e: 687b ldr r3, [r7, #4] 80134a0: 681b ldr r3, [r3, #0] 80134a2: 6c5a ldr r2, [r3, #68] @ 0x44 80134a4: 687b ldr r3, [r7, #4] 80134a6: 681b ldr r3, [r3, #0] 80134a8: f442 4200 orr.w r2, r2, #32768 @ 0x8000 80134ac: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 80134ae: 687b ldr r3, [r7, #4] 80134b0: 681b ldr r3, [r3, #0] 80134b2: 4a1b ldr r2, [pc, #108] @ (8013520 ) 80134b4: 4293 cmp r3, r2 80134b6: d013 beq.n 80134e0 80134b8: 687b ldr r3, [r7, #4] 80134ba: 681b ldr r3, [r3, #0] 80134bc: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80134c0: d00e beq.n 80134e0 80134c2: 687b ldr r3, [r7, #4] 80134c4: 681b ldr r3, [r3, #0] 80134c6: 4a17 ldr r2, [pc, #92] @ (8013524 ) 80134c8: 4293 cmp r3, r2 80134ca: d009 beq.n 80134e0 80134cc: 687b ldr r3, [r7, #4] 80134ce: 681b ldr r3, [r3, #0] 80134d0: 4a15 ldr r2, [pc, #84] @ (8013528 ) 80134d2: 4293 cmp r3, r2 80134d4: d004 beq.n 80134e0 80134d6: 687b ldr r3, [r7, #4] 80134d8: 681b ldr r3, [r3, #0] 80134da: 4a14 ldr r2, [pc, #80] @ (801352c ) 80134dc: 4293 cmp r3, r2 80134de: d111 bne.n 8013504 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 80134e0: 687b ldr r3, [r7, #4] 80134e2: 681b ldr r3, [r3, #0] 80134e4: 689b ldr r3, [r3, #8] 80134e6: f003 0307 and.w r3, r3, #7 80134ea: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80134ec: 68fb ldr r3, [r7, #12] 80134ee: 2b06 cmp r3, #6 80134f0: d010 beq.n 8013514 { __HAL_TIM_ENABLE(htim); 80134f2: 687b ldr r3, [r7, #4] 80134f4: 681b ldr r3, [r3, #0] 80134f6: 681a ldr r2, [r3, #0] 80134f8: 687b ldr r3, [r7, #4] 80134fa: 681b ldr r3, [r3, #0] 80134fc: f042 0201 orr.w r2, r2, #1 8013500: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8013502: e007 b.n 8013514 } } else { __HAL_TIM_ENABLE(htim); 8013504: 687b ldr r3, [r7, #4] 8013506: 681b ldr r3, [r3, #0] 8013508: 681a ldr r2, [r3, #0] 801350a: 687b ldr r3, [r7, #4] 801350c: 681b ldr r3, [r3, #0] 801350e: f042 0201 orr.w r2, r2, #1 8013512: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 8013514: 2300 movs r3, #0 } 8013516: 4618 mov r0, r3 8013518: 3710 adds r7, #16 801351a: 46bd mov sp, r7 801351c: bd80 pop {r7, pc} 801351e: bf00 nop 8013520: 40012c00 .word 0x40012c00 8013524: 40000400 .word 0x40000400 8013528: 40000800 .word 0x40000800 801352c: 40000c00 .word 0x40000c00 08013530 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { 8013530: b580 push {r7, lr} 8013532: b084 sub sp, #16 8013534: af00 add r7, sp, #0 8013536: 6078 str r0, [r7, #4] uint32_t itsource = htim->Instance->DIER; 8013538: 687b ldr r3, [r7, #4] 801353a: 681b ldr r3, [r3, #0] 801353c: 68db ldr r3, [r3, #12] 801353e: 60fb str r3, [r7, #12] uint32_t itflag = htim->Instance->SR; 8013540: 687b ldr r3, [r7, #4] 8013542: 681b ldr r3, [r3, #0] 8013544: 691b ldr r3, [r3, #16] 8013546: 60bb str r3, [r7, #8] /* Capture compare 1 event */ if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) 8013548: 68bb ldr r3, [r7, #8] 801354a: f003 0302 and.w r3, r3, #2 801354e: 2b00 cmp r3, #0 8013550: d020 beq.n 8013594 { if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) 8013552: 68fb ldr r3, [r7, #12] 8013554: f003 0302 and.w r3, r3, #2 8013558: 2b00 cmp r3, #0 801355a: d01b beq.n 8013594 { { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); 801355c: 687b ldr r3, [r7, #4] 801355e: 681b ldr r3, [r3, #0] 8013560: f06f 0202 mvn.w r2, #2 8013564: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8013566: 687b ldr r3, [r7, #4] 8013568: 2201 movs r2, #1 801356a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 801356c: 687b ldr r3, [r7, #4] 801356e: 681b ldr r3, [r3, #0] 8013570: 699b ldr r3, [r3, #24] 8013572: f003 0303 and.w r3, r3, #3 8013576: 2b00 cmp r3, #0 8013578: d003 beq.n 8013582 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 801357a: 6878 ldr r0, [r7, #4] 801357c: f000 fabf bl 8013afe 8013580: e005 b.n 801358e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 8013582: 6878 ldr r0, [r7, #4] 8013584: f000 fab2 bl 8013aec HAL_TIM_PWM_PulseFinishedCallback(htim); 8013588: 6878 ldr r0, [r7, #4] 801358a: f000 fac1 bl 8013b10 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 801358e: 687b ldr r3, [r7, #4] 8013590: 2200 movs r2, #0 8013592: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) 8013594: 68bb ldr r3, [r7, #8] 8013596: f003 0304 and.w r3, r3, #4 801359a: 2b00 cmp r3, #0 801359c: d020 beq.n 80135e0 { if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) 801359e: 68fb ldr r3, [r7, #12] 80135a0: f003 0304 and.w r3, r3, #4 80135a4: 2b00 cmp r3, #0 80135a6: d01b beq.n 80135e0 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); 80135a8: 687b ldr r3, [r7, #4] 80135aa: 681b ldr r3, [r3, #0] 80135ac: f06f 0204 mvn.w r2, #4 80135b0: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80135b2: 687b ldr r3, [r7, #4] 80135b4: 2202 movs r2, #2 80135b6: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80135b8: 687b ldr r3, [r7, #4] 80135ba: 681b ldr r3, [r3, #0] 80135bc: 699b ldr r3, [r3, #24] 80135be: f403 7340 and.w r3, r3, #768 @ 0x300 80135c2: 2b00 cmp r3, #0 80135c4: d003 beq.n 80135ce { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80135c6: 6878 ldr r0, [r7, #4] 80135c8: f000 fa99 bl 8013afe 80135cc: e005 b.n 80135da { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 80135ce: 6878 ldr r0, [r7, #4] 80135d0: f000 fa8c bl 8013aec HAL_TIM_PWM_PulseFinishedCallback(htim); 80135d4: 6878 ldr r0, [r7, #4] 80135d6: f000 fa9b bl 8013b10 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80135da: 687b ldr r3, [r7, #4] 80135dc: 2200 movs r2, #0 80135de: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) 80135e0: 68bb ldr r3, [r7, #8] 80135e2: f003 0308 and.w r3, r3, #8 80135e6: 2b00 cmp r3, #0 80135e8: d020 beq.n 801362c { if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) 80135ea: 68fb ldr r3, [r7, #12] 80135ec: f003 0308 and.w r3, r3, #8 80135f0: 2b00 cmp r3, #0 80135f2: d01b beq.n 801362c { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); 80135f4: 687b ldr r3, [r7, #4] 80135f6: 681b ldr r3, [r3, #0] 80135f8: f06f 0208 mvn.w r2, #8 80135fc: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 80135fe: 687b ldr r3, [r7, #4] 8013600: 2204 movs r2, #4 8013602: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8013604: 687b ldr r3, [r7, #4] 8013606: 681b ldr r3, [r3, #0] 8013608: 69db ldr r3, [r3, #28] 801360a: f003 0303 and.w r3, r3, #3 801360e: 2b00 cmp r3, #0 8013610: d003 beq.n 801361a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8013612: 6878 ldr r0, [r7, #4] 8013614: f000 fa73 bl 8013afe 8013618: e005 b.n 8013626 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 801361a: 6878 ldr r0, [r7, #4] 801361c: f000 fa66 bl 8013aec HAL_TIM_PWM_PulseFinishedCallback(htim); 8013620: 6878 ldr r0, [r7, #4] 8013622: f000 fa75 bl 8013b10 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8013626: 687b ldr r3, [r7, #4] 8013628: 2200 movs r2, #0 801362a: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) 801362c: 68bb ldr r3, [r7, #8] 801362e: f003 0310 and.w r3, r3, #16 8013632: 2b00 cmp r3, #0 8013634: d020 beq.n 8013678 { if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) 8013636: 68fb ldr r3, [r7, #12] 8013638: f003 0310 and.w r3, r3, #16 801363c: 2b00 cmp r3, #0 801363e: d01b beq.n 8013678 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); 8013640: 687b ldr r3, [r7, #4] 8013642: 681b ldr r3, [r3, #0] 8013644: f06f 0210 mvn.w r2, #16 8013648: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 801364a: 687b ldr r3, [r7, #4] 801364c: 2208 movs r2, #8 801364e: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8013650: 687b ldr r3, [r7, #4] 8013652: 681b ldr r3, [r3, #0] 8013654: 69db ldr r3, [r3, #28] 8013656: f403 7340 and.w r3, r3, #768 @ 0x300 801365a: 2b00 cmp r3, #0 801365c: d003 beq.n 8013666 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 801365e: 6878 ldr r0, [r7, #4] 8013660: f000 fa4d bl 8013afe 8013664: e005 b.n 8013672 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 8013666: 6878 ldr r0, [r7, #4] 8013668: f000 fa40 bl 8013aec HAL_TIM_PWM_PulseFinishedCallback(htim); 801366c: 6878 ldr r0, [r7, #4] 801366e: f000 fa4f bl 8013b10 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8013672: 687b ldr r3, [r7, #4] 8013674: 2200 movs r2, #0 8013676: 771a strb r2, [r3, #28] } } /* TIM Update event */ if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) 8013678: 68bb ldr r3, [r7, #8] 801367a: f003 0301 and.w r3, r3, #1 801367e: 2b00 cmp r3, #0 8013680: d00c beq.n 801369c { if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) 8013682: 68fb ldr r3, [r7, #12] 8013684: f003 0301 and.w r3, r3, #1 8013688: 2b00 cmp r3, #0 801368a: d007 beq.n 801369c { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); 801368c: 687b ldr r3, [r7, #4] 801368e: 681b ldr r3, [r3, #0] 8013690: f06f 0201 mvn.w r2, #1 8013694: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); 8013696: 6878 ldr r0, [r7, #4] 8013698: f000 fa1f bl 8013ada #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) 801369c: 68bb ldr r3, [r7, #8] 801369e: f003 0380 and.w r3, r3, #128 @ 0x80 80136a2: 2b00 cmp r3, #0 80136a4: d00c beq.n 80136c0 { if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) 80136a6: 68fb ldr r3, [r7, #12] 80136a8: f003 0380 and.w r3, r3, #128 @ 0x80 80136ac: 2b00 cmp r3, #0 80136ae: d007 beq.n 80136c0 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK); 80136b0: 687b ldr r3, [r7, #4] 80136b2: 681b ldr r3, [r3, #0] 80136b4: f06f 0280 mvn.w r2, #128 @ 0x80 80136b8: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); 80136ba: 6878 ldr r0, [r7, #4] 80136bc: f000 fd63 bl 8014186 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) 80136c0: 68bb ldr r3, [r7, #8] 80136c2: f003 0340 and.w r3, r3, #64 @ 0x40 80136c6: 2b00 cmp r3, #0 80136c8: d00c beq.n 80136e4 { if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) 80136ca: 68fb ldr r3, [r7, #12] 80136cc: f003 0340 and.w r3, r3, #64 @ 0x40 80136d0: 2b00 cmp r3, #0 80136d2: d007 beq.n 80136e4 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); 80136d4: 687b ldr r3, [r7, #4] 80136d6: 681b ldr r3, [r3, #0] 80136d8: f06f 0240 mvn.w r2, #64 @ 0x40 80136dc: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); 80136de: 6878 ldr r0, [r7, #4] 80136e0: f000 fa1f bl 8013b22 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) 80136e4: 68bb ldr r3, [r7, #8] 80136e6: f003 0320 and.w r3, r3, #32 80136ea: 2b00 cmp r3, #0 80136ec: d00c beq.n 8013708 { if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) 80136ee: 68fb ldr r3, [r7, #12] 80136f0: f003 0320 and.w r3, r3, #32 80136f4: 2b00 cmp r3, #0 80136f6: d007 beq.n 8013708 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); 80136f8: 687b ldr r3, [r7, #4] 80136fa: 681b ldr r3, [r3, #0] 80136fc: f06f 0220 mvn.w r2, #32 8013700: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); 8013702: 6878 ldr r0, [r7, #4] 8013704: f000 fd36 bl 8014174 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } 8013708: bf00 nop 801370a: 3710 adds r7, #16 801370c: 46bd mov sp, r7 801370e: bd80 pop {r7, pc} 08013710 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8013710: b580 push {r7, lr} 8013712: b086 sub sp, #24 8013714: af00 add r7, sp, #0 8013716: 60f8 str r0, [r7, #12] 8013718: 60b9 str r1, [r7, #8] 801371a: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 801371c: 2300 movs r3, #0 801371e: 75fb strb r3, [r7, #23] assert_param(IS_TIM_CHANNELS(Channel)); assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); /* Process Locked */ __HAL_LOCK(htim); 8013720: 68fb ldr r3, [r7, #12] 8013722: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8013726: 2b01 cmp r3, #1 8013728: d101 bne.n 801372e 801372a: 2302 movs r3, #2 801372c: e048 b.n 80137c0 801372e: 68fb ldr r3, [r7, #12] 8013730: 2201 movs r2, #1 8013732: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 8013736: 687b ldr r3, [r7, #4] 8013738: 2b0c cmp r3, #12 801373a: d839 bhi.n 80137b0 801373c: a201 add r2, pc, #4 @ (adr r2, 8013744 ) 801373e: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8013742: bf00 nop 8013744: 08013779 .word 0x08013779 8013748: 080137b1 .word 0x080137b1 801374c: 080137b1 .word 0x080137b1 8013750: 080137b1 .word 0x080137b1 8013754: 08013787 .word 0x08013787 8013758: 080137b1 .word 0x080137b1 801375c: 080137b1 .word 0x080137b1 8013760: 080137b1 .word 0x080137b1 8013764: 08013795 .word 0x08013795 8013768: 080137b1 .word 0x080137b1 801376c: 080137b1 .word 0x080137b1 8013770: 080137b1 .word 0x080137b1 8013774: 080137a3 .word 0x080137a3 { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the TIM Channel 1 in Output Compare */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8013778: 68fb ldr r3, [r7, #12] 801377a: 681b ldr r3, [r3, #0] 801377c: 68b9 ldr r1, [r7, #8] 801377e: 4618 mov r0, r3 8013780: f000 fa50 bl 8013c24 break; 8013784: e017 b.n 80137b6 { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the TIM Channel 2 in Output Compare */ TIM_OC2_SetConfig(htim->Instance, sConfig); 8013786: 68fb ldr r3, [r7, #12] 8013788: 681b ldr r3, [r3, #0] 801378a: 68b9 ldr r1, [r7, #8] 801378c: 4618 mov r0, r3 801378e: f000 faaf bl 8013cf0 break; 8013792: e010 b.n 80137b6 { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the TIM Channel 3 in Output Compare */ TIM_OC3_SetConfig(htim->Instance, sConfig); 8013794: 68fb ldr r3, [r7, #12] 8013796: 681b ldr r3, [r3, #0] 8013798: 68b9 ldr r1, [r7, #8] 801379a: 4618 mov r0, r3 801379c: f000 fb12 bl 8013dc4 break; 80137a0: e009 b.n 80137b6 { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the TIM Channel 4 in Output Compare */ TIM_OC4_SetConfig(htim->Instance, sConfig); 80137a2: 68fb ldr r3, [r7, #12] 80137a4: 681b ldr r3, [r3, #0] 80137a6: 68b9 ldr r1, [r7, #8] 80137a8: 4618 mov r0, r3 80137aa: f000 fb75 bl 8013e98 break; 80137ae: e002 b.n 80137b6 } default: status = HAL_ERROR; 80137b0: 2301 movs r3, #1 80137b2: 75fb strb r3, [r7, #23] break; 80137b4: bf00 nop } __HAL_UNLOCK(htim); 80137b6: 68fb ldr r3, [r7, #12] 80137b8: 2200 movs r2, #0 80137ba: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 80137be: 7dfb ldrb r3, [r7, #23] } 80137c0: 4618 mov r0, r3 80137c2: 3718 adds r7, #24 80137c4: 46bd mov sp, r7 80137c6: bd80 pop {r7, pc} 080137c8 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 80137c8: b580 push {r7, lr} 80137ca: b086 sub sp, #24 80137cc: af00 add r7, sp, #0 80137ce: 60f8 str r0, [r7, #12] 80137d0: 60b9 str r1, [r7, #8] 80137d2: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80137d4: 2300 movs r3, #0 80137d6: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 80137d8: 68fb ldr r3, [r7, #12] 80137da: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80137de: 2b01 cmp r3, #1 80137e0: d101 bne.n 80137e6 80137e2: 2302 movs r3, #2 80137e4: e0ae b.n 8013944 80137e6: 68fb ldr r3, [r7, #12] 80137e8: 2201 movs r2, #1 80137ea: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 80137ee: 687b ldr r3, [r7, #4] 80137f0: 2b0c cmp r3, #12 80137f2: f200 809f bhi.w 8013934 80137f6: a201 add r2, pc, #4 @ (adr r2, 80137fc ) 80137f8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80137fc: 08013831 .word 0x08013831 8013800: 08013935 .word 0x08013935 8013804: 08013935 .word 0x08013935 8013808: 08013935 .word 0x08013935 801380c: 08013871 .word 0x08013871 8013810: 08013935 .word 0x08013935 8013814: 08013935 .word 0x08013935 8013818: 08013935 .word 0x08013935 801381c: 080138b3 .word 0x080138b3 8013820: 08013935 .word 0x08013935 8013824: 08013935 .word 0x08013935 8013828: 08013935 .word 0x08013935 801382c: 080138f3 .word 0x080138f3 { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8013830: 68fb ldr r3, [r7, #12] 8013832: 681b ldr r3, [r3, #0] 8013834: 68b9 ldr r1, [r7, #8] 8013836: 4618 mov r0, r3 8013838: f000 f9f4 bl 8013c24 /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 801383c: 68fb ldr r3, [r7, #12] 801383e: 681b ldr r3, [r3, #0] 8013840: 699a ldr r2, [r3, #24] 8013842: 68fb ldr r3, [r7, #12] 8013844: 681b ldr r3, [r3, #0] 8013846: f042 0208 orr.w r2, r2, #8 801384a: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 801384c: 68fb ldr r3, [r7, #12] 801384e: 681b ldr r3, [r3, #0] 8013850: 699a ldr r2, [r3, #24] 8013852: 68fb ldr r3, [r7, #12] 8013854: 681b ldr r3, [r3, #0] 8013856: f022 0204 bic.w r2, r2, #4 801385a: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 801385c: 68fb ldr r3, [r7, #12] 801385e: 681b ldr r3, [r3, #0] 8013860: 6999 ldr r1, [r3, #24] 8013862: 68bb ldr r3, [r7, #8] 8013864: 691a ldr r2, [r3, #16] 8013866: 68fb ldr r3, [r7, #12] 8013868: 681b ldr r3, [r3, #0] 801386a: 430a orrs r2, r1 801386c: 619a str r2, [r3, #24] break; 801386e: e064 b.n 801393a { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 8013870: 68fb ldr r3, [r7, #12] 8013872: 681b ldr r3, [r3, #0] 8013874: 68b9 ldr r1, [r7, #8] 8013876: 4618 mov r0, r3 8013878: f000 fa3a bl 8013cf0 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 801387c: 68fb ldr r3, [r7, #12] 801387e: 681b ldr r3, [r3, #0] 8013880: 699a ldr r2, [r3, #24] 8013882: 68fb ldr r3, [r7, #12] 8013884: 681b ldr r3, [r3, #0] 8013886: f442 6200 orr.w r2, r2, #2048 @ 0x800 801388a: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 801388c: 68fb ldr r3, [r7, #12] 801388e: 681b ldr r3, [r3, #0] 8013890: 699a ldr r2, [r3, #24] 8013892: 68fb ldr r3, [r7, #12] 8013894: 681b ldr r3, [r3, #0] 8013896: f422 6280 bic.w r2, r2, #1024 @ 0x400 801389a: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 801389c: 68fb ldr r3, [r7, #12] 801389e: 681b ldr r3, [r3, #0] 80138a0: 6999 ldr r1, [r3, #24] 80138a2: 68bb ldr r3, [r7, #8] 80138a4: 691b ldr r3, [r3, #16] 80138a6: 021a lsls r2, r3, #8 80138a8: 68fb ldr r3, [r7, #12] 80138aa: 681b ldr r3, [r3, #0] 80138ac: 430a orrs r2, r1 80138ae: 619a str r2, [r3, #24] break; 80138b0: e043 b.n 801393a { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 80138b2: 68fb ldr r3, [r7, #12] 80138b4: 681b ldr r3, [r3, #0] 80138b6: 68b9 ldr r1, [r7, #8] 80138b8: 4618 mov r0, r3 80138ba: f000 fa83 bl 8013dc4 /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 80138be: 68fb ldr r3, [r7, #12] 80138c0: 681b ldr r3, [r3, #0] 80138c2: 69da ldr r2, [r3, #28] 80138c4: 68fb ldr r3, [r7, #12] 80138c6: 681b ldr r3, [r3, #0] 80138c8: f042 0208 orr.w r2, r2, #8 80138cc: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 80138ce: 68fb ldr r3, [r7, #12] 80138d0: 681b ldr r3, [r3, #0] 80138d2: 69da ldr r2, [r3, #28] 80138d4: 68fb ldr r3, [r7, #12] 80138d6: 681b ldr r3, [r3, #0] 80138d8: f022 0204 bic.w r2, r2, #4 80138dc: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 80138de: 68fb ldr r3, [r7, #12] 80138e0: 681b ldr r3, [r3, #0] 80138e2: 69d9 ldr r1, [r3, #28] 80138e4: 68bb ldr r3, [r7, #8] 80138e6: 691a ldr r2, [r3, #16] 80138e8: 68fb ldr r3, [r7, #12] 80138ea: 681b ldr r3, [r3, #0] 80138ec: 430a orrs r2, r1 80138ee: 61da str r2, [r3, #28] break; 80138f0: e023 b.n 801393a { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 80138f2: 68fb ldr r3, [r7, #12] 80138f4: 681b ldr r3, [r3, #0] 80138f6: 68b9 ldr r1, [r7, #8] 80138f8: 4618 mov r0, r3 80138fa: f000 facd bl 8013e98 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 80138fe: 68fb ldr r3, [r7, #12] 8013900: 681b ldr r3, [r3, #0] 8013902: 69da ldr r2, [r3, #28] 8013904: 68fb ldr r3, [r7, #12] 8013906: 681b ldr r3, [r3, #0] 8013908: f442 6200 orr.w r2, r2, #2048 @ 0x800 801390c: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 801390e: 68fb ldr r3, [r7, #12] 8013910: 681b ldr r3, [r3, #0] 8013912: 69da ldr r2, [r3, #28] 8013914: 68fb ldr r3, [r7, #12] 8013916: 681b ldr r3, [r3, #0] 8013918: f422 6280 bic.w r2, r2, #1024 @ 0x400 801391c: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 801391e: 68fb ldr r3, [r7, #12] 8013920: 681b ldr r3, [r3, #0] 8013922: 69d9 ldr r1, [r3, #28] 8013924: 68bb ldr r3, [r7, #8] 8013926: 691b ldr r3, [r3, #16] 8013928: 021a lsls r2, r3, #8 801392a: 68fb ldr r3, [r7, #12] 801392c: 681b ldr r3, [r3, #0] 801392e: 430a orrs r2, r1 8013930: 61da str r2, [r3, #28] break; 8013932: e002 b.n 801393a } default: status = HAL_ERROR; 8013934: 2301 movs r3, #1 8013936: 75fb strb r3, [r7, #23] break; 8013938: bf00 nop } __HAL_UNLOCK(htim); 801393a: 68fb ldr r3, [r7, #12] 801393c: 2200 movs r2, #0 801393e: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8013942: 7dfb ldrb r3, [r7, #23] } 8013944: 4618 mov r0, r3 8013946: 3718 adds r7, #24 8013948: 46bd mov sp, r7 801394a: bd80 pop {r7, pc} 0801394c : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { 801394c: b580 push {r7, lr} 801394e: b084 sub sp, #16 8013950: af00 add r7, sp, #0 8013952: 6078 str r0, [r7, #4] 8013954: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8013956: 2300 movs r3, #0 8013958: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 801395a: 687b ldr r3, [r7, #4] 801395c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8013960: 2b01 cmp r3, #1 8013962: d101 bne.n 8013968 8013964: 2302 movs r3, #2 8013966: e0b4 b.n 8013ad2 8013968: 687b ldr r3, [r7, #4] 801396a: 2201 movs r2, #1 801396c: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 8013970: 687b ldr r3, [r7, #4] 8013972: 2202 movs r2, #2 8013974: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 8013978: 687b ldr r3, [r7, #4] 801397a: 681b ldr r3, [r3, #0] 801397c: 689b ldr r3, [r3, #8] 801397e: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 8013980: 68bb ldr r3, [r7, #8] 8013982: f023 0377 bic.w r3, r3, #119 @ 0x77 8013986: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8013988: 68bb ldr r3, [r7, #8] 801398a: f423 437f bic.w r3, r3, #65280 @ 0xff00 801398e: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 8013990: 687b ldr r3, [r7, #4] 8013992: 681b ldr r3, [r3, #0] 8013994: 68ba ldr r2, [r7, #8] 8013996: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 8013998: 683b ldr r3, [r7, #0] 801399a: 681b ldr r3, [r3, #0] 801399c: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 80139a0: d03e beq.n 8013a20 80139a2: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 80139a6: f200 8087 bhi.w 8013ab8 80139aa: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80139ae: f000 8086 beq.w 8013abe 80139b2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80139b6: d87f bhi.n 8013ab8 80139b8: 2b70 cmp r3, #112 @ 0x70 80139ba: d01a beq.n 80139f2 80139bc: 2b70 cmp r3, #112 @ 0x70 80139be: d87b bhi.n 8013ab8 80139c0: 2b60 cmp r3, #96 @ 0x60 80139c2: d050 beq.n 8013a66 80139c4: 2b60 cmp r3, #96 @ 0x60 80139c6: d877 bhi.n 8013ab8 80139c8: 2b50 cmp r3, #80 @ 0x50 80139ca: d03c beq.n 8013a46 80139cc: 2b50 cmp r3, #80 @ 0x50 80139ce: d873 bhi.n 8013ab8 80139d0: 2b40 cmp r3, #64 @ 0x40 80139d2: d058 beq.n 8013a86 80139d4: 2b40 cmp r3, #64 @ 0x40 80139d6: d86f bhi.n 8013ab8 80139d8: 2b30 cmp r3, #48 @ 0x30 80139da: d064 beq.n 8013aa6 80139dc: 2b30 cmp r3, #48 @ 0x30 80139de: d86b bhi.n 8013ab8 80139e0: 2b20 cmp r3, #32 80139e2: d060 beq.n 8013aa6 80139e4: 2b20 cmp r3, #32 80139e6: d867 bhi.n 8013ab8 80139e8: 2b00 cmp r3, #0 80139ea: d05c beq.n 8013aa6 80139ec: 2b10 cmp r3, #16 80139ee: d05a beq.n 8013aa6 80139f0: e062 b.n 8013ab8 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 80139f2: 687b ldr r3, [r7, #4] 80139f4: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 80139f6: 683b ldr r3, [r7, #0] 80139f8: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 80139fa: 683b ldr r3, [r7, #0] 80139fc: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 80139fe: 683b ldr r3, [r7, #0] 8013a00: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 8013a02: f000 fb0e bl 8014022 /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 8013a06: 687b ldr r3, [r7, #4] 8013a08: 681b ldr r3, [r3, #0] 8013a0a: 689b ldr r3, [r3, #8] 8013a0c: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 8013a0e: 68bb ldr r3, [r7, #8] 8013a10: f043 0377 orr.w r3, r3, #119 @ 0x77 8013a14: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8013a16: 687b ldr r3, [r7, #4] 8013a18: 681b ldr r3, [r3, #0] 8013a1a: 68ba ldr r2, [r7, #8] 8013a1c: 609a str r2, [r3, #8] break; 8013a1e: e04f b.n 8013ac0 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 8013a20: 687b ldr r3, [r7, #4] 8013a22: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 8013a24: 683b ldr r3, [r7, #0] 8013a26: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8013a28: 683b ldr r3, [r7, #0] 8013a2a: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8013a2c: 683b ldr r3, [r7, #0] 8013a2e: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 8013a30: f000 faf7 bl 8014022 /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 8013a34: 687b ldr r3, [r7, #4] 8013a36: 681b ldr r3, [r3, #0] 8013a38: 689a ldr r2, [r3, #8] 8013a3a: 687b ldr r3, [r7, #4] 8013a3c: 681b ldr r3, [r3, #0] 8013a3e: f442 4280 orr.w r2, r2, #16384 @ 0x4000 8013a42: 609a str r2, [r3, #8] break; 8013a44: e03c b.n 8013ac0 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8013a46: 687b ldr r3, [r7, #4] 8013a48: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8013a4a: 683b ldr r3, [r7, #0] 8013a4c: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8013a4e: 683b ldr r3, [r7, #0] 8013a50: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 8013a52: 461a mov r2, r3 8013a54: f000 fa6e bl 8013f34 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 8013a58: 687b ldr r3, [r7, #4] 8013a5a: 681b ldr r3, [r3, #0] 8013a5c: 2150 movs r1, #80 @ 0x50 8013a5e: 4618 mov r0, r3 8013a60: f000 fac5 bl 8013fee break; 8013a64: e02c b.n 8013ac0 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 8013a66: 687b ldr r3, [r7, #4] 8013a68: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8013a6a: 683b ldr r3, [r7, #0] 8013a6c: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8013a6e: 683b ldr r3, [r7, #0] 8013a70: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, 8013a72: 461a mov r2, r3 8013a74: f000 fa8c bl 8013f90 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 8013a78: 687b ldr r3, [r7, #4] 8013a7a: 681b ldr r3, [r3, #0] 8013a7c: 2160 movs r1, #96 @ 0x60 8013a7e: 4618 mov r0, r3 8013a80: f000 fab5 bl 8013fee break; 8013a84: e01c b.n 8013ac0 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8013a86: 687b ldr r3, [r7, #4] 8013a88: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8013a8a: 683b ldr r3, [r7, #0] 8013a8c: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8013a8e: 683b ldr r3, [r7, #0] 8013a90: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 8013a92: 461a mov r2, r3 8013a94: f000 fa4e bl 8013f34 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 8013a98: 687b ldr r3, [r7, #4] 8013a9a: 681b ldr r3, [r3, #0] 8013a9c: 2140 movs r1, #64 @ 0x40 8013a9e: 4618 mov r0, r3 8013aa0: f000 faa5 bl 8013fee break; 8013aa4: e00c b.n 8013ac0 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 8013aa6: 687b ldr r3, [r7, #4] 8013aa8: 681a ldr r2, [r3, #0] 8013aaa: 683b ldr r3, [r7, #0] 8013aac: 681b ldr r3, [r3, #0] 8013aae: 4619 mov r1, r3 8013ab0: 4610 mov r0, r2 8013ab2: f000 fa9c bl 8013fee break; 8013ab6: e003 b.n 8013ac0 } default: status = HAL_ERROR; 8013ab8: 2301 movs r3, #1 8013aba: 73fb strb r3, [r7, #15] break; 8013abc: e000 b.n 8013ac0 break; 8013abe: bf00 nop } htim->State = HAL_TIM_STATE_READY; 8013ac0: 687b ldr r3, [r7, #4] 8013ac2: 2201 movs r2, #1 8013ac4: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8013ac8: 687b ldr r3, [r7, #4] 8013aca: 2200 movs r2, #0 8013acc: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8013ad0: 7bfb ldrb r3, [r7, #15] } 8013ad2: 4618 mov r0, r3 8013ad4: 3710 adds r7, #16 8013ad6: 46bd mov sp, r7 8013ad8: bd80 pop {r7, pc} 08013ada : * @brief Period elapsed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { 8013ada: b480 push {r7} 8013adc: b083 sub sp, #12 8013ade: af00 add r7, sp, #0 8013ae0: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PeriodElapsedCallback could be implemented in the user file */ } 8013ae2: bf00 nop 8013ae4: 370c adds r7, #12 8013ae6: 46bd mov sp, r7 8013ae8: bc80 pop {r7} 8013aea: 4770 bx lr 08013aec : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { 8013aec: b480 push {r7} 8013aee: b083 sub sp, #12 8013af0: af00 add r7, sp, #0 8013af2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } 8013af4: bf00 nop 8013af6: 370c adds r7, #12 8013af8: 46bd mov sp, r7 8013afa: bc80 pop {r7} 8013afc: 4770 bx lr 08013afe : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { 8013afe: b480 push {r7} 8013b00: b083 sub sp, #12 8013b02: af00 add r7, sp, #0 8013b04: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } 8013b06: bf00 nop 8013b08: 370c adds r7, #12 8013b0a: 46bd mov sp, r7 8013b0c: bc80 pop {r7} 8013b0e: 4770 bx lr 08013b10 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { 8013b10: b480 push {r7} 8013b12: b083 sub sp, #12 8013b14: af00 add r7, sp, #0 8013b16: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } 8013b18: bf00 nop 8013b1a: 370c adds r7, #12 8013b1c: 46bd mov sp, r7 8013b1e: bc80 pop {r7} 8013b20: 4770 bx lr 08013b22 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { 8013b22: b480 push {r7} 8013b24: b083 sub sp, #12 8013b26: af00 add r7, sp, #0 8013b28: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } 8013b2a: bf00 nop 8013b2c: 370c adds r7, #12 8013b2e: 46bd mov sp, r7 8013b30: bc80 pop {r7} 8013b32: 4770 bx lr 08013b34 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 8013b34: b480 push {r7} 8013b36: b085 sub sp, #20 8013b38: af00 add r7, sp, #0 8013b3a: 6078 str r0, [r7, #4] 8013b3c: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 8013b3e: 687b ldr r3, [r7, #4] 8013b40: 681b ldr r3, [r3, #0] 8013b42: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8013b44: 687b ldr r3, [r7, #4] 8013b46: 4a33 ldr r2, [pc, #204] @ (8013c14 ) 8013b48: 4293 cmp r3, r2 8013b4a: d00f beq.n 8013b6c 8013b4c: 687b ldr r3, [r7, #4] 8013b4e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8013b52: d00b beq.n 8013b6c 8013b54: 687b ldr r3, [r7, #4] 8013b56: 4a30 ldr r2, [pc, #192] @ (8013c18 ) 8013b58: 4293 cmp r3, r2 8013b5a: d007 beq.n 8013b6c 8013b5c: 687b ldr r3, [r7, #4] 8013b5e: 4a2f ldr r2, [pc, #188] @ (8013c1c ) 8013b60: 4293 cmp r3, r2 8013b62: d003 beq.n 8013b6c 8013b64: 687b ldr r3, [r7, #4] 8013b66: 4a2e ldr r2, [pc, #184] @ (8013c20 ) 8013b68: 4293 cmp r3, r2 8013b6a: d108 bne.n 8013b7e { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8013b6c: 68fb ldr r3, [r7, #12] 8013b6e: f023 0370 bic.w r3, r3, #112 @ 0x70 8013b72: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 8013b74: 683b ldr r3, [r7, #0] 8013b76: 685b ldr r3, [r3, #4] 8013b78: 68fa ldr r2, [r7, #12] 8013b7a: 4313 orrs r3, r2 8013b7c: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8013b7e: 687b ldr r3, [r7, #4] 8013b80: 4a24 ldr r2, [pc, #144] @ (8013c14 ) 8013b82: 4293 cmp r3, r2 8013b84: d00f beq.n 8013ba6 8013b86: 687b ldr r3, [r7, #4] 8013b88: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8013b8c: d00b beq.n 8013ba6 8013b8e: 687b ldr r3, [r7, #4] 8013b90: 4a21 ldr r2, [pc, #132] @ (8013c18 ) 8013b92: 4293 cmp r3, r2 8013b94: d007 beq.n 8013ba6 8013b96: 687b ldr r3, [r7, #4] 8013b98: 4a20 ldr r2, [pc, #128] @ (8013c1c ) 8013b9a: 4293 cmp r3, r2 8013b9c: d003 beq.n 8013ba6 8013b9e: 687b ldr r3, [r7, #4] 8013ba0: 4a1f ldr r2, [pc, #124] @ (8013c20 ) 8013ba2: 4293 cmp r3, r2 8013ba4: d108 bne.n 8013bb8 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 8013ba6: 68fb ldr r3, [r7, #12] 8013ba8: f423 7340 bic.w r3, r3, #768 @ 0x300 8013bac: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 8013bae: 683b ldr r3, [r7, #0] 8013bb0: 68db ldr r3, [r3, #12] 8013bb2: 68fa ldr r2, [r7, #12] 8013bb4: 4313 orrs r3, r2 8013bb6: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 8013bb8: 68fb ldr r3, [r7, #12] 8013bba: f023 0280 bic.w r2, r3, #128 @ 0x80 8013bbe: 683b ldr r3, [r7, #0] 8013bc0: 695b ldr r3, [r3, #20] 8013bc2: 4313 orrs r3, r2 8013bc4: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 8013bc6: 687b ldr r3, [r7, #4] 8013bc8: 68fa ldr r2, [r7, #12] 8013bca: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8013bcc: 683b ldr r3, [r7, #0] 8013bce: 689a ldr r2, [r3, #8] 8013bd0: 687b ldr r3, [r7, #4] 8013bd2: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 8013bd4: 683b ldr r3, [r7, #0] 8013bd6: 681a ldr r2, [r3, #0] 8013bd8: 687b ldr r3, [r7, #4] 8013bda: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8013bdc: 687b ldr r3, [r7, #4] 8013bde: 4a0d ldr r2, [pc, #52] @ (8013c14 ) 8013be0: 4293 cmp r3, r2 8013be2: d103 bne.n 8013bec { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8013be4: 683b ldr r3, [r7, #0] 8013be6: 691a ldr r2, [r3, #16] 8013be8: 687b ldr r3, [r7, #4] 8013bea: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8013bec: 687b ldr r3, [r7, #4] 8013bee: 2201 movs r2, #1 8013bf0: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 8013bf2: 687b ldr r3, [r7, #4] 8013bf4: 691b ldr r3, [r3, #16] 8013bf6: f003 0301 and.w r3, r3, #1 8013bfa: 2b00 cmp r3, #0 8013bfc: d005 beq.n 8013c0a { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 8013bfe: 687b ldr r3, [r7, #4] 8013c00: 691b ldr r3, [r3, #16] 8013c02: f023 0201 bic.w r2, r3, #1 8013c06: 687b ldr r3, [r7, #4] 8013c08: 611a str r2, [r3, #16] } } 8013c0a: bf00 nop 8013c0c: 3714 adds r7, #20 8013c0e: 46bd mov sp, r7 8013c10: bc80 pop {r7} 8013c12: 4770 bx lr 8013c14: 40012c00 .word 0x40012c00 8013c18: 40000400 .word 0x40000400 8013c1c: 40000800 .word 0x40000800 8013c20: 40000c00 .word 0x40000c00 08013c24 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8013c24: b480 push {r7} 8013c26: b087 sub sp, #28 8013c28: af00 add r7, sp, #0 8013c2a: 6078 str r0, [r7, #4] 8013c2c: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8013c2e: 687b ldr r3, [r7, #4] 8013c30: 6a1b ldr r3, [r3, #32] 8013c32: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 8013c34: 687b ldr r3, [r7, #4] 8013c36: 6a1b ldr r3, [r3, #32] 8013c38: f023 0201 bic.w r2, r3, #1 8013c3c: 687b ldr r3, [r7, #4] 8013c3e: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8013c40: 687b ldr r3, [r7, #4] 8013c42: 685b ldr r3, [r3, #4] 8013c44: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8013c46: 687b ldr r3, [r7, #4] 8013c48: 699b ldr r3, [r3, #24] 8013c4a: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 8013c4c: 68fb ldr r3, [r7, #12] 8013c4e: f023 0370 bic.w r3, r3, #112 @ 0x70 8013c52: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 8013c54: 68fb ldr r3, [r7, #12] 8013c56: f023 0303 bic.w r3, r3, #3 8013c5a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8013c5c: 683b ldr r3, [r7, #0] 8013c5e: 681b ldr r3, [r3, #0] 8013c60: 68fa ldr r2, [r7, #12] 8013c62: 4313 orrs r3, r2 8013c64: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 8013c66: 697b ldr r3, [r7, #20] 8013c68: f023 0302 bic.w r3, r3, #2 8013c6c: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 8013c6e: 683b ldr r3, [r7, #0] 8013c70: 689b ldr r3, [r3, #8] 8013c72: 697a ldr r2, [r7, #20] 8013c74: 4313 orrs r3, r2 8013c76: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 8013c78: 687b ldr r3, [r7, #4] 8013c7a: 4a1c ldr r2, [pc, #112] @ (8013cec ) 8013c7c: 4293 cmp r3, r2 8013c7e: d10c bne.n 8013c9a { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 8013c80: 697b ldr r3, [r7, #20] 8013c82: f023 0308 bic.w r3, r3, #8 8013c86: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 8013c88: 683b ldr r3, [r7, #0] 8013c8a: 68db ldr r3, [r3, #12] 8013c8c: 697a ldr r2, [r7, #20] 8013c8e: 4313 orrs r3, r2 8013c90: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 8013c92: 697b ldr r3, [r7, #20] 8013c94: f023 0304 bic.w r3, r3, #4 8013c98: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8013c9a: 687b ldr r3, [r7, #4] 8013c9c: 4a13 ldr r2, [pc, #76] @ (8013cec ) 8013c9e: 4293 cmp r3, r2 8013ca0: d111 bne.n 8013cc6 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 8013ca2: 693b ldr r3, [r7, #16] 8013ca4: f423 7380 bic.w r3, r3, #256 @ 0x100 8013ca8: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 8013caa: 693b ldr r3, [r7, #16] 8013cac: f423 7300 bic.w r3, r3, #512 @ 0x200 8013cb0: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 8013cb2: 683b ldr r3, [r7, #0] 8013cb4: 695b ldr r3, [r3, #20] 8013cb6: 693a ldr r2, [r7, #16] 8013cb8: 4313 orrs r3, r2 8013cba: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 8013cbc: 683b ldr r3, [r7, #0] 8013cbe: 699b ldr r3, [r3, #24] 8013cc0: 693a ldr r2, [r7, #16] 8013cc2: 4313 orrs r3, r2 8013cc4: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8013cc6: 687b ldr r3, [r7, #4] 8013cc8: 693a ldr r2, [r7, #16] 8013cca: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8013ccc: 687b ldr r3, [r7, #4] 8013cce: 68fa ldr r2, [r7, #12] 8013cd0: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 8013cd2: 683b ldr r3, [r7, #0] 8013cd4: 685a ldr r2, [r3, #4] 8013cd6: 687b ldr r3, [r7, #4] 8013cd8: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8013cda: 687b ldr r3, [r7, #4] 8013cdc: 697a ldr r2, [r7, #20] 8013cde: 621a str r2, [r3, #32] } 8013ce0: bf00 nop 8013ce2: 371c adds r7, #28 8013ce4: 46bd mov sp, r7 8013ce6: bc80 pop {r7} 8013ce8: 4770 bx lr 8013cea: bf00 nop 8013cec: 40012c00 .word 0x40012c00 08013cf0 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8013cf0: b480 push {r7} 8013cf2: b087 sub sp, #28 8013cf4: af00 add r7, sp, #0 8013cf6: 6078 str r0, [r7, #4] 8013cf8: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8013cfa: 687b ldr r3, [r7, #4] 8013cfc: 6a1b ldr r3, [r3, #32] 8013cfe: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8013d00: 687b ldr r3, [r7, #4] 8013d02: 6a1b ldr r3, [r3, #32] 8013d04: f023 0210 bic.w r2, r3, #16 8013d08: 687b ldr r3, [r7, #4] 8013d0a: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8013d0c: 687b ldr r3, [r7, #4] 8013d0e: 685b ldr r3, [r3, #4] 8013d10: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8013d12: 687b ldr r3, [r7, #4] 8013d14: 699b ldr r3, [r3, #24] 8013d16: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8013d18: 68fb ldr r3, [r7, #12] 8013d1a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8013d1e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 8013d20: 68fb ldr r3, [r7, #12] 8013d22: f423 7340 bic.w r3, r3, #768 @ 0x300 8013d26: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8013d28: 683b ldr r3, [r7, #0] 8013d2a: 681b ldr r3, [r3, #0] 8013d2c: 021b lsls r3, r3, #8 8013d2e: 68fa ldr r2, [r7, #12] 8013d30: 4313 orrs r3, r2 8013d32: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 8013d34: 697b ldr r3, [r7, #20] 8013d36: f023 0320 bic.w r3, r3, #32 8013d3a: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 8013d3c: 683b ldr r3, [r7, #0] 8013d3e: 689b ldr r3, [r3, #8] 8013d40: 011b lsls r3, r3, #4 8013d42: 697a ldr r2, [r7, #20] 8013d44: 4313 orrs r3, r2 8013d46: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 8013d48: 687b ldr r3, [r7, #4] 8013d4a: 4a1d ldr r2, [pc, #116] @ (8013dc0 ) 8013d4c: 4293 cmp r3, r2 8013d4e: d10d bne.n 8013d6c { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 8013d50: 697b ldr r3, [r7, #20] 8013d52: f023 0380 bic.w r3, r3, #128 @ 0x80 8013d56: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 8013d58: 683b ldr r3, [r7, #0] 8013d5a: 68db ldr r3, [r3, #12] 8013d5c: 011b lsls r3, r3, #4 8013d5e: 697a ldr r2, [r7, #20] 8013d60: 4313 orrs r3, r2 8013d62: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 8013d64: 697b ldr r3, [r7, #20] 8013d66: f023 0340 bic.w r3, r3, #64 @ 0x40 8013d6a: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8013d6c: 687b ldr r3, [r7, #4] 8013d6e: 4a14 ldr r2, [pc, #80] @ (8013dc0 ) 8013d70: 4293 cmp r3, r2 8013d72: d113 bne.n 8013d9c /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 8013d74: 693b ldr r3, [r7, #16] 8013d76: f423 6380 bic.w r3, r3, #1024 @ 0x400 8013d7a: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 8013d7c: 693b ldr r3, [r7, #16] 8013d7e: f423 6300 bic.w r3, r3, #2048 @ 0x800 8013d82: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 8013d84: 683b ldr r3, [r7, #0] 8013d86: 695b ldr r3, [r3, #20] 8013d88: 009b lsls r3, r3, #2 8013d8a: 693a ldr r2, [r7, #16] 8013d8c: 4313 orrs r3, r2 8013d8e: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 8013d90: 683b ldr r3, [r7, #0] 8013d92: 699b ldr r3, [r3, #24] 8013d94: 009b lsls r3, r3, #2 8013d96: 693a ldr r2, [r7, #16] 8013d98: 4313 orrs r3, r2 8013d9a: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8013d9c: 687b ldr r3, [r7, #4] 8013d9e: 693a ldr r2, [r7, #16] 8013da0: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8013da2: 687b ldr r3, [r7, #4] 8013da4: 68fa ldr r2, [r7, #12] 8013da6: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 8013da8: 683b ldr r3, [r7, #0] 8013daa: 685a ldr r2, [r3, #4] 8013dac: 687b ldr r3, [r7, #4] 8013dae: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8013db0: 687b ldr r3, [r7, #4] 8013db2: 697a ldr r2, [r7, #20] 8013db4: 621a str r2, [r3, #32] } 8013db6: bf00 nop 8013db8: 371c adds r7, #28 8013dba: 46bd mov sp, r7 8013dbc: bc80 pop {r7} 8013dbe: 4770 bx lr 8013dc0: 40012c00 .word 0x40012c00 08013dc4 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8013dc4: b480 push {r7} 8013dc6: b087 sub sp, #28 8013dc8: af00 add r7, sp, #0 8013dca: 6078 str r0, [r7, #4] 8013dcc: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8013dce: 687b ldr r3, [r7, #4] 8013dd0: 6a1b ldr r3, [r3, #32] 8013dd2: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 8013dd4: 687b ldr r3, [r7, #4] 8013dd6: 6a1b ldr r3, [r3, #32] 8013dd8: f423 7280 bic.w r2, r3, #256 @ 0x100 8013ddc: 687b ldr r3, [r7, #4] 8013dde: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8013de0: 687b ldr r3, [r7, #4] 8013de2: 685b ldr r3, [r3, #4] 8013de4: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8013de6: 687b ldr r3, [r7, #4] 8013de8: 69db ldr r3, [r3, #28] 8013dea: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 8013dec: 68fb ldr r3, [r7, #12] 8013dee: f023 0370 bic.w r3, r3, #112 @ 0x70 8013df2: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 8013df4: 68fb ldr r3, [r7, #12] 8013df6: f023 0303 bic.w r3, r3, #3 8013dfa: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8013dfc: 683b ldr r3, [r7, #0] 8013dfe: 681b ldr r3, [r3, #0] 8013e00: 68fa ldr r2, [r7, #12] 8013e02: 4313 orrs r3, r2 8013e04: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 8013e06: 697b ldr r3, [r7, #20] 8013e08: f423 7300 bic.w r3, r3, #512 @ 0x200 8013e0c: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 8013e0e: 683b ldr r3, [r7, #0] 8013e10: 689b ldr r3, [r3, #8] 8013e12: 021b lsls r3, r3, #8 8013e14: 697a ldr r2, [r7, #20] 8013e16: 4313 orrs r3, r2 8013e18: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 8013e1a: 687b ldr r3, [r7, #4] 8013e1c: 4a1d ldr r2, [pc, #116] @ (8013e94 ) 8013e1e: 4293 cmp r3, r2 8013e20: d10d bne.n 8013e3e { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 8013e22: 697b ldr r3, [r7, #20] 8013e24: f423 6300 bic.w r3, r3, #2048 @ 0x800 8013e28: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 8013e2a: 683b ldr r3, [r7, #0] 8013e2c: 68db ldr r3, [r3, #12] 8013e2e: 021b lsls r3, r3, #8 8013e30: 697a ldr r2, [r7, #20] 8013e32: 4313 orrs r3, r2 8013e34: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 8013e36: 697b ldr r3, [r7, #20] 8013e38: f423 6380 bic.w r3, r3, #1024 @ 0x400 8013e3c: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8013e3e: 687b ldr r3, [r7, #4] 8013e40: 4a14 ldr r2, [pc, #80] @ (8013e94 ) 8013e42: 4293 cmp r3, r2 8013e44: d113 bne.n 8013e6e /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 8013e46: 693b ldr r3, [r7, #16] 8013e48: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8013e4c: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 8013e4e: 693b ldr r3, [r7, #16] 8013e50: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8013e54: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 8013e56: 683b ldr r3, [r7, #0] 8013e58: 695b ldr r3, [r3, #20] 8013e5a: 011b lsls r3, r3, #4 8013e5c: 693a ldr r2, [r7, #16] 8013e5e: 4313 orrs r3, r2 8013e60: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 8013e62: 683b ldr r3, [r7, #0] 8013e64: 699b ldr r3, [r3, #24] 8013e66: 011b lsls r3, r3, #4 8013e68: 693a ldr r2, [r7, #16] 8013e6a: 4313 orrs r3, r2 8013e6c: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8013e6e: 687b ldr r3, [r7, #4] 8013e70: 693a ldr r2, [r7, #16] 8013e72: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8013e74: 687b ldr r3, [r7, #4] 8013e76: 68fa ldr r2, [r7, #12] 8013e78: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 8013e7a: 683b ldr r3, [r7, #0] 8013e7c: 685a ldr r2, [r3, #4] 8013e7e: 687b ldr r3, [r7, #4] 8013e80: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8013e82: 687b ldr r3, [r7, #4] 8013e84: 697a ldr r2, [r7, #20] 8013e86: 621a str r2, [r3, #32] } 8013e88: bf00 nop 8013e8a: 371c adds r7, #28 8013e8c: 46bd mov sp, r7 8013e8e: bc80 pop {r7} 8013e90: 4770 bx lr 8013e92: bf00 nop 8013e94: 40012c00 .word 0x40012c00 08013e98 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8013e98: b480 push {r7} 8013e9a: b087 sub sp, #28 8013e9c: af00 add r7, sp, #0 8013e9e: 6078 str r0, [r7, #4] 8013ea0: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8013ea2: 687b ldr r3, [r7, #4] 8013ea4: 6a1b ldr r3, [r3, #32] 8013ea6: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 8013ea8: 687b ldr r3, [r7, #4] 8013eaa: 6a1b ldr r3, [r3, #32] 8013eac: f423 5280 bic.w r2, r3, #4096 @ 0x1000 8013eb0: 687b ldr r3, [r7, #4] 8013eb2: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8013eb4: 687b ldr r3, [r7, #4] 8013eb6: 685b ldr r3, [r3, #4] 8013eb8: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8013eba: 687b ldr r3, [r7, #4] 8013ebc: 69db ldr r3, [r3, #28] 8013ebe: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 8013ec0: 68fb ldr r3, [r7, #12] 8013ec2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8013ec6: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 8013ec8: 68fb ldr r3, [r7, #12] 8013eca: f423 7340 bic.w r3, r3, #768 @ 0x300 8013ece: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8013ed0: 683b ldr r3, [r7, #0] 8013ed2: 681b ldr r3, [r3, #0] 8013ed4: 021b lsls r3, r3, #8 8013ed6: 68fa ldr r2, [r7, #12] 8013ed8: 4313 orrs r3, r2 8013eda: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 8013edc: 693b ldr r3, [r7, #16] 8013ede: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8013ee2: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 8013ee4: 683b ldr r3, [r7, #0] 8013ee6: 689b ldr r3, [r3, #8] 8013ee8: 031b lsls r3, r3, #12 8013eea: 693a ldr r2, [r7, #16] 8013eec: 4313 orrs r3, r2 8013eee: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 8013ef0: 687b ldr r3, [r7, #4] 8013ef2: 4a0f ldr r2, [pc, #60] @ (8013f30 ) 8013ef4: 4293 cmp r3, r2 8013ef6: d109 bne.n 8013f0c { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8013ef8: 697b ldr r3, [r7, #20] 8013efa: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8013efe: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8013f00: 683b ldr r3, [r7, #0] 8013f02: 695b ldr r3, [r3, #20] 8013f04: 019b lsls r3, r3, #6 8013f06: 697a ldr r2, [r7, #20] 8013f08: 4313 orrs r3, r2 8013f0a: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8013f0c: 687b ldr r3, [r7, #4] 8013f0e: 697a ldr r2, [r7, #20] 8013f10: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8013f12: 687b ldr r3, [r7, #4] 8013f14: 68fa ldr r2, [r7, #12] 8013f16: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8013f18: 683b ldr r3, [r7, #0] 8013f1a: 685a ldr r2, [r3, #4] 8013f1c: 687b ldr r3, [r7, #4] 8013f1e: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8013f20: 687b ldr r3, [r7, #4] 8013f22: 693a ldr r2, [r7, #16] 8013f24: 621a str r2, [r3, #32] } 8013f26: bf00 nop 8013f28: 371c adds r7, #28 8013f2a: 46bd mov sp, r7 8013f2c: bc80 pop {r7} 8013f2e: 4770 bx lr 8013f30: 40012c00 .word 0x40012c00 08013f34 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8013f34: b480 push {r7} 8013f36: b087 sub sp, #28 8013f38: af00 add r7, sp, #0 8013f3a: 60f8 str r0, [r7, #12] 8013f3c: 60b9 str r1, [r7, #8] 8013f3e: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 8013f40: 68fb ldr r3, [r7, #12] 8013f42: 6a1b ldr r3, [r3, #32] 8013f44: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 8013f46: 68fb ldr r3, [r7, #12] 8013f48: 6a1b ldr r3, [r3, #32] 8013f4a: f023 0201 bic.w r2, r3, #1 8013f4e: 68fb ldr r3, [r7, #12] 8013f50: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8013f52: 68fb ldr r3, [r7, #12] 8013f54: 699b ldr r3, [r3, #24] 8013f56: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 8013f58: 693b ldr r3, [r7, #16] 8013f5a: f023 03f0 bic.w r3, r3, #240 @ 0xf0 8013f5e: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 8013f60: 687b ldr r3, [r7, #4] 8013f62: 011b lsls r3, r3, #4 8013f64: 693a ldr r2, [r7, #16] 8013f66: 4313 orrs r3, r2 8013f68: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 8013f6a: 697b ldr r3, [r7, #20] 8013f6c: f023 030a bic.w r3, r3, #10 8013f70: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 8013f72: 697a ldr r2, [r7, #20] 8013f74: 68bb ldr r3, [r7, #8] 8013f76: 4313 orrs r3, r2 8013f78: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 8013f7a: 68fb ldr r3, [r7, #12] 8013f7c: 693a ldr r2, [r7, #16] 8013f7e: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8013f80: 68fb ldr r3, [r7, #12] 8013f82: 697a ldr r2, [r7, #20] 8013f84: 621a str r2, [r3, #32] } 8013f86: bf00 nop 8013f88: 371c adds r7, #28 8013f8a: 46bd mov sp, r7 8013f8c: bc80 pop {r7} 8013f8e: 4770 bx lr 08013f90 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8013f90: b480 push {r7} 8013f92: b087 sub sp, #28 8013f94: af00 add r7, sp, #0 8013f96: 60f8 str r0, [r7, #12] 8013f98: 60b9 str r1, [r7, #8] 8013f9a: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; 8013f9c: 68fb ldr r3, [r7, #12] 8013f9e: 6a1b ldr r3, [r3, #32] 8013fa0: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; 8013fa2: 68fb ldr r3, [r7, #12] 8013fa4: 6a1b ldr r3, [r3, #32] 8013fa6: f023 0210 bic.w r2, r3, #16 8013faa: 68fb ldr r3, [r7, #12] 8013fac: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8013fae: 68fb ldr r3, [r7, #12] 8013fb0: 699b ldr r3, [r3, #24] 8013fb2: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 8013fb4: 693b ldr r3, [r7, #16] 8013fb6: f423 4370 bic.w r3, r3, #61440 @ 0xf000 8013fba: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); 8013fbc: 687b ldr r3, [r7, #4] 8013fbe: 031b lsls r3, r3, #12 8013fc0: 693a ldr r2, [r7, #16] 8013fc2: 4313 orrs r3, r2 8013fc4: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 8013fc6: 697b ldr r3, [r7, #20] 8013fc8: f023 03a0 bic.w r3, r3, #160 @ 0xa0 8013fcc: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); 8013fce: 68bb ldr r3, [r7, #8] 8013fd0: 011b lsls r3, r3, #4 8013fd2: 697a ldr r2, [r7, #20] 8013fd4: 4313 orrs r3, r2 8013fd6: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 8013fd8: 68fb ldr r3, [r7, #12] 8013fda: 693a ldr r2, [r7, #16] 8013fdc: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8013fde: 68fb ldr r3, [r7, #12] 8013fe0: 697a ldr r2, [r7, #20] 8013fe2: 621a str r2, [r3, #32] } 8013fe4: bf00 nop 8013fe6: 371c adds r7, #28 8013fe8: 46bd mov sp, r7 8013fea: bc80 pop {r7} 8013fec: 4770 bx lr 08013fee : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 8013fee: b480 push {r7} 8013ff0: b085 sub sp, #20 8013ff2: af00 add r7, sp, #0 8013ff4: 6078 str r0, [r7, #4] 8013ff6: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 8013ff8: 687b ldr r3, [r7, #4] 8013ffa: 689b ldr r3, [r3, #8] 8013ffc: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 8013ffe: 68fb ldr r3, [r7, #12] 8014000: f023 0370 bic.w r3, r3, #112 @ 0x70 8014004: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 8014006: 683a ldr r2, [r7, #0] 8014008: 68fb ldr r3, [r7, #12] 801400a: 4313 orrs r3, r2 801400c: f043 0307 orr.w r3, r3, #7 8014010: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8014012: 687b ldr r3, [r7, #4] 8014014: 68fa ldr r2, [r7, #12] 8014016: 609a str r2, [r3, #8] } 8014018: bf00 nop 801401a: 3714 adds r7, #20 801401c: 46bd mov sp, r7 801401e: bc80 pop {r7} 8014020: 4770 bx lr 08014022 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 8014022: b480 push {r7} 8014024: b087 sub sp, #28 8014026: af00 add r7, sp, #0 8014028: 60f8 str r0, [r7, #12] 801402a: 60b9 str r1, [r7, #8] 801402c: 607a str r2, [r7, #4] 801402e: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 8014030: 68fb ldr r3, [r7, #12] 8014032: 689b ldr r3, [r3, #8] 8014034: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8014036: 697b ldr r3, [r7, #20] 8014038: f423 437f bic.w r3, r3, #65280 @ 0xff00 801403c: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 801403e: 683b ldr r3, [r7, #0] 8014040: 021a lsls r2, r3, #8 8014042: 687b ldr r3, [r7, #4] 8014044: 431a orrs r2, r3 8014046: 68bb ldr r3, [r7, #8] 8014048: 4313 orrs r3, r2 801404a: 697a ldr r2, [r7, #20] 801404c: 4313 orrs r3, r2 801404e: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8014050: 68fb ldr r3, [r7, #12] 8014052: 697a ldr r2, [r7, #20] 8014054: 609a str r2, [r3, #8] } 8014056: bf00 nop 8014058: 371c adds r7, #28 801405a: 46bd mov sp, r7 801405c: bc80 pop {r7} 801405e: 4770 bx lr 08014060 : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 8014060: b480 push {r7} 8014062: b087 sub sp, #28 8014064: af00 add r7, sp, #0 8014066: 60f8 str r0, [r7, #12] 8014068: 60b9 str r1, [r7, #8] 801406a: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 801406c: 68bb ldr r3, [r7, #8] 801406e: f003 031f and.w r3, r3, #31 8014072: 2201 movs r2, #1 8014074: fa02 f303 lsl.w r3, r2, r3 8014078: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 801407a: 68fb ldr r3, [r7, #12] 801407c: 6a1a ldr r2, [r3, #32] 801407e: 697b ldr r3, [r7, #20] 8014080: 43db mvns r3, r3 8014082: 401a ands r2, r3 8014084: 68fb ldr r3, [r7, #12] 8014086: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 8014088: 68fb ldr r3, [r7, #12] 801408a: 6a1a ldr r2, [r3, #32] 801408c: 68bb ldr r3, [r7, #8] 801408e: f003 031f and.w r3, r3, #31 8014092: 6879 ldr r1, [r7, #4] 8014094: fa01 f303 lsl.w r3, r1, r3 8014098: 431a orrs r2, r3 801409a: 68fb ldr r3, [r7, #12] 801409c: 621a str r2, [r3, #32] } 801409e: bf00 nop 80140a0: 371c adds r7, #28 80140a2: 46bd mov sp, r7 80140a4: bc80 pop {r7} 80140a6: 4770 bx lr 080140a8 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 80140a8: b480 push {r7} 80140aa: b085 sub sp, #20 80140ac: af00 add r7, sp, #0 80140ae: 6078 str r0, [r7, #4] 80140b0: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 80140b2: 687b ldr r3, [r7, #4] 80140b4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80140b8: 2b01 cmp r3, #1 80140ba: d101 bne.n 80140c0 80140bc: 2302 movs r3, #2 80140be: e04b b.n 8014158 80140c0: 687b ldr r3, [r7, #4] 80140c2: 2201 movs r2, #1 80140c4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 80140c8: 687b ldr r3, [r7, #4] 80140ca: 2202 movs r2, #2 80140cc: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 80140d0: 687b ldr r3, [r7, #4] 80140d2: 681b ldr r3, [r3, #0] 80140d4: 685b ldr r3, [r3, #4] 80140d6: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 80140d8: 687b ldr r3, [r7, #4] 80140da: 681b ldr r3, [r3, #0] 80140dc: 689b ldr r3, [r3, #8] 80140de: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 80140e0: 68fb ldr r3, [r7, #12] 80140e2: f023 0370 bic.w r3, r3, #112 @ 0x70 80140e6: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 80140e8: 683b ldr r3, [r7, #0] 80140ea: 681b ldr r3, [r3, #0] 80140ec: 68fa ldr r2, [r7, #12] 80140ee: 4313 orrs r3, r2 80140f0: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 80140f2: 687b ldr r3, [r7, #4] 80140f4: 681b ldr r3, [r3, #0] 80140f6: 68fa ldr r2, [r7, #12] 80140f8: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 80140fa: 687b ldr r3, [r7, #4] 80140fc: 681b ldr r3, [r3, #0] 80140fe: 4a19 ldr r2, [pc, #100] @ (8014164 ) 8014100: 4293 cmp r3, r2 8014102: d013 beq.n 801412c 8014104: 687b ldr r3, [r7, #4] 8014106: 681b ldr r3, [r3, #0] 8014108: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 801410c: d00e beq.n 801412c 801410e: 687b ldr r3, [r7, #4] 8014110: 681b ldr r3, [r3, #0] 8014112: 4a15 ldr r2, [pc, #84] @ (8014168 ) 8014114: 4293 cmp r3, r2 8014116: d009 beq.n 801412c 8014118: 687b ldr r3, [r7, #4] 801411a: 681b ldr r3, [r3, #0] 801411c: 4a13 ldr r2, [pc, #76] @ (801416c ) 801411e: 4293 cmp r3, r2 8014120: d004 beq.n 801412c 8014122: 687b ldr r3, [r7, #4] 8014124: 681b ldr r3, [r3, #0] 8014126: 4a12 ldr r2, [pc, #72] @ (8014170 ) 8014128: 4293 cmp r3, r2 801412a: d10c bne.n 8014146 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 801412c: 68bb ldr r3, [r7, #8] 801412e: f023 0380 bic.w r3, r3, #128 @ 0x80 8014132: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 8014134: 683b ldr r3, [r7, #0] 8014136: 685b ldr r3, [r3, #4] 8014138: 68ba ldr r2, [r7, #8] 801413a: 4313 orrs r3, r2 801413c: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 801413e: 687b ldr r3, [r7, #4] 8014140: 681b ldr r3, [r3, #0] 8014142: 68ba ldr r2, [r7, #8] 8014144: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 8014146: 687b ldr r3, [r7, #4] 8014148: 2201 movs r2, #1 801414a: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 801414e: 687b ldr r3, [r7, #4] 8014150: 2200 movs r2, #0 8014152: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 8014156: 2300 movs r3, #0 } 8014158: 4618 mov r0, r3 801415a: 3714 adds r7, #20 801415c: 46bd mov sp, r7 801415e: bc80 pop {r7} 8014160: 4770 bx lr 8014162: bf00 nop 8014164: 40012c00 .word 0x40012c00 8014168: 40000400 .word 0x40000400 801416c: 40000800 .word 0x40000800 8014170: 40000c00 .word 0x40000c00 08014174 : * @brief Commutation callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { 8014174: b480 push {r7} 8014176: b083 sub sp, #12 8014178: af00 add r7, sp, #0 801417a: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } 801417c: bf00 nop 801417e: 370c adds r7, #12 8014180: 46bd mov sp, r7 8014182: bc80 pop {r7} 8014184: 4770 bx lr 08014186 : * @brief Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 8014186: b480 push {r7} 8014188: b083 sub sp, #12 801418a: af00 add r7, sp, #0 801418c: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } 801418e: bf00 nop 8014190: 370c adds r7, #12 8014192: 46bd mov sp, r7 8014194: bc80 pop {r7} 8014196: 4770 bx lr 08014198 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 8014198: b580 push {r7, lr} 801419a: b082 sub sp, #8 801419c: af00 add r7, sp, #0 801419e: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 80141a0: 687b ldr r3, [r7, #4] 80141a2: 2b00 cmp r3, #0 80141a4: d101 bne.n 80141aa { return HAL_ERROR; 80141a6: 2301 movs r3, #1 80141a8: e042 b.n 8014230 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 80141aa: 687b ldr r3, [r7, #4] 80141ac: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 80141b0: b2db uxtb r3, r3 80141b2: 2b00 cmp r3, #0 80141b4: d106 bne.n 80141c4 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 80141b6: 687b ldr r3, [r7, #4] 80141b8: 2200 movs r2, #0 80141ba: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 80141be: 6878 ldr r0, [r7, #4] 80141c0: f7fa ffc2 bl 800f148 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 80141c4: 687b ldr r3, [r7, #4] 80141c6: 2224 movs r2, #36 @ 0x24 80141c8: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 80141cc: 687b ldr r3, [r7, #4] 80141ce: 681b ldr r3, [r3, #0] 80141d0: 68da ldr r2, [r3, #12] 80141d2: 687b ldr r3, [r7, #4] 80141d4: 681b ldr r3, [r3, #0] 80141d6: f422 5200 bic.w r2, r2, #8192 @ 0x2000 80141da: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 80141dc: 6878 ldr r0, [r7, #4] 80141de: f001 f903 bl 80153e8 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80141e2: 687b ldr r3, [r7, #4] 80141e4: 681b ldr r3, [r3, #0] 80141e6: 691a ldr r2, [r3, #16] 80141e8: 687b ldr r3, [r7, #4] 80141ea: 681b ldr r3, [r3, #0] 80141ec: f422 4290 bic.w r2, r2, #18432 @ 0x4800 80141f0: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80141f2: 687b ldr r3, [r7, #4] 80141f4: 681b ldr r3, [r3, #0] 80141f6: 695a ldr r2, [r3, #20] 80141f8: 687b ldr r3, [r7, #4] 80141fa: 681b ldr r3, [r3, #0] 80141fc: f022 022a bic.w r2, r2, #42 @ 0x2a 8014200: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 8014202: 687b ldr r3, [r7, #4] 8014204: 681b ldr r3, [r3, #0] 8014206: 68da ldr r2, [r3, #12] 8014208: 687b ldr r3, [r7, #4] 801420a: 681b ldr r3, [r3, #0] 801420c: f442 5200 orr.w r2, r2, #8192 @ 0x2000 8014210: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8014212: 687b ldr r3, [r7, #4] 8014214: 2200 movs r2, #0 8014216: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 8014218: 687b ldr r3, [r7, #4] 801421a: 2220 movs r2, #32 801421c: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8014220: 687b ldr r3, [r7, #4] 8014222: 2220 movs r2, #32 8014224: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 8014228: 687b ldr r3, [r7, #4] 801422a: 2200 movs r2, #0 801422c: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 801422e: 2300 movs r3, #0 } 8014230: 4618 mov r0, r3 8014232: 3708 adds r7, #8 8014234: 46bd mov sp, r7 8014236: bd80 pop {r7, pc} 08014238 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { 8014238: b580 push {r7, lr} 801423a: b08c sub sp, #48 @ 0x30 801423c: af00 add r7, sp, #0 801423e: 60f8 str r0, [r7, #12] 8014240: 60b9 str r1, [r7, #8] 8014242: 4613 mov r3, r2 8014244: 80fb strh r3, [r7, #6] const uint32_t *tmp; /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 8014246: 68fb ldr r3, [r7, #12] 8014248: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 801424c: b2db uxtb r3, r3 801424e: 2b20 cmp r3, #32 8014250: d156 bne.n 8014300 { if ((pData == NULL) || (Size == 0U)) 8014252: 68bb ldr r3, [r7, #8] 8014254: 2b00 cmp r3, #0 8014256: d002 beq.n 801425e 8014258: 88fb ldrh r3, [r7, #6] 801425a: 2b00 cmp r3, #0 801425c: d101 bne.n 8014262 { return HAL_ERROR; 801425e: 2301 movs r3, #1 8014260: e04f b.n 8014302 } huart->pTxBuffPtr = pData; 8014262: 68ba ldr r2, [r7, #8] 8014264: 68fb ldr r3, [r7, #12] 8014266: 621a str r2, [r3, #32] huart->TxXferSize = Size; 8014268: 68fb ldr r3, [r7, #12] 801426a: 88fa ldrh r2, [r7, #6] 801426c: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 801426e: 68fb ldr r3, [r7, #12] 8014270: 88fa ldrh r2, [r7, #6] 8014272: 84da strh r2, [r3, #38] @ 0x26 huart->ErrorCode = HAL_UART_ERROR_NONE; 8014274: 68fb ldr r3, [r7, #12] 8014276: 2200 movs r2, #0 8014278: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; 801427a: 68fb ldr r3, [r7, #12] 801427c: 2221 movs r2, #33 @ 0x21 801427e: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Set the UART DMA transfer complete callback */ huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8014282: 68fb ldr r3, [r7, #12] 8014284: 6b9b ldr r3, [r3, #56] @ 0x38 8014286: 4a21 ldr r2, [pc, #132] @ (801430c ) 8014288: 629a str r2, [r3, #40] @ 0x28 /* Set the UART DMA Half transfer complete callback */ huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 801428a: 68fb ldr r3, [r7, #12] 801428c: 6b9b ldr r3, [r3, #56] @ 0x38 801428e: 4a20 ldr r2, [pc, #128] @ (8014310 ) 8014290: 62da str r2, [r3, #44] @ 0x2c /* Set the DMA error callback */ huart->hdmatx->XferErrorCallback = UART_DMAError; 8014292: 68fb ldr r3, [r7, #12] 8014294: 6b9b ldr r3, [r3, #56] @ 0x38 8014296: 4a1f ldr r2, [pc, #124] @ (8014314 ) 8014298: 631a str r2, [r3, #48] @ 0x30 /* Set the DMA abort callback */ huart->hdmatx->XferAbortCallback = NULL; 801429a: 68fb ldr r3, [r7, #12] 801429c: 6b9b ldr r3, [r3, #56] @ 0x38 801429e: 2200 movs r2, #0 80142a0: 635a str r2, [r3, #52] @ 0x34 /* Enable the UART transmit DMA channel */ tmp = (const uint32_t *)&pData; 80142a2: f107 0308 add.w r3, r7, #8 80142a6: 62fb str r3, [r7, #44] @ 0x2c HAL_DMA_Start_IT(huart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size); 80142a8: 68fb ldr r3, [r7, #12] 80142aa: 6b98 ldr r0, [r3, #56] @ 0x38 80142ac: 6afb ldr r3, [r7, #44] @ 0x2c 80142ae: 6819 ldr r1, [r3, #0] 80142b0: 68fb ldr r3, [r7, #12] 80142b2: 681b ldr r3, [r3, #0] 80142b4: 3304 adds r3, #4 80142b6: 461a mov r2, r3 80142b8: 88fb ldrh r3, [r7, #6] 80142ba: f7fc ffa5 bl 8011208 /* Clear the TC flag in the SR register by writing 0 to it */ __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 80142be: 68fb ldr r3, [r7, #12] 80142c0: 681b ldr r3, [r3, #0] 80142c2: f06f 0240 mvn.w r2, #64 @ 0x40 80142c6: 601a str r2, [r3, #0] /* Enable the DMA transfer for transmit request by setting the DMAT bit in the UART CR3 register */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 80142c8: 68fb ldr r3, [r7, #12] 80142ca: 681b ldr r3, [r3, #0] 80142cc: 3314 adds r3, #20 80142ce: 61bb str r3, [r7, #24] */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80142d0: 69bb ldr r3, [r7, #24] 80142d2: e853 3f00 ldrex r3, [r3] 80142d6: 617b str r3, [r7, #20] return(result); 80142d8: 697b ldr r3, [r7, #20] 80142da: f043 0380 orr.w r3, r3, #128 @ 0x80 80142de: 62bb str r3, [r7, #40] @ 0x28 80142e0: 68fb ldr r3, [r7, #12] 80142e2: 681b ldr r3, [r3, #0] 80142e4: 3314 adds r3, #20 80142e6: 6aba ldr r2, [r7, #40] @ 0x28 80142e8: 627a str r2, [r7, #36] @ 0x24 80142ea: 623b str r3, [r7, #32] */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80142ec: 6a39 ldr r1, [r7, #32] 80142ee: 6a7a ldr r2, [r7, #36] @ 0x24 80142f0: e841 2300 strex r3, r2, [r1] 80142f4: 61fb str r3, [r7, #28] return(result); 80142f6: 69fb ldr r3, [r7, #28] 80142f8: 2b00 cmp r3, #0 80142fa: d1e5 bne.n 80142c8 return HAL_OK; 80142fc: 2300 movs r3, #0 80142fe: e000 b.n 8014302 } else { return HAL_BUSY; 8014300: 2302 movs r3, #2 } } 8014302: 4618 mov r0, r3 8014304: 3730 adds r7, #48 @ 0x30 8014306: 46bd mov sp, r7 8014308: bd80 pop {r7, pc} 801430a: bf00 nop 801430c: 08014c0d .word 0x08014c0d 8014310: 08014ca7 .word 0x08014ca7 8014314: 08014e2b .word 0x08014e2b 08014318 : * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). * @param Size Amount of data elements (uint8_t or uint16_t) to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8014318: b580 push {r7, lr} 801431a: b08c sub sp, #48 @ 0x30 801431c: af00 add r7, sp, #0 801431e: 60f8 str r0, [r7, #12] 8014320: 60b9 str r1, [r7, #8] 8014322: 4613 mov r3, r2 8014324: 80fb strh r3, [r7, #6] HAL_StatusTypeDef status; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) 8014326: 68fb ldr r3, [r7, #12] 8014328: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 801432c: b2db uxtb r3, r3 801432e: 2b20 cmp r3, #32 8014330: d14a bne.n 80143c8 { if ((pData == NULL) || (Size == 0U)) 8014332: 68bb ldr r3, [r7, #8] 8014334: 2b00 cmp r3, #0 8014336: d002 beq.n 801433e 8014338: 88fb ldrh r3, [r7, #6] 801433a: 2b00 cmp r3, #0 801433c: d101 bne.n 8014342 { return HAL_ERROR; 801433e: 2301 movs r3, #1 8014340: e043 b.n 80143ca } /* Set Reception type to reception till IDLE Event*/ huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; 8014342: 68fb ldr r3, [r7, #12] 8014344: 2201 movs r2, #1 8014346: 631a str r2, [r3, #48] @ 0x30 huart->RxEventType = HAL_UART_RXEVENT_TC; 8014348: 68fb ldr r3, [r7, #12] 801434a: 2200 movs r2, #0 801434c: 635a str r2, [r3, #52] @ 0x34 status = UART_Start_Receive_IT(huart, pData, Size); 801434e: 88fb ldrh r3, [r7, #6] 8014350: 461a mov r2, r3 8014352: 68b9 ldr r1, [r7, #8] 8014354: 68f8 ldr r0, [r7, #12] 8014356: f000 fdb2 bl 8014ebe 801435a: 4603 mov r3, r0 801435c: f887 302f strb.w r3, [r7, #47] @ 0x2f /* Check Rx process has been successfully started */ if (status == HAL_OK) 8014360: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 8014364: 2b00 cmp r3, #0 8014366: d12c bne.n 80143c2 { if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8014368: 68fb ldr r3, [r7, #12] 801436a: 6b1b ldr r3, [r3, #48] @ 0x30 801436c: 2b01 cmp r3, #1 801436e: d125 bne.n 80143bc { __HAL_UART_CLEAR_IDLEFLAG(huart); 8014370: 2300 movs r3, #0 8014372: 613b str r3, [r7, #16] 8014374: 68fb ldr r3, [r7, #12] 8014376: 681b ldr r3, [r3, #0] 8014378: 681b ldr r3, [r3, #0] 801437a: 613b str r3, [r7, #16] 801437c: 68fb ldr r3, [r7, #12] 801437e: 681b ldr r3, [r3, #0] 8014380: 685b ldr r3, [r3, #4] 8014382: 613b str r3, [r7, #16] 8014384: 693b ldr r3, [r7, #16] ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8014386: 68fb ldr r3, [r7, #12] 8014388: 681b ldr r3, [r3, #0] 801438a: 330c adds r3, #12 801438c: 61bb str r3, [r7, #24] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 801438e: 69bb ldr r3, [r7, #24] 8014390: e853 3f00 ldrex r3, [r3] 8014394: 617b str r3, [r7, #20] return(result); 8014396: 697b ldr r3, [r7, #20] 8014398: f043 0310 orr.w r3, r3, #16 801439c: 62bb str r3, [r7, #40] @ 0x28 801439e: 68fb ldr r3, [r7, #12] 80143a0: 681b ldr r3, [r3, #0] 80143a2: 330c adds r3, #12 80143a4: 6aba ldr r2, [r7, #40] @ 0x28 80143a6: 627a str r2, [r7, #36] @ 0x24 80143a8: 623b str r3, [r7, #32] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80143aa: 6a39 ldr r1, [r7, #32] 80143ac: 6a7a ldr r2, [r7, #36] @ 0x24 80143ae: e841 2300 strex r3, r2, [r1] 80143b2: 61fb str r3, [r7, #28] return(result); 80143b4: 69fb ldr r3, [r7, #28] 80143b6: 2b00 cmp r3, #0 80143b8: d1e5 bne.n 8014386 80143ba: e002 b.n 80143c2 { /* In case of errors already pending when reception is started, Interrupts may have already been raised and lead to reception abortion. (Overrun error for instance). In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ status = HAL_ERROR; 80143bc: 2301 movs r3, #1 80143be: f887 302f strb.w r3, [r7, #47] @ 0x2f } } return status; 80143c2: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 80143c6: e000 b.n 80143ca } else { return HAL_BUSY; 80143c8: 2302 movs r3, #2 } } 80143ca: 4618 mov r0, r3 80143cc: 3730 adds r7, #48 @ 0x30 80143ce: 46bd mov sp, r7 80143d0: bd80 pop {r7, pc} 080143d2 : * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). * @param Size Amount of data elements (uint8_t or uint16_t) to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 80143d2: b580 push {r7, lr} 80143d4: b08c sub sp, #48 @ 0x30 80143d6: af00 add r7, sp, #0 80143d8: 60f8 str r0, [r7, #12] 80143da: 60b9 str r1, [r7, #8] 80143dc: 4613 mov r3, r2 80143de: 80fb strh r3, [r7, #6] HAL_StatusTypeDef status; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) 80143e0: 68fb ldr r3, [r7, #12] 80143e2: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 80143e6: b2db uxtb r3, r3 80143e8: 2b20 cmp r3, #32 80143ea: d146 bne.n 801447a { if ((pData == NULL) || (Size == 0U)) 80143ec: 68bb ldr r3, [r7, #8] 80143ee: 2b00 cmp r3, #0 80143f0: d002 beq.n 80143f8 80143f2: 88fb ldrh r3, [r7, #6] 80143f4: 2b00 cmp r3, #0 80143f6: d101 bne.n 80143fc { return HAL_ERROR; 80143f8: 2301 movs r3, #1 80143fa: e03f b.n 801447c } /* Set Reception type to reception till IDLE Event*/ huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; 80143fc: 68fb ldr r3, [r7, #12] 80143fe: 2201 movs r2, #1 8014400: 631a str r2, [r3, #48] @ 0x30 huart->RxEventType = HAL_UART_RXEVENT_TC; 8014402: 68fb ldr r3, [r7, #12] 8014404: 2200 movs r2, #0 8014406: 635a str r2, [r3, #52] @ 0x34 status = UART_Start_Receive_DMA(huart, pData, Size); 8014408: 88fb ldrh r3, [r7, #6] 801440a: 461a mov r2, r3 801440c: 68b9 ldr r1, [r7, #8] 801440e: 68f8 ldr r0, [r7, #12] 8014410: f000 fd8e bl 8014f30 8014414: 4603 mov r3, r0 8014416: f887 302f strb.w r3, [r7, #47] @ 0x2f /* Check Rx process has been successfully started */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 801441a: 68fb ldr r3, [r7, #12] 801441c: 6b1b ldr r3, [r3, #48] @ 0x30 801441e: 2b01 cmp r3, #1 8014420: d125 bne.n 801446e { __HAL_UART_CLEAR_IDLEFLAG(huart); 8014422: 2300 movs r3, #0 8014424: 613b str r3, [r7, #16] 8014426: 68fb ldr r3, [r7, #12] 8014428: 681b ldr r3, [r3, #0] 801442a: 681b ldr r3, [r3, #0] 801442c: 613b str r3, [r7, #16] 801442e: 68fb ldr r3, [r7, #12] 8014430: 681b ldr r3, [r3, #0] 8014432: 685b ldr r3, [r3, #4] 8014434: 613b str r3, [r7, #16] 8014436: 693b ldr r3, [r7, #16] ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8014438: 68fb ldr r3, [r7, #12] 801443a: 681b ldr r3, [r3, #0] 801443c: 330c adds r3, #12 801443e: 61bb str r3, [r7, #24] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014440: 69bb ldr r3, [r7, #24] 8014442: e853 3f00 ldrex r3, [r3] 8014446: 617b str r3, [r7, #20] return(result); 8014448: 697b ldr r3, [r7, #20] 801444a: f043 0310 orr.w r3, r3, #16 801444e: 62bb str r3, [r7, #40] @ 0x28 8014450: 68fb ldr r3, [r7, #12] 8014452: 681b ldr r3, [r3, #0] 8014454: 330c adds r3, #12 8014456: 6aba ldr r2, [r7, #40] @ 0x28 8014458: 627a str r2, [r7, #36] @ 0x24 801445a: 623b str r3, [r7, #32] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801445c: 6a39 ldr r1, [r7, #32] 801445e: 6a7a ldr r2, [r7, #36] @ 0x24 8014460: e841 2300 strex r3, r2, [r1] 8014464: 61fb str r3, [r7, #28] return(result); 8014466: 69fb ldr r3, [r7, #28] 8014468: 2b00 cmp r3, #0 801446a: d1e5 bne.n 8014438 801446c: e002 b.n 8014474 { /* In case of errors already pending when reception is started, Interrupts may have already been raised and lead to reception abortion. (Overrun error for instance). In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ status = HAL_ERROR; 801446e: 2301 movs r3, #1 8014470: f887 302f strb.w r3, [r7, #47] @ 0x2f } return status; 8014474: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 8014478: e000 b.n 801447c } else { return HAL_BUSY; 801447a: 2302 movs r3, #2 } } 801447c: 4618 mov r0, r3 801447e: 3730 adds r7, #48 @ 0x30 8014480: 46bd mov sp, r7 8014482: bd80 pop {r7, pc} 08014484 : * - Set handle State to READY * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) { 8014484: b580 push {r7, lr} 8014486: b08e sub sp, #56 @ 0x38 8014488: af00 add r7, sp, #0 801448a: 6078 str r0, [r7, #4] /* Disable TXEIE and TCIE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 801448c: 687b ldr r3, [r7, #4] 801448e: 681b ldr r3, [r3, #0] 8014490: 330c adds r3, #12 8014492: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014494: 6a3b ldr r3, [r7, #32] 8014496: e853 3f00 ldrex r3, [r3] 801449a: 61fb str r3, [r7, #28] return(result); 801449c: 69fb ldr r3, [r7, #28] 801449e: f023 03c0 bic.w r3, r3, #192 @ 0xc0 80144a2: 637b str r3, [r7, #52] @ 0x34 80144a4: 687b ldr r3, [r7, #4] 80144a6: 681b ldr r3, [r3, #0] 80144a8: 330c adds r3, #12 80144aa: 6b7a ldr r2, [r7, #52] @ 0x34 80144ac: 62fa str r2, [r7, #44] @ 0x2c 80144ae: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80144b0: 6ab9 ldr r1, [r7, #40] @ 0x28 80144b2: 6afa ldr r2, [r7, #44] @ 0x2c 80144b4: e841 2300 strex r3, r2, [r1] 80144b8: 627b str r3, [r7, #36] @ 0x24 return(result); 80144ba: 6a7b ldr r3, [r7, #36] @ 0x24 80144bc: 2b00 cmp r3, #0 80144be: d1e5 bne.n 801448c /* Disable the UART DMA Tx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 80144c0: 687b ldr r3, [r7, #4] 80144c2: 681b ldr r3, [r3, #0] 80144c4: 695b ldr r3, [r3, #20] 80144c6: f003 0380 and.w r3, r3, #128 @ 0x80 80144ca: 2b00 cmp r3, #0 80144cc: d036 beq.n 801453c { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 80144ce: 687b ldr r3, [r7, #4] 80144d0: 681b ldr r3, [r3, #0] 80144d2: 3314 adds r3, #20 80144d4: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80144d6: 68fb ldr r3, [r7, #12] 80144d8: e853 3f00 ldrex r3, [r3] 80144dc: 60bb str r3, [r7, #8] return(result); 80144de: 68bb ldr r3, [r7, #8] 80144e0: f023 0380 bic.w r3, r3, #128 @ 0x80 80144e4: 633b str r3, [r7, #48] @ 0x30 80144e6: 687b ldr r3, [r7, #4] 80144e8: 681b ldr r3, [r3, #0] 80144ea: 3314 adds r3, #20 80144ec: 6b3a ldr r2, [r7, #48] @ 0x30 80144ee: 61ba str r2, [r7, #24] 80144f0: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80144f2: 6979 ldr r1, [r7, #20] 80144f4: 69ba ldr r2, [r7, #24] 80144f6: e841 2300 strex r3, r2, [r1] 80144fa: 613b str r3, [r7, #16] return(result); 80144fc: 693b ldr r3, [r7, #16] 80144fe: 2b00 cmp r3, #0 8014500: d1e5 bne.n 80144ce /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ if (huart->hdmatx != NULL) 8014502: 687b ldr r3, [r7, #4] 8014504: 6b9b ldr r3, [r3, #56] @ 0x38 8014506: 2b00 cmp r3, #0 8014508: d018 beq.n 801453c { /* Set the UART DMA Abort callback to Null. No call back execution at end of DMA abort procedure */ huart->hdmatx->XferAbortCallback = NULL; 801450a: 687b ldr r3, [r7, #4] 801450c: 6b9b ldr r3, [r3, #56] @ 0x38 801450e: 2200 movs r2, #0 8014510: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) 8014512: 687b ldr r3, [r7, #4] 8014514: 6b9b ldr r3, [r3, #56] @ 0x38 8014516: 4618 mov r0, r3 8014518: f7fc fed6 bl 80112c8 801451c: 4603 mov r3, r0 801451e: 2b00 cmp r3, #0 8014520: d00c beq.n 801453c { if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) 8014522: 687b ldr r3, [r7, #4] 8014524: 6b9b ldr r3, [r3, #56] @ 0x38 8014526: 4618 mov r0, r3 8014528: f7fd fa4e bl 80119c8 801452c: 4603 mov r3, r0 801452e: 2b20 cmp r3, #32 8014530: d104 bne.n 801453c { /* Set error code to DMA */ huart->ErrorCode = HAL_UART_ERROR_DMA; 8014532: 687b ldr r3, [r7, #4] 8014534: 2210 movs r2, #16 8014536: 645a str r2, [r3, #68] @ 0x44 return HAL_TIMEOUT; 8014538: 2303 movs r3, #3 801453a: e007 b.n 801454c } } } /* Reset Tx transfer counter */ huart->TxXferCount = 0x00U; 801453c: 687b ldr r3, [r7, #4] 801453e: 2200 movs r2, #0 8014540: 84da strh r2, [r3, #38] @ 0x26 /* Restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8014542: 687b ldr r3, [r7, #4] 8014544: 2220 movs r2, #32 8014546: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_OK; 801454a: 2300 movs r3, #0 } 801454c: 4618 mov r0, r3 801454e: 3738 adds r7, #56 @ 0x38 8014550: 46bd mov sp, r7 8014552: bd80 pop {r7, pc} 08014554 : * - Set handle State to READY * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) { 8014554: b580 push {r7, lr} 8014556: b09a sub sp, #104 @ 0x68 8014558: af00 add r7, sp, #0 801455a: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 801455c: 687b ldr r3, [r7, #4] 801455e: 681b ldr r3, [r3, #0] 8014560: 330c adds r3, #12 8014562: 64bb str r3, [r7, #72] @ 0x48 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014564: 6cbb ldr r3, [r7, #72] @ 0x48 8014566: e853 3f00 ldrex r3, [r3] 801456a: 647b str r3, [r7, #68] @ 0x44 return(result); 801456c: 6c7b ldr r3, [r7, #68] @ 0x44 801456e: f423 7390 bic.w r3, r3, #288 @ 0x120 8014572: 667b str r3, [r7, #100] @ 0x64 8014574: 687b ldr r3, [r7, #4] 8014576: 681b ldr r3, [r3, #0] 8014578: 330c adds r3, #12 801457a: 6e7a ldr r2, [r7, #100] @ 0x64 801457c: 657a str r2, [r7, #84] @ 0x54 801457e: 653b str r3, [r7, #80] @ 0x50 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014580: 6d39 ldr r1, [r7, #80] @ 0x50 8014582: 6d7a ldr r2, [r7, #84] @ 0x54 8014584: e841 2300 strex r3, r2, [r1] 8014588: 64fb str r3, [r7, #76] @ 0x4c return(result); 801458a: 6cfb ldr r3, [r7, #76] @ 0x4c 801458c: 2b00 cmp r3, #0 801458e: d1e5 bne.n 801455c ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8014590: 687b ldr r3, [r7, #4] 8014592: 681b ldr r3, [r3, #0] 8014594: 3314 adds r3, #20 8014596: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014598: 6b7b ldr r3, [r7, #52] @ 0x34 801459a: e853 3f00 ldrex r3, [r3] 801459e: 633b str r3, [r7, #48] @ 0x30 return(result); 80145a0: 6b3b ldr r3, [r7, #48] @ 0x30 80145a2: f023 0301 bic.w r3, r3, #1 80145a6: 663b str r3, [r7, #96] @ 0x60 80145a8: 687b ldr r3, [r7, #4] 80145aa: 681b ldr r3, [r3, #0] 80145ac: 3314 adds r3, #20 80145ae: 6e3a ldr r2, [r7, #96] @ 0x60 80145b0: 643a str r2, [r7, #64] @ 0x40 80145b2: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80145b4: 6bf9 ldr r1, [r7, #60] @ 0x3c 80145b6: 6c3a ldr r2, [r7, #64] @ 0x40 80145b8: e841 2300 strex r3, r2, [r1] 80145bc: 63bb str r3, [r7, #56] @ 0x38 return(result); 80145be: 6bbb ldr r3, [r7, #56] @ 0x38 80145c0: 2b00 cmp r3, #0 80145c2: d1e5 bne.n 8014590 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 80145c4: 687b ldr r3, [r7, #4] 80145c6: 6b1b ldr r3, [r3, #48] @ 0x30 80145c8: 2b01 cmp r3, #1 80145ca: d119 bne.n 8014600 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); 80145cc: 687b ldr r3, [r7, #4] 80145ce: 681b ldr r3, [r3, #0] 80145d0: 330c adds r3, #12 80145d2: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80145d4: 6a3b ldr r3, [r7, #32] 80145d6: e853 3f00 ldrex r3, [r3] 80145da: 61fb str r3, [r7, #28] return(result); 80145dc: 69fb ldr r3, [r7, #28] 80145de: f023 0310 bic.w r3, r3, #16 80145e2: 65fb str r3, [r7, #92] @ 0x5c 80145e4: 687b ldr r3, [r7, #4] 80145e6: 681b ldr r3, [r3, #0] 80145e8: 330c adds r3, #12 80145ea: 6dfa ldr r2, [r7, #92] @ 0x5c 80145ec: 62fa str r2, [r7, #44] @ 0x2c 80145ee: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80145f0: 6ab9 ldr r1, [r7, #40] @ 0x28 80145f2: 6afa ldr r2, [r7, #44] @ 0x2c 80145f4: e841 2300 strex r3, r2, [r1] 80145f8: 627b str r3, [r7, #36] @ 0x24 return(result); 80145fa: 6a7b ldr r3, [r7, #36] @ 0x24 80145fc: 2b00 cmp r3, #0 80145fe: d1e5 bne.n 80145cc } /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8014600: 687b ldr r3, [r7, #4] 8014602: 681b ldr r3, [r3, #0] 8014604: 695b ldr r3, [r3, #20] 8014606: f003 0340 and.w r3, r3, #64 @ 0x40 801460a: 2b00 cmp r3, #0 801460c: d036 beq.n 801467c { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 801460e: 687b ldr r3, [r7, #4] 8014610: 681b ldr r3, [r3, #0] 8014612: 3314 adds r3, #20 8014614: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014616: 68fb ldr r3, [r7, #12] 8014618: e853 3f00 ldrex r3, [r3] 801461c: 60bb str r3, [r7, #8] return(result); 801461e: 68bb ldr r3, [r7, #8] 8014620: f023 0340 bic.w r3, r3, #64 @ 0x40 8014624: 65bb str r3, [r7, #88] @ 0x58 8014626: 687b ldr r3, [r7, #4] 8014628: 681b ldr r3, [r3, #0] 801462a: 3314 adds r3, #20 801462c: 6dba ldr r2, [r7, #88] @ 0x58 801462e: 61ba str r2, [r7, #24] 8014630: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014632: 6979 ldr r1, [r7, #20] 8014634: 69ba ldr r2, [r7, #24] 8014636: e841 2300 strex r3, r2, [r1] 801463a: 613b str r3, [r7, #16] return(result); 801463c: 693b ldr r3, [r7, #16] 801463e: 2b00 cmp r3, #0 8014640: d1e5 bne.n 801460e /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ if (huart->hdmarx != NULL) 8014642: 687b ldr r3, [r7, #4] 8014644: 6bdb ldr r3, [r3, #60] @ 0x3c 8014646: 2b00 cmp r3, #0 8014648: d018 beq.n 801467c { /* Set the UART DMA Abort callback to Null. No call back execution at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = NULL; 801464a: 687b ldr r3, [r7, #4] 801464c: 6bdb ldr r3, [r3, #60] @ 0x3c 801464e: 2200 movs r2, #0 8014650: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) 8014652: 687b ldr r3, [r7, #4] 8014654: 6bdb ldr r3, [r3, #60] @ 0x3c 8014656: 4618 mov r0, r3 8014658: f7fc fe36 bl 80112c8 801465c: 4603 mov r3, r0 801465e: 2b00 cmp r3, #0 8014660: d00c beq.n 801467c { if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) 8014662: 687b ldr r3, [r7, #4] 8014664: 6bdb ldr r3, [r3, #60] @ 0x3c 8014666: 4618 mov r0, r3 8014668: f7fd f9ae bl 80119c8 801466c: 4603 mov r3, r0 801466e: 2b20 cmp r3, #32 8014670: d104 bne.n 801467c { /* Set error code to DMA */ huart->ErrorCode = HAL_UART_ERROR_DMA; 8014672: 687b ldr r3, [r7, #4] 8014674: 2210 movs r2, #16 8014676: 645a str r2, [r3, #68] @ 0x44 return HAL_TIMEOUT; 8014678: 2303 movs r3, #3 801467a: e00a b.n 8014692 } } } /* Reset Rx transfer counter */ huart->RxXferCount = 0x00U; 801467c: 687b ldr r3, [r7, #4] 801467e: 2200 movs r2, #0 8014680: 85da strh r2, [r3, #46] @ 0x2e /* Restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8014682: 687b ldr r3, [r7, #4] 8014684: 2220 movs r2, #32 8014686: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 801468a: 687b ldr r3, [r7, #4] 801468c: 2200 movs r2, #0 801468e: 631a str r2, [r3, #48] @ 0x30 return HAL_OK; 8014690: 2300 movs r3, #0 } 8014692: 4618 mov r0, r3 8014694: 3768 adds r7, #104 @ 0x68 8014696: 46bd mov sp, r7 8014698: bd80 pop {r7, pc} ... 0801469c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { 801469c: b580 push {r7, lr} 801469e: b0ba sub sp, #232 @ 0xe8 80146a0: af00 add r7, sp, #0 80146a2: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); 80146a4: 687b ldr r3, [r7, #4] 80146a6: 681b ldr r3, [r3, #0] 80146a8: 681b ldr r3, [r3, #0] 80146aa: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); 80146ae: 687b ldr r3, [r7, #4] 80146b0: 681b ldr r3, [r3, #0] 80146b2: 68db ldr r3, [r3, #12] 80146b4: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); 80146b8: 687b ldr r3, [r7, #4] 80146ba: 681b ldr r3, [r3, #0] 80146bc: 695b ldr r3, [r3, #20] 80146be: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; 80146c2: 2300 movs r3, #0 80146c4: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; 80146c8: 2300 movs r3, #0 80146ca: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); 80146ce: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 80146d2: f003 030f and.w r3, r3, #15 80146d6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) 80146da: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 80146de: 2b00 cmp r3, #0 80146e0: d10f bne.n 8014702 { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80146e2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 80146e6: f003 0320 and.w r3, r3, #32 80146ea: 2b00 cmp r3, #0 80146ec: d009 beq.n 8014702 80146ee: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80146f2: f003 0320 and.w r3, r3, #32 80146f6: 2b00 cmp r3, #0 80146f8: d003 beq.n 8014702 { UART_Receive_IT(huart); 80146fa: 6878 ldr r0, [r7, #4] 80146fc: f000 fdb6 bl 801526c return; 8014700: e25b b.n 8014bba } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) 8014702: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8014706: 2b00 cmp r3, #0 8014708: f000 80de beq.w 80148c8 801470c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8014710: f003 0301 and.w r3, r3, #1 8014714: 2b00 cmp r3, #0 8014716: d106 bne.n 8014726 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8014718: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 801471c: f403 7390 and.w r3, r3, #288 @ 0x120 8014720: 2b00 cmp r3, #0 8014722: f000 80d1 beq.w 80148c8 { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8014726: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 801472a: f003 0301 and.w r3, r3, #1 801472e: 2b00 cmp r3, #0 8014730: d00b beq.n 801474a 8014732: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8014736: f403 7380 and.w r3, r3, #256 @ 0x100 801473a: 2b00 cmp r3, #0 801473c: d005 beq.n 801474a { huart->ErrorCode |= HAL_UART_ERROR_PE; 801473e: 687b ldr r3, [r7, #4] 8014740: 6c5b ldr r3, [r3, #68] @ 0x44 8014742: f043 0201 orr.w r2, r3, #1 8014746: 687b ldr r3, [r7, #4] 8014748: 645a str r2, [r3, #68] @ 0x44 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 801474a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 801474e: f003 0304 and.w r3, r3, #4 8014752: 2b00 cmp r3, #0 8014754: d00b beq.n 801476e 8014756: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 801475a: f003 0301 and.w r3, r3, #1 801475e: 2b00 cmp r3, #0 8014760: d005 beq.n 801476e { huart->ErrorCode |= HAL_UART_ERROR_NE; 8014762: 687b ldr r3, [r7, #4] 8014764: 6c5b ldr r3, [r3, #68] @ 0x44 8014766: f043 0202 orr.w r2, r3, #2 801476a: 687b ldr r3, [r7, #4] 801476c: 645a str r2, [r3, #68] @ 0x44 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 801476e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8014772: f003 0302 and.w r3, r3, #2 8014776: 2b00 cmp r3, #0 8014778: d00b beq.n 8014792 801477a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 801477e: f003 0301 and.w r3, r3, #1 8014782: 2b00 cmp r3, #0 8014784: d005 beq.n 8014792 { huart->ErrorCode |= HAL_UART_ERROR_FE; 8014786: 687b ldr r3, [r7, #4] 8014788: 6c5b ldr r3, [r3, #68] @ 0x44 801478a: f043 0204 orr.w r2, r3, #4 801478e: 687b ldr r3, [r7, #4] 8014790: 645a str r2, [r3, #68] @ 0x44 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) 8014792: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8014796: f003 0308 and.w r3, r3, #8 801479a: 2b00 cmp r3, #0 801479c: d011 beq.n 80147c2 801479e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80147a2: f003 0320 and.w r3, r3, #32 80147a6: 2b00 cmp r3, #0 80147a8: d105 bne.n 80147b6 || ((cr3its & USART_CR3_EIE) != RESET))) 80147aa: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 80147ae: f003 0301 and.w r3, r3, #1 80147b2: 2b00 cmp r3, #0 80147b4: d005 beq.n 80147c2 { huart->ErrorCode |= HAL_UART_ERROR_ORE; 80147b6: 687b ldr r3, [r7, #4] 80147b8: 6c5b ldr r3, [r3, #68] @ 0x44 80147ba: f043 0208 orr.w r2, r3, #8 80147be: 687b ldr r3, [r7, #4] 80147c0: 645a str r2, [r3, #68] @ 0x44 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) 80147c2: 687b ldr r3, [r7, #4] 80147c4: 6c5b ldr r3, [r3, #68] @ 0x44 80147c6: 2b00 cmp r3, #0 80147c8: f000 81f2 beq.w 8014bb0 { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80147cc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 80147d0: f003 0320 and.w r3, r3, #32 80147d4: 2b00 cmp r3, #0 80147d6: d008 beq.n 80147ea 80147d8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80147dc: f003 0320 and.w r3, r3, #32 80147e0: 2b00 cmp r3, #0 80147e2: d002 beq.n 80147ea { UART_Receive_IT(huart); 80147e4: 6878 ldr r0, [r7, #4] 80147e6: f000 fd41 bl 801526c } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80147ea: 687b ldr r3, [r7, #4] 80147ec: 681b ldr r3, [r3, #0] 80147ee: 695b ldr r3, [r3, #20] 80147f0: f003 0340 and.w r3, r3, #64 @ 0x40 80147f4: 2b00 cmp r3, #0 80147f6: bf14 ite ne 80147f8: 2301 movne r3, #1 80147fa: 2300 moveq r3, #0 80147fc: b2db uxtb r3, r3 80147fe: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8014802: 687b ldr r3, [r7, #4] 8014804: 6c5b ldr r3, [r3, #68] @ 0x44 8014806: f003 0308 and.w r3, r3, #8 801480a: 2b00 cmp r3, #0 801480c: d103 bne.n 8014816 801480e: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 8014812: 2b00 cmp r3, #0 8014814: d04f beq.n 80148b6 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); 8014816: 6878 ldr r0, [r7, #4] 8014818: f000 fc4b bl 80150b2 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 801481c: 687b ldr r3, [r7, #4] 801481e: 681b ldr r3, [r3, #0] 8014820: 695b ldr r3, [r3, #20] 8014822: f003 0340 and.w r3, r3, #64 @ 0x40 8014826: 2b00 cmp r3, #0 8014828: d041 beq.n 80148ae { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 801482a: 687b ldr r3, [r7, #4] 801482c: 681b ldr r3, [r3, #0] 801482e: 3314 adds r3, #20 8014830: f8c7 309c str.w r3, [r7, #156] @ 0x9c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014834: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 8014838: e853 3f00 ldrex r3, [r3] 801483c: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); 8014840: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8014844: f023 0340 bic.w r3, r3, #64 @ 0x40 8014848: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 801484c: 687b ldr r3, [r7, #4] 801484e: 681b ldr r3, [r3, #0] 8014850: 3314 adds r3, #20 8014852: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 8014856: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 801485a: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801485e: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 8014862: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 8014866: e841 2300 strex r3, r2, [r1] 801486a: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); 801486e: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 8014872: 2b00 cmp r3, #0 8014874: d1d9 bne.n 801482a /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) 8014876: 687b ldr r3, [r7, #4] 8014878: 6bdb ldr r3, [r3, #60] @ 0x3c 801487a: 2b00 cmp r3, #0 801487c: d013 beq.n 80148a6 { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 801487e: 687b ldr r3, [r7, #4] 8014880: 6bdb ldr r3, [r3, #60] @ 0x3c 8014882: 4a7e ldr r2, [pc, #504] @ (8014a7c ) 8014884: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8014886: 687b ldr r3, [r7, #4] 8014888: 6bdb ldr r3, [r3, #60] @ 0x3c 801488a: 4618 mov r0, r3 801488c: f7fc fd58 bl 8011340 8014890: 4603 mov r3, r0 8014892: 2b00 cmp r3, #0 8014894: d016 beq.n 80148c4 { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); 8014896: 687b ldr r3, [r7, #4] 8014898: 6bdb ldr r3, [r3, #60] @ 0x3c 801489a: 6b5b ldr r3, [r3, #52] @ 0x34 801489c: 687a ldr r2, [r7, #4] 801489e: 6bd2 ldr r2, [r2, #60] @ 0x3c 80148a0: 4610 mov r0, r2 80148a2: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80148a4: e00e b.n 80148c4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 80148a6: 6878 ldr r0, [r7, #4] 80148a8: f7f8 fb78 bl 800cf9c if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80148ac: e00a b.n 80148c4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 80148ae: 6878 ldr r0, [r7, #4] 80148b0: f7f8 fb74 bl 800cf9c if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80148b4: e006 b.n 80148c4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 80148b6: 6878 ldr r0, [r7, #4] 80148b8: f7f8 fb70 bl 800cf9c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; 80148bc: 687b ldr r3, [r7, #4] 80148be: 2200 movs r2, #0 80148c0: 645a str r2, [r3, #68] @ 0x44 } } return; 80148c2: e175 b.n 8014bb0 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80148c4: bf00 nop return; 80148c6: e173 b.n 8014bb0 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 80148c8: 687b ldr r3, [r7, #4] 80148ca: 6b1b ldr r3, [r3, #48] @ 0x30 80148cc: 2b01 cmp r3, #1 80148ce: f040 814f bne.w 8014b70 && ((isrflags & USART_SR_IDLE) != 0U) 80148d2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 80148d6: f003 0310 and.w r3, r3, #16 80148da: 2b00 cmp r3, #0 80148dc: f000 8148 beq.w 8014b70 && ((cr1its & USART_SR_IDLE) != 0U)) 80148e0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80148e4: f003 0310 and.w r3, r3, #16 80148e8: 2b00 cmp r3, #0 80148ea: f000 8141 beq.w 8014b70 { __HAL_UART_CLEAR_IDLEFLAG(huart); 80148ee: 2300 movs r3, #0 80148f0: 60bb str r3, [r7, #8] 80148f2: 687b ldr r3, [r7, #4] 80148f4: 681b ldr r3, [r3, #0] 80148f6: 681b ldr r3, [r3, #0] 80148f8: 60bb str r3, [r7, #8] 80148fa: 687b ldr r3, [r7, #4] 80148fc: 681b ldr r3, [r3, #0] 80148fe: 685b ldr r3, [r3, #4] 8014900: 60bb str r3, [r7, #8] 8014902: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8014904: 687b ldr r3, [r7, #4] 8014906: 681b ldr r3, [r3, #0] 8014908: 695b ldr r3, [r3, #20] 801490a: f003 0340 and.w r3, r3, #64 @ 0x40 801490e: 2b00 cmp r3, #0 8014910: f000 80b6 beq.w 8014a80 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); 8014914: 687b ldr r3, [r7, #4] 8014916: 6bdb ldr r3, [r3, #60] @ 0x3c 8014918: 681b ldr r3, [r3, #0] 801491a: 685b ldr r3, [r3, #4] 801491c: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) 8014920: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe 8014924: 2b00 cmp r3, #0 8014926: f000 8145 beq.w 8014bb4 && (nb_remaining_rx_data < huart->RxXferSize)) 801492a: 687b ldr r3, [r7, #4] 801492c: 8d9b ldrh r3, [r3, #44] @ 0x2c 801492e: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 8014932: 429a cmp r2, r3 8014934: f080 813e bcs.w 8014bb4 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; 8014938: 687b ldr r3, [r7, #4] 801493a: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 801493e: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) 8014940: 687b ldr r3, [r7, #4] 8014942: 6bdb ldr r3, [r3, #60] @ 0x3c 8014944: 699b ldr r3, [r3, #24] 8014946: 2b20 cmp r3, #32 8014948: f000 8088 beq.w 8014a5c { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 801494c: 687b ldr r3, [r7, #4] 801494e: 681b ldr r3, [r3, #0] 8014950: 330c adds r3, #12 8014952: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014956: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 801495a: e853 3f00 ldrex r3, [r3] 801495e: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); 8014962: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8014966: f423 7380 bic.w r3, r3, #256 @ 0x100 801496a: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 801496e: 687b ldr r3, [r7, #4] 8014970: 681b ldr r3, [r3, #0] 8014972: 330c adds r3, #12 8014974: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 8014978: f8c7 2094 str.w r2, [r7, #148] @ 0x94 801497c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014980: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 8014984: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 8014988: e841 2300 strex r3, r2, [r1] 801498c: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); 8014990: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8014994: 2b00 cmp r3, #0 8014996: d1d9 bne.n 801494c ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8014998: 687b ldr r3, [r7, #4] 801499a: 681b ldr r3, [r3, #0] 801499c: 3314 adds r3, #20 801499e: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80149a0: 6f7b ldr r3, [r7, #116] @ 0x74 80149a2: e853 3f00 ldrex r3, [r3] 80149a6: 673b str r3, [r7, #112] @ 0x70 return(result); 80149a8: 6f3b ldr r3, [r7, #112] @ 0x70 80149aa: f023 0301 bic.w r3, r3, #1 80149ae: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 80149b2: 687b ldr r3, [r7, #4] 80149b4: 681b ldr r3, [r3, #0] 80149b6: 3314 adds r3, #20 80149b8: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 80149bc: f8c7 2080 str.w r2, [r7, #128] @ 0x80 80149c0: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80149c2: 6ff9 ldr r1, [r7, #124] @ 0x7c 80149c4: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 80149c8: e841 2300 strex r3, r2, [r1] 80149cc: 67bb str r3, [r7, #120] @ 0x78 return(result); 80149ce: 6fbb ldr r3, [r7, #120] @ 0x78 80149d0: 2b00 cmp r3, #0 80149d2: d1e1 bne.n 8014998 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80149d4: 687b ldr r3, [r7, #4] 80149d6: 681b ldr r3, [r3, #0] 80149d8: 3314 adds r3, #20 80149da: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80149dc: 6e3b ldr r3, [r7, #96] @ 0x60 80149de: e853 3f00 ldrex r3, [r3] 80149e2: 65fb str r3, [r7, #92] @ 0x5c return(result); 80149e4: 6dfb ldr r3, [r7, #92] @ 0x5c 80149e6: f023 0340 bic.w r3, r3, #64 @ 0x40 80149ea: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 80149ee: 687b ldr r3, [r7, #4] 80149f0: 681b ldr r3, [r3, #0] 80149f2: 3314 adds r3, #20 80149f4: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 80149f8: 66fa str r2, [r7, #108] @ 0x6c 80149fa: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80149fc: 6eb9 ldr r1, [r7, #104] @ 0x68 80149fe: 6efa ldr r2, [r7, #108] @ 0x6c 8014a00: e841 2300 strex r3, r2, [r1] 8014a04: 667b str r3, [r7, #100] @ 0x64 return(result); 8014a06: 6e7b ldr r3, [r7, #100] @ 0x64 8014a08: 2b00 cmp r3, #0 8014a0a: d1e3 bne.n 80149d4 /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8014a0c: 687b ldr r3, [r7, #4] 8014a0e: 2220 movs r2, #32 8014a10: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8014a14: 687b ldr r3, [r7, #4] 8014a16: 2200 movs r2, #0 8014a18: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8014a1a: 687b ldr r3, [r7, #4] 8014a1c: 681b ldr r3, [r3, #0] 8014a1e: 330c adds r3, #12 8014a20: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014a22: 6cfb ldr r3, [r7, #76] @ 0x4c 8014a24: e853 3f00 ldrex r3, [r3] 8014a28: 64bb str r3, [r7, #72] @ 0x48 return(result); 8014a2a: 6cbb ldr r3, [r7, #72] @ 0x48 8014a2c: f023 0310 bic.w r3, r3, #16 8014a30: f8c7 30ac str.w r3, [r7, #172] @ 0xac 8014a34: 687b ldr r3, [r7, #4] 8014a36: 681b ldr r3, [r3, #0] 8014a38: 330c adds r3, #12 8014a3a: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac 8014a3e: 65ba str r2, [r7, #88] @ 0x58 8014a40: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014a42: 6d79 ldr r1, [r7, #84] @ 0x54 8014a44: 6dba ldr r2, [r7, #88] @ 0x58 8014a46: e841 2300 strex r3, r2, [r1] 8014a4a: 653b str r3, [r7, #80] @ 0x50 return(result); 8014a4c: 6d3b ldr r3, [r7, #80] @ 0x50 8014a4e: 2b00 cmp r3, #0 8014a50: d1e3 bne.n 8014a1a /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); 8014a52: 687b ldr r3, [r7, #4] 8014a54: 6bdb ldr r3, [r3, #60] @ 0x3c 8014a56: 4618 mov r0, r3 8014a58: f7fc fc36 bl 80112c8 } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 8014a5c: 687b ldr r3, [r7, #4] 8014a5e: 2202 movs r2, #2 8014a60: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); 8014a62: 687b ldr r3, [r7, #4] 8014a64: 8d9a ldrh r2, [r3, #44] @ 0x2c 8014a66: 687b ldr r3, [r7, #4] 8014a68: 8ddb ldrh r3, [r3, #46] @ 0x2e 8014a6a: b29b uxth r3, r3 8014a6c: 1ad3 subs r3, r2, r3 8014a6e: b29b uxth r3, r3 8014a70: 4619 mov r1, r3 8014a72: 6878 ldr r0, [r7, #4] 8014a74: f7f9 f9f2 bl 800de5c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 8014a78: e09c b.n 8014bb4 8014a7a: bf00 nop 8014a7c: 08015177 .word 0x08015177 else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8014a80: 687b ldr r3, [r7, #4] 8014a82: 8d9a ldrh r2, [r3, #44] @ 0x2c 8014a84: 687b ldr r3, [r7, #4] 8014a86: 8ddb ldrh r3, [r3, #46] @ 0x2e 8014a88: b29b uxth r3, r3 8014a8a: 1ad3 subs r3, r2, r3 8014a8c: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) 8014a90: 687b ldr r3, [r7, #4] 8014a92: 8ddb ldrh r3, [r3, #46] @ 0x2e 8014a94: b29b uxth r3, r3 8014a96: 2b00 cmp r3, #0 8014a98: f000 808e beq.w 8014bb8 && (nb_rx_data > 0U)) 8014a9c: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 8014aa0: 2b00 cmp r3, #0 8014aa2: f000 8089 beq.w 8014bb8 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8014aa6: 687b ldr r3, [r7, #4] 8014aa8: 681b ldr r3, [r3, #0] 8014aaa: 330c adds r3, #12 8014aac: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014aae: 6bbb ldr r3, [r7, #56] @ 0x38 8014ab0: e853 3f00 ldrex r3, [r3] 8014ab4: 637b str r3, [r7, #52] @ 0x34 return(result); 8014ab6: 6b7b ldr r3, [r7, #52] @ 0x34 8014ab8: f423 7390 bic.w r3, r3, #288 @ 0x120 8014abc: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 8014ac0: 687b ldr r3, [r7, #4] 8014ac2: 681b ldr r3, [r3, #0] 8014ac4: 330c adds r3, #12 8014ac6: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 8014aca: 647a str r2, [r7, #68] @ 0x44 8014acc: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014ace: 6c39 ldr r1, [r7, #64] @ 0x40 8014ad0: 6c7a ldr r2, [r7, #68] @ 0x44 8014ad2: e841 2300 strex r3, r2, [r1] 8014ad6: 63fb str r3, [r7, #60] @ 0x3c return(result); 8014ad8: 6bfb ldr r3, [r7, #60] @ 0x3c 8014ada: 2b00 cmp r3, #0 8014adc: d1e3 bne.n 8014aa6 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8014ade: 687b ldr r3, [r7, #4] 8014ae0: 681b ldr r3, [r3, #0] 8014ae2: 3314 adds r3, #20 8014ae4: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014ae6: 6a7b ldr r3, [r7, #36] @ 0x24 8014ae8: e853 3f00 ldrex r3, [r3] 8014aec: 623b str r3, [r7, #32] return(result); 8014aee: 6a3b ldr r3, [r7, #32] 8014af0: f023 0301 bic.w r3, r3, #1 8014af4: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 8014af8: 687b ldr r3, [r7, #4] 8014afa: 681b ldr r3, [r3, #0] 8014afc: 3314 adds r3, #20 8014afe: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 8014b02: 633a str r2, [r7, #48] @ 0x30 8014b04: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014b06: 6af9 ldr r1, [r7, #44] @ 0x2c 8014b08: 6b3a ldr r2, [r7, #48] @ 0x30 8014b0a: e841 2300 strex r3, r2, [r1] 8014b0e: 62bb str r3, [r7, #40] @ 0x28 return(result); 8014b10: 6abb ldr r3, [r7, #40] @ 0x28 8014b12: 2b00 cmp r3, #0 8014b14: d1e3 bne.n 8014ade /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8014b16: 687b ldr r3, [r7, #4] 8014b18: 2220 movs r2, #32 8014b1a: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8014b1e: 687b ldr r3, [r7, #4] 8014b20: 2200 movs r2, #0 8014b22: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8014b24: 687b ldr r3, [r7, #4] 8014b26: 681b ldr r3, [r3, #0] 8014b28: 330c adds r3, #12 8014b2a: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014b2c: 693b ldr r3, [r7, #16] 8014b2e: e853 3f00 ldrex r3, [r3] 8014b32: 60fb str r3, [r7, #12] return(result); 8014b34: 68fb ldr r3, [r7, #12] 8014b36: f023 0310 bic.w r3, r3, #16 8014b3a: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 8014b3e: 687b ldr r3, [r7, #4] 8014b40: 681b ldr r3, [r3, #0] 8014b42: 330c adds r3, #12 8014b44: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 8014b48: 61fa str r2, [r7, #28] 8014b4a: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014b4c: 69b9 ldr r1, [r7, #24] 8014b4e: 69fa ldr r2, [r7, #28] 8014b50: e841 2300 strex r3, r2, [r1] 8014b54: 617b str r3, [r7, #20] return(result); 8014b56: 697b ldr r3, [r7, #20] 8014b58: 2b00 cmp r3, #0 8014b5a: d1e3 bne.n 8014b24 /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 8014b5c: 687b ldr r3, [r7, #4] 8014b5e: 2202 movs r2, #2 8014b60: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); 8014b62: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 8014b66: 4619 mov r1, r3 8014b68: 6878 ldr r0, [r7, #4] 8014b6a: f7f9 f977 bl 800de5c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 8014b6e: e023 b.n 8014bb8 } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8014b70: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8014b74: f003 0380 and.w r3, r3, #128 @ 0x80 8014b78: 2b00 cmp r3, #0 8014b7a: d009 beq.n 8014b90 8014b7c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8014b80: f003 0380 and.w r3, r3, #128 @ 0x80 8014b84: 2b00 cmp r3, #0 8014b86: d003 beq.n 8014b90 { UART_Transmit_IT(huart); 8014b88: 6878 ldr r0, [r7, #4] 8014b8a: f000 fb08 bl 801519e return; 8014b8e: e014 b.n 8014bba } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8014b90: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8014b94: f003 0340 and.w r3, r3, #64 @ 0x40 8014b98: 2b00 cmp r3, #0 8014b9a: d00e beq.n 8014bba 8014b9c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8014ba0: f003 0340 and.w r3, r3, #64 @ 0x40 8014ba4: 2b00 cmp r3, #0 8014ba6: d008 beq.n 8014bba { UART_EndTransmit_IT(huart); 8014ba8: 6878 ldr r0, [r7, #4] 8014baa: f000 fb47 bl 801523c return; 8014bae: e004 b.n 8014bba return; 8014bb0: bf00 nop 8014bb2: e002 b.n 8014bba return; 8014bb4: bf00 nop 8014bb6: e000 b.n 8014bba return; 8014bb8: bf00 nop } } 8014bba: 37e8 adds r7, #232 @ 0xe8 8014bbc: 46bd mov sp, r7 8014bbe: bd80 pop {r7, pc} 08014bc0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) { 8014bc0: b480 push {r7} 8014bc2: b083 sub sp, #12 8014bc4: af00 add r7, sp, #0 8014bc6: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxHalfCpltCallback could be implemented in the user file */ } 8014bc8: bf00 nop 8014bca: 370c adds r7, #12 8014bcc: 46bd mov sp, r7 8014bce: bc80 pop {r7} 8014bd0: 4770 bx lr 08014bd2 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { 8014bd2: b480 push {r7} 8014bd4: b083 sub sp, #12 8014bd6: af00 add r7, sp, #0 8014bd8: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } 8014bda: bf00 nop 8014bdc: 370c adds r7, #12 8014bde: 46bd mov sp, r7 8014be0: bc80 pop {r7} 8014be2: 4770 bx lr 08014be4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) { 8014be4: b480 push {r7} 8014be6: b083 sub sp, #12 8014be8: af00 add r7, sp, #0 8014bea: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxHalfCpltCallback could be implemented in the user file */ } 8014bec: bf00 nop 8014bee: 370c adds r7, #12 8014bf0: 46bd mov sp, r7 8014bf2: bc80 pop {r7} 8014bf4: 4770 bx lr 08014bf6 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART. * @retval UART Error Code */ uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart) { 8014bf6: b480 push {r7} 8014bf8: b083 sub sp, #12 8014bfa: af00 add r7, sp, #0 8014bfc: 6078 str r0, [r7, #4] return huart->ErrorCode; 8014bfe: 687b ldr r3, [r7, #4] 8014c00: 6c5b ldr r3, [r3, #68] @ 0x44 } 8014c02: 4618 mov r0, r3 8014c04: 370c adds r7, #12 8014c06: 46bd mov sp, r7 8014c08: bc80 pop {r7} 8014c0a: 4770 bx lr 08014c0c : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) { 8014c0c: b580 push {r7, lr} 8014c0e: b090 sub sp, #64 @ 0x40 8014c10: af00 add r7, sp, #0 8014c12: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8014c14: 687b ldr r3, [r7, #4] 8014c16: 6a5b ldr r3, [r3, #36] @ 0x24 8014c18: 63fb str r3, [r7, #60] @ 0x3c /* DMA Normal mode*/ if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8014c1a: 687b ldr r3, [r7, #4] 8014c1c: 681b ldr r3, [r3, #0] 8014c1e: 681b ldr r3, [r3, #0] 8014c20: f003 0320 and.w r3, r3, #32 8014c24: 2b00 cmp r3, #0 8014c26: d137 bne.n 8014c98 { huart->TxXferCount = 0x00U; 8014c28: 6bfb ldr r3, [r7, #60] @ 0x3c 8014c2a: 2200 movs r2, #0 8014c2c: 84da strh r2, [r3, #38] @ 0x26 /* Disable the DMA transfer for transmit request by setting the DMAT bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8014c2e: 6bfb ldr r3, [r7, #60] @ 0x3c 8014c30: 681b ldr r3, [r3, #0] 8014c32: 3314 adds r3, #20 8014c34: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014c36: 6a7b ldr r3, [r7, #36] @ 0x24 8014c38: e853 3f00 ldrex r3, [r3] 8014c3c: 623b str r3, [r7, #32] return(result); 8014c3e: 6a3b ldr r3, [r7, #32] 8014c40: f023 0380 bic.w r3, r3, #128 @ 0x80 8014c44: 63bb str r3, [r7, #56] @ 0x38 8014c46: 6bfb ldr r3, [r7, #60] @ 0x3c 8014c48: 681b ldr r3, [r3, #0] 8014c4a: 3314 adds r3, #20 8014c4c: 6bba ldr r2, [r7, #56] @ 0x38 8014c4e: 633a str r2, [r7, #48] @ 0x30 8014c50: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014c52: 6af9 ldr r1, [r7, #44] @ 0x2c 8014c54: 6b3a ldr r2, [r7, #48] @ 0x30 8014c56: e841 2300 strex r3, r2, [r1] 8014c5a: 62bb str r3, [r7, #40] @ 0x28 return(result); 8014c5c: 6abb ldr r3, [r7, #40] @ 0x28 8014c5e: 2b00 cmp r3, #0 8014c60: d1e5 bne.n 8014c2e /* Enable the UART Transmit Complete Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8014c62: 6bfb ldr r3, [r7, #60] @ 0x3c 8014c64: 681b ldr r3, [r3, #0] 8014c66: 330c adds r3, #12 8014c68: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014c6a: 693b ldr r3, [r7, #16] 8014c6c: e853 3f00 ldrex r3, [r3] 8014c70: 60fb str r3, [r7, #12] return(result); 8014c72: 68fb ldr r3, [r7, #12] 8014c74: f043 0340 orr.w r3, r3, #64 @ 0x40 8014c78: 637b str r3, [r7, #52] @ 0x34 8014c7a: 6bfb ldr r3, [r7, #60] @ 0x3c 8014c7c: 681b ldr r3, [r3, #0] 8014c7e: 330c adds r3, #12 8014c80: 6b7a ldr r2, [r7, #52] @ 0x34 8014c82: 61fa str r2, [r7, #28] 8014c84: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014c86: 69b9 ldr r1, [r7, #24] 8014c88: 69fa ldr r2, [r7, #28] 8014c8a: e841 2300 strex r3, r2, [r1] 8014c8e: 617b str r3, [r7, #20] return(result); 8014c90: 697b ldr r3, [r7, #20] 8014c92: 2b00 cmp r3, #0 8014c94: d1e5 bne.n 8014c62 #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } } 8014c96: e002 b.n 8014c9e HAL_UART_TxCpltCallback(huart); 8014c98: 6bf8 ldr r0, [r7, #60] @ 0x3c 8014c9a: f7f9 f959 bl 800df50 } 8014c9e: bf00 nop 8014ca0: 3740 adds r7, #64 @ 0x40 8014ca2: 46bd mov sp, r7 8014ca4: bd80 pop {r7, pc} 08014ca6 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) { 8014ca6: b580 push {r7, lr} 8014ca8: b084 sub sp, #16 8014caa: af00 add r7, sp, #0 8014cac: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8014cae: 687b ldr r3, [r7, #4] 8014cb0: 6a5b ldr r3, [r3, #36] @ 0x24 8014cb2: 60fb str r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxHalfCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxHalfCpltCallback(huart); 8014cb4: 68f8 ldr r0, [r7, #12] 8014cb6: f7ff ff83 bl 8014bc0 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8014cba: bf00 nop 8014cbc: 3710 adds r7, #16 8014cbe: 46bd mov sp, r7 8014cc0: bd80 pop {r7, pc} 08014cc2 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) { 8014cc2: b580 push {r7, lr} 8014cc4: b09c sub sp, #112 @ 0x70 8014cc6: af00 add r7, sp, #0 8014cc8: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8014cca: 687b ldr r3, [r7, #4] 8014ccc: 6a5b ldr r3, [r3, #36] @ 0x24 8014cce: 66fb str r3, [r7, #108] @ 0x6c /* DMA Normal mode*/ if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8014cd0: 687b ldr r3, [r7, #4] 8014cd2: 681b ldr r3, [r3, #0] 8014cd4: 681b ldr r3, [r3, #0] 8014cd6: f003 0320 and.w r3, r3, #32 8014cda: 2b00 cmp r3, #0 8014cdc: d172 bne.n 8014dc4 { huart->RxXferCount = 0U; 8014cde: 6efb ldr r3, [r7, #108] @ 0x6c 8014ce0: 2200 movs r2, #0 8014ce2: 85da strh r2, [r3, #46] @ 0x2e /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8014ce4: 6efb ldr r3, [r7, #108] @ 0x6c 8014ce6: 681b ldr r3, [r3, #0] 8014ce8: 330c adds r3, #12 8014cea: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014cec: 6cfb ldr r3, [r7, #76] @ 0x4c 8014cee: e853 3f00 ldrex r3, [r3] 8014cf2: 64bb str r3, [r7, #72] @ 0x48 return(result); 8014cf4: 6cbb ldr r3, [r7, #72] @ 0x48 8014cf6: f423 7380 bic.w r3, r3, #256 @ 0x100 8014cfa: 66bb str r3, [r7, #104] @ 0x68 8014cfc: 6efb ldr r3, [r7, #108] @ 0x6c 8014cfe: 681b ldr r3, [r3, #0] 8014d00: 330c adds r3, #12 8014d02: 6eba ldr r2, [r7, #104] @ 0x68 8014d04: 65ba str r2, [r7, #88] @ 0x58 8014d06: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014d08: 6d79 ldr r1, [r7, #84] @ 0x54 8014d0a: 6dba ldr r2, [r7, #88] @ 0x58 8014d0c: e841 2300 strex r3, r2, [r1] 8014d10: 653b str r3, [r7, #80] @ 0x50 return(result); 8014d12: 6d3b ldr r3, [r7, #80] @ 0x50 8014d14: 2b00 cmp r3, #0 8014d16: d1e5 bne.n 8014ce4 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8014d18: 6efb ldr r3, [r7, #108] @ 0x6c 8014d1a: 681b ldr r3, [r3, #0] 8014d1c: 3314 adds r3, #20 8014d1e: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014d20: 6bbb ldr r3, [r7, #56] @ 0x38 8014d22: e853 3f00 ldrex r3, [r3] 8014d26: 637b str r3, [r7, #52] @ 0x34 return(result); 8014d28: 6b7b ldr r3, [r7, #52] @ 0x34 8014d2a: f023 0301 bic.w r3, r3, #1 8014d2e: 667b str r3, [r7, #100] @ 0x64 8014d30: 6efb ldr r3, [r7, #108] @ 0x6c 8014d32: 681b ldr r3, [r3, #0] 8014d34: 3314 adds r3, #20 8014d36: 6e7a ldr r2, [r7, #100] @ 0x64 8014d38: 647a str r2, [r7, #68] @ 0x44 8014d3a: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014d3c: 6c39 ldr r1, [r7, #64] @ 0x40 8014d3e: 6c7a ldr r2, [r7, #68] @ 0x44 8014d40: e841 2300 strex r3, r2, [r1] 8014d44: 63fb str r3, [r7, #60] @ 0x3c return(result); 8014d46: 6bfb ldr r3, [r7, #60] @ 0x3c 8014d48: 2b00 cmp r3, #0 8014d4a: d1e5 bne.n 8014d18 /* Disable the DMA transfer for the receiver request by setting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8014d4c: 6efb ldr r3, [r7, #108] @ 0x6c 8014d4e: 681b ldr r3, [r3, #0] 8014d50: 3314 adds r3, #20 8014d52: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014d54: 6a7b ldr r3, [r7, #36] @ 0x24 8014d56: e853 3f00 ldrex r3, [r3] 8014d5a: 623b str r3, [r7, #32] return(result); 8014d5c: 6a3b ldr r3, [r7, #32] 8014d5e: f023 0340 bic.w r3, r3, #64 @ 0x40 8014d62: 663b str r3, [r7, #96] @ 0x60 8014d64: 6efb ldr r3, [r7, #108] @ 0x6c 8014d66: 681b ldr r3, [r3, #0] 8014d68: 3314 adds r3, #20 8014d6a: 6e3a ldr r2, [r7, #96] @ 0x60 8014d6c: 633a str r2, [r7, #48] @ 0x30 8014d6e: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014d70: 6af9 ldr r1, [r7, #44] @ 0x2c 8014d72: 6b3a ldr r2, [r7, #48] @ 0x30 8014d74: e841 2300 strex r3, r2, [r1] 8014d78: 62bb str r3, [r7, #40] @ 0x28 return(result); 8014d7a: 6abb ldr r3, [r7, #40] @ 0x28 8014d7c: 2b00 cmp r3, #0 8014d7e: d1e5 bne.n 8014d4c /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8014d80: 6efb ldr r3, [r7, #108] @ 0x6c 8014d82: 2220 movs r2, #32 8014d84: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8014d88: 6efb ldr r3, [r7, #108] @ 0x6c 8014d8a: 6b1b ldr r3, [r3, #48] @ 0x30 8014d8c: 2b01 cmp r3, #1 8014d8e: d119 bne.n 8014dc4 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8014d90: 6efb ldr r3, [r7, #108] @ 0x6c 8014d92: 681b ldr r3, [r3, #0] 8014d94: 330c adds r3, #12 8014d96: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014d98: 693b ldr r3, [r7, #16] 8014d9a: e853 3f00 ldrex r3, [r3] 8014d9e: 60fb str r3, [r7, #12] return(result); 8014da0: 68fb ldr r3, [r7, #12] 8014da2: f023 0310 bic.w r3, r3, #16 8014da6: 65fb str r3, [r7, #92] @ 0x5c 8014da8: 6efb ldr r3, [r7, #108] @ 0x6c 8014daa: 681b ldr r3, [r3, #0] 8014dac: 330c adds r3, #12 8014dae: 6dfa ldr r2, [r7, #92] @ 0x5c 8014db0: 61fa str r2, [r7, #28] 8014db2: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014db4: 69b9 ldr r1, [r7, #24] 8014db6: 69fa ldr r2, [r7, #28] 8014db8: e841 2300 strex r3, r2, [r1] 8014dbc: 617b str r3, [r7, #20] return(result); 8014dbe: 697b ldr r3, [r7, #20] 8014dc0: 2b00 cmp r3, #0 8014dc2: d1e5 bne.n 8014d90 } } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; 8014dc4: 6efb ldr r3, [r7, #108] @ 0x6c 8014dc6: 2200 movs r2, #0 8014dc8: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : use Rx Event callback */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8014dca: 6efb ldr r3, [r7, #108] @ 0x6c 8014dcc: 6b1b ldr r3, [r3, #48] @ 0x30 8014dce: 2b01 cmp r3, #1 8014dd0: d106 bne.n 8014de0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); 8014dd2: 6efb ldr r3, [r7, #108] @ 0x6c 8014dd4: 8d9b ldrh r3, [r3, #44] @ 0x2c 8014dd6: 4619 mov r1, r3 8014dd8: 6ef8 ldr r0, [r7, #108] @ 0x6c 8014dda: f7f9 f83f bl 800de5c #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } } 8014dde: e002 b.n 8014de6 HAL_UART_RxCpltCallback(huart); 8014de0: 6ef8 ldr r0, [r7, #108] @ 0x6c 8014de2: f7ff fef6 bl 8014bd2 } 8014de6: bf00 nop 8014de8: 3770 adds r7, #112 @ 0x70 8014dea: 46bd mov sp, r7 8014dec: bd80 pop {r7, pc} 08014dee : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) { 8014dee: b580 push {r7, lr} 8014df0: b084 sub sp, #16 8014df2: af00 add r7, sp, #0 8014df4: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8014df6: 687b ldr r3, [r7, #4] 8014df8: 6a5b ldr r3, [r3, #36] @ 0x24 8014dfa: 60fb str r3, [r7, #12] /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Half Transfer */ huart->RxEventType = HAL_UART_RXEVENT_HT; 8014dfc: 68fb ldr r3, [r7, #12] 8014dfe: 2201 movs r2, #1 8014e00: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : use Rx Event callback */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8014e02: 68fb ldr r3, [r7, #12] 8014e04: 6b1b ldr r3, [r3, #48] @ 0x30 8014e06: 2b01 cmp r3, #1 8014e08: d108 bne.n 8014e1c #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize / 2U); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U); 8014e0a: 68fb ldr r3, [r7, #12] 8014e0c: 8d9b ldrh r3, [r3, #44] @ 0x2c 8014e0e: 085b lsrs r3, r3, #1 8014e10: b29b uxth r3, r3 8014e12: 4619 mov r1, r3 8014e14: 68f8 ldr r0, [r7, #12] 8014e16: f7f9 f821 bl 800de5c #else /*Call legacy weak Rx Half complete callback*/ HAL_UART_RxHalfCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } } 8014e1a: e002 b.n 8014e22 HAL_UART_RxHalfCpltCallback(huart); 8014e1c: 68f8 ldr r0, [r7, #12] 8014e1e: f7ff fee1 bl 8014be4 } 8014e22: bf00 nop 8014e24: 3710 adds r7, #16 8014e26: 46bd mov sp, r7 8014e28: bd80 pop {r7, pc} 08014e2a : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAError(DMA_HandleTypeDef *hdma) { 8014e2a: b580 push {r7, lr} 8014e2c: b084 sub sp, #16 8014e2e: af00 add r7, sp, #0 8014e30: 6078 str r0, [r7, #4] uint32_t dmarequest = 0x00U; 8014e32: 2300 movs r3, #0 8014e34: 60fb str r3, [r7, #12] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8014e36: 687b ldr r3, [r7, #4] 8014e38: 6a5b ldr r3, [r3, #36] @ 0x24 8014e3a: 60bb str r3, [r7, #8] /* Stop UART DMA Tx request if ongoing */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 8014e3c: 68bb ldr r3, [r7, #8] 8014e3e: 681b ldr r3, [r3, #0] 8014e40: 695b ldr r3, [r3, #20] 8014e42: f003 0380 and.w r3, r3, #128 @ 0x80 8014e46: 2b00 cmp r3, #0 8014e48: bf14 ite ne 8014e4a: 2301 movne r3, #1 8014e4c: 2300 moveq r3, #0 8014e4e: b2db uxtb r3, r3 8014e50: 60fb str r3, [r7, #12] if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8014e52: 68bb ldr r3, [r7, #8] 8014e54: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8014e58: b2db uxtb r3, r3 8014e5a: 2b21 cmp r3, #33 @ 0x21 8014e5c: d108 bne.n 8014e70 8014e5e: 68fb ldr r3, [r7, #12] 8014e60: 2b00 cmp r3, #0 8014e62: d005 beq.n 8014e70 { huart->TxXferCount = 0x00U; 8014e64: 68bb ldr r3, [r7, #8] 8014e66: 2200 movs r2, #0 8014e68: 84da strh r2, [r3, #38] @ 0x26 UART_EndTxTransfer(huart); 8014e6a: 68b8 ldr r0, [r7, #8] 8014e6c: f000 f8fa bl 8015064 } /* Stop UART DMA Rx request if ongoing */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8014e70: 68bb ldr r3, [r7, #8] 8014e72: 681b ldr r3, [r3, #0] 8014e74: 695b ldr r3, [r3, #20] 8014e76: f003 0340 and.w r3, r3, #64 @ 0x40 8014e7a: 2b00 cmp r3, #0 8014e7c: bf14 ite ne 8014e7e: 2301 movne r3, #1 8014e80: 2300 moveq r3, #0 8014e82: b2db uxtb r3, r3 8014e84: 60fb str r3, [r7, #12] if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8014e86: 68bb ldr r3, [r7, #8] 8014e88: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 8014e8c: b2db uxtb r3, r3 8014e8e: 2b22 cmp r3, #34 @ 0x22 8014e90: d108 bne.n 8014ea4 8014e92: 68fb ldr r3, [r7, #12] 8014e94: 2b00 cmp r3, #0 8014e96: d005 beq.n 8014ea4 { huart->RxXferCount = 0x00U; 8014e98: 68bb ldr r3, [r7, #8] 8014e9a: 2200 movs r2, #0 8014e9c: 85da strh r2, [r3, #46] @ 0x2e UART_EndRxTransfer(huart); 8014e9e: 68b8 ldr r0, [r7, #8] 8014ea0: f000 f907 bl 80150b2 } huart->ErrorCode |= HAL_UART_ERROR_DMA; 8014ea4: 68bb ldr r3, [r7, #8] 8014ea6: 6c5b ldr r3, [r3, #68] @ 0x44 8014ea8: f043 0210 orr.w r2, r3, #16 8014eac: 68bb ldr r3, [r7, #8] 8014eae: 645a str r2, [r3, #68] @ 0x44 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8014eb0: 68b8 ldr r0, [r7, #8] 8014eb2: f7f8 f873 bl 800cf9c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8014eb6: bf00 nop 8014eb8: 3710 adds r7, #16 8014eba: 46bd mov sp, r7 8014ebc: bd80 pop {r7, pc} 08014ebe : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8014ebe: b480 push {r7} 8014ec0: b085 sub sp, #20 8014ec2: af00 add r7, sp, #0 8014ec4: 60f8 str r0, [r7, #12] 8014ec6: 60b9 str r1, [r7, #8] 8014ec8: 4613 mov r3, r2 8014eca: 80fb strh r3, [r7, #6] huart->pRxBuffPtr = pData; 8014ecc: 68fb ldr r3, [r7, #12] 8014ece: 68ba ldr r2, [r7, #8] 8014ed0: 629a str r2, [r3, #40] @ 0x28 huart->RxXferSize = Size; 8014ed2: 68fb ldr r3, [r7, #12] 8014ed4: 88fa ldrh r2, [r7, #6] 8014ed6: 859a strh r2, [r3, #44] @ 0x2c huart->RxXferCount = Size; 8014ed8: 68fb ldr r3, [r7, #12] 8014eda: 88fa ldrh r2, [r7, #6] 8014edc: 85da strh r2, [r3, #46] @ 0x2e huart->ErrorCode = HAL_UART_ERROR_NONE; 8014ede: 68fb ldr r3, [r7, #12] 8014ee0: 2200 movs r2, #0 8014ee2: 645a str r2, [r3, #68] @ 0x44 huart->RxState = HAL_UART_STATE_BUSY_RX; 8014ee4: 68fb ldr r3, [r7, #12] 8014ee6: 2222 movs r2, #34 @ 0x22 8014ee8: f883 2042 strb.w r2, [r3, #66] @ 0x42 if (huart->Init.Parity != UART_PARITY_NONE) 8014eec: 68fb ldr r3, [r7, #12] 8014eee: 691b ldr r3, [r3, #16] 8014ef0: 2b00 cmp r3, #0 8014ef2: d007 beq.n 8014f04 { /* Enable the UART Parity Error Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8014ef4: 68fb ldr r3, [r7, #12] 8014ef6: 681b ldr r3, [r3, #0] 8014ef8: 68da ldr r2, [r3, #12] 8014efa: 68fb ldr r3, [r7, #12] 8014efc: 681b ldr r3, [r3, #0] 8014efe: f442 7280 orr.w r2, r2, #256 @ 0x100 8014f02: 60da str r2, [r3, #12] } /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8014f04: 68fb ldr r3, [r7, #12] 8014f06: 681b ldr r3, [r3, #0] 8014f08: 695a ldr r2, [r3, #20] 8014f0a: 68fb ldr r3, [r7, #12] 8014f0c: 681b ldr r3, [r3, #0] 8014f0e: f042 0201 orr.w r2, r2, #1 8014f12: 615a str r2, [r3, #20] /* Enable the UART Data Register not empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 8014f14: 68fb ldr r3, [r7, #12] 8014f16: 681b ldr r3, [r3, #0] 8014f18: 68da ldr r2, [r3, #12] 8014f1a: 68fb ldr r3, [r7, #12] 8014f1c: 681b ldr r3, [r3, #0] 8014f1e: f042 0220 orr.w r2, r2, #32 8014f22: 60da str r2, [r3, #12] return HAL_OK; 8014f24: 2300 movs r3, #0 } 8014f26: 4618 mov r0, r3 8014f28: 3714 adds r7, #20 8014f2a: 46bd mov sp, r7 8014f2c: bc80 pop {r7} 8014f2e: 4770 bx lr 08014f30 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8014f30: b580 push {r7, lr} 8014f32: b098 sub sp, #96 @ 0x60 8014f34: af00 add r7, sp, #0 8014f36: 60f8 str r0, [r7, #12] 8014f38: 60b9 str r1, [r7, #8] 8014f3a: 4613 mov r3, r2 8014f3c: 80fb strh r3, [r7, #6] uint32_t *tmp; huart->pRxBuffPtr = pData; 8014f3e: 68ba ldr r2, [r7, #8] 8014f40: 68fb ldr r3, [r7, #12] 8014f42: 629a str r2, [r3, #40] @ 0x28 huart->RxXferSize = Size; 8014f44: 68fb ldr r3, [r7, #12] 8014f46: 88fa ldrh r2, [r7, #6] 8014f48: 859a strh r2, [r3, #44] @ 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8014f4a: 68fb ldr r3, [r7, #12] 8014f4c: 2200 movs r2, #0 8014f4e: 645a str r2, [r3, #68] @ 0x44 huart->RxState = HAL_UART_STATE_BUSY_RX; 8014f50: 68fb ldr r3, [r7, #12] 8014f52: 2222 movs r2, #34 @ 0x22 8014f54: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Set the UART DMA transfer complete callback */ huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8014f58: 68fb ldr r3, [r7, #12] 8014f5a: 6bdb ldr r3, [r3, #60] @ 0x3c 8014f5c: 4a3e ldr r2, [pc, #248] @ (8015058 ) 8014f5e: 629a str r2, [r3, #40] @ 0x28 /* Set the UART DMA Half transfer complete callback */ huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8014f60: 68fb ldr r3, [r7, #12] 8014f62: 6bdb ldr r3, [r3, #60] @ 0x3c 8014f64: 4a3d ldr r2, [pc, #244] @ (801505c ) 8014f66: 62da str r2, [r3, #44] @ 0x2c /* Set the DMA error callback */ huart->hdmarx->XferErrorCallback = UART_DMAError; 8014f68: 68fb ldr r3, [r7, #12] 8014f6a: 6bdb ldr r3, [r3, #60] @ 0x3c 8014f6c: 4a3c ldr r2, [pc, #240] @ (8015060 ) 8014f6e: 631a str r2, [r3, #48] @ 0x30 /* Set the DMA abort callback */ huart->hdmarx->XferAbortCallback = NULL; 8014f70: 68fb ldr r3, [r7, #12] 8014f72: 6bdb ldr r3, [r3, #60] @ 0x3c 8014f74: 2200 movs r2, #0 8014f76: 635a str r2, [r3, #52] @ 0x34 /* Enable the DMA stream */ tmp = (uint32_t *)&pData; 8014f78: f107 0308 add.w r3, r7, #8 8014f7c: 65fb str r3, [r7, #92] @ 0x5c HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size); 8014f7e: 68fb ldr r3, [r7, #12] 8014f80: 6bd8 ldr r0, [r3, #60] @ 0x3c 8014f82: 68fb ldr r3, [r7, #12] 8014f84: 681b ldr r3, [r3, #0] 8014f86: 3304 adds r3, #4 8014f88: 4619 mov r1, r3 8014f8a: 6dfb ldr r3, [r7, #92] @ 0x5c 8014f8c: 681a ldr r2, [r3, #0] 8014f8e: 88fb ldrh r3, [r7, #6] 8014f90: f7fc f93a bl 8011208 /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */ __HAL_UART_CLEAR_OREFLAG(huart); 8014f94: 2300 movs r3, #0 8014f96: 613b str r3, [r7, #16] 8014f98: 68fb ldr r3, [r7, #12] 8014f9a: 681b ldr r3, [r3, #0] 8014f9c: 681b ldr r3, [r3, #0] 8014f9e: 613b str r3, [r7, #16] 8014fa0: 68fb ldr r3, [r7, #12] 8014fa2: 681b ldr r3, [r3, #0] 8014fa4: 685b ldr r3, [r3, #4] 8014fa6: 613b str r3, [r7, #16] 8014fa8: 693b ldr r3, [r7, #16] if (huart->Init.Parity != UART_PARITY_NONE) 8014faa: 68fb ldr r3, [r7, #12] 8014fac: 691b ldr r3, [r3, #16] 8014fae: 2b00 cmp r3, #0 8014fb0: d019 beq.n 8014fe6 { /* Enable the UART Parity Error Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8014fb2: 68fb ldr r3, [r7, #12] 8014fb4: 681b ldr r3, [r3, #0] 8014fb6: 330c adds r3, #12 8014fb8: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014fba: 6c3b ldr r3, [r7, #64] @ 0x40 8014fbc: e853 3f00 ldrex r3, [r3] 8014fc0: 63fb str r3, [r7, #60] @ 0x3c return(result); 8014fc2: 6bfb ldr r3, [r7, #60] @ 0x3c 8014fc4: f443 7380 orr.w r3, r3, #256 @ 0x100 8014fc8: 65bb str r3, [r7, #88] @ 0x58 8014fca: 68fb ldr r3, [r7, #12] 8014fcc: 681b ldr r3, [r3, #0] 8014fce: 330c adds r3, #12 8014fd0: 6dba ldr r2, [r7, #88] @ 0x58 8014fd2: 64fa str r2, [r7, #76] @ 0x4c 8014fd4: 64bb str r3, [r7, #72] @ 0x48 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8014fd6: 6cb9 ldr r1, [r7, #72] @ 0x48 8014fd8: 6cfa ldr r2, [r7, #76] @ 0x4c 8014fda: e841 2300 strex r3, r2, [r1] 8014fde: 647b str r3, [r7, #68] @ 0x44 return(result); 8014fe0: 6c7b ldr r3, [r7, #68] @ 0x44 8014fe2: 2b00 cmp r3, #0 8014fe4: d1e5 bne.n 8014fb2 } /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 8014fe6: 68fb ldr r3, [r7, #12] 8014fe8: 681b ldr r3, [r3, #0] 8014fea: 3314 adds r3, #20 8014fec: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8014fee: 6afb ldr r3, [r7, #44] @ 0x2c 8014ff0: e853 3f00 ldrex r3, [r3] 8014ff4: 62bb str r3, [r7, #40] @ 0x28 return(result); 8014ff6: 6abb ldr r3, [r7, #40] @ 0x28 8014ff8: f043 0301 orr.w r3, r3, #1 8014ffc: 657b str r3, [r7, #84] @ 0x54 8014ffe: 68fb ldr r3, [r7, #12] 8015000: 681b ldr r3, [r3, #0] 8015002: 3314 adds r3, #20 8015004: 6d7a ldr r2, [r7, #84] @ 0x54 8015006: 63ba str r2, [r7, #56] @ 0x38 8015008: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801500a: 6b79 ldr r1, [r7, #52] @ 0x34 801500c: 6bba ldr r2, [r7, #56] @ 0x38 801500e: e841 2300 strex r3, r2, [r1] 8015012: 633b str r3, [r7, #48] @ 0x30 return(result); 8015014: 6b3b ldr r3, [r7, #48] @ 0x30 8015016: 2b00 cmp r3, #0 8015018: d1e5 bne.n 8014fe6 /* Enable the DMA transfer for the receiver request by setting the DMAR bit in the UART CR3 register */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 801501a: 68fb ldr r3, [r7, #12] 801501c: 681b ldr r3, [r3, #0] 801501e: 3314 adds r3, #20 8015020: 61bb str r3, [r7, #24] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8015022: 69bb ldr r3, [r7, #24] 8015024: e853 3f00 ldrex r3, [r3] 8015028: 617b str r3, [r7, #20] return(result); 801502a: 697b ldr r3, [r7, #20] 801502c: f043 0340 orr.w r3, r3, #64 @ 0x40 8015030: 653b str r3, [r7, #80] @ 0x50 8015032: 68fb ldr r3, [r7, #12] 8015034: 681b ldr r3, [r3, #0] 8015036: 3314 adds r3, #20 8015038: 6d3a ldr r2, [r7, #80] @ 0x50 801503a: 627a str r2, [r7, #36] @ 0x24 801503c: 623b str r3, [r7, #32] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801503e: 6a39 ldr r1, [r7, #32] 8015040: 6a7a ldr r2, [r7, #36] @ 0x24 8015042: e841 2300 strex r3, r2, [r1] 8015046: 61fb str r3, [r7, #28] return(result); 8015048: 69fb ldr r3, [r7, #28] 801504a: 2b00 cmp r3, #0 801504c: d1e5 bne.n 801501a return HAL_OK; 801504e: 2300 movs r3, #0 } 8015050: 4618 mov r0, r3 8015052: 3760 adds r7, #96 @ 0x60 8015054: 46bd mov sp, r7 8015056: bd80 pop {r7, pc} 8015058: 08014cc3 .word 0x08014cc3 801505c: 08014def .word 0x08014def 8015060: 08014e2b .word 0x08014e2b 08015064 : * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). * @param huart UART handle. * @retval None */ static void UART_EndTxTransfer(UART_HandleTypeDef *huart) { 8015064: b480 push {r7} 8015066: b089 sub sp, #36 @ 0x24 8015068: af00 add r7, sp, #0 801506a: 6078 str r0, [r7, #4] /* Disable TXEIE and TCIE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 801506c: 687b ldr r3, [r7, #4] 801506e: 681b ldr r3, [r3, #0] 8015070: 330c adds r3, #12 8015072: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8015074: 68fb ldr r3, [r7, #12] 8015076: e853 3f00 ldrex r3, [r3] 801507a: 60bb str r3, [r7, #8] return(result); 801507c: 68bb ldr r3, [r7, #8] 801507e: f023 03c0 bic.w r3, r3, #192 @ 0xc0 8015082: 61fb str r3, [r7, #28] 8015084: 687b ldr r3, [r7, #4] 8015086: 681b ldr r3, [r3, #0] 8015088: 330c adds r3, #12 801508a: 69fa ldr r2, [r7, #28] 801508c: 61ba str r2, [r7, #24] 801508e: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8015090: 6979 ldr r1, [r7, #20] 8015092: 69ba ldr r2, [r7, #24] 8015094: e841 2300 strex r3, r2, [r1] 8015098: 613b str r3, [r7, #16] return(result); 801509a: 693b ldr r3, [r7, #16] 801509c: 2b00 cmp r3, #0 801509e: d1e5 bne.n 801506c /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 80150a0: 687b ldr r3, [r7, #4] 80150a2: 2220 movs r2, #32 80150a4: f883 2041 strb.w r2, [r3, #65] @ 0x41 } 80150a8: bf00 nop 80150aa: 3724 adds r7, #36 @ 0x24 80150ac: 46bd mov sp, r7 80150ae: bc80 pop {r7} 80150b0: 4770 bx lr 080150b2 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 80150b2: b480 push {r7} 80150b4: b095 sub sp, #84 @ 0x54 80150b6: af00 add r7, sp, #0 80150b8: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80150ba: 687b ldr r3, [r7, #4] 80150bc: 681b ldr r3, [r3, #0] 80150be: 330c adds r3, #12 80150c0: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80150c2: 6b7b ldr r3, [r7, #52] @ 0x34 80150c4: e853 3f00 ldrex r3, [r3] 80150c8: 633b str r3, [r7, #48] @ 0x30 return(result); 80150ca: 6b3b ldr r3, [r7, #48] @ 0x30 80150cc: f423 7390 bic.w r3, r3, #288 @ 0x120 80150d0: 64fb str r3, [r7, #76] @ 0x4c 80150d2: 687b ldr r3, [r7, #4] 80150d4: 681b ldr r3, [r3, #0] 80150d6: 330c adds r3, #12 80150d8: 6cfa ldr r2, [r7, #76] @ 0x4c 80150da: 643a str r2, [r7, #64] @ 0x40 80150dc: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80150de: 6bf9 ldr r1, [r7, #60] @ 0x3c 80150e0: 6c3a ldr r2, [r7, #64] @ 0x40 80150e2: e841 2300 strex r3, r2, [r1] 80150e6: 63bb str r3, [r7, #56] @ 0x38 return(result); 80150e8: 6bbb ldr r3, [r7, #56] @ 0x38 80150ea: 2b00 cmp r3, #0 80150ec: d1e5 bne.n 80150ba ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80150ee: 687b ldr r3, [r7, #4] 80150f0: 681b ldr r3, [r3, #0] 80150f2: 3314 adds r3, #20 80150f4: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80150f6: 6a3b ldr r3, [r7, #32] 80150f8: e853 3f00 ldrex r3, [r3] 80150fc: 61fb str r3, [r7, #28] return(result); 80150fe: 69fb ldr r3, [r7, #28] 8015100: f023 0301 bic.w r3, r3, #1 8015104: 64bb str r3, [r7, #72] @ 0x48 8015106: 687b ldr r3, [r7, #4] 8015108: 681b ldr r3, [r3, #0] 801510a: 3314 adds r3, #20 801510c: 6cba ldr r2, [r7, #72] @ 0x48 801510e: 62fa str r2, [r7, #44] @ 0x2c 8015110: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8015112: 6ab9 ldr r1, [r7, #40] @ 0x28 8015114: 6afa ldr r2, [r7, #44] @ 0x2c 8015116: e841 2300 strex r3, r2, [r1] 801511a: 627b str r3, [r7, #36] @ 0x24 return(result); 801511c: 6a7b ldr r3, [r7, #36] @ 0x24 801511e: 2b00 cmp r3, #0 8015120: d1e5 bne.n 80150ee /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8015122: 687b ldr r3, [r7, #4] 8015124: 6b1b ldr r3, [r3, #48] @ 0x30 8015126: 2b01 cmp r3, #1 8015128: d119 bne.n 801515e { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 801512a: 687b ldr r3, [r7, #4] 801512c: 681b ldr r3, [r3, #0] 801512e: 330c adds r3, #12 8015130: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8015132: 68fb ldr r3, [r7, #12] 8015134: e853 3f00 ldrex r3, [r3] 8015138: 60bb str r3, [r7, #8] return(result); 801513a: 68bb ldr r3, [r7, #8] 801513c: f023 0310 bic.w r3, r3, #16 8015140: 647b str r3, [r7, #68] @ 0x44 8015142: 687b ldr r3, [r7, #4] 8015144: 681b ldr r3, [r3, #0] 8015146: 330c adds r3, #12 8015148: 6c7a ldr r2, [r7, #68] @ 0x44 801514a: 61ba str r2, [r7, #24] 801514c: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801514e: 6979 ldr r1, [r7, #20] 8015150: 69ba ldr r2, [r7, #24] 8015152: e841 2300 strex r3, r2, [r1] 8015156: 613b str r3, [r7, #16] return(result); 8015158: 693b ldr r3, [r7, #16] 801515a: 2b00 cmp r3, #0 801515c: d1e5 bne.n 801512a } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 801515e: 687b ldr r3, [r7, #4] 8015160: 2220 movs r2, #32 8015162: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8015166: 687b ldr r3, [r7, #4] 8015168: 2200 movs r2, #0 801516a: 631a str r2, [r3, #48] @ 0x30 } 801516c: bf00 nop 801516e: 3754 adds r7, #84 @ 0x54 8015170: 46bd mov sp, r7 8015172: bc80 pop {r7} 8015174: 4770 bx lr 08015176 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { 8015176: b580 push {r7, lr} 8015178: b084 sub sp, #16 801517a: af00 add r7, sp, #0 801517c: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 801517e: 687b ldr r3, [r7, #4] 8015180: 6a5b ldr r3, [r3, #36] @ 0x24 8015182: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; 8015184: 68fb ldr r3, [r7, #12] 8015186: 2200 movs r2, #0 8015188: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; 801518a: 68fb ldr r3, [r7, #12] 801518c: 2200 movs r2, #0 801518e: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8015190: 68f8 ldr r0, [r7, #12] 8015192: f7f7 ff03 bl 800cf9c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8015196: bf00 nop 8015198: 3710 adds r7, #16 801519a: 46bd mov sp, r7 801519c: bd80 pop {r7, pc} 0801519e : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { 801519e: b480 push {r7} 80151a0: b085 sub sp, #20 80151a2: af00 add r7, sp, #0 80151a4: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) 80151a6: 687b ldr r3, [r7, #4] 80151a8: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 80151ac: b2db uxtb r3, r3 80151ae: 2b21 cmp r3, #33 @ 0x21 80151b0: d13e bne.n 8015230 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 80151b2: 687b ldr r3, [r7, #4] 80151b4: 689b ldr r3, [r3, #8] 80151b6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80151ba: d114 bne.n 80151e6 80151bc: 687b ldr r3, [r7, #4] 80151be: 691b ldr r3, [r3, #16] 80151c0: 2b00 cmp r3, #0 80151c2: d110 bne.n 80151e6 { tmp = (const uint16_t *) huart->pTxBuffPtr; 80151c4: 687b ldr r3, [r7, #4] 80151c6: 6a1b ldr r3, [r3, #32] 80151c8: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 80151ca: 68fb ldr r3, [r7, #12] 80151cc: 881b ldrh r3, [r3, #0] 80151ce: 461a mov r2, r3 80151d0: 687b ldr r3, [r7, #4] 80151d2: 681b ldr r3, [r3, #0] 80151d4: f3c2 0208 ubfx r2, r2, #0, #9 80151d8: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; 80151da: 687b ldr r3, [r7, #4] 80151dc: 6a1b ldr r3, [r3, #32] 80151de: 1c9a adds r2, r3, #2 80151e0: 687b ldr r3, [r7, #4] 80151e2: 621a str r2, [r3, #32] 80151e4: e008 b.n 80151f8 } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 80151e6: 687b ldr r3, [r7, #4] 80151e8: 6a1b ldr r3, [r3, #32] 80151ea: 1c59 adds r1, r3, #1 80151ec: 687a ldr r2, [r7, #4] 80151ee: 6211 str r1, [r2, #32] 80151f0: 781a ldrb r2, [r3, #0] 80151f2: 687b ldr r3, [r7, #4] 80151f4: 681b ldr r3, [r3, #0] 80151f6: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) 80151f8: 687b ldr r3, [r7, #4] 80151fa: 8cdb ldrh r3, [r3, #38] @ 0x26 80151fc: b29b uxth r3, r3 80151fe: 3b01 subs r3, #1 8015200: b29b uxth r3, r3 8015202: 687a ldr r2, [r7, #4] 8015204: 4619 mov r1, r3 8015206: 84d1 strh r1, [r2, #38] @ 0x26 8015208: 2b00 cmp r3, #0 801520a: d10f bne.n 801522c { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 801520c: 687b ldr r3, [r7, #4] 801520e: 681b ldr r3, [r3, #0] 8015210: 68da ldr r2, [r3, #12] 8015212: 687b ldr r3, [r7, #4] 8015214: 681b ldr r3, [r3, #0] 8015216: f022 0280 bic.w r2, r2, #128 @ 0x80 801521a: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 801521c: 687b ldr r3, [r7, #4] 801521e: 681b ldr r3, [r3, #0] 8015220: 68da ldr r2, [r3, #12] 8015222: 687b ldr r3, [r7, #4] 8015224: 681b ldr r3, [r3, #0] 8015226: f042 0240 orr.w r2, r2, #64 @ 0x40 801522a: 60da str r2, [r3, #12] } return HAL_OK; 801522c: 2300 movs r3, #0 801522e: e000 b.n 8015232 } else { return HAL_BUSY; 8015230: 2302 movs r3, #2 } } 8015232: 4618 mov r0, r3 8015234: 3714 adds r7, #20 8015236: 46bd mov sp, r7 8015238: bc80 pop {r7} 801523a: 4770 bx lr 0801523c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { 801523c: b580 push {r7, lr} 801523e: b082 sub sp, #8 8015240: af00 add r7, sp, #0 8015242: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8015244: 687b ldr r3, [r7, #4] 8015246: 681b ldr r3, [r3, #0] 8015248: 68da ldr r2, [r3, #12] 801524a: 687b ldr r3, [r7, #4] 801524c: 681b ldr r3, [r3, #0] 801524e: f022 0240 bic.w r2, r2, #64 @ 0x40 8015252: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8015254: 687b ldr r3, [r7, #4] 8015256: 2220 movs r2, #32 8015258: f883 2041 strb.w r2, [r3, #65] @ 0x41 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); 801525c: 6878 ldr r0, [r7, #4] 801525e: f7f8 fe77 bl 800df50 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; 8015262: 2300 movs r3, #0 } 8015264: 4618 mov r0, r3 8015266: 3708 adds r7, #8 8015268: 46bd mov sp, r7 801526a: bd80 pop {r7, pc} 0801526c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { 801526c: b580 push {r7, lr} 801526e: b08c sub sp, #48 @ 0x30 8015270: af00 add r7, sp, #0 8015272: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) 8015274: 687b ldr r3, [r7, #4] 8015276: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 801527a: b2db uxtb r3, r3 801527c: 2b22 cmp r3, #34 @ 0x22 801527e: f040 80ae bne.w 80153de { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8015282: 687b ldr r3, [r7, #4] 8015284: 689b ldr r3, [r3, #8] 8015286: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 801528a: d117 bne.n 80152bc 801528c: 687b ldr r3, [r7, #4] 801528e: 691b ldr r3, [r3, #16] 8015290: 2b00 cmp r3, #0 8015292: d113 bne.n 80152bc { pdata8bits = NULL; 8015294: 2300 movs r3, #0 8015296: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = (uint16_t *) huart->pRxBuffPtr; 8015298: 687b ldr r3, [r7, #4] 801529a: 6a9b ldr r3, [r3, #40] @ 0x28 801529c: 62bb str r3, [r7, #40] @ 0x28 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 801529e: 687b ldr r3, [r7, #4] 80152a0: 681b ldr r3, [r3, #0] 80152a2: 685b ldr r3, [r3, #4] 80152a4: b29b uxth r3, r3 80152a6: f3c3 0308 ubfx r3, r3, #0, #9 80152aa: b29a uxth r2, r3 80152ac: 6abb ldr r3, [r7, #40] @ 0x28 80152ae: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; 80152b0: 687b ldr r3, [r7, #4] 80152b2: 6a9b ldr r3, [r3, #40] @ 0x28 80152b4: 1c9a adds r2, r3, #2 80152b6: 687b ldr r3, [r7, #4] 80152b8: 629a str r2, [r3, #40] @ 0x28 80152ba: e026 b.n 801530a } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; 80152bc: 687b ldr r3, [r7, #4] 80152be: 6a9b ldr r3, [r3, #40] @ 0x28 80152c0: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = NULL; 80152c2: 2300 movs r3, #0 80152c4: 62bb str r3, [r7, #40] @ 0x28 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) 80152c6: 687b ldr r3, [r7, #4] 80152c8: 689b ldr r3, [r3, #8] 80152ca: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80152ce: d007 beq.n 80152e0 80152d0: 687b ldr r3, [r7, #4] 80152d2: 689b ldr r3, [r3, #8] 80152d4: 2b00 cmp r3, #0 80152d6: d10a bne.n 80152ee 80152d8: 687b ldr r3, [r7, #4] 80152da: 691b ldr r3, [r3, #16] 80152dc: 2b00 cmp r3, #0 80152de: d106 bne.n 80152ee { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 80152e0: 687b ldr r3, [r7, #4] 80152e2: 681b ldr r3, [r3, #0] 80152e4: 685b ldr r3, [r3, #4] 80152e6: b2da uxtb r2, r3 80152e8: 6afb ldr r3, [r7, #44] @ 0x2c 80152ea: 701a strb r2, [r3, #0] 80152ec: e008 b.n 8015300 } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 80152ee: 687b ldr r3, [r7, #4] 80152f0: 681b ldr r3, [r3, #0] 80152f2: 685b ldr r3, [r3, #4] 80152f4: b2db uxtb r3, r3 80152f6: f003 037f and.w r3, r3, #127 @ 0x7f 80152fa: b2da uxtb r2, r3 80152fc: 6afb ldr r3, [r7, #44] @ 0x2c 80152fe: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; 8015300: 687b ldr r3, [r7, #4] 8015302: 6a9b ldr r3, [r3, #40] @ 0x28 8015304: 1c5a adds r2, r3, #1 8015306: 687b ldr r3, [r7, #4] 8015308: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) 801530a: 687b ldr r3, [r7, #4] 801530c: 8ddb ldrh r3, [r3, #46] @ 0x2e 801530e: b29b uxth r3, r3 8015310: 3b01 subs r3, #1 8015312: b29b uxth r3, r3 8015314: 687a ldr r2, [r7, #4] 8015316: 4619 mov r1, r3 8015318: 85d1 strh r1, [r2, #46] @ 0x2e 801531a: 2b00 cmp r3, #0 801531c: d15d bne.n 80153da { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 801531e: 687b ldr r3, [r7, #4] 8015320: 681b ldr r3, [r3, #0] 8015322: 68da ldr r2, [r3, #12] 8015324: 687b ldr r3, [r7, #4] 8015326: 681b ldr r3, [r3, #0] 8015328: f022 0220 bic.w r2, r2, #32 801532c: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 801532e: 687b ldr r3, [r7, #4] 8015330: 681b ldr r3, [r3, #0] 8015332: 68da ldr r2, [r3, #12] 8015334: 687b ldr r3, [r7, #4] 8015336: 681b ldr r3, [r3, #0] 8015338: f422 7280 bic.w r2, r2, #256 @ 0x100 801533c: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 801533e: 687b ldr r3, [r7, #4] 8015340: 681b ldr r3, [r3, #0] 8015342: 695a ldr r2, [r3, #20] 8015344: 687b ldr r3, [r7, #4] 8015346: 681b ldr r3, [r3, #0] 8015348: f022 0201 bic.w r2, r2, #1 801534c: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 801534e: 687b ldr r3, [r7, #4] 8015350: 2220 movs r2, #32 8015352: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Initialize type of RxEvent to Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; 8015356: 687b ldr r3, [r7, #4] 8015358: 2200 movs r2, #0 801535a: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 801535c: 687b ldr r3, [r7, #4] 801535e: 6b1b ldr r3, [r3, #48] @ 0x30 8015360: 2b01 cmp r3, #1 8015362: d135 bne.n 80153d0 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8015364: 687b ldr r3, [r7, #4] 8015366: 2200 movs r2, #0 8015368: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 801536a: 687b ldr r3, [r7, #4] 801536c: 681b ldr r3, [r3, #0] 801536e: 330c adds r3, #12 8015370: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8015372: 697b ldr r3, [r7, #20] 8015374: e853 3f00 ldrex r3, [r3] 8015378: 613b str r3, [r7, #16] return(result); 801537a: 693b ldr r3, [r7, #16] 801537c: f023 0310 bic.w r3, r3, #16 8015380: 627b str r3, [r7, #36] @ 0x24 8015382: 687b ldr r3, [r7, #4] 8015384: 681b ldr r3, [r3, #0] 8015386: 330c adds r3, #12 8015388: 6a7a ldr r2, [r7, #36] @ 0x24 801538a: 623a str r2, [r7, #32] 801538c: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801538e: 69f9 ldr r1, [r7, #28] 8015390: 6a3a ldr r2, [r7, #32] 8015392: e841 2300 strex r3, r2, [r1] 8015396: 61bb str r3, [r7, #24] return(result); 8015398: 69bb ldr r3, [r7, #24] 801539a: 2b00 cmp r3, #0 801539c: d1e5 bne.n 801536a /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) 801539e: 687b ldr r3, [r7, #4] 80153a0: 681b ldr r3, [r3, #0] 80153a2: 681b ldr r3, [r3, #0] 80153a4: f003 0310 and.w r3, r3, #16 80153a8: 2b10 cmp r3, #16 80153aa: d10a bne.n 80153c2 { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); 80153ac: 2300 movs r3, #0 80153ae: 60fb str r3, [r7, #12] 80153b0: 687b ldr r3, [r7, #4] 80153b2: 681b ldr r3, [r3, #0] 80153b4: 681b ldr r3, [r3, #0] 80153b6: 60fb str r3, [r7, #12] 80153b8: 687b ldr r3, [r7, #4] 80153ba: 681b ldr r3, [r3, #0] 80153bc: 685b ldr r3, [r3, #4] 80153be: 60fb str r3, [r7, #12] 80153c0: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); 80153c2: 687b ldr r3, [r7, #4] 80153c4: 8d9b ldrh r3, [r3, #44] @ 0x2c 80153c6: 4619 mov r1, r3 80153c8: 6878 ldr r0, [r7, #4] 80153ca: f7f8 fd47 bl 800de5c 80153ce: e002 b.n 80153d6 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); 80153d0: 6878 ldr r0, [r7, #4] 80153d2: f7ff fbfe bl 8014bd2 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; 80153d6: 2300 movs r3, #0 80153d8: e002 b.n 80153e0 } return HAL_OK; 80153da: 2300 movs r3, #0 80153dc: e000 b.n 80153e0 } else { return HAL_BUSY; 80153de: 2302 movs r3, #2 } } 80153e0: 4618 mov r0, r3 80153e2: 3730 adds r7, #48 @ 0x30 80153e4: 46bd mov sp, r7 80153e6: bd80 pop {r7, pc} 080153e8 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80153e8: b580 push {r7, lr} 80153ea: b084 sub sp, #16 80153ec: af00 add r7, sp, #0 80153ee: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80153f0: 687b ldr r3, [r7, #4] 80153f2: 681b ldr r3, [r3, #0] 80153f4: 691b ldr r3, [r3, #16] 80153f6: f423 5140 bic.w r1, r3, #12288 @ 0x3000 80153fa: 687b ldr r3, [r7, #4] 80153fc: 68da ldr r2, [r3, #12] 80153fe: 687b ldr r3, [r7, #4] 8015400: 681b ldr r3, [r3, #0] 8015402: 430a orrs r2, r1 8015404: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8015406: 687b ldr r3, [r7, #4] 8015408: 689a ldr r2, [r3, #8] 801540a: 687b ldr r3, [r7, #4] 801540c: 691b ldr r3, [r3, #16] 801540e: 431a orrs r2, r3 8015410: 687b ldr r3, [r7, #4] 8015412: 695b ldr r3, [r3, #20] 8015414: 4313 orrs r3, r2 8015416: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 8015418: 687b ldr r3, [r7, #4] 801541a: 681b ldr r3, [r3, #0] 801541c: 68db ldr r3, [r3, #12] 801541e: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 8015422: f023 030c bic.w r3, r3, #12 8015426: 687a ldr r2, [r7, #4] 8015428: 6812 ldr r2, [r2, #0] 801542a: 68b9 ldr r1, [r7, #8] 801542c: 430b orrs r3, r1 801542e: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8015430: 687b ldr r3, [r7, #4] 8015432: 681b ldr r3, [r3, #0] 8015434: 695b ldr r3, [r3, #20] 8015436: f423 7140 bic.w r1, r3, #768 @ 0x300 801543a: 687b ldr r3, [r7, #4] 801543c: 699a ldr r2, [r3, #24] 801543e: 687b ldr r3, [r7, #4] 8015440: 681b ldr r3, [r3, #0] 8015442: 430a orrs r2, r1 8015444: 615a str r2, [r3, #20] if(huart->Instance == USART1) 8015446: 687b ldr r3, [r7, #4] 8015448: 681b ldr r3, [r3, #0] 801544a: 4a2c ldr r2, [pc, #176] @ (80154fc ) 801544c: 4293 cmp r3, r2 801544e: d103 bne.n 8015458 { pclk = HAL_RCC_GetPCLK2Freq(); 8015450: f7fd fa5c bl 801290c 8015454: 60f8 str r0, [r7, #12] 8015456: e002 b.n 801545e } else { pclk = HAL_RCC_GetPCLK1Freq(); 8015458: f7fd fa44 bl 80128e4 801545c: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 801545e: 68fa ldr r2, [r7, #12] 8015460: 4613 mov r3, r2 8015462: 009b lsls r3, r3, #2 8015464: 4413 add r3, r2 8015466: 009a lsls r2, r3, #2 8015468: 441a add r2, r3 801546a: 687b ldr r3, [r7, #4] 801546c: 685b ldr r3, [r3, #4] 801546e: 009b lsls r3, r3, #2 8015470: fbb2 f3f3 udiv r3, r2, r3 8015474: 4a22 ldr r2, [pc, #136] @ (8015500 ) 8015476: fba2 2303 umull r2, r3, r2, r3 801547a: 095b lsrs r3, r3, #5 801547c: 0119 lsls r1, r3, #4 801547e: 68fa ldr r2, [r7, #12] 8015480: 4613 mov r3, r2 8015482: 009b lsls r3, r3, #2 8015484: 4413 add r3, r2 8015486: 009a lsls r2, r3, #2 8015488: 441a add r2, r3 801548a: 687b ldr r3, [r7, #4] 801548c: 685b ldr r3, [r3, #4] 801548e: 009b lsls r3, r3, #2 8015490: fbb2 f2f3 udiv r2, r2, r3 8015494: 4b1a ldr r3, [pc, #104] @ (8015500 ) 8015496: fba3 0302 umull r0, r3, r3, r2 801549a: 095b lsrs r3, r3, #5 801549c: 2064 movs r0, #100 @ 0x64 801549e: fb00 f303 mul.w r3, r0, r3 80154a2: 1ad3 subs r3, r2, r3 80154a4: 011b lsls r3, r3, #4 80154a6: 3332 adds r3, #50 @ 0x32 80154a8: 4a15 ldr r2, [pc, #84] @ (8015500 ) 80154aa: fba2 2303 umull r2, r3, r2, r3 80154ae: 095b lsrs r3, r3, #5 80154b0: f003 03f0 and.w r3, r3, #240 @ 0xf0 80154b4: 4419 add r1, r3 80154b6: 68fa ldr r2, [r7, #12] 80154b8: 4613 mov r3, r2 80154ba: 009b lsls r3, r3, #2 80154bc: 4413 add r3, r2 80154be: 009a lsls r2, r3, #2 80154c0: 441a add r2, r3 80154c2: 687b ldr r3, [r7, #4] 80154c4: 685b ldr r3, [r3, #4] 80154c6: 009b lsls r3, r3, #2 80154c8: fbb2 f2f3 udiv r2, r2, r3 80154cc: 4b0c ldr r3, [pc, #48] @ (8015500 ) 80154ce: fba3 0302 umull r0, r3, r3, r2 80154d2: 095b lsrs r3, r3, #5 80154d4: 2064 movs r0, #100 @ 0x64 80154d6: fb00 f303 mul.w r3, r0, r3 80154da: 1ad3 subs r3, r2, r3 80154dc: 011b lsls r3, r3, #4 80154de: 3332 adds r3, #50 @ 0x32 80154e0: 4a07 ldr r2, [pc, #28] @ (8015500 ) 80154e2: fba2 2303 umull r2, r3, r2, r3 80154e6: 095b lsrs r3, r3, #5 80154e8: f003 020f and.w r2, r3, #15 80154ec: 687b ldr r3, [r7, #4] 80154ee: 681b ldr r3, [r3, #0] 80154f0: 440a add r2, r1 80154f2: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 80154f4: bf00 nop 80154f6: 3710 adds r7, #16 80154f8: 46bd mov sp, r7 80154fa: bd80 pop {r7, pc} 80154fc: 40013800 .word 0x40013800 8015500: 51eb851f .word 0x51eb851f 08015504 <__cvt>: 8015504: 2b00 cmp r3, #0 8015506: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 801550a: 461d mov r5, r3 801550c: bfbb ittet lt 801550e: f103 4300 addlt.w r3, r3, #2147483648 @ 0x80000000 8015512: 461d movlt r5, r3 8015514: 2300 movge r3, #0 8015516: 232d movlt r3, #45 @ 0x2d 8015518: b088 sub sp, #32 801551a: 4614 mov r4, r2 801551c: bfb8 it lt 801551e: 4614 movlt r4, r2 8015520: 9a12 ldr r2, [sp, #72] @ 0x48 8015522: 9e10 ldr r6, [sp, #64] @ 0x40 8015524: 7013 strb r3, [r2, #0] 8015526: 9b14 ldr r3, [sp, #80] @ 0x50 8015528: f8dd a04c ldr.w sl, [sp, #76] @ 0x4c 801552c: f023 0820 bic.w r8, r3, #32 8015530: f1b8 0f46 cmp.w r8, #70 @ 0x46 8015534: d005 beq.n 8015542 <__cvt+0x3e> 8015536: f1b8 0f45 cmp.w r8, #69 @ 0x45 801553a: d100 bne.n 801553e <__cvt+0x3a> 801553c: 3601 adds r6, #1 801553e: 2302 movs r3, #2 8015540: e000 b.n 8015544 <__cvt+0x40> 8015542: 2303 movs r3, #3 8015544: aa07 add r2, sp, #28 8015546: 9204 str r2, [sp, #16] 8015548: aa06 add r2, sp, #24 801554a: e9cd a202 strd sl, r2, [sp, #8] 801554e: e9cd 3600 strd r3, r6, [sp] 8015552: 4622 mov r2, r4 8015554: 462b mov r3, r5 8015556: f000 feb3 bl 80162c0 <_dtoa_r> 801555a: f1b8 0f47 cmp.w r8, #71 @ 0x47 801555e: 4607 mov r7, r0 8015560: d119 bne.n 8015596 <__cvt+0x92> 8015562: 9b11 ldr r3, [sp, #68] @ 0x44 8015564: 07db lsls r3, r3, #31 8015566: d50e bpl.n 8015586 <__cvt+0x82> 8015568: eb00 0906 add.w r9, r0, r6 801556c: 2200 movs r2, #0 801556e: 2300 movs r3, #0 8015570: 4620 mov r0, r4 8015572: 4629 mov r1, r5 8015574: f7f3 fa84 bl 8008a80 <__aeabi_dcmpeq> 8015578: b108 cbz r0, 801557e <__cvt+0x7a> 801557a: f8cd 901c str.w r9, [sp, #28] 801557e: 2230 movs r2, #48 @ 0x30 8015580: 9b07 ldr r3, [sp, #28] 8015582: 454b cmp r3, r9 8015584: d31e bcc.n 80155c4 <__cvt+0xc0> 8015586: 4638 mov r0, r7 8015588: 9b07 ldr r3, [sp, #28] 801558a: 9a15 ldr r2, [sp, #84] @ 0x54 801558c: 1bdb subs r3, r3, r7 801558e: 6013 str r3, [r2, #0] 8015590: b008 add sp, #32 8015592: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8015596: f1b8 0f46 cmp.w r8, #70 @ 0x46 801559a: eb00 0906 add.w r9, r0, r6 801559e: d1e5 bne.n 801556c <__cvt+0x68> 80155a0: 7803 ldrb r3, [r0, #0] 80155a2: 2b30 cmp r3, #48 @ 0x30 80155a4: d10a bne.n 80155bc <__cvt+0xb8> 80155a6: 2200 movs r2, #0 80155a8: 2300 movs r3, #0 80155aa: 4620 mov r0, r4 80155ac: 4629 mov r1, r5 80155ae: f7f3 fa67 bl 8008a80 <__aeabi_dcmpeq> 80155b2: b918 cbnz r0, 80155bc <__cvt+0xb8> 80155b4: f1c6 0601 rsb r6, r6, #1 80155b8: f8ca 6000 str.w r6, [sl] 80155bc: f8da 3000 ldr.w r3, [sl] 80155c0: 4499 add r9, r3 80155c2: e7d3 b.n 801556c <__cvt+0x68> 80155c4: 1c59 adds r1, r3, #1 80155c6: 9107 str r1, [sp, #28] 80155c8: 701a strb r2, [r3, #0] 80155ca: e7d9 b.n 8015580 <__cvt+0x7c> 080155cc <__exponent>: 80155cc: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 80155ce: 2900 cmp r1, #0 80155d0: bfb6 itet lt 80155d2: 232d movlt r3, #45 @ 0x2d 80155d4: 232b movge r3, #43 @ 0x2b 80155d6: 4249 neglt r1, r1 80155d8: 2909 cmp r1, #9 80155da: 7002 strb r2, [r0, #0] 80155dc: 7043 strb r3, [r0, #1] 80155de: dd29 ble.n 8015634 <__exponent+0x68> 80155e0: f10d 0307 add.w r3, sp, #7 80155e4: 461d mov r5, r3 80155e6: 270a movs r7, #10 80155e8: fbb1 f6f7 udiv r6, r1, r7 80155ec: 461a mov r2, r3 80155ee: fb07 1416 mls r4, r7, r6, r1 80155f2: 3430 adds r4, #48 @ 0x30 80155f4: f802 4c01 strb.w r4, [r2, #-1] 80155f8: 460c mov r4, r1 80155fa: 2c63 cmp r4, #99 @ 0x63 80155fc: 4631 mov r1, r6 80155fe: f103 33ff add.w r3, r3, #4294967295 8015602: dcf1 bgt.n 80155e8 <__exponent+0x1c> 8015604: 3130 adds r1, #48 @ 0x30 8015606: 1e94 subs r4, r2, #2 8015608: f803 1c01 strb.w r1, [r3, #-1] 801560c: 4623 mov r3, r4 801560e: 1c41 adds r1, r0, #1 8015610: 42ab cmp r3, r5 8015612: d30a bcc.n 801562a <__exponent+0x5e> 8015614: f10d 0309 add.w r3, sp, #9 8015618: 1a9b subs r3, r3, r2 801561a: 42ac cmp r4, r5 801561c: bf88 it hi 801561e: 2300 movhi r3, #0 8015620: 3302 adds r3, #2 8015622: 4403 add r3, r0 8015624: 1a18 subs r0, r3, r0 8015626: b003 add sp, #12 8015628: bdf0 pop {r4, r5, r6, r7, pc} 801562a: f813 6b01 ldrb.w r6, [r3], #1 801562e: f801 6f01 strb.w r6, [r1, #1]! 8015632: e7ed b.n 8015610 <__exponent+0x44> 8015634: 2330 movs r3, #48 @ 0x30 8015636: 3130 adds r1, #48 @ 0x30 8015638: 7083 strb r3, [r0, #2] 801563a: 70c1 strb r1, [r0, #3] 801563c: 1d03 adds r3, r0, #4 801563e: e7f1 b.n 8015624 <__exponent+0x58> 08015640 <_printf_float>: 8015640: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8015644: b091 sub sp, #68 @ 0x44 8015646: 460c mov r4, r1 8015648: f8dd 8068 ldr.w r8, [sp, #104] @ 0x68 801564c: 4616 mov r6, r2 801564e: 461f mov r7, r3 8015650: 4605 mov r5, r0 8015652: f000 fcfb bl 801604c <_localeconv_r> 8015656: 6803 ldr r3, [r0, #0] 8015658: 4618 mov r0, r3 801565a: 9308 str r3, [sp, #32] 801565c: f7f2 fde4 bl 8008228 8015660: 2300 movs r3, #0 8015662: 930e str r3, [sp, #56] @ 0x38 8015664: f8d8 3000 ldr.w r3, [r8] 8015668: 9009 str r0, [sp, #36] @ 0x24 801566a: 3307 adds r3, #7 801566c: f023 0307 bic.w r3, r3, #7 8015670: f103 0208 add.w r2, r3, #8 8015674: f894 a018 ldrb.w sl, [r4, #24] 8015678: f8d4 b000 ldr.w fp, [r4] 801567c: f8c8 2000 str.w r2, [r8] 8015680: e9d3 8900 ldrd r8, r9, [r3] 8015684: f029 4300 bic.w r3, r9, #2147483648 @ 0x80000000 8015688: 930b str r3, [sp, #44] @ 0x2c 801568a: f8cd 8028 str.w r8, [sp, #40] @ 0x28 801568e: f04f 32ff mov.w r2, #4294967295 8015692: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 8015696: e9c4 8912 strd r8, r9, [r4, #72] @ 0x48 801569a: 4b9c ldr r3, [pc, #624] @ (801590c <_printf_float+0x2cc>) 801569c: f7f3 fa22 bl 8008ae4 <__aeabi_dcmpun> 80156a0: bb70 cbnz r0, 8015700 <_printf_float+0xc0> 80156a2: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 80156a6: f04f 32ff mov.w r2, #4294967295 80156aa: 4b98 ldr r3, [pc, #608] @ (801590c <_printf_float+0x2cc>) 80156ac: f7f3 f9fc bl 8008aa8 <__aeabi_dcmple> 80156b0: bb30 cbnz r0, 8015700 <_printf_float+0xc0> 80156b2: 2200 movs r2, #0 80156b4: 2300 movs r3, #0 80156b6: 4640 mov r0, r8 80156b8: 4649 mov r1, r9 80156ba: f7f3 f9eb bl 8008a94 <__aeabi_dcmplt> 80156be: b110 cbz r0, 80156c6 <_printf_float+0x86> 80156c0: 232d movs r3, #45 @ 0x2d 80156c2: f884 3043 strb.w r3, [r4, #67] @ 0x43 80156c6: 4a92 ldr r2, [pc, #584] @ (8015910 <_printf_float+0x2d0>) 80156c8: 4b92 ldr r3, [pc, #584] @ (8015914 <_printf_float+0x2d4>) 80156ca: f1ba 0f47 cmp.w sl, #71 @ 0x47 80156ce: bf8c ite hi 80156d0: 4690 movhi r8, r2 80156d2: 4698 movls r8, r3 80156d4: 2303 movs r3, #3 80156d6: f04f 0900 mov.w r9, #0 80156da: 6123 str r3, [r4, #16] 80156dc: f02b 0304 bic.w r3, fp, #4 80156e0: 6023 str r3, [r4, #0] 80156e2: 4633 mov r3, r6 80156e4: 4621 mov r1, r4 80156e6: 4628 mov r0, r5 80156e8: 9700 str r7, [sp, #0] 80156ea: aa0f add r2, sp, #60 @ 0x3c 80156ec: f000 f9d4 bl 8015a98 <_printf_common> 80156f0: 3001 adds r0, #1 80156f2: f040 8090 bne.w 8015816 <_printf_float+0x1d6> 80156f6: f04f 30ff mov.w r0, #4294967295 80156fa: b011 add sp, #68 @ 0x44 80156fc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8015700: 4642 mov r2, r8 8015702: 464b mov r3, r9 8015704: 4640 mov r0, r8 8015706: 4649 mov r1, r9 8015708: f7f3 f9ec bl 8008ae4 <__aeabi_dcmpun> 801570c: b148 cbz r0, 8015722 <_printf_float+0xe2> 801570e: 464b mov r3, r9 8015710: 2b00 cmp r3, #0 8015712: bfb8 it lt 8015714: 232d movlt r3, #45 @ 0x2d 8015716: 4a80 ldr r2, [pc, #512] @ (8015918 <_printf_float+0x2d8>) 8015718: bfb8 it lt 801571a: f884 3043 strblt.w r3, [r4, #67] @ 0x43 801571e: 4b7f ldr r3, [pc, #508] @ (801591c <_printf_float+0x2dc>) 8015720: e7d3 b.n 80156ca <_printf_float+0x8a> 8015722: 6863 ldr r3, [r4, #4] 8015724: f00a 01df and.w r1, sl, #223 @ 0xdf 8015728: 1c5a adds r2, r3, #1 801572a: d13f bne.n 80157ac <_printf_float+0x16c> 801572c: 2306 movs r3, #6 801572e: 6063 str r3, [r4, #4] 8015730: 2200 movs r2, #0 8015732: f44b 6380 orr.w r3, fp, #1024 @ 0x400 8015736: 6023 str r3, [r4, #0] 8015738: 9206 str r2, [sp, #24] 801573a: aa0e add r2, sp, #56 @ 0x38 801573c: e9cd a204 strd sl, r2, [sp, #16] 8015740: aa0d add r2, sp, #52 @ 0x34 8015742: 9203 str r2, [sp, #12] 8015744: f10d 0233 add.w r2, sp, #51 @ 0x33 8015748: e9cd 3201 strd r3, r2, [sp, #4] 801574c: 6863 ldr r3, [r4, #4] 801574e: 4642 mov r2, r8 8015750: 9300 str r3, [sp, #0] 8015752: 4628 mov r0, r5 8015754: 464b mov r3, r9 8015756: 910a str r1, [sp, #40] @ 0x28 8015758: f7ff fed4 bl 8015504 <__cvt> 801575c: 990a ldr r1, [sp, #40] @ 0x28 801575e: 4680 mov r8, r0 8015760: 2947 cmp r1, #71 @ 0x47 8015762: 990d ldr r1, [sp, #52] @ 0x34 8015764: d128 bne.n 80157b8 <_printf_float+0x178> 8015766: 1cc8 adds r0, r1, #3 8015768: db02 blt.n 8015770 <_printf_float+0x130> 801576a: 6863 ldr r3, [r4, #4] 801576c: 4299 cmp r1, r3 801576e: dd40 ble.n 80157f2 <_printf_float+0x1b2> 8015770: f1aa 0a02 sub.w sl, sl, #2 8015774: fa5f fa8a uxtb.w sl, sl 8015778: 4652 mov r2, sl 801577a: 3901 subs r1, #1 801577c: f104 0050 add.w r0, r4, #80 @ 0x50 8015780: 910d str r1, [sp, #52] @ 0x34 8015782: f7ff ff23 bl 80155cc <__exponent> 8015786: 9a0e ldr r2, [sp, #56] @ 0x38 8015788: 4681 mov r9, r0 801578a: 1813 adds r3, r2, r0 801578c: 2a01 cmp r2, #1 801578e: 6123 str r3, [r4, #16] 8015790: dc02 bgt.n 8015798 <_printf_float+0x158> 8015792: 6822 ldr r2, [r4, #0] 8015794: 07d2 lsls r2, r2, #31 8015796: d501 bpl.n 801579c <_printf_float+0x15c> 8015798: 3301 adds r3, #1 801579a: 6123 str r3, [r4, #16] 801579c: f89d 3033 ldrb.w r3, [sp, #51] @ 0x33 80157a0: 2b00 cmp r3, #0 80157a2: d09e beq.n 80156e2 <_printf_float+0xa2> 80157a4: 232d movs r3, #45 @ 0x2d 80157a6: f884 3043 strb.w r3, [r4, #67] @ 0x43 80157aa: e79a b.n 80156e2 <_printf_float+0xa2> 80157ac: 2947 cmp r1, #71 @ 0x47 80157ae: d1bf bne.n 8015730 <_printf_float+0xf0> 80157b0: 2b00 cmp r3, #0 80157b2: d1bd bne.n 8015730 <_printf_float+0xf0> 80157b4: 2301 movs r3, #1 80157b6: e7ba b.n 801572e <_printf_float+0xee> 80157b8: f1ba 0f65 cmp.w sl, #101 @ 0x65 80157bc: d9dc bls.n 8015778 <_printf_float+0x138> 80157be: f1ba 0f66 cmp.w sl, #102 @ 0x66 80157c2: d118 bne.n 80157f6 <_printf_float+0x1b6> 80157c4: 2900 cmp r1, #0 80157c6: 6863 ldr r3, [r4, #4] 80157c8: dd0b ble.n 80157e2 <_printf_float+0x1a2> 80157ca: 6121 str r1, [r4, #16] 80157cc: b913 cbnz r3, 80157d4 <_printf_float+0x194> 80157ce: 6822 ldr r2, [r4, #0] 80157d0: 07d0 lsls r0, r2, #31 80157d2: d502 bpl.n 80157da <_printf_float+0x19a> 80157d4: 3301 adds r3, #1 80157d6: 440b add r3, r1 80157d8: 6123 str r3, [r4, #16] 80157da: f04f 0900 mov.w r9, #0 80157de: 65a1 str r1, [r4, #88] @ 0x58 80157e0: e7dc b.n 801579c <_printf_float+0x15c> 80157e2: b913 cbnz r3, 80157ea <_printf_float+0x1aa> 80157e4: 6822 ldr r2, [r4, #0] 80157e6: 07d2 lsls r2, r2, #31 80157e8: d501 bpl.n 80157ee <_printf_float+0x1ae> 80157ea: 3302 adds r3, #2 80157ec: e7f4 b.n 80157d8 <_printf_float+0x198> 80157ee: 2301 movs r3, #1 80157f0: e7f2 b.n 80157d8 <_printf_float+0x198> 80157f2: f04f 0a67 mov.w sl, #103 @ 0x67 80157f6: 9b0e ldr r3, [sp, #56] @ 0x38 80157f8: 4299 cmp r1, r3 80157fa: db05 blt.n 8015808 <_printf_float+0x1c8> 80157fc: 6823 ldr r3, [r4, #0] 80157fe: 6121 str r1, [r4, #16] 8015800: 07d8 lsls r0, r3, #31 8015802: d5ea bpl.n 80157da <_printf_float+0x19a> 8015804: 1c4b adds r3, r1, #1 8015806: e7e7 b.n 80157d8 <_printf_float+0x198> 8015808: 2900 cmp r1, #0 801580a: bfcc ite gt 801580c: 2201 movgt r2, #1 801580e: f1c1 0202 rsble r2, r1, #2 8015812: 4413 add r3, r2 8015814: e7e0 b.n 80157d8 <_printf_float+0x198> 8015816: 6823 ldr r3, [r4, #0] 8015818: 055a lsls r2, r3, #21 801581a: d407 bmi.n 801582c <_printf_float+0x1ec> 801581c: 6923 ldr r3, [r4, #16] 801581e: 4642 mov r2, r8 8015820: 4631 mov r1, r6 8015822: 4628 mov r0, r5 8015824: 47b8 blx r7 8015826: 3001 adds r0, #1 8015828: d12b bne.n 8015882 <_printf_float+0x242> 801582a: e764 b.n 80156f6 <_printf_float+0xb6> 801582c: f1ba 0f65 cmp.w sl, #101 @ 0x65 8015830: f240 80dc bls.w 80159ec <_printf_float+0x3ac> 8015834: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 8015838: 2200 movs r2, #0 801583a: 2300 movs r3, #0 801583c: f7f3 f920 bl 8008a80 <__aeabi_dcmpeq> 8015840: 2800 cmp r0, #0 8015842: d033 beq.n 80158ac <_printf_float+0x26c> 8015844: 2301 movs r3, #1 8015846: 4631 mov r1, r6 8015848: 4628 mov r0, r5 801584a: 4a35 ldr r2, [pc, #212] @ (8015920 <_printf_float+0x2e0>) 801584c: 47b8 blx r7 801584e: 3001 adds r0, #1 8015850: f43f af51 beq.w 80156f6 <_printf_float+0xb6> 8015854: e9dd 380d ldrd r3, r8, [sp, #52] @ 0x34 8015858: 4543 cmp r3, r8 801585a: db02 blt.n 8015862 <_printf_float+0x222> 801585c: 6823 ldr r3, [r4, #0] 801585e: 07d8 lsls r0, r3, #31 8015860: d50f bpl.n 8015882 <_printf_float+0x242> 8015862: e9dd 2308 ldrd r2, r3, [sp, #32] 8015866: 4631 mov r1, r6 8015868: 4628 mov r0, r5 801586a: 47b8 blx r7 801586c: 3001 adds r0, #1 801586e: f43f af42 beq.w 80156f6 <_printf_float+0xb6> 8015872: f04f 0900 mov.w r9, #0 8015876: f108 38ff add.w r8, r8, #4294967295 801587a: f104 0a1a add.w sl, r4, #26 801587e: 45c8 cmp r8, r9 8015880: dc09 bgt.n 8015896 <_printf_float+0x256> 8015882: 6823 ldr r3, [r4, #0] 8015884: 079b lsls r3, r3, #30 8015886: f100 8102 bmi.w 8015a8e <_printf_float+0x44e> 801588a: 68e0 ldr r0, [r4, #12] 801588c: 9b0f ldr r3, [sp, #60] @ 0x3c 801588e: 4298 cmp r0, r3 8015890: bfb8 it lt 8015892: 4618 movlt r0, r3 8015894: e731 b.n 80156fa <_printf_float+0xba> 8015896: 2301 movs r3, #1 8015898: 4652 mov r2, sl 801589a: 4631 mov r1, r6 801589c: 4628 mov r0, r5 801589e: 47b8 blx r7 80158a0: 3001 adds r0, #1 80158a2: f43f af28 beq.w 80156f6 <_printf_float+0xb6> 80158a6: f109 0901 add.w r9, r9, #1 80158aa: e7e8 b.n 801587e <_printf_float+0x23e> 80158ac: 9b0d ldr r3, [sp, #52] @ 0x34 80158ae: 2b00 cmp r3, #0 80158b0: dc38 bgt.n 8015924 <_printf_float+0x2e4> 80158b2: 2301 movs r3, #1 80158b4: 4631 mov r1, r6 80158b6: 4628 mov r0, r5 80158b8: 4a19 ldr r2, [pc, #100] @ (8015920 <_printf_float+0x2e0>) 80158ba: 47b8 blx r7 80158bc: 3001 adds r0, #1 80158be: f43f af1a beq.w 80156f6 <_printf_float+0xb6> 80158c2: e9dd 390d ldrd r3, r9, [sp, #52] @ 0x34 80158c6: ea59 0303 orrs.w r3, r9, r3 80158ca: d102 bne.n 80158d2 <_printf_float+0x292> 80158cc: 6823 ldr r3, [r4, #0] 80158ce: 07d9 lsls r1, r3, #31 80158d0: d5d7 bpl.n 8015882 <_printf_float+0x242> 80158d2: e9dd 2308 ldrd r2, r3, [sp, #32] 80158d6: 4631 mov r1, r6 80158d8: 4628 mov r0, r5 80158da: 47b8 blx r7 80158dc: 3001 adds r0, #1 80158de: f43f af0a beq.w 80156f6 <_printf_float+0xb6> 80158e2: f04f 0a00 mov.w sl, #0 80158e6: f104 0b1a add.w fp, r4, #26 80158ea: 9b0d ldr r3, [sp, #52] @ 0x34 80158ec: 425b negs r3, r3 80158ee: 4553 cmp r3, sl 80158f0: dc01 bgt.n 80158f6 <_printf_float+0x2b6> 80158f2: 464b mov r3, r9 80158f4: e793 b.n 801581e <_printf_float+0x1de> 80158f6: 2301 movs r3, #1 80158f8: 465a mov r2, fp 80158fa: 4631 mov r1, r6 80158fc: 4628 mov r0, r5 80158fe: 47b8 blx r7 8015900: 3001 adds r0, #1 8015902: f43f aef8 beq.w 80156f6 <_printf_float+0xb6> 8015906: f10a 0a01 add.w sl, sl, #1 801590a: e7ee b.n 80158ea <_printf_float+0x2aa> 801590c: 7fefffff .word 0x7fefffff 8015910: 08018fe4 .word 0x08018fe4 8015914: 08018fe0 .word 0x08018fe0 8015918: 08018fec .word 0x08018fec 801591c: 08018fe8 .word 0x08018fe8 8015920: 08018ff0 .word 0x08018ff0 8015924: 6da3 ldr r3, [r4, #88] @ 0x58 8015926: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 801592a: 4553 cmp r3, sl 801592c: bfa8 it ge 801592e: 4653 movge r3, sl 8015930: 2b00 cmp r3, #0 8015932: 4699 mov r9, r3 8015934: dc36 bgt.n 80159a4 <_printf_float+0x364> 8015936: f04f 0b00 mov.w fp, #0 801593a: ea29 79e9 bic.w r9, r9, r9, asr #31 801593e: f104 021a add.w r2, r4, #26 8015942: 6da3 ldr r3, [r4, #88] @ 0x58 8015944: 930a str r3, [sp, #40] @ 0x28 8015946: eba3 0309 sub.w r3, r3, r9 801594a: 455b cmp r3, fp 801594c: dc31 bgt.n 80159b2 <_printf_float+0x372> 801594e: 9b0d ldr r3, [sp, #52] @ 0x34 8015950: 459a cmp sl, r3 8015952: dc3a bgt.n 80159ca <_printf_float+0x38a> 8015954: 6823 ldr r3, [r4, #0] 8015956: 07da lsls r2, r3, #31 8015958: d437 bmi.n 80159ca <_printf_float+0x38a> 801595a: 9b0d ldr r3, [sp, #52] @ 0x34 801595c: ebaa 0903 sub.w r9, sl, r3 8015960: 9b0a ldr r3, [sp, #40] @ 0x28 8015962: ebaa 0303 sub.w r3, sl, r3 8015966: 4599 cmp r9, r3 8015968: bfa8 it ge 801596a: 4699 movge r9, r3 801596c: f1b9 0f00 cmp.w r9, #0 8015970: dc33 bgt.n 80159da <_printf_float+0x39a> 8015972: f04f 0800 mov.w r8, #0 8015976: ea29 79e9 bic.w r9, r9, r9, asr #31 801597a: f104 0b1a add.w fp, r4, #26 801597e: 9b0d ldr r3, [sp, #52] @ 0x34 8015980: ebaa 0303 sub.w r3, sl, r3 8015984: eba3 0309 sub.w r3, r3, r9 8015988: 4543 cmp r3, r8 801598a: f77f af7a ble.w 8015882 <_printf_float+0x242> 801598e: 2301 movs r3, #1 8015990: 465a mov r2, fp 8015992: 4631 mov r1, r6 8015994: 4628 mov r0, r5 8015996: 47b8 blx r7 8015998: 3001 adds r0, #1 801599a: f43f aeac beq.w 80156f6 <_printf_float+0xb6> 801599e: f108 0801 add.w r8, r8, #1 80159a2: e7ec b.n 801597e <_printf_float+0x33e> 80159a4: 4642 mov r2, r8 80159a6: 4631 mov r1, r6 80159a8: 4628 mov r0, r5 80159aa: 47b8 blx r7 80159ac: 3001 adds r0, #1 80159ae: d1c2 bne.n 8015936 <_printf_float+0x2f6> 80159b0: e6a1 b.n 80156f6 <_printf_float+0xb6> 80159b2: 2301 movs r3, #1 80159b4: 4631 mov r1, r6 80159b6: 4628 mov r0, r5 80159b8: 920a str r2, [sp, #40] @ 0x28 80159ba: 47b8 blx r7 80159bc: 3001 adds r0, #1 80159be: f43f ae9a beq.w 80156f6 <_printf_float+0xb6> 80159c2: 9a0a ldr r2, [sp, #40] @ 0x28 80159c4: f10b 0b01 add.w fp, fp, #1 80159c8: e7bb b.n 8015942 <_printf_float+0x302> 80159ca: 4631 mov r1, r6 80159cc: e9dd 2308 ldrd r2, r3, [sp, #32] 80159d0: 4628 mov r0, r5 80159d2: 47b8 blx r7 80159d4: 3001 adds r0, #1 80159d6: d1c0 bne.n 801595a <_printf_float+0x31a> 80159d8: e68d b.n 80156f6 <_printf_float+0xb6> 80159da: 9a0a ldr r2, [sp, #40] @ 0x28 80159dc: 464b mov r3, r9 80159de: 4631 mov r1, r6 80159e0: 4628 mov r0, r5 80159e2: 4442 add r2, r8 80159e4: 47b8 blx r7 80159e6: 3001 adds r0, #1 80159e8: d1c3 bne.n 8015972 <_printf_float+0x332> 80159ea: e684 b.n 80156f6 <_printf_float+0xb6> 80159ec: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 80159f0: f1ba 0f01 cmp.w sl, #1 80159f4: dc01 bgt.n 80159fa <_printf_float+0x3ba> 80159f6: 07db lsls r3, r3, #31 80159f8: d536 bpl.n 8015a68 <_printf_float+0x428> 80159fa: 2301 movs r3, #1 80159fc: 4642 mov r2, r8 80159fe: 4631 mov r1, r6 8015a00: 4628 mov r0, r5 8015a02: 47b8 blx r7 8015a04: 3001 adds r0, #1 8015a06: f43f ae76 beq.w 80156f6 <_printf_float+0xb6> 8015a0a: e9dd 2308 ldrd r2, r3, [sp, #32] 8015a0e: 4631 mov r1, r6 8015a10: 4628 mov r0, r5 8015a12: 47b8 blx r7 8015a14: 3001 adds r0, #1 8015a16: f43f ae6e beq.w 80156f6 <_printf_float+0xb6> 8015a1a: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 8015a1e: 2200 movs r2, #0 8015a20: 2300 movs r3, #0 8015a22: f10a 3aff add.w sl, sl, #4294967295 8015a26: f7f3 f82b bl 8008a80 <__aeabi_dcmpeq> 8015a2a: b9c0 cbnz r0, 8015a5e <_printf_float+0x41e> 8015a2c: 4653 mov r3, sl 8015a2e: f108 0201 add.w r2, r8, #1 8015a32: 4631 mov r1, r6 8015a34: 4628 mov r0, r5 8015a36: 47b8 blx r7 8015a38: 3001 adds r0, #1 8015a3a: d10c bne.n 8015a56 <_printf_float+0x416> 8015a3c: e65b b.n 80156f6 <_printf_float+0xb6> 8015a3e: 2301 movs r3, #1 8015a40: 465a mov r2, fp 8015a42: 4631 mov r1, r6 8015a44: 4628 mov r0, r5 8015a46: 47b8 blx r7 8015a48: 3001 adds r0, #1 8015a4a: f43f ae54 beq.w 80156f6 <_printf_float+0xb6> 8015a4e: f108 0801 add.w r8, r8, #1 8015a52: 45d0 cmp r8, sl 8015a54: dbf3 blt.n 8015a3e <_printf_float+0x3fe> 8015a56: 464b mov r3, r9 8015a58: f104 0250 add.w r2, r4, #80 @ 0x50 8015a5c: e6e0 b.n 8015820 <_printf_float+0x1e0> 8015a5e: f04f 0800 mov.w r8, #0 8015a62: f104 0b1a add.w fp, r4, #26 8015a66: e7f4 b.n 8015a52 <_printf_float+0x412> 8015a68: 2301 movs r3, #1 8015a6a: 4642 mov r2, r8 8015a6c: e7e1 b.n 8015a32 <_printf_float+0x3f2> 8015a6e: 2301 movs r3, #1 8015a70: 464a mov r2, r9 8015a72: 4631 mov r1, r6 8015a74: 4628 mov r0, r5 8015a76: 47b8 blx r7 8015a78: 3001 adds r0, #1 8015a7a: f43f ae3c beq.w 80156f6 <_printf_float+0xb6> 8015a7e: f108 0801 add.w r8, r8, #1 8015a82: 68e3 ldr r3, [r4, #12] 8015a84: 990f ldr r1, [sp, #60] @ 0x3c 8015a86: 1a5b subs r3, r3, r1 8015a88: 4543 cmp r3, r8 8015a8a: dcf0 bgt.n 8015a6e <_printf_float+0x42e> 8015a8c: e6fd b.n 801588a <_printf_float+0x24a> 8015a8e: f04f 0800 mov.w r8, #0 8015a92: f104 0919 add.w r9, r4, #25 8015a96: e7f4 b.n 8015a82 <_printf_float+0x442> 08015a98 <_printf_common>: 8015a98: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8015a9c: 4616 mov r6, r2 8015a9e: 4698 mov r8, r3 8015aa0: 688a ldr r2, [r1, #8] 8015aa2: 690b ldr r3, [r1, #16] 8015aa4: 4607 mov r7, r0 8015aa6: 4293 cmp r3, r2 8015aa8: bfb8 it lt 8015aaa: 4613 movlt r3, r2 8015aac: 6033 str r3, [r6, #0] 8015aae: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 8015ab2: 460c mov r4, r1 8015ab4: f8dd 9020 ldr.w r9, [sp, #32] 8015ab8: b10a cbz r2, 8015abe <_printf_common+0x26> 8015aba: 3301 adds r3, #1 8015abc: 6033 str r3, [r6, #0] 8015abe: 6823 ldr r3, [r4, #0] 8015ac0: 0699 lsls r1, r3, #26 8015ac2: bf42 ittt mi 8015ac4: 6833 ldrmi r3, [r6, #0] 8015ac6: 3302 addmi r3, #2 8015ac8: 6033 strmi r3, [r6, #0] 8015aca: 6825 ldr r5, [r4, #0] 8015acc: f015 0506 ands.w r5, r5, #6 8015ad0: d106 bne.n 8015ae0 <_printf_common+0x48> 8015ad2: f104 0a19 add.w sl, r4, #25 8015ad6: 68e3 ldr r3, [r4, #12] 8015ad8: 6832 ldr r2, [r6, #0] 8015ada: 1a9b subs r3, r3, r2 8015adc: 42ab cmp r3, r5 8015ade: dc2b bgt.n 8015b38 <_printf_common+0xa0> 8015ae0: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 8015ae4: 6822 ldr r2, [r4, #0] 8015ae6: 3b00 subs r3, #0 8015ae8: bf18 it ne 8015aea: 2301 movne r3, #1 8015aec: 0692 lsls r2, r2, #26 8015aee: d430 bmi.n 8015b52 <_printf_common+0xba> 8015af0: 4641 mov r1, r8 8015af2: 4638 mov r0, r7 8015af4: f104 0243 add.w r2, r4, #67 @ 0x43 8015af8: 47c8 blx r9 8015afa: 3001 adds r0, #1 8015afc: d023 beq.n 8015b46 <_printf_common+0xae> 8015afe: 6823 ldr r3, [r4, #0] 8015b00: 6922 ldr r2, [r4, #16] 8015b02: f003 0306 and.w r3, r3, #6 8015b06: 2b04 cmp r3, #4 8015b08: bf14 ite ne 8015b0a: 2500 movne r5, #0 8015b0c: 6833 ldreq r3, [r6, #0] 8015b0e: f04f 0600 mov.w r6, #0 8015b12: bf08 it eq 8015b14: 68e5 ldreq r5, [r4, #12] 8015b16: f104 041a add.w r4, r4, #26 8015b1a: bf08 it eq 8015b1c: 1aed subeq r5, r5, r3 8015b1e: f854 3c12 ldr.w r3, [r4, #-18] 8015b22: bf08 it eq 8015b24: ea25 75e5 biceq.w r5, r5, r5, asr #31 8015b28: 4293 cmp r3, r2 8015b2a: bfc4 itt gt 8015b2c: 1a9b subgt r3, r3, r2 8015b2e: 18ed addgt r5, r5, r3 8015b30: 42b5 cmp r5, r6 8015b32: d11a bne.n 8015b6a <_printf_common+0xd2> 8015b34: 2000 movs r0, #0 8015b36: e008 b.n 8015b4a <_printf_common+0xb2> 8015b38: 2301 movs r3, #1 8015b3a: 4652 mov r2, sl 8015b3c: 4641 mov r1, r8 8015b3e: 4638 mov r0, r7 8015b40: 47c8 blx r9 8015b42: 3001 adds r0, #1 8015b44: d103 bne.n 8015b4e <_printf_common+0xb6> 8015b46: f04f 30ff mov.w r0, #4294967295 8015b4a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8015b4e: 3501 adds r5, #1 8015b50: e7c1 b.n 8015ad6 <_printf_common+0x3e> 8015b52: 2030 movs r0, #48 @ 0x30 8015b54: 18e1 adds r1, r4, r3 8015b56: f881 0043 strb.w r0, [r1, #67] @ 0x43 8015b5a: 1c5a adds r2, r3, #1 8015b5c: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 8015b60: 4422 add r2, r4 8015b62: 3302 adds r3, #2 8015b64: f882 1043 strb.w r1, [r2, #67] @ 0x43 8015b68: e7c2 b.n 8015af0 <_printf_common+0x58> 8015b6a: 2301 movs r3, #1 8015b6c: 4622 mov r2, r4 8015b6e: 4641 mov r1, r8 8015b70: 4638 mov r0, r7 8015b72: 47c8 blx r9 8015b74: 3001 adds r0, #1 8015b76: d0e6 beq.n 8015b46 <_printf_common+0xae> 8015b78: 3601 adds r6, #1 8015b7a: e7d9 b.n 8015b30 <_printf_common+0x98> 08015b7c <_printf_i>: 8015b7c: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 8015b80: 7e0f ldrb r7, [r1, #24] 8015b82: 4691 mov r9, r2 8015b84: 2f78 cmp r7, #120 @ 0x78 8015b86: 4680 mov r8, r0 8015b88: 460c mov r4, r1 8015b8a: 469a mov sl, r3 8015b8c: 9e0c ldr r6, [sp, #48] @ 0x30 8015b8e: f101 0243 add.w r2, r1, #67 @ 0x43 8015b92: d807 bhi.n 8015ba4 <_printf_i+0x28> 8015b94: 2f62 cmp r7, #98 @ 0x62 8015b96: d80a bhi.n 8015bae <_printf_i+0x32> 8015b98: 2f00 cmp r7, #0 8015b9a: f000 80d1 beq.w 8015d40 <_printf_i+0x1c4> 8015b9e: 2f58 cmp r7, #88 @ 0x58 8015ba0: f000 80b8 beq.w 8015d14 <_printf_i+0x198> 8015ba4: f104 0642 add.w r6, r4, #66 @ 0x42 8015ba8: f884 7042 strb.w r7, [r4, #66] @ 0x42 8015bac: e03a b.n 8015c24 <_printf_i+0xa8> 8015bae: f1a7 0363 sub.w r3, r7, #99 @ 0x63 8015bb2: 2b15 cmp r3, #21 8015bb4: d8f6 bhi.n 8015ba4 <_printf_i+0x28> 8015bb6: a101 add r1, pc, #4 @ (adr r1, 8015bbc <_printf_i+0x40>) 8015bb8: f851 f023 ldr.w pc, [r1, r3, lsl #2] 8015bbc: 08015c15 .word 0x08015c15 8015bc0: 08015c29 .word 0x08015c29 8015bc4: 08015ba5 .word 0x08015ba5 8015bc8: 08015ba5 .word 0x08015ba5 8015bcc: 08015ba5 .word 0x08015ba5 8015bd0: 08015ba5 .word 0x08015ba5 8015bd4: 08015c29 .word 0x08015c29 8015bd8: 08015ba5 .word 0x08015ba5 8015bdc: 08015ba5 .word 0x08015ba5 8015be0: 08015ba5 .word 0x08015ba5 8015be4: 08015ba5 .word 0x08015ba5 8015be8: 08015d27 .word 0x08015d27 8015bec: 08015c53 .word 0x08015c53 8015bf0: 08015ce1 .word 0x08015ce1 8015bf4: 08015ba5 .word 0x08015ba5 8015bf8: 08015ba5 .word 0x08015ba5 8015bfc: 08015d49 .word 0x08015d49 8015c00: 08015ba5 .word 0x08015ba5 8015c04: 08015c53 .word 0x08015c53 8015c08: 08015ba5 .word 0x08015ba5 8015c0c: 08015ba5 .word 0x08015ba5 8015c10: 08015ce9 .word 0x08015ce9 8015c14: 6833 ldr r3, [r6, #0] 8015c16: 1d1a adds r2, r3, #4 8015c18: 681b ldr r3, [r3, #0] 8015c1a: 6032 str r2, [r6, #0] 8015c1c: f104 0642 add.w r6, r4, #66 @ 0x42 8015c20: f884 3042 strb.w r3, [r4, #66] @ 0x42 8015c24: 2301 movs r3, #1 8015c26: e09c b.n 8015d62 <_printf_i+0x1e6> 8015c28: 6833 ldr r3, [r6, #0] 8015c2a: 6820 ldr r0, [r4, #0] 8015c2c: 1d19 adds r1, r3, #4 8015c2e: 6031 str r1, [r6, #0] 8015c30: 0606 lsls r6, r0, #24 8015c32: d501 bpl.n 8015c38 <_printf_i+0xbc> 8015c34: 681d ldr r5, [r3, #0] 8015c36: e003 b.n 8015c40 <_printf_i+0xc4> 8015c38: 0645 lsls r5, r0, #25 8015c3a: d5fb bpl.n 8015c34 <_printf_i+0xb8> 8015c3c: f9b3 5000 ldrsh.w r5, [r3] 8015c40: 2d00 cmp r5, #0 8015c42: da03 bge.n 8015c4c <_printf_i+0xd0> 8015c44: 232d movs r3, #45 @ 0x2d 8015c46: 426d negs r5, r5 8015c48: f884 3043 strb.w r3, [r4, #67] @ 0x43 8015c4c: 230a movs r3, #10 8015c4e: 4858 ldr r0, [pc, #352] @ (8015db0 <_printf_i+0x234>) 8015c50: e011 b.n 8015c76 <_printf_i+0xfa> 8015c52: 6821 ldr r1, [r4, #0] 8015c54: 6833 ldr r3, [r6, #0] 8015c56: 0608 lsls r0, r1, #24 8015c58: f853 5b04 ldr.w r5, [r3], #4 8015c5c: d402 bmi.n 8015c64 <_printf_i+0xe8> 8015c5e: 0649 lsls r1, r1, #25 8015c60: bf48 it mi 8015c62: b2ad uxthmi r5, r5 8015c64: 2f6f cmp r7, #111 @ 0x6f 8015c66: 6033 str r3, [r6, #0] 8015c68: bf14 ite ne 8015c6a: 230a movne r3, #10 8015c6c: 2308 moveq r3, #8 8015c6e: 4850 ldr r0, [pc, #320] @ (8015db0 <_printf_i+0x234>) 8015c70: 2100 movs r1, #0 8015c72: f884 1043 strb.w r1, [r4, #67] @ 0x43 8015c76: 6866 ldr r6, [r4, #4] 8015c78: 2e00 cmp r6, #0 8015c7a: 60a6 str r6, [r4, #8] 8015c7c: db05 blt.n 8015c8a <_printf_i+0x10e> 8015c7e: 6821 ldr r1, [r4, #0] 8015c80: 432e orrs r6, r5 8015c82: f021 0104 bic.w r1, r1, #4 8015c86: 6021 str r1, [r4, #0] 8015c88: d04b beq.n 8015d22 <_printf_i+0x1a6> 8015c8a: 4616 mov r6, r2 8015c8c: fbb5 f1f3 udiv r1, r5, r3 8015c90: fb03 5711 mls r7, r3, r1, r5 8015c94: 5dc7 ldrb r7, [r0, r7] 8015c96: f806 7d01 strb.w r7, [r6, #-1]! 8015c9a: 462f mov r7, r5 8015c9c: 42bb cmp r3, r7 8015c9e: 460d mov r5, r1 8015ca0: d9f4 bls.n 8015c8c <_printf_i+0x110> 8015ca2: 2b08 cmp r3, #8 8015ca4: d10b bne.n 8015cbe <_printf_i+0x142> 8015ca6: 6823 ldr r3, [r4, #0] 8015ca8: 07df lsls r7, r3, #31 8015caa: d508 bpl.n 8015cbe <_printf_i+0x142> 8015cac: 6923 ldr r3, [r4, #16] 8015cae: 6861 ldr r1, [r4, #4] 8015cb0: 4299 cmp r1, r3 8015cb2: bfde ittt le 8015cb4: 2330 movle r3, #48 @ 0x30 8015cb6: f806 3c01 strble.w r3, [r6, #-1] 8015cba: f106 36ff addle.w r6, r6, #4294967295 8015cbe: 1b92 subs r2, r2, r6 8015cc0: 6122 str r2, [r4, #16] 8015cc2: 464b mov r3, r9 8015cc4: 4621 mov r1, r4 8015cc6: 4640 mov r0, r8 8015cc8: f8cd a000 str.w sl, [sp] 8015ccc: aa03 add r2, sp, #12 8015cce: f7ff fee3 bl 8015a98 <_printf_common> 8015cd2: 3001 adds r0, #1 8015cd4: d14a bne.n 8015d6c <_printf_i+0x1f0> 8015cd6: f04f 30ff mov.w r0, #4294967295 8015cda: b004 add sp, #16 8015cdc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8015ce0: 6823 ldr r3, [r4, #0] 8015ce2: f043 0320 orr.w r3, r3, #32 8015ce6: 6023 str r3, [r4, #0] 8015ce8: 2778 movs r7, #120 @ 0x78 8015cea: 4832 ldr r0, [pc, #200] @ (8015db4 <_printf_i+0x238>) 8015cec: f884 7045 strb.w r7, [r4, #69] @ 0x45 8015cf0: 6823 ldr r3, [r4, #0] 8015cf2: 6831 ldr r1, [r6, #0] 8015cf4: 061f lsls r7, r3, #24 8015cf6: f851 5b04 ldr.w r5, [r1], #4 8015cfa: d402 bmi.n 8015d02 <_printf_i+0x186> 8015cfc: 065f lsls r7, r3, #25 8015cfe: bf48 it mi 8015d00: b2ad uxthmi r5, r5 8015d02: 6031 str r1, [r6, #0] 8015d04: 07d9 lsls r1, r3, #31 8015d06: bf44 itt mi 8015d08: f043 0320 orrmi.w r3, r3, #32 8015d0c: 6023 strmi r3, [r4, #0] 8015d0e: b11d cbz r5, 8015d18 <_printf_i+0x19c> 8015d10: 2310 movs r3, #16 8015d12: e7ad b.n 8015c70 <_printf_i+0xf4> 8015d14: 4826 ldr r0, [pc, #152] @ (8015db0 <_printf_i+0x234>) 8015d16: e7e9 b.n 8015cec <_printf_i+0x170> 8015d18: 6823 ldr r3, [r4, #0] 8015d1a: f023 0320 bic.w r3, r3, #32 8015d1e: 6023 str r3, [r4, #0] 8015d20: e7f6 b.n 8015d10 <_printf_i+0x194> 8015d22: 4616 mov r6, r2 8015d24: e7bd b.n 8015ca2 <_printf_i+0x126> 8015d26: 6833 ldr r3, [r6, #0] 8015d28: 6825 ldr r5, [r4, #0] 8015d2a: 1d18 adds r0, r3, #4 8015d2c: 6961 ldr r1, [r4, #20] 8015d2e: 6030 str r0, [r6, #0] 8015d30: 062e lsls r6, r5, #24 8015d32: 681b ldr r3, [r3, #0] 8015d34: d501 bpl.n 8015d3a <_printf_i+0x1be> 8015d36: 6019 str r1, [r3, #0] 8015d38: e002 b.n 8015d40 <_printf_i+0x1c4> 8015d3a: 0668 lsls r0, r5, #25 8015d3c: d5fb bpl.n 8015d36 <_printf_i+0x1ba> 8015d3e: 8019 strh r1, [r3, #0] 8015d40: 2300 movs r3, #0 8015d42: 4616 mov r6, r2 8015d44: 6123 str r3, [r4, #16] 8015d46: e7bc b.n 8015cc2 <_printf_i+0x146> 8015d48: 6833 ldr r3, [r6, #0] 8015d4a: 2100 movs r1, #0 8015d4c: 1d1a adds r2, r3, #4 8015d4e: 6032 str r2, [r6, #0] 8015d50: 681e ldr r6, [r3, #0] 8015d52: 6862 ldr r2, [r4, #4] 8015d54: 4630 mov r0, r6 8015d56: f000 f9f0 bl 801613a 8015d5a: b108 cbz r0, 8015d60 <_printf_i+0x1e4> 8015d5c: 1b80 subs r0, r0, r6 8015d5e: 6060 str r0, [r4, #4] 8015d60: 6863 ldr r3, [r4, #4] 8015d62: 6123 str r3, [r4, #16] 8015d64: 2300 movs r3, #0 8015d66: f884 3043 strb.w r3, [r4, #67] @ 0x43 8015d6a: e7aa b.n 8015cc2 <_printf_i+0x146> 8015d6c: 4632 mov r2, r6 8015d6e: 4649 mov r1, r9 8015d70: 4640 mov r0, r8 8015d72: 6923 ldr r3, [r4, #16] 8015d74: 47d0 blx sl 8015d76: 3001 adds r0, #1 8015d78: d0ad beq.n 8015cd6 <_printf_i+0x15a> 8015d7a: 6823 ldr r3, [r4, #0] 8015d7c: 079b lsls r3, r3, #30 8015d7e: d413 bmi.n 8015da8 <_printf_i+0x22c> 8015d80: 68e0 ldr r0, [r4, #12] 8015d82: 9b03 ldr r3, [sp, #12] 8015d84: 4298 cmp r0, r3 8015d86: bfb8 it lt 8015d88: 4618 movlt r0, r3 8015d8a: e7a6 b.n 8015cda <_printf_i+0x15e> 8015d8c: 2301 movs r3, #1 8015d8e: 4632 mov r2, r6 8015d90: 4649 mov r1, r9 8015d92: 4640 mov r0, r8 8015d94: 47d0 blx sl 8015d96: 3001 adds r0, #1 8015d98: d09d beq.n 8015cd6 <_printf_i+0x15a> 8015d9a: 3501 adds r5, #1 8015d9c: 68e3 ldr r3, [r4, #12] 8015d9e: 9903 ldr r1, [sp, #12] 8015da0: 1a5b subs r3, r3, r1 8015da2: 42ab cmp r3, r5 8015da4: dcf2 bgt.n 8015d8c <_printf_i+0x210> 8015da6: e7eb b.n 8015d80 <_printf_i+0x204> 8015da8: 2500 movs r5, #0 8015daa: f104 0619 add.w r6, r4, #25 8015dae: e7f5 b.n 8015d9c <_printf_i+0x220> 8015db0: 08018ff2 .word 0x08018ff2 8015db4: 08019003 .word 0x08019003 08015db8 : 8015db8: 2300 movs r3, #0 8015dba: b510 push {r4, lr} 8015dbc: 4604 mov r4, r0 8015dbe: e9c0 3300 strd r3, r3, [r0] 8015dc2: e9c0 3304 strd r3, r3, [r0, #16] 8015dc6: 6083 str r3, [r0, #8] 8015dc8: 8181 strh r1, [r0, #12] 8015dca: 6643 str r3, [r0, #100] @ 0x64 8015dcc: 81c2 strh r2, [r0, #14] 8015dce: 6183 str r3, [r0, #24] 8015dd0: 4619 mov r1, r3 8015dd2: 2208 movs r2, #8 8015dd4: 305c adds r0, #92 @ 0x5c 8015dd6: f000 f931 bl 801603c 8015dda: 4b0d ldr r3, [pc, #52] @ (8015e10 ) 8015ddc: 6224 str r4, [r4, #32] 8015dde: 6263 str r3, [r4, #36] @ 0x24 8015de0: 4b0c ldr r3, [pc, #48] @ (8015e14 ) 8015de2: 62a3 str r3, [r4, #40] @ 0x28 8015de4: 4b0c ldr r3, [pc, #48] @ (8015e18 ) 8015de6: 62e3 str r3, [r4, #44] @ 0x2c 8015de8: 4b0c ldr r3, [pc, #48] @ (8015e1c ) 8015dea: 6323 str r3, [r4, #48] @ 0x30 8015dec: 4b0c ldr r3, [pc, #48] @ (8015e20 ) 8015dee: 429c cmp r4, r3 8015df0: d006 beq.n 8015e00 8015df2: f103 0268 add.w r2, r3, #104 @ 0x68 8015df6: 4294 cmp r4, r2 8015df8: d002 beq.n 8015e00 8015dfa: 33d0 adds r3, #208 @ 0xd0 8015dfc: 429c cmp r4, r3 8015dfe: d105 bne.n 8015e0c 8015e00: f104 0058 add.w r0, r4, #88 @ 0x58 8015e04: e8bd 4010 ldmia.w sp!, {r4, lr} 8015e08: f000 b994 b.w 8016134 <__retarget_lock_init_recursive> 8015e0c: bd10 pop {r4, pc} 8015e0e: bf00 nop 8015e10: 08015f3d .word 0x08015f3d 8015e14: 08015f5f .word 0x08015f5f 8015e18: 08015f97 .word 0x08015f97 8015e1c: 08015fbb .word 0x08015fbb 8015e20: 200014cc .word 0x200014cc 08015e24 : 8015e24: 4a02 ldr r2, [pc, #8] @ (8015e30 ) 8015e26: 4903 ldr r1, [pc, #12] @ (8015e34 ) 8015e28: 4803 ldr r0, [pc, #12] @ (8015e38 ) 8015e2a: f000 b869 b.w 8015f00 <_fwalk_sglue> 8015e2e: bf00 nop 8015e30: 20000090 .word 0x20000090 8015e34: 08017b09 .word 0x08017b09 8015e38: 200000a0 .word 0x200000a0 08015e3c : 8015e3c: 6841 ldr r1, [r0, #4] 8015e3e: 4b0c ldr r3, [pc, #48] @ (8015e70 ) 8015e40: b510 push {r4, lr} 8015e42: 4299 cmp r1, r3 8015e44: 4604 mov r4, r0 8015e46: d001 beq.n 8015e4c 8015e48: f001 fe5e bl 8017b08 <_fflush_r> 8015e4c: 68a1 ldr r1, [r4, #8] 8015e4e: 4b09 ldr r3, [pc, #36] @ (8015e74 ) 8015e50: 4299 cmp r1, r3 8015e52: d002 beq.n 8015e5a 8015e54: 4620 mov r0, r4 8015e56: f001 fe57 bl 8017b08 <_fflush_r> 8015e5a: 68e1 ldr r1, [r4, #12] 8015e5c: 4b06 ldr r3, [pc, #24] @ (8015e78 ) 8015e5e: 4299 cmp r1, r3 8015e60: d004 beq.n 8015e6c 8015e62: 4620 mov r0, r4 8015e64: e8bd 4010 ldmia.w sp!, {r4, lr} 8015e68: f001 be4e b.w 8017b08 <_fflush_r> 8015e6c: bd10 pop {r4, pc} 8015e6e: bf00 nop 8015e70: 200014cc .word 0x200014cc 8015e74: 20001534 .word 0x20001534 8015e78: 2000159c .word 0x2000159c 08015e7c : 8015e7c: b510 push {r4, lr} 8015e7e: 4b0b ldr r3, [pc, #44] @ (8015eac ) 8015e80: 4c0b ldr r4, [pc, #44] @ (8015eb0 ) 8015e82: 4a0c ldr r2, [pc, #48] @ (8015eb4 ) 8015e84: 4620 mov r0, r4 8015e86: 601a str r2, [r3, #0] 8015e88: 2104 movs r1, #4 8015e8a: 2200 movs r2, #0 8015e8c: f7ff ff94 bl 8015db8 8015e90: f104 0068 add.w r0, r4, #104 @ 0x68 8015e94: 2201 movs r2, #1 8015e96: 2109 movs r1, #9 8015e98: f7ff ff8e bl 8015db8 8015e9c: f104 00d0 add.w r0, r4, #208 @ 0xd0 8015ea0: 2202 movs r2, #2 8015ea2: e8bd 4010 ldmia.w sp!, {r4, lr} 8015ea6: 2112 movs r1, #18 8015ea8: f7ff bf86 b.w 8015db8 8015eac: 20001604 .word 0x20001604 8015eb0: 200014cc .word 0x200014cc 8015eb4: 08015e25 .word 0x08015e25 08015eb8 <__sfp_lock_acquire>: 8015eb8: 4801 ldr r0, [pc, #4] @ (8015ec0 <__sfp_lock_acquire+0x8>) 8015eba: f000 b93c b.w 8016136 <__retarget_lock_acquire_recursive> 8015ebe: bf00 nop 8015ec0: 2000160d .word 0x2000160d 08015ec4 <__sfp_lock_release>: 8015ec4: 4801 ldr r0, [pc, #4] @ (8015ecc <__sfp_lock_release+0x8>) 8015ec6: f000 b937 b.w 8016138 <__retarget_lock_release_recursive> 8015eca: bf00 nop 8015ecc: 2000160d .word 0x2000160d 08015ed0 <__sinit>: 8015ed0: b510 push {r4, lr} 8015ed2: 4604 mov r4, r0 8015ed4: f7ff fff0 bl 8015eb8 <__sfp_lock_acquire> 8015ed8: 6a23 ldr r3, [r4, #32] 8015eda: b11b cbz r3, 8015ee4 <__sinit+0x14> 8015edc: e8bd 4010 ldmia.w sp!, {r4, lr} 8015ee0: f7ff bff0 b.w 8015ec4 <__sfp_lock_release> 8015ee4: 4b04 ldr r3, [pc, #16] @ (8015ef8 <__sinit+0x28>) 8015ee6: 6223 str r3, [r4, #32] 8015ee8: 4b04 ldr r3, [pc, #16] @ (8015efc <__sinit+0x2c>) 8015eea: 681b ldr r3, [r3, #0] 8015eec: 2b00 cmp r3, #0 8015eee: d1f5 bne.n 8015edc <__sinit+0xc> 8015ef0: f7ff ffc4 bl 8015e7c 8015ef4: e7f2 b.n 8015edc <__sinit+0xc> 8015ef6: bf00 nop 8015ef8: 08015e3d .word 0x08015e3d 8015efc: 20001604 .word 0x20001604 08015f00 <_fwalk_sglue>: 8015f00: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8015f04: 4607 mov r7, r0 8015f06: 4688 mov r8, r1 8015f08: 4614 mov r4, r2 8015f0a: 2600 movs r6, #0 8015f0c: e9d4 9501 ldrd r9, r5, [r4, #4] 8015f10: f1b9 0901 subs.w r9, r9, #1 8015f14: d505 bpl.n 8015f22 <_fwalk_sglue+0x22> 8015f16: 6824 ldr r4, [r4, #0] 8015f18: 2c00 cmp r4, #0 8015f1a: d1f7 bne.n 8015f0c <_fwalk_sglue+0xc> 8015f1c: 4630 mov r0, r6 8015f1e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8015f22: 89ab ldrh r3, [r5, #12] 8015f24: 2b01 cmp r3, #1 8015f26: d907 bls.n 8015f38 <_fwalk_sglue+0x38> 8015f28: f9b5 300e ldrsh.w r3, [r5, #14] 8015f2c: 3301 adds r3, #1 8015f2e: d003 beq.n 8015f38 <_fwalk_sglue+0x38> 8015f30: 4629 mov r1, r5 8015f32: 4638 mov r0, r7 8015f34: 47c0 blx r8 8015f36: 4306 orrs r6, r0 8015f38: 3568 adds r5, #104 @ 0x68 8015f3a: e7e9 b.n 8015f10 <_fwalk_sglue+0x10> 08015f3c <__sread>: 8015f3c: b510 push {r4, lr} 8015f3e: 460c mov r4, r1 8015f40: f9b1 100e ldrsh.w r1, [r1, #14] 8015f44: f000 f8a8 bl 8016098 <_read_r> 8015f48: 2800 cmp r0, #0 8015f4a: bfab itete ge 8015f4c: 6d63 ldrge r3, [r4, #84] @ 0x54 8015f4e: 89a3 ldrhlt r3, [r4, #12] 8015f50: 181b addge r3, r3, r0 8015f52: f423 5380 biclt.w r3, r3, #4096 @ 0x1000 8015f56: bfac ite ge 8015f58: 6563 strge r3, [r4, #84] @ 0x54 8015f5a: 81a3 strhlt r3, [r4, #12] 8015f5c: bd10 pop {r4, pc} 08015f5e <__swrite>: 8015f5e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8015f62: 461f mov r7, r3 8015f64: 898b ldrh r3, [r1, #12] 8015f66: 4605 mov r5, r0 8015f68: 05db lsls r3, r3, #23 8015f6a: 460c mov r4, r1 8015f6c: 4616 mov r6, r2 8015f6e: d505 bpl.n 8015f7c <__swrite+0x1e> 8015f70: 2302 movs r3, #2 8015f72: 2200 movs r2, #0 8015f74: f9b1 100e ldrsh.w r1, [r1, #14] 8015f78: f000 f87c bl 8016074 <_lseek_r> 8015f7c: 89a3 ldrh r3, [r4, #12] 8015f7e: 4632 mov r2, r6 8015f80: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8015f84: 81a3 strh r3, [r4, #12] 8015f86: 4628 mov r0, r5 8015f88: 463b mov r3, r7 8015f8a: f9b4 100e ldrsh.w r1, [r4, #14] 8015f8e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8015f92: f000 b893 b.w 80160bc <_write_r> 08015f96 <__sseek>: 8015f96: b510 push {r4, lr} 8015f98: 460c mov r4, r1 8015f9a: f9b1 100e ldrsh.w r1, [r1, #14] 8015f9e: f000 f869 bl 8016074 <_lseek_r> 8015fa2: 1c43 adds r3, r0, #1 8015fa4: 89a3 ldrh r3, [r4, #12] 8015fa6: bf15 itete ne 8015fa8: 6560 strne r0, [r4, #84] @ 0x54 8015faa: f423 5380 biceq.w r3, r3, #4096 @ 0x1000 8015fae: f443 5380 orrne.w r3, r3, #4096 @ 0x1000 8015fb2: 81a3 strheq r3, [r4, #12] 8015fb4: bf18 it ne 8015fb6: 81a3 strhne r3, [r4, #12] 8015fb8: bd10 pop {r4, pc} 08015fba <__sclose>: 8015fba: f9b1 100e ldrsh.w r1, [r1, #14] 8015fbe: f000 b849 b.w 8016054 <_close_r> 08015fc2 <_vsniprintf_r>: 8015fc2: b530 push {r4, r5, lr} 8015fc4: 4614 mov r4, r2 8015fc6: 2c00 cmp r4, #0 8015fc8: 4605 mov r5, r0 8015fca: 461a mov r2, r3 8015fcc: b09b sub sp, #108 @ 0x6c 8015fce: da05 bge.n 8015fdc <_vsniprintf_r+0x1a> 8015fd0: 238b movs r3, #139 @ 0x8b 8015fd2: 6003 str r3, [r0, #0] 8015fd4: f04f 30ff mov.w r0, #4294967295 8015fd8: b01b add sp, #108 @ 0x6c 8015fda: bd30 pop {r4, r5, pc} 8015fdc: f44f 7302 mov.w r3, #520 @ 0x208 8015fe0: f8ad 300c strh.w r3, [sp, #12] 8015fe4: f04f 0300 mov.w r3, #0 8015fe8: 9319 str r3, [sp, #100] @ 0x64 8015fea: bf0c ite eq 8015fec: 4623 moveq r3, r4 8015fee: f104 33ff addne.w r3, r4, #4294967295 8015ff2: 9302 str r3, [sp, #8] 8015ff4: 9305 str r3, [sp, #20] 8015ff6: f64f 73ff movw r3, #65535 @ 0xffff 8015ffa: 9100 str r1, [sp, #0] 8015ffc: 9104 str r1, [sp, #16] 8015ffe: f8ad 300e strh.w r3, [sp, #14] 8016002: 4669 mov r1, sp 8016004: 9b1e ldr r3, [sp, #120] @ 0x78 8016006: f001 fc03 bl 8017810 <_svfiprintf_r> 801600a: 1c43 adds r3, r0, #1 801600c: bfbc itt lt 801600e: 238b movlt r3, #139 @ 0x8b 8016010: 602b strlt r3, [r5, #0] 8016012: 2c00 cmp r4, #0 8016014: d0e0 beq.n 8015fd8 <_vsniprintf_r+0x16> 8016016: 2200 movs r2, #0 8016018: 9b00 ldr r3, [sp, #0] 801601a: 701a strb r2, [r3, #0] 801601c: e7dc b.n 8015fd8 <_vsniprintf_r+0x16> ... 08016020 : 8016020: b507 push {r0, r1, r2, lr} 8016022: 9300 str r3, [sp, #0] 8016024: 4613 mov r3, r2 8016026: 460a mov r2, r1 8016028: 4601 mov r1, r0 801602a: 4803 ldr r0, [pc, #12] @ (8016038 ) 801602c: 6800 ldr r0, [r0, #0] 801602e: f7ff ffc8 bl 8015fc2 <_vsniprintf_r> 8016032: b003 add sp, #12 8016034: f85d fb04 ldr.w pc, [sp], #4 8016038: 2000009c .word 0x2000009c 0801603c : 801603c: 4603 mov r3, r0 801603e: 4402 add r2, r0 8016040: 4293 cmp r3, r2 8016042: d100 bne.n 8016046 8016044: 4770 bx lr 8016046: f803 1b01 strb.w r1, [r3], #1 801604a: e7f9 b.n 8016040 0801604c <_localeconv_r>: 801604c: 4800 ldr r0, [pc, #0] @ (8016050 <_localeconv_r+0x4>) 801604e: 4770 bx lr 8016050: 200001dc .word 0x200001dc 08016054 <_close_r>: 8016054: b538 push {r3, r4, r5, lr} 8016056: 2300 movs r3, #0 8016058: 4d05 ldr r5, [pc, #20] @ (8016070 <_close_r+0x1c>) 801605a: 4604 mov r4, r0 801605c: 4608 mov r0, r1 801605e: 602b str r3, [r5, #0] 8016060: f7f8 fda3 bl 800ebaa <_close> 8016064: 1c43 adds r3, r0, #1 8016066: d102 bne.n 801606e <_close_r+0x1a> 8016068: 682b ldr r3, [r5, #0] 801606a: b103 cbz r3, 801606e <_close_r+0x1a> 801606c: 6023 str r3, [r4, #0] 801606e: bd38 pop {r3, r4, r5, pc} 8016070: 20001608 .word 0x20001608 08016074 <_lseek_r>: 8016074: b538 push {r3, r4, r5, lr} 8016076: 4604 mov r4, r0 8016078: 4608 mov r0, r1 801607a: 4611 mov r1, r2 801607c: 2200 movs r2, #0 801607e: 4d05 ldr r5, [pc, #20] @ (8016094 <_lseek_r+0x20>) 8016080: 602a str r2, [r5, #0] 8016082: 461a mov r2, r3 8016084: f7f8 fdb5 bl 800ebf2 <_lseek> 8016088: 1c43 adds r3, r0, #1 801608a: d102 bne.n 8016092 <_lseek_r+0x1e> 801608c: 682b ldr r3, [r5, #0] 801608e: b103 cbz r3, 8016092 <_lseek_r+0x1e> 8016090: 6023 str r3, [r4, #0] 8016092: bd38 pop {r3, r4, r5, pc} 8016094: 20001608 .word 0x20001608 08016098 <_read_r>: 8016098: b538 push {r3, r4, r5, lr} 801609a: 4604 mov r4, r0 801609c: 4608 mov r0, r1 801609e: 4611 mov r1, r2 80160a0: 2200 movs r2, #0 80160a2: 4d05 ldr r5, [pc, #20] @ (80160b8 <_read_r+0x20>) 80160a4: 602a str r2, [r5, #0] 80160a6: 461a mov r2, r3 80160a8: f7f8 fd62 bl 800eb70 <_read> 80160ac: 1c43 adds r3, r0, #1 80160ae: d102 bne.n 80160b6 <_read_r+0x1e> 80160b0: 682b ldr r3, [r5, #0] 80160b2: b103 cbz r3, 80160b6 <_read_r+0x1e> 80160b4: 6023 str r3, [r4, #0] 80160b6: bd38 pop {r3, r4, r5, pc} 80160b8: 20001608 .word 0x20001608 080160bc <_write_r>: 80160bc: b538 push {r3, r4, r5, lr} 80160be: 4604 mov r4, r0 80160c0: 4608 mov r0, r1 80160c2: 4611 mov r1, r2 80160c4: 2200 movs r2, #0 80160c6: 4d05 ldr r5, [pc, #20] @ (80160dc <_write_r+0x20>) 80160c8: 602a str r2, [r5, #0] 80160ca: 461a mov r2, r3 80160cc: f7f4 f9d6 bl 800a47c <_write> 80160d0: 1c43 adds r3, r0, #1 80160d2: d102 bne.n 80160da <_write_r+0x1e> 80160d4: 682b ldr r3, [r5, #0] 80160d6: b103 cbz r3, 80160da <_write_r+0x1e> 80160d8: 6023 str r3, [r4, #0] 80160da: bd38 pop {r3, r4, r5, pc} 80160dc: 20001608 .word 0x20001608 080160e0 <__errno>: 80160e0: 4b01 ldr r3, [pc, #4] @ (80160e8 <__errno+0x8>) 80160e2: 6818 ldr r0, [r3, #0] 80160e4: 4770 bx lr 80160e6: bf00 nop 80160e8: 2000009c .word 0x2000009c 080160ec <__libc_init_array>: 80160ec: b570 push {r4, r5, r6, lr} 80160ee: 2600 movs r6, #0 80160f0: 4d0c ldr r5, [pc, #48] @ (8016124 <__libc_init_array+0x38>) 80160f2: 4c0d ldr r4, [pc, #52] @ (8016128 <__libc_init_array+0x3c>) 80160f4: 1b64 subs r4, r4, r5 80160f6: 10a4 asrs r4, r4, #2 80160f8: 42a6 cmp r6, r4 80160fa: d109 bne.n 8016110 <__libc_init_array+0x24> 80160fc: f002 f874 bl 80181e8 <_init> 8016100: 2600 movs r6, #0 8016102: 4d0a ldr r5, [pc, #40] @ (801612c <__libc_init_array+0x40>) 8016104: 4c0a ldr r4, [pc, #40] @ (8016130 <__libc_init_array+0x44>) 8016106: 1b64 subs r4, r4, r5 8016108: 10a4 asrs r4, r4, #2 801610a: 42a6 cmp r6, r4 801610c: d105 bne.n 801611a <__libc_init_array+0x2e> 801610e: bd70 pop {r4, r5, r6, pc} 8016110: f855 3b04 ldr.w r3, [r5], #4 8016114: 4798 blx r3 8016116: 3601 adds r6, #1 8016118: e7ee b.n 80160f8 <__libc_init_array+0xc> 801611a: f855 3b04 ldr.w r3, [r5], #4 801611e: 4798 blx r3 8016120: 3601 adds r6, #1 8016122: e7f2 b.n 801610a <__libc_init_array+0x1e> 8016124: 0801935c .word 0x0801935c 8016128: 0801935c .word 0x0801935c 801612c: 0801935c .word 0x0801935c 8016130: 08019360 .word 0x08019360 08016134 <__retarget_lock_init_recursive>: 8016134: 4770 bx lr 08016136 <__retarget_lock_acquire_recursive>: 8016136: 4770 bx lr 08016138 <__retarget_lock_release_recursive>: 8016138: 4770 bx lr 0801613a : 801613a: 4603 mov r3, r0 801613c: b510 push {r4, lr} 801613e: b2c9 uxtb r1, r1 8016140: 4402 add r2, r0 8016142: 4293 cmp r3, r2 8016144: 4618 mov r0, r3 8016146: d101 bne.n 801614c 8016148: 2000 movs r0, #0 801614a: e003 b.n 8016154 801614c: 7804 ldrb r4, [r0, #0] 801614e: 3301 adds r3, #1 8016150: 428c cmp r4, r1 8016152: d1f6 bne.n 8016142 8016154: bd10 pop {r4, pc} 08016156 : 8016156: 440a add r2, r1 8016158: 4291 cmp r1, r2 801615a: f100 33ff add.w r3, r0, #4294967295 801615e: d100 bne.n 8016162 8016160: 4770 bx lr 8016162: b510 push {r4, lr} 8016164: f811 4b01 ldrb.w r4, [r1], #1 8016168: 4291 cmp r1, r2 801616a: f803 4f01 strb.w r4, [r3, #1]! 801616e: d1f9 bne.n 8016164 8016170: bd10 pop {r4, pc} ... 08016174 <__assert_func>: 8016174: b51f push {r0, r1, r2, r3, r4, lr} 8016176: 4614 mov r4, r2 8016178: 461a mov r2, r3 801617a: 4b09 ldr r3, [pc, #36] @ (80161a0 <__assert_func+0x2c>) 801617c: 4605 mov r5, r0 801617e: 681b ldr r3, [r3, #0] 8016180: 68d8 ldr r0, [r3, #12] 8016182: b14c cbz r4, 8016198 <__assert_func+0x24> 8016184: 4b07 ldr r3, [pc, #28] @ (80161a4 <__assert_func+0x30>) 8016186: e9cd 3401 strd r3, r4, [sp, #4] 801618a: 9100 str r1, [sp, #0] 801618c: 462b mov r3, r5 801618e: 4906 ldr r1, [pc, #24] @ (80161a8 <__assert_func+0x34>) 8016190: f001 fce2 bl 8017b58 8016194: f001 fd1c bl 8017bd0 8016198: 4b04 ldr r3, [pc, #16] @ (80161ac <__assert_func+0x38>) 801619a: 461c mov r4, r3 801619c: e7f3 b.n 8016186 <__assert_func+0x12> 801619e: bf00 nop 80161a0: 2000009c .word 0x2000009c 80161a4: 08019014 .word 0x08019014 80161a8: 08019021 .word 0x08019021 80161ac: 0801904f .word 0x0801904f 080161b0 : 80161b0: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 80161b4: 6903 ldr r3, [r0, #16] 80161b6: 690c ldr r4, [r1, #16] 80161b8: 4607 mov r7, r0 80161ba: 42a3 cmp r3, r4 80161bc: db7e blt.n 80162bc 80161be: 3c01 subs r4, #1 80161c0: 00a3 lsls r3, r4, #2 80161c2: f100 0514 add.w r5, r0, #20 80161c6: f101 0814 add.w r8, r1, #20 80161ca: 9300 str r3, [sp, #0] 80161cc: eb05 0384 add.w r3, r5, r4, lsl #2 80161d0: 9301 str r3, [sp, #4] 80161d2: f858 3024 ldr.w r3, [r8, r4, lsl #2] 80161d6: f855 2024 ldr.w r2, [r5, r4, lsl #2] 80161da: 3301 adds r3, #1 80161dc: 429a cmp r2, r3 80161de: fbb2 f6f3 udiv r6, r2, r3 80161e2: eb08 0984 add.w r9, r8, r4, lsl #2 80161e6: d32e bcc.n 8016246 80161e8: f04f 0a00 mov.w sl, #0 80161ec: 46c4 mov ip, r8 80161ee: 46ae mov lr, r5 80161f0: 46d3 mov fp, sl 80161f2: f85c 3b04 ldr.w r3, [ip], #4 80161f6: b298 uxth r0, r3 80161f8: fb06 a000 mla r0, r6, r0, sl 80161fc: 0c1b lsrs r3, r3, #16 80161fe: 0c02 lsrs r2, r0, #16 8016200: fb06 2303 mla r3, r6, r3, r2 8016204: f8de 2000 ldr.w r2, [lr] 8016208: b280 uxth r0, r0 801620a: b292 uxth r2, r2 801620c: 1a12 subs r2, r2, r0 801620e: 445a add r2, fp 8016210: f8de 0000 ldr.w r0, [lr] 8016214: ea4f 4a13 mov.w sl, r3, lsr #16 8016218: b29b uxth r3, r3 801621a: ebc3 4322 rsb r3, r3, r2, asr #16 801621e: eb03 4310 add.w r3, r3, r0, lsr #16 8016222: b292 uxth r2, r2 8016224: ea42 4203 orr.w r2, r2, r3, lsl #16 8016228: 45e1 cmp r9, ip 801622a: ea4f 4b23 mov.w fp, r3, asr #16 801622e: f84e 2b04 str.w r2, [lr], #4 8016232: d2de bcs.n 80161f2 8016234: 9b00 ldr r3, [sp, #0] 8016236: 58eb ldr r3, [r5, r3] 8016238: b92b cbnz r3, 8016246 801623a: 9b01 ldr r3, [sp, #4] 801623c: 3b04 subs r3, #4 801623e: 429d cmp r5, r3 8016240: 461a mov r2, r3 8016242: d32f bcc.n 80162a4 8016244: 613c str r4, [r7, #16] 8016246: 4638 mov r0, r7 8016248: f001 f97e bl 8017548 <__mcmp> 801624c: 2800 cmp r0, #0 801624e: db25 blt.n 801629c 8016250: 4629 mov r1, r5 8016252: 2000 movs r0, #0 8016254: f858 2b04 ldr.w r2, [r8], #4 8016258: f8d1 c000 ldr.w ip, [r1] 801625c: fa1f fe82 uxth.w lr, r2 8016260: fa1f f38c uxth.w r3, ip 8016264: eba3 030e sub.w r3, r3, lr 8016268: 4403 add r3, r0 801626a: 0c12 lsrs r2, r2, #16 801626c: ebc2 4223 rsb r2, r2, r3, asr #16 8016270: eb02 421c add.w r2, r2, ip, lsr #16 8016274: b29b uxth r3, r3 8016276: ea43 4302 orr.w r3, r3, r2, lsl #16 801627a: 45c1 cmp r9, r8 801627c: ea4f 4022 mov.w r0, r2, asr #16 8016280: f841 3b04 str.w r3, [r1], #4 8016284: d2e6 bcs.n 8016254 8016286: f855 2024 ldr.w r2, [r5, r4, lsl #2] 801628a: eb05 0384 add.w r3, r5, r4, lsl #2 801628e: b922 cbnz r2, 801629a 8016290: 3b04 subs r3, #4 8016292: 429d cmp r5, r3 8016294: 461a mov r2, r3 8016296: d30b bcc.n 80162b0 8016298: 613c str r4, [r7, #16] 801629a: 3601 adds r6, #1 801629c: 4630 mov r0, r6 801629e: b003 add sp, #12 80162a0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80162a4: 6812 ldr r2, [r2, #0] 80162a6: 3b04 subs r3, #4 80162a8: 2a00 cmp r2, #0 80162aa: d1cb bne.n 8016244 80162ac: 3c01 subs r4, #1 80162ae: e7c6 b.n 801623e 80162b0: 6812 ldr r2, [r2, #0] 80162b2: 3b04 subs r3, #4 80162b4: 2a00 cmp r2, #0 80162b6: d1ef bne.n 8016298 80162b8: 3c01 subs r4, #1 80162ba: e7ea b.n 8016292 80162bc: 2000 movs r0, #0 80162be: e7ee b.n 801629e 080162c0 <_dtoa_r>: 80162c0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80162c4: 4614 mov r4, r2 80162c6: 461d mov r5, r3 80162c8: 69c7 ldr r7, [r0, #28] 80162ca: b097 sub sp, #92 @ 0x5c 80162cc: 4681 mov r9, r0 80162ce: e9cd 4506 strd r4, r5, [sp, #24] 80162d2: 9e23 ldr r6, [sp, #140] @ 0x8c 80162d4: b97f cbnz r7, 80162f6 <_dtoa_r+0x36> 80162d6: 2010 movs r0, #16 80162d8: f000 fe0e bl 8016ef8 80162dc: 4602 mov r2, r0 80162de: f8c9 001c str.w r0, [r9, #28] 80162e2: b920 cbnz r0, 80162ee <_dtoa_r+0x2e> 80162e4: 21ef movs r1, #239 @ 0xef 80162e6: 4bac ldr r3, [pc, #688] @ (8016598 <_dtoa_r+0x2d8>) 80162e8: 48ac ldr r0, [pc, #688] @ (801659c <_dtoa_r+0x2dc>) 80162ea: f7ff ff43 bl 8016174 <__assert_func> 80162ee: e9c0 7701 strd r7, r7, [r0, #4] 80162f2: 6007 str r7, [r0, #0] 80162f4: 60c7 str r7, [r0, #12] 80162f6: f8d9 301c ldr.w r3, [r9, #28] 80162fa: 6819 ldr r1, [r3, #0] 80162fc: b159 cbz r1, 8016316 <_dtoa_r+0x56> 80162fe: 685a ldr r2, [r3, #4] 8016300: 2301 movs r3, #1 8016302: 4093 lsls r3, r2 8016304: 604a str r2, [r1, #4] 8016306: 608b str r3, [r1, #8] 8016308: 4648 mov r0, r9 801630a: f000 feeb bl 80170e4 <_Bfree> 801630e: 2200 movs r2, #0 8016310: f8d9 301c ldr.w r3, [r9, #28] 8016314: 601a str r2, [r3, #0] 8016316: 1e2b subs r3, r5, #0 8016318: bfaf iteee ge 801631a: 2300 movge r3, #0 801631c: 2201 movlt r2, #1 801631e: f023 4300 biclt.w r3, r3, #2147483648 @ 0x80000000 8016322: 9307 strlt r3, [sp, #28] 8016324: bfa8 it ge 8016326: 6033 strge r3, [r6, #0] 8016328: f8dd 801c ldr.w r8, [sp, #28] 801632c: 4b9c ldr r3, [pc, #624] @ (80165a0 <_dtoa_r+0x2e0>) 801632e: bfb8 it lt 8016330: 6032 strlt r2, [r6, #0] 8016332: ea33 0308 bics.w r3, r3, r8 8016336: d112 bne.n 801635e <_dtoa_r+0x9e> 8016338: f242 730f movw r3, #9999 @ 0x270f 801633c: 9a22 ldr r2, [sp, #136] @ 0x88 801633e: 6013 str r3, [r2, #0] 8016340: f3c8 0313 ubfx r3, r8, #0, #20 8016344: 4323 orrs r3, r4 8016346: f000 855e beq.w 8016e06 <_dtoa_r+0xb46> 801634a: 9b24 ldr r3, [sp, #144] @ 0x90 801634c: f8df a254 ldr.w sl, [pc, #596] @ 80165a4 <_dtoa_r+0x2e4> 8016350: 2b00 cmp r3, #0 8016352: f000 8560 beq.w 8016e16 <_dtoa_r+0xb56> 8016356: f10a 0303 add.w r3, sl, #3 801635a: f000 bd5a b.w 8016e12 <_dtoa_r+0xb52> 801635e: e9dd 2306 ldrd r2, r3, [sp, #24] 8016362: e9cd 230c strd r2, r3, [sp, #48] @ 0x30 8016366: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 801636a: 2200 movs r2, #0 801636c: 2300 movs r3, #0 801636e: f7f2 fb87 bl 8008a80 <__aeabi_dcmpeq> 8016372: 4607 mov r7, r0 8016374: b158 cbz r0, 801638e <_dtoa_r+0xce> 8016376: 2301 movs r3, #1 8016378: 9a22 ldr r2, [sp, #136] @ 0x88 801637a: 6013 str r3, [r2, #0] 801637c: 9b24 ldr r3, [sp, #144] @ 0x90 801637e: b113 cbz r3, 8016386 <_dtoa_r+0xc6> 8016380: 4b89 ldr r3, [pc, #548] @ (80165a8 <_dtoa_r+0x2e8>) 8016382: 9a24 ldr r2, [sp, #144] @ 0x90 8016384: 6013 str r3, [r2, #0] 8016386: f8df a224 ldr.w sl, [pc, #548] @ 80165ac <_dtoa_r+0x2ec> 801638a: f000 bd44 b.w 8016e16 <_dtoa_r+0xb56> 801638e: ab14 add r3, sp, #80 @ 0x50 8016390: 9301 str r3, [sp, #4] 8016392: ab15 add r3, sp, #84 @ 0x54 8016394: 9300 str r3, [sp, #0] 8016396: 4648 mov r0, r9 8016398: e9dd 230c ldrd r2, r3, [sp, #48] @ 0x30 801639c: f001 f984 bl 80176a8 <__d2b> 80163a0: f3c8 560a ubfx r6, r8, #20, #11 80163a4: 9003 str r0, [sp, #12] 80163a6: 2e00 cmp r6, #0 80163a8: d078 beq.n 801649c <_dtoa_r+0x1dc> 80163aa: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 80163ae: 9b0d ldr r3, [sp, #52] @ 0x34 80163b0: f2a6 36ff subw r6, r6, #1023 @ 0x3ff 80163b4: f3c3 0313 ubfx r3, r3, #0, #20 80163b8: f043 537f orr.w r3, r3, #1069547520 @ 0x3fc00000 80163bc: f443 1340 orr.w r3, r3, #3145728 @ 0x300000 80163c0: 9712 str r7, [sp, #72] @ 0x48 80163c2: 4619 mov r1, r3 80163c4: 2200 movs r2, #0 80163c6: 4b7a ldr r3, [pc, #488] @ (80165b0 <_dtoa_r+0x2f0>) 80163c8: f7f1 ff3a bl 8008240 <__aeabi_dsub> 80163cc: a36c add r3, pc, #432 @ (adr r3, 8016580 <_dtoa_r+0x2c0>) 80163ce: e9d3 2300 ldrd r2, r3, [r3] 80163d2: f7f2 f8ed bl 80085b0 <__aeabi_dmul> 80163d6: a36c add r3, pc, #432 @ (adr r3, 8016588 <_dtoa_r+0x2c8>) 80163d8: e9d3 2300 ldrd r2, r3, [r3] 80163dc: f7f1 ff32 bl 8008244 <__adddf3> 80163e0: 4604 mov r4, r0 80163e2: 4630 mov r0, r6 80163e4: 460d mov r5, r1 80163e6: f7f2 f879 bl 80084dc <__aeabi_i2d> 80163ea: a369 add r3, pc, #420 @ (adr r3, 8016590 <_dtoa_r+0x2d0>) 80163ec: e9d3 2300 ldrd r2, r3, [r3] 80163f0: f7f2 f8de bl 80085b0 <__aeabi_dmul> 80163f4: 4602 mov r2, r0 80163f6: 460b mov r3, r1 80163f8: 4620 mov r0, r4 80163fa: 4629 mov r1, r5 80163fc: f7f1 ff22 bl 8008244 <__adddf3> 8016400: 4604 mov r4, r0 8016402: 460d mov r5, r1 8016404: f7f2 fb84 bl 8008b10 <__aeabi_d2iz> 8016408: 2200 movs r2, #0 801640a: 4607 mov r7, r0 801640c: 2300 movs r3, #0 801640e: 4620 mov r0, r4 8016410: 4629 mov r1, r5 8016412: f7f2 fb3f bl 8008a94 <__aeabi_dcmplt> 8016416: b140 cbz r0, 801642a <_dtoa_r+0x16a> 8016418: 4638 mov r0, r7 801641a: f7f2 f85f bl 80084dc <__aeabi_i2d> 801641e: 4622 mov r2, r4 8016420: 462b mov r3, r5 8016422: f7f2 fb2d bl 8008a80 <__aeabi_dcmpeq> 8016426: b900 cbnz r0, 801642a <_dtoa_r+0x16a> 8016428: 3f01 subs r7, #1 801642a: 2f16 cmp r7, #22 801642c: d854 bhi.n 80164d8 <_dtoa_r+0x218> 801642e: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 8016432: 4b60 ldr r3, [pc, #384] @ (80165b4 <_dtoa_r+0x2f4>) 8016434: eb03 03c7 add.w r3, r3, r7, lsl #3 8016438: e9d3 2300 ldrd r2, r3, [r3] 801643c: f7f2 fb2a bl 8008a94 <__aeabi_dcmplt> 8016440: 2800 cmp r0, #0 8016442: d04b beq.n 80164dc <_dtoa_r+0x21c> 8016444: 2300 movs r3, #0 8016446: 3f01 subs r7, #1 8016448: 930f str r3, [sp, #60] @ 0x3c 801644a: 9b14 ldr r3, [sp, #80] @ 0x50 801644c: 1b9b subs r3, r3, r6 801644e: 1e5a subs r2, r3, #1 8016450: bf49 itett mi 8016452: f1c3 0301 rsbmi r3, r3, #1 8016456: 2300 movpl r3, #0 8016458: 9304 strmi r3, [sp, #16] 801645a: 2300 movmi r3, #0 801645c: 9209 str r2, [sp, #36] @ 0x24 801645e: bf54 ite pl 8016460: 9304 strpl r3, [sp, #16] 8016462: 9309 strmi r3, [sp, #36] @ 0x24 8016464: 2f00 cmp r7, #0 8016466: db3b blt.n 80164e0 <_dtoa_r+0x220> 8016468: 9b09 ldr r3, [sp, #36] @ 0x24 801646a: 970e str r7, [sp, #56] @ 0x38 801646c: 443b add r3, r7 801646e: 9309 str r3, [sp, #36] @ 0x24 8016470: 2300 movs r3, #0 8016472: 930a str r3, [sp, #40] @ 0x28 8016474: 9b20 ldr r3, [sp, #128] @ 0x80 8016476: 2b09 cmp r3, #9 8016478: d865 bhi.n 8016546 <_dtoa_r+0x286> 801647a: 2b05 cmp r3, #5 801647c: bfc4 itt gt 801647e: 3b04 subgt r3, #4 8016480: 9320 strgt r3, [sp, #128] @ 0x80 8016482: 9b20 ldr r3, [sp, #128] @ 0x80 8016484: bfc8 it gt 8016486: 2400 movgt r4, #0 8016488: f1a3 0302 sub.w r3, r3, #2 801648c: bfd8 it le 801648e: 2401 movle r4, #1 8016490: 2b03 cmp r3, #3 8016492: d864 bhi.n 801655e <_dtoa_r+0x29e> 8016494: e8df f003 tbb [pc, r3] 8016498: 2c385553 .word 0x2c385553 801649c: e9dd 6314 ldrd r6, r3, [sp, #80] @ 0x50 80164a0: 441e add r6, r3 80164a2: f206 4332 addw r3, r6, #1074 @ 0x432 80164a6: 2b20 cmp r3, #32 80164a8: bfc1 itttt gt 80164aa: f1c3 0340 rsbgt r3, r3, #64 @ 0x40 80164ae: fa08 f803 lslgt.w r8, r8, r3 80164b2: f206 4312 addwgt r3, r6, #1042 @ 0x412 80164b6: fa24 f303 lsrgt.w r3, r4, r3 80164ba: bfd6 itet le 80164bc: f1c3 0320 rsble r3, r3, #32 80164c0: ea48 0003 orrgt.w r0, r8, r3 80164c4: fa04 f003 lslle.w r0, r4, r3 80164c8: f7f1 fff8 bl 80084bc <__aeabi_ui2d> 80164cc: 2201 movs r2, #1 80164ce: f1a1 73f8 sub.w r3, r1, #32505856 @ 0x1f00000 80164d2: 3e01 subs r6, #1 80164d4: 9212 str r2, [sp, #72] @ 0x48 80164d6: e774 b.n 80163c2 <_dtoa_r+0x102> 80164d8: 2301 movs r3, #1 80164da: e7b5 b.n 8016448 <_dtoa_r+0x188> 80164dc: 900f str r0, [sp, #60] @ 0x3c 80164de: e7b4 b.n 801644a <_dtoa_r+0x18a> 80164e0: 9b04 ldr r3, [sp, #16] 80164e2: 1bdb subs r3, r3, r7 80164e4: 9304 str r3, [sp, #16] 80164e6: 427b negs r3, r7 80164e8: 930a str r3, [sp, #40] @ 0x28 80164ea: 2300 movs r3, #0 80164ec: 930e str r3, [sp, #56] @ 0x38 80164ee: e7c1 b.n 8016474 <_dtoa_r+0x1b4> 80164f0: 2301 movs r3, #1 80164f2: 930b str r3, [sp, #44] @ 0x2c 80164f4: 9b21 ldr r3, [sp, #132] @ 0x84 80164f6: eb07 0b03 add.w fp, r7, r3 80164fa: f10b 0301 add.w r3, fp, #1 80164fe: 2b01 cmp r3, #1 8016500: 9308 str r3, [sp, #32] 8016502: bfb8 it lt 8016504: 2301 movlt r3, #1 8016506: e006 b.n 8016516 <_dtoa_r+0x256> 8016508: 2301 movs r3, #1 801650a: 930b str r3, [sp, #44] @ 0x2c 801650c: 9b21 ldr r3, [sp, #132] @ 0x84 801650e: 2b00 cmp r3, #0 8016510: dd28 ble.n 8016564 <_dtoa_r+0x2a4> 8016512: 469b mov fp, r3 8016514: 9308 str r3, [sp, #32] 8016516: 2100 movs r1, #0 8016518: 2204 movs r2, #4 801651a: f8d9 001c ldr.w r0, [r9, #28] 801651e: f102 0514 add.w r5, r2, #20 8016522: 429d cmp r5, r3 8016524: d926 bls.n 8016574 <_dtoa_r+0x2b4> 8016526: 6041 str r1, [r0, #4] 8016528: 4648 mov r0, r9 801652a: f000 fd9b bl 8017064 <_Balloc> 801652e: 4682 mov sl, r0 8016530: 2800 cmp r0, #0 8016532: d143 bne.n 80165bc <_dtoa_r+0x2fc> 8016534: 4602 mov r2, r0 8016536: f240 11af movw r1, #431 @ 0x1af 801653a: 4b1f ldr r3, [pc, #124] @ (80165b8 <_dtoa_r+0x2f8>) 801653c: e6d4 b.n 80162e8 <_dtoa_r+0x28> 801653e: 2300 movs r3, #0 8016540: e7e3 b.n 801650a <_dtoa_r+0x24a> 8016542: 2300 movs r3, #0 8016544: e7d5 b.n 80164f2 <_dtoa_r+0x232> 8016546: 2401 movs r4, #1 8016548: 2300 movs r3, #0 801654a: 940b str r4, [sp, #44] @ 0x2c 801654c: 9320 str r3, [sp, #128] @ 0x80 801654e: f04f 3bff mov.w fp, #4294967295 8016552: 2200 movs r2, #0 8016554: 2312 movs r3, #18 8016556: f8cd b020 str.w fp, [sp, #32] 801655a: 9221 str r2, [sp, #132] @ 0x84 801655c: e7db b.n 8016516 <_dtoa_r+0x256> 801655e: 2301 movs r3, #1 8016560: 930b str r3, [sp, #44] @ 0x2c 8016562: e7f4 b.n 801654e <_dtoa_r+0x28e> 8016564: f04f 0b01 mov.w fp, #1 8016568: 465b mov r3, fp 801656a: f8cd b020 str.w fp, [sp, #32] 801656e: f8cd b084 str.w fp, [sp, #132] @ 0x84 8016572: e7d0 b.n 8016516 <_dtoa_r+0x256> 8016574: 3101 adds r1, #1 8016576: 0052 lsls r2, r2, #1 8016578: e7d1 b.n 801651e <_dtoa_r+0x25e> 801657a: bf00 nop 801657c: f3af 8000 nop.w 8016580: 636f4361 .word 0x636f4361 8016584: 3fd287a7 .word 0x3fd287a7 8016588: 8b60c8b3 .word 0x8b60c8b3 801658c: 3fc68a28 .word 0x3fc68a28 8016590: 509f79fb .word 0x509f79fb 8016594: 3fd34413 .word 0x3fd34413 8016598: 0801905d .word 0x0801905d 801659c: 08019074 .word 0x08019074 80165a0: 7ff00000 .word 0x7ff00000 80165a4: 08019059 .word 0x08019059 80165a8: 08018ff1 .word 0x08018ff1 80165ac: 08018ff0 .word 0x08018ff0 80165b0: 3ff80000 .word 0x3ff80000 80165b4: 08019188 .word 0x08019188 80165b8: 080190cc .word 0x080190cc 80165bc: f8d9 301c ldr.w r3, [r9, #28] 80165c0: 6018 str r0, [r3, #0] 80165c2: 9b08 ldr r3, [sp, #32] 80165c4: 2b0e cmp r3, #14 80165c6: f200 80a1 bhi.w 801670c <_dtoa_r+0x44c> 80165ca: 2c00 cmp r4, #0 80165cc: f000 809e beq.w 801670c <_dtoa_r+0x44c> 80165d0: 2f00 cmp r7, #0 80165d2: dd33 ble.n 801663c <_dtoa_r+0x37c> 80165d4: 4b9c ldr r3, [pc, #624] @ (8016848 <_dtoa_r+0x588>) 80165d6: f007 020f and.w r2, r7, #15 80165da: eb03 03c2 add.w r3, r3, r2, lsl #3 80165de: 05f8 lsls r0, r7, #23 80165e0: e9d3 3400 ldrd r3, r4, [r3] 80165e4: e9cd 3410 strd r3, r4, [sp, #64] @ 0x40 80165e8: ea4f 1427 mov.w r4, r7, asr #4 80165ec: d516 bpl.n 801661c <_dtoa_r+0x35c> 80165ee: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 80165f2: 4b96 ldr r3, [pc, #600] @ (801684c <_dtoa_r+0x58c>) 80165f4: 2603 movs r6, #3 80165f6: e9d3 2308 ldrd r2, r3, [r3, #32] 80165fa: f7f2 f903 bl 8008804 <__aeabi_ddiv> 80165fe: e9cd 0106 strd r0, r1, [sp, #24] 8016602: f004 040f and.w r4, r4, #15 8016606: 4d91 ldr r5, [pc, #580] @ (801684c <_dtoa_r+0x58c>) 8016608: b954 cbnz r4, 8016620 <_dtoa_r+0x360> 801660a: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 801660e: e9dd 0106 ldrd r0, r1, [sp, #24] 8016612: f7f2 f8f7 bl 8008804 <__aeabi_ddiv> 8016616: e9cd 0106 strd r0, r1, [sp, #24] 801661a: e028 b.n 801666e <_dtoa_r+0x3ae> 801661c: 2602 movs r6, #2 801661e: e7f2 b.n 8016606 <_dtoa_r+0x346> 8016620: 07e1 lsls r1, r4, #31 8016622: d508 bpl.n 8016636 <_dtoa_r+0x376> 8016624: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8016628: e9d5 2300 ldrd r2, r3, [r5] 801662c: f7f1 ffc0 bl 80085b0 <__aeabi_dmul> 8016630: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8016634: 3601 adds r6, #1 8016636: 1064 asrs r4, r4, #1 8016638: 3508 adds r5, #8 801663a: e7e5 b.n 8016608 <_dtoa_r+0x348> 801663c: f000 80af beq.w 801679e <_dtoa_r+0x4de> 8016640: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 8016644: 427c negs r4, r7 8016646: 4b80 ldr r3, [pc, #512] @ (8016848 <_dtoa_r+0x588>) 8016648: f004 020f and.w r2, r4, #15 801664c: eb03 03c2 add.w r3, r3, r2, lsl #3 8016650: e9d3 2300 ldrd r2, r3, [r3] 8016654: f7f1 ffac bl 80085b0 <__aeabi_dmul> 8016658: 2602 movs r6, #2 801665a: 2300 movs r3, #0 801665c: e9cd 0106 strd r0, r1, [sp, #24] 8016660: 4d7a ldr r5, [pc, #488] @ (801684c <_dtoa_r+0x58c>) 8016662: 1124 asrs r4, r4, #4 8016664: 2c00 cmp r4, #0 8016666: f040 808f bne.w 8016788 <_dtoa_r+0x4c8> 801666a: 2b00 cmp r3, #0 801666c: d1d3 bne.n 8016616 <_dtoa_r+0x356> 801666e: e9dd 4506 ldrd r4, r5, [sp, #24] 8016672: 9b0f ldr r3, [sp, #60] @ 0x3c 8016674: 2b00 cmp r3, #0 8016676: f000 8094 beq.w 80167a2 <_dtoa_r+0x4e2> 801667a: 2200 movs r2, #0 801667c: 4620 mov r0, r4 801667e: 4629 mov r1, r5 8016680: 4b73 ldr r3, [pc, #460] @ (8016850 <_dtoa_r+0x590>) 8016682: f7f2 fa07 bl 8008a94 <__aeabi_dcmplt> 8016686: 2800 cmp r0, #0 8016688: f000 808b beq.w 80167a2 <_dtoa_r+0x4e2> 801668c: 9b08 ldr r3, [sp, #32] 801668e: 2b00 cmp r3, #0 8016690: f000 8087 beq.w 80167a2 <_dtoa_r+0x4e2> 8016694: f1bb 0f00 cmp.w fp, #0 8016698: dd34 ble.n 8016704 <_dtoa_r+0x444> 801669a: 4620 mov r0, r4 801669c: 2200 movs r2, #0 801669e: 4629 mov r1, r5 80166a0: 4b6c ldr r3, [pc, #432] @ (8016854 <_dtoa_r+0x594>) 80166a2: f7f1 ff85 bl 80085b0 <__aeabi_dmul> 80166a6: 465c mov r4, fp 80166a8: e9cd 0106 strd r0, r1, [sp, #24] 80166ac: f107 38ff add.w r8, r7, #4294967295 80166b0: 3601 adds r6, #1 80166b2: 4630 mov r0, r6 80166b4: f7f1 ff12 bl 80084dc <__aeabi_i2d> 80166b8: e9dd 2306 ldrd r2, r3, [sp, #24] 80166bc: f7f1 ff78 bl 80085b0 <__aeabi_dmul> 80166c0: 2200 movs r2, #0 80166c2: 4b65 ldr r3, [pc, #404] @ (8016858 <_dtoa_r+0x598>) 80166c4: f7f1 fdbe bl 8008244 <__adddf3> 80166c8: 4605 mov r5, r0 80166ca: f1a1 7650 sub.w r6, r1, #54525952 @ 0x3400000 80166ce: 2c00 cmp r4, #0 80166d0: d16a bne.n 80167a8 <_dtoa_r+0x4e8> 80166d2: e9dd 0106 ldrd r0, r1, [sp, #24] 80166d6: 2200 movs r2, #0 80166d8: 4b60 ldr r3, [pc, #384] @ (801685c <_dtoa_r+0x59c>) 80166da: f7f1 fdb1 bl 8008240 <__aeabi_dsub> 80166de: 4602 mov r2, r0 80166e0: 460b mov r3, r1 80166e2: e9cd 2306 strd r2, r3, [sp, #24] 80166e6: 462a mov r2, r5 80166e8: 4633 mov r3, r6 80166ea: f7f2 f9f1 bl 8008ad0 <__aeabi_dcmpgt> 80166ee: 2800 cmp r0, #0 80166f0: f040 8298 bne.w 8016c24 <_dtoa_r+0x964> 80166f4: e9dd 0106 ldrd r0, r1, [sp, #24] 80166f8: 462a mov r2, r5 80166fa: f106 4300 add.w r3, r6, #2147483648 @ 0x80000000 80166fe: f7f2 f9c9 bl 8008a94 <__aeabi_dcmplt> 8016702: bb38 cbnz r0, 8016754 <_dtoa_r+0x494> 8016704: e9dd 340c ldrd r3, r4, [sp, #48] @ 0x30 8016708: e9cd 3406 strd r3, r4, [sp, #24] 801670c: 9b15 ldr r3, [sp, #84] @ 0x54 801670e: 2b00 cmp r3, #0 8016710: f2c0 8157 blt.w 80169c2 <_dtoa_r+0x702> 8016714: 2f0e cmp r7, #14 8016716: f300 8154 bgt.w 80169c2 <_dtoa_r+0x702> 801671a: 4b4b ldr r3, [pc, #300] @ (8016848 <_dtoa_r+0x588>) 801671c: eb03 03c7 add.w r3, r3, r7, lsl #3 8016720: e9d3 3400 ldrd r3, r4, [r3] 8016724: e9cd 3404 strd r3, r4, [sp, #16] 8016728: 9b21 ldr r3, [sp, #132] @ 0x84 801672a: 2b00 cmp r3, #0 801672c: f280 80e5 bge.w 80168fa <_dtoa_r+0x63a> 8016730: 9b08 ldr r3, [sp, #32] 8016732: 2b00 cmp r3, #0 8016734: f300 80e1 bgt.w 80168fa <_dtoa_r+0x63a> 8016738: d10c bne.n 8016754 <_dtoa_r+0x494> 801673a: e9dd 0104 ldrd r0, r1, [sp, #16] 801673e: 2200 movs r2, #0 8016740: 4b46 ldr r3, [pc, #280] @ (801685c <_dtoa_r+0x59c>) 8016742: f7f1 ff35 bl 80085b0 <__aeabi_dmul> 8016746: e9dd 2306 ldrd r2, r3, [sp, #24] 801674a: f7f2 f9b7 bl 8008abc <__aeabi_dcmpge> 801674e: 2800 cmp r0, #0 8016750: f000 8266 beq.w 8016c20 <_dtoa_r+0x960> 8016754: 2400 movs r4, #0 8016756: 4625 mov r5, r4 8016758: 9b21 ldr r3, [sp, #132] @ 0x84 801675a: 4656 mov r6, sl 801675c: ea6f 0803 mvn.w r8, r3 8016760: 2700 movs r7, #0 8016762: 4621 mov r1, r4 8016764: 4648 mov r0, r9 8016766: f000 fcbd bl 80170e4 <_Bfree> 801676a: 2d00 cmp r5, #0 801676c: f000 80bd beq.w 80168ea <_dtoa_r+0x62a> 8016770: b12f cbz r7, 801677e <_dtoa_r+0x4be> 8016772: 42af cmp r7, r5 8016774: d003 beq.n 801677e <_dtoa_r+0x4be> 8016776: 4639 mov r1, r7 8016778: 4648 mov r0, r9 801677a: f000 fcb3 bl 80170e4 <_Bfree> 801677e: 4629 mov r1, r5 8016780: 4648 mov r0, r9 8016782: f000 fcaf bl 80170e4 <_Bfree> 8016786: e0b0 b.n 80168ea <_dtoa_r+0x62a> 8016788: 07e2 lsls r2, r4, #31 801678a: d505 bpl.n 8016798 <_dtoa_r+0x4d8> 801678c: e9d5 2300 ldrd r2, r3, [r5] 8016790: f7f1 ff0e bl 80085b0 <__aeabi_dmul> 8016794: 2301 movs r3, #1 8016796: 3601 adds r6, #1 8016798: 1064 asrs r4, r4, #1 801679a: 3508 adds r5, #8 801679c: e762 b.n 8016664 <_dtoa_r+0x3a4> 801679e: 2602 movs r6, #2 80167a0: e765 b.n 801666e <_dtoa_r+0x3ae> 80167a2: 46b8 mov r8, r7 80167a4: 9c08 ldr r4, [sp, #32] 80167a6: e784 b.n 80166b2 <_dtoa_r+0x3f2> 80167a8: 4b27 ldr r3, [pc, #156] @ (8016848 <_dtoa_r+0x588>) 80167aa: 990b ldr r1, [sp, #44] @ 0x2c 80167ac: eb03 03c4 add.w r3, r3, r4, lsl #3 80167b0: e953 2302 ldrd r2, r3, [r3, #-8] 80167b4: 4454 add r4, sl 80167b6: 2900 cmp r1, #0 80167b8: d054 beq.n 8016864 <_dtoa_r+0x5a4> 80167ba: 2000 movs r0, #0 80167bc: 4928 ldr r1, [pc, #160] @ (8016860 <_dtoa_r+0x5a0>) 80167be: f7f2 f821 bl 8008804 <__aeabi_ddiv> 80167c2: 4633 mov r3, r6 80167c4: 462a mov r2, r5 80167c6: f7f1 fd3b bl 8008240 <__aeabi_dsub> 80167ca: 4656 mov r6, sl 80167cc: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 80167d0: e9dd 0106 ldrd r0, r1, [sp, #24] 80167d4: f7f2 f99c bl 8008b10 <__aeabi_d2iz> 80167d8: 4605 mov r5, r0 80167da: f7f1 fe7f bl 80084dc <__aeabi_i2d> 80167de: 4602 mov r2, r0 80167e0: 460b mov r3, r1 80167e2: e9dd 0106 ldrd r0, r1, [sp, #24] 80167e6: f7f1 fd2b bl 8008240 <__aeabi_dsub> 80167ea: 4602 mov r2, r0 80167ec: 460b mov r3, r1 80167ee: 3530 adds r5, #48 @ 0x30 80167f0: e9cd 2306 strd r2, r3, [sp, #24] 80167f4: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 80167f8: f806 5b01 strb.w r5, [r6], #1 80167fc: f7f2 f94a bl 8008a94 <__aeabi_dcmplt> 8016800: 2800 cmp r0, #0 8016802: d172 bne.n 80168ea <_dtoa_r+0x62a> 8016804: e9dd 2306 ldrd r2, r3, [sp, #24] 8016808: 2000 movs r0, #0 801680a: 4911 ldr r1, [pc, #68] @ (8016850 <_dtoa_r+0x590>) 801680c: f7f1 fd18 bl 8008240 <__aeabi_dsub> 8016810: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8016814: f7f2 f93e bl 8008a94 <__aeabi_dcmplt> 8016818: 2800 cmp r0, #0 801681a: f040 80b4 bne.w 8016986 <_dtoa_r+0x6c6> 801681e: 42a6 cmp r6, r4 8016820: f43f af70 beq.w 8016704 <_dtoa_r+0x444> 8016824: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8016828: 2200 movs r2, #0 801682a: 4b0a ldr r3, [pc, #40] @ (8016854 <_dtoa_r+0x594>) 801682c: f7f1 fec0 bl 80085b0 <__aeabi_dmul> 8016830: 2200 movs r2, #0 8016832: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8016836: e9dd 0106 ldrd r0, r1, [sp, #24] 801683a: 4b06 ldr r3, [pc, #24] @ (8016854 <_dtoa_r+0x594>) 801683c: f7f1 feb8 bl 80085b0 <__aeabi_dmul> 8016840: e9cd 0106 strd r0, r1, [sp, #24] 8016844: e7c4 b.n 80167d0 <_dtoa_r+0x510> 8016846: bf00 nop 8016848: 08019188 .word 0x08019188 801684c: 08019160 .word 0x08019160 8016850: 3ff00000 .word 0x3ff00000 8016854: 40240000 .word 0x40240000 8016858: 401c0000 .word 0x401c0000 801685c: 40140000 .word 0x40140000 8016860: 3fe00000 .word 0x3fe00000 8016864: 4631 mov r1, r6 8016866: 4628 mov r0, r5 8016868: f7f1 fea2 bl 80085b0 <__aeabi_dmul> 801686c: 4656 mov r6, sl 801686e: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8016872: 9413 str r4, [sp, #76] @ 0x4c 8016874: e9dd 0106 ldrd r0, r1, [sp, #24] 8016878: f7f2 f94a bl 8008b10 <__aeabi_d2iz> 801687c: 4605 mov r5, r0 801687e: f7f1 fe2d bl 80084dc <__aeabi_i2d> 8016882: 4602 mov r2, r0 8016884: 460b mov r3, r1 8016886: e9dd 0106 ldrd r0, r1, [sp, #24] 801688a: f7f1 fcd9 bl 8008240 <__aeabi_dsub> 801688e: 4602 mov r2, r0 8016890: 460b mov r3, r1 8016892: 3530 adds r5, #48 @ 0x30 8016894: f806 5b01 strb.w r5, [r6], #1 8016898: 42a6 cmp r6, r4 801689a: e9cd 2306 strd r2, r3, [sp, #24] 801689e: f04f 0200 mov.w r2, #0 80168a2: d124 bne.n 80168ee <_dtoa_r+0x62e> 80168a4: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 80168a8: 4bae ldr r3, [pc, #696] @ (8016b64 <_dtoa_r+0x8a4>) 80168aa: f7f1 fccb bl 8008244 <__adddf3> 80168ae: 4602 mov r2, r0 80168b0: 460b mov r3, r1 80168b2: e9dd 0106 ldrd r0, r1, [sp, #24] 80168b6: f7f2 f90b bl 8008ad0 <__aeabi_dcmpgt> 80168ba: 2800 cmp r0, #0 80168bc: d163 bne.n 8016986 <_dtoa_r+0x6c6> 80168be: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 80168c2: 2000 movs r0, #0 80168c4: 49a7 ldr r1, [pc, #668] @ (8016b64 <_dtoa_r+0x8a4>) 80168c6: f7f1 fcbb bl 8008240 <__aeabi_dsub> 80168ca: 4602 mov r2, r0 80168cc: 460b mov r3, r1 80168ce: e9dd 0106 ldrd r0, r1, [sp, #24] 80168d2: f7f2 f8df bl 8008a94 <__aeabi_dcmplt> 80168d6: 2800 cmp r0, #0 80168d8: f43f af14 beq.w 8016704 <_dtoa_r+0x444> 80168dc: 9e13 ldr r6, [sp, #76] @ 0x4c 80168de: 1e73 subs r3, r6, #1 80168e0: 9313 str r3, [sp, #76] @ 0x4c 80168e2: f816 3c01 ldrb.w r3, [r6, #-1] 80168e6: 2b30 cmp r3, #48 @ 0x30 80168e8: d0f8 beq.n 80168dc <_dtoa_r+0x61c> 80168ea: 4647 mov r7, r8 80168ec: e03b b.n 8016966 <_dtoa_r+0x6a6> 80168ee: 4b9e ldr r3, [pc, #632] @ (8016b68 <_dtoa_r+0x8a8>) 80168f0: f7f1 fe5e bl 80085b0 <__aeabi_dmul> 80168f4: e9cd 0106 strd r0, r1, [sp, #24] 80168f8: e7bc b.n 8016874 <_dtoa_r+0x5b4> 80168fa: 4656 mov r6, sl 80168fc: e9dd 4506 ldrd r4, r5, [sp, #24] 8016900: e9dd 2304 ldrd r2, r3, [sp, #16] 8016904: 4620 mov r0, r4 8016906: 4629 mov r1, r5 8016908: f7f1 ff7c bl 8008804 <__aeabi_ddiv> 801690c: f7f2 f900 bl 8008b10 <__aeabi_d2iz> 8016910: 4680 mov r8, r0 8016912: f7f1 fde3 bl 80084dc <__aeabi_i2d> 8016916: e9dd 2304 ldrd r2, r3, [sp, #16] 801691a: f7f1 fe49 bl 80085b0 <__aeabi_dmul> 801691e: 4602 mov r2, r0 8016920: 460b mov r3, r1 8016922: 4620 mov r0, r4 8016924: 4629 mov r1, r5 8016926: f7f1 fc8b bl 8008240 <__aeabi_dsub> 801692a: f108 0430 add.w r4, r8, #48 @ 0x30 801692e: 9d08 ldr r5, [sp, #32] 8016930: f806 4b01 strb.w r4, [r6], #1 8016934: eba6 040a sub.w r4, r6, sl 8016938: 42a5 cmp r5, r4 801693a: 4602 mov r2, r0 801693c: 460b mov r3, r1 801693e: d133 bne.n 80169a8 <_dtoa_r+0x6e8> 8016940: f7f1 fc80 bl 8008244 <__adddf3> 8016944: e9dd 2304 ldrd r2, r3, [sp, #16] 8016948: 4604 mov r4, r0 801694a: 460d mov r5, r1 801694c: f7f2 f8c0 bl 8008ad0 <__aeabi_dcmpgt> 8016950: b9c0 cbnz r0, 8016984 <_dtoa_r+0x6c4> 8016952: e9dd 2304 ldrd r2, r3, [sp, #16] 8016956: 4620 mov r0, r4 8016958: 4629 mov r1, r5 801695a: f7f2 f891 bl 8008a80 <__aeabi_dcmpeq> 801695e: b110 cbz r0, 8016966 <_dtoa_r+0x6a6> 8016960: f018 0f01 tst.w r8, #1 8016964: d10e bne.n 8016984 <_dtoa_r+0x6c4> 8016966: 4648 mov r0, r9 8016968: 9903 ldr r1, [sp, #12] 801696a: f000 fbbb bl 80170e4 <_Bfree> 801696e: 2300 movs r3, #0 8016970: 7033 strb r3, [r6, #0] 8016972: 9b22 ldr r3, [sp, #136] @ 0x88 8016974: 3701 adds r7, #1 8016976: 601f str r7, [r3, #0] 8016978: 9b24 ldr r3, [sp, #144] @ 0x90 801697a: 2b00 cmp r3, #0 801697c: f000 824b beq.w 8016e16 <_dtoa_r+0xb56> 8016980: 601e str r6, [r3, #0] 8016982: e248 b.n 8016e16 <_dtoa_r+0xb56> 8016984: 46b8 mov r8, r7 8016986: 4633 mov r3, r6 8016988: 461e mov r6, r3 801698a: f813 2d01 ldrb.w r2, [r3, #-1]! 801698e: 2a39 cmp r2, #57 @ 0x39 8016990: d106 bne.n 80169a0 <_dtoa_r+0x6e0> 8016992: 459a cmp sl, r3 8016994: d1f8 bne.n 8016988 <_dtoa_r+0x6c8> 8016996: 2230 movs r2, #48 @ 0x30 8016998: f108 0801 add.w r8, r8, #1 801699c: f88a 2000 strb.w r2, [sl] 80169a0: 781a ldrb r2, [r3, #0] 80169a2: 3201 adds r2, #1 80169a4: 701a strb r2, [r3, #0] 80169a6: e7a0 b.n 80168ea <_dtoa_r+0x62a> 80169a8: 2200 movs r2, #0 80169aa: 4b6f ldr r3, [pc, #444] @ (8016b68 <_dtoa_r+0x8a8>) 80169ac: f7f1 fe00 bl 80085b0 <__aeabi_dmul> 80169b0: 2200 movs r2, #0 80169b2: 2300 movs r3, #0 80169b4: 4604 mov r4, r0 80169b6: 460d mov r5, r1 80169b8: f7f2 f862 bl 8008a80 <__aeabi_dcmpeq> 80169bc: 2800 cmp r0, #0 80169be: d09f beq.n 8016900 <_dtoa_r+0x640> 80169c0: e7d1 b.n 8016966 <_dtoa_r+0x6a6> 80169c2: 9a0b ldr r2, [sp, #44] @ 0x2c 80169c4: 2a00 cmp r2, #0 80169c6: f000 80ea beq.w 8016b9e <_dtoa_r+0x8de> 80169ca: 9a20 ldr r2, [sp, #128] @ 0x80 80169cc: 2a01 cmp r2, #1 80169ce: f300 80cd bgt.w 8016b6c <_dtoa_r+0x8ac> 80169d2: 9a12 ldr r2, [sp, #72] @ 0x48 80169d4: 2a00 cmp r2, #0 80169d6: f000 80c1 beq.w 8016b5c <_dtoa_r+0x89c> 80169da: f203 4333 addw r3, r3, #1075 @ 0x433 80169de: 9c0a ldr r4, [sp, #40] @ 0x28 80169e0: 9e04 ldr r6, [sp, #16] 80169e2: 9a04 ldr r2, [sp, #16] 80169e4: 2101 movs r1, #1 80169e6: 441a add r2, r3 80169e8: 9204 str r2, [sp, #16] 80169ea: 9a09 ldr r2, [sp, #36] @ 0x24 80169ec: 4648 mov r0, r9 80169ee: 441a add r2, r3 80169f0: 9209 str r2, [sp, #36] @ 0x24 80169f2: f000 fc2b bl 801724c <__i2b> 80169f6: 4605 mov r5, r0 80169f8: b166 cbz r6, 8016a14 <_dtoa_r+0x754> 80169fa: 9b09 ldr r3, [sp, #36] @ 0x24 80169fc: 2b00 cmp r3, #0 80169fe: dd09 ble.n 8016a14 <_dtoa_r+0x754> 8016a00: 42b3 cmp r3, r6 8016a02: bfa8 it ge 8016a04: 4633 movge r3, r6 8016a06: 9a04 ldr r2, [sp, #16] 8016a08: 1af6 subs r6, r6, r3 8016a0a: 1ad2 subs r2, r2, r3 8016a0c: 9204 str r2, [sp, #16] 8016a0e: 9a09 ldr r2, [sp, #36] @ 0x24 8016a10: 1ad3 subs r3, r2, r3 8016a12: 9309 str r3, [sp, #36] @ 0x24 8016a14: 9b0a ldr r3, [sp, #40] @ 0x28 8016a16: b30b cbz r3, 8016a5c <_dtoa_r+0x79c> 8016a18: 9b0b ldr r3, [sp, #44] @ 0x2c 8016a1a: 2b00 cmp r3, #0 8016a1c: f000 80c6 beq.w 8016bac <_dtoa_r+0x8ec> 8016a20: 2c00 cmp r4, #0 8016a22: f000 80c0 beq.w 8016ba6 <_dtoa_r+0x8e6> 8016a26: 4629 mov r1, r5 8016a28: 4622 mov r2, r4 8016a2a: 4648 mov r0, r9 8016a2c: f000 fcc6 bl 80173bc <__pow5mult> 8016a30: 9a03 ldr r2, [sp, #12] 8016a32: 4601 mov r1, r0 8016a34: 4605 mov r5, r0 8016a36: 4648 mov r0, r9 8016a38: f000 fc1e bl 8017278 <__multiply> 8016a3c: 9903 ldr r1, [sp, #12] 8016a3e: 4680 mov r8, r0 8016a40: 4648 mov r0, r9 8016a42: f000 fb4f bl 80170e4 <_Bfree> 8016a46: 9b0a ldr r3, [sp, #40] @ 0x28 8016a48: 1b1b subs r3, r3, r4 8016a4a: 930a str r3, [sp, #40] @ 0x28 8016a4c: f000 80b1 beq.w 8016bb2 <_dtoa_r+0x8f2> 8016a50: 4641 mov r1, r8 8016a52: 9a0a ldr r2, [sp, #40] @ 0x28 8016a54: 4648 mov r0, r9 8016a56: f000 fcb1 bl 80173bc <__pow5mult> 8016a5a: 9003 str r0, [sp, #12] 8016a5c: 2101 movs r1, #1 8016a5e: 4648 mov r0, r9 8016a60: f000 fbf4 bl 801724c <__i2b> 8016a64: 9b0e ldr r3, [sp, #56] @ 0x38 8016a66: 4604 mov r4, r0 8016a68: 2b00 cmp r3, #0 8016a6a: f000 81d8 beq.w 8016e1e <_dtoa_r+0xb5e> 8016a6e: 461a mov r2, r3 8016a70: 4601 mov r1, r0 8016a72: 4648 mov r0, r9 8016a74: f000 fca2 bl 80173bc <__pow5mult> 8016a78: 9b20 ldr r3, [sp, #128] @ 0x80 8016a7a: 4604 mov r4, r0 8016a7c: 2b01 cmp r3, #1 8016a7e: f300 809f bgt.w 8016bc0 <_dtoa_r+0x900> 8016a82: 9b06 ldr r3, [sp, #24] 8016a84: 2b00 cmp r3, #0 8016a86: f040 8097 bne.w 8016bb8 <_dtoa_r+0x8f8> 8016a8a: 9b07 ldr r3, [sp, #28] 8016a8c: f3c3 0313 ubfx r3, r3, #0, #20 8016a90: 2b00 cmp r3, #0 8016a92: f040 8093 bne.w 8016bbc <_dtoa_r+0x8fc> 8016a96: 9b07 ldr r3, [sp, #28] 8016a98: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 8016a9c: 0d1b lsrs r3, r3, #20 8016a9e: 051b lsls r3, r3, #20 8016aa0: b133 cbz r3, 8016ab0 <_dtoa_r+0x7f0> 8016aa2: 9b04 ldr r3, [sp, #16] 8016aa4: 3301 adds r3, #1 8016aa6: 9304 str r3, [sp, #16] 8016aa8: 9b09 ldr r3, [sp, #36] @ 0x24 8016aaa: 3301 adds r3, #1 8016aac: 9309 str r3, [sp, #36] @ 0x24 8016aae: 2301 movs r3, #1 8016ab0: 930a str r3, [sp, #40] @ 0x28 8016ab2: 9b0e ldr r3, [sp, #56] @ 0x38 8016ab4: 2b00 cmp r3, #0 8016ab6: f000 81b8 beq.w 8016e2a <_dtoa_r+0xb6a> 8016aba: 6923 ldr r3, [r4, #16] 8016abc: eb04 0383 add.w r3, r4, r3, lsl #2 8016ac0: 6918 ldr r0, [r3, #16] 8016ac2: f000 fb77 bl 80171b4 <__hi0bits> 8016ac6: f1c0 0020 rsb r0, r0, #32 8016aca: 9b09 ldr r3, [sp, #36] @ 0x24 8016acc: 4418 add r0, r3 8016ace: f010 001f ands.w r0, r0, #31 8016ad2: f000 8082 beq.w 8016bda <_dtoa_r+0x91a> 8016ad6: f1c0 0320 rsb r3, r0, #32 8016ada: 2b04 cmp r3, #4 8016adc: dd73 ble.n 8016bc6 <_dtoa_r+0x906> 8016ade: 9b04 ldr r3, [sp, #16] 8016ae0: f1c0 001c rsb r0, r0, #28 8016ae4: 4403 add r3, r0 8016ae6: 9304 str r3, [sp, #16] 8016ae8: 9b09 ldr r3, [sp, #36] @ 0x24 8016aea: 4406 add r6, r0 8016aec: 4403 add r3, r0 8016aee: 9309 str r3, [sp, #36] @ 0x24 8016af0: 9b04 ldr r3, [sp, #16] 8016af2: 2b00 cmp r3, #0 8016af4: dd05 ble.n 8016b02 <_dtoa_r+0x842> 8016af6: 461a mov r2, r3 8016af8: 4648 mov r0, r9 8016afa: 9903 ldr r1, [sp, #12] 8016afc: f000 fcb8 bl 8017470 <__lshift> 8016b00: 9003 str r0, [sp, #12] 8016b02: 9b09 ldr r3, [sp, #36] @ 0x24 8016b04: 2b00 cmp r3, #0 8016b06: dd05 ble.n 8016b14 <_dtoa_r+0x854> 8016b08: 4621 mov r1, r4 8016b0a: 461a mov r2, r3 8016b0c: 4648 mov r0, r9 8016b0e: f000 fcaf bl 8017470 <__lshift> 8016b12: 4604 mov r4, r0 8016b14: 9b0f ldr r3, [sp, #60] @ 0x3c 8016b16: 2b00 cmp r3, #0 8016b18: d061 beq.n 8016bde <_dtoa_r+0x91e> 8016b1a: 4621 mov r1, r4 8016b1c: 9803 ldr r0, [sp, #12] 8016b1e: f000 fd13 bl 8017548 <__mcmp> 8016b22: 2800 cmp r0, #0 8016b24: da5b bge.n 8016bde <_dtoa_r+0x91e> 8016b26: 2300 movs r3, #0 8016b28: 220a movs r2, #10 8016b2a: 4648 mov r0, r9 8016b2c: 9903 ldr r1, [sp, #12] 8016b2e: f000 fafb bl 8017128 <__multadd> 8016b32: 9b0b ldr r3, [sp, #44] @ 0x2c 8016b34: f107 38ff add.w r8, r7, #4294967295 8016b38: 9003 str r0, [sp, #12] 8016b3a: 2b00 cmp r3, #0 8016b3c: f000 8177 beq.w 8016e2e <_dtoa_r+0xb6e> 8016b40: 4629 mov r1, r5 8016b42: 2300 movs r3, #0 8016b44: 220a movs r2, #10 8016b46: 4648 mov r0, r9 8016b48: f000 faee bl 8017128 <__multadd> 8016b4c: f1bb 0f00 cmp.w fp, #0 8016b50: 4605 mov r5, r0 8016b52: dc6f bgt.n 8016c34 <_dtoa_r+0x974> 8016b54: 9b20 ldr r3, [sp, #128] @ 0x80 8016b56: 2b02 cmp r3, #2 8016b58: dc49 bgt.n 8016bee <_dtoa_r+0x92e> 8016b5a: e06b b.n 8016c34 <_dtoa_r+0x974> 8016b5c: 9b14 ldr r3, [sp, #80] @ 0x50 8016b5e: f1c3 0336 rsb r3, r3, #54 @ 0x36 8016b62: e73c b.n 80169de <_dtoa_r+0x71e> 8016b64: 3fe00000 .word 0x3fe00000 8016b68: 40240000 .word 0x40240000 8016b6c: 9b08 ldr r3, [sp, #32] 8016b6e: 1e5c subs r4, r3, #1 8016b70: 9b0a ldr r3, [sp, #40] @ 0x28 8016b72: 42a3 cmp r3, r4 8016b74: db09 blt.n 8016b8a <_dtoa_r+0x8ca> 8016b76: 1b1c subs r4, r3, r4 8016b78: 9b08 ldr r3, [sp, #32] 8016b7a: 2b00 cmp r3, #0 8016b7c: f6bf af30 bge.w 80169e0 <_dtoa_r+0x720> 8016b80: 9b04 ldr r3, [sp, #16] 8016b82: 9a08 ldr r2, [sp, #32] 8016b84: 1a9e subs r6, r3, r2 8016b86: 2300 movs r3, #0 8016b88: e72b b.n 80169e2 <_dtoa_r+0x722> 8016b8a: 9b0a ldr r3, [sp, #40] @ 0x28 8016b8c: 9a0e ldr r2, [sp, #56] @ 0x38 8016b8e: 1ae3 subs r3, r4, r3 8016b90: 441a add r2, r3 8016b92: 940a str r4, [sp, #40] @ 0x28 8016b94: 9e04 ldr r6, [sp, #16] 8016b96: 2400 movs r4, #0 8016b98: 9b08 ldr r3, [sp, #32] 8016b9a: 920e str r2, [sp, #56] @ 0x38 8016b9c: e721 b.n 80169e2 <_dtoa_r+0x722> 8016b9e: 9c0a ldr r4, [sp, #40] @ 0x28 8016ba0: 9e04 ldr r6, [sp, #16] 8016ba2: 9d0b ldr r5, [sp, #44] @ 0x2c 8016ba4: e728 b.n 80169f8 <_dtoa_r+0x738> 8016ba6: f8dd 800c ldr.w r8, [sp, #12] 8016baa: e751 b.n 8016a50 <_dtoa_r+0x790> 8016bac: 9a0a ldr r2, [sp, #40] @ 0x28 8016bae: 9903 ldr r1, [sp, #12] 8016bb0: e750 b.n 8016a54 <_dtoa_r+0x794> 8016bb2: f8cd 800c str.w r8, [sp, #12] 8016bb6: e751 b.n 8016a5c <_dtoa_r+0x79c> 8016bb8: 2300 movs r3, #0 8016bba: e779 b.n 8016ab0 <_dtoa_r+0x7f0> 8016bbc: 9b06 ldr r3, [sp, #24] 8016bbe: e777 b.n 8016ab0 <_dtoa_r+0x7f0> 8016bc0: 2300 movs r3, #0 8016bc2: 930a str r3, [sp, #40] @ 0x28 8016bc4: e779 b.n 8016aba <_dtoa_r+0x7fa> 8016bc6: d093 beq.n 8016af0 <_dtoa_r+0x830> 8016bc8: 9a04 ldr r2, [sp, #16] 8016bca: 331c adds r3, #28 8016bcc: 441a add r2, r3 8016bce: 9204 str r2, [sp, #16] 8016bd0: 9a09 ldr r2, [sp, #36] @ 0x24 8016bd2: 441e add r6, r3 8016bd4: 441a add r2, r3 8016bd6: 9209 str r2, [sp, #36] @ 0x24 8016bd8: e78a b.n 8016af0 <_dtoa_r+0x830> 8016bda: 4603 mov r3, r0 8016bdc: e7f4 b.n 8016bc8 <_dtoa_r+0x908> 8016bde: 9b08 ldr r3, [sp, #32] 8016be0: 46b8 mov r8, r7 8016be2: 2b00 cmp r3, #0 8016be4: dc20 bgt.n 8016c28 <_dtoa_r+0x968> 8016be6: 469b mov fp, r3 8016be8: 9b20 ldr r3, [sp, #128] @ 0x80 8016bea: 2b02 cmp r3, #2 8016bec: dd1e ble.n 8016c2c <_dtoa_r+0x96c> 8016bee: f1bb 0f00 cmp.w fp, #0 8016bf2: f47f adb1 bne.w 8016758 <_dtoa_r+0x498> 8016bf6: 4621 mov r1, r4 8016bf8: 465b mov r3, fp 8016bfa: 2205 movs r2, #5 8016bfc: 4648 mov r0, r9 8016bfe: f000 fa93 bl 8017128 <__multadd> 8016c02: 4601 mov r1, r0 8016c04: 4604 mov r4, r0 8016c06: 9803 ldr r0, [sp, #12] 8016c08: f000 fc9e bl 8017548 <__mcmp> 8016c0c: 2800 cmp r0, #0 8016c0e: f77f ada3 ble.w 8016758 <_dtoa_r+0x498> 8016c12: 4656 mov r6, sl 8016c14: 2331 movs r3, #49 @ 0x31 8016c16: f108 0801 add.w r8, r8, #1 8016c1a: f806 3b01 strb.w r3, [r6], #1 8016c1e: e59f b.n 8016760 <_dtoa_r+0x4a0> 8016c20: 46b8 mov r8, r7 8016c22: 9c08 ldr r4, [sp, #32] 8016c24: 4625 mov r5, r4 8016c26: e7f4 b.n 8016c12 <_dtoa_r+0x952> 8016c28: f8dd b020 ldr.w fp, [sp, #32] 8016c2c: 9b0b ldr r3, [sp, #44] @ 0x2c 8016c2e: 2b00 cmp r3, #0 8016c30: f000 8101 beq.w 8016e36 <_dtoa_r+0xb76> 8016c34: 2e00 cmp r6, #0 8016c36: dd05 ble.n 8016c44 <_dtoa_r+0x984> 8016c38: 4629 mov r1, r5 8016c3a: 4632 mov r2, r6 8016c3c: 4648 mov r0, r9 8016c3e: f000 fc17 bl 8017470 <__lshift> 8016c42: 4605 mov r5, r0 8016c44: 9b0a ldr r3, [sp, #40] @ 0x28 8016c46: 2b00 cmp r3, #0 8016c48: d05c beq.n 8016d04 <_dtoa_r+0xa44> 8016c4a: 4648 mov r0, r9 8016c4c: 6869 ldr r1, [r5, #4] 8016c4e: f000 fa09 bl 8017064 <_Balloc> 8016c52: 4606 mov r6, r0 8016c54: b928 cbnz r0, 8016c62 <_dtoa_r+0x9a2> 8016c56: 4602 mov r2, r0 8016c58: f240 21ef movw r1, #751 @ 0x2ef 8016c5c: 4b80 ldr r3, [pc, #512] @ (8016e60 <_dtoa_r+0xba0>) 8016c5e: f7ff bb43 b.w 80162e8 <_dtoa_r+0x28> 8016c62: 692a ldr r2, [r5, #16] 8016c64: f105 010c add.w r1, r5, #12 8016c68: 3202 adds r2, #2 8016c6a: 0092 lsls r2, r2, #2 8016c6c: 300c adds r0, #12 8016c6e: f7ff fa72 bl 8016156 8016c72: 2201 movs r2, #1 8016c74: 4631 mov r1, r6 8016c76: 4648 mov r0, r9 8016c78: f000 fbfa bl 8017470 <__lshift> 8016c7c: 462f mov r7, r5 8016c7e: 4605 mov r5, r0 8016c80: f10a 0301 add.w r3, sl, #1 8016c84: 9304 str r3, [sp, #16] 8016c86: eb0a 030b add.w r3, sl, fp 8016c8a: 930a str r3, [sp, #40] @ 0x28 8016c8c: 9b06 ldr r3, [sp, #24] 8016c8e: f003 0301 and.w r3, r3, #1 8016c92: 9309 str r3, [sp, #36] @ 0x24 8016c94: 9b04 ldr r3, [sp, #16] 8016c96: 4621 mov r1, r4 8016c98: 9803 ldr r0, [sp, #12] 8016c9a: f103 3bff add.w fp, r3, #4294967295 8016c9e: f7ff fa87 bl 80161b0 8016ca2: 4603 mov r3, r0 8016ca4: 4639 mov r1, r7 8016ca6: 3330 adds r3, #48 @ 0x30 8016ca8: 9006 str r0, [sp, #24] 8016caa: 9803 ldr r0, [sp, #12] 8016cac: 930b str r3, [sp, #44] @ 0x2c 8016cae: f000 fc4b bl 8017548 <__mcmp> 8016cb2: 462a mov r2, r5 8016cb4: 9008 str r0, [sp, #32] 8016cb6: 4621 mov r1, r4 8016cb8: 4648 mov r0, r9 8016cba: f000 fc61 bl 8017580 <__mdiff> 8016cbe: 68c2 ldr r2, [r0, #12] 8016cc0: 4606 mov r6, r0 8016cc2: 9b0b ldr r3, [sp, #44] @ 0x2c 8016cc4: bb02 cbnz r2, 8016d08 <_dtoa_r+0xa48> 8016cc6: 4601 mov r1, r0 8016cc8: 9803 ldr r0, [sp, #12] 8016cca: f000 fc3d bl 8017548 <__mcmp> 8016cce: 4602 mov r2, r0 8016cd0: 9b0b ldr r3, [sp, #44] @ 0x2c 8016cd2: 4631 mov r1, r6 8016cd4: 4648 mov r0, r9 8016cd6: e9cd 320b strd r3, r2, [sp, #44] @ 0x2c 8016cda: f000 fa03 bl 80170e4 <_Bfree> 8016cde: 9b20 ldr r3, [sp, #128] @ 0x80 8016ce0: 9a0c ldr r2, [sp, #48] @ 0x30 8016ce2: 9e04 ldr r6, [sp, #16] 8016ce4: ea42 0103 orr.w r1, r2, r3 8016ce8: 9b09 ldr r3, [sp, #36] @ 0x24 8016cea: 4319 orrs r1, r3 8016cec: 9b0b ldr r3, [sp, #44] @ 0x2c 8016cee: d10d bne.n 8016d0c <_dtoa_r+0xa4c> 8016cf0: 2b39 cmp r3, #57 @ 0x39 8016cf2: d027 beq.n 8016d44 <_dtoa_r+0xa84> 8016cf4: 9a08 ldr r2, [sp, #32] 8016cf6: 2a00 cmp r2, #0 8016cf8: dd01 ble.n 8016cfe <_dtoa_r+0xa3e> 8016cfa: 9b06 ldr r3, [sp, #24] 8016cfc: 3331 adds r3, #49 @ 0x31 8016cfe: f88b 3000 strb.w r3, [fp] 8016d02: e52e b.n 8016762 <_dtoa_r+0x4a2> 8016d04: 4628 mov r0, r5 8016d06: e7b9 b.n 8016c7c <_dtoa_r+0x9bc> 8016d08: 2201 movs r2, #1 8016d0a: e7e2 b.n 8016cd2 <_dtoa_r+0xa12> 8016d0c: 9908 ldr r1, [sp, #32] 8016d0e: 2900 cmp r1, #0 8016d10: db04 blt.n 8016d1c <_dtoa_r+0xa5c> 8016d12: 9820 ldr r0, [sp, #128] @ 0x80 8016d14: 4301 orrs r1, r0 8016d16: 9809 ldr r0, [sp, #36] @ 0x24 8016d18: 4301 orrs r1, r0 8016d1a: d120 bne.n 8016d5e <_dtoa_r+0xa9e> 8016d1c: 2a00 cmp r2, #0 8016d1e: ddee ble.n 8016cfe <_dtoa_r+0xa3e> 8016d20: 2201 movs r2, #1 8016d22: 9903 ldr r1, [sp, #12] 8016d24: 4648 mov r0, r9 8016d26: 9304 str r3, [sp, #16] 8016d28: f000 fba2 bl 8017470 <__lshift> 8016d2c: 4621 mov r1, r4 8016d2e: 9003 str r0, [sp, #12] 8016d30: f000 fc0a bl 8017548 <__mcmp> 8016d34: 2800 cmp r0, #0 8016d36: 9b04 ldr r3, [sp, #16] 8016d38: dc02 bgt.n 8016d40 <_dtoa_r+0xa80> 8016d3a: d1e0 bne.n 8016cfe <_dtoa_r+0xa3e> 8016d3c: 07da lsls r2, r3, #31 8016d3e: d5de bpl.n 8016cfe <_dtoa_r+0xa3e> 8016d40: 2b39 cmp r3, #57 @ 0x39 8016d42: d1da bne.n 8016cfa <_dtoa_r+0xa3a> 8016d44: 2339 movs r3, #57 @ 0x39 8016d46: f88b 3000 strb.w r3, [fp] 8016d4a: 4633 mov r3, r6 8016d4c: 461e mov r6, r3 8016d4e: f816 2c01 ldrb.w r2, [r6, #-1] 8016d52: 3b01 subs r3, #1 8016d54: 2a39 cmp r2, #57 @ 0x39 8016d56: d04e beq.n 8016df6 <_dtoa_r+0xb36> 8016d58: 3201 adds r2, #1 8016d5a: 701a strb r2, [r3, #0] 8016d5c: e501 b.n 8016762 <_dtoa_r+0x4a2> 8016d5e: 2a00 cmp r2, #0 8016d60: dd03 ble.n 8016d6a <_dtoa_r+0xaaa> 8016d62: 2b39 cmp r3, #57 @ 0x39 8016d64: d0ee beq.n 8016d44 <_dtoa_r+0xa84> 8016d66: 3301 adds r3, #1 8016d68: e7c9 b.n 8016cfe <_dtoa_r+0xa3e> 8016d6a: 9a04 ldr r2, [sp, #16] 8016d6c: 990a ldr r1, [sp, #40] @ 0x28 8016d6e: f802 3c01 strb.w r3, [r2, #-1] 8016d72: 428a cmp r2, r1 8016d74: d028 beq.n 8016dc8 <_dtoa_r+0xb08> 8016d76: 2300 movs r3, #0 8016d78: 220a movs r2, #10 8016d7a: 9903 ldr r1, [sp, #12] 8016d7c: 4648 mov r0, r9 8016d7e: f000 f9d3 bl 8017128 <__multadd> 8016d82: 42af cmp r7, r5 8016d84: 9003 str r0, [sp, #12] 8016d86: f04f 0300 mov.w r3, #0 8016d8a: f04f 020a mov.w r2, #10 8016d8e: 4639 mov r1, r7 8016d90: 4648 mov r0, r9 8016d92: d107 bne.n 8016da4 <_dtoa_r+0xae4> 8016d94: f000 f9c8 bl 8017128 <__multadd> 8016d98: 4607 mov r7, r0 8016d9a: 4605 mov r5, r0 8016d9c: 9b04 ldr r3, [sp, #16] 8016d9e: 3301 adds r3, #1 8016da0: 9304 str r3, [sp, #16] 8016da2: e777 b.n 8016c94 <_dtoa_r+0x9d4> 8016da4: f000 f9c0 bl 8017128 <__multadd> 8016da8: 4629 mov r1, r5 8016daa: 4607 mov r7, r0 8016dac: 2300 movs r3, #0 8016dae: 220a movs r2, #10 8016db0: 4648 mov r0, r9 8016db2: f000 f9b9 bl 8017128 <__multadd> 8016db6: 4605 mov r5, r0 8016db8: e7f0 b.n 8016d9c <_dtoa_r+0xadc> 8016dba: f1bb 0f00 cmp.w fp, #0 8016dbe: bfcc ite gt 8016dc0: 465e movgt r6, fp 8016dc2: 2601 movle r6, #1 8016dc4: 2700 movs r7, #0 8016dc6: 4456 add r6, sl 8016dc8: 2201 movs r2, #1 8016dca: 9903 ldr r1, [sp, #12] 8016dcc: 4648 mov r0, r9 8016dce: 9304 str r3, [sp, #16] 8016dd0: f000 fb4e bl 8017470 <__lshift> 8016dd4: 4621 mov r1, r4 8016dd6: 9003 str r0, [sp, #12] 8016dd8: f000 fbb6 bl 8017548 <__mcmp> 8016ddc: 2800 cmp r0, #0 8016dde: dcb4 bgt.n 8016d4a <_dtoa_r+0xa8a> 8016de0: d102 bne.n 8016de8 <_dtoa_r+0xb28> 8016de2: 9b04 ldr r3, [sp, #16] 8016de4: 07db lsls r3, r3, #31 8016de6: d4b0 bmi.n 8016d4a <_dtoa_r+0xa8a> 8016de8: 4633 mov r3, r6 8016dea: 461e mov r6, r3 8016dec: f813 2d01 ldrb.w r2, [r3, #-1]! 8016df0: 2a30 cmp r2, #48 @ 0x30 8016df2: d0fa beq.n 8016dea <_dtoa_r+0xb2a> 8016df4: e4b5 b.n 8016762 <_dtoa_r+0x4a2> 8016df6: 459a cmp sl, r3 8016df8: d1a8 bne.n 8016d4c <_dtoa_r+0xa8c> 8016dfa: 2331 movs r3, #49 @ 0x31 8016dfc: f108 0801 add.w r8, r8, #1 8016e00: f88a 3000 strb.w r3, [sl] 8016e04: e4ad b.n 8016762 <_dtoa_r+0x4a2> 8016e06: 9b24 ldr r3, [sp, #144] @ 0x90 8016e08: f8df a058 ldr.w sl, [pc, #88] @ 8016e64 <_dtoa_r+0xba4> 8016e0c: b11b cbz r3, 8016e16 <_dtoa_r+0xb56> 8016e0e: f10a 0308 add.w r3, sl, #8 8016e12: 9a24 ldr r2, [sp, #144] @ 0x90 8016e14: 6013 str r3, [r2, #0] 8016e16: 4650 mov r0, sl 8016e18: b017 add sp, #92 @ 0x5c 8016e1a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8016e1e: 9b20 ldr r3, [sp, #128] @ 0x80 8016e20: 2b01 cmp r3, #1 8016e22: f77f ae2e ble.w 8016a82 <_dtoa_r+0x7c2> 8016e26: 9b0e ldr r3, [sp, #56] @ 0x38 8016e28: 930a str r3, [sp, #40] @ 0x28 8016e2a: 2001 movs r0, #1 8016e2c: e64d b.n 8016aca <_dtoa_r+0x80a> 8016e2e: f1bb 0f00 cmp.w fp, #0 8016e32: f77f aed9 ble.w 8016be8 <_dtoa_r+0x928> 8016e36: 4656 mov r6, sl 8016e38: 4621 mov r1, r4 8016e3a: 9803 ldr r0, [sp, #12] 8016e3c: f7ff f9b8 bl 80161b0 8016e40: f100 0330 add.w r3, r0, #48 @ 0x30 8016e44: f806 3b01 strb.w r3, [r6], #1 8016e48: eba6 020a sub.w r2, r6, sl 8016e4c: 4593 cmp fp, r2 8016e4e: ddb4 ble.n 8016dba <_dtoa_r+0xafa> 8016e50: 2300 movs r3, #0 8016e52: 220a movs r2, #10 8016e54: 4648 mov r0, r9 8016e56: 9903 ldr r1, [sp, #12] 8016e58: f000 f966 bl 8017128 <__multadd> 8016e5c: 9003 str r0, [sp, #12] 8016e5e: e7eb b.n 8016e38 <_dtoa_r+0xb78> 8016e60: 080190cc .word 0x080190cc 8016e64: 08019050 .word 0x08019050 08016e68 <_free_r>: 8016e68: b538 push {r3, r4, r5, lr} 8016e6a: 4605 mov r5, r0 8016e6c: 2900 cmp r1, #0 8016e6e: d040 beq.n 8016ef2 <_free_r+0x8a> 8016e70: f851 3c04 ldr.w r3, [r1, #-4] 8016e74: 1f0c subs r4, r1, #4 8016e76: 2b00 cmp r3, #0 8016e78: bfb8 it lt 8016e7a: 18e4 addlt r4, r4, r3 8016e7c: f000 f8e6 bl 801704c <__malloc_lock> 8016e80: 4a1c ldr r2, [pc, #112] @ (8016ef4 <_free_r+0x8c>) 8016e82: 6813 ldr r3, [r2, #0] 8016e84: b933 cbnz r3, 8016e94 <_free_r+0x2c> 8016e86: 6063 str r3, [r4, #4] 8016e88: 6014 str r4, [r2, #0] 8016e8a: 4628 mov r0, r5 8016e8c: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8016e90: f000 b8e2 b.w 8017058 <__malloc_unlock> 8016e94: 42a3 cmp r3, r4 8016e96: d908 bls.n 8016eaa <_free_r+0x42> 8016e98: 6820 ldr r0, [r4, #0] 8016e9a: 1821 adds r1, r4, r0 8016e9c: 428b cmp r3, r1 8016e9e: bf01 itttt eq 8016ea0: 6819 ldreq r1, [r3, #0] 8016ea2: 685b ldreq r3, [r3, #4] 8016ea4: 1809 addeq r1, r1, r0 8016ea6: 6021 streq r1, [r4, #0] 8016ea8: e7ed b.n 8016e86 <_free_r+0x1e> 8016eaa: 461a mov r2, r3 8016eac: 685b ldr r3, [r3, #4] 8016eae: b10b cbz r3, 8016eb4 <_free_r+0x4c> 8016eb0: 42a3 cmp r3, r4 8016eb2: d9fa bls.n 8016eaa <_free_r+0x42> 8016eb4: 6811 ldr r1, [r2, #0] 8016eb6: 1850 adds r0, r2, r1 8016eb8: 42a0 cmp r0, r4 8016eba: d10b bne.n 8016ed4 <_free_r+0x6c> 8016ebc: 6820 ldr r0, [r4, #0] 8016ebe: 4401 add r1, r0 8016ec0: 1850 adds r0, r2, r1 8016ec2: 4283 cmp r3, r0 8016ec4: 6011 str r1, [r2, #0] 8016ec6: d1e0 bne.n 8016e8a <_free_r+0x22> 8016ec8: 6818 ldr r0, [r3, #0] 8016eca: 685b ldr r3, [r3, #4] 8016ecc: 4408 add r0, r1 8016ece: 6010 str r0, [r2, #0] 8016ed0: 6053 str r3, [r2, #4] 8016ed2: e7da b.n 8016e8a <_free_r+0x22> 8016ed4: d902 bls.n 8016edc <_free_r+0x74> 8016ed6: 230c movs r3, #12 8016ed8: 602b str r3, [r5, #0] 8016eda: e7d6 b.n 8016e8a <_free_r+0x22> 8016edc: 6820 ldr r0, [r4, #0] 8016ede: 1821 adds r1, r4, r0 8016ee0: 428b cmp r3, r1 8016ee2: bf01 itttt eq 8016ee4: 6819 ldreq r1, [r3, #0] 8016ee6: 685b ldreq r3, [r3, #4] 8016ee8: 1809 addeq r1, r1, r0 8016eea: 6021 streq r1, [r4, #0] 8016eec: 6063 str r3, [r4, #4] 8016eee: 6054 str r4, [r2, #4] 8016ef0: e7cb b.n 8016e8a <_free_r+0x22> 8016ef2: bd38 pop {r3, r4, r5, pc} 8016ef4: 20001614 .word 0x20001614 08016ef8 : 8016ef8: 4b02 ldr r3, [pc, #8] @ (8016f04 ) 8016efa: 4601 mov r1, r0 8016efc: 6818 ldr r0, [r3, #0] 8016efe: f000 b825 b.w 8016f4c <_malloc_r> 8016f02: bf00 nop 8016f04: 2000009c .word 0x2000009c 08016f08 : 8016f08: b570 push {r4, r5, r6, lr} 8016f0a: 4e0f ldr r6, [pc, #60] @ (8016f48 ) 8016f0c: 460c mov r4, r1 8016f0e: 6831 ldr r1, [r6, #0] 8016f10: 4605 mov r5, r0 8016f12: b911 cbnz r1, 8016f1a 8016f14: f000 fe4c bl 8017bb0 <_sbrk_r> 8016f18: 6030 str r0, [r6, #0] 8016f1a: 4621 mov r1, r4 8016f1c: 4628 mov r0, r5 8016f1e: f000 fe47 bl 8017bb0 <_sbrk_r> 8016f22: 1c43 adds r3, r0, #1 8016f24: d103 bne.n 8016f2e 8016f26: f04f 34ff mov.w r4, #4294967295 8016f2a: 4620 mov r0, r4 8016f2c: bd70 pop {r4, r5, r6, pc} 8016f2e: 1cc4 adds r4, r0, #3 8016f30: f024 0403 bic.w r4, r4, #3 8016f34: 42a0 cmp r0, r4 8016f36: d0f8 beq.n 8016f2a 8016f38: 1a21 subs r1, r4, r0 8016f3a: 4628 mov r0, r5 8016f3c: f000 fe38 bl 8017bb0 <_sbrk_r> 8016f40: 3001 adds r0, #1 8016f42: d1f2 bne.n 8016f2a 8016f44: e7ef b.n 8016f26 8016f46: bf00 nop 8016f48: 20001610 .word 0x20001610 08016f4c <_malloc_r>: 8016f4c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8016f50: 1ccd adds r5, r1, #3 8016f52: f025 0503 bic.w r5, r5, #3 8016f56: 3508 adds r5, #8 8016f58: 2d0c cmp r5, #12 8016f5a: bf38 it cc 8016f5c: 250c movcc r5, #12 8016f5e: 2d00 cmp r5, #0 8016f60: 4606 mov r6, r0 8016f62: db01 blt.n 8016f68 <_malloc_r+0x1c> 8016f64: 42a9 cmp r1, r5 8016f66: d904 bls.n 8016f72 <_malloc_r+0x26> 8016f68: 230c movs r3, #12 8016f6a: 6033 str r3, [r6, #0] 8016f6c: 2000 movs r0, #0 8016f6e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8016f72: f8df 80d4 ldr.w r8, [pc, #212] @ 8017048 <_malloc_r+0xfc> 8016f76: f000 f869 bl 801704c <__malloc_lock> 8016f7a: f8d8 3000 ldr.w r3, [r8] 8016f7e: 461c mov r4, r3 8016f80: bb44 cbnz r4, 8016fd4 <_malloc_r+0x88> 8016f82: 4629 mov r1, r5 8016f84: 4630 mov r0, r6 8016f86: f7ff ffbf bl 8016f08 8016f8a: 1c43 adds r3, r0, #1 8016f8c: 4604 mov r4, r0 8016f8e: d158 bne.n 8017042 <_malloc_r+0xf6> 8016f90: f8d8 4000 ldr.w r4, [r8] 8016f94: 4627 mov r7, r4 8016f96: 2f00 cmp r7, #0 8016f98: d143 bne.n 8017022 <_malloc_r+0xd6> 8016f9a: 2c00 cmp r4, #0 8016f9c: d04b beq.n 8017036 <_malloc_r+0xea> 8016f9e: 6823 ldr r3, [r4, #0] 8016fa0: 4639 mov r1, r7 8016fa2: 4630 mov r0, r6 8016fa4: eb04 0903 add.w r9, r4, r3 8016fa8: f000 fe02 bl 8017bb0 <_sbrk_r> 8016fac: 4581 cmp r9, r0 8016fae: d142 bne.n 8017036 <_malloc_r+0xea> 8016fb0: 6821 ldr r1, [r4, #0] 8016fb2: 4630 mov r0, r6 8016fb4: 1a6d subs r5, r5, r1 8016fb6: 4629 mov r1, r5 8016fb8: f7ff ffa6 bl 8016f08 8016fbc: 3001 adds r0, #1 8016fbe: d03a beq.n 8017036 <_malloc_r+0xea> 8016fc0: 6823 ldr r3, [r4, #0] 8016fc2: 442b add r3, r5 8016fc4: 6023 str r3, [r4, #0] 8016fc6: f8d8 3000 ldr.w r3, [r8] 8016fca: 685a ldr r2, [r3, #4] 8016fcc: bb62 cbnz r2, 8017028 <_malloc_r+0xdc> 8016fce: f8c8 7000 str.w r7, [r8] 8016fd2: e00f b.n 8016ff4 <_malloc_r+0xa8> 8016fd4: 6822 ldr r2, [r4, #0] 8016fd6: 1b52 subs r2, r2, r5 8016fd8: d420 bmi.n 801701c <_malloc_r+0xd0> 8016fda: 2a0b cmp r2, #11 8016fdc: d917 bls.n 801700e <_malloc_r+0xc2> 8016fde: 1961 adds r1, r4, r5 8016fe0: 42a3 cmp r3, r4 8016fe2: 6025 str r5, [r4, #0] 8016fe4: bf18 it ne 8016fe6: 6059 strne r1, [r3, #4] 8016fe8: 6863 ldr r3, [r4, #4] 8016fea: bf08 it eq 8016fec: f8c8 1000 streq.w r1, [r8] 8016ff0: 5162 str r2, [r4, r5] 8016ff2: 604b str r3, [r1, #4] 8016ff4: 4630 mov r0, r6 8016ff6: f000 f82f bl 8017058 <__malloc_unlock> 8016ffa: f104 000b add.w r0, r4, #11 8016ffe: 1d23 adds r3, r4, #4 8017000: f020 0007 bic.w r0, r0, #7 8017004: 1ac2 subs r2, r0, r3 8017006: bf1c itt ne 8017008: 1a1b subne r3, r3, r0 801700a: 50a3 strne r3, [r4, r2] 801700c: e7af b.n 8016f6e <_malloc_r+0x22> 801700e: 6862 ldr r2, [r4, #4] 8017010: 42a3 cmp r3, r4 8017012: bf0c ite eq 8017014: f8c8 2000 streq.w r2, [r8] 8017018: 605a strne r2, [r3, #4] 801701a: e7eb b.n 8016ff4 <_malloc_r+0xa8> 801701c: 4623 mov r3, r4 801701e: 6864 ldr r4, [r4, #4] 8017020: e7ae b.n 8016f80 <_malloc_r+0x34> 8017022: 463c mov r4, r7 8017024: 687f ldr r7, [r7, #4] 8017026: e7b6 b.n 8016f96 <_malloc_r+0x4a> 8017028: 461a mov r2, r3 801702a: 685b ldr r3, [r3, #4] 801702c: 42a3 cmp r3, r4 801702e: d1fb bne.n 8017028 <_malloc_r+0xdc> 8017030: 2300 movs r3, #0 8017032: 6053 str r3, [r2, #4] 8017034: e7de b.n 8016ff4 <_malloc_r+0xa8> 8017036: 230c movs r3, #12 8017038: 4630 mov r0, r6 801703a: 6033 str r3, [r6, #0] 801703c: f000 f80c bl 8017058 <__malloc_unlock> 8017040: e794 b.n 8016f6c <_malloc_r+0x20> 8017042: 6005 str r5, [r0, #0] 8017044: e7d6 b.n 8016ff4 <_malloc_r+0xa8> 8017046: bf00 nop 8017048: 20001614 .word 0x20001614 0801704c <__malloc_lock>: 801704c: 4801 ldr r0, [pc, #4] @ (8017054 <__malloc_lock+0x8>) 801704e: f7ff b872 b.w 8016136 <__retarget_lock_acquire_recursive> 8017052: bf00 nop 8017054: 2000160c .word 0x2000160c 08017058 <__malloc_unlock>: 8017058: 4801 ldr r0, [pc, #4] @ (8017060 <__malloc_unlock+0x8>) 801705a: f7ff b86d b.w 8016138 <__retarget_lock_release_recursive> 801705e: bf00 nop 8017060: 2000160c .word 0x2000160c 08017064 <_Balloc>: 8017064: b570 push {r4, r5, r6, lr} 8017066: 69c6 ldr r6, [r0, #28] 8017068: 4604 mov r4, r0 801706a: 460d mov r5, r1 801706c: b976 cbnz r6, 801708c <_Balloc+0x28> 801706e: 2010 movs r0, #16 8017070: f7ff ff42 bl 8016ef8 8017074: 4602 mov r2, r0 8017076: 61e0 str r0, [r4, #28] 8017078: b920 cbnz r0, 8017084 <_Balloc+0x20> 801707a: 216b movs r1, #107 @ 0x6b 801707c: 4b17 ldr r3, [pc, #92] @ (80170dc <_Balloc+0x78>) 801707e: 4818 ldr r0, [pc, #96] @ (80170e0 <_Balloc+0x7c>) 8017080: f7ff f878 bl 8016174 <__assert_func> 8017084: e9c0 6601 strd r6, r6, [r0, #4] 8017088: 6006 str r6, [r0, #0] 801708a: 60c6 str r6, [r0, #12] 801708c: 69e6 ldr r6, [r4, #28] 801708e: 68f3 ldr r3, [r6, #12] 8017090: b183 cbz r3, 80170b4 <_Balloc+0x50> 8017092: 69e3 ldr r3, [r4, #28] 8017094: 68db ldr r3, [r3, #12] 8017096: f853 0025 ldr.w r0, [r3, r5, lsl #2] 801709a: b9b8 cbnz r0, 80170cc <_Balloc+0x68> 801709c: 2101 movs r1, #1 801709e: fa01 f605 lsl.w r6, r1, r5 80170a2: 1d72 adds r2, r6, #5 80170a4: 4620 mov r0, r4 80170a6: 0092 lsls r2, r2, #2 80170a8: f000 fd99 bl 8017bde <_calloc_r> 80170ac: b160 cbz r0, 80170c8 <_Balloc+0x64> 80170ae: e9c0 5601 strd r5, r6, [r0, #4] 80170b2: e00e b.n 80170d2 <_Balloc+0x6e> 80170b4: 2221 movs r2, #33 @ 0x21 80170b6: 2104 movs r1, #4 80170b8: 4620 mov r0, r4 80170ba: f000 fd90 bl 8017bde <_calloc_r> 80170be: 69e3 ldr r3, [r4, #28] 80170c0: 60f0 str r0, [r6, #12] 80170c2: 68db ldr r3, [r3, #12] 80170c4: 2b00 cmp r3, #0 80170c6: d1e4 bne.n 8017092 <_Balloc+0x2e> 80170c8: 2000 movs r0, #0 80170ca: bd70 pop {r4, r5, r6, pc} 80170cc: 6802 ldr r2, [r0, #0] 80170ce: f843 2025 str.w r2, [r3, r5, lsl #2] 80170d2: 2300 movs r3, #0 80170d4: e9c0 3303 strd r3, r3, [r0, #12] 80170d8: e7f7 b.n 80170ca <_Balloc+0x66> 80170da: bf00 nop 80170dc: 0801905d .word 0x0801905d 80170e0: 080190dd .word 0x080190dd 080170e4 <_Bfree>: 80170e4: b570 push {r4, r5, r6, lr} 80170e6: 69c6 ldr r6, [r0, #28] 80170e8: 4605 mov r5, r0 80170ea: 460c mov r4, r1 80170ec: b976 cbnz r6, 801710c <_Bfree+0x28> 80170ee: 2010 movs r0, #16 80170f0: f7ff ff02 bl 8016ef8 80170f4: 4602 mov r2, r0 80170f6: 61e8 str r0, [r5, #28] 80170f8: b920 cbnz r0, 8017104 <_Bfree+0x20> 80170fa: 218f movs r1, #143 @ 0x8f 80170fc: 4b08 ldr r3, [pc, #32] @ (8017120 <_Bfree+0x3c>) 80170fe: 4809 ldr r0, [pc, #36] @ (8017124 <_Bfree+0x40>) 8017100: f7ff f838 bl 8016174 <__assert_func> 8017104: e9c0 6601 strd r6, r6, [r0, #4] 8017108: 6006 str r6, [r0, #0] 801710a: 60c6 str r6, [r0, #12] 801710c: b13c cbz r4, 801711e <_Bfree+0x3a> 801710e: 69eb ldr r3, [r5, #28] 8017110: 6862 ldr r2, [r4, #4] 8017112: 68db ldr r3, [r3, #12] 8017114: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8017118: 6021 str r1, [r4, #0] 801711a: f843 4022 str.w r4, [r3, r2, lsl #2] 801711e: bd70 pop {r4, r5, r6, pc} 8017120: 0801905d .word 0x0801905d 8017124: 080190dd .word 0x080190dd 08017128 <__multadd>: 8017128: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 801712c: 4607 mov r7, r0 801712e: 460c mov r4, r1 8017130: 461e mov r6, r3 8017132: 2000 movs r0, #0 8017134: 690d ldr r5, [r1, #16] 8017136: f101 0c14 add.w ip, r1, #20 801713a: f8dc 3000 ldr.w r3, [ip] 801713e: 3001 adds r0, #1 8017140: b299 uxth r1, r3 8017142: fb02 6101 mla r1, r2, r1, r6 8017146: 0c1e lsrs r6, r3, #16 8017148: 0c0b lsrs r3, r1, #16 801714a: fb02 3306 mla r3, r2, r6, r3 801714e: b289 uxth r1, r1 8017150: eb01 4103 add.w r1, r1, r3, lsl #16 8017154: 4285 cmp r5, r0 8017156: ea4f 4613 mov.w r6, r3, lsr #16 801715a: f84c 1b04 str.w r1, [ip], #4 801715e: dcec bgt.n 801713a <__multadd+0x12> 8017160: b30e cbz r6, 80171a6 <__multadd+0x7e> 8017162: 68a3 ldr r3, [r4, #8] 8017164: 42ab cmp r3, r5 8017166: dc19 bgt.n 801719c <__multadd+0x74> 8017168: 6861 ldr r1, [r4, #4] 801716a: 4638 mov r0, r7 801716c: 3101 adds r1, #1 801716e: f7ff ff79 bl 8017064 <_Balloc> 8017172: 4680 mov r8, r0 8017174: b928 cbnz r0, 8017182 <__multadd+0x5a> 8017176: 4602 mov r2, r0 8017178: 21ba movs r1, #186 @ 0xba 801717a: 4b0c ldr r3, [pc, #48] @ (80171ac <__multadd+0x84>) 801717c: 480c ldr r0, [pc, #48] @ (80171b0 <__multadd+0x88>) 801717e: f7fe fff9 bl 8016174 <__assert_func> 8017182: 6922 ldr r2, [r4, #16] 8017184: f104 010c add.w r1, r4, #12 8017188: 3202 adds r2, #2 801718a: 0092 lsls r2, r2, #2 801718c: 300c adds r0, #12 801718e: f7fe ffe2 bl 8016156 8017192: 4621 mov r1, r4 8017194: 4638 mov r0, r7 8017196: f7ff ffa5 bl 80170e4 <_Bfree> 801719a: 4644 mov r4, r8 801719c: eb04 0385 add.w r3, r4, r5, lsl #2 80171a0: 3501 adds r5, #1 80171a2: 615e str r6, [r3, #20] 80171a4: 6125 str r5, [r4, #16] 80171a6: 4620 mov r0, r4 80171a8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80171ac: 080190cc .word 0x080190cc 80171b0: 080190dd .word 0x080190dd 080171b4 <__hi0bits>: 80171b4: 4603 mov r3, r0 80171b6: f5b0 3f80 cmp.w r0, #65536 @ 0x10000 80171ba: bf3a itte cc 80171bc: 0403 lslcc r3, r0, #16 80171be: 2010 movcc r0, #16 80171c0: 2000 movcs r0, #0 80171c2: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 80171c6: bf3c itt cc 80171c8: 021b lslcc r3, r3, #8 80171ca: 3008 addcc r0, #8 80171cc: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000 80171d0: bf3c itt cc 80171d2: 011b lslcc r3, r3, #4 80171d4: 3004 addcc r0, #4 80171d6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80171da: bf3c itt cc 80171dc: 009b lslcc r3, r3, #2 80171de: 3002 addcc r0, #2 80171e0: 2b00 cmp r3, #0 80171e2: db05 blt.n 80171f0 <__hi0bits+0x3c> 80171e4: f013 4f80 tst.w r3, #1073741824 @ 0x40000000 80171e8: f100 0001 add.w r0, r0, #1 80171ec: bf08 it eq 80171ee: 2020 moveq r0, #32 80171f0: 4770 bx lr 080171f2 <__lo0bits>: 80171f2: 6803 ldr r3, [r0, #0] 80171f4: 4602 mov r2, r0 80171f6: f013 0007 ands.w r0, r3, #7 80171fa: d00b beq.n 8017214 <__lo0bits+0x22> 80171fc: 07d9 lsls r1, r3, #31 80171fe: d421 bmi.n 8017244 <__lo0bits+0x52> 8017200: 0798 lsls r0, r3, #30 8017202: bf49 itett mi 8017204: 085b lsrmi r3, r3, #1 8017206: 089b lsrpl r3, r3, #2 8017208: 2001 movmi r0, #1 801720a: 6013 strmi r3, [r2, #0] 801720c: bf5c itt pl 801720e: 2002 movpl r0, #2 8017210: 6013 strpl r3, [r2, #0] 8017212: 4770 bx lr 8017214: b299 uxth r1, r3 8017216: b909 cbnz r1, 801721c <__lo0bits+0x2a> 8017218: 2010 movs r0, #16 801721a: 0c1b lsrs r3, r3, #16 801721c: b2d9 uxtb r1, r3 801721e: b909 cbnz r1, 8017224 <__lo0bits+0x32> 8017220: 3008 adds r0, #8 8017222: 0a1b lsrs r3, r3, #8 8017224: 0719 lsls r1, r3, #28 8017226: bf04 itt eq 8017228: 091b lsreq r3, r3, #4 801722a: 3004 addeq r0, #4 801722c: 0799 lsls r1, r3, #30 801722e: bf04 itt eq 8017230: 089b lsreq r3, r3, #2 8017232: 3002 addeq r0, #2 8017234: 07d9 lsls r1, r3, #31 8017236: d403 bmi.n 8017240 <__lo0bits+0x4e> 8017238: 085b lsrs r3, r3, #1 801723a: f100 0001 add.w r0, r0, #1 801723e: d003 beq.n 8017248 <__lo0bits+0x56> 8017240: 6013 str r3, [r2, #0] 8017242: 4770 bx lr 8017244: 2000 movs r0, #0 8017246: 4770 bx lr 8017248: 2020 movs r0, #32 801724a: 4770 bx lr 0801724c <__i2b>: 801724c: b510 push {r4, lr} 801724e: 460c mov r4, r1 8017250: 2101 movs r1, #1 8017252: f7ff ff07 bl 8017064 <_Balloc> 8017256: 4602 mov r2, r0 8017258: b928 cbnz r0, 8017266 <__i2b+0x1a> 801725a: f240 1145 movw r1, #325 @ 0x145 801725e: 4b04 ldr r3, [pc, #16] @ (8017270 <__i2b+0x24>) 8017260: 4804 ldr r0, [pc, #16] @ (8017274 <__i2b+0x28>) 8017262: f7fe ff87 bl 8016174 <__assert_func> 8017266: 2301 movs r3, #1 8017268: 6144 str r4, [r0, #20] 801726a: 6103 str r3, [r0, #16] 801726c: bd10 pop {r4, pc} 801726e: bf00 nop 8017270: 080190cc .word 0x080190cc 8017274: 080190dd .word 0x080190dd 08017278 <__multiply>: 8017278: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 801727c: 4617 mov r7, r2 801727e: 690a ldr r2, [r1, #16] 8017280: 693b ldr r3, [r7, #16] 8017282: 4689 mov r9, r1 8017284: 429a cmp r2, r3 8017286: bfa2 ittt ge 8017288: 463b movge r3, r7 801728a: 460f movge r7, r1 801728c: 4699 movge r9, r3 801728e: 693d ldr r5, [r7, #16] 8017290: f8d9 a010 ldr.w sl, [r9, #16] 8017294: 68bb ldr r3, [r7, #8] 8017296: 6879 ldr r1, [r7, #4] 8017298: eb05 060a add.w r6, r5, sl 801729c: 42b3 cmp r3, r6 801729e: b085 sub sp, #20 80172a0: bfb8 it lt 80172a2: 3101 addlt r1, #1 80172a4: f7ff fede bl 8017064 <_Balloc> 80172a8: b930 cbnz r0, 80172b8 <__multiply+0x40> 80172aa: 4602 mov r2, r0 80172ac: f44f 71b1 mov.w r1, #354 @ 0x162 80172b0: 4b40 ldr r3, [pc, #256] @ (80173b4 <__multiply+0x13c>) 80172b2: 4841 ldr r0, [pc, #260] @ (80173b8 <__multiply+0x140>) 80172b4: f7fe ff5e bl 8016174 <__assert_func> 80172b8: f100 0414 add.w r4, r0, #20 80172bc: 4623 mov r3, r4 80172be: 2200 movs r2, #0 80172c0: eb04 0e86 add.w lr, r4, r6, lsl #2 80172c4: 4573 cmp r3, lr 80172c6: d320 bcc.n 801730a <__multiply+0x92> 80172c8: f107 0814 add.w r8, r7, #20 80172cc: f109 0114 add.w r1, r9, #20 80172d0: eb08 0585 add.w r5, r8, r5, lsl #2 80172d4: eb01 038a add.w r3, r1, sl, lsl #2 80172d8: 9302 str r3, [sp, #8] 80172da: 1beb subs r3, r5, r7 80172dc: 3b15 subs r3, #21 80172de: f023 0303 bic.w r3, r3, #3 80172e2: 3304 adds r3, #4 80172e4: 3715 adds r7, #21 80172e6: 42bd cmp r5, r7 80172e8: bf38 it cc 80172ea: 2304 movcc r3, #4 80172ec: 9301 str r3, [sp, #4] 80172ee: 9b02 ldr r3, [sp, #8] 80172f0: 9103 str r1, [sp, #12] 80172f2: 428b cmp r3, r1 80172f4: d80c bhi.n 8017310 <__multiply+0x98> 80172f6: 2e00 cmp r6, #0 80172f8: dd03 ble.n 8017302 <__multiply+0x8a> 80172fa: f85e 3d04 ldr.w r3, [lr, #-4]! 80172fe: 2b00 cmp r3, #0 8017300: d055 beq.n 80173ae <__multiply+0x136> 8017302: 6106 str r6, [r0, #16] 8017304: b005 add sp, #20 8017306: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 801730a: f843 2b04 str.w r2, [r3], #4 801730e: e7d9 b.n 80172c4 <__multiply+0x4c> 8017310: f8b1 a000 ldrh.w sl, [r1] 8017314: f1ba 0f00 cmp.w sl, #0 8017318: d01f beq.n 801735a <__multiply+0xe2> 801731a: 46c4 mov ip, r8 801731c: 46a1 mov r9, r4 801731e: 2700 movs r7, #0 8017320: f85c 2b04 ldr.w r2, [ip], #4 8017324: f8d9 3000 ldr.w r3, [r9] 8017328: fa1f fb82 uxth.w fp, r2 801732c: b29b uxth r3, r3 801732e: fb0a 330b mla r3, sl, fp, r3 8017332: 443b add r3, r7 8017334: f8d9 7000 ldr.w r7, [r9] 8017338: 0c12 lsrs r2, r2, #16 801733a: 0c3f lsrs r7, r7, #16 801733c: fb0a 7202 mla r2, sl, r2, r7 8017340: eb02 4213 add.w r2, r2, r3, lsr #16 8017344: b29b uxth r3, r3 8017346: ea43 4302 orr.w r3, r3, r2, lsl #16 801734a: 4565 cmp r5, ip 801734c: ea4f 4712 mov.w r7, r2, lsr #16 8017350: f849 3b04 str.w r3, [r9], #4 8017354: d8e4 bhi.n 8017320 <__multiply+0xa8> 8017356: 9b01 ldr r3, [sp, #4] 8017358: 50e7 str r7, [r4, r3] 801735a: 9b03 ldr r3, [sp, #12] 801735c: 3104 adds r1, #4 801735e: f8b3 9002 ldrh.w r9, [r3, #2] 8017362: f1b9 0f00 cmp.w r9, #0 8017366: d020 beq.n 80173aa <__multiply+0x132> 8017368: 4647 mov r7, r8 801736a: 46a4 mov ip, r4 801736c: f04f 0a00 mov.w sl, #0 8017370: 6823 ldr r3, [r4, #0] 8017372: f8b7 b000 ldrh.w fp, [r7] 8017376: f8bc 2002 ldrh.w r2, [ip, #2] 801737a: b29b uxth r3, r3 801737c: fb09 220b mla r2, r9, fp, r2 8017380: 4452 add r2, sl 8017382: ea43 4302 orr.w r3, r3, r2, lsl #16 8017386: f84c 3b04 str.w r3, [ip], #4 801738a: f857 3b04 ldr.w r3, [r7], #4 801738e: ea4f 4a13 mov.w sl, r3, lsr #16 8017392: f8bc 3000 ldrh.w r3, [ip] 8017396: 42bd cmp r5, r7 8017398: fb09 330a mla r3, r9, sl, r3 801739c: eb03 4312 add.w r3, r3, r2, lsr #16 80173a0: ea4f 4a13 mov.w sl, r3, lsr #16 80173a4: d8e5 bhi.n 8017372 <__multiply+0xfa> 80173a6: 9a01 ldr r2, [sp, #4] 80173a8: 50a3 str r3, [r4, r2] 80173aa: 3404 adds r4, #4 80173ac: e79f b.n 80172ee <__multiply+0x76> 80173ae: 3e01 subs r6, #1 80173b0: e7a1 b.n 80172f6 <__multiply+0x7e> 80173b2: bf00 nop 80173b4: 080190cc .word 0x080190cc 80173b8: 080190dd .word 0x080190dd 080173bc <__pow5mult>: 80173bc: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80173c0: 4615 mov r5, r2 80173c2: f012 0203 ands.w r2, r2, #3 80173c6: 4607 mov r7, r0 80173c8: 460e mov r6, r1 80173ca: d007 beq.n 80173dc <__pow5mult+0x20> 80173cc: 4c25 ldr r4, [pc, #148] @ (8017464 <__pow5mult+0xa8>) 80173ce: 3a01 subs r2, #1 80173d0: 2300 movs r3, #0 80173d2: f854 2022 ldr.w r2, [r4, r2, lsl #2] 80173d6: f7ff fea7 bl 8017128 <__multadd> 80173da: 4606 mov r6, r0 80173dc: 10ad asrs r5, r5, #2 80173de: d03d beq.n 801745c <__pow5mult+0xa0> 80173e0: 69fc ldr r4, [r7, #28] 80173e2: b97c cbnz r4, 8017404 <__pow5mult+0x48> 80173e4: 2010 movs r0, #16 80173e6: f7ff fd87 bl 8016ef8 80173ea: 4602 mov r2, r0 80173ec: 61f8 str r0, [r7, #28] 80173ee: b928 cbnz r0, 80173fc <__pow5mult+0x40> 80173f0: f240 11b3 movw r1, #435 @ 0x1b3 80173f4: 4b1c ldr r3, [pc, #112] @ (8017468 <__pow5mult+0xac>) 80173f6: 481d ldr r0, [pc, #116] @ (801746c <__pow5mult+0xb0>) 80173f8: f7fe febc bl 8016174 <__assert_func> 80173fc: e9c0 4401 strd r4, r4, [r0, #4] 8017400: 6004 str r4, [r0, #0] 8017402: 60c4 str r4, [r0, #12] 8017404: f8d7 801c ldr.w r8, [r7, #28] 8017408: f8d8 4008 ldr.w r4, [r8, #8] 801740c: b94c cbnz r4, 8017422 <__pow5mult+0x66> 801740e: f240 2171 movw r1, #625 @ 0x271 8017412: 4638 mov r0, r7 8017414: f7ff ff1a bl 801724c <__i2b> 8017418: 2300 movs r3, #0 801741a: 4604 mov r4, r0 801741c: f8c8 0008 str.w r0, [r8, #8] 8017420: 6003 str r3, [r0, #0] 8017422: f04f 0900 mov.w r9, #0 8017426: 07eb lsls r3, r5, #31 8017428: d50a bpl.n 8017440 <__pow5mult+0x84> 801742a: 4631 mov r1, r6 801742c: 4622 mov r2, r4 801742e: 4638 mov r0, r7 8017430: f7ff ff22 bl 8017278 <__multiply> 8017434: 4680 mov r8, r0 8017436: 4631 mov r1, r6 8017438: 4638 mov r0, r7 801743a: f7ff fe53 bl 80170e4 <_Bfree> 801743e: 4646 mov r6, r8 8017440: 106d asrs r5, r5, #1 8017442: d00b beq.n 801745c <__pow5mult+0xa0> 8017444: 6820 ldr r0, [r4, #0] 8017446: b938 cbnz r0, 8017458 <__pow5mult+0x9c> 8017448: 4622 mov r2, r4 801744a: 4621 mov r1, r4 801744c: 4638 mov r0, r7 801744e: f7ff ff13 bl 8017278 <__multiply> 8017452: 6020 str r0, [r4, #0] 8017454: f8c0 9000 str.w r9, [r0] 8017458: 4604 mov r4, r0 801745a: e7e4 b.n 8017426 <__pow5mult+0x6a> 801745c: 4630 mov r0, r6 801745e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8017462: bf00 nop 8017464: 08019154 .word 0x08019154 8017468: 0801905d .word 0x0801905d 801746c: 080190dd .word 0x080190dd 08017470 <__lshift>: 8017470: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8017474: 460c mov r4, r1 8017476: 4607 mov r7, r0 8017478: 4691 mov r9, r2 801747a: 6923 ldr r3, [r4, #16] 801747c: 6849 ldr r1, [r1, #4] 801747e: eb03 1862 add.w r8, r3, r2, asr #5 8017482: 68a3 ldr r3, [r4, #8] 8017484: ea4f 1a62 mov.w sl, r2, asr #5 8017488: f108 0601 add.w r6, r8, #1 801748c: 42b3 cmp r3, r6 801748e: db0b blt.n 80174a8 <__lshift+0x38> 8017490: 4638 mov r0, r7 8017492: f7ff fde7 bl 8017064 <_Balloc> 8017496: 4605 mov r5, r0 8017498: b948 cbnz r0, 80174ae <__lshift+0x3e> 801749a: 4602 mov r2, r0 801749c: f44f 71ef mov.w r1, #478 @ 0x1de 80174a0: 4b27 ldr r3, [pc, #156] @ (8017540 <__lshift+0xd0>) 80174a2: 4828 ldr r0, [pc, #160] @ (8017544 <__lshift+0xd4>) 80174a4: f7fe fe66 bl 8016174 <__assert_func> 80174a8: 3101 adds r1, #1 80174aa: 005b lsls r3, r3, #1 80174ac: e7ee b.n 801748c <__lshift+0x1c> 80174ae: 2300 movs r3, #0 80174b0: f100 0114 add.w r1, r0, #20 80174b4: f100 0210 add.w r2, r0, #16 80174b8: 4618 mov r0, r3 80174ba: 4553 cmp r3, sl 80174bc: db33 blt.n 8017526 <__lshift+0xb6> 80174be: 6920 ldr r0, [r4, #16] 80174c0: ea2a 7aea bic.w sl, sl, sl, asr #31 80174c4: f104 0314 add.w r3, r4, #20 80174c8: f019 091f ands.w r9, r9, #31 80174cc: eb01 018a add.w r1, r1, sl, lsl #2 80174d0: eb03 0c80 add.w ip, r3, r0, lsl #2 80174d4: d02b beq.n 801752e <__lshift+0xbe> 80174d6: 468a mov sl, r1 80174d8: 2200 movs r2, #0 80174da: f1c9 0e20 rsb lr, r9, #32 80174de: 6818 ldr r0, [r3, #0] 80174e0: fa00 f009 lsl.w r0, r0, r9 80174e4: 4310 orrs r0, r2 80174e6: f84a 0b04 str.w r0, [sl], #4 80174ea: f853 2b04 ldr.w r2, [r3], #4 80174ee: 459c cmp ip, r3 80174f0: fa22 f20e lsr.w r2, r2, lr 80174f4: d8f3 bhi.n 80174de <__lshift+0x6e> 80174f6: ebac 0304 sub.w r3, ip, r4 80174fa: 3b15 subs r3, #21 80174fc: f023 0303 bic.w r3, r3, #3 8017500: 3304 adds r3, #4 8017502: f104 0015 add.w r0, r4, #21 8017506: 4560 cmp r0, ip 8017508: bf88 it hi 801750a: 2304 movhi r3, #4 801750c: 50ca str r2, [r1, r3] 801750e: b10a cbz r2, 8017514 <__lshift+0xa4> 8017510: f108 0602 add.w r6, r8, #2 8017514: 3e01 subs r6, #1 8017516: 4638 mov r0, r7 8017518: 4621 mov r1, r4 801751a: 612e str r6, [r5, #16] 801751c: f7ff fde2 bl 80170e4 <_Bfree> 8017520: 4628 mov r0, r5 8017522: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8017526: f842 0f04 str.w r0, [r2, #4]! 801752a: 3301 adds r3, #1 801752c: e7c5 b.n 80174ba <__lshift+0x4a> 801752e: 3904 subs r1, #4 8017530: f853 2b04 ldr.w r2, [r3], #4 8017534: 459c cmp ip, r3 8017536: f841 2f04 str.w r2, [r1, #4]! 801753a: d8f9 bhi.n 8017530 <__lshift+0xc0> 801753c: e7ea b.n 8017514 <__lshift+0xa4> 801753e: bf00 nop 8017540: 080190cc .word 0x080190cc 8017544: 080190dd .word 0x080190dd 08017548 <__mcmp>: 8017548: 4603 mov r3, r0 801754a: 690a ldr r2, [r1, #16] 801754c: 6900 ldr r0, [r0, #16] 801754e: b530 push {r4, r5, lr} 8017550: 1a80 subs r0, r0, r2 8017552: d10e bne.n 8017572 <__mcmp+0x2a> 8017554: 3314 adds r3, #20 8017556: 3114 adds r1, #20 8017558: eb03 0482 add.w r4, r3, r2, lsl #2 801755c: eb01 0182 add.w r1, r1, r2, lsl #2 8017560: f854 5d04 ldr.w r5, [r4, #-4]! 8017564: f851 2d04 ldr.w r2, [r1, #-4]! 8017568: 4295 cmp r5, r2 801756a: d003 beq.n 8017574 <__mcmp+0x2c> 801756c: d205 bcs.n 801757a <__mcmp+0x32> 801756e: f04f 30ff mov.w r0, #4294967295 8017572: bd30 pop {r4, r5, pc} 8017574: 42a3 cmp r3, r4 8017576: d3f3 bcc.n 8017560 <__mcmp+0x18> 8017578: e7fb b.n 8017572 <__mcmp+0x2a> 801757a: 2001 movs r0, #1 801757c: e7f9 b.n 8017572 <__mcmp+0x2a> ... 08017580 <__mdiff>: 8017580: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8017584: 4689 mov r9, r1 8017586: 4606 mov r6, r0 8017588: 4611 mov r1, r2 801758a: 4648 mov r0, r9 801758c: 4614 mov r4, r2 801758e: f7ff ffdb bl 8017548 <__mcmp> 8017592: 1e05 subs r5, r0, #0 8017594: d112 bne.n 80175bc <__mdiff+0x3c> 8017596: 4629 mov r1, r5 8017598: 4630 mov r0, r6 801759a: f7ff fd63 bl 8017064 <_Balloc> 801759e: 4602 mov r2, r0 80175a0: b928 cbnz r0, 80175ae <__mdiff+0x2e> 80175a2: f240 2137 movw r1, #567 @ 0x237 80175a6: 4b3e ldr r3, [pc, #248] @ (80176a0 <__mdiff+0x120>) 80175a8: 483e ldr r0, [pc, #248] @ (80176a4 <__mdiff+0x124>) 80175aa: f7fe fde3 bl 8016174 <__assert_func> 80175ae: 2301 movs r3, #1 80175b0: e9c0 3504 strd r3, r5, [r0, #16] 80175b4: 4610 mov r0, r2 80175b6: b003 add sp, #12 80175b8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80175bc: bfbc itt lt 80175be: 464b movlt r3, r9 80175c0: 46a1 movlt r9, r4 80175c2: 4630 mov r0, r6 80175c4: f8d9 1004 ldr.w r1, [r9, #4] 80175c8: bfba itte lt 80175ca: 461c movlt r4, r3 80175cc: 2501 movlt r5, #1 80175ce: 2500 movge r5, #0 80175d0: f7ff fd48 bl 8017064 <_Balloc> 80175d4: 4602 mov r2, r0 80175d6: b918 cbnz r0, 80175e0 <__mdiff+0x60> 80175d8: f240 2145 movw r1, #581 @ 0x245 80175dc: 4b30 ldr r3, [pc, #192] @ (80176a0 <__mdiff+0x120>) 80175de: e7e3 b.n 80175a8 <__mdiff+0x28> 80175e0: f100 0b14 add.w fp, r0, #20 80175e4: f8d9 7010 ldr.w r7, [r9, #16] 80175e8: f109 0310 add.w r3, r9, #16 80175ec: 60c5 str r5, [r0, #12] 80175ee: f04f 0c00 mov.w ip, #0 80175f2: f109 0514 add.w r5, r9, #20 80175f6: 46d9 mov r9, fp 80175f8: 6926 ldr r6, [r4, #16] 80175fa: f104 0e14 add.w lr, r4, #20 80175fe: eb05 0887 add.w r8, r5, r7, lsl #2 8017602: eb0e 0686 add.w r6, lr, r6, lsl #2 8017606: 9301 str r3, [sp, #4] 8017608: 9b01 ldr r3, [sp, #4] 801760a: f85e 0b04 ldr.w r0, [lr], #4 801760e: f853 af04 ldr.w sl, [r3, #4]! 8017612: b281 uxth r1, r0 8017614: 9301 str r3, [sp, #4] 8017616: fa1f f38a uxth.w r3, sl 801761a: 1a5b subs r3, r3, r1 801761c: 0c00 lsrs r0, r0, #16 801761e: 4463 add r3, ip 8017620: ebc0 401a rsb r0, r0, sl, lsr #16 8017624: eb00 4023 add.w r0, r0, r3, asr #16 8017628: b29b uxth r3, r3 801762a: ea43 4300 orr.w r3, r3, r0, lsl #16 801762e: 4576 cmp r6, lr 8017630: ea4f 4c20 mov.w ip, r0, asr #16 8017634: f849 3b04 str.w r3, [r9], #4 8017638: d8e6 bhi.n 8017608 <__mdiff+0x88> 801763a: 1b33 subs r3, r6, r4 801763c: 3b15 subs r3, #21 801763e: f023 0303 bic.w r3, r3, #3 8017642: 3415 adds r4, #21 8017644: 3304 adds r3, #4 8017646: 42a6 cmp r6, r4 8017648: bf38 it cc 801764a: 2304 movcc r3, #4 801764c: 441d add r5, r3 801764e: 445b add r3, fp 8017650: 461e mov r6, r3 8017652: 462c mov r4, r5 8017654: 4544 cmp r4, r8 8017656: d30e bcc.n 8017676 <__mdiff+0xf6> 8017658: f108 0103 add.w r1, r8, #3 801765c: 1b49 subs r1, r1, r5 801765e: f021 0103 bic.w r1, r1, #3 8017662: 3d03 subs r5, #3 8017664: 45a8 cmp r8, r5 8017666: bf38 it cc 8017668: 2100 movcc r1, #0 801766a: 440b add r3, r1 801766c: f853 1d04 ldr.w r1, [r3, #-4]! 8017670: b199 cbz r1, 801769a <__mdiff+0x11a> 8017672: 6117 str r7, [r2, #16] 8017674: e79e b.n 80175b4 <__mdiff+0x34> 8017676: 46e6 mov lr, ip 8017678: f854 1b04 ldr.w r1, [r4], #4 801767c: fa1f fc81 uxth.w ip, r1 8017680: 44f4 add ip, lr 8017682: 0c08 lsrs r0, r1, #16 8017684: 4471 add r1, lr 8017686: eb00 402c add.w r0, r0, ip, asr #16 801768a: b289 uxth r1, r1 801768c: ea41 4100 orr.w r1, r1, r0, lsl #16 8017690: ea4f 4c20 mov.w ip, r0, asr #16 8017694: f846 1b04 str.w r1, [r6], #4 8017698: e7dc b.n 8017654 <__mdiff+0xd4> 801769a: 3f01 subs r7, #1 801769c: e7e6 b.n 801766c <__mdiff+0xec> 801769e: bf00 nop 80176a0: 080190cc .word 0x080190cc 80176a4: 080190dd .word 0x080190dd 080176a8 <__d2b>: 80176a8: e92d 4373 stmdb sp!, {r0, r1, r4, r5, r6, r8, r9, lr} 80176ac: 2101 movs r1, #1 80176ae: 4690 mov r8, r2 80176b0: 4699 mov r9, r3 80176b2: 9e08 ldr r6, [sp, #32] 80176b4: f7ff fcd6 bl 8017064 <_Balloc> 80176b8: 4604 mov r4, r0 80176ba: b930 cbnz r0, 80176ca <__d2b+0x22> 80176bc: 4602 mov r2, r0 80176be: f240 310f movw r1, #783 @ 0x30f 80176c2: 4b23 ldr r3, [pc, #140] @ (8017750 <__d2b+0xa8>) 80176c4: 4823 ldr r0, [pc, #140] @ (8017754 <__d2b+0xac>) 80176c6: f7fe fd55 bl 8016174 <__assert_func> 80176ca: f3c9 550a ubfx r5, r9, #20, #11 80176ce: f3c9 0313 ubfx r3, r9, #0, #20 80176d2: b10d cbz r5, 80176d8 <__d2b+0x30> 80176d4: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 80176d8: 9301 str r3, [sp, #4] 80176da: f1b8 0300 subs.w r3, r8, #0 80176de: d024 beq.n 801772a <__d2b+0x82> 80176e0: 4668 mov r0, sp 80176e2: 9300 str r3, [sp, #0] 80176e4: f7ff fd85 bl 80171f2 <__lo0bits> 80176e8: e9dd 1200 ldrd r1, r2, [sp] 80176ec: b1d8 cbz r0, 8017726 <__d2b+0x7e> 80176ee: f1c0 0320 rsb r3, r0, #32 80176f2: fa02 f303 lsl.w r3, r2, r3 80176f6: 430b orrs r3, r1 80176f8: 40c2 lsrs r2, r0 80176fa: 6163 str r3, [r4, #20] 80176fc: 9201 str r2, [sp, #4] 80176fe: 9b01 ldr r3, [sp, #4] 8017700: 2b00 cmp r3, #0 8017702: bf0c ite eq 8017704: 2201 moveq r2, #1 8017706: 2202 movne r2, #2 8017708: 61a3 str r3, [r4, #24] 801770a: 6122 str r2, [r4, #16] 801770c: b1ad cbz r5, 801773a <__d2b+0x92> 801770e: f2a5 4533 subw r5, r5, #1075 @ 0x433 8017712: 4405 add r5, r0 8017714: 6035 str r5, [r6, #0] 8017716: f1c0 0035 rsb r0, r0, #53 @ 0x35 801771a: 9b09 ldr r3, [sp, #36] @ 0x24 801771c: 6018 str r0, [r3, #0] 801771e: 4620 mov r0, r4 8017720: b002 add sp, #8 8017722: e8bd 8370 ldmia.w sp!, {r4, r5, r6, r8, r9, pc} 8017726: 6161 str r1, [r4, #20] 8017728: e7e9 b.n 80176fe <__d2b+0x56> 801772a: a801 add r0, sp, #4 801772c: f7ff fd61 bl 80171f2 <__lo0bits> 8017730: 9b01 ldr r3, [sp, #4] 8017732: 2201 movs r2, #1 8017734: 6163 str r3, [r4, #20] 8017736: 3020 adds r0, #32 8017738: e7e7 b.n 801770a <__d2b+0x62> 801773a: f2a0 4032 subw r0, r0, #1074 @ 0x432 801773e: eb04 0382 add.w r3, r4, r2, lsl #2 8017742: 6030 str r0, [r6, #0] 8017744: 6918 ldr r0, [r3, #16] 8017746: f7ff fd35 bl 80171b4 <__hi0bits> 801774a: ebc0 1042 rsb r0, r0, r2, lsl #5 801774e: e7e4 b.n 801771a <__d2b+0x72> 8017750: 080190cc .word 0x080190cc 8017754: 080190dd .word 0x080190dd 08017758 <__ssputs_r>: 8017758: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 801775c: 461f mov r7, r3 801775e: 688e ldr r6, [r1, #8] 8017760: 4682 mov sl, r0 8017762: 42be cmp r6, r7 8017764: 460c mov r4, r1 8017766: 4690 mov r8, r2 8017768: 680b ldr r3, [r1, #0] 801776a: d82d bhi.n 80177c8 <__ssputs_r+0x70> 801776c: f9b1 200c ldrsh.w r2, [r1, #12] 8017770: f412 6f90 tst.w r2, #1152 @ 0x480 8017774: d026 beq.n 80177c4 <__ssputs_r+0x6c> 8017776: 6965 ldr r5, [r4, #20] 8017778: 6909 ldr r1, [r1, #16] 801777a: eb05 0545 add.w r5, r5, r5, lsl #1 801777e: eba3 0901 sub.w r9, r3, r1 8017782: eb05 75d5 add.w r5, r5, r5, lsr #31 8017786: 1c7b adds r3, r7, #1 8017788: 444b add r3, r9 801778a: 106d asrs r5, r5, #1 801778c: 429d cmp r5, r3 801778e: bf38 it cc 8017790: 461d movcc r5, r3 8017792: 0553 lsls r3, r2, #21 8017794: d527 bpl.n 80177e6 <__ssputs_r+0x8e> 8017796: 4629 mov r1, r5 8017798: f7ff fbd8 bl 8016f4c <_malloc_r> 801779c: 4606 mov r6, r0 801779e: b360 cbz r0, 80177fa <__ssputs_r+0xa2> 80177a0: 464a mov r2, r9 80177a2: 6921 ldr r1, [r4, #16] 80177a4: f7fe fcd7 bl 8016156 80177a8: 89a3 ldrh r3, [r4, #12] 80177aa: f423 6390 bic.w r3, r3, #1152 @ 0x480 80177ae: f043 0380 orr.w r3, r3, #128 @ 0x80 80177b2: 81a3 strh r3, [r4, #12] 80177b4: 6126 str r6, [r4, #16] 80177b6: 444e add r6, r9 80177b8: 6026 str r6, [r4, #0] 80177ba: 463e mov r6, r7 80177bc: 6165 str r5, [r4, #20] 80177be: eba5 0509 sub.w r5, r5, r9 80177c2: 60a5 str r5, [r4, #8] 80177c4: 42be cmp r6, r7 80177c6: d900 bls.n 80177ca <__ssputs_r+0x72> 80177c8: 463e mov r6, r7 80177ca: 4632 mov r2, r6 80177cc: 4641 mov r1, r8 80177ce: 6820 ldr r0, [r4, #0] 80177d0: f000 f9d4 bl 8017b7c 80177d4: 2000 movs r0, #0 80177d6: 68a3 ldr r3, [r4, #8] 80177d8: 1b9b subs r3, r3, r6 80177da: 60a3 str r3, [r4, #8] 80177dc: 6823 ldr r3, [r4, #0] 80177de: 4433 add r3, r6 80177e0: 6023 str r3, [r4, #0] 80177e2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80177e6: 462a mov r2, r5 80177e8: f000 fa1f bl 8017c2a <_realloc_r> 80177ec: 4606 mov r6, r0 80177ee: 2800 cmp r0, #0 80177f0: d1e0 bne.n 80177b4 <__ssputs_r+0x5c> 80177f2: 4650 mov r0, sl 80177f4: 6921 ldr r1, [r4, #16] 80177f6: f7ff fb37 bl 8016e68 <_free_r> 80177fa: 230c movs r3, #12 80177fc: f8ca 3000 str.w r3, [sl] 8017800: 89a3 ldrh r3, [r4, #12] 8017802: f04f 30ff mov.w r0, #4294967295 8017806: f043 0340 orr.w r3, r3, #64 @ 0x40 801780a: 81a3 strh r3, [r4, #12] 801780c: e7e9 b.n 80177e2 <__ssputs_r+0x8a> ... 08017810 <_svfiprintf_r>: 8017810: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8017814: 4698 mov r8, r3 8017816: 898b ldrh r3, [r1, #12] 8017818: 4607 mov r7, r0 801781a: 061b lsls r3, r3, #24 801781c: 460d mov r5, r1 801781e: 4614 mov r4, r2 8017820: b09d sub sp, #116 @ 0x74 8017822: d510 bpl.n 8017846 <_svfiprintf_r+0x36> 8017824: 690b ldr r3, [r1, #16] 8017826: b973 cbnz r3, 8017846 <_svfiprintf_r+0x36> 8017828: 2140 movs r1, #64 @ 0x40 801782a: f7ff fb8f bl 8016f4c <_malloc_r> 801782e: 6028 str r0, [r5, #0] 8017830: 6128 str r0, [r5, #16] 8017832: b930 cbnz r0, 8017842 <_svfiprintf_r+0x32> 8017834: 230c movs r3, #12 8017836: 603b str r3, [r7, #0] 8017838: f04f 30ff mov.w r0, #4294967295 801783c: b01d add sp, #116 @ 0x74 801783e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8017842: 2340 movs r3, #64 @ 0x40 8017844: 616b str r3, [r5, #20] 8017846: 2300 movs r3, #0 8017848: 9309 str r3, [sp, #36] @ 0x24 801784a: 2320 movs r3, #32 801784c: f88d 3029 strb.w r3, [sp, #41] @ 0x29 8017850: 2330 movs r3, #48 @ 0x30 8017852: f04f 0901 mov.w r9, #1 8017856: f8cd 800c str.w r8, [sp, #12] 801785a: f8df 8198 ldr.w r8, [pc, #408] @ 80179f4 <_svfiprintf_r+0x1e4> 801785e: f88d 302a strb.w r3, [sp, #42] @ 0x2a 8017862: 4623 mov r3, r4 8017864: 469a mov sl, r3 8017866: f813 2b01 ldrb.w r2, [r3], #1 801786a: b10a cbz r2, 8017870 <_svfiprintf_r+0x60> 801786c: 2a25 cmp r2, #37 @ 0x25 801786e: d1f9 bne.n 8017864 <_svfiprintf_r+0x54> 8017870: ebba 0b04 subs.w fp, sl, r4 8017874: d00b beq.n 801788e <_svfiprintf_r+0x7e> 8017876: 465b mov r3, fp 8017878: 4622 mov r2, r4 801787a: 4629 mov r1, r5 801787c: 4638 mov r0, r7 801787e: f7ff ff6b bl 8017758 <__ssputs_r> 8017882: 3001 adds r0, #1 8017884: f000 80a7 beq.w 80179d6 <_svfiprintf_r+0x1c6> 8017888: 9a09 ldr r2, [sp, #36] @ 0x24 801788a: 445a add r2, fp 801788c: 9209 str r2, [sp, #36] @ 0x24 801788e: f89a 3000 ldrb.w r3, [sl] 8017892: 2b00 cmp r3, #0 8017894: f000 809f beq.w 80179d6 <_svfiprintf_r+0x1c6> 8017898: 2300 movs r3, #0 801789a: f04f 32ff mov.w r2, #4294967295 801789e: e9cd 2305 strd r2, r3, [sp, #20] 80178a2: f10a 0a01 add.w sl, sl, #1 80178a6: 9304 str r3, [sp, #16] 80178a8: 9307 str r3, [sp, #28] 80178aa: f88d 3053 strb.w r3, [sp, #83] @ 0x53 80178ae: 931a str r3, [sp, #104] @ 0x68 80178b0: 4654 mov r4, sl 80178b2: 2205 movs r2, #5 80178b4: f814 1b01 ldrb.w r1, [r4], #1 80178b8: 484e ldr r0, [pc, #312] @ (80179f4 <_svfiprintf_r+0x1e4>) 80178ba: f7fe fc3e bl 801613a 80178be: 9a04 ldr r2, [sp, #16] 80178c0: b9d8 cbnz r0, 80178fa <_svfiprintf_r+0xea> 80178c2: 06d0 lsls r0, r2, #27 80178c4: bf44 itt mi 80178c6: 2320 movmi r3, #32 80178c8: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80178cc: 0711 lsls r1, r2, #28 80178ce: bf44 itt mi 80178d0: 232b movmi r3, #43 @ 0x2b 80178d2: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80178d6: f89a 3000 ldrb.w r3, [sl] 80178da: 2b2a cmp r3, #42 @ 0x2a 80178dc: d015 beq.n 801790a <_svfiprintf_r+0xfa> 80178de: 4654 mov r4, sl 80178e0: 2000 movs r0, #0 80178e2: f04f 0c0a mov.w ip, #10 80178e6: 9a07 ldr r2, [sp, #28] 80178e8: 4621 mov r1, r4 80178ea: f811 3b01 ldrb.w r3, [r1], #1 80178ee: 3b30 subs r3, #48 @ 0x30 80178f0: 2b09 cmp r3, #9 80178f2: d94b bls.n 801798c <_svfiprintf_r+0x17c> 80178f4: b1b0 cbz r0, 8017924 <_svfiprintf_r+0x114> 80178f6: 9207 str r2, [sp, #28] 80178f8: e014 b.n 8017924 <_svfiprintf_r+0x114> 80178fa: eba0 0308 sub.w r3, r0, r8 80178fe: fa09 f303 lsl.w r3, r9, r3 8017902: 4313 orrs r3, r2 8017904: 46a2 mov sl, r4 8017906: 9304 str r3, [sp, #16] 8017908: e7d2 b.n 80178b0 <_svfiprintf_r+0xa0> 801790a: 9b03 ldr r3, [sp, #12] 801790c: 1d19 adds r1, r3, #4 801790e: 681b ldr r3, [r3, #0] 8017910: 9103 str r1, [sp, #12] 8017912: 2b00 cmp r3, #0 8017914: bfbb ittet lt 8017916: 425b neglt r3, r3 8017918: f042 0202 orrlt.w r2, r2, #2 801791c: 9307 strge r3, [sp, #28] 801791e: 9307 strlt r3, [sp, #28] 8017920: bfb8 it lt 8017922: 9204 strlt r2, [sp, #16] 8017924: 7823 ldrb r3, [r4, #0] 8017926: 2b2e cmp r3, #46 @ 0x2e 8017928: d10a bne.n 8017940 <_svfiprintf_r+0x130> 801792a: 7863 ldrb r3, [r4, #1] 801792c: 2b2a cmp r3, #42 @ 0x2a 801792e: d132 bne.n 8017996 <_svfiprintf_r+0x186> 8017930: 9b03 ldr r3, [sp, #12] 8017932: 3402 adds r4, #2 8017934: 1d1a adds r2, r3, #4 8017936: 681b ldr r3, [r3, #0] 8017938: 9203 str r2, [sp, #12] 801793a: ea43 73e3 orr.w r3, r3, r3, asr #31 801793e: 9305 str r3, [sp, #20] 8017940: f8df a0b4 ldr.w sl, [pc, #180] @ 80179f8 <_svfiprintf_r+0x1e8> 8017944: 2203 movs r2, #3 8017946: 4650 mov r0, sl 8017948: 7821 ldrb r1, [r4, #0] 801794a: f7fe fbf6 bl 801613a 801794e: b138 cbz r0, 8017960 <_svfiprintf_r+0x150> 8017950: 2240 movs r2, #64 @ 0x40 8017952: 9b04 ldr r3, [sp, #16] 8017954: eba0 000a sub.w r0, r0, sl 8017958: 4082 lsls r2, r0 801795a: 4313 orrs r3, r2 801795c: 3401 adds r4, #1 801795e: 9304 str r3, [sp, #16] 8017960: f814 1b01 ldrb.w r1, [r4], #1 8017964: 2206 movs r2, #6 8017966: 4825 ldr r0, [pc, #148] @ (80179fc <_svfiprintf_r+0x1ec>) 8017968: f88d 1028 strb.w r1, [sp, #40] @ 0x28 801796c: f7fe fbe5 bl 801613a 8017970: 2800 cmp r0, #0 8017972: d036 beq.n 80179e2 <_svfiprintf_r+0x1d2> 8017974: 4b22 ldr r3, [pc, #136] @ (8017a00 <_svfiprintf_r+0x1f0>) 8017976: bb1b cbnz r3, 80179c0 <_svfiprintf_r+0x1b0> 8017978: 9b03 ldr r3, [sp, #12] 801797a: 3307 adds r3, #7 801797c: f023 0307 bic.w r3, r3, #7 8017980: 3308 adds r3, #8 8017982: 9303 str r3, [sp, #12] 8017984: 9b09 ldr r3, [sp, #36] @ 0x24 8017986: 4433 add r3, r6 8017988: 9309 str r3, [sp, #36] @ 0x24 801798a: e76a b.n 8017862 <_svfiprintf_r+0x52> 801798c: 460c mov r4, r1 801798e: 2001 movs r0, #1 8017990: fb0c 3202 mla r2, ip, r2, r3 8017994: e7a8 b.n 80178e8 <_svfiprintf_r+0xd8> 8017996: 2300 movs r3, #0 8017998: f04f 0c0a mov.w ip, #10 801799c: 4619 mov r1, r3 801799e: 3401 adds r4, #1 80179a0: 9305 str r3, [sp, #20] 80179a2: 4620 mov r0, r4 80179a4: f810 2b01 ldrb.w r2, [r0], #1 80179a8: 3a30 subs r2, #48 @ 0x30 80179aa: 2a09 cmp r2, #9 80179ac: d903 bls.n 80179b6 <_svfiprintf_r+0x1a6> 80179ae: 2b00 cmp r3, #0 80179b0: d0c6 beq.n 8017940 <_svfiprintf_r+0x130> 80179b2: 9105 str r1, [sp, #20] 80179b4: e7c4 b.n 8017940 <_svfiprintf_r+0x130> 80179b6: 4604 mov r4, r0 80179b8: 2301 movs r3, #1 80179ba: fb0c 2101 mla r1, ip, r1, r2 80179be: e7f0 b.n 80179a2 <_svfiprintf_r+0x192> 80179c0: ab03 add r3, sp, #12 80179c2: 9300 str r3, [sp, #0] 80179c4: 462a mov r2, r5 80179c6: 4638 mov r0, r7 80179c8: 4b0e ldr r3, [pc, #56] @ (8017a04 <_svfiprintf_r+0x1f4>) 80179ca: a904 add r1, sp, #16 80179cc: f7fd fe38 bl 8015640 <_printf_float> 80179d0: 1c42 adds r2, r0, #1 80179d2: 4606 mov r6, r0 80179d4: d1d6 bne.n 8017984 <_svfiprintf_r+0x174> 80179d6: 89ab ldrh r3, [r5, #12] 80179d8: 065b lsls r3, r3, #25 80179da: f53f af2d bmi.w 8017838 <_svfiprintf_r+0x28> 80179de: 9809 ldr r0, [sp, #36] @ 0x24 80179e0: e72c b.n 801783c <_svfiprintf_r+0x2c> 80179e2: ab03 add r3, sp, #12 80179e4: 9300 str r3, [sp, #0] 80179e6: 462a mov r2, r5 80179e8: 4638 mov r0, r7 80179ea: 4b06 ldr r3, [pc, #24] @ (8017a04 <_svfiprintf_r+0x1f4>) 80179ec: a904 add r1, sp, #16 80179ee: f7fe f8c5 bl 8015b7c <_printf_i> 80179f2: e7ed b.n 80179d0 <_svfiprintf_r+0x1c0> 80179f4: 08019136 .word 0x08019136 80179f8: 0801913c .word 0x0801913c 80179fc: 08019140 .word 0x08019140 8017a00: 08015641 .word 0x08015641 8017a04: 08017759 .word 0x08017759 08017a08 <__sflush_r>: 8017a08: f9b1 200c ldrsh.w r2, [r1, #12] 8017a0c: b5f8 push {r3, r4, r5, r6, r7, lr} 8017a0e: 0716 lsls r6, r2, #28 8017a10: 4605 mov r5, r0 8017a12: 460c mov r4, r1 8017a14: d454 bmi.n 8017ac0 <__sflush_r+0xb8> 8017a16: 684b ldr r3, [r1, #4] 8017a18: 2b00 cmp r3, #0 8017a1a: dc02 bgt.n 8017a22 <__sflush_r+0x1a> 8017a1c: 6c0b ldr r3, [r1, #64] @ 0x40 8017a1e: 2b00 cmp r3, #0 8017a20: dd48 ble.n 8017ab4 <__sflush_r+0xac> 8017a22: 6ae6 ldr r6, [r4, #44] @ 0x2c 8017a24: 2e00 cmp r6, #0 8017a26: d045 beq.n 8017ab4 <__sflush_r+0xac> 8017a28: 2300 movs r3, #0 8017a2a: f412 5280 ands.w r2, r2, #4096 @ 0x1000 8017a2e: 682f ldr r7, [r5, #0] 8017a30: 6a21 ldr r1, [r4, #32] 8017a32: 602b str r3, [r5, #0] 8017a34: d030 beq.n 8017a98 <__sflush_r+0x90> 8017a36: 6d62 ldr r2, [r4, #84] @ 0x54 8017a38: 89a3 ldrh r3, [r4, #12] 8017a3a: 0759 lsls r1, r3, #29 8017a3c: d505 bpl.n 8017a4a <__sflush_r+0x42> 8017a3e: 6863 ldr r3, [r4, #4] 8017a40: 1ad2 subs r2, r2, r3 8017a42: 6b63 ldr r3, [r4, #52] @ 0x34 8017a44: b10b cbz r3, 8017a4a <__sflush_r+0x42> 8017a46: 6c23 ldr r3, [r4, #64] @ 0x40 8017a48: 1ad2 subs r2, r2, r3 8017a4a: 2300 movs r3, #0 8017a4c: 4628 mov r0, r5 8017a4e: 6ae6 ldr r6, [r4, #44] @ 0x2c 8017a50: 6a21 ldr r1, [r4, #32] 8017a52: 47b0 blx r6 8017a54: 1c43 adds r3, r0, #1 8017a56: 89a3 ldrh r3, [r4, #12] 8017a58: d106 bne.n 8017a68 <__sflush_r+0x60> 8017a5a: 6829 ldr r1, [r5, #0] 8017a5c: 291d cmp r1, #29 8017a5e: d82b bhi.n 8017ab8 <__sflush_r+0xb0> 8017a60: 4a28 ldr r2, [pc, #160] @ (8017b04 <__sflush_r+0xfc>) 8017a62: 40ca lsrs r2, r1 8017a64: 07d6 lsls r6, r2, #31 8017a66: d527 bpl.n 8017ab8 <__sflush_r+0xb0> 8017a68: 2200 movs r2, #0 8017a6a: 6062 str r2, [r4, #4] 8017a6c: 6922 ldr r2, [r4, #16] 8017a6e: 04d9 lsls r1, r3, #19 8017a70: 6022 str r2, [r4, #0] 8017a72: d504 bpl.n 8017a7e <__sflush_r+0x76> 8017a74: 1c42 adds r2, r0, #1 8017a76: d101 bne.n 8017a7c <__sflush_r+0x74> 8017a78: 682b ldr r3, [r5, #0] 8017a7a: b903 cbnz r3, 8017a7e <__sflush_r+0x76> 8017a7c: 6560 str r0, [r4, #84] @ 0x54 8017a7e: 6b61 ldr r1, [r4, #52] @ 0x34 8017a80: 602f str r7, [r5, #0] 8017a82: b1b9 cbz r1, 8017ab4 <__sflush_r+0xac> 8017a84: f104 0344 add.w r3, r4, #68 @ 0x44 8017a88: 4299 cmp r1, r3 8017a8a: d002 beq.n 8017a92 <__sflush_r+0x8a> 8017a8c: 4628 mov r0, r5 8017a8e: f7ff f9eb bl 8016e68 <_free_r> 8017a92: 2300 movs r3, #0 8017a94: 6363 str r3, [r4, #52] @ 0x34 8017a96: e00d b.n 8017ab4 <__sflush_r+0xac> 8017a98: 2301 movs r3, #1 8017a9a: 4628 mov r0, r5 8017a9c: 47b0 blx r6 8017a9e: 4602 mov r2, r0 8017aa0: 1c50 adds r0, r2, #1 8017aa2: d1c9 bne.n 8017a38 <__sflush_r+0x30> 8017aa4: 682b ldr r3, [r5, #0] 8017aa6: 2b00 cmp r3, #0 8017aa8: d0c6 beq.n 8017a38 <__sflush_r+0x30> 8017aaa: 2b1d cmp r3, #29 8017aac: d001 beq.n 8017ab2 <__sflush_r+0xaa> 8017aae: 2b16 cmp r3, #22 8017ab0: d11d bne.n 8017aee <__sflush_r+0xe6> 8017ab2: 602f str r7, [r5, #0] 8017ab4: 2000 movs r0, #0 8017ab6: e021 b.n 8017afc <__sflush_r+0xf4> 8017ab8: f043 0340 orr.w r3, r3, #64 @ 0x40 8017abc: b21b sxth r3, r3 8017abe: e01a b.n 8017af6 <__sflush_r+0xee> 8017ac0: 690f ldr r7, [r1, #16] 8017ac2: 2f00 cmp r7, #0 8017ac4: d0f6 beq.n 8017ab4 <__sflush_r+0xac> 8017ac6: 0793 lsls r3, r2, #30 8017ac8: bf18 it ne 8017aca: 2300 movne r3, #0 8017acc: 680e ldr r6, [r1, #0] 8017ace: bf08 it eq 8017ad0: 694b ldreq r3, [r1, #20] 8017ad2: 1bf6 subs r6, r6, r7 8017ad4: 600f str r7, [r1, #0] 8017ad6: 608b str r3, [r1, #8] 8017ad8: 2e00 cmp r6, #0 8017ada: ddeb ble.n 8017ab4 <__sflush_r+0xac> 8017adc: 4633 mov r3, r6 8017ade: 463a mov r2, r7 8017ae0: 4628 mov r0, r5 8017ae2: 6a21 ldr r1, [r4, #32] 8017ae4: f8d4 c028 ldr.w ip, [r4, #40] @ 0x28 8017ae8: 47e0 blx ip 8017aea: 2800 cmp r0, #0 8017aec: dc07 bgt.n 8017afe <__sflush_r+0xf6> 8017aee: f9b4 300c ldrsh.w r3, [r4, #12] 8017af2: f043 0340 orr.w r3, r3, #64 @ 0x40 8017af6: f04f 30ff mov.w r0, #4294967295 8017afa: 81a3 strh r3, [r4, #12] 8017afc: bdf8 pop {r3, r4, r5, r6, r7, pc} 8017afe: 4407 add r7, r0 8017b00: 1a36 subs r6, r6, r0 8017b02: e7e9 b.n 8017ad8 <__sflush_r+0xd0> 8017b04: 20400001 .word 0x20400001 08017b08 <_fflush_r>: 8017b08: b538 push {r3, r4, r5, lr} 8017b0a: 690b ldr r3, [r1, #16] 8017b0c: 4605 mov r5, r0 8017b0e: 460c mov r4, r1 8017b10: b913 cbnz r3, 8017b18 <_fflush_r+0x10> 8017b12: 2500 movs r5, #0 8017b14: 4628 mov r0, r5 8017b16: bd38 pop {r3, r4, r5, pc} 8017b18: b118 cbz r0, 8017b22 <_fflush_r+0x1a> 8017b1a: 6a03 ldr r3, [r0, #32] 8017b1c: b90b cbnz r3, 8017b22 <_fflush_r+0x1a> 8017b1e: f7fe f9d7 bl 8015ed0 <__sinit> 8017b22: f9b4 300c ldrsh.w r3, [r4, #12] 8017b26: 2b00 cmp r3, #0 8017b28: d0f3 beq.n 8017b12 <_fflush_r+0xa> 8017b2a: 6e62 ldr r2, [r4, #100] @ 0x64 8017b2c: 07d0 lsls r0, r2, #31 8017b2e: d404 bmi.n 8017b3a <_fflush_r+0x32> 8017b30: 0599 lsls r1, r3, #22 8017b32: d402 bmi.n 8017b3a <_fflush_r+0x32> 8017b34: 6da0 ldr r0, [r4, #88] @ 0x58 8017b36: f7fe fafe bl 8016136 <__retarget_lock_acquire_recursive> 8017b3a: 4628 mov r0, r5 8017b3c: 4621 mov r1, r4 8017b3e: f7ff ff63 bl 8017a08 <__sflush_r> 8017b42: 6e63 ldr r3, [r4, #100] @ 0x64 8017b44: 4605 mov r5, r0 8017b46: 07da lsls r2, r3, #31 8017b48: d4e4 bmi.n 8017b14 <_fflush_r+0xc> 8017b4a: 89a3 ldrh r3, [r4, #12] 8017b4c: 059b lsls r3, r3, #22 8017b4e: d4e1 bmi.n 8017b14 <_fflush_r+0xc> 8017b50: 6da0 ldr r0, [r4, #88] @ 0x58 8017b52: f7fe faf1 bl 8016138 <__retarget_lock_release_recursive> 8017b56: e7dd b.n 8017b14 <_fflush_r+0xc> 08017b58 : 8017b58: b40e push {r1, r2, r3} 8017b5a: b503 push {r0, r1, lr} 8017b5c: 4601 mov r1, r0 8017b5e: ab03 add r3, sp, #12 8017b60: 4805 ldr r0, [pc, #20] @ (8017b78 ) 8017b62: f853 2b04 ldr.w r2, [r3], #4 8017b66: 6800 ldr r0, [r0, #0] 8017b68: 9301 str r3, [sp, #4] 8017b6a: f000 f8c1 bl 8017cf0 <_vfiprintf_r> 8017b6e: b002 add sp, #8 8017b70: f85d eb04 ldr.w lr, [sp], #4 8017b74: b003 add sp, #12 8017b76: 4770 bx lr 8017b78: 2000009c .word 0x2000009c 08017b7c : 8017b7c: 4288 cmp r0, r1 8017b7e: b510 push {r4, lr} 8017b80: eb01 0402 add.w r4, r1, r2 8017b84: d902 bls.n 8017b8c 8017b86: 4284 cmp r4, r0 8017b88: 4623 mov r3, r4 8017b8a: d807 bhi.n 8017b9c 8017b8c: 1e43 subs r3, r0, #1 8017b8e: 42a1 cmp r1, r4 8017b90: d008 beq.n 8017ba4 8017b92: f811 2b01 ldrb.w r2, [r1], #1 8017b96: f803 2f01 strb.w r2, [r3, #1]! 8017b9a: e7f8 b.n 8017b8e 8017b9c: 4601 mov r1, r0 8017b9e: 4402 add r2, r0 8017ba0: 428a cmp r2, r1 8017ba2: d100 bne.n 8017ba6 8017ba4: bd10 pop {r4, pc} 8017ba6: f813 4d01 ldrb.w r4, [r3, #-1]! 8017baa: f802 4d01 strb.w r4, [r2, #-1]! 8017bae: e7f7 b.n 8017ba0 08017bb0 <_sbrk_r>: 8017bb0: b538 push {r3, r4, r5, lr} 8017bb2: 2300 movs r3, #0 8017bb4: 4d05 ldr r5, [pc, #20] @ (8017bcc <_sbrk_r+0x1c>) 8017bb6: 4604 mov r4, r0 8017bb8: 4608 mov r0, r1 8017bba: 602b str r3, [r5, #0] 8017bbc: f7f7 f826 bl 800ec0c <_sbrk> 8017bc0: 1c43 adds r3, r0, #1 8017bc2: d102 bne.n 8017bca <_sbrk_r+0x1a> 8017bc4: 682b ldr r3, [r5, #0] 8017bc6: b103 cbz r3, 8017bca <_sbrk_r+0x1a> 8017bc8: 6023 str r3, [r4, #0] 8017bca: bd38 pop {r3, r4, r5, pc} 8017bcc: 20001608 .word 0x20001608 08017bd0 : 8017bd0: 2006 movs r0, #6 8017bd2: b508 push {r3, lr} 8017bd4: f000 fa60 bl 8018098 8017bd8: 2001 movs r0, #1 8017bda: f7f6 ffbe bl 800eb5a <_exit> 08017bde <_calloc_r>: 8017bde: b570 push {r4, r5, r6, lr} 8017be0: fba1 5402 umull r5, r4, r1, r2 8017be4: b934 cbnz r4, 8017bf4 <_calloc_r+0x16> 8017be6: 4629 mov r1, r5 8017be8: f7ff f9b0 bl 8016f4c <_malloc_r> 8017bec: 4606 mov r6, r0 8017bee: b928 cbnz r0, 8017bfc <_calloc_r+0x1e> 8017bf0: 4630 mov r0, r6 8017bf2: bd70 pop {r4, r5, r6, pc} 8017bf4: 220c movs r2, #12 8017bf6: 2600 movs r6, #0 8017bf8: 6002 str r2, [r0, #0] 8017bfa: e7f9 b.n 8017bf0 <_calloc_r+0x12> 8017bfc: 462a mov r2, r5 8017bfe: 4621 mov r1, r4 8017c00: f7fe fa1c bl 801603c 8017c04: e7f4 b.n 8017bf0 <_calloc_r+0x12> 08017c06 <__ascii_mbtowc>: 8017c06: b082 sub sp, #8 8017c08: b901 cbnz r1, 8017c0c <__ascii_mbtowc+0x6> 8017c0a: a901 add r1, sp, #4 8017c0c: b142 cbz r2, 8017c20 <__ascii_mbtowc+0x1a> 8017c0e: b14b cbz r3, 8017c24 <__ascii_mbtowc+0x1e> 8017c10: 7813 ldrb r3, [r2, #0] 8017c12: 600b str r3, [r1, #0] 8017c14: 7812 ldrb r2, [r2, #0] 8017c16: 1e10 subs r0, r2, #0 8017c18: bf18 it ne 8017c1a: 2001 movne r0, #1 8017c1c: b002 add sp, #8 8017c1e: 4770 bx lr 8017c20: 4610 mov r0, r2 8017c22: e7fb b.n 8017c1c <__ascii_mbtowc+0x16> 8017c24: f06f 0001 mvn.w r0, #1 8017c28: e7f8 b.n 8017c1c <__ascii_mbtowc+0x16> 08017c2a <_realloc_r>: 8017c2a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8017c2e: 4607 mov r7, r0 8017c30: 4614 mov r4, r2 8017c32: 460d mov r5, r1 8017c34: b921 cbnz r1, 8017c40 <_realloc_r+0x16> 8017c36: 4611 mov r1, r2 8017c38: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8017c3c: f7ff b986 b.w 8016f4c <_malloc_r> 8017c40: b92a cbnz r2, 8017c4e <_realloc_r+0x24> 8017c42: f7ff f911 bl 8016e68 <_free_r> 8017c46: 4625 mov r5, r4 8017c48: 4628 mov r0, r5 8017c4a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8017c4e: f000 fa3f bl 80180d0 <_malloc_usable_size_r> 8017c52: 4284 cmp r4, r0 8017c54: 4606 mov r6, r0 8017c56: d802 bhi.n 8017c5e <_realloc_r+0x34> 8017c58: ebb4 0f50 cmp.w r4, r0, lsr #1 8017c5c: d8f4 bhi.n 8017c48 <_realloc_r+0x1e> 8017c5e: 4621 mov r1, r4 8017c60: 4638 mov r0, r7 8017c62: f7ff f973 bl 8016f4c <_malloc_r> 8017c66: 4680 mov r8, r0 8017c68: b908 cbnz r0, 8017c6e <_realloc_r+0x44> 8017c6a: 4645 mov r5, r8 8017c6c: e7ec b.n 8017c48 <_realloc_r+0x1e> 8017c6e: 42b4 cmp r4, r6 8017c70: 4622 mov r2, r4 8017c72: 4629 mov r1, r5 8017c74: bf28 it cs 8017c76: 4632 movcs r2, r6 8017c78: f7fe fa6d bl 8016156 8017c7c: 4629 mov r1, r5 8017c7e: 4638 mov r0, r7 8017c80: f7ff f8f2 bl 8016e68 <_free_r> 8017c84: e7f1 b.n 8017c6a <_realloc_r+0x40> 08017c86 <__ascii_wctomb>: 8017c86: 4603 mov r3, r0 8017c88: 4608 mov r0, r1 8017c8a: b141 cbz r1, 8017c9e <__ascii_wctomb+0x18> 8017c8c: 2aff cmp r2, #255 @ 0xff 8017c8e: d904 bls.n 8017c9a <__ascii_wctomb+0x14> 8017c90: 228a movs r2, #138 @ 0x8a 8017c92: f04f 30ff mov.w r0, #4294967295 8017c96: 601a str r2, [r3, #0] 8017c98: 4770 bx lr 8017c9a: 2001 movs r0, #1 8017c9c: 700a strb r2, [r1, #0] 8017c9e: 4770 bx lr 08017ca0 <__sfputc_r>: 8017ca0: 6893 ldr r3, [r2, #8] 8017ca2: b410 push {r4} 8017ca4: 3b01 subs r3, #1 8017ca6: 2b00 cmp r3, #0 8017ca8: 6093 str r3, [r2, #8] 8017caa: da07 bge.n 8017cbc <__sfputc_r+0x1c> 8017cac: 6994 ldr r4, [r2, #24] 8017cae: 42a3 cmp r3, r4 8017cb0: db01 blt.n 8017cb6 <__sfputc_r+0x16> 8017cb2: 290a cmp r1, #10 8017cb4: d102 bne.n 8017cbc <__sfputc_r+0x1c> 8017cb6: bc10 pop {r4} 8017cb8: f000 b932 b.w 8017f20 <__swbuf_r> 8017cbc: 6813 ldr r3, [r2, #0] 8017cbe: 1c58 adds r0, r3, #1 8017cc0: 6010 str r0, [r2, #0] 8017cc2: 7019 strb r1, [r3, #0] 8017cc4: 4608 mov r0, r1 8017cc6: bc10 pop {r4} 8017cc8: 4770 bx lr 08017cca <__sfputs_r>: 8017cca: b5f8 push {r3, r4, r5, r6, r7, lr} 8017ccc: 4606 mov r6, r0 8017cce: 460f mov r7, r1 8017cd0: 4614 mov r4, r2 8017cd2: 18d5 adds r5, r2, r3 8017cd4: 42ac cmp r4, r5 8017cd6: d101 bne.n 8017cdc <__sfputs_r+0x12> 8017cd8: 2000 movs r0, #0 8017cda: e007 b.n 8017cec <__sfputs_r+0x22> 8017cdc: 463a mov r2, r7 8017cde: 4630 mov r0, r6 8017ce0: f814 1b01 ldrb.w r1, [r4], #1 8017ce4: f7ff ffdc bl 8017ca0 <__sfputc_r> 8017ce8: 1c43 adds r3, r0, #1 8017cea: d1f3 bne.n 8017cd4 <__sfputs_r+0xa> 8017cec: bdf8 pop {r3, r4, r5, r6, r7, pc} ... 08017cf0 <_vfiprintf_r>: 8017cf0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8017cf4: 460d mov r5, r1 8017cf6: 4614 mov r4, r2 8017cf8: 4698 mov r8, r3 8017cfa: 4606 mov r6, r0 8017cfc: b09d sub sp, #116 @ 0x74 8017cfe: b118 cbz r0, 8017d08 <_vfiprintf_r+0x18> 8017d00: 6a03 ldr r3, [r0, #32] 8017d02: b90b cbnz r3, 8017d08 <_vfiprintf_r+0x18> 8017d04: f7fe f8e4 bl 8015ed0 <__sinit> 8017d08: 6e6b ldr r3, [r5, #100] @ 0x64 8017d0a: 07d9 lsls r1, r3, #31 8017d0c: d405 bmi.n 8017d1a <_vfiprintf_r+0x2a> 8017d0e: 89ab ldrh r3, [r5, #12] 8017d10: 059a lsls r2, r3, #22 8017d12: d402 bmi.n 8017d1a <_vfiprintf_r+0x2a> 8017d14: 6da8 ldr r0, [r5, #88] @ 0x58 8017d16: f7fe fa0e bl 8016136 <__retarget_lock_acquire_recursive> 8017d1a: 89ab ldrh r3, [r5, #12] 8017d1c: 071b lsls r3, r3, #28 8017d1e: d501 bpl.n 8017d24 <_vfiprintf_r+0x34> 8017d20: 692b ldr r3, [r5, #16] 8017d22: b99b cbnz r3, 8017d4c <_vfiprintf_r+0x5c> 8017d24: 4629 mov r1, r5 8017d26: 4630 mov r0, r6 8017d28: f000 f938 bl 8017f9c <__swsetup_r> 8017d2c: b170 cbz r0, 8017d4c <_vfiprintf_r+0x5c> 8017d2e: 6e6b ldr r3, [r5, #100] @ 0x64 8017d30: 07dc lsls r4, r3, #31 8017d32: d504 bpl.n 8017d3e <_vfiprintf_r+0x4e> 8017d34: f04f 30ff mov.w r0, #4294967295 8017d38: b01d add sp, #116 @ 0x74 8017d3a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8017d3e: 89ab ldrh r3, [r5, #12] 8017d40: 0598 lsls r0, r3, #22 8017d42: d4f7 bmi.n 8017d34 <_vfiprintf_r+0x44> 8017d44: 6da8 ldr r0, [r5, #88] @ 0x58 8017d46: f7fe f9f7 bl 8016138 <__retarget_lock_release_recursive> 8017d4a: e7f3 b.n 8017d34 <_vfiprintf_r+0x44> 8017d4c: 2300 movs r3, #0 8017d4e: 9309 str r3, [sp, #36] @ 0x24 8017d50: 2320 movs r3, #32 8017d52: f88d 3029 strb.w r3, [sp, #41] @ 0x29 8017d56: 2330 movs r3, #48 @ 0x30 8017d58: f04f 0901 mov.w r9, #1 8017d5c: f8cd 800c str.w r8, [sp, #12] 8017d60: f8df 81a8 ldr.w r8, [pc, #424] @ 8017f0c <_vfiprintf_r+0x21c> 8017d64: f88d 302a strb.w r3, [sp, #42] @ 0x2a 8017d68: 4623 mov r3, r4 8017d6a: 469a mov sl, r3 8017d6c: f813 2b01 ldrb.w r2, [r3], #1 8017d70: b10a cbz r2, 8017d76 <_vfiprintf_r+0x86> 8017d72: 2a25 cmp r2, #37 @ 0x25 8017d74: d1f9 bne.n 8017d6a <_vfiprintf_r+0x7a> 8017d76: ebba 0b04 subs.w fp, sl, r4 8017d7a: d00b beq.n 8017d94 <_vfiprintf_r+0xa4> 8017d7c: 465b mov r3, fp 8017d7e: 4622 mov r2, r4 8017d80: 4629 mov r1, r5 8017d82: 4630 mov r0, r6 8017d84: f7ff ffa1 bl 8017cca <__sfputs_r> 8017d88: 3001 adds r0, #1 8017d8a: f000 80a7 beq.w 8017edc <_vfiprintf_r+0x1ec> 8017d8e: 9a09 ldr r2, [sp, #36] @ 0x24 8017d90: 445a add r2, fp 8017d92: 9209 str r2, [sp, #36] @ 0x24 8017d94: f89a 3000 ldrb.w r3, [sl] 8017d98: 2b00 cmp r3, #0 8017d9a: f000 809f beq.w 8017edc <_vfiprintf_r+0x1ec> 8017d9e: 2300 movs r3, #0 8017da0: f04f 32ff mov.w r2, #4294967295 8017da4: e9cd 2305 strd r2, r3, [sp, #20] 8017da8: f10a 0a01 add.w sl, sl, #1 8017dac: 9304 str r3, [sp, #16] 8017dae: 9307 str r3, [sp, #28] 8017db0: f88d 3053 strb.w r3, [sp, #83] @ 0x53 8017db4: 931a str r3, [sp, #104] @ 0x68 8017db6: 4654 mov r4, sl 8017db8: 2205 movs r2, #5 8017dba: f814 1b01 ldrb.w r1, [r4], #1 8017dbe: 4853 ldr r0, [pc, #332] @ (8017f0c <_vfiprintf_r+0x21c>) 8017dc0: f7fe f9bb bl 801613a 8017dc4: 9a04 ldr r2, [sp, #16] 8017dc6: b9d8 cbnz r0, 8017e00 <_vfiprintf_r+0x110> 8017dc8: 06d1 lsls r1, r2, #27 8017dca: bf44 itt mi 8017dcc: 2320 movmi r3, #32 8017dce: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 8017dd2: 0713 lsls r3, r2, #28 8017dd4: bf44 itt mi 8017dd6: 232b movmi r3, #43 @ 0x2b 8017dd8: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 8017ddc: f89a 3000 ldrb.w r3, [sl] 8017de0: 2b2a cmp r3, #42 @ 0x2a 8017de2: d015 beq.n 8017e10 <_vfiprintf_r+0x120> 8017de4: 4654 mov r4, sl 8017de6: 2000 movs r0, #0 8017de8: f04f 0c0a mov.w ip, #10 8017dec: 9a07 ldr r2, [sp, #28] 8017dee: 4621 mov r1, r4 8017df0: f811 3b01 ldrb.w r3, [r1], #1 8017df4: 3b30 subs r3, #48 @ 0x30 8017df6: 2b09 cmp r3, #9 8017df8: d94b bls.n 8017e92 <_vfiprintf_r+0x1a2> 8017dfa: b1b0 cbz r0, 8017e2a <_vfiprintf_r+0x13a> 8017dfc: 9207 str r2, [sp, #28] 8017dfe: e014 b.n 8017e2a <_vfiprintf_r+0x13a> 8017e00: eba0 0308 sub.w r3, r0, r8 8017e04: fa09 f303 lsl.w r3, r9, r3 8017e08: 4313 orrs r3, r2 8017e0a: 46a2 mov sl, r4 8017e0c: 9304 str r3, [sp, #16] 8017e0e: e7d2 b.n 8017db6 <_vfiprintf_r+0xc6> 8017e10: 9b03 ldr r3, [sp, #12] 8017e12: 1d19 adds r1, r3, #4 8017e14: 681b ldr r3, [r3, #0] 8017e16: 9103 str r1, [sp, #12] 8017e18: 2b00 cmp r3, #0 8017e1a: bfbb ittet lt 8017e1c: 425b neglt r3, r3 8017e1e: f042 0202 orrlt.w r2, r2, #2 8017e22: 9307 strge r3, [sp, #28] 8017e24: 9307 strlt r3, [sp, #28] 8017e26: bfb8 it lt 8017e28: 9204 strlt r2, [sp, #16] 8017e2a: 7823 ldrb r3, [r4, #0] 8017e2c: 2b2e cmp r3, #46 @ 0x2e 8017e2e: d10a bne.n 8017e46 <_vfiprintf_r+0x156> 8017e30: 7863 ldrb r3, [r4, #1] 8017e32: 2b2a cmp r3, #42 @ 0x2a 8017e34: d132 bne.n 8017e9c <_vfiprintf_r+0x1ac> 8017e36: 9b03 ldr r3, [sp, #12] 8017e38: 3402 adds r4, #2 8017e3a: 1d1a adds r2, r3, #4 8017e3c: 681b ldr r3, [r3, #0] 8017e3e: 9203 str r2, [sp, #12] 8017e40: ea43 73e3 orr.w r3, r3, r3, asr #31 8017e44: 9305 str r3, [sp, #20] 8017e46: f8df a0c8 ldr.w sl, [pc, #200] @ 8017f10 <_vfiprintf_r+0x220> 8017e4a: 2203 movs r2, #3 8017e4c: 4650 mov r0, sl 8017e4e: 7821 ldrb r1, [r4, #0] 8017e50: f7fe f973 bl 801613a 8017e54: b138 cbz r0, 8017e66 <_vfiprintf_r+0x176> 8017e56: 2240 movs r2, #64 @ 0x40 8017e58: 9b04 ldr r3, [sp, #16] 8017e5a: eba0 000a sub.w r0, r0, sl 8017e5e: 4082 lsls r2, r0 8017e60: 4313 orrs r3, r2 8017e62: 3401 adds r4, #1 8017e64: 9304 str r3, [sp, #16] 8017e66: f814 1b01 ldrb.w r1, [r4], #1 8017e6a: 2206 movs r2, #6 8017e6c: 4829 ldr r0, [pc, #164] @ (8017f14 <_vfiprintf_r+0x224>) 8017e6e: f88d 1028 strb.w r1, [sp, #40] @ 0x28 8017e72: f7fe f962 bl 801613a 8017e76: 2800 cmp r0, #0 8017e78: d03f beq.n 8017efa <_vfiprintf_r+0x20a> 8017e7a: 4b27 ldr r3, [pc, #156] @ (8017f18 <_vfiprintf_r+0x228>) 8017e7c: bb1b cbnz r3, 8017ec6 <_vfiprintf_r+0x1d6> 8017e7e: 9b03 ldr r3, [sp, #12] 8017e80: 3307 adds r3, #7 8017e82: f023 0307 bic.w r3, r3, #7 8017e86: 3308 adds r3, #8 8017e88: 9303 str r3, [sp, #12] 8017e8a: 9b09 ldr r3, [sp, #36] @ 0x24 8017e8c: 443b add r3, r7 8017e8e: 9309 str r3, [sp, #36] @ 0x24 8017e90: e76a b.n 8017d68 <_vfiprintf_r+0x78> 8017e92: 460c mov r4, r1 8017e94: 2001 movs r0, #1 8017e96: fb0c 3202 mla r2, ip, r2, r3 8017e9a: e7a8 b.n 8017dee <_vfiprintf_r+0xfe> 8017e9c: 2300 movs r3, #0 8017e9e: f04f 0c0a mov.w ip, #10 8017ea2: 4619 mov r1, r3 8017ea4: 3401 adds r4, #1 8017ea6: 9305 str r3, [sp, #20] 8017ea8: 4620 mov r0, r4 8017eaa: f810 2b01 ldrb.w r2, [r0], #1 8017eae: 3a30 subs r2, #48 @ 0x30 8017eb0: 2a09 cmp r2, #9 8017eb2: d903 bls.n 8017ebc <_vfiprintf_r+0x1cc> 8017eb4: 2b00 cmp r3, #0 8017eb6: d0c6 beq.n 8017e46 <_vfiprintf_r+0x156> 8017eb8: 9105 str r1, [sp, #20] 8017eba: e7c4 b.n 8017e46 <_vfiprintf_r+0x156> 8017ebc: 4604 mov r4, r0 8017ebe: 2301 movs r3, #1 8017ec0: fb0c 2101 mla r1, ip, r1, r2 8017ec4: e7f0 b.n 8017ea8 <_vfiprintf_r+0x1b8> 8017ec6: ab03 add r3, sp, #12 8017ec8: 9300 str r3, [sp, #0] 8017eca: 462a mov r2, r5 8017ecc: 4630 mov r0, r6 8017ece: 4b13 ldr r3, [pc, #76] @ (8017f1c <_vfiprintf_r+0x22c>) 8017ed0: a904 add r1, sp, #16 8017ed2: f7fd fbb5 bl 8015640 <_printf_float> 8017ed6: 4607 mov r7, r0 8017ed8: 1c78 adds r0, r7, #1 8017eda: d1d6 bne.n 8017e8a <_vfiprintf_r+0x19a> 8017edc: 6e6b ldr r3, [r5, #100] @ 0x64 8017ede: 07d9 lsls r1, r3, #31 8017ee0: d405 bmi.n 8017eee <_vfiprintf_r+0x1fe> 8017ee2: 89ab ldrh r3, [r5, #12] 8017ee4: 059a lsls r2, r3, #22 8017ee6: d402 bmi.n 8017eee <_vfiprintf_r+0x1fe> 8017ee8: 6da8 ldr r0, [r5, #88] @ 0x58 8017eea: f7fe f925 bl 8016138 <__retarget_lock_release_recursive> 8017eee: 89ab ldrh r3, [r5, #12] 8017ef0: 065b lsls r3, r3, #25 8017ef2: f53f af1f bmi.w 8017d34 <_vfiprintf_r+0x44> 8017ef6: 9809 ldr r0, [sp, #36] @ 0x24 8017ef8: e71e b.n 8017d38 <_vfiprintf_r+0x48> 8017efa: ab03 add r3, sp, #12 8017efc: 9300 str r3, [sp, #0] 8017efe: 462a mov r2, r5 8017f00: 4630 mov r0, r6 8017f02: 4b06 ldr r3, [pc, #24] @ (8017f1c <_vfiprintf_r+0x22c>) 8017f04: a904 add r1, sp, #16 8017f06: f7fd fe39 bl 8015b7c <_printf_i> 8017f0a: e7e4 b.n 8017ed6 <_vfiprintf_r+0x1e6> 8017f0c: 08019136 .word 0x08019136 8017f10: 0801913c .word 0x0801913c 8017f14: 08019140 .word 0x08019140 8017f18: 08015641 .word 0x08015641 8017f1c: 08017ccb .word 0x08017ccb 08017f20 <__swbuf_r>: 8017f20: b5f8 push {r3, r4, r5, r6, r7, lr} 8017f22: 460e mov r6, r1 8017f24: 4614 mov r4, r2 8017f26: 4605 mov r5, r0 8017f28: b118 cbz r0, 8017f32 <__swbuf_r+0x12> 8017f2a: 6a03 ldr r3, [r0, #32] 8017f2c: b90b cbnz r3, 8017f32 <__swbuf_r+0x12> 8017f2e: f7fd ffcf bl 8015ed0 <__sinit> 8017f32: 69a3 ldr r3, [r4, #24] 8017f34: 60a3 str r3, [r4, #8] 8017f36: 89a3 ldrh r3, [r4, #12] 8017f38: 071a lsls r2, r3, #28 8017f3a: d501 bpl.n 8017f40 <__swbuf_r+0x20> 8017f3c: 6923 ldr r3, [r4, #16] 8017f3e: b943 cbnz r3, 8017f52 <__swbuf_r+0x32> 8017f40: 4621 mov r1, r4 8017f42: 4628 mov r0, r5 8017f44: f000 f82a bl 8017f9c <__swsetup_r> 8017f48: b118 cbz r0, 8017f52 <__swbuf_r+0x32> 8017f4a: f04f 37ff mov.w r7, #4294967295 8017f4e: 4638 mov r0, r7 8017f50: bdf8 pop {r3, r4, r5, r6, r7, pc} 8017f52: 6823 ldr r3, [r4, #0] 8017f54: 6922 ldr r2, [r4, #16] 8017f56: b2f6 uxtb r6, r6 8017f58: 1a98 subs r0, r3, r2 8017f5a: 6963 ldr r3, [r4, #20] 8017f5c: 4637 mov r7, r6 8017f5e: 4283 cmp r3, r0 8017f60: dc05 bgt.n 8017f6e <__swbuf_r+0x4e> 8017f62: 4621 mov r1, r4 8017f64: 4628 mov r0, r5 8017f66: f7ff fdcf bl 8017b08 <_fflush_r> 8017f6a: 2800 cmp r0, #0 8017f6c: d1ed bne.n 8017f4a <__swbuf_r+0x2a> 8017f6e: 68a3 ldr r3, [r4, #8] 8017f70: 3b01 subs r3, #1 8017f72: 60a3 str r3, [r4, #8] 8017f74: 6823 ldr r3, [r4, #0] 8017f76: 1c5a adds r2, r3, #1 8017f78: 6022 str r2, [r4, #0] 8017f7a: 701e strb r6, [r3, #0] 8017f7c: 6962 ldr r2, [r4, #20] 8017f7e: 1c43 adds r3, r0, #1 8017f80: 429a cmp r2, r3 8017f82: d004 beq.n 8017f8e <__swbuf_r+0x6e> 8017f84: 89a3 ldrh r3, [r4, #12] 8017f86: 07db lsls r3, r3, #31 8017f88: d5e1 bpl.n 8017f4e <__swbuf_r+0x2e> 8017f8a: 2e0a cmp r6, #10 8017f8c: d1df bne.n 8017f4e <__swbuf_r+0x2e> 8017f8e: 4621 mov r1, r4 8017f90: 4628 mov r0, r5 8017f92: f7ff fdb9 bl 8017b08 <_fflush_r> 8017f96: 2800 cmp r0, #0 8017f98: d0d9 beq.n 8017f4e <__swbuf_r+0x2e> 8017f9a: e7d6 b.n 8017f4a <__swbuf_r+0x2a> 08017f9c <__swsetup_r>: 8017f9c: b538 push {r3, r4, r5, lr} 8017f9e: 4b29 ldr r3, [pc, #164] @ (8018044 <__swsetup_r+0xa8>) 8017fa0: 4605 mov r5, r0 8017fa2: 6818 ldr r0, [r3, #0] 8017fa4: 460c mov r4, r1 8017fa6: b118 cbz r0, 8017fb0 <__swsetup_r+0x14> 8017fa8: 6a03 ldr r3, [r0, #32] 8017faa: b90b cbnz r3, 8017fb0 <__swsetup_r+0x14> 8017fac: f7fd ff90 bl 8015ed0 <__sinit> 8017fb0: f9b4 300c ldrsh.w r3, [r4, #12] 8017fb4: 0719 lsls r1, r3, #28 8017fb6: d422 bmi.n 8017ffe <__swsetup_r+0x62> 8017fb8: 06da lsls r2, r3, #27 8017fba: d407 bmi.n 8017fcc <__swsetup_r+0x30> 8017fbc: 2209 movs r2, #9 8017fbe: 602a str r2, [r5, #0] 8017fc0: f043 0340 orr.w r3, r3, #64 @ 0x40 8017fc4: f04f 30ff mov.w r0, #4294967295 8017fc8: 81a3 strh r3, [r4, #12] 8017fca: e033 b.n 8018034 <__swsetup_r+0x98> 8017fcc: 0758 lsls r0, r3, #29 8017fce: d512 bpl.n 8017ff6 <__swsetup_r+0x5a> 8017fd0: 6b61 ldr r1, [r4, #52] @ 0x34 8017fd2: b141 cbz r1, 8017fe6 <__swsetup_r+0x4a> 8017fd4: f104 0344 add.w r3, r4, #68 @ 0x44 8017fd8: 4299 cmp r1, r3 8017fda: d002 beq.n 8017fe2 <__swsetup_r+0x46> 8017fdc: 4628 mov r0, r5 8017fde: f7fe ff43 bl 8016e68 <_free_r> 8017fe2: 2300 movs r3, #0 8017fe4: 6363 str r3, [r4, #52] @ 0x34 8017fe6: 89a3 ldrh r3, [r4, #12] 8017fe8: f023 0324 bic.w r3, r3, #36 @ 0x24 8017fec: 81a3 strh r3, [r4, #12] 8017fee: 2300 movs r3, #0 8017ff0: 6063 str r3, [r4, #4] 8017ff2: 6923 ldr r3, [r4, #16] 8017ff4: 6023 str r3, [r4, #0] 8017ff6: 89a3 ldrh r3, [r4, #12] 8017ff8: f043 0308 orr.w r3, r3, #8 8017ffc: 81a3 strh r3, [r4, #12] 8017ffe: 6923 ldr r3, [r4, #16] 8018000: b94b cbnz r3, 8018016 <__swsetup_r+0x7a> 8018002: 89a3 ldrh r3, [r4, #12] 8018004: f403 7320 and.w r3, r3, #640 @ 0x280 8018008: f5b3 7f00 cmp.w r3, #512 @ 0x200 801800c: d003 beq.n 8018016 <__swsetup_r+0x7a> 801800e: 4621 mov r1, r4 8018010: 4628 mov r0, r5 8018012: f000 f88a bl 801812a <__smakebuf_r> 8018016: f9b4 300c ldrsh.w r3, [r4, #12] 801801a: f013 0201 ands.w r2, r3, #1 801801e: d00a beq.n 8018036 <__swsetup_r+0x9a> 8018020: 2200 movs r2, #0 8018022: 60a2 str r2, [r4, #8] 8018024: 6962 ldr r2, [r4, #20] 8018026: 4252 negs r2, r2 8018028: 61a2 str r2, [r4, #24] 801802a: 6922 ldr r2, [r4, #16] 801802c: b942 cbnz r2, 8018040 <__swsetup_r+0xa4> 801802e: f013 0080 ands.w r0, r3, #128 @ 0x80 8018032: d1c5 bne.n 8017fc0 <__swsetup_r+0x24> 8018034: bd38 pop {r3, r4, r5, pc} 8018036: 0799 lsls r1, r3, #30 8018038: bf58 it pl 801803a: 6962 ldrpl r2, [r4, #20] 801803c: 60a2 str r2, [r4, #8] 801803e: e7f4 b.n 801802a <__swsetup_r+0x8e> 8018040: 2000 movs r0, #0 8018042: e7f7 b.n 8018034 <__swsetup_r+0x98> 8018044: 2000009c .word 0x2000009c 08018048 <_raise_r>: 8018048: 291f cmp r1, #31 801804a: b538 push {r3, r4, r5, lr} 801804c: 4605 mov r5, r0 801804e: 460c mov r4, r1 8018050: d904 bls.n 801805c <_raise_r+0x14> 8018052: 2316 movs r3, #22 8018054: 6003 str r3, [r0, #0] 8018056: f04f 30ff mov.w r0, #4294967295 801805a: bd38 pop {r3, r4, r5, pc} 801805c: 6bc2 ldr r2, [r0, #60] @ 0x3c 801805e: b112 cbz r2, 8018066 <_raise_r+0x1e> 8018060: f852 3021 ldr.w r3, [r2, r1, lsl #2] 8018064: b94b cbnz r3, 801807a <_raise_r+0x32> 8018066: 4628 mov r0, r5 8018068: f000 f830 bl 80180cc <_getpid_r> 801806c: 4622 mov r2, r4 801806e: 4601 mov r1, r0 8018070: 4628 mov r0, r5 8018072: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8018076: f000 b817 b.w 80180a8 <_kill_r> 801807a: 2b01 cmp r3, #1 801807c: d00a beq.n 8018094 <_raise_r+0x4c> 801807e: 1c59 adds r1, r3, #1 8018080: d103 bne.n 801808a <_raise_r+0x42> 8018082: 2316 movs r3, #22 8018084: 6003 str r3, [r0, #0] 8018086: 2001 movs r0, #1 8018088: e7e7 b.n 801805a <_raise_r+0x12> 801808a: 2100 movs r1, #0 801808c: 4620 mov r0, r4 801808e: f842 1024 str.w r1, [r2, r4, lsl #2] 8018092: 4798 blx r3 8018094: 2000 movs r0, #0 8018096: e7e0 b.n 801805a <_raise_r+0x12> 08018098 : 8018098: 4b02 ldr r3, [pc, #8] @ (80180a4 ) 801809a: 4601 mov r1, r0 801809c: 6818 ldr r0, [r3, #0] 801809e: f7ff bfd3 b.w 8018048 <_raise_r> 80180a2: bf00 nop 80180a4: 2000009c .word 0x2000009c 080180a8 <_kill_r>: 80180a8: b538 push {r3, r4, r5, lr} 80180aa: 2300 movs r3, #0 80180ac: 4d06 ldr r5, [pc, #24] @ (80180c8 <_kill_r+0x20>) 80180ae: 4604 mov r4, r0 80180b0: 4608 mov r0, r1 80180b2: 4611 mov r1, r2 80180b4: 602b str r3, [r5, #0] 80180b6: f7f6 fd40 bl 800eb3a <_kill> 80180ba: 1c43 adds r3, r0, #1 80180bc: d102 bne.n 80180c4 <_kill_r+0x1c> 80180be: 682b ldr r3, [r5, #0] 80180c0: b103 cbz r3, 80180c4 <_kill_r+0x1c> 80180c2: 6023 str r3, [r4, #0] 80180c4: bd38 pop {r3, r4, r5, pc} 80180c6: bf00 nop 80180c8: 20001608 .word 0x20001608 080180cc <_getpid_r>: 80180cc: f7f6 bd2e b.w 800eb2c <_getpid> 080180d0 <_malloc_usable_size_r>: 80180d0: f851 3c04 ldr.w r3, [r1, #-4] 80180d4: 1f18 subs r0, r3, #4 80180d6: 2b00 cmp r3, #0 80180d8: bfbc itt lt 80180da: 580b ldrlt r3, [r1, r0] 80180dc: 18c0 addlt r0, r0, r3 80180de: 4770 bx lr 080180e0 <__swhatbuf_r>: 80180e0: b570 push {r4, r5, r6, lr} 80180e2: 460c mov r4, r1 80180e4: f9b1 100e ldrsh.w r1, [r1, #14] 80180e8: 4615 mov r5, r2 80180ea: 2900 cmp r1, #0 80180ec: 461e mov r6, r3 80180ee: b096 sub sp, #88 @ 0x58 80180f0: da0c bge.n 801810c <__swhatbuf_r+0x2c> 80180f2: 89a3 ldrh r3, [r4, #12] 80180f4: 2100 movs r1, #0 80180f6: f013 0f80 tst.w r3, #128 @ 0x80 80180fa: bf14 ite ne 80180fc: 2340 movne r3, #64 @ 0x40 80180fe: f44f 6380 moveq.w r3, #1024 @ 0x400 8018102: 2000 movs r0, #0 8018104: 6031 str r1, [r6, #0] 8018106: 602b str r3, [r5, #0] 8018108: b016 add sp, #88 @ 0x58 801810a: bd70 pop {r4, r5, r6, pc} 801810c: 466a mov r2, sp 801810e: f000 f849 bl 80181a4 <_fstat_r> 8018112: 2800 cmp r0, #0 8018114: dbed blt.n 80180f2 <__swhatbuf_r+0x12> 8018116: 9901 ldr r1, [sp, #4] 8018118: f401 4170 and.w r1, r1, #61440 @ 0xf000 801811c: f5a1 5300 sub.w r3, r1, #8192 @ 0x2000 8018120: 4259 negs r1, r3 8018122: 4159 adcs r1, r3 8018124: f44f 6380 mov.w r3, #1024 @ 0x400 8018128: e7eb b.n 8018102 <__swhatbuf_r+0x22> 0801812a <__smakebuf_r>: 801812a: 898b ldrh r3, [r1, #12] 801812c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 801812e: 079d lsls r5, r3, #30 8018130: 4606 mov r6, r0 8018132: 460c mov r4, r1 8018134: d507 bpl.n 8018146 <__smakebuf_r+0x1c> 8018136: f104 0347 add.w r3, r4, #71 @ 0x47 801813a: 6023 str r3, [r4, #0] 801813c: 6123 str r3, [r4, #16] 801813e: 2301 movs r3, #1 8018140: 6163 str r3, [r4, #20] 8018142: b003 add sp, #12 8018144: bdf0 pop {r4, r5, r6, r7, pc} 8018146: 466a mov r2, sp 8018148: ab01 add r3, sp, #4 801814a: f7ff ffc9 bl 80180e0 <__swhatbuf_r> 801814e: 9f00 ldr r7, [sp, #0] 8018150: 4605 mov r5, r0 8018152: 4639 mov r1, r7 8018154: 4630 mov r0, r6 8018156: f7fe fef9 bl 8016f4c <_malloc_r> 801815a: b948 cbnz r0, 8018170 <__smakebuf_r+0x46> 801815c: f9b4 300c ldrsh.w r3, [r4, #12] 8018160: 059a lsls r2, r3, #22 8018162: d4ee bmi.n 8018142 <__smakebuf_r+0x18> 8018164: f023 0303 bic.w r3, r3, #3 8018168: f043 0302 orr.w r3, r3, #2 801816c: 81a3 strh r3, [r4, #12] 801816e: e7e2 b.n 8018136 <__smakebuf_r+0xc> 8018170: 89a3 ldrh r3, [r4, #12] 8018172: e9c4 0704 strd r0, r7, [r4, #16] 8018176: f043 0380 orr.w r3, r3, #128 @ 0x80 801817a: 81a3 strh r3, [r4, #12] 801817c: 9b01 ldr r3, [sp, #4] 801817e: 6020 str r0, [r4, #0] 8018180: b15b cbz r3, 801819a <__smakebuf_r+0x70> 8018182: 4630 mov r0, r6 8018184: f9b4 100e ldrsh.w r1, [r4, #14] 8018188: f000 f81e bl 80181c8 <_isatty_r> 801818c: b128 cbz r0, 801819a <__smakebuf_r+0x70> 801818e: 89a3 ldrh r3, [r4, #12] 8018190: f023 0303 bic.w r3, r3, #3 8018194: f043 0301 orr.w r3, r3, #1 8018198: 81a3 strh r3, [r4, #12] 801819a: 89a3 ldrh r3, [r4, #12] 801819c: 431d orrs r5, r3 801819e: 81a5 strh r5, [r4, #12] 80181a0: e7cf b.n 8018142 <__smakebuf_r+0x18> ... 080181a4 <_fstat_r>: 80181a4: b538 push {r3, r4, r5, lr} 80181a6: 2300 movs r3, #0 80181a8: 4d06 ldr r5, [pc, #24] @ (80181c4 <_fstat_r+0x20>) 80181aa: 4604 mov r4, r0 80181ac: 4608 mov r0, r1 80181ae: 4611 mov r1, r2 80181b0: 602b str r3, [r5, #0] 80181b2: f7f6 fd05 bl 800ebc0 <_fstat> 80181b6: 1c43 adds r3, r0, #1 80181b8: d102 bne.n 80181c0 <_fstat_r+0x1c> 80181ba: 682b ldr r3, [r5, #0] 80181bc: b103 cbz r3, 80181c0 <_fstat_r+0x1c> 80181be: 6023 str r3, [r4, #0] 80181c0: bd38 pop {r3, r4, r5, pc} 80181c2: bf00 nop 80181c4: 20001608 .word 0x20001608 080181c8 <_isatty_r>: 80181c8: b538 push {r3, r4, r5, lr} 80181ca: 2300 movs r3, #0 80181cc: 4d05 ldr r5, [pc, #20] @ (80181e4 <_isatty_r+0x1c>) 80181ce: 4604 mov r4, r0 80181d0: 4608 mov r0, r1 80181d2: 602b str r3, [r5, #0] 80181d4: f7f6 fd03 bl 800ebde <_isatty> 80181d8: 1c43 adds r3, r0, #1 80181da: d102 bne.n 80181e2 <_isatty_r+0x1a> 80181dc: 682b ldr r3, [r5, #0] 80181de: b103 cbz r3, 80181e2 <_isatty_r+0x1a> 80181e0: 6023 str r3, [r4, #0] 80181e2: bd38 pop {r3, r4, r5, pc} 80181e4: 20001608 .word 0x20001608 080181e8 <_init>: 80181e8: b5f8 push {r3, r4, r5, r6, r7, lr} 80181ea: bf00 nop 80181ec: bcf8 pop {r3, r4, r5, r6, r7} 80181ee: bc08 pop {r3} 80181f0: 469e mov lr, r3 80181f2: 4770 bx lr 080181f4 <_fini>: 80181f4: b5f8 push {r3, r4, r5, r6, r7, lr} 80181f6: bf00 nop 80181f8: bcf8 pop {r3, r4, r5, r6, r7} 80181fa: bc08 pop {r3} 80181fc: 469e mov lr, r3 80181fe: 4770 bx lr