GbTModuleSW30Web.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e8 08008000 08008000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000e390 080081e8 080081e8 000011e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000bc4 08016578 08016578 0000f578 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0801713c 0801713c 0001124c 2**0 CONTENTS 4 .ARM 00000008 0801713c 0801713c 0001013c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 08017144 08017144 0001124c 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 08017144 08017144 00010144 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .fini_array 00000004 08017148 08017148 00010148 2**2 CONTENTS, ALLOC, LOAD, DATA 8 .data 0000024c 20000000 0801714c 00011000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 00000f8c 20000250 08017398 00011250 2**3 ALLOC 10 ._user_heap_stack 00000604 200011dc 08017398 000121dc 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 0001124c 2**0 CONTENTS, READONLY 12 .debug_info 0001c1a2 00000000 00000000 00011275 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 000058d4 00000000 00000000 0002d417 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00001768 00000000 00000000 00032cf0 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 000011ea 00000000 00000000 00034458 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 00026df4 00000000 00000000 00035642 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 00022491 00000000 00000000 0005c436 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000c989a 00000000 00000000 0007e8c7 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 00148161 2**0 CONTENTS, READONLY 20 .debug_frame 00006fbc 00000000 00000000 001481a4 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 0000006e 00000000 00000000 0014f160 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080081e8 <__do_global_dtors_aux>: 80081e8: b510 push {r4, lr} 80081ea: 4c05 ldr r4, [pc, #20] @ (8008200 <__do_global_dtors_aux+0x18>) 80081ec: 7823 ldrb r3, [r4, #0] 80081ee: b933 cbnz r3, 80081fe <__do_global_dtors_aux+0x16> 80081f0: 4b04 ldr r3, [pc, #16] @ (8008204 <__do_global_dtors_aux+0x1c>) 80081f2: b113 cbz r3, 80081fa <__do_global_dtors_aux+0x12> 80081f4: 4804 ldr r0, [pc, #16] @ (8008208 <__do_global_dtors_aux+0x20>) 80081f6: f3af 8000 nop.w 80081fa: 2301 movs r3, #1 80081fc: 7023 strb r3, [r4, #0] 80081fe: bd10 pop {r4, pc} 8008200: 20000250 .word 0x20000250 8008204: 00000000 .word 0x00000000 8008208: 08016560 .word 0x08016560 0800820c : 800820c: b508 push {r3, lr} 800820e: 4b03 ldr r3, [pc, #12] @ (800821c ) 8008210: b11b cbz r3, 800821a 8008212: 4903 ldr r1, [pc, #12] @ (8008220 ) 8008214: 4803 ldr r0, [pc, #12] @ (8008224 ) 8008216: f3af 8000 nop.w 800821a: bd08 pop {r3, pc} 800821c: 00000000 .word 0x00000000 8008220: 20000254 .word 0x20000254 8008224: 08016560 .word 0x08016560 08008228 : 8008228: 4603 mov r3, r0 800822a: f813 2b01 ldrb.w r2, [r3], #1 800822e: 2a00 cmp r2, #0 8008230: d1fb bne.n 800822a 8008232: 1a18 subs r0, r3, r0 8008234: 3801 subs r0, #1 8008236: 4770 bx lr 08008238 <__aeabi_drsub>: 8008238: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 800823c: e002 b.n 8008244 <__adddf3> 800823e: bf00 nop 08008240 <__aeabi_dsub>: 8008240: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 08008244 <__adddf3>: 8008244: b530 push {r4, r5, lr} 8008246: ea4f 0441 mov.w r4, r1, lsl #1 800824a: ea4f 0543 mov.w r5, r3, lsl #1 800824e: ea94 0f05 teq r4, r5 8008252: bf08 it eq 8008254: ea90 0f02 teqeq r0, r2 8008258: bf1f itttt ne 800825a: ea54 0c00 orrsne.w ip, r4, r0 800825e: ea55 0c02 orrsne.w ip, r5, r2 8008262: ea7f 5c64 mvnsne.w ip, r4, asr #21 8008266: ea7f 5c65 mvnsne.w ip, r5, asr #21 800826a: f000 80e2 beq.w 8008432 <__adddf3+0x1ee> 800826e: ea4f 5454 mov.w r4, r4, lsr #21 8008272: ebd4 5555 rsbs r5, r4, r5, lsr #21 8008276: bfb8 it lt 8008278: 426d neglt r5, r5 800827a: dd0c ble.n 8008296 <__adddf3+0x52> 800827c: 442c add r4, r5 800827e: ea80 0202 eor.w r2, r0, r2 8008282: ea81 0303 eor.w r3, r1, r3 8008286: ea82 0000 eor.w r0, r2, r0 800828a: ea83 0101 eor.w r1, r3, r1 800828e: ea80 0202 eor.w r2, r0, r2 8008292: ea81 0303 eor.w r3, r1, r3 8008296: 2d36 cmp r5, #54 @ 0x36 8008298: bf88 it hi 800829a: bd30 pophi {r4, r5, pc} 800829c: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 80082a0: ea4f 3101 mov.w r1, r1, lsl #12 80082a4: f44f 1c80 mov.w ip, #1048576 @ 0x100000 80082a8: ea4c 3111 orr.w r1, ip, r1, lsr #12 80082ac: d002 beq.n 80082b4 <__adddf3+0x70> 80082ae: 4240 negs r0, r0 80082b0: eb61 0141 sbc.w r1, r1, r1, lsl #1 80082b4: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 80082b8: ea4f 3303 mov.w r3, r3, lsl #12 80082bc: ea4c 3313 orr.w r3, ip, r3, lsr #12 80082c0: d002 beq.n 80082c8 <__adddf3+0x84> 80082c2: 4252 negs r2, r2 80082c4: eb63 0343 sbc.w r3, r3, r3, lsl #1 80082c8: ea94 0f05 teq r4, r5 80082cc: f000 80a7 beq.w 800841e <__adddf3+0x1da> 80082d0: f1a4 0401 sub.w r4, r4, #1 80082d4: f1d5 0e20 rsbs lr, r5, #32 80082d8: db0d blt.n 80082f6 <__adddf3+0xb2> 80082da: fa02 fc0e lsl.w ip, r2, lr 80082de: fa22 f205 lsr.w r2, r2, r5 80082e2: 1880 adds r0, r0, r2 80082e4: f141 0100 adc.w r1, r1, #0 80082e8: fa03 f20e lsl.w r2, r3, lr 80082ec: 1880 adds r0, r0, r2 80082ee: fa43 f305 asr.w r3, r3, r5 80082f2: 4159 adcs r1, r3 80082f4: e00e b.n 8008314 <__adddf3+0xd0> 80082f6: f1a5 0520 sub.w r5, r5, #32 80082fa: f10e 0e20 add.w lr, lr, #32 80082fe: 2a01 cmp r2, #1 8008300: fa03 fc0e lsl.w ip, r3, lr 8008304: bf28 it cs 8008306: f04c 0c02 orrcs.w ip, ip, #2 800830a: fa43 f305 asr.w r3, r3, r5 800830e: 18c0 adds r0, r0, r3 8008310: eb51 71e3 adcs.w r1, r1, r3, asr #31 8008314: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8008318: d507 bpl.n 800832a <__adddf3+0xe6> 800831a: f04f 0e00 mov.w lr, #0 800831e: f1dc 0c00 rsbs ip, ip, #0 8008322: eb7e 0000 sbcs.w r0, lr, r0 8008326: eb6e 0101 sbc.w r1, lr, r1 800832a: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 800832e: d31b bcc.n 8008368 <__adddf3+0x124> 8008330: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 8008334: d30c bcc.n 8008350 <__adddf3+0x10c> 8008336: 0849 lsrs r1, r1, #1 8008338: ea5f 0030 movs.w r0, r0, rrx 800833c: ea4f 0c3c mov.w ip, ip, rrx 8008340: f104 0401 add.w r4, r4, #1 8008344: ea4f 5244 mov.w r2, r4, lsl #21 8008348: f512 0f80 cmn.w r2, #4194304 @ 0x400000 800834c: f080 809a bcs.w 8008484 <__adddf3+0x240> 8008350: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8008354: bf08 it eq 8008356: ea5f 0c50 movseq.w ip, r0, lsr #1 800835a: f150 0000 adcs.w r0, r0, #0 800835e: eb41 5104 adc.w r1, r1, r4, lsl #20 8008362: ea41 0105 orr.w r1, r1, r5 8008366: bd30 pop {r4, r5, pc} 8008368: ea5f 0c4c movs.w ip, ip, lsl #1 800836c: 4140 adcs r0, r0 800836e: eb41 0101 adc.w r1, r1, r1 8008372: 3c01 subs r4, #1 8008374: bf28 it cs 8008376: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 800837a: d2e9 bcs.n 8008350 <__adddf3+0x10c> 800837c: f091 0f00 teq r1, #0 8008380: bf04 itt eq 8008382: 4601 moveq r1, r0 8008384: 2000 moveq r0, #0 8008386: fab1 f381 clz r3, r1 800838a: bf08 it eq 800838c: 3320 addeq r3, #32 800838e: f1a3 030b sub.w r3, r3, #11 8008392: f1b3 0220 subs.w r2, r3, #32 8008396: da0c bge.n 80083b2 <__adddf3+0x16e> 8008398: 320c adds r2, #12 800839a: dd08 ble.n 80083ae <__adddf3+0x16a> 800839c: f102 0c14 add.w ip, r2, #20 80083a0: f1c2 020c rsb r2, r2, #12 80083a4: fa01 f00c lsl.w r0, r1, ip 80083a8: fa21 f102 lsr.w r1, r1, r2 80083ac: e00c b.n 80083c8 <__adddf3+0x184> 80083ae: f102 0214 add.w r2, r2, #20 80083b2: bfd8 it le 80083b4: f1c2 0c20 rsble ip, r2, #32 80083b8: fa01 f102 lsl.w r1, r1, r2 80083bc: fa20 fc0c lsr.w ip, r0, ip 80083c0: bfdc itt le 80083c2: ea41 010c orrle.w r1, r1, ip 80083c6: 4090 lslle r0, r2 80083c8: 1ae4 subs r4, r4, r3 80083ca: bfa2 ittt ge 80083cc: eb01 5104 addge.w r1, r1, r4, lsl #20 80083d0: 4329 orrge r1, r5 80083d2: bd30 popge {r4, r5, pc} 80083d4: ea6f 0404 mvn.w r4, r4 80083d8: 3c1f subs r4, #31 80083da: da1c bge.n 8008416 <__adddf3+0x1d2> 80083dc: 340c adds r4, #12 80083de: dc0e bgt.n 80083fe <__adddf3+0x1ba> 80083e0: f104 0414 add.w r4, r4, #20 80083e4: f1c4 0220 rsb r2, r4, #32 80083e8: fa20 f004 lsr.w r0, r0, r4 80083ec: fa01 f302 lsl.w r3, r1, r2 80083f0: ea40 0003 orr.w r0, r0, r3 80083f4: fa21 f304 lsr.w r3, r1, r4 80083f8: ea45 0103 orr.w r1, r5, r3 80083fc: bd30 pop {r4, r5, pc} 80083fe: f1c4 040c rsb r4, r4, #12 8008402: f1c4 0220 rsb r2, r4, #32 8008406: fa20 f002 lsr.w r0, r0, r2 800840a: fa01 f304 lsl.w r3, r1, r4 800840e: ea40 0003 orr.w r0, r0, r3 8008412: 4629 mov r1, r5 8008414: bd30 pop {r4, r5, pc} 8008416: fa21 f004 lsr.w r0, r1, r4 800841a: 4629 mov r1, r5 800841c: bd30 pop {r4, r5, pc} 800841e: f094 0f00 teq r4, #0 8008422: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 8008426: bf06 itte eq 8008428: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 800842c: 3401 addeq r4, #1 800842e: 3d01 subne r5, #1 8008430: e74e b.n 80082d0 <__adddf3+0x8c> 8008432: ea7f 5c64 mvns.w ip, r4, asr #21 8008436: bf18 it ne 8008438: ea7f 5c65 mvnsne.w ip, r5, asr #21 800843c: d029 beq.n 8008492 <__adddf3+0x24e> 800843e: ea94 0f05 teq r4, r5 8008442: bf08 it eq 8008444: ea90 0f02 teqeq r0, r2 8008448: d005 beq.n 8008456 <__adddf3+0x212> 800844a: ea54 0c00 orrs.w ip, r4, r0 800844e: bf04 itt eq 8008450: 4619 moveq r1, r3 8008452: 4610 moveq r0, r2 8008454: bd30 pop {r4, r5, pc} 8008456: ea91 0f03 teq r1, r3 800845a: bf1e ittt ne 800845c: 2100 movne r1, #0 800845e: 2000 movne r0, #0 8008460: bd30 popne {r4, r5, pc} 8008462: ea5f 5c54 movs.w ip, r4, lsr #21 8008466: d105 bne.n 8008474 <__adddf3+0x230> 8008468: 0040 lsls r0, r0, #1 800846a: 4149 adcs r1, r1 800846c: bf28 it cs 800846e: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 8008472: bd30 pop {r4, r5, pc} 8008474: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 8008478: bf3c itt cc 800847a: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 800847e: bd30 popcc {r4, r5, pc} 8008480: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8008484: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 8008488: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 800848c: f04f 0000 mov.w r0, #0 8008490: bd30 pop {r4, r5, pc} 8008492: ea7f 5c64 mvns.w ip, r4, asr #21 8008496: bf1a itte ne 8008498: 4619 movne r1, r3 800849a: 4610 movne r0, r2 800849c: ea7f 5c65 mvnseq.w ip, r5, asr #21 80084a0: bf1c itt ne 80084a2: 460b movne r3, r1 80084a4: 4602 movne r2, r0 80084a6: ea50 3401 orrs.w r4, r0, r1, lsl #12 80084aa: bf06 itte eq 80084ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80084b0: ea91 0f03 teqeq r1, r3 80084b4: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 80084b8: bd30 pop {r4, r5, pc} 80084ba: bf00 nop 080084bc <__aeabi_ui2d>: 80084bc: f090 0f00 teq r0, #0 80084c0: bf04 itt eq 80084c2: 2100 moveq r1, #0 80084c4: 4770 bxeq lr 80084c6: b530 push {r4, r5, lr} 80084c8: f44f 6480 mov.w r4, #1024 @ 0x400 80084cc: f104 0432 add.w r4, r4, #50 @ 0x32 80084d0: f04f 0500 mov.w r5, #0 80084d4: f04f 0100 mov.w r1, #0 80084d8: e750 b.n 800837c <__adddf3+0x138> 80084da: bf00 nop 080084dc <__aeabi_i2d>: 80084dc: f090 0f00 teq r0, #0 80084e0: bf04 itt eq 80084e2: 2100 moveq r1, #0 80084e4: 4770 bxeq lr 80084e6: b530 push {r4, r5, lr} 80084e8: f44f 6480 mov.w r4, #1024 @ 0x400 80084ec: f104 0432 add.w r4, r4, #50 @ 0x32 80084f0: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 80084f4: bf48 it mi 80084f6: 4240 negmi r0, r0 80084f8: f04f 0100 mov.w r1, #0 80084fc: e73e b.n 800837c <__adddf3+0x138> 80084fe: bf00 nop 08008500 <__aeabi_f2d>: 8008500: 0042 lsls r2, r0, #1 8008502: ea4f 01e2 mov.w r1, r2, asr #3 8008506: ea4f 0131 mov.w r1, r1, rrx 800850a: ea4f 7002 mov.w r0, r2, lsl #28 800850e: bf1f itttt ne 8008510: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 8008514: f093 4f7f teqne r3, #4278190080 @ 0xff000000 8008518: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 800851c: 4770 bxne lr 800851e: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 8008522: bf08 it eq 8008524: 4770 bxeq lr 8008526: f093 4f7f teq r3, #4278190080 @ 0xff000000 800852a: bf04 itt eq 800852c: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 8008530: 4770 bxeq lr 8008532: b530 push {r4, r5, lr} 8008534: f44f 7460 mov.w r4, #896 @ 0x380 8008538: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 800853c: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 8008540: e71c b.n 800837c <__adddf3+0x138> 8008542: bf00 nop 08008544 <__aeabi_ul2d>: 8008544: ea50 0201 orrs.w r2, r0, r1 8008548: bf08 it eq 800854a: 4770 bxeq lr 800854c: b530 push {r4, r5, lr} 800854e: f04f 0500 mov.w r5, #0 8008552: e00a b.n 800856a <__aeabi_l2d+0x16> 08008554 <__aeabi_l2d>: 8008554: ea50 0201 orrs.w r2, r0, r1 8008558: bf08 it eq 800855a: 4770 bxeq lr 800855c: b530 push {r4, r5, lr} 800855e: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 8008562: d502 bpl.n 800856a <__aeabi_l2d+0x16> 8008564: 4240 negs r0, r0 8008566: eb61 0141 sbc.w r1, r1, r1, lsl #1 800856a: f44f 6480 mov.w r4, #1024 @ 0x400 800856e: f104 0432 add.w r4, r4, #50 @ 0x32 8008572: ea5f 5c91 movs.w ip, r1, lsr #22 8008576: f43f aed8 beq.w 800832a <__adddf3+0xe6> 800857a: f04f 0203 mov.w r2, #3 800857e: ea5f 0cdc movs.w ip, ip, lsr #3 8008582: bf18 it ne 8008584: 3203 addne r2, #3 8008586: ea5f 0cdc movs.w ip, ip, lsr #3 800858a: bf18 it ne 800858c: 3203 addne r2, #3 800858e: eb02 02dc add.w r2, r2, ip, lsr #3 8008592: f1c2 0320 rsb r3, r2, #32 8008596: fa00 fc03 lsl.w ip, r0, r3 800859a: fa20 f002 lsr.w r0, r0, r2 800859e: fa01 fe03 lsl.w lr, r1, r3 80085a2: ea40 000e orr.w r0, r0, lr 80085a6: fa21 f102 lsr.w r1, r1, r2 80085aa: 4414 add r4, r2 80085ac: e6bd b.n 800832a <__adddf3+0xe6> 80085ae: bf00 nop 080085b0 <__aeabi_dmul>: 80085b0: b570 push {r4, r5, r6, lr} 80085b2: f04f 0cff mov.w ip, #255 @ 0xff 80085b6: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 80085ba: ea1c 5411 ands.w r4, ip, r1, lsr #20 80085be: bf1d ittte ne 80085c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80085c4: ea94 0f0c teqne r4, ip 80085c8: ea95 0f0c teqne r5, ip 80085cc: f000 f8de bleq 800878c <__aeabi_dmul+0x1dc> 80085d0: 442c add r4, r5 80085d2: ea81 0603 eor.w r6, r1, r3 80085d6: ea21 514c bic.w r1, r1, ip, lsl #21 80085da: ea23 534c bic.w r3, r3, ip, lsl #21 80085de: ea50 3501 orrs.w r5, r0, r1, lsl #12 80085e2: bf18 it ne 80085e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80085e8: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 80085ec: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 80085f0: d038 beq.n 8008664 <__aeabi_dmul+0xb4> 80085f2: fba0 ce02 umull ip, lr, r0, r2 80085f6: f04f 0500 mov.w r5, #0 80085fa: fbe1 e502 umlal lr, r5, r1, r2 80085fe: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 8008602: fbe0 e503 umlal lr, r5, r0, r3 8008606: f04f 0600 mov.w r6, #0 800860a: fbe1 5603 umlal r5, r6, r1, r3 800860e: f09c 0f00 teq ip, #0 8008612: bf18 it ne 8008614: f04e 0e01 orrne.w lr, lr, #1 8008618: f1a4 04ff sub.w r4, r4, #255 @ 0xff 800861c: f5b6 7f00 cmp.w r6, #512 @ 0x200 8008620: f564 7440 sbc.w r4, r4, #768 @ 0x300 8008624: d204 bcs.n 8008630 <__aeabi_dmul+0x80> 8008626: ea5f 0e4e movs.w lr, lr, lsl #1 800862a: 416d adcs r5, r5 800862c: eb46 0606 adc.w r6, r6, r6 8008630: ea42 21c6 orr.w r1, r2, r6, lsl #11 8008634: ea41 5155 orr.w r1, r1, r5, lsr #21 8008638: ea4f 20c5 mov.w r0, r5, lsl #11 800863c: ea40 505e orr.w r0, r0, lr, lsr #21 8008640: ea4f 2ece mov.w lr, lr, lsl #11 8008644: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8008648: bf88 it hi 800864a: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 800864e: d81e bhi.n 800868e <__aeabi_dmul+0xde> 8008650: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 8008654: bf08 it eq 8008656: ea5f 0e50 movseq.w lr, r0, lsr #1 800865a: f150 0000 adcs.w r0, r0, #0 800865e: eb41 5104 adc.w r1, r1, r4, lsl #20 8008662: bd70 pop {r4, r5, r6, pc} 8008664: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 8008668: ea46 0101 orr.w r1, r6, r1 800866c: ea40 0002 orr.w r0, r0, r2 8008670: ea81 0103 eor.w r1, r1, r3 8008674: ebb4 045c subs.w r4, r4, ip, lsr #1 8008678: bfc2 ittt gt 800867a: ebd4 050c rsbsgt r5, r4, ip 800867e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8008682: bd70 popgt {r4, r5, r6, pc} 8008684: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008688: f04f 0e00 mov.w lr, #0 800868c: 3c01 subs r4, #1 800868e: f300 80ab bgt.w 80087e8 <__aeabi_dmul+0x238> 8008692: f114 0f36 cmn.w r4, #54 @ 0x36 8008696: bfde ittt le 8008698: 2000 movle r0, #0 800869a: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 800869e: bd70 pople {r4, r5, r6, pc} 80086a0: f1c4 0400 rsb r4, r4, #0 80086a4: 3c20 subs r4, #32 80086a6: da35 bge.n 8008714 <__aeabi_dmul+0x164> 80086a8: 340c adds r4, #12 80086aa: dc1b bgt.n 80086e4 <__aeabi_dmul+0x134> 80086ac: f104 0414 add.w r4, r4, #20 80086b0: f1c4 0520 rsb r5, r4, #32 80086b4: fa00 f305 lsl.w r3, r0, r5 80086b8: fa20 f004 lsr.w r0, r0, r4 80086bc: fa01 f205 lsl.w r2, r1, r5 80086c0: ea40 0002 orr.w r0, r0, r2 80086c4: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 80086c8: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 80086cc: eb10 70d3 adds.w r0, r0, r3, lsr #31 80086d0: fa21 f604 lsr.w r6, r1, r4 80086d4: eb42 0106 adc.w r1, r2, r6 80086d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80086dc: bf08 it eq 80086de: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80086e2: bd70 pop {r4, r5, r6, pc} 80086e4: f1c4 040c rsb r4, r4, #12 80086e8: f1c4 0520 rsb r5, r4, #32 80086ec: fa00 f304 lsl.w r3, r0, r4 80086f0: fa20 f005 lsr.w r0, r0, r5 80086f4: fa01 f204 lsl.w r2, r1, r4 80086f8: ea40 0002 orr.w r0, r0, r2 80086fc: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8008700: eb10 70d3 adds.w r0, r0, r3, lsr #31 8008704: f141 0100 adc.w r1, r1, #0 8008708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 800870c: bf08 it eq 800870e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8008712: bd70 pop {r4, r5, r6, pc} 8008714: f1c4 0520 rsb r5, r4, #32 8008718: fa00 f205 lsl.w r2, r0, r5 800871c: ea4e 0e02 orr.w lr, lr, r2 8008720: fa20 f304 lsr.w r3, r0, r4 8008724: fa01 f205 lsl.w r2, r1, r5 8008728: ea43 0302 orr.w r3, r3, r2 800872c: fa21 f004 lsr.w r0, r1, r4 8008730: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8008734: fa21 f204 lsr.w r2, r1, r4 8008738: ea20 0002 bic.w r0, r0, r2 800873c: eb00 70d3 add.w r0, r0, r3, lsr #31 8008740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8008744: bf08 it eq 8008746: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800874a: bd70 pop {r4, r5, r6, pc} 800874c: f094 0f00 teq r4, #0 8008750: d10f bne.n 8008772 <__aeabi_dmul+0x1c2> 8008752: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 8008756: 0040 lsls r0, r0, #1 8008758: eb41 0101 adc.w r1, r1, r1 800875c: f411 1f80 tst.w r1, #1048576 @ 0x100000 8008760: bf08 it eq 8008762: 3c01 subeq r4, #1 8008764: d0f7 beq.n 8008756 <__aeabi_dmul+0x1a6> 8008766: ea41 0106 orr.w r1, r1, r6 800876a: f095 0f00 teq r5, #0 800876e: bf18 it ne 8008770: 4770 bxne lr 8008772: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 8008776: 0052 lsls r2, r2, #1 8008778: eb43 0303 adc.w r3, r3, r3 800877c: f413 1f80 tst.w r3, #1048576 @ 0x100000 8008780: bf08 it eq 8008782: 3d01 subeq r5, #1 8008784: d0f7 beq.n 8008776 <__aeabi_dmul+0x1c6> 8008786: ea43 0306 orr.w r3, r3, r6 800878a: 4770 bx lr 800878c: ea94 0f0c teq r4, ip 8008790: ea0c 5513 and.w r5, ip, r3, lsr #20 8008794: bf18 it ne 8008796: ea95 0f0c teqne r5, ip 800879a: d00c beq.n 80087b6 <__aeabi_dmul+0x206> 800879c: ea50 0641 orrs.w r6, r0, r1, lsl #1 80087a0: bf18 it ne 80087a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80087a6: d1d1 bne.n 800874c <__aeabi_dmul+0x19c> 80087a8: ea81 0103 eor.w r1, r1, r3 80087ac: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80087b0: f04f 0000 mov.w r0, #0 80087b4: bd70 pop {r4, r5, r6, pc} 80087b6: ea50 0641 orrs.w r6, r0, r1, lsl #1 80087ba: bf06 itte eq 80087bc: 4610 moveq r0, r2 80087be: 4619 moveq r1, r3 80087c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80087c4: d019 beq.n 80087fa <__aeabi_dmul+0x24a> 80087c6: ea94 0f0c teq r4, ip 80087ca: d102 bne.n 80087d2 <__aeabi_dmul+0x222> 80087cc: ea50 3601 orrs.w r6, r0, r1, lsl #12 80087d0: d113 bne.n 80087fa <__aeabi_dmul+0x24a> 80087d2: ea95 0f0c teq r5, ip 80087d6: d105 bne.n 80087e4 <__aeabi_dmul+0x234> 80087d8: ea52 3603 orrs.w r6, r2, r3, lsl #12 80087dc: bf1c itt ne 80087de: 4610 movne r0, r2 80087e0: 4619 movne r1, r3 80087e2: d10a bne.n 80087fa <__aeabi_dmul+0x24a> 80087e4: ea81 0103 eor.w r1, r1, r3 80087e8: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80087ec: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 80087f0: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 80087f4: f04f 0000 mov.w r0, #0 80087f8: bd70 pop {r4, r5, r6, pc} 80087fa: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 80087fe: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 8008802: bd70 pop {r4, r5, r6, pc} 08008804 <__aeabi_ddiv>: 8008804: b570 push {r4, r5, r6, lr} 8008806: f04f 0cff mov.w ip, #255 @ 0xff 800880a: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 800880e: ea1c 5411 ands.w r4, ip, r1, lsr #20 8008812: bf1d ittte ne 8008814: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8008818: ea94 0f0c teqne r4, ip 800881c: ea95 0f0c teqne r5, ip 8008820: f000 f8a7 bleq 8008972 <__aeabi_ddiv+0x16e> 8008824: eba4 0405 sub.w r4, r4, r5 8008828: ea81 0e03 eor.w lr, r1, r3 800882c: ea52 3503 orrs.w r5, r2, r3, lsl #12 8008830: ea4f 3101 mov.w r1, r1, lsl #12 8008834: f000 8088 beq.w 8008948 <__aeabi_ddiv+0x144> 8008838: ea4f 3303 mov.w r3, r3, lsl #12 800883c: f04f 5580 mov.w r5, #268435456 @ 0x10000000 8008840: ea45 1313 orr.w r3, r5, r3, lsr #4 8008844: ea43 6312 orr.w r3, r3, r2, lsr #24 8008848: ea4f 2202 mov.w r2, r2, lsl #8 800884c: ea45 1511 orr.w r5, r5, r1, lsr #4 8008850: ea45 6510 orr.w r5, r5, r0, lsr #24 8008854: ea4f 2600 mov.w r6, r0, lsl #8 8008858: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000 800885c: 429d cmp r5, r3 800885e: bf08 it eq 8008860: 4296 cmpeq r6, r2 8008862: f144 04fd adc.w r4, r4, #253 @ 0xfd 8008866: f504 7440 add.w r4, r4, #768 @ 0x300 800886a: d202 bcs.n 8008872 <__aeabi_ddiv+0x6e> 800886c: 085b lsrs r3, r3, #1 800886e: ea4f 0232 mov.w r2, r2, rrx 8008872: 1ab6 subs r6, r6, r2 8008874: eb65 0503 sbc.w r5, r5, r3 8008878: 085b lsrs r3, r3, #1 800887a: ea4f 0232 mov.w r2, r2, rrx 800887e: f44f 1080 mov.w r0, #1048576 @ 0x100000 8008882: f44f 2c00 mov.w ip, #524288 @ 0x80000 8008886: ebb6 0e02 subs.w lr, r6, r2 800888a: eb75 0e03 sbcs.w lr, r5, r3 800888e: bf22 ittt cs 8008890: 1ab6 subcs r6, r6, r2 8008892: 4675 movcs r5, lr 8008894: ea40 000c orrcs.w r0, r0, ip 8008898: 085b lsrs r3, r3, #1 800889a: ea4f 0232 mov.w r2, r2, rrx 800889e: ebb6 0e02 subs.w lr, r6, r2 80088a2: eb75 0e03 sbcs.w lr, r5, r3 80088a6: bf22 ittt cs 80088a8: 1ab6 subcs r6, r6, r2 80088aa: 4675 movcs r5, lr 80088ac: ea40 005c orrcs.w r0, r0, ip, lsr #1 80088b0: 085b lsrs r3, r3, #1 80088b2: ea4f 0232 mov.w r2, r2, rrx 80088b6: ebb6 0e02 subs.w lr, r6, r2 80088ba: eb75 0e03 sbcs.w lr, r5, r3 80088be: bf22 ittt cs 80088c0: 1ab6 subcs r6, r6, r2 80088c2: 4675 movcs r5, lr 80088c4: ea40 009c orrcs.w r0, r0, ip, lsr #2 80088c8: 085b lsrs r3, r3, #1 80088ca: ea4f 0232 mov.w r2, r2, rrx 80088ce: ebb6 0e02 subs.w lr, r6, r2 80088d2: eb75 0e03 sbcs.w lr, r5, r3 80088d6: bf22 ittt cs 80088d8: 1ab6 subcs r6, r6, r2 80088da: 4675 movcs r5, lr 80088dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80088e0: ea55 0e06 orrs.w lr, r5, r6 80088e4: d018 beq.n 8008918 <__aeabi_ddiv+0x114> 80088e6: ea4f 1505 mov.w r5, r5, lsl #4 80088ea: ea45 7516 orr.w r5, r5, r6, lsr #28 80088ee: ea4f 1606 mov.w r6, r6, lsl #4 80088f2: ea4f 03c3 mov.w r3, r3, lsl #3 80088f6: ea43 7352 orr.w r3, r3, r2, lsr #29 80088fa: ea4f 02c2 mov.w r2, r2, lsl #3 80088fe: ea5f 1c1c movs.w ip, ip, lsr #4 8008902: d1c0 bne.n 8008886 <__aeabi_ddiv+0x82> 8008904: f411 1f80 tst.w r1, #1048576 @ 0x100000 8008908: d10b bne.n 8008922 <__aeabi_ddiv+0x11e> 800890a: ea41 0100 orr.w r1, r1, r0 800890e: f04f 0000 mov.w r0, #0 8008912: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000 8008916: e7b6 b.n 8008886 <__aeabi_ddiv+0x82> 8008918: f411 1f80 tst.w r1, #1048576 @ 0x100000 800891c: bf04 itt eq 800891e: 4301 orreq r1, r0 8008920: 2000 moveq r0, #0 8008922: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8008926: bf88 it hi 8008928: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 800892c: f63f aeaf bhi.w 800868e <__aeabi_dmul+0xde> 8008930: ebb5 0c03 subs.w ip, r5, r3 8008934: bf04 itt eq 8008936: ebb6 0c02 subseq.w ip, r6, r2 800893a: ea5f 0c50 movseq.w ip, r0, lsr #1 800893e: f150 0000 adcs.w r0, r0, #0 8008942: eb41 5104 adc.w r1, r1, r4, lsl #20 8008946: bd70 pop {r4, r5, r6, pc} 8008948: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000 800894c: ea4e 3111 orr.w r1, lr, r1, lsr #12 8008950: eb14 045c adds.w r4, r4, ip, lsr #1 8008954: bfc2 ittt gt 8008956: ebd4 050c rsbsgt r5, r4, ip 800895a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800895e: bd70 popgt {r4, r5, r6, pc} 8008960: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008964: f04f 0e00 mov.w lr, #0 8008968: 3c01 subs r4, #1 800896a: e690 b.n 800868e <__aeabi_dmul+0xde> 800896c: ea45 0e06 orr.w lr, r5, r6 8008970: e68d b.n 800868e <__aeabi_dmul+0xde> 8008972: ea0c 5513 and.w r5, ip, r3, lsr #20 8008976: ea94 0f0c teq r4, ip 800897a: bf08 it eq 800897c: ea95 0f0c teqeq r5, ip 8008980: f43f af3b beq.w 80087fa <__aeabi_dmul+0x24a> 8008984: ea94 0f0c teq r4, ip 8008988: d10a bne.n 80089a0 <__aeabi_ddiv+0x19c> 800898a: ea50 3401 orrs.w r4, r0, r1, lsl #12 800898e: f47f af34 bne.w 80087fa <__aeabi_dmul+0x24a> 8008992: ea95 0f0c teq r5, ip 8008996: f47f af25 bne.w 80087e4 <__aeabi_dmul+0x234> 800899a: 4610 mov r0, r2 800899c: 4619 mov r1, r3 800899e: e72c b.n 80087fa <__aeabi_dmul+0x24a> 80089a0: ea95 0f0c teq r5, ip 80089a4: d106 bne.n 80089b4 <__aeabi_ddiv+0x1b0> 80089a6: ea52 3503 orrs.w r5, r2, r3, lsl #12 80089aa: f43f aefd beq.w 80087a8 <__aeabi_dmul+0x1f8> 80089ae: 4610 mov r0, r2 80089b0: 4619 mov r1, r3 80089b2: e722 b.n 80087fa <__aeabi_dmul+0x24a> 80089b4: ea50 0641 orrs.w r6, r0, r1, lsl #1 80089b8: bf18 it ne 80089ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80089be: f47f aec5 bne.w 800874c <__aeabi_dmul+0x19c> 80089c2: ea50 0441 orrs.w r4, r0, r1, lsl #1 80089c6: f47f af0d bne.w 80087e4 <__aeabi_dmul+0x234> 80089ca: ea52 0543 orrs.w r5, r2, r3, lsl #1 80089ce: f47f aeeb bne.w 80087a8 <__aeabi_dmul+0x1f8> 80089d2: e712 b.n 80087fa <__aeabi_dmul+0x24a> 080089d4 <__gedf2>: 80089d4: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 80089d8: e006 b.n 80089e8 <__cmpdf2+0x4> 80089da: bf00 nop 080089dc <__ledf2>: 80089dc: f04f 0c01 mov.w ip, #1 80089e0: e002 b.n 80089e8 <__cmpdf2+0x4> 80089e2: bf00 nop 080089e4 <__cmpdf2>: 80089e4: f04f 0c01 mov.w ip, #1 80089e8: f84d cd04 str.w ip, [sp, #-4]! 80089ec: ea4f 0c41 mov.w ip, r1, lsl #1 80089f0: ea7f 5c6c mvns.w ip, ip, asr #21 80089f4: ea4f 0c43 mov.w ip, r3, lsl #1 80089f8: bf18 it ne 80089fa: ea7f 5c6c mvnsne.w ip, ip, asr #21 80089fe: d01b beq.n 8008a38 <__cmpdf2+0x54> 8008a00: b001 add sp, #4 8008a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8008a06: bf0c ite eq 8008a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8008a0c: ea91 0f03 teqne r1, r3 8008a10: bf02 ittt eq 8008a12: ea90 0f02 teqeq r0, r2 8008a16: 2000 moveq r0, #0 8008a18: 4770 bxeq lr 8008a1a: f110 0f00 cmn.w r0, #0 8008a1e: ea91 0f03 teq r1, r3 8008a22: bf58 it pl 8008a24: 4299 cmppl r1, r3 8008a26: bf08 it eq 8008a28: 4290 cmpeq r0, r2 8008a2a: bf2c ite cs 8008a2c: 17d8 asrcs r0, r3, #31 8008a2e: ea6f 70e3 mvncc.w r0, r3, asr #31 8008a32: f040 0001 orr.w r0, r0, #1 8008a36: 4770 bx lr 8008a38: ea4f 0c41 mov.w ip, r1, lsl #1 8008a3c: ea7f 5c6c mvns.w ip, ip, asr #21 8008a40: d102 bne.n 8008a48 <__cmpdf2+0x64> 8008a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8008a46: d107 bne.n 8008a58 <__cmpdf2+0x74> 8008a48: ea4f 0c43 mov.w ip, r3, lsl #1 8008a4c: ea7f 5c6c mvns.w ip, ip, asr #21 8008a50: d1d6 bne.n 8008a00 <__cmpdf2+0x1c> 8008a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8008a56: d0d3 beq.n 8008a00 <__cmpdf2+0x1c> 8008a58: f85d 0b04 ldr.w r0, [sp], #4 8008a5c: 4770 bx lr 8008a5e: bf00 nop 08008a60 <__aeabi_cdrcmple>: 8008a60: 4684 mov ip, r0 8008a62: 4610 mov r0, r2 8008a64: 4662 mov r2, ip 8008a66: 468c mov ip, r1 8008a68: 4619 mov r1, r3 8008a6a: 4663 mov r3, ip 8008a6c: e000 b.n 8008a70 <__aeabi_cdcmpeq> 8008a6e: bf00 nop 08008a70 <__aeabi_cdcmpeq>: 8008a70: b501 push {r0, lr} 8008a72: f7ff ffb7 bl 80089e4 <__cmpdf2> 8008a76: 2800 cmp r0, #0 8008a78: bf48 it mi 8008a7a: f110 0f00 cmnmi.w r0, #0 8008a7e: bd01 pop {r0, pc} 08008a80 <__aeabi_dcmpeq>: 8008a80: f84d ed08 str.w lr, [sp, #-8]! 8008a84: f7ff fff4 bl 8008a70 <__aeabi_cdcmpeq> 8008a88: bf0c ite eq 8008a8a: 2001 moveq r0, #1 8008a8c: 2000 movne r0, #0 8008a8e: f85d fb08 ldr.w pc, [sp], #8 8008a92: bf00 nop 08008a94 <__aeabi_dcmplt>: 8008a94: f84d ed08 str.w lr, [sp, #-8]! 8008a98: f7ff ffea bl 8008a70 <__aeabi_cdcmpeq> 8008a9c: bf34 ite cc 8008a9e: 2001 movcc r0, #1 8008aa0: 2000 movcs r0, #0 8008aa2: f85d fb08 ldr.w pc, [sp], #8 8008aa6: bf00 nop 08008aa8 <__aeabi_dcmple>: 8008aa8: f84d ed08 str.w lr, [sp, #-8]! 8008aac: f7ff ffe0 bl 8008a70 <__aeabi_cdcmpeq> 8008ab0: bf94 ite ls 8008ab2: 2001 movls r0, #1 8008ab4: 2000 movhi r0, #0 8008ab6: f85d fb08 ldr.w pc, [sp], #8 8008aba: bf00 nop 08008abc <__aeabi_dcmpge>: 8008abc: f84d ed08 str.w lr, [sp, #-8]! 8008ac0: f7ff ffce bl 8008a60 <__aeabi_cdrcmple> 8008ac4: bf94 ite ls 8008ac6: 2001 movls r0, #1 8008ac8: 2000 movhi r0, #0 8008aca: f85d fb08 ldr.w pc, [sp], #8 8008ace: bf00 nop 08008ad0 <__aeabi_dcmpgt>: 8008ad0: f84d ed08 str.w lr, [sp, #-8]! 8008ad4: f7ff ffc4 bl 8008a60 <__aeabi_cdrcmple> 8008ad8: bf34 ite cc 8008ada: 2001 movcc r0, #1 8008adc: 2000 movcs r0, #0 8008ade: f85d fb08 ldr.w pc, [sp], #8 8008ae2: bf00 nop 08008ae4 <__aeabi_dcmpun>: 8008ae4: ea4f 0c41 mov.w ip, r1, lsl #1 8008ae8: ea7f 5c6c mvns.w ip, ip, asr #21 8008aec: d102 bne.n 8008af4 <__aeabi_dcmpun+0x10> 8008aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8008af2: d10a bne.n 8008b0a <__aeabi_dcmpun+0x26> 8008af4: ea4f 0c43 mov.w ip, r3, lsl #1 8008af8: ea7f 5c6c mvns.w ip, ip, asr #21 8008afc: d102 bne.n 8008b04 <__aeabi_dcmpun+0x20> 8008afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8008b02: d102 bne.n 8008b0a <__aeabi_dcmpun+0x26> 8008b04: f04f 0000 mov.w r0, #0 8008b08: 4770 bx lr 8008b0a: f04f 0001 mov.w r0, #1 8008b0e: 4770 bx lr 08008b10 <__aeabi_d2iz>: 8008b10: ea4f 0241 mov.w r2, r1, lsl #1 8008b14: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 8008b18: d215 bcs.n 8008b46 <__aeabi_d2iz+0x36> 8008b1a: d511 bpl.n 8008b40 <__aeabi_d2iz+0x30> 8008b1c: f46f 7378 mvn.w r3, #992 @ 0x3e0 8008b20: ebb3 5262 subs.w r2, r3, r2, asr #21 8008b24: d912 bls.n 8008b4c <__aeabi_d2iz+0x3c> 8008b26: ea4f 23c1 mov.w r3, r1, lsl #11 8008b2a: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8008b2e: ea43 5350 orr.w r3, r3, r0, lsr #21 8008b32: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8008b36: fa23 f002 lsr.w r0, r3, r2 8008b3a: bf18 it ne 8008b3c: 4240 negne r0, r0 8008b3e: 4770 bx lr 8008b40: f04f 0000 mov.w r0, #0 8008b44: 4770 bx lr 8008b46: ea50 3001 orrs.w r0, r0, r1, lsl #12 8008b4a: d105 bne.n 8008b58 <__aeabi_d2iz+0x48> 8008b4c: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 8008b50: bf08 it eq 8008b52: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 8008b56: 4770 bx lr 8008b58: f04f 0000 mov.w r0, #0 8008b5c: 4770 bx lr 8008b5e: bf00 nop 08008b60 <__aeabi_d2f>: 8008b60: ea4f 0241 mov.w r2, r1, lsl #1 8008b64: f1b2 43e0 subs.w r3, r2, #1879048192 @ 0x70000000 8008b68: bf24 itt cs 8008b6a: f5b3 1c00 subscs.w ip, r3, #2097152 @ 0x200000 8008b6e: f1dc 5cfe rsbscs ip, ip, #532676608 @ 0x1fc00000 8008b72: d90d bls.n 8008b90 <__aeabi_d2f+0x30> 8008b74: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8008b78: ea4f 02c0 mov.w r2, r0, lsl #3 8008b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29 8008b80: f1b2 4f00 cmp.w r2, #2147483648 @ 0x80000000 8008b84: eb40 0083 adc.w r0, r0, r3, lsl #2 8008b88: bf08 it eq 8008b8a: f020 0001 biceq.w r0, r0, #1 8008b8e: 4770 bx lr 8008b90: f011 4f80 tst.w r1, #1073741824 @ 0x40000000 8008b94: d121 bne.n 8008bda <__aeabi_d2f+0x7a> 8008b96: f113 7238 adds.w r2, r3, #48234496 @ 0x2e00000 8008b9a: bfbc itt lt 8008b9c: f001 4000 andlt.w r0, r1, #2147483648 @ 0x80000000 8008ba0: 4770 bxlt lr 8008ba2: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008ba6: ea4f 5252 mov.w r2, r2, lsr #21 8008baa: f1c2 0218 rsb r2, r2, #24 8008bae: f1c2 0c20 rsb ip, r2, #32 8008bb2: fa10 f30c lsls.w r3, r0, ip 8008bb6: fa20 f002 lsr.w r0, r0, r2 8008bba: bf18 it ne 8008bbc: f040 0001 orrne.w r0, r0, #1 8008bc0: ea4f 23c1 mov.w r3, r1, lsl #11 8008bc4: ea4f 23d3 mov.w r3, r3, lsr #11 8008bc8: fa03 fc0c lsl.w ip, r3, ip 8008bcc: ea40 000c orr.w r0, r0, ip 8008bd0: fa23 f302 lsr.w r3, r3, r2 8008bd4: ea4f 0343 mov.w r3, r3, lsl #1 8008bd8: e7cc b.n 8008b74 <__aeabi_d2f+0x14> 8008bda: ea7f 5362 mvns.w r3, r2, asr #21 8008bde: d107 bne.n 8008bf0 <__aeabi_d2f+0x90> 8008be0: ea50 3301 orrs.w r3, r0, r1, lsl #12 8008be4: bf1e ittt ne 8008be6: f04f 40fe movne.w r0, #2130706432 @ 0x7f000000 8008bea: f440 0040 orrne.w r0, r0, #12582912 @ 0xc00000 8008bee: 4770 bxne lr 8008bf0: f001 4000 and.w r0, r1, #2147483648 @ 0x80000000 8008bf4: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008bf8: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008bfc: 4770 bx lr 8008bfe: bf00 nop 08008c00 <__aeabi_frsub>: 8008c00: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 8008c04: e002 b.n 8008c0c <__addsf3> 8008c06: bf00 nop 08008c08 <__aeabi_fsub>: 8008c08: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 08008c0c <__addsf3>: 8008c0c: 0042 lsls r2, r0, #1 8008c0e: bf1f itttt ne 8008c10: ea5f 0341 movsne.w r3, r1, lsl #1 8008c14: ea92 0f03 teqne r2, r3 8008c18: ea7f 6c22 mvnsne.w ip, r2, asr #24 8008c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24 8008c20: d06a beq.n 8008cf8 <__addsf3+0xec> 8008c22: ea4f 6212 mov.w r2, r2, lsr #24 8008c26: ebd2 6313 rsbs r3, r2, r3, lsr #24 8008c2a: bfc1 itttt gt 8008c2c: 18d2 addgt r2, r2, r3 8008c2e: 4041 eorgt r1, r0 8008c30: 4048 eorgt r0, r1 8008c32: 4041 eorgt r1, r0 8008c34: bfb8 it lt 8008c36: 425b neglt r3, r3 8008c38: 2b19 cmp r3, #25 8008c3a: bf88 it hi 8008c3c: 4770 bxhi lr 8008c3e: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 8008c42: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008c46: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 8008c4a: bf18 it ne 8008c4c: 4240 negne r0, r0 8008c4e: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8008c52: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 8008c56: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 8008c5a: bf18 it ne 8008c5c: 4249 negne r1, r1 8008c5e: ea92 0f03 teq r2, r3 8008c62: d03f beq.n 8008ce4 <__addsf3+0xd8> 8008c64: f1a2 0201 sub.w r2, r2, #1 8008c68: fa41 fc03 asr.w ip, r1, r3 8008c6c: eb10 000c adds.w r0, r0, ip 8008c70: f1c3 0320 rsb r3, r3, #32 8008c74: fa01 f103 lsl.w r1, r1, r3 8008c78: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8008c7c: d502 bpl.n 8008c84 <__addsf3+0x78> 8008c7e: 4249 negs r1, r1 8008c80: eb60 0040 sbc.w r0, r0, r0, lsl #1 8008c84: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 8008c88: d313 bcc.n 8008cb2 <__addsf3+0xa6> 8008c8a: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 8008c8e: d306 bcc.n 8008c9e <__addsf3+0x92> 8008c90: 0840 lsrs r0, r0, #1 8008c92: ea4f 0131 mov.w r1, r1, rrx 8008c96: f102 0201 add.w r2, r2, #1 8008c9a: 2afe cmp r2, #254 @ 0xfe 8008c9c: d251 bcs.n 8008d42 <__addsf3+0x136> 8008c9e: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 8008ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23 8008ca6: bf08 it eq 8008ca8: f020 0001 biceq.w r0, r0, #1 8008cac: ea40 0003 orr.w r0, r0, r3 8008cb0: 4770 bx lr 8008cb2: 0049 lsls r1, r1, #1 8008cb4: eb40 0000 adc.w r0, r0, r0 8008cb8: 3a01 subs r2, #1 8008cba: bf28 it cs 8008cbc: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 8008cc0: d2ed bcs.n 8008c9e <__addsf3+0x92> 8008cc2: fab0 fc80 clz ip, r0 8008cc6: f1ac 0c08 sub.w ip, ip, #8 8008cca: ebb2 020c subs.w r2, r2, ip 8008cce: fa00 f00c lsl.w r0, r0, ip 8008cd2: bfaa itet ge 8008cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23 8008cd8: 4252 neglt r2, r2 8008cda: 4318 orrge r0, r3 8008cdc: bfbc itt lt 8008cde: 40d0 lsrlt r0, r2 8008ce0: 4318 orrlt r0, r3 8008ce2: 4770 bx lr 8008ce4: f092 0f00 teq r2, #0 8008ce8: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 8008cec: bf06 itte eq 8008cee: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 8008cf2: 3201 addeq r2, #1 8008cf4: 3b01 subne r3, #1 8008cf6: e7b5 b.n 8008c64 <__addsf3+0x58> 8008cf8: ea4f 0341 mov.w r3, r1, lsl #1 8008cfc: ea7f 6c22 mvns.w ip, r2, asr #24 8008d00: bf18 it ne 8008d02: ea7f 6c23 mvnsne.w ip, r3, asr #24 8008d06: d021 beq.n 8008d4c <__addsf3+0x140> 8008d08: ea92 0f03 teq r2, r3 8008d0c: d004 beq.n 8008d18 <__addsf3+0x10c> 8008d0e: f092 0f00 teq r2, #0 8008d12: bf08 it eq 8008d14: 4608 moveq r0, r1 8008d16: 4770 bx lr 8008d18: ea90 0f01 teq r0, r1 8008d1c: bf1c itt ne 8008d1e: 2000 movne r0, #0 8008d20: 4770 bxne lr 8008d22: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 8008d26: d104 bne.n 8008d32 <__addsf3+0x126> 8008d28: 0040 lsls r0, r0, #1 8008d2a: bf28 it cs 8008d2c: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 8008d30: 4770 bx lr 8008d32: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 8008d36: bf3c itt cc 8008d38: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 8008d3c: 4770 bxcc lr 8008d3e: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8008d42: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 8008d46: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008d4a: 4770 bx lr 8008d4c: ea7f 6222 mvns.w r2, r2, asr #24 8008d50: bf16 itet ne 8008d52: 4608 movne r0, r1 8008d54: ea7f 6323 mvnseq.w r3, r3, asr #24 8008d58: 4601 movne r1, r0 8008d5a: 0242 lsls r2, r0, #9 8008d5c: bf06 itte eq 8008d5e: ea5f 2341 movseq.w r3, r1, lsl #9 8008d62: ea90 0f01 teqeq r0, r1 8008d66: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 8008d6a: 4770 bx lr 08008d6c <__aeabi_ui2f>: 8008d6c: f04f 0300 mov.w r3, #0 8008d70: e004 b.n 8008d7c <__aeabi_i2f+0x8> 8008d72: bf00 nop 08008d74 <__aeabi_i2f>: 8008d74: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 8008d78: bf48 it mi 8008d7a: 4240 negmi r0, r0 8008d7c: ea5f 0c00 movs.w ip, r0 8008d80: bf08 it eq 8008d82: 4770 bxeq lr 8008d84: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 8008d88: 4601 mov r1, r0 8008d8a: f04f 0000 mov.w r0, #0 8008d8e: e01c b.n 8008dca <__aeabi_l2f+0x2a> 08008d90 <__aeabi_ul2f>: 8008d90: ea50 0201 orrs.w r2, r0, r1 8008d94: bf08 it eq 8008d96: 4770 bxeq lr 8008d98: f04f 0300 mov.w r3, #0 8008d9c: e00a b.n 8008db4 <__aeabi_l2f+0x14> 8008d9e: bf00 nop 08008da0 <__aeabi_l2f>: 8008da0: ea50 0201 orrs.w r2, r0, r1 8008da4: bf08 it eq 8008da6: 4770 bxeq lr 8008da8: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 8008dac: d502 bpl.n 8008db4 <__aeabi_l2f+0x14> 8008dae: 4240 negs r0, r0 8008db0: eb61 0141 sbc.w r1, r1, r1, lsl #1 8008db4: ea5f 0c01 movs.w ip, r1 8008db8: bf02 ittt eq 8008dba: 4684 moveq ip, r0 8008dbc: 4601 moveq r1, r0 8008dbe: 2000 moveq r0, #0 8008dc0: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 8008dc4: bf08 it eq 8008dc6: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 8008dca: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 8008dce: fabc f28c clz r2, ip 8008dd2: 3a08 subs r2, #8 8008dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23 8008dd8: db10 blt.n 8008dfc <__aeabi_l2f+0x5c> 8008dda: fa01 fc02 lsl.w ip, r1, r2 8008dde: 4463 add r3, ip 8008de0: fa00 fc02 lsl.w ip, r0, r2 8008de4: f1c2 0220 rsb r2, r2, #32 8008de8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8008dec: fa20 f202 lsr.w r2, r0, r2 8008df0: eb43 0002 adc.w r0, r3, r2 8008df4: bf08 it eq 8008df6: f020 0001 biceq.w r0, r0, #1 8008dfa: 4770 bx lr 8008dfc: f102 0220 add.w r2, r2, #32 8008e00: fa01 fc02 lsl.w ip, r1, r2 8008e04: f1c2 0220 rsb r2, r2, #32 8008e08: ea50 004c orrs.w r0, r0, ip, lsl #1 8008e0c: fa21 f202 lsr.w r2, r1, r2 8008e10: eb43 0002 adc.w r0, r3, r2 8008e14: bf08 it eq 8008e16: ea20 70dc biceq.w r0, r0, ip, lsr #31 8008e1a: 4770 bx lr 08008e1c <__aeabi_fmul>: 8008e1c: f04f 0cff mov.w ip, #255 @ 0xff 8008e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8008e24: bf1e ittt ne 8008e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8008e2a: ea92 0f0c teqne r2, ip 8008e2e: ea93 0f0c teqne r3, ip 8008e32: d06f beq.n 8008f14 <__aeabi_fmul+0xf8> 8008e34: 441a add r2, r3 8008e36: ea80 0c01 eor.w ip, r0, r1 8008e3a: 0240 lsls r0, r0, #9 8008e3c: bf18 it ne 8008e3e: ea5f 2141 movsne.w r1, r1, lsl #9 8008e42: d01e beq.n 8008e82 <__aeabi_fmul+0x66> 8008e44: f04f 6300 mov.w r3, #134217728 @ 0x8000000 8008e48: ea43 1050 orr.w r0, r3, r0, lsr #5 8008e4c: ea43 1151 orr.w r1, r3, r1, lsr #5 8008e50: fba0 3101 umull r3, r1, r0, r1 8008e54: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8008e58: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 8008e5c: bf3e ittt cc 8008e5e: 0049 lslcc r1, r1, #1 8008e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8008e64: 005b lslcc r3, r3, #1 8008e66: ea40 0001 orr.w r0, r0, r1 8008e6a: f162 027f sbc.w r2, r2, #127 @ 0x7f 8008e6e: 2afd cmp r2, #253 @ 0xfd 8008e70: d81d bhi.n 8008eae <__aeabi_fmul+0x92> 8008e72: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8008e76: eb40 50c2 adc.w r0, r0, r2, lsl #23 8008e7a: bf08 it eq 8008e7c: f020 0001 biceq.w r0, r0, #1 8008e80: 4770 bx lr 8008e82: f090 0f00 teq r0, #0 8008e86: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8008e8a: bf08 it eq 8008e8c: 0249 lsleq r1, r1, #9 8008e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9 8008e92: ea40 2051 orr.w r0, r0, r1, lsr #9 8008e96: 3a7f subs r2, #127 @ 0x7f 8008e98: bfc2 ittt gt 8008e9a: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 8008e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8008ea2: 4770 bxgt lr 8008ea4: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008ea8: f04f 0300 mov.w r3, #0 8008eac: 3a01 subs r2, #1 8008eae: dc5d bgt.n 8008f6c <__aeabi_fmul+0x150> 8008eb0: f112 0f19 cmn.w r2, #25 8008eb4: bfdc itt le 8008eb6: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 8008eba: 4770 bxle lr 8008ebc: f1c2 0200 rsb r2, r2, #0 8008ec0: 0041 lsls r1, r0, #1 8008ec2: fa21 f102 lsr.w r1, r1, r2 8008ec6: f1c2 0220 rsb r2, r2, #32 8008eca: fa00 fc02 lsl.w ip, r0, r2 8008ece: ea5f 0031 movs.w r0, r1, rrx 8008ed2: f140 0000 adc.w r0, r0, #0 8008ed6: ea53 034c orrs.w r3, r3, ip, lsl #1 8008eda: bf08 it eq 8008edc: ea20 70dc biceq.w r0, r0, ip, lsr #31 8008ee0: 4770 bx lr 8008ee2: f092 0f00 teq r2, #0 8008ee6: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 8008eea: bf02 ittt eq 8008eec: 0040 lsleq r0, r0, #1 8008eee: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 8008ef2: 3a01 subeq r2, #1 8008ef4: d0f9 beq.n 8008eea <__aeabi_fmul+0xce> 8008ef6: ea40 000c orr.w r0, r0, ip 8008efa: f093 0f00 teq r3, #0 8008efe: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8008f02: bf02 ittt eq 8008f04: 0049 lsleq r1, r1, #1 8008f06: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8008f0a: 3b01 subeq r3, #1 8008f0c: d0f9 beq.n 8008f02 <__aeabi_fmul+0xe6> 8008f0e: ea41 010c orr.w r1, r1, ip 8008f12: e78f b.n 8008e34 <__aeabi_fmul+0x18> 8008f14: ea0c 53d1 and.w r3, ip, r1, lsr #23 8008f18: ea92 0f0c teq r2, ip 8008f1c: bf18 it ne 8008f1e: ea93 0f0c teqne r3, ip 8008f22: d00a beq.n 8008f3a <__aeabi_fmul+0x11e> 8008f24: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 8008f28: bf18 it ne 8008f2a: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 8008f2e: d1d8 bne.n 8008ee2 <__aeabi_fmul+0xc6> 8008f30: ea80 0001 eor.w r0, r0, r1 8008f34: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8008f38: 4770 bx lr 8008f3a: f090 0f00 teq r0, #0 8008f3e: bf17 itett ne 8008f40: f090 4f00 teqne r0, #2147483648 @ 0x80000000 8008f44: 4608 moveq r0, r1 8008f46: f091 0f00 teqne r1, #0 8008f4a: f091 4f00 teqne r1, #2147483648 @ 0x80000000 8008f4e: d014 beq.n 8008f7a <__aeabi_fmul+0x15e> 8008f50: ea92 0f0c teq r2, ip 8008f54: d101 bne.n 8008f5a <__aeabi_fmul+0x13e> 8008f56: 0242 lsls r2, r0, #9 8008f58: d10f bne.n 8008f7a <__aeabi_fmul+0x15e> 8008f5a: ea93 0f0c teq r3, ip 8008f5e: d103 bne.n 8008f68 <__aeabi_fmul+0x14c> 8008f60: 024b lsls r3, r1, #9 8008f62: bf18 it ne 8008f64: 4608 movne r0, r1 8008f66: d108 bne.n 8008f7a <__aeabi_fmul+0x15e> 8008f68: ea80 0001 eor.w r0, r0, r1 8008f6c: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8008f70: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008f74: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008f78: 4770 bx lr 8008f7a: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008f7e: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 8008f82: 4770 bx lr 08008f84 <__aeabi_fdiv>: 8008f84: f04f 0cff mov.w ip, #255 @ 0xff 8008f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8008f8c: bf1e ittt ne 8008f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8008f92: ea92 0f0c teqne r2, ip 8008f96: ea93 0f0c teqne r3, ip 8008f9a: d069 beq.n 8009070 <__aeabi_fdiv+0xec> 8008f9c: eba2 0203 sub.w r2, r2, r3 8008fa0: ea80 0c01 eor.w ip, r0, r1 8008fa4: 0249 lsls r1, r1, #9 8008fa6: ea4f 2040 mov.w r0, r0, lsl #9 8008faa: d037 beq.n 800901c <__aeabi_fdiv+0x98> 8008fac: f04f 5380 mov.w r3, #268435456 @ 0x10000000 8008fb0: ea43 1111 orr.w r1, r3, r1, lsr #4 8008fb4: ea43 1310 orr.w r3, r3, r0, lsr #4 8008fb8: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8008fbc: 428b cmp r3, r1 8008fbe: bf38 it cc 8008fc0: 005b lslcc r3, r3, #1 8008fc2: f142 027d adc.w r2, r2, #125 @ 0x7d 8008fc6: f44f 0c00 mov.w ip, #8388608 @ 0x800000 8008fca: 428b cmp r3, r1 8008fcc: bf24 itt cs 8008fce: 1a5b subcs r3, r3, r1 8008fd0: ea40 000c orrcs.w r0, r0, ip 8008fd4: ebb3 0f51 cmp.w r3, r1, lsr #1 8008fd8: bf24 itt cs 8008fda: eba3 0351 subcs.w r3, r3, r1, lsr #1 8008fde: ea40 005c orrcs.w r0, r0, ip, lsr #1 8008fe2: ebb3 0f91 cmp.w r3, r1, lsr #2 8008fe6: bf24 itt cs 8008fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2 8008fec: ea40 009c orrcs.w r0, r0, ip, lsr #2 8008ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3 8008ff4: bf24 itt cs 8008ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3 8008ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8008ffe: 011b lsls r3, r3, #4 8009000: bf18 it ne 8009002: ea5f 1c1c movsne.w ip, ip, lsr #4 8009006: d1e0 bne.n 8008fca <__aeabi_fdiv+0x46> 8009008: 2afd cmp r2, #253 @ 0xfd 800900a: f63f af50 bhi.w 8008eae <__aeabi_fmul+0x92> 800900e: 428b cmp r3, r1 8009010: eb40 50c2 adc.w r0, r0, r2, lsl #23 8009014: bf08 it eq 8009016: f020 0001 biceq.w r0, r0, #1 800901a: 4770 bx lr 800901c: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8009020: ea4c 2050 orr.w r0, ip, r0, lsr #9 8009024: 327f adds r2, #127 @ 0x7f 8009026: bfc2 ittt gt 8009028: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 800902c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8009030: 4770 bxgt lr 8009032: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8009036: f04f 0300 mov.w r3, #0 800903a: 3a01 subs r2, #1 800903c: e737 b.n 8008eae <__aeabi_fmul+0x92> 800903e: f092 0f00 teq r2, #0 8009042: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 8009046: bf02 ittt eq 8009048: 0040 lsleq r0, r0, #1 800904a: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 800904e: 3a01 subeq r2, #1 8009050: d0f9 beq.n 8009046 <__aeabi_fdiv+0xc2> 8009052: ea40 000c orr.w r0, r0, ip 8009056: f093 0f00 teq r3, #0 800905a: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 800905e: bf02 ittt eq 8009060: 0049 lsleq r1, r1, #1 8009062: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8009066: 3b01 subeq r3, #1 8009068: d0f9 beq.n 800905e <__aeabi_fdiv+0xda> 800906a: ea41 010c orr.w r1, r1, ip 800906e: e795 b.n 8008f9c <__aeabi_fdiv+0x18> 8009070: ea0c 53d1 and.w r3, ip, r1, lsr #23 8009074: ea92 0f0c teq r2, ip 8009078: d108 bne.n 800908c <__aeabi_fdiv+0x108> 800907a: 0242 lsls r2, r0, #9 800907c: f47f af7d bne.w 8008f7a <__aeabi_fmul+0x15e> 8009080: ea93 0f0c teq r3, ip 8009084: f47f af70 bne.w 8008f68 <__aeabi_fmul+0x14c> 8009088: 4608 mov r0, r1 800908a: e776 b.n 8008f7a <__aeabi_fmul+0x15e> 800908c: ea93 0f0c teq r3, ip 8009090: d104 bne.n 800909c <__aeabi_fdiv+0x118> 8009092: 024b lsls r3, r1, #9 8009094: f43f af4c beq.w 8008f30 <__aeabi_fmul+0x114> 8009098: 4608 mov r0, r1 800909a: e76e b.n 8008f7a <__aeabi_fmul+0x15e> 800909c: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 80090a0: bf18 it ne 80090a2: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 80090a6: d1ca bne.n 800903e <__aeabi_fdiv+0xba> 80090a8: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 80090ac: f47f af5c bne.w 8008f68 <__aeabi_fmul+0x14c> 80090b0: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 80090b4: f47f af3c bne.w 8008f30 <__aeabi_fmul+0x114> 80090b8: e75f b.n 8008f7a <__aeabi_fmul+0x15e> 80090ba: bf00 nop 080090bc <__gesf2>: 80090bc: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 80090c0: e006 b.n 80090d0 <__cmpsf2+0x4> 80090c2: bf00 nop 080090c4 <__lesf2>: 80090c4: f04f 0c01 mov.w ip, #1 80090c8: e002 b.n 80090d0 <__cmpsf2+0x4> 80090ca: bf00 nop 080090cc <__cmpsf2>: 80090cc: f04f 0c01 mov.w ip, #1 80090d0: f84d cd04 str.w ip, [sp, #-4]! 80090d4: ea4f 0240 mov.w r2, r0, lsl #1 80090d8: ea4f 0341 mov.w r3, r1, lsl #1 80090dc: ea7f 6c22 mvns.w ip, r2, asr #24 80090e0: bf18 it ne 80090e2: ea7f 6c23 mvnsne.w ip, r3, asr #24 80090e6: d011 beq.n 800910c <__cmpsf2+0x40> 80090e8: b001 add sp, #4 80090ea: ea52 0c53 orrs.w ip, r2, r3, lsr #1 80090ee: bf18 it ne 80090f0: ea90 0f01 teqne r0, r1 80090f4: bf58 it pl 80090f6: ebb2 0003 subspl.w r0, r2, r3 80090fa: bf88 it hi 80090fc: 17c8 asrhi r0, r1, #31 80090fe: bf38 it cc 8009100: ea6f 70e1 mvncc.w r0, r1, asr #31 8009104: bf18 it ne 8009106: f040 0001 orrne.w r0, r0, #1 800910a: 4770 bx lr 800910c: ea7f 6c22 mvns.w ip, r2, asr #24 8009110: d102 bne.n 8009118 <__cmpsf2+0x4c> 8009112: ea5f 2c40 movs.w ip, r0, lsl #9 8009116: d105 bne.n 8009124 <__cmpsf2+0x58> 8009118: ea7f 6c23 mvns.w ip, r3, asr #24 800911c: d1e4 bne.n 80090e8 <__cmpsf2+0x1c> 800911e: ea5f 2c41 movs.w ip, r1, lsl #9 8009122: d0e1 beq.n 80090e8 <__cmpsf2+0x1c> 8009124: f85d 0b04 ldr.w r0, [sp], #4 8009128: 4770 bx lr 800912a: bf00 nop 0800912c <__aeabi_cfrcmple>: 800912c: 4684 mov ip, r0 800912e: 4608 mov r0, r1 8009130: 4661 mov r1, ip 8009132: e7ff b.n 8009134 <__aeabi_cfcmpeq> 08009134 <__aeabi_cfcmpeq>: 8009134: b50f push {r0, r1, r2, r3, lr} 8009136: f7ff ffc9 bl 80090cc <__cmpsf2> 800913a: 2800 cmp r0, #0 800913c: bf48 it mi 800913e: f110 0f00 cmnmi.w r0, #0 8009142: bd0f pop {r0, r1, r2, r3, pc} 08009144 <__aeabi_fcmpeq>: 8009144: f84d ed08 str.w lr, [sp, #-8]! 8009148: f7ff fff4 bl 8009134 <__aeabi_cfcmpeq> 800914c: bf0c ite eq 800914e: 2001 moveq r0, #1 8009150: 2000 movne r0, #0 8009152: f85d fb08 ldr.w pc, [sp], #8 8009156: bf00 nop 08009158 <__aeabi_fcmplt>: 8009158: f84d ed08 str.w lr, [sp, #-8]! 800915c: f7ff ffea bl 8009134 <__aeabi_cfcmpeq> 8009160: bf34 ite cc 8009162: 2001 movcc r0, #1 8009164: 2000 movcs r0, #0 8009166: f85d fb08 ldr.w pc, [sp], #8 800916a: bf00 nop 0800916c <__aeabi_fcmple>: 800916c: f84d ed08 str.w lr, [sp, #-8]! 8009170: f7ff ffe0 bl 8009134 <__aeabi_cfcmpeq> 8009174: bf94 ite ls 8009176: 2001 movls r0, #1 8009178: 2000 movhi r0, #0 800917a: f85d fb08 ldr.w pc, [sp], #8 800917e: bf00 nop 08009180 <__aeabi_fcmpge>: 8009180: f84d ed08 str.w lr, [sp, #-8]! 8009184: f7ff ffd2 bl 800912c <__aeabi_cfrcmple> 8009188: bf94 ite ls 800918a: 2001 movls r0, #1 800918c: 2000 movhi r0, #0 800918e: f85d fb08 ldr.w pc, [sp], #8 8009192: bf00 nop 08009194 <__aeabi_fcmpgt>: 8009194: f84d ed08 str.w lr, [sp, #-8]! 8009198: f7ff ffc8 bl 800912c <__aeabi_cfrcmple> 800919c: bf34 ite cc 800919e: 2001 movcc r0, #1 80091a0: 2000 movcs r0, #0 80091a2: f85d fb08 ldr.w pc, [sp], #8 80091a6: bf00 nop 080091a8 <__aeabi_f2iz>: 80091a8: ea4f 0240 mov.w r2, r0, lsl #1 80091ac: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 80091b0: d30f bcc.n 80091d2 <__aeabi_f2iz+0x2a> 80091b2: f04f 039e mov.w r3, #158 @ 0x9e 80091b6: ebb3 6212 subs.w r2, r3, r2, lsr #24 80091ba: d90d bls.n 80091d8 <__aeabi_f2iz+0x30> 80091bc: ea4f 2300 mov.w r3, r0, lsl #8 80091c0: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 80091c4: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 80091c8: fa23 f002 lsr.w r0, r3, r2 80091cc: bf18 it ne 80091ce: 4240 negne r0, r0 80091d0: 4770 bx lr 80091d2: f04f 0000 mov.w r0, #0 80091d6: 4770 bx lr 80091d8: f112 0f61 cmn.w r2, #97 @ 0x61 80091dc: d101 bne.n 80091e2 <__aeabi_f2iz+0x3a> 80091de: 0242 lsls r2, r0, #9 80091e0: d105 bne.n 80091ee <__aeabi_f2iz+0x46> 80091e2: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 80091e6: bf08 it eq 80091e8: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 80091ec: 4770 bx lr 80091ee: f04f 0000 mov.w r0, #0 80091f2: 4770 bx lr 080091f4 <__aeabi_ldivmod>: 80091f4: b97b cbnz r3, 8009216 <__aeabi_ldivmod+0x22> 80091f6: b972 cbnz r2, 8009216 <__aeabi_ldivmod+0x22> 80091f8: 2900 cmp r1, #0 80091fa: bfbe ittt lt 80091fc: 2000 movlt r0, #0 80091fe: f04f 4100 movlt.w r1, #2147483648 @ 0x80000000 8009202: e006 blt.n 8009212 <__aeabi_ldivmod+0x1e> 8009204: bf08 it eq 8009206: 2800 cmpeq r0, #0 8009208: bf1c itt ne 800920a: f06f 4100 mvnne.w r1, #2147483648 @ 0x80000000 800920e: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 8009212: f000 b9d7 b.w 80095c4 <__aeabi_idiv0> 8009216: f1ad 0c08 sub.w ip, sp, #8 800921a: e96d ce04 strd ip, lr, [sp, #-16]! 800921e: 2900 cmp r1, #0 8009220: db09 blt.n 8009236 <__aeabi_ldivmod+0x42> 8009222: 2b00 cmp r3, #0 8009224: db1a blt.n 800925c <__aeabi_ldivmod+0x68> 8009226: f000 f84d bl 80092c4 <__udivmoddi4> 800922a: f8dd e004 ldr.w lr, [sp, #4] 800922e: e9dd 2302 ldrd r2, r3, [sp, #8] 8009232: b004 add sp, #16 8009234: 4770 bx lr 8009236: 4240 negs r0, r0 8009238: eb61 0141 sbc.w r1, r1, r1, lsl #1 800923c: 2b00 cmp r3, #0 800923e: db1b blt.n 8009278 <__aeabi_ldivmod+0x84> 8009240: f000 f840 bl 80092c4 <__udivmoddi4> 8009244: f8dd e004 ldr.w lr, [sp, #4] 8009248: e9dd 2302 ldrd r2, r3, [sp, #8] 800924c: b004 add sp, #16 800924e: 4240 negs r0, r0 8009250: eb61 0141 sbc.w r1, r1, r1, lsl #1 8009254: 4252 negs r2, r2 8009256: eb63 0343 sbc.w r3, r3, r3, lsl #1 800925a: 4770 bx lr 800925c: 4252 negs r2, r2 800925e: eb63 0343 sbc.w r3, r3, r3, lsl #1 8009262: f000 f82f bl 80092c4 <__udivmoddi4> 8009266: f8dd e004 ldr.w lr, [sp, #4] 800926a: e9dd 2302 ldrd r2, r3, [sp, #8] 800926e: b004 add sp, #16 8009270: 4240 negs r0, r0 8009272: eb61 0141 sbc.w r1, r1, r1, lsl #1 8009276: 4770 bx lr 8009278: 4252 negs r2, r2 800927a: eb63 0343 sbc.w r3, r3, r3, lsl #1 800927e: f000 f821 bl 80092c4 <__udivmoddi4> 8009282: f8dd e004 ldr.w lr, [sp, #4] 8009286: e9dd 2302 ldrd r2, r3, [sp, #8] 800928a: b004 add sp, #16 800928c: 4252 negs r2, r2 800928e: eb63 0343 sbc.w r3, r3, r3, lsl #1 8009292: 4770 bx lr 08009294 <__aeabi_uldivmod>: 8009294: b953 cbnz r3, 80092ac <__aeabi_uldivmod+0x18> 8009296: b94a cbnz r2, 80092ac <__aeabi_uldivmod+0x18> 8009298: 2900 cmp r1, #0 800929a: bf08 it eq 800929c: 2800 cmpeq r0, #0 800929e: bf1c itt ne 80092a0: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff 80092a4: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 80092a8: f000 b98c b.w 80095c4 <__aeabi_idiv0> 80092ac: f1ad 0c08 sub.w ip, sp, #8 80092b0: e96d ce04 strd ip, lr, [sp, #-16]! 80092b4: f000 f806 bl 80092c4 <__udivmoddi4> 80092b8: f8dd e004 ldr.w lr, [sp, #4] 80092bc: e9dd 2302 ldrd r2, r3, [sp, #8] 80092c0: b004 add sp, #16 80092c2: 4770 bx lr 080092c4 <__udivmoddi4>: 80092c4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80092c8: 9d08 ldr r5, [sp, #32] 80092ca: 468e mov lr, r1 80092cc: 4604 mov r4, r0 80092ce: 4688 mov r8, r1 80092d0: 2b00 cmp r3, #0 80092d2: d14a bne.n 800936a <__udivmoddi4+0xa6> 80092d4: 428a cmp r2, r1 80092d6: 4617 mov r7, r2 80092d8: d962 bls.n 80093a0 <__udivmoddi4+0xdc> 80092da: fab2 f682 clz r6, r2 80092de: b14e cbz r6, 80092f4 <__udivmoddi4+0x30> 80092e0: f1c6 0320 rsb r3, r6, #32 80092e4: fa01 f806 lsl.w r8, r1, r6 80092e8: fa20 f303 lsr.w r3, r0, r3 80092ec: 40b7 lsls r7, r6 80092ee: ea43 0808 orr.w r8, r3, r8 80092f2: 40b4 lsls r4, r6 80092f4: ea4f 4e17 mov.w lr, r7, lsr #16 80092f8: fbb8 f1fe udiv r1, r8, lr 80092fc: fa1f fc87 uxth.w ip, r7 8009300: fb0e 8811 mls r8, lr, r1, r8 8009304: fb01 f20c mul.w r2, r1, ip 8009308: 0c23 lsrs r3, r4, #16 800930a: ea43 4308 orr.w r3, r3, r8, lsl #16 800930e: 429a cmp r2, r3 8009310: d909 bls.n 8009326 <__udivmoddi4+0x62> 8009312: 18fb adds r3, r7, r3 8009314: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff 8009318: f080 80eb bcs.w 80094f2 <__udivmoddi4+0x22e> 800931c: 429a cmp r2, r3 800931e: f240 80e8 bls.w 80094f2 <__udivmoddi4+0x22e> 8009322: 3902 subs r1, #2 8009324: 443b add r3, r7 8009326: 1a9a subs r2, r3, r2 8009328: fbb2 f0fe udiv r0, r2, lr 800932c: fb0e 2210 mls r2, lr, r0, r2 8009330: fb00 fc0c mul.w ip, r0, ip 8009334: b2a3 uxth r3, r4 8009336: ea43 4302 orr.w r3, r3, r2, lsl #16 800933a: 459c cmp ip, r3 800933c: d909 bls.n 8009352 <__udivmoddi4+0x8e> 800933e: 18fb adds r3, r7, r3 8009340: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff 8009344: f080 80d7 bcs.w 80094f6 <__udivmoddi4+0x232> 8009348: 459c cmp ip, r3 800934a: f240 80d4 bls.w 80094f6 <__udivmoddi4+0x232> 800934e: 443b add r3, r7 8009350: 3802 subs r0, #2 8009352: ea40 4001 orr.w r0, r0, r1, lsl #16 8009356: 2100 movs r1, #0 8009358: eba3 030c sub.w r3, r3, ip 800935c: b11d cbz r5, 8009366 <__udivmoddi4+0xa2> 800935e: 2200 movs r2, #0 8009360: 40f3 lsrs r3, r6 8009362: e9c5 3200 strd r3, r2, [r5] 8009366: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800936a: 428b cmp r3, r1 800936c: d905 bls.n 800937a <__udivmoddi4+0xb6> 800936e: b10d cbz r5, 8009374 <__udivmoddi4+0xb0> 8009370: e9c5 0100 strd r0, r1, [r5] 8009374: 2100 movs r1, #0 8009376: 4608 mov r0, r1 8009378: e7f5 b.n 8009366 <__udivmoddi4+0xa2> 800937a: fab3 f183 clz r1, r3 800937e: 2900 cmp r1, #0 8009380: d146 bne.n 8009410 <__udivmoddi4+0x14c> 8009382: 4573 cmp r3, lr 8009384: d302 bcc.n 800938c <__udivmoddi4+0xc8> 8009386: 4282 cmp r2, r0 8009388: f200 8108 bhi.w 800959c <__udivmoddi4+0x2d8> 800938c: 1a84 subs r4, r0, r2 800938e: eb6e 0203 sbc.w r2, lr, r3 8009392: 2001 movs r0, #1 8009394: 4690 mov r8, r2 8009396: 2d00 cmp r5, #0 8009398: d0e5 beq.n 8009366 <__udivmoddi4+0xa2> 800939a: e9c5 4800 strd r4, r8, [r5] 800939e: e7e2 b.n 8009366 <__udivmoddi4+0xa2> 80093a0: 2a00 cmp r2, #0 80093a2: f000 8091 beq.w 80094c8 <__udivmoddi4+0x204> 80093a6: fab2 f682 clz r6, r2 80093aa: 2e00 cmp r6, #0 80093ac: f040 80a5 bne.w 80094fa <__udivmoddi4+0x236> 80093b0: 1a8a subs r2, r1, r2 80093b2: 2101 movs r1, #1 80093b4: 0c03 lsrs r3, r0, #16 80093b6: ea4f 4e17 mov.w lr, r7, lsr #16 80093ba: b280 uxth r0, r0 80093bc: b2bc uxth r4, r7 80093be: fbb2 fcfe udiv ip, r2, lr 80093c2: fb0e 221c mls r2, lr, ip, r2 80093c6: ea43 4302 orr.w r3, r3, r2, lsl #16 80093ca: fb04 f20c mul.w r2, r4, ip 80093ce: 429a cmp r2, r3 80093d0: d907 bls.n 80093e2 <__udivmoddi4+0x11e> 80093d2: 18fb adds r3, r7, r3 80093d4: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff 80093d8: d202 bcs.n 80093e0 <__udivmoddi4+0x11c> 80093da: 429a cmp r2, r3 80093dc: f200 80e3 bhi.w 80095a6 <__udivmoddi4+0x2e2> 80093e0: 46c4 mov ip, r8 80093e2: 1a9b subs r3, r3, r2 80093e4: fbb3 f2fe udiv r2, r3, lr 80093e8: fb0e 3312 mls r3, lr, r2, r3 80093ec: fb02 f404 mul.w r4, r2, r4 80093f0: ea40 4303 orr.w r3, r0, r3, lsl #16 80093f4: 429c cmp r4, r3 80093f6: d907 bls.n 8009408 <__udivmoddi4+0x144> 80093f8: 18fb adds r3, r7, r3 80093fa: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff 80093fe: d202 bcs.n 8009406 <__udivmoddi4+0x142> 8009400: 429c cmp r4, r3 8009402: f200 80cd bhi.w 80095a0 <__udivmoddi4+0x2dc> 8009406: 4602 mov r2, r0 8009408: 1b1b subs r3, r3, r4 800940a: ea42 400c orr.w r0, r2, ip, lsl #16 800940e: e7a5 b.n 800935c <__udivmoddi4+0x98> 8009410: f1c1 0620 rsb r6, r1, #32 8009414: 408b lsls r3, r1 8009416: fa22 f706 lsr.w r7, r2, r6 800941a: 431f orrs r7, r3 800941c: fa2e fa06 lsr.w sl, lr, r6 8009420: ea4f 4917 mov.w r9, r7, lsr #16 8009424: fbba f8f9 udiv r8, sl, r9 8009428: fa0e fe01 lsl.w lr, lr, r1 800942c: fa20 f306 lsr.w r3, r0, r6 8009430: fb09 aa18 mls sl, r9, r8, sl 8009434: fa1f fc87 uxth.w ip, r7 8009438: ea43 030e orr.w r3, r3, lr 800943c: fa00 fe01 lsl.w lr, r0, r1 8009440: fb08 f00c mul.w r0, r8, ip 8009444: 0c1c lsrs r4, r3, #16 8009446: ea44 440a orr.w r4, r4, sl, lsl #16 800944a: 42a0 cmp r0, r4 800944c: fa02 f201 lsl.w r2, r2, r1 8009450: d90a bls.n 8009468 <__udivmoddi4+0x1a4> 8009452: 193c adds r4, r7, r4 8009454: f108 3aff add.w sl, r8, #4294967295 @ 0xffffffff 8009458: f080 809e bcs.w 8009598 <__udivmoddi4+0x2d4> 800945c: 42a0 cmp r0, r4 800945e: f240 809b bls.w 8009598 <__udivmoddi4+0x2d4> 8009462: f1a8 0802 sub.w r8, r8, #2 8009466: 443c add r4, r7 8009468: 1a24 subs r4, r4, r0 800946a: b298 uxth r0, r3 800946c: fbb4 f3f9 udiv r3, r4, r9 8009470: fb09 4413 mls r4, r9, r3, r4 8009474: fb03 fc0c mul.w ip, r3, ip 8009478: ea40 4404 orr.w r4, r0, r4, lsl #16 800947c: 45a4 cmp ip, r4 800947e: d909 bls.n 8009494 <__udivmoddi4+0x1d0> 8009480: 193c adds r4, r7, r4 8009482: f103 30ff add.w r0, r3, #4294967295 @ 0xffffffff 8009486: f080 8085 bcs.w 8009594 <__udivmoddi4+0x2d0> 800948a: 45a4 cmp ip, r4 800948c: f240 8082 bls.w 8009594 <__udivmoddi4+0x2d0> 8009490: 3b02 subs r3, #2 8009492: 443c add r4, r7 8009494: ea43 4008 orr.w r0, r3, r8, lsl #16 8009498: eba4 040c sub.w r4, r4, ip 800949c: fba0 8c02 umull r8, ip, r0, r2 80094a0: 4564 cmp r4, ip 80094a2: 4643 mov r3, r8 80094a4: 46e1 mov r9, ip 80094a6: d364 bcc.n 8009572 <__udivmoddi4+0x2ae> 80094a8: d061 beq.n 800956e <__udivmoddi4+0x2aa> 80094aa: b15d cbz r5, 80094c4 <__udivmoddi4+0x200> 80094ac: ebbe 0203 subs.w r2, lr, r3 80094b0: eb64 0409 sbc.w r4, r4, r9 80094b4: fa04 f606 lsl.w r6, r4, r6 80094b8: fa22 f301 lsr.w r3, r2, r1 80094bc: 431e orrs r6, r3 80094be: 40cc lsrs r4, r1 80094c0: e9c5 6400 strd r6, r4, [r5] 80094c4: 2100 movs r1, #0 80094c6: e74e b.n 8009366 <__udivmoddi4+0xa2> 80094c8: fbb1 fcf2 udiv ip, r1, r2 80094cc: 0c01 lsrs r1, r0, #16 80094ce: ea41 410e orr.w r1, r1, lr, lsl #16 80094d2: b280 uxth r0, r0 80094d4: ea40 4201 orr.w r2, r0, r1, lsl #16 80094d8: 463b mov r3, r7 80094da: fbb1 f1f7 udiv r1, r1, r7 80094de: 4638 mov r0, r7 80094e0: 463c mov r4, r7 80094e2: 46b8 mov r8, r7 80094e4: 46be mov lr, r7 80094e6: 2620 movs r6, #32 80094e8: eba2 0208 sub.w r2, r2, r8 80094ec: ea41 410c orr.w r1, r1, ip, lsl #16 80094f0: e765 b.n 80093be <__udivmoddi4+0xfa> 80094f2: 4601 mov r1, r0 80094f4: e717 b.n 8009326 <__udivmoddi4+0x62> 80094f6: 4610 mov r0, r2 80094f8: e72b b.n 8009352 <__udivmoddi4+0x8e> 80094fa: f1c6 0120 rsb r1, r6, #32 80094fe: fa2e fc01 lsr.w ip, lr, r1 8009502: 40b7 lsls r7, r6 8009504: fa0e fe06 lsl.w lr, lr, r6 8009508: fa20 f101 lsr.w r1, r0, r1 800950c: ea41 010e orr.w r1, r1, lr 8009510: ea4f 4e17 mov.w lr, r7, lsr #16 8009514: fbbc f8fe udiv r8, ip, lr 8009518: b2bc uxth r4, r7 800951a: fb0e cc18 mls ip, lr, r8, ip 800951e: fb08 f904 mul.w r9, r8, r4 8009522: 0c0a lsrs r2, r1, #16 8009524: ea42 420c orr.w r2, r2, ip, lsl #16 8009528: 40b0 lsls r0, r6 800952a: 4591 cmp r9, r2 800952c: ea4f 4310 mov.w r3, r0, lsr #16 8009530: b280 uxth r0, r0 8009532: d93e bls.n 80095b2 <__udivmoddi4+0x2ee> 8009534: 18ba adds r2, r7, r2 8009536: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff 800953a: d201 bcs.n 8009540 <__udivmoddi4+0x27c> 800953c: 4591 cmp r9, r2 800953e: d81f bhi.n 8009580 <__udivmoddi4+0x2bc> 8009540: eba2 0209 sub.w r2, r2, r9 8009544: fbb2 f9fe udiv r9, r2, lr 8009548: fb09 f804 mul.w r8, r9, r4 800954c: fb0e 2a19 mls sl, lr, r9, r2 8009550: b28a uxth r2, r1 8009552: ea42 420a orr.w r2, r2, sl, lsl #16 8009556: 4542 cmp r2, r8 8009558: d229 bcs.n 80095ae <__udivmoddi4+0x2ea> 800955a: 18ba adds r2, r7, r2 800955c: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff 8009560: d2c2 bcs.n 80094e8 <__udivmoddi4+0x224> 8009562: 4542 cmp r2, r8 8009564: d2c0 bcs.n 80094e8 <__udivmoddi4+0x224> 8009566: f1a9 0102 sub.w r1, r9, #2 800956a: 443a add r2, r7 800956c: e7bc b.n 80094e8 <__udivmoddi4+0x224> 800956e: 45c6 cmp lr, r8 8009570: d29b bcs.n 80094aa <__udivmoddi4+0x1e6> 8009572: ebb8 0302 subs.w r3, r8, r2 8009576: eb6c 0c07 sbc.w ip, ip, r7 800957a: 3801 subs r0, #1 800957c: 46e1 mov r9, ip 800957e: e794 b.n 80094aa <__udivmoddi4+0x1e6> 8009580: eba7 0909 sub.w r9, r7, r9 8009584: 444a add r2, r9 8009586: fbb2 f9fe udiv r9, r2, lr 800958a: f1a8 0c02 sub.w ip, r8, #2 800958e: fb09 f804 mul.w r8, r9, r4 8009592: e7db b.n 800954c <__udivmoddi4+0x288> 8009594: 4603 mov r3, r0 8009596: e77d b.n 8009494 <__udivmoddi4+0x1d0> 8009598: 46d0 mov r8, sl 800959a: e765 b.n 8009468 <__udivmoddi4+0x1a4> 800959c: 4608 mov r0, r1 800959e: e6fa b.n 8009396 <__udivmoddi4+0xd2> 80095a0: 443b add r3, r7 80095a2: 3a02 subs r2, #2 80095a4: e730 b.n 8009408 <__udivmoddi4+0x144> 80095a6: f1ac 0c02 sub.w ip, ip, #2 80095aa: 443b add r3, r7 80095ac: e719 b.n 80093e2 <__udivmoddi4+0x11e> 80095ae: 4649 mov r1, r9 80095b0: e79a b.n 80094e8 <__udivmoddi4+0x224> 80095b2: eba2 0209 sub.w r2, r2, r9 80095b6: fbb2 f9fe udiv r9, r2, lr 80095ba: 46c4 mov ip, r8 80095bc: fb09 f804 mul.w r8, r9, r4 80095c0: e7c4 b.n 800954c <__udivmoddi4+0x288> 80095c2: bf00 nop 080095c4 <__aeabi_idiv0>: 80095c4: 4770 bx lr 80095c6: bf00 nop 080095c8 : ADC_HandleTypeDef hadc1; /* ADC1 init function */ void MX_ADC1_Init(void) { 80095c8: b580 push {r7, lr} 80095ca: b084 sub sp, #16 80095cc: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 80095ce: 1d3b adds r3, r7, #4 80095d0: 2200 movs r2, #0 80095d2: 601a str r2, [r3, #0] 80095d4: 605a str r2, [r3, #4] 80095d6: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 80095d8: 4b18 ldr r3, [pc, #96] @ (800963c ) 80095da: 4a19 ldr r2, [pc, #100] @ (8009640 ) 80095dc: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 80095de: 4b17 ldr r3, [pc, #92] @ (800963c ) 80095e0: 2200 movs r2, #0 80095e2: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = DISABLE; 80095e4: 4b15 ldr r3, [pc, #84] @ (800963c ) 80095e6: 2200 movs r2, #0 80095e8: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 80095ea: 4b14 ldr r3, [pc, #80] @ (800963c ) 80095ec: 2200 movs r2, #0 80095ee: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80095f0: 4b12 ldr r3, [pc, #72] @ (800963c ) 80095f2: f44f 2260 mov.w r2, #917504 @ 0xe0000 80095f6: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80095f8: 4b10 ldr r3, [pc, #64] @ (800963c ) 80095fa: 2200 movs r2, #0 80095fc: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 1; 80095fe: 4b0f ldr r3, [pc, #60] @ (800963c ) 8009600: 2201 movs r2, #1 8009602: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 8009604: 480d ldr r0, [pc, #52] @ (800963c ) 8009606: f005 f997 bl 800e938 800960a: 4603 mov r3, r0 800960c: 2b00 cmp r3, #0 800960e: d001 beq.n 8009614 { Error_Handler(); 8009610: f002 feea bl 800c3e8 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 8009614: 2308 movs r3, #8 8009616: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 8009618: 2301 movs r3, #1 800961a: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 800961c: 2300 movs r3, #0 800961e: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8009620: 1d3b adds r3, r7, #4 8009622: 4619 mov r1, r3 8009624: 4805 ldr r0, [pc, #20] @ (800963c ) 8009626: f005 fc4b bl 800eec0 800962a: 4603 mov r3, r0 800962c: 2b00 cmp r3, #0 800962e: d001 beq.n 8009634 { Error_Handler(); 8009630: f002 feda bl 800c3e8 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 8009634: bf00 nop 8009636: 3710 adds r7, #16 8009638: 46bd mov sp, r7 800963a: bd80 pop {r7, pc} 800963c: 2000026c .word 0x2000026c 8009640: 40012400 .word 0x40012400 08009644 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { 8009644: b580 push {r7, lr} 8009646: b08a sub sp, #40 @ 0x28 8009648: af00 add r7, sp, #0 800964a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800964c: f107 0318 add.w r3, r7, #24 8009650: 2200 movs r2, #0 8009652: 601a str r2, [r3, #0] 8009654: 605a str r2, [r3, #4] 8009656: 609a str r2, [r3, #8] 8009658: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) 800965a: 687b ldr r3, [r7, #4] 800965c: 681b ldr r3, [r3, #0] 800965e: 4a1f ldr r2, [pc, #124] @ (80096dc ) 8009660: 4293 cmp r3, r2 8009662: d137 bne.n 80096d4 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8009664: 4b1e ldr r3, [pc, #120] @ (80096e0 ) 8009666: 699b ldr r3, [r3, #24] 8009668: 4a1d ldr r2, [pc, #116] @ (80096e0 ) 800966a: f443 7300 orr.w r3, r3, #512 @ 0x200 800966e: 6193 str r3, [r2, #24] 8009670: 4b1b ldr r3, [pc, #108] @ (80096e0 ) 8009672: 699b ldr r3, [r3, #24] 8009674: f403 7300 and.w r3, r3, #512 @ 0x200 8009678: 617b str r3, [r7, #20] 800967a: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 800967c: 4b18 ldr r3, [pc, #96] @ (80096e0 ) 800967e: 699b ldr r3, [r3, #24] 8009680: 4a17 ldr r2, [pc, #92] @ (80096e0 ) 8009682: f043 0304 orr.w r3, r3, #4 8009686: 6193 str r3, [r2, #24] 8009688: 4b15 ldr r3, [pc, #84] @ (80096e0 ) 800968a: 699b ldr r3, [r3, #24] 800968c: f003 0304 and.w r3, r3, #4 8009690: 613b str r3, [r7, #16] 8009692: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8009694: 4b12 ldr r3, [pc, #72] @ (80096e0 ) 8009696: 699b ldr r3, [r3, #24] 8009698: 4a11 ldr r2, [pc, #68] @ (80096e0 ) 800969a: f043 0308 orr.w r3, r3, #8 800969e: 6193 str r3, [r2, #24] 80096a0: 4b0f ldr r3, [pc, #60] @ (80096e0 ) 80096a2: 699b ldr r3, [r3, #24] 80096a4: f003 0308 and.w r3, r3, #8 80096a8: 60fb str r3, [r7, #12] 80096aa: 68fb ldr r3, [r7, #12] /**ADC1 GPIO Configuration PA3 ------> ADC1_IN3 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = GPIO_PIN_3; 80096ac: 2308 movs r3, #8 80096ae: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80096b0: 2303 movs r3, #3 80096b2: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80096b4: f107 0318 add.w r3, r7, #24 80096b8: 4619 mov r1, r3 80096ba: 480a ldr r0, [pc, #40] @ (80096e4 ) 80096bc: f006 ff7a bl 80105b4 GPIO_InitStruct.Pin = ADC_NTC1_Pin|ADC_NTC2_Pin; 80096c0: 2303 movs r3, #3 80096c2: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80096c4: 2303 movs r3, #3 80096c6: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80096c8: f107 0318 add.w r3, r7, #24 80096cc: 4619 mov r1, r3 80096ce: 4806 ldr r0, [pc, #24] @ (80096e8 ) 80096d0: f006 ff70 bl 80105b4 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 80096d4: bf00 nop 80096d6: 3728 adds r7, #40 @ 0x28 80096d8: 46bd mov sp, r7 80096da: bd80 pop {r7, pc} 80096dc: 40012400 .word 0x40012400 80096e0: 40021000 .word 0x40021000 80096e4: 40010800 .word 0x40010800 80096e8: 40010c00 .word 0x40010c00 080096ec : InfoBlock_t *InfoBlock = (InfoBlock_t *)(VERSION_OFFSET); uint8_t RELAY_State[RELAY_COUNT]; void RELAY_Write(relay_t num, uint8_t state){ 80096ec: b580 push {r7, lr} 80096ee: b082 sub sp, #8 80096f0: af00 add r7, sp, #0 80096f2: 4603 mov r3, r0 80096f4: 460a mov r2, r1 80096f6: 71fb strb r3, [r7, #7] 80096f8: 4613 mov r3, r2 80096fa: 71bb strb r3, [r7, #6] switch (num) { 80096fc: 79fb ldrb r3, [r7, #7] 80096fe: 2b06 cmp r3, #6 8009700: d847 bhi.n 8009792 8009702: a201 add r2, pc, #4 @ (adr r2, 8009708 ) 8009704: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8009708: 08009725 .word 0x08009725 800970c: 08009735 .word 0x08009735 8009710: 08009745 .word 0x08009745 8009714: 08009755 .word 0x08009755 8009718: 08009765 .word 0x08009765 800971c: 08009775 .word 0x08009775 8009720: 08009785 .word 0x08009785 case RELAY_AUX0: HAL_GPIO_WritePin(RELAY1_GPIO_Port, RELAY1_Pin, state); 8009724: 79bb ldrb r3, [r7, #6] 8009726: 461a mov r2, r3 8009728: f44f 7180 mov.w r1, #256 @ 0x100 800972c: 481d ldr r0, [pc, #116] @ (80097a4 ) 800972e: f007 f8dc bl 80108ea break; 8009732: e02f b.n 8009794 case RELAY_AUX1: HAL_GPIO_WritePin(RELAY2_GPIO_Port, RELAY2_Pin, state); 8009734: 79bb ldrb r3, [r7, #6] 8009736: 461a mov r2, r3 8009738: f44f 7100 mov.w r1, #512 @ 0x200 800973c: 4819 ldr r0, [pc, #100] @ (80097a4 ) 800973e: f007 f8d4 bl 80108ea break; 8009742: e027 b.n 8009794 case RELAY3: HAL_GPIO_WritePin(RELAY3_GPIO_Port, RELAY3_Pin, state); 8009744: 79bb ldrb r3, [r7, #6] 8009746: 461a mov r2, r3 8009748: f44f 6180 mov.w r1, #1024 @ 0x400 800974c: 4815 ldr r0, [pc, #84] @ (80097a4 ) 800974e: f007 f8cc bl 80108ea break; 8009752: e01f b.n 8009794 case RELAY_DC: HAL_GPIO_WritePin(RELAY4_GPIO_Port, RELAY4_Pin, state); 8009754: 79bb ldrb r3, [r7, #6] 8009756: 461a mov r2, r3 8009758: f44f 6100 mov.w r1, #2048 @ 0x800 800975c: 4811 ldr r0, [pc, #68] @ (80097a4 ) 800975e: f007 f8c4 bl 80108ea break; 8009762: e017 b.n 8009794 case RELAY_AC: HAL_GPIO_WritePin(RELAY5_GPIO_Port, RELAY5_Pin, state); 8009764: 79bb ldrb r3, [r7, #6] 8009766: 461a mov r2, r3 8009768: f44f 5180 mov.w r1, #4096 @ 0x1000 800976c: 480d ldr r0, [pc, #52] @ (80097a4 ) 800976e: f007 f8bc bl 80108ea break; 8009772: e00f b.n 8009794 case RELAY_CC: HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, state); 8009774: 79bb ldrb r3, [r7, #6] 8009776: 461a mov r2, r3 8009778: f44f 4100 mov.w r1, #32768 @ 0x8000 800977c: 480a ldr r0, [pc, #40] @ (80097a8 ) 800977e: f007 f8b4 bl 80108ea break; 8009782: e007 b.n 8009794 case RELAY_DC1: HAL_GPIO_WritePin(RELAY_DC_GPIO_Port, RELAY_DC_Pin, state); 8009784: 79bb ldrb r3, [r7, #6] 8009786: 461a mov r2, r3 8009788: 2108 movs r1, #8 800978a: 4808 ldr r0, [pc, #32] @ (80097ac ) 800978c: f007 f8ad bl 80108ea break; 8009790: e000 b.n 8009794 default: break; 8009792: bf00 nop } RELAY_State[num] = state; 8009794: 79fb ldrb r3, [r7, #7] 8009796: 4906 ldr r1, [pc, #24] @ (80097b0 ) 8009798: 79ba ldrb r2, [r7, #6] 800979a: 54ca strb r2, [r1, r3] } 800979c: bf00 nop 800979e: 3708 adds r7, #8 80097a0: 46bd mov sp, r7 80097a2: bd80 pop {r7, pc} 80097a4: 40011800 .word 0x40011800 80097a8: 40010800 .word 0x40010800 80097ac: 40011400 .word 0x40011400 80097b0: 2000029c .word 0x2000029c 080097b4 : uint8_t RELAY_Read(relay_t num){ 80097b4: b480 push {r7} 80097b6: b083 sub sp, #12 80097b8: af00 add r7, sp, #0 80097ba: 4603 mov r3, r0 80097bc: 71fb strb r3, [r7, #7] return RELAY_State[num]; 80097be: 79fb ldrb r3, [r7, #7] 80097c0: 4a03 ldr r2, [pc, #12] @ (80097d0 ) 80097c2: 5cd3 ldrb r3, [r2, r3] } 80097c4: 4618 mov r0, r3 80097c6: 370c adds r7, #12 80097c8: 46bd mov sp, r7 80097ca: bc80 pop {r7} 80097cc: 4770 bx lr 80097ce: bf00 nop 80097d0: 2000029c .word 0x2000029c 080097d4 : uint8_t IN_ReadInput(inputNum_t input_n){ 80097d4: b580 push {r7, lr} 80097d6: b082 sub sp, #8 80097d8: af00 add r7, sp, #0 80097da: 4603 mov r3, r0 80097dc: 71fb strb r3, [r7, #7] switch(input_n){ 80097de: 79fb ldrb r3, [r7, #7] 80097e0: 2b06 cmp r3, #6 80097e2: d83b bhi.n 800985c 80097e4: a201 add r2, pc, #4 @ (adr r2, 80097ec ) 80097e6: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80097ea: bf00 nop 80097ec: 08009809 .word 0x08009809 80097f0: 08009815 .word 0x08009815 80097f4: 08009821 .word 0x08009821 80097f8: 0800982d .word 0x0800982d 80097fc: 08009839 .word 0x08009839 8009800: 08009845 .word 0x08009845 8009804: 08009851 .word 0x08009851 case IN_SW0: return HAL_GPIO_ReadPin(IN_SW0_GPIO_Port, IN_SW0_Pin); 8009808: 2102 movs r1, #2 800980a: 4817 ldr r0, [pc, #92] @ (8009868 ) 800980c: f007 f856 bl 80108bc 8009810: 4603 mov r3, r0 8009812: e024 b.n 800985e case IN_SW1: return HAL_GPIO_ReadPin(IN_SW1_GPIO_Port, IN_SW1_Pin); 8009814: 2104 movs r1, #4 8009816: 4814 ldr r0, [pc, #80] @ (8009868 ) 8009818: f007 f850 bl 80108bc 800981c: 4603 mov r3, r0 800981e: e01e b.n 800985e case IN0: return HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 8009820: 2180 movs r1, #128 @ 0x80 8009822: 4812 ldr r0, [pc, #72] @ (800986c ) 8009824: f007 f84a bl 80108bc 8009828: 4603 mov r3, r0 800982a: e018 b.n 800985e case IN_ESTOP: return HAL_GPIO_ReadPin(IN_ESTOP_GPIO_Port, IN_ESTOP_Pin); 800982c: 2180 movs r1, #128 @ 0x80 800982e: 4810 ldr r0, [pc, #64] @ (8009870 ) 8009830: f007 f844 bl 80108bc 8009834: 4603 mov r3, r0 8009836: e012 b.n 800985e case IN_FB1: return HAL_GPIO_ReadPin(IN_FB1_GPIO_Port, IN_FB1_Pin); 8009838: 2110 movs r1, #16 800983a: 480e ldr r0, [pc, #56] @ (8009874 ) 800983c: f007 f83e bl 80108bc 8009840: 4603 mov r3, r0 8009842: e00c b.n 800985e case IN_CONT_FB_DC: return HAL_GPIO_ReadPin(IN_FB2_GPIO_Port, IN_FB2_Pin); 8009844: 2108 movs r1, #8 8009846: 480b ldr r0, [pc, #44] @ (8009874 ) 8009848: f007 f838 bl 80108bc 800984c: 4603 mov r3, r0 800984e: e006 b.n 800985e case ISO_IN: return HAL_GPIO_ReadPin(ISO_IN_GPIO_Port, ISO_IN_Pin); 8009850: 2102 movs r1, #2 8009852: 4806 ldr r0, [pc, #24] @ (800986c ) 8009854: f007 f832 bl 80108bc 8009858: 4603 mov r3, r0 800985a: e000 b.n 800985e default: return 0; 800985c: 2300 movs r3, #0 } } 800985e: 4618 mov r0, r3 8009860: 3708 adds r7, #8 8009862: 46bd mov sp, r7 8009864: bd80 pop {r7, pc} 8009866: bf00 nop 8009868: 40010800 .word 0x40010800 800986c: 40011800 .word 0x40011800 8009870: 40011400 .word 0x40011400 8009874: 40010c00 .word 0x40010c00 08009878 : // // HAL_ADC_Stop(&hadc1); // stop adc return 0; } void Init_Peripheral(){ 8009878: b580 push {r7, lr} 800987a: af00 add r7, sp, #0 HAL_ADCEx_Calibration_Start(&hadc1); 800987c: 4810 ldr r0, [pc, #64] @ (80098c0 ) 800987e: f005 fcb3 bl 800f1e8 RELAY_Write(RELAY_AUX0, 0); 8009882: 2100 movs r1, #0 8009884: 2000 movs r0, #0 8009886: f7ff ff31 bl 80096ec RELAY_Write(RELAY_AUX1, 0); 800988a: 2100 movs r1, #0 800988c: 2001 movs r0, #1 800988e: f7ff ff2d bl 80096ec RELAY_Write(RELAY3, 0); 8009892: 2100 movs r1, #0 8009894: 2002 movs r0, #2 8009896: f7ff ff29 bl 80096ec RELAY_Write(RELAY_DC, 0); 800989a: 2100 movs r1, #0 800989c: 2003 movs r0, #3 800989e: f7ff ff25 bl 80096ec RELAY_Write(RELAY_AC, 0); 80098a2: 2100 movs r1, #0 80098a4: 2004 movs r0, #4 80098a6: f7ff ff21 bl 80096ec RELAY_Write(RELAY_CC, 1); 80098aa: 2101 movs r1, #1 80098ac: 2005 movs r0, #5 80098ae: f7ff ff1d bl 80096ec RELAY_Write(RELAY_DC1, 0); 80098b2: 2100 movs r1, #0 80098b4: 2006 movs r0, #6 80098b6: f7ff ff19 bl 80096ec } 80098ba: bf00 nop 80098bc: bd80 pop {r7, pc} 80098be: bf00 nop 80098c0: 2000026c .word 0x2000026c 080098c4 : float pt1000_to_temperature(float resistance) { 80098c4: b590 push {r4, r7, lr} 80098c6: b087 sub sp, #28 80098c8: af00 add r7, sp, #0 80098ca: 6078 str r0, [r7, #4] // Константы для PT1000 const float R0 = 1000.0; // Сопротивление при 0 °C 80098cc: 4b0c ldr r3, [pc, #48] @ (8009900 ) 80098ce: 617b str r3, [r7, #20] const float C_A = 3.9083E-3f; 80098d0: 4b0c ldr r3, [pc, #48] @ (8009904 ) 80098d2: 613b str r3, [r7, #16] float temperature = (resistance-R0) / ( R0 * C_A); 80098d4: 6979 ldr r1, [r7, #20] 80098d6: 6878 ldr r0, [r7, #4] 80098d8: f7ff f996 bl 8008c08 <__aeabi_fsub> 80098dc: 4603 mov r3, r0 80098de: 461c mov r4, r3 80098e0: 6939 ldr r1, [r7, #16] 80098e2: 6978 ldr r0, [r7, #20] 80098e4: f7ff fa9a bl 8008e1c <__aeabi_fmul> 80098e8: 4603 mov r3, r0 80098ea: 4619 mov r1, r3 80098ec: 4620 mov r0, r4 80098ee: f7ff fb49 bl 8008f84 <__aeabi_fdiv> 80098f2: 4603 mov r3, r0 80098f4: 60fb str r3, [r7, #12] return temperature; 80098f6: 68fb ldr r3, [r7, #12] } 80098f8: 4618 mov r0, r3 80098fa: 371c adds r7, #28 80098fc: 46bd mov sp, r7 80098fe: bd90 pop {r4, r7, pc} 8009900: 447a0000 .word 0x447a0000 8009904: 3b801132 .word 0x3b801132 08009908 : float calculate_NTC_resistance(int adc_value, float Vref, float Vin, float R) { 8009908: b5b0 push {r4, r5, r7, lr} 800990a: b086 sub sp, #24 800990c: af00 add r7, sp, #0 800990e: 60f8 str r0, [r7, #12] 8009910: 60b9 str r1, [r7, #8] 8009912: 607a str r2, [r7, #4] 8009914: 603b str r3, [r7, #0] // Преобразуем значение АЦП в выходное напряжение float Vout = (adc_value / 4095.0) * Vref; 8009916: 68f8 ldr r0, [r7, #12] 8009918: f7fe fde0 bl 80084dc <__aeabi_i2d> 800991c: a31c add r3, pc, #112 @ (adr r3, 8009990 ) 800991e: e9d3 2300 ldrd r2, r3, [r3] 8009922: f7fe ff6f bl 8008804 <__aeabi_ddiv> 8009926: 4602 mov r2, r0 8009928: 460b mov r3, r1 800992a: 4614 mov r4, r2 800992c: 461d mov r5, r3 800992e: 68b8 ldr r0, [r7, #8] 8009930: f7fe fde6 bl 8008500 <__aeabi_f2d> 8009934: 4602 mov r2, r0 8009936: 460b mov r3, r1 8009938: 4620 mov r0, r4 800993a: 4629 mov r1, r5 800993c: f7fe fe38 bl 80085b0 <__aeabi_dmul> 8009940: 4602 mov r2, r0 8009942: 460b mov r3, r1 8009944: 4610 mov r0, r2 8009946: 4619 mov r1, r3 8009948: f7ff f90a bl 8008b60 <__aeabi_d2f> 800994c: 4603 mov r3, r0 800994e: 617b str r3, [r7, #20] // Проверяем, чтобы Vout не было равно Vin if (Vout >= Vin) { 8009950: 6879 ldr r1, [r7, #4] 8009952: 6978 ldr r0, [r7, #20] 8009954: f7ff fc14 bl 8009180 <__aeabi_fcmpge> 8009958: 4603 mov r3, r0 800995a: 2b00 cmp r3, #0 800995c: d001 beq.n 8009962 return -1; // Ошибка: Vout не может быть больше или равно Vin 800995e: 4b0e ldr r3, [pc, #56] @ (8009998 ) 8009960: e010 b.n 8009984 } // Вычисляем сопротивление термистора float R_NTC = R * (Vout / (Vin - Vout)); 8009962: 6979 ldr r1, [r7, #20] 8009964: 6878 ldr r0, [r7, #4] 8009966: f7ff f94f bl 8008c08 <__aeabi_fsub> 800996a: 4603 mov r3, r0 800996c: 4619 mov r1, r3 800996e: 6978 ldr r0, [r7, #20] 8009970: f7ff fb08 bl 8008f84 <__aeabi_fdiv> 8009974: 4603 mov r3, r0 8009976: 4619 mov r1, r3 8009978: 6838 ldr r0, [r7, #0] 800997a: f7ff fa4f bl 8008e1c <__aeabi_fmul> 800997e: 4603 mov r3, r0 8009980: 613b str r3, [r7, #16] return R_NTC; 8009982: 693b ldr r3, [r7, #16] } 8009984: 4618 mov r0, r3 8009986: 3718 adds r7, #24 8009988: 46bd mov sp, r7 800998a: bdb0 pop {r4, r5, r7, pc} 800998c: f3af 8000 nop.w 8009990: 00000000 .word 0x00000000 8009994: 40affe00 .word 0x40affe00 8009998: bf800000 .word 0xbf800000 0800999c : int16_t GBT_ReadTemp(uint8_t ch){ 800999c: b580 push {r7, lr} 800999e: b088 sub sp, #32 80099a0: af00 add r7, sp, #0 80099a2: 4603 mov r3, r0 80099a4: 71fb strb r3, [r7, #7] //TODO if(ch)ADC_Select_Channel(ADC_CHANNEL_8); 80099a6: 79fb ldrb r3, [r7, #7] 80099a8: 2b00 cmp r3, #0 80099aa: d003 beq.n 80099b4 80099ac: 2008 movs r0, #8 80099ae: f000 f83b bl 8009a28 80099b2: e002 b.n 80099ba else ADC_Select_Channel(ADC_CHANNEL_9); 80099b4: 2009 movs r0, #9 80099b6: f000 f837 bl 8009a28 // Начало конверсии HAL_ADC_Start(&hadc1); 80099ba: 4817 ldr r0, [pc, #92] @ (8009a18 ) 80099bc: f005 f894 bl 800eae8 // Ожидание окончания конверсии HAL_ADC_PollForConversion(&hadc1, HAL_MAX_DELAY); 80099c0: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 80099c4: 4814 ldr r0, [pc, #80] @ (8009a18 ) 80099c6: f005 f969 bl 800ec9c // Получение значения uint32_t adcValue = HAL_ADC_GetValue(&hadc1); 80099ca: 4813 ldr r0, [pc, #76] @ (8009a18 ) 80099cc: f005 fa6c bl 800eea8 80099d0: 61f8 str r0, [r7, #28] // Остановка АЦП (по желанию) HAL_ADC_Stop(&hadc1); 80099d2: 4811 ldr r0, [pc, #68] @ (8009a18 ) 80099d4: f005 f936 bl 800ec44 if(adcValue>4000) return 20; //Термодатчик не подключен 80099d8: 69fb ldr r3, [r7, #28] 80099da: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 80099de: d901 bls.n 80099e4 80099e0: 2314 movs r3, #20 80099e2: e015 b.n 8009a10 // int adc_value = 2048; // Пример значения АЦП float Vref = 3.3; // Напряжение опорное 80099e4: 4b0d ldr r3, [pc, #52] @ (8009a1c ) 80099e6: 61bb str r3, [r7, #24] float Vin = 5.0; // Входное напряжение 80099e8: 4b0d ldr r3, [pc, #52] @ (8009a20 ) 80099ea: 617b str r3, [r7, #20] float R = 1000; // Сопротивление резистора в Омах 80099ec: 4b0d ldr r3, [pc, #52] @ (8009a24 ) 80099ee: 613b str r3, [r7, #16] float temp = pt1000_to_temperature(calculate_NTC_resistance(adcValue, Vref, Vin, R)); 80099f0: 69f8 ldr r0, [r7, #28] 80099f2: 693b ldr r3, [r7, #16] 80099f4: 697a ldr r2, [r7, #20] 80099f6: 69b9 ldr r1, [r7, #24] 80099f8: f7ff ff86 bl 8009908 80099fc: 4603 mov r3, r0 80099fe: 4618 mov r0, r3 8009a00: f7ff ff60 bl 80098c4 8009a04: 60f8 str r0, [r7, #12] return (int16_t)temp; 8009a06: 68f8 ldr r0, [r7, #12] 8009a08: f7ff fbce bl 80091a8 <__aeabi_f2iz> 8009a0c: 4603 mov r3, r0 8009a0e: b21b sxth r3, r3 } 8009a10: 4618 mov r0, r3 8009a12: 3720 adds r7, #32 8009a14: 46bd mov sp, r7 8009a16: bd80 pop {r7, pc} 8009a18: 2000026c .word 0x2000026c 8009a1c: 40533333 .word 0x40533333 8009a20: 40a00000 .word 0x40a00000 8009a24: 447a0000 .word 0x447a0000 08009a28 : void ADC_Select_Channel(uint32_t ch) { 8009a28: b580 push {r7, lr} 8009a2a: b086 sub sp, #24 8009a2c: af00 add r7, sp, #0 8009a2e: 6078 str r0, [r7, #4] ADC_ChannelConfTypeDef conf = { 8009a30: 687b ldr r3, [r7, #4] 8009a32: 60fb str r3, [r7, #12] 8009a34: 2301 movs r3, #1 8009a36: 613b str r3, [r7, #16] 8009a38: 2303 movs r3, #3 8009a3a: 617b str r3, [r7, #20] .Channel = ch, .Rank = 1, .SamplingTime = ADC_SAMPLETIME_28CYCLES_5, }; if (HAL_ADC_ConfigChannel(&hadc1, &conf) != HAL_OK) { 8009a3c: f107 030c add.w r3, r7, #12 8009a40: 4619 mov r1, r3 8009a42: 4806 ldr r0, [pc, #24] @ (8009a5c ) 8009a44: f005 fa3c bl 800eec0 8009a48: 4603 mov r3, r0 8009a4a: 2b00 cmp r3, #0 8009a4c: d001 beq.n 8009a52 Error_Handler(); 8009a4e: f002 fccb bl 800c3e8 } } 8009a52: bf00 nop 8009a54: 3718 adds r7, #24 8009a56: 46bd mov sp, r7 8009a58: bd80 pop {r7, pc} 8009a5a: bf00 nop 8009a5c: 2000026c .word 0x2000026c 08009a60 : CAN_HandleTypeDef hcan1; CAN_HandleTypeDef hcan2; /* CAN1 init function */ void MX_CAN1_Init(void) { 8009a60: b580 push {r7, lr} 8009a62: af00 add r7, sp, #0 /* USER CODE END CAN1_Init 0 */ /* USER CODE BEGIN CAN1_Init 1 */ /* USER CODE END CAN1_Init 1 */ hcan1.Instance = CAN1; 8009a64: 4b17 ldr r3, [pc, #92] @ (8009ac4 ) 8009a66: 4a18 ldr r2, [pc, #96] @ (8009ac8 ) 8009a68: 601a str r2, [r3, #0] hcan1.Init.Prescaler = 8; 8009a6a: 4b16 ldr r3, [pc, #88] @ (8009ac4 ) 8009a6c: 2208 movs r2, #8 8009a6e: 605a str r2, [r3, #4] hcan1.Init.Mode = CAN_MODE_NORMAL; 8009a70: 4b14 ldr r3, [pc, #80] @ (8009ac4 ) 8009a72: 2200 movs r2, #0 8009a74: 609a str r2, [r3, #8] hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ; 8009a76: 4b13 ldr r3, [pc, #76] @ (8009ac4 ) 8009a78: 2200 movs r2, #0 8009a7a: 60da str r2, [r3, #12] hcan1.Init.TimeSeg1 = CAN_BS1_15TQ; 8009a7c: 4b11 ldr r3, [pc, #68] @ (8009ac4 ) 8009a7e: f44f 2260 mov.w r2, #917504 @ 0xe0000 8009a82: 611a str r2, [r3, #16] hcan1.Init.TimeSeg2 = CAN_BS2_2TQ; 8009a84: 4b0f ldr r3, [pc, #60] @ (8009ac4 ) 8009a86: f44f 1280 mov.w r2, #1048576 @ 0x100000 8009a8a: 615a str r2, [r3, #20] hcan1.Init.TimeTriggeredMode = DISABLE; 8009a8c: 4b0d ldr r3, [pc, #52] @ (8009ac4 ) 8009a8e: 2200 movs r2, #0 8009a90: 761a strb r2, [r3, #24] hcan1.Init.AutoBusOff = ENABLE; 8009a92: 4b0c ldr r3, [pc, #48] @ (8009ac4 ) 8009a94: 2201 movs r2, #1 8009a96: 765a strb r2, [r3, #25] hcan1.Init.AutoWakeUp = ENABLE; 8009a98: 4b0a ldr r3, [pc, #40] @ (8009ac4 ) 8009a9a: 2201 movs r2, #1 8009a9c: 769a strb r2, [r3, #26] hcan1.Init.AutoRetransmission = ENABLE; 8009a9e: 4b09 ldr r3, [pc, #36] @ (8009ac4 ) 8009aa0: 2201 movs r2, #1 8009aa2: 76da strb r2, [r3, #27] hcan1.Init.ReceiveFifoLocked = DISABLE; 8009aa4: 4b07 ldr r3, [pc, #28] @ (8009ac4 ) 8009aa6: 2200 movs r2, #0 8009aa8: 771a strb r2, [r3, #28] hcan1.Init.TransmitFifoPriority = ENABLE; 8009aaa: 4b06 ldr r3, [pc, #24] @ (8009ac4 ) 8009aac: 2201 movs r2, #1 8009aae: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan1) != HAL_OK) 8009ab0: 4804 ldr r0, [pc, #16] @ (8009ac4 ) 8009ab2: f005 fc47 bl 800f344 8009ab6: 4603 mov r3, r0 8009ab8: 2b00 cmp r3, #0 8009aba: d001 beq.n 8009ac0 { Error_Handler(); 8009abc: f002 fc94 bl 800c3e8 } /* USER CODE BEGIN CAN1_Init 2 */ /* USER CODE END CAN1_Init 2 */ } 8009ac0: bf00 nop 8009ac2: bd80 pop {r7, pc} 8009ac4: 200002a4 .word 0x200002a4 8009ac8: 40006400 .word 0x40006400 08009acc : /* CAN2 init function */ void MX_CAN2_Init(void) { 8009acc: b580 push {r7, lr} 8009ace: af00 add r7, sp, #0 /* USER CODE END CAN2_Init 0 */ /* USER CODE BEGIN CAN2_Init 1 */ /* USER CODE END CAN2_Init 1 */ hcan2.Instance = CAN2; 8009ad0: 4b17 ldr r3, [pc, #92] @ (8009b30 ) 8009ad2: 4a18 ldr r2, [pc, #96] @ (8009b34 ) 8009ad4: 601a str r2, [r3, #0] hcan2.Init.Prescaler = 16; 8009ad6: 4b16 ldr r3, [pc, #88] @ (8009b30 ) 8009ad8: 2210 movs r2, #16 8009ada: 605a str r2, [r3, #4] hcan2.Init.Mode = CAN_MODE_NORMAL; 8009adc: 4b14 ldr r3, [pc, #80] @ (8009b30 ) 8009ade: 2200 movs r2, #0 8009ae0: 609a str r2, [r3, #8] hcan2.Init.SyncJumpWidth = CAN_SJW_1TQ; 8009ae2: 4b13 ldr r3, [pc, #76] @ (8009b30 ) 8009ae4: 2200 movs r2, #0 8009ae6: 60da str r2, [r3, #12] hcan2.Init.TimeSeg1 = CAN_BS1_15TQ; 8009ae8: 4b11 ldr r3, [pc, #68] @ (8009b30 ) 8009aea: f44f 2260 mov.w r2, #917504 @ 0xe0000 8009aee: 611a str r2, [r3, #16] hcan2.Init.TimeSeg2 = CAN_BS2_2TQ; 8009af0: 4b0f ldr r3, [pc, #60] @ (8009b30 ) 8009af2: f44f 1280 mov.w r2, #1048576 @ 0x100000 8009af6: 615a str r2, [r3, #20] hcan2.Init.TimeTriggeredMode = DISABLE; 8009af8: 4b0d ldr r3, [pc, #52] @ (8009b30 ) 8009afa: 2200 movs r2, #0 8009afc: 761a strb r2, [r3, #24] hcan2.Init.AutoBusOff = ENABLE; 8009afe: 4b0c ldr r3, [pc, #48] @ (8009b30 ) 8009b00: 2201 movs r2, #1 8009b02: 765a strb r2, [r3, #25] hcan2.Init.AutoWakeUp = ENABLE; 8009b04: 4b0a ldr r3, [pc, #40] @ (8009b30 ) 8009b06: 2201 movs r2, #1 8009b08: 769a strb r2, [r3, #26] hcan2.Init.AutoRetransmission = ENABLE; 8009b0a: 4b09 ldr r3, [pc, #36] @ (8009b30 ) 8009b0c: 2201 movs r2, #1 8009b0e: 76da strb r2, [r3, #27] hcan2.Init.ReceiveFifoLocked = DISABLE; 8009b10: 4b07 ldr r3, [pc, #28] @ (8009b30 ) 8009b12: 2200 movs r2, #0 8009b14: 771a strb r2, [r3, #28] hcan2.Init.TransmitFifoPriority = ENABLE; 8009b16: 4b06 ldr r3, [pc, #24] @ (8009b30 ) 8009b18: 2201 movs r2, #1 8009b1a: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan2) != HAL_OK) 8009b1c: 4804 ldr r0, [pc, #16] @ (8009b30 ) 8009b1e: f005 fc11 bl 800f344 8009b22: 4603 mov r3, r0 8009b24: 2b00 cmp r3, #0 8009b26: d001 beq.n 8009b2c { Error_Handler(); 8009b28: f002 fc5e bl 800c3e8 } /* USER CODE BEGIN CAN2_Init 2 */ /* USER CODE END CAN2_Init 2 */ } 8009b2c: bf00 nop 8009b2e: bd80 pop {r7, pc} 8009b30: 200002cc .word 0x200002cc 8009b34: 40006800 .word 0x40006800 08009b38 : static uint32_t HAL_RCC_CAN1_CLK_ENABLED=0; void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle) { 8009b38: b580 push {r7, lr} 8009b3a: b08e sub sp, #56 @ 0x38 8009b3c: af00 add r7, sp, #0 8009b3e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8009b40: f107 0320 add.w r3, r7, #32 8009b44: 2200 movs r2, #0 8009b46: 601a str r2, [r3, #0] 8009b48: 605a str r2, [r3, #4] 8009b4a: 609a str r2, [r3, #8] 8009b4c: 60da str r2, [r3, #12] if(canHandle->Instance==CAN1) 8009b4e: 687b ldr r3, [r7, #4] 8009b50: 681b ldr r3, [r3, #0] 8009b52: 4a61 ldr r2, [pc, #388] @ (8009cd8 ) 8009b54: 4293 cmp r3, r2 8009b56: d153 bne.n 8009c00 { /* USER CODE BEGIN CAN1_MspInit 0 */ /* USER CODE END CAN1_MspInit 0 */ /* CAN1 clock enable */ HAL_RCC_CAN1_CLK_ENABLED++; 8009b58: 4b60 ldr r3, [pc, #384] @ (8009cdc ) 8009b5a: 681b ldr r3, [r3, #0] 8009b5c: 3301 adds r3, #1 8009b5e: 4a5f ldr r2, [pc, #380] @ (8009cdc ) 8009b60: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8009b62: 4b5e ldr r3, [pc, #376] @ (8009cdc ) 8009b64: 681b ldr r3, [r3, #0] 8009b66: 2b01 cmp r3, #1 8009b68: d10b bne.n 8009b82 __HAL_RCC_CAN1_CLK_ENABLE(); 8009b6a: 4b5d ldr r3, [pc, #372] @ (8009ce0 ) 8009b6c: 69db ldr r3, [r3, #28] 8009b6e: 4a5c ldr r2, [pc, #368] @ (8009ce0 ) 8009b70: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8009b74: 61d3 str r3, [r2, #28] 8009b76: 4b5a ldr r3, [pc, #360] @ (8009ce0 ) 8009b78: 69db ldr r3, [r3, #28] 8009b7a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8009b7e: 61fb str r3, [r7, #28] 8009b80: 69fb ldr r3, [r7, #28] } __HAL_RCC_GPIOD_CLK_ENABLE(); 8009b82: 4b57 ldr r3, [pc, #348] @ (8009ce0 ) 8009b84: 699b ldr r3, [r3, #24] 8009b86: 4a56 ldr r2, [pc, #344] @ (8009ce0 ) 8009b88: f043 0320 orr.w r3, r3, #32 8009b8c: 6193 str r3, [r2, #24] 8009b8e: 4b54 ldr r3, [pc, #336] @ (8009ce0 ) 8009b90: 699b ldr r3, [r3, #24] 8009b92: f003 0320 and.w r3, r3, #32 8009b96: 61bb str r3, [r7, #24] 8009b98: 69bb ldr r3, [r7, #24] /**CAN1 GPIO Configuration PD0 ------> CAN1_RX PD1 ------> CAN1_TX */ GPIO_InitStruct.Pin = GPIO_PIN_0; 8009b9a: 2301 movs r3, #1 8009b9c: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8009b9e: 2300 movs r3, #0 8009ba0: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8009ba2: 2300 movs r3, #0 8009ba4: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8009ba6: f107 0320 add.w r3, r7, #32 8009baa: 4619 mov r1, r3 8009bac: 484d ldr r0, [pc, #308] @ (8009ce4 ) 8009bae: f006 fd01 bl 80105b4 GPIO_InitStruct.Pin = GPIO_PIN_1; 8009bb2: 2302 movs r3, #2 8009bb4: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8009bb6: 2302 movs r3, #2 8009bb8: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8009bba: 2303 movs r3, #3 8009bbc: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8009bbe: f107 0320 add.w r3, r7, #32 8009bc2: 4619 mov r1, r3 8009bc4: 4847 ldr r0, [pc, #284] @ (8009ce4 ) 8009bc6: f006 fcf5 bl 80105b4 __HAL_AFIO_REMAP_CAN1_3(); 8009bca: 4b47 ldr r3, [pc, #284] @ (8009ce8 ) 8009bcc: 685b ldr r3, [r3, #4] 8009bce: 633b str r3, [r7, #48] @ 0x30 8009bd0: 6b3b ldr r3, [r7, #48] @ 0x30 8009bd2: f423 43c0 bic.w r3, r3, #24576 @ 0x6000 8009bd6: 633b str r3, [r7, #48] @ 0x30 8009bd8: 6b3b ldr r3, [r7, #48] @ 0x30 8009bda: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8009bde: 633b str r3, [r7, #48] @ 0x30 8009be0: 6b3b ldr r3, [r7, #48] @ 0x30 8009be2: f443 43c0 orr.w r3, r3, #24576 @ 0x6000 8009be6: 633b str r3, [r7, #48] @ 0x30 8009be8: 4a3f ldr r2, [pc, #252] @ (8009ce8 ) 8009bea: 6b3b ldr r3, [r7, #48] @ 0x30 8009bec: 6053 str r3, [r2, #4] /* CAN1 interrupt Init */ HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 0, 0); 8009bee: 2200 movs r2, #0 8009bf0: 2100 movs r1, #0 8009bf2: 2014 movs r0, #20 8009bf4: f006 fb49 bl 801028a HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn); 8009bf8: 2014 movs r0, #20 8009bfa: f006 fb62 bl 80102c2 HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); /* USER CODE BEGIN CAN2_MspInit 1 */ /* USER CODE END CAN2_MspInit 1 */ } } 8009bfe: e067 b.n 8009cd0 else if(canHandle->Instance==CAN2) 8009c00: 687b ldr r3, [r7, #4] 8009c02: 681b ldr r3, [r3, #0] 8009c04: 4a39 ldr r2, [pc, #228] @ (8009cec ) 8009c06: 4293 cmp r3, r2 8009c08: d162 bne.n 8009cd0 __HAL_RCC_CAN2_CLK_ENABLE(); 8009c0a: 4b35 ldr r3, [pc, #212] @ (8009ce0 ) 8009c0c: 69db ldr r3, [r3, #28] 8009c0e: 4a34 ldr r2, [pc, #208] @ (8009ce0 ) 8009c10: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000 8009c14: 61d3 str r3, [r2, #28] 8009c16: 4b32 ldr r3, [pc, #200] @ (8009ce0 ) 8009c18: 69db ldr r3, [r3, #28] 8009c1a: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8009c1e: 617b str r3, [r7, #20] 8009c20: 697b ldr r3, [r7, #20] HAL_RCC_CAN1_CLK_ENABLED++; 8009c22: 4b2e ldr r3, [pc, #184] @ (8009cdc ) 8009c24: 681b ldr r3, [r3, #0] 8009c26: 3301 adds r3, #1 8009c28: 4a2c ldr r2, [pc, #176] @ (8009cdc ) 8009c2a: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8009c2c: 4b2b ldr r3, [pc, #172] @ (8009cdc ) 8009c2e: 681b ldr r3, [r3, #0] 8009c30: 2b01 cmp r3, #1 8009c32: d10b bne.n 8009c4c __HAL_RCC_CAN1_CLK_ENABLE(); 8009c34: 4b2a ldr r3, [pc, #168] @ (8009ce0 ) 8009c36: 69db ldr r3, [r3, #28] 8009c38: 4a29 ldr r2, [pc, #164] @ (8009ce0 ) 8009c3a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8009c3e: 61d3 str r3, [r2, #28] 8009c40: 4b27 ldr r3, [pc, #156] @ (8009ce0 ) 8009c42: 69db ldr r3, [r3, #28] 8009c44: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8009c48: 613b str r3, [r7, #16] 8009c4a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8009c4c: 4b24 ldr r3, [pc, #144] @ (8009ce0 ) 8009c4e: 699b ldr r3, [r3, #24] 8009c50: 4a23 ldr r2, [pc, #140] @ (8009ce0 ) 8009c52: f043 0308 orr.w r3, r3, #8 8009c56: 6193 str r3, [r2, #24] 8009c58: 4b21 ldr r3, [pc, #132] @ (8009ce0 ) 8009c5a: 699b ldr r3, [r3, #24] 8009c5c: f003 0308 and.w r3, r3, #8 8009c60: 60fb str r3, [r7, #12] 8009c62: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_5; 8009c64: 2320 movs r3, #32 8009c66: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8009c68: 2300 movs r3, #0 8009c6a: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8009c6c: 2300 movs r3, #0 8009c6e: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8009c70: f107 0320 add.w r3, r7, #32 8009c74: 4619 mov r1, r3 8009c76: 481e ldr r0, [pc, #120] @ (8009cf0 ) 8009c78: f006 fc9c bl 80105b4 GPIO_InitStruct.Pin = GPIO_PIN_6; 8009c7c: 2340 movs r3, #64 @ 0x40 8009c7e: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8009c80: 2302 movs r3, #2 8009c82: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8009c84: 2303 movs r3, #3 8009c86: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8009c88: f107 0320 add.w r3, r7, #32 8009c8c: 4619 mov r1, r3 8009c8e: 4818 ldr r0, [pc, #96] @ (8009cf0 ) 8009c90: f006 fc90 bl 80105b4 __HAL_AFIO_REMAP_CAN2_ENABLE(); 8009c94: 4b14 ldr r3, [pc, #80] @ (8009ce8 ) 8009c96: 685b ldr r3, [r3, #4] 8009c98: 637b str r3, [r7, #52] @ 0x34 8009c9a: 6b7b ldr r3, [r7, #52] @ 0x34 8009c9c: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8009ca0: 637b str r3, [r7, #52] @ 0x34 8009ca2: 6b7b ldr r3, [r7, #52] @ 0x34 8009ca4: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 8009ca8: 637b str r3, [r7, #52] @ 0x34 8009caa: 4a0f ldr r2, [pc, #60] @ (8009ce8 ) 8009cac: 6b7b ldr r3, [r7, #52] @ 0x34 8009cae: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(CAN2_TX_IRQn, 0, 0); 8009cb0: 2200 movs r2, #0 8009cb2: 2100 movs r1, #0 8009cb4: 203f movs r0, #63 @ 0x3f 8009cb6: f006 fae8 bl 801028a HAL_NVIC_EnableIRQ(CAN2_TX_IRQn); 8009cba: 203f movs r0, #63 @ 0x3f 8009cbc: f006 fb01 bl 80102c2 HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 0, 0); 8009cc0: 2200 movs r2, #0 8009cc2: 2100 movs r1, #0 8009cc4: 2041 movs r0, #65 @ 0x41 8009cc6: f006 fae0 bl 801028a HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); 8009cca: 2041 movs r0, #65 @ 0x41 8009ccc: f006 faf9 bl 80102c2 } 8009cd0: bf00 nop 8009cd2: 3738 adds r7, #56 @ 0x38 8009cd4: 46bd mov sp, r7 8009cd6: bd80 pop {r7, pc} 8009cd8: 40006400 .word 0x40006400 8009cdc: 200002f4 .word 0x200002f4 8009ce0: 40021000 .word 0x40021000 8009ce4: 40011400 .word 0x40011400 8009ce8: 40010000 .word 0x40010000 8009cec: 40006800 .word 0x40006800 8009cf0: 40010c00 .word 0x40010c00 08009cf4 : #include "lock.h" #include "psu_control.h" ChargingConnector_t CONN; void CONN_Init(){ 8009cf4: b480 push {r7} 8009cf6: af00 add r7, sp, #0 CONN.connControl = CMD_NONE; 8009cf8: 4b08 ldr r3, [pc, #32] @ (8009d1c ) 8009cfa: 2200 movs r2, #0 8009cfc: 701a strb r2, [r3, #0] CONN.connState = Unknown; 8009cfe: 4b07 ldr r3, [pc, #28] @ (8009d1c ) 8009d00: 2200 movs r2, #0 8009d02: 705a strb r2, [r3, #1] CONN.RequestedVoltage = PSU_MIN_VOLTAGE; 8009d04: 4b05 ldr r3, [pc, #20] @ (8009d1c ) 8009d06: 2200 movs r2, #0 8009d08: f062 0269 orn r2, r2, #105 @ 0x69 8009d0c: 73da strb r2, [r3, #15] 8009d0e: 2200 movs r2, #0 8009d10: 741a strb r2, [r3, #16] } 8009d12: bf00 nop 8009d14: 46bd mov sp, r7 8009d16: bc80 pop {r7} 8009d18: 4770 bx lr 8009d1a: bf00 nop 8009d1c: 200002f8 .word 0x200002f8 08009d20 : void CONN_Loop(){ 8009d20: b580 push {r7, lr} 8009d22: af00 add r7, sp, #0 static CONN_State_t last_connState = Unknown; if(last_connState != CONN.connState){ 8009d24: 4b1e ldr r3, [pc, #120] @ (8009da0 ) 8009d26: 785a ldrb r2, [r3, #1] 8009d28: 4b1e ldr r3, [pc, #120] @ (8009da4 ) 8009d2a: 781b ldrb r3, [r3, #0] 8009d2c: 429a cmp r2, r3 8009d2e: d006 beq.n 8009d3e last_connState = CONN.connState; 8009d30: 4b1b ldr r3, [pc, #108] @ (8009da0 ) 8009d32: 785a ldrb r2, [r3, #1] 8009d34: 4b1b ldr r3, [pc, #108] @ (8009da4 ) 8009d36: 701a strb r2, [r3, #0] CONN.connControl = CMD_NONE; 8009d38: 4b19 ldr r3, [pc, #100] @ (8009da0 ) 8009d3a: 2200 movs r2, #0 8009d3c: 701a strb r2, [r3, #0] } if(GBT_LockState.error){ 8009d3e: 4b1a ldr r3, [pc, #104] @ (8009da8 ) 8009d40: 785b ldrb r3, [r3, #1] 8009d42: 2b00 cmp r3, #0 8009d44: d003 beq.n 8009d4e CONN.chargingError = CONN_ERR_LOCK; 8009d46: 4b16 ldr r3, [pc, #88] @ (8009da0 ) 8009d48: 2204 movs r2, #4 8009d4a: 775a strb r2, [r3, #29] 8009d4c: e016 b.n 8009d7c } else if(PSU0.cont_fault){ 8009d4e: 4b17 ldr r3, [pc, #92] @ (8009dac ) 8009d50: 7b1b ldrb r3, [r3, #12] 8009d52: 2b00 cmp r3, #0 8009d54: d003 beq.n 8009d5e CONN.chargingError = CONN_ERR_CONTACTOR; 8009d56: 4b12 ldr r3, [pc, #72] @ (8009da0 ) 8009d58: 2207 movs r2, #7 8009d5a: 775a strb r2, [r3, #29] 8009d5c: e00e b.n 8009d7c } else if(PSU0.psu_fault){ 8009d5e: 4b13 ldr r3, [pc, #76] @ (8009dac ) 8009d60: 7b5b ldrb r3, [r3, #13] 8009d62: 2b00 cmp r3, #0 8009d64: d003 beq.n 8009d6e CONN.chargingError = CONN_ERR_PSU_FAULT; 8009d66: 4b0e ldr r3, [pc, #56] @ (8009da0 ) 8009d68: 220a movs r2, #10 8009d6a: 775a strb r2, [r3, #29] 8009d6c: e006 b.n 8009d7c // } else if(!CTRL.ac_ok) { // CONN.chargingError = CONN_ERR_AC_FAULT; // } else }else if (CONN.EvConnected == 0){ 8009d6e: 4b0c ldr r3, [pc, #48] @ (8009da0 ) 8009d70: 7f9b ldrb r3, [r3, #30] 8009d72: 2b00 cmp r3, #0 8009d74: d102 bne.n 8009d7c CONN.chargingError = CONN_NO_ERROR; 8009d76: 4b0a ldr r3, [pc, #40] @ (8009da0 ) 8009d78: 2200 movs r2, #0 8009d7a: 775a strb r2, [r3, #29] } if(ED_TraceWarning(CONN.chargingError, 0)) printf("CONN%d Error: %d\n", 0, CONN.chargingError); 8009d7c: 4b08 ldr r3, [pc, #32] @ (8009da0 ) 8009d7e: 7f5b ldrb r3, [r3, #29] 8009d80: 2100 movs r1, #0 8009d82: 4618 mov r0, r3 8009d84: f002 f9de bl 800c144 8009d88: 4603 mov r3, r0 8009d8a: 2b00 cmp r3, #0 8009d8c: d006 beq.n 8009d9c 8009d8e: 4b04 ldr r3, [pc, #16] @ (8009da0 ) 8009d90: 7f5b ldrb r3, [r3, #29] 8009d92: 461a mov r2, r3 8009d94: 2100 movs r1, #0 8009d96: 4806 ldr r0, [pc, #24] @ (8009db0 ) 8009d98: f00a f9ee bl 8014178 } 8009d9c: bf00 nop 8009d9e: bd80 pop {r7, pc} 8009da0: 200002f8 .word 0x200002f8 8009da4: 20000317 .word 0x20000317 8009da8: 20000008 .word 0x20000008 8009dac: 20000a14 .word 0x20000a14 8009db0: 08016578 .word 0x08016578 08009db4 : GBT_StopSource_t GBT_StopSource; extern ConfigBlock_t config; void GBT_Init(){ 8009db4: b580 push {r7, lr} 8009db6: af00 add r7, sp, #0 GBT_State = GBT_DISABLED; 8009db8: 4b0b ldr r3, [pc, #44] @ (8009de8 ) 8009dba: 2210 movs r2, #16 8009dbc: 701a strb r2, [r3, #0] GBT_Reset(); 8009dbe: f000 ff77 bl 800acb0 GBT_MaxLoad.maxOutputVoltage = PSU_MAX_VOLTAGE*10; // 1000V 8009dc2: 4b0a ldr r3, [pc, #40] @ (8009dec ) 8009dc4: f242 7210 movw r2, #10000 @ 0x2710 8009dc8: 801a strh r2, [r3, #0] GBT_MaxLoad.minOutputVoltage = PSU_MIN_VOLTAGE*10; //150V 8009dca: 4b08 ldr r3, [pc, #32] @ (8009dec ) 8009dcc: f240 52dc movw r2, #1500 @ 0x5dc 8009dd0: 805a strh r2, [r3, #2] GBT_MaxLoad.maxOutputCurrent = 4000 - (PSU_MAX_CURRENT*10); //100A 8009dd2: 4b06 ldr r3, [pc, #24] @ (8009dec ) 8009dd4: f640 32b8 movw r2, #3000 @ 0xbb8 8009dd8: 809a strh r2, [r3, #4] GBT_MaxLoad.minOutputCurrent = 4000 - (PSU_MIN_CURRENT*10); //1A 8009dda: 4b04 ldr r3, [pc, #16] @ (8009dec ) 8009ddc: f640 7296 movw r2, #3990 @ 0xf96 8009de0: 80da strh r2, [r3, #6] } 8009de2: bf00 nop 8009de4: bd80 pop {r7, pc} 8009de6: bf00 nop 8009de8: 20000318 .word 0x20000318 8009dec: 20000330 .word 0x20000330 08009df0 : void GBT_SetConfig(){ 8009df0: b580 push {r7, lr} 8009df2: af00 add r7, sp, #0 set_Time(config.unixTime); 8009df4: 4b0c ldr r3, [pc, #48] @ (8009e28 ) 8009df6: f8d3 3007 ldr.w r3, [r3, #7] 8009dfa: 4618 mov r0, r3 8009dfc: f003 ff74 bl 800dce8 GBT_ChargerInfo.chargerLocation[0] = config.location[0]; 8009e00: 4b09 ldr r3, [pc, #36] @ (8009e28 ) 8009e02: 781a ldrb r2, [r3, #0] 8009e04: 4b09 ldr r3, [pc, #36] @ (8009e2c ) 8009e06: 715a strb r2, [r3, #5] GBT_ChargerInfo.chargerLocation[1] = config.location[1]; 8009e08: 4b07 ldr r3, [pc, #28] @ (8009e28 ) 8009e0a: 785a ldrb r2, [r3, #1] 8009e0c: 4b07 ldr r3, [pc, #28] @ (8009e2c ) 8009e0e: 719a strb r2, [r3, #6] GBT_ChargerInfo.chargerLocation[2] = config.location[2]; 8009e10: 4b05 ldr r3, [pc, #20] @ (8009e28 ) 8009e12: 789a ldrb r2, [r3, #2] 8009e14: 4b05 ldr r3, [pc, #20] @ (8009e2c ) 8009e16: 71da strb r2, [r3, #7] GBT_ChargerInfo.chargerNumber = config.chargerNumber; 8009e18: 4b03 ldr r3, [pc, #12] @ (8009e28 ) 8009e1a: f8d3 3003 ldr.w r3, [r3, #3] 8009e1e: 4a03 ldr r2, [pc, #12] @ (8009e2c ) 8009e20: f8c2 3001 str.w r3, [r2, #1] } 8009e24: bf00 nop 8009e26: bd80 pop {r7, pc} 8009e28: 2000006c .word 0x2000006c 8009e2c: 20000338 .word 0x20000338 08009e30 : void GBT_ChargerTask(){ 8009e30: b5b0 push {r4, r5, r7, lr} 8009e32: b084 sub sp, #16 8009e34: af02 add r7, sp, #8 //GBT_LockTask(); if(j_rx.state == 2){ 8009e36: 4bab ldr r3, [pc, #684] @ (800a0e4 ) 8009e38: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8009e3c: 2b02 cmp r3, #2 8009e3e: f040 80d1 bne.w 8009fe4 switch (j_rx.PGN){ 8009e42: 4ba8 ldr r3, [pc, #672] @ (800a0e4 ) 8009e44: f8d3 3100 ldr.w r3, [r3, #256] @ 0x100 8009e48: f5b3 5f1c cmp.w r3, #9984 @ 0x2700 8009e4c: d047 beq.n 8009ede 8009e4e: f5b3 5f1c cmp.w r3, #9984 @ 0x2700 8009e52: f200 80c3 bhi.w 8009fdc 8009e56: f5b3 5fe0 cmp.w r3, #7168 @ 0x1c00 8009e5a: f000 80b6 beq.w 8009fca 8009e5e: f5b3 5fe0 cmp.w r3, #7168 @ 0x1c00 8009e62: f200 80bb bhi.w 8009fdc 8009e66: f5b3 5fb8 cmp.w r3, #5888 @ 0x1700 8009e6a: f000 80b2 beq.w 8009fd2 8009e6e: f5b3 5fb8 cmp.w r3, #5888 @ 0x1700 8009e72: f200 80b3 bhi.w 8009fdc 8009e76: f5b3 5fb0 cmp.w r3, #5632 @ 0x1600 8009e7a: f000 80ac beq.w 8009fd6 8009e7e: f5b3 5fb0 cmp.w r3, #5632 @ 0x1600 8009e82: f200 80ab bhi.w 8009fdc 8009e86: f5b3 5fa8 cmp.w r3, #5376 @ 0x1500 8009e8a: f000 80a6 beq.w 8009fda 8009e8e: f5b3 5fa8 cmp.w r3, #5376 @ 0x1500 8009e92: f200 80a3 bhi.w 8009fdc 8009e96: f5b3 5f98 cmp.w r3, #4864 @ 0x1300 8009e9a: f000 8086 beq.w 8009faa 8009e9e: f5b3 5f98 cmp.w r3, #4864 @ 0x1300 8009ea2: f200 809b bhi.w 8009fdc 8009ea6: f5b3 5f88 cmp.w r3, #4352 @ 0x1100 8009eaa: d06f beq.n 8009f8c 8009eac: f5b3 5f88 cmp.w r3, #4352 @ 0x1100 8009eb0: f200 8094 bhi.w 8009fdc 8009eb4: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009eb8: d046 beq.n 8009f48 8009eba: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009ebe: f200 808d bhi.w 8009fdc 8009ec2: f5b3 6f10 cmp.w r3, #2304 @ 0x900 8009ec6: d02c beq.n 8009f22 8009ec8: f5b3 6f10 cmp.w r3, #2304 @ 0x900 8009ecc: f200 8086 bhi.w 8009fdc 8009ed0: f5b3 7f00 cmp.w r3, #512 @ 0x200 8009ed4: d00b beq.n 8009eee 8009ed6: f5b3 6fc0 cmp.w r3, #1536 @ 0x600 8009eda: d018 beq.n 8009f0e 8009edc: e07e b.n 8009fdc case 0x2700: //PGN BHM GBT_BHM_recv = 1; 8009ede: 4b82 ldr r3, [pc, #520] @ (800a0e8 ) 8009ee0: 2201 movs r2, #1 8009ee2: 701a strb r2, [r3, #0] memcpy (&GBT_MaxVoltage, j_rx.data, sizeof(GBT_MaxVoltage)); 8009ee4: 4b7f ldr r3, [pc, #508] @ (800a0e4 ) 8009ee6: 881a ldrh r2, [r3, #0] 8009ee8: 4b80 ldr r3, [pc, #512] @ (800a0ec ) 8009eea: 801a strh r2, [r3, #0] break; 8009eec: e076 b.n 8009fdc case 0x0200: //PGN BRM LONG GBT_BAT_INFO_recv = 1; 8009eee: 4b80 ldr r3, [pc, #512] @ (800a0f0 ) 8009ef0: 2201 movs r2, #1 8009ef2: 701a strb r2, [r3, #0] memcpy (&GBT_EVInfo, j_rx.data, sizeof(GBT_EVInfo)); 8009ef4: 4a7f ldr r2, [pc, #508] @ (800a0f4 ) 8009ef6: 4b7b ldr r3, [pc, #492] @ (800a0e4 ) 8009ef8: 4614 mov r4, r2 8009efa: 461d mov r5, r3 8009efc: cd0f ldmia r5!, {r0, r1, r2, r3} 8009efe: c40f stmia r4!, {r0, r1, r2, r3} 8009f00: cd0f ldmia r5!, {r0, r1, r2, r3} 8009f02: c40f stmia r4!, {r0, r1, r2, r3} 8009f04: cd0f ldmia r5!, {r0, r1, r2, r3} 8009f06: c40f stmia r4!, {r0, r1, r2, r3} 8009f08: 682b ldr r3, [r5, #0] 8009f0a: 7023 strb r3, [r4, #0] break; 8009f0c: e066 b.n 8009fdc case 0x0600: //PGN BCP LONG GBT_BAT_STAT_recv = 1; 8009f0e: 4b7a ldr r3, [pc, #488] @ (800a0f8 ) 8009f10: 2201 movs r2, #1 8009f12: 701a strb r2, [r3, #0] memcpy (&GBT_BATStat, j_rx.data, sizeof(GBT_BATStat)); 8009f14: 4a79 ldr r2, [pc, #484] @ (800a0fc ) 8009f16: 4b73 ldr r3, [pc, #460] @ (800a0e4 ) 8009f18: 4614 mov r4, r2 8009f1a: cb0f ldmia r3, {r0, r1, r2, r3} 8009f1c: c407 stmia r4!, {r0, r1, r2} 8009f1e: 7023 strb r3, [r4, #0] break; 8009f20: e05c b.n 8009fdc case 0x0900: //PGN BRO GBT_BRO_recv = 1; 8009f22: 4b77 ldr r3, [pc, #476] @ (800a100 ) 8009f24: 2201 movs r2, #1 8009f26: 701a strb r2, [r3, #0] if(j_rx.data[0] == 0xAA) EV_ready = 1; 8009f28: 4b6e ldr r3, [pc, #440] @ (800a0e4 ) 8009f2a: 781b ldrb r3, [r3, #0] 8009f2c: 2baa cmp r3, #170 @ 0xaa 8009f2e: d103 bne.n 8009f38 8009f30: 4b74 ldr r3, [pc, #464] @ (800a104 ) 8009f32: 2201 movs r2, #1 8009f34: 701a strb r2, [r3, #0] 8009f36: e002 b.n 8009f3e else EV_ready = 0; 8009f38: 4b72 ldr r3, [pc, #456] @ (800a104 ) 8009f3a: 2200 movs r2, #0 8009f3c: 701a strb r2, [r3, #0] GBT_BRO = j_rx.data[0]; 8009f3e: 4b69 ldr r3, [pc, #420] @ (800a0e4 ) 8009f40: 781a ldrb r2, [r3, #0] 8009f42: 4b71 ldr r3, [pc, #452] @ (800a108 ) 8009f44: 701a strb r2, [r3, #0] break; 8009f46: e049 b.n 8009fdc case 0x1000: //PGN BCL GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 8009f48: f004 fcc8 bl 800e8dc 8009f4c: 4603 mov r3, r0 8009f4e: 4a6f ldr r2, [pc, #444] @ (800a10c ) 8009f50: 6013 str r3, [r2, #0] //TODO: power block memcpy (&GBT_ReqPower, j_rx.data, sizeof(GBT_ReqPower)); 8009f52: 4b6f ldr r3, [pc, #444] @ (800a110 ) 8009f54: 4a63 ldr r2, [pc, #396] @ (800a0e4 ) 8009f56: e892 0003 ldmia.w r2, {r0, r1} 8009f5a: 6018 str r0, [r3, #0] 8009f5c: 3304 adds r3, #4 8009f5e: 7019 strb r1, [r3, #0] uint16_t volt = GBT_ReqPower.requestedVoltage; // 0.1V/bit 8009f60: 4b6b ldr r3, [pc, #428] @ (800a110 ) 8009f62: 881b ldrh r3, [r3, #0] 8009f64: 80fb strh r3, [r7, #6] uint16_t curr = 4000 - GBT_ReqPower.requestedCurrent; // 0.1A/bit 8009f66: 4b6a ldr r3, [pc, #424] @ (800a110 ) 8009f68: 885b ldrh r3, [r3, #2] 8009f6a: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 8009f6e: 80bb strh r3, [r7, #4] CONN.RequestedVoltage = volt / 10; // В 8009f70: 88fb ldrh r3, [r7, #6] 8009f72: 4a68 ldr r2, [pc, #416] @ (800a114 ) 8009f74: fba2 2303 umull r2, r3, r2, r3 8009f78: 08db lsrs r3, r3, #3 8009f7a: b29a uxth r2, r3 8009f7c: 4b66 ldr r3, [pc, #408] @ (800a118 ) 8009f7e: f8a3 200f strh.w r2, [r3, #15] CONN.WantedCurrent = curr; // 0.1A 8009f82: 4b65 ldr r3, [pc, #404] @ (800a118 ) 8009f84: 88ba ldrh r2, [r7, #4] 8009f86: f8a3 201b strh.w r2, [r3, #27] break; 8009f8a: e027 b.n 8009fdc case 0x1100: //PGN BCS GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 8009f8c: f004 fca6 bl 800e8dc 8009f90: 4603 mov r3, r0 8009f92: 4a5e ldr r2, [pc, #376] @ (800a10c ) 8009f94: 6013 str r3, [r2, #0] //TODO memcpy (&GBT_ChargingStatus, j_rx.data, sizeof(GBT_ChargingStatus)); 8009f96: 4b61 ldr r3, [pc, #388] @ (800a11c ) 8009f98: 4a52 ldr r2, [pc, #328] @ (800a0e4 ) 8009f9a: ca07 ldmia r2, {r0, r1, r2} 8009f9c: c303 stmia r3!, {r0, r1} 8009f9e: 701a strb r2, [r3, #0] CONN.SOC = GBT_ChargingStatus.currentChargeState; 8009fa0: 4b5e ldr r3, [pc, #376] @ (800a11c ) 8009fa2: 799a ldrb r2, [r3, #6] 8009fa4: 4b5c ldr r3, [pc, #368] @ (800a118 ) 8009fa6: 709a strb r2, [r3, #2] break; 8009fa8: e018 b.n 8009fdc case 0x1300: //PGN BSM GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 8009faa: f004 fc97 bl 800e8dc 8009fae: 4603 mov r3, r0 8009fb0: 4a56 ldr r2, [pc, #344] @ (800a10c ) 8009fb2: 6013 str r3, [r2, #0] //TODO memcpy (&GBT_BatteryStatus, j_rx.data, sizeof(GBT_BatteryStatus)); 8009fb4: 4b5a ldr r3, [pc, #360] @ (800a120 ) 8009fb6: 4a4b ldr r2, [pc, #300] @ (800a0e4 ) 8009fb8: e892 0003 ldmia.w r2, {r0, r1} 8009fbc: 6018 str r0, [r3, #0] 8009fbe: 3304 adds r3, #4 8009fc0: 8019 strh r1, [r3, #0] 8009fc2: 3302 adds r3, #2 8009fc4: 0c0a lsrs r2, r1, #16 8009fc6: 701a strb r2, [r3, #0] break; 8009fc8: e008 b.n 8009fdc // case 0x1900: //PGN BST // break; case 0x1C00: //PGN BSD //TODO SOC Voltage Temp GBT_BSD_recv = 1; 8009fca: 4b56 ldr r3, [pc, #344] @ (800a124 ) 8009fcc: 2201 movs r2, #1 8009fce: 701a strb r2, [r3, #0] break; 8009fd0: e004 b.n 8009fdc break; 8009fd2: bf00 nop 8009fd4: e002 b.n 8009fdc break; 8009fd6: bf00 nop 8009fd8: e000 b.n 8009fdc break; 8009fda: bf00 nop // break; //BSM BMV BMT BSP BST BSD BEM } j_rx.state = 0; 8009fdc: 4b41 ldr r3, [pc, #260] @ (800a0e4 ) 8009fde: 2200 movs r2, #0 8009fe0: f883 210a strb.w r2, [r3, #266] @ 0x10a } if((HAL_GetTick() - GBT_delay_start) < GBT_delay){ 8009fe4: f004 fc7a bl 800e8dc 8009fe8: 4602 mov r2, r0 8009fea: 4b4f ldr r3, [pc, #316] @ (800a128 ) 8009fec: 681b ldr r3, [r3, #0] 8009fee: 1ad2 subs r2, r2, r3 8009ff0: 4b4e ldr r3, [pc, #312] @ (800a12c ) 8009ff2: 681b ldr r3, [r3, #0] 8009ff4: 429a cmp r2, r3 8009ff6: f0c0 84c7 bcc.w 800a988 //waiting }else switch (GBT_State){ 8009ffa: 4b4d ldr r3, [pc, #308] @ (800a130 ) 8009ffc: 781b ldrb r3, [r3, #0] 8009ffe: 3b10 subs r3, #16 800a000: 2b12 cmp r3, #18 800a002: f200 84a2 bhi.w 800a94a 800a006: a201 add r2, pc, #4 @ (adr r2, 800a00c ) 800a008: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a00c: 0800a059 .word 0x0800a059 800a010: 0800a94b .word 0x0800a94b 800a014: 0800a94b .word 0x0800a94b 800a018: 0800a07f .word 0x0800a07f 800a01c: 0800a091 .word 0x0800a091 800a020: 0800a141 .word 0x0800a141 800a024: 0800a18b .word 0x0800a18b 800a028: 0800a1fd .word 0x0800a1fd 800a02c: 0800a29f .word 0x0800a29f 800a030: 0800a2f1 .word 0x0800a2f1 800a034: 0800a47d .word 0x0800a47d 800a038: 0800a581 .word 0x0800a581 800a03c: 0800a613 .word 0x0800a613 800a040: 0800a669 .word 0x0800a669 800a044: 0800a6db .word 0x0800a6db 800a048: 0800a8c3 .word 0x0800a8c3 800a04c: 0800a905 .word 0x0800a905 800a050: 0800a925 .word 0x0800a925 800a054: 0800a937 .word 0x0800a937 case GBT_DISABLED: RELAY_Write(RELAY_AUX0, 0); 800a058: 2100 movs r1, #0 800a05a: 2000 movs r0, #0 800a05c: f7ff fb46 bl 80096ec RELAY_Write(RELAY_AUX1, 0); 800a060: 2100 movs r1, #0 800a062: 2001 movs r0, #1 800a064: f7ff fb42 bl 80096ec if(connectorState == Preparing){ 800a068: 4b32 ldr r3, [pc, #200] @ (800a134 ) 800a06a: 781b ldrb r3, [r3, #0] 800a06c: 2b03 cmp r3, #3 800a06e: f040 8470 bne.w 800a952 GBT_Reset(); 800a072: f000 fe1d bl 800acb0 GBT_Start();//TODO IF protections (maybe not needed) 800a076: f000 fea9 bl 800adcc } break; 800a07a: f000 bc6a b.w 800a952 case GBT_S3_STARTED: GBT_SwitchState(GBT_S31_WAIT_BHM); 800a07e: 2014 movs r0, #20 800a080: f000 fcb4 bl 800a9ec GBT_Delay(500); 800a084: f44f 70fa mov.w r0, #500 @ 0x1f4 800a088: f000 fd68 bl 800ab5c break; 800a08c: f000 bc7c b.w 800a988 case GBT_S31_WAIT_BHM: if(j_rx.state == 0) GBT_SendCHM(); 800a090: 4b14 ldr r3, [pc, #80] @ (800a0e4 ) 800a092: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a096: 2b00 cmp r3, #0 800a098: d101 bne.n 800a09e 800a09a: f001 fabd bl 800b618 GBT_Delay(250); 800a09e: 20fa movs r0, #250 @ 0xfa 800a0a0: f000 fd5c bl 800ab5c if(GBT_BHM_recv) { 800a0a4: 4b10 ldr r3, [pc, #64] @ (800a0e8 ) 800a0a6: 781b ldrb r3, [r3, #0] 800a0a8: 2b00 cmp r3, #0 800a0aa: d002 beq.n 800a0b2 GBT_SwitchState(GBT_S4_WAIT_PSU_READY); 800a0ac: 2015 movs r0, #21 800a0ae: f000 fc9d bl 800a9ec } //Timeout 10S if((GBT_BHM_recv == 0) && (GBT_StateTick()>10000)) { //BHM Timeout 800a0b2: 4b0d ldr r3, [pc, #52] @ (800a0e8 ) 800a0b4: 781b ldrb r3, [r3, #0] 800a0b6: 2b00 cmp r3, #0 800a0b8: f040 844d bne.w 800a956 800a0bc: f000 fd42 bl 800ab44 800a0c0: 4603 mov r3, r0 800a0c2: f242 7210 movw r2, #10000 @ 0x2710 800a0c6: 4293 cmp r3, r2 800a0c8: f240 8445 bls.w 800a956 GBT_Error(0xFCF0C0FC); 800a0cc: 481a ldr r0, [pc, #104] @ (800a138 ) 800a0ce: f000 fdd3 bl 800ac78 CONN.chargingError = CONN_ERR_EV_COMM; 800a0d2: 4b11 ldr r3, [pc, #68] @ (800a118 ) 800a0d4: 2209 movs r2, #9 800a0d6: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "BHM Timeout\n"); 800a0d8: 4918 ldr r1, [pc, #96] @ (800a13c ) 800a0da: 2004 movs r0, #4 800a0dc: f001 fa42 bl 800b564 } break; 800a0e0: f000 bc39 b.w 800a956 800a0e4: 20000874 .word 0x20000874 800a0e8: 2000032b .word 0x2000032b 800a0ec: 20000340 .word 0x20000340 800a0f0: 20000328 .word 0x20000328 800a0f4: 20000344 .word 0x20000344 800a0f8: 20000329 .word 0x20000329 800a0fc: 20000378 .word 0x20000378 800a100: 2000032a .word 0x2000032a 800a104: 2000032d .word 0x2000032d 800a108: 200003bc .word 0x200003bc 800a10c: 200003c4 .word 0x200003c4 800a110: 20000388 .word 0x20000388 800a114: cccccccd .word 0xcccccccd 800a118: 200002f8 .word 0x200002f8 800a11c: 20000398 .word 0x20000398 800a120: 200003a4 .word 0x200003a4 800a124: 2000032c .word 0x2000032c 800a128: 20000320 .word 0x20000320 800a12c: 20000324 .word 0x20000324 800a130: 20000318 .word 0x20000318 800a134: 200003d1 .word 0x200003d1 800a138: fcf0c0fc .word 0xfcf0c0fc 800a13c: 080165c0 .word 0x080165c0 case GBT_S4_WAIT_PSU_READY: if(j_rx.state == 0) GBT_SendCHM(); 800a140: 4baf ldr r3, [pc, #700] @ (800a400 ) 800a142: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a146: 2b00 cmp r3, #0 800a148: d101 bne.n 800a14e 800a14a: f001 fa65 bl 800b618 GBT_Delay(250); 800a14e: 20fa movs r0, #250 @ 0xfa 800a150: f000 fd04 bl 800ab5c if(PSU0.ready){ 800a154: 4bab ldr r3, [pc, #684] @ (800a404 ) 800a156: 7a5b ldrb r3, [r3, #9] 800a158: 2b00 cmp r3, #0 800a15a: d002 beq.n 800a162 GBT_SwitchState(GBT_S4_WAIT_PSU_ON); 800a15c: 2016 movs r0, #22 800a15e: f000 fc45 bl 800a9ec } if(GBT_StateTick()>10000){ 800a162: f000 fcef bl 800ab44 800a166: 4603 mov r3, r0 800a168: f242 7210 movw r2, #10000 @ 0x2710 800a16c: 4293 cmp r3, r2 800a16e: f240 83f4 bls.w 800a95a GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a172: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a176: f000 fd2b bl 800abd0 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a17a: 4ba3 ldr r3, [pc, #652] @ (800a408 ) 800a17c: 220a movs r2, #10 800a17e: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU ready timeout, stopping...\n"); 800a180: 49a2 ldr r1, [pc, #648] @ (800a40c ) 800a182: 2004 movs r0, #4 800a184: f001 f9ee bl 800b564 break; 800a188: e3fe b.n 800a988 } break; case GBT_S4_WAIT_PSU_ON: if(j_rx.state == 0) GBT_SendCHM(); 800a18a: 4b9d ldr r3, [pc, #628] @ (800a400 ) 800a18c: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a190: 2b00 cmp r3, #0 800a192: d101 bne.n 800a198 800a194: f001 fa40 bl 800b618 GBT_Delay(250); 800a198: 20fa movs r0, #250 @ 0xfa 800a19a: f000 fcdf bl 800ab5c CONN.RequestedVoltage = GBT_MaxVoltage.maxOutputVoltage / 10; // 0.1V -> V 800a19e: 4b9c ldr r3, [pc, #624] @ (800a410 ) 800a1a0: 881b ldrh r3, [r3, #0] 800a1a2: 4a9c ldr r2, [pc, #624] @ (800a414 ) 800a1a4: fba2 2303 umull r2, r3, r2, r3 800a1a8: 08db lsrs r3, r3, #3 800a1aa: b29a uxth r2, r3 800a1ac: 4b96 ldr r3, [pc, #600] @ (800a408 ) 800a1ae: f8a3 200f strh.w r2, [r3, #15] CONN.WantedCurrent = 10; // 1A max (0.1A units) 800a1b2: 4b95 ldr r3, [pc, #596] @ (800a408 ) 800a1b4: 2200 movs r2, #0 800a1b6: f042 020a orr.w r2, r2, #10 800a1ba: 76da strb r2, [r3, #27] 800a1bc: 2200 movs r2, #0 800a1be: 771a strb r2, [r3, #28] CONN.EnableOutput = 1; 800a1c0: 4b91 ldr r3, [pc, #580] @ (800a408 ) 800a1c2: 2201 movs r2, #1 800a1c4: 75da strb r2, [r3, #23] if(PSU0.state == PSU_CONNECTED){ 800a1c6: 4b8f ldr r3, [pc, #572] @ (800a404 ) 800a1c8: 79db ldrb r3, [r3, #7] 800a1ca: 2b05 cmp r3, #5 800a1cc: d102 bne.n 800a1d4 GBT_SwitchState(GBT_S4_ISOTEST); 800a1ce: 2017 movs r0, #23 800a1d0: f000 fc0c bl 800a9ec } if(GBT_StateTick()>10000){ 800a1d4: f000 fcb6 bl 800ab44 800a1d8: 4603 mov r3, r0 800a1da: f242 7210 movw r2, #10000 @ 0x2710 800a1de: 4293 cmp r3, r2 800a1e0: f240 83bd bls.w 800a95e GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a1e4: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a1e8: f000 fcf2 bl 800abd0 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a1ec: 4b86 ldr r3, [pc, #536] @ (800a408 ) 800a1ee: 220a movs r2, #10 800a1f0: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU on timeout, stopping...\n"); 800a1f2: 4989 ldr r1, [pc, #548] @ (800a418 ) 800a1f4: 2004 movs r0, #4 800a1f6: f001 f9b5 bl 800b564 break; 800a1fa: e3c5 b.n 800a988 } break; case GBT_S4_ISOTEST: if(j_rx.state == 0) GBT_SendCHM(); 800a1fc: 4b80 ldr r3, [pc, #512] @ (800a400 ) 800a1fe: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a202: 2b00 cmp r3, #0 800a204: d101 bne.n 800a20a 800a206: f001 fa07 bl 800b618 GBT_Delay(250); 800a20a: 20fa movs r0, #250 @ 0xfa 800a20c: f000 fca6 bl 800ab5c //TODO: Isolation test trigger if(CONN.chargingError != CONN_NO_ERROR){ 800a210: 4b7d ldr r3, [pc, #500] @ (800a408 ) 800a212: 7f5b ldrb r3, [r3, #29] 800a214: 2b00 cmp r3, #0 800a216: d003 beq.n 800a220 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a218: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a21c: f000 fcd8 bl 800abd0 } if(GBT_StateTick()>5000){ 800a220: f000 fc90 bl 800ab44 800a224: 4603 mov r3, r0 800a226: f241 3288 movw r2, #5000 @ 0x1388 800a22a: 4293 cmp r3, r2 800a22c: d902 bls.n 800a234 GBT_SwitchState(GBT_S4_WAIT_PSU_OFF); 800a22e: 2018 movs r0, #24 800a230: f000 fbdc bl 800a9ec } if(ISO.isolationResistance < (ISO.voltageComm/2)){ // *100/1000 800a234: 4b79 ldr r3, [pc, #484] @ (800a41c ) 800a236: f8b3 3001 ldrh.w r3, [r3, #1] 800a23a: b29b uxth r3, r3 800a23c: 4619 mov r1, r3 800a23e: 4b77 ldr r3, [pc, #476] @ (800a41c ) 800a240: f9b3 3007 ldrsh.w r3, [r3, #7] 800a244: b21b sxth r3, r3 800a246: 0fda lsrs r2, r3, #31 800a248: 4413 add r3, r2 800a24a: 105b asrs r3, r3, #1 800a24c: b21b sxth r3, r3 800a24e: 4299 cmp r1, r3 800a250: da06 bge.n 800a260 CONN.chargingError = CONN_ERR_INSULATION; 800a252: 4b6d ldr r3, [pc, #436] @ (800a408 ) 800a254: 2201 movs r2, #1 800a256: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Isolation warning\n"); 800a258: 4971 ldr r1, [pc, #452] @ (800a420 ) 800a25a: 2005 movs r0, #5 800a25c: f001 f982 bl 800b564 } // 500 Ohm/V if(ISO.isolationResistance < (ISO.voltageComm/10)){ // *100/1000 800a260: 4b6e ldr r3, [pc, #440] @ (800a41c ) 800a262: f8b3 3001 ldrh.w r3, [r3, #1] 800a266: b29b uxth r3, r3 800a268: 4619 mov r1, r3 800a26a: 4b6c ldr r3, [pc, #432] @ (800a41c ) 800a26c: f9b3 3007 ldrsh.w r3, [r3, #7] 800a270: b21b sxth r3, r3 800a272: 4a6c ldr r2, [pc, #432] @ (800a424 ) 800a274: fb82 0203 smull r0, r2, r2, r3 800a278: 1092 asrs r2, r2, #2 800a27a: 17db asrs r3, r3, #31 800a27c: 1ad3 subs r3, r2, r3 800a27e: b21b sxth r3, r3 800a280: 4299 cmp r1, r3 800a282: f280 836e bge.w 800a962 CONN.chargingError = CONN_ERR_INSULATION; 800a286: 4b60 ldr r3, [pc, #384] @ (800a408 ) 800a288: 2201 movs r2, #1 800a28a: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Current leakage, insulation error, stopping...\n"); 800a28c: 4966 ldr r1, [pc, #408] @ (800a428 ) 800a28e: 2005 movs r0, #5 800a290: f001 f968 bl 800b564 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a294: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a298: f000 fc9a bl 800abd0 } // 100 Ohm/V break; 800a29c: e361 b.n 800a962 case GBT_S4_WAIT_PSU_OFF: CONN.RequestedVoltage = 0; 800a29e: 4b5a ldr r3, [pc, #360] @ (800a408 ) 800a2a0: 2200 movs r2, #0 800a2a2: 73da strb r2, [r3, #15] 800a2a4: 2200 movs r2, #0 800a2a6: 741a strb r2, [r3, #16] CONN.WantedCurrent = 0; 800a2a8: 4b57 ldr r3, [pc, #348] @ (800a408 ) 800a2aa: 2200 movs r2, #0 800a2ac: 76da strb r2, [r3, #27] 800a2ae: 2200 movs r2, #0 800a2b0: 771a strb r2, [r3, #28] CONN.EnableOutput = 0; 800a2b2: 4b55 ldr r3, [pc, #340] @ (800a408 ) 800a2b4: 2200 movs r2, #0 800a2b6: 75da strb r2, [r3, #23] if(GBT_StateTick()>5000){ 800a2b8: f000 fc44 bl 800ab44 800a2bc: 4603 mov r3, r0 800a2be: f241 3288 movw r2, #5000 @ 0x1388 800a2c2: 4293 cmp r3, r2 800a2c4: d90b bls.n 800a2de GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a2c6: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a2ca: f000 fc81 bl 800abd0 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a2ce: 4b4e ldr r3, [pc, #312] @ (800a408 ) 800a2d0: 220a movs r2, #10 800a2d2: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU off timeout, stopping...\n"); 800a2d4: 4955 ldr r1, [pc, #340] @ (800a42c ) 800a2d6: 2004 movs r0, #4 800a2d8: f001 f944 bl 800b564 break; 800a2dc: e354 b.n 800a988 } if(PSU0.PSU_enabled == 0){ 800a2de: 4b49 ldr r3, [pc, #292] @ (800a404 ) 800a2e0: 7a9b ldrb r3, [r3, #10] 800a2e2: 2b00 cmp r3, #0 800a2e4: f040 833f bne.w 800a966 GBT_SwitchState(GBT_S5_BAT_INFO); 800a2e8: 2019 movs r0, #25 800a2ea: f000 fb7f bl 800a9ec } break; 800a2ee: e33a b.n 800a966 case GBT_S5_BAT_INFO: if(j_rx.state == 0) GBT_SendCRM(0x00); 800a2f0: 4b43 ldr r3, [pc, #268] @ (800a400 ) 800a2f2: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a2f6: 2b00 cmp r3, #0 800a2f8: d102 bne.n 800a300 800a2fa: 2000 movs r0, #0 800a2fc: f001 f9a0 bl 800b640 GBT_Delay(250); 800a300: 20fa movs r0, #250 @ 0xfa 800a302: f000 fc2b bl 800ab5c if(GBT_BAT_INFO_recv){ //BRM 800a306: 4b4a ldr r3, [pc, #296] @ (800a430 ) 800a308: 781b ldrb r3, [r3, #0] 800a30a: 2b00 cmp r3, #0 800a30c: d060 beq.n 800a3d0 //Got battery info GBT_SwitchState(GBT_S6_BAT_STAT); 800a30e: 201a movs r0, #26 800a310: f000 fb6c bl 800a9ec log_printf(LOG_INFO, "EV info:\n"); 800a314: 4947 ldr r1, [pc, #284] @ (800a434 ) 800a316: 2007 movs r0, #7 800a318: f001 f924 bl 800b564 log_printf(LOG_INFO, "GBT_ver V%d.%d%d\n",GBT_EVInfo.version[0],GBT_EVInfo.version[1],GBT_EVInfo.version[2]); 800a31c: 4b46 ldr r3, [pc, #280] @ (800a438 ) 800a31e: 781b ldrb r3, [r3, #0] 800a320: 461a mov r2, r3 800a322: 4b45 ldr r3, [pc, #276] @ (800a438 ) 800a324: 785b ldrb r3, [r3, #1] 800a326: 4619 mov r1, r3 800a328: 4b43 ldr r3, [pc, #268] @ (800a438 ) 800a32a: 789b ldrb r3, [r3, #2] 800a32c: 9300 str r3, [sp, #0] 800a32e: 460b mov r3, r1 800a330: 4942 ldr r1, [pc, #264] @ (800a43c ) 800a332: 2007 movs r0, #7 800a334: f001 f916 bl 800b564 log_printf(LOG_INFO, "Battery type: %d\n",GBT_EVInfo.batteryType); 800a338: 4b3f ldr r3, [pc, #252] @ (800a438 ) 800a33a: 78db ldrb r3, [r3, #3] 800a33c: 461a mov r2, r3 800a33e: 4940 ldr r1, [pc, #256] @ (800a440 ) 800a340: 2007 movs r0, #7 800a342: f001 f90f bl 800b564 log_printf(LOG_INFO, "Battery capacity: %d\n", GBT_EVInfo.batteryCapacity); // 0.1Ah/bit 800a346: 4b3c ldr r3, [pc, #240] @ (800a438 ) 800a348: 889b ldrh r3, [r3, #4] 800a34a: 461a mov r2, r3 800a34c: 493d ldr r1, [pc, #244] @ (800a444 ) 800a34e: 2007 movs r0, #7 800a350: f001 f908 bl 800b564 log_printf(LOG_INFO, "Battery voltage: %d\n", GBT_EVInfo.batteryVoltage); // 0.1V/bit 800a354: 4b38 ldr r3, [pc, #224] @ (800a438 ) 800a356: 88db ldrh r3, [r3, #6] 800a358: 461a mov r2, r3 800a35a: 493b ldr r1, [pc, #236] @ (800a448 ) 800a35c: 2007 movs r0, #7 800a35e: f001 f901 bl 800b564 log_printf(LOG_INFO, "Battery vendor: %.4s\n", GBT_EVInfo.batteryVendor); // Battery vendor (ASCII string) 800a362: 4a3a ldr r2, [pc, #232] @ (800a44c ) 800a364: 493a ldr r1, [pc, #232] @ (800a450 ) 800a366: 2007 movs r0, #7 800a368: f001 f8fc bl 800b564 log_printf(LOG_INFO, "Battery SN: %lu\n", GBT_EVInfo.batterySN); // int 800a36c: 4b32 ldr r3, [pc, #200] @ (800a438 ) 800a36e: 68db ldr r3, [r3, #12] 800a370: 461a mov r2, r3 800a372: 4938 ldr r1, [pc, #224] @ (800a454 ) 800a374: 2007 movs r0, #7 800a376: f001 f8f5 bl 800b564 log_printf(LOG_INFO, "Battery manufacture date: %02d.%02d.%04d\n", GBT_EVInfo.batteryManuD, GBT_EVInfo.batteryManuM ,GBT_EVInfo.batteryManuY+1985); // year (offset 1985) 800a37a: 4b2f ldr r3, [pc, #188] @ (800a438 ) 800a37c: 7c9b ldrb r3, [r3, #18] 800a37e: 461a mov r2, r3 800a380: 4b2d ldr r3, [pc, #180] @ (800a438 ) 800a382: 7c5b ldrb r3, [r3, #17] 800a384: 4619 mov r1, r3 800a386: 4b2c ldr r3, [pc, #176] @ (800a438 ) 800a388: 7c1b ldrb r3, [r3, #16] 800a38a: f203 73c1 addw r3, r3, #1985 @ 0x7c1 800a38e: 9300 str r3, [sp, #0] 800a390: 460b mov r3, r1 800a392: 4931 ldr r1, [pc, #196] @ (800a458 ) 800a394: 2007 movs r0, #7 800a396: f001 f8e5 bl 800b564 log_printf(LOG_INFO, "Battery cycles: %d\n", GBT_EVInfo.batteryCycleCount); //uint24_t 800a39a: 4b27 ldr r3, [pc, #156] @ (800a438 ) 800a39c: 7cda ldrb r2, [r3, #19] 800a39e: 8a9b ldrh r3, [r3, #20] 800a3a0: 021b lsls r3, r3, #8 800a3a2: 4313 orrs r3, r2 800a3a4: 461a mov r2, r3 800a3a6: 492d ldr r1, [pc, #180] @ (800a45c ) 800a3a8: 2007 movs r0, #7 800a3aa: f001 f8db bl 800b564 log_printf(LOG_INFO, "Own auto: %d\n", GBT_EVInfo.ownAuto); // 0 = lizing, 1 = own auto 800a3ae: 4b22 ldr r3, [pc, #136] @ (800a438 ) 800a3b0: 7d9b ldrb r3, [r3, #22] 800a3b2: 461a mov r2, r3 800a3b4: 492a ldr r1, [pc, #168] @ (800a460 ) 800a3b6: 2007 movs r0, #7 800a3b8: f001 f8d4 bl 800b564 log_printf(LOG_INFO, "EVIN: %.17s\n", GBT_EVInfo.EVIN); //EVIN 800a3bc: 4a29 ldr r2, [pc, #164] @ (800a464 ) 800a3be: 492a ldr r1, [pc, #168] @ (800a468 ) 800a3c0: 2007 movs r0, #7 800a3c2: f001 f8cf bl 800b564 log_printf(LOG_INFO, "EV_SW_VER: %.8s\n", GBT_EVInfo.EV_SW_VER); 800a3c6: 4a29 ldr r2, [pc, #164] @ (800a46c ) 800a3c8: 4929 ldr r1, [pc, #164] @ (800a470 ) 800a3ca: 2007 movs r0, #7 800a3cc: f001 f8ca bl 800b564 } //Timeout if((GBT_StateTick()>5000) && (GBT_BAT_INFO_recv == 0)){ 800a3d0: f000 fbb8 bl 800ab44 800a3d4: 4603 mov r3, r0 800a3d6: f241 3288 movw r2, #5000 @ 0x1388 800a3da: 4293 cmp r3, r2 800a3dc: f240 82c5 bls.w 800a96a 800a3e0: 4b13 ldr r3, [pc, #76] @ (800a430 ) 800a3e2: 781b ldrb r3, [r3, #0] 800a3e4: 2b00 cmp r3, #0 800a3e6: f040 82c0 bne.w 800a96a CONN.chargingError = CONN_ERR_EV_COMM; 800a3ea: 4b07 ldr r3, [pc, #28] @ (800a408 ) 800a3ec: 2209 movs r2, #9 800a3ee: 775a strb r2, [r3, #29] GBT_Error(0xFDF0C0FC); //BRM Timeout 800a3f0: 4820 ldr r0, [pc, #128] @ (800a474 ) 800a3f2: f000 fc41 bl 800ac78 log_printf(LOG_ERR, "BRM Timeout\n"); 800a3f6: 4920 ldr r1, [pc, #128] @ (800a478 ) 800a3f8: 2004 movs r0, #4 800a3fa: f001 f8b3 bl 800b564 } break; 800a3fe: e2b4 b.n 800a96a 800a400: 20000874 .word 0x20000874 800a404: 20000a14 .word 0x20000a14 800a408: 200002f8 .word 0x200002f8 800a40c: 080165d0 .word 0x080165d0 800a410: 20000340 .word 0x20000340 800a414: cccccccd .word 0xcccccccd 800a418: 080165f0 .word 0x080165f0 800a41c: 20000060 .word 0x20000060 800a420: 08016610 .word 0x08016610 800a424: 66666667 .word 0x66666667 800a428: 08016624 .word 0x08016624 800a42c: 08016654 .word 0x08016654 800a430: 20000328 .word 0x20000328 800a434: 08016674 .word 0x08016674 800a438: 20000344 .word 0x20000344 800a43c: 08016680 .word 0x08016680 800a440: 08016694 .word 0x08016694 800a444: 080166a8 .word 0x080166a8 800a448: 080166c0 .word 0x080166c0 800a44c: 2000034c .word 0x2000034c 800a450: 080166d8 .word 0x080166d8 800a454: 080166f0 .word 0x080166f0 800a458: 08016704 .word 0x08016704 800a45c: 08016730 .word 0x08016730 800a460: 08016744 .word 0x08016744 800a464: 2000035c .word 0x2000035c 800a468: 08016754 .word 0x08016754 800a46c: 2000036d .word 0x2000036d 800a470: 08016764 .word 0x08016764 800a474: fdf0c0fc .word 0xfdf0c0fc 800a478: 08016778 .word 0x08016778 case GBT_S6_BAT_STAT: if(j_rx.state == 0) GBT_SendCRM(0xAA); 800a47c: 4bb0 ldr r3, [pc, #704] @ (800a740 ) 800a47e: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a482: 2b00 cmp r3, #0 800a484: d102 bne.n 800a48c 800a486: 20aa movs r0, #170 @ 0xaa 800a488: f001 f8da bl 800b640 GBT_Delay(250); 800a48c: 20fa movs r0, #250 @ 0xfa 800a48e: f000 fb65 bl 800ab5c if(GBT_BAT_STAT_recv){ 800a492: 4bac ldr r3, [pc, #688] @ (800a744 ) 800a494: 781b ldrb r3, [r3, #0] 800a496: 2b00 cmp r3, #0 800a498: d05a beq.n 800a550 //Got battery status GBT_SwitchState(GBT_S7_BMS_WAIT); 800a49a: 201b movs r0, #27 800a49c: f000 faa6 bl 800a9ec log_printf(LOG_INFO, "Battery info:\n"); 800a4a0: 49a9 ldr r1, [pc, #676] @ (800a748 ) 800a4a2: 2007 movs r0, #7 800a4a4: f001 f85e bl 800b564 log_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxCellVoltage/100); // 0.01v/bit 800a4a8: 4ba8 ldr r3, [pc, #672] @ (800a74c ) 800a4aa: 881b ldrh r3, [r3, #0] 800a4ac: 4aa8 ldr r2, [pc, #672] @ (800a750 ) 800a4ae: fba2 2303 umull r2, r3, r2, r3 800a4b2: 095b lsrs r3, r3, #5 800a4b4: b29b uxth r3, r3 800a4b6: 461a mov r2, r3 800a4b8: 49a6 ldr r1, [pc, #664] @ (800a754 ) 800a4ba: 2007 movs r0, #7 800a4bc: f001 f852 bl 800b564 log_printf(LOG_INFO, "maxCC %dA\n",GBT_BATStat.maxChargingCurrent/10); // 0.1A/bit 800a4c0: 4ba2 ldr r3, [pc, #648] @ (800a74c ) 800a4c2: 885b ldrh r3, [r3, #2] 800a4c4: 4aa4 ldr r2, [pc, #656] @ (800a758 ) 800a4c6: fba2 2303 umull r2, r3, r2, r3 800a4ca: 08db lsrs r3, r3, #3 800a4cc: b29b uxth r3, r3 800a4ce: 461a mov r2, r3 800a4d0: 49a2 ldr r1, [pc, #648] @ (800a75c ) 800a4d2: 2007 movs r0, #7 800a4d4: f001 f846 bl 800b564 log_printf(LOG_INFO, "totE %dkWh\n",GBT_BATStat.totalEnergy/10); // 0.1kWh 800a4d8: 4b9c ldr r3, [pc, #624] @ (800a74c ) 800a4da: 889b ldrh r3, [r3, #4] 800a4dc: 4a9e ldr r2, [pc, #632] @ (800a758 ) 800a4de: fba2 2303 umull r2, r3, r2, r3 800a4e2: 08db lsrs r3, r3, #3 800a4e4: b29b uxth r3, r3 800a4e6: 461a mov r2, r3 800a4e8: 499d ldr r1, [pc, #628] @ (800a760 ) 800a4ea: 2007 movs r0, #7 800a4ec: f001 f83a bl 800b564 log_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxChargingVoltage/10); // 0.1V/ bit 800a4f0: 4b96 ldr r3, [pc, #600] @ (800a74c ) 800a4f2: 88db ldrh r3, [r3, #6] 800a4f4: 4a98 ldr r2, [pc, #608] @ (800a758 ) 800a4f6: fba2 2303 umull r2, r3, r2, r3 800a4fa: 08db lsrs r3, r3, #3 800a4fc: b29b uxth r3, r3 800a4fe: 461a mov r2, r3 800a500: 4994 ldr r1, [pc, #592] @ (800a754 ) 800a502: 2007 movs r0, #7 800a504: f001 f82e bl 800b564 log_printf(LOG_INFO, "maxT %dC\n",(int16_t)GBT_BATStat.maxTemp-50); // 1C/bit, -50C offset 800a508: 4b90 ldr r3, [pc, #576] @ (800a74c ) 800a50a: 7a1b ldrb r3, [r3, #8] 800a50c: 3b32 subs r3, #50 @ 0x32 800a50e: 461a mov r2, r3 800a510: 4994 ldr r1, [pc, #592] @ (800a764 ) 800a512: 2007 movs r0, #7 800a514: f001 f826 bl 800b564 log_printf(LOG_INFO, "SOC %dp\n",GBT_BATStat.SOC/10); // 0.1%/bit , 0..100% 800a518: 4b8c ldr r3, [pc, #560] @ (800a74c ) 800a51a: f8b3 3009 ldrh.w r3, [r3, #9] 800a51e: b29b uxth r3, r3 800a520: 4a8d ldr r2, [pc, #564] @ (800a758 ) 800a522: fba2 2303 umull r2, r3, r2, r3 800a526: 08db lsrs r3, r3, #3 800a528: b29b uxth r3, r3 800a52a: 461a mov r2, r3 800a52c: 498e ldr r1, [pc, #568] @ (800a768 ) 800a52e: 2007 movs r0, #7 800a530: f001 f818 bl 800b564 log_printf(LOG_INFO, "Volt. %dV\n",GBT_BATStat.measVoltage/10); // 0.1V/bit 800a534: 4b85 ldr r3, [pc, #532] @ (800a74c ) 800a536: f8b3 300b ldrh.w r3, [r3, #11] 800a53a: b29b uxth r3, r3 800a53c: 4a86 ldr r2, [pc, #536] @ (800a758 ) 800a53e: fba2 2303 umull r2, r3, r2, r3 800a542: 08db lsrs r3, r3, #3 800a544: b29b uxth r3, r3 800a546: 461a mov r2, r3 800a548: 4988 ldr r1, [pc, #544] @ (800a76c ) 800a54a: 2007 movs r0, #7 800a54c: f001 f80a bl 800b564 } if((GBT_StateTick()>5000) && (GBT_BAT_STAT_recv == 0)){ 800a550: f000 faf8 bl 800ab44 800a554: 4603 mov r3, r0 800a556: f241 3288 movw r2, #5000 @ 0x1388 800a55a: 4293 cmp r3, r2 800a55c: f240 8207 bls.w 800a96e 800a560: 4b78 ldr r3, [pc, #480] @ (800a744 ) 800a562: 781b ldrb r3, [r3, #0] 800a564: 2b00 cmp r3, #0 800a566: f040 8202 bne.w 800a96e CONN.chargingError = CONN_ERR_EV_COMM; 800a56a: 4b81 ldr r3, [pc, #516] @ (800a770 ) 800a56c: 2209 movs r2, #9 800a56e: 775a strb r2, [r3, #29] GBT_Error(0xFCF1C0FC); //BCP Timeout 800a570: 4880 ldr r0, [pc, #512] @ (800a774 ) 800a572: f000 fb81 bl 800ac78 log_printf(LOG_ERR, "BCP Timeout\n"); 800a576: 4980 ldr r1, [pc, #512] @ (800a778 ) 800a578: 2004 movs r0, #4 800a57a: f000 fff3 bl 800b564 } break; 800a57e: e1f6 b.n 800a96e case GBT_S7_BMS_WAIT: if(j_rx.state == 0) GBT_SendCTS(); 800a580: 4b6f ldr r3, [pc, #444] @ (800a740 ) 800a582: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a586: 2b00 cmp r3, #0 800a588: d101 bne.n 800a58e 800a58a: f001 f821 bl 800b5d0 HAL_Delay(2); 800a58e: 2002 movs r0, #2 800a590: f004 f9ae bl 800e8f0 if(j_rx.state == 0) GBT_SendCML(); 800a594: 4b6a ldr r3, [pc, #424] @ (800a740 ) 800a596: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a59a: 2b00 cmp r3, #0 800a59c: d101 bne.n 800a5a2 800a59e: f001 f82d bl 800b5fc GBT_Delay(250); 800a5a2: 20fa movs r0, #250 @ 0xfa 800a5a4: f000 fada bl 800ab5c if((GBT_StateTick()>5000) && (GBT_BRO_recv == 0)){ 800a5a8: f000 facc bl 800ab44 800a5ac: 4603 mov r3, r0 800a5ae: f241 3288 movw r2, #5000 @ 0x1388 800a5b2: 4293 cmp r3, r2 800a5b4: d90d bls.n 800a5d2 800a5b6: 4b71 ldr r3, [pc, #452] @ (800a77c ) 800a5b8: 781b ldrb r3, [r3, #0] 800a5ba: 2b00 cmp r3, #0 800a5bc: d109 bne.n 800a5d2 CONN.chargingError = CONN_ERR_EV_COMM; 800a5be: 4b6c ldr r3, [pc, #432] @ (800a770 ) 800a5c0: 2209 movs r2, #9 800a5c2: 775a strb r2, [r3, #29] GBT_Error(0xFCF4C0FC); //BRO Timeout 800a5c4: 486e ldr r0, [pc, #440] @ (800a780 ) 800a5c6: f000 fb57 bl 800ac78 log_printf(LOG_ERR, "BRO Timeout\n"); 800a5ca: 496e ldr r1, [pc, #440] @ (800a784 ) 800a5cc: 2004 movs r0, #4 800a5ce: f000 ffc9 bl 800b564 } if(EV_ready){ 800a5d2: 4b6d ldr r3, [pc, #436] @ (800a788 ) 800a5d4: 781b ldrb r3, [r3, #0] 800a5d6: 2b00 cmp r3, #0 800a5d8: d003 beq.n 800a5e2 //EV ready (AA) GBT_SwitchState(GBT_S8_INIT_CHARGER); 800a5da: 201c movs r0, #28 800a5dc: f000 fa06 bl 800a9ec CONN.chargingError = CONN_ERR_EV_COMM; GBT_Error(0xFCF4C0FC); //BRO Timeout log_printf(LOG_ERR, "EV not ready for a 60s\n"); } } break; 800a5e0: e1c7 b.n 800a972 if((GBT_StateTick()>60000) && (GBT_BRO_recv == 1)){ 800a5e2: f000 faaf bl 800ab44 800a5e6: 4603 mov r3, r0 800a5e8: f64e 2260 movw r2, #60000 @ 0xea60 800a5ec: 4293 cmp r3, r2 800a5ee: f240 81c0 bls.w 800a972 800a5f2: 4b62 ldr r3, [pc, #392] @ (800a77c ) 800a5f4: 781b ldrb r3, [r3, #0] 800a5f6: 2b01 cmp r3, #1 800a5f8: f040 81bb bne.w 800a972 CONN.chargingError = CONN_ERR_EV_COMM; 800a5fc: 4b5c ldr r3, [pc, #368] @ (800a770 ) 800a5fe: 2209 movs r2, #9 800a600: 775a strb r2, [r3, #29] GBT_Error(0xFCF4C0FC); //BRO Timeout 800a602: 485f ldr r0, [pc, #380] @ (800a780 ) 800a604: f000 fb38 bl 800ac78 log_printf(LOG_ERR, "EV not ready for a 60s\n"); 800a608: 4960 ldr r1, [pc, #384] @ (800a78c ) 800a60a: 2004 movs r0, #4 800a60c: f000 ffaa bl 800b564 break; 800a610: e1af b.n 800a972 case GBT_S8_INIT_CHARGER: if(j_rx.state == 0) GBT_SendCRO(0x00); 800a612: 4b4b ldr r3, [pc, #300] @ (800a740 ) 800a614: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a618: 2b00 cmp r3, #0 800a61a: d102 bne.n 800a622 800a61c: 2000 movs r0, #0 800a61e: f001 f825 bl 800b66c //TODO GBT_Delay(250); 800a622: 20fa movs r0, #250 @ 0xfa 800a624: f000 fa9a bl 800ab5c // if(GBT_StateTick()>1500){ if(PSU0.ready){ 800a628: 4b59 ldr r3, [pc, #356] @ (800a790 ) 800a62a: 7a5b ldrb r3, [r3, #9] 800a62c: 2b00 cmp r3, #0 800a62e: d002 beq.n 800a636 //Power Modules initiated GBT_SwitchState(GBT_S9_WAIT_BCL); 800a630: 201d movs r0, #29 800a632: f000 f9db bl 800a9ec } if((GBT_StateTick()>6000) && (PSU0.ready == 0)){ 800a636: f000 fa85 bl 800ab44 800a63a: 4603 mov r3, r0 800a63c: f241 7270 movw r2, #6000 @ 0x1770 800a640: 4293 cmp r3, r2 800a642: f240 8198 bls.w 800a976 800a646: 4b52 ldr r3, [pc, #328] @ (800a790 ) 800a648: 7a5b ldrb r3, [r3, #9] 800a64a: 2b00 cmp r3, #0 800a64c: f040 8193 bne.w 800a976 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a650: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a654: f000 fabc bl 800abd0 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a658: 4b45 ldr r3, [pc, #276] @ (800a770 ) 800a65a: 220a movs r2, #10 800a65c: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU not ready, stopping...\n"); 800a65e: 494d ldr r1, [pc, #308] @ (800a794 ) 800a660: 2004 movs r0, #4 800a662: f000 ff7f bl 800b564 } break; 800a666: e186 b.n 800a976 case GBT_S9_WAIT_BCL: if(j_rx.state == 0) GBT_SendCRO(0xAA); 800a668: 4b35 ldr r3, [pc, #212] @ (800a740 ) 800a66a: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a66e: 2b00 cmp r3, #0 800a670: d102 bne.n 800a678 800a672: 20aa movs r0, #170 @ 0xaa 800a674: f000 fffa bl 800b66c GBT_Delay(250); 800a678: 20fa movs r0, #250 @ 0xfa 800a67a: f000 fa6f bl 800ab5c if(GBT_ReqPower.chargingMode != 0){ //REFACTORING 800a67e: 4b46 ldr r3, [pc, #280] @ (800a798 ) 800a680: 791b ldrb r3, [r3, #4] 800a682: 2b00 cmp r3, #0 800a684: f000 8179 beq.w 800a97a //BCL power requirements received GBT_SwitchState(GBT_S10_CHARGING); 800a688: 201e movs r0, #30 800a68a: f000 f9af bl 800a9ec GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 800a68e: f004 f925 bl 800e8dc 800a692: 4603 mov r3, r0 800a694: 4a41 ldr r2, [pc, #260] @ (800a79c ) 800a696: 6013 str r3, [r2, #0] CONN_SetState(Charging); 800a698: 2008 movs r0, #8 800a69a: f000 fce7 bl 800b06c uint16_t curr = 4000 - GBT_ReqPower.requestedCurrent; 800a69e: 4b3e ldr r3, [pc, #248] @ (800a798 ) 800a6a0: 885b ldrh r3, [r3, #2] 800a6a2: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 800a6a6: 807b strh r3, [r7, #2] uint16_t volt = GBT_ReqPower.requestedVoltage; 800a6a8: 4b3b ldr r3, [pc, #236] @ (800a798 ) 800a6aa: 881b ldrh r3, [r3, #0] 800a6ac: 803b strh r3, [r7, #0] //TODO Limits CONN.RequestedVoltage = volt / 10; // В 800a6ae: 883b ldrh r3, [r7, #0] 800a6b0: 4a29 ldr r2, [pc, #164] @ (800a758 ) 800a6b2: fba2 2303 umull r2, r3, r2, r3 800a6b6: 08db lsrs r3, r3, #3 800a6b8: b29a uxth r2, r3 800a6ba: 4b2d ldr r3, [pc, #180] @ (800a770 ) 800a6bc: f8a3 200f strh.w r2, [r3, #15] CONN.WantedCurrent = curr; // 0.1A 800a6c0: 4b2b ldr r3, [pc, #172] @ (800a770 ) 800a6c2: 887a ldrh r2, [r7, #2] 800a6c4: f8a3 201b strh.w r2, [r3, #27] CONN.EnableOutput = 1; 800a6c8: 4b29 ldr r3, [pc, #164] @ (800a770 ) 800a6ca: 2201 movs r2, #1 800a6cc: 75da strb r2, [r3, #23] GBT_TimeChargingStarted = get_Current_Time(); 800a6ce: f003 fb01 bl 800dcd4 800a6d2: 4603 mov r3, r0 800a6d4: 4a32 ldr r2, [pc, #200] @ (800a7a0 ) 800a6d6: 6013 str r3, [r2, #0] } break; 800a6d8: e14f b.n 800a97a case GBT_S10_CHARGING: //CHARGING if((HAL_GetTick() - GBT_last_BCL_BCS_BSM_tick) > GBT_BCL_BCS_BSM_TIMEOUT_MS){ 800a6da: f004 f8ff bl 800e8dc 800a6de: 4602 mov r2, r0 800a6e0: 4b2e ldr r3, [pc, #184] @ (800a79c ) 800a6e2: 681b ldr r3, [r3, #0] 800a6e4: 1ad3 subs r3, r2, r3 800a6e6: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800a6ea: d90b bls.n 800a704 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a6ec: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a6f0: f000 fa6e bl 800abd0 CONN.chargingError = CONN_ERR_EV_COMM; 800a6f4: 4b1e ldr r3, [pc, #120] @ (800a770 ) 800a6f6: 2209 movs r2, #9 800a6f8: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "BCL/BCS/BSM timeout, stopping...\n"); 800a6fa: 492a ldr r1, [pc, #168] @ (800a7a4 ) 800a6fc: 2005 movs r0, #5 800a6fe: f000 ff31 bl 800b564 break; 800a702: e141 b.n 800a988 } if(CONN.connControl == CMD_STOP) GBT_StopOCPP(GBT_CST_SUSPENDS_ARTIFICIALLY); 800a704: 4b1a ldr r3, [pc, #104] @ (800a770 ) 800a706: 781b ldrb r3, [r3, #0] 800a708: 2b01 cmp r3, #1 800a70a: d102 bne.n 800a712 800a70c: 4826 ldr r0, [pc, #152] @ (800a7a8 ) 800a70e: f000 fa7b bl 800ac08 if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_StopOCPP(GBT_CST_SUSPENDS_ARTIFICIALLY); // --> Finished 800a712: 4b17 ldr r3, [pc, #92] @ (800a770 ) 800a714: 781b ldrb r3, [r3, #0] 800a716: 2b03 cmp r3, #3 800a718: d102 bne.n 800a720 800a71a: 4823 ldr r0, [pc, #140] @ (800a7a8 ) 800a71c: f000 fa74 bl 800ac08 if(GBT_LockState.error) { 800a720: 4b22 ldr r3, [pc, #136] @ (800a7ac ) 800a722: 785b ldrb r3, [r3, #1] 800a724: 2b00 cmp r3, #0 800a726: d045 beq.n 800a7b4 GBT_StopEVSE(GBT_CST_OTHERFALUT); // --> Suspend EVSE 800a728: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a72c: f000 fa50 bl 800abd0 CONN.chargingError = CONN_ERR_LOCK; 800a730: 4b0f ldr r3, [pc, #60] @ (800a770 ) 800a732: 2204 movs r2, #4 800a734: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Lock error, stopping...\n"); 800a736: 491e ldr r1, [pc, #120] @ (800a7b0 ) 800a738: 2005 movs r0, #5 800a73a: f000 ff13 bl 800b564 break; 800a73e: e123 b.n 800a988 800a740: 20000874 .word 0x20000874 800a744: 20000329 .word 0x20000329 800a748: 08016788 .word 0x08016788 800a74c: 20000378 .word 0x20000378 800a750: 51eb851f .word 0x51eb851f 800a754: 08016798 .word 0x08016798 800a758: cccccccd .word 0xcccccccd 800a75c: 080167a4 .word 0x080167a4 800a760: 080167b0 .word 0x080167b0 800a764: 080167bc .word 0x080167bc 800a768: 080167c8 .word 0x080167c8 800a76c: 080167d4 .word 0x080167d4 800a770: 200002f8 .word 0x200002f8 800a774: fcf1c0fc .word 0xfcf1c0fc 800a778: 080167e0 .word 0x080167e0 800a77c: 2000032a .word 0x2000032a 800a780: fcf4c0fc .word 0xfcf4c0fc 800a784: 080167f0 .word 0x080167f0 800a788: 2000032d .word 0x2000032d 800a78c: 08016800 .word 0x08016800 800a790: 20000a14 .word 0x20000a14 800a794: 08016818 .word 0x08016818 800a798: 20000388 .word 0x20000388 800a79c: 200003c4 .word 0x200003c4 800a7a0: 200003c0 .word 0x200003c0 800a7a4: 08016834 .word 0x08016834 800a7a8: 0400f0f0 .word 0x0400f0f0 800a7ac: 20000008 .word 0x20000008 800a7b0: 08016858 .word 0x08016858 } if(CONN_CC_GetState()!=GBT_CC_4V){ 800a7b4: f000 fd36 bl 800b224 800a7b8: 4603 mov r3, r0 800a7ba: 2b03 cmp r3, #3 800a7bc: d00b beq.n 800a7d6 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a7be: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a7c2: f000 fa05 bl 800abd0 CONN.chargingError = CONN_ERR_HOTPLUG; 800a7c6: 4b78 ldr r3, [pc, #480] @ (800a9a8 ) 800a7c8: 2208 movs r2, #8 800a7ca: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Hotplug detected, stopping...\n"); 800a7cc: 4977 ldr r1, [pc, #476] @ (800a9ac ) 800a7ce: 2005 movs r0, #5 800a7d0: f000 fec8 bl 800b564 break; 800a7d4: e0d8 b.n 800a988 } if((GBT_ReadTemp(0) > 90) || (GBT_ReadTemp(1) > 90)) { 800a7d6: 2000 movs r0, #0 800a7d8: f7ff f8e0 bl 800999c 800a7dc: 4603 mov r3, r0 800a7de: 2b5a cmp r3, #90 @ 0x5a 800a7e0: dc05 bgt.n 800a7ee 800a7e2: 2001 movs r0, #1 800a7e4: f7ff f8da bl 800999c 800a7e8: 4603 mov r3, r0 800a7ea: 2b5a cmp r3, #90 @ 0x5a 800a7ec: dd14 ble.n 800a818 GBT_StopEVSE(GBT_CST_CONNECTOR_OVER_TEMP); 800a7ee: 4870 ldr r0, [pc, #448] @ (800a9b0 ) 800a7f0: f000 f9ee bl 800abd0 CONN.chargingError = CONN_ERR_CONN_TEMP; 800a7f4: 4b6c ldr r3, [pc, #432] @ (800a9a8 ) 800a7f6: 2205 movs r2, #5 800a7f8: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Connector overheat %d %d, stopping...\n", GBT_ReadTemp(0), GBT_ReadTemp(1)); 800a7fa: 2000 movs r0, #0 800a7fc: f7ff f8ce bl 800999c 800a800: 4603 mov r3, r0 800a802: 461c mov r4, r3 800a804: 2001 movs r0, #1 800a806: f7ff f8c9 bl 800999c 800a80a: 4603 mov r3, r0 800a80c: 4622 mov r2, r4 800a80e: 4969 ldr r1, [pc, #420] @ (800a9b4 ) 800a810: 2005 movs r0, #5 800a812: f000 fea7 bl 800b564 break; 800a816: e0b7 b.n 800a988 } if(ISO.isolationResistance < (ISO.voltageComm/10)){ // *100/1000 800a818: 4b67 ldr r3, [pc, #412] @ (800a9b8 ) 800a81a: f8b3 3001 ldrh.w r3, [r3, #1] 800a81e: b29b uxth r3, r3 800a820: 4619 mov r1, r3 800a822: 4b65 ldr r3, [pc, #404] @ (800a9b8 ) 800a824: f9b3 3007 ldrsh.w r3, [r3, #7] 800a828: b21b sxth r3, r3 800a82a: 4a64 ldr r2, [pc, #400] @ (800a9bc ) 800a82c: fb82 0203 smull r0, r2, r2, r3 800a830: 1092 asrs r2, r2, #2 800a832: 17db asrs r3, r3, #31 800a834: 1ad3 subs r3, r2, r3 800a836: b21b sxth r3, r3 800a838: 4299 cmp r1, r3 800a83a: da06 bge.n 800a84a CONN.chargingError = CONN_ERR_INSULATION; 800a83c: 4b5a ldr r3, [pc, #360] @ (800a9a8 ) 800a83e: 2201 movs r2, #1 800a840: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Current leakage, insulation error, stopping...\n"); 800a842: 495f ldr r1, [pc, #380] @ (800a9c0 ) 800a844: 2005 movs r0, #5 800a846: f000 fe8d bl 800b564 } // 100 Ohm/V if(CONN.chargingError != CONN_NO_ERROR){ // --> Suspend EVSE 800a84a: 4b57 ldr r3, [pc, #348] @ (800a9a8 ) 800a84c: 7f5b ldrb r3, [r3, #29] 800a84e: 2b00 cmp r3, #0 800a850: d003 beq.n 800a85a GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a852: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a856: f000 f9bb bl 800abd0 } //GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111100;//NOT PERMITTED GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111101; 800a85a: 4b5a ldr r3, [pc, #360] @ (800a9c4 ) 800a85c: f64f 72fd movw r2, #65533 @ 0xfffd 800a860: 80da strh r2, [r3, #6] GBT_ChargerCurrentStatus.chargingTime = (get_Current_Time() - GBT_TimeChargingStarted)/60; 800a862: f003 fa37 bl 800dcd4 800a866: 4602 mov r2, r0 800a868: 4b57 ldr r3, [pc, #348] @ (800a9c8 ) 800a86a: 681b ldr r3, [r3, #0] 800a86c: 1ad3 subs r3, r2, r3 800a86e: 4a57 ldr r2, [pc, #348] @ (800a9cc ) 800a870: fba2 2303 umull r2, r3, r2, r3 800a874: 095b lsrs r3, r3, #5 800a876: b29a uxth r2, r3 800a878: 4b52 ldr r3, [pc, #328] @ (800a9c4 ) 800a87a: 809a strh r2, [r3, #4] GBT_ChargerCurrentStatus.outputCurrent = 4000 - CONN.MeasuredCurrent; // 0.1A 800a87c: 4b4a ldr r3, [pc, #296] @ (800a9a8 ) 800a87e: f8b3 3015 ldrh.w r3, [r3, #21] 800a882: b29b uxth r3, r3 800a884: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 800a888: b29a uxth r2, r3 800a88a: 4b4e ldr r3, [pc, #312] @ (800a9c4 ) 800a88c: 805a strh r2, [r3, #2] GBT_ChargerCurrentStatus.outputVoltage = CONN.MeasuredVoltage * 10; // V -> 0.1V 800a88e: 4b46 ldr r3, [pc, #280] @ (800a9a8 ) 800a890: f8b3 3013 ldrh.w r3, [r3, #19] 800a894: b29b uxth r3, r3 800a896: 461a mov r2, r3 800a898: 0092 lsls r2, r2, #2 800a89a: 4413 add r3, r2 800a89c: 005b lsls r3, r3, #1 800a89e: b29a uxth r2, r3 800a8a0: 4b48 ldr r3, [pc, #288] @ (800a9c4 ) 800a8a2: 801a strh r2, [r3, #0] if(j_rx.state == 0) { 800a8a4: 4b4a ldr r3, [pc, #296] @ (800a9d0 ) 800a8a6: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a8aa: 2b00 cmp r3, #0 800a8ac: d105 bne.n 800a8ba GBT_SendCCS(); 800a8ae: f000 fef1 bl 800b694 GBT_Delay(49); 800a8b2: 2031 movs r0, #49 @ 0x31 800a8b4: f000 f952 bl 800ab5c } //TODO: снижение тока если перегрев контактов break; 800a8b8: e066 b.n 800a988 GBT_Delay(10); // Resend packet if not sent 800a8ba: 200a movs r0, #10 800a8bc: f000 f94e bl 800ab5c break; 800a8c0: e062 b.n 800a988 case GBT_STOP: GBT_Delay(10); 800a8c2: 200a movs r0, #10 800a8c4: f000 f94a bl 800ab5c CONN.EnableOutput = 0; 800a8c8: 4b37 ldr r3, [pc, #220] @ (800a9a8 ) 800a8ca: 2200 movs r2, #0 800a8cc: 75da strb r2, [r3, #23] GBT_SendCST(GBT_StopCauseCode); 800a8ce: 4b41 ldr r3, [pc, #260] @ (800a9d4 ) 800a8d0: 681b ldr r3, [r3, #0] 800a8d2: 4618 mov r0, r3 800a8d4: f000 feec bl 800b6b0 //RELAY_Write(RELAY_OUTPUT, 0); //GBT_SwitchState(GBT_DISABLED); if(GBT_StateTick()>10000){ 800a8d8: f000 f934 bl 800ab44 800a8dc: 4603 mov r3, r0 800a8de: f242 7210 movw r2, #10000 @ 0x2710 800a8e2: 4293 cmp r3, r2 800a8e4: d906 bls.n 800a8f4 log_printf(LOG_ERR, "BSD Timeout\n"); 800a8e6: 493c ldr r1, [pc, #240] @ (800a9d8 ) 800a8e8: 2004 movs r0, #4 800a8ea: f000 fe3b bl 800b564 GBT_Error(0xFCF0C0FD); //BSD Timeout 800a8ee: 483b ldr r0, [pc, #236] @ (800a9dc ) 800a8f0: f000 f9c2 bl 800ac78 } if(GBT_BSD_recv != 0){ 800a8f4: 4b3a ldr r3, [pc, #232] @ (800a9e0 ) 800a8f6: 781b ldrb r3, [r3, #0] 800a8f8: 2b00 cmp r3, #0 800a8fa: d040 beq.n 800a97e GBT_SwitchState(GBT_STOP_CSD); 800a8fc: 2020 movs r0, #32 800a8fe: f000 f875 bl 800a9ec } break; 800a902: e03c b.n 800a97e case GBT_STOP_CSD: GBT_Delay(250); 800a904: 20fa movs r0, #250 @ 0xfa 800a906: f000 f929 bl 800ab5c GBT_SendCSD(); 800a90a: f000 fef1 bl 800b6f0 if(GBT_StateTick()>2500){ //2.5S 800a90e: f000 f919 bl 800ab44 800a912: 4603 mov r3, r0 800a914: f640 12c4 movw r2, #2500 @ 0x9c4 800a918: 4293 cmp r3, r2 800a91a: d932 bls.n 800a982 GBT_SwitchState(GBT_COMPLETE); 800a91c: 2022 movs r0, #34 @ 0x22 800a91e: f000 f865 bl 800a9ec } break; 800a922: e02e b.n 800a982 case GBT_ERROR: GBT_SendCEM(GBT_ErrorCode); //2.5S 800a924: 4b2f ldr r3, [pc, #188] @ (800a9e4 ) 800a926: 681b ldr r3, [r3, #0] 800a928: 4618 mov r0, r3 800a92a: f000 ff01 bl 800b730 GBT_SwitchState(GBT_COMPLETE); 800a92e: 2022 movs r0, #34 @ 0x22 800a930: f000 f85c bl 800a9ec break; 800a934: e028 b.n 800a988 case GBT_COMPLETE: if(connectorState != Finished) { 800a936: 4b2c ldr r3, [pc, #176] @ (800a9e8 ) 800a938: 781b ldrb r3, [r3, #0] 800a93a: 2b0a cmp r3, #10 800a93c: d023 beq.n 800a986 GBT_SwitchState(GBT_DISABLED); 800a93e: 2010 movs r0, #16 800a940: f000 f854 bl 800a9ec GBT_Reset();//CHECK 800a944: f000 f9b4 bl 800acb0 } break; 800a948: e01d b.n 800a986 default: GBT_SwitchState(GBT_DISABLED); 800a94a: 2010 movs r0, #16 800a94c: f000 f84e bl 800a9ec 800a950: e01a b.n 800a988 break; 800a952: bf00 nop 800a954: e018 b.n 800a988 break; 800a956: bf00 nop 800a958: e016 b.n 800a988 break; 800a95a: bf00 nop 800a95c: e014 b.n 800a988 break; 800a95e: bf00 nop 800a960: e012 b.n 800a988 break; 800a962: bf00 nop 800a964: e010 b.n 800a988 break; 800a966: bf00 nop 800a968: e00e b.n 800a988 break; 800a96a: bf00 nop 800a96c: e00c b.n 800a988 break; 800a96e: bf00 nop 800a970: e00a b.n 800a988 break; 800a972: bf00 nop 800a974: e008 b.n 800a988 break; 800a976: bf00 nop 800a978: e006 b.n 800a988 break; 800a97a: bf00 nop 800a97c: e004 b.n 800a988 break; 800a97e: bf00 nop 800a980: e002 b.n 800a988 break; 800a982: bf00 nop 800a984: e000 b.n 800a988 break; 800a986: bf00 nop } if (CONN_CC_GetState()==GBT_CC_4V) CONN.EvConnected = 1; 800a988: f000 fc4c bl 800b224 800a98c: 4603 mov r3, r0 800a98e: 2b03 cmp r3, #3 800a990: d103 bne.n 800a99a 800a992: 4b05 ldr r3, [pc, #20] @ (800a9a8 ) 800a994: 2201 movs r2, #1 800a996: 779a strb r2, [r3, #30] else CONN.EvConnected = 0; } 800a998: e002 b.n 800a9a0 else CONN.EvConnected = 0; 800a99a: 4b03 ldr r3, [pc, #12] @ (800a9a8 ) 800a99c: 2200 movs r2, #0 800a99e: 779a strb r2, [r3, #30] } 800a9a0: bf00 nop 800a9a2: 3708 adds r7, #8 800a9a4: 46bd mov sp, r7 800a9a6: bdb0 pop {r4, r5, r7, pc} 800a9a8: 200002f8 .word 0x200002f8 800a9ac: 08016874 .word 0x08016874 800a9b0: 0001f0f0 .word 0x0001f0f0 800a9b4: 08016894 .word 0x08016894 800a9b8: 20000060 .word 0x20000060 800a9bc: 66666667 .word 0x66666667 800a9c0: 08016624 .word 0x08016624 800a9c4: 200003ac .word 0x200003ac 800a9c8: 200003c0 .word 0x200003c0 800a9cc: 88888889 .word 0x88888889 800a9d0: 20000874 .word 0x20000874 800a9d4: 200003c8 .word 0x200003c8 800a9d8: 080168bc .word 0x080168bc 800a9dc: fcf0c0fd .word 0xfcf0c0fd 800a9e0: 2000032c .word 0x2000032c 800a9e4: 200003cc .word 0x200003cc 800a9e8: 200003d1 .word 0x200003d1 0800a9ec : void GBT_SwitchState(gbtState_t state){ 800a9ec: b580 push {r7, lr} 800a9ee: b082 sub sp, #8 800a9f0: af00 add r7, sp, #0 800a9f2: 4603 mov r3, r0 800a9f4: 71fb strb r3, [r7, #7] GBT_State = state; 800a9f6: 4a42 ldr r2, [pc, #264] @ (800ab00 ) 800a9f8: 79fb ldrb r3, [r7, #7] 800a9fa: 7013 strb r3, [r2, #0] GBT_state_tick = HAL_GetTick(); 800a9fc: f003 ff6e bl 800e8dc 800aa00: 4603 mov r3, r0 800aa02: 4a40 ldr r2, [pc, #256] @ (800ab04 ) 800aa04: 6013 str r3, [r2, #0] if(GBT_State == GBT_DISABLED) log_printf(LOG_INFO, "Disabled\n"); 800aa06: 4b3e ldr r3, [pc, #248] @ (800ab00 ) 800aa08: 781b ldrb r3, [r3, #0] 800aa0a: 2b10 cmp r3, #16 800aa0c: d103 bne.n 800aa16 800aa0e: 493e ldr r1, [pc, #248] @ (800ab08 ) 800aa10: 2007 movs r0, #7 800aa12: f000 fda7 bl 800b564 if(GBT_State == GBT_S3_STARTED) log_printf(LOG_INFO, "Charging started\n"); 800aa16: 4b3a ldr r3, [pc, #232] @ (800ab00 ) 800aa18: 781b ldrb r3, [r3, #0] 800aa1a: 2b13 cmp r3, #19 800aa1c: d103 bne.n 800aa26 800aa1e: 493b ldr r1, [pc, #236] @ (800ab0c ) 800aa20: 2007 movs r0, #7 800aa22: f000 fd9f bl 800b564 if(GBT_State == GBT_S31_WAIT_BHM) log_printf(LOG_INFO, "Waiting for BHM\n"); 800aa26: 4b36 ldr r3, [pc, #216] @ (800ab00 ) 800aa28: 781b ldrb r3, [r3, #0] 800aa2a: 2b14 cmp r3, #20 800aa2c: d103 bne.n 800aa36 800aa2e: 4938 ldr r1, [pc, #224] @ (800ab10 ) 800aa30: 2007 movs r0, #7 800aa32: f000 fd97 bl 800b564 if(GBT_State == GBT_S4_WAIT_PSU_READY) log_printf(LOG_INFO, "Waiting for PSU ready\n"); 800aa36: 4b32 ldr r3, [pc, #200] @ (800ab00 ) 800aa38: 781b ldrb r3, [r3, #0] 800aa3a: 2b15 cmp r3, #21 800aa3c: d103 bne.n 800aa46 800aa3e: 4935 ldr r1, [pc, #212] @ (800ab14 ) 800aa40: 2007 movs r0, #7 800aa42: f000 fd8f bl 800b564 if(GBT_State == GBT_S4_ISOTEST) log_printf(LOG_INFO, "Isolation test\n"); 800aa46: 4b2e ldr r3, [pc, #184] @ (800ab00 ) 800aa48: 781b ldrb r3, [r3, #0] 800aa4a: 2b17 cmp r3, #23 800aa4c: d103 bne.n 800aa56 800aa4e: 4932 ldr r1, [pc, #200] @ (800ab18 ) 800aa50: 2007 movs r0, #7 800aa52: f000 fd87 bl 800b564 if(GBT_State == GBT_S5_BAT_INFO) log_printf(LOG_INFO, "Waiting for battery info\n"); 800aa56: 4b2a ldr r3, [pc, #168] @ (800ab00 ) 800aa58: 781b ldrb r3, [r3, #0] 800aa5a: 2b19 cmp r3, #25 800aa5c: d103 bne.n 800aa66 800aa5e: 492f ldr r1, [pc, #188] @ (800ab1c ) 800aa60: 2007 movs r0, #7 800aa62: f000 fd7f bl 800b564 if(GBT_State == GBT_S6_BAT_STAT) log_printf(LOG_INFO, "Waiting for battery status\n"); 800aa66: 4b26 ldr r3, [pc, #152] @ (800ab00 ) 800aa68: 781b ldrb r3, [r3, #0] 800aa6a: 2b1a cmp r3, #26 800aa6c: d103 bne.n 800aa76 800aa6e: 492c ldr r1, [pc, #176] @ (800ab20 ) 800aa70: 2007 movs r0, #7 800aa72: f000 fd77 bl 800b564 if(GBT_State == GBT_S7_BMS_WAIT) log_printf(LOG_INFO, "Waiting for BMS\n"); 800aa76: 4b22 ldr r3, [pc, #136] @ (800ab00 ) 800aa78: 781b ldrb r3, [r3, #0] 800aa7a: 2b1b cmp r3, #27 800aa7c: d103 bne.n 800aa86 800aa7e: 4929 ldr r1, [pc, #164] @ (800ab24 ) 800aa80: 2007 movs r0, #7 800aa82: f000 fd6f bl 800b564 if(GBT_State == GBT_S8_INIT_CHARGER)log_printf(LOG_INFO, "Initializing charger\n"); 800aa86: 4b1e ldr r3, [pc, #120] @ (800ab00 ) 800aa88: 781b ldrb r3, [r3, #0] 800aa8a: 2b1c cmp r3, #28 800aa8c: d103 bne.n 800aa96 800aa8e: 4926 ldr r1, [pc, #152] @ (800ab28 ) 800aa90: 2007 movs r0, #7 800aa92: f000 fd67 bl 800b564 if(GBT_State == GBT_S9_WAIT_BCL) log_printf(LOG_INFO, "Waiting for BCL\n"); 800aa96: 4b1a ldr r3, [pc, #104] @ (800ab00 ) 800aa98: 781b ldrb r3, [r3, #0] 800aa9a: 2b1d cmp r3, #29 800aa9c: d103 bne.n 800aaa6 800aa9e: 4923 ldr r1, [pc, #140] @ (800ab2c ) 800aaa0: 2007 movs r0, #7 800aaa2: f000 fd5f bl 800b564 if(GBT_State == GBT_S10_CHARGING) log_printf(LOG_INFO, "Charging in progress\n"); 800aaa6: 4b16 ldr r3, [pc, #88] @ (800ab00 ) 800aaa8: 781b ldrb r3, [r3, #0] 800aaaa: 2b1e cmp r3, #30 800aaac: d103 bne.n 800aab6 800aaae: 4920 ldr r1, [pc, #128] @ (800ab30 ) 800aab0: 2007 movs r0, #7 800aab2: f000 fd57 bl 800b564 if(GBT_State == GBT_STOP) log_printf(LOG_INFO, "Charging Stopped\n"); 800aab6: 4b12 ldr r3, [pc, #72] @ (800ab00 ) 800aab8: 781b ldrb r3, [r3, #0] 800aaba: 2b1f cmp r3, #31 800aabc: d103 bne.n 800aac6 800aabe: 491d ldr r1, [pc, #116] @ (800ab34 ) 800aac0: 2007 movs r0, #7 800aac2: f000 fd4f bl 800b564 if(GBT_State == GBT_STOP_CSD) log_printf(LOG_INFO, "Charging Stopped with CSD\n"); 800aac6: 4b0e ldr r3, [pc, #56] @ (800ab00 ) 800aac8: 781b ldrb r3, [r3, #0] 800aaca: 2b20 cmp r3, #32 800aacc: d103 bne.n 800aad6 800aace: 491a ldr r1, [pc, #104] @ (800ab38 ) 800aad0: 2007 movs r0, #7 800aad2: f000 fd47 bl 800b564 if(GBT_State == GBT_ERROR) log_printf(LOG_INFO, "Charging Error\n"); 800aad6: 4b0a ldr r3, [pc, #40] @ (800ab00 ) 800aad8: 781b ldrb r3, [r3, #0] 800aada: 2b21 cmp r3, #33 @ 0x21 800aadc: d103 bne.n 800aae6 800aade: 4917 ldr r1, [pc, #92] @ (800ab3c ) 800aae0: 2007 movs r0, #7 800aae2: f000 fd3f bl 800b564 if(GBT_State == GBT_COMPLETE) log_printf(LOG_INFO, "Charging Finished\n"); 800aae6: 4b06 ldr r3, [pc, #24] @ (800ab00 ) 800aae8: 781b ldrb r3, [r3, #0] 800aaea: 2b22 cmp r3, #34 @ 0x22 800aaec: d103 bne.n 800aaf6 800aaee: 4914 ldr r1, [pc, #80] @ (800ab40 ) 800aaf0: 2007 movs r0, #7 800aaf2: f000 fd37 bl 800b564 } 800aaf6: bf00 nop 800aaf8: 3708 adds r7, #8 800aafa: 46bd mov sp, r7 800aafc: bd80 pop {r7, pc} 800aafe: bf00 nop 800ab00: 20000318 .word 0x20000318 800ab04: 2000031c .word 0x2000031c 800ab08: 080168cc .word 0x080168cc 800ab0c: 080168d8 .word 0x080168d8 800ab10: 080168ec .word 0x080168ec 800ab14: 08016900 .word 0x08016900 800ab18: 08016918 .word 0x08016918 800ab1c: 08016928 .word 0x08016928 800ab20: 08016944 .word 0x08016944 800ab24: 08016960 .word 0x08016960 800ab28: 08016974 .word 0x08016974 800ab2c: 0801698c .word 0x0801698c 800ab30: 080169a0 .word 0x080169a0 800ab34: 080169b8 .word 0x080169b8 800ab38: 080169cc .word 0x080169cc 800ab3c: 080169e8 .word 0x080169e8 800ab40: 080169f8 .word 0x080169f8 0800ab44 : uint32_t GBT_StateTick(){ 800ab44: b580 push {r7, lr} 800ab46: af00 add r7, sp, #0 return HAL_GetTick() - GBT_state_tick; 800ab48: f003 fec8 bl 800e8dc 800ab4c: 4602 mov r2, r0 800ab4e: 4b02 ldr r3, [pc, #8] @ (800ab58 ) 800ab50: 681b ldr r3, [r3, #0] 800ab52: 1ad3 subs r3, r2, r3 } 800ab54: 4618 mov r0, r3 800ab56: bd80 pop {r7, pc} 800ab58: 2000031c .word 0x2000031c 0800ab5c : void GBT_Delay(uint32_t delay){ 800ab5c: b580 push {r7, lr} 800ab5e: b082 sub sp, #8 800ab60: af00 add r7, sp, #0 800ab62: 6078 str r0, [r7, #4] GBT_delay_start = HAL_GetTick(); 800ab64: f003 feba bl 800e8dc 800ab68: 4603 mov r3, r0 800ab6a: 4a04 ldr r2, [pc, #16] @ (800ab7c ) 800ab6c: 6013 str r3, [r2, #0] GBT_delay = delay; 800ab6e: 4a04 ldr r2, [pc, #16] @ (800ab80 ) 800ab70: 687b ldr r3, [r7, #4] 800ab72: 6013 str r3, [r2, #0] } 800ab74: bf00 nop 800ab76: 3708 adds r7, #8 800ab78: 46bd mov sp, r7 800ab7a: bd80 pop {r7, pc} 800ab7c: 20000320 .word 0x20000320 800ab80: 20000324 .word 0x20000324 0800ab84 : void GBT_StopEV(uint32_t causecode){ // --> Suspend EV 800ab84: b580 push {r7, lr} 800ab86: b082 sub sp, #8 800ab88: af00 add r7, sp, #0 800ab8a: 6078 str r0, [r7, #4] if (CONN.chargingError){ 800ab8c: 4b0c ldr r3, [pc, #48] @ (800abc0 ) 800ab8e: 7f5b ldrb r3, [r3, #29] 800ab90: 2b00 cmp r3, #0 800ab92: d003 beq.n 800ab9c GBT_StopSource = GBT_STOP_EVSE; 800ab94: 4b0b ldr r3, [pc, #44] @ (800abc4 ) 800ab96: 2200 movs r2, #0 800ab98: 701a strb r2, [r3, #0] 800ab9a: e002 b.n 800aba2 }else{ GBT_StopSource = GBT_STOP_EV; 800ab9c: 4b09 ldr r3, [pc, #36] @ (800abc4 ) 800ab9e: 2201 movs r2, #1 800aba0: 701a strb r2, [r3, #0] } GBT_StopCauseCode = causecode; 800aba2: 4a09 ldr r2, [pc, #36] @ (800abc8 ) 800aba4: 687b ldr r3, [r7, #4] 800aba6: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 800aba8: 4b08 ldr r3, [pc, #32] @ (800abcc ) 800abaa: 781b ldrb r3, [r3, #0] 800abac: 2b1f cmp r3, #31 800abae: d002 beq.n 800abb6 800abb0: 201f movs r0, #31 800abb2: f7ff ff1b bl 800a9ec } 800abb6: bf00 nop 800abb8: 3708 adds r7, #8 800abba: 46bd mov sp, r7 800abbc: bd80 pop {r7, pc} 800abbe: bf00 nop 800abc0: 200002f8 .word 0x200002f8 800abc4: 200003d0 .word 0x200003d0 800abc8: 200003c8 .word 0x200003c8 800abcc: 20000318 .word 0x20000318 0800abd0 : void GBT_StopEVSE(uint32_t causecode){ // --> Suspend EVSE 800abd0: b580 push {r7, lr} 800abd2: b082 sub sp, #8 800abd4: af00 add r7, sp, #0 800abd6: 6078 str r0, [r7, #4] GBT_StopSource = GBT_STOP_EVSE; 800abd8: 4b08 ldr r3, [pc, #32] @ (800abfc ) 800abda: 2200 movs r2, #0 800abdc: 701a strb r2, [r3, #0] GBT_StopCauseCode = causecode; 800abde: 4a08 ldr r2, [pc, #32] @ (800ac00 ) 800abe0: 687b ldr r3, [r7, #4] 800abe2: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 800abe4: 4b07 ldr r3, [pc, #28] @ (800ac04 ) 800abe6: 781b ldrb r3, [r3, #0] 800abe8: 2b1f cmp r3, #31 800abea: d002 beq.n 800abf2 800abec: 201f movs r0, #31 800abee: f7ff fefd bl 800a9ec } 800abf2: bf00 nop 800abf4: 3708 adds r7, #8 800abf6: 46bd mov sp, r7 800abf8: bd80 pop {r7, pc} 800abfa: bf00 nop 800abfc: 200003d0 .word 0x200003d0 800ac00: 200003c8 .word 0x200003c8 800ac04: 20000318 .word 0x20000318 0800ac08 : void GBT_StopOCPP(uint32_t causecode){ // --> Finished 800ac08: b580 push {r7, lr} 800ac0a: b082 sub sp, #8 800ac0c: af00 add r7, sp, #0 800ac0e: 6078 str r0, [r7, #4] GBT_StopSource = GBT_STOP_OCPP; 800ac10: 4b08 ldr r3, [pc, #32] @ (800ac34 ) 800ac12: 2202 movs r2, #2 800ac14: 701a strb r2, [r3, #0] GBT_StopCauseCode = causecode; 800ac16: 4a08 ldr r2, [pc, #32] @ (800ac38 ) 800ac18: 687b ldr r3, [r7, #4] 800ac1a: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 800ac1c: 4b07 ldr r3, [pc, #28] @ (800ac3c ) 800ac1e: 781b ldrb r3, [r3, #0] 800ac20: 2b1f cmp r3, #31 800ac22: d002 beq.n 800ac2a 800ac24: 201f movs r0, #31 800ac26: f7ff fee1 bl 800a9ec } 800ac2a: bf00 nop 800ac2c: 3708 adds r7, #8 800ac2e: 46bd mov sp, r7 800ac30: bd80 pop {r7, pc} 800ac32: bf00 nop 800ac34: 200003d0 .word 0x200003d0 800ac38: 200003c8 .word 0x200003c8 800ac3c: 20000318 .word 0x20000318 0800ac40 : void GBT_ForceStop(){ // --> Suspend EV 800ac40: b580 push {r7, lr} 800ac42: af00 add r7, sp, #0 GBT_StopSource = GBT_STOP_EV; 800ac44: 4b0a ldr r3, [pc, #40] @ (800ac70 ) 800ac46: 2201 movs r2, #1 800ac48: 701a strb r2, [r3, #0] CONN.EnableOutput = 0; 800ac4a: 4b0a ldr r3, [pc, #40] @ (800ac74 ) 800ac4c: 2200 movs r2, #0 800ac4e: 75da strb r2, [r3, #23] GBT_SwitchState(GBT_COMPLETE); 800ac50: 2022 movs r0, #34 @ 0x22 800ac52: f7ff fecb bl 800a9ec GBT_Lock(0); 800ac56: 2000 movs r0, #0 800ac58: f001 f92e bl 800beb8 RELAY_Write(RELAY_AUX0, 0); 800ac5c: 2100 movs r1, #0 800ac5e: 2000 movs r0, #0 800ac60: f7fe fd44 bl 80096ec RELAY_Write(RELAY_AUX1, 0); 800ac64: 2100 movs r1, #0 800ac66: 2001 movs r0, #1 800ac68: f7fe fd40 bl 80096ec } 800ac6c: bf00 nop 800ac6e: bd80 pop {r7, pc} 800ac70: 200003d0 .word 0x200003d0 800ac74: 200002f8 .word 0x200002f8 0800ac78 : void GBT_Error(uint32_t errorcode){ // --> Suspend EV 800ac78: b580 push {r7, lr} 800ac7a: b082 sub sp, #8 800ac7c: af00 add r7, sp, #0 800ac7e: 6078 str r0, [r7, #4] GBT_StopSource = GBT_STOP_EV; 800ac80: 4b08 ldr r3, [pc, #32] @ (800aca4 ) 800ac82: 2201 movs r2, #1 800ac84: 701a strb r2, [r3, #0] log_printf(LOG_ERR, "GBT Error code: 0x%X\n", errorcode); 800ac86: 687a ldr r2, [r7, #4] 800ac88: 4907 ldr r1, [pc, #28] @ (800aca8 ) 800ac8a: 2004 movs r0, #4 800ac8c: f000 fc6a bl 800b564 GBT_ErrorCode = errorcode; 800ac90: 4a06 ldr r2, [pc, #24] @ (800acac ) 800ac92: 687b ldr r3, [r7, #4] 800ac94: 6013 str r3, [r2, #0] GBT_SwitchState(GBT_ERROR); 800ac96: 2021 movs r0, #33 @ 0x21 800ac98: f7ff fea8 bl 800a9ec } 800ac9c: bf00 nop 800ac9e: 3708 adds r7, #8 800aca0: 46bd mov sp, r7 800aca2: bd80 pop {r7, pc} 800aca4: 200003d0 .word 0x200003d0 800aca8: 08016a0c .word 0x08016a0c 800acac: 200003cc .word 0x200003cc 0800acb0 : void GBT_Reset(){ 800acb0: b580 push {r7, lr} 800acb2: af00 add r7, sp, #0 GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 800acb4: f003 fe12 bl 800e8dc 800acb8: 4603 mov r3, r0 800acba: 4a31 ldr r2, [pc, #196] @ (800ad80 ) 800acbc: 6013 str r3, [r2, #0] GBT_BAT_INFO_recv = 0; 800acbe: 4b31 ldr r3, [pc, #196] @ (800ad84 ) 800acc0: 2200 movs r2, #0 800acc2: 701a strb r2, [r3, #0] GBT_BAT_STAT_recv = 0; 800acc4: 4b30 ldr r3, [pc, #192] @ (800ad88 ) 800acc6: 2200 movs r2, #0 800acc8: 701a strb r2, [r3, #0] GBT_BRO_recv = 0; 800acca: 4b30 ldr r3, [pc, #192] @ (800ad8c ) 800accc: 2200 movs r2, #0 800acce: 701a strb r2, [r3, #0] GBT_BHM_recv = 0; 800acd0: 4b2f ldr r3, [pc, #188] @ (800ad90 ) 800acd2: 2200 movs r2, #0 800acd4: 701a strb r2, [r3, #0] GBT_BSD_recv = 0; 800acd6: 4b2f ldr r3, [pc, #188] @ (800ad94 ) 800acd8: 2200 movs r2, #0 800acda: 701a strb r2, [r3, #0] EV_ready = 0; 800acdc: 4b2e ldr r3, [pc, #184] @ (800ad98 ) 800acde: 2200 movs r2, #0 800ace0: 701a strb r2, [r3, #0] CONN.SOC = 0; 800ace2: 4b2e ldr r3, [pc, #184] @ (800ad9c ) 800ace4: 2200 movs r2, #0 800ace6: 709a strb r2, [r3, #2] CONN.EnableOutput = 0; 800ace8: 4b2c ldr r3, [pc, #176] @ (800ad9c ) 800acea: 2200 movs r2, #0 800acec: 75da strb r2, [r3, #23] CONN.WantedCurrent = 0; 800acee: 4b2b ldr r3, [pc, #172] @ (800ad9c ) 800acf0: 2200 movs r2, #0 800acf2: 76da strb r2, [r3, #27] 800acf4: 2200 movs r2, #0 800acf6: 771a strb r2, [r3, #28] CONN.RequestedVoltage = 0; 800acf8: 4b28 ldr r3, [pc, #160] @ (800ad9c ) 800acfa: 2200 movs r2, #0 800acfc: 73da strb r2, [r3, #15] 800acfe: 2200 movs r2, #0 800ad00: 741a strb r2, [r3, #16] memset(&GBT_EVInfo, 0, sizeof (GBT_EVInfo)); 800ad02: 2231 movs r2, #49 @ 0x31 800ad04: 2100 movs r1, #0 800ad06: 4826 ldr r0, [pc, #152] @ (800ada0 ) 800ad08: f009 fa48 bl 801419c memset(&GBT_BATStat, 0, sizeof (GBT_BATStat)); 800ad0c: 220d movs r2, #13 800ad0e: 2100 movs r1, #0 800ad10: 4824 ldr r0, [pc, #144] @ (800ada4 ) 800ad12: f009 fa43 bl 801419c memset(&GBT_ReqPower, 0, sizeof (GBT_ReqPower)); 800ad16: 2205 movs r2, #5 800ad18: 2100 movs r1, #0 800ad1a: 4823 ldr r0, [pc, #140] @ (800ada8 ) 800ad1c: f009 fa3e bl 801419c memset(&GBT_CurrPower, 0, sizeof (GBT_CurrPower)); 800ad20: 2205 movs r2, #5 800ad22: 2100 movs r1, #0 800ad24: 4821 ldr r0, [pc, #132] @ (800adac ) 800ad26: f009 fa39 bl 801419c memset(&GBT_MaxVoltage, 0, sizeof (GBT_MaxVoltage)); 800ad2a: 2202 movs r2, #2 800ad2c: 2100 movs r1, #0 800ad2e: 4820 ldr r0, [pc, #128] @ (800adb0 ) 800ad30: f009 fa34 bl 801419c memset(&GBT_ChargingStatus, 0, sizeof (GBT_ChargingStatus)); 800ad34: 2209 movs r2, #9 800ad36: 2100 movs r1, #0 800ad38: 481e ldr r0, [pc, #120] @ (800adb4 ) 800ad3a: f009 fa2f bl 801419c memset(&GBT_BatteryStatus, 0, sizeof (GBT_BatteryStatus)); 800ad3e: 2207 movs r2, #7 800ad40: 2100 movs r1, #0 800ad42: 481d ldr r0, [pc, #116] @ (800adb8 ) 800ad44: f009 fa2a bl 801419c memset(&GBT_ChargerCurrentStatus, 0, sizeof (GBT_ChargerCurrentStatus)); 800ad48: 2208 movs r2, #8 800ad4a: 2100 movs r1, #0 800ad4c: 481b ldr r0, [pc, #108] @ (800adbc ) 800ad4e: f009 fa25 bl 801419c memset(&GBT_ChargerStop, 0, sizeof (GBT_ChargerStop)); 800ad52: 2208 movs r2, #8 800ad54: 2100 movs r1, #0 800ad56: 481a ldr r0, [pc, #104] @ (800adc0 ) 800ad58: f009 fa20 bl 801419c GBT_CurrPower.requestedCurrent = 4000; //0A 800ad5c: 4b13 ldr r3, [pc, #76] @ (800adac ) 800ad5e: f44f 627a mov.w r2, #4000 @ 0xfa0 800ad62: 805a strh r2, [r3, #2] GBT_CurrPower.requestedVoltage = 500; //50V 800ad64: 4b11 ldr r3, [pc, #68] @ (800adac ) 800ad66: f44f 72fa mov.w r2, #500 @ 0x1f4 800ad6a: 801a strh r2, [r3, #0] GBT_TimeChargingStarted = 0; 800ad6c: 4b15 ldr r3, [pc, #84] @ (800adc4 ) 800ad6e: 2200 movs r2, #0 800ad70: 601a str r2, [r3, #0] GBT_BRO = 0x00; 800ad72: 4b15 ldr r3, [pc, #84] @ (800adc8 ) 800ad74: 2200 movs r2, #0 800ad76: 701a strb r2, [r3, #0] GBT_LockResetError(); 800ad78: f001 f9a8 bl 800c0cc } 800ad7c: bf00 nop 800ad7e: bd80 pop {r7, pc} 800ad80: 200003c4 .word 0x200003c4 800ad84: 20000328 .word 0x20000328 800ad88: 20000329 .word 0x20000329 800ad8c: 2000032a .word 0x2000032a 800ad90: 2000032b .word 0x2000032b 800ad94: 2000032c .word 0x2000032c 800ad98: 2000032d .word 0x2000032d 800ad9c: 200002f8 .word 0x200002f8 800ada0: 20000344 .word 0x20000344 800ada4: 20000378 .word 0x20000378 800ada8: 20000388 .word 0x20000388 800adac: 20000390 .word 0x20000390 800adb0: 20000340 .word 0x20000340 800adb4: 20000398 .word 0x20000398 800adb8: 200003a4 .word 0x200003a4 800adbc: 200003ac .word 0x200003ac 800adc0: 200003b4 .word 0x200003b4 800adc4: 200003c0 .word 0x200003c0 800adc8: 200003bc .word 0x200003bc 0800adcc : void GBT_Start(){ 800adcc: b580 push {r7, lr} 800adce: af00 add r7, sp, #0 RELAY_Write(RELAY_AUX0, 1); 800add0: 2101 movs r1, #1 800add2: 2000 movs r0, #0 800add4: f7fe fc8a bl 80096ec RELAY_Write(RELAY_AUX1, 1); 800add8: 2101 movs r1, #1 800adda: 2001 movs r0, #1 800addc: f7fe fc86 bl 80096ec GBT_SwitchState(GBT_S3_STARTED); 800ade0: 2013 movs r0, #19 800ade2: f7ff fe03 bl 800a9ec } 800ade6: bf00 nop 800ade8: bd80 pop {r7, pc} ... 0800adec : name = 0; \ } \ __hold_result; \ }) void CONN_Task(){ 800adec: b580 push {r7, lr} 800adee: b082 sub sp, #8 800adf0: af00 add r7, sp, #0 switch (connectorState){ 800adf2: 4b98 ldr r3, [pc, #608] @ (800b054 ) 800adf4: 781b ldrb r3, [r3, #0] 800adf6: 2b0c cmp r3, #12 800adf8: f200 8116 bhi.w 800b028 800adfc: a201 add r2, pc, #4 @ (adr r2, 800ae04 ) 800adfe: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800ae02: bf00 nop 800ae04: 0800ae39 .word 0x0800ae39 800ae08: 0800ae77 .word 0x0800ae77 800ae0c: 0800ae51 .word 0x0800ae51 800ae10: 0800af03 .word 0x0800af03 800ae14: 0800aebd .word 0x0800aebd 800ae18: 0800b029 .word 0x0800b029 800ae1c: 0800b029 .word 0x0800b029 800ae20: 0800b029 .word 0x0800b029 800ae24: 0800af57 .word 0x0800af57 800ae28: 0800b029 .word 0x0800b029 800ae2c: 0800afb9 .word 0x0800afb9 800ae30: 0800afab .word 0x0800afab 800ae34: 0800af9d .word 0x0800af9d case Unknown: // unlocked, waiting for config GBT_Lock(0); 800ae38: 2000 movs r0, #0 800ae3a: f001 f83d bl 800beb8 if (config_initialized) { 800ae3e: 4b86 ldr r3, [pc, #536] @ (800b058 ) 800ae40: 781b ldrb r3, [r3, #0] 800ae42: 2b00 cmp r3, #0 800ae44: f000 80f4 beq.w 800b030 CONN_SetState(Unplugged); 800ae48: 2001 movs r0, #1 800ae4a: f000 f90f bl 800b06c } break; 800ae4e: e0ef b.n 800b030 case Disabled: // faulted, unlocked GBT_Lock(0); 800ae50: 2000 movs r0, #0 800ae52: f001 f831 bl 800beb8 if(CONN.chargingError == 0) CONN_SetState(Unplugged); 800ae56: 4b81 ldr r3, [pc, #516] @ (800b05c ) 800ae58: 7f5b ldrb r3, [r3, #29] 800ae5a: 2b00 cmp r3, #0 800ae5c: d102 bne.n 800ae64 800ae5e: 2001 movs r0, #1 800ae60: f000 f904 bl 800b06c if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800ae64: 4b7d ldr r3, [pc, #500] @ (800b05c ) 800ae66: 781b ldrb r3, [r3, #0] 800ae68: 2b03 cmp r3, #3 800ae6a: f040 80e3 bne.w 800b034 800ae6e: 2000 movs r0, #0 800ae70: f000 ffee bl 800be50 break; 800ae74: e0de b.n 800b034 case Unplugged: // unlocked, waiting to connect GBT_Lock(0); 800ae76: 2000 movs r0, #0 800ae78: f001 f81e bl 800beb8 if(CONN.chargingError != 0) CONN_SetState(Disabled); 800ae7c: 4b77 ldr r3, [pc, #476] @ (800b05c ) 800ae7e: 7f5b ldrb r3, [r3, #29] 800ae80: 2b00 cmp r3, #0 800ae82: d002 beq.n 800ae8a 800ae84: 2002 movs r0, #2 800ae86: f000 f8f1 bl 800b06c if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800ae8a: 4b74 ldr r3, [pc, #464] @ (800b05c ) 800ae8c: 781b ldrb r3, [r3, #0] 800ae8e: 2b03 cmp r3, #3 800ae90: d102 bne.n 800ae98 800ae92: 2000 movs r0, #0 800ae94: f000 ffdc bl 800be50 if((CONN_CC_GetState()==GBT_CC_4V) && (CONN.connControl != CMD_FORCE_UNLOCK)){ 800ae98: f000 f9c4 bl 800b224 800ae9c: 4603 mov r3, r0 800ae9e: 2b03 cmp r3, #3 800aea0: f040 80ca bne.w 800b038 800aea4: 4b6d ldr r3, [pc, #436] @ (800b05c ) 800aea6: 781b ldrb r3, [r3, #0] 800aea8: 2b03 cmp r3, #3 800aeaa: f000 80c5 beq.w 800b038 CONN_SetState(AuthRequired); 800aeae: 2004 movs r0, #4 800aeb0: f000 f8dc bl 800b06c GBT_Lock(0); 800aeb4: 2000 movs r0, #0 800aeb6: f000 ffff bl 800beb8 } break; 800aeba: e0bd b.n 800b038 case AuthRequired: // plugged, waiting to start charge GBT_Lock(0); 800aebc: 2000 movs r0, #0 800aebe: f000 fffb bl 800beb8 if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800aec2: 4b66 ldr r3, [pc, #408] @ (800b05c ) 800aec4: 781b ldrb r3, [r3, #0] 800aec6: 2b03 cmp r3, #3 800aec8: d102 bne.n 800aed0 800aeca: 2000 movs r0, #0 800aecc: f000 ffc0 bl 800be50 if(CONN_CC_GetState()==GBT_CC_4V){ 800aed0: f000 f9a8 bl 800b224 800aed4: 4603 mov r3, r0 800aed6: 2b03 cmp r3, #3 800aed8: d10f bne.n 800aefa if(CONN.connControl == CMD_START){ 800aeda: 4b60 ldr r3, [pc, #384] @ (800b05c ) 800aedc: 781b ldrb r3, [r3, #0] 800aede: 2b02 cmp r3, #2 800aee0: d102 bne.n 800aee8 CONN_SetState(Preparing); 800aee2: 2003 movs r0, #3 800aee4: f000 f8c2 bl 800b06c } if(CONN.connControl == CMD_FORCE_UNLOCK){ 800aee8: 4b5c ldr r3, [pc, #368] @ (800b05c ) 800aeea: 781b ldrb r3, [r3, #0] 800aeec: 2b03 cmp r3, #3 800aeee: f040 80a5 bne.w 800b03c CONN_SetState(Unplugged); 800aef2: 2001 movs r0, #1 800aef4: f000 f8ba bl 800b06c } // if CHARGING_NOT_ALLOWED — stay here }else{ CONN_SetState(Unplugged); } break; 800aef8: e0a0 b.n 800b03c CONN_SetState(Unplugged); 800aefa: 2001 movs r0, #1 800aefc: f000 f8b6 bl 800b06c break; 800af00: e09c b.n 800b03c case Preparing: // charging, locked GBT_Lock(1); 800af02: 2001 movs r0, #1 800af04: f000 ffd8 bl 800beb8 if(GBT_State == GBT_COMPLETE){ 800af08: 4b55 ldr r3, [pc, #340] @ (800b060 ) 800af0a: 781b ldrb r3, [r3, #0] 800af0c: 2b22 cmp r3, #34 @ 0x22 800af0e: d11a bne.n 800af46 if(GBT_StopSource == GBT_STOP_EVSE){ 800af10: 4b54 ldr r3, [pc, #336] @ (800b064 ) 800af12: 781b ldrb r3, [r3, #0] 800af14: 2b00 cmp r3, #0 800af16: d103 bne.n 800af20 CONN_SetState(FinishedEVSE); 800af18: 200b movs r0, #11 800af1a: f000 f8a7 bl 800b06c 800af1e: e012 b.n 800af46 }else if(GBT_StopSource == GBT_STOP_EV){ 800af20: 4b50 ldr r3, [pc, #320] @ (800b064 ) 800af22: 781b ldrb r3, [r3, #0] 800af24: 2b01 cmp r3, #1 800af26: d103 bne.n 800af30 CONN_SetState(FinishedEV); 800af28: 200c movs r0, #12 800af2a: f000 f89f bl 800b06c 800af2e: e00a b.n 800af46 }else if(GBT_StopSource == GBT_STOP_OCPP){ 800af30: 4b4c ldr r3, [pc, #304] @ (800b064 ) 800af32: 781b ldrb r3, [r3, #0] 800af34: 2b02 cmp r3, #2 800af36: d103 bne.n 800af40 CONN_SetState(Finished); 800af38: 200a movs r0, #10 800af3a: f000 f897 bl 800b06c 800af3e: e002 b.n 800af46 }else{ CONN_SetState(FinishedEVSE); 800af40: 200b movs r0, #11 800af42: f000 f893 bl 800b06c } } if(GBT_State == GBT_S10_CHARGING){ 800af46: 4b46 ldr r3, [pc, #280] @ (800b060 ) 800af48: 781b ldrb r3, [r3, #0] 800af4a: 2b1e cmp r3, #30 800af4c: d178 bne.n 800b040 CONN_SetState(Charging); 800af4e: 2008 movs r0, #8 800af50: f000 f88c bl 800b06c } break; 800af54: e074 b.n 800b040 case Charging: // charging, locked GBT_Lock(1); 800af56: 2001 movs r0, #1 800af58: f000 ffae bl 800beb8 if(GBT_State == GBT_COMPLETE){ 800af5c: 4b40 ldr r3, [pc, #256] @ (800b060 ) 800af5e: 781b ldrb r3, [r3, #0] 800af60: 2b22 cmp r3, #34 @ 0x22 800af62: d16f bne.n 800b044 if(GBT_StopSource == GBT_STOP_EVSE){ 800af64: 4b3f ldr r3, [pc, #252] @ (800b064 ) 800af66: 781b ldrb r3, [r3, #0] 800af68: 2b00 cmp r3, #0 800af6a: d103 bne.n 800af74 CONN_SetState(FinishedEVSE); 800af6c: 200b movs r0, #11 800af6e: f000 f87d bl 800b06c CONN_SetState(Finished); }else{ CONN_SetState(FinishedEVSE); } } break; 800af72: e067 b.n 800b044 }else if(GBT_StopSource == GBT_STOP_EV){ 800af74: 4b3b ldr r3, [pc, #236] @ (800b064 ) 800af76: 781b ldrb r3, [r3, #0] 800af78: 2b01 cmp r3, #1 800af7a: d103 bne.n 800af84 CONN_SetState(FinishedEV); 800af7c: 200c movs r0, #12 800af7e: f000 f875 bl 800b06c break; 800af82: e05f b.n 800b044 }else if(GBT_StopSource == GBT_STOP_OCPP){ 800af84: 4b37 ldr r3, [pc, #220] @ (800b064 ) 800af86: 781b ldrb r3, [r3, #0] 800af88: 2b02 cmp r3, #2 800af8a: d103 bne.n 800af94 CONN_SetState(Finished); 800af8c: 200a movs r0, #10 800af8e: f000 f86d bl 800b06c break; 800af92: e057 b.n 800b044 CONN_SetState(FinishedEVSE); 800af94: 200b movs r0, #11 800af96: f000 f869 bl 800b06c break; 800af9a: e053 b.n 800b044 case FinishedEV: // charging completed by EV, waiting to transaction stop GBT_Lock(0); 800af9c: 2000 movs r0, #0 800af9e: f000 ff8b bl 800beb8 CONN_SetState(Finished); 800afa2: 200a movs r0, #10 800afa4: f000 f862 bl 800b06c break; 800afa8: e04f b.n 800b04a case FinishedEVSE: // charging completed by EVSE, waiting to transaction stop GBT_Lock(0); 800afaa: 2000 movs r0, #0 800afac: f000 ff84 bl 800beb8 CONN_SetState(Finished); 800afb0: 200a movs r0, #10 800afb2: f000 f85b bl 800b06c break; 800afb6: e048 b.n 800b04a case Finished: // charging completed, waiting to disconnect, unlocked GBT_Lock(0); 800afb8: 2000 movs r0, #0 800afba: f000 ff7d bl 800beb8 //TODO Force unlock time limit if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800afbe: 4b27 ldr r3, [pc, #156] @ (800b05c ) 800afc0: 781b ldrb r3, [r3, #0] 800afc2: 2b03 cmp r3, #3 800afc4: d102 bne.n 800afcc 800afc6: 2000 movs r0, #0 800afc8: f000 ff42 bl 800be50 if(DELAYED_HOLD_MS(cc6v_hold_tick, CONN_CC_GetState()==GBT_CC_6V, 5000)){ 800afcc: 2300 movs r3, #0 800afce: 71fb strb r3, [r7, #7] 800afd0: f000 f928 bl 800b224 800afd4: 4603 mov r3, r0 800afd6: 2b02 cmp r3, #2 800afd8: d119 bne.n 800b00e 800afda: 4b23 ldr r3, [pc, #140] @ (800b068 ) 800afdc: 681b ldr r3, [r3, #0] 800afde: 2b00 cmp r3, #0 800afe0: d105 bne.n 800afee 800afe2: f003 fc7b bl 800e8dc 800afe6: 4603 mov r3, r0 800afe8: 4a1f ldr r2, [pc, #124] @ (800b068 ) 800afea: 6013 str r3, [r2, #0] 800afec: e012 b.n 800b014 800afee: f003 fc75 bl 800e8dc 800aff2: 4602 mov r2, r0 800aff4: 4b1c ldr r3, [pc, #112] @ (800b068 ) 800aff6: 681b ldr r3, [r3, #0] 800aff8: 1ad3 subs r3, r2, r3 800affa: f241 3287 movw r2, #4999 @ 0x1387 800affe: 4293 cmp r3, r2 800b000: d908 bls.n 800b014 800b002: 2301 movs r3, #1 800b004: 71fb strb r3, [r7, #7] 800b006: 4b18 ldr r3, [pc, #96] @ (800b068 ) 800b008: 2200 movs r2, #0 800b00a: 601a str r2, [r3, #0] 800b00c: e002 b.n 800b014 800b00e: 4b16 ldr r3, [pc, #88] @ (800b068 ) 800b010: 2200 movs r2, #0 800b012: 601a str r2, [r3, #0] 800b014: 79fb ldrb r3, [r7, #7] 800b016: 2b00 cmp r3, #0 800b018: d016 beq.n 800b048 GBT_Lock(0); 800b01a: 2000 movs r0, #0 800b01c: f000 ff4c bl 800beb8 CONN_SetState(Unplugged); 800b020: 2001 movs r0, #1 800b022: f000 f823 bl 800b06c } break; 800b026: e00f b.n 800b048 default: CONN_SetState(Unknown); 800b028: 2000 movs r0, #0 800b02a: f000 f81f bl 800b06c } } 800b02e: e00c b.n 800b04a break; 800b030: bf00 nop 800b032: e00a b.n 800b04a break; 800b034: bf00 nop 800b036: e008 b.n 800b04a break; 800b038: bf00 nop 800b03a: e006 b.n 800b04a break; 800b03c: bf00 nop 800b03e: e004 b.n 800b04a break; 800b040: bf00 nop 800b042: e002 b.n 800b04a break; 800b044: bf00 nop 800b046: e000 b.n 800b04a break; 800b048: bf00 nop } 800b04a: bf00 nop 800b04c: 3708 adds r7, #8 800b04e: 46bd mov sp, r7 800b050: bd80 pop {r7, pc} 800b052: bf00 nop 800b054: 200003d1 .word 0x200003d1 800b058: 20000f1e .word 0x20000f1e 800b05c: 200002f8 .word 0x200002f8 800b060: 20000318 .word 0x20000318 800b064: 200003d0 .word 0x200003d0 800b068: 200003d4 .word 0x200003d4 0800b06c : //external //CONN_SetState(Disabled); void CONN_SetState(CONN_State_t state){ 800b06c: b580 push {r7, lr} 800b06e: b082 sub sp, #8 800b070: af00 add r7, sp, #0 800b072: 4603 mov r3, r0 800b074: 71fb strb r3, [r7, #7] connectorState = state; 800b076: 4a3d ldr r2, [pc, #244] @ (800b16c ) 800b078: 79fb ldrb r3, [r7, #7] 800b07a: 7013 strb r3, [r2, #0] if(connectorState == Unknown) log_printf(LOG_INFO, "Connector: Unknown\n"); 800b07c: 4b3b ldr r3, [pc, #236] @ (800b16c ) 800b07e: 781b ldrb r3, [r3, #0] 800b080: 2b00 cmp r3, #0 800b082: d103 bne.n 800b08c 800b084: 493a ldr r1, [pc, #232] @ (800b170 ) 800b086: 2007 movs r0, #7 800b088: f000 fa6c bl 800b564 if(connectorState == Unplugged) log_printf(LOG_INFO, "Connector: Unplugged\n"); 800b08c: 4b37 ldr r3, [pc, #220] @ (800b16c ) 800b08e: 781b ldrb r3, [r3, #0] 800b090: 2b01 cmp r3, #1 800b092: d103 bne.n 800b09c 800b094: 4937 ldr r1, [pc, #220] @ (800b174 ) 800b096: 2007 movs r0, #7 800b098: f000 fa64 bl 800b564 if(connectorState == Disabled) log_printf(LOG_INFO, "Connector: Disabled\n"); 800b09c: 4b33 ldr r3, [pc, #204] @ (800b16c ) 800b09e: 781b ldrb r3, [r3, #0] 800b0a0: 2b02 cmp r3, #2 800b0a2: d103 bne.n 800b0ac 800b0a4: 4934 ldr r1, [pc, #208] @ (800b178 ) 800b0a6: 2007 movs r0, #7 800b0a8: f000 fa5c bl 800b564 if(connectorState == Preparing) log_printf(LOG_INFO, "Connector: Preparing\n"); 800b0ac: 4b2f ldr r3, [pc, #188] @ (800b16c ) 800b0ae: 781b ldrb r3, [r3, #0] 800b0b0: 2b03 cmp r3, #3 800b0b2: d103 bne.n 800b0bc 800b0b4: 4931 ldr r1, [pc, #196] @ (800b17c ) 800b0b6: 2007 movs r0, #7 800b0b8: f000 fa54 bl 800b564 if(connectorState == AuthRequired) log_printf(LOG_INFO, "Connector: AuthRequired\n"); 800b0bc: 4b2b ldr r3, [pc, #172] @ (800b16c ) 800b0be: 781b ldrb r3, [r3, #0] 800b0c0: 2b04 cmp r3, #4 800b0c2: d103 bne.n 800b0cc 800b0c4: 492e ldr r1, [pc, #184] @ (800b180 ) 800b0c6: 2007 movs r0, #7 800b0c8: f000 fa4c bl 800b564 if(connectorState == WaitingForEnergy) log_printf(LOG_INFO, "Connector: WaitingForEnergy\n"); 800b0cc: 4b27 ldr r3, [pc, #156] @ (800b16c ) 800b0ce: 781b ldrb r3, [r3, #0] 800b0d0: 2b05 cmp r3, #5 800b0d2: d103 bne.n 800b0dc 800b0d4: 492b ldr r1, [pc, #172] @ (800b184 ) 800b0d6: 2007 movs r0, #7 800b0d8: f000 fa44 bl 800b564 if(connectorState == ChargingPausedEV) log_printf(LOG_INFO, "Connector: ChargingPausedEV\n"); 800b0dc: 4b23 ldr r3, [pc, #140] @ (800b16c ) 800b0de: 781b ldrb r3, [r3, #0] 800b0e0: 2b06 cmp r3, #6 800b0e2: d103 bne.n 800b0ec 800b0e4: 4928 ldr r1, [pc, #160] @ (800b188 ) 800b0e6: 2007 movs r0, #7 800b0e8: f000 fa3c bl 800b564 if(connectorState == ChargingPausedEVSE) log_printf(LOG_INFO, "Connector: ChargingPausedEVSE\n"); 800b0ec: 4b1f ldr r3, [pc, #124] @ (800b16c ) 800b0ee: 781b ldrb r3, [r3, #0] 800b0f0: 2b07 cmp r3, #7 800b0f2: d103 bne.n 800b0fc 800b0f4: 4925 ldr r1, [pc, #148] @ (800b18c ) 800b0f6: 2007 movs r0, #7 800b0f8: f000 fa34 bl 800b564 if(connectorState == Charging) log_printf(LOG_INFO, "Connector: Charging\n"); 800b0fc: 4b1b ldr r3, [pc, #108] @ (800b16c ) 800b0fe: 781b ldrb r3, [r3, #0] 800b100: 2b08 cmp r3, #8 800b102: d103 bne.n 800b10c 800b104: 4922 ldr r1, [pc, #136] @ (800b190 ) 800b106: 2007 movs r0, #7 800b108: f000 fa2c bl 800b564 if(connectorState == AuthTimeout) log_printf(LOG_INFO, "Connector: AuthTimeout\n"); 800b10c: 4b17 ldr r3, [pc, #92] @ (800b16c ) 800b10e: 781b ldrb r3, [r3, #0] 800b110: 2b09 cmp r3, #9 800b112: d103 bne.n 800b11c 800b114: 491f ldr r1, [pc, #124] @ (800b194 ) 800b116: 2007 movs r0, #7 800b118: f000 fa24 bl 800b564 if(connectorState == Finished) log_printf(LOG_INFO, "Connector: Finished\n"); 800b11c: 4b13 ldr r3, [pc, #76] @ (800b16c ) 800b11e: 781b ldrb r3, [r3, #0] 800b120: 2b0a cmp r3, #10 800b122: d103 bne.n 800b12c 800b124: 491c ldr r1, [pc, #112] @ (800b198 ) 800b126: 2007 movs r0, #7 800b128: f000 fa1c bl 800b564 if(connectorState == FinishedEVSE) log_printf(LOG_INFO, "Connector: FinishedEVSE\n"); 800b12c: 4b0f ldr r3, [pc, #60] @ (800b16c ) 800b12e: 781b ldrb r3, [r3, #0] 800b130: 2b0b cmp r3, #11 800b132: d103 bne.n 800b13c 800b134: 4919 ldr r1, [pc, #100] @ (800b19c ) 800b136: 2007 movs r0, #7 800b138: f000 fa14 bl 800b564 if(connectorState == FinishedEV) log_printf(LOG_INFO, "Connector: FinishedEV\n"); 800b13c: 4b0b ldr r3, [pc, #44] @ (800b16c ) 800b13e: 781b ldrb r3, [r3, #0] 800b140: 2b0c cmp r3, #12 800b142: d103 bne.n 800b14c 800b144: 4916 ldr r1, [pc, #88] @ (800b1a0 ) 800b146: 2007 movs r0, #7 800b148: f000 fa0c bl 800b564 if(connectorState == Replugging) log_printf(LOG_INFO, "Connector: Replugging\n"); 800b14c: 4b07 ldr r3, [pc, #28] @ (800b16c ) 800b14e: 781b ldrb r3, [r3, #0] 800b150: 2b0d cmp r3, #13 800b152: d103 bne.n 800b15c 800b154: 4913 ldr r1, [pc, #76] @ (800b1a4 ) 800b156: 2007 movs r0, #7 800b158: f000 fa04 bl 800b564 CONN.connState = state; 800b15c: 4a12 ldr r2, [pc, #72] @ (800b1a8 ) 800b15e: 79fb ldrb r3, [r7, #7] 800b160: 7053 strb r3, [r2, #1] } 800b162: bf00 nop 800b164: 3708 adds r7, #8 800b166: 46bd mov sp, r7 800b168: bd80 pop {r7, pc} 800b16a: bf00 nop 800b16c: 200003d1 .word 0x200003d1 800b170: 08016a24 .word 0x08016a24 800b174: 08016a38 .word 0x08016a38 800b178: 08016a50 .word 0x08016a50 800b17c: 08016a68 .word 0x08016a68 800b180: 08016a80 .word 0x08016a80 800b184: 08016a9c .word 0x08016a9c 800b188: 08016abc .word 0x08016abc 800b18c: 08016adc .word 0x08016adc 800b190: 08016afc .word 0x08016afc 800b194: 08016b14 .word 0x08016b14 800b198: 08016b2c .word 0x08016b2c 800b19c: 08016b44 .word 0x08016b44 800b1a0: 08016b60 .word 0x08016b60 800b1a4: 08016b78 .word 0x08016b78 800b1a8: 200002f8 .word 0x200002f8 0800b1ac : void CONN_CC_ReadStateFiltered() { 800b1ac: b580 push {r7, lr} 800b1ae: b082 sub sp, #8 800b1b0: af00 add r7, sp, #0 static uint32_t last_change_time = 0; static uint32_t last_check_time = 0; static uint8_t prev_state = 0; if((HAL_GetTick()-last_check_time)<100) return; 800b1b2: f003 fb93 bl 800e8dc 800b1b6: 4602 mov r2, r0 800b1b8: 4b16 ldr r3, [pc, #88] @ (800b214 ) 800b1ba: 681b ldr r3, [r3, #0] 800b1bc: 1ad3 subs r3, r2, r3 800b1be: 2b63 cmp r3, #99 @ 0x63 800b1c0: d924 bls.n 800b20c last_check_time = HAL_GetTick(); 800b1c2: f003 fb8b bl 800e8dc 800b1c6: 4603 mov r3, r0 800b1c8: 4a12 ldr r2, [pc, #72] @ (800b214 ) 800b1ca: 6013 str r3, [r2, #0] uint8_t new_state = CONN_CC_GetStateRaw(); 800b1cc: f000 f834 bl 800b238 800b1d0: 4603 mov r3, r0 800b1d2: 71fb strb r3, [r7, #7] if (new_state != prev_state) { 800b1d4: 4b10 ldr r3, [pc, #64] @ (800b218 ) 800b1d6: 781b ldrb r3, [r3, #0] 800b1d8: 79fa ldrb r2, [r7, #7] 800b1da: 429a cmp r2, r3 800b1dc: d008 beq.n 800b1f0 last_change_time = HAL_GetTick(); 800b1de: f003 fb7d bl 800e8dc 800b1e2: 4603 mov r3, r0 800b1e4: 4a0d ldr r2, [pc, #52] @ (800b21c ) 800b1e6: 6013 str r3, [r2, #0] prev_state = new_state; 800b1e8: 4a0b ldr r2, [pc, #44] @ (800b218 ) 800b1ea: 79fb ldrb r3, [r7, #7] 800b1ec: 7013 strb r3, [r2, #0] 800b1ee: e00e b.n 800b20e } else if ((HAL_GetTick() - last_change_time) >= 300) { 800b1f0: f003 fb74 bl 800e8dc 800b1f4: 4602 mov r2, r0 800b1f6: 4b09 ldr r3, [pc, #36] @ (800b21c ) 800b1f8: 681b ldr r3, [r3, #0] 800b1fa: 1ad3 subs r3, r2, r3 800b1fc: f5b3 7f96 cmp.w r3, #300 @ 0x12c 800b200: d305 bcc.n 800b20e CC_STATE_FILTERED = prev_state; 800b202: 4b05 ldr r3, [pc, #20] @ (800b218 ) 800b204: 781a ldrb r2, [r3, #0] 800b206: 4b06 ldr r3, [pc, #24] @ (800b220 ) 800b208: 701a strb r2, [r3, #0] 800b20a: e000 b.n 800b20e if((HAL_GetTick()-last_check_time)<100) return; 800b20c: bf00 nop } } 800b20e: 3708 adds r7, #8 800b210: 46bd mov sp, r7 800b212: bd80 pop {r7, pc} 800b214: 200003d8 .word 0x200003d8 800b218: 200003dc .word 0x200003dc 800b21c: 200003e0 .word 0x200003e0 800b220: 200003d2 .word 0x200003d2 0800b224 : uint8_t CONN_CC_GetState(){ 800b224: b480 push {r7} 800b226: af00 add r7, sp, #0 return CC_STATE_FILTERED; 800b228: 4b02 ldr r3, [pc, #8] @ (800b234 ) 800b22a: 781b ldrb r3, [r3, #0] } 800b22c: 4618 mov r0, r3 800b22e: 46bd mov sp, r7 800b230: bc80 pop {r7} 800b232: 4770 bx lr 800b234: 200003d2 .word 0x200003d2 0800b238 : uint8_t CONN_CC_GetStateRaw(){ 800b238: b580 push {r7, lr} 800b23a: b082 sub sp, #8 800b23c: af00 add r7, sp, #0 float volt = CONN_CC_GetAdc(); 800b23e: f000 f851 bl 800b2e4 800b242: 6078 str r0, [r7, #4] // if((volt<12.6f) && (volt>11.4f)) return GBT_CC_12V; // if((volt<6.8f) && (volt>5.2f)) return GBT_CC_6V; // if((volt<4.8f) && (volt>3.2f)) return GBT_CC_4V; // if((volt<2.8f) && (volt>1.2f)) return GBT_CC_2V; if((volt<13.0f) && (volt>11.0f)) return GBT_CC_12V; 800b244: 4922 ldr r1, [pc, #136] @ (800b2d0 ) 800b246: 6878 ldr r0, [r7, #4] 800b248: f7fd ff86 bl 8009158 <__aeabi_fcmplt> 800b24c: 4603 mov r3, r0 800b24e: 2b00 cmp r3, #0 800b250: d008 beq.n 800b264 800b252: 4920 ldr r1, [pc, #128] @ (800b2d4 ) 800b254: 6878 ldr r0, [r7, #4] 800b256: f7fd ff9d bl 8009194 <__aeabi_fcmpgt> 800b25a: 4603 mov r3, r0 800b25c: 2b00 cmp r3, #0 800b25e: d001 beq.n 800b264 800b260: 2301 movs r3, #1 800b262: e031 b.n 800b2c8 if((volt<7.2f) && (volt>4.8f)) return GBT_CC_6V; 800b264: 491c ldr r1, [pc, #112] @ (800b2d8 ) 800b266: 6878 ldr r0, [r7, #4] 800b268: f7fd ff76 bl 8009158 <__aeabi_fcmplt> 800b26c: 4603 mov r3, r0 800b26e: 2b00 cmp r3, #0 800b270: d008 beq.n 800b284 800b272: 491a ldr r1, [pc, #104] @ (800b2dc ) 800b274: 6878 ldr r0, [r7, #4] 800b276: f7fd ff8d bl 8009194 <__aeabi_fcmpgt> 800b27a: 4603 mov r3, r0 800b27c: 2b00 cmp r3, #0 800b27e: d001 beq.n 800b284 800b280: 2302 movs r3, #2 800b282: e021 b.n 800b2c8 if((volt<4.8f) && (volt>3.0f)) return GBT_CC_4V; 800b284: 4915 ldr r1, [pc, #84] @ (800b2dc ) 800b286: 6878 ldr r0, [r7, #4] 800b288: f7fd ff66 bl 8009158 <__aeabi_fcmplt> 800b28c: 4603 mov r3, r0 800b28e: 2b00 cmp r3, #0 800b290: d008 beq.n 800b2a4 800b292: 4913 ldr r1, [pc, #76] @ (800b2e0 ) 800b294: 6878 ldr r0, [r7, #4] 800b296: f7fd ff7d bl 8009194 <__aeabi_fcmpgt> 800b29a: 4603 mov r3, r0 800b29c: 2b00 cmp r3, #0 800b29e: d001 beq.n 800b2a4 800b2a0: 2303 movs r3, #3 800b2a2: e011 b.n 800b2c8 if((volt<3.0f) && (volt>1.0f)) return GBT_CC_2V; 800b2a4: 490e ldr r1, [pc, #56] @ (800b2e0 ) 800b2a6: 6878 ldr r0, [r7, #4] 800b2a8: f7fd ff56 bl 8009158 <__aeabi_fcmplt> 800b2ac: 4603 mov r3, r0 800b2ae: 2b00 cmp r3, #0 800b2b0: d009 beq.n 800b2c6 800b2b2: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 800b2b6: 6878 ldr r0, [r7, #4] 800b2b8: f7fd ff6c bl 8009194 <__aeabi_fcmpgt> 800b2bc: 4603 mov r3, r0 800b2be: 2b00 cmp r3, #0 800b2c0: d001 beq.n 800b2c6 800b2c2: 2304 movs r3, #4 800b2c4: e000 b.n 800b2c8 return GBT_CC_UNKNOWN; 800b2c6: 2300 movs r3, #0 } 800b2c8: 4618 mov r0, r3 800b2ca: 3708 adds r7, #8 800b2cc: 46bd mov sp, r7 800b2ce: bd80 pop {r7, pc} 800b2d0: 41500000 .word 0x41500000 800b2d4: 41300000 .word 0x41300000 800b2d8: 40e66666 .word 0x40e66666 800b2dc: 4099999a .word 0x4099999a 800b2e0: 40400000 .word 0x40400000 0800b2e4 : float CONN_CC_GetAdc(){ 800b2e4: b580 push {r7, lr} 800b2e6: b082 sub sp, #8 800b2e8: af00 add r7, sp, #0 //Vin*k= 1.09v //12vin = 1353 ADC uint32_t adc; float volt; ADC_Select_Channel(ADC_CHANNEL_3); 800b2ea: 2003 movs r0, #3 800b2ec: f7fe fb9c bl 8009a28 HAL_ADC_Start(&hadc1); 800b2f0: 480e ldr r0, [pc, #56] @ (800b32c ) 800b2f2: f003 fbf9 bl 800eae8 HAL_ADC_PollForConversion(&hadc1, 100); 800b2f6: 2164 movs r1, #100 @ 0x64 800b2f8: 480c ldr r0, [pc, #48] @ (800b32c ) 800b2fa: f003 fccf bl 800ec9c adc = HAL_ADC_GetValue(&hadc1); 800b2fe: 480b ldr r0, [pc, #44] @ (800b32c ) 800b300: f003 fdd2 bl 800eea8 800b304: 6078 str r0, [r7, #4] HAL_ADC_Stop(&hadc1); 800b306: 4809 ldr r0, [pc, #36] @ (800b32c ) 800b308: f003 fc9c bl 800ec44 volt = (float)adc/113.4f; 800b30c: 6878 ldr r0, [r7, #4] 800b30e: f7fd fd2d bl 8008d6c <__aeabi_ui2f> 800b312: 4603 mov r3, r0 800b314: 4906 ldr r1, [pc, #24] @ (800b330 ) 800b316: 4618 mov r0, r3 800b318: f7fd fe34 bl 8008f84 <__aeabi_fdiv> 800b31c: 4603 mov r3, r0 800b31e: 603b str r3, [r7, #0] return volt; 800b320: 683b ldr r3, [r7, #0] } 800b322: 4618 mov r0, r3 800b324: 3708 adds r7, #8 800b326: 46bd mov sp, r7 800b328: bd80 pop {r7, pc} 800b32a: bf00 nop 800b32c: 2000026c .word 0x2000026c 800b330: 42e2cccd .word 0x42e2cccd 0800b334 : CRC_HandleTypeDef hcrc; /* CRC init function */ void MX_CRC_Init(void) { 800b334: b580 push {r7, lr} 800b336: af00 add r7, sp, #0 /* USER CODE END CRC_Init 0 */ /* USER CODE BEGIN CRC_Init 1 */ /* USER CODE END CRC_Init 1 */ hcrc.Instance = CRC; 800b338: 4b06 ldr r3, [pc, #24] @ (800b354 ) 800b33a: 4a07 ldr r2, [pc, #28] @ (800b358 ) 800b33c: 601a str r2, [r3, #0] if (HAL_CRC_Init(&hcrc) != HAL_OK) 800b33e: 4805 ldr r0, [pc, #20] @ (800b354 ) 800b340: f004 ffd9 bl 80102f6 800b344: 4603 mov r3, r0 800b346: 2b00 cmp r3, #0 800b348: d001 beq.n 800b34e { Error_Handler(); 800b34a: f001 f84d bl 800c3e8 } /* USER CODE BEGIN CRC_Init 2 */ /* USER CODE END CRC_Init 2 */ } 800b34e: bf00 nop 800b350: bd80 pop {r7, pc} 800b352: bf00 nop 800b354: 200003e4 .word 0x200003e4 800b358: 40023000 .word 0x40023000 0800b35c : void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle) { 800b35c: b480 push {r7} 800b35e: b085 sub sp, #20 800b360: af00 add r7, sp, #0 800b362: 6078 str r0, [r7, #4] if(crcHandle->Instance==CRC) 800b364: 687b ldr r3, [r7, #4] 800b366: 681b ldr r3, [r3, #0] 800b368: 4a09 ldr r2, [pc, #36] @ (800b390 ) 800b36a: 4293 cmp r3, r2 800b36c: d10b bne.n 800b386 { /* USER CODE BEGIN CRC_MspInit 0 */ /* USER CODE END CRC_MspInit 0 */ /* CRC clock enable */ __HAL_RCC_CRC_CLK_ENABLE(); 800b36e: 4b09 ldr r3, [pc, #36] @ (800b394 ) 800b370: 695b ldr r3, [r3, #20] 800b372: 4a08 ldr r2, [pc, #32] @ (800b394 ) 800b374: f043 0340 orr.w r3, r3, #64 @ 0x40 800b378: 6153 str r3, [r2, #20] 800b37a: 4b06 ldr r3, [pc, #24] @ (800b394 ) 800b37c: 695b ldr r3, [r3, #20] 800b37e: f003 0340 and.w r3, r3, #64 @ 0x40 800b382: 60fb str r3, [r7, #12] 800b384: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN CRC_MspInit 1 */ /* USER CODE END CRC_MspInit 1 */ } } 800b386: bf00 nop 800b388: 3714 adds r7, #20 800b38a: 46bd mov sp, r7 800b38c: bc80 pop {r7} 800b38e: 4770 bx lr 800b390: 40023000 .word 0x40023000 800b394: 40021000 .word 0x40021000 0800b398 <_write>: #if defined(__GNUC__) int _write(int fd, char * ptr, int len) { 800b398: b580 push {r7, lr} 800b39a: b084 sub sp, #16 800b39c: af00 add r7, sp, #0 800b39e: 60f8 str r0, [r7, #12] 800b3a0: 60b9 str r1, [r7, #8] 800b3a2: 607a str r2, [r7, #4] debug_buffer_add((const uint8_t*)ptr, len); 800b3a4: 687b ldr r3, [r7, #4] 800b3a6: b29b uxth r3, r3 800b3a8: 4619 mov r1, r3 800b3aa: 68b8 ldr r0, [r7, #8] 800b3ac: f000 f806 bl 800b3bc return len; 800b3b0: 687b ldr r3, [r7, #4] } 800b3b2: 4618 mov r0, r3 800b3b4: 3710 adds r7, #16 800b3b6: 46bd mov sp, r7 800b3b8: bd80 pop {r7, pc} ... 0800b3bc : #endif // Добавляет данные в кольцевой буфер void debug_buffer_add(const uint8_t* data, uint16_t len) { 800b3bc: b480 push {r7} 800b3be: b085 sub sp, #20 800b3c0: af00 add r7, sp, #0 800b3c2: 6078 str r0, [r7, #4] 800b3c4: 460b mov r3, r1 800b3c6: 807b strh r3, [r7, #2] \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800b3c8: b672 cpsid i } 800b3ca: bf00 nop __disable_irq(); for (uint16_t i = 0; i < len; i++) { 800b3cc: 2300 movs r3, #0 800b3ce: 81fb strh r3, [r7, #14] 800b3d0: e045 b.n 800b45e // Если буфер полон, перезаписываем старые данные if (debug_buffer.count >= DEBUG_BUFFER_SIZE) { 800b3d2: 4b28 ldr r3, [pc, #160] @ (800b474 ) 800b3d4: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b3d8: b29b uxth r3, r3 800b3da: f5b3 6f80 cmp.w r3, #1024 @ 0x400 800b3de: d318 bcc.n 800b412 debug_buffer.read_index = (debug_buffer.read_index + 1) % DEBUG_BUFFER_SIZE; 800b3e0: 4b24 ldr r3, [pc, #144] @ (800b474 ) 800b3e2: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b3e6: b29b uxth r3, r3 800b3e8: 3301 adds r3, #1 800b3ea: 425a negs r2, r3 800b3ec: f3c3 0309 ubfx r3, r3, #0, #10 800b3f0: f3c2 0209 ubfx r2, r2, #0, #10 800b3f4: bf58 it pl 800b3f6: 4253 negpl r3, r2 800b3f8: b29a uxth r2, r3 800b3fa: 4b1e ldr r3, [pc, #120] @ (800b474 ) 800b3fc: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402 debug_buffer.count--; 800b400: 4b1c ldr r3, [pc, #112] @ (800b474 ) 800b402: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b406: b29b uxth r3, r3 800b408: 3b01 subs r3, #1 800b40a: b29a uxth r2, r3 800b40c: 4b19 ldr r3, [pc, #100] @ (800b474 ) 800b40e: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 } debug_buffer.buffer[debug_buffer.write_index] = data[i]; 800b412: 89fb ldrh r3, [r7, #14] 800b414: 687a ldr r2, [r7, #4] 800b416: 4413 add r3, r2 800b418: 4a16 ldr r2, [pc, #88] @ (800b474 ) 800b41a: f8b2 2400 ldrh.w r2, [r2, #1024] @ 0x400 800b41e: b292 uxth r2, r2 800b420: 7819 ldrb r1, [r3, #0] 800b422: 4b14 ldr r3, [pc, #80] @ (800b474 ) 800b424: 5499 strb r1, [r3, r2] debug_buffer.write_index = (debug_buffer.write_index + 1) % DEBUG_BUFFER_SIZE; 800b426: 4b13 ldr r3, [pc, #76] @ (800b474 ) 800b428: f8b3 3400 ldrh.w r3, [r3, #1024] @ 0x400 800b42c: b29b uxth r3, r3 800b42e: 3301 adds r3, #1 800b430: 425a negs r2, r3 800b432: f3c3 0309 ubfx r3, r3, #0, #10 800b436: f3c2 0209 ubfx r2, r2, #0, #10 800b43a: bf58 it pl 800b43c: 4253 negpl r3, r2 800b43e: b29a uxth r2, r3 800b440: 4b0c ldr r3, [pc, #48] @ (800b474 ) 800b442: f8a3 2400 strh.w r2, [r3, #1024] @ 0x400 debug_buffer.count++; 800b446: 4b0b ldr r3, [pc, #44] @ (800b474 ) 800b448: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b44c: b29b uxth r3, r3 800b44e: 3301 adds r3, #1 800b450: b29a uxth r2, r3 800b452: 4b08 ldr r3, [pc, #32] @ (800b474 ) 800b454: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 for (uint16_t i = 0; i < len; i++) { 800b458: 89fb ldrh r3, [r7, #14] 800b45a: 3301 adds r3, #1 800b45c: 81fb strh r3, [r7, #14] 800b45e: 89fa ldrh r2, [r7, #14] 800b460: 887b ldrh r3, [r7, #2] 800b462: 429a cmp r2, r3 800b464: d3b5 bcc.n 800b3d2 __ASM volatile ("cpsie i" : : : "memory"); 800b466: b662 cpsie i } 800b468: bf00 nop } __enable_irq(); } 800b46a: bf00 nop 800b46c: 3714 adds r7, #20 800b46e: 46bd mov sp, r7 800b470: bc80 pop {r7} 800b472: 4770 bx lr 800b474: 200003ec .word 0x200003ec 0800b478 : // Возвращает количество доступных данных в буфере uint16_t debug_buffer_available(void) { 800b478: b480 push {r7} 800b47a: b083 sub sp, #12 800b47c: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800b47e: b672 cpsid i } 800b480: bf00 nop __disable_irq(); uint16_t count = debug_buffer.count; 800b482: 4b06 ldr r3, [pc, #24] @ (800b49c ) 800b484: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b488: 80fb strh r3, [r7, #6] __ASM volatile ("cpsie i" : : : "memory"); 800b48a: b662 cpsie i } 800b48c: bf00 nop __enable_irq(); return count; 800b48e: 88fb ldrh r3, [r7, #6] } 800b490: 4618 mov r0, r3 800b492: 370c adds r7, #12 800b494: 46bd mov sp, r7 800b496: bc80 pop {r7} 800b498: 4770 bx lr 800b49a: bf00 nop 800b49c: 200003ec .word 0x200003ec 0800b4a0 : // Отправляет один пакет данных из буфера через SC_SendPacket (не более 250 байт) void debug_buffer_send(void) { 800b4a0: b580 push {r7, lr} 800b4a2: b082 sub sp, #8 800b4a4: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800b4a6: b672 cpsid i } 800b4a8: bf00 nop __disable_irq(); // Если буфер пуст, ничего не делаем if (debug_buffer.count == 0) { 800b4aa: 4b2d ldr r3, [pc, #180] @ (800b560 ) 800b4ac: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b4b0: b29b uxth r3, r3 800b4b2: 2b00 cmp r3, #0 800b4b4: d102 bne.n 800b4bc __ASM volatile ("cpsie i" : : : "memory"); 800b4b6: b662 cpsie i } 800b4b8: bf00 nop __enable_irq(); return; 800b4ba: e04e b.n 800b55a } // Определяем сколько байт можно отправить (не более 250) uint16_t bytes_to_send = debug_buffer.count; 800b4bc: 4b28 ldr r3, [pc, #160] @ (800b560 ) 800b4be: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b4c2: 80fb strh r3, [r7, #6] if (bytes_to_send > DEBUG_BUFFER_MAX_COUNT) { 800b4c4: 88fb ldrh r3, [r7, #6] 800b4c6: 2b80 cmp r3, #128 @ 0x80 800b4c8: d901 bls.n 800b4ce bytes_to_send = DEBUG_BUFFER_MAX_COUNT; 800b4ca: 2380 movs r3, #128 @ 0x80 800b4cc: 80fb strh r3, [r7, #6] } // Вычисляем сколько байт до конца буфера uint16_t bytes_to_end = DEBUG_BUFFER_SIZE - debug_buffer.read_index; 800b4ce: 4b24 ldr r3, [pc, #144] @ (800b560 ) 800b4d0: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b4d4: b29b uxth r3, r3 800b4d6: f5c3 6380 rsb r3, r3, #1024 @ 0x400 800b4da: 80bb strh r3, [r7, #4] // Отправляем только непрерывный блок (до конца буфера или до bytes_to_send) if (bytes_to_send > bytes_to_end) { 800b4dc: 88fa ldrh r2, [r7, #6] 800b4de: 88bb ldrh r3, [r7, #4] 800b4e0: 429a cmp r2, r3 800b4e2: d901 bls.n 800b4e8 bytes_to_send = bytes_to_end; 800b4e4: 88bb ldrh r3, [r7, #4] 800b4e6: 80fb strh r3, [r7, #6] } // Отправляем данные напрямую из буфера if(bytes_to_send == debug_buffer.count){ 800b4e8: 4b1d ldr r3, [pc, #116] @ (800b560 ) 800b4ea: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b4ee: b29b uxth r3, r3 800b4f0: 88fa ldrh r2, [r7, #6] 800b4f2: 429a cmp r2, r3 800b4f4: d10c bne.n 800b510 SC_SendPacket(&debug_buffer.buffer[debug_buffer.read_index], bytes_to_send, CMD_GET_LOG); 800b4f6: 4b1a ldr r3, [pc, #104] @ (800b560 ) 800b4f8: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b4fc: b29b uxth r3, r3 800b4fe: 461a mov r2, r3 800b500: 4b17 ldr r3, [pc, #92] @ (800b560 ) 800b502: 4413 add r3, r2 800b504: 88f9 ldrh r1, [r7, #6] 800b506: 2250 movs r2, #80 @ 0x50 800b508: 4618 mov r0, r3 800b50a: f002 f8d3 bl 800d6b4 800b50e: e00b b.n 800b528 }else{ SC_SendPacket(&debug_buffer.buffer[debug_buffer.read_index], bytes_to_send, CMD_GET_LOG_CONTINUE); 800b510: 4b13 ldr r3, [pc, #76] @ (800b560 ) 800b512: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b516: b29b uxth r3, r3 800b518: 461a mov r2, r3 800b51a: 4b11 ldr r3, [pc, #68] @ (800b560 ) 800b51c: 4413 add r3, r2 800b51e: 88f9 ldrh r1, [r7, #6] 800b520: 2251 movs r2, #81 @ 0x51 800b522: 4618 mov r0, r3 800b524: f002 f8c6 bl 800d6b4 } debug_buffer.read_index = (debug_buffer.read_index + bytes_to_send) % DEBUG_BUFFER_SIZE; 800b528: 4b0d ldr r3, [pc, #52] @ (800b560 ) 800b52a: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b52e: b29a uxth r2, r3 800b530: 88fb ldrh r3, [r7, #6] 800b532: 4413 add r3, r2 800b534: b29b uxth r3, r3 800b536: f3c3 0309 ubfx r3, r3, #0, #10 800b53a: b29a uxth r2, r3 800b53c: 4b08 ldr r3, [pc, #32] @ (800b560 ) 800b53e: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402 debug_buffer.count -= bytes_to_send; 800b542: 4b07 ldr r3, [pc, #28] @ (800b560 ) 800b544: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b548: b29a uxth r2, r3 800b54a: 88fb ldrh r3, [r7, #6] 800b54c: 1ad3 subs r3, r2, r3 800b54e: b29a uxth r2, r3 800b550: 4b03 ldr r3, [pc, #12] @ (800b560 ) 800b552: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 __ASM volatile ("cpsie i" : : : "memory"); 800b556: b662 cpsie i } 800b558: bf00 nop __enable_irq(); } 800b55a: 3708 adds r7, #8 800b55c: 46bd mov sp, r7 800b55e: bd80 pop {r7, pc} 800b560: 200003ec .word 0x200003ec 0800b564 : #define LOG_BUFFER_SIZE 128 uint8_t log_buffer[LOG_BUFFER_SIZE]; // Кастомный printf с приоритетом лога int log_printf(LogLevel_t level, const char *format, ...) { 800b564: b40e push {r1, r2, r3} 800b566: b580 push {r7, lr} 800b568: b085 sub sp, #20 800b56a: af00 add r7, sp, #0 800b56c: 4603 mov r3, r0 800b56e: 71fb strb r3, [r7, #7] va_list args; int result; // Добавляем приоритет первым байтом log_buffer[0] = (uint8_t)level; 800b570: 4a15 ldr r2, [pc, #84] @ (800b5c8 ) 800b572: 79fb ldrb r3, [r7, #7] 800b574: 7013 strb r3, [r2, #0] // Форматируем строку начиная со второго байта va_start(args, format); 800b576: f107 0320 add.w r3, r7, #32 800b57a: 60bb str r3, [r7, #8] result = vsnprintf((char*)&log_buffer[1], LOG_BUFFER_SIZE - 2, format, args); 800b57c: 68bb ldr r3, [r7, #8] 800b57e: 69fa ldr r2, [r7, #28] 800b580: 217e movs r1, #126 @ 0x7e 800b582: 4812 ldr r0, [pc, #72] @ (800b5cc ) 800b584: f008 fdcc bl 8014120 800b588: 60f8 str r0, [r7, #12] va_end(args); // Проверяем, не переполнился ли буфер if (result < 0) { 800b58a: 68fb ldr r3, [r7, #12] 800b58c: 2b00 cmp r3, #0 800b58e: da01 bge.n 800b594 return result; 800b590: 68fb ldr r3, [r7, #12] 800b592: e012 b.n 800b5ba } // Ограничиваем размер, чтобы оставить место для нуль-терминатора if (result >= (LOG_BUFFER_SIZE - 2)) { 800b594: 68fb ldr r3, [r7, #12] 800b596: 2b7d cmp r3, #125 @ 0x7d 800b598: dd01 ble.n 800b59e result = LOG_BUFFER_SIZE - 2; 800b59a: 237e movs r3, #126 @ 0x7e 800b59c: 60fb str r3, [r7, #12] } // Добавляем нуль-терминатор в конец log_buffer[result + 1] = '\0'; 800b59e: 68fb ldr r3, [r7, #12] 800b5a0: 3301 adds r3, #1 800b5a2: 4a09 ldr r2, [pc, #36] @ (800b5c8 ) 800b5a4: 2100 movs r1, #0 800b5a6: 54d1 strb r1, [r2, r3] // Отправляем в буфер (приоритет + строка + нуль-терминатор) debug_buffer_add(log_buffer, result + 2); 800b5a8: 68fb ldr r3, [r7, #12] 800b5aa: b29b uxth r3, r3 800b5ac: 3302 adds r3, #2 800b5ae: b29b uxth r3, r3 800b5b0: 4619 mov r1, r3 800b5b2: 4805 ldr r0, [pc, #20] @ (800b5c8 ) 800b5b4: f7ff ff02 bl 800b3bc return result; 800b5b8: 68fb ldr r3, [r7, #12] } 800b5ba: 4618 mov r0, r3 800b5bc: 3714 adds r7, #20 800b5be: 46bd mov sp, r7 800b5c0: e8bd 4080 ldmia.w sp!, {r7, lr} 800b5c4: b003 add sp, #12 800b5c6: 4770 bx lr 800b5c8: 200007f4 .word 0x200007f4 800b5cc: 200007f5 .word 0x200007f5 0800b5d0 : // GB/T Time Synchronization Packet #include "main.h" #include "soft_rtc.h" #include "charger_gbt.h" void GBT_SendCTS(){ 800b5d0: b580 push {r7, lr} 800b5d2: b082 sub sp, #8 800b5d4: af00 add r7, sp, #0 uint8_t data[7]; unix_to_bcd(get_Current_Time(), data); 800b5d6: f002 fb7d bl 800dcd4 800b5da: 4602 mov r2, r0 800b5dc: 463b mov r3, r7 800b5de: 4619 mov r1, r3 800b5e0: 4610 mov r0, r2 800b5e2: f002 fbb5 bl 800dd50 // data[3] = 0x05; //days // data[4] = 0x05; //month // data[5] = 0x24; //years // data[6] = 0x20; //centuries J_SendPacket(0x000700, 6, 7, data); 800b5e6: 463b mov r3, r7 800b5e8: 2207 movs r2, #7 800b5ea: 2106 movs r1, #6 800b5ec: f44f 60e0 mov.w r0, #1792 @ 0x700 800b5f0: f000 fb60 bl 800bcb4 } 800b5f4: bf00 nop 800b5f6: 3708 adds r7, #8 800b5f8: 46bd mov sp, r7 800b5fa: bd80 pop {r7, pc} 0800b5fc : //GB/T Max Load Packet void GBT_SendCML(){ 800b5fc: b580 push {r7, lr} 800b5fe: af00 add r7, sp, #0 // data[4] = 0xC4; //-150A maximum output current // data[5] = 0x09; // // data[6] = 0x8C; //-2A minimum output current // data[7] = 0x0F; // J_SendPacket(0x000800, 6, 8, (uint8_t*)&GBT_MaxLoad); 800b600: 4b04 ldr r3, [pc, #16] @ (800b614 ) 800b602: 2208 movs r2, #8 800b604: 2106 movs r1, #6 800b606: f44f 6000 mov.w r0, #2048 @ 0x800 800b60a: f000 fb53 bl 800bcb4 } 800b60e: bf00 nop 800b610: bd80 pop {r7, pc} 800b612: bf00 nop 800b614: 20000330 .word 0x20000330 0800b618 : //GB/T Version packet void GBT_SendCHM(){ 800b618: b580 push {r7, lr} 800b61a: b082 sub sp, #8 800b61c: af00 add r7, sp, #0 uint8_t data[3]; data[0] = 0x01; 800b61e: 2301 movs r3, #1 800b620: 713b strb r3, [r7, #4] data[1] = 0x01; 800b622: 2301 movs r3, #1 800b624: 717b strb r3, [r7, #5] data[2] = 0x00; 800b626: 2300 movs r3, #0 800b628: 71bb strb r3, [r7, #6] J_SendPacket(0x2600, 6, 3, data); 800b62a: 1d3b adds r3, r7, #4 800b62c: 2203 movs r2, #3 800b62e: 2106 movs r1, #6 800b630: f44f 5018 mov.w r0, #9728 @ 0x2600 800b634: f000 fb3e bl 800bcb4 } 800b638: bf00 nop 800b63a: 3708 adds r7, #8 800b63c: 46bd mov sp, r7 800b63e: bd80 pop {r7, pc} 0800b640 : //GB/T CRM Packet (state=BMS identified) void GBT_SendCRM(uint8_t state){ 800b640: b580 push {r7, lr} 800b642: b082 sub sp, #8 800b644: af00 add r7, sp, #0 800b646: 4603 mov r3, r0 800b648: 71fb strb r3, [r7, #7] // data[3] = 0x01; // data[4] = 0x00; // data[5] = 0x42; //TODO: location BFG // data[6] = 0x46; // data[7] = 0x47; GBT_ChargerInfo.bmsIdentified = state; 800b64a: 4a07 ldr r2, [pc, #28] @ (800b668 ) 800b64c: 79fb ldrb r3, [r7, #7] 800b64e: 7013 strb r3, [r2, #0] J_SendPacket(0x100, 6, 8, (uint8_t *)&GBT_ChargerInfo); 800b650: 4b05 ldr r3, [pc, #20] @ (800b668 ) 800b652: 2208 movs r2, #8 800b654: 2106 movs r1, #6 800b656: f44f 7080 mov.w r0, #256 @ 0x100 800b65a: f000 fb2b bl 800bcb4 } 800b65e: bf00 nop 800b660: 3708 adds r7, #8 800b662: 46bd mov sp, r7 800b664: bd80 pop {r7, pc} 800b666: bf00 nop 800b668: 20000338 .word 0x20000338 0800b66c : //GB/T CRO packet (Charger ready) void GBT_SendCRO(uint8_t state){ 800b66c: b580 push {r7, lr} 800b66e: b084 sub sp, #16 800b670: af00 add r7, sp, #0 800b672: 4603 mov r3, r0 800b674: 71fb strb r3, [r7, #7] uint8_t data[1]; data[0] = state; 800b676: 79fb ldrb r3, [r7, #7] 800b678: 733b strb r3, [r7, #12] J_SendPacket(0xA00, 4, 1, data); 800b67a: f107 030c add.w r3, r7, #12 800b67e: 2201 movs r2, #1 800b680: 2104 movs r1, #4 800b682: f44f 6020 mov.w r0, #2560 @ 0xa00 800b686: f000 fb15 bl 800bcb4 } 800b68a: bf00 nop 800b68c: 3710 adds r7, #16 800b68e: 46bd mov sp, r7 800b690: bd80 pop {r7, pc} ... 0800b694 : //GB/T CCS packet (Charger current status) void GBT_SendCCS(){ 800b694: b580 push {r7, lr} 800b696: af00 add r7, sp, #0 // data[3] = GBT_CurrPower.requestedCurrent>>8; //TODO: current // data[4] = GBT_StateTick()/60000; //charging time (min) // data[5] = 0; //TODO: 255 min+ // data[6] = 0b11111101; //charging not permitted // data[7] = 0xFF; J_SendPacket(0x1200, 6, 8, (uint8_t *)&GBT_ChargerCurrentStatus); 800b698: 4b04 ldr r3, [pc, #16] @ (800b6ac ) 800b69a: 2208 movs r2, #8 800b69c: 2106 movs r1, #6 800b69e: f44f 5090 mov.w r0, #4608 @ 0x1200 800b6a2: f000 fb07 bl 800bcb4 } 800b6a6: bf00 nop 800b6a8: bd80 pop {r7, pc} 800b6aa: bf00 nop 800b6ac: 200003ac .word 0x200003ac 0800b6b0 : // GB/T Charging Stop packet void GBT_SendCST(uint32_t Cause){ 800b6b0: b580 push {r7, lr} 800b6b2: b084 sub sp, #16 800b6b4: af00 add r7, sp, #0 800b6b6: 6078 str r0, [r7, #4] uint8_t data[8]; data[0] = (Cause>>24) & 0xFF; // Error 800b6b8: 687b ldr r3, [r7, #4] 800b6ba: 0e1b lsrs r3, r3, #24 800b6bc: b2db uxtb r3, r3 800b6be: 723b strb r3, [r7, #8] data[1] = (Cause>>16) & 0xFF; // 800b6c0: 687b ldr r3, [r7, #4] 800b6c2: 0c1b lsrs r3, r3, #16 800b6c4: b2db uxtb r3, r3 800b6c6: 727b strb r3, [r7, #9] data[2] = (Cause>>8) & 0xFF; // 800b6c8: 687b ldr r3, [r7, #4] 800b6ca: 0a1b lsrs r3, r3, #8 800b6cc: b2db uxtb r3, r3 800b6ce: 72bb strb r3, [r7, #10] data[3] = Cause & 0xFF; // 800b6d0: 687b ldr r3, [r7, #4] 800b6d2: b2db uxtb r3, r3 800b6d4: 72fb strb r3, [r7, #11] J_SendPacket(0x1A00, 4, 4, data); 800b6d6: f107 0308 add.w r3, r7, #8 800b6da: 2204 movs r2, #4 800b6dc: 2104 movs r1, #4 800b6de: f44f 50d0 mov.w r0, #6656 @ 0x1a00 800b6e2: f000 fae7 bl 800bcb4 } 800b6e6: bf00 nop 800b6e8: 3710 adds r7, #16 800b6ea: 46bd mov sp, r7 800b6ec: bd80 pop {r7, pc} ... 0800b6f0 : void GBT_SendCSD(){ 800b6f0: b580 push {r7, lr} 800b6f2: af00 add r7, sp, #0 GBT_ChargerStop.chargerNumber = GBT_ChargerInfo.chargerNumber; 800b6f4: 4b0b ldr r3, [pc, #44] @ (800b724 ) 800b6f6: f8d3 3001 ldr.w r3, [r3, #1] 800b6fa: 4a0b ldr r2, [pc, #44] @ (800b728 ) 800b6fc: 6053 str r3, [r2, #4] GBT_ChargerStop.outputEnergy = 0; //TODO Energy meters 800b6fe: 4b0a ldr r3, [pc, #40] @ (800b728 ) 800b700: 2200 movs r2, #0 800b702: 709a strb r2, [r3, #2] 800b704: 2200 movs r2, #0 800b706: 70da strb r2, [r3, #3] GBT_ChargerStop.chargingTime = GBT_ChargerCurrentStatus.chargingTime; 800b708: 4b08 ldr r3, [pc, #32] @ (800b72c ) 800b70a: 889b ldrh r3, [r3, #4] 800b70c: b29a uxth r2, r3 800b70e: 4b06 ldr r3, [pc, #24] @ (800b728 ) 800b710: 801a strh r2, [r3, #0] J_SendPacket(0x1D00, 6, 7, (uint8_t *)&GBT_ChargerStop); 800b712: 4b05 ldr r3, [pc, #20] @ (800b728 ) 800b714: 2207 movs r2, #7 800b716: 2106 movs r1, #6 800b718: f44f 50e8 mov.w r0, #7424 @ 0x1d00 800b71c: f000 faca bl 800bcb4 } 800b720: bf00 nop 800b722: bd80 pop {r7, pc} 800b724: 20000338 .word 0x20000338 800b728: 200003b4 .word 0x200003b4 800b72c: 200003ac .word 0x200003ac 0800b730 : void GBT_SendCEM(uint32_t ErrorCode){ 800b730: b580 push {r7, lr} 800b732: b084 sub sp, #16 800b734: af00 add r7, sp, #0 800b736: 6078 str r0, [r7, #4] uint8_t data[8]; data[0] = (ErrorCode>>24) & 0xFF; // Error 800b738: 687b ldr r3, [r7, #4] 800b73a: 0e1b lsrs r3, r3, #24 800b73c: b2db uxtb r3, r3 800b73e: 723b strb r3, [r7, #8] data[1] = (ErrorCode>>16) & 0xFF; // 800b740: 687b ldr r3, [r7, #4] 800b742: 0c1b lsrs r3, r3, #16 800b744: b2db uxtb r3, r3 800b746: 727b strb r3, [r7, #9] data[2] = (ErrorCode>>8) & 0xFF; // 800b748: 687b ldr r3, [r7, #4] 800b74a: 0a1b lsrs r3, r3, #8 800b74c: b2db uxtb r3, r3 800b74e: 72bb strb r3, [r7, #10] data[3] = ErrorCode & 0xFF; // 800b750: 687b ldr r3, [r7, #4] 800b752: b2db uxtb r3, r3 800b754: 72fb strb r3, [r7, #11] J_SendPacket(0x1F00, 4, 4, data); 800b756: f107 0308 add.w r3, r7, #8 800b75a: 2204 movs r2, #4 800b75c: 2104 movs r1, #4 800b75e: f44f 50f8 mov.w r0, #7936 @ 0x1f00 800b762: f000 faa7 bl 800bcb4 } 800b766: bf00 nop 800b768: 3710 adds r7, #16 800b76a: 46bd mov sp, r7 800b76c: bd80 pop {r7, pc} ... 0800b770 : * EXTI PB8 ------> I2C1_SCL PB9 ------> I2C1_SDA */ void MX_GPIO_Init(void) { 800b770: b580 push {r7, lr} 800b772: b08a sub sp, #40 @ 0x28 800b774: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800b776: f107 0314 add.w r3, r7, #20 800b77a: 2200 movs r2, #0 800b77c: 601a str r2, [r3, #0] 800b77e: 605a str r2, [r3, #4] 800b780: 609a str r2, [r3, #8] 800b782: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 800b784: 4b7d ldr r3, [pc, #500] @ (800b97c ) 800b786: 699b ldr r3, [r3, #24] 800b788: 4a7c ldr r2, [pc, #496] @ (800b97c ) 800b78a: f043 0310 orr.w r3, r3, #16 800b78e: 6193 str r3, [r2, #24] 800b790: 4b7a ldr r3, [pc, #488] @ (800b97c ) 800b792: 699b ldr r3, [r3, #24] 800b794: f003 0310 and.w r3, r3, #16 800b798: 613b str r3, [r7, #16] 800b79a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 800b79c: 4b77 ldr r3, [pc, #476] @ (800b97c ) 800b79e: 699b ldr r3, [r3, #24] 800b7a0: 4a76 ldr r2, [pc, #472] @ (800b97c ) 800b7a2: f043 0304 orr.w r3, r3, #4 800b7a6: 6193 str r3, [r2, #24] 800b7a8: 4b74 ldr r3, [pc, #464] @ (800b97c ) 800b7aa: 699b ldr r3, [r3, #24] 800b7ac: f003 0304 and.w r3, r3, #4 800b7b0: 60fb str r3, [r7, #12] 800b7b2: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOB_CLK_ENABLE(); 800b7b4: 4b71 ldr r3, [pc, #452] @ (800b97c ) 800b7b6: 699b ldr r3, [r3, #24] 800b7b8: 4a70 ldr r2, [pc, #448] @ (800b97c ) 800b7ba: f043 0308 orr.w r3, r3, #8 800b7be: 6193 str r3, [r2, #24] 800b7c0: 4b6e ldr r3, [pc, #440] @ (800b97c ) 800b7c2: 699b ldr r3, [r3, #24] 800b7c4: f003 0308 and.w r3, r3, #8 800b7c8: 60bb str r3, [r7, #8] 800b7ca: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOE_CLK_ENABLE(); 800b7cc: 4b6b ldr r3, [pc, #428] @ (800b97c ) 800b7ce: 699b ldr r3, [r3, #24] 800b7d0: 4a6a ldr r2, [pc, #424] @ (800b97c ) 800b7d2: f043 0340 orr.w r3, r3, #64 @ 0x40 800b7d6: 6193 str r3, [r2, #24] 800b7d8: 4b68 ldr r3, [pc, #416] @ (800b97c ) 800b7da: 699b ldr r3, [r3, #24] 800b7dc: f003 0340 and.w r3, r3, #64 @ 0x40 800b7e0: 607b str r3, [r7, #4] 800b7e2: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 800b7e4: 4b65 ldr r3, [pc, #404] @ (800b97c ) 800b7e6: 699b ldr r3, [r3, #24] 800b7e8: 4a64 ldr r2, [pc, #400] @ (800b97c ) 800b7ea: f043 0320 orr.w r3, r3, #32 800b7ee: 6193 str r3, [r2, #24] 800b7f0: 4b62 ldr r3, [pc, #392] @ (800b97c ) 800b7f2: 699b ldr r3, [r3, #24] 800b7f4: f003 0320 and.w r3, r3, #32 800b7f8: 603b str r3, [r7, #0] 800b7fa: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, LOCK_A_Pin|LOCK_B_Pin, GPIO_PIN_RESET); 800b7fc: 2200 movs r2, #0 800b7fe: 2130 movs r1, #48 @ 0x30 800b800: 485f ldr r0, [pc, #380] @ (800b980 ) 800b802: f005 f872 bl 80108ea /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, RELAY1_Pin|RELAY2_Pin|RELAY3_Pin|RELAY4_Pin 800b806: 2200 movs r2, #0 800b808: f44f 51f8 mov.w r1, #7936 @ 0x1f00 800b80c: 485d ldr r0, [pc, #372] @ (800b984 ) 800b80e: f005 f86c bl 80108ea |RELAY5_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, GPIO_PIN_RESET); 800b812: 2200 movs r2, #0 800b814: f44f 4100 mov.w r1, #32768 @ 0x8000 800b818: 485b ldr r0, [pc, #364] @ (800b988 ) 800b81a: f005 f866 bl 80108ea /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, RELAY_DC_Pin|USART2_DIR_Pin, GPIO_PIN_RESET); 800b81e: 2200 movs r2, #0 800b820: 2118 movs r1, #24 800b822: 485a ldr r0, [pc, #360] @ (800b98c ) 800b824: f005 f861 bl 80108ea /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(EE_WP_GPIO_Port, EE_WP_Pin, GPIO_PIN_RESET); 800b828: 2200 movs r2, #0 800b82a: 2180 movs r1, #128 @ 0x80 800b82c: 4858 ldr r0, [pc, #352] @ (800b990 ) 800b82e: f005 f85c bl 80108ea /*Configure GPIO pin : IN_SW0_Pin */ GPIO_InitStruct.Pin = IN_SW0_Pin; 800b832: 2302 movs r3, #2 800b834: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b836: 2300 movs r3, #0 800b838: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b83a: 2300 movs r3, #0 800b83c: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_SW0_GPIO_Port, &GPIO_InitStruct); 800b83e: f107 0314 add.w r3, r7, #20 800b842: 4619 mov r1, r3 800b844: 4850 ldr r0, [pc, #320] @ (800b988 ) 800b846: f004 feb5 bl 80105b4 /*Configure GPIO pin : IN_SW1_Pin */ GPIO_InitStruct.Pin = IN_SW1_Pin; 800b84a: 2304 movs r3, #4 800b84c: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b84e: 2300 movs r3, #0 800b850: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 800b852: 2302 movs r3, #2 800b854: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_SW1_GPIO_Port, &GPIO_InitStruct); 800b856: f107 0314 add.w r3, r7, #20 800b85a: 4619 mov r1, r3 800b85c: 484a ldr r0, [pc, #296] @ (800b988 ) 800b85e: f004 fea9 bl 80105b4 /*Configure GPIO pins : LOCK_A_Pin LOCK_B_Pin */ GPIO_InitStruct.Pin = LOCK_A_Pin|LOCK_B_Pin; 800b862: 2330 movs r3, #48 @ 0x30 800b864: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b866: 2301 movs r3, #1 800b868: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b86a: 2300 movs r3, #0 800b86c: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b86e: 2302 movs r3, #2 800b870: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800b872: f107 0314 add.w r3, r7, #20 800b876: 4619 mov r1, r3 800b878: 4841 ldr r0, [pc, #260] @ (800b980 ) 800b87a: f004 fe9b bl 80105b4 /*Configure GPIO pins : IN0_Pin AC_OK_Pin ISO_IN_Pin */ GPIO_InitStruct.Pin = IN0_Pin|AC_OK_Pin|ISO_IN_Pin; 800b87e: f244 0382 movw r3, #16514 @ 0x4082 800b882: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b884: 2300 movs r3, #0 800b886: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b888: 2300 movs r3, #0 800b88a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800b88c: f107 0314 add.w r3, r7, #20 800b890: 4619 mov r1, r3 800b892: 483c ldr r0, [pc, #240] @ (800b984 ) 800b894: f004 fe8e bl 80105b4 /*Configure GPIO pins : RELAY1_Pin RELAY2_Pin RELAY3_Pin RELAY4_Pin RELAY5_Pin */ GPIO_InitStruct.Pin = RELAY1_Pin|RELAY2_Pin|RELAY3_Pin|RELAY4_Pin 800b898: f44f 53f8 mov.w r3, #7936 @ 0x1f00 800b89c: 617b str r3, [r7, #20] |RELAY5_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b89e: 2301 movs r3, #1 800b8a0: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b8a2: 2300 movs r3, #0 800b8a4: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b8a6: 2302 movs r3, #2 800b8a8: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800b8aa: f107 0314 add.w r3, r7, #20 800b8ae: 4619 mov r1, r3 800b8b0: 4834 ldr r0, [pc, #208] @ (800b984 ) 800b8b2: f004 fe7f bl 80105b4 /*Configure GPIO pin : RELAY_CC_Pin */ GPIO_InitStruct.Pin = RELAY_CC_Pin; 800b8b6: f44f 4300 mov.w r3, #32768 @ 0x8000 800b8ba: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b8bc: 2301 movs r3, #1 800b8be: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b8c0: 2300 movs r3, #0 800b8c2: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b8c4: 2302 movs r3, #2 800b8c6: 623b str r3, [r7, #32] HAL_GPIO_Init(RELAY_CC_GPIO_Port, &GPIO_InitStruct); 800b8c8: f107 0314 add.w r3, r7, #20 800b8cc: 4619 mov r1, r3 800b8ce: 482e ldr r0, [pc, #184] @ (800b988 ) 800b8d0: f004 fe70 bl 80105b4 /*Configure GPIO pins : RELAY_DC_Pin USART2_DIR_Pin */ GPIO_InitStruct.Pin = RELAY_DC_Pin|USART2_DIR_Pin; 800b8d4: 2318 movs r3, #24 800b8d6: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b8d8: 2301 movs r3, #1 800b8da: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b8dc: 2300 movs r3, #0 800b8de: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b8e0: 2302 movs r3, #2 800b8e2: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800b8e4: f107 0314 add.w r3, r7, #20 800b8e8: 4619 mov r1, r3 800b8ea: 4828 ldr r0, [pc, #160] @ (800b98c ) 800b8ec: f004 fe62 bl 80105b4 /*Configure GPIO pin : IN_ESTOP_Pin */ GPIO_InitStruct.Pin = IN_ESTOP_Pin; 800b8f0: 2380 movs r3, #128 @ 0x80 800b8f2: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b8f4: 2300 movs r3, #0 800b8f6: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b8f8: 2300 movs r3, #0 800b8fa: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_ESTOP_GPIO_Port, &GPIO_InitStruct); 800b8fc: f107 0314 add.w r3, r7, #20 800b900: 4619 mov r1, r3 800b902: 4822 ldr r0, [pc, #136] @ (800b98c ) 800b904: f004 fe56 bl 80105b4 /*Configure GPIO pins : IN_FB2_Pin IN_FB1_Pin */ GPIO_InitStruct.Pin = IN_FB2_Pin|IN_FB1_Pin; 800b908: 2318 movs r3, #24 800b90a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b90c: 2300 movs r3, #0 800b90e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b910: 2300 movs r3, #0 800b912: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800b914: f107 0314 add.w r3, r7, #20 800b918: 4619 mov r1, r3 800b91a: 481d ldr r0, [pc, #116] @ (800b990 ) 800b91c: f004 fe4a bl 80105b4 /*Configure GPIO pin : EE_WP_Pin */ GPIO_InitStruct.Pin = EE_WP_Pin; 800b920: 2380 movs r3, #128 @ 0x80 800b922: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b924: 2301 movs r3, #1 800b926: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b928: 2300 movs r3, #0 800b92a: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b92c: 2302 movs r3, #2 800b92e: 623b str r3, [r7, #32] HAL_GPIO_Init(EE_WP_GPIO_Port, &GPIO_InitStruct); 800b930: f107 0314 add.w r3, r7, #20 800b934: 4619 mov r1, r3 800b936: 4816 ldr r0, [pc, #88] @ (800b990 ) 800b938: f004 fe3c bl 80105b4 /*Configure GPIO pins : PB8 PB9 */ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; 800b93c: f44f 7340 mov.w r3, #768 @ 0x300 800b940: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 800b942: 2312 movs r3, #18 800b944: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800b946: 2303 movs r3, #3 800b948: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800b94a: f107 0314 add.w r3, r7, #20 800b94e: 4619 mov r1, r3 800b950: 480f ldr r0, [pc, #60] @ (800b990 ) 800b952: f004 fe2f bl 80105b4 /*Configure peripheral I/O remapping */ __HAL_AFIO_REMAP_I2C1_ENABLE(); 800b956: 4b0f ldr r3, [pc, #60] @ (800b994 ) 800b958: 685b ldr r3, [r3, #4] 800b95a: 627b str r3, [r7, #36] @ 0x24 800b95c: 6a7b ldr r3, [r7, #36] @ 0x24 800b95e: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800b962: 627b str r3, [r7, #36] @ 0x24 800b964: 6a7b ldr r3, [r7, #36] @ 0x24 800b966: f043 0302 orr.w r3, r3, #2 800b96a: 627b str r3, [r7, #36] @ 0x24 800b96c: 4a09 ldr r2, [pc, #36] @ (800b994 ) 800b96e: 6a7b ldr r3, [r7, #36] @ 0x24 800b970: 6053 str r3, [r2, #4] } 800b972: bf00 nop 800b974: 3728 adds r7, #40 @ 0x28 800b976: 46bd mov sp, r7 800b978: bd80 pop {r7, pc} 800b97a: bf00 nop 800b97c: 40021000 .word 0x40021000 800b980: 40011000 .word 0x40011000 800b984: 40011800 .word 0x40011800 800b988: 40010800 .word 0x40010800 800b98c: 40011400 .word 0x40011400 800b990: 40010c00 .word 0x40010c00 800b994: 40010000 .word 0x40010000 0800b998 : extern GBT_BCL_t GBT_CurrPower; j_receive_t j_rx; void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) { 800b998: b590 push {r4, r7, lr} 800b99a: b0cd sub sp, #308 @ 0x134 800b99c: af40 add r7, sp, #256 @ 0x100 800b99e: 6078 str r0, [r7, #4] CAN_RxHeaderTypeDef RxHeader; uint8_t RxData[8] = {0,}; 800b9a0: f107 030c add.w r3, r7, #12 800b9a4: 2200 movs r2, #0 800b9a6: 601a str r2, [r3, #0] 800b9a8: 605a str r2, [r3, #4] if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &RxHeader, RxData) == HAL_OK) 800b9aa: f107 030c add.w r3, r7, #12 800b9ae: f107 0214 add.w r2, r7, #20 800b9b2: 2100 movs r1, #0 800b9b4: 6878 ldr r0, [r7, #4] 800b9b6: f004 f831 bl 800fa1c 800b9ba: 4603 mov r3, r0 800b9bc: 2b00 cmp r3, #0 800b9be: f040 8153 bne.w 800bc68 { if((RxHeader.ExtId & 0x00FFFF) == ((J_ID_SE << 8) | J_ID_EV)){ // SA, DA match 800b9c2: 69bb ldr r3, [r7, #24] 800b9c4: b29b uxth r3, r3 800b9c6: f245 62f4 movw r2, #22260 @ 0x56f4 800b9ca: 4293 cmp r3, r2 800b9cc: f040 814c bne.w 800bc68 switch ((RxHeader.ExtId>>8) & 0x00FF00){ 800b9d0: 69bb ldr r3, [r7, #24] 800b9d2: 0a1b lsrs r3, r3, #8 800b9d4: f403 437f and.w r3, r3, #65280 @ 0xff00 800b9d8: f5b3 4f6c cmp.w r3, #60416 @ 0xec00 800b9dc: d013 beq.n 800ba06 800b9de: f5b3 4f6c cmp.w r3, #60416 @ 0xec00 800b9e2: f200 810c bhi.w 800bbfe 800b9e6: f5b3 4f6b cmp.w r3, #60160 @ 0xeb00 800b9ea: d057 beq.n 800ba9c 800b9ec: f5b3 4f6b cmp.w r3, #60160 @ 0xeb00 800b9f0: f200 8105 bhi.w 800bbfe 800b9f4: f5b3 5fc8 cmp.w r3, #6400 @ 0x1900 800b9f8: f000 80dd beq.w 800bbb6 800b9fc: f5b3 5ff0 cmp.w r3, #7680 @ 0x1e00 800ba00: f000 80b6 beq.w 800bb70 800ba04: e0fb b.n 800bbfe case 0xEC00: //PGN Connection Management Message if(RxData[0] == 16){ //Request to Send 800ba06: 7b3b ldrb r3, [r7, #12] 800ba08: 2b10 cmp r3, #16 800ba0a: d13e bne.n 800ba8a /* Set the RTS values */ j_rx.size = RxData[1] | (RxData[2]<<8); 800ba0c: 7b7b ldrb r3, [r7, #13] 800ba0e: b21a sxth r2, r3 800ba10: 7bbb ldrb r3, [r7, #14] 800ba12: b21b sxth r3, r3 800ba14: 021b lsls r3, r3, #8 800ba16: b21b sxth r3, r3 800ba18: 4313 orrs r3, r2 800ba1a: b21b sxth r3, r3 800ba1c: b29a uxth r2, r3 800ba1e: 4b94 ldr r3, [pc, #592] @ (800bc70 ) 800ba20: f8a3 2104 strh.w r2, [r3, #260] @ 0x104 j_rx.packet = 1; 800ba24: 4b92 ldr r3, [pc, #584] @ (800bc70 ) 800ba26: 2201 movs r2, #1 800ba28: f883 2107 strb.w r2, [r3, #263] @ 0x107 j_rx.packets = RxData[3]; 800ba2c: 7bfa ldrb r2, [r7, #15] 800ba2e: 4b90 ldr r3, [pc, #576] @ (800bc70 ) 800ba30: f883 2106 strb.w r2, [r3, #262] @ 0x106 j_rx.step = 2; //TODO 800ba34: 4b8e ldr r3, [pc, #568] @ (800bc70 ) 800ba36: 2202 movs r2, #2 800ba38: f883 2108 strb.w r2, [r3, #264] @ 0x108 j_rx.step_cts_remain = j_rx.step; 800ba3c: 4b8c ldr r3, [pc, #560] @ (800bc70 ) 800ba3e: f893 2108 ldrb.w r2, [r3, #264] @ 0x108 800ba42: 4b8b ldr r3, [pc, #556] @ (800bc70 ) 800ba44: f883 2109 strb.w r2, [r3, #265] @ 0x109 j_rx.PGN = (RxData[7] << 16) | (RxData[6] << 8) | RxData[5]; 800ba48: 7cfb ldrb r3, [r7, #19] 800ba4a: 041a lsls r2, r3, #16 800ba4c: 7cbb ldrb r3, [r7, #18] 800ba4e: 021b lsls r3, r3, #8 800ba50: 4313 orrs r3, r2 800ba52: 7c7a ldrb r2, [r7, #17] 800ba54: 4313 orrs r3, r2 800ba56: 461a mov r2, r3 800ba58: 4b85 ldr r3, [pc, #532] @ (800bc70 ) 800ba5a: f8c3 2100 str.w r2, [r3, #256] @ 0x100 if(j_rx.size<256) { //TODO: valid check 800ba5e: 4b84 ldr r3, [pc, #528] @ (800bc70 ) 800ba60: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800ba64: 2bff cmp r3, #255 @ 0xff 800ba66: d810 bhi.n 800ba8a J_SendCTS(j_rx); 800ba68: 4c81 ldr r4, [pc, #516] @ (800bc70 ) 800ba6a: 4668 mov r0, sp 800ba6c: f104 0310 add.w r3, r4, #16 800ba70: f44f 7280 mov.w r2, #256 @ 0x100 800ba74: 4619 mov r1, r3 800ba76: f008 fc9f bl 80143b8 800ba7a: e894 000f ldmia.w r4, {r0, r1, r2, r3} 800ba7e: f000 f941 bl 800bd04 j_rx.state = 1; 800ba82: 4b7b ldr r3, [pc, #492] @ (800bc70 ) 800ba84: 2201 movs r2, #1 800ba86: f883 210a strb.w r2, [r3, #266] @ 0x10a } } if(RxData[0] == 255){ //Connection Abort 800ba8a: 7b3b ldrb r3, [r7, #12] 800ba8c: 2bff cmp r3, #255 @ 0xff 800ba8e: f040 80e6 bne.w 800bc5e j_rx.state = 0; 800ba92: 4b77 ldr r3, [pc, #476] @ (800bc70 ) 800ba94: 2200 movs r2, #0 800ba96: f883 210a strb.w r2, [r3, #266] @ 0x10a * 1CECF456 11 02 01 FF FF 00 02 00 * 1CEB56F4 01 01 01 00 03 46 05 40 * 1CEC56F4 FF FF FF FF FF 00 00 00 */ break; 800ba9a: e0e0 b.n 800bc5e case 0xEB00: //PGN Data Message if(j_rx.state != 1) break; 800ba9c: 4b74 ldr r3, [pc, #464] @ (800bc70 ) 800ba9e: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800baa2: 2b01 cmp r3, #1 800baa4: f040 80dd bne.w 800bc62 if((RxData[0]>0) && (RxData[0]<35)){ //Array limit check 800baa8: 7b3b ldrb r3, [r7, #12] 800baaa: 2b00 cmp r3, #0 800baac: f000 80db beq.w 800bc66 800bab0: 7b3b ldrb r3, [r7, #12] 800bab2: 2b22 cmp r3, #34 @ 0x22 800bab4: f200 80d7 bhi.w 800bc66 if(j_rx.packet == RxData[0]){ //step check 800bab8: 4b6d ldr r3, [pc, #436] @ (800bc70 ) 800baba: f893 2107 ldrb.w r2, [r3, #263] @ 0x107 800babe: 7b3b ldrb r3, [r7, #12] 800bac0: 429a cmp r2, r3 800bac2: f040 80d0 bne.w 800bc66 memcpy (&j_rx.data[(RxData[0]-1)*7], &RxData[1],7); 800bac6: 7b3b ldrb r3, [r7, #12] 800bac8: 1e5a subs r2, r3, #1 800baca: 4613 mov r3, r2 800bacc: 00db lsls r3, r3, #3 800bace: 1a9b subs r3, r3, r2 800bad0: 4a67 ldr r2, [pc, #412] @ (800bc70 ) 800bad2: 1898 adds r0, r3, r2 800bad4: f107 030c add.w r3, r7, #12 800bad8: 3301 adds r3, #1 800bada: 2207 movs r2, #7 800badc: 4619 mov r1, r3 800bade: f008 fc6b bl 80143b8 j_rx.packet++; 800bae2: 4b63 ldr r3, [pc, #396] @ (800bc70 ) 800bae4: f893 3107 ldrb.w r3, [r3, #263] @ 0x107 800bae8: 3301 adds r3, #1 800baea: b2da uxtb r2, r3 800baec: 4b60 ldr r3, [pc, #384] @ (800bc70 ) 800baee: f883 2107 strb.w r2, [r3, #263] @ 0x107 if(j_rx.packet > j_rx.packets){ 800baf2: 4b5f ldr r3, [pc, #380] @ (800bc70 ) 800baf4: f893 2107 ldrb.w r2, [r3, #263] @ 0x107 800baf8: 4b5d ldr r3, [pc, #372] @ (800bc70 ) 800bafa: f893 3106 ldrb.w r3, [r3, #262] @ 0x106 800bafe: 429a cmp r2, r3 800bb00: d911 bls.n 800bb26 //End of transmission J_SendACK(j_rx); 800bb02: 4c5b ldr r4, [pc, #364] @ (800bc70 ) 800bb04: 4668 mov r0, sp 800bb06: f104 0310 add.w r3, r4, #16 800bb0a: f44f 7280 mov.w r2, #256 @ 0x100 800bb0e: 4619 mov r1, r3 800bb10: f008 fc52 bl 80143b8 800bb14: e894 000f ldmia.w r4, {r0, r1, r2, r3} 800bb18: f000 f93a bl 800bd90 j_rx.state = 2; 800bb1c: 4b54 ldr r3, [pc, #336] @ (800bc70 ) 800bb1e: 2202 movs r2, #2 800bb20: f883 210a strb.w r2, [r3, #266] @ 0x10a j_rx.step_cts_remain = 2; } } } } break; 800bb24: e09f b.n 800bc66 if(j_rx.step_cts_remain > 0) j_rx.step_cts_remain--; 800bb26: 4b52 ldr r3, [pc, #328] @ (800bc70 ) 800bb28: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 800bb2c: 2b00 cmp r3, #0 800bb2e: d007 beq.n 800bb40 800bb30: 4b4f ldr r3, [pc, #316] @ (800bc70 ) 800bb32: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 800bb36: 3b01 subs r3, #1 800bb38: b2da uxtb r2, r3 800bb3a: 4b4d ldr r3, [pc, #308] @ (800bc70 ) 800bb3c: f883 2109 strb.w r2, [r3, #265] @ 0x109 if(j_rx.step_cts_remain == 0){ 800bb40: 4b4b ldr r3, [pc, #300] @ (800bc70 ) 800bb42: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 800bb46: 2b00 cmp r3, #0 800bb48: f040 808d bne.w 800bc66 J_SendCTS(j_rx); 800bb4c: 4c48 ldr r4, [pc, #288] @ (800bc70 ) 800bb4e: 4668 mov r0, sp 800bb50: f104 0310 add.w r3, r4, #16 800bb54: f44f 7280 mov.w r2, #256 @ 0x100 800bb58: 4619 mov r1, r3 800bb5a: f008 fc2d bl 80143b8 800bb5e: e894 000f ldmia.w r4, {r0, r1, r2, r3} 800bb62: f000 f8cf bl 800bd04 j_rx.step_cts_remain = 2; 800bb66: 4b42 ldr r3, [pc, #264] @ (800bc70 ) 800bb68: 2202 movs r2, #2 800bb6a: f883 2109 strb.w r2, [r3, #265] @ 0x109 break; 800bb6e: e07a b.n 800bc66 case 0x1E00: //PGN BEM (ERROR) //Error force stop // --> Suspend EV log_printf(LOG_ERR, "BEM Received, force stopping...\n"); 800bb70: 4940 ldr r1, [pc, #256] @ (800bc74 ) 800bb72: 2004 movs r0, #4 800bb74: f7ff fcf6 bl 800b564 log_printf(LOG_ERR, "BEM: %02X %02X %02X %02X", RxData[0], RxData[1], RxData[2], RxData[3]); 800bb78: 7b3b ldrb r3, [r7, #12] 800bb7a: 4619 mov r1, r3 800bb7c: 7b7b ldrb r3, [r7, #13] 800bb7e: 4618 mov r0, r3 800bb80: 7bbb ldrb r3, [r7, #14] 800bb82: 7bfa ldrb r2, [r7, #15] 800bb84: 9201 str r2, [sp, #4] 800bb86: 9300 str r3, [sp, #0] 800bb88: 4603 mov r3, r0 800bb8a: 460a mov r2, r1 800bb8c: 493a ldr r1, [pc, #232] @ (800bc78 ) 800bb8e: 2004 movs r0, #4 800bb90: f7ff fce8 bl 800b564 log_printf(LOG_ERR, " %02X %02X %02X %02X\n", RxData[4], RxData[5], RxData[6], RxData[7]); 800bb94: 7c3b ldrb r3, [r7, #16] 800bb96: 4619 mov r1, r3 800bb98: 7c7b ldrb r3, [r7, #17] 800bb9a: 4618 mov r0, r3 800bb9c: 7cbb ldrb r3, [r7, #18] 800bb9e: 7cfa ldrb r2, [r7, #19] 800bba0: 9201 str r2, [sp, #4] 800bba2: 9300 str r3, [sp, #0] 800bba4: 4603 mov r3, r0 800bba6: 460a mov r2, r1 800bba8: 4934 ldr r1, [pc, #208] @ (800bc7c ) 800bbaa: 2004 movs r0, #4 800bbac: f7ff fcda bl 800b564 GBT_ForceStop(); 800bbb0: f7ff f846 bl 800ac40 break; 800bbb4: e058 b.n 800bc68 case 0x1900: //PGN BST (STOP) //Normal stop // --> Suspend EV log_printf(LOG_INFO, "BST Received, stopping...\n"); 800bbb6: 4932 ldr r1, [pc, #200] @ (800bc80 ) 800bbb8: 2007 movs r0, #7 800bbba: f7ff fcd3 bl 800b564 log_printf(LOG_INFO, "BST: %02X %02X %02X %02X", RxData[0], RxData[1], RxData[2], RxData[3]); 800bbbe: 7b3b ldrb r3, [r7, #12] 800bbc0: 4619 mov r1, r3 800bbc2: 7b7b ldrb r3, [r7, #13] 800bbc4: 4618 mov r0, r3 800bbc6: 7bbb ldrb r3, [r7, #14] 800bbc8: 7bfa ldrb r2, [r7, #15] 800bbca: 9201 str r2, [sp, #4] 800bbcc: 9300 str r3, [sp, #0] 800bbce: 4603 mov r3, r0 800bbd0: 460a mov r2, r1 800bbd2: 492c ldr r1, [pc, #176] @ (800bc84 ) 800bbd4: 2007 movs r0, #7 800bbd6: f7ff fcc5 bl 800b564 log_printf(LOG_INFO, " %02X %02X %02X %02X\n", RxData[4], RxData[5], RxData[6], RxData[7]); 800bbda: 7c3b ldrb r3, [r7, #16] 800bbdc: 4619 mov r1, r3 800bbde: 7c7b ldrb r3, [r7, #17] 800bbe0: 4618 mov r0, r3 800bbe2: 7cbb ldrb r3, [r7, #18] 800bbe4: 7cfa ldrb r2, [r7, #19] 800bbe6: 9201 str r2, [sp, #4] 800bbe8: 9300 str r3, [sp, #0] 800bbea: 4603 mov r3, r0 800bbec: 460a mov r2, r1 800bbee: 4923 ldr r1, [pc, #140] @ (800bc7c ) 800bbf0: 2007 movs r0, #7 800bbf2: f7ff fcb7 bl 800b564 GBT_StopEV(GBT_CST_BMS_ACTIVELY_SUSPENDS); 800bbf6: 4824 ldr r0, [pc, #144] @ (800bc88 ) 800bbf8: f7fe ffc4 bl 800ab84 break; 800bbfc: e034 b.n 800bc68 default: if(j_rx.state == 0){//TODO protections 800bbfe: 4b1c ldr r3, [pc, #112] @ (800bc70 ) 800bc00: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800bc04: 2b00 cmp r3, #0 800bc06: d12f bne.n 800bc68 //Short packet j_rx.size = RxHeader.DLC; 800bc08: 6a7b ldr r3, [r7, #36] @ 0x24 800bc0a: b29a uxth r2, r3 800bc0c: 4b18 ldr r3, [pc, #96] @ (800bc70 ) 800bc0e: f8a3 2104 strh.w r2, [r3, #260] @ 0x104 j_rx.packet = 1; 800bc12: 4b17 ldr r3, [pc, #92] @ (800bc70 ) 800bc14: 2201 movs r2, #1 800bc16: f883 2107 strb.w r2, [r3, #263] @ 0x107 j_rx.packets = 1; 800bc1a: 4b15 ldr r3, [pc, #84] @ (800bc70 ) 800bc1c: 2201 movs r2, #1 800bc1e: f883 2106 strb.w r2, [r3, #262] @ 0x106 j_rx.step = 1; 800bc22: 4b13 ldr r3, [pc, #76] @ (800bc70 ) 800bc24: 2201 movs r2, #1 800bc26: f883 2108 strb.w r2, [r3, #264] @ 0x108 j_rx.step_cts_remain = 0; 800bc2a: 4b11 ldr r3, [pc, #68] @ (800bc70 ) 800bc2c: 2200 movs r2, #0 800bc2e: f883 2109 strb.w r2, [r3, #265] @ 0x109 j_rx.PGN = (RxHeader.ExtId>>8) & 0x00FF00; 800bc32: 69bb ldr r3, [r7, #24] 800bc34: 0a1b lsrs r3, r3, #8 800bc36: f403 437f and.w r3, r3, #65280 @ 0xff00 800bc3a: 4a0d ldr r2, [pc, #52] @ (800bc70 ) 800bc3c: f8c2 3100 str.w r3, [r2, #256] @ 0x100 j_rx.state = 2; 800bc40: 4b0b ldr r3, [pc, #44] @ (800bc70 ) 800bc42: 2202 movs r2, #2 800bc44: f883 210a strb.w r2, [r3, #266] @ 0x10a memcpy (j_rx.data, RxData, j_rx.size); 800bc48: 4b09 ldr r3, [pc, #36] @ (800bc70 ) 800bc4a: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800bc4e: 461a mov r2, r3 800bc50: f107 030c add.w r3, r7, #12 800bc54: 4619 mov r1, r3 800bc56: 4806 ldr r0, [pc, #24] @ (800bc70 ) 800bc58: f008 fbae bl 80143b8 } } } } } 800bc5c: e004 b.n 800bc68 break; 800bc5e: bf00 nop 800bc60: e002 b.n 800bc68 if(j_rx.state != 1) break; 800bc62: bf00 nop 800bc64: e000 b.n 800bc68 break; 800bc66: bf00 nop } 800bc68: bf00 nop 800bc6a: 3734 adds r7, #52 @ 0x34 800bc6c: 46bd mov sp, r7 800bc6e: bd90 pop {r4, r7, pc} 800bc70: 20000874 .word 0x20000874 800bc74: 08016b90 .word 0x08016b90 800bc78: 08016bb4 .word 0x08016bb4 800bc7c: 08016bd0 .word 0x08016bd0 800bc80: 08016be8 .word 0x08016be8 800bc84: 08016c04 .word 0x08016c04 800bc88: 4000f0f0 .word 0x4000f0f0 0800bc8c : void GBT_CAN_ReInit(){ 800bc8c: b580 push {r7, lr} 800bc8e: af00 add r7, sp, #0 HAL_CAN_Stop(&hcan1); 800bc90: 4807 ldr r0, [pc, #28] @ (800bcb0 ) 800bc92: f003 fd77 bl 800f784 MX_CAN1_Init(); 800bc96: f7fd fee3 bl 8009a60 GBT_CAN_FilterInit(); 800bc9a: f000 f8b3 bl 800be04 HAL_CAN_Start(&hcan1); 800bc9e: 4804 ldr r0, [pc, #16] @ (800bcb0 ) 800bca0: f003 fd2c bl 800f6fc HAL_CAN_ActivateNotification(&hcan1, CAN_IT_RX_FIFO0_MSG_PENDING); 800bca4: 2102 movs r1, #2 800bca6: 4802 ldr r0, [pc, #8] @ (800bcb0 ) 800bca8: f003 ffd9 bl 800fc5e } 800bcac: bf00 nop 800bcae: bd80 pop {r7, pc} 800bcb0: 200002a4 .word 0x200002a4 0800bcb4 : void J_SendPacket(uint32_t PGN, uint8_t pri, uint8_t DLC, uint8_t *data){ 800bcb4: b580 push {r7, lr} 800bcb6: b08c sub sp, #48 @ 0x30 800bcb8: af00 add r7, sp, #0 800bcba: 60f8 str r0, [r7, #12] 800bcbc: 607b str r3, [r7, #4] 800bcbe: 460b mov r3, r1 800bcc0: 72fb strb r3, [r7, #11] 800bcc2: 4613 mov r3, r2 800bcc4: 72bb strb r3, [r7, #10] CAN_TxHeaderTypeDef tx_header; uint32_t tx_mailbox; tx_header.ExtId = (pri << 26) | (PGN << 8) | (J_ID_EV << 8) | J_ID_SE; 800bcc6: 7afb ldrb r3, [r7, #11] 800bcc8: 069a lsls r2, r3, #26 800bcca: 68fb ldr r3, [r7, #12] 800bccc: 021b lsls r3, r3, #8 800bcce: 4313 orrs r3, r2 800bcd0: f443 4374 orr.w r3, r3, #62464 @ 0xf400 800bcd4: f043 0356 orr.w r3, r3, #86 @ 0x56 800bcd8: 61fb str r3, [r7, #28] tx_header.RTR = CAN_RTR_DATA; 800bcda: 2300 movs r3, #0 800bcdc: 627b str r3, [r7, #36] @ 0x24 tx_header.IDE = CAN_ID_EXT; 800bcde: 2304 movs r3, #4 800bce0: 623b str r3, [r7, #32] tx_header.DLC = DLC; 800bce2: 7abb ldrb r3, [r7, #10] 800bce4: 62bb str r3, [r7, #40] @ 0x28 //TODO buffer wait HAL_CAN_AddTxMessage(&hcan1, &tx_header, data, &tx_mailbox); 800bce6: f107 0314 add.w r3, r7, #20 800bcea: f107 0118 add.w r1, r7, #24 800bcee: 687a ldr r2, [r7, #4] 800bcf0: 4803 ldr r0, [pc, #12] @ (800bd00 ) 800bcf2: f003 fd90 bl 800f816 //HAL_Delay(2); } 800bcf6: bf00 nop 800bcf8: 3730 adds r7, #48 @ 0x30 800bcfa: 46bd mov sp, r7 800bcfc: bd80 pop {r7, pc} 800bcfe: bf00 nop 800bd00: 200002a4 .word 0x200002a4 0800bd04 : //void J_SendPacketLong(){ // //TODO (no need) //} // J1939 sequence Clear To Send packet void J_SendCTS(j_receive_t rx){ 800bd04: b084 sub sp, #16 800bd06: b580 push {r7, lr} 800bd08: b082 sub sp, #8 800bd0a: af00 add r7, sp, #0 800bd0c: f107 0c10 add.w ip, r7, #16 800bd10: e88c 000f stmia.w ip, {r0, r1, r2, r3} //if(rx.packets <= rx.packet) return; TODO uint8_t data[8]; data[0] = 17; //CONTROL_BYTE_TP_CM_CTS 800bd14: 2311 movs r3, #17 800bd16: 703b strb r3, [r7, #0] data[1] = rx.step;//total_number_of_packages_transmitted 800bd18: f897 3118 ldrb.w r3, [r7, #280] @ 0x118 800bd1c: 707b strb r3, [r7, #1] if (rx.step > (rx.packets - rx.packet+1)) data[1] = rx.packets - rx.packet+1; 800bd1e: f897 3118 ldrb.w r3, [r7, #280] @ 0x118 800bd22: 461a mov r2, r3 800bd24: f897 3116 ldrb.w r3, [r7, #278] @ 0x116 800bd28: 4619 mov r1, r3 800bd2a: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 800bd2e: 1acb subs r3, r1, r3 800bd30: 3301 adds r3, #1 800bd32: 429a cmp r2, r3 800bd34: dd08 ble.n 800bd48 800bd36: f897 2116 ldrb.w r2, [r7, #278] @ 0x116 800bd3a: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 800bd3e: 1ad3 subs r3, r2, r3 800bd40: b2db uxtb r3, r3 800bd42: 3301 adds r3, #1 800bd44: b2db uxtb r3, r3 800bd46: 707b strb r3, [r7, #1] data[2] = rx.packet;//next_packet_number_transmitted 800bd48: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 800bd4c: 70bb strb r3, [r7, #2] data[3] = 0xFF; /* Reserved */ 800bd4e: 23ff movs r3, #255 @ 0xff 800bd50: 70fb strb r3, [r7, #3] data[4] = 0xFF; 800bd52: 23ff movs r3, #255 @ 0xff 800bd54: 713b strb r3, [r7, #4] data[5] = rx.PGN; 800bd56: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bd5a: b2db uxtb r3, r3 800bd5c: 717b strb r3, [r7, #5] data[6] = rx.PGN >> 8; 800bd5e: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bd62: 0a1b lsrs r3, r3, #8 800bd64: b2db uxtb r3, r3 800bd66: 71bb strb r3, [r7, #6] data[7] = rx.PGN >> 16; 800bd68: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bd6c: 0c1b lsrs r3, r3, #16 800bd6e: b2db uxtb r3, r3 800bd70: 71fb strb r3, [r7, #7] J_SendPacket(0x00EC00, 7, 8, data); 800bd72: 463b mov r3, r7 800bd74: 2208 movs r2, #8 800bd76: 2107 movs r1, #7 800bd78: f44f 406c mov.w r0, #60416 @ 0xec00 800bd7c: f7ff ff9a bl 800bcb4 } 800bd80: bf00 nop 800bd82: 3708 adds r7, #8 800bd84: 46bd mov sp, r7 800bd86: e8bd 4080 ldmia.w sp!, {r7, lr} 800bd8a: b004 add sp, #16 800bd8c: 4770 bx lr ... 0800bd90 : // J1939 sequence ACK packet void J_SendACK(j_receive_t rx){//uint32_t PGN, uint8_t step, uint8_t packet){ 800bd90: b084 sub sp, #16 800bd92: b580 push {r7, lr} 800bd94: b082 sub sp, #8 800bd96: af00 add r7, sp, #0 800bd98: f107 0c10 add.w ip, r7, #16 800bd9c: e88c 000f stmia.w ip, {r0, r1, r2, r3} uint8_t data[8]; data[0] = 19; //CONTROL_BYTE_TP_CM_ACK 800bda0: 2313 movs r3, #19 800bda2: 703b strb r3, [r7, #0] data[1] = j_rx.size; 800bda4: 4b16 ldr r3, [pc, #88] @ (800be00 ) 800bda6: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800bdaa: b2db uxtb r3, r3 800bdac: 707b strb r3, [r7, #1] data[2] = j_rx.size>>8; 800bdae: 4b14 ldr r3, [pc, #80] @ (800be00 ) 800bdb0: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800bdb4: 0a1b lsrs r3, r3, #8 800bdb6: b29b uxth r3, r3 800bdb8: b2db uxtb r3, r3 800bdba: 70bb strb r3, [r7, #2] data[3] = j_rx.packets; 800bdbc: 4b10 ldr r3, [pc, #64] @ (800be00 ) 800bdbe: f893 3106 ldrb.w r3, [r3, #262] @ 0x106 800bdc2: 70fb strb r3, [r7, #3] data[4] = 0xFF;//TODO 800bdc4: 23ff movs r3, #255 @ 0xff 800bdc6: 713b strb r3, [r7, #4] data[5] = rx.PGN; 800bdc8: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bdcc: b2db uxtb r3, r3 800bdce: 717b strb r3, [r7, #5] data[6] = rx.PGN >> 8; 800bdd0: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bdd4: 0a1b lsrs r3, r3, #8 800bdd6: b2db uxtb r3, r3 800bdd8: 71bb strb r3, [r7, #6] data[7] = rx.PGN >> 16; 800bdda: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bdde: 0c1b lsrs r3, r3, #16 800bde0: b2db uxtb r3, r3 800bde2: 71fb strb r3, [r7, #7] J_SendPacket(0x00EC00, 7, 8, data); 800bde4: 463b mov r3, r7 800bde6: 2208 movs r2, #8 800bde8: 2107 movs r1, #7 800bdea: f44f 406c mov.w r0, #60416 @ 0xec00 800bdee: f7ff ff61 bl 800bcb4 } 800bdf2: bf00 nop 800bdf4: 3708 adds r7, #8 800bdf6: 46bd mov sp, r7 800bdf8: e8bd 4080 ldmia.w sp!, {r7, lr} 800bdfc: b004 add sp, #16 800bdfe: 4770 bx lr 800be00: 20000874 .word 0x20000874 0800be04 : void GBT_CAN_FilterInit(){ 800be04: b580 push {r7, lr} 800be06: b08a sub sp, #40 @ 0x28 800be08: af00 add r7, sp, #0 CAN_FilterTypeDef sFilterConfig; sFilterConfig.FilterBank = 0; 800be0a: 2300 movs r3, #0 800be0c: 617b str r3, [r7, #20] sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; 800be0e: 2300 movs r3, #0 800be10: 61bb str r3, [r7, #24] sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; 800be12: 2301 movs r3, #1 800be14: 61fb str r3, [r7, #28] sFilterConfig.FilterIdHigh = 0x0000; 800be16: 2300 movs r3, #0 800be18: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = 0x0000; 800be1a: 2300 movs r3, #0 800be1c: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 800be1e: 2300 movs r3, #0 800be20: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = 0x0000; 800be22: 2300 movs r3, #0 800be24: 60fb str r3, [r7, #12] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0; 800be26: 2300 movs r3, #0 800be28: 613b str r3, [r7, #16] sFilterConfig.FilterActivation = ENABLE; 800be2a: 2301 movs r3, #1 800be2c: 623b str r3, [r7, #32] //sFilterConfig.SlaveStartFilterBank = 14; if(HAL_CAN_ConfigFilter(&hcan1, &sFilterConfig) != HAL_OK) 800be2e: 463b mov r3, r7 800be30: 4619 mov r1, r3 800be32: 4806 ldr r0, [pc, #24] @ (800be4c ) 800be34: f003 fb82 bl 800f53c 800be38: 4603 mov r3, r0 800be3a: 2b00 cmp r3, #0 800be3c: d001 beq.n 800be42 { Error_Handler(); 800be3e: f000 fad3 bl 800c3e8 } } 800be42: bf00 nop 800be44: 3728 adds r7, #40 @ 0x28 800be46: 46bd mov sp, r7 800be48: bd80 pop {r7, pc} 800be4a: bf00 nop 800be4c: 200002a4 .word 0x200002a4 0800be50 : .retry_count = 0, .error_tick = 0 }; void GBT_ForceLock(uint8_t state){ 800be50: b480 push {r7} 800be52: b083 sub sp, #12 800be54: af00 add r7, sp, #0 800be56: 4603 mov r3, r0 800be58: 71fb strb r3, [r7, #7] // Устанавливаем флаг для выполнения действия GBT_LockState.action_requested = state ? 1 : 0; 800be5a: 79fb ldrb r3, [r7, #7] 800be5c: 2b00 cmp r3, #0 800be5e: bf14 ite ne 800be60: 2301 movne r3, #1 800be62: 2300 moveq r3, #0 800be64: b2db uxtb r3, r3 800be66: 461a mov r2, r3 800be68: 4b04 ldr r3, [pc, #16] @ (800be7c ) 800be6a: 709a strb r2, [r3, #2] GBT_LockState.retry_count = 0; 800be6c: 4b03 ldr r3, [pc, #12] @ (800be7c ) 800be6e: 2200 movs r2, #0 800be70: 721a strb r2, [r3, #8] } 800be72: bf00 nop 800be74: 370c adds r7, #12 800be76: 46bd mov sp, r7 800be78: bc80 pop {r7} 800be7a: 4770 bx lr 800be7c: 20000008 .word 0x20000008 0800be80 : uint8_t GBT_LockGetState(){ 800be80: b580 push {r7, lr} 800be82: af00 add r7, sp, #0 //1 = locked //0 = unlocked if(LOCK_POLARITY){ 800be84: 4b0a ldr r3, [pc, #40] @ (800beb0 ) 800be86: 781b ldrb r3, [r3, #0] 800be88: 2b00 cmp r3, #0 800be8a: d005 beq.n 800be98 return HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 800be8c: 2180 movs r1, #128 @ 0x80 800be8e: 4809 ldr r0, [pc, #36] @ (800beb4 ) 800be90: f004 fd14 bl 80108bc 800be94: 4603 mov r3, r0 800be96: e009 b.n 800beac }else{ return !HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 800be98: 2180 movs r1, #128 @ 0x80 800be9a: 4806 ldr r0, [pc, #24] @ (800beb4 ) 800be9c: f004 fd0e bl 80108bc 800bea0: 4603 mov r3, r0 800bea2: 2b00 cmp r3, #0 800bea4: bf0c ite eq 800bea6: 2301 moveq r3, #1 800bea8: 2300 movne r3, #0 800beaa: b2db uxtb r3, r3 } } 800beac: 4618 mov r0, r3 800beae: bd80 pop {r7, pc} 800beb0: 20000004 .word 0x20000004 800beb4: 40011800 .word 0x40011800 0800beb8 : void GBT_Lock(uint8_t state){ 800beb8: b480 push {r7} 800beba: b083 sub sp, #12 800bebc: af00 add r7, sp, #0 800bebe: 4603 mov r3, r0 800bec0: 71fb strb r3, [r7, #7] GBT_LockState.demand = state; 800bec2: 4a04 ldr r2, [pc, #16] @ (800bed4 ) 800bec4: 79fb ldrb r3, [r7, #7] 800bec6: 7013 strb r3, [r2, #0] } 800bec8: bf00 nop 800beca: 370c adds r7, #12 800becc: 46bd mov sp, r7 800bece: bc80 pop {r7} 800bed0: 4770 bx lr 800bed2: bf00 nop 800bed4: 20000008 .word 0x20000008 0800bed8 : tick = HAL_GetTick(); HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, GBT_LockState.demand ? 1 : 0); } void GBT_ManageLockMotor(){ 800bed8: b580 push {r7, lr} 800beda: b082 sub sp, #8 800bedc: af00 add r7, sp, #0 static const uint8_t MAX_RETRIES = 5; uint32_t current_tick = HAL_GetTick(); 800bede: f002 fcfd bl 800e8dc 800bee2: 6078 str r0, [r7, #4] // Проверяем таймаут сброса ошибки (до проверки error, чтобы можно было сбросить) GBT_ResetErrorTimeout(); 800bee4: f000 f904 bl 800c0f0 if (GBT_LockState.error) { 800bee8: 4b72 ldr r3, [pc, #456] @ (800c0b4 ) 800beea: 785b ldrb r3, [r3, #1] 800beec: 2b00 cmp r3, #0 800beee: f040 80dd bne.w 800c0ac return; } // Проверяем, нужно ли выполнить действие bool lock_is_open = GBT_LockGetState() == 0; 800bef2: f7ff ffc5 bl 800be80 800bef6: 4603 mov r3, r0 800bef8: 2b00 cmp r3, #0 800befa: bf0c ite eq 800befc: 2301 moveq r3, #1 800befe: 2300 movne r3, #0 800bf00: 70fb strb r3, [r7, #3] bool lock_should_be_open = GBT_LockState.demand == 0; 800bf02: 4b6c ldr r3, [pc, #432] @ (800c0b4 ) 800bf04: 781b ldrb r3, [r3, #0] 800bf06: 2b00 cmp r3, #0 800bf08: bf0c ite eq 800bf0a: 2301 moveq r3, #1 800bf0c: 2300 movne r3, #0 800bf0e: 70bb strb r3, [r7, #2] // Если есть запрошенное действие или состояние не соответствует требуемому if (GBT_LockState.action_requested != 255 || (lock_is_open != lock_should_be_open)) { 800bf10: 4b68 ldr r3, [pc, #416] @ (800c0b4 ) 800bf12: 789b ldrb r3, [r3, #2] 800bf14: 2bff cmp r3, #255 @ 0xff 800bf16: d104 bne.n 800bf22 800bf18: 78fa ldrb r2, [r7, #3] 800bf1a: 78bb ldrb r3, [r7, #2] 800bf1c: 429a cmp r2, r3 800bf1e: f000 80ad beq.w 800c07c // Если действие еще не запрошено, запрашиваем его if (GBT_LockState.action_requested == 255) { 800bf22: 4b64 ldr r3, [pc, #400] @ (800c0b4 ) 800bf24: 789b ldrb r3, [r3, #2] 800bf26: 2bff cmp r3, #255 @ 0xff 800bf28: d109 bne.n 800bf3e GBT_LockState.action_requested = lock_should_be_open ? 0 : 1; 800bf2a: 78bb ldrb r3, [r7, #2] 800bf2c: f083 0301 eor.w r3, r3, #1 800bf30: b2db uxtb r3, r3 800bf32: 461a mov r2, r3 800bf34: 4b5f ldr r3, [pc, #380] @ (800c0b4 ) 800bf36: 709a strb r2, [r3, #2] GBT_LockState.retry_count = 0; 800bf38: 4b5e ldr r3, [pc, #376] @ (800c0b4 ) 800bf3a: 2200 movs r2, #0 800bf3c: 721a strb r2, [r3, #8] } // Управление мотором через машину состояний switch (GBT_LockState.motor_state) { 800bf3e: 4b5d ldr r3, [pc, #372] @ (800c0b4 ) 800bf40: 78db ldrb r3, [r3, #3] 800bf42: 2b02 cmp r3, #2 800bf44: d04a beq.n 800bfdc 800bf46: 2b02 cmp r3, #2 800bf48: f300 80b1 bgt.w 800c0ae 800bf4c: 2b00 cmp r3, #0 800bf4e: d002 beq.n 800bf56 800bf50: 2b01 cmp r3, #1 800bf52: d02a beq.n 800bfaa 800bf54: e0ab b.n 800c0ae case 0: // idle - мотор выключен // Определяем, какой пин нужно включить if (LOCK_MOTOR_POLARITY) { 800bf56: 4b58 ldr r3, [pc, #352] @ (800c0b8 ) 800bf58: 781b ldrb r3, [r3, #0] 800bf5a: 2b00 cmp r3, #0 800bf5c: d00f beq.n 800bf7e if (GBT_LockState.action_requested == 1) { // LOCK 800bf5e: 4b55 ldr r3, [pc, #340] @ (800c0b4 ) 800bf60: 789b ldrb r3, [r3, #2] 800bf62: 2b01 cmp r3, #1 800bf64: d105 bne.n 800bf72 HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1); 800bf66: 2201 movs r2, #1 800bf68: 2120 movs r1, #32 800bf6a: 4854 ldr r0, [pc, #336] @ (800c0bc ) 800bf6c: f004 fcbd bl 80108ea 800bf70: e014 b.n 800bf9c } else { // UNLOCK HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1); 800bf72: 2201 movs r2, #1 800bf74: 2110 movs r1, #16 800bf76: 4851 ldr r0, [pc, #324] @ (800c0bc ) 800bf78: f004 fcb7 bl 80108ea 800bf7c: e00e b.n 800bf9c } } else { if (GBT_LockState.action_requested == 1) { // LOCK 800bf7e: 4b4d ldr r3, [pc, #308] @ (800c0b4 ) 800bf80: 789b ldrb r3, [r3, #2] 800bf82: 2b01 cmp r3, #1 800bf84: d105 bne.n 800bf92 HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1); 800bf86: 2201 movs r2, #1 800bf88: 2110 movs r1, #16 800bf8a: 484c ldr r0, [pc, #304] @ (800c0bc ) 800bf8c: f004 fcad bl 80108ea 800bf90: e004 b.n 800bf9c } else { // UNLOCK HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1); 800bf92: 2201 movs r2, #1 800bf94: 2120 movs r1, #32 800bf96: 4849 ldr r0, [pc, #292] @ (800c0bc ) 800bf98: f004 fca7 bl 80108ea } } GBT_LockState.motor_state = 1; // motor_on 800bf9c: 4b45 ldr r3, [pc, #276] @ (800c0b4 ) 800bf9e: 2201 movs r2, #1 800bfa0: 70da strb r2, [r3, #3] GBT_LockState.last_action_time = current_tick; 800bfa2: 4a44 ldr r2, [pc, #272] @ (800c0b4 ) 800bfa4: 687b ldr r3, [r7, #4] 800bfa6: 6053 str r3, [r2, #4] break; 800bfa8: e067 b.n 800c07a case 1: // motor_on - мотор включен, ждем LOCK_DELAY if (current_tick - GBT_LockState.last_action_time >= LOCK_DELAY) { 800bfaa: 4b42 ldr r3, [pc, #264] @ (800c0b4 ) 800bfac: 685b ldr r3, [r3, #4] 800bfae: 687a ldr r2, [r7, #4] 800bfb0: 1ad3 subs r3, r2, r3 800bfb2: 4a43 ldr r2, [pc, #268] @ (800c0c0 ) 800bfb4: 8812 ldrh r2, [r2, #0] 800bfb6: 4293 cmp r3, r2 800bfb8: d35c bcc.n 800c074 // Выключаем оба пина HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0); 800bfba: 2200 movs r2, #0 800bfbc: 2110 movs r1, #16 800bfbe: 483f ldr r0, [pc, #252] @ (800c0bc ) 800bfc0: f004 fc93 bl 80108ea HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0); 800bfc4: 2200 movs r2, #0 800bfc6: 2120 movs r1, #32 800bfc8: 483c ldr r0, [pc, #240] @ (800c0bc ) 800bfca: f004 fc8e bl 80108ea GBT_LockState.motor_state = 2; // waiting_off 800bfce: 4b39 ldr r3, [pc, #228] @ (800c0b4 ) 800bfd0: 2202 movs r2, #2 800bfd2: 70da strb r2, [r3, #3] GBT_LockState.last_action_time = current_tick; 800bfd4: 4a37 ldr r2, [pc, #220] @ (800c0b4 ) 800bfd6: 687b ldr r3, [r7, #4] 800bfd8: 6053 str r3, [r2, #4] } break; 800bfda: e04b b.n 800c074 case 2: // waiting_off - ждем немного перед проверкой состояния // Небольшая задержка перед проверкой состояния (например, 50мс) if (current_tick - GBT_LockState.last_action_time >= 50) { 800bfdc: 4b35 ldr r3, [pc, #212] @ (800c0b4 ) 800bfde: 685b ldr r3, [r3, #4] 800bfe0: 687a ldr r2, [r7, #4] 800bfe2: 1ad3 subs r3, r2, r3 800bfe4: 2b31 cmp r3, #49 @ 0x31 800bfe6: d947 bls.n 800c078 // Проверяем, достигнуто ли требуемое состояние lock_is_open = GBT_LockGetState() == 0; 800bfe8: f7ff ff4a bl 800be80 800bfec: 4603 mov r3, r0 800bfee: 2b00 cmp r3, #0 800bff0: bf0c ite eq 800bff2: 2301 moveq r3, #1 800bff4: 2300 movne r3, #0 800bff6: 70fb strb r3, [r7, #3] bool action_success = (lock_is_open == (GBT_LockState.action_requested == 0)); 800bff8: 78fb ldrb r3, [r7, #3] 800bffa: 4a2e ldr r2, [pc, #184] @ (800c0b4 ) 800bffc: 7892 ldrb r2, [r2, #2] 800bffe: 2a00 cmp r2, #0 800c000: bf0c ite eq 800c002: 2201 moveq r2, #1 800c004: 2200 movne r2, #0 800c006: b2d2 uxtb r2, r2 800c008: 4293 cmp r3, r2 800c00a: bf0c ite eq 800c00c: 2301 moveq r3, #1 800c00e: 2300 movne r3, #0 800c010: 707b strb r3, [r7, #1] if (action_success) { 800c012: 787b ldrb r3, [r7, #1] 800c014: 2b00 cmp r3, #0 800c016: d009 beq.n 800c02c // Действие выполнено успешно GBT_LockState.action_requested = 255; // сбрасываем флаг 800c018: 4b26 ldr r3, [pc, #152] @ (800c0b4 ) 800c01a: 22ff movs r2, #255 @ 0xff 800c01c: 709a strb r2, [r3, #2] GBT_LockState.motor_state = 0; // idle 800c01e: 4b25 ldr r3, [pc, #148] @ (800c0b4 ) 800c020: 2200 movs r2, #0 800c022: 70da strb r2, [r3, #3] GBT_LockState.retry_count = 0; 800c024: 4b23 ldr r3, [pc, #140] @ (800c0b4 ) 800c026: 2200 movs r2, #0 800c028: 721a strb r2, [r3, #8] // Повторяем попытку GBT_LockState.motor_state = 0; // возвращаемся к началу } } } break; 800c02a: e025 b.n 800c078 GBT_LockState.retry_count++; 800c02c: 4b21 ldr r3, [pc, #132] @ (800c0b4 ) 800c02e: 7a1b ldrb r3, [r3, #8] 800c030: 3301 adds r3, #1 800c032: b2da uxtb r2, r3 800c034: 4b1f ldr r3, [pc, #124] @ (800c0b4 ) 800c036: 721a strb r2, [r3, #8] if (GBT_LockState.retry_count >= MAX_RETRIES) { 800c038: 4b1e ldr r3, [pc, #120] @ (800c0b4 ) 800c03a: 7a1a ldrb r2, [r3, #8] 800c03c: 4b21 ldr r3, [pc, #132] @ (800c0c4 ) 800c03e: 781b ldrb r3, [r3, #0] 800c040: 429a cmp r2, r3 800c042: d313 bcc.n 800c06c GBT_LockState.error = 1; 800c044: 4b1b ldr r3, [pc, #108] @ (800c0b4 ) 800c046: 2201 movs r2, #1 800c048: 705a strb r2, [r3, #1] GBT_LockState.error_tick = current_tick; // сохраняем время установки ошибки 800c04a: 4a1a ldr r2, [pc, #104] @ (800c0b4 ) 800c04c: 687b ldr r3, [r7, #4] 800c04e: 60d3 str r3, [r2, #12] GBT_LockState.action_requested = 0; // пытаемся разблокировать 800c050: 4b18 ldr r3, [pc, #96] @ (800c0b4 ) 800c052: 2200 movs r2, #0 800c054: 709a strb r2, [r3, #2] GBT_LockState.motor_state = 0; 800c056: 4b17 ldr r3, [pc, #92] @ (800c0b4 ) 800c058: 2200 movs r2, #0 800c05a: 70da strb r2, [r3, #3] GBT_LockState.retry_count = 0; 800c05c: 4b15 ldr r3, [pc, #84] @ (800c0b4 ) 800c05e: 2200 movs r2, #0 800c060: 721a strb r2, [r3, #8] log_printf(LOG_ERR, "Lock error\n"); 800c062: 4919 ldr r1, [pc, #100] @ (800c0c8 ) 800c064: 2004 movs r0, #4 800c066: f7ff fa7d bl 800b564 break; 800c06a: e005 b.n 800c078 GBT_LockState.motor_state = 0; // возвращаемся к началу 800c06c: 4b11 ldr r3, [pc, #68] @ (800c0b4 ) 800c06e: 2200 movs r2, #0 800c070: 70da strb r2, [r3, #3] break; 800c072: e001 b.n 800c078 break; 800c074: bf00 nop 800c076: e01a b.n 800c0ae break; 800c078: bf00 nop switch (GBT_LockState.motor_state) { 800c07a: e018 b.n 800c0ae } } else { // Состояние соответствует требуемому, сбрасываем флаги if (GBT_LockState.motor_state != 0) { 800c07c: 4b0d ldr r3, [pc, #52] @ (800c0b4 ) 800c07e: 78db ldrb r3, [r3, #3] 800c080: 2b00 cmp r3, #0 800c082: d00c beq.n 800c09e HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0); 800c084: 2200 movs r2, #0 800c086: 2110 movs r1, #16 800c088: 480c ldr r0, [pc, #48] @ (800c0bc ) 800c08a: f004 fc2e bl 80108ea HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0); 800c08e: 2200 movs r2, #0 800c090: 2120 movs r1, #32 800c092: 480a ldr r0, [pc, #40] @ (800c0bc ) 800c094: f004 fc29 bl 80108ea GBT_LockState.motor_state = 0; 800c098: 4b06 ldr r3, [pc, #24] @ (800c0b4 ) 800c09a: 2200 movs r2, #0 800c09c: 70da strb r2, [r3, #3] } GBT_LockState.action_requested = 255; 800c09e: 4b05 ldr r3, [pc, #20] @ (800c0b4 ) 800c0a0: 22ff movs r2, #255 @ 0xff 800c0a2: 709a strb r2, [r3, #2] GBT_LockState.retry_count = 0; 800c0a4: 4b03 ldr r3, [pc, #12] @ (800c0b4 ) 800c0a6: 2200 movs r2, #0 800c0a8: 721a strb r2, [r3, #8] 800c0aa: e000 b.n 800c0ae return; 800c0ac: bf00 nop } } 800c0ae: 3708 adds r7, #8 800c0b0: 46bd mov sp, r7 800c0b2: bd80 pop {r7, pc} 800c0b4: 20000008 .word 0x20000008 800c0b8: 20000005 .word 0x20000005 800c0bc: 40011000 .word 0x40011000 800c0c0: 20000006 .word 0x20000006 800c0c4: 08016d13 .word 0x08016d13 800c0c8: 08016c20 .word 0x08016c20 0800c0cc : void GBT_LockResetError(){ 800c0cc: b580 push {r7, lr} 800c0ce: af00 add r7, sp, #0 GBT_LockState.error = 0; 800c0d0: 4b05 ldr r3, [pc, #20] @ (800c0e8 ) 800c0d2: 2200 movs r2, #0 800c0d4: 705a strb r2, [r3, #1] GBT_LockState.error_tick = 0; 800c0d6: 4b04 ldr r3, [pc, #16] @ (800c0e8 ) 800c0d8: 2200 movs r2, #0 800c0da: 60da str r2, [r3, #12] log_printf(LOG_INFO, "Lock error reset\n"); 800c0dc: 4903 ldr r1, [pc, #12] @ (800c0ec ) 800c0de: 2007 movs r0, #7 800c0e0: f7ff fa40 bl 800b564 } 800c0e4: bf00 nop 800c0e6: bd80 pop {r7, pc} 800c0e8: 20000008 .word 0x20000008 800c0ec: 08016c2c .word 0x08016c2c 0800c0f0 : void GBT_ResetErrorTimeout(){ 800c0f0: b580 push {r7, lr} 800c0f2: af00 add r7, sp, #0 static const uint32_t ERROR_TIMEOUT_MS = 300000; // 5 минут if (GBT_LockState.error && GBT_LockState.error_tick != 0) { 800c0f4: 4b0a ldr r3, [pc, #40] @ (800c120 ) 800c0f6: 785b ldrb r3, [r3, #1] 800c0f8: 2b00 cmp r3, #0 800c0fa: d00f beq.n 800c11c 800c0fc: 4b08 ldr r3, [pc, #32] @ (800c120 ) 800c0fe: 68db ldr r3, [r3, #12] 800c100: 2b00 cmp r3, #0 800c102: d00b beq.n 800c11c if ((HAL_GetTick()-GBT_LockState.error_tick) >= ERROR_TIMEOUT_MS) { 800c104: f002 fbea bl 800e8dc 800c108: 4602 mov r2, r0 800c10a: 4b05 ldr r3, [pc, #20] @ (800c120 ) 800c10c: 68db ldr r3, [r3, #12] 800c10e: 1ad2 subs r2, r2, r3 800c110: 4b04 ldr r3, [pc, #16] @ (800c124 ) 800c112: 681b ldr r3, [r3, #0] 800c114: 429a cmp r2, r3 800c116: d301 bcc.n 800c11c // Прошло 5 минут, сбрасываем ошибку GBT_LockResetError(); 800c118: f7ff ffd8 bl 800c0cc } } } 800c11c: bf00 nop 800c11e: bd80 pop {r7, pc} 800c120: 20000008 .word 0x20000008 800c124: 08016d14 .word 0x08016d14 0800c128 : * bootloader before starting this program. Unfortunately, function * SystemInit() overwrites this change again. * @return none. */ static void VectorBase_Config(void) { 800c128: b480 push {r7} 800c12a: af00 add r7, sp, #0 * c-startup code. */ extern const unsigned long g_pfnVectors[]; /* Remap the vector table to where the vector table is located for this program. */ SCB->VTOR = (unsigned long)&g_pfnVectors[0]; 800c12c: 4b03 ldr r3, [pc, #12] @ (800c13c ) 800c12e: 4a04 ldr r2, [pc, #16] @ (800c140 ) 800c130: 609a str r2, [r3, #8] } 800c132: bf00 nop 800c134: 46bd mov sp, r7 800c136: bc80 pop {r7} 800c138: 4770 bx lr 800c13a: bf00 nop 800c13c: e000ed00 .word 0xe000ed00 800c140: 08008000 .word 0x08008000 0800c144 : uint8_t ED_TraceWarning(uint8_t flag, uint8_t id){ 800c144: b480 push {r7} 800c146: b085 sub sp, #20 800c148: af00 add r7, sp, #0 800c14a: 4603 mov r3, r0 800c14c: 460a mov r2, r1 800c14e: 71fb strb r3, [r7, #7] 800c150: 4613 mov r3, r2 800c152: 71bb strb r3, [r7, #6] static uint8_t memory[32]; if(id > 31) return 0; 800c154: 79bb ldrb r3, [r7, #6] 800c156: 2b1f cmp r3, #31 800c158: d901 bls.n 800c15e 800c15a: 2300 movs r3, #0 800c15c: e00e b.n 800c17c uint8_t result = 0; 800c15e: 2300 movs r3, #0 800c160: 73fb strb r3, [r7, #15] if(memory[id] != flag){ 800c162: 79bb ldrb r3, [r7, #6] 800c164: 4a08 ldr r2, [pc, #32] @ (800c188 ) 800c166: 5cd3 ldrb r3, [r2, r3] 800c168: 79fa ldrb r2, [r7, #7] 800c16a: 429a cmp r2, r3 800c16c: d001 beq.n 800c172 result = 1; 800c16e: 2301 movs r3, #1 800c170: 73fb strb r3, [r7, #15] } memory[id] = flag; 800c172: 79bb ldrb r3, [r7, #6] 800c174: 4904 ldr r1, [pc, #16] @ (800c188 ) 800c176: 79fa ldrb r2, [r7, #7] 800c178: 54ca strb r2, [r1, r3] return result; 800c17a: 7bfb ldrb r3, [r7, #15] } 800c17c: 4618 mov r0, r3 800c17e: 3714 adds r7, #20 800c180: 46bd mov sp, r7 800c182: bc80 pop {r7} 800c184: 4770 bx lr 800c186: bf00 nop 800c188: 20000984 .word 0x20000984 0800c18c : void ED_Delay(uint32_t Delay) { 800c18c: b580 push {r7, lr} 800c18e: b084 sub sp, #16 800c190: af00 add r7, sp, #0 800c192: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 800c194: f002 fba2 bl 800e8dc 800c198: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800c19a: 687b ldr r3, [r7, #4] 800c19c: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800c19e: 68fb ldr r3, [r7, #12] 800c1a0: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800c1a4: d012 beq.n 800c1cc { wait += (uint32_t)(uwTickFreq); 800c1a6: 4b10 ldr r3, [pc, #64] @ (800c1e8 ) 800c1a8: 781b ldrb r3, [r3, #0] 800c1aa: 461a mov r2, r3 800c1ac: 68fb ldr r3, [r7, #12] 800c1ae: 4413 add r3, r2 800c1b0: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait){ 800c1b2: e00b b.n 800c1cc CONN_CC_ReadStateFiltered(); 800c1b4: f7fe fffa bl 800b1ac GBT_ManageLockMotor(); 800c1b8: f7ff fe8e bl 800bed8 CONN_Task(); 800c1bc: f7fe fe16 bl 800adec GBT_ChargerTask(); 800c1c0: f7fd fe36 bl 8009e30 LED_Task(); 800c1c4: f000 fff4 bl 800d1b0 SC_Task(); 800c1c8: f001 f908 bl 800d3dc while ((HAL_GetTick() - tickstart) < wait){ 800c1cc: f002 fb86 bl 800e8dc 800c1d0: 4602 mov r2, r0 800c1d2: 68bb ldr r3, [r7, #8] 800c1d4: 1ad3 subs r3, r2, r3 800c1d6: 68fa ldr r2, [r7, #12] 800c1d8: 429a cmp r2, r3 800c1da: d8eb bhi.n 800c1b4 // if(huart2.gState != HAL_UART_STATE_BUSY_TX) debug_buffer_send(); // TEST } } 800c1dc: bf00 nop 800c1de: bf00 nop 800c1e0: 3710 adds r7, #16 800c1e2: 46bd mov sp, r7 800c1e4: bd80 pop {r7, pc} 800c1e6: bf00 nop 800c1e8: 20000080 .word 0x20000080 0800c1ec : void StopButtonControl(){ 800c1ec: b580 push {r7, lr} 800c1ee: af00 add r7, sp, #0 //Charging do nothing if(!IN_ReadInput(IN_ESTOP)){ 800c1f0: 2003 movs r0, #3 800c1f2: f7fd faef bl 80097d4 800c1f6: 4603 mov r3, r0 800c1f8: 2b00 cmp r3, #0 800c1fa: d102 bne.n 800c202 CONN.connControl = CMD_STOP; 800c1fc: 4b02 ldr r3, [pc, #8] @ (800c208 ) 800c1fe: 2201 movs r2, #1 800c200: 701a strb r2, [r3, #0] } } 800c202: bf00 nop 800c204: bd80 pop {r7, pc} 800c206: bf00 nop 800c208: 200002f8 .word 0x200002f8 0800c20c
: /** * @brief The application entry point. * @retval int */ int main(void) { 800c20c: b580 push {r7, lr} 800c20e: b082 sub sp, #8 800c210: af02 add r7, sp, #8 /* USER CODE BEGIN 1 */ VectorBase_Config(); 800c212: f7ff ff89 bl 800c128 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 800c216: f002 fb09 bl 800e82c /* USER CODE BEGIN Init */ HAL_RCC_DeInit(); 800c21a: f004 fb8b bl 8010934 /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 800c21e: f000 f873 bl 800c308 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 800c222: f7ff faa5 bl 800b770 MX_ADC1_Init(); 800c226: f7fd f9cf bl 80095c8 MX_CAN1_Init(); 800c22a: f7fd fc19 bl 8009a60 MX_CAN2_Init(); 800c22e: f7fd fc4d bl 8009acc MX_RTC_Init(); 800c232: f001 f85b bl 800d2ec MX_TIM4_Init(); 800c236: f001 ffef bl 800e218 MX_USART2_UART_Init(); 800c23a: f002 f92f bl 800e49c MX_CRC_Init(); 800c23e: f7ff f879 bl 800b334 MX_UART5_Init(); 800c242: f002 f8d7 bl 800e3f4 MX_USART1_UART_Init(); 800c246: f002 f8ff bl 800e448 MX_USART3_UART_Init(); 800c24a: f002 f951 bl 800e4f0 /* USER CODE BEGIN 2 */ Init_Peripheral(); 800c24e: f7fd fb13 bl 8009878 LED_Init(); 800c252: f000 ff8d bl 800d170 HAL_Delay(300); 800c256: f44f 7096 mov.w r0, #300 @ 0x12c 800c25a: f002 fb49 bl 800e8f0 GBT_Init(); 800c25e: f7fd fda9 bl 8009db4 SC_Init(); 800c262: f001 f8a7 bl 800d3b4 log_printf(LOG_INFO, "GBT Charger v%d.%d\n", GBT_CH_VER_MAJOR, GBT_CH_VER_MINOR); 800c266: 2300 movs r3, #0 800c268: 2201 movs r2, #1 800c26a: 4922 ldr r1, [pc, #136] @ (800c2f4 ) 800c26c: 2007 movs r0, #7 800c26e: f7ff f979 bl 800b564 ReadVersion(); 800c272: f001 f87b bl 800d36c log_printf(LOG_INFO, "Serial number: %d\n", infoPacket.serialNumber); 800c276: 4b20 ldr r3, [pc, #128] @ (800c2f8 ) 800c278: 881b ldrh r3, [r3, #0] 800c27a: b29b uxth r3, r3 800c27c: 461a mov r2, r3 800c27e: 491f ldr r1, [pc, #124] @ (800c2fc ) 800c280: 2007 movs r0, #7 800c282: f7ff f96f bl 800b564 log_printf(LOG_INFO, "Board revision: %d\n", infoPacket.boardVersion); 800c286: 4b1c ldr r3, [pc, #112] @ (800c2f8 ) 800c288: 789b ldrb r3, [r3, #2] 800c28a: 461a mov r2, r3 800c28c: 491c ldr r1, [pc, #112] @ (800c300 ) 800c28e: 2007 movs r0, #7 800c290: f7ff f968 bl 800b564 log_printf(LOG_INFO, "FW version: %d.%d.%d\n", infoPacket.fw_version_major, infoPacket.fw_version_minor, infoPacket.fw_version_patch); 800c294: 4b18 ldr r3, [pc, #96] @ (800c2f8 ) 800c296: 889b ldrh r3, [r3, #4] 800c298: b29b uxth r3, r3 800c29a: 461a mov r2, r3 800c29c: 4b16 ldr r3, [pc, #88] @ (800c2f8 ) 800c29e: 88db ldrh r3, [r3, #6] 800c2a0: b29b uxth r3, r3 800c2a2: 4619 mov r1, r3 800c2a4: 4b14 ldr r3, [pc, #80] @ (800c2f8 ) 800c2a6: 891b ldrh r3, [r3, #8] 800c2a8: b29b uxth r3, r3 800c2aa: 9300 str r3, [sp, #0] 800c2ac: 460b mov r3, r1 800c2ae: 4915 ldr r1, [pc, #84] @ (800c304 ) 800c2b0: 2007 movs r0, #7 800c2b2: f7ff f957 bl 800b564 GBT_SetConfig(); 800c2b6: f7fd fd9b bl 8009df0 GBT_CAN_ReInit(); 800c2ba: f7ff fce7 bl 800bc8c PSU_Init(); 800c2be: f000 fa7d bl 800c7bc CONN_Init(); 800c2c2: f7fd fd17 bl 8009cf4 /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ PSU_ReadWrite(); 800c2c6: f000 fb87 bl 800c9d8 PSU_Task(); 800c2ca: f000 fc23 bl 800cb14 ED_Delay(10); 800c2ce: 200a movs r0, #10 800c2d0: f7ff ff5c bl 800c18c METER_CalculateEnergy(); 800c2d4: f000 f88e bl 800c3f4 CONN_Loop(); 800c2d8: f7fd fd22 bl 8009d20 LED_Write(); 800c2dc: f000 fe0e bl 800cefc ED_Delay(10); 800c2e0: 200a movs r0, #10 800c2e2: f7ff ff53 bl 800c18c StopButtonControl(); 800c2e6: f7ff ff81 bl 800c1ec ED_Delay(50); 800c2ea: 2032 movs r0, #50 @ 0x32 800c2ec: f7ff ff4e bl 800c18c { 800c2f0: bf00 nop 800c2f2: e7e8 b.n 800c2c6 800c2f4: 08016c40 .word 0x08016c40 800c2f8: 20000f14 .word 0x20000f14 800c2fc: 08016c54 .word 0x08016c54 800c300: 08016c68 .word 0x08016c68 800c304: 08016c7c .word 0x08016c7c 0800c308 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 800c308: b580 push {r7, lr} 800c30a: b09c sub sp, #112 @ 0x70 800c30c: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 800c30e: f107 0338 add.w r3, r7, #56 @ 0x38 800c312: 2238 movs r2, #56 @ 0x38 800c314: 2100 movs r1, #0 800c316: 4618 mov r0, r3 800c318: f007 ff40 bl 801419c RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800c31c: f107 0324 add.w r3, r7, #36 @ 0x24 800c320: 2200 movs r2, #0 800c322: 601a str r2, [r3, #0] 800c324: 605a str r2, [r3, #4] 800c326: 609a str r2, [r3, #8] 800c328: 60da str r2, [r3, #12] 800c32a: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 800c32c: 1d3b adds r3, r7, #4 800c32e: 2220 movs r2, #32 800c330: 2100 movs r1, #0 800c332: 4618 mov r0, r3 800c334: f007 ff32 bl 801419c /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; 800c338: 2305 movs r3, #5 800c33a: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 800c33c: f44f 3380 mov.w r3, #65536 @ 0x10000 800c340: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5; 800c342: 2304 movs r3, #4 800c344: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.LSEState = RCC_LSE_ON; 800c346: 2301 movs r3, #1 800c348: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 800c34a: 2301 movs r3, #1 800c34c: 64fb str r3, [r7, #76] @ 0x4c RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2; 800c34e: f44f 3380 mov.w r3, #65536 @ 0x10000 800c352: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 800c354: 2302 movs r3, #2 800c356: 65bb str r3, [r7, #88] @ 0x58 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 800c358: f44f 3380 mov.w r3, #65536 @ 0x10000 800c35c: 65fb str r3, [r7, #92] @ 0x5c RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 800c35e: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000 800c362: 663b str r3, [r7, #96] @ 0x60 RCC_OscInitStruct.PLL2.PLL2State = RCC_PLL2_ON; 800c364: 2302 movs r3, #2 800c366: 667b str r3, [r7, #100] @ 0x64 RCC_OscInitStruct.PLL2.PLL2MUL = RCC_PLL2_MUL8; 800c368: f44f 63c0 mov.w r3, #1536 @ 0x600 800c36c: 66bb str r3, [r7, #104] @ 0x68 RCC_OscInitStruct.PLL2.HSEPrediv2Value = RCC_HSE_PREDIV2_DIV5; 800c36e: 2340 movs r3, #64 @ 0x40 800c370: 66fb str r3, [r7, #108] @ 0x6c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800c372: f107 0338 add.w r3, r7, #56 @ 0x38 800c376: 4618 mov r0, r3 800c378: f004 fbac bl 8010ad4 800c37c: 4603 mov r3, r0 800c37e: 2b00 cmp r3, #0 800c380: d001 beq.n 800c386 { Error_Handler(); 800c382: f000 f831 bl 800c3e8 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800c386: 230f movs r3, #15 800c388: 627b str r3, [r7, #36] @ 0x24 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 800c38a: 2302 movs r3, #2 800c38c: 62bb str r3, [r7, #40] @ 0x28 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800c38e: 2300 movs r3, #0 800c390: 62fb str r3, [r7, #44] @ 0x2c RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 800c392: f44f 6380 mov.w r3, #1024 @ 0x400 800c396: 633b str r3, [r7, #48] @ 0x30 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800c398: 2300 movs r3, #0 800c39a: 637b str r3, [r7, #52] @ 0x34 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 800c39c: f107 0324 add.w r3, r7, #36 @ 0x24 800c3a0: 2102 movs r1, #2 800c3a2: 4618 mov r0, r3 800c3a4: f004 feac bl 8011100 800c3a8: 4603 mov r3, r0 800c3aa: 2b00 cmp r3, #0 800c3ac: d001 beq.n 800c3b2 { Error_Handler(); 800c3ae: f000 f81b bl 800c3e8 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC; 800c3b2: 2303 movs r3, #3 800c3b4: 607b str r3, [r7, #4] PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 800c3b6: f44f 7380 mov.w r3, #256 @ 0x100 800c3ba: 60bb str r3, [r7, #8] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 800c3bc: f44f 4300 mov.w r3, #32768 @ 0x8000 800c3c0: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 800c3c2: 1d3b adds r3, r7, #4 800c3c4: 4618 mov r0, r3 800c3c6: f005 f891 bl 80114ec 800c3ca: 4603 mov r3, r0 800c3cc: 2b00 cmp r3, #0 800c3ce: d001 beq.n 800c3d4 { Error_Handler(); 800c3d0: f000 f80a bl 800c3e8 } /** Configure the Systick interrupt time */ __HAL_RCC_PLLI2S_ENABLE(); 800c3d4: 4b03 ldr r3, [pc, #12] @ (800c3e4 ) 800c3d6: 2201 movs r2, #1 800c3d8: 601a str r2, [r3, #0] } 800c3da: bf00 nop 800c3dc: 3770 adds r7, #112 @ 0x70 800c3de: 46bd mov sp, r7 800c3e0: bd80 pop {r7, pc} 800c3e2: bf00 nop 800c3e4: 42420070 .word 0x42420070 0800c3e8 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 800c3e8: b480 push {r7} 800c3ea: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800c3ec: b672 cpsid i } 800c3ee: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 800c3f0: bf00 nop 800c3f2: e7fd b.n 800c3f0 0800c3f4 : METER_t METER; // Функция для расчета и накопления энергии c дробной частью без счетчиков void METER_CalculateEnergy() { 800c3f4: e92d 43b0 stmdb sp!, {r4, r5, r7, r8, r9, lr} 800c3f8: b084 sub sp, #16 800c3fa: af00 add r7, sp, #0 // Проверяем, что индекс находится в пределах массива METER.online = 0; 800c3fc: 4b2e ldr r3, [pc, #184] @ (800c4b8 ) 800c3fe: 2200 movs r2, #0 800c400: 711a strb r2, [r3, #4] if(CONN.connState == Charging){ 800c402: 4b2e ldr r3, [pc, #184] @ (800c4bc ) 800c404: 785b ldrb r3, [r3, #1] 800c406: 2b08 cmp r3, #8 800c408: d104 bne.n 800c414 METER.enable = 1; 800c40a: 4b2b ldr r3, [pc, #172] @ (800c4b8 ) 800c40c: 2201 movs r2, #1 800c40e: f883 2024 strb.w r2, [r3, #36] @ 0x24 800c412: e003 b.n 800c41c }else{ METER.enable = 0; 800c414: 4b28 ldr r3, [pc, #160] @ (800c4b8 ) 800c416: 2200 movs r2, #0 800c418: f883 2024 strb.w r2, [r3, #36] @ 0x24 } uint32_t currentTick = HAL_GetTick(); // Получаем текущее время в миллисекундах 800c41c: f002 fa5e bl 800e8dc 800c420: 60f8 str r0, [r7, #12] uint32_t elapsedTimeMs = currentTick - METER.lastTick; // Вычисляем время, прошедшее с последнего вызова в секундах 800c422: 4b25 ldr r3, [pc, #148] @ (800c4b8 ) 800c424: 689b ldr r3, [r3, #8] 800c426: 68fa ldr r2, [r7, #12] 800c428: 1ad3 subs r3, r2, r3 800c42a: 60bb str r3, [r7, #8] METER.lastTick = currentTick; // Обновляем время последнего вызова для текущего коннектора 800c42c: 4a22 ldr r2, [pc, #136] @ (800c4b8 ) 800c42e: 68fb ldr r3, [r7, #12] 800c430: 6093 str r3, [r2, #8] uint32_t energyWs = CONN.Power * elapsedTimeMs / 1000; // Рассчитываем энергию в ватт-секундах за прошедший промежуток времени 800c432: 4b22 ldr r3, [pc, #136] @ (800c4bc ) 800c434: f8d3 3003 ldr.w r3, [r3, #3] 800c438: 68ba ldr r2, [r7, #8] 800c43a: fb02 f303 mul.w r3, r2, r3 800c43e: 4a20 ldr r2, [pc, #128] @ (800c4c0 ) 800c440: fba2 2303 umull r2, r3, r2, r3 800c444: 099b lsrs r3, r3, #6 800c446: 607b str r3, [r7, #4] //Расчет энергии теперь идет всегда, смещение берем суммарное METER.EnergyPSU_Ws += energyWs; 800c448: 4b1b ldr r3, [pc, #108] @ (800c4b8 ) 800c44a: e9d3 2304 ldrd r2, r3, [r3, #16] 800c44e: 6879 ldr r1, [r7, #4] 800c450: 2000 movs r0, #0 800c452: 460c mov r4, r1 800c454: 4605 mov r5, r0 800c456: eb12 0804 adds.w r8, r2, r4 800c45a: eb43 0905 adc.w r9, r3, r5 800c45e: 4b16 ldr r3, [pc, #88] @ (800c4b8 ) 800c460: e9c3 8904 strd r8, r9, [r3, #16] // Абсолютное значение энергии разъема складывается из накопленной дробной части и значения со счетчиков METER.AbsoluteEnergy = (uint32_t)METER.EnergyPSU_Ws/3600; //переводим в Вт*час 800c464: 4b14 ldr r3, [pc, #80] @ (800c4b8 ) 800c466: e9d3 2304 ldrd r2, r3, [r3, #16] 800c46a: 4b16 ldr r3, [pc, #88] @ (800c4c4 ) 800c46c: fba3 2302 umull r2, r3, r3, r2 800c470: 0adb lsrs r3, r3, #11 800c472: 4a11 ldr r2, [pc, #68] @ (800c4b8 ) 800c474: 6193 str r3, [r2, #24] if(METER.enable) { 800c476: 4b10 ldr r3, [pc, #64] @ (800c4b8 ) 800c478: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800c47c: 2b00 cmp r3, #0 800c47e: d008 beq.n 800c492 //enabled state CONN.Energy = METER.AbsoluteEnergy - METER.EnergyOffset;//переводим в Вт*час 800c480: 4b0d ldr r3, [pc, #52] @ (800c4b8 ) 800c482: 699a ldr r2, [r3, #24] 800c484: 4b0c ldr r3, [pc, #48] @ (800c4b8 ) 800c486: 69db ldr r3, [r3, #28] 800c488: 1ad3 subs r3, r2, r3 800c48a: 4a0c ldr r2, [pc, #48] @ (800c4bc ) 800c48c: f8c2 3007 str.w r3, [r2, #7] METER.EnergyOffset = METER.AbsoluteEnergy; } } 800c490: e00c b.n 800c4ac CONN.Energy = 0; 800c492: 4b0a ldr r3, [pc, #40] @ (800c4bc ) 800c494: 2200 movs r2, #0 800c496: 71da strb r2, [r3, #7] 800c498: 2200 movs r2, #0 800c49a: 721a strb r2, [r3, #8] 800c49c: 2200 movs r2, #0 800c49e: 725a strb r2, [r3, #9] 800c4a0: 2200 movs r2, #0 800c4a2: 729a strb r2, [r3, #10] METER.EnergyOffset = METER.AbsoluteEnergy; 800c4a4: 4b04 ldr r3, [pc, #16] @ (800c4b8 ) 800c4a6: 699b ldr r3, [r3, #24] 800c4a8: 4a03 ldr r2, [pc, #12] @ (800c4b8 ) 800c4aa: 61d3 str r3, [r2, #28] } 800c4ac: bf00 nop 800c4ae: 3710 adds r7, #16 800c4b0: 46bd mov sp, r7 800c4b2: e8bd 83b0 ldmia.w sp!, {r4, r5, r7, r8, r9, pc} 800c4b6: bf00 nop 800c4b8: 200009a8 .word 0x200009a8 800c4bc: 200002f8 .word 0x200002f8 800c4c0: 10624dd3 .word 0x10624dd3 800c4c4: 91a2b3c5 .word 0x91a2b3c5 0800c4c8 : uint32_t can_lastpacket; extern CAN_HandleTypeDef hcan2; static void PSU_SwitchState(PSU_State_t state){ 800c4c8: b580 push {r7, lr} 800c4ca: b082 sub sp, #8 800c4cc: af00 add r7, sp, #0 800c4ce: 4603 mov r3, r0 800c4d0: 71fb strb r3, [r7, #7] PSU0.state = state; 800c4d2: 4a06 ldr r2, [pc, #24] @ (800c4ec ) 800c4d4: 79fb ldrb r3, [r7, #7] 800c4d6: 71d3 strb r3, [r2, #7] PSU0.statetick = HAL_GetTick(); 800c4d8: f002 fa00 bl 800e8dc 800c4dc: 4603 mov r3, r0 800c4de: 4a03 ldr r2, [pc, #12] @ (800c4ec ) 800c4e0: 6113 str r3, [r2, #16] } 800c4e2: bf00 nop 800c4e4: 3708 adds r7, #8 800c4e6: 46bd mov sp, r7 800c4e8: bd80 pop {r7, pc} 800c4ea: bf00 nop 800c4ec: 20000a14 .word 0x20000a14 0800c4f0 : static uint32_t PSU_StateTime(void){ 800c4f0: b580 push {r7, lr} 800c4f2: af00 add r7, sp, #0 return HAL_GetTick() - PSU0.statetick; 800c4f4: f002 f9f2 bl 800e8dc 800c4f8: 4602 mov r2, r0 800c4fa: 4b02 ldr r3, [pc, #8] @ (800c504 ) 800c4fc: 691b ldr r3, [r3, #16] 800c4fe: 1ad3 subs r3, r2, r3 } 800c500: 4618 mov r0, r3 800c502: bd80 pop {r7, pc} 800c504: 20000a14 .word 0x20000a14 0800c508 : void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan){ 800c508: b580 push {r7, lr} 800c50a: b084 sub sp, #16 800c50c: af00 add r7, sp, #0 800c50e: 6078 str r0, [r7, #4] static CAN_RxHeaderTypeDef RxHeader; static uint8_t RxData[8] = {0,}; CanId_t CanId; if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO1, &RxHeader, RxData) == HAL_OK) 800c510: 4b88 ldr r3, [pc, #544] @ (800c734 ) 800c512: 4a89 ldr r2, [pc, #548] @ (800c738 ) 800c514: 2101 movs r1, #1 800c516: 6878 ldr r0, [r7, #4] 800c518: f003 fa80 bl 800fa1c 800c51c: 4603 mov r3, r0 800c51e: 2b00 cmp r3, #0 800c520: f040 8104 bne.w 800c72c { memcpy(&CanId, &RxHeader.ExtId, sizeof(CanId_t)); 800c524: 4b84 ldr r3, [pc, #528] @ (800c738 ) 800c526: 685b ldr r3, [r3, #4] 800c528: 60bb str r3, [r7, #8] /* Для DC30 поддерживается только один силовой модуль (source == 0) */ if(CanId.source != 0) return; 800c52a: 7a3b ldrb r3, [r7, #8] 800c52c: 2b00 cmp r3, #0 800c52e: f040 80fc bne.w 800c72a can_lastpacket = HAL_GetTick(); 800c532: f002 f9d3 bl 800e8dc 800c536: 4603 mov r3, r0 800c538: 4a80 ldr r2, [pc, #512] @ (800c73c ) 800c53a: 6013 str r3, [r2, #0] if(CanId.command==0x02){ 800c53c: 7abb ldrb r3, [r7, #10] 800c53e: f003 033f and.w r3, r3, #63 @ 0x3f 800c542: b2db uxtb r3, r3 800c544: 2b02 cmp r3, #2 800c546: d105 bne.n 800c554 memcpy(&PSU_02, RxData, 8); 800c548: 4b7d ldr r3, [pc, #500] @ (800c740 ) 800c54a: 4a7a ldr r2, [pc, #488] @ (800c734 ) 800c54c: e892 0003 ldmia.w r2, {r0, r1} 800c550: e883 0003 stmia.w r3, {r0, r1} } if(CanId.command==0x04){ 800c554: 7abb ldrb r3, [r7, #10] 800c556: f003 033f and.w r3, r3, #63 @ 0x3f 800c55a: b2db uxtb r3, r3 800c55c: 2b04 cmp r3, #4 800c55e: d119 bne.n 800c594 memcpy(&PSU_04, RxData, 8); 800c560: 4b78 ldr r3, [pc, #480] @ (800c744 ) 800c562: 4a74 ldr r2, [pc, #464] @ (800c734 ) 800c564: e892 0003 ldmia.w r2, {r0, r1} 800c568: e883 0003 stmia.w r3, {r0, r1} PSU0.tempAmbient = PSU_04.moduleTemperature; 800c56c: 4b75 ldr r3, [pc, #468] @ (800c744 ) 800c56e: 791b ldrb r3, [r3, #4] 800c570: 461a mov r2, r3 800c572: 4b75 ldr r3, [pc, #468] @ (800c748 ) 800c574: 61da str r2, [r3, #28] PSU0.status0.raw = PSU_04.modularForm0; 800c576: 4b73 ldr r3, [pc, #460] @ (800c744 ) 800c578: 7a1a ldrb r2, [r3, #8] 800c57a: 4b73 ldr r3, [pc, #460] @ (800c748 ) 800c57c: f883 2020 strb.w r2, [r3, #32] PSU0.status1.raw = PSU_04.modularForm1; 800c580: 4b70 ldr r3, [pc, #448] @ (800c744 ) 800c582: 79da ldrb r2, [r3, #7] 800c584: 4b70 ldr r3, [pc, #448] @ (800c748 ) 800c586: f883 2021 strb.w r2, [r3, #33] @ 0x21 PSU0.status2.raw = PSU_04.modularForm2; 800c58a: 4b6e ldr r3, [pc, #440] @ (800c744 ) 800c58c: 799a ldrb r2, [r3, #6] 800c58e: 4b6e ldr r3, [pc, #440] @ (800c748 ) 800c590: f883 2022 strb.w r2, [r3, #34] @ 0x22 } if(CanId.command==0x06){ 800c594: 7abb ldrb r3, [r7, #10] 800c596: f003 033f and.w r3, r3, #63 @ 0x3f 800c59a: b2db uxtb r3, r3 800c59c: 2b06 cmp r3, #6 800c59e: d123 bne.n 800c5e8 memcpy(&PSU_06, RxData, 8); 800c5a0: 4b6a ldr r3, [pc, #424] @ (800c74c ) 800c5a2: 4a64 ldr r2, [pc, #400] @ (800c734 ) 800c5a4: e892 0003 ldmia.w r2, {r0, r1} 800c5a8: e883 0003 stmia.w r3, {r0, r1} PSU_06.VAB = PSU_06.VABLo+(PSU_06.VABHi<<8); 800c5ac: 4b67 ldr r3, [pc, #412] @ (800c74c ) 800c5ae: 785b ldrb r3, [r3, #1] 800c5b0: 461a mov r2, r3 800c5b2: 4b66 ldr r3, [pc, #408] @ (800c74c ) 800c5b4: 781b ldrb r3, [r3, #0] 800c5b6: 021b lsls r3, r3, #8 800c5b8: 4413 add r3, r2 800c5ba: 461a mov r2, r3 800c5bc: 4b63 ldr r3, [pc, #396] @ (800c74c ) 800c5be: 609a str r2, [r3, #8] PSU_06.VBC = PSU_06.VBCLo+(PSU_06.VBCHi<<8); 800c5c0: 4b62 ldr r3, [pc, #392] @ (800c74c ) 800c5c2: 78db ldrb r3, [r3, #3] 800c5c4: 461a mov r2, r3 800c5c6: 4b61 ldr r3, [pc, #388] @ (800c74c ) 800c5c8: 789b ldrb r3, [r3, #2] 800c5ca: 021b lsls r3, r3, #8 800c5cc: 4413 add r3, r2 800c5ce: 461a mov r2, r3 800c5d0: 4b5e ldr r3, [pc, #376] @ (800c74c ) 800c5d2: 60da str r2, [r3, #12] PSU_06.VCA = PSU_06.VCALo+(PSU_06.VCAHi<<8); 800c5d4: 4b5d ldr r3, [pc, #372] @ (800c74c ) 800c5d6: 795b ldrb r3, [r3, #5] 800c5d8: 461a mov r2, r3 800c5da: 4b5c ldr r3, [pc, #368] @ (800c74c ) 800c5dc: 791b ldrb r3, [r3, #4] 800c5de: 021b lsls r3, r3, #8 800c5e0: 4413 add r3, r2 800c5e2: 461a mov r2, r3 800c5e4: 4b59 ldr r3, [pc, #356] @ (800c74c ) 800c5e6: 611a str r2, [r3, #16] } if(CanId.command==0x08){ 800c5e8: 7abb ldrb r3, [r7, #10] 800c5ea: f003 033f and.w r3, r3, #63 @ 0x3f 800c5ee: b2db uxtb r3, r3 800c5f0: 2b08 cmp r3, #8 800c5f2: d105 bne.n 800c600 memcpy(&PSU_08, RxData, 8); 800c5f4: 4b56 ldr r3, [pc, #344] @ (800c750 ) 800c5f6: 4a4f ldr r2, [pc, #316] @ (800c734 ) 800c5f8: e892 0003 ldmia.w r2, {r0, r1} 800c5fc: e883 0003 stmia.w r3, {r0, r1} } if(CanId.command==0x09){ 800c600: 7abb ldrb r3, [r7, #10] 800c602: f003 033f and.w r3, r3, #63 @ 0x3f 800c606: b2db uxtb r3, r3 800c608: 2b09 cmp r3, #9 800c60a: f040 808f bne.w 800c72c memcpy(&PSU_09, RxData, 8); 800c60e: 4b51 ldr r3, [pc, #324] @ (800c754 ) 800c610: 4a48 ldr r2, [pc, #288] @ (800c734 ) 800c612: e892 0003 ldmia.w r2, {r0, r1} 800c616: e883 0003 stmia.w r3, {r0, r1} PSU_09.moduleNCurrent = PSU_09.moduleNCurrent_[3]; 800c61a: 4b4e ldr r3, [pc, #312] @ (800c754 ) 800c61c: 79db ldrb r3, [r3, #7] 800c61e: 461a mov r2, r3 800c620: 4b4c ldr r3, [pc, #304] @ (800c754 ) 800c622: 60da str r2, [r3, #12] PSU_09.moduleNCurrent |= PSU_09.moduleNCurrent_[2]<<8; 800c624: 4b4b ldr r3, [pc, #300] @ (800c754 ) 800c626: 68da ldr r2, [r3, #12] 800c628: 4b4a ldr r3, [pc, #296] @ (800c754 ) 800c62a: 799b ldrb r3, [r3, #6] 800c62c: 021b lsls r3, r3, #8 800c62e: 4313 orrs r3, r2 800c630: 4a48 ldr r2, [pc, #288] @ (800c754 ) 800c632: 60d3 str r3, [r2, #12] PSU_09.moduleNCurrent |= PSU_09.moduleNCurrent_[1]<<16; 800c634: 4b47 ldr r3, [pc, #284] @ (800c754 ) 800c636: 68da ldr r2, [r3, #12] 800c638: 4b46 ldr r3, [pc, #280] @ (800c754 ) 800c63a: 795b ldrb r3, [r3, #5] 800c63c: 041b lsls r3, r3, #16 800c63e: 4313 orrs r3, r2 800c640: 4a44 ldr r2, [pc, #272] @ (800c754 ) 800c642: 60d3 str r3, [r2, #12] PSU_09.moduleNCurrent |= PSU_09.moduleNCurrent_[0]<<24; 800c644: 4b43 ldr r3, [pc, #268] @ (800c754 ) 800c646: 68da ldr r2, [r3, #12] 800c648: 4b42 ldr r3, [pc, #264] @ (800c754 ) 800c64a: 791b ldrb r3, [r3, #4] 800c64c: 061b lsls r3, r3, #24 800c64e: 4313 orrs r3, r2 800c650: 4a40 ldr r2, [pc, #256] @ (800c754 ) 800c652: 60d3 str r3, [r2, #12] PSU_09.moduleNVoltage = PSU_09.moduleNVoltage_[3]; 800c654: 4b3f ldr r3, [pc, #252] @ (800c754 ) 800c656: 78db ldrb r3, [r3, #3] 800c658: 461a mov r2, r3 800c65a: 4b3e ldr r3, [pc, #248] @ (800c754 ) 800c65c: 609a str r2, [r3, #8] PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[2]<<8; 800c65e: 4b3d ldr r3, [pc, #244] @ (800c754 ) 800c660: 689a ldr r2, [r3, #8] 800c662: 4b3c ldr r3, [pc, #240] @ (800c754 ) 800c664: 789b ldrb r3, [r3, #2] 800c666: 021b lsls r3, r3, #8 800c668: 4313 orrs r3, r2 800c66a: 4a3a ldr r2, [pc, #232] @ (800c754 ) 800c66c: 6093 str r3, [r2, #8] PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[1]<<16; 800c66e: 4b39 ldr r3, [pc, #228] @ (800c754 ) 800c670: 689a ldr r2, [r3, #8] 800c672: 4b38 ldr r3, [pc, #224] @ (800c754 ) 800c674: 785b ldrb r3, [r3, #1] 800c676: 041b lsls r3, r3, #16 800c678: 4313 orrs r3, r2 800c67a: 4a36 ldr r2, [pc, #216] @ (800c754 ) 800c67c: 6093 str r3, [r2, #8] PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[0]<<24; 800c67e: 4b35 ldr r3, [pc, #212] @ (800c754 ) 800c680: 689a ldr r2, [r3, #8] 800c682: 4b34 ldr r3, [pc, #208] @ (800c754 ) 800c684: 781b ldrb r3, [r3, #0] 800c686: 061b lsls r3, r3, #24 800c688: 4313 orrs r3, r2 800c68a: 4a32 ldr r2, [pc, #200] @ (800c754 ) 800c68c: 6093 str r3, [r2, #8] // PSU_09 -> PSU -> CONN (один модуль) { uint16_t v = PSU_09.moduleNVoltage / 1000; 800c68e: 4b31 ldr r3, [pc, #196] @ (800c754 ) 800c690: 689b ldr r3, [r3, #8] 800c692: 4a31 ldr r2, [pc, #196] @ (800c758 ) 800c694: fba2 2303 umull r2, r3, r2, r3 800c698: 099b lsrs r3, r3, #6 800c69a: 81fb strh r3, [r7, #14] int16_t i = PSU_09.moduleNCurrent / 100; 800c69c: 4b2d ldr r3, [pc, #180] @ (800c754 ) 800c69e: 68db ldr r3, [r3, #12] 800c6a0: 4a2e ldr r2, [pc, #184] @ (800c75c ) 800c6a2: fba2 2303 umull r2, r3, r2, r3 800c6a6: 095b lsrs r3, r3, #5 800c6a8: 81bb strh r3, [r7, #12] // Обновляем модель PSU0 по телеметрии PSU0.outputVoltage = v; 800c6aa: 4a27 ldr r2, [pc, #156] @ (800c748 ) 800c6ac: 89fb ldrh r3, [r7, #14] 800c6ae: 8053 strh r3, [r2, #2] PSU0.outputCurrent = i; 800c6b0: 4a25 ldr r2, [pc, #148] @ (800c748 ) 800c6b2: 89bb ldrh r3, [r7, #12] 800c6b4: 8093 strh r3, [r2, #4] PSU0.PSU_enabled = (v >= PSU_VOLTAGE_THRESHOLD); 800c6b6: 89fb ldrh r3, [r7, #14] 800c6b8: 2b13 cmp r3, #19 800c6ba: bf8c ite hi 800c6bc: 2301 movhi r3, #1 800c6be: 2300 movls r3, #0 800c6c0: b2db uxtb r3, r3 800c6c2: 461a mov r2, r3 800c6c4: 4b20 ldr r3, [pc, #128] @ (800c748 ) 800c6c6: 729a strb r2, [r3, #10] PSU0.online = 1; 800c6c8: 4b1f ldr r3, [pc, #124] @ (800c748 ) 800c6ca: 2201 movs r2, #1 800c6cc: 721a strb r2, [r3, #8] PSU0.temperature = PSU_04.moduleTemperature; 800c6ce: 4b1d ldr r3, [pc, #116] @ (800c744 ) 800c6d0: 791a ldrb r2, [r3, #4] 800c6d2: 4b1d ldr r3, [pc, #116] @ (800c748 ) 800c6d4: 719a strb r2, [r3, #6] // Экспортируем значения из PSU0 в CONN только, // когда модуль хотя бы в состоянии READY и выше if(PSU0.state >= PSU_READY){ 800c6d6: 4b1c ldr r3, [pc, #112] @ (800c748 ) 800c6d8: 79db ldrb r3, [r3, #7] 800c6da: 2b01 cmp r3, #1 800c6dc: d926 bls.n 800c72c CONN.MeasuredVoltage = PSU0.outputVoltage; 800c6de: 4b1a ldr r3, [pc, #104] @ (800c748 ) 800c6e0: 885a ldrh r2, [r3, #2] 800c6e2: 4b1f ldr r3, [pc, #124] @ (800c760 ) 800c6e4: f8a3 2013 strh.w r2, [r3, #19] CONN.MeasuredCurrent = PSU0.outputCurrent; 800c6e8: 4b17 ldr r3, [pc, #92] @ (800c748 ) 800c6ea: f9b3 3004 ldrsh.w r3, [r3, #4] 800c6ee: b29a uxth r2, r3 800c6f0: 4b1b ldr r3, [pc, #108] @ (800c760 ) 800c6f2: f8a3 2015 strh.w r2, [r3, #21] CONN.Power = CONN.MeasuredCurrent * CONN.MeasuredVoltage / 10; 800c6f6: 4b1a ldr r3, [pc, #104] @ (800c760 ) 800c6f8: f8b3 3015 ldrh.w r3, [r3, #21] 800c6fc: b29b uxth r3, r3 800c6fe: 461a mov r2, r3 800c700: 4b17 ldr r3, [pc, #92] @ (800c760 ) 800c702: f8b3 3013 ldrh.w r3, [r3, #19] 800c706: b29b uxth r3, r3 800c708: fb02 f303 mul.w r3, r2, r3 800c70c: 4a15 ldr r2, [pc, #84] @ (800c764 ) 800c70e: fb82 1203 smull r1, r2, r2, r3 800c712: 1092 asrs r2, r2, #2 800c714: 17db asrs r3, r3, #31 800c716: 1ad3 subs r3, r2, r3 800c718: 461a mov r2, r3 800c71a: 4b11 ldr r3, [pc, #68] @ (800c760 ) 800c71c: f8c3 2003 str.w r2, [r3, #3] CONN.outputEnabled = PSU0.PSU_enabled; 800c720: 4b09 ldr r3, [pc, #36] @ (800c748 ) 800c722: 7a9a ldrb r2, [r3, #10] 800c724: 4b0e ldr r3, [pc, #56] @ (800c760 ) 800c726: 761a strb r2, [r3, #24] 800c728: e000 b.n 800c72c if(CanId.source != 0) return; 800c72a: bf00 nop } } } } } 800c72c: 3710 adds r7, #16 800c72e: 46bd mov sp, r7 800c730: bd80 pop {r7, pc} 800c732: bf00 nop 800c734: 20000a58 .word 0x20000a58 800c738: 20000a3c .word 0x20000a3c 800c73c: 20000a38 .word 0x20000a38 800c740: 200009d0 .word 0x200009d0 800c744: 200009dc .word 0x200009dc 800c748: 20000a14 .word 0x20000a14 800c74c: 200009e8 .word 0x200009e8 800c750: 200009fc .word 0x200009fc 800c754: 20000a04 .word 0x20000a04 800c758: 10624dd3 .word 0x10624dd3 800c75c: 51eb851f .word 0x51eb851f 800c760: 200002f8 .word 0x200002f8 800c764: 66666667 .word 0x66666667 0800c768 : void PSU_CAN_FilterInit(){ 800c768: b580 push {r7, lr} 800c76a: b08a sub sp, #40 @ 0x28 800c76c: af00 add r7, sp, #0 CAN_FilterTypeDef sFilterConfig; sFilterConfig.FilterBank = 14; 800c76e: 230e movs r3, #14 800c770: 617b str r3, [r7, #20] sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; 800c772: 2300 movs r3, #0 800c774: 61bb str r3, [r7, #24] sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; 800c776: 2301 movs r3, #1 800c778: 61fb str r3, [r7, #28] sFilterConfig.FilterIdHigh = 0x0000; 800c77a: 2300 movs r3, #0 800c77c: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = 0x0000; 800c77e: 2300 movs r3, #0 800c780: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 800c782: 2300 movs r3, #0 800c784: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = 0x0000; 800c786: 2300 movs r3, #0 800c788: 60fb str r3, [r7, #12] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0; 800c78a: 2300 movs r3, #0 800c78c: 613b str r3, [r7, #16] sFilterConfig.FilterActivation = ENABLE; 800c78e: 2301 movs r3, #1 800c790: 623b str r3, [r7, #32] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO1; 800c792: 2301 movs r3, #1 800c794: 613b str r3, [r7, #16] sFilterConfig.SlaveStartFilterBank = 14; 800c796: 230e movs r3, #14 800c798: 627b str r3, [r7, #36] @ 0x24 if(HAL_CAN_ConfigFilter(&hcan2, &sFilterConfig) != HAL_OK) 800c79a: 463b mov r3, r7 800c79c: 4619 mov r1, r3 800c79e: 4806 ldr r0, [pc, #24] @ (800c7b8 ) 800c7a0: f002 fecc bl 800f53c 800c7a4: 4603 mov r3, r0 800c7a6: 2b00 cmp r3, #0 800c7a8: d001 beq.n 800c7ae { Error_Handler(); 800c7aa: f7ff fe1d bl 800c3e8 } } 800c7ae: bf00 nop 800c7b0: 3728 adds r7, #40 @ 0x28 800c7b2: 46bd mov sp, r7 800c7b4: bd80 pop {r7, pc} 800c7b6: bf00 nop 800c7b8: 200002cc .word 0x200002cc 0800c7bc : void PSU_Init(){ 800c7bc: b580 push {r7, lr} 800c7be: af00 add r7, sp, #0 HAL_CAN_Stop(&hcan2); 800c7c0: 4813 ldr r0, [pc, #76] @ (800c810 ) 800c7c2: f002 ffdf bl 800f784 MX_CAN2_Init(); 800c7c6: f7fd f981 bl 8009acc PSU_CAN_FilterInit(); 800c7ca: f7ff ffcd bl 800c768 HAL_CAN_Start(&hcan2); 800c7ce: 4810 ldr r0, [pc, #64] @ (800c810 ) 800c7d0: f002 ff94 bl 800f6fc HAL_CAN_ActivateNotification(&hcan2, CAN_IT_RX_FIFO1_MSG_PENDING /* | CAN_IT_ERROR | CAN_IT_BUSOFF | CAN_IT_LAST_ERROR_CODE | CAN_IT_TX_MAILBOX_EMPTY*/); 800c7d4: 2110 movs r1, #16 800c7d6: 480e ldr r0, [pc, #56] @ (800c810 ) 800c7d8: f003 fa41 bl 800fc5e memset(&PSU0, 0, sizeof(PSU0)); 800c7dc: 2224 movs r2, #36 @ 0x24 800c7de: 2100 movs r1, #0 800c7e0: 480c ldr r0, [pc, #48] @ (800c814 ) 800c7e2: f007 fcdb bl 801419c PSU0.state = PSU_UNREADY; 800c7e6: 4b0b ldr r3, [pc, #44] @ (800c814 ) 800c7e8: 2200 movs r2, #0 800c7ea: 71da strb r2, [r3, #7] PSU0.statetick = HAL_GetTick(); 800c7ec: f002 f876 bl 800e8dc 800c7f0: 4603 mov r3, r0 800c7f2: 4a08 ldr r2, [pc, #32] @ (800c814 ) 800c7f4: 6113 str r3, [r2, #16] PSU0.power_limit = PSU_MAX_POWER; // kW 800c7f6: 4b07 ldr r3, [pc, #28] @ (800c814 ) 800c7f8: f247 5230 movw r2, #30000 @ 0x7530 800c7fc: 615a str r2, [r3, #20] PSU0.hv_mode = 0; 800c7fe: 4b05 ldr r3, [pc, #20] @ (800c814 ) 800c800: 2200 movs r2, #0 800c802: 761a strb r2, [r3, #24] PSU_Enable(0, 0); 800c804: 2100 movs r1, #0 800c806: 2000 movs r0, #0 800c808: f000 f806 bl 800c818 } 800c80c: bf00 nop 800c80e: bd80 pop {r7, pc} 800c810: 200002cc .word 0x200002cc 800c814: 20000a14 .word 0x20000a14 0800c818 : void PSU_Enable(uint8_t addr, uint8_t enable){ 800c818: b580 push {r7, lr} 800c81a: b084 sub sp, #16 800c81c: af00 add r7, sp, #0 800c81e: 4603 mov r3, r0 800c820: 460a mov r2, r1 800c822: 71fb strb r3, [r7, #7] 800c824: 4613 mov r3, r2 800c826: 71bb strb r3, [r7, #6] PSU_1A_t data; memset(&data, 0, sizeof(data)); 800c828: f107 0308 add.w r3, r7, #8 800c82c: 2208 movs r2, #8 800c82e: 2100 movs r1, #0 800c830: 4618 mov r0, r3 800c832: f007 fcb3 bl 801419c /* Для DC30 поддерживается только один модуль с адресом 0 */ if(addr != 0) return; 800c836: 79fb ldrb r3, [r7, #7] 800c838: 2b00 cmp r3, #0 800c83a: d115 bne.n 800c868 if(PSU0.online == 0) return; 800c83c: 4b0d ldr r3, [pc, #52] @ (800c874 ) 800c83e: 7a1b ldrb r3, [r3, #8] 800c840: 2b00 cmp r3, #0 800c842: d013 beq.n 800c86c data.enable = !enable; 800c844: 79bb ldrb r3, [r7, #6] 800c846: 2b00 cmp r3, #0 800c848: bf0c ite eq 800c84a: 2301 moveq r3, #1 800c84c: 2300 movne r3, #0 800c84e: b2db uxtb r3, r3 800c850: 723b strb r3, [r7, #8] PSU_SendCmd(0xF0, addr, 0x1A, &data); 800c852: 79f9 ldrb r1, [r7, #7] 800c854: f107 0308 add.w r3, r7, #8 800c858: 221a movs r2, #26 800c85a: 20f0 movs r0, #240 @ 0xf0 800c85c: f000 f866 bl 800c92c ED_Delay(CAN_DELAY); 800c860: 2014 movs r0, #20 800c862: f7ff fc93 bl 800c18c 800c866: e002 b.n 800c86e if(addr != 0) return; 800c868: bf00 nop 800c86a: e000 b.n 800c86e if(PSU0.online == 0) return; 800c86c: bf00 nop } 800c86e: 3710 adds r7, #16 800c870: 46bd mov sp, r7 800c872: bd80 pop {r7, pc} 800c874: 20000a14 .word 0x20000a14 0800c878 : memset(&data, 0, sizeof(data)); data.enable = !enable; if(addr != 0) return; PSU_SendCmd(0xF0, addr, 0x1D, &data); } void PSU_SetVoltageCurrent(uint8_t addr, uint16_t voltage, uint16_t current){ 800c878: b580 push {r7, lr} 800c87a: b086 sub sp, #24 800c87c: af00 add r7, sp, #0 800c87e: 4603 mov r3, r0 800c880: 71fb strb r3, [r7, #7] 800c882: 460b mov r3, r1 800c884: 80bb strh r3, [r7, #4] 800c886: 4613 mov r3, r2 800c888: 807b strh r3, [r7, #2] PSU_1C_t data; memset(&data, 0, sizeof(data)); 800c88a: f107 0308 add.w r3, r7, #8 800c88e: 2208 movs r2, #8 800c890: 2100 movs r1, #0 800c892: 4618 mov r0, r3 800c894: f007 fc82 bl 801419c if(addr != 0) return; 800c898: 79fb ldrb r3, [r7, #7] 800c89a: 2b00 cmp r3, #0 800c89c: d140 bne.n 800c920 if(voltage 800c8a4: 2396 movs r3, #150 @ 0x96 800c8a6: 80bb strh r3, [r7, #4] if((PSU0.hv_mode==0) && voltage>499) voltage = 499; 800c8a8: 4b1f ldr r3, [pc, #124] @ (800c928 ) 800c8aa: 7e1b ldrb r3, [r3, #24] 800c8ac: 2b00 cmp r3, #0 800c8ae: d106 bne.n 800c8be 800c8b0: 88bb ldrh r3, [r7, #4] 800c8b2: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800c8b6: d302 bcc.n 800c8be 800c8b8: f240 13f3 movw r3, #499 @ 0x1f3 800c8bc: 80bb strh r3, [r7, #4] uint32_t current_ma = current * 100; 800c8be: 887b ldrh r3, [r7, #2] 800c8c0: 2264 movs r2, #100 @ 0x64 800c8c2: fb02 f303 mul.w r3, r2, r3 800c8c6: 617b str r3, [r7, #20] uint32_t voltage_mv = voltage * 1000; 800c8c8: 88bb ldrh r3, [r7, #4] 800c8ca: f44f 727a mov.w r2, #1000 @ 0x3e8 800c8ce: fb02 f303 mul.w r3, r2, r3 800c8d2: 613b str r3, [r7, #16] data.moduleCurrentTotal[0] = (current_ma >> 24) & 0xFF; 800c8d4: 697b ldr r3, [r7, #20] 800c8d6: 0e1b lsrs r3, r3, #24 800c8d8: b2db uxtb r3, r3 800c8da: 733b strb r3, [r7, #12] data.moduleCurrentTotal[1] = (current_ma >> 16) & 0xFF; 800c8dc: 697b ldr r3, [r7, #20] 800c8de: 0c1b lsrs r3, r3, #16 800c8e0: b2db uxtb r3, r3 800c8e2: 737b strb r3, [r7, #13] data.moduleCurrentTotal[2] = (current_ma >> 8) & 0xFF; 800c8e4: 697b ldr r3, [r7, #20] 800c8e6: 0a1b lsrs r3, r3, #8 800c8e8: b2db uxtb r3, r3 800c8ea: 73bb strb r3, [r7, #14] data.moduleCurrentTotal[3] = (current_ma >> 0) & 0xFF; 800c8ec: 697b ldr r3, [r7, #20] 800c8ee: b2db uxtb r3, r3 800c8f0: 73fb strb r3, [r7, #15] data.moduleVoltage[0] = (voltage_mv >> 24) & 0xFF; 800c8f2: 693b ldr r3, [r7, #16] 800c8f4: 0e1b lsrs r3, r3, #24 800c8f6: b2db uxtb r3, r3 800c8f8: 723b strb r3, [r7, #8] data.moduleVoltage[1] = (voltage_mv >> 16) & 0xFF; 800c8fa: 693b ldr r3, [r7, #16] 800c8fc: 0c1b lsrs r3, r3, #16 800c8fe: b2db uxtb r3, r3 800c900: 727b strb r3, [r7, #9] data.moduleVoltage[2] = (voltage_mv >> 8) & 0xFF; 800c902: 693b ldr r3, [r7, #16] 800c904: 0a1b lsrs r3, r3, #8 800c906: b2db uxtb r3, r3 800c908: 72bb strb r3, [r7, #10] data.moduleVoltage[3] = (voltage_mv >> 0) & 0xFF; 800c90a: 693b ldr r3, [r7, #16] 800c90c: b2db uxtb r3, r3 800c90e: 72fb strb r3, [r7, #11] PSU_SendCmd(0xF0, addr, 0x1C, &data); 800c910: 79f9 ldrb r1, [r7, #7] 800c912: f107 0308 add.w r3, r7, #8 800c916: 221c movs r2, #28 800c918: 20f0 movs r0, #240 @ 0xf0 800c91a: f000 f807 bl 800c92c 800c91e: e000 b.n 800c922 if(addr != 0) return; 800c920: bf00 nop } 800c922: 3718 adds r7, #24 800c924: 46bd mov sp, r7 800c926: bd80 pop {r7, pc} 800c928: 20000a14 .word 0x20000a14 0800c92c : void PSU_SendCmd(uint8_t source, uint8_t destination, uint8_t cmd, void *data){ 800c92c: b580 push {r7, lr} 800c92e: b08c sub sp, #48 @ 0x30 800c930: af00 add r7, sp, #0 800c932: 603b str r3, [r7, #0] 800c934: 4603 mov r3, r0 800c936: 71fb strb r3, [r7, #7] 800c938: 460b mov r3, r1 800c93a: 71bb strb r3, [r7, #6] 800c93c: 4613 mov r3, r2 800c93e: 717b strb r3, [r7, #5] CanId_t CanId; CanId.source = source; 800c940: 79fb ldrb r3, [r7, #7] 800c942: f887 3028 strb.w r3, [r7, #40] @ 0x28 CanId.destination = destination; 800c946: 79bb ldrb r3, [r7, #6] 800c948: f887 3029 strb.w r3, [r7, #41] @ 0x29 CanId.command = cmd; 800c94c: 797b ldrb r3, [r7, #5] 800c94e: f003 033f and.w r3, r3, #63 @ 0x3f 800c952: b2da uxtb r2, r3 800c954: f897 302a ldrb.w r3, [r7, #42] @ 0x2a 800c958: f362 0305 bfi r3, r2, #0, #6 800c95c: f887 302a strb.w r3, [r7, #42] @ 0x2a CanId.device = 0x0A; 800c960: 8d7b ldrh r3, [r7, #42] @ 0x2a 800c962: 220a movs r2, #10 800c964: f362 1389 bfi r3, r2, #6, #4 800c968: 857b strh r3, [r7, #42] @ 0x2a int8_t retry_counter = 10; 800c96a: 230a movs r3, #10 800c96c: f887 302f strb.w r3, [r7, #47] @ 0x2f CAN_TxHeaderTypeDef tx_header; uint32_t tx_mailbox; HAL_StatusTypeDef CAN_result; memcpy(&tx_header.ExtId, &CanId, sizeof(CanId_t)); 800c970: 6abb ldr r3, [r7, #40] @ 0x28 800c972: 617b str r3, [r7, #20] tx_header.RTR = CAN_RTR_DATA; 800c974: 2300 movs r3, #0 800c976: 61fb str r3, [r7, #28] tx_header.IDE = CAN_ID_EXT; 800c978: 2304 movs r3, #4 800c97a: 61bb str r3, [r7, #24] tx_header.DLC = 8; 800c97c: 2308 movs r3, #8 800c97e: 623b str r3, [r7, #32] while(retry_counter>0){ //если буфер полон, ждем пока он освободится 800c980: e01e b.n 800c9c0 if (HAL_CAN_GetTxMailboxesFreeLevel(&hcan2) > 0){ 800c982: 4814 ldr r0, [pc, #80] @ (800c9d4 ) 800c984: f003 f816 bl 800f9b4 800c988: 4603 mov r3, r0 800c98a: 2b00 cmp r3, #0 800c98c: d00e beq.n 800c9ac /* отправка сообщения */ CAN_result = HAL_CAN_AddTxMessage(&hcan2, &tx_header, (uint8_t*)data, &tx_mailbox); 800c98e: f107 030c add.w r3, r7, #12 800c992: f107 0110 add.w r1, r7, #16 800c996: 683a ldr r2, [r7, #0] 800c998: 480e ldr r0, [pc, #56] @ (800c9d4 ) 800c99a: f002 ff3c bl 800f816 800c99e: 4603 mov r3, r0 800c9a0: f887 302e strb.w r3, [r7, #46] @ 0x2e /* если отправка удалась, выход */ if(CAN_result == HAL_OK) { 800c9a4: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 800c9a8: 2b00 cmp r3, #0 800c9aa: d00e beq.n 800c9ca return; retry_counter = 0; } } ED_Delay(1); 800c9ac: 2001 movs r0, #1 800c9ae: f7ff fbed bl 800c18c retry_counter--; 800c9b2: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f 800c9b6: b2db uxtb r3, r3 800c9b8: 3b01 subs r3, #1 800c9ba: b2db uxtb r3, r3 800c9bc: f887 302f strb.w r3, [r7, #47] @ 0x2f while(retry_counter>0){ //если буфер полон, ждем пока он освободится 800c9c0: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f 800c9c4: 2b00 cmp r3, #0 800c9c6: dcdc bgt.n 800c982 800c9c8: e000 b.n 800c9cc return; 800c9ca: bf00 nop } } 800c9cc: 3730 adds r7, #48 @ 0x30 800c9ce: 46bd mov sp, r7 800c9d0: bd80 pop {r7, pc} 800c9d2: bf00 nop 800c9d4: 200002cc .word 0x200002cc 0800c9d8 : uint32_t max(uint32_t a, uint32_t b){ if(a>b) return a; else return b; } void PSU_ReadWrite(){ 800c9d8: b580 push {r7, lr} 800c9da: b082 sub sp, #8 800c9dc: af00 add r7, sp, #0 uint8_t zero_data[8] = {0,0,0,0,0,0,0,0}; 800c9de: 463b mov r3, r7 800c9e0: 2200 movs r2, #0 800c9e2: 601a str r2, [r3, #0] 800c9e4: 605a str r2, [r3, #4] PSU_SendCmd(0xF0, 0, 0x04, zero_data);ED_Delay(CAN_DELAY); 800c9e6: 463b mov r3, r7 800c9e8: 2204 movs r2, #4 800c9ea: 2100 movs r1, #0 800c9ec: 20f0 movs r0, #240 @ 0xf0 800c9ee: f7ff ff9d bl 800c92c 800c9f2: 2014 movs r0, #20 800c9f4: f7ff fbca bl 800c18c PSU_SendCmd(0xF0, 0, 0x06, zero_data);ED_Delay(CAN_DELAY); 800c9f8: 463b mov r3, r7 800c9fa: 2206 movs r2, #6 800c9fc: 2100 movs r1, #0 800c9fe: 20f0 movs r0, #240 @ 0xf0 800ca00: f7ff ff94 bl 800c92c 800ca04: 2014 movs r0, #20 800ca06: f7ff fbc1 bl 800c18c // PSU_SendCmd(0xF0, 0, 0x08, zero_data);ED_Delay(CAN_DELAY); PSU_SendCmd(0xF0, 0, 0x09, zero_data);ED_Delay(CAN_DELAY); 800ca0a: 463b mov r3, r7 800ca0c: 2209 movs r2, #9 800ca0e: 2100 movs r1, #0 800ca10: 20f0 movs r0, #240 @ 0xf0 800ca12: f7ff ff8b bl 800c92c 800ca16: 2014 movs r0, #20 800ca18: f7ff fbb8 bl 800c18c // Power Limit if ((CONN.WantedCurrent/10) * CONN.MeasuredVoltage > PSU0.power_limit){ 800ca1c: 4b39 ldr r3, [pc, #228] @ (800cb04 ) 800ca1e: f8b3 301b ldrh.w r3, [r3, #27] 800ca22: b29b uxth r3, r3 800ca24: 4a38 ldr r2, [pc, #224] @ (800cb08 ) 800ca26: fba2 2303 umull r2, r3, r2, r3 800ca2a: 08db lsrs r3, r3, #3 800ca2c: b29b uxth r3, r3 800ca2e: 461a mov r2, r3 800ca30: 4b34 ldr r3, [pc, #208] @ (800cb04 ) 800ca32: f8b3 3013 ldrh.w r3, [r3, #19] 800ca36: b29b uxth r3, r3 800ca38: fb02 f303 mul.w r3, r2, r3 800ca3c: 461a mov r2, r3 800ca3e: 4b33 ldr r3, [pc, #204] @ (800cb0c ) 800ca40: 695b ldr r3, [r3, #20] 800ca42: 429a cmp r2, r3 800ca44: d911 bls.n 800ca6a CONN.RequestedCurrent = PSU0.power_limit * 10 / CONN.MeasuredVoltage; 800ca46: 4b31 ldr r3, [pc, #196] @ (800cb0c ) 800ca48: 695a ldr r2, [r3, #20] 800ca4a: 4613 mov r3, r2 800ca4c: 009b lsls r3, r3, #2 800ca4e: 4413 add r3, r2 800ca50: 005b lsls r3, r3, #1 800ca52: 461a mov r2, r3 800ca54: 4b2b ldr r3, [pc, #172] @ (800cb04 ) 800ca56: f8b3 3013 ldrh.w r3, [r3, #19] 800ca5a: b29b uxth r3, r3 800ca5c: fbb2 f3f3 udiv r3, r2, r3 800ca60: b29a uxth r2, r3 800ca62: 4b28 ldr r3, [pc, #160] @ (800cb04 ) 800ca64: f8a3 2011 strh.w r2, [r3, #17] 800ca68: e006 b.n 800ca78 }else{ CONN.RequestedCurrent = CONN.WantedCurrent; 800ca6a: 4b26 ldr r3, [pc, #152] @ (800cb04 ) 800ca6c: f8b3 301b ldrh.w r3, [r3, #27] 800ca70: b29a uxth r2, r3 800ca72: 4b24 ldr r3, [pc, #144] @ (800cb04 ) 800ca74: f8a3 2011 strh.w r2, [r3, #17] } if(CONN.RequestedCurrent > (PSU_MAX_CURRENT*10)){ 800ca78: 4b22 ldr r3, [pc, #136] @ (800cb04 ) 800ca7a: f8b3 3011 ldrh.w r3, [r3, #17] 800ca7e: b29b uxth r3, r3 800ca80: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800ca84: d908 bls.n 800ca98 CONN.RequestedCurrent = PSU_MAX_CURRENT*10; 800ca86: 4b1f ldr r3, [pc, #124] @ (800cb04 ) 800ca88: 2200 movs r2, #0 800ca8a: f062 0217 orn r2, r2, #23 800ca8e: 745a strb r2, [r3, #17] 800ca90: 2200 movs r2, #0 800ca92: f042 0203 orr.w r2, r2, #3 800ca96: 749a strb r2, [r3, #18] } CONN.RequestedPower = CONN.RequestedCurrent * CONN.RequestedVoltage / 10; 800ca98: 4b1a ldr r3, [pc, #104] @ (800cb04 ) 800ca9a: f8b3 3011 ldrh.w r3, [r3, #17] 800ca9e: b29b uxth r3, r3 800caa0: 461a mov r2, r3 800caa2: 4b18 ldr r3, [pc, #96] @ (800cb04 ) 800caa4: f8b3 300f ldrh.w r3, [r3, #15] 800caa8: b29b uxth r3, r3 800caaa: fb02 f303 mul.w r3, r2, r3 800caae: 4a18 ldr r2, [pc, #96] @ (800cb10 ) 800cab0: fb82 1203 smull r1, r2, r2, r3 800cab4: 1092 asrs r2, r2, #2 800cab6: 17db asrs r3, r3, #31 800cab8: 1ad3 subs r3, r2, r3 800caba: 461a mov r2, r3 800cabc: 4b11 ldr r3, [pc, #68] @ (800cb04 ) 800cabe: f8c3 200b str.w r2, [r3, #11] if(PSU0.ready){ 800cac2: 4b12 ldr r3, [pc, #72] @ (800cb0c ) 800cac4: 7a5b ldrb r3, [r3, #9] 800cac6: 2b00 cmp r3, #0 800cac8: d018 beq.n 800cafc PSU_SetVoltageCurrent(0, CONN.RequestedVoltage, CONN.RequestedCurrent); // Normal mode 800caca: 4b0e ldr r3, [pc, #56] @ (800cb04 ) 800cacc: f8b3 300f ldrh.w r3, [r3, #15] 800cad0: b29b uxth r3, r3 800cad2: 4a0c ldr r2, [pc, #48] @ (800cb04 ) 800cad4: f8b2 2011 ldrh.w r2, [r2, #17] 800cad8: b292 uxth r2, r2 800cada: 4619 mov r1, r3 800cadc: 2000 movs r0, #0 800cade: f7ff fecb bl 800c878 ED_Delay(CAN_DELAY); 800cae2: 2014 movs r0, #20 800cae4: f7ff fb52 bl 800c18c if(CONN.MeasuredVoltage>490) PSU0.hv_mode = 1; 800cae8: 4b06 ldr r3, [pc, #24] @ (800cb04 ) 800caea: f8b3 3013 ldrh.w r3, [r3, #19] 800caee: b29b uxth r3, r3 800caf0: f5b3 7ff5 cmp.w r3, #490 @ 0x1ea 800caf4: d902 bls.n 800cafc 800caf6: 4b05 ldr r3, [pc, #20] @ (800cb0c ) 800caf8: 2201 movs r2, #1 800cafa: 761a strb r2, [r3, #24] } // PSU_SetHVMode(0, PSU0.hv_mode); // auto set, no need // ED_Delay(CAN_DELAY); } 800cafc: bf00 nop 800cafe: 3708 adds r7, #8 800cb00: 46bd mov sp, r7 800cb02: bd80 pop {r7, pc} 800cb04: 200002f8 .word 0x200002f8 800cb08: cccccccd .word 0xcccccccd 800cb0c: 20000a14 .word 0x20000a14 800cb10: 66666667 .word 0x66666667 0800cb14 : void PSU_Task(void){ 800cb14: b598 push {r3, r4, r7, lr} 800cb16: af00 add r7, sp, #0 static uint32_t psu_on_tick = 0; static uint32_t dc_on_tick = 0; static uint32_t cont_ok_tick = 0; // Обновляем ONLINE/READY по таймауту if((HAL_GetTick() - can_lastpacket) > PSU_ONLINE_TIMEOUT){ 800cb18: f001 fee0 bl 800e8dc 800cb1c: 4602 mov r2, r0 800cb1e: 4bb4 ldr r3, [pc, #720] @ (800cdf0 ) 800cb20: 681b ldr r3, [r3, #0] 800cb22: 1ad3 subs r3, r2, r3 800cb24: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800cb28: d920 bls.n 800cb6c PSU0.online = 0; 800cb2a: 4bb2 ldr r3, [pc, #712] @ (800cdf4 ) 800cb2c: 2200 movs r2, #0 800cb2e: 721a strb r2, [r3, #8] PSU0.PSU_enabled = 0; 800cb30: 4bb0 ldr r3, [pc, #704] @ (800cdf4 ) 800cb32: 2200 movs r2, #0 800cb34: 729a strb r2, [r3, #10] PSU_04.moduleTemperature = 0; 800cb36: 4bb0 ldr r3, [pc, #704] @ (800cdf8 ) 800cb38: 2200 movs r2, #0 800cb3a: 711a strb r2, [r3, #4] PSU_04.modularForm0 = 0; 800cb3c: 4bae ldr r3, [pc, #696] @ (800cdf8 ) 800cb3e: 2200 movs r2, #0 800cb40: 721a strb r2, [r3, #8] PSU_04.modularForm1 = 0; 800cb42: 4bad ldr r3, [pc, #692] @ (800cdf8 ) 800cb44: 2200 movs r2, #0 800cb46: 71da strb r2, [r3, #7] PSU_04.modularForm2 = 0; 800cb48: 4bab ldr r3, [pc, #684] @ (800cdf8 ) 800cb4a: 2200 movs r2, #0 800cb4c: 719a strb r2, [r3, #6] PSU_06.VAB = 0; 800cb4e: 4bab ldr r3, [pc, #684] @ (800cdfc ) 800cb50: 2200 movs r2, #0 800cb52: 609a str r2, [r3, #8] PSU_06.VBC = 0; 800cb54: 4ba9 ldr r3, [pc, #676] @ (800cdfc ) 800cb56: 2200 movs r2, #0 800cb58: 60da str r2, [r3, #12] PSU_06.VCA = 0; 800cb5a: 4ba8 ldr r3, [pc, #672] @ (800cdfc ) 800cb5c: 2200 movs r2, #0 800cb5e: 611a str r2, [r3, #16] PSU_09.moduleNCurrent = 0; 800cb60: 4ba7 ldr r3, [pc, #668] @ (800ce00 ) 800cb62: 2200 movs r2, #0 800cb64: 60da str r2, [r3, #12] PSU_09.moduleNVoltage = 0; 800cb66: 4ba6 ldr r3, [pc, #664] @ (800ce00 ) 800cb68: 2200 movs r2, #0 800cb6a: 609a str r2, [r3, #8] } if(!PSU0.online || !PSU0.enableAC){ 800cb6c: 4ba1 ldr r3, [pc, #644] @ (800cdf4 ) 800cb6e: 7a1b ldrb r3, [r3, #8] 800cb70: 2b00 cmp r3, #0 800cb72: d003 beq.n 800cb7c 800cb74: 4b9f ldr r3, [pc, #636] @ (800cdf4 ) 800cb76: 781b ldrb r3, [r3, #0] 800cb78: 2b00 cmp r3, #0 800cb7a: d10c bne.n 800cb96 CONN.MeasuredVoltage = 0; 800cb7c: 4ba1 ldr r3, [pc, #644] @ (800ce04 ) 800cb7e: 2200 movs r2, #0 800cb80: 74da strb r2, [r3, #19] 800cb82: 2200 movs r2, #0 800cb84: 751a strb r2, [r3, #20] CONN.MeasuredCurrent = 0; 800cb86: 4b9f ldr r3, [pc, #636] @ (800ce04 ) 800cb88: 2200 movs r2, #0 800cb8a: 755a strb r2, [r3, #21] 800cb8c: 2200 movs r2, #0 800cb8e: 759a strb r2, [r3, #22] CONN.outputEnabled = 0; 800cb90: 4b9c ldr r3, [pc, #624] @ (800ce04 ) 800cb92: 2200 movs r2, #0 800cb94: 761a strb r2, [r3, #24] } // Управление AC-контактором с задержкой отключения 1 минута if(CONN.EvConnected){ 800cb96: 4b9b ldr r3, [pc, #620] @ (800ce04 ) 800cb98: 7f9b ldrb r3, [r3, #30] 800cb9a: 2b00 cmp r3, #0 800cb9c: d00c beq.n 800cbb8 RELAY_Write(RELAY_AC, 1); 800cb9e: 2101 movs r1, #1 800cba0: 2004 movs r0, #4 800cba2: f7fc fda3 bl 80096ec psu_on_tick = HAL_GetTick(); 800cba6: f001 fe99 bl 800e8dc 800cbaa: 4603 mov r3, r0 800cbac: 4a96 ldr r2, [pc, #600] @ (800ce08 ) 800cbae: 6013 str r3, [r2, #0] PSU0.enableAC = 1; 800cbb0: 4b90 ldr r3, [pc, #576] @ (800cdf4 ) 800cbb2: 2201 movs r2, #1 800cbb4: 701a strb r2, [r3, #0] 800cbb6: e010 b.n 800cbda }else{ if((HAL_GetTick() - psu_on_tick) > 1 * 60000){ 800cbb8: f001 fe90 bl 800e8dc 800cbbc: 4602 mov r2, r0 800cbbe: 4b92 ldr r3, [pc, #584] @ (800ce08 ) 800cbc0: 681b ldr r3, [r3, #0] 800cbc2: 1ad3 subs r3, r2, r3 800cbc4: f64e 2260 movw r2, #60000 @ 0xea60 800cbc8: 4293 cmp r3, r2 800cbca: d906 bls.n 800cbda RELAY_Write(RELAY_AC, 0); 800cbcc: 2100 movs r1, #0 800cbce: 2004 movs r0, #4 800cbd0: f7fc fd8c bl 80096ec PSU0.enableAC = 0; 800cbd4: 4b87 ldr r3, [pc, #540] @ (800cdf4 ) 800cbd6: 2200 movs r2, #0 800cbd8: 701a strb r2, [r3, #0] } } // Текущее состояние DC-контактора по обратной связи PSU0.CONT_enabled = IN_ReadInput(IN_CONT_FB_DC); 800cbda: 2005 movs r0, #5 800cbdc: f7fc fdfa bl 80097d4 800cbe0: 4603 mov r3, r0 800cbe2: 461a mov r2, r3 800cbe4: 4b83 ldr r3, [pc, #524] @ (800cdf4 ) 800cbe6: 72da strb r2, [r3, #11] // Обновляем ready с учётом ошибок if(PSU0.online && !PSU0.cont_fault && PSU0.enableAC){ 800cbe8: 4b82 ldr r3, [pc, #520] @ (800cdf4 ) 800cbea: 7a1b ldrb r3, [r3, #8] 800cbec: 2b00 cmp r3, #0 800cbee: d007 beq.n 800cc00 800cbf0: 4b80 ldr r3, [pc, #512] @ (800cdf4 ) 800cbf2: 7b1b ldrb r3, [r3, #12] 800cbf4: 2b00 cmp r3, #0 800cbf6: d103 bne.n 800cc00 800cbf8: 4b7e ldr r3, [pc, #504] @ (800cdf4 ) 800cbfa: 781b ldrb r3, [r3, #0] 800cbfc: 2b00 cmp r3, #0 800cbfe: d102 bne.n 800cc06 // PSU0.ready = 1; }else{ PSU0.ready = 0; 800cc00: 4b7c ldr r3, [pc, #496] @ (800cdf4 ) 800cc02: 2200 movs r2, #0 800cc04: 725a strb r2, [r3, #9] } switch(PSU0.state){ 800cc06: 4b7b ldr r3, [pc, #492] @ (800cdf4 ) 800cc08: 79db ldrb r3, [r3, #7] 800cc0a: 2b09 cmp r3, #9 800cc0c: f200 8155 bhi.w 800ceba 800cc10: a201 add r2, pc, #4 @ (adr r2, 800cc18 ) 800cc12: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800cc16: bf00 nop 800cc18: 0800cc41 .word 0x0800cc41 800cc1c: 0800cc75 .word 0x0800cc75 800cc20: 0800cc91 .word 0x0800cc91 800cc24: 0800ccc9 .word 0x0800ccc9 800cc28: 0800cd17 .word 0x0800cd17 800cc2c: 0800cd59 .word 0x0800cd59 800cc30: 0800cdc3 .word 0x0800cdc3 800cc34: 0800ce6d .word 0x0800ce6d 800cc38: 0800ce1d .word 0x0800ce1d 800cc3c: 0800cea7 .word 0x0800cea7 case PSU_UNREADY: PSU0.enableOutput = 0; 800cc40: 4b6c ldr r3, [pc, #432] @ (800cdf4 ) 800cc42: 2200 movs r2, #0 800cc44: 705a strb r2, [r3, #1] RELAY_Write(RELAY_DC, 0); 800cc46: 2100 movs r1, #0 800cc48: 2003 movs r0, #3 800cc4a: f7fc fd4f bl 80096ec if(PSU0.online && PSU0.enableAC && !PSU0.cont_fault){ 800cc4e: 4b69 ldr r3, [pc, #420] @ (800cdf4 ) 800cc50: 7a1b ldrb r3, [r3, #8] 800cc52: 2b00 cmp r3, #0 800cc54: f000 8135 beq.w 800cec2 800cc58: 4b66 ldr r3, [pc, #408] @ (800cdf4 ) 800cc5a: 781b ldrb r3, [r3, #0] 800cc5c: 2b00 cmp r3, #0 800cc5e: f000 8130 beq.w 800cec2 800cc62: 4b64 ldr r3, [pc, #400] @ (800cdf4 ) 800cc64: 7b1b ldrb r3, [r3, #12] 800cc66: 2b00 cmp r3, #0 800cc68: f040 812b bne.w 800cec2 PSU_SwitchState(PSU_INITIALIZING); 800cc6c: 2001 movs r0, #1 800cc6e: f7ff fc2b bl 800c4c8 } break; 800cc72: e126 b.n 800cec2 case PSU_INITIALIZING: if(PSU_StateTime() > 4000){ // Wait 4s for PSU to initialize 800cc74: f7ff fc3c bl 800c4f0 800cc78: 4603 mov r3, r0 800cc7a: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800cc7e: f240 8122 bls.w 800cec6 PSU0.ready = 1; 800cc82: 4b5c ldr r3, [pc, #368] @ (800cdf4 ) 800cc84: 2201 movs r2, #1 800cc86: 725a strb r2, [r3, #9] PSU_SwitchState(PSU_READY); 800cc88: 2002 movs r0, #2 800cc8a: f7ff fc1d bl 800c4c8 } break; 800cc8e: e11a b.n 800cec6 case PSU_READY: // модуль готов, но выключен PSU0.hv_mode = 0; 800cc90: 4b58 ldr r3, [pc, #352] @ (800cdf4 ) 800cc92: 2200 movs r2, #0 800cc94: 761a strb r2, [r3, #24] RELAY_Write(RELAY_DC, 0); 800cc96: 2100 movs r1, #0 800cc98: 2003 movs r0, #3 800cc9a: f7fc fd27 bl 80096ec if(!PSU0.ready){ 800cc9e: 4b55 ldr r3, [pc, #340] @ (800cdf4 ) 800cca0: 7a5b ldrb r3, [r3, #9] 800cca2: 2b00 cmp r3, #0 800cca4: d103 bne.n 800ccae PSU_SwitchState(PSU_UNREADY); 800cca6: 2000 movs r0, #0 800cca8: f7ff fc0e bl 800c4c8 break; 800ccac: e11c b.n 800cee8 } if(CONN.EnableOutput){ 800ccae: 4b55 ldr r3, [pc, #340] @ (800ce04 ) 800ccb0: 7ddb ldrb r3, [r3, #23] 800ccb2: 2b00 cmp r3, #0 800ccb4: f000 8109 beq.w 800ceca PSU_Enable(0, 1); 800ccb8: 2101 movs r1, #1 800ccba: 2000 movs r0, #0 800ccbc: f7ff fdac bl 800c818 PSU_SwitchState(PSU_WAIT_ACK_ON); 800ccc0: 2003 movs r0, #3 800ccc2: f7ff fc01 bl 800c4c8 } break; 800ccc6: e100 b.n 800ceca case PSU_WAIT_ACK_ON: if(PSU0.PSU_enabled && PSU0.ready){ 800ccc8: 4b4a ldr r3, [pc, #296] @ (800cdf4 ) 800ccca: 7a9b ldrb r3, [r3, #10] 800cccc: 2b00 cmp r3, #0 800ccce: d00c beq.n 800ccea 800ccd0: 4b48 ldr r3, [pc, #288] @ (800cdf4 ) 800ccd2: 7a5b ldrb r3, [r3, #9] 800ccd4: 2b00 cmp r3, #0 800ccd6: d008 beq.n 800ccea dc_on_tick = HAL_GetTick(); 800ccd8: f001 fe00 bl 800e8dc 800ccdc: 4603 mov r3, r0 800ccde: 4a4b ldr r2, [pc, #300] @ (800ce0c ) 800cce0: 6013 str r3, [r2, #0] PSU_SwitchState(PSU_CONT_WAIT_ACK_ON); 800cce2: 2004 movs r0, #4 800cce4: f7ff fbf0 bl 800c4c8 PSU0.psu_fault = 1; CONN.chargingError = CONN_ERR_PSU_FAULT; PSU_SwitchState(PSU_UNREADY); log_printf(LOG_ERR, "PSU on timeout\n"); } break; 800cce8: e0f1 b.n 800cece }else if(PSU_StateTime() > 10000){ 800ccea: f7ff fc01 bl 800c4f0 800ccee: 4603 mov r3, r0 800ccf0: f242 7210 movw r2, #10000 @ 0x2710 800ccf4: 4293 cmp r3, r2 800ccf6: f240 80ea bls.w 800cece PSU0.psu_fault = 1; 800ccfa: 4b3e ldr r3, [pc, #248] @ (800cdf4 ) 800ccfc: 2201 movs r2, #1 800ccfe: 735a strb r2, [r3, #13] CONN.chargingError = CONN_ERR_PSU_FAULT; 800cd00: 4b40 ldr r3, [pc, #256] @ (800ce04 ) 800cd02: 220a movs r2, #10 800cd04: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_UNREADY); 800cd06: 2000 movs r0, #0 800cd08: f7ff fbde bl 800c4c8 log_printf(LOG_ERR, "PSU on timeout\n"); 800cd0c: 4940 ldr r1, [pc, #256] @ (800ce10 ) 800cd0e: 2004 movs r0, #4 800cd10: f7fe fc28 bl 800b564 break; 800cd14: e0db b.n 800cece case PSU_CONT_WAIT_ACK_ON: // замыкаем DC-контактор и ждём подтверждение RELAY_Write(RELAY_DC, 1); 800cd16: 2101 movs r1, #1 800cd18: 2003 movs r0, #3 800cd1a: f7fc fce7 bl 80096ec if(PSU0.CONT_enabled){ 800cd1e: 4b35 ldr r3, [pc, #212] @ (800cdf4 ) 800cd20: 7adb ldrb r3, [r3, #11] 800cd22: 2b00 cmp r3, #0 800cd24: d003 beq.n 800cd2e PSU_SwitchState(PSU_CONNECTED); 800cd26: 2005 movs r0, #5 800cd28: f7ff fbce bl 800c4c8 PSU0.cont_fault = 1; CONN.chargingError = CONN_ERR_CONTACTOR; PSU_SwitchState(PSU_CURRENT_DROP); log_printf(LOG_ERR, "Contactor error, stopping...\n"); } break; 800cd2c: e0d1 b.n 800ced2 }else if(PSU_StateTime() > 1000){ 800cd2e: f7ff fbdf bl 800c4f0 800cd32: 4603 mov r3, r0 800cd34: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800cd38: f240 80cb bls.w 800ced2 PSU0.cont_fault = 1; 800cd3c: 4b2d ldr r3, [pc, #180] @ (800cdf4 ) 800cd3e: 2201 movs r2, #1 800cd40: 731a strb r2, [r3, #12] CONN.chargingError = CONN_ERR_CONTACTOR; 800cd42: 4b30 ldr r3, [pc, #192] @ (800ce04 ) 800cd44: 2207 movs r2, #7 800cd46: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_CURRENT_DROP); 800cd48: 2006 movs r0, #6 800cd4a: f7ff fbbd bl 800c4c8 log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800cd4e: 4931 ldr r1, [pc, #196] @ (800ce14 ) 800cd50: 2004 movs r0, #4 800cd52: f7fe fc07 bl 800b564 break; 800cd56: e0bc b.n 800ced2 case PSU_CONNECTED: // Основное рабочее состояние if(!CONN.EnableOutput || !PSU0.ready){ 800cd58: 4b2a ldr r3, [pc, #168] @ (800ce04 ) 800cd5a: 7ddb ldrb r3, [r3, #23] 800cd5c: 2b00 cmp r3, #0 800cd5e: d003 beq.n 800cd68 800cd60: 4b24 ldr r3, [pc, #144] @ (800cdf4 ) 800cd62: 7a5b ldrb r3, [r3, #9] 800cd64: 2b00 cmp r3, #0 800cd66: d103 bne.n 800cd70 PSU_SwitchState(PSU_CURRENT_DROP); 800cd68: 2006 movs r0, #6 800cd6a: f7ff fbad bl 800c4c8 break; 800cd6e: e0bb b.n 800cee8 } // контроль контактора: 1 c таймаут if (IN_ReadInput(IN_CONT_FB_DC) != RELAY_Read(RELAY_DC)){ 800cd70: 2005 movs r0, #5 800cd72: f7fc fd2f bl 80097d4 800cd76: 4603 mov r3, r0 800cd78: 461c mov r4, r3 800cd7a: 2003 movs r0, #3 800cd7c: f7fc fd1a bl 80097b4 800cd80: 4603 mov r3, r0 800cd82: 429c cmp r4, r3 800cd84: d017 beq.n 800cdb6 if((HAL_GetTick() - cont_ok_tick) > 1000){ 800cd86: f001 fda9 bl 800e8dc 800cd8a: 4602 mov r2, r0 800cd8c: 4b22 ldr r3, [pc, #136] @ (800ce18 ) 800cd8e: 681b ldr r3, [r3, #0] 800cd90: 1ad3 subs r3, r2, r3 800cd92: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800cd96: f240 809e bls.w 800ced6 CONN.chargingError = CONN_ERR_CONTACTOR; 800cd9a: 4b1a ldr r3, [pc, #104] @ (800ce04 ) 800cd9c: 2207 movs r2, #7 800cd9e: 775a strb r2, [r3, #29] PSU0.cont_fault = 1; 800cda0: 4b14 ldr r3, [pc, #80] @ (800cdf4 ) 800cda2: 2201 movs r2, #1 800cda4: 731a strb r2, [r3, #12] PSU_SwitchState(PSU_CURRENT_DROP); 800cda6: 2006 movs r0, #6 800cda8: f7ff fb8e bl 800c4c8 log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800cdac: 4919 ldr r1, [pc, #100] @ (800ce14 ) 800cdae: 2004 movs r0, #4 800cdb0: f7fe fbd8 bl 800b564 } }else{ cont_ok_tick = HAL_GetTick(); } break; 800cdb4: e08f b.n 800ced6 cont_ok_tick = HAL_GetTick(); 800cdb6: f001 fd91 bl 800e8dc 800cdba: 4603 mov r3, r0 800cdbc: 4a16 ldr r2, [pc, #88] @ (800ce18 ) 800cdbe: 6013 str r3, [r2, #0] break; 800cdc0: e089 b.n 800ced6 case PSU_CURRENT_DROP: // снижаем ток до нуля перед отключением DC CONN.RequestedCurrent = 0; 800cdc2: 4b10 ldr r3, [pc, #64] @ (800ce04 ) 800cdc4: 2200 movs r2, #0 800cdc6: 745a strb r2, [r3, #17] 800cdc8: 2200 movs r2, #0 800cdca: 749a strb r2, [r3, #18] // если ток действительно упал или вышло время, отключаем DC if((CONN.MeasuredCurrent < 30) || (PSU_StateTime() > 5000)){ 800cdcc: 4b0d ldr r3, [pc, #52] @ (800ce04 ) 800cdce: f8b3 3015 ldrh.w r3, [r3, #21] 800cdd2: b29b uxth r3, r3 800cdd4: 2b1d cmp r3, #29 800cdd6: d906 bls.n 800cde6 800cdd8: f7ff fb8a bl 800c4f0 800cddc: 4603 mov r3, r0 800cdde: f241 3288 movw r2, #5000 @ 0x1388 800cde2: 4293 cmp r3, r2 800cde4: d979 bls.n 800ceda PSU_SwitchState(PSU_CONT_WAIT_ACK_OFF); 800cde6: 2008 movs r0, #8 800cde8: f7ff fb6e bl 800c4c8 } break; 800cdec: e075 b.n 800ceda 800cdee: bf00 nop 800cdf0: 20000a38 .word 0x20000a38 800cdf4: 20000a14 .word 0x20000a14 800cdf8: 200009dc .word 0x200009dc 800cdfc: 200009e8 .word 0x200009e8 800ce00: 20000a04 .word 0x20000a04 800ce04: 200002f8 .word 0x200002f8 800ce08: 20000a60 .word 0x20000a60 800ce0c: 20000a64 .word 0x20000a64 800ce10: 08016c94 .word 0x08016c94 800ce14: 08016ca4 .word 0x08016ca4 800ce18: 20000a68 .word 0x20000a68 case PSU_CONT_WAIT_ACK_OFF: RELAY_Write(RELAY_DC, 0); 800ce1c: 2100 movs r1, #0 800ce1e: 2003 movs r0, #3 800ce20: f7fc fc64 bl 80096ec if(!PSU0.CONT_enabled){ 800ce24: 4b31 ldr r3, [pc, #196] @ (800ceec ) 800ce26: 7adb ldrb r3, [r3, #11] 800ce28: 2b00 cmp r3, #0 800ce2a: d107 bne.n 800ce3c PSU_Enable(0, 0); 800ce2c: 2100 movs r1, #0 800ce2e: 2000 movs r0, #0 800ce30: f7ff fcf2 bl 800c818 PSU_SwitchState(PSU_WAIT_ACK_OFF); 800ce34: 2007 movs r0, #7 800ce36: f7ff fb47 bl 800c4c8 CONN.chargingError = CONN_ERR_CONTACTOR; PSU_Enable(0, 0); PSU_SwitchState(PSU_WAIT_ACK_OFF); log_printf(LOG_ERR, "Contactor error, stopping...\n"); } break; 800ce3a: e050 b.n 800cede }else if(PSU_StateTime() > 1000){ 800ce3c: f7ff fb58 bl 800c4f0 800ce40: 4603 mov r3, r0 800ce42: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800ce46: d94a bls.n 800cede PSU0.cont_fault = 1; 800ce48: 4b28 ldr r3, [pc, #160] @ (800ceec ) 800ce4a: 2201 movs r2, #1 800ce4c: 731a strb r2, [r3, #12] CONN.chargingError = CONN_ERR_CONTACTOR; 800ce4e: 4b28 ldr r3, [pc, #160] @ (800cef0 ) 800ce50: 2207 movs r2, #7 800ce52: 775a strb r2, [r3, #29] PSU_Enable(0, 0); 800ce54: 2100 movs r1, #0 800ce56: 2000 movs r0, #0 800ce58: f7ff fcde bl 800c818 PSU_SwitchState(PSU_WAIT_ACK_OFF); 800ce5c: 2007 movs r0, #7 800ce5e: f7ff fb33 bl 800c4c8 log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800ce62: 4924 ldr r1, [pc, #144] @ (800cef4 ) 800ce64: 2004 movs r0, #4 800ce66: f7fe fb7d bl 800b564 break; 800ce6a: e038 b.n 800cede case PSU_WAIT_ACK_OFF: if(!PSU0.PSU_enabled){ 800ce6c: 4b1f ldr r3, [pc, #124] @ (800ceec ) 800ce6e: 7a9b ldrb r3, [r3, #10] 800ce70: 2b00 cmp r3, #0 800ce72: d103 bne.n 800ce7c PSU_SwitchState(PSU_OFF_PAUSE); 800ce74: 2009 movs r0, #9 800ce76: f7ff fb27 bl 800c4c8 PSU0.psu_fault = 1; CONN.chargingError = CONN_ERR_PSU_FAULT; PSU_SwitchState(PSU_UNREADY); log_printf(LOG_ERR, "PSU off timeout\n"); } break; 800ce7a: e032 b.n 800cee2 }else if(PSU_StateTime() > 10000){ 800ce7c: f7ff fb38 bl 800c4f0 800ce80: 4603 mov r3, r0 800ce82: f242 7210 movw r2, #10000 @ 0x2710 800ce86: 4293 cmp r3, r2 800ce88: d92b bls.n 800cee2 PSU0.psu_fault = 1; 800ce8a: 4b18 ldr r3, [pc, #96] @ (800ceec ) 800ce8c: 2201 movs r2, #1 800ce8e: 735a strb r2, [r3, #13] CONN.chargingError = CONN_ERR_PSU_FAULT; 800ce90: 4b17 ldr r3, [pc, #92] @ (800cef0 ) 800ce92: 220a movs r2, #10 800ce94: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_UNREADY); 800ce96: 2000 movs r0, #0 800ce98: f7ff fb16 bl 800c4c8 log_printf(LOG_ERR, "PSU off timeout\n"); 800ce9c: 4916 ldr r1, [pc, #88] @ (800cef8 ) 800ce9e: 2004 movs r0, #4 800cea0: f7fe fb60 bl 800b564 break; 800cea4: e01d b.n 800cee2 case PSU_OFF_PAUSE: if(PSU_StateTime() > 4000){ 800cea6: f7ff fb23 bl 800c4f0 800ceaa: 4603 mov r3, r0 800ceac: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800ceb0: d919 bls.n 800cee6 PSU_SwitchState(PSU_READY); 800ceb2: 2002 movs r0, #2 800ceb4: f7ff fb08 bl 800c4c8 } break; 800ceb8: e015 b.n 800cee6 default: PSU_SwitchState(PSU_UNREADY); 800ceba: 2000 movs r0, #0 800cebc: f7ff fb04 bl 800c4c8 break; 800cec0: e012 b.n 800cee8 break; 800cec2: bf00 nop 800cec4: e010 b.n 800cee8 break; 800cec6: bf00 nop 800cec8: e00e b.n 800cee8 break; 800ceca: bf00 nop 800cecc: e00c b.n 800cee8 break; 800cece: bf00 nop 800ced0: e00a b.n 800cee8 break; 800ced2: bf00 nop 800ced4: e008 b.n 800cee8 break; 800ced6: bf00 nop 800ced8: e006 b.n 800cee8 break; 800ceda: bf00 nop 800cedc: e004 b.n 800cee8 break; 800cede: bf00 nop 800cee0: e002 b.n 800cee8 break; 800cee2: bf00 nop 800cee4: e000 b.n 800cee8 break; 800cee6: bf00 nop } } 800cee8: bf00 nop 800ceea: bd98 pop {r3, r4, r7, pc} 800ceec: 20000a14 .word 0x20000a14 800cef0: 200002f8 .word 0x200002f8 800cef4: 08016ca4 .word 0x08016ca4 800cef8: 08016cc4 .word 0x08016cc4 0800cefc : .Th = 10, .Tf = 50, .Tl = 0, }; void LED_Write(){ 800cefc: b580 push {r7, lr} 800cefe: af00 add r7, sp, #0 if(CONN.chargingError != CONN_NO_ERROR){ 800cf00: 4b34 ldr r3, [pc, #208] @ (800cfd4 ) 800cf02: 7f5b ldrb r3, [r3, #29] 800cf04: 2b00 cmp r3, #0 800cf06: d003 beq.n 800cf10 LED_SetColor(&color_error); 800cf08: 4833 ldr r0, [pc, #204] @ (800cfd8 ) 800cf0a: f000 f91f bl 800d14c return; 800cf0e: e05f b.n 800cfd0 } switch(CONN.connState){ 800cf10: 4b30 ldr r3, [pc, #192] @ (800cfd4 ) 800cf12: 785b ldrb r3, [r3, #1] 800cf14: 2b0d cmp r3, #13 800cf16: d857 bhi.n 800cfc8 800cf18: a201 add r2, pc, #4 @ (adr r2, 800cf20 ) 800cf1a: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800cf1e: bf00 nop 800cf20: 0800cf59 .word 0x0800cf59 800cf24: 0800cf61 .word 0x0800cf61 800cf28: 0800cf69 .word 0x0800cf69 800cf2c: 0800cf71 .word 0x0800cf71 800cf30: 0800cf79 .word 0x0800cf79 800cf34: 0800cf81 .word 0x0800cf81 800cf38: 0800cf89 .word 0x0800cf89 800cf3c: 0800cf91 .word 0x0800cf91 800cf40: 0800cf99 .word 0x0800cf99 800cf44: 0800cfa1 .word 0x0800cfa1 800cf48: 0800cfa9 .word 0x0800cfa9 800cf4c: 0800cfb1 .word 0x0800cfb1 800cf50: 0800cfb9 .word 0x0800cfb9 800cf54: 0800cfc1 .word 0x0800cfc1 case Unknown: LED_SetColor(&color_unknown); 800cf58: 4820 ldr r0, [pc, #128] @ (800cfdc ) 800cf5a: f000 f8f7 bl 800d14c break; 800cf5e: e037 b.n 800cfd0 case Unplugged: LED_SetColor(&color_unplugged); 800cf60: 481f ldr r0, [pc, #124] @ (800cfe0 ) 800cf62: f000 f8f3 bl 800d14c break; 800cf66: e033 b.n 800cfd0 case Disabled: LED_SetColor(&color_error); 800cf68: 481b ldr r0, [pc, #108] @ (800cfd8 ) 800cf6a: f000 f8ef bl 800d14c break; 800cf6e: e02f b.n 800cfd0 case Preparing: LED_SetColor(&color_preparing); 800cf70: 481c ldr r0, [pc, #112] @ (800cfe4 ) 800cf72: f000 f8eb bl 800d14c break; 800cf76: e02b b.n 800cfd0 case AuthRequired: LED_SetColor(&color_preparing); 800cf78: 481a ldr r0, [pc, #104] @ (800cfe4 ) 800cf7a: f000 f8e7 bl 800d14c break; 800cf7e: e027 b.n 800cfd0 case WaitingForEnergy: LED_SetColor(&color_charging); 800cf80: 4819 ldr r0, [pc, #100] @ (800cfe8 ) 800cf82: f000 f8e3 bl 800d14c break; 800cf86: e023 b.n 800cfd0 case ChargingPausedEV: LED_SetColor(&color_charging); 800cf88: 4817 ldr r0, [pc, #92] @ (800cfe8 ) 800cf8a: f000 f8df bl 800d14c break; 800cf8e: e01f b.n 800cfd0 case ChargingPausedEVSE: LED_SetColor(&color_charging); 800cf90: 4815 ldr r0, [pc, #84] @ (800cfe8 ) 800cf92: f000 f8db bl 800d14c break; 800cf96: e01b b.n 800cfd0 case Charging: LED_SetColor(&color_charging); 800cf98: 4813 ldr r0, [pc, #76] @ (800cfe8 ) 800cf9a: f000 f8d7 bl 800d14c break; 800cf9e: e017 b.n 800cfd0 case AuthTimeout: LED_SetColor(&color_finished); 800cfa0: 4812 ldr r0, [pc, #72] @ (800cfec ) 800cfa2: f000 f8d3 bl 800d14c break; 800cfa6: e013 b.n 800cfd0 case Finished: LED_SetColor(&color_finished); 800cfa8: 4810 ldr r0, [pc, #64] @ (800cfec ) 800cfaa: f000 f8cf bl 800d14c break; 800cfae: e00f b.n 800cfd0 case FinishedEVSE: LED_SetColor(&color_finished); 800cfb0: 480e ldr r0, [pc, #56] @ (800cfec ) 800cfb2: f000 f8cb bl 800d14c break; 800cfb6: e00b b.n 800cfd0 case FinishedEV: LED_SetColor(&color_finished); 800cfb8: 480c ldr r0, [pc, #48] @ (800cfec ) 800cfba: f000 f8c7 bl 800d14c break; 800cfbe: e007 b.n 800cfd0 case Replugging: LED_SetColor(&color_preparing); 800cfc0: 4808 ldr r0, [pc, #32] @ (800cfe4 ) 800cfc2: f000 f8c3 bl 800d14c break; 800cfc6: e003 b.n 800cfd0 default: LED_SetColor(&color_unknown); 800cfc8: 4804 ldr r0, [pc, #16] @ (800cfdc ) 800cfca: f000 f8bf bl 800d14c break; 800cfce: bf00 nop } } 800cfd0: bd80 pop {r7, pc} 800cfd2: bf00 nop 800cfd4: 200002f8 .word 0x200002f8 800cfd8: 20000054 .word 0x20000054 800cfdc: 20000018 .word 0x20000018 800cfe0: 20000024 .word 0x20000024 800cfe4: 20000030 .word 0x20000030 800cfe8: 2000003c .word 0x2000003c 800cfec: 20000048 .word 0x20000048 0800cff0 : void interpolateColors(RGB_t* color1, RGB_t* color2, uint16_t a, uint16_t b, RGB_t *result) { 800cff0: b480 push {r7} 800cff2: b087 sub sp, #28 800cff4: af00 add r7, sp, #0 800cff6: 60f8 str r0, [r7, #12] 800cff8: 60b9 str r1, [r7, #8] 800cffa: 4611 mov r1, r2 800cffc: 461a mov r2, r3 800cffe: 460b mov r3, r1 800d000: 80fb strh r3, [r7, #6] 800d002: 4613 mov r3, r2 800d004: 80bb strh r3, [r7, #4] // Проверяем, чтобы a не выходила за пределы диапазона if (a > b) a = b; 800d006: 88fa ldrh r2, [r7, #6] 800d008: 88bb ldrh r3, [r7, #4] 800d00a: 429a cmp r2, r3 800d00c: d901 bls.n 800d012 800d00e: 88bb ldrh r3, [r7, #4] 800d010: 80fb strh r3, [r7, #6] if(b==0) b = 1; 800d012: 88bb ldrh r3, [r7, #4] 800d014: 2b00 cmp r3, #0 800d016: d101 bne.n 800d01c 800d018: 2301 movs r3, #1 800d01a: 80bb strh r3, [r7, #4] // Вычисляем коэффициент смешивания в виде целого числа uint16_t t = (a * 255) / b; // t будет от 0 до 255 800d01c: 88fa ldrh r2, [r7, #6] 800d01e: 4613 mov r3, r2 800d020: 021b lsls r3, r3, #8 800d022: 1a9a subs r2, r3, r2 800d024: 88bb ldrh r3, [r7, #4] 800d026: fb92 f3f3 sdiv r3, r2, r3 800d02a: 82fb strh r3, [r7, #22] // Линейная интерполяция с использованием целых чисел result->R = (color1->R * (255 - t) + color2->R * t) / 255; 800d02c: 68fb ldr r3, [r7, #12] 800d02e: 781b ldrb r3, [r3, #0] 800d030: 461a mov r2, r3 800d032: 8afb ldrh r3, [r7, #22] 800d034: f1c3 03ff rsb r3, r3, #255 @ 0xff 800d038: fb03 f202 mul.w r2, r3, r2 800d03c: 68bb ldr r3, [r7, #8] 800d03e: 781b ldrb r3, [r3, #0] 800d040: 4619 mov r1, r3 800d042: 8afb ldrh r3, [r7, #22] 800d044: fb01 f303 mul.w r3, r1, r3 800d048: 4413 add r3, r2 800d04a: 4a20 ldr r2, [pc, #128] @ (800d0cc ) 800d04c: fb82 1203 smull r1, r2, r2, r3 800d050: 441a add r2, r3 800d052: 11d2 asrs r2, r2, #7 800d054: 17db asrs r3, r3, #31 800d056: 1ad3 subs r3, r2, r3 800d058: b2da uxtb r2, r3 800d05a: 6a3b ldr r3, [r7, #32] 800d05c: 701a strb r2, [r3, #0] result->G = (color1->G * (255 - t) + color2->G * t) / 255; 800d05e: 68fb ldr r3, [r7, #12] 800d060: 785b ldrb r3, [r3, #1] 800d062: 461a mov r2, r3 800d064: 8afb ldrh r3, [r7, #22] 800d066: f1c3 03ff rsb r3, r3, #255 @ 0xff 800d06a: fb03 f202 mul.w r2, r3, r2 800d06e: 68bb ldr r3, [r7, #8] 800d070: 785b ldrb r3, [r3, #1] 800d072: 4619 mov r1, r3 800d074: 8afb ldrh r3, [r7, #22] 800d076: fb01 f303 mul.w r3, r1, r3 800d07a: 4413 add r3, r2 800d07c: 4a13 ldr r2, [pc, #76] @ (800d0cc ) 800d07e: fb82 1203 smull r1, r2, r2, r3 800d082: 441a add r2, r3 800d084: 11d2 asrs r2, r2, #7 800d086: 17db asrs r3, r3, #31 800d088: 1ad3 subs r3, r2, r3 800d08a: b2da uxtb r2, r3 800d08c: 6a3b ldr r3, [r7, #32] 800d08e: 705a strb r2, [r3, #1] result->B = (color1->B * (255 - t) + color2->B * t) / 255; 800d090: 68fb ldr r3, [r7, #12] 800d092: 789b ldrb r3, [r3, #2] 800d094: 461a mov r2, r3 800d096: 8afb ldrh r3, [r7, #22] 800d098: f1c3 03ff rsb r3, r3, #255 @ 0xff 800d09c: fb03 f202 mul.w r2, r3, r2 800d0a0: 68bb ldr r3, [r7, #8] 800d0a2: 789b ldrb r3, [r3, #2] 800d0a4: 4619 mov r1, r3 800d0a6: 8afb ldrh r3, [r7, #22] 800d0a8: fb01 f303 mul.w r3, r1, r3 800d0ac: 4413 add r3, r2 800d0ae: 4a07 ldr r2, [pc, #28] @ (800d0cc ) 800d0b0: fb82 1203 smull r1, r2, r2, r3 800d0b4: 441a add r2, r3 800d0b6: 11d2 asrs r2, r2, #7 800d0b8: 17db asrs r3, r3, #31 800d0ba: 1ad3 subs r3, r2, r3 800d0bc: b2da uxtb r2, r3 800d0be: 6a3b ldr r3, [r7, #32] 800d0c0: 709a strb r2, [r3, #2] } 800d0c2: bf00 nop 800d0c4: 371c adds r7, #28 800d0c6: 46bd mov sp, r7 800d0c8: bc80 pop {r7} 800d0ca: 4770 bx lr 800d0cc: 80808081 .word 0x80808081 0800d0d0 : void RGB_SetColor(RGB_t *color){ 800d0d0: b480 push {r7} 800d0d2: b083 sub sp, #12 800d0d4: af00 add r7, sp, #0 800d0d6: 6078 str r0, [r7, #4] htim4.Instance->CCR2 = color->R * 100 / 255; 800d0d8: 687b ldr r3, [r7, #4] 800d0da: 781b ldrb r3, [r3, #0] 800d0dc: 461a mov r2, r3 800d0de: 2364 movs r3, #100 @ 0x64 800d0e0: fb02 f303 mul.w r3, r2, r3 800d0e4: 4a17 ldr r2, [pc, #92] @ (800d144 ) 800d0e6: fb82 1203 smull r1, r2, r2, r3 800d0ea: 441a add r2, r3 800d0ec: 11d2 asrs r2, r2, #7 800d0ee: 17db asrs r3, r3, #31 800d0f0: 1ad2 subs r2, r2, r3 800d0f2: 4b15 ldr r3, [pc, #84] @ (800d148 ) 800d0f4: 681b ldr r3, [r3, #0] 800d0f6: 639a str r2, [r3, #56] @ 0x38 htim4.Instance->CCR3 = color->G * 100 / 255; 800d0f8: 687b ldr r3, [r7, #4] 800d0fa: 785b ldrb r3, [r3, #1] 800d0fc: 461a mov r2, r3 800d0fe: 2364 movs r3, #100 @ 0x64 800d100: fb02 f303 mul.w r3, r2, r3 800d104: 4a0f ldr r2, [pc, #60] @ (800d144 ) 800d106: fb82 1203 smull r1, r2, r2, r3 800d10a: 441a add r2, r3 800d10c: 11d2 asrs r2, r2, #7 800d10e: 17db asrs r3, r3, #31 800d110: 1ad2 subs r2, r2, r3 800d112: 4b0d ldr r3, [pc, #52] @ (800d148 ) 800d114: 681b ldr r3, [r3, #0] 800d116: 63da str r2, [r3, #60] @ 0x3c htim4.Instance->CCR4 = color->B * 100 / 255; 800d118: 687b ldr r3, [r7, #4] 800d11a: 789b ldrb r3, [r3, #2] 800d11c: 461a mov r2, r3 800d11e: 2364 movs r3, #100 @ 0x64 800d120: fb02 f303 mul.w r3, r2, r3 800d124: 4a07 ldr r2, [pc, #28] @ (800d144 ) 800d126: fb82 1203 smull r1, r2, r2, r3 800d12a: 441a add r2, r3 800d12c: 11d2 asrs r2, r2, #7 800d12e: 17db asrs r3, r3, #31 800d130: 1ad2 subs r2, r2, r3 800d132: 4b05 ldr r3, [pc, #20] @ (800d148 ) 800d134: 681b ldr r3, [r3, #0] 800d136: 641a str r2, [r3, #64] @ 0x40 } 800d138: bf00 nop 800d13a: 370c adds r7, #12 800d13c: 46bd mov sp, r7 800d13e: bc80 pop {r7} 800d140: 4770 bx lr 800d142: bf00 nop 800d144: 80808081 .word 0x80808081 800d148: 20000f24 .word 0x20000f24 0800d14c : void LED_SetColor(RGB_Cycle_t *color){ 800d14c: b480 push {r7} 800d14e: b083 sub sp, #12 800d150: af00 add r7, sp, #0 800d152: 6078 str r0, [r7, #4] memcpy(&LED_Cycle, color, sizeof(RGB_Cycle_t)); 800d154: 4b05 ldr r3, [pc, #20] @ (800d16c ) 800d156: 687a ldr r2, [r7, #4] 800d158: 6810 ldr r0, [r2, #0] 800d15a: 6851 ldr r1, [r2, #4] 800d15c: c303 stmia r3!, {r0, r1} 800d15e: 8912 ldrh r2, [r2, #8] 800d160: 801a strh r2, [r3, #0] } 800d162: bf00 nop 800d164: 370c adds r7, #12 800d166: 46bd mov sp, r7 800d168: bc80 pop {r7} 800d16a: 4770 bx lr 800d16c: 20000a74 .word 0x20000a74 0800d170 : void LED_Init(){ 800d170: b580 push {r7, lr} 800d172: b082 sub sp, #8 800d174: af00 add r7, sp, #0 RGB_t color = {.R=0, .G=0, .B=0}; 800d176: 2300 movs r3, #0 800d178: 713b strb r3, [r7, #4] 800d17a: 2300 movs r3, #0 800d17c: 717b strb r3, [r7, #5] 800d17e: 2300 movs r3, #0 800d180: 71bb strb r3, [r7, #6] HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_2); 800d182: 2104 movs r1, #4 800d184: 4809 ldr r0, [pc, #36] @ (800d1ac ) 800d186: f004 fde5 bl 8011d54 HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); 800d18a: 2108 movs r1, #8 800d18c: 4807 ldr r0, [pc, #28] @ (800d1ac ) 800d18e: f004 fde1 bl 8011d54 HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_4); 800d192: 210c movs r1, #12 800d194: 4805 ldr r0, [pc, #20] @ (800d1ac ) 800d196: f004 fddd bl 8011d54 RGB_SetColor(&color); 800d19a: 1d3b adds r3, r7, #4 800d19c: 4618 mov r0, r3 800d19e: f7ff ff97 bl 800d0d0 } 800d1a2: bf00 nop 800d1a4: 3708 adds r7, #8 800d1a6: 46bd mov sp, r7 800d1a8: bd80 pop {r7, pc} 800d1aa: bf00 nop 800d1ac: 20000f24 .word 0x20000f24 0800d1b0 : // } // } // } // } void LED_Task(){ 800d1b0: b580 push {r7, lr} 800d1b2: b082 sub sp, #8 800d1b4: af02 add r7, sp, #8 static uint32_t led_tick; if((HAL_GetTick() - led_tick) > 20){ 800d1b6: f001 fb91 bl 800e8dc 800d1ba: 4602 mov r2, r0 800d1bc: 4b46 ldr r3, [pc, #280] @ (800d2d8 ) 800d1be: 681b ldr r3, [r3, #0] 800d1c0: 1ad3 subs r3, r2, r3 800d1c2: 2b14 cmp r3, #20 800d1c4: f240 8085 bls.w 800d2d2 led_tick = HAL_GetTick(); 800d1c8: f001 fb88 bl 800e8dc 800d1cc: 4603 mov r3, r0 800d1ce: 4a42 ldr r2, [pc, #264] @ (800d2d8 ) 800d1d0: 6013 str r3, [r2, #0] LED_State.tick++; 800d1d2: 4b42 ldr r3, [pc, #264] @ (800d2dc ) 800d1d4: 885b ldrh r3, [r3, #2] 800d1d6: 3301 adds r3, #1 800d1d8: b29a uxth r2, r3 800d1da: 4b40 ldr r3, [pc, #256] @ (800d2dc ) 800d1dc: 805a strh r2, [r3, #2] // LED_PhaseSync(led_n); switch(LED_State.state){ 800d1de: 4b3f ldr r3, [pc, #252] @ (800d2dc ) 800d1e0: 781b ldrb r3, [r3, #0] 800d1e2: 2b03 cmp r3, #3 800d1e4: d867 bhi.n 800d2b6 800d1e6: a201 add r2, pc, #4 @ (adr r2, 800d1ec ) 800d1e8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d1ec: 0800d1fd .word 0x0800d1fd 800d1f0: 0800d22f .word 0x0800d22f 800d1f4: 0800d25b .word 0x0800d25b 800d1f8: 0800d28d .word 0x0800d28d case LED_RISING: interpolateColors(&LED_Cycle.Color2, &LED_Cycle.Color1, LED_State.tick, LED_Cycle.Tr, &LED_State.color); 800d1fc: 4b37 ldr r3, [pc, #220] @ (800d2dc ) 800d1fe: 885a ldrh r2, [r3, #2] 800d200: 4b37 ldr r3, [pc, #220] @ (800d2e0 ) 800d202: 78db ldrb r3, [r3, #3] 800d204: 4619 mov r1, r3 800d206: 4b37 ldr r3, [pc, #220] @ (800d2e4 ) 800d208: 9300 str r3, [sp, #0] 800d20a: 460b mov r3, r1 800d20c: 4934 ldr r1, [pc, #208] @ (800d2e0 ) 800d20e: 4836 ldr r0, [pc, #216] @ (800d2e8 ) 800d210: f7ff feee bl 800cff0 if(LED_State.tick>LED_Cycle.Tr){ 800d214: 4b31 ldr r3, [pc, #196] @ (800d2dc ) 800d216: 885b ldrh r3, [r3, #2] 800d218: 4a31 ldr r2, [pc, #196] @ (800d2e0 ) 800d21a: 78d2 ldrb r2, [r2, #3] 800d21c: 4293 cmp r3, r2 800d21e: d94e bls.n 800d2be LED_State.state = LED_HIGH; 800d220: 4b2e ldr r3, [pc, #184] @ (800d2dc ) 800d222: 2201 movs r2, #1 800d224: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d226: 4b2d ldr r3, [pc, #180] @ (800d2dc ) 800d228: 2200 movs r2, #0 800d22a: 805a strh r2, [r3, #2] } break; 800d22c: e047 b.n 800d2be case LED_HIGH: memcpy(&LED_State.color, &LED_Cycle.Color1, sizeof(RGB_t)); 800d22e: 4b2b ldr r3, [pc, #172] @ (800d2dc ) 800d230: 4a2b ldr r2, [pc, #172] @ (800d2e0 ) 800d232: 3304 adds r3, #4 800d234: 6812 ldr r2, [r2, #0] 800d236: 4611 mov r1, r2 800d238: 8019 strh r1, [r3, #0] 800d23a: 3302 adds r3, #2 800d23c: 0c12 lsrs r2, r2, #16 800d23e: 701a strb r2, [r3, #0] if(LED_State.tick>LED_Cycle.Th){ 800d240: 4b26 ldr r3, [pc, #152] @ (800d2dc ) 800d242: 885b ldrh r3, [r3, #2] 800d244: 4a26 ldr r2, [pc, #152] @ (800d2e0 ) 800d246: 7912 ldrb r2, [r2, #4] 800d248: 4293 cmp r3, r2 800d24a: d93a bls.n 800d2c2 LED_State.state = LED_FALLING; 800d24c: 4b23 ldr r3, [pc, #140] @ (800d2dc ) 800d24e: 2202 movs r2, #2 800d250: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d252: 4b22 ldr r3, [pc, #136] @ (800d2dc ) 800d254: 2200 movs r2, #0 800d256: 805a strh r2, [r3, #2] } break; 800d258: e033 b.n 800d2c2 case LED_FALLING: interpolateColors(&LED_Cycle.Color1, &LED_Cycle.Color2, LED_State.tick, LED_Cycle.Tf, &LED_State.color); 800d25a: 4b20 ldr r3, [pc, #128] @ (800d2dc ) 800d25c: 885a ldrh r2, [r3, #2] 800d25e: 4b20 ldr r3, [pc, #128] @ (800d2e0 ) 800d260: 795b ldrb r3, [r3, #5] 800d262: 4619 mov r1, r3 800d264: 4b1f ldr r3, [pc, #124] @ (800d2e4 ) 800d266: 9300 str r3, [sp, #0] 800d268: 460b mov r3, r1 800d26a: 491f ldr r1, [pc, #124] @ (800d2e8 ) 800d26c: 481c ldr r0, [pc, #112] @ (800d2e0 ) 800d26e: f7ff febf bl 800cff0 if(LED_State.tick>LED_Cycle.Tf){ 800d272: 4b1a ldr r3, [pc, #104] @ (800d2dc ) 800d274: 885b ldrh r3, [r3, #2] 800d276: 4a1a ldr r2, [pc, #104] @ (800d2e0 ) 800d278: 7952 ldrb r2, [r2, #5] 800d27a: 4293 cmp r3, r2 800d27c: d923 bls.n 800d2c6 LED_State.state = LED_LOW; 800d27e: 4b17 ldr r3, [pc, #92] @ (800d2dc ) 800d280: 2203 movs r2, #3 800d282: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d284: 4b15 ldr r3, [pc, #84] @ (800d2dc ) 800d286: 2200 movs r2, #0 800d288: 805a strh r2, [r3, #2] } break; 800d28a: e01c b.n 800d2c6 case LED_LOW: memcpy(&LED_State.color, &LED_Cycle.Color2, sizeof(RGB_t)); 800d28c: 4b13 ldr r3, [pc, #76] @ (800d2dc ) 800d28e: 4a14 ldr r2, [pc, #80] @ (800d2e0 ) 800d290: 3304 adds r3, #4 800d292: 3207 adds r2, #7 800d294: 8811 ldrh r1, [r2, #0] 800d296: 7892 ldrb r2, [r2, #2] 800d298: 8019 strh r1, [r3, #0] 800d29a: 709a strb r2, [r3, #2] if(LED_State.tick>LED_Cycle.Tl){ 800d29c: 4b0f ldr r3, [pc, #60] @ (800d2dc ) 800d29e: 885b ldrh r3, [r3, #2] 800d2a0: 4a0f ldr r2, [pc, #60] @ (800d2e0 ) 800d2a2: 7992 ldrb r2, [r2, #6] 800d2a4: 4293 cmp r3, r2 800d2a6: d910 bls.n 800d2ca LED_State.state = LED_RISING; 800d2a8: 4b0c ldr r3, [pc, #48] @ (800d2dc ) 800d2aa: 2200 movs r2, #0 800d2ac: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d2ae: 4b0b ldr r3, [pc, #44] @ (800d2dc ) 800d2b0: 2200 movs r2, #0 800d2b2: 805a strh r2, [r3, #2] } break; 800d2b4: e009 b.n 800d2ca default: LED_State.state = LED_RISING; 800d2b6: 4b09 ldr r3, [pc, #36] @ (800d2dc ) 800d2b8: 2200 movs r2, #0 800d2ba: 701a strb r2, [r3, #0] 800d2bc: e006 b.n 800d2cc break; 800d2be: bf00 nop 800d2c0: e004 b.n 800d2cc break; 800d2c2: bf00 nop 800d2c4: e002 b.n 800d2cc break; 800d2c6: bf00 nop 800d2c8: e000 b.n 800d2cc break; 800d2ca: bf00 nop } RGB_SetColor(&LED_State.color); 800d2cc: 4805 ldr r0, [pc, #20] @ (800d2e4 ) 800d2ce: f7ff feff bl 800d0d0 } } 800d2d2: bf00 nop 800d2d4: 46bd mov sp, r7 800d2d6: bd80 pop {r7, pc} 800d2d8: 20000a80 .word 0x20000a80 800d2dc: 20000a6c .word 0x20000a6c 800d2e0: 20000a74 .word 0x20000a74 800d2e4: 20000a70 .word 0x20000a70 800d2e8: 20000a7b .word 0x20000a7b 0800d2ec : RTC_HandleTypeDef hrtc; /* RTC init function */ void MX_RTC_Init(void) { 800d2ec: b580 push {r7, lr} 800d2ee: af00 add r7, sp, #0 /* USER CODE END RTC_Init 1 */ /** Initialize RTC Only */ hrtc.Instance = RTC; 800d2f0: 4b0a ldr r3, [pc, #40] @ (800d31c ) 800d2f2: 4a0b ldr r2, [pc, #44] @ (800d320 ) 800d2f4: 601a str r2, [r3, #0] hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND; 800d2f6: 4b09 ldr r3, [pc, #36] @ (800d31c ) 800d2f8: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800d2fc: 605a str r2, [r3, #4] hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM; 800d2fe: 4b07 ldr r3, [pc, #28] @ (800d31c ) 800d300: f44f 7280 mov.w r2, #256 @ 0x100 800d304: 609a str r2, [r3, #8] if (HAL_RTC_Init(&hrtc) != HAL_OK) 800d306: 4805 ldr r0, [pc, #20] @ (800d31c ) 800d308: f004 fb74 bl 80119f4 800d30c: 4603 mov r3, r0 800d30e: 2b00 cmp r3, #0 800d310: d001 beq.n 800d316 { Error_Handler(); 800d312: f7ff f869 bl 800c3e8 } /* USER CODE BEGIN RTC_Init 2 */ /* USER CODE END RTC_Init 2 */ } 800d316: bf00 nop 800d318: bd80 pop {r7, pc} 800d31a: bf00 nop 800d31c: 20000a84 .word 0x20000a84 800d320: 40002800 .word 0x40002800 0800d324 : void HAL_RTC_MspInit(RTC_HandleTypeDef* rtcHandle) { 800d324: b580 push {r7, lr} 800d326: b084 sub sp, #16 800d328: af00 add r7, sp, #0 800d32a: 6078 str r0, [r7, #4] if(rtcHandle->Instance==RTC) 800d32c: 687b ldr r3, [r7, #4] 800d32e: 681b ldr r3, [r3, #0] 800d330: 4a0b ldr r2, [pc, #44] @ (800d360 ) 800d332: 4293 cmp r3, r2 800d334: d110 bne.n 800d358 { /* USER CODE BEGIN RTC_MspInit 0 */ /* USER CODE END RTC_MspInit 0 */ HAL_PWR_EnableBkUpAccess(); 800d336: f003 faf1 bl 801091c /* Enable BKP CLK enable for backup registers */ __HAL_RCC_BKP_CLK_ENABLE(); 800d33a: 4b0a ldr r3, [pc, #40] @ (800d364 ) 800d33c: 69db ldr r3, [r3, #28] 800d33e: 4a09 ldr r2, [pc, #36] @ (800d364 ) 800d340: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 800d344: 61d3 str r3, [r2, #28] 800d346: 4b07 ldr r3, [pc, #28] @ (800d364 ) 800d348: 69db ldr r3, [r3, #28] 800d34a: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 800d34e: 60fb str r3, [r7, #12] 800d350: 68fb ldr r3, [r7, #12] /* RTC clock enable */ __HAL_RCC_RTC_ENABLE(); 800d352: 4b05 ldr r3, [pc, #20] @ (800d368 ) 800d354: 2201 movs r2, #1 800d356: 601a str r2, [r3, #0] /* USER CODE BEGIN RTC_MspInit 1 */ /* USER CODE END RTC_MspInit 1 */ } } 800d358: bf00 nop 800d35a: 3710 adds r7, #16 800d35c: 46bd mov sp, r7 800d35e: bd80 pop {r7, pc} 800d360: 40002800 .word 0x40002800 800d364: 40021000 .word 0x40021000 800d368: 4242043c .word 0x4242043c 0800d36c : .fw_version_major = 0, .fw_version_minor = 0, .fw_version_patch = 0, }; void ReadVersion(){ 800d36c: b480 push {r7} 800d36e: af00 add r7, sp, #0 infoPacket.serialNumber = InfoBlock->serialNumber; 800d370: 4b0e ldr r3, [pc, #56] @ (800d3ac ) 800d372: 681b ldr r3, [r3, #0] 800d374: 681b ldr r3, [r3, #0] 800d376: b29a uxth r2, r3 800d378: 4b0d ldr r3, [pc, #52] @ (800d3b0 ) 800d37a: 801a strh r2, [r3, #0] infoPacket.boardVersion = InfoBlock->boardVersion; 800d37c: 4b0b ldr r3, [pc, #44] @ (800d3ac ) 800d37e: 681b ldr r3, [r3, #0] 800d380: 795a ldrb r2, [r3, #5] 800d382: 4b0b ldr r3, [pc, #44] @ (800d3b0 ) 800d384: 709a strb r2, [r3, #2] infoPacket.stationType = InfoBlock->stationType; 800d386: 4b09 ldr r3, [pc, #36] @ (800d3ac ) 800d388: 681b ldr r3, [r3, #0] 800d38a: 791a ldrb r2, [r3, #4] 800d38c: 4b08 ldr r3, [pc, #32] @ (800d3b0 ) 800d38e: 70da strb r2, [r3, #3] infoPacket.fw_version_major = FW_VERSION_MAJOR; 800d390: 4b07 ldr r3, [pc, #28] @ (800d3b0 ) 800d392: 2201 movs r2, #1 800d394: 809a strh r2, [r3, #4] infoPacket.fw_version_minor = FW_VERSION_MINOR; 800d396: 4b06 ldr r3, [pc, #24] @ (800d3b0 ) 800d398: 2200 movs r2, #0 800d39a: 80da strh r2, [r3, #6] infoPacket.fw_version_patch = FW_VERSION_PATCH; 800d39c: 4b04 ldr r3, [pc, #16] @ (800d3b0 ) 800d39e: 2201 movs r2, #1 800d3a0: 811a strh r2, [r3, #8] } 800d3a2: bf00 nop 800d3a4: 46bd mov sp, r7 800d3a6: bc80 pop {r7} 800d3a8: 4770 bx lr 800d3aa: bf00 nop 800d3ac: 20000000 .word 0x20000000 800d3b0: 20000f14 .word 0x20000f14 0800d3b4 : // Внешняя функция обработки команд (определена в serial_handler.c) extern void SC_CommandHandler(ReceivedCommand_t* cmd); void SC_Init() { 800d3b4: b580 push {r7, lr} 800d3b6: af00 add r7, sp, #0 // Обнуляем структуру memset(&serial_control, 0, sizeof(SerialControl_t)); 800d3b8: f44f 7204 mov.w r2, #528 @ 0x210 800d3bc: 2100 movs r1, #0 800d3be: 4805 ldr r0, [pc, #20] @ (800d3d4 ) 800d3c0: f006 feec bl 801419c memset(&serial_iso, 0, sizeof(serial_iso)); 800d3c4: f44f 7204 mov.w r2, #528 @ 0x210 800d3c8: 2100 movs r1, #0 800d3ca: 4803 ldr r0, [pc, #12] @ (800d3d8 ) 800d3cc: f006 fee6 bl 801419c } 800d3d0: bf00 nop 800d3d2: bd80 pop {r7, pc} 800d3d4: 20000a98 .word 0x20000a98 800d3d8: 20000ca8 .word 0x20000ca8 0800d3dc : void SC_Task() { 800d3dc: b580 push {r7, lr} 800d3de: af00 add r7, sp, #0 // Запуск приема в режиме прерывания с ожиданием idle if((huart2.RxState == HAL_UART_STATE_READY) && (serial_control.command_ready == 0)) HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d3e0: 4b2a ldr r3, [pc, #168] @ (800d48c ) 800d3e2: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800d3e6: b2db uxtb r3, r3 800d3e8: 2b20 cmp r3, #32 800d3ea: d10a bne.n 800d402 800d3ec: 4b28 ldr r3, [pc, #160] @ (800d490 ) 800d3ee: f893 3208 ldrb.w r3, [r3, #520] @ 0x208 800d3f2: b2db uxtb r3, r3 800d3f4: 2b00 cmp r3, #0 800d3f6: d104 bne.n 800d402 800d3f8: 22ff movs r2, #255 @ 0xff 800d3fa: 4926 ldr r1, [pc, #152] @ (800d494 ) 800d3fc: 4823 ldr r0, [pc, #140] @ (800d48c ) 800d3fe: f005 fa82 bl 8012906 if((huart5.RxState == HAL_UART_STATE_READY)) HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d402: 4b25 ldr r3, [pc, #148] @ (800d498 ) 800d404: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800d408: b2db uxtb r3, r3 800d40a: 2b20 cmp r3, #32 800d40c: d104 bne.n 800d418 800d40e: 22ff movs r2, #255 @ 0xff 800d410: 4922 ldr r1, [pc, #136] @ (800d49c ) 800d412: 4821 ldr r0, [pc, #132] @ (800d498 ) 800d414: f005 fa77 bl 8012906 // Проверка таймаута отправки пакета (больше 100 мс) if (huart2.gState == HAL_UART_STATE_BUSY_TX && serial_control.tx_tick != 0) { 800d418: 4b1c ldr r3, [pc, #112] @ (800d48c ) 800d41a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d41e: b2db uxtb r3, r3 800d420: 2b21 cmp r3, #33 @ 0x21 800d422: d119 bne.n 800d458 800d424: 4b1a ldr r3, [pc, #104] @ (800d490 ) 800d426: f8d3 320c ldr.w r3, [r3, #524] @ 0x20c 800d42a: 2b00 cmp r3, #0 800d42c: d014 beq.n 800d458 if ((HAL_GetTick() - serial_control.tx_tick) > 100) { 800d42e: f001 fa55 bl 800e8dc 800d432: 4602 mov r2, r0 800d434: 4b16 ldr r3, [pc, #88] @ (800d490 ) 800d436: f8d3 320c ldr.w r3, [r3, #524] @ 0x20c 800d43a: 1ad3 subs r3, r2, r3 800d43c: 2b64 cmp r3, #100 @ 0x64 800d43e: d90b bls.n 800d458 // Таймаут: принудительно сбрасываем передачу HAL_UART_Abort_IT(&huart2); 800d440: 4812 ldr r0, [pc, #72] @ (800d48c ) 800d442: f005 fabd bl 80129c0 // Выключаем DIR при сбросе передачи HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 800d446: 2200 movs r2, #0 800d448: 2110 movs r1, #16 800d44a: 4815 ldr r0, [pc, #84] @ (800d4a0 ) 800d44c: f003 fa4d bl 80108ea serial_control.tx_tick = 0; // Сбрасываем tick 800d450: 4b0f ldr r3, [pc, #60] @ (800d490 ) 800d452: 2200 movs r2, #0 800d454: f8c3 220c str.w r2, [r3, #524] @ 0x20c } } // Проверка наличия принятой команды для обработки if (serial_control.command_ready && (huart2.gState != HAL_UART_STATE_BUSY_TX)) { 800d458: 4b0d ldr r3, [pc, #52] @ (800d490 ) 800d45a: f893 3208 ldrb.w r3, [r3, #520] @ 0x208 800d45e: b2db uxtb r3, r3 800d460: 2b00 cmp r3, #0 800d462: d011 beq.n 800d488 800d464: 4b09 ldr r3, [pc, #36] @ (800d48c ) 800d466: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d46a: b2db uxtb r3, r3 800d46c: 2b21 cmp r3, #33 @ 0x21 800d46e: d00b beq.n 800d488 // HAL_Delay(2); SC_CommandHandler(&serial_control.received_command); 800d470: 480c ldr r0, [pc, #48] @ (800d4a4 ) 800d472: f000 f9df bl 800d834 HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d476: 22ff movs r2, #255 @ 0xff 800d478: 4906 ldr r1, [pc, #24] @ (800d494 ) 800d47a: 4804 ldr r0, [pc, #16] @ (800d48c ) 800d47c: f005 fa43 bl 8012906 serial_control.command_ready = 0; // Сбрасываем флаг 800d480: 4b03 ldr r3, [pc, #12] @ (800d490 ) 800d482: 2200 movs r2, #0 800d484: f883 2208 strb.w r2, [r3, #520] @ 0x208 } } 800d488: bf00 nop 800d48a: bd80 pop {r7, pc} 800d48c: 20000ffc .word 0x20000ffc 800d490: 20000a98 .word 0x20000a98 800d494: 20000b98 .word 0x20000b98 800d498: 20000f6c .word 0x20000f6c 800d49c: 20000da8 .word 0x20000da8 800d4a0: 40011400 .word 0x40011400 800d4a4: 20000c98 .word 0x20000c98 0800d4a8 : void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { 800d4a8: b580 push {r7, lr} 800d4aa: b082 sub sp, #8 800d4ac: af00 add r7, sp, #0 800d4ae: 6078 str r0, [r7, #4] 800d4b0: 460b mov r3, r1 800d4b2: 807b strh r3, [r7, #2] if (huart->Instance == huart2.Instance) { 800d4b4: 687b ldr r3, [r7, #4] 800d4b6: 681a ldr r2, [r3, #0] 800d4b8: 4b1c ldr r3, [pc, #112] @ (800d52c ) 800d4ba: 681b ldr r3, [r3, #0] 800d4bc: 429a cmp r2, r3 800d4be: d116 bne.n 800d4ee if(!process_received_packet(&serial_control, serial_control.rx_buffer, Size)){ 800d4c0: 887b ldrh r3, [r7, #2] 800d4c2: 461a mov r2, r3 800d4c4: 491a ldr r1, [pc, #104] @ (800d530 ) 800d4c6: 481b ldr r0, [pc, #108] @ (800d534 ) 800d4c8: f000 f980 bl 800d7cc 800d4cc: 4603 mov r3, r0 800d4ce: 2b00 cmp r3, #0 800d4d0: d104 bne.n 800d4dc SC_SendPacket(NULL, 0, RESP_INVALID); 800d4d2: 2214 movs r2, #20 800d4d4: 2100 movs r1, #0 800d4d6: 2000 movs r0, #0 800d4d8: f000 f8ec bl 800d6b4 } g_sc_command_source = SC_SOURCE_UART2; 800d4dc: 4b16 ldr r3, [pc, #88] @ (800d538 ) 800d4de: 2200 movs r2, #0 800d4e0: 701a strb r2, [r3, #0] HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d4e2: 22ff movs r2, #255 @ 0xff 800d4e4: 4912 ldr r1, [pc, #72] @ (800d530 ) 800d4e6: 4811 ldr r0, [pc, #68] @ (800d52c ) 800d4e8: f005 fa0d bl 8012906 g_sc_command_source = SC_SOURCE_UART5; SC_CommandHandler((ReceivedCommand_t*)&serial_iso.received_command); } HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1); } } 800d4ec: e019 b.n 800d522 } else if (huart->Instance == huart5.Instance) { 800d4ee: 687b ldr r3, [r7, #4] 800d4f0: 681a ldr r2, [r3, #0] 800d4f2: 4b12 ldr r3, [pc, #72] @ (800d53c ) 800d4f4: 681b ldr r3, [r3, #0] 800d4f6: 429a cmp r2, r3 800d4f8: d113 bne.n 800d522 if (process_received_packet(&serial_iso, serial_iso.rx_buffer, Size)) { 800d4fa: 887b ldrh r3, [r7, #2] 800d4fc: 461a mov r2, r3 800d4fe: 4910 ldr r1, [pc, #64] @ (800d540 ) 800d500: 4810 ldr r0, [pc, #64] @ (800d544 ) 800d502: f000 f963 bl 800d7cc 800d506: 4603 mov r3, r0 800d508: 2b00 cmp r3, #0 800d50a: d005 beq.n 800d518 g_sc_command_source = SC_SOURCE_UART5; 800d50c: 4b0a ldr r3, [pc, #40] @ (800d538 ) 800d50e: 2201 movs r2, #1 800d510: 701a strb r2, [r3, #0] SC_CommandHandler((ReceivedCommand_t*)&serial_iso.received_command); 800d512: 480d ldr r0, [pc, #52] @ (800d548 ) 800d514: f000 f98e bl 800d834 HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d518: 22ff movs r2, #255 @ 0xff 800d51a: 4909 ldr r1, [pc, #36] @ (800d540 ) 800d51c: 4807 ldr r0, [pc, #28] @ (800d53c ) 800d51e: f005 f9f2 bl 8012906 } 800d522: bf00 nop 800d524: 3708 adds r7, #8 800d526: 46bd mov sp, r7 800d528: bd80 pop {r7, pc} 800d52a: bf00 nop 800d52c: 20000ffc .word 0x20000ffc 800d530: 20000b98 .word 0x20000b98 800d534: 20000a98 .word 0x20000a98 800d538: 20000eb8 .word 0x20000eb8 800d53c: 20000f6c .word 0x20000f6c 800d540: 20000da8 .word 0x20000da8 800d544: 20000ca8 .word 0x20000ca8 800d548: 20000ea8 .word 0x20000ea8 0800d54c : void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { 800d54c: b580 push {r7, lr} 800d54e: b082 sub sp, #8 800d550: af00 add r7, sp, #0 800d552: 6078 str r0, [r7, #4] if (huart->Instance == huart2.Instance) { 800d554: 687b ldr r3, [r7, #4] 800d556: 681a ldr r2, [r3, #0] 800d558: 4b08 ldr r3, [pc, #32] @ (800d57c ) 800d55a: 681b ldr r3, [r3, #0] 800d55c: 429a cmp r2, r3 800d55e: d108 bne.n 800d572 HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 800d560: 2200 movs r2, #0 800d562: 2110 movs r1, #16 800d564: 4806 ldr r0, [pc, #24] @ (800d580 ) 800d566: f003 f9c0 bl 80108ea serial_control.tx_tick = 0; 800d56a: 4b06 ldr r3, [pc, #24] @ (800d584 ) 800d56c: 2200 movs r2, #0 800d56e: f8c3 220c str.w r2, [r3, #524] @ 0x20c } } 800d572: bf00 nop 800d574: 3708 adds r7, #8 800d576: 46bd mov sp, r7 800d578: bd80 pop {r7, pc} 800d57a: bf00 nop 800d57c: 20000ffc .word 0x20000ffc 800d580: 40011400 .word 0x40011400 800d584: 20000a98 .word 0x20000a98 0800d588 : // Приватные функции реализации // Полностью программная реализация CRC-32 (полином CRC32_POLYNOMIAL, порядок little-endian) static uint32_t calculate_crc32(const uint8_t* data, uint16_t length) { 800d588: b480 push {r7} 800d58a: b085 sub sp, #20 800d58c: af00 add r7, sp, #0 800d58e: 6078 str r0, [r7, #4] 800d590: 460b mov r3, r1 800d592: 807b strh r3, [r7, #2] uint32_t crc = 0xFFFFFFFFu; 800d594: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800d598: 60fb str r3, [r7, #12] for (uint16_t i = 0; i < length; i++) { 800d59a: 2300 movs r3, #0 800d59c: 817b strh r3, [r7, #10] 800d59e: e021 b.n 800d5e4 crc ^= data[i]; 800d5a0: 897b ldrh r3, [r7, #10] 800d5a2: 687a ldr r2, [r7, #4] 800d5a4: 4413 add r3, r2 800d5a6: 781b ldrb r3, [r3, #0] 800d5a8: 461a mov r2, r3 800d5aa: 68fb ldr r3, [r7, #12] 800d5ac: 4053 eors r3, r2 800d5ae: 60fb str r3, [r7, #12] for (uint8_t bit = 0; bit < 8; bit++) { 800d5b0: 2300 movs r3, #0 800d5b2: 727b strb r3, [r7, #9] 800d5b4: e010 b.n 800d5d8 if (crc & 0x1u) { 800d5b6: 68fb ldr r3, [r7, #12] 800d5b8: f003 0301 and.w r3, r3, #1 800d5bc: 2b00 cmp r3, #0 800d5be: d005 beq.n 800d5cc crc = (crc >> 1) ^ CRC32_POLYNOMIAL; 800d5c0: 68fb ldr r3, [r7, #12] 800d5c2: 085a lsrs r2, r3, #1 800d5c4: 4b0d ldr r3, [pc, #52] @ (800d5fc ) 800d5c6: 4053 eors r3, r2 800d5c8: 60fb str r3, [r7, #12] 800d5ca: e002 b.n 800d5d2 } else { crc >>= 1; 800d5cc: 68fb ldr r3, [r7, #12] 800d5ce: 085b lsrs r3, r3, #1 800d5d0: 60fb str r3, [r7, #12] for (uint8_t bit = 0; bit < 8; bit++) { 800d5d2: 7a7b ldrb r3, [r7, #9] 800d5d4: 3301 adds r3, #1 800d5d6: 727b strb r3, [r7, #9] 800d5d8: 7a7b ldrb r3, [r7, #9] 800d5da: 2b07 cmp r3, #7 800d5dc: d9eb bls.n 800d5b6 for (uint16_t i = 0; i < length; i++) { 800d5de: 897b ldrh r3, [r7, #10] 800d5e0: 3301 adds r3, #1 800d5e2: 817b strh r3, [r7, #10] 800d5e4: 897a ldrh r2, [r7, #10] 800d5e6: 887b ldrh r3, [r7, #2] 800d5e8: 429a cmp r2, r3 800d5ea: d3d9 bcc.n 800d5a0 } } } return crc ^ 0xFFFFFFFFu; 800d5ec: 68fb ldr r3, [r7, #12] 800d5ee: 43db mvns r3, r3 } 800d5f0: 4618 mov r0, r3 800d5f2: 3714 adds r7, #20 800d5f4: 46bd mov sp, r7 800d5f6: bc80 pop {r7} 800d5f8: 4770 bx lr 800d5fa: bf00 nop 800d5fc: edb88320 .word 0xedb88320 0800d600 : static uint16_t encode_packet(const uint8_t* payload, uint16_t payload_len, uint8_t* output, uint8_t response_code) { 800d600: b580 push {r7, lr} 800d602: b088 sub sp, #32 800d604: af00 add r7, sp, #0 800d606: 60f8 str r0, [r7, #12] 800d608: 607a str r2, [r7, #4] 800d60a: 461a mov r2, r3 800d60c: 460b mov r3, r1 800d60e: 817b strh r3, [r7, #10] 800d610: 4613 mov r3, r2 800d612: 727b strb r3, [r7, #9] uint16_t out_index = 0; 800d614: 2300 movs r3, #0 800d616: 83fb strh r3, [r7, #30] output[out_index++] = response_code; 800d618: 8bfb ldrh r3, [r7, #30] 800d61a: 1c5a adds r2, r3, #1 800d61c: 83fa strh r2, [r7, #30] 800d61e: 461a mov r2, r3 800d620: 687b ldr r3, [r7, #4] 800d622: 4413 add r3, r2 800d624: 7a7a ldrb r2, [r7, #9] 800d626: 701a strb r2, [r3, #0] if (payload != NULL) { 800d628: 68fb ldr r3, [r7, #12] 800d62a: 2b00 cmp r3, #0 800d62c: d019 beq.n 800d662 // Просто копируем полезную нагрузку без какого‑либо экранирования for (uint16_t i = 0; i < payload_len; i++) { 800d62e: 2300 movs r3, #0 800d630: 83bb strh r3, [r7, #28] 800d632: e012 b.n 800d65a output[out_index++] = payload[i]; 800d634: 8bbb ldrh r3, [r7, #28] 800d636: 68fa ldr r2, [r7, #12] 800d638: 441a add r2, r3 800d63a: 8bfb ldrh r3, [r7, #30] 800d63c: 1c59 adds r1, r3, #1 800d63e: 83f9 strh r1, [r7, #30] 800d640: 4619 mov r1, r3 800d642: 687b ldr r3, [r7, #4] 800d644: 440b add r3, r1 800d646: 7812 ldrb r2, [r2, #0] 800d648: 701a strb r2, [r3, #0] // Проверка переполнения if (out_index >= MAX_TX_BUFFER_SIZE - 5) { // 4 байта CRC + END_BYTE 800d64a: 8bfb ldrh r3, [r7, #30] 800d64c: 2bfa cmp r3, #250 @ 0xfa 800d64e: d901 bls.n 800d654 return 0; 800d650: 2300 movs r3, #0 800d652: e02a b.n 800d6aa for (uint16_t i = 0; i < payload_len; i++) { 800d654: 8bbb ldrh r3, [r7, #28] 800d656: 3301 adds r3, #1 800d658: 83bb strh r3, [r7, #28] 800d65a: 8bba ldrh r2, [r7, #28] 800d65c: 897b ldrh r3, [r7, #10] 800d65e: 429a cmp r2, r3 800d660: d3e8 bcc.n 800d634 } } } // Вычисляем CRC для всего содержимого (код ответа + полезная нагрузка) uint32_t crc = calculate_crc32(output, out_index); 800d662: 8bfb ldrh r3, [r7, #30] 800d664: 4619 mov r1, r3 800d666: 6878 ldr r0, [r7, #4] 800d668: f7ff ff8e bl 800d588 800d66c: 4603 mov r3, r0 800d66e: 613b str r3, [r7, #16] uint8_t* crc_bytes = (uint8_t*)&crc; 800d670: f107 0310 add.w r3, r7, #16 800d674: 617b str r3, [r7, #20] // Добавляем CRC без экранирования for (int i = 0; i < 4; i++) { 800d676: 2300 movs r3, #0 800d678: 61bb str r3, [r7, #24] 800d67a: e012 b.n 800d6a2 output[out_index++] = crc_bytes[i]; 800d67c: 69bb ldr r3, [r7, #24] 800d67e: 697a ldr r2, [r7, #20] 800d680: 441a add r2, r3 800d682: 8bfb ldrh r3, [r7, #30] 800d684: 1c59 adds r1, r3, #1 800d686: 83f9 strh r1, [r7, #30] 800d688: 4619 mov r1, r3 800d68a: 687b ldr r3, [r7, #4] 800d68c: 440b add r3, r1 800d68e: 7812 ldrb r2, [r2, #0] 800d690: 701a strb r2, [r3, #0] if (out_index >= MAX_TX_BUFFER_SIZE - 1) { // место для END_BYTE 800d692: 8bfb ldrh r3, [r7, #30] 800d694: 2bfe cmp r3, #254 @ 0xfe 800d696: d901 bls.n 800d69c return 0; 800d698: 2300 movs r3, #0 800d69a: e006 b.n 800d6aa for (int i = 0; i < 4; i++) { 800d69c: 69bb ldr r3, [r7, #24] 800d69e: 3301 adds r3, #1 800d6a0: 61bb str r3, [r7, #24] 800d6a2: 69bb ldr r3, [r7, #24] 800d6a4: 2b03 cmp r3, #3 800d6a6: dde9 ble.n 800d67c } } return out_index; 800d6a8: 8bfb ldrh r3, [r7, #30] } 800d6aa: 4618 mov r0, r3 800d6ac: 3720 adds r7, #32 800d6ae: 46bd mov sp, r7 800d6b0: bd80 pop {r7, pc} ... 0800d6b4 : void SC_SendPacket(const uint8_t* payload, uint16_t payload_len, uint8_t response_code) { 800d6b4: b580 push {r7, lr} 800d6b6: b084 sub sp, #16 800d6b8: af00 add r7, sp, #0 800d6ba: 6078 str r0, [r7, #4] 800d6bc: 460b mov r3, r1 800d6be: 807b strh r3, [r7, #2] 800d6c0: 4613 mov r3, r2 800d6c2: 707b strb r3, [r7, #1] uint16_t packet_len = encode_packet(payload, payload_len, serial_control.tx_buffer, response_code); 800d6c4: 787b ldrb r3, [r7, #1] 800d6c6: 8879 ldrh r1, [r7, #2] 800d6c8: 4a15 ldr r2, [pc, #84] @ (800d720 ) 800d6ca: 6878 ldr r0, [r7, #4] 800d6cc: f7ff ff98 bl 800d600 800d6d0: 4603 mov r3, r0 800d6d2: 81fb strh r3, [r7, #14] if (packet_len > 0) { 800d6d4: 89fb ldrh r3, [r7, #14] 800d6d6: 2b00 cmp r3, #0 800d6d8: d01e beq.n 800d718 if (huart2.gState == HAL_UART_STATE_BUSY_TX) { 800d6da: 4b12 ldr r3, [pc, #72] @ (800d724 ) 800d6dc: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d6e0: b2db uxtb r3, r3 800d6e2: 2b21 cmp r3, #33 @ 0x21 800d6e4: d107 bne.n 800d6f6 HAL_UART_Abort_IT(&huart2); 800d6e6: 480f ldr r0, [pc, #60] @ (800d724 ) 800d6e8: f005 f96a bl 80129c0 HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 800d6ec: 2200 movs r2, #0 800d6ee: 2110 movs r1, #16 800d6f0: 480d ldr r0, [pc, #52] @ (800d728 ) 800d6f2: f003 f8fa bl 80108ea } HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_SET); 800d6f6: 2201 movs r2, #1 800d6f8: 2110 movs r1, #16 800d6fa: 480b ldr r0, [pc, #44] @ (800d728 ) 800d6fc: f003 f8f5 bl 80108ea HAL_UART_Transmit_IT(&huart2, serial_control.tx_buffer, packet_len); 800d700: 89fb ldrh r3, [r7, #14] 800d702: 461a mov r2, r3 800d704: 4906 ldr r1, [pc, #24] @ (800d720 ) 800d706: 4807 ldr r0, [pc, #28] @ (800d724 ) 800d708: f005 f8c8 bl 801289c serial_control.tx_tick = HAL_GetTick(); 800d70c: f001 f8e6 bl 800e8dc 800d710: 4603 mov r3, r0 800d712: 4a03 ldr r2, [pc, #12] @ (800d720 ) 800d714: f8c2 320c str.w r3, [r2, #524] @ 0x20c } } 800d718: bf00 nop 800d71a: 3710 adds r7, #16 800d71c: 46bd mov sp, r7 800d71e: bd80 pop {r7, pc} 800d720: 20000a98 .word 0x20000a98 800d724: 20000ffc .word 0x20000ffc 800d728: 40011400 .word 0x40011400 0800d72c : static uint8_t parse_packet(const uint8_t* packet_data, uint16_t packet_len, ReceivedCommand_t* out_cmd) { 800d72c: b580 push {r7, lr} 800d72e: b088 sub sp, #32 800d730: af00 add r7, sp, #0 800d732: 60f8 str r0, [r7, #12] 800d734: 460b mov r3, r1 800d736: 607a str r2, [r7, #4] 800d738: 817b strh r3, [r7, #10] // }else{ // test_crc_invalid = 5; // } // Минимальный размер: 1 байт команды + 4 байта CRC if (packet_len < 5) return 0; 800d73a: 897b ldrh r3, [r7, #10] 800d73c: 2b04 cmp r3, #4 800d73e: d801 bhi.n 800d744 800d740: 2300 movs r3, #0 800d742: e03f b.n 800d7c4 if (packet_len > MAX_RX_BUFFER_SIZE) return 0; 800d744: 897b ldrh r3, [r7, #10] 800d746: f5b3 7f80 cmp.w r3, #256 @ 0x100 800d74a: d901 bls.n 800d750 800d74c: 2300 movs r3, #0 800d74e: e039 b.n 800d7c4 uint16_t payload_length = packet_len - 4; 800d750: 897b ldrh r3, [r7, #10] 800d752: 3b04 subs r3, #4 800d754: 83fb strh r3, [r7, #30] // Извлекаем принятую CRC (последние 4 байта, little-endian) uint32_t received_checksum = ((uint32_t)packet_data[payload_length] << 0) | 800d756: 8bfb ldrh r3, [r7, #30] 800d758: 68fa ldr r2, [r7, #12] 800d75a: 4413 add r3, r2 800d75c: 781b ldrb r3, [r3, #0] 800d75e: 4619 mov r1, r3 ((uint32_t)packet_data[payload_length + 1] << 8) | 800d760: 8bfb ldrh r3, [r7, #30] 800d762: 3301 adds r3, #1 800d764: 68fa ldr r2, [r7, #12] 800d766: 4413 add r3, r2 800d768: 781b ldrb r3, [r3, #0] 800d76a: 021b lsls r3, r3, #8 ((uint32_t)packet_data[payload_length] << 0) | 800d76c: ea41 0203 orr.w r2, r1, r3 ((uint32_t)packet_data[payload_length + 2] << 16) | 800d770: 8bfb ldrh r3, [r7, #30] 800d772: 3302 adds r3, #2 800d774: 68f9 ldr r1, [r7, #12] 800d776: 440b add r3, r1 800d778: 781b ldrb r3, [r3, #0] 800d77a: 041b lsls r3, r3, #16 ((uint32_t)packet_data[payload_length + 1] << 8) | 800d77c: 431a orrs r2, r3 ((uint32_t)packet_data[payload_length + 3] << 24); 800d77e: 8bfb ldrh r3, [r7, #30] 800d780: 3303 adds r3, #3 800d782: 68f9 ldr r1, [r7, #12] 800d784: 440b add r3, r1 800d786: 781b ldrb r3, [r3, #0] 800d788: 061b lsls r3, r3, #24 uint32_t received_checksum = 800d78a: 4313 orrs r3, r2 800d78c: 61bb str r3, [r7, #24] // Вычисляем CRC для полезной нагрузки uint32_t calculated_checksum = calculate_crc32(packet_data, payload_length); 800d78e: 8bfb ldrh r3, [r7, #30] 800d790: 4619 mov r1, r3 800d792: 68f8 ldr r0, [r7, #12] 800d794: f7ff fef8 bl 800d588 800d798: 6178 str r0, [r7, #20] if (received_checksum != calculated_checksum) return 0; // CRC не совпадает 800d79a: 69ba ldr r2, [r7, #24] 800d79c: 697b ldr r3, [r7, #20] 800d79e: 429a cmp r2, r3 800d7a0: d001 beq.n 800d7a6 800d7a2: 2300 movs r3, #0 800d7a4: e00e b.n 800d7c4 out_cmd->argument = (void *)&packet_data[1]; 800d7a6: 68fb ldr r3, [r7, #12] 800d7a8: 1c5a adds r2, r3, #1 800d7aa: 687b ldr r3, [r7, #4] 800d7ac: 605a str r2, [r3, #4] out_cmd->command = packet_data[0]; 800d7ae: 68fb ldr r3, [r7, #12] 800d7b0: 781a ldrb r2, [r3, #0] 800d7b2: 687b ldr r3, [r7, #4] 800d7b4: 701a strb r2, [r3, #0] out_cmd->argument_length = (uint8_t)(payload_length - 1); 800d7b6: 8bfb ldrh r3, [r7, #30] 800d7b8: b2db uxtb r3, r3 800d7ba: 3b01 subs r3, #1 800d7bc: b2da uxtb r2, r3 800d7be: 687b ldr r3, [r7, #4] 800d7c0: 705a strb r2, [r3, #1] return 1; 800d7c2: 2301 movs r3, #1 } 800d7c4: 4618 mov r0, r3 800d7c6: 3720 adds r7, #32 800d7c8: 46bd mov sp, r7 800d7ca: bd80 pop {r7, pc} 0800d7cc : static uint8_t process_received_packet(SerialControl_t *ctx, const uint8_t* packet_data, uint16_t packet_len) { 800d7cc: b580 push {r7, lr} 800d7ce: b084 sub sp, #16 800d7d0: af00 add r7, sp, #0 800d7d2: 60f8 str r0, [r7, #12] 800d7d4: 60b9 str r1, [r7, #8] 800d7d6: 4613 mov r3, r2 800d7d8: 80fb strh r3, [r7, #6] if (!parse_packet(packet_data, packet_len, (ReceivedCommand_t *)&ctx->received_command)) { 800d7da: 68fb ldr r3, [r7, #12] 800d7dc: f503 7200 add.w r2, r3, #512 @ 0x200 800d7e0: 88fb ldrh r3, [r7, #6] 800d7e2: 4619 mov r1, r3 800d7e4: 68b8 ldr r0, [r7, #8] 800d7e6: f7ff ffa1 bl 800d72c 800d7ea: 4603 mov r3, r0 800d7ec: 2b00 cmp r3, #0 800d7ee: d101 bne.n 800d7f4 return 0; 800d7f0: 2300 movs r3, #0 800d7f2: e004 b.n 800d7fe } ctx->command_ready = 1; 800d7f4: 68fb ldr r3, [r7, #12] 800d7f6: 2201 movs r2, #1 800d7f8: f883 2208 strb.w r2, [r3, #520] @ 0x208 return 1; 800d7fc: 2301 movs r3, #1 } 800d7fe: 4618 mov r0, r3 800d800: 3710 adds r7, #16 800d802: 46bd mov sp, r7 800d804: bd80 pop {r7, pc} ... 0800d808 <__NVIC_SystemReset>: /** \brief System Reset \details Initiates a system reset request to reset the MCU. */ __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) { 800d808: b480 push {r7} 800d80a: af00 add r7, sp, #0 \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __STATIC_FORCEINLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 800d80c: f3bf 8f4f dsb sy } 800d810: bf00 nop __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 800d812: 4b06 ldr r3, [pc, #24] @ (800d82c <__NVIC_SystemReset+0x24>) 800d814: 68db ldr r3, [r3, #12] 800d816: f403 62e0 and.w r2, r3, #1792 @ 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800d81a: 4904 ldr r1, [pc, #16] @ (800d82c <__NVIC_SystemReset+0x24>) 800d81c: 4b04 ldr r3, [pc, #16] @ (800d830 <__NVIC_SystemReset+0x28>) 800d81e: 4313 orrs r3, r2 800d820: 60cb str r3, [r1, #12] __ASM volatile ("dsb 0xF":::"memory"); 800d822: f3bf 8f4f dsb sy } 800d826: bf00 nop SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ __DSB(); /* Ensure completion of memory access */ for(;;) /* wait until reset */ { __NOP(); 800d828: bf00 nop 800d82a: e7fd b.n 800d828 <__NVIC_SystemReset+0x20> 800d82c: e000ed00 .word 0xe000ed00 800d830: 05fa0004 .word 0x05fa0004 0800d834 : .chargerNumber = 00001, .unixTime = 1721651966, }; // Единая функция-обработчик всех команд со switch-case void SC_CommandHandler(ReceivedCommand_t* cmd) { 800d834: b580 push {r7, lr} 800d836: b084 sub sp, #16 800d838: af00 add r7, sp, #0 800d83a: 6078 str r0, [r7, #4] uint8_t response_code = RESP_FAILED; 800d83c: 2313 movs r3, #19 800d83e: 73fb strb r3, [r7, #15] switch (cmd->command) { 800d840: 687b ldr r3, [r7, #4] 800d842: 781b ldrb r3, [r3, #0] 800d844: 2bc2 cmp r3, #194 @ 0xc2 800d846: f300 80d0 bgt.w 800d9ea 800d84a: 2bb0 cmp r3, #176 @ 0xb0 800d84c: da0f bge.n 800d86e 800d84e: 2b60 cmp r3, #96 @ 0x60 800d850: d042 beq.n 800d8d8 800d852: 2b60 cmp r3, #96 @ 0x60 800d854: f300 80c9 bgt.w 800d9ea 800d858: 2b50 cmp r3, #80 @ 0x50 800d85a: d043 beq.n 800d8e4 800d85c: 2b50 cmp r3, #80 @ 0x50 800d85e: f300 80c4 bgt.w 800d9ea 800d862: 2b01 cmp r3, #1 800d864: f000 80aa beq.w 800d9bc 800d868: 2b40 cmp r3, #64 @ 0x40 800d86a: d02d beq.n 800d8c8 800d86c: e0bd b.n 800d9ea 800d86e: 3bb0 subs r3, #176 @ 0xb0 800d870: 2b12 cmp r3, #18 800d872: f200 80ba bhi.w 800d9ea 800d876: a201 add r2, pc, #4 @ (adr r2, 800d87c ) 800d878: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d87c: 0800d8eb .word 0x0800d8eb 800d880: 0800d9eb .word 0x0800d9eb 800d884: 0800d9eb .word 0x0800d9eb 800d888: 0800d9eb .word 0x0800d9eb 800d88c: 0800d9eb .word 0x0800d9eb 800d890: 0800d99b .word 0x0800d99b 800d894: 0800d9eb .word 0x0800d9eb 800d898: 0800d9eb .word 0x0800d9eb 800d89c: 0800d9eb .word 0x0800d9eb 800d8a0: 0800d9eb .word 0x0800d9eb 800d8a4: 0800d9eb .word 0x0800d9eb 800d8a8: 0800d9eb .word 0x0800d9eb 800d8ac: 0800d9eb .word 0x0800d9eb 800d8b0: 0800d9eb .word 0x0800d9eb 800d8b4: 0800d9eb .word 0x0800d9eb 800d8b8: 0800d9eb .word 0x0800d9eb 800d8bc: 0800d931 .word 0x0800d931 800d8c0: 0800d995 .word 0x0800d995 800d8c4: 0800d969 .word 0x0800d969 // Команды БЕЗ аргументов case CMD_GET_STATUS: // Логика получения информации monitoring_data_callback(); 800d8c8: f000 f8b6 bl 800da38 // Отправляем с нормальным приоритетом SC_SendPacket((uint8_t*)&statusPacket, sizeof(statusPacket), CMD_GET_STATUS); 800d8cc: 2240 movs r2, #64 @ 0x40 800d8ce: 2158 movs r1, #88 @ 0x58 800d8d0: 484d ldr r0, [pc, #308] @ (800da08 ) 800d8d2: f7ff feef bl 800d6b4 return; // Специальный ответ уже отправлен 800d8d6: e093 b.n 800da00 case CMD_GET_INFO: SC_SendPacket((uint8_t*)&infoPacket, sizeof(infoPacket), CMD_GET_INFO); 800d8d8: 2260 movs r2, #96 @ 0x60 800d8da: 210a movs r1, #10 800d8dc: 484b ldr r0, [pc, #300] @ (800da0c ) 800d8de: f7ff fee9 bl 800d6b4 return; 800d8e2: e08d b.n 800da00 case CMD_GET_LOG: debug_buffer_send(); 800d8e4: f7fd fddc bl 800b4a0 return; // Ответ формируется внутри debug_buffer_send 800d8e8: e08a b.n 800da00 // Команды С аргументами case CMD_SET_CONFIG: if (cmd->argument_length == sizeof(ConfigBlock_t)) { 800d8ea: 687b ldr r3, [r7, #4] 800d8ec: 785b ldrb r3, [r3, #1] 800d8ee: 2b0b cmp r3, #11 800d8f0: d11b bne.n 800d92a memcpy(&config, cmd->argument, sizeof(ConfigBlock_t)); 800d8f2: 687b ldr r3, [r7, #4] 800d8f4: 685a ldr r2, [r3, #4] 800d8f6: 4b46 ldr r3, [pc, #280] @ (800da10 ) 800d8f8: 6810 ldr r0, [r2, #0] 800d8fa: 6851 ldr r1, [r2, #4] 800d8fc: c303 stmia r3!, {r0, r1} 800d8fe: 8911 ldrh r1, [r2, #8] 800d900: 7a92 ldrb r2, [r2, #10] 800d902: 8019 strh r1, [r3, #0] 800d904: 709a strb r2, [r3, #2] GBT_SetConfig(); 800d906: f7fc fa73 bl 8009df0 config_initialized = 1; 800d90a: 4b42 ldr r3, [pc, #264] @ (800da14 ) 800d90c: 2201 movs r2, #1 800d90e: 701a strb r2, [r3, #0] GBT_SetConfig(); 800d910: f7fc fa6e bl 8009df0 // CONN.connState = CONN_Available; // log_printf(LOG_INFO, "Set Config: %s %d\n", config.location, config.chargerNumber); 800d914: 4b3e ldr r3, [pc, #248] @ (800da10 ) 800d916: f8d3 3003 ldr.w r3, [r3, #3] 800d91a: 4a3d ldr r2, [pc, #244] @ (800da10 ) 800d91c: 493e ldr r1, [pc, #248] @ (800da18 ) 800d91e: 2007 movs r0, #7 800d920: f7fd fe20 bl 800b564 response_code = RESP_SUCCESS; 800d924: 2312 movs r3, #18 800d926: 73fb strb r3, [r7, #15] break; 800d928: e062 b.n 800d9f0 } response_code = RESP_FAILED; 800d92a: 2313 movs r3, #19 800d92c: 73fb strb r3, [r7, #15] break; 800d92e: e05f b.n 800d9f0 case CMD_SET_POWER_LIMIT: if (cmd->argument_length == 1) { 800d930: 687b ldr r3, [r7, #4] 800d932: 785b ldrb r3, [r3, #1] 800d934: 2b01 cmp r3, #1 800d936: d114 bne.n 800d962 PSU0.power_limit = ((uint8_t*)cmd->argument)[0] * 1000; 800d938: 687b ldr r3, [r7, #4] 800d93a: 685b ldr r3, [r3, #4] 800d93c: 781b ldrb r3, [r3, #0] 800d93e: 461a mov r2, r3 800d940: f44f 737a mov.w r3, #1000 @ 0x3e8 800d944: fb02 f303 mul.w r3, r2, r3 800d948: 461a mov r2, r3 800d94a: 4b34 ldr r3, [pc, #208] @ (800da1c ) 800d94c: 615a str r2, [r3, #20] log_printf(LOG_INFO, "Power limit: %d\n", PSU0.power_limit); 800d94e: 4b33 ldr r3, [pc, #204] @ (800da1c ) 800d950: 695b ldr r3, [r3, #20] 800d952: 461a mov r2, r3 800d954: 4932 ldr r1, [pc, #200] @ (800da20 ) 800d956: 2007 movs r0, #7 800d958: f7fd fe04 bl 800b564 //CONN.connState = (((uint8_t*)cmd->argument)[0])/4; response_code = RESP_SUCCESS; 800d95c: 2312 movs r3, #18 800d95e: 73fb strb r3, [r7, #15] break; 800d960: e046 b.n 800d9f0 } response_code = RESP_FAILED; 800d962: 2313 movs r3, #19 800d964: 73fb strb r3, [r7, #15] break; 800d966: e043 b.n 800d9f0 case CMD_CHARGE_PERMIT: if (cmd->argument_length == 1) { 800d968: 687b ldr r3, [r7, #4] 800d96a: 785b ldrb r3, [r3, #1] 800d96c: 2b01 cmp r3, #1 800d96e: d10e bne.n 800d98e CONN.connControl = ((uint8_t*)cmd->argument)[0]; 800d970: 687b ldr r3, [r7, #4] 800d972: 685b ldr r3, [r3, #4] 800d974: 781a ldrb r2, [r3, #0] 800d976: 4b2b ldr r3, [pc, #172] @ (800da24 ) 800d978: 701a strb r2, [r3, #0] log_printf(LOG_INFO, "Charge permit: %d\n", CONN.connControl); 800d97a: 4b2a ldr r3, [pc, #168] @ (800da24 ) 800d97c: 781b ldrb r3, [r3, #0] 800d97e: 461a mov r2, r3 800d980: 4929 ldr r1, [pc, #164] @ (800da28 ) 800d982: 2007 movs r0, #7 800d984: f7fd fdee bl 800b564 response_code = RESP_SUCCESS; 800d988: 2312 movs r3, #18 800d98a: 73fb strb r3, [r7, #15] break; 800d98c: e030 b.n 800d9f0 } response_code = RESP_FAILED; 800d98e: 2313 movs r3, #19 800d990: 73fb strb r3, [r7, #15] break; 800d992: e02d b.n 800d9f0 // memcpy(&PSU_TestMode, cmd->argument, sizeof(PSU_TestMode_t)); // log_printf(LOG_INFO, "Test PSU: %d %d %d\n", PSU_TestMode.enable, PSU_TestMode.voltage, PSU_TestMode.current); // response_code = RESP_SUCCESS; // break; // } response_code = RESP_FAILED; 800d994: 2313 movs r3, #19 800d996: 73fb strb r3, [r7, #15] break; 800d998: e02a b.n 800d9f0 case CMD_DEVICE_RESET: // 2. Отправляем SUCCESS (хост может успеть получить его перед ребутом) SC_SendPacket(NULL, 0, RESP_SUCCESS); 800d99a: 2212 movs r2, #18 800d99c: 2100 movs r1, #0 800d99e: 2000 movs r0, #0 800d9a0: f7ff fe88 bl 800d6b4 while(huart2.gState == HAL_UART_STATE_BUSY_TX); // Ожидание завершения передачи 800d9a4: bf00 nop 800d9a6: 4b21 ldr r3, [pc, #132] @ (800da2c ) 800d9a8: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d9ac: b2db uxtb r3, r3 800d9ae: 2b21 cmp r3, #33 @ 0x21 800d9b0: d0f9 beq.n 800d9a6 HAL_Delay(10); 800d9b2: 200a movs r0, #10 800d9b4: f000 ff9c bl 800e8f0 // 3. Выполняем программный сброс NVIC_SystemReset(); 800d9b8: f7ff ff26 bl 800d808 <__NVIC_SystemReset> return; // Сюда код уже не дойдет, но для компилятора нxужно case CMD_ISOLATION_STATUS: if (cmd->argument_length == sizeof(IsolationStatusPacket_t)) { 800d9bc: 687b ldr r3, [r7, #4] 800d9be: 785b ldrb r3, [r3, #1] 800d9c0: 2b09 cmp r3, #9 800d9c2: d10f bne.n 800d9e4 memcpy(&ISO, cmd->argument, sizeof(IsolationStatusPacket_t)); 800d9c4: 687b ldr r3, [r7, #4] 800d9c6: 685a ldr r2, [r3, #4] 800d9c8: 4b19 ldr r3, [pc, #100] @ (800da30 ) 800d9ca: 6810 ldr r0, [r2, #0] 800d9cc: 6851 ldr r1, [r2, #4] 800d9ce: c303 stmia r3!, {r0, r1} 800d9d0: 7a12 ldrb r2, [r2, #8] 800d9d2: 701a strb r2, [r3, #0] // Для однонаправленного UART5 ответ не нужен if (g_sc_command_source == SC_SOURCE_UART5) { 800d9d4: 4b17 ldr r3, [pc, #92] @ (800da34 ) 800d9d6: 781b ldrb r3, [r3, #0] 800d9d8: b2db uxtb r3, r3 800d9da: 2b01 cmp r3, #1 800d9dc: d00f beq.n 800d9fe return; } response_code = RESP_SUCCESS; 800d9de: 2312 movs r3, #18 800d9e0: 73fb strb r3, [r7, #15] break; 800d9e2: e005 b.n 800d9f0 } response_code = RESP_FAILED; 800d9e4: 2313 movs r3, #19 800d9e6: 73fb strb r3, [r7, #15] break; 800d9e8: e002 b.n 800d9f0 default: // Неизвестная команда response_code = RESP_FAILED; 800d9ea: 2313 movs r3, #19 800d9ec: 73fb strb r3, [r7, #15] break; 800d9ee: bf00 nop } // Отправляем финальный ответ (для команд без собственного ответа) SC_SendPacket(NULL, 0, response_code); 800d9f0: 7bfb ldrb r3, [r7, #15] 800d9f2: 461a mov r2, r3 800d9f4: 2100 movs r1, #0 800d9f6: 2000 movs r0, #0 800d9f8: f7ff fe5c bl 800d6b4 800d9fc: e000 b.n 800da00 return; 800d9fe: bf00 nop } 800da00: 3710 adds r7, #16 800da02: 46bd mov sp, r7 800da04: bd80 pop {r7, pc} 800da06: bf00 nop 800da08: 20000ebc .word 0x20000ebc 800da0c: 20000f14 .word 0x20000f14 800da10: 2000006c .word 0x2000006c 800da14: 20000f1e .word 0x20000f1e 800da18: 08016cd8 .word 0x08016cd8 800da1c: 20000a14 .word 0x20000a14 800da20: 08016cec .word 0x08016cec 800da24: 200002f8 .word 0x200002f8 800da28: 08016d00 .word 0x08016d00 800da2c: 20000ffc .word 0x20000ffc 800da30: 20000060 .word 0x20000060 800da34: 20000eb8 .word 0x20000eb8 0800da38 : // Колбэк для заполнения данных мониторинга void monitoring_data_callback() { 800da38: b5b0 push {r4, r5, r7, lr} 800da3a: af00 add r7, sp, #0 // Информация о зарядной сессии statusPacket.SOC = CONN.SOC; 800da3c: 4b9d ldr r3, [pc, #628] @ (800dcb4 ) 800da3e: 789a ldrb r2, [r3, #2] 800da40: 4b9d ldr r3, [pc, #628] @ (800dcb8 ) 800da42: 709a strb r2, [r3, #2] statusPacket.Energy = CONN.Energy; 800da44: 4b9b ldr r3, [pc, #620] @ (800dcb4 ) 800da46: f8d3 3007 ldr.w r3, [r3, #7] 800da4a: 4a9b ldr r2, [pc, #620] @ (800dcb8 ) 800da4c: f8c2 3003 str.w r3, [r2, #3] statusPacket.RequestedVoltage = CONN.RequestedVoltage; 800da50: 4b98 ldr r3, [pc, #608] @ (800dcb4 ) 800da52: f8b3 300f ldrh.w r3, [r3, #15] 800da56: b29a uxth r2, r3 800da58: 4b97 ldr r3, [pc, #604] @ (800dcb8 ) 800da5a: f8a3 2007 strh.w r2, [r3, #7] statusPacket.RequestedCurrent = CONN.WantedCurrent; 800da5e: 4b95 ldr r3, [pc, #596] @ (800dcb4 ) 800da60: f8b3 301b ldrh.w r3, [r3, #27] 800da64: b29a uxth r2, r3 800da66: 4b94 ldr r3, [pc, #592] @ (800dcb8 ) 800da68: f8a3 2009 strh.w r2, [r3, #9] statusPacket.MeasuredVoltage = CONN.MeasuredVoltage; 800da6c: 4b91 ldr r3, [pc, #580] @ (800dcb4 ) 800da6e: f8b3 3013 ldrh.w r3, [r3, #19] 800da72: b29a uxth r2, r3 800da74: 4b90 ldr r3, [pc, #576] @ (800dcb8 ) 800da76: f8a3 200b strh.w r2, [r3, #11] statusPacket.MeasuredCurrent = CONN.MeasuredCurrent; 800da7a: 4b8e ldr r3, [pc, #568] @ (800dcb4 ) 800da7c: f8b3 3015 ldrh.w r3, [r3, #21] 800da80: b29a uxth r2, r3 800da82: 4b8d ldr r3, [pc, #564] @ (800dcb8 ) 800da84: f8a3 200d strh.w r2, [r3, #13] statusPacket.outputEnabled = CONN.outputEnabled; 800da88: 4b8a ldr r3, [pc, #552] @ (800dcb4 ) 800da8a: 7e1a ldrb r2, [r3, #24] 800da8c: 4b8a ldr r3, [pc, #552] @ (800dcb8 ) 800da8e: 73da strb r2, [r3, #15] statusPacket.chargingError = CONN.chargingError; 800da90: 4b88 ldr r3, [pc, #544] @ (800dcb4 ) 800da92: 7f5a ldrb r2, [r3, #29] 800da94: 4b88 ldr r3, [pc, #544] @ (800dcb8 ) 800da96: 705a strb r2, [r3, #1] statusPacket.connState = CONN.connState; 800da98: 4b86 ldr r3, [pc, #536] @ (800dcb4 ) 800da9a: 785a ldrb r2, [r3, #1] 800da9c: 4b86 ldr r3, [pc, #536] @ (800dcb8 ) 800da9e: 701a strb r2, [r3, #0] statusPacket.chargingElapsedTimeMin = 0; 800daa0: 4b85 ldr r3, [pc, #532] @ (800dcb8 ) 800daa2: 2200 movs r2, #0 800daa4: 741a strb r2, [r3, #16] 800daa6: 2200 movs r2, #0 800daa8: 745a strb r2, [r3, #17] statusPacket.chargingElapsedTimeSec = 0; 800daaa: 4b83 ldr r3, [pc, #524] @ (800dcb8 ) 800daac: 2200 movs r2, #0 800daae: 749a strb r2, [r3, #18] statusPacket.estimatedRemainingChargingTime = 0; 800dab0: 4b81 ldr r3, [pc, #516] @ (800dcb8 ) 800dab2: 2200 movs r2, #0 800dab4: 74da strb r2, [r3, #19] 800dab6: 2200 movs r2, #0 800dab8: 751a strb r2, [r3, #20] // состояние зарядной станции statusPacket.relayAC = RELAY_Read(RELAY_AC); 800daba: 2004 movs r0, #4 800dabc: f7fb fe7a bl 80097b4 800dac0: 4603 mov r3, r0 800dac2: f003 0301 and.w r3, r3, #1 800dac6: b2d9 uxtb r1, r3 800dac8: 4a7b ldr r2, [pc, #492] @ (800dcb8 ) 800daca: 7d53 ldrb r3, [r2, #21] 800dacc: f361 0300 bfi r3, r1, #0, #1 800dad0: 7553 strb r3, [r2, #21] statusPacket.relayDC = RELAY_Read(RELAY_DC); 800dad2: 2003 movs r0, #3 800dad4: f7fb fe6e bl 80097b4 800dad8: 4603 mov r3, r0 800dada: f003 0301 and.w r3, r3, #1 800dade: b2d9 uxtb r1, r3 800dae0: 4a75 ldr r2, [pc, #468] @ (800dcb8 ) 800dae2: 7d53 ldrb r3, [r2, #21] 800dae4: f361 0341 bfi r3, r1, #1, #1 800dae8: 7553 strb r3, [r2, #21] statusPacket.relayAUX = RELAY_Read(RELAY_AUX0); 800daea: 2000 movs r0, #0 800daec: f7fb fe62 bl 80097b4 800daf0: 4603 mov r3, r0 800daf2: f003 0301 and.w r3, r3, #1 800daf6: b2d9 uxtb r1, r3 800daf8: 4a6f ldr r2, [pc, #444] @ (800dcb8 ) 800dafa: 7d53 ldrb r3, [r2, #21] 800dafc: f361 0382 bfi r3, r1, #2, #1 800db00: 7553 strb r3, [r2, #21] statusPacket.lockState = GBT_LockGetState(); 800db02: f7fe f9bd bl 800be80 800db06: 4603 mov r3, r0 800db08: f003 0301 and.w r3, r3, #1 800db0c: b2d9 uxtb r1, r3 800db0e: 4a6a ldr r2, [pc, #424] @ (800dcb8 ) 800db10: 7d53 ldrb r3, [r2, #21] 800db12: f361 03c3 bfi r3, r1, #3, #1 800db16: 7553 strb r3, [r2, #21] statusPacket.stopButton = !IN_ReadInput(IN_ESTOP); 800db18: 2003 movs r0, #3 800db1a: f7fb fe5b bl 80097d4 800db1e: 4603 mov r3, r0 800db20: 2b00 cmp r3, #0 800db22: bf0c ite eq 800db24: 2301 moveq r3, #1 800db26: 2300 movne r3, #0 800db28: b2d9 uxtb r1, r3 800db2a: 4a63 ldr r2, [pc, #396] @ (800dcb8 ) 800db2c: 7d53 ldrb r3, [r2, #21] 800db2e: f361 1304 bfi r3, r1, #4, #1 800db32: 7553 strb r3, [r2, #21] statusPacket.logAvailable = (debug_buffer_available()>0)?1:0; 800db34: f7fd fca0 bl 800b478 800db38: 4603 mov r3, r0 800db3a: 2b00 cmp r3, #0 800db3c: bf14 ite ne 800db3e: 2301 movne r3, #1 800db40: 2300 moveq r3, #0 800db42: b2d9 uxtb r1, r3 800db44: 4a5c ldr r2, [pc, #368] @ (800dcb8 ) 800db46: 7d53 ldrb r3, [r2, #21] 800db48: f361 1345 bfi r3, r1, #5, #1 800db4c: 7553 strb r3, [r2, #21] statusPacket.evInfoAvailable = GBT_BAT_STAT_recv; 800db4e: 4b5b ldr r3, [pc, #364] @ (800dcbc ) 800db50: 781b ldrb r3, [r3, #0] 800db52: f003 0301 and.w r3, r3, #1 800db56: b2d9 uxtb r1, r3 800db58: 4a57 ldr r2, [pc, #348] @ (800dcb8 ) 800db5a: 7d53 ldrb r3, [r2, #21] 800db5c: f361 1386 bfi r3, r1, #6, #1 800db60: 7553 strb r3, [r2, #21] statusPacket.psuOnline = PSU0.online; 800db62: 4b57 ldr r3, [pc, #348] @ (800dcc0 ) 800db64: 7a1b ldrb r3, [r3, #8] 800db66: f003 0301 and.w r3, r3, #1 800db6a: b2d9 uxtb r1, r3 800db6c: 4a52 ldr r2, [pc, #328] @ (800dcb8 ) 800db6e: 7d53 ldrb r3, [r2, #21] 800db70: f361 13c7 bfi r3, r1, #7, #1 800db74: 7553 strb r3, [r2, #21] statusPacket.tempConnector0 = GBT_ReadTemp(0); // температура коннектора 800db76: 2000 movs r0, #0 800db78: f7fb ff10 bl 800999c 800db7c: 4603 mov r3, r0 800db7e: b25a sxtb r2, r3 800db80: 4b4d ldr r3, [pc, #308] @ (800dcb8 ) 800db82: 765a strb r2, [r3, #25] statusPacket.tempConnector1 = GBT_ReadTemp(1); 800db84: 2001 movs r0, #1 800db86: f7fb ff09 bl 800999c 800db8a: 4603 mov r3, r0 800db8c: b25a sxtb r2, r3 800db8e: 4b4a ldr r3, [pc, #296] @ (800dcb8 ) 800db90: 769a strb r2, [r3, #26] statusPacket.tempAmbient = PSU0.tempAmbient; // температура окружающего воздуха 800db92: 4b4b ldr r3, [pc, #300] @ (800dcc0 ) 800db94: 69db ldr r3, [r3, #28] 800db96: b25a sxtb r2, r3 800db98: 4b47 ldr r3, [pc, #284] @ (800dcb8 ) 800db9a: 76da strb r2, [r3, #27] statusPacket.tempBatteryMax = GBT_BatteryStatus.batteryHighestTemp; // максимальная температура батареи 800db9c: 4b49 ldr r3, [pc, #292] @ (800dcc4 ) 800db9e: 785b ldrb r3, [r3, #1] 800dba0: b25a sxtb r2, r3 800dba2: 4b45 ldr r3, [pc, #276] @ (800dcb8 ) 800dba4: 771a strb r2, [r3, #28] statusPacket.tempBatteryMin = GBT_BatteryStatus.batteryLowestTemp; // минимальная температура батареи 800dba6: 4b47 ldr r3, [pc, #284] @ (800dcc4 ) 800dba8: 78db ldrb r3, [r3, #3] 800dbaa: b25a sxtb r2, r3 800dbac: 4b42 ldr r3, [pc, #264] @ (800dcb8 ) 800dbae: 775a strb r2, [r3, #29] statusPacket.highestVoltageOfBatteryCell = GBT_ChargingStatus.highestVoltageOfBatteryCell; 800dbb0: 4b45 ldr r3, [pc, #276] @ (800dcc8 ) 800dbb2: 889b ldrh r3, [r3, #4] 800dbb4: b29a uxth r2, r3 800dbb6: 4b40 ldr r3, [pc, #256] @ (800dcb8 ) 800dbb8: 83da strh r2, [r3, #30] statusPacket.batteryStatus = GBT_BatteryStatus.batteryStatus; 800dbba: 4b42 ldr r3, [pc, #264] @ (800dcc4 ) 800dbbc: 799a ldrb r2, [r3, #6] 800dbbe: 4b3e ldr r3, [pc, #248] @ (800dcb8 ) 800dbc0: f883 2020 strb.w r2, [r3, #32] statusPacket.phaseVoltageAB = PSU_06.VAB; 800dbc4: 4b41 ldr r3, [pc, #260] @ (800dccc ) 800dbc6: 689b ldr r3, [r3, #8] 800dbc8: b29a uxth r2, r3 800dbca: 4b3b ldr r3, [pc, #236] @ (800dcb8 ) 800dbcc: f8a3 2021 strh.w r2, [r3, #33] @ 0x21 statusPacket.phaseVoltageBC = PSU_06.VBC; 800dbd0: 4b3e ldr r3, [pc, #248] @ (800dccc ) 800dbd2: 68db ldr r3, [r3, #12] 800dbd4: b29a uxth r2, r3 800dbd6: 4b38 ldr r3, [pc, #224] @ (800dcb8 ) 800dbd8: f8a3 2023 strh.w r2, [r3, #35] @ 0x23 statusPacket.phaseVoltageCA = PSU_06.VCA; 800dbdc: 4b3b ldr r3, [pc, #236] @ (800dccc ) 800dbde: 691b ldr r3, [r3, #16] 800dbe0: b29a uxth r2, r3 800dbe2: 4b35 ldr r3, [pc, #212] @ (800dcb8 ) 800dbe4: f8a3 2025 strh.w r2, [r3, #37] @ 0x25 memcpy(statusPacket.VIN, GBT_EVInfo.EVIN, sizeof(GBT_EVInfo.EVIN)); 800dbe8: 4b33 ldr r3, [pc, #204] @ (800dcb8 ) 800dbea: 4a39 ldr r2, [pc, #228] @ (800dcd0 ) 800dbec: 3327 adds r3, #39 @ 0x27 800dbee: 3218 adds r2, #24 800dbf0: 6815 ldr r5, [r2, #0] 800dbf2: 6854 ldr r4, [r2, #4] 800dbf4: 6890 ldr r0, [r2, #8] 800dbf6: 68d1 ldr r1, [r2, #12] 800dbf8: 601d str r5, [r3, #0] 800dbfa: 605c str r4, [r3, #4] 800dbfc: 6098 str r0, [r3, #8] 800dbfe: 60d9 str r1, [r3, #12] 800dc00: 7c12 ldrb r2, [r2, #16] 800dc02: 741a strb r2, [r3, #16] statusPacket.batteryType = GBT_EVInfo.batteryType; 800dc04: 4b32 ldr r3, [pc, #200] @ (800dcd0 ) 800dc06: 78da ldrb r2, [r3, #3] 800dc08: 4b2b ldr r3, [pc, #172] @ (800dcb8 ) 800dc0a: f883 2038 strb.w r2, [r3, #56] @ 0x38 statusPacket.batteryCapacity = GBT_EVInfo.batteryCapacity; 800dc0e: 4b30 ldr r3, [pc, #192] @ (800dcd0 ) 800dc10: 889b ldrh r3, [r3, #4] 800dc12: b29a uxth r2, r3 800dc14: 4b28 ldr r3, [pc, #160] @ (800dcb8 ) 800dc16: f8a3 2039 strh.w r2, [r3, #57] @ 0x39 statusPacket.batteryVoltage = GBT_EVInfo.batteryVoltage; 800dc1a: 4b2d ldr r3, [pc, #180] @ (800dcd0 ) 800dc1c: 88db ldrh r3, [r3, #6] 800dc1e: b29a uxth r2, r3 800dc20: 4b25 ldr r3, [pc, #148] @ (800dcb8 ) 800dc22: f8a3 203b strh.w r2, [r3, #59] @ 0x3b memcpy(statusPacket.batteryVendor, GBT_EVInfo.batteryVendor, sizeof(statusPacket.batteryVendor)); 800dc26: 4b2a ldr r3, [pc, #168] @ (800dcd0 ) 800dc28: 689b ldr r3, [r3, #8] 800dc2a: 461a mov r2, r3 800dc2c: 4b22 ldr r3, [pc, #136] @ (800dcb8 ) 800dc2e: f8c3 203d str.w r2, [r3, #61] @ 0x3d statusPacket.batterySN = GBT_EVInfo.batterySN; 800dc32: 4b27 ldr r3, [pc, #156] @ (800dcd0 ) 800dc34: 68db ldr r3, [r3, #12] 800dc36: 4a20 ldr r2, [pc, #128] @ (800dcb8 ) 800dc38: f8c2 3041 str.w r3, [r2, #65] @ 0x41 statusPacket.batteryManuD = GBT_EVInfo.batteryManuD; 800dc3c: 4b24 ldr r3, [pc, #144] @ (800dcd0 ) 800dc3e: 7c9a ldrb r2, [r3, #18] 800dc40: 4b1d ldr r3, [pc, #116] @ (800dcb8 ) 800dc42: f883 2047 strb.w r2, [r3, #71] @ 0x47 statusPacket.batteryManuM = GBT_EVInfo.batteryManuM; 800dc46: 4b22 ldr r3, [pc, #136] @ (800dcd0 ) 800dc48: 7c5a ldrb r2, [r3, #17] 800dc4a: 4b1b ldr r3, [pc, #108] @ (800dcb8 ) 800dc4c: f883 2046 strb.w r2, [r3, #70] @ 0x46 statusPacket.batteryManuY = GBT_EVInfo.batteryManuY; 800dc50: 4b1f ldr r3, [pc, #124] @ (800dcd0 ) 800dc52: 7c1a ldrb r2, [r3, #16] 800dc54: 4b18 ldr r3, [pc, #96] @ (800dcb8 ) 800dc56: f883 2045 strb.w r2, [r3, #69] @ 0x45 statusPacket.batteryCycleCount = GBT_EVInfo.batteryCycleCount; 800dc5a: 4b1d ldr r3, [pc, #116] @ (800dcd0 ) 800dc5c: 7cda ldrb r2, [r3, #19] 800dc5e: 7d19 ldrb r1, [r3, #20] 800dc60: 0209 lsls r1, r1, #8 800dc62: 430a orrs r2, r1 800dc64: 7d5b ldrb r3, [r3, #21] 800dc66: 041b lsls r3, r3, #16 800dc68: 4313 orrs r3, r2 800dc6a: b29a uxth r2, r3 800dc6c: 4b12 ldr r3, [pc, #72] @ (800dcb8 ) 800dc6e: f8a3 2048 strh.w r2, [r3, #72] @ 0x48 statusPacket.ownAuto = GBT_EVInfo.ownAuto; 800dc72: 4b17 ldr r3, [pc, #92] @ (800dcd0 ) 800dc74: 7d9a ldrb r2, [r3, #22] 800dc76: 4b10 ldr r3, [pc, #64] @ (800dcb8 ) 800dc78: f883 204a strb.w r2, [r3, #74] @ 0x4a memcpy(statusPacket.EV_SW_VER, GBT_EVInfo.EV_SW_VER, sizeof(statusPacket.EV_SW_VER)); 800dc7c: 4b0e ldr r3, [pc, #56] @ (800dcb8 ) 800dc7e: 4a14 ldr r2, [pc, #80] @ (800dcd0 ) 800dc80: 334b adds r3, #75 @ 0x4b 800dc82: 3229 adds r2, #41 @ 0x29 800dc84: 6811 ldr r1, [r2, #0] 800dc86: 6852 ldr r2, [r2, #4] 800dc88: 6019 str r1, [r3, #0] 800dc8a: 605a str r2, [r3, #4] statusPacket.testMode = 0; 800dc8c: 4b0a ldr r3, [pc, #40] @ (800dcb8 ) 800dc8e: 2200 movs r2, #0 800dc90: f883 2053 strb.w r2, [r3, #83] @ 0x53 statusPacket.testVoltage = 0; 800dc94: 4b08 ldr r3, [pc, #32] @ (800dcb8 ) 800dc96: 2200 movs r2, #0 800dc98: f883 2054 strb.w r2, [r3, #84] @ 0x54 800dc9c: 2200 movs r2, #0 800dc9e: f883 2055 strb.w r2, [r3, #85] @ 0x55 statusPacket.testCurrent = 0; 800dca2: 4b05 ldr r3, [pc, #20] @ (800dcb8 ) 800dca4: 2200 movs r2, #0 800dca6: f883 2056 strb.w r2, [r3, #86] @ 0x56 800dcaa: 2200 movs r2, #0 800dcac: f883 2057 strb.w r2, [r3, #87] @ 0x57 // В debug.c есть CONN_SetState, предполагаем наличие CONN_GetState() // Если такой функции нет, закомментируйте следующую строку: // statusPacket.connState = CONN_GetState(); } 800dcb0: bf00 nop 800dcb2: bdb0 pop {r4, r5, r7, pc} 800dcb4: 200002f8 .word 0x200002f8 800dcb8: 20000ebc .word 0x20000ebc 800dcbc: 20000329 .word 0x20000329 800dcc0: 20000a14 .word 0x20000a14 800dcc4: 200003a4 .word 0x200003a4 800dcc8: 20000398 .word 0x20000398 800dccc: 200009e8 .word 0x200009e8 800dcd0: 20000344 .word 0x20000344 0800dcd4 : static uint32_t RTC1_ReadTimeCounter(RTC_HandleTypeDef *hrtc); static HAL_StatusTypeDef RTC1_ExitInitMode(RTC_HandleTypeDef *hrtc); static HAL_StatusTypeDef RTC1_EnterInitMode(RTC_HandleTypeDef *hrtc); uint32_t get_Current_Time(){ 800dcd4: b580 push {r7, lr} 800dcd6: af00 add r7, sp, #0 return RTC1_ReadTimeCounter(&hrtc); 800dcd8: 4802 ldr r0, [pc, #8] @ (800dce4 ) 800dcda: f000 f8a5 bl 800de28 800dcde: 4603 mov r3, r0 } 800dce0: 4618 mov r0, r3 800dce2: bd80 pop {r7, pc} 800dce4: 20000a84 .word 0x20000a84 0800dce8 : void set_Time(uint32_t unix_time){ 800dce8: b580 push {r7, lr} 800dcea: b082 sub sp, #8 800dcec: af00 add r7, sp, #0 800dcee: 6078 str r0, [r7, #4] RTC1_WriteTimeCounter(&hrtc, unix_time); 800dcf0: 6879 ldr r1, [r7, #4] 800dcf2: 4803 ldr r0, [pc, #12] @ (800dd00 ) 800dcf4: f000 f8c8 bl 800de88 } 800dcf8: bf00 nop 800dcfa: 3708 adds r7, #8 800dcfc: 46bd mov sp, r7 800dcfe: bd80 pop {r7, pc} 800dd00: 20000a84 .word 0x20000a84 0800dd04 : uint8_t to_bcd(int value) { 800dd04: b480 push {r7} 800dd06: b083 sub sp, #12 800dd08: af00 add r7, sp, #0 800dd0a: 6078 str r0, [r7, #4] return ((value / 10) << 4) | (value % 10); 800dd0c: 687b ldr r3, [r7, #4] 800dd0e: 4a0f ldr r2, [pc, #60] @ (800dd4c ) 800dd10: fb82 1203 smull r1, r2, r2, r3 800dd14: 1092 asrs r2, r2, #2 800dd16: 17db asrs r3, r3, #31 800dd18: 1ad3 subs r3, r2, r3 800dd1a: b25b sxtb r3, r3 800dd1c: 011b lsls r3, r3, #4 800dd1e: b258 sxtb r0, r3 800dd20: 687a ldr r2, [r7, #4] 800dd22: 4b0a ldr r3, [pc, #40] @ (800dd4c ) 800dd24: fb83 1302 smull r1, r3, r3, r2 800dd28: 1099 asrs r1, r3, #2 800dd2a: 17d3 asrs r3, r2, #31 800dd2c: 1ac9 subs r1, r1, r3 800dd2e: 460b mov r3, r1 800dd30: 009b lsls r3, r3, #2 800dd32: 440b add r3, r1 800dd34: 005b lsls r3, r3, #1 800dd36: 1ad1 subs r1, r2, r3 800dd38: b24b sxtb r3, r1 800dd3a: 4303 orrs r3, r0 800dd3c: b25b sxtb r3, r3 800dd3e: b2db uxtb r3, r3 } 800dd40: 4618 mov r0, r3 800dd42: 370c adds r7, #12 800dd44: 46bd mov sp, r7 800dd46: bc80 pop {r7} 800dd48: 4770 bx lr 800dd4a: bf00 nop 800dd4c: 66666667 .word 0x66666667 0800dd50 : void unix_to_bcd(uint32_t unix_time, uint8_t *time) { 800dd50: b590 push {r4, r7, lr} 800dd52: b087 sub sp, #28 800dd54: af00 add r7, sp, #0 800dd56: 6078 str r0, [r7, #4] 800dd58: 6039 str r1, [r7, #0] struct tm *tm_info; time_t raw_time = (time_t)unix_time; 800dd5a: 6879 ldr r1, [r7, #4] 800dd5c: 2000 movs r0, #0 800dd5e: 460a mov r2, r1 800dd60: 4603 mov r3, r0 800dd62: e9c7 2302 strd r2, r3, [r7, #8] tm_info = gmtime(&raw_time); 800dd66: f107 0308 add.w r3, r7, #8 800dd6a: 4618 mov r0, r3 800dd6c: f006 fa1e bl 80141ac 800dd70: 6178 str r0, [r7, #20] time[0] = to_bcd(tm_info->tm_sec); 800dd72: 697b ldr r3, [r7, #20] 800dd74: 681b ldr r3, [r3, #0] 800dd76: 4618 mov r0, r3 800dd78: f7ff ffc4 bl 800dd04 800dd7c: 4603 mov r3, r0 800dd7e: 461a mov r2, r3 800dd80: 683b ldr r3, [r7, #0] 800dd82: 701a strb r2, [r3, #0] time[1] = to_bcd(tm_info->tm_min); 800dd84: 697b ldr r3, [r7, #20] 800dd86: 685a ldr r2, [r3, #4] 800dd88: 683b ldr r3, [r7, #0] 800dd8a: 1c5c adds r4, r3, #1 800dd8c: 4610 mov r0, r2 800dd8e: f7ff ffb9 bl 800dd04 800dd92: 4603 mov r3, r0 800dd94: 7023 strb r3, [r4, #0] time[2] = to_bcd(tm_info->tm_hour); 800dd96: 697b ldr r3, [r7, #20] 800dd98: 689a ldr r2, [r3, #8] 800dd9a: 683b ldr r3, [r7, #0] 800dd9c: 1c9c adds r4, r3, #2 800dd9e: 4610 mov r0, r2 800dda0: f7ff ffb0 bl 800dd04 800dda4: 4603 mov r3, r0 800dda6: 7023 strb r3, [r4, #0] time[3] = to_bcd(tm_info->tm_mday); 800dda8: 697b ldr r3, [r7, #20] 800ddaa: 68da ldr r2, [r3, #12] 800ddac: 683b ldr r3, [r7, #0] 800ddae: 1cdc adds r4, r3, #3 800ddb0: 4610 mov r0, r2 800ddb2: f7ff ffa7 bl 800dd04 800ddb6: 4603 mov r3, r0 800ddb8: 7023 strb r3, [r4, #0] time[4] = to_bcd(tm_info->tm_mon + 1); // tm_mon is 0-11 800ddba: 697b ldr r3, [r7, #20] 800ddbc: 691b ldr r3, [r3, #16] 800ddbe: 1c5a adds r2, r3, #1 800ddc0: 683b ldr r3, [r7, #0] 800ddc2: 1d1c adds r4, r3, #4 800ddc4: 4610 mov r0, r2 800ddc6: f7ff ff9d bl 800dd04 800ddca: 4603 mov r3, r0 800ddcc: 7023 strb r3, [r4, #0] time[5] = to_bcd((tm_info->tm_year + 1900) % 100); // Year in 2 digits 800ddce: 697b ldr r3, [r7, #20] 800ddd0: 695b ldr r3, [r3, #20] 800ddd2: f203 736c addw r3, r3, #1900 @ 0x76c 800ddd6: 4a13 ldr r2, [pc, #76] @ (800de24 ) 800ddd8: fb82 1203 smull r1, r2, r2, r3 800dddc: 1151 asrs r1, r2, #5 800ddde: 17da asrs r2, r3, #31 800dde0: 1a8a subs r2, r1, r2 800dde2: 2164 movs r1, #100 @ 0x64 800dde4: fb01 f202 mul.w r2, r1, r2 800dde8: 1a9a subs r2, r3, r2 800ddea: 683b ldr r3, [r7, #0] 800ddec: 1d5c adds r4, r3, #5 800ddee: 4610 mov r0, r2 800ddf0: f7ff ff88 bl 800dd04 800ddf4: 4603 mov r3, r0 800ddf6: 7023 strb r3, [r4, #0] time[6] = to_bcd((tm_info->tm_year + 1900) / 100); // Century in 2 digits 800ddf8: 697b ldr r3, [r7, #20] 800ddfa: 695b ldr r3, [r3, #20] 800ddfc: f203 736c addw r3, r3, #1900 @ 0x76c 800de00: 4a08 ldr r2, [pc, #32] @ (800de24 ) 800de02: fb82 1203 smull r1, r2, r2, r3 800de06: 1152 asrs r2, r2, #5 800de08: 17db asrs r3, r3, #31 800de0a: 1ad2 subs r2, r2, r3 800de0c: 683b ldr r3, [r7, #0] 800de0e: 1d9c adds r4, r3, #6 800de10: 4610 mov r0, r2 800de12: f7ff ff77 bl 800dd04 800de16: 4603 mov r3, r0 800de18: 7023 strb r3, [r4, #0] } 800de1a: bf00 nop 800de1c: 371c adds r7, #28 800de1e: 46bd mov sp, r7 800de20: bd90 pop {r4, r7, pc} 800de22: bf00 nop 800de24: 51eb851f .word 0x51eb851f 0800de28 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval Time counter */ static uint32_t RTC1_ReadTimeCounter(RTC_HandleTypeDef *hrtc) { 800de28: b480 push {r7} 800de2a: b087 sub sp, #28 800de2c: af00 add r7, sp, #0 800de2e: 6078 str r0, [r7, #4] uint16_t high1 = 0U, high2 = 0U, low = 0U; 800de30: 2300 movs r3, #0 800de32: 827b strh r3, [r7, #18] 800de34: 2300 movs r3, #0 800de36: 823b strh r3, [r7, #16] 800de38: 2300 movs r3, #0 800de3a: 81fb strh r3, [r7, #14] uint32_t timecounter = 0U; 800de3c: 2300 movs r3, #0 800de3e: 617b str r3, [r7, #20] high1 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT); 800de40: 687b ldr r3, [r7, #4] 800de42: 681b ldr r3, [r3, #0] 800de44: 699b ldr r3, [r3, #24] 800de46: 827b strh r3, [r7, #18] low = READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT); 800de48: 687b ldr r3, [r7, #4] 800de4a: 681b ldr r3, [r3, #0] 800de4c: 69db ldr r3, [r3, #28] 800de4e: 81fb strh r3, [r7, #14] high2 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT); 800de50: 687b ldr r3, [r7, #4] 800de52: 681b ldr r3, [r3, #0] 800de54: 699b ldr r3, [r3, #24] 800de56: 823b strh r3, [r7, #16] if (high1 != high2) 800de58: 8a7a ldrh r2, [r7, #18] 800de5a: 8a3b ldrh r3, [r7, #16] 800de5c: 429a cmp r2, r3 800de5e: d008 beq.n 800de72 { /* In this case the counter roll over during reading of CNTL and CNTH registers, read again CNTL register then return the counter value */ timecounter = (((uint32_t) high2 << 16U) | READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT)); 800de60: 8a3b ldrh r3, [r7, #16] 800de62: 041a lsls r2, r3, #16 800de64: 687b ldr r3, [r7, #4] 800de66: 681b ldr r3, [r3, #0] 800de68: 69db ldr r3, [r3, #28] 800de6a: b29b uxth r3, r3 800de6c: 4313 orrs r3, r2 800de6e: 617b str r3, [r7, #20] 800de70: e004 b.n 800de7c } else { /* No counter roll over during reading of CNTL and CNTH registers, counter value is equal to first value of CNTL and CNTH */ timecounter = (((uint32_t) high1 << 16U) | low); 800de72: 8a7b ldrh r3, [r7, #18] 800de74: 041a lsls r2, r3, #16 800de76: 89fb ldrh r3, [r7, #14] 800de78: 4313 orrs r3, r2 800de7a: 617b str r3, [r7, #20] } return timecounter; 800de7c: 697b ldr r3, [r7, #20] } 800de7e: 4618 mov r0, r3 800de80: 371c adds r7, #28 800de82: 46bd mov sp, r7 800de84: bc80 pop {r7} 800de86: 4770 bx lr 0800de88 : * the configuration information for RTC. * @param TimeCounter: Counter to write in RTC_CNT registers * @retval HAL status */ static HAL_StatusTypeDef RTC1_WriteTimeCounter(RTC_HandleTypeDef *hrtc, uint32_t TimeCounter) { 800de88: b580 push {r7, lr} 800de8a: b084 sub sp, #16 800de8c: af00 add r7, sp, #0 800de8e: 6078 str r0, [r7, #4] 800de90: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 800de92: 2300 movs r3, #0 800de94: 73fb strb r3, [r7, #15] /* Set Initialization mode */ if (RTC1_EnterInitMode(hrtc) != HAL_OK) 800de96: 6878 ldr r0, [r7, #4] 800de98: f000 f81d bl 800ded6 800de9c: 4603 mov r3, r0 800de9e: 2b00 cmp r3, #0 800dea0: d002 beq.n 800dea8 { status = HAL_ERROR; 800dea2: 2301 movs r3, #1 800dea4: 73fb strb r3, [r7, #15] 800dea6: e011 b.n 800decc } else { /* Set RTC COUNTER MSB word */ WRITE_REG(hrtc->Instance->CNTH, (TimeCounter >> 16U)); 800dea8: 687b ldr r3, [r7, #4] 800deaa: 681b ldr r3, [r3, #0] 800deac: 683a ldr r2, [r7, #0] 800deae: 0c12 lsrs r2, r2, #16 800deb0: 619a str r2, [r3, #24] /* Set RTC COUNTER LSB word */ WRITE_REG(hrtc->Instance->CNTL, (TimeCounter & RTC_CNTL_RTC_CNT)); 800deb2: 687b ldr r3, [r7, #4] 800deb4: 681b ldr r3, [r3, #0] 800deb6: 683a ldr r2, [r7, #0] 800deb8: b292 uxth r2, r2 800deba: 61da str r2, [r3, #28] /* Wait for synchro */ if (RTC1_ExitInitMode(hrtc) != HAL_OK) 800debc: 6878 ldr r0, [r7, #4] 800debe: f000 f832 bl 800df26 800dec2: 4603 mov r3, r0 800dec4: 2b00 cmp r3, #0 800dec6: d001 beq.n 800decc { status = HAL_ERROR; 800dec8: 2301 movs r3, #1 800deca: 73fb strb r3, [r7, #15] } } return status; 800decc: 7bfb ldrb r3, [r7, #15] } 800dece: 4618 mov r0, r3 800ded0: 3710 adds r7, #16 800ded2: 46bd mov sp, r7 800ded4: bd80 pop {r7, pc} 0800ded6 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC1_EnterInitMode(RTC_HandleTypeDef *hrtc) { 800ded6: b580 push {r7, lr} 800ded8: b084 sub sp, #16 800deda: af00 add r7, sp, #0 800dedc: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800dede: 2300 movs r3, #0 800dee0: 60fb str r3, [r7, #12] tickstart = HAL_GetTick(); 800dee2: f000 fcfb bl 800e8dc 800dee6: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800dee8: e009 b.n 800defe { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800deea: f000 fcf7 bl 800e8dc 800deee: 4602 mov r2, r0 800def0: 68fb ldr r3, [r7, #12] 800def2: 1ad3 subs r3, r2, r3 800def4: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800def8: d901 bls.n 800defe { return HAL_TIMEOUT; 800defa: 2303 movs r3, #3 800defc: e00f b.n 800df1e while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800defe: 687b ldr r3, [r7, #4] 800df00: 681b ldr r3, [r3, #0] 800df02: 685b ldr r3, [r3, #4] 800df04: f003 0320 and.w r3, r3, #32 800df08: 2b00 cmp r3, #0 800df0a: d0ee beq.n 800deea } } /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); 800df0c: 687b ldr r3, [r7, #4] 800df0e: 681b ldr r3, [r3, #0] 800df10: 685a ldr r2, [r3, #4] 800df12: 687b ldr r3, [r7, #4] 800df14: 681b ldr r3, [r3, #0] 800df16: f042 0210 orr.w r2, r2, #16 800df1a: 605a str r2, [r3, #4] return HAL_OK; 800df1c: 2300 movs r3, #0 } 800df1e: 4618 mov r0, r3 800df20: 3710 adds r7, #16 800df22: 46bd mov sp, r7 800df24: bd80 pop {r7, pc} 0800df26 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC1_ExitInitMode(RTC_HandleTypeDef *hrtc) { 800df26: b580 push {r7, lr} 800df28: b084 sub sp, #16 800df2a: af00 add r7, sp, #0 800df2c: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800df2e: 2300 movs r3, #0 800df30: 60fb str r3, [r7, #12] /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 800df32: 687b ldr r3, [r7, #4] 800df34: 681b ldr r3, [r3, #0] 800df36: 685a ldr r2, [r3, #4] 800df38: 687b ldr r3, [r7, #4] 800df3a: 681b ldr r3, [r3, #0] 800df3c: f022 0210 bic.w r2, r2, #16 800df40: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 800df42: f000 fccb bl 800e8dc 800df46: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800df48: e009 b.n 800df5e { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800df4a: f000 fcc7 bl 800e8dc 800df4e: 4602 mov r2, r0 800df50: 68fb ldr r3, [r7, #12] 800df52: 1ad3 subs r3, r2, r3 800df54: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800df58: d901 bls.n 800df5e { return HAL_TIMEOUT; 800df5a: 2303 movs r3, #3 800df5c: e007 b.n 800df6e while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800df5e: 687b ldr r3, [r7, #4] 800df60: 681b ldr r3, [r3, #0] 800df62: 685b ldr r3, [r3, #4] 800df64: f003 0320 and.w r3, r3, #32 800df68: 2b00 cmp r3, #0 800df6a: d0ee beq.n 800df4a } } return HAL_OK; 800df6c: 2300 movs r3, #0 } 800df6e: 4618 mov r0, r3 800df70: 3710 adds r7, #16 800df72: 46bd mov sp, r7 800df74: bd80 pop {r7, pc} ... 0800df78 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 800df78: b480 push {r7} 800df7a: b085 sub sp, #20 800df7c: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800df7e: 4b15 ldr r3, [pc, #84] @ (800dfd4 ) 800df80: 699b ldr r3, [r3, #24] 800df82: 4a14 ldr r2, [pc, #80] @ (800dfd4 ) 800df84: f043 0301 orr.w r3, r3, #1 800df88: 6193 str r3, [r2, #24] 800df8a: 4b12 ldr r3, [pc, #72] @ (800dfd4 ) 800df8c: 699b ldr r3, [r3, #24] 800df8e: f003 0301 and.w r3, r3, #1 800df92: 60bb str r3, [r7, #8] 800df94: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 800df96: 4b0f ldr r3, [pc, #60] @ (800dfd4 ) 800df98: 69db ldr r3, [r3, #28] 800df9a: 4a0e ldr r2, [pc, #56] @ (800dfd4 ) 800df9c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 800dfa0: 61d3 str r3, [r2, #28] 800dfa2: 4b0c ldr r3, [pc, #48] @ (800dfd4 ) 800dfa4: 69db ldr r3, [r3, #28] 800dfa6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800dfaa: 607b str r3, [r7, #4] 800dfac: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800dfae: 4b0a ldr r3, [pc, #40] @ (800dfd8 ) 800dfb0: 685b ldr r3, [r3, #4] 800dfb2: 60fb str r3, [r7, #12] 800dfb4: 68fb ldr r3, [r7, #12] 800dfb6: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 800dfba: 60fb str r3, [r7, #12] 800dfbc: 68fb ldr r3, [r7, #12] 800dfbe: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 800dfc2: 60fb str r3, [r7, #12] 800dfc4: 4a04 ldr r2, [pc, #16] @ (800dfd8 ) 800dfc6: 68fb ldr r3, [r7, #12] 800dfc8: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800dfca: bf00 nop 800dfcc: 3714 adds r7, #20 800dfce: 46bd mov sp, r7 800dfd0: bc80 pop {r7} 800dfd2: 4770 bx lr 800dfd4: 40021000 .word 0x40021000 800dfd8: 40010000 .word 0x40010000 0800dfdc : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 800dfdc: b480 push {r7} 800dfde: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 800dfe0: bf00 nop 800dfe2: e7fd b.n 800dfe0 0800dfe4 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 800dfe4: b480 push {r7} 800dfe6: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 800dfe8: bf00 nop 800dfea: e7fd b.n 800dfe8 0800dfec : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 800dfec: b480 push {r7} 800dfee: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 800dff0: bf00 nop 800dff2: e7fd b.n 800dff0 0800dff4 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800dff4: b480 push {r7} 800dff6: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 800dff8: bf00 nop 800dffa: e7fd b.n 800dff8 0800dffc : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 800dffc: b480 push {r7} 800dffe: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 800e000: bf00 nop 800e002: e7fd b.n 800e000 0800e004 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 800e004: b480 push {r7} 800e006: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 800e008: bf00 nop 800e00a: 46bd mov sp, r7 800e00c: bc80 pop {r7} 800e00e: 4770 bx lr 0800e010 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 800e010: b480 push {r7} 800e012: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 800e014: bf00 nop 800e016: 46bd mov sp, r7 800e018: bc80 pop {r7} 800e01a: 4770 bx lr 0800e01c : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 800e01c: b480 push {r7} 800e01e: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 800e020: bf00 nop 800e022: 46bd mov sp, r7 800e024: bc80 pop {r7} 800e026: 4770 bx lr 0800e028 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 800e028: b580 push {r7, lr} 800e02a: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 800e02c: f000 fc44 bl 800e8b8 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 800e030: bf00 nop 800e032: bd80 pop {r7, pc} 0800e034 : /** * @brief This function handles CAN1 RX0 interrupt. */ void CAN1_RX0_IRQHandler(void) { 800e034: b580 push {r7, lr} 800e036: af00 add r7, sp, #0 /* USER CODE BEGIN CAN1_RX0_IRQn 0 */ /* USER CODE END CAN1_RX0_IRQn 0 */ HAL_CAN_IRQHandler(&hcan1); 800e038: 4802 ldr r0, [pc, #8] @ (800e044 ) 800e03a: f001 fe35 bl 800fca8 /* USER CODE BEGIN CAN1_RX0_IRQn 1 */ /* USER CODE END CAN1_RX0_IRQn 1 */ } 800e03e: bf00 nop 800e040: bd80 pop {r7, pc} 800e042: bf00 nop 800e044: 200002a4 .word 0x200002a4 0800e048 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { 800e048: b580 push {r7, lr} 800e04a: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 800e04c: 4802 ldr r0, [pc, #8] @ (800e058 ) 800e04e: f004 fdcb bl 8012be8 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } 800e052: bf00 nop 800e054: bd80 pop {r7, pc} 800e056: bf00 nop 800e058: 20000fb4 .word 0x20000fb4 0800e05c : /** * @brief This function handles USART2 global interrupt. */ void USART2_IRQHandler(void) { 800e05c: b580 push {r7, lr} 800e05e: af00 add r7, sp, #0 /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 800e060: 4802 ldr r0, [pc, #8] @ (800e06c ) 800e062: f004 fdc1 bl 8012be8 /* USER CODE BEGIN USART2_IRQn 1 */ /* USER CODE END USART2_IRQn 1 */ } 800e066: bf00 nop 800e068: bd80 pop {r7, pc} 800e06a: bf00 nop 800e06c: 20000ffc .word 0x20000ffc 0800e070 : /** * @brief This function handles USART3 global interrupt. */ void USART3_IRQHandler(void) { 800e070: b580 push {r7, lr} 800e072: af00 add r7, sp, #0 /* USER CODE BEGIN USART3_IRQn 0 */ /* USER CODE END USART3_IRQn 0 */ HAL_UART_IRQHandler(&huart3); 800e074: 4802 ldr r0, [pc, #8] @ (800e080 ) 800e076: f004 fdb7 bl 8012be8 /* USER CODE BEGIN USART3_IRQn 1 */ /* USER CODE END USART3_IRQn 1 */ } 800e07a: bf00 nop 800e07c: bd80 pop {r7, pc} 800e07e: bf00 nop 800e080: 20001044 .word 0x20001044 0800e084 : /** * @brief This function handles UART5 global interrupt. */ void UART5_IRQHandler(void) { 800e084: b580 push {r7, lr} 800e086: af00 add r7, sp, #0 /* USER CODE BEGIN UART5_IRQn 0 */ /* USER CODE END UART5_IRQn 0 */ HAL_UART_IRQHandler(&huart5); 800e088: 4802 ldr r0, [pc, #8] @ (800e094 ) 800e08a: f004 fdad bl 8012be8 /* USER CODE BEGIN UART5_IRQn 1 */ /* USER CODE END UART5_IRQn 1 */ } 800e08e: bf00 nop 800e090: bd80 pop {r7, pc} 800e092: bf00 nop 800e094: 20000f6c .word 0x20000f6c 0800e098 : /** * @brief This function handles CAN2 TX interrupt. */ void CAN2_TX_IRQHandler(void) { 800e098: b580 push {r7, lr} 800e09a: af00 add r7, sp, #0 /* USER CODE BEGIN CAN2_TX_IRQn 0 */ /* USER CODE END CAN2_TX_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 800e09c: 4802 ldr r0, [pc, #8] @ (800e0a8 ) 800e09e: f001 fe03 bl 800fca8 /* USER CODE BEGIN CAN2_TX_IRQn 1 */ /* USER CODE END CAN2_TX_IRQn 1 */ } 800e0a2: bf00 nop 800e0a4: bd80 pop {r7, pc} 800e0a6: bf00 nop 800e0a8: 200002cc .word 0x200002cc 0800e0ac : /** * @brief This function handles CAN2 RX1 interrupt. */ void CAN2_RX1_IRQHandler(void) { 800e0ac: b580 push {r7, lr} 800e0ae: af00 add r7, sp, #0 /* USER CODE BEGIN CAN2_RX1_IRQn 0 */ /* USER CODE END CAN2_RX1_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 800e0b0: 4802 ldr r0, [pc, #8] @ (800e0bc ) 800e0b2: f001 fdf9 bl 800fca8 /* USER CODE BEGIN CAN2_RX1_IRQn 1 */ /* USER CODE END CAN2_RX1_IRQn 1 */ } 800e0b6: bf00 nop 800e0b8: bd80 pop {r7, pc} 800e0ba: bf00 nop 800e0bc: 200002cc .word 0x200002cc 0800e0c0 <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 800e0c0: b480 push {r7} 800e0c2: af00 add r7, sp, #0 return 1; 800e0c4: 2301 movs r3, #1 } 800e0c6: 4618 mov r0, r3 800e0c8: 46bd mov sp, r7 800e0ca: bc80 pop {r7} 800e0cc: 4770 bx lr 0800e0ce <_kill>: int _kill(int pid, int sig) { 800e0ce: b580 push {r7, lr} 800e0d0: b082 sub sp, #8 800e0d2: af00 add r7, sp, #0 800e0d4: 6078 str r0, [r7, #4] 800e0d6: 6039 str r1, [r7, #0] (void)pid; (void)sig; errno = EINVAL; 800e0d8: f006 f92e bl 8014338 <__errno> 800e0dc: 4603 mov r3, r0 800e0de: 2216 movs r2, #22 800e0e0: 601a str r2, [r3, #0] return -1; 800e0e2: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 800e0e6: 4618 mov r0, r3 800e0e8: 3708 adds r7, #8 800e0ea: 46bd mov sp, r7 800e0ec: bd80 pop {r7, pc} 0800e0ee <_exit>: void _exit (int status) { 800e0ee: b580 push {r7, lr} 800e0f0: b082 sub sp, #8 800e0f2: af00 add r7, sp, #0 800e0f4: 6078 str r0, [r7, #4] _kill(status, -1); 800e0f6: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 800e0fa: 6878 ldr r0, [r7, #4] 800e0fc: f7ff ffe7 bl 800e0ce <_kill> while (1) {} /* Make sure we hang here */ 800e100: bf00 nop 800e102: e7fd b.n 800e100 <_exit+0x12> 0800e104 <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 800e104: b580 push {r7, lr} 800e106: b086 sub sp, #24 800e108: af00 add r7, sp, #0 800e10a: 60f8 str r0, [r7, #12] 800e10c: 60b9 str r1, [r7, #8] 800e10e: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800e110: 2300 movs r3, #0 800e112: 617b str r3, [r7, #20] 800e114: e00a b.n 800e12c <_read+0x28> { *ptr++ = __io_getchar(); 800e116: f3af 8000 nop.w 800e11a: 4601 mov r1, r0 800e11c: 68bb ldr r3, [r7, #8] 800e11e: 1c5a adds r2, r3, #1 800e120: 60ba str r2, [r7, #8] 800e122: b2ca uxtb r2, r1 800e124: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 800e126: 697b ldr r3, [r7, #20] 800e128: 3301 adds r3, #1 800e12a: 617b str r3, [r7, #20] 800e12c: 697a ldr r2, [r7, #20] 800e12e: 687b ldr r3, [r7, #4] 800e130: 429a cmp r2, r3 800e132: dbf0 blt.n 800e116 <_read+0x12> } return len; 800e134: 687b ldr r3, [r7, #4] } 800e136: 4618 mov r0, r3 800e138: 3718 adds r7, #24 800e13a: 46bd mov sp, r7 800e13c: bd80 pop {r7, pc} 0800e13e <_close>: } return len; } int _close(int file) { 800e13e: b480 push {r7} 800e140: b083 sub sp, #12 800e142: af00 add r7, sp, #0 800e144: 6078 str r0, [r7, #4] (void)file; return -1; 800e146: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 800e14a: 4618 mov r0, r3 800e14c: 370c adds r7, #12 800e14e: 46bd mov sp, r7 800e150: bc80 pop {r7} 800e152: 4770 bx lr 0800e154 <_fstat>: int _fstat(int file, struct stat *st) { 800e154: b480 push {r7} 800e156: b083 sub sp, #12 800e158: af00 add r7, sp, #0 800e15a: 6078 str r0, [r7, #4] 800e15c: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; 800e15e: 683b ldr r3, [r7, #0] 800e160: f44f 5200 mov.w r2, #8192 @ 0x2000 800e164: 605a str r2, [r3, #4] return 0; 800e166: 2300 movs r3, #0 } 800e168: 4618 mov r0, r3 800e16a: 370c adds r7, #12 800e16c: 46bd mov sp, r7 800e16e: bc80 pop {r7} 800e170: 4770 bx lr 0800e172 <_isatty>: int _isatty(int file) { 800e172: b480 push {r7} 800e174: b083 sub sp, #12 800e176: af00 add r7, sp, #0 800e178: 6078 str r0, [r7, #4] (void)file; return 1; 800e17a: 2301 movs r3, #1 } 800e17c: 4618 mov r0, r3 800e17e: 370c adds r7, #12 800e180: 46bd mov sp, r7 800e182: bc80 pop {r7} 800e184: 4770 bx lr 0800e186 <_lseek>: int _lseek(int file, int ptr, int dir) { 800e186: b480 push {r7} 800e188: b085 sub sp, #20 800e18a: af00 add r7, sp, #0 800e18c: 60f8 str r0, [r7, #12] 800e18e: 60b9 str r1, [r7, #8] 800e190: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; 800e192: 2300 movs r3, #0 } 800e194: 4618 mov r0, r3 800e196: 3714 adds r7, #20 800e198: 46bd mov sp, r7 800e19a: bc80 pop {r7} 800e19c: 4770 bx lr ... 0800e1a0 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 800e1a0: b580 push {r7, lr} 800e1a2: b086 sub sp, #24 800e1a4: af00 add r7, sp, #0 800e1a6: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 800e1a8: 4a14 ldr r2, [pc, #80] @ (800e1fc <_sbrk+0x5c>) 800e1aa: 4b15 ldr r3, [pc, #84] @ (800e200 <_sbrk+0x60>) 800e1ac: 1ad3 subs r3, r2, r3 800e1ae: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 800e1b0: 697b ldr r3, [r7, #20] 800e1b2: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 800e1b4: 4b13 ldr r3, [pc, #76] @ (800e204 <_sbrk+0x64>) 800e1b6: 681b ldr r3, [r3, #0] 800e1b8: 2b00 cmp r3, #0 800e1ba: d102 bne.n 800e1c2 <_sbrk+0x22> { __sbrk_heap_end = &_end; 800e1bc: 4b11 ldr r3, [pc, #68] @ (800e204 <_sbrk+0x64>) 800e1be: 4a12 ldr r2, [pc, #72] @ (800e208 <_sbrk+0x68>) 800e1c0: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 800e1c2: 4b10 ldr r3, [pc, #64] @ (800e204 <_sbrk+0x64>) 800e1c4: 681a ldr r2, [r3, #0] 800e1c6: 687b ldr r3, [r7, #4] 800e1c8: 4413 add r3, r2 800e1ca: 693a ldr r2, [r7, #16] 800e1cc: 429a cmp r2, r3 800e1ce: d207 bcs.n 800e1e0 <_sbrk+0x40> { errno = ENOMEM; 800e1d0: f006 f8b2 bl 8014338 <__errno> 800e1d4: 4603 mov r3, r0 800e1d6: 220c movs r2, #12 800e1d8: 601a str r2, [r3, #0] return (void *)-1; 800e1da: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800e1de: e009 b.n 800e1f4 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 800e1e0: 4b08 ldr r3, [pc, #32] @ (800e204 <_sbrk+0x64>) 800e1e2: 681b ldr r3, [r3, #0] 800e1e4: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 800e1e6: 4b07 ldr r3, [pc, #28] @ (800e204 <_sbrk+0x64>) 800e1e8: 681a ldr r2, [r3, #0] 800e1ea: 687b ldr r3, [r7, #4] 800e1ec: 4413 add r3, r2 800e1ee: 4a05 ldr r2, [pc, #20] @ (800e204 <_sbrk+0x64>) 800e1f0: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 800e1f2: 68fb ldr r3, [r7, #12] } 800e1f4: 4618 mov r0, r3 800e1f6: 3718 adds r7, #24 800e1f8: 46bd mov sp, r7 800e1fa: bd80 pop {r7, pc} 800e1fc: 20010000 .word 0x20010000 800e200: 00000400 .word 0x00000400 800e204: 20000f20 .word 0x20000f20 800e208: 200011e0 .word 0x200011e0 0800e20c : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 800e20c: b480 push {r7} 800e20e: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 800e210: bf00 nop 800e212: 46bd mov sp, r7 800e214: bc80 pop {r7} 800e216: 4770 bx lr 0800e218 : TIM_HandleTypeDef htim4; /* TIM4 init function */ void MX_TIM4_Init(void) { 800e218: b580 push {r7, lr} 800e21a: b08e sub sp, #56 @ 0x38 800e21c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 800e21e: f107 0328 add.w r3, r7, #40 @ 0x28 800e222: 2200 movs r2, #0 800e224: 601a str r2, [r3, #0] 800e226: 605a str r2, [r3, #4] 800e228: 609a str r2, [r3, #8] 800e22a: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 800e22c: f107 0320 add.w r3, r7, #32 800e230: 2200 movs r2, #0 800e232: 601a str r2, [r3, #0] 800e234: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 800e236: 1d3b adds r3, r7, #4 800e238: 2200 movs r2, #0 800e23a: 601a str r2, [r3, #0] 800e23c: 605a str r2, [r3, #4] 800e23e: 609a str r2, [r3, #8] 800e240: 60da str r2, [r3, #12] 800e242: 611a str r2, [r3, #16] 800e244: 615a str r2, [r3, #20] 800e246: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 800e248: 4b37 ldr r3, [pc, #220] @ (800e328 ) 800e24a: 4a38 ldr r2, [pc, #224] @ (800e32c ) 800e24c: 601a str r2, [r3, #0] htim4.Init.Prescaler = 720; 800e24e: 4b36 ldr r3, [pc, #216] @ (800e328 ) 800e250: f44f 7234 mov.w r2, #720 @ 0x2d0 800e254: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 800e256: 4b34 ldr r3, [pc, #208] @ (800e328 ) 800e258: 2200 movs r2, #0 800e25a: 609a str r2, [r3, #8] htim4.Init.Period = 100; 800e25c: 4b32 ldr r3, [pc, #200] @ (800e328 ) 800e25e: 2264 movs r2, #100 @ 0x64 800e260: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 800e262: 4b31 ldr r3, [pc, #196] @ (800e328 ) 800e264: 2200 movs r2, #0 800e266: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 800e268: 4b2f ldr r3, [pc, #188] @ (800e328 ) 800e26a: 2200 movs r2, #0 800e26c: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 800e26e: 482e ldr r0, [pc, #184] @ (800e328 ) 800e270: f003 fcc9 bl 8011c06 800e274: 4603 mov r3, r0 800e276: 2b00 cmp r3, #0 800e278: d001 beq.n 800e27e { Error_Handler(); 800e27a: f7fe f8b5 bl 800c3e8 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 800e27e: f44f 5380 mov.w r3, #4096 @ 0x1000 800e282: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 800e284: f107 0328 add.w r3, r7, #40 @ 0x28 800e288: 4619 mov r1, r3 800e28a: 4827 ldr r0, [pc, #156] @ (800e328 ) 800e28c: f003 fece bl 801202c 800e290: 4603 mov r3, r0 800e292: 2b00 cmp r3, #0 800e294: d001 beq.n 800e29a { Error_Handler(); 800e296: f7fe f8a7 bl 800c3e8 } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 800e29a: 4823 ldr r0, [pc, #140] @ (800e328 ) 800e29c: f003 fd02 bl 8011ca4 800e2a0: 4603 mov r3, r0 800e2a2: 2b00 cmp r3, #0 800e2a4: d001 beq.n 800e2aa { Error_Handler(); 800e2a6: f7fe f89f bl 800c3e8 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800e2aa: 2300 movs r3, #0 800e2ac: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800e2ae: 2300 movs r3, #0 800e2b0: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 800e2b2: f107 0320 add.w r3, r7, #32 800e2b6: 4619 mov r1, r3 800e2b8: 481b ldr r0, [pc, #108] @ (800e328 ) 800e2ba: f004 fa39 bl 8012730 800e2be: 4603 mov r3, r0 800e2c0: 2b00 cmp r3, #0 800e2c2: d001 beq.n 800e2c8 { Error_Handler(); 800e2c4: f7fe f890 bl 800c3e8 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 800e2c8: 2360 movs r3, #96 @ 0x60 800e2ca: 607b str r3, [r7, #4] sConfigOC.Pulse = 0; 800e2cc: 2300 movs r3, #0 800e2ce: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800e2d0: 2300 movs r3, #0 800e2d2: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 800e2d4: 2300 movs r3, #0 800e2d6: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 800e2d8: 1d3b adds r3, r7, #4 800e2da: 2204 movs r2, #4 800e2dc: 4619 mov r1, r3 800e2de: 4812 ldr r0, [pc, #72] @ (800e328 ) 800e2e0: f003 fde2 bl 8011ea8 800e2e4: 4603 mov r3, r0 800e2e6: 2b00 cmp r3, #0 800e2e8: d001 beq.n 800e2ee { Error_Handler(); 800e2ea: f7fe f87d bl 800c3e8 } if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 800e2ee: 1d3b adds r3, r7, #4 800e2f0: 2208 movs r2, #8 800e2f2: 4619 mov r1, r3 800e2f4: 480c ldr r0, [pc, #48] @ (800e328 ) 800e2f6: f003 fdd7 bl 8011ea8 800e2fa: 4603 mov r3, r0 800e2fc: 2b00 cmp r3, #0 800e2fe: d001 beq.n 800e304 { Error_Handler(); 800e300: f7fe f872 bl 800c3e8 } if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 800e304: 1d3b adds r3, r7, #4 800e306: 220c movs r2, #12 800e308: 4619 mov r1, r3 800e30a: 4807 ldr r0, [pc, #28] @ (800e328 ) 800e30c: f003 fdcc bl 8011ea8 800e310: 4603 mov r3, r0 800e312: 2b00 cmp r3, #0 800e314: d001 beq.n 800e31a { Error_Handler(); 800e316: f7fe f867 bl 800c3e8 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 800e31a: 4803 ldr r0, [pc, #12] @ (800e328 ) 800e31c: f000 f826 bl 800e36c } 800e320: bf00 nop 800e322: 3738 adds r7, #56 @ 0x38 800e324: 46bd mov sp, r7 800e326: bd80 pop {r7, pc} 800e328: 20000f24 .word 0x20000f24 800e32c: 40000800 .word 0x40000800 0800e330 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { 800e330: b480 push {r7} 800e332: b085 sub sp, #20 800e334: af00 add r7, sp, #0 800e336: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM4) 800e338: 687b ldr r3, [r7, #4] 800e33a: 681b ldr r3, [r3, #0] 800e33c: 4a09 ldr r2, [pc, #36] @ (800e364 ) 800e33e: 4293 cmp r3, r2 800e340: d10b bne.n 800e35a { /* USER CODE BEGIN TIM4_MspInit 0 */ /* USER CODE END TIM4_MspInit 0 */ /* TIM4 clock enable */ __HAL_RCC_TIM4_CLK_ENABLE(); 800e342: 4b09 ldr r3, [pc, #36] @ (800e368 ) 800e344: 69db ldr r3, [r3, #28] 800e346: 4a08 ldr r2, [pc, #32] @ (800e368 ) 800e348: f043 0304 orr.w r3, r3, #4 800e34c: 61d3 str r3, [r2, #28] 800e34e: 4b06 ldr r3, [pc, #24] @ (800e368 ) 800e350: 69db ldr r3, [r3, #28] 800e352: f003 0304 and.w r3, r3, #4 800e356: 60fb str r3, [r7, #12] 800e358: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 800e35a: bf00 nop 800e35c: 3714 adds r7, #20 800e35e: 46bd mov sp, r7 800e360: bc80 pop {r7} 800e362: 4770 bx lr 800e364: 40000800 .word 0x40000800 800e368: 40021000 .word 0x40021000 0800e36c : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) { 800e36c: b580 push {r7, lr} 800e36e: b088 sub sp, #32 800e370: af00 add r7, sp, #0 800e372: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800e374: f107 030c add.w r3, r7, #12 800e378: 2200 movs r2, #0 800e37a: 601a str r2, [r3, #0] 800e37c: 605a str r2, [r3, #4] 800e37e: 609a str r2, [r3, #8] 800e380: 60da str r2, [r3, #12] if(timHandle->Instance==TIM4) 800e382: 687b ldr r3, [r7, #4] 800e384: 681b ldr r3, [r3, #0] 800e386: 4a17 ldr r2, [pc, #92] @ (800e3e4 ) 800e388: 4293 cmp r3, r2 800e38a: d126 bne.n 800e3da { /* USER CODE BEGIN TIM4_MspPostInit 0 */ /* USER CODE END TIM4_MspPostInit 0 */ __HAL_RCC_GPIOD_CLK_ENABLE(); 800e38c: 4b16 ldr r3, [pc, #88] @ (800e3e8 ) 800e38e: 699b ldr r3, [r3, #24] 800e390: 4a15 ldr r2, [pc, #84] @ (800e3e8 ) 800e392: f043 0320 orr.w r3, r3, #32 800e396: 6193 str r3, [r2, #24] 800e398: 4b13 ldr r3, [pc, #76] @ (800e3e8 ) 800e39a: 699b ldr r3, [r3, #24] 800e39c: f003 0320 and.w r3, r3, #32 800e3a0: 60bb str r3, [r7, #8] 800e3a2: 68bb ldr r3, [r7, #8] /**TIM4 GPIO Configuration PD13 ------> TIM4_CH2 PD14 ------> TIM4_CH3 PD15 ------> TIM4_CH4 */ GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; 800e3a4: f44f 4360 mov.w r3, #57344 @ 0xe000 800e3a8: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e3aa: 2302 movs r3, #2 800e3ac: 613b str r3, [r7, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800e3ae: 2302 movs r3, #2 800e3b0: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e3b2: f107 030c add.w r3, r7, #12 800e3b6: 4619 mov r1, r3 800e3b8: 480c ldr r0, [pc, #48] @ (800e3ec ) 800e3ba: f002 f8fb bl 80105b4 __HAL_AFIO_REMAP_TIM4_ENABLE(); 800e3be: 4b0c ldr r3, [pc, #48] @ (800e3f0 ) 800e3c0: 685b ldr r3, [r3, #4] 800e3c2: 61fb str r3, [r7, #28] 800e3c4: 69fb ldr r3, [r7, #28] 800e3c6: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800e3ca: 61fb str r3, [r7, #28] 800e3cc: 69fb ldr r3, [r7, #28] 800e3ce: f443 5380 orr.w r3, r3, #4096 @ 0x1000 800e3d2: 61fb str r3, [r7, #28] 800e3d4: 4a06 ldr r2, [pc, #24] @ (800e3f0 ) 800e3d6: 69fb ldr r3, [r7, #28] 800e3d8: 6053 str r3, [r2, #4] /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 800e3da: bf00 nop 800e3dc: 3720 adds r7, #32 800e3de: 46bd mov sp, r7 800e3e0: bd80 pop {r7, pc} 800e3e2: bf00 nop 800e3e4: 40000800 .word 0x40000800 800e3e8: 40021000 .word 0x40021000 800e3ec: 40011400 .word 0x40011400 800e3f0: 40010000 .word 0x40010000 0800e3f4 : UART_HandleTypeDef huart2; UART_HandleTypeDef huart3; /* UART5 init function */ void MX_UART5_Init(void) { 800e3f4: b580 push {r7, lr} 800e3f6: af00 add r7, sp, #0 /* USER CODE END UART5_Init 0 */ /* USER CODE BEGIN UART5_Init 1 */ /* USER CODE END UART5_Init 1 */ huart5.Instance = UART5; 800e3f8: 4b11 ldr r3, [pc, #68] @ (800e440 ) 800e3fa: 4a12 ldr r2, [pc, #72] @ (800e444 ) 800e3fc: 601a str r2, [r3, #0] huart5.Init.BaudRate = 9600; 800e3fe: 4b10 ldr r3, [pc, #64] @ (800e440 ) 800e400: f44f 5216 mov.w r2, #9600 @ 0x2580 800e404: 605a str r2, [r3, #4] huart5.Init.WordLength = UART_WORDLENGTH_8B; 800e406: 4b0e ldr r3, [pc, #56] @ (800e440 ) 800e408: 2200 movs r2, #0 800e40a: 609a str r2, [r3, #8] huart5.Init.StopBits = UART_STOPBITS_1; 800e40c: 4b0c ldr r3, [pc, #48] @ (800e440 ) 800e40e: 2200 movs r2, #0 800e410: 60da str r2, [r3, #12] huart5.Init.Parity = UART_PARITY_NONE; 800e412: 4b0b ldr r3, [pc, #44] @ (800e440 ) 800e414: 2200 movs r2, #0 800e416: 611a str r2, [r3, #16] huart5.Init.Mode = UART_MODE_TX_RX; 800e418: 4b09 ldr r3, [pc, #36] @ (800e440 ) 800e41a: 220c movs r2, #12 800e41c: 615a str r2, [r3, #20] huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e41e: 4b08 ldr r3, [pc, #32] @ (800e440 ) 800e420: 2200 movs r2, #0 800e422: 619a str r2, [r3, #24] huart5.Init.OverSampling = UART_OVERSAMPLING_16; 800e424: 4b06 ldr r3, [pc, #24] @ (800e440 ) 800e426: 2200 movs r2, #0 800e428: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart5) != HAL_OK) 800e42a: 4805 ldr r0, [pc, #20] @ (800e440 ) 800e42c: f004 f9e6 bl 80127fc 800e430: 4603 mov r3, r0 800e432: 2b00 cmp r3, #0 800e434: d001 beq.n 800e43a { Error_Handler(); 800e436: f7fd ffd7 bl 800c3e8 } /* USER CODE BEGIN UART5_Init 2 */ /* USER CODE END UART5_Init 2 */ } 800e43a: bf00 nop 800e43c: bd80 pop {r7, pc} 800e43e: bf00 nop 800e440: 20000f6c .word 0x20000f6c 800e444: 40005000 .word 0x40005000 0800e448 : /* USART1 init function */ void MX_USART1_UART_Init(void) { 800e448: b580 push {r7, lr} 800e44a: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 800e44c: 4b11 ldr r3, [pc, #68] @ (800e494 ) 800e44e: 4a12 ldr r2, [pc, #72] @ (800e498 ) 800e450: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 800e452: 4b10 ldr r3, [pc, #64] @ (800e494 ) 800e454: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e458: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 800e45a: 4b0e ldr r3, [pc, #56] @ (800e494 ) 800e45c: 2200 movs r2, #0 800e45e: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 800e460: 4b0c ldr r3, [pc, #48] @ (800e494 ) 800e462: 2200 movs r2, #0 800e464: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 800e466: 4b0b ldr r3, [pc, #44] @ (800e494 ) 800e468: 2200 movs r2, #0 800e46a: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 800e46c: 4b09 ldr r3, [pc, #36] @ (800e494 ) 800e46e: 220c movs r2, #12 800e470: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e472: 4b08 ldr r3, [pc, #32] @ (800e494 ) 800e474: 2200 movs r2, #0 800e476: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 800e478: 4b06 ldr r3, [pc, #24] @ (800e494 ) 800e47a: 2200 movs r2, #0 800e47c: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 800e47e: 4805 ldr r0, [pc, #20] @ (800e494 ) 800e480: f004 f9bc bl 80127fc 800e484: 4603 mov r3, r0 800e486: 2b00 cmp r3, #0 800e488: d001 beq.n 800e48e { Error_Handler(); 800e48a: f7fd ffad bl 800c3e8 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 800e48e: bf00 nop 800e490: bd80 pop {r7, pc} 800e492: bf00 nop 800e494: 20000fb4 .word 0x20000fb4 800e498: 40013800 .word 0x40013800 0800e49c : /* USART2 init function */ void MX_USART2_UART_Init(void) { 800e49c: b580 push {r7, lr} 800e49e: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 800e4a0: 4b11 ldr r3, [pc, #68] @ (800e4e8 ) 800e4a2: 4a12 ldr r2, [pc, #72] @ (800e4ec ) 800e4a4: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 800e4a6: 4b10 ldr r3, [pc, #64] @ (800e4e8 ) 800e4a8: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e4ac: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 800e4ae: 4b0e ldr r3, [pc, #56] @ (800e4e8 ) 800e4b0: 2200 movs r2, #0 800e4b2: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 800e4b4: 4b0c ldr r3, [pc, #48] @ (800e4e8 ) 800e4b6: 2200 movs r2, #0 800e4b8: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 800e4ba: 4b0b ldr r3, [pc, #44] @ (800e4e8 ) 800e4bc: 2200 movs r2, #0 800e4be: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 800e4c0: 4b09 ldr r3, [pc, #36] @ (800e4e8 ) 800e4c2: 220c movs r2, #12 800e4c4: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e4c6: 4b08 ldr r3, [pc, #32] @ (800e4e8 ) 800e4c8: 2200 movs r2, #0 800e4ca: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 800e4cc: 4b06 ldr r3, [pc, #24] @ (800e4e8 ) 800e4ce: 2200 movs r2, #0 800e4d0: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 800e4d2: 4805 ldr r0, [pc, #20] @ (800e4e8 ) 800e4d4: f004 f992 bl 80127fc 800e4d8: 4603 mov r3, r0 800e4da: 2b00 cmp r3, #0 800e4dc: d001 beq.n 800e4e2 { Error_Handler(); 800e4de: f7fd ff83 bl 800c3e8 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } 800e4e2: bf00 nop 800e4e4: bd80 pop {r7, pc} 800e4e6: bf00 nop 800e4e8: 20000ffc .word 0x20000ffc 800e4ec: 40004400 .word 0x40004400 0800e4f0 : /* USART3 init function */ void MX_USART3_UART_Init(void) { 800e4f0: b580 push {r7, lr} 800e4f2: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; 800e4f4: 4b11 ldr r3, [pc, #68] @ (800e53c ) 800e4f6: 4a12 ldr r2, [pc, #72] @ (800e540 ) 800e4f8: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; 800e4fa: 4b10 ldr r3, [pc, #64] @ (800e53c ) 800e4fc: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e500: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; 800e502: 4b0e ldr r3, [pc, #56] @ (800e53c ) 800e504: 2200 movs r2, #0 800e506: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; 800e508: 4b0c ldr r3, [pc, #48] @ (800e53c ) 800e50a: 2200 movs r2, #0 800e50c: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; 800e50e: 4b0b ldr r3, [pc, #44] @ (800e53c ) 800e510: 2200 movs r2, #0 800e512: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; 800e514: 4b09 ldr r3, [pc, #36] @ (800e53c ) 800e516: 220c movs r2, #12 800e518: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e51a: 4b08 ldr r3, [pc, #32] @ (800e53c ) 800e51c: 2200 movs r2, #0 800e51e: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; 800e520: 4b06 ldr r3, [pc, #24] @ (800e53c ) 800e522: 2200 movs r2, #0 800e524: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart3) != HAL_OK) 800e526: 4805 ldr r0, [pc, #20] @ (800e53c ) 800e528: f004 f968 bl 80127fc 800e52c: 4603 mov r3, r0 800e52e: 2b00 cmp r3, #0 800e530: d001 beq.n 800e536 { Error_Handler(); 800e532: f7fd ff59 bl 800c3e8 } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } 800e536: bf00 nop 800e538: bd80 pop {r7, pc} 800e53a: bf00 nop 800e53c: 20001044 .word 0x20001044 800e540: 40004800 .word 0x40004800 0800e544 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { 800e544: b580 push {r7, lr} 800e546: b092 sub sp, #72 @ 0x48 800e548: af00 add r7, sp, #0 800e54a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800e54c: f107 0330 add.w r3, r7, #48 @ 0x30 800e550: 2200 movs r2, #0 800e552: 601a str r2, [r3, #0] 800e554: 605a str r2, [r3, #4] 800e556: 609a str r2, [r3, #8] 800e558: 60da str r2, [r3, #12] if(uartHandle->Instance==UART5) 800e55a: 687b ldr r3, [r7, #4] 800e55c: 681b ldr r3, [r3, #0] 800e55e: 4a95 ldr r2, [pc, #596] @ (800e7b4 ) 800e560: 4293 cmp r3, r2 800e562: d145 bne.n 800e5f0 { /* USER CODE BEGIN UART5_MspInit 0 */ /* USER CODE END UART5_MspInit 0 */ /* UART5 clock enable */ __HAL_RCC_UART5_CLK_ENABLE(); 800e564: 4b94 ldr r3, [pc, #592] @ (800e7b8 ) 800e566: 69db ldr r3, [r3, #28] 800e568: 4a93 ldr r2, [pc, #588] @ (800e7b8 ) 800e56a: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 800e56e: 61d3 str r3, [r2, #28] 800e570: 4b91 ldr r3, [pc, #580] @ (800e7b8 ) 800e572: 69db ldr r3, [r3, #28] 800e574: f403 1380 and.w r3, r3, #1048576 @ 0x100000 800e578: 62fb str r3, [r7, #44] @ 0x2c 800e57a: 6afb ldr r3, [r7, #44] @ 0x2c __HAL_RCC_GPIOC_CLK_ENABLE(); 800e57c: 4b8e ldr r3, [pc, #568] @ (800e7b8 ) 800e57e: 699b ldr r3, [r3, #24] 800e580: 4a8d ldr r2, [pc, #564] @ (800e7b8 ) 800e582: f043 0310 orr.w r3, r3, #16 800e586: 6193 str r3, [r2, #24] 800e588: 4b8b ldr r3, [pc, #556] @ (800e7b8 ) 800e58a: 699b ldr r3, [r3, #24] 800e58c: f003 0310 and.w r3, r3, #16 800e590: 62bb str r3, [r7, #40] @ 0x28 800e592: 6abb ldr r3, [r7, #40] @ 0x28 __HAL_RCC_GPIOD_CLK_ENABLE(); 800e594: 4b88 ldr r3, [pc, #544] @ (800e7b8 ) 800e596: 699b ldr r3, [r3, #24] 800e598: 4a87 ldr r2, [pc, #540] @ (800e7b8 ) 800e59a: f043 0320 orr.w r3, r3, #32 800e59e: 6193 str r3, [r2, #24] 800e5a0: 4b85 ldr r3, [pc, #532] @ (800e7b8 ) 800e5a2: 699b ldr r3, [r3, #24] 800e5a4: f003 0320 and.w r3, r3, #32 800e5a8: 627b str r3, [r7, #36] @ 0x24 800e5aa: 6a7b ldr r3, [r7, #36] @ 0x24 /**UART5 GPIO Configuration PC12 ------> UART5_TX PD2 ------> UART5_RX */ GPIO_InitStruct.Pin = GPIO_PIN_12; 800e5ac: f44f 5380 mov.w r3, #4096 @ 0x1000 800e5b0: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e5b2: 2302 movs r3, #2 800e5b4: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e5b6: 2303 movs r3, #3 800e5b8: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800e5ba: f107 0330 add.w r3, r7, #48 @ 0x30 800e5be: 4619 mov r1, r3 800e5c0: 487e ldr r0, [pc, #504] @ (800e7bc ) 800e5c2: f001 fff7 bl 80105b4 GPIO_InitStruct.Pin = GPIO_PIN_2; 800e5c6: 2304 movs r3, #4 800e5c8: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e5ca: 2300 movs r3, #0 800e5cc: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e5ce: 2300 movs r3, #0 800e5d0: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e5d2: f107 0330 add.w r3, r7, #48 @ 0x30 800e5d6: 4619 mov r1, r3 800e5d8: 4879 ldr r0, [pc, #484] @ (800e7c0 ) 800e5da: f001 ffeb bl 80105b4 /* UART5 interrupt Init */ HAL_NVIC_SetPriority(UART5_IRQn, 0, 0); 800e5de: 2200 movs r2, #0 800e5e0: 2100 movs r1, #0 800e5e2: 2035 movs r0, #53 @ 0x35 800e5e4: f001 fe51 bl 801028a HAL_NVIC_EnableIRQ(UART5_IRQn); 800e5e8: 2035 movs r0, #53 @ 0x35 800e5ea: f001 fe6a bl 80102c2 HAL_NVIC_EnableIRQ(USART3_IRQn); /* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */ } } 800e5ee: e0dc b.n 800e7aa else if(uartHandle->Instance==USART1) 800e5f0: 687b ldr r3, [r7, #4] 800e5f2: 681b ldr r3, [r3, #0] 800e5f4: 4a73 ldr r2, [pc, #460] @ (800e7c4 ) 800e5f6: 4293 cmp r3, r2 800e5f8: d13a bne.n 800e670 __HAL_RCC_USART1_CLK_ENABLE(); 800e5fa: 4b6f ldr r3, [pc, #444] @ (800e7b8 ) 800e5fc: 699b ldr r3, [r3, #24] 800e5fe: 4a6e ldr r2, [pc, #440] @ (800e7b8 ) 800e600: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800e604: 6193 str r3, [r2, #24] 800e606: 4b6c ldr r3, [pc, #432] @ (800e7b8 ) 800e608: 699b ldr r3, [r3, #24] 800e60a: f403 4380 and.w r3, r3, #16384 @ 0x4000 800e60e: 623b str r3, [r7, #32] 800e610: 6a3b ldr r3, [r7, #32] __HAL_RCC_GPIOA_CLK_ENABLE(); 800e612: 4b69 ldr r3, [pc, #420] @ (800e7b8 ) 800e614: 699b ldr r3, [r3, #24] 800e616: 4a68 ldr r2, [pc, #416] @ (800e7b8 ) 800e618: f043 0304 orr.w r3, r3, #4 800e61c: 6193 str r3, [r2, #24] 800e61e: 4b66 ldr r3, [pc, #408] @ (800e7b8 ) 800e620: 699b ldr r3, [r3, #24] 800e622: f003 0304 and.w r3, r3, #4 800e626: 61fb str r3, [r7, #28] 800e628: 69fb ldr r3, [r7, #28] GPIO_InitStruct.Pin = GPIO_PIN_9; 800e62a: f44f 7300 mov.w r3, #512 @ 0x200 800e62e: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e630: 2302 movs r3, #2 800e632: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e634: 2303 movs r3, #3 800e636: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800e638: f107 0330 add.w r3, r7, #48 @ 0x30 800e63c: 4619 mov r1, r3 800e63e: 4862 ldr r0, [pc, #392] @ (800e7c8 ) 800e640: f001 ffb8 bl 80105b4 GPIO_InitStruct.Pin = GPIO_PIN_10; 800e644: f44f 6380 mov.w r3, #1024 @ 0x400 800e648: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e64a: 2300 movs r3, #0 800e64c: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e64e: 2300 movs r3, #0 800e650: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800e652: f107 0330 add.w r3, r7, #48 @ 0x30 800e656: 4619 mov r1, r3 800e658: 485b ldr r0, [pc, #364] @ (800e7c8 ) 800e65a: f001 ffab bl 80105b4 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 800e65e: 2200 movs r2, #0 800e660: 2100 movs r1, #0 800e662: 2025 movs r0, #37 @ 0x25 800e664: f001 fe11 bl 801028a HAL_NVIC_EnableIRQ(USART1_IRQn); 800e668: 2025 movs r0, #37 @ 0x25 800e66a: f001 fe2a bl 80102c2 } 800e66e: e09c b.n 800e7aa else if(uartHandle->Instance==USART2) 800e670: 687b ldr r3, [r7, #4] 800e672: 681b ldr r3, [r3, #0] 800e674: 4a55 ldr r2, [pc, #340] @ (800e7cc ) 800e676: 4293 cmp r3, r2 800e678: d146 bne.n 800e708 __HAL_RCC_USART2_CLK_ENABLE(); 800e67a: 4b4f ldr r3, [pc, #316] @ (800e7b8 ) 800e67c: 69db ldr r3, [r3, #28] 800e67e: 4a4e ldr r2, [pc, #312] @ (800e7b8 ) 800e680: f443 3300 orr.w r3, r3, #131072 @ 0x20000 800e684: 61d3 str r3, [r2, #28] 800e686: 4b4c ldr r3, [pc, #304] @ (800e7b8 ) 800e688: 69db ldr r3, [r3, #28] 800e68a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800e68e: 61bb str r3, [r7, #24] 800e690: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); 800e692: 4b49 ldr r3, [pc, #292] @ (800e7b8 ) 800e694: 699b ldr r3, [r3, #24] 800e696: 4a48 ldr r2, [pc, #288] @ (800e7b8 ) 800e698: f043 0320 orr.w r3, r3, #32 800e69c: 6193 str r3, [r2, #24] 800e69e: 4b46 ldr r3, [pc, #280] @ (800e7b8 ) 800e6a0: 699b ldr r3, [r3, #24] 800e6a2: f003 0320 and.w r3, r3, #32 800e6a6: 617b str r3, [r7, #20] 800e6a8: 697b ldr r3, [r7, #20] GPIO_InitStruct.Pin = GPIO_PIN_5; 800e6aa: 2320 movs r3, #32 800e6ac: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e6ae: 2302 movs r3, #2 800e6b0: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e6b2: 2303 movs r3, #3 800e6b4: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e6b6: f107 0330 add.w r3, r7, #48 @ 0x30 800e6ba: 4619 mov r1, r3 800e6bc: 4840 ldr r0, [pc, #256] @ (800e7c0 ) 800e6be: f001 ff79 bl 80105b4 GPIO_InitStruct.Pin = GPIO_PIN_6; 800e6c2: 2340 movs r3, #64 @ 0x40 800e6c4: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e6c6: 2300 movs r3, #0 800e6c8: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e6ca: 2300 movs r3, #0 800e6cc: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e6ce: f107 0330 add.w r3, r7, #48 @ 0x30 800e6d2: 4619 mov r1, r3 800e6d4: 483a ldr r0, [pc, #232] @ (800e7c0 ) 800e6d6: f001 ff6d bl 80105b4 __HAL_AFIO_REMAP_USART2_ENABLE(); 800e6da: 4b3d ldr r3, [pc, #244] @ (800e7d0 ) 800e6dc: 685b ldr r3, [r3, #4] 800e6de: 643b str r3, [r7, #64] @ 0x40 800e6e0: 6c3b ldr r3, [r7, #64] @ 0x40 800e6e2: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800e6e6: 643b str r3, [r7, #64] @ 0x40 800e6e8: 6c3b ldr r3, [r7, #64] @ 0x40 800e6ea: f043 0308 orr.w r3, r3, #8 800e6ee: 643b str r3, [r7, #64] @ 0x40 800e6f0: 4a37 ldr r2, [pc, #220] @ (800e7d0 ) 800e6f2: 6c3b ldr r3, [r7, #64] @ 0x40 800e6f4: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 800e6f6: 2200 movs r2, #0 800e6f8: 2100 movs r1, #0 800e6fa: 2026 movs r0, #38 @ 0x26 800e6fc: f001 fdc5 bl 801028a HAL_NVIC_EnableIRQ(USART2_IRQn); 800e700: 2026 movs r0, #38 @ 0x26 800e702: f001 fdde bl 80102c2 } 800e706: e050 b.n 800e7aa else if(uartHandle->Instance==USART3) 800e708: 687b ldr r3, [r7, #4] 800e70a: 681b ldr r3, [r3, #0] 800e70c: 4a31 ldr r2, [pc, #196] @ (800e7d4 ) 800e70e: 4293 cmp r3, r2 800e710: d14b bne.n 800e7aa __HAL_RCC_USART3_CLK_ENABLE(); 800e712: 4b29 ldr r3, [pc, #164] @ (800e7b8 ) 800e714: 69db ldr r3, [r3, #28] 800e716: 4a28 ldr r2, [pc, #160] @ (800e7b8 ) 800e718: f443 2380 orr.w r3, r3, #262144 @ 0x40000 800e71c: 61d3 str r3, [r2, #28] 800e71e: 4b26 ldr r3, [pc, #152] @ (800e7b8 ) 800e720: 69db ldr r3, [r3, #28] 800e722: f403 2380 and.w r3, r3, #262144 @ 0x40000 800e726: 613b str r3, [r7, #16] 800e728: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOC_CLK_ENABLE(); 800e72a: 4b23 ldr r3, [pc, #140] @ (800e7b8 ) 800e72c: 699b ldr r3, [r3, #24] 800e72e: 4a22 ldr r2, [pc, #136] @ (800e7b8 ) 800e730: f043 0310 orr.w r3, r3, #16 800e734: 6193 str r3, [r2, #24] 800e736: 4b20 ldr r3, [pc, #128] @ (800e7b8 ) 800e738: 699b ldr r3, [r3, #24] 800e73a: f003 0310 and.w r3, r3, #16 800e73e: 60fb str r3, [r7, #12] 800e740: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_10; 800e742: f44f 6380 mov.w r3, #1024 @ 0x400 800e746: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e748: 2302 movs r3, #2 800e74a: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e74c: 2303 movs r3, #3 800e74e: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800e750: f107 0330 add.w r3, r7, #48 @ 0x30 800e754: 4619 mov r1, r3 800e756: 4819 ldr r0, [pc, #100] @ (800e7bc ) 800e758: f001 ff2c bl 80105b4 GPIO_InitStruct.Pin = GPIO_PIN_11; 800e75c: f44f 6300 mov.w r3, #2048 @ 0x800 800e760: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e762: 2300 movs r3, #0 800e764: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e766: 2300 movs r3, #0 800e768: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800e76a: f107 0330 add.w r3, r7, #48 @ 0x30 800e76e: 4619 mov r1, r3 800e770: 4812 ldr r0, [pc, #72] @ (800e7bc ) 800e772: f001 ff1f bl 80105b4 __HAL_AFIO_REMAP_USART3_PARTIAL(); 800e776: 4b16 ldr r3, [pc, #88] @ (800e7d0 ) 800e778: 685b ldr r3, [r3, #4] 800e77a: 647b str r3, [r7, #68] @ 0x44 800e77c: 6c7b ldr r3, [r7, #68] @ 0x44 800e77e: f023 0330 bic.w r3, r3, #48 @ 0x30 800e782: 647b str r3, [r7, #68] @ 0x44 800e784: 6c7b ldr r3, [r7, #68] @ 0x44 800e786: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800e78a: 647b str r3, [r7, #68] @ 0x44 800e78c: 6c7b ldr r3, [r7, #68] @ 0x44 800e78e: f043 0310 orr.w r3, r3, #16 800e792: 647b str r3, [r7, #68] @ 0x44 800e794: 4a0e ldr r2, [pc, #56] @ (800e7d0 ) 800e796: 6c7b ldr r3, [r7, #68] @ 0x44 800e798: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); 800e79a: 2200 movs r2, #0 800e79c: 2100 movs r1, #0 800e79e: 2027 movs r0, #39 @ 0x27 800e7a0: f001 fd73 bl 801028a HAL_NVIC_EnableIRQ(USART3_IRQn); 800e7a4: 2027 movs r0, #39 @ 0x27 800e7a6: f001 fd8c bl 80102c2 } 800e7aa: bf00 nop 800e7ac: 3748 adds r7, #72 @ 0x48 800e7ae: 46bd mov sp, r7 800e7b0: bd80 pop {r7, pc} 800e7b2: bf00 nop 800e7b4: 40005000 .word 0x40005000 800e7b8: 40021000 .word 0x40021000 800e7bc: 40011000 .word 0x40011000 800e7c0: 40011400 .word 0x40011400 800e7c4: 40013800 .word 0x40013800 800e7c8: 40010800 .word 0x40010800 800e7cc: 40004400 .word 0x40004400 800e7d0: 40010000 .word 0x40010000 800e7d4: 40004800 .word 0x40004800 0800e7d8 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ 800e7d8: f8df d034 ldr.w sp, [pc, #52] @ 800e810 /* Call the clock system initialization function.*/ bl SystemInit 800e7dc: f7ff fd16 bl 800e20c /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 800e7e0: 480c ldr r0, [pc, #48] @ (800e814 ) ldr r1, =_edata 800e7e2: 490d ldr r1, [pc, #52] @ (800e818 ) ldr r2, =_sidata 800e7e4: 4a0d ldr r2, [pc, #52] @ (800e81c ) movs r3, #0 800e7e6: 2300 movs r3, #0 b LoopCopyDataInit 800e7e8: e002 b.n 800e7f0 0800e7ea : CopyDataInit: ldr r4, [r2, r3] 800e7ea: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800e7ec: 50c4 str r4, [r0, r3] adds r3, r3, #4 800e7ee: 3304 adds r3, #4 0800e7f0 : LoopCopyDataInit: adds r4, r0, r3 800e7f0: 18c4 adds r4, r0, r3 cmp r4, r1 800e7f2: 428c cmp r4, r1 bcc CopyDataInit 800e7f4: d3f9 bcc.n 800e7ea /* Zero fill the bss segment. */ ldr r2, =_sbss 800e7f6: 4a0a ldr r2, [pc, #40] @ (800e820 ) ldr r4, =_ebss 800e7f8: 4c0a ldr r4, [pc, #40] @ (800e824 ) movs r3, #0 800e7fa: 2300 movs r3, #0 b LoopFillZerobss 800e7fc: e001 b.n 800e802 0800e7fe : FillZerobss: str r3, [r2] 800e7fe: 6013 str r3, [r2, #0] adds r2, r2, #4 800e800: 3204 adds r2, #4 0800e802 : LoopFillZerobss: cmp r2, r4 800e802: 42a2 cmp r2, r4 bcc FillZerobss 800e804: d3fb bcc.n 800e7fe /* Call static constructors */ bl __libc_init_array 800e806: f005 fd9d bl 8014344 <__libc_init_array> /* Call the application's entry point.*/ bl main 800e80a: f7fd fcff bl 800c20c
bx lr 800e80e: 4770 bx lr ldr sp, =_estack /* set stack pointer */ 800e810: 20010000 .word 0x20010000 ldr r0, =_sdata 800e814: 20000000 .word 0x20000000 ldr r1, =_edata 800e818: 2000024c .word 0x2000024c ldr r2, =_sidata 800e81c: 0801714c .word 0x0801714c ldr r2, =_sbss 800e820: 20000250 .word 0x20000250 ldr r4, =_ebss 800e824: 200011dc .word 0x200011dc 0800e828 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800e828: e7fe b.n 800e828 ... 0800e82c : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 800e82c: b580 push {r7, lr} 800e82e: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800e830: 4b08 ldr r3, [pc, #32] @ (800e854 ) 800e832: 681b ldr r3, [r3, #0] 800e834: 4a07 ldr r2, [pc, #28] @ (800e854 ) 800e836: f043 0310 orr.w r3, r3, #16 800e83a: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800e83c: 2003 movs r0, #3 800e83e: f001 fd19 bl 8010274 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 800e842: 200f movs r0, #15 800e844: f000 f808 bl 800e858 /* Init the low level hardware */ HAL_MspInit(); 800e848: f7ff fb96 bl 800df78 /* Return function status */ return HAL_OK; 800e84c: 2300 movs r3, #0 } 800e84e: 4618 mov r0, r3 800e850: bd80 pop {r7, pc} 800e852: bf00 nop 800e854: 40022000 .word 0x40022000 0800e858 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800e858: b580 push {r7, lr} 800e85a: b082 sub sp, #8 800e85c: af00 add r7, sp, #0 800e85e: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800e860: 4b12 ldr r3, [pc, #72] @ (800e8ac ) 800e862: 681a ldr r2, [r3, #0] 800e864: 4b12 ldr r3, [pc, #72] @ (800e8b0 ) 800e866: 781b ldrb r3, [r3, #0] 800e868: 4619 mov r1, r3 800e86a: f44f 737a mov.w r3, #1000 @ 0x3e8 800e86e: fbb3 f3f1 udiv r3, r3, r1 800e872: fbb2 f3f3 udiv r3, r2, r3 800e876: 4618 mov r0, r3 800e878: f001 fd31 bl 80102de 800e87c: 4603 mov r3, r0 800e87e: 2b00 cmp r3, #0 800e880: d001 beq.n 800e886 { return HAL_ERROR; 800e882: 2301 movs r3, #1 800e884: e00e b.n 800e8a4 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800e886: 687b ldr r3, [r7, #4] 800e888: 2b0f cmp r3, #15 800e88a: d80a bhi.n 800e8a2 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 800e88c: 2200 movs r2, #0 800e88e: 6879 ldr r1, [r7, #4] 800e890: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800e894: f001 fcf9 bl 801028a uwTickPrio = TickPriority; 800e898: 4a06 ldr r2, [pc, #24] @ (800e8b4 ) 800e89a: 687b ldr r3, [r7, #4] 800e89c: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 800e89e: 2300 movs r3, #0 800e8a0: e000 b.n 800e8a4 return HAL_ERROR; 800e8a2: 2301 movs r3, #1 } 800e8a4: 4618 mov r0, r3 800e8a6: 3708 adds r7, #8 800e8a8: 46bd mov sp, r7 800e8aa: bd80 pop {r7, pc} 800e8ac: 20000078 .word 0x20000078 800e8b0: 20000080 .word 0x20000080 800e8b4: 2000007c .word 0x2000007c 0800e8b8 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 800e8b8: b480 push {r7} 800e8ba: af00 add r7, sp, #0 uwTick += uwTickFreq; 800e8bc: 4b05 ldr r3, [pc, #20] @ (800e8d4 ) 800e8be: 781b ldrb r3, [r3, #0] 800e8c0: 461a mov r2, r3 800e8c2: 4b05 ldr r3, [pc, #20] @ (800e8d8 ) 800e8c4: 681b ldr r3, [r3, #0] 800e8c6: 4413 add r3, r2 800e8c8: 4a03 ldr r2, [pc, #12] @ (800e8d8 ) 800e8ca: 6013 str r3, [r2, #0] } 800e8cc: bf00 nop 800e8ce: 46bd mov sp, r7 800e8d0: bc80 pop {r7} 800e8d2: 4770 bx lr 800e8d4: 20000080 .word 0x20000080 800e8d8: 2000108c .word 0x2000108c 0800e8dc : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 800e8dc: b480 push {r7} 800e8de: af00 add r7, sp, #0 return uwTick; 800e8e0: 4b02 ldr r3, [pc, #8] @ (800e8ec ) 800e8e2: 681b ldr r3, [r3, #0] } 800e8e4: 4618 mov r0, r3 800e8e6: 46bd mov sp, r7 800e8e8: bc80 pop {r7} 800e8ea: 4770 bx lr 800e8ec: 2000108c .word 0x2000108c 0800e8f0 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 800e8f0: b580 push {r7, lr} 800e8f2: b084 sub sp, #16 800e8f4: af00 add r7, sp, #0 800e8f6: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 800e8f8: f7ff fff0 bl 800e8dc 800e8fc: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800e8fe: 687b ldr r3, [r7, #4] 800e900: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800e902: 68fb ldr r3, [r7, #12] 800e904: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800e908: d005 beq.n 800e916 { wait += (uint32_t)(uwTickFreq); 800e90a: 4b0a ldr r3, [pc, #40] @ (800e934 ) 800e90c: 781b ldrb r3, [r3, #0] 800e90e: 461a mov r2, r3 800e910: 68fb ldr r3, [r7, #12] 800e912: 4413 add r3, r2 800e914: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 800e916: bf00 nop 800e918: f7ff ffe0 bl 800e8dc 800e91c: 4602 mov r2, r0 800e91e: 68bb ldr r3, [r7, #8] 800e920: 1ad3 subs r3, r2, r3 800e922: 68fa ldr r2, [r7, #12] 800e924: 429a cmp r2, r3 800e926: d8f7 bhi.n 800e918 { } } 800e928: bf00 nop 800e92a: bf00 nop 800e92c: 3710 adds r7, #16 800e92e: 46bd mov sp, r7 800e930: bd80 pop {r7, pc} 800e932: bf00 nop 800e934: 20000080 .word 0x20000080 0800e938 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 800e938: b580 push {r7, lr} 800e93a: b086 sub sp, #24 800e93c: af00 add r7, sp, #0 800e93e: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800e940: 2300 movs r3, #0 800e942: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 800e944: 2300 movs r3, #0 800e946: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 800e948: 2300 movs r3, #0 800e94a: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 800e94c: 2300 movs r3, #0 800e94e: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 800e950: 687b ldr r3, [r7, #4] 800e952: 2b00 cmp r3, #0 800e954: d101 bne.n 800e95a { return HAL_ERROR; 800e956: 2301 movs r3, #1 800e958: e0be b.n 800ead8 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 800e95a: 687b ldr r3, [r7, #4] 800e95c: 689b ldr r3, [r3, #8] 800e95e: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 800e960: 687b ldr r3, [r7, #4] 800e962: 6a9b ldr r3, [r3, #40] @ 0x28 800e964: 2b00 cmp r3, #0 800e966: d109 bne.n 800e97c { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 800e968: 687b ldr r3, [r7, #4] 800e96a: 2200 movs r2, #0 800e96c: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 800e96e: 687b ldr r3, [r7, #4] 800e970: 2200 movs r2, #0 800e972: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 800e976: 6878 ldr r0, [r7, #4] 800e978: f7fa fe64 bl 8009644 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800e97c: 6878 ldr r0, [r7, #4] 800e97e: f000 fbf1 bl 800f164 800e982: 4603 mov r3, r0 800e984: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 800e986: 687b ldr r3, [r7, #4] 800e988: 6a9b ldr r3, [r3, #40] @ 0x28 800e98a: f003 0310 and.w r3, r3, #16 800e98e: 2b00 cmp r3, #0 800e990: f040 8099 bne.w 800eac6 800e994: 7dfb ldrb r3, [r7, #23] 800e996: 2b00 cmp r3, #0 800e998: f040 8095 bne.w 800eac6 (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800e99c: 687b ldr r3, [r7, #4] 800e99e: 6a9b ldr r3, [r3, #40] @ 0x28 800e9a0: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800e9a4: f023 0302 bic.w r3, r3, #2 800e9a8: f043 0202 orr.w r2, r3, #2 800e9ac: 687b ldr r3, [r7, #4] 800e9ae: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 800e9b0: 687b ldr r3, [r7, #4] 800e9b2: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800e9b4: 687b ldr r3, [r7, #4] 800e9b6: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 800e9b8: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 800e9ba: 687b ldr r3, [r7, #4] 800e9bc: 7b1b ldrb r3, [r3, #12] 800e9be: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800e9c0: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 800e9c2: 68ba ldr r2, [r7, #8] 800e9c4: 4313 orrs r3, r2 800e9c6: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 800e9c8: 687b ldr r3, [r7, #4] 800e9ca: 689b ldr r3, [r3, #8] 800e9cc: f5b3 7f80 cmp.w r3, #256 @ 0x100 800e9d0: d003 beq.n 800e9da 800e9d2: 687b ldr r3, [r7, #4] 800e9d4: 689b ldr r3, [r3, #8] 800e9d6: 2b01 cmp r3, #1 800e9d8: d102 bne.n 800e9e0 800e9da: f44f 7380 mov.w r3, #256 @ 0x100 800e9de: e000 b.n 800e9e2 800e9e0: 2300 movs r3, #0 800e9e2: 693a ldr r2, [r7, #16] 800e9e4: 4313 orrs r3, r2 800e9e6: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 800e9e8: 687b ldr r3, [r7, #4] 800e9ea: 7d1b ldrb r3, [r3, #20] 800e9ec: 2b01 cmp r3, #1 800e9ee: d119 bne.n 800ea24 { if (hadc->Init.ContinuousConvMode == DISABLE) 800e9f0: 687b ldr r3, [r7, #4] 800e9f2: 7b1b ldrb r3, [r3, #12] 800e9f4: 2b00 cmp r3, #0 800e9f6: d109 bne.n 800ea0c { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 800e9f8: 687b ldr r3, [r7, #4] 800e9fa: 699b ldr r3, [r3, #24] 800e9fc: 3b01 subs r3, #1 800e9fe: 035a lsls r2, r3, #13 800ea00: 693b ldr r3, [r7, #16] 800ea02: 4313 orrs r3, r2 800ea04: f443 6300 orr.w r3, r3, #2048 @ 0x800 800ea08: 613b str r3, [r7, #16] 800ea0a: e00b b.n 800ea24 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800ea0c: 687b ldr r3, [r7, #4] 800ea0e: 6a9b ldr r3, [r3, #40] @ 0x28 800ea10: f043 0220 orr.w r2, r3, #32 800ea14: 687b ldr r3, [r7, #4] 800ea16: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800ea18: 687b ldr r3, [r7, #4] 800ea1a: 6adb ldr r3, [r3, #44] @ 0x2c 800ea1c: f043 0201 orr.w r2, r3, #1 800ea20: 687b ldr r3, [r7, #4] 800ea22: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 800ea24: 687b ldr r3, [r7, #4] 800ea26: 681b ldr r3, [r3, #0] 800ea28: 685b ldr r3, [r3, #4] 800ea2a: f423 4169 bic.w r1, r3, #59648 @ 0xe900 800ea2e: 687b ldr r3, [r7, #4] 800ea30: 681b ldr r3, [r3, #0] 800ea32: 693a ldr r2, [r7, #16] 800ea34: 430a orrs r2, r1 800ea36: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 800ea38: 687b ldr r3, [r7, #4] 800ea3a: 681b ldr r3, [r3, #0] 800ea3c: 689a ldr r2, [r3, #8] 800ea3e: 4b28 ldr r3, [pc, #160] @ (800eae0 ) 800ea40: 4013 ands r3, r2 800ea42: 687a ldr r2, [r7, #4] 800ea44: 6812 ldr r2, [r2, #0] 800ea46: 68b9 ldr r1, [r7, #8] 800ea48: 430b orrs r3, r1 800ea4a: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 800ea4c: 687b ldr r3, [r7, #4] 800ea4e: 689b ldr r3, [r3, #8] 800ea50: f5b3 7f80 cmp.w r3, #256 @ 0x100 800ea54: d003 beq.n 800ea5e 800ea56: 687b ldr r3, [r7, #4] 800ea58: 689b ldr r3, [r3, #8] 800ea5a: 2b01 cmp r3, #1 800ea5c: d104 bne.n 800ea68 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 800ea5e: 687b ldr r3, [r7, #4] 800ea60: 691b ldr r3, [r3, #16] 800ea62: 3b01 subs r3, #1 800ea64: 051b lsls r3, r3, #20 800ea66: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 800ea68: 687b ldr r3, [r7, #4] 800ea6a: 681b ldr r3, [r3, #0] 800ea6c: 6adb ldr r3, [r3, #44] @ 0x2c 800ea6e: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 800ea72: 687b ldr r3, [r7, #4] 800ea74: 681b ldr r3, [r3, #0] 800ea76: 68fa ldr r2, [r7, #12] 800ea78: 430a orrs r2, r1 800ea7a: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800ea7c: 687b ldr r3, [r7, #4] 800ea7e: 681b ldr r3, [r3, #0] 800ea80: 689a ldr r2, [r3, #8] 800ea82: 4b18 ldr r3, [pc, #96] @ (800eae4 ) 800ea84: 4013 ands r3, r2 800ea86: 68ba ldr r2, [r7, #8] 800ea88: 429a cmp r2, r3 800ea8a: d10b bne.n 800eaa4 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 800ea8c: 687b ldr r3, [r7, #4] 800ea8e: 2200 movs r2, #0 800ea90: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 800ea92: 687b ldr r3, [r7, #4] 800ea94: 6a9b ldr r3, [r3, #40] @ 0x28 800ea96: f023 0303 bic.w r3, r3, #3 800ea9a: f043 0201 orr.w r2, r3, #1 800ea9e: 687b ldr r3, [r7, #4] 800eaa0: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800eaa2: e018 b.n 800ead6 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800eaa4: 687b ldr r3, [r7, #4] 800eaa6: 6a9b ldr r3, [r3, #40] @ 0x28 800eaa8: f023 0312 bic.w r3, r3, #18 800eaac: f043 0210 orr.w r2, r3, #16 800eab0: 687b ldr r3, [r7, #4] 800eab2: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800eab4: 687b ldr r3, [r7, #4] 800eab6: 6adb ldr r3, [r3, #44] @ 0x2c 800eab8: f043 0201 orr.w r2, r3, #1 800eabc: 687b ldr r3, [r7, #4] 800eabe: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 800eac0: 2301 movs r3, #1 800eac2: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800eac4: e007 b.n 800ead6 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800eac6: 687b ldr r3, [r7, #4] 800eac8: 6a9b ldr r3, [r3, #40] @ 0x28 800eaca: f043 0210 orr.w r2, r3, #16 800eace: 687b ldr r3, [r7, #4] 800ead0: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 800ead2: 2301 movs r3, #1 800ead4: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 800ead6: 7dfb ldrb r3, [r7, #23] } 800ead8: 4618 mov r0, r3 800eada: 3718 adds r7, #24 800eadc: 46bd mov sp, r7 800eade: bd80 pop {r7, pc} 800eae0: ffe1f7fd .word 0xffe1f7fd 800eae4: ff1f0efe .word 0xff1f0efe 0800eae8 : * Interruptions enabled in this function: None. * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) { 800eae8: b580 push {r7, lr} 800eaea: b084 sub sp, #16 800eaec: af00 add r7, sp, #0 800eaee: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800eaf0: 2300 movs r3, #0 800eaf2: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800eaf4: 687b ldr r3, [r7, #4] 800eaf6: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800eafa: 2b01 cmp r3, #1 800eafc: d101 bne.n 800eb02 800eafe: 2302 movs r3, #2 800eb00: e098 b.n 800ec34 800eb02: 687b ldr r3, [r7, #4] 800eb04: 2201 movs r2, #1 800eb06: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 800eb0a: 6878 ldr r0, [r7, #4] 800eb0c: f000 fad0 bl 800f0b0 800eb10: 4603 mov r3, r0 800eb12: 73fb strb r3, [r7, #15] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 800eb14: 7bfb ldrb r3, [r7, #15] 800eb16: 2b00 cmp r3, #0 800eb18: f040 8087 bne.w 800ec2a { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 800eb1c: 687b ldr r3, [r7, #4] 800eb1e: 6a9b ldr r3, [r3, #40] @ 0x28 800eb20: f423 7340 bic.w r3, r3, #768 @ 0x300 800eb24: f023 0301 bic.w r3, r3, #1 800eb28: f443 7280 orr.w r2, r3, #256 @ 0x100 800eb2c: 687b ldr r3, [r7, #4] 800eb2e: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 800eb30: 687b ldr r3, [r7, #4] 800eb32: 681b ldr r3, [r3, #0] 800eb34: 4a41 ldr r2, [pc, #260] @ (800ec3c ) 800eb36: 4293 cmp r3, r2 800eb38: d105 bne.n 800eb46 800eb3a: 4b41 ldr r3, [pc, #260] @ (800ec40 ) 800eb3c: 685b ldr r3, [r3, #4] 800eb3e: f403 2370 and.w r3, r3, #983040 @ 0xf0000 800eb42: 2b00 cmp r3, #0 800eb44: d115 bne.n 800eb72 { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800eb46: 687b ldr r3, [r7, #4] 800eb48: 6a9b ldr r3, [r3, #40] @ 0x28 800eb4a: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 800eb4e: 687b ldr r3, [r7, #4] 800eb50: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800eb52: 687b ldr r3, [r7, #4] 800eb54: 681b ldr r3, [r3, #0] 800eb56: 685b ldr r3, [r3, #4] 800eb58: f403 6380 and.w r3, r3, #1024 @ 0x400 800eb5c: 2b00 cmp r3, #0 800eb5e: d026 beq.n 800ebae { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800eb60: 687b ldr r3, [r7, #4] 800eb62: 6a9b ldr r3, [r3, #40] @ 0x28 800eb64: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800eb68: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800eb6c: 687b ldr r3, [r7, #4] 800eb6e: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800eb70: e01d b.n 800ebae } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800eb72: 687b ldr r3, [r7, #4] 800eb74: 6a9b ldr r3, [r3, #40] @ 0x28 800eb76: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800eb7a: 687b ldr r3, [r7, #4] 800eb7c: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 800eb7e: 687b ldr r3, [r7, #4] 800eb80: 681b ldr r3, [r3, #0] 800eb82: 4a2f ldr r2, [pc, #188] @ (800ec40 ) 800eb84: 4293 cmp r3, r2 800eb86: d004 beq.n 800eb92 800eb88: 687b ldr r3, [r7, #4] 800eb8a: 681b ldr r3, [r3, #0] 800eb8c: 4a2b ldr r2, [pc, #172] @ (800ec3c ) 800eb8e: 4293 cmp r3, r2 800eb90: d10d bne.n 800ebae 800eb92: 4b2b ldr r3, [pc, #172] @ (800ec40 ) 800eb94: 685b ldr r3, [r3, #4] 800eb96: f403 6380 and.w r3, r3, #1024 @ 0x400 800eb9a: 2b00 cmp r3, #0 800eb9c: d007 beq.n 800ebae { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800eb9e: 687b ldr r3, [r7, #4] 800eba0: 6a9b ldr r3, [r3, #40] @ 0x28 800eba2: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800eba6: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800ebaa: 687b ldr r3, [r7, #4] 800ebac: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800ebae: 687b ldr r3, [r7, #4] 800ebb0: 6a9b ldr r3, [r3, #40] @ 0x28 800ebb2: f403 5380 and.w r3, r3, #4096 @ 0x1000 800ebb6: 2b00 cmp r3, #0 800ebb8: d006 beq.n 800ebc8 { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 800ebba: 687b ldr r3, [r7, #4] 800ebbc: 6adb ldr r3, [r3, #44] @ 0x2c 800ebbe: f023 0206 bic.w r2, r3, #6 800ebc2: 687b ldr r3, [r7, #4] 800ebc4: 62da str r2, [r3, #44] @ 0x2c 800ebc6: e002 b.n 800ebce } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 800ebc8: 687b ldr r3, [r7, #4] 800ebca: 2200 movs r2, #0 800ebcc: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 800ebce: 687b ldr r3, [r7, #4] 800ebd0: 2200 movs r2, #0 800ebd2: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Clear regular group conversion flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 800ebd6: 687b ldr r3, [r7, #4] 800ebd8: 681b ldr r3, [r3, #0] 800ebda: f06f 0202 mvn.w r2, #2 800ebde: 601a str r2, [r3, #0] /* - if ADC is slave, ADC is enabled only (conversion is not started). */ /* - if ADC is master, ADC is enabled and conversion is started. */ /* If ADC is master, ADC is enabled and conversion is started. */ /* Note: Alternate trigger for single conversion could be to force an */ /* additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/ if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ebe0: 687b ldr r3, [r7, #4] 800ebe2: 681b ldr r3, [r3, #0] 800ebe4: 689b ldr r3, [r3, #8] 800ebe6: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800ebea: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800ebee: d113 bne.n 800ec18 ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) ) 800ebf0: 687b ldr r3, [r7, #4] 800ebf2: 681b ldr r3, [r3, #0] if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ebf4: 4a11 ldr r2, [pc, #68] @ (800ec3c ) 800ebf6: 4293 cmp r3, r2 800ebf8: d105 bne.n 800ec06 ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) ) 800ebfa: 4b11 ldr r3, [pc, #68] @ (800ec40 ) 800ebfc: 685b ldr r3, [r3, #4] 800ebfe: f403 2370 and.w r3, r3, #983040 @ 0xf0000 if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ec02: 2b00 cmp r3, #0 800ec04: d108 bne.n 800ec18 { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 800ec06: 687b ldr r3, [r7, #4] 800ec08: 681b ldr r3, [r3, #0] 800ec0a: 689a ldr r2, [r3, #8] 800ec0c: 687b ldr r3, [r7, #4] 800ec0e: 681b ldr r3, [r3, #0] 800ec10: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 800ec14: 609a str r2, [r3, #8] 800ec16: e00c b.n 800ec32 } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 800ec18: 687b ldr r3, [r7, #4] 800ec1a: 681b ldr r3, [r3, #0] 800ec1c: 689a ldr r2, [r3, #8] 800ec1e: 687b ldr r3, [r7, #4] 800ec20: 681b ldr r3, [r3, #0] 800ec22: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 800ec26: 609a str r2, [r3, #8] 800ec28: e003 b.n 800ec32 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 800ec2a: 687b ldr r3, [r7, #4] 800ec2c: 2200 movs r2, #0 800ec2e: f883 2024 strb.w r2, [r3, #36] @ 0x24 } /* Return function status */ return tmp_hal_status; 800ec32: 7bfb ldrb r3, [r7, #15] } 800ec34: 4618 mov r0, r3 800ec36: 3710 adds r7, #16 800ec38: 46bd mov sp, r7 800ec3a: bd80 pop {r7, pc} 800ec3c: 40012800 .word 0x40012800 800ec40: 40012400 .word 0x40012400 0800ec44 : * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) { 800ec44: b580 push {r7, lr} 800ec46: b084 sub sp, #16 800ec48: af00 add r7, sp, #0 800ec4a: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800ec4c: 2300 movs r3, #0 800ec4e: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800ec50: 687b ldr r3, [r7, #4] 800ec52: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800ec56: 2b01 cmp r3, #1 800ec58: d101 bne.n 800ec5e 800ec5a: 2302 movs r3, #2 800ec5c: e01a b.n 800ec94 800ec5e: 687b ldr r3, [r7, #4] 800ec60: 2201 movs r2, #1 800ec62: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800ec66: 6878 ldr r0, [r7, #4] 800ec68: f000 fa7c bl 800f164 800ec6c: 4603 mov r3, r0 800ec6e: 73fb strb r3, [r7, #15] /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) 800ec70: 7bfb ldrb r3, [r7, #15] 800ec72: 2b00 cmp r3, #0 800ec74: d109 bne.n 800ec8a { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800ec76: 687b ldr r3, [r7, #4] 800ec78: 6a9b ldr r3, [r3, #40] @ 0x28 800ec7a: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800ec7e: f023 0301 bic.w r3, r3, #1 800ec82: f043 0201 orr.w r2, r3, #1 800ec86: 687b ldr r3, [r7, #4] 800ec88: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 800ec8a: 687b ldr r3, [r7, #4] 800ec8c: 2200 movs r2, #0 800ec8e: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800ec92: 7bfb ldrb r3, [r7, #15] } 800ec94: 4618 mov r0, r3 800ec96: 3710 adds r7, #16 800ec98: 46bd mov sp, r7 800ec9a: bd80 pop {r7, pc} 0800ec9c : * @param hadc: ADC handle * @param Timeout: Timeout value in millisecond. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) { 800ec9c: b590 push {r4, r7, lr} 800ec9e: b087 sub sp, #28 800eca0: af00 add r7, sp, #0 800eca2: 6078 str r0, [r7, #4] 800eca4: 6039 str r1, [r7, #0] uint32_t tickstart = 0U; 800eca6: 2300 movs r3, #0 800eca8: 617b str r3, [r7, #20] /* Variables for polling in case of scan mode enabled and polling for each */ /* conversion. */ __IO uint32_t Conversion_Timeout_CPU_cycles = 0U; 800ecaa: 2300 movs r3, #0 800ecac: 60fb str r3, [r7, #12] uint32_t Conversion_Timeout_CPU_cycles_max = 0U; 800ecae: 2300 movs r3, #0 800ecb0: 613b str r3, [r7, #16] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Get tick count */ tickstart = HAL_GetTick(); 800ecb2: f7ff fe13 bl 800e8dc 800ecb6: 6178 str r0, [r7, #20] /* Verification that ADC configuration is compliant with polling for */ /* each conversion: */ /* Particular case is ADC configured in DMA mode */ if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA)) 800ecb8: 687b ldr r3, [r7, #4] 800ecba: 681b ldr r3, [r3, #0] 800ecbc: 689b ldr r3, [r3, #8] 800ecbe: f403 7380 and.w r3, r3, #256 @ 0x100 800ecc2: 2b00 cmp r3, #0 800ecc4: d00b beq.n 800ecde { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800ecc6: 687b ldr r3, [r7, #4] 800ecc8: 6a9b ldr r3, [r3, #40] @ 0x28 800ecca: f043 0220 orr.w r2, r3, #32 800ecce: 687b ldr r3, [r7, #4] 800ecd0: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 800ecd2: 687b ldr r3, [r7, #4] 800ecd4: 2200 movs r2, #0 800ecd6: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800ecda: 2301 movs r3, #1 800ecdc: e0d3 b.n 800ee86 /* from ADC conversion time (selected sampling time + conversion time of */ /* 12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on */ /* settings, conversion time range can be from 28 to 32256 CPU cycles). */ /* As flag EOC is not set after each conversion, no timeout status can */ /* be set. */ if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 800ecde: 687b ldr r3, [r7, #4] 800ece0: 681b ldr r3, [r3, #0] 800ece2: 685b ldr r3, [r3, #4] 800ece4: f403 7380 and.w r3, r3, #256 @ 0x100 800ece8: 2b00 cmp r3, #0 800ecea: d131 bne.n 800ed50 HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ) 800ecec: 687b ldr r3, [r7, #4] 800ecee: 681b ldr r3, [r3, #0] 800ecf0: 6adb ldr r3, [r3, #44] @ 0x2c 800ecf2: f403 0370 and.w r3, r3, #15728640 @ 0xf00000 if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 800ecf6: 2b00 cmp r3, #0 800ecf8: d12a bne.n 800ed50 { /* Wait until End of Conversion flag is raised */ while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 800ecfa: e021 b.n 800ed40 { /* Check if timeout is disabled (set to infinite wait) */ if(Timeout != HAL_MAX_DELAY) 800ecfc: 683b ldr r3, [r7, #0] 800ecfe: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800ed02: d01d beq.n 800ed40 { if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout)) 800ed04: 683b ldr r3, [r7, #0] 800ed06: 2b00 cmp r3, #0 800ed08: d007 beq.n 800ed1a 800ed0a: f7ff fde7 bl 800e8dc 800ed0e: 4602 mov r2, r0 800ed10: 697b ldr r3, [r7, #20] 800ed12: 1ad3 subs r3, r2, r3 800ed14: 683a ldr r2, [r7, #0] 800ed16: 429a cmp r2, r3 800ed18: d212 bcs.n 800ed40 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 800ed1a: 687b ldr r3, [r7, #4] 800ed1c: 681b ldr r3, [r3, #0] 800ed1e: 681b ldr r3, [r3, #0] 800ed20: f003 0302 and.w r3, r3, #2 800ed24: 2b00 cmp r3, #0 800ed26: d10b bne.n 800ed40 { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 800ed28: 687b ldr r3, [r7, #4] 800ed2a: 6a9b ldr r3, [r3, #40] @ 0x28 800ed2c: f043 0204 orr.w r2, r3, #4 800ed30: 687b ldr r3, [r7, #4] 800ed32: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 800ed34: 687b ldr r3, [r7, #4] 800ed36: 2200 movs r2, #0 800ed38: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_TIMEOUT; 800ed3c: 2303 movs r3, #3 800ed3e: e0a2 b.n 800ee86 while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 800ed40: 687b ldr r3, [r7, #4] 800ed42: 681b ldr r3, [r3, #0] 800ed44: 681b ldr r3, [r3, #0] 800ed46: f003 0302 and.w r3, r3, #2 800ed4a: 2b00 cmp r3, #0 800ed4c: d0d6 beq.n 800ecfc if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 800ed4e: e070 b.n 800ee32 /* Replace polling by wait for maximum conversion time */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles */ /* and ADC maximum conversion cycles on all channels. */ /* - Wait for the expected ADC clock cycles delay */ Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 800ed50: 4b4f ldr r3, [pc, #316] @ (800ee90 ) 800ed52: 681c ldr r4, [r3, #0] 800ed54: 2002 movs r0, #2 800ed56: f002 fcfb bl 8011750 800ed5a: 4603 mov r3, r0 800ed5c: fbb4 f2f3 udiv r2, r4, r3 * ADC_CONVCYCLES_MAX_RANGE(hadc) ); 800ed60: 687b ldr r3, [r7, #4] 800ed62: 681b ldr r3, [r3, #0] 800ed64: 6919 ldr r1, [r3, #16] 800ed66: 4b4b ldr r3, [pc, #300] @ (800ee94 ) 800ed68: 400b ands r3, r1 800ed6a: 2b00 cmp r3, #0 800ed6c: d118 bne.n 800eda0 800ed6e: 687b ldr r3, [r7, #4] 800ed70: 681b ldr r3, [r3, #0] 800ed72: 68d9 ldr r1, [r3, #12] 800ed74: 4b48 ldr r3, [pc, #288] @ (800ee98 ) 800ed76: 400b ands r3, r1 800ed78: 2b00 cmp r3, #0 800ed7a: d111 bne.n 800eda0 800ed7c: 687b ldr r3, [r7, #4] 800ed7e: 681b ldr r3, [r3, #0] 800ed80: 6919 ldr r1, [r3, #16] 800ed82: 4b46 ldr r3, [pc, #280] @ (800ee9c ) 800ed84: 400b ands r3, r1 800ed86: 2b00 cmp r3, #0 800ed88: d108 bne.n 800ed9c 800ed8a: 687b ldr r3, [r7, #4] 800ed8c: 681b ldr r3, [r3, #0] 800ed8e: 68d9 ldr r1, [r3, #12] 800ed90: 4b43 ldr r3, [pc, #268] @ (800eea0 ) 800ed92: 400b ands r3, r1 800ed94: 2b00 cmp r3, #0 800ed96: d101 bne.n 800ed9c 800ed98: 2314 movs r3, #20 800ed9a: e020 b.n 800edde 800ed9c: 2329 movs r3, #41 @ 0x29 800ed9e: e01e b.n 800edde 800eda0: 687b ldr r3, [r7, #4] 800eda2: 681b ldr r3, [r3, #0] 800eda4: 6919 ldr r1, [r3, #16] 800eda6: 4b3d ldr r3, [pc, #244] @ (800ee9c ) 800eda8: 400b ands r3, r1 800edaa: 2b00 cmp r3, #0 800edac: d106 bne.n 800edbc 800edae: 687b ldr r3, [r7, #4] 800edb0: 681b ldr r3, [r3, #0] 800edb2: 68d9 ldr r1, [r3, #12] 800edb4: 4b3a ldr r3, [pc, #232] @ (800eea0 ) 800edb6: 400b ands r3, r1 800edb8: 2b00 cmp r3, #0 800edba: d00d beq.n 800edd8 800edbc: 687b ldr r3, [r7, #4] 800edbe: 681b ldr r3, [r3, #0] 800edc0: 6919 ldr r1, [r3, #16] 800edc2: 4b38 ldr r3, [pc, #224] @ (800eea4 ) 800edc4: 400b ands r3, r1 800edc6: 2b00 cmp r3, #0 800edc8: d108 bne.n 800eddc 800edca: 687b ldr r3, [r7, #4] 800edcc: 681b ldr r3, [r3, #0] 800edce: 68d9 ldr r1, [r3, #12] 800edd0: 4b34 ldr r3, [pc, #208] @ (800eea4 ) 800edd2: 400b ands r3, r1 800edd4: 2b00 cmp r3, #0 800edd6: d101 bne.n 800eddc 800edd8: 2354 movs r3, #84 @ 0x54 800edda: e000 b.n 800edde 800eddc: 23fc movs r3, #252 @ 0xfc Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock 800edde: fb02 f303 mul.w r3, r2, r3 800ede2: 613b str r3, [r7, #16] while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 800ede4: e021 b.n 800ee2a { /* Check if timeout is disabled (set to infinite wait) */ if(Timeout != HAL_MAX_DELAY) 800ede6: 683b ldr r3, [r7, #0] 800ede8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800edec: d01a beq.n 800ee24 { if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) 800edee: 683b ldr r3, [r7, #0] 800edf0: 2b00 cmp r3, #0 800edf2: d007 beq.n 800ee04 800edf4: f7ff fd72 bl 800e8dc 800edf8: 4602 mov r2, r0 800edfa: 697b ldr r3, [r7, #20] 800edfc: 1ad3 subs r3, r2, r3 800edfe: 683a ldr r2, [r7, #0] 800ee00: 429a cmp r2, r3 800ee02: d20f bcs.n 800ee24 { /* New check to avoid false timeout detection in case of preemption */ if(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 800ee04: 68fb ldr r3, [r7, #12] 800ee06: 693a ldr r2, [r7, #16] 800ee08: 429a cmp r2, r3 800ee0a: d90b bls.n 800ee24 { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 800ee0c: 687b ldr r3, [r7, #4] 800ee0e: 6a9b ldr r3, [r3, #40] @ 0x28 800ee10: f043 0204 orr.w r2, r3, #4 800ee14: 687b ldr r3, [r7, #4] 800ee16: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 800ee18: 687b ldr r3, [r7, #4] 800ee1a: 2200 movs r2, #0 800ee1c: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_TIMEOUT; 800ee20: 2303 movs r3, #3 800ee22: e030 b.n 800ee86 } } } Conversion_Timeout_CPU_cycles ++; 800ee24: 68fb ldr r3, [r7, #12] 800ee26: 3301 adds r3, #1 800ee28: 60fb str r3, [r7, #12] while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 800ee2a: 68fb ldr r3, [r7, #12] 800ee2c: 693a ldr r2, [r7, #16] 800ee2e: 429a cmp r2, r3 800ee30: d8d9 bhi.n 800ede6 } } /* Clear regular group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC); 800ee32: 687b ldr r3, [r7, #4] 800ee34: 681b ldr r3, [r3, #0] 800ee36: f06f 0212 mvn.w r2, #18 800ee3a: 601a str r2, [r3, #0] /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 800ee3c: 687b ldr r3, [r7, #4] 800ee3e: 6a9b ldr r3, [r3, #40] @ 0x28 800ee40: f443 7200 orr.w r2, r3, #512 @ 0x200 800ee44: 687b ldr r3, [r7, #4] 800ee46: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ee48: 687b ldr r3, [r7, #4] 800ee4a: 681b ldr r3, [r3, #0] 800ee4c: 689b ldr r3, [r3, #8] 800ee4e: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800ee52: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800ee56: d115 bne.n 800ee84 (hadc->Init.ContinuousConvMode == DISABLE) ) 800ee58: 687b ldr r3, [r7, #4] 800ee5a: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ee5c: 2b00 cmp r3, #0 800ee5e: d111 bne.n 800ee84 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 800ee60: 687b ldr r3, [r7, #4] 800ee62: 6a9b ldr r3, [r3, #40] @ 0x28 800ee64: f423 7280 bic.w r2, r3, #256 @ 0x100 800ee68: 687b ldr r3, [r7, #4] 800ee6a: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800ee6c: 687b ldr r3, [r7, #4] 800ee6e: 6a9b ldr r3, [r3, #40] @ 0x28 800ee70: f403 5380 and.w r3, r3, #4096 @ 0x1000 800ee74: 2b00 cmp r3, #0 800ee76: d105 bne.n 800ee84 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 800ee78: 687b ldr r3, [r7, #4] 800ee7a: 6a9b ldr r3, [r3, #40] @ 0x28 800ee7c: f043 0201 orr.w r2, r3, #1 800ee80: 687b ldr r3, [r7, #4] 800ee82: 629a str r2, [r3, #40] @ 0x28 } } /* Return ADC state */ return HAL_OK; 800ee84: 2300 movs r3, #0 } 800ee86: 4618 mov r0, r3 800ee88: 371c adds r7, #28 800ee8a: 46bd mov sp, r7 800ee8c: bd90 pop {r4, r7, pc} 800ee8e: bf00 nop 800ee90: 20000078 .word 0x20000078 800ee94: 24924924 .word 0x24924924 800ee98: 00924924 .word 0x00924924 800ee9c: 12492492 .word 0x12492492 800eea0: 00492492 .word 0x00492492 800eea4: 00249249 .word 0x00249249 0800eea8 : * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). * @param hadc: ADC handle * @retval ADC group regular conversion data */ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) { 800eea8: b480 push {r7} 800eeaa: b083 sub sp, #12 800eeac: af00 add r7, sp, #0 800eeae: 6078 str r0, [r7, #4] /* Note: EOC flag is not cleared here by software because automatically */ /* cleared by hardware when reading register DR. */ /* Return ADC converted value */ return hadc->Instance->DR; 800eeb0: 687b ldr r3, [r7, #4] 800eeb2: 681b ldr r3, [r3, #0] 800eeb4: 6cdb ldr r3, [r3, #76] @ 0x4c } 800eeb6: 4618 mov r0, r3 800eeb8: 370c adds r7, #12 800eeba: 46bd mov sp, r7 800eebc: bc80 pop {r7} 800eebe: 4770 bx lr 0800eec0 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 800eec0: b480 push {r7} 800eec2: b085 sub sp, #20 800eec4: af00 add r7, sp, #0 800eec6: 6078 str r0, [r7, #4] 800eec8: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800eeca: 2300 movs r3, #0 800eecc: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 800eece: 2300 movs r3, #0 800eed0: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 800eed2: 687b ldr r3, [r7, #4] 800eed4: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800eed8: 2b01 cmp r3, #1 800eeda: d101 bne.n 800eee0 800eedc: 2302 movs r3, #2 800eede: e0dc b.n 800f09a 800eee0: 687b ldr r3, [r7, #4] 800eee2: 2201 movs r2, #1 800eee4: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 800eee8: 683b ldr r3, [r7, #0] 800eeea: 685b ldr r3, [r3, #4] 800eeec: 2b06 cmp r3, #6 800eeee: d81c bhi.n 800ef2a { MODIFY_REG(hadc->Instance->SQR3 , 800eef0: 687b ldr r3, [r7, #4] 800eef2: 681b ldr r3, [r3, #0] 800eef4: 6b59 ldr r1, [r3, #52] @ 0x34 800eef6: 683b ldr r3, [r7, #0] 800eef8: 685a ldr r2, [r3, #4] 800eefa: 4613 mov r3, r2 800eefc: 009b lsls r3, r3, #2 800eefe: 4413 add r3, r2 800ef00: 3b05 subs r3, #5 800ef02: 221f movs r2, #31 800ef04: fa02 f303 lsl.w r3, r2, r3 800ef08: 43db mvns r3, r3 800ef0a: 4019 ands r1, r3 800ef0c: 683b ldr r3, [r7, #0] 800ef0e: 6818 ldr r0, [r3, #0] 800ef10: 683b ldr r3, [r7, #0] 800ef12: 685a ldr r2, [r3, #4] 800ef14: 4613 mov r3, r2 800ef16: 009b lsls r3, r3, #2 800ef18: 4413 add r3, r2 800ef1a: 3b05 subs r3, #5 800ef1c: fa00 f203 lsl.w r2, r0, r3 800ef20: 687b ldr r3, [r7, #4] 800ef22: 681b ldr r3, [r3, #0] 800ef24: 430a orrs r2, r1 800ef26: 635a str r2, [r3, #52] @ 0x34 800ef28: e03c b.n 800efa4 ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 800ef2a: 683b ldr r3, [r7, #0] 800ef2c: 685b ldr r3, [r3, #4] 800ef2e: 2b0c cmp r3, #12 800ef30: d81c bhi.n 800ef6c { MODIFY_REG(hadc->Instance->SQR2 , 800ef32: 687b ldr r3, [r7, #4] 800ef34: 681b ldr r3, [r3, #0] 800ef36: 6b19 ldr r1, [r3, #48] @ 0x30 800ef38: 683b ldr r3, [r7, #0] 800ef3a: 685a ldr r2, [r3, #4] 800ef3c: 4613 mov r3, r2 800ef3e: 009b lsls r3, r3, #2 800ef40: 4413 add r3, r2 800ef42: 3b23 subs r3, #35 @ 0x23 800ef44: 221f movs r2, #31 800ef46: fa02 f303 lsl.w r3, r2, r3 800ef4a: 43db mvns r3, r3 800ef4c: 4019 ands r1, r3 800ef4e: 683b ldr r3, [r7, #0] 800ef50: 6818 ldr r0, [r3, #0] 800ef52: 683b ldr r3, [r7, #0] 800ef54: 685a ldr r2, [r3, #4] 800ef56: 4613 mov r3, r2 800ef58: 009b lsls r3, r3, #2 800ef5a: 4413 add r3, r2 800ef5c: 3b23 subs r3, #35 @ 0x23 800ef5e: fa00 f203 lsl.w r2, r0, r3 800ef62: 687b ldr r3, [r7, #4] 800ef64: 681b ldr r3, [r3, #0] 800ef66: 430a orrs r2, r1 800ef68: 631a str r2, [r3, #48] @ 0x30 800ef6a: e01b b.n 800efa4 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 800ef6c: 687b ldr r3, [r7, #4] 800ef6e: 681b ldr r3, [r3, #0] 800ef70: 6ad9 ldr r1, [r3, #44] @ 0x2c 800ef72: 683b ldr r3, [r7, #0] 800ef74: 685a ldr r2, [r3, #4] 800ef76: 4613 mov r3, r2 800ef78: 009b lsls r3, r3, #2 800ef7a: 4413 add r3, r2 800ef7c: 3b41 subs r3, #65 @ 0x41 800ef7e: 221f movs r2, #31 800ef80: fa02 f303 lsl.w r3, r2, r3 800ef84: 43db mvns r3, r3 800ef86: 4019 ands r1, r3 800ef88: 683b ldr r3, [r7, #0] 800ef8a: 6818 ldr r0, [r3, #0] 800ef8c: 683b ldr r3, [r7, #0] 800ef8e: 685a ldr r2, [r3, #4] 800ef90: 4613 mov r3, r2 800ef92: 009b lsls r3, r3, #2 800ef94: 4413 add r3, r2 800ef96: 3b41 subs r3, #65 @ 0x41 800ef98: fa00 f203 lsl.w r2, r0, r3 800ef9c: 687b ldr r3, [r7, #4] 800ef9e: 681b ldr r3, [r3, #0] 800efa0: 430a orrs r2, r1 800efa2: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 800efa4: 683b ldr r3, [r7, #0] 800efa6: 681b ldr r3, [r3, #0] 800efa8: 2b09 cmp r3, #9 800efaa: d91c bls.n 800efe6 { MODIFY_REG(hadc->Instance->SMPR1 , 800efac: 687b ldr r3, [r7, #4] 800efae: 681b ldr r3, [r3, #0] 800efb0: 68d9 ldr r1, [r3, #12] 800efb2: 683b ldr r3, [r7, #0] 800efb4: 681a ldr r2, [r3, #0] 800efb6: 4613 mov r3, r2 800efb8: 005b lsls r3, r3, #1 800efba: 4413 add r3, r2 800efbc: 3b1e subs r3, #30 800efbe: 2207 movs r2, #7 800efc0: fa02 f303 lsl.w r3, r2, r3 800efc4: 43db mvns r3, r3 800efc6: 4019 ands r1, r3 800efc8: 683b ldr r3, [r7, #0] 800efca: 6898 ldr r0, [r3, #8] 800efcc: 683b ldr r3, [r7, #0] 800efce: 681a ldr r2, [r3, #0] 800efd0: 4613 mov r3, r2 800efd2: 005b lsls r3, r3, #1 800efd4: 4413 add r3, r2 800efd6: 3b1e subs r3, #30 800efd8: fa00 f203 lsl.w r2, r0, r3 800efdc: 687b ldr r3, [r7, #4] 800efde: 681b ldr r3, [r3, #0] 800efe0: 430a orrs r2, r1 800efe2: 60da str r2, [r3, #12] 800efe4: e019 b.n 800f01a ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 800efe6: 687b ldr r3, [r7, #4] 800efe8: 681b ldr r3, [r3, #0] 800efea: 6919 ldr r1, [r3, #16] 800efec: 683b ldr r3, [r7, #0] 800efee: 681a ldr r2, [r3, #0] 800eff0: 4613 mov r3, r2 800eff2: 005b lsls r3, r3, #1 800eff4: 4413 add r3, r2 800eff6: 2207 movs r2, #7 800eff8: fa02 f303 lsl.w r3, r2, r3 800effc: 43db mvns r3, r3 800effe: 4019 ands r1, r3 800f000: 683b ldr r3, [r7, #0] 800f002: 6898 ldr r0, [r3, #8] 800f004: 683b ldr r3, [r7, #0] 800f006: 681a ldr r2, [r3, #0] 800f008: 4613 mov r3, r2 800f00a: 005b lsls r3, r3, #1 800f00c: 4413 add r3, r2 800f00e: fa00 f203 lsl.w r2, r0, r3 800f012: 687b ldr r3, [r7, #4] 800f014: 681b ldr r3, [r3, #0] 800f016: 430a orrs r2, r1 800f018: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800f01a: 683b ldr r3, [r7, #0] 800f01c: 681b ldr r3, [r3, #0] 800f01e: 2b10 cmp r3, #16 800f020: d003 beq.n 800f02a (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 800f022: 683b ldr r3, [r7, #0] 800f024: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800f026: 2b11 cmp r3, #17 800f028: d132 bne.n 800f090 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 800f02a: 687b ldr r3, [r7, #4] 800f02c: 681b ldr r3, [r3, #0] 800f02e: 4a1d ldr r2, [pc, #116] @ (800f0a4 ) 800f030: 4293 cmp r3, r2 800f032: d125 bne.n 800f080 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 800f034: 687b ldr r3, [r7, #4] 800f036: 681b ldr r3, [r3, #0] 800f038: 689b ldr r3, [r3, #8] 800f03a: f403 0300 and.w r3, r3, #8388608 @ 0x800000 800f03e: 2b00 cmp r3, #0 800f040: d126 bne.n 800f090 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 800f042: 687b ldr r3, [r7, #4] 800f044: 681b ldr r3, [r3, #0] 800f046: 689a ldr r2, [r3, #8] 800f048: 687b ldr r3, [r7, #4] 800f04a: 681b ldr r3, [r3, #0] 800f04c: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 800f050: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 800f052: 683b ldr r3, [r7, #0] 800f054: 681b ldr r3, [r3, #0] 800f056: 2b10 cmp r3, #16 800f058: d11a bne.n 800f090 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 800f05a: 4b13 ldr r3, [pc, #76] @ (800f0a8 ) 800f05c: 681b ldr r3, [r3, #0] 800f05e: 4a13 ldr r2, [pc, #76] @ (800f0ac ) 800f060: fba2 2303 umull r2, r3, r2, r3 800f064: 0c9a lsrs r2, r3, #18 800f066: 4613 mov r3, r2 800f068: 009b lsls r3, r3, #2 800f06a: 4413 add r3, r2 800f06c: 005b lsls r3, r3, #1 800f06e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800f070: e002 b.n 800f078 { wait_loop_index--; 800f072: 68bb ldr r3, [r7, #8] 800f074: 3b01 subs r3, #1 800f076: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800f078: 68bb ldr r3, [r7, #8] 800f07a: 2b00 cmp r3, #0 800f07c: d1f9 bne.n 800f072 800f07e: e007 b.n 800f090 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800f080: 687b ldr r3, [r7, #4] 800f082: 6a9b ldr r3, [r3, #40] @ 0x28 800f084: f043 0220 orr.w r2, r3, #32 800f088: 687b ldr r3, [r7, #4] 800f08a: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 800f08c: 2301 movs r3, #1 800f08e: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 800f090: 687b ldr r3, [r7, #4] 800f092: 2200 movs r2, #0 800f094: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800f098: 7bfb ldrb r3, [r7, #15] } 800f09a: 4618 mov r0, r3 800f09c: 3714 adds r7, #20 800f09e: 46bd mov sp, r7 800f0a0: bc80 pop {r7} 800f0a2: 4770 bx lr 800f0a4: 40012400 .word 0x40012400 800f0a8: 20000078 .word 0x20000078 800f0ac: 431bde83 .word 0x431bde83 0800f0b0 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 800f0b0: b580 push {r7, lr} 800f0b2: b084 sub sp, #16 800f0b4: af00 add r7, sp, #0 800f0b6: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800f0b8: 2300 movs r3, #0 800f0ba: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 800f0bc: 2300 movs r3, #0 800f0be: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 800f0c0: 687b ldr r3, [r7, #4] 800f0c2: 681b ldr r3, [r3, #0] 800f0c4: 689b ldr r3, [r3, #8] 800f0c6: f003 0301 and.w r3, r3, #1 800f0ca: 2b01 cmp r3, #1 800f0cc: d040 beq.n 800f150 { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 800f0ce: 687b ldr r3, [r7, #4] 800f0d0: 681b ldr r3, [r3, #0] 800f0d2: 689a ldr r2, [r3, #8] 800f0d4: 687b ldr r3, [r7, #4] 800f0d6: 681b ldr r3, [r3, #0] 800f0d8: f042 0201 orr.w r2, r2, #1 800f0dc: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 800f0de: 4b1f ldr r3, [pc, #124] @ (800f15c ) 800f0e0: 681b ldr r3, [r3, #0] 800f0e2: 4a1f ldr r2, [pc, #124] @ (800f160 ) 800f0e4: fba2 2303 umull r2, r3, r2, r3 800f0e8: 0c9b lsrs r3, r3, #18 800f0ea: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800f0ec: e002 b.n 800f0f4 { wait_loop_index--; 800f0ee: 68bb ldr r3, [r7, #8] 800f0f0: 3b01 subs r3, #1 800f0f2: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800f0f4: 68bb ldr r3, [r7, #8] 800f0f6: 2b00 cmp r3, #0 800f0f8: d1f9 bne.n 800f0ee } /* Get tick count */ tickstart = HAL_GetTick(); 800f0fa: f7ff fbef bl 800e8dc 800f0fe: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 800f100: e01f b.n 800f142 { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 800f102: f7ff fbeb bl 800e8dc 800f106: 4602 mov r2, r0 800f108: 68fb ldr r3, [r7, #12] 800f10a: 1ad3 subs r3, r2, r3 800f10c: 2b02 cmp r3, #2 800f10e: d918 bls.n 800f142 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 800f110: 687b ldr r3, [r7, #4] 800f112: 681b ldr r3, [r3, #0] 800f114: 689b ldr r3, [r3, #8] 800f116: f003 0301 and.w r3, r3, #1 800f11a: 2b01 cmp r3, #1 800f11c: d011 beq.n 800f142 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800f11e: 687b ldr r3, [r7, #4] 800f120: 6a9b ldr r3, [r3, #40] @ 0x28 800f122: f043 0210 orr.w r2, r3, #16 800f126: 687b ldr r3, [r7, #4] 800f128: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800f12a: 687b ldr r3, [r7, #4] 800f12c: 6adb ldr r3, [r3, #44] @ 0x2c 800f12e: f043 0201 orr.w r2, r3, #1 800f132: 687b ldr r3, [r7, #4] 800f134: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 800f136: 687b ldr r3, [r7, #4] 800f138: 2200 movs r2, #0 800f13a: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f13e: 2301 movs r3, #1 800f140: e007 b.n 800f152 while(ADC_IS_ENABLE(hadc) == RESET) 800f142: 687b ldr r3, [r7, #4] 800f144: 681b ldr r3, [r3, #0] 800f146: 689b ldr r3, [r3, #8] 800f148: f003 0301 and.w r3, r3, #1 800f14c: 2b01 cmp r3, #1 800f14e: d1d8 bne.n 800f102 } } } /* Return HAL status */ return HAL_OK; 800f150: 2300 movs r3, #0 } 800f152: 4618 mov r0, r3 800f154: 3710 adds r7, #16 800f156: 46bd mov sp, r7 800f158: bd80 pop {r7, pc} 800f15a: bf00 nop 800f15c: 20000078 .word 0x20000078 800f160: 431bde83 .word 0x431bde83 0800f164 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 800f164: b580 push {r7, lr} 800f166: b084 sub sp, #16 800f168: af00 add r7, sp, #0 800f16a: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800f16c: 2300 movs r3, #0 800f16e: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 800f170: 687b ldr r3, [r7, #4] 800f172: 681b ldr r3, [r3, #0] 800f174: 689b ldr r3, [r3, #8] 800f176: f003 0301 and.w r3, r3, #1 800f17a: 2b01 cmp r3, #1 800f17c: d12e bne.n 800f1dc { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 800f17e: 687b ldr r3, [r7, #4] 800f180: 681b ldr r3, [r3, #0] 800f182: 689a ldr r2, [r3, #8] 800f184: 687b ldr r3, [r7, #4] 800f186: 681b ldr r3, [r3, #0] 800f188: f022 0201 bic.w r2, r2, #1 800f18c: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 800f18e: f7ff fba5 bl 800e8dc 800f192: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 800f194: e01b b.n 800f1ce { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 800f196: f7ff fba1 bl 800e8dc 800f19a: 4602 mov r2, r0 800f19c: 68fb ldr r3, [r7, #12] 800f19e: 1ad3 subs r3, r2, r3 800f1a0: 2b02 cmp r3, #2 800f1a2: d914 bls.n 800f1ce { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 800f1a4: 687b ldr r3, [r7, #4] 800f1a6: 681b ldr r3, [r3, #0] 800f1a8: 689b ldr r3, [r3, #8] 800f1aa: f003 0301 and.w r3, r3, #1 800f1ae: 2b01 cmp r3, #1 800f1b0: d10d bne.n 800f1ce { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800f1b2: 687b ldr r3, [r7, #4] 800f1b4: 6a9b ldr r3, [r3, #40] @ 0x28 800f1b6: f043 0210 orr.w r2, r3, #16 800f1ba: 687b ldr r3, [r7, #4] 800f1bc: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800f1be: 687b ldr r3, [r7, #4] 800f1c0: 6adb ldr r3, [r3, #44] @ 0x2c 800f1c2: f043 0201 orr.w r2, r3, #1 800f1c6: 687b ldr r3, [r7, #4] 800f1c8: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 800f1ca: 2301 movs r3, #1 800f1cc: e007 b.n 800f1de while(ADC_IS_ENABLE(hadc) != RESET) 800f1ce: 687b ldr r3, [r7, #4] 800f1d0: 681b ldr r3, [r3, #0] 800f1d2: 689b ldr r3, [r3, #8] 800f1d4: f003 0301 and.w r3, r3, #1 800f1d8: 2b01 cmp r3, #1 800f1da: d0dc beq.n 800f196 } } } /* Return HAL status */ return HAL_OK; 800f1dc: 2300 movs r3, #0 } 800f1de: 4618 mov r0, r3 800f1e0: 3710 adds r7, #16 800f1e2: 46bd mov sp, r7 800f1e4: bd80 pop {r7, pc} ... 0800f1e8 : * the completion of this function. * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) { 800f1e8: b590 push {r4, r7, lr} 800f1ea: b087 sub sp, #28 800f1ec: af00 add r7, sp, #0 800f1ee: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800f1f0: 2300 movs r3, #0 800f1f2: 75fb strb r3, [r7, #23] uint32_t tickstart; __IO uint32_t wait_loop_index = 0U; 800f1f4: 2300 movs r3, #0 800f1f6: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800f1f8: 687b ldr r3, [r7, #4] 800f1fa: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800f1fe: 2b01 cmp r3, #1 800f200: d101 bne.n 800f206 800f202: 2302 movs r3, #2 800f204: e097 b.n 800f336 800f206: 687b ldr r3, [r7, #4] 800f208: 2201 movs r2, #1 800f20a: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* 1. Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800f20e: 6878 ldr r0, [r7, #4] 800f210: f7ff ffa8 bl 800f164 800f214: 4603 mov r3, r0 800f216: 75fb strb r3, [r7, #23] /* 2. Calibration prerequisite delay before starting the calibration. */ /* - ADC must be enabled for at least two ADC clock cycles */ tmp_hal_status = ADC_Enable(hadc); 800f218: 6878 ldr r0, [r7, #4] 800f21a: f7ff ff49 bl 800f0b0 800f21e: 4603 mov r3, r0 800f220: 75fb strb r3, [r7, #23] /* Check if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 800f222: 7dfb ldrb r3, [r7, #23] 800f224: 2b00 cmp r3, #0 800f226: f040 8081 bne.w 800f32c { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800f22a: 687b ldr r3, [r7, #4] 800f22c: 6a9b ldr r3, [r3, #40] @ 0x28 800f22e: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800f232: f023 0302 bic.w r3, r3, #2 800f236: f043 0202 orr.w r2, r3, #2 800f23a: 687b ldr r3, [r7, #4] 800f23c: 629a str r2, [r3, #40] @ 0x28 /* Hardware prerequisite: delay before starting the calibration. */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles. */ /* - Wait for the expected ADC clock cycles delay */ wait_loop_index = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 800f23e: 4b40 ldr r3, [pc, #256] @ (800f340 ) 800f240: 681c ldr r4, [r3, #0] 800f242: 2002 movs r0, #2 800f244: f002 fa84 bl 8011750 800f248: 4603 mov r3, r0 800f24a: fbb4 f3f3 udiv r3, r4, r3 * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES ); 800f24e: 005b lsls r3, r3, #1 wait_loop_index = ((SystemCoreClock 800f250: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 800f252: e002 b.n 800f25a { wait_loop_index--; 800f254: 68fb ldr r3, [r7, #12] 800f256: 3b01 subs r3, #1 800f258: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 800f25a: 68fb ldr r3, [r7, #12] 800f25c: 2b00 cmp r3, #0 800f25e: d1f9 bne.n 800f254 } /* 3. Resets ADC calibration registers */ SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL); 800f260: 687b ldr r3, [r7, #4] 800f262: 681b ldr r3, [r3, #0] 800f264: 689a ldr r2, [r3, #8] 800f266: 687b ldr r3, [r7, #4] 800f268: 681b ldr r3, [r3, #0] 800f26a: f042 0208 orr.w r2, r2, #8 800f26e: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 800f270: f7ff fb34 bl 800e8dc 800f274: 6138 str r0, [r7, #16] /* Wait for calibration reset completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 800f276: e01b b.n 800f2b0 { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 800f278: f7ff fb30 bl 800e8dc 800f27c: 4602 mov r2, r0 800f27e: 693b ldr r3, [r7, #16] 800f280: 1ad3 subs r3, r2, r3 800f282: 2b0a cmp r3, #10 800f284: d914 bls.n 800f2b0 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 800f286: 687b ldr r3, [r7, #4] 800f288: 681b ldr r3, [r3, #0] 800f28a: 689b ldr r3, [r3, #8] 800f28c: f003 0308 and.w r3, r3, #8 800f290: 2b00 cmp r3, #0 800f292: d00d beq.n 800f2b0 { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800f294: 687b ldr r3, [r7, #4] 800f296: 6a9b ldr r3, [r3, #40] @ 0x28 800f298: f023 0312 bic.w r3, r3, #18 800f29c: f043 0210 orr.w r2, r3, #16 800f2a0: 687b ldr r3, [r7, #4] 800f2a2: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 800f2a4: 687b ldr r3, [r7, #4] 800f2a6: 2200 movs r2, #0 800f2a8: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f2ac: 2301 movs r3, #1 800f2ae: e042 b.n 800f336 while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 800f2b0: 687b ldr r3, [r7, #4] 800f2b2: 681b ldr r3, [r3, #0] 800f2b4: 689b ldr r3, [r3, #8] 800f2b6: f003 0308 and.w r3, r3, #8 800f2ba: 2b00 cmp r3, #0 800f2bc: d1dc bne.n 800f278 } } } /* 4. Start ADC calibration */ SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL); 800f2be: 687b ldr r3, [r7, #4] 800f2c0: 681b ldr r3, [r3, #0] 800f2c2: 689a ldr r2, [r3, #8] 800f2c4: 687b ldr r3, [r7, #4] 800f2c6: 681b ldr r3, [r3, #0] 800f2c8: f042 0204 orr.w r2, r2, #4 800f2cc: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 800f2ce: f7ff fb05 bl 800e8dc 800f2d2: 6138 str r0, [r7, #16] /* Wait for calibration completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 800f2d4: e01b b.n 800f30e { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 800f2d6: f7ff fb01 bl 800e8dc 800f2da: 4602 mov r2, r0 800f2dc: 693b ldr r3, [r7, #16] 800f2de: 1ad3 subs r3, r2, r3 800f2e0: 2b0a cmp r3, #10 800f2e2: d914 bls.n 800f30e { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 800f2e4: 687b ldr r3, [r7, #4] 800f2e6: 681b ldr r3, [r3, #0] 800f2e8: 689b ldr r3, [r3, #8] 800f2ea: f003 0304 and.w r3, r3, #4 800f2ee: 2b00 cmp r3, #0 800f2f0: d00d beq.n 800f30e { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800f2f2: 687b ldr r3, [r7, #4] 800f2f4: 6a9b ldr r3, [r3, #40] @ 0x28 800f2f6: f023 0312 bic.w r3, r3, #18 800f2fa: f043 0210 orr.w r2, r3, #16 800f2fe: 687b ldr r3, [r7, #4] 800f300: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 800f302: 687b ldr r3, [r7, #4] 800f304: 2200 movs r2, #0 800f306: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f30a: 2301 movs r3, #1 800f30c: e013 b.n 800f336 while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 800f30e: 687b ldr r3, [r7, #4] 800f310: 681b ldr r3, [r3, #0] 800f312: 689b ldr r3, [r3, #8] 800f314: f003 0304 and.w r3, r3, #4 800f318: 2b00 cmp r3, #0 800f31a: d1dc bne.n 800f2d6 } } } /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800f31c: 687b ldr r3, [r7, #4] 800f31e: 6a9b ldr r3, [r3, #40] @ 0x28 800f320: f023 0303 bic.w r3, r3, #3 800f324: f043 0201 orr.w r2, r3, #1 800f328: 687b ldr r3, [r7, #4] 800f32a: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 800f32c: 687b ldr r3, [r7, #4] 800f32e: 2200 movs r2, #0 800f330: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800f334: 7dfb ldrb r3, [r7, #23] } 800f336: 4618 mov r0, r3 800f338: 371c adds r7, #28 800f33a: 46bd mov sp, r7 800f33c: bd90 pop {r4, r7, pc} 800f33e: bf00 nop 800f340: 20000078 .word 0x20000078 0800f344 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) { 800f344: b580 push {r7, lr} 800f346: b084 sub sp, #16 800f348: af00 add r7, sp, #0 800f34a: 6078 str r0, [r7, #4] uint32_t tickstart; /* Check CAN handle */ if (hcan == NULL) 800f34c: 687b ldr r3, [r7, #4] 800f34e: 2b00 cmp r3, #0 800f350: d101 bne.n 800f356 { return HAL_ERROR; 800f352: 2301 movs r3, #1 800f354: e0ed b.n 800f532 /* Init the low level hardware: CLOCK, NVIC */ hcan->MspInitCallback(hcan); } #else if (hcan->State == HAL_CAN_STATE_RESET) 800f356: 687b ldr r3, [r7, #4] 800f358: f893 3020 ldrb.w r3, [r3, #32] 800f35c: b2db uxtb r3, r3 800f35e: 2b00 cmp r3, #0 800f360: d102 bne.n 800f368 { /* Init the low level hardware: CLOCK, NVIC */ HAL_CAN_MspInit(hcan); 800f362: 6878 ldr r0, [r7, #4] 800f364: f7fa fbe8 bl 8009b38 } #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800f368: 687b ldr r3, [r7, #4] 800f36a: 681b ldr r3, [r3, #0] 800f36c: 681a ldr r2, [r3, #0] 800f36e: 687b ldr r3, [r7, #4] 800f370: 681b ldr r3, [r3, #0] 800f372: f042 0201 orr.w r2, r2, #1 800f376: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f378: f7ff fab0 bl 800e8dc 800f37c: 60f8 str r0, [r7, #12] /* Wait initialisation acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f37e: e012 b.n 800f3a6 { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f380: f7ff faac bl 800e8dc 800f384: 4602 mov r2, r0 800f386: 68fb ldr r3, [r7, #12] 800f388: 1ad3 subs r3, r2, r3 800f38a: 2b0a cmp r3, #10 800f38c: d90b bls.n 800f3a6 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f38e: 687b ldr r3, [r7, #4] 800f390: 6a5b ldr r3, [r3, #36] @ 0x24 800f392: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f396: 687b ldr r3, [r7, #4] 800f398: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f39a: 687b ldr r3, [r7, #4] 800f39c: 2205 movs r2, #5 800f39e: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f3a2: 2301 movs r3, #1 800f3a4: e0c5 b.n 800f532 while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f3a6: 687b ldr r3, [r7, #4] 800f3a8: 681b ldr r3, [r3, #0] 800f3aa: 685b ldr r3, [r3, #4] 800f3ac: f003 0301 and.w r3, r3, #1 800f3b0: 2b00 cmp r3, #0 800f3b2: d0e5 beq.n 800f380 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 800f3b4: 687b ldr r3, [r7, #4] 800f3b6: 681b ldr r3, [r3, #0] 800f3b8: 681a ldr r2, [r3, #0] 800f3ba: 687b ldr r3, [r7, #4] 800f3bc: 681b ldr r3, [r3, #0] 800f3be: f022 0202 bic.w r2, r2, #2 800f3c2: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f3c4: f7ff fa8a bl 800e8dc 800f3c8: 60f8 str r0, [r7, #12] /* Check Sleep mode leave acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 800f3ca: e012 b.n 800f3f2 { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f3cc: f7ff fa86 bl 800e8dc 800f3d0: 4602 mov r2, r0 800f3d2: 68fb ldr r3, [r7, #12] 800f3d4: 1ad3 subs r3, r2, r3 800f3d6: 2b0a cmp r3, #10 800f3d8: d90b bls.n 800f3f2 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f3da: 687b ldr r3, [r7, #4] 800f3dc: 6a5b ldr r3, [r3, #36] @ 0x24 800f3de: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f3e2: 687b ldr r3, [r7, #4] 800f3e4: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f3e6: 687b ldr r3, [r7, #4] 800f3e8: 2205 movs r2, #5 800f3ea: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f3ee: 2301 movs r3, #1 800f3f0: e09f b.n 800f532 while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 800f3f2: 687b ldr r3, [r7, #4] 800f3f4: 681b ldr r3, [r3, #0] 800f3f6: 685b ldr r3, [r3, #4] 800f3f8: f003 0302 and.w r3, r3, #2 800f3fc: 2b00 cmp r3, #0 800f3fe: d1e5 bne.n 800f3cc } } /* Set the time triggered communication mode */ if (hcan->Init.TimeTriggeredMode == ENABLE) 800f400: 687b ldr r3, [r7, #4] 800f402: 7e1b ldrb r3, [r3, #24] 800f404: 2b01 cmp r3, #1 800f406: d108 bne.n 800f41a { SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 800f408: 687b ldr r3, [r7, #4] 800f40a: 681b ldr r3, [r3, #0] 800f40c: 681a ldr r2, [r3, #0] 800f40e: 687b ldr r3, [r7, #4] 800f410: 681b ldr r3, [r3, #0] 800f412: f042 0280 orr.w r2, r2, #128 @ 0x80 800f416: 601a str r2, [r3, #0] 800f418: e007 b.n 800f42a } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 800f41a: 687b ldr r3, [r7, #4] 800f41c: 681b ldr r3, [r3, #0] 800f41e: 681a ldr r2, [r3, #0] 800f420: 687b ldr r3, [r7, #4] 800f422: 681b ldr r3, [r3, #0] 800f424: f022 0280 bic.w r2, r2, #128 @ 0x80 800f428: 601a str r2, [r3, #0] } /* Set the automatic bus-off management */ if (hcan->Init.AutoBusOff == ENABLE) 800f42a: 687b ldr r3, [r7, #4] 800f42c: 7e5b ldrb r3, [r3, #25] 800f42e: 2b01 cmp r3, #1 800f430: d108 bne.n 800f444 { SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 800f432: 687b ldr r3, [r7, #4] 800f434: 681b ldr r3, [r3, #0] 800f436: 681a ldr r2, [r3, #0] 800f438: 687b ldr r3, [r7, #4] 800f43a: 681b ldr r3, [r3, #0] 800f43c: f042 0240 orr.w r2, r2, #64 @ 0x40 800f440: 601a str r2, [r3, #0] 800f442: e007 b.n 800f454 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 800f444: 687b ldr r3, [r7, #4] 800f446: 681b ldr r3, [r3, #0] 800f448: 681a ldr r2, [r3, #0] 800f44a: 687b ldr r3, [r7, #4] 800f44c: 681b ldr r3, [r3, #0] 800f44e: f022 0240 bic.w r2, r2, #64 @ 0x40 800f452: 601a str r2, [r3, #0] } /* Set the automatic wake-up mode */ if (hcan->Init.AutoWakeUp == ENABLE) 800f454: 687b ldr r3, [r7, #4] 800f456: 7e9b ldrb r3, [r3, #26] 800f458: 2b01 cmp r3, #1 800f45a: d108 bne.n 800f46e { SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 800f45c: 687b ldr r3, [r7, #4] 800f45e: 681b ldr r3, [r3, #0] 800f460: 681a ldr r2, [r3, #0] 800f462: 687b ldr r3, [r7, #4] 800f464: 681b ldr r3, [r3, #0] 800f466: f042 0220 orr.w r2, r2, #32 800f46a: 601a str r2, [r3, #0] 800f46c: e007 b.n 800f47e } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 800f46e: 687b ldr r3, [r7, #4] 800f470: 681b ldr r3, [r3, #0] 800f472: 681a ldr r2, [r3, #0] 800f474: 687b ldr r3, [r7, #4] 800f476: 681b ldr r3, [r3, #0] 800f478: f022 0220 bic.w r2, r2, #32 800f47c: 601a str r2, [r3, #0] } /* Set the automatic retransmission */ if (hcan->Init.AutoRetransmission == ENABLE) 800f47e: 687b ldr r3, [r7, #4] 800f480: 7edb ldrb r3, [r3, #27] 800f482: 2b01 cmp r3, #1 800f484: d108 bne.n 800f498 { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); 800f486: 687b ldr r3, [r7, #4] 800f488: 681b ldr r3, [r3, #0] 800f48a: 681a ldr r2, [r3, #0] 800f48c: 687b ldr r3, [r7, #4] 800f48e: 681b ldr r3, [r3, #0] 800f490: f022 0210 bic.w r2, r2, #16 800f494: 601a str r2, [r3, #0] 800f496: e007 b.n 800f4a8 } else { SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); 800f498: 687b ldr r3, [r7, #4] 800f49a: 681b ldr r3, [r3, #0] 800f49c: 681a ldr r2, [r3, #0] 800f49e: 687b ldr r3, [r7, #4] 800f4a0: 681b ldr r3, [r3, #0] 800f4a2: f042 0210 orr.w r2, r2, #16 800f4a6: 601a str r2, [r3, #0] } /* Set the receive FIFO locked mode */ if (hcan->Init.ReceiveFifoLocked == ENABLE) 800f4a8: 687b ldr r3, [r7, #4] 800f4aa: 7f1b ldrb r3, [r3, #28] 800f4ac: 2b01 cmp r3, #1 800f4ae: d108 bne.n 800f4c2 { SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 800f4b0: 687b ldr r3, [r7, #4] 800f4b2: 681b ldr r3, [r3, #0] 800f4b4: 681a ldr r2, [r3, #0] 800f4b6: 687b ldr r3, [r7, #4] 800f4b8: 681b ldr r3, [r3, #0] 800f4ba: f042 0208 orr.w r2, r2, #8 800f4be: 601a str r2, [r3, #0] 800f4c0: e007 b.n 800f4d2 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 800f4c2: 687b ldr r3, [r7, #4] 800f4c4: 681b ldr r3, [r3, #0] 800f4c6: 681a ldr r2, [r3, #0] 800f4c8: 687b ldr r3, [r7, #4] 800f4ca: 681b ldr r3, [r3, #0] 800f4cc: f022 0208 bic.w r2, r2, #8 800f4d0: 601a str r2, [r3, #0] } /* Set the transmit FIFO priority */ if (hcan->Init.TransmitFifoPriority == ENABLE) 800f4d2: 687b ldr r3, [r7, #4] 800f4d4: 7f5b ldrb r3, [r3, #29] 800f4d6: 2b01 cmp r3, #1 800f4d8: d108 bne.n 800f4ec { SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 800f4da: 687b ldr r3, [r7, #4] 800f4dc: 681b ldr r3, [r3, #0] 800f4de: 681a ldr r2, [r3, #0] 800f4e0: 687b ldr r3, [r7, #4] 800f4e2: 681b ldr r3, [r3, #0] 800f4e4: f042 0204 orr.w r2, r2, #4 800f4e8: 601a str r2, [r3, #0] 800f4ea: e007 b.n 800f4fc } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 800f4ec: 687b ldr r3, [r7, #4] 800f4ee: 681b ldr r3, [r3, #0] 800f4f0: 681a ldr r2, [r3, #0] 800f4f2: 687b ldr r3, [r7, #4] 800f4f4: 681b ldr r3, [r3, #0] 800f4f6: f022 0204 bic.w r2, r2, #4 800f4fa: 601a str r2, [r3, #0] } /* Set the bit timing register */ WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | 800f4fc: 687b ldr r3, [r7, #4] 800f4fe: 689a ldr r2, [r3, #8] 800f500: 687b ldr r3, [r7, #4] 800f502: 68db ldr r3, [r3, #12] 800f504: 431a orrs r2, r3 800f506: 687b ldr r3, [r7, #4] 800f508: 691b ldr r3, [r3, #16] 800f50a: 431a orrs r2, r3 800f50c: 687b ldr r3, [r7, #4] 800f50e: 695b ldr r3, [r3, #20] 800f510: ea42 0103 orr.w r1, r2, r3 800f514: 687b ldr r3, [r7, #4] 800f516: 685b ldr r3, [r3, #4] 800f518: 1e5a subs r2, r3, #1 800f51a: 687b ldr r3, [r7, #4] 800f51c: 681b ldr r3, [r3, #0] 800f51e: 430a orrs r2, r1 800f520: 61da str r2, [r3, #28] hcan->Init.TimeSeg1 | hcan->Init.TimeSeg2 | (hcan->Init.Prescaler - 1U))); /* Initialize the error code */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 800f522: 687b ldr r3, [r7, #4] 800f524: 2200 movs r2, #0 800f526: 625a str r2, [r3, #36] @ 0x24 /* Initialize the CAN state */ hcan->State = HAL_CAN_STATE_READY; 800f528: 687b ldr r3, [r7, #4] 800f52a: 2201 movs r2, #1 800f52c: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 800f530: 2300 movs r3, #0 } 800f532: 4618 mov r0, r3 800f534: 3710 adds r7, #16 800f536: 46bd mov sp, r7 800f538: bd80 pop {r7, pc} ... 0800f53c : * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that * contains the filter configuration information. * @retval None */ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig) { 800f53c: b480 push {r7} 800f53e: b087 sub sp, #28 800f540: af00 add r7, sp, #0 800f542: 6078 str r0, [r7, #4] 800f544: 6039 str r1, [r7, #0] uint32_t filternbrbitpos; CAN_TypeDef *can_ip = hcan->Instance; 800f546: 687b ldr r3, [r7, #4] 800f548: 681b ldr r3, [r3, #0] 800f54a: 617b str r3, [r7, #20] HAL_CAN_StateTypeDef state = hcan->State; 800f54c: 687b ldr r3, [r7, #4] 800f54e: f893 3020 ldrb.w r3, [r3, #32] 800f552: 74fb strb r3, [r7, #19] if ((state == HAL_CAN_STATE_READY) || 800f554: 7cfb ldrb r3, [r7, #19] 800f556: 2b01 cmp r3, #1 800f558: d003 beq.n 800f562 800f55a: 7cfb ldrb r3, [r7, #19] 800f55c: 2b02 cmp r3, #2 800f55e: f040 80be bne.w 800f6de assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); #if defined(CAN2) /* CAN1 and CAN2 are dual instances with 28 common filters banks */ /* Select master instance to access the filter banks */ can_ip = CAN1; 800f562: 4b65 ldr r3, [pc, #404] @ (800f6f8 ) 800f564: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); #endif /* CAN3 */ /* Initialisation mode for the filter */ SET_BIT(can_ip->FMR, CAN_FMR_FINIT); 800f566: 697b ldr r3, [r7, #20] 800f568: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 800f56c: f043 0201 orr.w r2, r3, #1 800f570: 697b ldr r3, [r7, #20] 800f572: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #if defined(CAN2) /* Select the start filter number of CAN2 slave instance */ CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); 800f576: 697b ldr r3, [r7, #20] 800f578: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 800f57c: f423 527c bic.w r2, r3, #16128 @ 0x3f00 800f580: 697b ldr r3, [r7, #20] 800f582: f8c3 2200 str.w r2, [r3, #512] @ 0x200 SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); 800f586: 697b ldr r3, [r7, #20] 800f588: f8d3 2200 ldr.w r2, [r3, #512] @ 0x200 800f58c: 683b ldr r3, [r7, #0] 800f58e: 6a5b ldr r3, [r3, #36] @ 0x24 800f590: 021b lsls r3, r3, #8 800f592: 431a orrs r2, r3 800f594: 697b ldr r3, [r7, #20] 800f596: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #endif /* CAN3 */ /* Convert filter number into bit position */ filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); 800f59a: 683b ldr r3, [r7, #0] 800f59c: 695b ldr r3, [r3, #20] 800f59e: f003 031f and.w r3, r3, #31 800f5a2: 2201 movs r2, #1 800f5a4: fa02 f303 lsl.w r3, r2, r3 800f5a8: 60fb str r3, [r7, #12] /* Filter Deactivation */ CLEAR_BIT(can_ip->FA1R, filternbrbitpos); 800f5aa: 697b ldr r3, [r7, #20] 800f5ac: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 800f5b0: 68fb ldr r3, [r7, #12] 800f5b2: 43db mvns r3, r3 800f5b4: 401a ands r2, r3 800f5b6: 697b ldr r3, [r7, #20] 800f5b8: f8c3 221c str.w r2, [r3, #540] @ 0x21c /* Filter Scale */ if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) 800f5bc: 683b ldr r3, [r7, #0] 800f5be: 69db ldr r3, [r3, #28] 800f5c0: 2b00 cmp r3, #0 800f5c2: d123 bne.n 800f60c { /* 16-bit scale for the filter */ CLEAR_BIT(can_ip->FS1R, filternbrbitpos); 800f5c4: 697b ldr r3, [r7, #20] 800f5c6: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 800f5ca: 68fb ldr r3, [r7, #12] 800f5cc: 43db mvns r3, r3 800f5ce: 401a ands r2, r3 800f5d0: 697b ldr r3, [r7, #20] 800f5d2: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* First 16-bit identifier and First 16-bit mask */ /* Or First 16-bit identifier and Second 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 800f5d6: 683b ldr r3, [r7, #0] 800f5d8: 68db ldr r3, [r3, #12] 800f5da: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 800f5dc: 683b ldr r3, [r7, #0] 800f5de: 685b ldr r3, [r3, #4] 800f5e0: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f5e2: 683a ldr r2, [r7, #0] 800f5e4: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 800f5e6: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f5e8: 697b ldr r3, [r7, #20] 800f5ea: 3248 adds r2, #72 @ 0x48 800f5ec: f843 1032 str.w r1, [r3, r2, lsl #3] /* Second 16-bit identifier and Second 16-bit mask */ /* Or Third 16-bit identifier and Fourth 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f5f0: 683b ldr r3, [r7, #0] 800f5f2: 689b ldr r3, [r3, #8] 800f5f4: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); 800f5f6: 683b ldr r3, [r7, #0] 800f5f8: 681b ldr r3, [r3, #0] 800f5fa: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f5fc: 683b ldr r3, [r7, #0] 800f5fe: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f600: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f602: 6979 ldr r1, [r7, #20] 800f604: 3348 adds r3, #72 @ 0x48 800f606: 00db lsls r3, r3, #3 800f608: 440b add r3, r1 800f60a: 605a str r2, [r3, #4] } if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) 800f60c: 683b ldr r3, [r7, #0] 800f60e: 69db ldr r3, [r3, #28] 800f610: 2b01 cmp r3, #1 800f612: d122 bne.n 800f65a { /* 32-bit scale for the filter */ SET_BIT(can_ip->FS1R, filternbrbitpos); 800f614: 697b ldr r3, [r7, #20] 800f616: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 800f61a: 68fb ldr r3, [r7, #12] 800f61c: 431a orrs r2, r3 800f61e: 697b ldr r3, [r7, #20] 800f620: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* 32-bit identifier or First 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 800f624: 683b ldr r3, [r7, #0] 800f626: 681b ldr r3, [r3, #0] 800f628: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 800f62a: 683b ldr r3, [r7, #0] 800f62c: 685b ldr r3, [r3, #4] 800f62e: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f630: 683a ldr r2, [r7, #0] 800f632: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 800f634: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f636: 697b ldr r3, [r7, #20] 800f638: 3248 adds r2, #72 @ 0x48 800f63a: f843 1032 str.w r1, [r3, r2, lsl #3] /* 32-bit mask or Second 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f63e: 683b ldr r3, [r7, #0] 800f640: 689b ldr r3, [r3, #8] 800f642: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); 800f644: 683b ldr r3, [r7, #0] 800f646: 68db ldr r3, [r3, #12] 800f648: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f64a: 683b ldr r3, [r7, #0] 800f64c: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f64e: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f650: 6979 ldr r1, [r7, #20] 800f652: 3348 adds r3, #72 @ 0x48 800f654: 00db lsls r3, r3, #3 800f656: 440b add r3, r1 800f658: 605a str r2, [r3, #4] } /* Filter Mode */ if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) 800f65a: 683b ldr r3, [r7, #0] 800f65c: 699b ldr r3, [r3, #24] 800f65e: 2b00 cmp r3, #0 800f660: d109 bne.n 800f676 { /* Id/Mask mode for the filter*/ CLEAR_BIT(can_ip->FM1R, filternbrbitpos); 800f662: 697b ldr r3, [r7, #20] 800f664: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800f668: 68fb ldr r3, [r7, #12] 800f66a: 43db mvns r3, r3 800f66c: 401a ands r2, r3 800f66e: 697b ldr r3, [r7, #20] 800f670: f8c3 2204 str.w r2, [r3, #516] @ 0x204 800f674: e007 b.n 800f686 } else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ { /* Identifier list mode for the filter*/ SET_BIT(can_ip->FM1R, filternbrbitpos); 800f676: 697b ldr r3, [r7, #20] 800f678: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800f67c: 68fb ldr r3, [r7, #12] 800f67e: 431a orrs r2, r3 800f680: 697b ldr r3, [r7, #20] 800f682: f8c3 2204 str.w r2, [r3, #516] @ 0x204 } /* Filter FIFO assignment */ if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) 800f686: 683b ldr r3, [r7, #0] 800f688: 691b ldr r3, [r3, #16] 800f68a: 2b00 cmp r3, #0 800f68c: d109 bne.n 800f6a2 { /* FIFO 0 assignation for the filter */ CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); 800f68e: 697b ldr r3, [r7, #20] 800f690: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 800f694: 68fb ldr r3, [r7, #12] 800f696: 43db mvns r3, r3 800f698: 401a ands r2, r3 800f69a: 697b ldr r3, [r7, #20] 800f69c: f8c3 2214 str.w r2, [r3, #532] @ 0x214 800f6a0: e007 b.n 800f6b2 } else { /* FIFO 1 assignation for the filter */ SET_BIT(can_ip->FFA1R, filternbrbitpos); 800f6a2: 697b ldr r3, [r7, #20] 800f6a4: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 800f6a8: 68fb ldr r3, [r7, #12] 800f6aa: 431a orrs r2, r3 800f6ac: 697b ldr r3, [r7, #20] 800f6ae: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } /* Filter activation */ if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) 800f6b2: 683b ldr r3, [r7, #0] 800f6b4: 6a1b ldr r3, [r3, #32] 800f6b6: 2b01 cmp r3, #1 800f6b8: d107 bne.n 800f6ca { SET_BIT(can_ip->FA1R, filternbrbitpos); 800f6ba: 697b ldr r3, [r7, #20] 800f6bc: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 800f6c0: 68fb ldr r3, [r7, #12] 800f6c2: 431a orrs r2, r3 800f6c4: 697b ldr r3, [r7, #20] 800f6c6: f8c3 221c str.w r2, [r3, #540] @ 0x21c } /* Leave the initialisation mode for the filter */ CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); 800f6ca: 697b ldr r3, [r7, #20] 800f6cc: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 800f6d0: f023 0201 bic.w r2, r3, #1 800f6d4: 697b ldr r3, [r7, #20] 800f6d6: f8c3 2200 str.w r2, [r3, #512] @ 0x200 /* Return function status */ return HAL_OK; 800f6da: 2300 movs r3, #0 800f6dc: e006 b.n 800f6ec } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800f6de: 687b ldr r3, [r7, #4] 800f6e0: 6a5b ldr r3, [r3, #36] @ 0x24 800f6e2: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800f6e6: 687b ldr r3, [r7, #4] 800f6e8: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f6ea: 2301 movs r3, #1 } } 800f6ec: 4618 mov r0, r3 800f6ee: 371c adds r7, #28 800f6f0: 46bd mov sp, r7 800f6f2: bc80 pop {r7} 800f6f4: 4770 bx lr 800f6f6: bf00 nop 800f6f8: 40006400 .word 0x40006400 0800f6fc : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) { 800f6fc: b580 push {r7, lr} 800f6fe: b084 sub sp, #16 800f700: af00 add r7, sp, #0 800f702: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_READY) 800f704: 687b ldr r3, [r7, #4] 800f706: f893 3020 ldrb.w r3, [r3, #32] 800f70a: b2db uxtb r3, r3 800f70c: 2b01 cmp r3, #1 800f70e: d12e bne.n 800f76e { /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_LISTENING; 800f710: 687b ldr r3, [r7, #4] 800f712: 2202 movs r2, #2 800f714: f883 2020 strb.w r2, [r3, #32] /* Request leave initialisation */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800f718: 687b ldr r3, [r7, #4] 800f71a: 681b ldr r3, [r3, #0] 800f71c: 681a ldr r2, [r3, #0] 800f71e: 687b ldr r3, [r7, #4] 800f720: 681b ldr r3, [r3, #0] 800f722: f022 0201 bic.w r2, r2, #1 800f726: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f728: f7ff f8d8 bl 800e8dc 800f72c: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 800f72e: e012 b.n 800f756 { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f730: f7ff f8d4 bl 800e8dc 800f734: 4602 mov r2, r0 800f736: 68fb ldr r3, [r7, #12] 800f738: 1ad3 subs r3, r2, r3 800f73a: 2b0a cmp r3, #10 800f73c: d90b bls.n 800f756 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f73e: 687b ldr r3, [r7, #4] 800f740: 6a5b ldr r3, [r3, #36] @ 0x24 800f742: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f746: 687b ldr r3, [r7, #4] 800f748: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f74a: 687b ldr r3, [r7, #4] 800f74c: 2205 movs r2, #5 800f74e: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f752: 2301 movs r3, #1 800f754: e012 b.n 800f77c while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 800f756: 687b ldr r3, [r7, #4] 800f758: 681b ldr r3, [r3, #0] 800f75a: 685b ldr r3, [r3, #4] 800f75c: f003 0301 and.w r3, r3, #1 800f760: 2b00 cmp r3, #0 800f762: d1e5 bne.n 800f730 } } /* Reset the CAN ErrorCode */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 800f764: 687b ldr r3, [r7, #4] 800f766: 2200 movs r2, #0 800f768: 625a str r2, [r3, #36] @ 0x24 /* Return function status */ return HAL_OK; 800f76a: 2300 movs r3, #0 800f76c: e006 b.n 800f77c } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; 800f76e: 687b ldr r3, [r7, #4] 800f770: 6a5b ldr r3, [r3, #36] @ 0x24 800f772: f443 2200 orr.w r2, r3, #524288 @ 0x80000 800f776: 687b ldr r3, [r7, #4] 800f778: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f77a: 2301 movs r3, #1 } } 800f77c: 4618 mov r0, r3 800f77e: 3710 adds r7, #16 800f780: 46bd mov sp, r7 800f782: bd80 pop {r7, pc} 0800f784 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) { 800f784: b580 push {r7, lr} 800f786: b084 sub sp, #16 800f788: af00 add r7, sp, #0 800f78a: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_LISTENING) 800f78c: 687b ldr r3, [r7, #4] 800f78e: f893 3020 ldrb.w r3, [r3, #32] 800f792: b2db uxtb r3, r3 800f794: 2b02 cmp r3, #2 800f796: d133 bne.n 800f800 { /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800f798: 687b ldr r3, [r7, #4] 800f79a: 681b ldr r3, [r3, #0] 800f79c: 681a ldr r2, [r3, #0] 800f79e: 687b ldr r3, [r7, #4] 800f7a0: 681b ldr r3, [r3, #0] 800f7a2: f042 0201 orr.w r2, r2, #1 800f7a6: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f7a8: f7ff f898 bl 800e8dc 800f7ac: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f7ae: e012 b.n 800f7d6 { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f7b0: f7ff f894 bl 800e8dc 800f7b4: 4602 mov r2, r0 800f7b6: 68fb ldr r3, [r7, #12] 800f7b8: 1ad3 subs r3, r2, r3 800f7ba: 2b0a cmp r3, #10 800f7bc: d90b bls.n 800f7d6 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f7be: 687b ldr r3, [r7, #4] 800f7c0: 6a5b ldr r3, [r3, #36] @ 0x24 800f7c2: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f7c6: 687b ldr r3, [r7, #4] 800f7c8: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f7ca: 687b ldr r3, [r7, #4] 800f7cc: 2205 movs r2, #5 800f7ce: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f7d2: 2301 movs r3, #1 800f7d4: e01b b.n 800f80e while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f7d6: 687b ldr r3, [r7, #4] 800f7d8: 681b ldr r3, [r3, #0] 800f7da: 685b ldr r3, [r3, #4] 800f7dc: f003 0301 and.w r3, r3, #1 800f7e0: 2b00 cmp r3, #0 800f7e2: d0e5 beq.n 800f7b0 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 800f7e4: 687b ldr r3, [r7, #4] 800f7e6: 681b ldr r3, [r3, #0] 800f7e8: 681a ldr r2, [r3, #0] 800f7ea: 687b ldr r3, [r7, #4] 800f7ec: 681b ldr r3, [r3, #0] 800f7ee: f022 0202 bic.w r2, r2, #2 800f7f2: 601a str r2, [r3, #0] /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_READY; 800f7f4: 687b ldr r3, [r7, #4] 800f7f6: 2201 movs r2, #1 800f7f8: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 800f7fc: 2300 movs r3, #0 800f7fe: e006 b.n 800f80e } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; 800f800: 687b ldr r3, [r7, #4] 800f802: 6a5b ldr r3, [r3, #36] @ 0x24 800f804: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800f808: 687b ldr r3, [r7, #4] 800f80a: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f80c: 2301 movs r3, #1 } } 800f80e: 4618 mov r0, r3 800f810: 3710 adds r7, #16 800f812: 46bd mov sp, r7 800f814: bd80 pop {r7, pc} 0800f816 : * This parameter can be a value of @arg CAN_Tx_Mailboxes. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, const uint8_t aData[], uint32_t *pTxMailbox) { 800f816: b480 push {r7} 800f818: b089 sub sp, #36 @ 0x24 800f81a: af00 add r7, sp, #0 800f81c: 60f8 str r0, [r7, #12] 800f81e: 60b9 str r1, [r7, #8] 800f820: 607a str r2, [r7, #4] 800f822: 603b str r3, [r7, #0] uint32_t transmitmailbox; HAL_CAN_StateTypeDef state = hcan->State; 800f824: 68fb ldr r3, [r7, #12] 800f826: f893 3020 ldrb.w r3, [r3, #32] 800f82a: 77fb strb r3, [r7, #31] uint32_t tsr = READ_REG(hcan->Instance->TSR); 800f82c: 68fb ldr r3, [r7, #12] 800f82e: 681b ldr r3, [r3, #0] 800f830: 689b ldr r3, [r3, #8] 800f832: 61bb str r3, [r7, #24] { assert_param(IS_CAN_EXTID(pHeader->ExtId)); } assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); if ((state == HAL_CAN_STATE_READY) || 800f834: 7ffb ldrb r3, [r7, #31] 800f836: 2b01 cmp r3, #1 800f838: d003 beq.n 800f842 800f83a: 7ffb ldrb r3, [r7, #31] 800f83c: 2b02 cmp r3, #2 800f83e: f040 80ad bne.w 800f99c (state == HAL_CAN_STATE_LISTENING)) { /* Check that all the Tx mailboxes are not full */ if (((tsr & CAN_TSR_TME0) != 0U) || 800f842: 69bb ldr r3, [r7, #24] 800f844: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 800f848: 2b00 cmp r3, #0 800f84a: d10a bne.n 800f862 ((tsr & CAN_TSR_TME1) != 0U) || 800f84c: 69bb ldr r3, [r7, #24] 800f84e: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 if (((tsr & CAN_TSR_TME0) != 0U) || 800f852: 2b00 cmp r3, #0 800f854: d105 bne.n 800f862 ((tsr & CAN_TSR_TME2) != 0U)) 800f856: 69bb ldr r3, [r7, #24] 800f858: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 ((tsr & CAN_TSR_TME1) != 0U) || 800f85c: 2b00 cmp r3, #0 800f85e: f000 8095 beq.w 800f98c { /* Select an empty transmit mailbox */ transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; 800f862: 69bb ldr r3, [r7, #24] 800f864: 0e1b lsrs r3, r3, #24 800f866: f003 0303 and.w r3, r3, #3 800f86a: 617b str r3, [r7, #20] /* Store the Tx mailbox */ *pTxMailbox = (uint32_t)1 << transmitmailbox; 800f86c: 2201 movs r2, #1 800f86e: 697b ldr r3, [r7, #20] 800f870: 409a lsls r2, r3 800f872: 683b ldr r3, [r7, #0] 800f874: 601a str r2, [r3, #0] /* Set up the Id */ if (pHeader->IDE == CAN_ID_STD) 800f876: 68bb ldr r3, [r7, #8] 800f878: 689b ldr r3, [r3, #8] 800f87a: 2b00 cmp r3, #0 800f87c: d10d bne.n 800f89a { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 800f87e: 68bb ldr r3, [r7, #8] 800f880: 681b ldr r3, [r3, #0] 800f882: 055a lsls r2, r3, #21 pHeader->RTR); 800f884: 68bb ldr r3, [r7, #8] 800f886: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 800f888: 68f9 ldr r1, [r7, #12] 800f88a: 6809 ldr r1, [r1, #0] 800f88c: 431a orrs r2, r3 800f88e: 697b ldr r3, [r7, #20] 800f890: 3318 adds r3, #24 800f892: 011b lsls r3, r3, #4 800f894: 440b add r3, r1 800f896: 601a str r2, [r3, #0] 800f898: e00f b.n 800f8ba } else { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f89a: 68bb ldr r3, [r7, #8] 800f89c: 685b ldr r3, [r3, #4] 800f89e: 00da lsls r2, r3, #3 pHeader->IDE | 800f8a0: 68bb ldr r3, [r7, #8] 800f8a2: 689b ldr r3, [r3, #8] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f8a4: 431a orrs r2, r3 pHeader->RTR); 800f8a6: 68bb ldr r3, [r7, #8] 800f8a8: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f8aa: 68f9 ldr r1, [r7, #12] 800f8ac: 6809 ldr r1, [r1, #0] pHeader->IDE | 800f8ae: 431a orrs r2, r3 hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f8b0: 697b ldr r3, [r7, #20] 800f8b2: 3318 adds r3, #24 800f8b4: 011b lsls r3, r3, #4 800f8b6: 440b add r3, r1 800f8b8: 601a str r2, [r3, #0] } /* Set up the DLC */ hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); 800f8ba: 68fb ldr r3, [r7, #12] 800f8bc: 6819 ldr r1, [r3, #0] 800f8be: 68bb ldr r3, [r7, #8] 800f8c0: 691a ldr r2, [r3, #16] 800f8c2: 697b ldr r3, [r7, #20] 800f8c4: 3318 adds r3, #24 800f8c6: 011b lsls r3, r3, #4 800f8c8: 440b add r3, r1 800f8ca: 3304 adds r3, #4 800f8cc: 601a str r2, [r3, #0] /* Set up the Transmit Global Time mode */ if (pHeader->TransmitGlobalTime == ENABLE) 800f8ce: 68bb ldr r3, [r7, #8] 800f8d0: 7d1b ldrb r3, [r3, #20] 800f8d2: 2b01 cmp r3, #1 800f8d4: d111 bne.n 800f8fa { SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); 800f8d6: 68fb ldr r3, [r7, #12] 800f8d8: 681a ldr r2, [r3, #0] 800f8da: 697b ldr r3, [r7, #20] 800f8dc: 3318 adds r3, #24 800f8de: 011b lsls r3, r3, #4 800f8e0: 4413 add r3, r2 800f8e2: 3304 adds r3, #4 800f8e4: 681b ldr r3, [r3, #0] 800f8e6: 68fa ldr r2, [r7, #12] 800f8e8: 6811 ldr r1, [r2, #0] 800f8ea: f443 7280 orr.w r2, r3, #256 @ 0x100 800f8ee: 697b ldr r3, [r7, #20] 800f8f0: 3318 adds r3, #24 800f8f2: 011b lsls r3, r3, #4 800f8f4: 440b add r3, r1 800f8f6: 3304 adds r3, #4 800f8f8: 601a str r2, [r3, #0] } /* Set up the data field */ WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, 800f8fa: 687b ldr r3, [r7, #4] 800f8fc: 3307 adds r3, #7 800f8fe: 781b ldrb r3, [r3, #0] 800f900: 061a lsls r2, r3, #24 800f902: 687b ldr r3, [r7, #4] 800f904: 3306 adds r3, #6 800f906: 781b ldrb r3, [r3, #0] 800f908: 041b lsls r3, r3, #16 800f90a: 431a orrs r2, r3 800f90c: 687b ldr r3, [r7, #4] 800f90e: 3305 adds r3, #5 800f910: 781b ldrb r3, [r3, #0] 800f912: 021b lsls r3, r3, #8 800f914: 4313 orrs r3, r2 800f916: 687a ldr r2, [r7, #4] 800f918: 3204 adds r2, #4 800f91a: 7812 ldrb r2, [r2, #0] 800f91c: 4610 mov r0, r2 800f91e: 68fa ldr r2, [r7, #12] 800f920: 6811 ldr r1, [r2, #0] 800f922: ea43 0200 orr.w r2, r3, r0 800f926: 697b ldr r3, [r7, #20] 800f928: 011b lsls r3, r3, #4 800f92a: 440b add r3, r1 800f92c: f503 73c6 add.w r3, r3, #396 @ 0x18c 800f930: 601a str r2, [r3, #0] ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, 800f932: 687b ldr r3, [r7, #4] 800f934: 3303 adds r3, #3 800f936: 781b ldrb r3, [r3, #0] 800f938: 061a lsls r2, r3, #24 800f93a: 687b ldr r3, [r7, #4] 800f93c: 3302 adds r3, #2 800f93e: 781b ldrb r3, [r3, #0] 800f940: 041b lsls r3, r3, #16 800f942: 431a orrs r2, r3 800f944: 687b ldr r3, [r7, #4] 800f946: 3301 adds r3, #1 800f948: 781b ldrb r3, [r3, #0] 800f94a: 021b lsls r3, r3, #8 800f94c: 4313 orrs r3, r2 800f94e: 687a ldr r2, [r7, #4] 800f950: 7812 ldrb r2, [r2, #0] 800f952: 4610 mov r0, r2 800f954: 68fa ldr r2, [r7, #12] 800f956: 6811 ldr r1, [r2, #0] 800f958: ea43 0200 orr.w r2, r3, r0 800f95c: 697b ldr r3, [r7, #20] 800f95e: 011b lsls r3, r3, #4 800f960: 440b add r3, r1 800f962: f503 73c4 add.w r3, r3, #392 @ 0x188 800f966: 601a str r2, [r3, #0] ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); /* Request transmission */ SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); 800f968: 68fb ldr r3, [r7, #12] 800f96a: 681a ldr r2, [r3, #0] 800f96c: 697b ldr r3, [r7, #20] 800f96e: 3318 adds r3, #24 800f970: 011b lsls r3, r3, #4 800f972: 4413 add r3, r2 800f974: 681b ldr r3, [r3, #0] 800f976: 68fa ldr r2, [r7, #12] 800f978: 6811 ldr r1, [r2, #0] 800f97a: f043 0201 orr.w r2, r3, #1 800f97e: 697b ldr r3, [r7, #20] 800f980: 3318 adds r3, #24 800f982: 011b lsls r3, r3, #4 800f984: 440b add r3, r1 800f986: 601a str r2, [r3, #0] /* Return function status */ return HAL_OK; 800f988: 2300 movs r3, #0 800f98a: e00e b.n 800f9aa } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 800f98c: 68fb ldr r3, [r7, #12] 800f98e: 6a5b ldr r3, [r3, #36] @ 0x24 800f990: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800f994: 68fb ldr r3, [r7, #12] 800f996: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f998: 2301 movs r3, #1 800f99a: e006 b.n 800f9aa } } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800f99c: 68fb ldr r3, [r7, #12] 800f99e: 6a5b ldr r3, [r3, #36] @ 0x24 800f9a0: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800f9a4: 68fb ldr r3, [r7, #12] 800f9a6: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f9a8: 2301 movs r3, #1 } } 800f9aa: 4618 mov r0, r3 800f9ac: 3724 adds r7, #36 @ 0x24 800f9ae: 46bd mov sp, r7 800f9b0: bc80 pop {r7} 800f9b2: 4770 bx lr 0800f9b4 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval Number of free Tx Mailboxes. */ uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan) { 800f9b4: b480 push {r7} 800f9b6: b085 sub sp, #20 800f9b8: af00 add r7, sp, #0 800f9ba: 6078 str r0, [r7, #4] uint32_t freelevel = 0U; 800f9bc: 2300 movs r3, #0 800f9be: 60fb str r3, [r7, #12] HAL_CAN_StateTypeDef state = hcan->State; 800f9c0: 687b ldr r3, [r7, #4] 800f9c2: f893 3020 ldrb.w r3, [r3, #32] 800f9c6: 72fb strb r3, [r7, #11] if ((state == HAL_CAN_STATE_READY) || 800f9c8: 7afb ldrb r3, [r7, #11] 800f9ca: 2b01 cmp r3, #1 800f9cc: d002 beq.n 800f9d4 800f9ce: 7afb ldrb r3, [r7, #11] 800f9d0: 2b02 cmp r3, #2 800f9d2: d11d bne.n 800fa10 (state == HAL_CAN_STATE_LISTENING)) { /* Check Tx Mailbox 0 status */ if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) 800f9d4: 687b ldr r3, [r7, #4] 800f9d6: 681b ldr r3, [r3, #0] 800f9d8: 689b ldr r3, [r3, #8] 800f9da: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 800f9de: 2b00 cmp r3, #0 800f9e0: d002 beq.n 800f9e8 { freelevel++; 800f9e2: 68fb ldr r3, [r7, #12] 800f9e4: 3301 adds r3, #1 800f9e6: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 1 status */ if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) 800f9e8: 687b ldr r3, [r7, #4] 800f9ea: 681b ldr r3, [r3, #0] 800f9ec: 689b ldr r3, [r3, #8] 800f9ee: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 800f9f2: 2b00 cmp r3, #0 800f9f4: d002 beq.n 800f9fc { freelevel++; 800f9f6: 68fb ldr r3, [r7, #12] 800f9f8: 3301 adds r3, #1 800f9fa: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 2 status */ if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) 800f9fc: 687b ldr r3, [r7, #4] 800f9fe: 681b ldr r3, [r3, #0] 800fa00: 689b ldr r3, [r3, #8] 800fa02: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800fa06: 2b00 cmp r3, #0 800fa08: d002 beq.n 800fa10 { freelevel++; 800fa0a: 68fb ldr r3, [r7, #12] 800fa0c: 3301 adds r3, #1 800fa0e: 60fb str r3, [r7, #12] } } /* Return Tx Mailboxes free level */ return freelevel; 800fa10: 68fb ldr r3, [r7, #12] } 800fa12: 4618 mov r0, r3 800fa14: 3714 adds r7, #20 800fa16: 46bd mov sp, r7 800fa18: bc80 pop {r7} 800fa1a: 4770 bx lr 0800fa1c : * @param aData array where the payload of the Rx frame will be stored. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) { 800fa1c: b480 push {r7} 800fa1e: b087 sub sp, #28 800fa20: af00 add r7, sp, #0 800fa22: 60f8 str r0, [r7, #12] 800fa24: 60b9 str r1, [r7, #8] 800fa26: 607a str r2, [r7, #4] 800fa28: 603b str r3, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 800fa2a: 68fb ldr r3, [r7, #12] 800fa2c: f893 3020 ldrb.w r3, [r3, #32] 800fa30: 75fb strb r3, [r7, #23] assert_param(IS_CAN_RX_FIFO(RxFifo)); if ((state == HAL_CAN_STATE_READY) || 800fa32: 7dfb ldrb r3, [r7, #23] 800fa34: 2b01 cmp r3, #1 800fa36: d003 beq.n 800fa40 800fa38: 7dfb ldrb r3, [r7, #23] 800fa3a: 2b02 cmp r3, #2 800fa3c: f040 8103 bne.w 800fc46 (state == HAL_CAN_STATE_LISTENING)) { /* Check the Rx FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 800fa40: 68bb ldr r3, [r7, #8] 800fa42: 2b00 cmp r3, #0 800fa44: d10e bne.n 800fa64 { /* Check that the Rx FIFO 0 is not empty */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) 800fa46: 68fb ldr r3, [r7, #12] 800fa48: 681b ldr r3, [r3, #0] 800fa4a: 68db ldr r3, [r3, #12] 800fa4c: f003 0303 and.w r3, r3, #3 800fa50: 2b00 cmp r3, #0 800fa52: d116 bne.n 800fa82 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 800fa54: 68fb ldr r3, [r7, #12] 800fa56: 6a5b ldr r3, [r3, #36] @ 0x24 800fa58: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800fa5c: 68fb ldr r3, [r7, #12] 800fa5e: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fa60: 2301 movs r3, #1 800fa62: e0f7 b.n 800fc54 } } else /* Rx element is assigned to Rx FIFO 1 */ { /* Check that the Rx FIFO 1 is not empty */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) 800fa64: 68fb ldr r3, [r7, #12] 800fa66: 681b ldr r3, [r3, #0] 800fa68: 691b ldr r3, [r3, #16] 800fa6a: f003 0303 and.w r3, r3, #3 800fa6e: 2b00 cmp r3, #0 800fa70: d107 bne.n 800fa82 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 800fa72: 68fb ldr r3, [r7, #12] 800fa74: 6a5b ldr r3, [r3, #36] @ 0x24 800fa76: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800fa7a: 68fb ldr r3, [r7, #12] 800fa7c: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fa7e: 2301 movs r3, #1 800fa80: e0e8 b.n 800fc54 } } /* Get the header */ pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; 800fa82: 68fb ldr r3, [r7, #12] 800fa84: 681a ldr r2, [r3, #0] 800fa86: 68bb ldr r3, [r7, #8] 800fa88: 331b adds r3, #27 800fa8a: 011b lsls r3, r3, #4 800fa8c: 4413 add r3, r2 800fa8e: 681b ldr r3, [r3, #0] 800fa90: f003 0204 and.w r2, r3, #4 800fa94: 687b ldr r3, [r7, #4] 800fa96: 609a str r2, [r3, #8] if (pHeader->IDE == CAN_ID_STD) 800fa98: 687b ldr r3, [r7, #4] 800fa9a: 689b ldr r3, [r3, #8] 800fa9c: 2b00 cmp r3, #0 800fa9e: d10c bne.n 800faba { pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; 800faa0: 68fb ldr r3, [r7, #12] 800faa2: 681a ldr r2, [r3, #0] 800faa4: 68bb ldr r3, [r7, #8] 800faa6: 331b adds r3, #27 800faa8: 011b lsls r3, r3, #4 800faaa: 4413 add r3, r2 800faac: 681b ldr r3, [r3, #0] 800faae: 0d5b lsrs r3, r3, #21 800fab0: f3c3 020a ubfx r2, r3, #0, #11 800fab4: 687b ldr r3, [r7, #4] 800fab6: 601a str r2, [r3, #0] 800fab8: e00b b.n 800fad2 } else { pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; 800faba: 68fb ldr r3, [r7, #12] 800fabc: 681a ldr r2, [r3, #0] 800fabe: 68bb ldr r3, [r7, #8] 800fac0: 331b adds r3, #27 800fac2: 011b lsls r3, r3, #4 800fac4: 4413 add r3, r2 800fac6: 681b ldr r3, [r3, #0] 800fac8: 08db lsrs r3, r3, #3 800faca: f023 4260 bic.w r2, r3, #3758096384 @ 0xe0000000 pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & 800face: 687b ldr r3, [r7, #4] 800fad0: 605a str r2, [r3, #4] } pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); 800fad2: 68fb ldr r3, [r7, #12] 800fad4: 681a ldr r2, [r3, #0] 800fad6: 68bb ldr r3, [r7, #8] 800fad8: 331b adds r3, #27 800fada: 011b lsls r3, r3, #4 800fadc: 4413 add r3, r2 800fade: 681b ldr r3, [r3, #0] 800fae0: f003 0202 and.w r2, r3, #2 800fae4: 687b ldr r3, [r7, #4] 800fae6: 60da str r2, [r3, #12] if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) 800fae8: 68fb ldr r3, [r7, #12] 800faea: 681a ldr r2, [r3, #0] 800faec: 68bb ldr r3, [r7, #8] 800faee: 331b adds r3, #27 800faf0: 011b lsls r3, r3, #4 800faf2: 4413 add r3, r2 800faf4: 3304 adds r3, #4 800faf6: 681b ldr r3, [r3, #0] 800faf8: f003 0308 and.w r3, r3, #8 800fafc: 2b00 cmp r3, #0 800fafe: d003 beq.n 800fb08 { /* Truncate DLC to 8 if received field is over range */ pHeader->DLC = 8U; 800fb00: 687b ldr r3, [r7, #4] 800fb02: 2208 movs r2, #8 800fb04: 611a str r2, [r3, #16] 800fb06: e00b b.n 800fb20 } else { pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; 800fb08: 68fb ldr r3, [r7, #12] 800fb0a: 681a ldr r2, [r3, #0] 800fb0c: 68bb ldr r3, [r7, #8] 800fb0e: 331b adds r3, #27 800fb10: 011b lsls r3, r3, #4 800fb12: 4413 add r3, r2 800fb14: 3304 adds r3, #4 800fb16: 681b ldr r3, [r3, #0] 800fb18: f003 020f and.w r2, r3, #15 800fb1c: 687b ldr r3, [r7, #4] 800fb1e: 611a str r2, [r3, #16] } pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; 800fb20: 68fb ldr r3, [r7, #12] 800fb22: 681a ldr r2, [r3, #0] 800fb24: 68bb ldr r3, [r7, #8] 800fb26: 331b adds r3, #27 800fb28: 011b lsls r3, r3, #4 800fb2a: 4413 add r3, r2 800fb2c: 3304 adds r3, #4 800fb2e: 681b ldr r3, [r3, #0] 800fb30: 0a1b lsrs r3, r3, #8 800fb32: b2da uxtb r2, r3 800fb34: 687b ldr r3, [r7, #4] 800fb36: 619a str r2, [r3, #24] pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; 800fb38: 68fb ldr r3, [r7, #12] 800fb3a: 681a ldr r2, [r3, #0] 800fb3c: 68bb ldr r3, [r7, #8] 800fb3e: 331b adds r3, #27 800fb40: 011b lsls r3, r3, #4 800fb42: 4413 add r3, r2 800fb44: 3304 adds r3, #4 800fb46: 681b ldr r3, [r3, #0] 800fb48: 0c1b lsrs r3, r3, #16 800fb4a: b29a uxth r2, r3 800fb4c: 687b ldr r3, [r7, #4] 800fb4e: 615a str r2, [r3, #20] /* Get the data */ aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos); 800fb50: 68fb ldr r3, [r7, #12] 800fb52: 681a ldr r2, [r3, #0] 800fb54: 68bb ldr r3, [r7, #8] 800fb56: 011b lsls r3, r3, #4 800fb58: 4413 add r3, r2 800fb5a: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fb5e: 681b ldr r3, [r3, #0] 800fb60: b2da uxtb r2, r3 800fb62: 683b ldr r3, [r7, #0] 800fb64: 701a strb r2, [r3, #0] aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos); 800fb66: 68fb ldr r3, [r7, #12] 800fb68: 681a ldr r2, [r3, #0] 800fb6a: 68bb ldr r3, [r7, #8] 800fb6c: 011b lsls r3, r3, #4 800fb6e: 4413 add r3, r2 800fb70: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fb74: 681b ldr r3, [r3, #0] 800fb76: 0a1a lsrs r2, r3, #8 800fb78: 683b ldr r3, [r7, #0] 800fb7a: 3301 adds r3, #1 800fb7c: b2d2 uxtb r2, r2 800fb7e: 701a strb r2, [r3, #0] aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos); 800fb80: 68fb ldr r3, [r7, #12] 800fb82: 681a ldr r2, [r3, #0] 800fb84: 68bb ldr r3, [r7, #8] 800fb86: 011b lsls r3, r3, #4 800fb88: 4413 add r3, r2 800fb8a: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fb8e: 681b ldr r3, [r3, #0] 800fb90: 0c1a lsrs r2, r3, #16 800fb92: 683b ldr r3, [r7, #0] 800fb94: 3302 adds r3, #2 800fb96: b2d2 uxtb r2, r2 800fb98: 701a strb r2, [r3, #0] aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos); 800fb9a: 68fb ldr r3, [r7, #12] 800fb9c: 681a ldr r2, [r3, #0] 800fb9e: 68bb ldr r3, [r7, #8] 800fba0: 011b lsls r3, r3, #4 800fba2: 4413 add r3, r2 800fba4: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fba8: 681b ldr r3, [r3, #0] 800fbaa: 0e1a lsrs r2, r3, #24 800fbac: 683b ldr r3, [r7, #0] 800fbae: 3303 adds r3, #3 800fbb0: b2d2 uxtb r2, r2 800fbb2: 701a strb r2, [r3, #0] aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos); 800fbb4: 68fb ldr r3, [r7, #12] 800fbb6: 681a ldr r2, [r3, #0] 800fbb8: 68bb ldr r3, [r7, #8] 800fbba: 011b lsls r3, r3, #4 800fbbc: 4413 add r3, r2 800fbbe: f503 73de add.w r3, r3, #444 @ 0x1bc 800fbc2: 681a ldr r2, [r3, #0] 800fbc4: 683b ldr r3, [r7, #0] 800fbc6: 3304 adds r3, #4 800fbc8: b2d2 uxtb r2, r2 800fbca: 701a strb r2, [r3, #0] aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos); 800fbcc: 68fb ldr r3, [r7, #12] 800fbce: 681a ldr r2, [r3, #0] 800fbd0: 68bb ldr r3, [r7, #8] 800fbd2: 011b lsls r3, r3, #4 800fbd4: 4413 add r3, r2 800fbd6: f503 73de add.w r3, r3, #444 @ 0x1bc 800fbda: 681b ldr r3, [r3, #0] 800fbdc: 0a1a lsrs r2, r3, #8 800fbde: 683b ldr r3, [r7, #0] 800fbe0: 3305 adds r3, #5 800fbe2: b2d2 uxtb r2, r2 800fbe4: 701a strb r2, [r3, #0] aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos); 800fbe6: 68fb ldr r3, [r7, #12] 800fbe8: 681a ldr r2, [r3, #0] 800fbea: 68bb ldr r3, [r7, #8] 800fbec: 011b lsls r3, r3, #4 800fbee: 4413 add r3, r2 800fbf0: f503 73de add.w r3, r3, #444 @ 0x1bc 800fbf4: 681b ldr r3, [r3, #0] 800fbf6: 0c1a lsrs r2, r3, #16 800fbf8: 683b ldr r3, [r7, #0] 800fbfa: 3306 adds r3, #6 800fbfc: b2d2 uxtb r2, r2 800fbfe: 701a strb r2, [r3, #0] aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos); 800fc00: 68fb ldr r3, [r7, #12] 800fc02: 681a ldr r2, [r3, #0] 800fc04: 68bb ldr r3, [r7, #8] 800fc06: 011b lsls r3, r3, #4 800fc08: 4413 add r3, r2 800fc0a: f503 73de add.w r3, r3, #444 @ 0x1bc 800fc0e: 681b ldr r3, [r3, #0] 800fc10: 0e1a lsrs r2, r3, #24 800fc12: 683b ldr r3, [r7, #0] 800fc14: 3307 adds r3, #7 800fc16: b2d2 uxtb r2, r2 800fc18: 701a strb r2, [r3, #0] /* Release the FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 800fc1a: 68bb ldr r3, [r7, #8] 800fc1c: 2b00 cmp r3, #0 800fc1e: d108 bne.n 800fc32 { /* Release RX FIFO 0 */ SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); 800fc20: 68fb ldr r3, [r7, #12] 800fc22: 681b ldr r3, [r3, #0] 800fc24: 68da ldr r2, [r3, #12] 800fc26: 68fb ldr r3, [r7, #12] 800fc28: 681b ldr r3, [r3, #0] 800fc2a: f042 0220 orr.w r2, r2, #32 800fc2e: 60da str r2, [r3, #12] 800fc30: e007 b.n 800fc42 } else /* Rx element is assigned to Rx FIFO 1 */ { /* Release RX FIFO 1 */ SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); 800fc32: 68fb ldr r3, [r7, #12] 800fc34: 681b ldr r3, [r3, #0] 800fc36: 691a ldr r2, [r3, #16] 800fc38: 68fb ldr r3, [r7, #12] 800fc3a: 681b ldr r3, [r3, #0] 800fc3c: f042 0220 orr.w r2, r2, #32 800fc40: 611a str r2, [r3, #16] } /* Return function status */ return HAL_OK; 800fc42: 2300 movs r3, #0 800fc44: e006 b.n 800fc54 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800fc46: 68fb ldr r3, [r7, #12] 800fc48: 6a5b ldr r3, [r3, #36] @ 0x24 800fc4a: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800fc4e: 68fb ldr r3, [r7, #12] 800fc50: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fc52: 2301 movs r3, #1 } } 800fc54: 4618 mov r0, r3 800fc56: 371c adds r7, #28 800fc58: 46bd mov sp, r7 800fc5a: bc80 pop {r7} 800fc5c: 4770 bx lr 0800fc5e : * @param ActiveITs indicates which interrupts will be enabled. * This parameter can be any combination of @arg CAN_Interrupts. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) { 800fc5e: b480 push {r7} 800fc60: b085 sub sp, #20 800fc62: af00 add r7, sp, #0 800fc64: 6078 str r0, [r7, #4] 800fc66: 6039 str r1, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 800fc68: 687b ldr r3, [r7, #4] 800fc6a: f893 3020 ldrb.w r3, [r3, #32] 800fc6e: 73fb strb r3, [r7, #15] /* Check function parameters */ assert_param(IS_CAN_IT(ActiveITs)); if ((state == HAL_CAN_STATE_READY) || 800fc70: 7bfb ldrb r3, [r7, #15] 800fc72: 2b01 cmp r3, #1 800fc74: d002 beq.n 800fc7c 800fc76: 7bfb ldrb r3, [r7, #15] 800fc78: 2b02 cmp r3, #2 800fc7a: d109 bne.n 800fc90 (state == HAL_CAN_STATE_LISTENING)) { /* Enable the selected interrupts */ __HAL_CAN_ENABLE_IT(hcan, ActiveITs); 800fc7c: 687b ldr r3, [r7, #4] 800fc7e: 681b ldr r3, [r3, #0] 800fc80: 6959 ldr r1, [r3, #20] 800fc82: 687b ldr r3, [r7, #4] 800fc84: 681b ldr r3, [r3, #0] 800fc86: 683a ldr r2, [r7, #0] 800fc88: 430a orrs r2, r1 800fc8a: 615a str r2, [r3, #20] /* Return function status */ return HAL_OK; 800fc8c: 2300 movs r3, #0 800fc8e: e006 b.n 800fc9e } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800fc90: 687b ldr r3, [r7, #4] 800fc92: 6a5b ldr r3, [r3, #36] @ 0x24 800fc94: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800fc98: 687b ldr r3, [r7, #4] 800fc9a: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fc9c: 2301 movs r3, #1 } } 800fc9e: 4618 mov r0, r3 800fca0: 3714 adds r7, #20 800fca2: 46bd mov sp, r7 800fca4: bc80 pop {r7} 800fca6: 4770 bx lr 0800fca8 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) { 800fca8: b580 push {r7, lr} 800fcaa: b08a sub sp, #40 @ 0x28 800fcac: af00 add r7, sp, #0 800fcae: 6078 str r0, [r7, #4] uint32_t errorcode = HAL_CAN_ERROR_NONE; 800fcb0: 2300 movs r3, #0 800fcb2: 627b str r3, [r7, #36] @ 0x24 uint32_t interrupts = READ_REG(hcan->Instance->IER); 800fcb4: 687b ldr r3, [r7, #4] 800fcb6: 681b ldr r3, [r3, #0] 800fcb8: 695b ldr r3, [r3, #20] 800fcba: 623b str r3, [r7, #32] uint32_t msrflags = READ_REG(hcan->Instance->MSR); 800fcbc: 687b ldr r3, [r7, #4] 800fcbe: 681b ldr r3, [r3, #0] 800fcc0: 685b ldr r3, [r3, #4] 800fcc2: 61fb str r3, [r7, #28] uint32_t tsrflags = READ_REG(hcan->Instance->TSR); 800fcc4: 687b ldr r3, [r7, #4] 800fcc6: 681b ldr r3, [r3, #0] 800fcc8: 689b ldr r3, [r3, #8] 800fcca: 61bb str r3, [r7, #24] uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); 800fccc: 687b ldr r3, [r7, #4] 800fcce: 681b ldr r3, [r3, #0] 800fcd0: 68db ldr r3, [r3, #12] 800fcd2: 617b str r3, [r7, #20] uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); 800fcd4: 687b ldr r3, [r7, #4] 800fcd6: 681b ldr r3, [r3, #0] 800fcd8: 691b ldr r3, [r3, #16] 800fcda: 613b str r3, [r7, #16] uint32_t esrflags = READ_REG(hcan->Instance->ESR); 800fcdc: 687b ldr r3, [r7, #4] 800fcde: 681b ldr r3, [r3, #0] 800fce0: 699b ldr r3, [r3, #24] 800fce2: 60fb str r3, [r7, #12] /* Transmit Mailbox empty interrupt management *****************************/ if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) 800fce4: 6a3b ldr r3, [r7, #32] 800fce6: f003 0301 and.w r3, r3, #1 800fcea: 2b00 cmp r3, #0 800fcec: d07c beq.n 800fde8 { /* Transmit Mailbox 0 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP0) != 0U) 800fcee: 69bb ldr r3, [r7, #24] 800fcf0: f003 0301 and.w r3, r3, #1 800fcf4: 2b00 cmp r3, #0 800fcf6: d023 beq.n 800fd40 { /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); 800fcf8: 687b ldr r3, [r7, #4] 800fcfa: 681b ldr r3, [r3, #0] 800fcfc: 2201 movs r2, #1 800fcfe: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK0) != 0U) 800fd00: 69bb ldr r3, [r7, #24] 800fd02: f003 0302 and.w r3, r3, #2 800fd06: 2b00 cmp r3, #0 800fd08: d003 beq.n 800fd12 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0CompleteCallback(hcan); 800fd0a: 6878 ldr r0, [r7, #4] 800fd0c: f000 f983 bl 8010016 800fd10: e016 b.n 800fd40 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST0) != 0U) 800fd12: 69bb ldr r3, [r7, #24] 800fd14: f003 0304 and.w r3, r3, #4 800fd18: 2b00 cmp r3, #0 800fd1a: d004 beq.n 800fd26 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST0; 800fd1c: 6a7b ldr r3, [r7, #36] @ 0x24 800fd1e: f443 6300 orr.w r3, r3, #2048 @ 0x800 800fd22: 627b str r3, [r7, #36] @ 0x24 800fd24: e00c b.n 800fd40 } else if ((tsrflags & CAN_TSR_TERR0) != 0U) 800fd26: 69bb ldr r3, [r7, #24] 800fd28: f003 0308 and.w r3, r3, #8 800fd2c: 2b00 cmp r3, #0 800fd2e: d004 beq.n 800fd3a { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR0; 800fd30: 6a7b ldr r3, [r7, #36] @ 0x24 800fd32: f443 5380 orr.w r3, r3, #4096 @ 0x1000 800fd36: 627b str r3, [r7, #36] @ 0x24 800fd38: e002 b.n 800fd40 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0AbortCallback(hcan); 800fd3a: 6878 ldr r0, [r7, #4] 800fd3c: f000 f986 bl 801004c } } } /* Transmit Mailbox 1 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP1) != 0U) 800fd40: 69bb ldr r3, [r7, #24] 800fd42: f403 7380 and.w r3, r3, #256 @ 0x100 800fd46: 2b00 cmp r3, #0 800fd48: d024 beq.n 800fd94 { /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); 800fd4a: 687b ldr r3, [r7, #4] 800fd4c: 681b ldr r3, [r3, #0] 800fd4e: f44f 7280 mov.w r2, #256 @ 0x100 800fd52: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK1) != 0U) 800fd54: 69bb ldr r3, [r7, #24] 800fd56: f403 7300 and.w r3, r3, #512 @ 0x200 800fd5a: 2b00 cmp r3, #0 800fd5c: d003 beq.n 800fd66 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1CompleteCallback(hcan); 800fd5e: 6878 ldr r0, [r7, #4] 800fd60: f000 f962 bl 8010028 800fd64: e016 b.n 800fd94 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST1) != 0U) 800fd66: 69bb ldr r3, [r7, #24] 800fd68: f403 6380 and.w r3, r3, #1024 @ 0x400 800fd6c: 2b00 cmp r3, #0 800fd6e: d004 beq.n 800fd7a { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST1; 800fd70: 6a7b ldr r3, [r7, #36] @ 0x24 800fd72: f443 5300 orr.w r3, r3, #8192 @ 0x2000 800fd76: 627b str r3, [r7, #36] @ 0x24 800fd78: e00c b.n 800fd94 } else if ((tsrflags & CAN_TSR_TERR1) != 0U) 800fd7a: 69bb ldr r3, [r7, #24] 800fd7c: f403 6300 and.w r3, r3, #2048 @ 0x800 800fd80: 2b00 cmp r3, #0 800fd82: d004 beq.n 800fd8e { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR1; 800fd84: 6a7b ldr r3, [r7, #36] @ 0x24 800fd86: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800fd8a: 627b str r3, [r7, #36] @ 0x24 800fd8c: e002 b.n 800fd94 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1AbortCallback(hcan); 800fd8e: 6878 ldr r0, [r7, #4] 800fd90: f000 f965 bl 801005e } } } /* Transmit Mailbox 2 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP2) != 0U) 800fd94: 69bb ldr r3, [r7, #24] 800fd96: f403 3380 and.w r3, r3, #65536 @ 0x10000 800fd9a: 2b00 cmp r3, #0 800fd9c: d024 beq.n 800fde8 { /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); 800fd9e: 687b ldr r3, [r7, #4] 800fda0: 681b ldr r3, [r3, #0] 800fda2: f44f 3280 mov.w r2, #65536 @ 0x10000 800fda6: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK2) != 0U) 800fda8: 69bb ldr r3, [r7, #24] 800fdaa: f403 3300 and.w r3, r3, #131072 @ 0x20000 800fdae: 2b00 cmp r3, #0 800fdb0: d003 beq.n 800fdba #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2CompleteCallback(hcan); 800fdb2: 6878 ldr r0, [r7, #4] 800fdb4: f000 f941 bl 801003a 800fdb8: e016 b.n 800fde8 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST2) != 0U) 800fdba: 69bb ldr r3, [r7, #24] 800fdbc: f403 2380 and.w r3, r3, #262144 @ 0x40000 800fdc0: 2b00 cmp r3, #0 800fdc2: d004 beq.n 800fdce { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST2; 800fdc4: 6a7b ldr r3, [r7, #36] @ 0x24 800fdc6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800fdca: 627b str r3, [r7, #36] @ 0x24 800fdcc: e00c b.n 800fde8 } else if ((tsrflags & CAN_TSR_TERR2) != 0U) 800fdce: 69bb ldr r3, [r7, #24] 800fdd0: f403 2300 and.w r3, r3, #524288 @ 0x80000 800fdd4: 2b00 cmp r3, #0 800fdd6: d004 beq.n 800fde2 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR2; 800fdd8: 6a7b ldr r3, [r7, #36] @ 0x24 800fdda: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800fdde: 627b str r3, [r7, #36] @ 0x24 800fde0: e002 b.n 800fde8 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2AbortCallback(hcan); 800fde2: 6878 ldr r0, [r7, #4] 800fde4: f000 f944 bl 8010070 } } } /* Receive FIFO 0 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) 800fde8: 6a3b ldr r3, [r7, #32] 800fdea: f003 0308 and.w r3, r3, #8 800fdee: 2b00 cmp r3, #0 800fdf0: d00c beq.n 800fe0c { if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) 800fdf2: 697b ldr r3, [r7, #20] 800fdf4: f003 0310 and.w r3, r3, #16 800fdf8: 2b00 cmp r3, #0 800fdfa: d007 beq.n 800fe0c { /* Set CAN error code to Rx Fifo 0 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV0; 800fdfc: 6a7b ldr r3, [r7, #36] @ 0x24 800fdfe: f443 7300 orr.w r3, r3, #512 @ 0x200 800fe02: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO0 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); 800fe04: 687b ldr r3, [r7, #4] 800fe06: 681b ldr r3, [r3, #0] 800fe08: 2210 movs r2, #16 800fe0a: 60da str r2, [r3, #12] } } /* Receive FIFO 0 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) 800fe0c: 6a3b ldr r3, [r7, #32] 800fe0e: f003 0304 and.w r3, r3, #4 800fe12: 2b00 cmp r3, #0 800fe14: d00b beq.n 800fe2e { if ((rf0rflags & CAN_RF0R_FULL0) != 0U) 800fe16: 697b ldr r3, [r7, #20] 800fe18: f003 0308 and.w r3, r3, #8 800fe1c: 2b00 cmp r3, #0 800fe1e: d006 beq.n 800fe2e { /* Clear FIFO 0 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); 800fe20: 687b ldr r3, [r7, #4] 800fe22: 681b ldr r3, [r3, #0] 800fe24: 2208 movs r2, #8 800fe26: 60da str r2, [r3, #12] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0FullCallback(hcan); 800fe28: 6878 ldr r0, [r7, #4] 800fe2a: f000 f92a bl 8010082 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 0 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) 800fe2e: 6a3b ldr r3, [r7, #32] 800fe30: f003 0302 and.w r3, r3, #2 800fe34: 2b00 cmp r3, #0 800fe36: d009 beq.n 800fe4c { /* Check if message is still pending */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) 800fe38: 687b ldr r3, [r7, #4] 800fe3a: 681b ldr r3, [r3, #0] 800fe3c: 68db ldr r3, [r3, #12] 800fe3e: f003 0303 and.w r3, r3, #3 800fe42: 2b00 cmp r3, #0 800fe44: d002 beq.n 800fe4c #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0MsgPendingCallback(hcan); 800fe46: 6878 ldr r0, [r7, #4] 800fe48: f7fb fda6 bl 800b998 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) 800fe4c: 6a3b ldr r3, [r7, #32] 800fe4e: f003 0340 and.w r3, r3, #64 @ 0x40 800fe52: 2b00 cmp r3, #0 800fe54: d00c beq.n 800fe70 { if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) 800fe56: 693b ldr r3, [r7, #16] 800fe58: f003 0310 and.w r3, r3, #16 800fe5c: 2b00 cmp r3, #0 800fe5e: d007 beq.n 800fe70 { /* Set CAN error code to Rx Fifo 1 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV1; 800fe60: 6a7b ldr r3, [r7, #36] @ 0x24 800fe62: f443 6380 orr.w r3, r3, #1024 @ 0x400 800fe66: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO1 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); 800fe68: 687b ldr r3, [r7, #4] 800fe6a: 681b ldr r3, [r3, #0] 800fe6c: 2210 movs r2, #16 800fe6e: 611a str r2, [r3, #16] } } /* Receive FIFO 1 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) 800fe70: 6a3b ldr r3, [r7, #32] 800fe72: f003 0320 and.w r3, r3, #32 800fe76: 2b00 cmp r3, #0 800fe78: d00b beq.n 800fe92 { if ((rf1rflags & CAN_RF1R_FULL1) != 0U) 800fe7a: 693b ldr r3, [r7, #16] 800fe7c: f003 0308 and.w r3, r3, #8 800fe80: 2b00 cmp r3, #0 800fe82: d006 beq.n 800fe92 { /* Clear FIFO 1 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); 800fe84: 687b ldr r3, [r7, #4] 800fe86: 681b ldr r3, [r3, #0] 800fe88: 2208 movs r2, #8 800fe8a: 611a str r2, [r3, #16] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1FullCallback(hcan); 800fe8c: 6878 ldr r0, [r7, #4] 800fe8e: f000 f901 bl 8010094 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) 800fe92: 6a3b ldr r3, [r7, #32] 800fe94: f003 0310 and.w r3, r3, #16 800fe98: 2b00 cmp r3, #0 800fe9a: d009 beq.n 800feb0 { /* Check if message is still pending */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) 800fe9c: 687b ldr r3, [r7, #4] 800fe9e: 681b ldr r3, [r3, #0] 800fea0: 691b ldr r3, [r3, #16] 800fea2: f003 0303 and.w r3, r3, #3 800fea6: 2b00 cmp r3, #0 800fea8: d002 beq.n 800feb0 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1MsgPendingCallback(hcan); 800feaa: 6878 ldr r0, [r7, #4] 800feac: f7fc fb2c bl 800c508 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Sleep interrupt management *********************************************/ if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) 800feb0: 6a3b ldr r3, [r7, #32] 800feb2: f403 3300 and.w r3, r3, #131072 @ 0x20000 800feb6: 2b00 cmp r3, #0 800feb8: d00b beq.n 800fed2 { if ((msrflags & CAN_MSR_SLAKI) != 0U) 800feba: 69fb ldr r3, [r7, #28] 800febc: f003 0310 and.w r3, r3, #16 800fec0: 2b00 cmp r3, #0 800fec2: d006 beq.n 800fed2 { /* Clear Sleep interrupt Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); 800fec4: 687b ldr r3, [r7, #4] 800fec6: 681b ldr r3, [r3, #0] 800fec8: 2210 movs r2, #16 800feca: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->SleepCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_SleepCallback(hcan); 800fecc: 6878 ldr r0, [r7, #4] 800fece: f000 f8ea bl 80100a6 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* WakeUp interrupt management *********************************************/ if ((interrupts & CAN_IT_WAKEUP) != 0U) 800fed2: 6a3b ldr r3, [r7, #32] 800fed4: f403 3380 and.w r3, r3, #65536 @ 0x10000 800fed8: 2b00 cmp r3, #0 800feda: d00b beq.n 800fef4 { if ((msrflags & CAN_MSR_WKUI) != 0U) 800fedc: 69fb ldr r3, [r7, #28] 800fede: f003 0308 and.w r3, r3, #8 800fee2: 2b00 cmp r3, #0 800fee4: d006 beq.n 800fef4 { /* Clear WakeUp Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); 800fee6: 687b ldr r3, [r7, #4] 800fee8: 681b ldr r3, [r3, #0] 800feea: 2208 movs r2, #8 800feec: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->WakeUpFromRxMsgCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_WakeUpFromRxMsgCallback(hcan); 800feee: 6878 ldr r0, [r7, #4] 800fef0: f000 f8e2 bl 80100b8 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Error interrupts management *********************************************/ if ((interrupts & CAN_IT_ERROR) != 0U) 800fef4: 6a3b ldr r3, [r7, #32] 800fef6: f403 4300 and.w r3, r3, #32768 @ 0x8000 800fefa: 2b00 cmp r3, #0 800fefc: d07b beq.n 800fff6 { if ((msrflags & CAN_MSR_ERRI) != 0U) 800fefe: 69fb ldr r3, [r7, #28] 800ff00: f003 0304 and.w r3, r3, #4 800ff04: 2b00 cmp r3, #0 800ff06: d072 beq.n 800ffee { /* Check Error Warning Flag */ if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 800ff08: 6a3b ldr r3, [r7, #32] 800ff0a: f403 7380 and.w r3, r3, #256 @ 0x100 800ff0e: 2b00 cmp r3, #0 800ff10: d008 beq.n 800ff24 ((esrflags & CAN_ESR_EWGF) != 0U)) 800ff12: 68fb ldr r3, [r7, #12] 800ff14: f003 0301 and.w r3, r3, #1 if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 800ff18: 2b00 cmp r3, #0 800ff1a: d003 beq.n 800ff24 { /* Set CAN error code to Error Warning */ errorcode |= HAL_CAN_ERROR_EWG; 800ff1c: 6a7b ldr r3, [r7, #36] @ 0x24 800ff1e: f043 0301 orr.w r3, r3, #1 800ff22: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Warning Flag as read-only */ } /* Check Error Passive Flag */ if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 800ff24: 6a3b ldr r3, [r7, #32] 800ff26: f403 7300 and.w r3, r3, #512 @ 0x200 800ff2a: 2b00 cmp r3, #0 800ff2c: d008 beq.n 800ff40 ((esrflags & CAN_ESR_EPVF) != 0U)) 800ff2e: 68fb ldr r3, [r7, #12] 800ff30: f003 0302 and.w r3, r3, #2 if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 800ff34: 2b00 cmp r3, #0 800ff36: d003 beq.n 800ff40 { /* Set CAN error code to Error Passive */ errorcode |= HAL_CAN_ERROR_EPV; 800ff38: 6a7b ldr r3, [r7, #36] @ 0x24 800ff3a: f043 0302 orr.w r3, r3, #2 800ff3e: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Passive Flag as read-only */ } /* Check Bus-off Flag */ if (((interrupts & CAN_IT_BUSOFF) != 0U) && 800ff40: 6a3b ldr r3, [r7, #32] 800ff42: f403 6380 and.w r3, r3, #1024 @ 0x400 800ff46: 2b00 cmp r3, #0 800ff48: d008 beq.n 800ff5c ((esrflags & CAN_ESR_BOFF) != 0U)) 800ff4a: 68fb ldr r3, [r7, #12] 800ff4c: f003 0304 and.w r3, r3, #4 if (((interrupts & CAN_IT_BUSOFF) != 0U) && 800ff50: 2b00 cmp r3, #0 800ff52: d003 beq.n 800ff5c { /* Set CAN error code to Bus-Off */ errorcode |= HAL_CAN_ERROR_BOF; 800ff54: 6a7b ldr r3, [r7, #36] @ 0x24 800ff56: f043 0304 orr.w r3, r3, #4 800ff5a: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Bus-Off as read-only */ } /* Check Last Error Code Flag */ if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 800ff5c: 6a3b ldr r3, [r7, #32] 800ff5e: f403 6300 and.w r3, r3, #2048 @ 0x800 800ff62: 2b00 cmp r3, #0 800ff64: d043 beq.n 800ffee ((esrflags & CAN_ESR_LEC) != 0U)) 800ff66: 68fb ldr r3, [r7, #12] 800ff68: f003 0370 and.w r3, r3, #112 @ 0x70 if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 800ff6c: 2b00 cmp r3, #0 800ff6e: d03e beq.n 800ffee { switch (esrflags & CAN_ESR_LEC) 800ff70: 68fb ldr r3, [r7, #12] 800ff72: f003 0370 and.w r3, r3, #112 @ 0x70 800ff76: 2b60 cmp r3, #96 @ 0x60 800ff78: d02b beq.n 800ffd2 800ff7a: 2b60 cmp r3, #96 @ 0x60 800ff7c: d82e bhi.n 800ffdc 800ff7e: 2b50 cmp r3, #80 @ 0x50 800ff80: d022 beq.n 800ffc8 800ff82: 2b50 cmp r3, #80 @ 0x50 800ff84: d82a bhi.n 800ffdc 800ff86: 2b40 cmp r3, #64 @ 0x40 800ff88: d019 beq.n 800ffbe 800ff8a: 2b40 cmp r3, #64 @ 0x40 800ff8c: d826 bhi.n 800ffdc 800ff8e: 2b30 cmp r3, #48 @ 0x30 800ff90: d010 beq.n 800ffb4 800ff92: 2b30 cmp r3, #48 @ 0x30 800ff94: d822 bhi.n 800ffdc 800ff96: 2b10 cmp r3, #16 800ff98: d002 beq.n 800ffa0 800ff9a: 2b20 cmp r3, #32 800ff9c: d005 beq.n 800ffaa case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): /* Set CAN error code to CRC error */ errorcode |= HAL_CAN_ERROR_CRC; break; default: break; 800ff9e: e01d b.n 800ffdc errorcode |= HAL_CAN_ERROR_STF; 800ffa0: 6a7b ldr r3, [r7, #36] @ 0x24 800ffa2: f043 0308 orr.w r3, r3, #8 800ffa6: 627b str r3, [r7, #36] @ 0x24 break; 800ffa8: e019 b.n 800ffde errorcode |= HAL_CAN_ERROR_FOR; 800ffaa: 6a7b ldr r3, [r7, #36] @ 0x24 800ffac: f043 0310 orr.w r3, r3, #16 800ffb0: 627b str r3, [r7, #36] @ 0x24 break; 800ffb2: e014 b.n 800ffde errorcode |= HAL_CAN_ERROR_ACK; 800ffb4: 6a7b ldr r3, [r7, #36] @ 0x24 800ffb6: f043 0320 orr.w r3, r3, #32 800ffba: 627b str r3, [r7, #36] @ 0x24 break; 800ffbc: e00f b.n 800ffde errorcode |= HAL_CAN_ERROR_BR; 800ffbe: 6a7b ldr r3, [r7, #36] @ 0x24 800ffc0: f043 0340 orr.w r3, r3, #64 @ 0x40 800ffc4: 627b str r3, [r7, #36] @ 0x24 break; 800ffc6: e00a b.n 800ffde errorcode |= HAL_CAN_ERROR_BD; 800ffc8: 6a7b ldr r3, [r7, #36] @ 0x24 800ffca: f043 0380 orr.w r3, r3, #128 @ 0x80 800ffce: 627b str r3, [r7, #36] @ 0x24 break; 800ffd0: e005 b.n 800ffde errorcode |= HAL_CAN_ERROR_CRC; 800ffd2: 6a7b ldr r3, [r7, #36] @ 0x24 800ffd4: f443 7380 orr.w r3, r3, #256 @ 0x100 800ffd8: 627b str r3, [r7, #36] @ 0x24 break; 800ffda: e000 b.n 800ffde break; 800ffdc: bf00 nop } /* Clear Last error code Flag */ CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); 800ffde: 687b ldr r3, [r7, #4] 800ffe0: 681b ldr r3, [r3, #0] 800ffe2: 699a ldr r2, [r3, #24] 800ffe4: 687b ldr r3, [r7, #4] 800ffe6: 681b ldr r3, [r3, #0] 800ffe8: f022 0270 bic.w r2, r2, #112 @ 0x70 800ffec: 619a str r2, [r3, #24] } } /* Clear ERRI Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); 800ffee: 687b ldr r3, [r7, #4] 800fff0: 681b ldr r3, [r3, #0] 800fff2: 2204 movs r2, #4 800fff4: 605a str r2, [r3, #4] } /* Call the Error call Back in case of Errors */ if (errorcode != HAL_CAN_ERROR_NONE) 800fff6: 6a7b ldr r3, [r7, #36] @ 0x24 800fff8: 2b00 cmp r3, #0 800fffa: d008 beq.n 801000e { /* Update error code in handle */ hcan->ErrorCode |= errorcode; 800fffc: 687b ldr r3, [r7, #4] 800fffe: 6a5a ldr r2, [r3, #36] @ 0x24 8010000: 6a7b ldr r3, [r7, #36] @ 0x24 8010002: 431a orrs r2, r3 8010004: 687b ldr r3, [r7, #4] 8010006: 625a str r2, [r3, #36] @ 0x24 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->ErrorCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_ErrorCallback(hcan); 8010008: 6878 ldr r0, [r7, #4] 801000a: f000 f85e bl 80100ca #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } 801000e: bf00 nop 8010010: 3728 adds r7, #40 @ 0x28 8010012: 46bd mov sp, r7 8010014: bd80 pop {r7, pc} 08010016 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) { 8010016: b480 push {r7} 8010018: b083 sub sp, #12 801001a: af00 add r7, sp, #0 801001c: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the user file */ } 801001e: bf00 nop 8010020: 370c adds r7, #12 8010022: 46bd mov sp, r7 8010024: bc80 pop {r7} 8010026: 4770 bx lr 08010028 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) { 8010028: b480 push {r7} 801002a: b083 sub sp, #12 801002c: af00 add r7, sp, #0 801002e: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the user file */ } 8010030: bf00 nop 8010032: 370c adds r7, #12 8010034: 46bd mov sp, r7 8010036: bc80 pop {r7} 8010038: 4770 bx lr 0801003a : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) { 801003a: b480 push {r7} 801003c: b083 sub sp, #12 801003e: af00 add r7, sp, #0 8010040: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the user file */ } 8010042: bf00 nop 8010044: 370c adds r7, #12 8010046: 46bd mov sp, r7 8010048: bc80 pop {r7} 801004a: 4770 bx lr 0801004c : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) { 801004c: b480 push {r7} 801004e: b083 sub sp, #12 8010050: af00 add r7, sp, #0 8010052: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0AbortCallback could be implemented in the user file */ } 8010054: bf00 nop 8010056: 370c adds r7, #12 8010058: 46bd mov sp, r7 801005a: bc80 pop {r7} 801005c: 4770 bx lr 0801005e : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) { 801005e: b480 push {r7} 8010060: b083 sub sp, #12 8010062: af00 add r7, sp, #0 8010064: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1AbortCallback could be implemented in the user file */ } 8010066: bf00 nop 8010068: 370c adds r7, #12 801006a: 46bd mov sp, r7 801006c: bc80 pop {r7} 801006e: 4770 bx lr 08010070 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) { 8010070: b480 push {r7} 8010072: b083 sub sp, #12 8010074: af00 add r7, sp, #0 8010076: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2AbortCallback could be implemented in the user file */ } 8010078: bf00 nop 801007a: 370c adds r7, #12 801007c: 46bd mov sp, r7 801007e: bc80 pop {r7} 8010080: 4770 bx lr 08010082 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) { 8010082: b480 push {r7} 8010084: b083 sub sp, #12 8010086: af00 add r7, sp, #0 8010088: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo0FullCallback could be implemented in the user file */ } 801008a: bf00 nop 801008c: 370c adds r7, #12 801008e: 46bd mov sp, r7 8010090: bc80 pop {r7} 8010092: 4770 bx lr 08010094 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) { 8010094: b480 push {r7} 8010096: b083 sub sp, #12 8010098: af00 add r7, sp, #0 801009a: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo1FullCallback could be implemented in the user file */ } 801009c: bf00 nop 801009e: 370c adds r7, #12 80100a0: 46bd mov sp, r7 80100a2: bc80 pop {r7} 80100a4: 4770 bx lr 080100a6 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) { 80100a6: b480 push {r7} 80100a8: b083 sub sp, #12 80100aa: af00 add r7, sp, #0 80100ac: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_SleepCallback could be implemented in the user file */ } 80100ae: bf00 nop 80100b0: 370c adds r7, #12 80100b2: 46bd mov sp, r7 80100b4: bc80 pop {r7} 80100b6: 4770 bx lr 080100b8 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) { 80100b8: b480 push {r7} 80100ba: b083 sub sp, #12 80100bc: af00 add r7, sp, #0 80100be: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the user file */ } 80100c0: bf00 nop 80100c2: 370c adds r7, #12 80100c4: 46bd mov sp, r7 80100c6: bc80 pop {r7} 80100c8: 4770 bx lr 080100ca : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) { 80100ca: b480 push {r7} 80100cc: b083 sub sp, #12 80100ce: af00 add r7, sp, #0 80100d0: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_ErrorCallback could be implemented in the user file */ } 80100d2: bf00 nop 80100d4: 370c adds r7, #12 80100d6: 46bd mov sp, r7 80100d8: bc80 pop {r7} 80100da: 4770 bx lr 080100dc <__NVIC_SetPriorityGrouping>: { 80100dc: b480 push {r7} 80100de: b085 sub sp, #20 80100e0: af00 add r7, sp, #0 80100e2: 6078 str r0, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80100e4: 687b ldr r3, [r7, #4] 80100e6: f003 0307 and.w r3, r3, #7 80100ea: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 80100ec: 4b0c ldr r3, [pc, #48] @ (8010120 <__NVIC_SetPriorityGrouping+0x44>) 80100ee: 68db ldr r3, [r3, #12] 80100f0: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80100f2: 68ba ldr r2, [r7, #8] 80100f4: f64f 03ff movw r3, #63743 @ 0xf8ff 80100f8: 4013 ands r3, r2 80100fa: 60bb str r3, [r7, #8] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80100fc: 68fb ldr r3, [r7, #12] 80100fe: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8010100: 68bb ldr r3, [r7, #8] 8010102: 4313 orrs r3, r2 reg_value = (reg_value | 8010104: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8010108: f443 3300 orr.w r3, r3, #131072 @ 0x20000 801010c: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 801010e: 4a04 ldr r2, [pc, #16] @ (8010120 <__NVIC_SetPriorityGrouping+0x44>) 8010110: 68bb ldr r3, [r7, #8] 8010112: 60d3 str r3, [r2, #12] } 8010114: bf00 nop 8010116: 3714 adds r7, #20 8010118: 46bd mov sp, r7 801011a: bc80 pop {r7} 801011c: 4770 bx lr 801011e: bf00 nop 8010120: e000ed00 .word 0xe000ed00 08010124 <__NVIC_GetPriorityGrouping>: { 8010124: b480 push {r7} 8010126: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8010128: 4b04 ldr r3, [pc, #16] @ (801013c <__NVIC_GetPriorityGrouping+0x18>) 801012a: 68db ldr r3, [r3, #12] 801012c: 0a1b lsrs r3, r3, #8 801012e: f003 0307 and.w r3, r3, #7 } 8010132: 4618 mov r0, r3 8010134: 46bd mov sp, r7 8010136: bc80 pop {r7} 8010138: 4770 bx lr 801013a: bf00 nop 801013c: e000ed00 .word 0xe000ed00 08010140 <__NVIC_EnableIRQ>: { 8010140: b480 push {r7} 8010142: b083 sub sp, #12 8010144: af00 add r7, sp, #0 8010146: 4603 mov r3, r0 8010148: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 801014a: f997 3007 ldrsb.w r3, [r7, #7] 801014e: 2b00 cmp r3, #0 8010150: db0b blt.n 801016a <__NVIC_EnableIRQ+0x2a> NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8010152: 79fb ldrb r3, [r7, #7] 8010154: f003 021f and.w r2, r3, #31 8010158: 4906 ldr r1, [pc, #24] @ (8010174 <__NVIC_EnableIRQ+0x34>) 801015a: f997 3007 ldrsb.w r3, [r7, #7] 801015e: 095b lsrs r3, r3, #5 8010160: 2001 movs r0, #1 8010162: fa00 f202 lsl.w r2, r0, r2 8010166: f841 2023 str.w r2, [r1, r3, lsl #2] } 801016a: bf00 nop 801016c: 370c adds r7, #12 801016e: 46bd mov sp, r7 8010170: bc80 pop {r7} 8010172: 4770 bx lr 8010174: e000e100 .word 0xe000e100 08010178 <__NVIC_SetPriority>: { 8010178: b480 push {r7} 801017a: b083 sub sp, #12 801017c: af00 add r7, sp, #0 801017e: 4603 mov r3, r0 8010180: 6039 str r1, [r7, #0] 8010182: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8010184: f997 3007 ldrsb.w r3, [r7, #7] 8010188: 2b00 cmp r3, #0 801018a: db0a blt.n 80101a2 <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 801018c: 683b ldr r3, [r7, #0] 801018e: b2da uxtb r2, r3 8010190: 490c ldr r1, [pc, #48] @ (80101c4 <__NVIC_SetPriority+0x4c>) 8010192: f997 3007 ldrsb.w r3, [r7, #7] 8010196: 0112 lsls r2, r2, #4 8010198: b2d2 uxtb r2, r2 801019a: 440b add r3, r1 801019c: f883 2300 strb.w r2, [r3, #768] @ 0x300 } 80101a0: e00a b.n 80101b8 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80101a2: 683b ldr r3, [r7, #0] 80101a4: b2da uxtb r2, r3 80101a6: 4908 ldr r1, [pc, #32] @ (80101c8 <__NVIC_SetPriority+0x50>) 80101a8: 79fb ldrb r3, [r7, #7] 80101aa: f003 030f and.w r3, r3, #15 80101ae: 3b04 subs r3, #4 80101b0: 0112 lsls r2, r2, #4 80101b2: b2d2 uxtb r2, r2 80101b4: 440b add r3, r1 80101b6: 761a strb r2, [r3, #24] } 80101b8: bf00 nop 80101ba: 370c adds r7, #12 80101bc: 46bd mov sp, r7 80101be: bc80 pop {r7} 80101c0: 4770 bx lr 80101c2: bf00 nop 80101c4: e000e100 .word 0xe000e100 80101c8: e000ed00 .word 0xe000ed00 080101cc : { 80101cc: b480 push {r7} 80101ce: b089 sub sp, #36 @ 0x24 80101d0: af00 add r7, sp, #0 80101d2: 60f8 str r0, [r7, #12] 80101d4: 60b9 str r1, [r7, #8] 80101d6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80101d8: 68fb ldr r3, [r7, #12] 80101da: f003 0307 and.w r3, r3, #7 80101de: 61fb str r3, [r7, #28] PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80101e0: 69fb ldr r3, [r7, #28] 80101e2: f1c3 0307 rsb r3, r3, #7 80101e6: 2b04 cmp r3, #4 80101e8: bf28 it cs 80101ea: 2304 movcs r3, #4 80101ec: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80101ee: 69fb ldr r3, [r7, #28] 80101f0: 3304 adds r3, #4 80101f2: 2b06 cmp r3, #6 80101f4: d902 bls.n 80101fc 80101f6: 69fb ldr r3, [r7, #28] 80101f8: 3b03 subs r3, #3 80101fa: e000 b.n 80101fe 80101fc: 2300 movs r3, #0 80101fe: 617b str r3, [r7, #20] ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8010200: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8010204: 69bb ldr r3, [r7, #24] 8010206: fa02 f303 lsl.w r3, r2, r3 801020a: 43da mvns r2, r3 801020c: 68bb ldr r3, [r7, #8] 801020e: 401a ands r2, r3 8010210: 697b ldr r3, [r7, #20] 8010212: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8010214: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 8010218: 697b ldr r3, [r7, #20] 801021a: fa01 f303 lsl.w r3, r1, r3 801021e: 43d9 mvns r1, r3 8010220: 687b ldr r3, [r7, #4] 8010222: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8010224: 4313 orrs r3, r2 } 8010226: 4618 mov r0, r3 8010228: 3724 adds r7, #36 @ 0x24 801022a: 46bd mov sp, r7 801022c: bc80 pop {r7} 801022e: 4770 bx lr 08010230 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8010230: b580 push {r7, lr} 8010232: b082 sub sp, #8 8010234: af00 add r7, sp, #0 8010236: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8010238: 687b ldr r3, [r7, #4] 801023a: 3b01 subs r3, #1 801023c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8010240: d301 bcc.n 8010246 { return (1UL); /* Reload value impossible */ 8010242: 2301 movs r3, #1 8010244: e00f b.n 8010266 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8010246: 4a0a ldr r2, [pc, #40] @ (8010270 ) 8010248: 687b ldr r3, [r7, #4] 801024a: 3b01 subs r3, #1 801024c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 801024e: 210f movs r1, #15 8010250: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8010254: f7ff ff90 bl 8010178 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8010258: 4b05 ldr r3, [pc, #20] @ (8010270 ) 801025a: 2200 movs r2, #0 801025c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 801025e: 4b04 ldr r3, [pc, #16] @ (8010270 ) 8010260: 2207 movs r2, #7 8010262: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8010264: 2300 movs r3, #0 } 8010266: 4618 mov r0, r3 8010268: 3708 adds r7, #8 801026a: 46bd mov sp, r7 801026c: bd80 pop {r7, pc} 801026e: bf00 nop 8010270: e000e010 .word 0xe000e010 08010274 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8010274: b580 push {r7, lr} 8010276: b082 sub sp, #8 8010278: af00 add r7, sp, #0 801027a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 801027c: 6878 ldr r0, [r7, #4] 801027e: f7ff ff2d bl 80100dc <__NVIC_SetPriorityGrouping> } 8010282: bf00 nop 8010284: 3708 adds r7, #8 8010286: 46bd mov sp, r7 8010288: bd80 pop {r7, pc} 0801028a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 801028a: b580 push {r7, lr} 801028c: b086 sub sp, #24 801028e: af00 add r7, sp, #0 8010290: 4603 mov r3, r0 8010292: 60b9 str r1, [r7, #8] 8010294: 607a str r2, [r7, #4] 8010296: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8010298: 2300 movs r3, #0 801029a: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 801029c: f7ff ff42 bl 8010124 <__NVIC_GetPriorityGrouping> 80102a0: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 80102a2: 687a ldr r2, [r7, #4] 80102a4: 68b9 ldr r1, [r7, #8] 80102a6: 6978 ldr r0, [r7, #20] 80102a8: f7ff ff90 bl 80101cc 80102ac: 4602 mov r2, r0 80102ae: f997 300f ldrsb.w r3, [r7, #15] 80102b2: 4611 mov r1, r2 80102b4: 4618 mov r0, r3 80102b6: f7ff ff5f bl 8010178 <__NVIC_SetPriority> } 80102ba: bf00 nop 80102bc: 3718 adds r7, #24 80102be: 46bd mov sp, r7 80102c0: bd80 pop {r7, pc} 080102c2 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80102c2: b580 push {r7, lr} 80102c4: b082 sub sp, #8 80102c6: af00 add r7, sp, #0 80102c8: 4603 mov r3, r0 80102ca: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80102cc: f997 3007 ldrsb.w r3, [r7, #7] 80102d0: 4618 mov r0, r3 80102d2: f7ff ff35 bl 8010140 <__NVIC_EnableIRQ> } 80102d6: bf00 nop 80102d8: 3708 adds r7, #8 80102da: 46bd mov sp, r7 80102dc: bd80 pop {r7, pc} 080102de : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 80102de: b580 push {r7, lr} 80102e0: b082 sub sp, #8 80102e2: af00 add r7, sp, #0 80102e4: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 80102e6: 6878 ldr r0, [r7, #4] 80102e8: f7ff ffa2 bl 8010230 80102ec: 4603 mov r3, r0 } 80102ee: 4618 mov r0, r3 80102f0: 3708 adds r7, #8 80102f2: 46bd mov sp, r7 80102f4: bd80 pop {r7, pc} 080102f6 : * parameters in the CRC_InitTypeDef and create the associated handle. * @param hcrc CRC handle * @retval HAL status */ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) { 80102f6: b580 push {r7, lr} 80102f8: b082 sub sp, #8 80102fa: af00 add r7, sp, #0 80102fc: 6078 str r0, [r7, #4] /* Check the CRC handle allocation */ if (hcrc == NULL) 80102fe: 687b ldr r3, [r7, #4] 8010300: 2b00 cmp r3, #0 8010302: d101 bne.n 8010308 { return HAL_ERROR; 8010304: 2301 movs r3, #1 8010306: e00e b.n 8010326 } /* Check the parameters */ assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); if (hcrc->State == HAL_CRC_STATE_RESET) 8010308: 687b ldr r3, [r7, #4] 801030a: 795b ldrb r3, [r3, #5] 801030c: b2db uxtb r3, r3 801030e: 2b00 cmp r3, #0 8010310: d105 bne.n 801031e { /* Allocate lock resource and initialize it */ hcrc->Lock = HAL_UNLOCKED; 8010312: 687b ldr r3, [r7, #4] 8010314: 2200 movs r2, #0 8010316: 711a strb r2, [r3, #4] /* Init the low level hardware */ HAL_CRC_MspInit(hcrc); 8010318: 6878 ldr r0, [r7, #4] 801031a: f7fb f81f bl 800b35c } /* Change CRC peripheral state */ hcrc->State = HAL_CRC_STATE_READY; 801031e: 687b ldr r3, [r7, #4] 8010320: 2201 movs r2, #1 8010322: 715a strb r2, [r3, #5] /* Return function status */ return HAL_OK; 8010324: 2300 movs r3, #0 } 8010326: 4618 mov r0, r3 8010328: 3708 adds r7, #8 801032a: 46bd mov sp, r7 801032c: bd80 pop {r7, pc} 0801032e : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 801032e: b480 push {r7} 8010330: b085 sub sp, #20 8010332: af00 add r7, sp, #0 8010334: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8010336: 2300 movs r3, #0 8010338: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) 801033a: 687b ldr r3, [r7, #4] 801033c: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8010340: b2db uxtb r3, r3 8010342: 2b02 cmp r3, #2 8010344: d008 beq.n 8010358 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8010346: 687b ldr r3, [r7, #4] 8010348: 2204 movs r2, #4 801034a: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); 801034c: 687b ldr r3, [r7, #4] 801034e: 2200 movs r2, #0 8010350: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 8010354: 2301 movs r3, #1 8010356: e020 b.n 801039a } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8010358: 687b ldr r3, [r7, #4] 801035a: 681b ldr r3, [r3, #0] 801035c: 681a ldr r2, [r3, #0] 801035e: 687b ldr r3, [r7, #4] 8010360: 681b ldr r3, [r3, #0] 8010362: f022 020e bic.w r2, r2, #14 8010366: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8010368: 687b ldr r3, [r7, #4] 801036a: 681b ldr r3, [r3, #0] 801036c: 681a ldr r2, [r3, #0] 801036e: 687b ldr r3, [r7, #4] 8010370: 681b ldr r3, [r3, #0] 8010372: f022 0201 bic.w r2, r2, #1 8010376: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8010378: 687b ldr r3, [r7, #4] 801037a: 6c1a ldr r2, [r3, #64] @ 0x40 801037c: 687b ldr r3, [r7, #4] 801037e: 6bdb ldr r3, [r3, #60] @ 0x3c 8010380: 2101 movs r1, #1 8010382: fa01 f202 lsl.w r2, r1, r2 8010386: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8010388: 687b ldr r3, [r7, #4] 801038a: 2201 movs r2, #1 801038c: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8010390: 687b ldr r3, [r7, #4] 8010392: 2200 movs r2, #0 8010394: f883 2020 strb.w r2, [r3, #32] return status; 8010398: 7bfb ldrb r3, [r7, #15] } 801039a: 4618 mov r0, r3 801039c: 3714 adds r7, #20 801039e: 46bd mov sp, r7 80103a0: bc80 pop {r7} 80103a2: 4770 bx lr 080103a4 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 80103a4: b580 push {r7, lr} 80103a6: b084 sub sp, #16 80103a8: af00 add r7, sp, #0 80103aa: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80103ac: 2300 movs r3, #0 80103ae: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) 80103b0: 687b ldr r3, [r7, #4] 80103b2: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 80103b6: b2db uxtb r3, r3 80103b8: 2b02 cmp r3, #2 80103ba: d005 beq.n 80103c8 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80103bc: 687b ldr r3, [r7, #4] 80103be: 2204 movs r2, #4 80103c0: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; 80103c2: 2301 movs r3, #1 80103c4: 73fb strb r3, [r7, #15] 80103c6: e0d6 b.n 8010576 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80103c8: 687b ldr r3, [r7, #4] 80103ca: 681b ldr r3, [r3, #0] 80103cc: 681a ldr r2, [r3, #0] 80103ce: 687b ldr r3, [r7, #4] 80103d0: 681b ldr r3, [r3, #0] 80103d2: f022 020e bic.w r2, r2, #14 80103d6: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80103d8: 687b ldr r3, [r7, #4] 80103da: 681b ldr r3, [r3, #0] 80103dc: 681a ldr r2, [r3, #0] 80103de: 687b ldr r3, [r7, #4] 80103e0: 681b ldr r3, [r3, #0] 80103e2: f022 0201 bic.w r2, r2, #1 80103e6: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80103e8: 687b ldr r3, [r7, #4] 80103ea: 681b ldr r3, [r3, #0] 80103ec: 461a mov r2, r3 80103ee: 4b64 ldr r3, [pc, #400] @ (8010580 ) 80103f0: 429a cmp r2, r3 80103f2: d958 bls.n 80104a6 80103f4: 687b ldr r3, [r7, #4] 80103f6: 681b ldr r3, [r3, #0] 80103f8: 4a62 ldr r2, [pc, #392] @ (8010584 ) 80103fa: 4293 cmp r3, r2 80103fc: d04f beq.n 801049e 80103fe: 687b ldr r3, [r7, #4] 8010400: 681b ldr r3, [r3, #0] 8010402: 4a61 ldr r2, [pc, #388] @ (8010588 ) 8010404: 4293 cmp r3, r2 8010406: d048 beq.n 801049a 8010408: 687b ldr r3, [r7, #4] 801040a: 681b ldr r3, [r3, #0] 801040c: 4a5f ldr r2, [pc, #380] @ (801058c ) 801040e: 4293 cmp r3, r2 8010410: d040 beq.n 8010494 8010412: 687b ldr r3, [r7, #4] 8010414: 681b ldr r3, [r3, #0] 8010416: 4a5e ldr r2, [pc, #376] @ (8010590 ) 8010418: 4293 cmp r3, r2 801041a: d038 beq.n 801048e 801041c: 687b ldr r3, [r7, #4] 801041e: 681b ldr r3, [r3, #0] 8010420: 4a5c ldr r2, [pc, #368] @ (8010594 ) 8010422: 4293 cmp r3, r2 8010424: d030 beq.n 8010488 8010426: 687b ldr r3, [r7, #4] 8010428: 681b ldr r3, [r3, #0] 801042a: 4a5b ldr r2, [pc, #364] @ (8010598 ) 801042c: 4293 cmp r3, r2 801042e: d028 beq.n 8010482 8010430: 687b ldr r3, [r7, #4] 8010432: 681b ldr r3, [r3, #0] 8010434: 4a52 ldr r2, [pc, #328] @ (8010580 ) 8010436: 4293 cmp r3, r2 8010438: d020 beq.n 801047c 801043a: 687b ldr r3, [r7, #4] 801043c: 681b ldr r3, [r3, #0] 801043e: 4a57 ldr r2, [pc, #348] @ (801059c ) 8010440: 4293 cmp r3, r2 8010442: d019 beq.n 8010478 8010444: 687b ldr r3, [r7, #4] 8010446: 681b ldr r3, [r3, #0] 8010448: 4a55 ldr r2, [pc, #340] @ (80105a0 ) 801044a: 4293 cmp r3, r2 801044c: d012 beq.n 8010474 801044e: 687b ldr r3, [r7, #4] 8010450: 681b ldr r3, [r3, #0] 8010452: 4a54 ldr r2, [pc, #336] @ (80105a4 ) 8010454: 4293 cmp r3, r2 8010456: d00a beq.n 801046e 8010458: 687b ldr r3, [r7, #4] 801045a: 681b ldr r3, [r3, #0] 801045c: 4a52 ldr r2, [pc, #328] @ (80105a8 ) 801045e: 4293 cmp r3, r2 8010460: d102 bne.n 8010468 8010462: f44f 5380 mov.w r3, #4096 @ 0x1000 8010466: e01b b.n 80104a0 8010468: f44f 3380 mov.w r3, #65536 @ 0x10000 801046c: e018 b.n 80104a0 801046e: f44f 7380 mov.w r3, #256 @ 0x100 8010472: e015 b.n 80104a0 8010474: 2310 movs r3, #16 8010476: e013 b.n 80104a0 8010478: 2301 movs r3, #1 801047a: e011 b.n 80104a0 801047c: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8010480: e00e b.n 80104a0 8010482: f44f 1380 mov.w r3, #1048576 @ 0x100000 8010486: e00b b.n 80104a0 8010488: f44f 3380 mov.w r3, #65536 @ 0x10000 801048c: e008 b.n 80104a0 801048e: f44f 5380 mov.w r3, #4096 @ 0x1000 8010492: e005 b.n 80104a0 8010494: f44f 7380 mov.w r3, #256 @ 0x100 8010498: e002 b.n 80104a0 801049a: 2310 movs r3, #16 801049c: e000 b.n 80104a0 801049e: 2301 movs r3, #1 80104a0: 4a42 ldr r2, [pc, #264] @ (80105ac ) 80104a2: 6053 str r3, [r2, #4] 80104a4: e057 b.n 8010556 80104a6: 687b ldr r3, [r7, #4] 80104a8: 681b ldr r3, [r3, #0] 80104aa: 4a36 ldr r2, [pc, #216] @ (8010584 ) 80104ac: 4293 cmp r3, r2 80104ae: d04f beq.n 8010550 80104b0: 687b ldr r3, [r7, #4] 80104b2: 681b ldr r3, [r3, #0] 80104b4: 4a34 ldr r2, [pc, #208] @ (8010588 ) 80104b6: 4293 cmp r3, r2 80104b8: d048 beq.n 801054c 80104ba: 687b ldr r3, [r7, #4] 80104bc: 681b ldr r3, [r3, #0] 80104be: 4a33 ldr r2, [pc, #204] @ (801058c ) 80104c0: 4293 cmp r3, r2 80104c2: d040 beq.n 8010546 80104c4: 687b ldr r3, [r7, #4] 80104c6: 681b ldr r3, [r3, #0] 80104c8: 4a31 ldr r2, [pc, #196] @ (8010590 ) 80104ca: 4293 cmp r3, r2 80104cc: d038 beq.n 8010540 80104ce: 687b ldr r3, [r7, #4] 80104d0: 681b ldr r3, [r3, #0] 80104d2: 4a30 ldr r2, [pc, #192] @ (8010594 ) 80104d4: 4293 cmp r3, r2 80104d6: d030 beq.n 801053a 80104d8: 687b ldr r3, [r7, #4] 80104da: 681b ldr r3, [r3, #0] 80104dc: 4a2e ldr r2, [pc, #184] @ (8010598 ) 80104de: 4293 cmp r3, r2 80104e0: d028 beq.n 8010534 80104e2: 687b ldr r3, [r7, #4] 80104e4: 681b ldr r3, [r3, #0] 80104e6: 4a26 ldr r2, [pc, #152] @ (8010580 ) 80104e8: 4293 cmp r3, r2 80104ea: d020 beq.n 801052e 80104ec: 687b ldr r3, [r7, #4] 80104ee: 681b ldr r3, [r3, #0] 80104f0: 4a2a ldr r2, [pc, #168] @ (801059c ) 80104f2: 4293 cmp r3, r2 80104f4: d019 beq.n 801052a 80104f6: 687b ldr r3, [r7, #4] 80104f8: 681b ldr r3, [r3, #0] 80104fa: 4a29 ldr r2, [pc, #164] @ (80105a0 ) 80104fc: 4293 cmp r3, r2 80104fe: d012 beq.n 8010526 8010500: 687b ldr r3, [r7, #4] 8010502: 681b ldr r3, [r3, #0] 8010504: 4a27 ldr r2, [pc, #156] @ (80105a4 ) 8010506: 4293 cmp r3, r2 8010508: d00a beq.n 8010520 801050a: 687b ldr r3, [r7, #4] 801050c: 681b ldr r3, [r3, #0] 801050e: 4a26 ldr r2, [pc, #152] @ (80105a8 ) 8010510: 4293 cmp r3, r2 8010512: d102 bne.n 801051a 8010514: f44f 5380 mov.w r3, #4096 @ 0x1000 8010518: e01b b.n 8010552 801051a: f44f 3380 mov.w r3, #65536 @ 0x10000 801051e: e018 b.n 8010552 8010520: f44f 7380 mov.w r3, #256 @ 0x100 8010524: e015 b.n 8010552 8010526: 2310 movs r3, #16 8010528: e013 b.n 8010552 801052a: 2301 movs r3, #1 801052c: e011 b.n 8010552 801052e: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8010532: e00e b.n 8010552 8010534: f44f 1380 mov.w r3, #1048576 @ 0x100000 8010538: e00b b.n 8010552 801053a: f44f 3380 mov.w r3, #65536 @ 0x10000 801053e: e008 b.n 8010552 8010540: f44f 5380 mov.w r3, #4096 @ 0x1000 8010544: e005 b.n 8010552 8010546: f44f 7380 mov.w r3, #256 @ 0x100 801054a: e002 b.n 8010552 801054c: 2310 movs r3, #16 801054e: e000 b.n 8010552 8010550: 2301 movs r3, #1 8010552: 4a17 ldr r2, [pc, #92] @ (80105b0 ) 8010554: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8010556: 687b ldr r3, [r7, #4] 8010558: 2201 movs r2, #1 801055a: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 801055e: 687b ldr r3, [r7, #4] 8010560: 2200 movs r2, #0 8010562: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8010566: 687b ldr r3, [r7, #4] 8010568: 6b5b ldr r3, [r3, #52] @ 0x34 801056a: 2b00 cmp r3, #0 801056c: d003 beq.n 8010576 { hdma->XferAbortCallback(hdma); 801056e: 687b ldr r3, [r7, #4] 8010570: 6b5b ldr r3, [r3, #52] @ 0x34 8010572: 6878 ldr r0, [r7, #4] 8010574: 4798 blx r3 } } return status; 8010576: 7bfb ldrb r3, [r7, #15] } 8010578: 4618 mov r0, r3 801057a: 3710 adds r7, #16 801057c: 46bd mov sp, r7 801057e: bd80 pop {r7, pc} 8010580: 40020080 .word 0x40020080 8010584: 40020008 .word 0x40020008 8010588: 4002001c .word 0x4002001c 801058c: 40020030 .word 0x40020030 8010590: 40020044 .word 0x40020044 8010594: 40020058 .word 0x40020058 8010598: 4002006c .word 0x4002006c 801059c: 40020408 .word 0x40020408 80105a0: 4002041c .word 0x4002041c 80105a4: 40020430 .word 0x40020430 80105a8: 40020444 .word 0x40020444 80105ac: 40020400 .word 0x40020400 80105b0: 40020000 .word 0x40020000 080105b4 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80105b4: b480 push {r7} 80105b6: b08b sub sp, #44 @ 0x2c 80105b8: af00 add r7, sp, #0 80105ba: 6078 str r0, [r7, #4] 80105bc: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 80105be: 2300 movs r3, #0 80105c0: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 80105c2: 2300 movs r3, #0 80105c4: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80105c6: e169 b.n 801089c { /* Get the IO position */ ioposition = (0x01uL << position); 80105c8: 2201 movs r2, #1 80105ca: 6a7b ldr r3, [r7, #36] @ 0x24 80105cc: fa02 f303 lsl.w r3, r2, r3 80105d0: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80105d2: 683b ldr r3, [r7, #0] 80105d4: 681b ldr r3, [r3, #0] 80105d6: 69fa ldr r2, [r7, #28] 80105d8: 4013 ands r3, r2 80105da: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 80105dc: 69ba ldr r2, [r7, #24] 80105de: 69fb ldr r3, [r7, #28] 80105e0: 429a cmp r2, r3 80105e2: f040 8158 bne.w 8010896 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 80105e6: 683b ldr r3, [r7, #0] 80105e8: 685b ldr r3, [r3, #4] 80105ea: 4a9a ldr r2, [pc, #616] @ (8010854 ) 80105ec: 4293 cmp r3, r2 80105ee: d05e beq.n 80106ae 80105f0: 4a98 ldr r2, [pc, #608] @ (8010854 ) 80105f2: 4293 cmp r3, r2 80105f4: d875 bhi.n 80106e2 80105f6: 4a98 ldr r2, [pc, #608] @ (8010858 ) 80105f8: 4293 cmp r3, r2 80105fa: d058 beq.n 80106ae 80105fc: 4a96 ldr r2, [pc, #600] @ (8010858 ) 80105fe: 4293 cmp r3, r2 8010600: d86f bhi.n 80106e2 8010602: 4a96 ldr r2, [pc, #600] @ (801085c ) 8010604: 4293 cmp r3, r2 8010606: d052 beq.n 80106ae 8010608: 4a94 ldr r2, [pc, #592] @ (801085c ) 801060a: 4293 cmp r3, r2 801060c: d869 bhi.n 80106e2 801060e: 4a94 ldr r2, [pc, #592] @ (8010860 ) 8010610: 4293 cmp r3, r2 8010612: d04c beq.n 80106ae 8010614: 4a92 ldr r2, [pc, #584] @ (8010860 ) 8010616: 4293 cmp r3, r2 8010618: d863 bhi.n 80106e2 801061a: 4a92 ldr r2, [pc, #584] @ (8010864 ) 801061c: 4293 cmp r3, r2 801061e: d046 beq.n 80106ae 8010620: 4a90 ldr r2, [pc, #576] @ (8010864 ) 8010622: 4293 cmp r3, r2 8010624: d85d bhi.n 80106e2 8010626: 2b12 cmp r3, #18 8010628: d82a bhi.n 8010680 801062a: 2b12 cmp r3, #18 801062c: d859 bhi.n 80106e2 801062e: a201 add r2, pc, #4 @ (adr r2, 8010634 ) 8010630: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8010634: 080106af .word 0x080106af 8010638: 08010689 .word 0x08010689 801063c: 0801069b .word 0x0801069b 8010640: 080106dd .word 0x080106dd 8010644: 080106e3 .word 0x080106e3 8010648: 080106e3 .word 0x080106e3 801064c: 080106e3 .word 0x080106e3 8010650: 080106e3 .word 0x080106e3 8010654: 080106e3 .word 0x080106e3 8010658: 080106e3 .word 0x080106e3 801065c: 080106e3 .word 0x080106e3 8010660: 080106e3 .word 0x080106e3 8010664: 080106e3 .word 0x080106e3 8010668: 080106e3 .word 0x080106e3 801066c: 080106e3 .word 0x080106e3 8010670: 080106e3 .word 0x080106e3 8010674: 080106e3 .word 0x080106e3 8010678: 08010691 .word 0x08010691 801067c: 080106a5 .word 0x080106a5 8010680: 4a79 ldr r2, [pc, #484] @ (8010868 ) 8010682: 4293 cmp r3, r2 8010684: d013 beq.n 80106ae config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 8010686: e02c b.n 80106e2 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8010688: 683b ldr r3, [r7, #0] 801068a: 68db ldr r3, [r3, #12] 801068c: 623b str r3, [r7, #32] break; 801068e: e029 b.n 80106e4 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8010690: 683b ldr r3, [r7, #0] 8010692: 68db ldr r3, [r3, #12] 8010694: 3304 adds r3, #4 8010696: 623b str r3, [r7, #32] break; 8010698: e024 b.n 80106e4 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 801069a: 683b ldr r3, [r7, #0] 801069c: 68db ldr r3, [r3, #12] 801069e: 3308 adds r3, #8 80106a0: 623b str r3, [r7, #32] break; 80106a2: e01f b.n 80106e4 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80106a4: 683b ldr r3, [r7, #0] 80106a6: 68db ldr r3, [r3, #12] 80106a8: 330c adds r3, #12 80106aa: 623b str r3, [r7, #32] break; 80106ac: e01a b.n 80106e4 if (GPIO_Init->Pull == GPIO_NOPULL) 80106ae: 683b ldr r3, [r7, #0] 80106b0: 689b ldr r3, [r3, #8] 80106b2: 2b00 cmp r3, #0 80106b4: d102 bne.n 80106bc config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80106b6: 2304 movs r3, #4 80106b8: 623b str r3, [r7, #32] break; 80106ba: e013 b.n 80106e4 else if (GPIO_Init->Pull == GPIO_PULLUP) 80106bc: 683b ldr r3, [r7, #0] 80106be: 689b ldr r3, [r3, #8] 80106c0: 2b01 cmp r3, #1 80106c2: d105 bne.n 80106d0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80106c4: 2308 movs r3, #8 80106c6: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 80106c8: 687b ldr r3, [r7, #4] 80106ca: 69fa ldr r2, [r7, #28] 80106cc: 611a str r2, [r3, #16] break; 80106ce: e009 b.n 80106e4 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80106d0: 2308 movs r3, #8 80106d2: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 80106d4: 687b ldr r3, [r7, #4] 80106d6: 69fa ldr r2, [r7, #28] 80106d8: 615a str r2, [r3, #20] break; 80106da: e003 b.n 80106e4 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80106dc: 2300 movs r3, #0 80106de: 623b str r3, [r7, #32] break; 80106e0: e000 b.n 80106e4 break; 80106e2: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80106e4: 69bb ldr r3, [r7, #24] 80106e6: 2bff cmp r3, #255 @ 0xff 80106e8: d801 bhi.n 80106ee 80106ea: 687b ldr r3, [r7, #4] 80106ec: e001 b.n 80106f2 80106ee: 687b ldr r3, [r7, #4] 80106f0: 3304 adds r3, #4 80106f2: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 80106f4: 69bb ldr r3, [r7, #24] 80106f6: 2bff cmp r3, #255 @ 0xff 80106f8: d802 bhi.n 8010700 80106fa: 6a7b ldr r3, [r7, #36] @ 0x24 80106fc: 009b lsls r3, r3, #2 80106fe: e002 b.n 8010706 8010700: 6a7b ldr r3, [r7, #36] @ 0x24 8010702: 3b08 subs r3, #8 8010704: 009b lsls r3, r3, #2 8010706: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8010708: 697b ldr r3, [r7, #20] 801070a: 681a ldr r2, [r3, #0] 801070c: 210f movs r1, #15 801070e: 693b ldr r3, [r7, #16] 8010710: fa01 f303 lsl.w r3, r1, r3 8010714: 43db mvns r3, r3 8010716: 401a ands r2, r3 8010718: 6a39 ldr r1, [r7, #32] 801071a: 693b ldr r3, [r7, #16] 801071c: fa01 f303 lsl.w r3, r1, r3 8010720: 431a orrs r2, r3 8010722: 697b ldr r3, [r7, #20] 8010724: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8010726: 683b ldr r3, [r7, #0] 8010728: 685b ldr r3, [r3, #4] 801072a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 801072e: 2b00 cmp r3, #0 8010730: f000 80b1 beq.w 8010896 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8010734: 4b4d ldr r3, [pc, #308] @ (801086c ) 8010736: 699b ldr r3, [r3, #24] 8010738: 4a4c ldr r2, [pc, #304] @ (801086c ) 801073a: f043 0301 orr.w r3, r3, #1 801073e: 6193 str r3, [r2, #24] 8010740: 4b4a ldr r3, [pc, #296] @ (801086c ) 8010742: 699b ldr r3, [r3, #24] 8010744: f003 0301 and.w r3, r3, #1 8010748: 60bb str r3, [r7, #8] 801074a: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 801074c: 4a48 ldr r2, [pc, #288] @ (8010870 ) 801074e: 6a7b ldr r3, [r7, #36] @ 0x24 8010750: 089b lsrs r3, r3, #2 8010752: 3302 adds r3, #2 8010754: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8010758: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 801075a: 6a7b ldr r3, [r7, #36] @ 0x24 801075c: f003 0303 and.w r3, r3, #3 8010760: 009b lsls r3, r3, #2 8010762: 220f movs r2, #15 8010764: fa02 f303 lsl.w r3, r2, r3 8010768: 43db mvns r3, r3 801076a: 68fa ldr r2, [r7, #12] 801076c: 4013 ands r3, r2 801076e: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8010770: 687b ldr r3, [r7, #4] 8010772: 4a40 ldr r2, [pc, #256] @ (8010874 ) 8010774: 4293 cmp r3, r2 8010776: d013 beq.n 80107a0 8010778: 687b ldr r3, [r7, #4] 801077a: 4a3f ldr r2, [pc, #252] @ (8010878 ) 801077c: 4293 cmp r3, r2 801077e: d00d beq.n 801079c 8010780: 687b ldr r3, [r7, #4] 8010782: 4a3e ldr r2, [pc, #248] @ (801087c ) 8010784: 4293 cmp r3, r2 8010786: d007 beq.n 8010798 8010788: 687b ldr r3, [r7, #4] 801078a: 4a3d ldr r2, [pc, #244] @ (8010880 ) 801078c: 4293 cmp r3, r2 801078e: d101 bne.n 8010794 8010790: 2303 movs r3, #3 8010792: e006 b.n 80107a2 8010794: 2304 movs r3, #4 8010796: e004 b.n 80107a2 8010798: 2302 movs r3, #2 801079a: e002 b.n 80107a2 801079c: 2301 movs r3, #1 801079e: e000 b.n 80107a2 80107a0: 2300 movs r3, #0 80107a2: 6a7a ldr r2, [r7, #36] @ 0x24 80107a4: f002 0203 and.w r2, r2, #3 80107a8: 0092 lsls r2, r2, #2 80107aa: 4093 lsls r3, r2 80107ac: 68fa ldr r2, [r7, #12] 80107ae: 4313 orrs r3, r2 80107b0: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 80107b2: 492f ldr r1, [pc, #188] @ (8010870 ) 80107b4: 6a7b ldr r3, [r7, #36] @ 0x24 80107b6: 089b lsrs r3, r3, #2 80107b8: 3302 adds r3, #2 80107ba: 68fa ldr r2, [r7, #12] 80107bc: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 80107c0: 683b ldr r3, [r7, #0] 80107c2: 685b ldr r3, [r3, #4] 80107c4: f403 1380 and.w r3, r3, #1048576 @ 0x100000 80107c8: 2b00 cmp r3, #0 80107ca: d006 beq.n 80107da { SET_BIT(EXTI->RTSR, iocurrent); 80107cc: 4b2d ldr r3, [pc, #180] @ (8010884 ) 80107ce: 689a ldr r2, [r3, #8] 80107d0: 492c ldr r1, [pc, #176] @ (8010884 ) 80107d2: 69bb ldr r3, [r7, #24] 80107d4: 4313 orrs r3, r2 80107d6: 608b str r3, [r1, #8] 80107d8: e006 b.n 80107e8 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 80107da: 4b2a ldr r3, [pc, #168] @ (8010884 ) 80107dc: 689a ldr r2, [r3, #8] 80107de: 69bb ldr r3, [r7, #24] 80107e0: 43db mvns r3, r3 80107e2: 4928 ldr r1, [pc, #160] @ (8010884 ) 80107e4: 4013 ands r3, r2 80107e6: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 80107e8: 683b ldr r3, [r7, #0] 80107ea: 685b ldr r3, [r3, #4] 80107ec: f403 1300 and.w r3, r3, #2097152 @ 0x200000 80107f0: 2b00 cmp r3, #0 80107f2: d006 beq.n 8010802 { SET_BIT(EXTI->FTSR, iocurrent); 80107f4: 4b23 ldr r3, [pc, #140] @ (8010884 ) 80107f6: 68da ldr r2, [r3, #12] 80107f8: 4922 ldr r1, [pc, #136] @ (8010884 ) 80107fa: 69bb ldr r3, [r7, #24] 80107fc: 4313 orrs r3, r2 80107fe: 60cb str r3, [r1, #12] 8010800: e006 b.n 8010810 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8010802: 4b20 ldr r3, [pc, #128] @ (8010884 ) 8010804: 68da ldr r2, [r3, #12] 8010806: 69bb ldr r3, [r7, #24] 8010808: 43db mvns r3, r3 801080a: 491e ldr r1, [pc, #120] @ (8010884 ) 801080c: 4013 ands r3, r2 801080e: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8010810: 683b ldr r3, [r7, #0] 8010812: 685b ldr r3, [r3, #4] 8010814: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010818: 2b00 cmp r3, #0 801081a: d006 beq.n 801082a { SET_BIT(EXTI->EMR, iocurrent); 801081c: 4b19 ldr r3, [pc, #100] @ (8010884 ) 801081e: 685a ldr r2, [r3, #4] 8010820: 4918 ldr r1, [pc, #96] @ (8010884 ) 8010822: 69bb ldr r3, [r7, #24] 8010824: 4313 orrs r3, r2 8010826: 604b str r3, [r1, #4] 8010828: e006 b.n 8010838 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 801082a: 4b16 ldr r3, [pc, #88] @ (8010884 ) 801082c: 685a ldr r2, [r3, #4] 801082e: 69bb ldr r3, [r7, #24] 8010830: 43db mvns r3, r3 8010832: 4914 ldr r1, [pc, #80] @ (8010884 ) 8010834: 4013 ands r3, r2 8010836: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8010838: 683b ldr r3, [r7, #0] 801083a: 685b ldr r3, [r3, #4] 801083c: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010840: 2b00 cmp r3, #0 8010842: d021 beq.n 8010888 { SET_BIT(EXTI->IMR, iocurrent); 8010844: 4b0f ldr r3, [pc, #60] @ (8010884 ) 8010846: 681a ldr r2, [r3, #0] 8010848: 490e ldr r1, [pc, #56] @ (8010884 ) 801084a: 69bb ldr r3, [r7, #24] 801084c: 4313 orrs r3, r2 801084e: 600b str r3, [r1, #0] 8010850: e021 b.n 8010896 8010852: bf00 nop 8010854: 10320000 .word 0x10320000 8010858: 10310000 .word 0x10310000 801085c: 10220000 .word 0x10220000 8010860: 10210000 .word 0x10210000 8010864: 10120000 .word 0x10120000 8010868: 10110000 .word 0x10110000 801086c: 40021000 .word 0x40021000 8010870: 40010000 .word 0x40010000 8010874: 40010800 .word 0x40010800 8010878: 40010c00 .word 0x40010c00 801087c: 40011000 .word 0x40011000 8010880: 40011400 .word 0x40011400 8010884: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8010888: 4b0b ldr r3, [pc, #44] @ (80108b8 ) 801088a: 681a ldr r2, [r3, #0] 801088c: 69bb ldr r3, [r7, #24] 801088e: 43db mvns r3, r3 8010890: 4909 ldr r1, [pc, #36] @ (80108b8 ) 8010892: 4013 ands r3, r2 8010894: 600b str r3, [r1, #0] } } } position++; 8010896: 6a7b ldr r3, [r7, #36] @ 0x24 8010898: 3301 adds r3, #1 801089a: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 801089c: 683b ldr r3, [r7, #0] 801089e: 681a ldr r2, [r3, #0] 80108a0: 6a7b ldr r3, [r7, #36] @ 0x24 80108a2: fa22 f303 lsr.w r3, r2, r3 80108a6: 2b00 cmp r3, #0 80108a8: f47f ae8e bne.w 80105c8 } } 80108ac: bf00 nop 80108ae: bf00 nop 80108b0: 372c adds r7, #44 @ 0x2c 80108b2: 46bd mov sp, r7 80108b4: bc80 pop {r7} 80108b6: 4770 bx lr 80108b8: 40010400 .word 0x40010400 080108bc : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 80108bc: b480 push {r7} 80108be: b085 sub sp, #20 80108c0: af00 add r7, sp, #0 80108c2: 6078 str r0, [r7, #4] 80108c4: 460b mov r3, r1 80108c6: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 80108c8: 687b ldr r3, [r7, #4] 80108ca: 689a ldr r2, [r3, #8] 80108cc: 887b ldrh r3, [r7, #2] 80108ce: 4013 ands r3, r2 80108d0: 2b00 cmp r3, #0 80108d2: d002 beq.n 80108da { bitstatus = GPIO_PIN_SET; 80108d4: 2301 movs r3, #1 80108d6: 73fb strb r3, [r7, #15] 80108d8: e001 b.n 80108de } else { bitstatus = GPIO_PIN_RESET; 80108da: 2300 movs r3, #0 80108dc: 73fb strb r3, [r7, #15] } return bitstatus; 80108de: 7bfb ldrb r3, [r7, #15] } 80108e0: 4618 mov r0, r3 80108e2: 3714 adds r7, #20 80108e4: 46bd mov sp, r7 80108e6: bc80 pop {r7} 80108e8: 4770 bx lr 080108ea : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 80108ea: b480 push {r7} 80108ec: b083 sub sp, #12 80108ee: af00 add r7, sp, #0 80108f0: 6078 str r0, [r7, #4] 80108f2: 460b mov r3, r1 80108f4: 807b strh r3, [r7, #2] 80108f6: 4613 mov r3, r2 80108f8: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80108fa: 787b ldrb r3, [r7, #1] 80108fc: 2b00 cmp r3, #0 80108fe: d003 beq.n 8010908 { GPIOx->BSRR = GPIO_Pin; 8010900: 887a ldrh r2, [r7, #2] 8010902: 687b ldr r3, [r7, #4] 8010904: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 8010906: e003 b.n 8010910 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 8010908: 887b ldrh r3, [r7, #2] 801090a: 041a lsls r2, r3, #16 801090c: 687b ldr r3, [r7, #4] 801090e: 611a str r2, [r3, #16] } 8010910: bf00 nop 8010912: 370c adds r7, #12 8010914: 46bd mov sp, r7 8010916: bc80 pop {r7} 8010918: 4770 bx lr ... 0801091c : * @note If the HSE divided by 128 is used as the RTC clock, the * Backup Domain Access should be kept enabled. * @retval None */ void HAL_PWR_EnableBkUpAccess(void) { 801091c: b480 push {r7} 801091e: af00 add r7, sp, #0 /* Enable access to RTC and backup registers */ *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; 8010920: 4b03 ldr r3, [pc, #12] @ (8010930 ) 8010922: 2201 movs r2, #1 8010924: 601a str r2, [r3, #0] } 8010926: bf00 nop 8010928: 46bd mov sp, r7 801092a: bc80 pop {r7} 801092c: 4770 bx lr 801092e: bf00 nop 8010930: 420e0020 .word 0x420e0020 08010934 : * - Peripheral clocks * - LSI, LSE and RTC clocks * @retval HAL_StatusTypeDef */ HAL_StatusTypeDef HAL_RCC_DeInit(void) { 8010934: b580 push {r7, lr} 8010936: b082 sub sp, #8 8010938: af00 add r7, sp, #0 uint32_t tickstart; /* Get Start Tick */ tickstart = HAL_GetTick(); 801093a: f7fd ffcf bl 800e8dc 801093e: 6078 str r0, [r7, #4] /* Set HSION bit */ SET_BIT(RCC->CR, RCC_CR_HSION); 8010940: 4b60 ldr r3, [pc, #384] @ (8010ac4 ) 8010942: 681b ldr r3, [r3, #0] 8010944: 4a5f ldr r2, [pc, #380] @ (8010ac4 ) 8010946: f043 0301 orr.w r3, r3, #1 801094a: 6013 str r3, [r2, #0] /* Wait till HSI is ready */ while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 801094c: e008 b.n 8010960 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 801094e: f7fd ffc5 bl 800e8dc 8010952: 4602 mov r2, r0 8010954: 687b ldr r3, [r7, #4] 8010956: 1ad3 subs r3, r2, r3 8010958: 2b02 cmp r3, #2 801095a: d901 bls.n 8010960 { return HAL_TIMEOUT; 801095c: 2303 movs r3, #3 801095e: e0ac b.n 8010aba while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 8010960: 4b58 ldr r3, [pc, #352] @ (8010ac4 ) 8010962: 681b ldr r3, [r3, #0] 8010964: f003 0302 and.w r3, r3, #2 8010968: 2b00 cmp r3, #0 801096a: d0f0 beq.n 801094e } } /* Set HSITRIM bits to the reset value */ MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, (0x10U << RCC_CR_HSITRIM_Pos)); 801096c: 4b55 ldr r3, [pc, #340] @ (8010ac4 ) 801096e: 681b ldr r3, [r3, #0] 8010970: f023 03f8 bic.w r3, r3, #248 @ 0xf8 8010974: 4a53 ldr r2, [pc, #332] @ (8010ac4 ) 8010976: f043 0380 orr.w r3, r3, #128 @ 0x80 801097a: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 801097c: f7fd ffae bl 800e8dc 8010980: 6078 str r0, [r7, #4] /* Reset CFGR register */ CLEAR_REG(RCC->CFGR); 8010982: 4b50 ldr r3, [pc, #320] @ (8010ac4 ) 8010984: 2200 movs r2, #0 8010986: 605a str r2, [r3, #4] /* Wait till clock switch is ready */ while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) 8010988: e00a b.n 80109a0 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 801098a: f7fd ffa7 bl 800e8dc 801098e: 4602 mov r2, r0 8010990: 687b ldr r3, [r7, #4] 8010992: 1ad3 subs r3, r2, r3 8010994: f241 3288 movw r2, #5000 @ 0x1388 8010998: 4293 cmp r3, r2 801099a: d901 bls.n 80109a0 { return HAL_TIMEOUT; 801099c: 2303 movs r3, #3 801099e: e08c b.n 8010aba while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) 80109a0: 4b48 ldr r3, [pc, #288] @ (8010ac4 ) 80109a2: 685b ldr r3, [r3, #4] 80109a4: f003 030c and.w r3, r3, #12 80109a8: 2b00 cmp r3, #0 80109aa: d1ee bne.n 801098a } } /* Update the SystemCoreClock global variable */ SystemCoreClock = HSI_VALUE; 80109ac: 4b46 ldr r3, [pc, #280] @ (8010ac8 ) 80109ae: 4a47 ldr r2, [pc, #284] @ (8010acc ) 80109b0: 601a str r2, [r3, #0] /* Adapt Systick interrupt period */ if (HAL_InitTick(uwTickPrio) != HAL_OK) 80109b2: 4b47 ldr r3, [pc, #284] @ (8010ad0 ) 80109b4: 681b ldr r3, [r3, #0] 80109b6: 4618 mov r0, r3 80109b8: f7fd ff4e bl 800e858 80109bc: 4603 mov r3, r0 80109be: 2b00 cmp r3, #0 80109c0: d001 beq.n 80109c6 { return HAL_ERROR; 80109c2: 2301 movs r3, #1 80109c4: e079 b.n 8010aba } /* Get Start Tick */ tickstart = HAL_GetTick(); 80109c6: f7fd ff89 bl 800e8dc 80109ca: 6078 str r0, [r7, #4] /* Second step is to clear PLLON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLLON); 80109cc: 4b3d ldr r3, [pc, #244] @ (8010ac4 ) 80109ce: 681b ldr r3, [r3, #0] 80109d0: 4a3c ldr r2, [pc, #240] @ (8010ac4 ) 80109d2: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000 80109d6: 6013 str r3, [r2, #0] /* Wait till PLL is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) 80109d8: e008 b.n 80109ec { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80109da: f7fd ff7f bl 800e8dc 80109de: 4602 mov r2, r0 80109e0: 687b ldr r3, [r7, #4] 80109e2: 1ad3 subs r3, r2, r3 80109e4: 2b02 cmp r3, #2 80109e6: d901 bls.n 80109ec { return HAL_TIMEOUT; 80109e8: 2303 movs r3, #3 80109ea: e066 b.n 8010aba while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) 80109ec: 4b35 ldr r3, [pc, #212] @ (8010ac4 ) 80109ee: 681b ldr r3, [r3, #0] 80109f0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80109f4: 2b00 cmp r3, #0 80109f6: d1f0 bne.n 80109da } } /* Ensure to reset PLLSRC and PLLMUL bits */ CLEAR_REG(RCC->CFGR); 80109f8: 4b32 ldr r3, [pc, #200] @ (8010ac4 ) 80109fa: 2200 movs r2, #0 80109fc: 605a str r2, [r3, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 80109fe: f7fd ff6d bl 800e8dc 8010a02: 6078 str r0, [r7, #4] /* Reset HSEON & CSSON bits */ CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_CSSON); 8010a04: 4b2f ldr r3, [pc, #188] @ (8010ac4 ) 8010a06: 681b ldr r3, [r3, #0] 8010a08: 4a2e ldr r2, [pc, #184] @ (8010ac4 ) 8010a0a: f423 2310 bic.w r3, r3, #589824 @ 0x90000 8010a0e: 6013 str r3, [r2, #0] /* Wait till HSE is disabled */ while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) 8010a10: e008 b.n 8010a24 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8010a12: f7fd ff63 bl 800e8dc 8010a16: 4602 mov r2, r0 8010a18: 687b ldr r3, [r7, #4] 8010a1a: 1ad3 subs r3, r2, r3 8010a1c: 2b64 cmp r3, #100 @ 0x64 8010a1e: d901 bls.n 8010a24 { return HAL_TIMEOUT; 8010a20: 2303 movs r3, #3 8010a22: e04a b.n 8010aba while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) 8010a24: 4b27 ldr r3, [pc, #156] @ (8010ac4 ) 8010a26: 681b ldr r3, [r3, #0] 8010a28: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010a2c: 2b00 cmp r3, #0 8010a2e: d1f0 bne.n 8010a12 } } /* Reset HSEBYP bit */ CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); 8010a30: 4b24 ldr r3, [pc, #144] @ (8010ac4 ) 8010a32: 681b ldr r3, [r3, #0] 8010a34: 4a23 ldr r2, [pc, #140] @ (8010ac4 ) 8010a36: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8010a3a: 6013 str r3, [r2, #0] #if defined(RCC_PLL2_SUPPORT) /* Get Start Tick */ tickstart = HAL_GetTick(); 8010a3c: f7fd ff4e bl 800e8dc 8010a40: 6078 str r0, [r7, #4] /* Clear PLL2ON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLL2ON); 8010a42: 4b20 ldr r3, [pc, #128] @ (8010ac4 ) 8010a44: 681b ldr r3, [r3, #0] 8010a46: 4a1f ldr r2, [pc, #124] @ (8010ac4 ) 8010a48: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000 8010a4c: 6013 str r3, [r2, #0] /* Wait till PLL2 is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) != RESET) 8010a4e: e008 b.n 8010a62 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010a50: f7fd ff44 bl 800e8dc 8010a54: 4602 mov r2, r0 8010a56: 687b ldr r3, [r7, #4] 8010a58: 1ad3 subs r3, r2, r3 8010a5a: 2b64 cmp r3, #100 @ 0x64 8010a5c: d901 bls.n 8010a62 { return HAL_TIMEOUT; 8010a5e: 2303 movs r3, #3 8010a60: e02b b.n 8010aba while (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) != RESET) 8010a62: 4b18 ldr r3, [pc, #96] @ (8010ac4 ) 8010a64: 681b ldr r3, [r3, #0] 8010a66: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010a6a: 2b00 cmp r3, #0 8010a6c: d1f0 bne.n 8010a50 } #endif /* RCC_PLL2_SUPPORT */ #if defined(RCC_PLLI2S_SUPPORT) /* Get Start Tick */ tickstart = HAL_GetTick(); 8010a6e: f7fd ff35 bl 800e8dc 8010a72: 6078 str r0, [r7, #4] /* Clear PLL3ON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLL3ON); 8010a74: 4b13 ldr r3, [pc, #76] @ (8010ac4 ) 8010a76: 681b ldr r3, [r3, #0] 8010a78: 4a12 ldr r2, [pc, #72] @ (8010ac4 ) 8010a7a: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8010a7e: 6013 str r3, [r2, #0] /* Wait till PLL3 is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) != RESET) 8010a80: e008 b.n 8010a94 { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 8010a82: f7fd ff2b bl 800e8dc 8010a86: 4602 mov r2, r0 8010a88: 687b ldr r3, [r7, #4] 8010a8a: 1ad3 subs r3, r2, r3 8010a8c: 2b64 cmp r3, #100 @ 0x64 8010a8e: d901 bls.n 8010a94 { return HAL_TIMEOUT; 8010a90: 2303 movs r3, #3 8010a92: e012 b.n 8010aba while (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) != RESET) 8010a94: 4b0b ldr r3, [pc, #44] @ (8010ac4 ) 8010a96: 681b ldr r3, [r3, #0] 8010a98: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8010a9c: 2b00 cmp r3, #0 8010a9e: d1f0 bne.n 8010a82 } #endif /* RCC_PLLI2S_SUPPORT */ #if defined(RCC_CFGR2_PREDIV1) /* Reset CFGR2 register */ CLEAR_REG(RCC->CFGR2); 8010aa0: 4b08 ldr r3, [pc, #32] @ (8010ac4 ) 8010aa2: 2200 movs r2, #0 8010aa4: 62da str r2, [r3, #44] @ 0x2c #endif /* RCC_CFGR2_PREDIV1 */ /* Reset all CSR flags */ SET_BIT(RCC->CSR, RCC_CSR_RMVF); 8010aa6: 4b07 ldr r3, [pc, #28] @ (8010ac4 ) 8010aa8: 6a5b ldr r3, [r3, #36] @ 0x24 8010aaa: 4a06 ldr r2, [pc, #24] @ (8010ac4 ) 8010aac: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8010ab0: 6253 str r3, [r2, #36] @ 0x24 /* Disable all interrupts */ CLEAR_REG(RCC->CIR); 8010ab2: 4b04 ldr r3, [pc, #16] @ (8010ac4 ) 8010ab4: 2200 movs r2, #0 8010ab6: 609a str r2, [r3, #8] return HAL_OK; 8010ab8: 2300 movs r3, #0 } 8010aba: 4618 mov r0, r3 8010abc: 3708 adds r7, #8 8010abe: 46bd mov sp, r7 8010ac0: bd80 pop {r7, pc} 8010ac2: bf00 nop 8010ac4: 40021000 .word 0x40021000 8010ac8: 20000078 .word 0x20000078 8010acc: 007a1200 .word 0x007a1200 8010ad0: 2000007c .word 0x2000007c 08010ad4 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8010ad4: b580 push {r7, lr} 8010ad6: b086 sub sp, #24 8010ad8: af00 add r7, sp, #0 8010ada: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8010adc: 687b ldr r3, [r7, #4] 8010ade: 2b00 cmp r3, #0 8010ae0: d101 bne.n 8010ae6 { return HAL_ERROR; 8010ae2: 2301 movs r3, #1 8010ae4: e304 b.n 80110f0 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8010ae6: 687b ldr r3, [r7, #4] 8010ae8: 681b ldr r3, [r3, #0] 8010aea: f003 0301 and.w r3, r3, #1 8010aee: 2b00 cmp r3, #0 8010af0: f000 8087 beq.w 8010c02 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8010af4: 4b92 ldr r3, [pc, #584] @ (8010d40 ) 8010af6: 685b ldr r3, [r3, #4] 8010af8: f003 030c and.w r3, r3, #12 8010afc: 2b04 cmp r3, #4 8010afe: d00c beq.n 8010b1a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8010b00: 4b8f ldr r3, [pc, #572] @ (8010d40 ) 8010b02: 685b ldr r3, [r3, #4] 8010b04: f003 030c and.w r3, r3, #12 8010b08: 2b08 cmp r3, #8 8010b0a: d112 bne.n 8010b32 8010b0c: 4b8c ldr r3, [pc, #560] @ (8010d40 ) 8010b0e: 685b ldr r3, [r3, #4] 8010b10: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010b14: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010b18: d10b bne.n 8010b32 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8010b1a: 4b89 ldr r3, [pc, #548] @ (8010d40 ) 8010b1c: 681b ldr r3, [r3, #0] 8010b1e: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010b22: 2b00 cmp r3, #0 8010b24: d06c beq.n 8010c00 8010b26: 687b ldr r3, [r7, #4] 8010b28: 689b ldr r3, [r3, #8] 8010b2a: 2b00 cmp r3, #0 8010b2c: d168 bne.n 8010c00 { return HAL_ERROR; 8010b2e: 2301 movs r3, #1 8010b30: e2de b.n 80110f0 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8010b32: 687b ldr r3, [r7, #4] 8010b34: 689b ldr r3, [r3, #8] 8010b36: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010b3a: d106 bne.n 8010b4a 8010b3c: 4b80 ldr r3, [pc, #512] @ (8010d40 ) 8010b3e: 681b ldr r3, [r3, #0] 8010b40: 4a7f ldr r2, [pc, #508] @ (8010d40 ) 8010b42: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8010b46: 6013 str r3, [r2, #0] 8010b48: e02e b.n 8010ba8 8010b4a: 687b ldr r3, [r7, #4] 8010b4c: 689b ldr r3, [r3, #8] 8010b4e: 2b00 cmp r3, #0 8010b50: d10c bne.n 8010b6c 8010b52: 4b7b ldr r3, [pc, #492] @ (8010d40 ) 8010b54: 681b ldr r3, [r3, #0] 8010b56: 4a7a ldr r2, [pc, #488] @ (8010d40 ) 8010b58: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8010b5c: 6013 str r3, [r2, #0] 8010b5e: 4b78 ldr r3, [pc, #480] @ (8010d40 ) 8010b60: 681b ldr r3, [r3, #0] 8010b62: 4a77 ldr r2, [pc, #476] @ (8010d40 ) 8010b64: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8010b68: 6013 str r3, [r2, #0] 8010b6a: e01d b.n 8010ba8 8010b6c: 687b ldr r3, [r7, #4] 8010b6e: 689b ldr r3, [r3, #8] 8010b70: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 8010b74: d10c bne.n 8010b90 8010b76: 4b72 ldr r3, [pc, #456] @ (8010d40 ) 8010b78: 681b ldr r3, [r3, #0] 8010b7a: 4a71 ldr r2, [pc, #452] @ (8010d40 ) 8010b7c: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8010b80: 6013 str r3, [r2, #0] 8010b82: 4b6f ldr r3, [pc, #444] @ (8010d40 ) 8010b84: 681b ldr r3, [r3, #0] 8010b86: 4a6e ldr r2, [pc, #440] @ (8010d40 ) 8010b88: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8010b8c: 6013 str r3, [r2, #0] 8010b8e: e00b b.n 8010ba8 8010b90: 4b6b ldr r3, [pc, #428] @ (8010d40 ) 8010b92: 681b ldr r3, [r3, #0] 8010b94: 4a6a ldr r2, [pc, #424] @ (8010d40 ) 8010b96: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8010b9a: 6013 str r3, [r2, #0] 8010b9c: 4b68 ldr r3, [pc, #416] @ (8010d40 ) 8010b9e: 681b ldr r3, [r3, #0] 8010ba0: 4a67 ldr r2, [pc, #412] @ (8010d40 ) 8010ba2: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8010ba6: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 8010ba8: 687b ldr r3, [r7, #4] 8010baa: 689b ldr r3, [r3, #8] 8010bac: 2b00 cmp r3, #0 8010bae: d013 beq.n 8010bd8 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010bb0: f7fd fe94 bl 800e8dc 8010bb4: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8010bb6: e008 b.n 8010bca { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8010bb8: f7fd fe90 bl 800e8dc 8010bbc: 4602 mov r2, r0 8010bbe: 693b ldr r3, [r7, #16] 8010bc0: 1ad3 subs r3, r2, r3 8010bc2: 2b64 cmp r3, #100 @ 0x64 8010bc4: d901 bls.n 8010bca { return HAL_TIMEOUT; 8010bc6: 2303 movs r3, #3 8010bc8: e292 b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8010bca: 4b5d ldr r3, [pc, #372] @ (8010d40 ) 8010bcc: 681b ldr r3, [r3, #0] 8010bce: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010bd2: 2b00 cmp r3, #0 8010bd4: d0f0 beq.n 8010bb8 8010bd6: e014 b.n 8010c02 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010bd8: f7fd fe80 bl 800e8dc 8010bdc: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8010bde: e008 b.n 8010bf2 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8010be0: f7fd fe7c bl 800e8dc 8010be4: 4602 mov r2, r0 8010be6: 693b ldr r3, [r7, #16] 8010be8: 1ad3 subs r3, r2, r3 8010bea: 2b64 cmp r3, #100 @ 0x64 8010bec: d901 bls.n 8010bf2 { return HAL_TIMEOUT; 8010bee: 2303 movs r3, #3 8010bf0: e27e b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8010bf2: 4b53 ldr r3, [pc, #332] @ (8010d40 ) 8010bf4: 681b ldr r3, [r3, #0] 8010bf6: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010bfa: 2b00 cmp r3, #0 8010bfc: d1f0 bne.n 8010be0 8010bfe: e000 b.n 8010c02 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8010c00: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8010c02: 687b ldr r3, [r7, #4] 8010c04: 681b ldr r3, [r3, #0] 8010c06: f003 0302 and.w r3, r3, #2 8010c0a: 2b00 cmp r3, #0 8010c0c: d063 beq.n 8010cd6 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8010c0e: 4b4c ldr r3, [pc, #304] @ (8010d40 ) 8010c10: 685b ldr r3, [r3, #4] 8010c12: f003 030c and.w r3, r3, #12 8010c16: 2b00 cmp r3, #0 8010c18: d00b beq.n 8010c32 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8010c1a: 4b49 ldr r3, [pc, #292] @ (8010d40 ) 8010c1c: 685b ldr r3, [r3, #4] 8010c1e: f003 030c and.w r3, r3, #12 8010c22: 2b08 cmp r3, #8 8010c24: d11c bne.n 8010c60 8010c26: 4b46 ldr r3, [pc, #280] @ (8010d40 ) 8010c28: 685b ldr r3, [r3, #4] 8010c2a: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010c2e: 2b00 cmp r3, #0 8010c30: d116 bne.n 8010c60 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8010c32: 4b43 ldr r3, [pc, #268] @ (8010d40 ) 8010c34: 681b ldr r3, [r3, #0] 8010c36: f003 0302 and.w r3, r3, #2 8010c3a: 2b00 cmp r3, #0 8010c3c: d005 beq.n 8010c4a 8010c3e: 687b ldr r3, [r7, #4] 8010c40: 695b ldr r3, [r3, #20] 8010c42: 2b01 cmp r3, #1 8010c44: d001 beq.n 8010c4a { return HAL_ERROR; 8010c46: 2301 movs r3, #1 8010c48: e252 b.n 80110f0 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8010c4a: 4b3d ldr r3, [pc, #244] @ (8010d40 ) 8010c4c: 681b ldr r3, [r3, #0] 8010c4e: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8010c52: 687b ldr r3, [r7, #4] 8010c54: 699b ldr r3, [r3, #24] 8010c56: 00db lsls r3, r3, #3 8010c58: 4939 ldr r1, [pc, #228] @ (8010d40 ) 8010c5a: 4313 orrs r3, r2 8010c5c: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8010c5e: e03a b.n 8010cd6 } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8010c60: 687b ldr r3, [r7, #4] 8010c62: 695b ldr r3, [r3, #20] 8010c64: 2b00 cmp r3, #0 8010c66: d020 beq.n 8010caa { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 8010c68: 4b36 ldr r3, [pc, #216] @ (8010d44 ) 8010c6a: 2201 movs r2, #1 8010c6c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010c6e: f7fd fe35 bl 800e8dc 8010c72: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8010c74: e008 b.n 8010c88 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8010c76: f7fd fe31 bl 800e8dc 8010c7a: 4602 mov r2, r0 8010c7c: 693b ldr r3, [r7, #16] 8010c7e: 1ad3 subs r3, r2, r3 8010c80: 2b02 cmp r3, #2 8010c82: d901 bls.n 8010c88 { return HAL_TIMEOUT; 8010c84: 2303 movs r3, #3 8010c86: e233 b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8010c88: 4b2d ldr r3, [pc, #180] @ (8010d40 ) 8010c8a: 681b ldr r3, [r3, #0] 8010c8c: f003 0302 and.w r3, r3, #2 8010c90: 2b00 cmp r3, #0 8010c92: d0f0 beq.n 8010c76 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8010c94: 4b2a ldr r3, [pc, #168] @ (8010d40 ) 8010c96: 681b ldr r3, [r3, #0] 8010c98: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8010c9c: 687b ldr r3, [r7, #4] 8010c9e: 699b ldr r3, [r3, #24] 8010ca0: 00db lsls r3, r3, #3 8010ca2: 4927 ldr r1, [pc, #156] @ (8010d40 ) 8010ca4: 4313 orrs r3, r2 8010ca6: 600b str r3, [r1, #0] 8010ca8: e015 b.n 8010cd6 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 8010caa: 4b26 ldr r3, [pc, #152] @ (8010d44 ) 8010cac: 2200 movs r2, #0 8010cae: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010cb0: f7fd fe14 bl 800e8dc 8010cb4: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8010cb6: e008 b.n 8010cca { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8010cb8: f7fd fe10 bl 800e8dc 8010cbc: 4602 mov r2, r0 8010cbe: 693b ldr r3, [r7, #16] 8010cc0: 1ad3 subs r3, r2, r3 8010cc2: 2b02 cmp r3, #2 8010cc4: d901 bls.n 8010cca { return HAL_TIMEOUT; 8010cc6: 2303 movs r3, #3 8010cc8: e212 b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8010cca: 4b1d ldr r3, [pc, #116] @ (8010d40 ) 8010ccc: 681b ldr r3, [r3, #0] 8010cce: f003 0302 and.w r3, r3, #2 8010cd2: 2b00 cmp r3, #0 8010cd4: d1f0 bne.n 8010cb8 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8010cd6: 687b ldr r3, [r7, #4] 8010cd8: 681b ldr r3, [r3, #0] 8010cda: f003 0308 and.w r3, r3, #8 8010cde: 2b00 cmp r3, #0 8010ce0: d03a beq.n 8010d58 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8010ce2: 687b ldr r3, [r7, #4] 8010ce4: 69db ldr r3, [r3, #28] 8010ce6: 2b00 cmp r3, #0 8010ce8: d019 beq.n 8010d1e { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8010cea: 4b17 ldr r3, [pc, #92] @ (8010d48 ) 8010cec: 2201 movs r2, #1 8010cee: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010cf0: f7fd fdf4 bl 800e8dc 8010cf4: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8010cf6: e008 b.n 8010d0a { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8010cf8: f7fd fdf0 bl 800e8dc 8010cfc: 4602 mov r2, r0 8010cfe: 693b ldr r3, [r7, #16] 8010d00: 1ad3 subs r3, r2, r3 8010d02: 2b02 cmp r3, #2 8010d04: d901 bls.n 8010d0a { return HAL_TIMEOUT; 8010d06: 2303 movs r3, #3 8010d08: e1f2 b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8010d0a: 4b0d ldr r3, [pc, #52] @ (8010d40 ) 8010d0c: 6a5b ldr r3, [r3, #36] @ 0x24 8010d0e: f003 0302 and.w r3, r3, #2 8010d12: 2b00 cmp r3, #0 8010d14: d0f0 beq.n 8010cf8 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 8010d16: 2001 movs r0, #1 8010d18: f000 fbca bl 80114b0 8010d1c: e01c b.n 8010d58 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8010d1e: 4b0a ldr r3, [pc, #40] @ (8010d48 ) 8010d20: 2200 movs r2, #0 8010d22: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010d24: f7fd fdda bl 800e8dc 8010d28: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8010d2a: e00f b.n 8010d4c { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8010d2c: f7fd fdd6 bl 800e8dc 8010d30: 4602 mov r2, r0 8010d32: 693b ldr r3, [r7, #16] 8010d34: 1ad3 subs r3, r2, r3 8010d36: 2b02 cmp r3, #2 8010d38: d908 bls.n 8010d4c { return HAL_TIMEOUT; 8010d3a: 2303 movs r3, #3 8010d3c: e1d8 b.n 80110f0 8010d3e: bf00 nop 8010d40: 40021000 .word 0x40021000 8010d44: 42420000 .word 0x42420000 8010d48: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8010d4c: 4b9b ldr r3, [pc, #620] @ (8010fbc ) 8010d4e: 6a5b ldr r3, [r3, #36] @ 0x24 8010d50: f003 0302 and.w r3, r3, #2 8010d54: 2b00 cmp r3, #0 8010d56: d1e9 bne.n 8010d2c } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8010d58: 687b ldr r3, [r7, #4] 8010d5a: 681b ldr r3, [r3, #0] 8010d5c: f003 0304 and.w r3, r3, #4 8010d60: 2b00 cmp r3, #0 8010d62: f000 80a6 beq.w 8010eb2 { FlagStatus pwrclkchanged = RESET; 8010d66: 2300 movs r3, #0 8010d68: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8010d6a: 4b94 ldr r3, [pc, #592] @ (8010fbc ) 8010d6c: 69db ldr r3, [r3, #28] 8010d6e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010d72: 2b00 cmp r3, #0 8010d74: d10d bne.n 8010d92 { __HAL_RCC_PWR_CLK_ENABLE(); 8010d76: 4b91 ldr r3, [pc, #580] @ (8010fbc ) 8010d78: 69db ldr r3, [r3, #28] 8010d7a: 4a90 ldr r2, [pc, #576] @ (8010fbc ) 8010d7c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8010d80: 61d3 str r3, [r2, #28] 8010d82: 4b8e ldr r3, [pc, #568] @ (8010fbc ) 8010d84: 69db ldr r3, [r3, #28] 8010d86: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010d8a: 60bb str r3, [r7, #8] 8010d8c: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8010d8e: 2301 movs r3, #1 8010d90: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8010d92: 4b8b ldr r3, [pc, #556] @ (8010fc0 ) 8010d94: 681b ldr r3, [r3, #0] 8010d96: f403 7380 and.w r3, r3, #256 @ 0x100 8010d9a: 2b00 cmp r3, #0 8010d9c: d118 bne.n 8010dd0 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8010d9e: 4b88 ldr r3, [pc, #544] @ (8010fc0 ) 8010da0: 681b ldr r3, [r3, #0] 8010da2: 4a87 ldr r2, [pc, #540] @ (8010fc0 ) 8010da4: f443 7380 orr.w r3, r3, #256 @ 0x100 8010da8: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8010daa: f7fd fd97 bl 800e8dc 8010dae: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8010db0: e008 b.n 8010dc4 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8010db2: f7fd fd93 bl 800e8dc 8010db6: 4602 mov r2, r0 8010db8: 693b ldr r3, [r7, #16] 8010dba: 1ad3 subs r3, r2, r3 8010dbc: 2b64 cmp r3, #100 @ 0x64 8010dbe: d901 bls.n 8010dc4 { return HAL_TIMEOUT; 8010dc0: 2303 movs r3, #3 8010dc2: e195 b.n 80110f0 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8010dc4: 4b7e ldr r3, [pc, #504] @ (8010fc0 ) 8010dc6: 681b ldr r3, [r3, #0] 8010dc8: f403 7380 and.w r3, r3, #256 @ 0x100 8010dcc: 2b00 cmp r3, #0 8010dce: d0f0 beq.n 8010db2 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8010dd0: 687b ldr r3, [r7, #4] 8010dd2: 691b ldr r3, [r3, #16] 8010dd4: 2b01 cmp r3, #1 8010dd6: d106 bne.n 8010de6 8010dd8: 4b78 ldr r3, [pc, #480] @ (8010fbc ) 8010dda: 6a1b ldr r3, [r3, #32] 8010ddc: 4a77 ldr r2, [pc, #476] @ (8010fbc ) 8010dde: f043 0301 orr.w r3, r3, #1 8010de2: 6213 str r3, [r2, #32] 8010de4: e02d b.n 8010e42 8010de6: 687b ldr r3, [r7, #4] 8010de8: 691b ldr r3, [r3, #16] 8010dea: 2b00 cmp r3, #0 8010dec: d10c bne.n 8010e08 8010dee: 4b73 ldr r3, [pc, #460] @ (8010fbc ) 8010df0: 6a1b ldr r3, [r3, #32] 8010df2: 4a72 ldr r2, [pc, #456] @ (8010fbc ) 8010df4: f023 0301 bic.w r3, r3, #1 8010df8: 6213 str r3, [r2, #32] 8010dfa: 4b70 ldr r3, [pc, #448] @ (8010fbc ) 8010dfc: 6a1b ldr r3, [r3, #32] 8010dfe: 4a6f ldr r2, [pc, #444] @ (8010fbc ) 8010e00: f023 0304 bic.w r3, r3, #4 8010e04: 6213 str r3, [r2, #32] 8010e06: e01c b.n 8010e42 8010e08: 687b ldr r3, [r7, #4] 8010e0a: 691b ldr r3, [r3, #16] 8010e0c: 2b05 cmp r3, #5 8010e0e: d10c bne.n 8010e2a 8010e10: 4b6a ldr r3, [pc, #424] @ (8010fbc ) 8010e12: 6a1b ldr r3, [r3, #32] 8010e14: 4a69 ldr r2, [pc, #420] @ (8010fbc ) 8010e16: f043 0304 orr.w r3, r3, #4 8010e1a: 6213 str r3, [r2, #32] 8010e1c: 4b67 ldr r3, [pc, #412] @ (8010fbc ) 8010e1e: 6a1b ldr r3, [r3, #32] 8010e20: 4a66 ldr r2, [pc, #408] @ (8010fbc ) 8010e22: f043 0301 orr.w r3, r3, #1 8010e26: 6213 str r3, [r2, #32] 8010e28: e00b b.n 8010e42 8010e2a: 4b64 ldr r3, [pc, #400] @ (8010fbc ) 8010e2c: 6a1b ldr r3, [r3, #32] 8010e2e: 4a63 ldr r2, [pc, #396] @ (8010fbc ) 8010e30: f023 0301 bic.w r3, r3, #1 8010e34: 6213 str r3, [r2, #32] 8010e36: 4b61 ldr r3, [pc, #388] @ (8010fbc ) 8010e38: 6a1b ldr r3, [r3, #32] 8010e3a: 4a60 ldr r2, [pc, #384] @ (8010fbc ) 8010e3c: f023 0304 bic.w r3, r3, #4 8010e40: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 8010e42: 687b ldr r3, [r7, #4] 8010e44: 691b ldr r3, [r3, #16] 8010e46: 2b00 cmp r3, #0 8010e48: d015 beq.n 8010e76 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010e4a: f7fd fd47 bl 800e8dc 8010e4e: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8010e50: e00a b.n 8010e68 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8010e52: f7fd fd43 bl 800e8dc 8010e56: 4602 mov r2, r0 8010e58: 693b ldr r3, [r7, #16] 8010e5a: 1ad3 subs r3, r2, r3 8010e5c: f241 3288 movw r2, #5000 @ 0x1388 8010e60: 4293 cmp r3, r2 8010e62: d901 bls.n 8010e68 { return HAL_TIMEOUT; 8010e64: 2303 movs r3, #3 8010e66: e143 b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8010e68: 4b54 ldr r3, [pc, #336] @ (8010fbc ) 8010e6a: 6a1b ldr r3, [r3, #32] 8010e6c: f003 0302 and.w r3, r3, #2 8010e70: 2b00 cmp r3, #0 8010e72: d0ee beq.n 8010e52 8010e74: e014 b.n 8010ea0 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010e76: f7fd fd31 bl 800e8dc 8010e7a: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8010e7c: e00a b.n 8010e94 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8010e7e: f7fd fd2d bl 800e8dc 8010e82: 4602 mov r2, r0 8010e84: 693b ldr r3, [r7, #16] 8010e86: 1ad3 subs r3, r2, r3 8010e88: f241 3288 movw r2, #5000 @ 0x1388 8010e8c: 4293 cmp r3, r2 8010e8e: d901 bls.n 8010e94 { return HAL_TIMEOUT; 8010e90: 2303 movs r3, #3 8010e92: e12d b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8010e94: 4b49 ldr r3, [pc, #292] @ (8010fbc ) 8010e96: 6a1b ldr r3, [r3, #32] 8010e98: f003 0302 and.w r3, r3, #2 8010e9c: 2b00 cmp r3, #0 8010e9e: d1ee bne.n 8010e7e } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8010ea0: 7dfb ldrb r3, [r7, #23] 8010ea2: 2b01 cmp r3, #1 8010ea4: d105 bne.n 8010eb2 { __HAL_RCC_PWR_CLK_DISABLE(); 8010ea6: 4b45 ldr r3, [pc, #276] @ (8010fbc ) 8010ea8: 69db ldr r3, [r3, #28] 8010eaa: 4a44 ldr r2, [pc, #272] @ (8010fbc ) 8010eac: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8010eb0: 61d3 str r3, [r2, #28] #if defined(RCC_CR_PLL2ON) /*-------------------------------- PLL2 Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL2(RCC_OscInitStruct->PLL2.PLL2State)); if ((RCC_OscInitStruct->PLL2.PLL2State) != RCC_PLL2_NONE) 8010eb2: 687b ldr r3, [r7, #4] 8010eb4: 6adb ldr r3, [r3, #44] @ 0x2c 8010eb6: 2b00 cmp r3, #0 8010eb8: f000 808c beq.w 8010fd4 { /* This bit can not be cleared if the PLL2 clock is used indirectly as system clock (i.e. it is used as PLL clock entry that is used as system clock). */ if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8010ebc: 4b3f ldr r3, [pc, #252] @ (8010fbc ) 8010ebe: 685b ldr r3, [r3, #4] 8010ec0: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010ec4: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010ec8: d10e bne.n 8010ee8 (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 8010eca: 4b3c ldr r3, [pc, #240] @ (8010fbc ) 8010ecc: 685b ldr r3, [r3, #4] 8010ece: f003 030c and.w r3, r3, #12 if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8010ed2: 2b08 cmp r3, #8 8010ed4: d108 bne.n 8010ee8 ((READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) == RCC_CFGR2_PREDIV1SRC_PLL2)) 8010ed6: 4b39 ldr r3, [pc, #228] @ (8010fbc ) 8010ed8: 6adb ldr r3, [r3, #44] @ 0x2c 8010eda: f403 3380 and.w r3, r3, #65536 @ 0x10000 (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 8010ede: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010ee2: d101 bne.n 8010ee8 { return HAL_ERROR; 8010ee4: 2301 movs r3, #1 8010ee6: e103 b.n 80110f0 } else { if ((RCC_OscInitStruct->PLL2.PLL2State) == RCC_PLL2_ON) 8010ee8: 687b ldr r3, [r7, #4] 8010eea: 6adb ldr r3, [r3, #44] @ 0x2c 8010eec: 2b02 cmp r3, #2 8010eee: d14e bne.n 8010f8e assert_param(IS_RCC_PLL2_MUL(RCC_OscInitStruct->PLL2.PLL2MUL)); assert_param(IS_RCC_HSE_PREDIV2(RCC_OscInitStruct->PLL2.HSEPrediv2Value)); /* Prediv2 can be written only when the PLLI2S is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 8010ef0: 4b32 ldr r3, [pc, #200] @ (8010fbc ) 8010ef2: 681b ldr r3, [r3, #0] 8010ef4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010ef8: 2b00 cmp r3, #0 8010efa: d009 beq.n 8010f10 (__HAL_RCC_HSE_GET_PREDIV2() != RCC_OscInitStruct->PLL2.HSEPrediv2Value)) 8010efc: 4b2f ldr r3, [pc, #188] @ (8010fbc ) 8010efe: 6adb ldr r3, [r3, #44] @ 0x2c 8010f00: f003 02f0 and.w r2, r3, #240 @ 0xf0 8010f04: 687b ldr r3, [r7, #4] 8010f06: 6b5b ldr r3, [r3, #52] @ 0x34 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 8010f08: 429a cmp r2, r3 8010f0a: d001 beq.n 8010f10 { return HAL_ERROR; 8010f0c: 2301 movs r3, #1 8010f0e: e0ef b.n 80110f0 } /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 8010f10: 4b2c ldr r3, [pc, #176] @ (8010fc4 ) 8010f12: 2200 movs r2, #0 8010f14: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010f16: f7fd fce1 bl 800e8dc 8010f1a: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010f1c: e008 b.n 8010f30 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010f1e: f7fd fcdd bl 800e8dc 8010f22: 4602 mov r2, r0 8010f24: 693b ldr r3, [r7, #16] 8010f26: 1ad3 subs r3, r2, r3 8010f28: 2b64 cmp r3, #100 @ 0x64 8010f2a: d901 bls.n 8010f30 { return HAL_TIMEOUT; 8010f2c: 2303 movs r3, #3 8010f2e: e0df b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010f30: 4b22 ldr r3, [pc, #136] @ (8010fbc ) 8010f32: 681b ldr r3, [r3, #0] 8010f34: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010f38: 2b00 cmp r3, #0 8010f3a: d1f0 bne.n 8010f1e } } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(RCC_OscInitStruct->PLL2.HSEPrediv2Value); 8010f3c: 4b1f ldr r3, [pc, #124] @ (8010fbc ) 8010f3e: 6adb ldr r3, [r3, #44] @ 0x2c 8010f40: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8010f44: 687b ldr r3, [r7, #4] 8010f46: 6b5b ldr r3, [r3, #52] @ 0x34 8010f48: 491c ldr r1, [pc, #112] @ (8010fbc ) 8010f4a: 4313 orrs r3, r2 8010f4c: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLL2 multiplication factors. */ __HAL_RCC_PLL2_CONFIG(RCC_OscInitStruct->PLL2.PLL2MUL); 8010f4e: 4b1b ldr r3, [pc, #108] @ (8010fbc ) 8010f50: 6adb ldr r3, [r3, #44] @ 0x2c 8010f52: f423 6270 bic.w r2, r3, #3840 @ 0xf00 8010f56: 687b ldr r3, [r7, #4] 8010f58: 6b1b ldr r3, [r3, #48] @ 0x30 8010f5a: 4918 ldr r1, [pc, #96] @ (8010fbc ) 8010f5c: 4313 orrs r3, r2 8010f5e: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLL2. */ __HAL_RCC_PLL2_ENABLE(); 8010f60: 4b18 ldr r3, [pc, #96] @ (8010fc4 ) 8010f62: 2201 movs r2, #1 8010f64: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010f66: f7fd fcb9 bl 800e8dc 8010f6a: 6138 str r0, [r7, #16] /* Wait till PLL2 is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 8010f6c: e008 b.n 8010f80 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010f6e: f7fd fcb5 bl 800e8dc 8010f72: 4602 mov r2, r0 8010f74: 693b ldr r3, [r7, #16] 8010f76: 1ad3 subs r3, r2, r3 8010f78: 2b64 cmp r3, #100 @ 0x64 8010f7a: d901 bls.n 8010f80 { return HAL_TIMEOUT; 8010f7c: 2303 movs r3, #3 8010f7e: e0b7 b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 8010f80: 4b0e ldr r3, [pc, #56] @ (8010fbc ) 8010f82: 681b ldr r3, [r3, #0] 8010f84: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010f88: 2b00 cmp r3, #0 8010f8a: d0f0 beq.n 8010f6e 8010f8c: e022 b.n 8010fd4 } } else { /* Set PREDIV1 source to HSE */ CLEAR_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC); 8010f8e: 4b0b ldr r3, [pc, #44] @ (8010fbc ) 8010f90: 6adb ldr r3, [r3, #44] @ 0x2c 8010f92: 4a0a ldr r2, [pc, #40] @ (8010fbc ) 8010f94: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8010f98: 62d3 str r3, [r2, #44] @ 0x2c /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 8010f9a: 4b0a ldr r3, [pc, #40] @ (8010fc4 ) 8010f9c: 2200 movs r2, #0 8010f9e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010fa0: f7fd fc9c bl 800e8dc 8010fa4: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010fa6: e00f b.n 8010fc8 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010fa8: f7fd fc98 bl 800e8dc 8010fac: 4602 mov r2, r0 8010fae: 693b ldr r3, [r7, #16] 8010fb0: 1ad3 subs r3, r2, r3 8010fb2: 2b64 cmp r3, #100 @ 0x64 8010fb4: d908 bls.n 8010fc8 { return HAL_TIMEOUT; 8010fb6: 2303 movs r3, #3 8010fb8: e09a b.n 80110f0 8010fba: bf00 nop 8010fbc: 40021000 .word 0x40021000 8010fc0: 40007000 .word 0x40007000 8010fc4: 42420068 .word 0x42420068 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010fc8: 4b4b ldr r3, [pc, #300] @ (80110f8 ) 8010fca: 681b ldr r3, [r3, #0] 8010fcc: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010fd0: 2b00 cmp r3, #0 8010fd2: d1e9 bne.n 8010fa8 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8010fd4: 687b ldr r3, [r7, #4] 8010fd6: 6a1b ldr r3, [r3, #32] 8010fd8: 2b00 cmp r3, #0 8010fda: f000 8088 beq.w 80110ee { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8010fde: 4b46 ldr r3, [pc, #280] @ (80110f8 ) 8010fe0: 685b ldr r3, [r3, #4] 8010fe2: f003 030c and.w r3, r3, #12 8010fe6: 2b08 cmp r3, #8 8010fe8: d068 beq.n 80110bc { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8010fea: 687b ldr r3, [r7, #4] 8010fec: 6a1b ldr r3, [r3, #32] 8010fee: 2b02 cmp r3, #2 8010ff0: d14d bne.n 801108e /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8010ff2: 4b42 ldr r3, [pc, #264] @ (80110fc ) 8010ff4: 2200 movs r2, #0 8010ff6: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010ff8: f7fd fc70 bl 800e8dc 8010ffc: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8010ffe: e008 b.n 8011012 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8011000: f7fd fc6c bl 800e8dc 8011004: 4602 mov r2, r0 8011006: 693b ldr r3, [r7, #16] 8011008: 1ad3 subs r3, r2, r3 801100a: 2b02 cmp r3, #2 801100c: d901 bls.n 8011012 { return HAL_TIMEOUT; 801100e: 2303 movs r3, #3 8011010: e06e b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8011012: 4b39 ldr r3, [pc, #228] @ (80110f8 ) 8011014: 681b ldr r3, [r3, #0] 8011016: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 801101a: 2b00 cmp r3, #0 801101c: d1f0 bne.n 8011000 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 801101e: 687b ldr r3, [r7, #4] 8011020: 6a5b ldr r3, [r3, #36] @ 0x24 8011022: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8011026: d10f bne.n 8011048 assert_param(IS_RCC_HSE_PREDIV(RCC_OscInitStruct->HSEPredivValue)); #if defined(RCC_CFGR2_PREDIV1SRC) assert_param(IS_RCC_PREDIV1_SOURCE(RCC_OscInitStruct->Prediv1Source)); /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); 8011028: 4b33 ldr r3, [pc, #204] @ (80110f8 ) 801102a: 6ada ldr r2, [r3, #44] @ 0x2c 801102c: 687b ldr r3, [r7, #4] 801102e: 685b ldr r3, [r3, #4] 8011030: 4931 ldr r1, [pc, #196] @ (80110f8 ) 8011032: 4313 orrs r3, r2 8011034: 62cb str r3, [r1, #44] @ 0x2c #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8011036: 4b30 ldr r3, [pc, #192] @ (80110f8 ) 8011038: 6adb ldr r3, [r3, #44] @ 0x2c 801103a: f023 020f bic.w r2, r3, #15 801103e: 687b ldr r3, [r7, #4] 8011040: 68db ldr r3, [r3, #12] 8011042: 492d ldr r1, [pc, #180] @ (80110f8 ) 8011044: 4313 orrs r3, r2 8011046: 62cb str r3, [r1, #44] @ 0x2c } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8011048: 4b2b ldr r3, [pc, #172] @ (80110f8 ) 801104a: 685b ldr r3, [r3, #4] 801104c: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 8011050: 687b ldr r3, [r7, #4] 8011052: 6a59 ldr r1, [r3, #36] @ 0x24 8011054: 687b ldr r3, [r7, #4] 8011056: 6a9b ldr r3, [r3, #40] @ 0x28 8011058: 430b orrs r3, r1 801105a: 4927 ldr r1, [pc, #156] @ (80110f8 ) 801105c: 4313 orrs r3, r2 801105e: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8011060: 4b26 ldr r3, [pc, #152] @ (80110fc ) 8011062: 2201 movs r2, #1 8011064: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8011066: f7fd fc39 bl 800e8dc 801106a: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 801106c: e008 b.n 8011080 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 801106e: f7fd fc35 bl 800e8dc 8011072: 4602 mov r2, r0 8011074: 693b ldr r3, [r7, #16] 8011076: 1ad3 subs r3, r2, r3 8011078: 2b02 cmp r3, #2 801107a: d901 bls.n 8011080 { return HAL_TIMEOUT; 801107c: 2303 movs r3, #3 801107e: e037 b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8011080: 4b1d ldr r3, [pc, #116] @ (80110f8 ) 8011082: 681b ldr r3, [r3, #0] 8011084: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8011088: 2b00 cmp r3, #0 801108a: d0f0 beq.n 801106e 801108c: e02f b.n 80110ee } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 801108e: 4b1b ldr r3, [pc, #108] @ (80110fc ) 8011090: 2200 movs r2, #0 8011092: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8011094: f7fd fc22 bl 800e8dc 8011098: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 801109a: e008 b.n 80110ae { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 801109c: f7fd fc1e bl 800e8dc 80110a0: 4602 mov r2, r0 80110a2: 693b ldr r3, [r7, #16] 80110a4: 1ad3 subs r3, r2, r3 80110a6: 2b02 cmp r3, #2 80110a8: d901 bls.n 80110ae { return HAL_TIMEOUT; 80110aa: 2303 movs r3, #3 80110ac: e020 b.n 80110f0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80110ae: 4b12 ldr r3, [pc, #72] @ (80110f8 ) 80110b0: 681b ldr r3, [r3, #0] 80110b2: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80110b6: 2b00 cmp r3, #0 80110b8: d1f0 bne.n 801109c 80110ba: e018 b.n 80110ee } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 80110bc: 687b ldr r3, [r7, #4] 80110be: 6a1b ldr r3, [r3, #32] 80110c0: 2b01 cmp r3, #1 80110c2: d101 bne.n 80110c8 { return HAL_ERROR; 80110c4: 2301 movs r3, #1 80110c6: e013 b.n 80110f0 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 80110c8: 4b0b ldr r3, [pc, #44] @ (80110f8 ) 80110ca: 685b ldr r3, [r3, #4] 80110cc: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80110ce: 68fb ldr r3, [r7, #12] 80110d0: f403 3280 and.w r2, r3, #65536 @ 0x10000 80110d4: 687b ldr r3, [r7, #4] 80110d6: 6a5b ldr r3, [r3, #36] @ 0x24 80110d8: 429a cmp r2, r3 80110da: d106 bne.n 80110ea (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 80110dc: 68fb ldr r3, [r7, #12] 80110de: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 80110e2: 687b ldr r3, [r7, #4] 80110e4: 6a9b ldr r3, [r3, #40] @ 0x28 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80110e6: 429a cmp r2, r3 80110e8: d001 beq.n 80110ee { return HAL_ERROR; 80110ea: 2301 movs r3, #1 80110ec: e000 b.n 80110f0 } } } } return HAL_OK; 80110ee: 2300 movs r3, #0 } 80110f0: 4618 mov r0, r3 80110f2: 3718 adds r7, #24 80110f4: 46bd mov sp, r7 80110f6: bd80 pop {r7, pc} 80110f8: 40021000 .word 0x40021000 80110fc: 42420060 .word 0x42420060 08011100 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8011100: b580 push {r7, lr} 8011102: b084 sub sp, #16 8011104: af00 add r7, sp, #0 8011106: 6078 str r0, [r7, #4] 8011108: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 801110a: 687b ldr r3, [r7, #4] 801110c: 2b00 cmp r3, #0 801110e: d101 bne.n 8011114 { return HAL_ERROR; 8011110: 2301 movs r3, #1 8011112: e0d0 b.n 80112b6 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8011114: 4b6a ldr r3, [pc, #424] @ (80112c0 ) 8011116: 681b ldr r3, [r3, #0] 8011118: f003 0307 and.w r3, r3, #7 801111c: 683a ldr r2, [r7, #0] 801111e: 429a cmp r2, r3 8011120: d910 bls.n 8011144 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8011122: 4b67 ldr r3, [pc, #412] @ (80112c0 ) 8011124: 681b ldr r3, [r3, #0] 8011126: f023 0207 bic.w r2, r3, #7 801112a: 4965 ldr r1, [pc, #404] @ (80112c0 ) 801112c: 683b ldr r3, [r7, #0] 801112e: 4313 orrs r3, r2 8011130: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8011132: 4b63 ldr r3, [pc, #396] @ (80112c0 ) 8011134: 681b ldr r3, [r3, #0] 8011136: f003 0307 and.w r3, r3, #7 801113a: 683a ldr r2, [r7, #0] 801113c: 429a cmp r2, r3 801113e: d001 beq.n 8011144 { return HAL_ERROR; 8011140: 2301 movs r3, #1 8011142: e0b8 b.n 80112b6 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8011144: 687b ldr r3, [r7, #4] 8011146: 681b ldr r3, [r3, #0] 8011148: f003 0302 and.w r3, r3, #2 801114c: 2b00 cmp r3, #0 801114e: d020 beq.n 8011192 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8011150: 687b ldr r3, [r7, #4] 8011152: 681b ldr r3, [r3, #0] 8011154: f003 0304 and.w r3, r3, #4 8011158: 2b00 cmp r3, #0 801115a: d005 beq.n 8011168 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 801115c: 4b59 ldr r3, [pc, #356] @ (80112c4 ) 801115e: 685b ldr r3, [r3, #4] 8011160: 4a58 ldr r2, [pc, #352] @ (80112c4 ) 8011162: f443 63e0 orr.w r3, r3, #1792 @ 0x700 8011166: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8011168: 687b ldr r3, [r7, #4] 801116a: 681b ldr r3, [r3, #0] 801116c: f003 0308 and.w r3, r3, #8 8011170: 2b00 cmp r3, #0 8011172: d005 beq.n 8011180 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8011174: 4b53 ldr r3, [pc, #332] @ (80112c4 ) 8011176: 685b ldr r3, [r3, #4] 8011178: 4a52 ldr r2, [pc, #328] @ (80112c4 ) 801117a: f443 5360 orr.w r3, r3, #14336 @ 0x3800 801117e: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8011180: 4b50 ldr r3, [pc, #320] @ (80112c4 ) 8011182: 685b ldr r3, [r3, #4] 8011184: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8011188: 687b ldr r3, [r7, #4] 801118a: 689b ldr r3, [r3, #8] 801118c: 494d ldr r1, [pc, #308] @ (80112c4 ) 801118e: 4313 orrs r3, r2 8011190: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8011192: 687b ldr r3, [r7, #4] 8011194: 681b ldr r3, [r3, #0] 8011196: f003 0301 and.w r3, r3, #1 801119a: 2b00 cmp r3, #0 801119c: d040 beq.n 8011220 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 801119e: 687b ldr r3, [r7, #4] 80111a0: 685b ldr r3, [r3, #4] 80111a2: 2b01 cmp r3, #1 80111a4: d107 bne.n 80111b6 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80111a6: 4b47 ldr r3, [pc, #284] @ (80112c4 ) 80111a8: 681b ldr r3, [r3, #0] 80111aa: f403 3300 and.w r3, r3, #131072 @ 0x20000 80111ae: 2b00 cmp r3, #0 80111b0: d115 bne.n 80111de { return HAL_ERROR; 80111b2: 2301 movs r3, #1 80111b4: e07f b.n 80112b6 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80111b6: 687b ldr r3, [r7, #4] 80111b8: 685b ldr r3, [r3, #4] 80111ba: 2b02 cmp r3, #2 80111bc: d107 bne.n 80111ce { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80111be: 4b41 ldr r3, [pc, #260] @ (80112c4 ) 80111c0: 681b ldr r3, [r3, #0] 80111c2: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80111c6: 2b00 cmp r3, #0 80111c8: d109 bne.n 80111de { return HAL_ERROR; 80111ca: 2301 movs r3, #1 80111cc: e073 b.n 80112b6 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80111ce: 4b3d ldr r3, [pc, #244] @ (80112c4 ) 80111d0: 681b ldr r3, [r3, #0] 80111d2: f003 0302 and.w r3, r3, #2 80111d6: 2b00 cmp r3, #0 80111d8: d101 bne.n 80111de { return HAL_ERROR; 80111da: 2301 movs r3, #1 80111dc: e06b b.n 80112b6 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80111de: 4b39 ldr r3, [pc, #228] @ (80112c4 ) 80111e0: 685b ldr r3, [r3, #4] 80111e2: f023 0203 bic.w r2, r3, #3 80111e6: 687b ldr r3, [r7, #4] 80111e8: 685b ldr r3, [r3, #4] 80111ea: 4936 ldr r1, [pc, #216] @ (80112c4 ) 80111ec: 4313 orrs r3, r2 80111ee: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 80111f0: f7fd fb74 bl 800e8dc 80111f4: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80111f6: e00a b.n 801120e { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 80111f8: f7fd fb70 bl 800e8dc 80111fc: 4602 mov r2, r0 80111fe: 68fb ldr r3, [r7, #12] 8011200: 1ad3 subs r3, r2, r3 8011202: f241 3288 movw r2, #5000 @ 0x1388 8011206: 4293 cmp r3, r2 8011208: d901 bls.n 801120e { return HAL_TIMEOUT; 801120a: 2303 movs r3, #3 801120c: e053 b.n 80112b6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 801120e: 4b2d ldr r3, [pc, #180] @ (80112c4 ) 8011210: 685b ldr r3, [r3, #4] 8011212: f003 020c and.w r2, r3, #12 8011216: 687b ldr r3, [r7, #4] 8011218: 685b ldr r3, [r3, #4] 801121a: 009b lsls r3, r3, #2 801121c: 429a cmp r2, r3 801121e: d1eb bne.n 80111f8 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 8011220: 4b27 ldr r3, [pc, #156] @ (80112c0 ) 8011222: 681b ldr r3, [r3, #0] 8011224: f003 0307 and.w r3, r3, #7 8011228: 683a ldr r2, [r7, #0] 801122a: 429a cmp r2, r3 801122c: d210 bcs.n 8011250 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 801122e: 4b24 ldr r3, [pc, #144] @ (80112c0 ) 8011230: 681b ldr r3, [r3, #0] 8011232: f023 0207 bic.w r2, r3, #7 8011236: 4922 ldr r1, [pc, #136] @ (80112c0 ) 8011238: 683b ldr r3, [r7, #0] 801123a: 4313 orrs r3, r2 801123c: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 801123e: 4b20 ldr r3, [pc, #128] @ (80112c0 ) 8011240: 681b ldr r3, [r3, #0] 8011242: f003 0307 and.w r3, r3, #7 8011246: 683a ldr r2, [r7, #0] 8011248: 429a cmp r2, r3 801124a: d001 beq.n 8011250 { return HAL_ERROR; 801124c: 2301 movs r3, #1 801124e: e032 b.n 80112b6 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8011250: 687b ldr r3, [r7, #4] 8011252: 681b ldr r3, [r3, #0] 8011254: f003 0304 and.w r3, r3, #4 8011258: 2b00 cmp r3, #0 801125a: d008 beq.n 801126e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 801125c: 4b19 ldr r3, [pc, #100] @ (80112c4 ) 801125e: 685b ldr r3, [r3, #4] 8011260: f423 62e0 bic.w r2, r3, #1792 @ 0x700 8011264: 687b ldr r3, [r7, #4] 8011266: 68db ldr r3, [r3, #12] 8011268: 4916 ldr r1, [pc, #88] @ (80112c4 ) 801126a: 4313 orrs r3, r2 801126c: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 801126e: 687b ldr r3, [r7, #4] 8011270: 681b ldr r3, [r3, #0] 8011272: f003 0308 and.w r3, r3, #8 8011276: 2b00 cmp r3, #0 8011278: d009 beq.n 801128e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 801127a: 4b12 ldr r3, [pc, #72] @ (80112c4 ) 801127c: 685b ldr r3, [r3, #4] 801127e: f423 5260 bic.w r2, r3, #14336 @ 0x3800 8011282: 687b ldr r3, [r7, #4] 8011284: 691b ldr r3, [r3, #16] 8011286: 00db lsls r3, r3, #3 8011288: 490e ldr r1, [pc, #56] @ (80112c4 ) 801128a: 4313 orrs r3, r2 801128c: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 801128e: f000 f821 bl 80112d4 8011292: 4602 mov r2, r0 8011294: 4b0b ldr r3, [pc, #44] @ (80112c4 ) 8011296: 685b ldr r3, [r3, #4] 8011298: 091b lsrs r3, r3, #4 801129a: f003 030f and.w r3, r3, #15 801129e: 490a ldr r1, [pc, #40] @ (80112c8 ) 80112a0: 5ccb ldrb r3, [r1, r3] 80112a2: fa22 f303 lsr.w r3, r2, r3 80112a6: 4a09 ldr r2, [pc, #36] @ (80112cc ) 80112a8: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 80112aa: 4b09 ldr r3, [pc, #36] @ (80112d0 ) 80112ac: 681b ldr r3, [r3, #0] 80112ae: 4618 mov r0, r3 80112b0: f7fd fad2 bl 800e858 return HAL_OK; 80112b4: 2300 movs r3, #0 } 80112b6: 4618 mov r0, r3 80112b8: 3710 adds r7, #16 80112ba: 46bd mov sp, r7 80112bc: bd80 pop {r7, pc} 80112be: bf00 nop 80112c0: 40022000 .word 0x40022000 80112c4: 40021000 .word 0x40021000 80112c8: 08016d18 .word 0x08016d18 80112cc: 20000078 .word 0x20000078 80112d0: 2000007c .word 0x2000007c 080112d4 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 80112d4: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 80112d8: b08e sub sp, #56 @ 0x38 80112da: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 80112dc: 2300 movs r3, #0 80112de: 62fb str r3, [r7, #44] @ 0x2c 80112e0: 2300 movs r3, #0 80112e2: 62bb str r3, [r7, #40] @ 0x28 80112e4: 2300 movs r3, #0 80112e6: 637b str r3, [r7, #52] @ 0x34 80112e8: 2300 movs r3, #0 80112ea: 627b str r3, [r7, #36] @ 0x24 uint32_t sysclockfreq = 0U; 80112ec: 2300 movs r3, #0 80112ee: 633b str r3, [r7, #48] @ 0x30 #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; 80112f0: 2300 movs r3, #0 80112f2: 623b str r3, [r7, #32] 80112f4: 2300 movs r3, #0 80112f6: 61fb str r3, [r7, #28] #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 80112f8: 4b4e ldr r3, [pc, #312] @ (8011434 ) 80112fa: 685b ldr r3, [r3, #4] 80112fc: 62fb str r3, [r7, #44] @ 0x2c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 80112fe: 6afb ldr r3, [r7, #44] @ 0x2c 8011300: f003 030c and.w r3, r3, #12 8011304: 2b04 cmp r3, #4 8011306: d002 beq.n 801130e 8011308: 2b08 cmp r3, #8 801130a: d003 beq.n 8011314 801130c: e089 b.n 8011422 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 801130e: 4b4a ldr r3, [pc, #296] @ (8011438 ) 8011310: 633b str r3, [r7, #48] @ 0x30 break; 8011312: e089 b.n 8011428 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8011314: 6afb ldr r3, [r7, #44] @ 0x2c 8011316: 0c9b lsrs r3, r3, #18 8011318: f003 020f and.w r2, r3, #15 801131c: 4b47 ldr r3, [pc, #284] @ (801143c ) 801131e: 5c9b ldrb r3, [r3, r2] 8011320: 627b str r3, [r7, #36] @ 0x24 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8011322: 6afb ldr r3, [r7, #44] @ 0x2c 8011324: f403 3380 and.w r3, r3, #65536 @ 0x10000 8011328: 2b00 cmp r3, #0 801132a: d072 beq.n 8011412 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 801132c: 4b41 ldr r3, [pc, #260] @ (8011434 ) 801132e: 6adb ldr r3, [r3, #44] @ 0x2c 8011330: f003 020f and.w r2, r3, #15 8011334: 4b42 ldr r3, [pc, #264] @ (8011440 ) 8011336: 5c9b ldrb r3, [r3, r2] 8011338: 62bb str r3, [r7, #40] @ 0x28 #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /*RCC_CFGR2_PREDIV1*/ #if defined(RCC_CFGR2_PREDIV1SRC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 801133a: 4b3e ldr r3, [pc, #248] @ (8011434 ) 801133c: 6adb ldr r3, [r3, #44] @ 0x2c 801133e: f403 3380 and.w r3, r3, #65536 @ 0x10000 8011342: 2b00 cmp r3, #0 8011344: d053 beq.n 80113ee { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 8011346: 4b3b ldr r3, [pc, #236] @ (8011434 ) 8011348: 6adb ldr r3, [r3, #44] @ 0x2c 801134a: 091b lsrs r3, r3, #4 801134c: f003 030f and.w r3, r3, #15 8011350: 3301 adds r3, #1 8011352: 623b str r3, [r7, #32] pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 8011354: 4b37 ldr r3, [pc, #220] @ (8011434 ) 8011356: 6adb ldr r3, [r3, #44] @ 0x2c 8011358: 0a1b lsrs r3, r3, #8 801135a: f003 030f and.w r3, r3, #15 801135e: 3302 adds r3, #2 8011360: 61fb str r3, [r7, #28] pllclk = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pll2mul * (uint64_t)pllmul) / ((uint64_t)prediv2 * (uint64_t)prediv)); 8011362: 69fb ldr r3, [r7, #28] 8011364: 2200 movs r2, #0 8011366: 469a mov sl, r3 8011368: 4693 mov fp, r2 801136a: 6a7b ldr r3, [r7, #36] @ 0x24 801136c: 2200 movs r2, #0 801136e: 613b str r3, [r7, #16] 8011370: 617a str r2, [r7, #20] 8011372: 693b ldr r3, [r7, #16] 8011374: fb03 f20b mul.w r2, r3, fp 8011378: 697b ldr r3, [r7, #20] 801137a: fb0a f303 mul.w r3, sl, r3 801137e: 4413 add r3, r2 8011380: 693a ldr r2, [r7, #16] 8011382: fbaa 0102 umull r0, r1, sl, r2 8011386: 440b add r3, r1 8011388: 4619 mov r1, r3 801138a: 4b2b ldr r3, [pc, #172] @ (8011438 ) 801138c: fb03 f201 mul.w r2, r3, r1 8011390: 2300 movs r3, #0 8011392: fb00 f303 mul.w r3, r0, r3 8011396: 4413 add r3, r2 8011398: 4a27 ldr r2, [pc, #156] @ (8011438 ) 801139a: fba0 4502 umull r4, r5, r0, r2 801139e: 442b add r3, r5 80113a0: 461d mov r5, r3 80113a2: 6a3b ldr r3, [r7, #32] 80113a4: 2200 movs r2, #0 80113a6: 60bb str r3, [r7, #8] 80113a8: 60fa str r2, [r7, #12] 80113aa: 6abb ldr r3, [r7, #40] @ 0x28 80113ac: 2200 movs r2, #0 80113ae: 603b str r3, [r7, #0] 80113b0: 607a str r2, [r7, #4] 80113b2: e9d7 0102 ldrd r0, r1, [r7, #8] 80113b6: 460b mov r3, r1 80113b8: e9d7 ab00 ldrd sl, fp, [r7] 80113bc: 4652 mov r2, sl 80113be: fb02 f203 mul.w r2, r2, r3 80113c2: 465b mov r3, fp 80113c4: 4684 mov ip, r0 80113c6: fb0c f303 mul.w r3, ip, r3 80113ca: 4413 add r3, r2 80113cc: 4602 mov r2, r0 80113ce: 4651 mov r1, sl 80113d0: fba2 8901 umull r8, r9, r2, r1 80113d4: 444b add r3, r9 80113d6: 4699 mov r9, r3 80113d8: 4642 mov r2, r8 80113da: 464b mov r3, r9 80113dc: 4620 mov r0, r4 80113de: 4629 mov r1, r5 80113e0: f7f7 ff58 bl 8009294 <__aeabi_uldivmod> 80113e4: 4602 mov r2, r0 80113e6: 460b mov r3, r1 80113e8: 4613 mov r3, r2 80113ea: 637b str r3, [r7, #52] @ 0x34 80113ec: e007 b.n 80113fe } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80113ee: 6a7b ldr r3, [r7, #36] @ 0x24 80113f0: 4a11 ldr r2, [pc, #68] @ (8011438 ) 80113f2: fb03 f202 mul.w r2, r3, r2 80113f6: 6abb ldr r3, [r7, #40] @ 0x28 80113f8: fbb2 f3f3 udiv r3, r2, r3 80113fc: 637b str r3, [r7, #52] @ 0x34 } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 80113fe: 4b0f ldr r3, [pc, #60] @ (801143c ) 8011400: 7b5b ldrb r3, [r3, #13] 8011402: 461a mov r2, r3 8011404: 6a7b ldr r3, [r7, #36] @ 0x24 8011406: 4293 cmp r3, r2 8011408: d108 bne.n 801141c { pllclk = pllclk / 2; 801140a: 6b7b ldr r3, [r7, #52] @ 0x34 801140c: 085b lsrs r3, r3, #1 801140e: 637b str r3, [r7, #52] @ 0x34 8011410: e004 b.n 801141c #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8011412: 6a7b ldr r3, [r7, #36] @ 0x24 8011414: 4a0b ldr r2, [pc, #44] @ (8011444 ) 8011416: fb02 f303 mul.w r3, r2, r3 801141a: 637b str r3, [r7, #52] @ 0x34 } sysclockfreq = pllclk; 801141c: 6b7b ldr r3, [r7, #52] @ 0x34 801141e: 633b str r3, [r7, #48] @ 0x30 break; 8011420: e002 b.n 8011428 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 8011422: 4b09 ldr r3, [pc, #36] @ (8011448 ) 8011424: 633b str r3, [r7, #48] @ 0x30 break; 8011426: bf00 nop } } return sysclockfreq; 8011428: 6b3b ldr r3, [r7, #48] @ 0x30 } 801142a: 4618 mov r0, r3 801142c: 3738 adds r7, #56 @ 0x38 801142e: 46bd mov sp, r7 8011430: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 8011434: 40021000 .word 0x40021000 8011438: 017d7840 .word 0x017d7840 801143c: 08016d30 .word 0x08016d30 8011440: 08016d40 .word 0x08016d40 8011444: 003d0900 .word 0x003d0900 8011448: 007a1200 .word 0x007a1200 0801144c : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 801144c: b480 push {r7} 801144e: af00 add r7, sp, #0 return SystemCoreClock; 8011450: 4b02 ldr r3, [pc, #8] @ (801145c ) 8011452: 681b ldr r3, [r3, #0] } 8011454: 4618 mov r0, r3 8011456: 46bd mov sp, r7 8011458: bc80 pop {r7} 801145a: 4770 bx lr 801145c: 20000078 .word 0x20000078 08011460 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 8011460: b580 push {r7, lr} 8011462: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8011464: f7ff fff2 bl 801144c 8011468: 4602 mov r2, r0 801146a: 4b05 ldr r3, [pc, #20] @ (8011480 ) 801146c: 685b ldr r3, [r3, #4] 801146e: 0a1b lsrs r3, r3, #8 8011470: f003 0307 and.w r3, r3, #7 8011474: 4903 ldr r1, [pc, #12] @ (8011484 ) 8011476: 5ccb ldrb r3, [r1, r3] 8011478: fa22 f303 lsr.w r3, r2, r3 } 801147c: 4618 mov r0, r3 801147e: bd80 pop {r7, pc} 8011480: 40021000 .word 0x40021000 8011484: 08016d28 .word 0x08016d28 08011488 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 8011488: b580 push {r7, lr} 801148a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 801148c: f7ff ffde bl 801144c 8011490: 4602 mov r2, r0 8011492: 4b05 ldr r3, [pc, #20] @ (80114a8 ) 8011494: 685b ldr r3, [r3, #4] 8011496: 0adb lsrs r3, r3, #11 8011498: f003 0307 and.w r3, r3, #7 801149c: 4903 ldr r1, [pc, #12] @ (80114ac ) 801149e: 5ccb ldrb r3, [r1, r3] 80114a0: fa22 f303 lsr.w r3, r2, r3 } 80114a4: 4618 mov r0, r3 80114a6: bd80 pop {r7, pc} 80114a8: 40021000 .word 0x40021000 80114ac: 08016d28 .word 0x08016d28 080114b0 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 80114b0: b480 push {r7} 80114b2: b085 sub sp, #20 80114b4: af00 add r7, sp, #0 80114b6: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 80114b8: 4b0a ldr r3, [pc, #40] @ (80114e4 ) 80114ba: 681b ldr r3, [r3, #0] 80114bc: 4a0a ldr r2, [pc, #40] @ (80114e8 ) 80114be: fba2 2303 umull r2, r3, r2, r3 80114c2: 0a5b lsrs r3, r3, #9 80114c4: 687a ldr r2, [r7, #4] 80114c6: fb02 f303 mul.w r3, r2, r3 80114ca: 60fb str r3, [r7, #12] do { __NOP(); 80114cc: bf00 nop } while (Delay --); 80114ce: 68fb ldr r3, [r7, #12] 80114d0: 1e5a subs r2, r3, #1 80114d2: 60fa str r2, [r7, #12] 80114d4: 2b00 cmp r3, #0 80114d6: d1f9 bne.n 80114cc } 80114d8: bf00 nop 80114da: bf00 nop 80114dc: 3714 adds r7, #20 80114de: 46bd mov sp, r7 80114e0: bc80 pop {r7} 80114e2: 4770 bx lr 80114e4: 20000078 .word 0x20000078 80114e8: 10624dd3 .word 0x10624dd3 080114ec : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 80114ec: b580 push {r7, lr} 80114ee: b088 sub sp, #32 80114f0: af00 add r7, sp, #0 80114f2: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 80114f4: 2300 movs r3, #0 80114f6: 617b str r3, [r7, #20] 80114f8: 2300 movs r3, #0 80114fa: 613b str r3, [r7, #16] #if defined(STM32F105xC) || defined(STM32F107xC) uint32_t pllactive = 0U; 80114fc: 2300 movs r3, #0 80114fe: 61fb str r3, [r7, #28] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8011500: 687b ldr r3, [r7, #4] 8011502: 681b ldr r3, [r3, #0] 8011504: f003 0301 and.w r3, r3, #1 8011508: 2b00 cmp r3, #0 801150a: d07d beq.n 8011608 { FlagStatus pwrclkchanged = RESET; 801150c: 2300 movs r3, #0 801150e: 76fb strb r3, [r7, #27] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8011510: 4b8b ldr r3, [pc, #556] @ (8011740 ) 8011512: 69db ldr r3, [r3, #28] 8011514: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8011518: 2b00 cmp r3, #0 801151a: d10d bne.n 8011538 { __HAL_RCC_PWR_CLK_ENABLE(); 801151c: 4b88 ldr r3, [pc, #544] @ (8011740 ) 801151e: 69db ldr r3, [r3, #28] 8011520: 4a87 ldr r2, [pc, #540] @ (8011740 ) 8011522: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8011526: 61d3 str r3, [r2, #28] 8011528: 4b85 ldr r3, [pc, #532] @ (8011740 ) 801152a: 69db ldr r3, [r3, #28] 801152c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8011530: 60fb str r3, [r7, #12] 8011532: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; 8011534: 2301 movs r3, #1 8011536: 76fb strb r3, [r7, #27] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8011538: 4b82 ldr r3, [pc, #520] @ (8011744 ) 801153a: 681b ldr r3, [r3, #0] 801153c: f403 7380 and.w r3, r3, #256 @ 0x100 8011540: 2b00 cmp r3, #0 8011542: d118 bne.n 8011576 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8011544: 4b7f ldr r3, [pc, #508] @ (8011744 ) 8011546: 681b ldr r3, [r3, #0] 8011548: 4a7e ldr r2, [pc, #504] @ (8011744 ) 801154a: f443 7380 orr.w r3, r3, #256 @ 0x100 801154e: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8011550: f7fd f9c4 bl 800e8dc 8011554: 6178 str r0, [r7, #20] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8011556: e008 b.n 801156a { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8011558: f7fd f9c0 bl 800e8dc 801155c: 4602 mov r2, r0 801155e: 697b ldr r3, [r7, #20] 8011560: 1ad3 subs r3, r2, r3 8011562: 2b64 cmp r3, #100 @ 0x64 8011564: d901 bls.n 801156a { return HAL_TIMEOUT; 8011566: 2303 movs r3, #3 8011568: e0e5 b.n 8011736 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 801156a: 4b76 ldr r3, [pc, #472] @ (8011744 ) 801156c: 681b ldr r3, [r3, #0] 801156e: f403 7380 and.w r3, r3, #256 @ 0x100 8011572: 2b00 cmp r3, #0 8011574: d0f0 beq.n 8011558 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 8011576: 4b72 ldr r3, [pc, #456] @ (8011740 ) 8011578: 6a1b ldr r3, [r3, #32] 801157a: f403 7340 and.w r3, r3, #768 @ 0x300 801157e: 613b str r3, [r7, #16] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8011580: 693b ldr r3, [r7, #16] 8011582: 2b00 cmp r3, #0 8011584: d02e beq.n 80115e4 8011586: 687b ldr r3, [r7, #4] 8011588: 685b ldr r3, [r3, #4] 801158a: f403 7340 and.w r3, r3, #768 @ 0x300 801158e: 693a ldr r2, [r7, #16] 8011590: 429a cmp r2, r3 8011592: d027 beq.n 80115e4 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8011594: 4b6a ldr r3, [pc, #424] @ (8011740 ) 8011596: 6a1b ldr r3, [r3, #32] 8011598: f423 7340 bic.w r3, r3, #768 @ 0x300 801159c: 613b str r3, [r7, #16] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 801159e: 4b6a ldr r3, [pc, #424] @ (8011748 ) 80115a0: 2201 movs r2, #1 80115a2: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 80115a4: 4b68 ldr r3, [pc, #416] @ (8011748 ) 80115a6: 2200 movs r2, #0 80115a8: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 80115aa: 4a65 ldr r2, [pc, #404] @ (8011740 ) 80115ac: 693b ldr r3, [r7, #16] 80115ae: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 80115b0: 693b ldr r3, [r7, #16] 80115b2: f003 0301 and.w r3, r3, #1 80115b6: 2b00 cmp r3, #0 80115b8: d014 beq.n 80115e4 { /* Get Start Tick */ tickstart = HAL_GetTick(); 80115ba: f7fd f98f bl 800e8dc 80115be: 6178 str r0, [r7, #20] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80115c0: e00a b.n 80115d8 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80115c2: f7fd f98b bl 800e8dc 80115c6: 4602 mov r2, r0 80115c8: 697b ldr r3, [r7, #20] 80115ca: 1ad3 subs r3, r2, r3 80115cc: f241 3288 movw r2, #5000 @ 0x1388 80115d0: 4293 cmp r3, r2 80115d2: d901 bls.n 80115d8 { return HAL_TIMEOUT; 80115d4: 2303 movs r3, #3 80115d6: e0ae b.n 8011736 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80115d8: 4b59 ldr r3, [pc, #356] @ (8011740 ) 80115da: 6a1b ldr r3, [r3, #32] 80115dc: f003 0302 and.w r3, r3, #2 80115e0: 2b00 cmp r3, #0 80115e2: d0ee beq.n 80115c2 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 80115e4: 4b56 ldr r3, [pc, #344] @ (8011740 ) 80115e6: 6a1b ldr r3, [r3, #32] 80115e8: f423 7240 bic.w r2, r3, #768 @ 0x300 80115ec: 687b ldr r3, [r7, #4] 80115ee: 685b ldr r3, [r3, #4] 80115f0: 4953 ldr r1, [pc, #332] @ (8011740 ) 80115f2: 4313 orrs r3, r2 80115f4: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 80115f6: 7efb ldrb r3, [r7, #27] 80115f8: 2b01 cmp r3, #1 80115fa: d105 bne.n 8011608 { __HAL_RCC_PWR_CLK_DISABLE(); 80115fc: 4b50 ldr r3, [pc, #320] @ (8011740 ) 80115fe: 69db ldr r3, [r3, #28] 8011600: 4a4f ldr r2, [pc, #316] @ (8011740 ) 8011602: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8011606: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8011608: 687b ldr r3, [r7, #4] 801160a: 681b ldr r3, [r3, #0] 801160c: f003 0302 and.w r3, r3, #2 8011610: 2b00 cmp r3, #0 8011612: d008 beq.n 8011626 { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8011614: 4b4a ldr r3, [pc, #296] @ (8011740 ) 8011616: 685b ldr r3, [r3, #4] 8011618: f423 4240 bic.w r2, r3, #49152 @ 0xc000 801161c: 687b ldr r3, [r7, #4] 801161e: 689b ldr r3, [r3, #8] 8011620: 4947 ldr r1, [pc, #284] @ (8011740 ) 8011622: 4313 orrs r3, r2 8011624: 604b str r3, [r1, #4] } #if defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ I2S2 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S2) == RCC_PERIPHCLK_I2S2) 8011626: 687b ldr r3, [r7, #4] 8011628: 681b ldr r3, [r3, #0] 801162a: f003 0304 and.w r3, r3, #4 801162e: 2b00 cmp r3, #0 8011630: d008 beq.n 8011644 { /* Check the parameters */ assert_param(IS_RCC_I2S2CLKSOURCE(PeriphClkInit->I2s2ClockSelection)); /* Configure the I2S2 clock source */ __HAL_RCC_I2S2_CONFIG(PeriphClkInit->I2s2ClockSelection); 8011632: 4b43 ldr r3, [pc, #268] @ (8011740 ) 8011634: 6adb ldr r3, [r3, #44] @ 0x2c 8011636: f423 3200 bic.w r2, r3, #131072 @ 0x20000 801163a: 687b ldr r3, [r7, #4] 801163c: 68db ldr r3, [r3, #12] 801163e: 4940 ldr r1, [pc, #256] @ (8011740 ) 8011640: 4313 orrs r3, r2 8011642: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ I2S3 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S3) == RCC_PERIPHCLK_I2S3) 8011644: 687b ldr r3, [r7, #4] 8011646: 681b ldr r3, [r3, #0] 8011648: f003 0308 and.w r3, r3, #8 801164c: 2b00 cmp r3, #0 801164e: d008 beq.n 8011662 { /* Check the parameters */ assert_param(IS_RCC_I2S3CLKSOURCE(PeriphClkInit->I2s3ClockSelection)); /* Configure the I2S3 clock source */ __HAL_RCC_I2S3_CONFIG(PeriphClkInit->I2s3ClockSelection); 8011650: 4b3b ldr r3, [pc, #236] @ (8011740 ) 8011652: 6adb ldr r3, [r3, #44] @ 0x2c 8011654: f423 2280 bic.w r2, r3, #262144 @ 0x40000 8011658: 687b ldr r3, [r7, #4] 801165a: 691b ldr r3, [r3, #16] 801165c: 4938 ldr r1, [pc, #224] @ (8011740 ) 801165e: 4313 orrs r3, r2 8011660: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ PLL I2S Configuration ----------------------*/ /* Check that PLLI2S need to be enabled */ if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S2SRC) || HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S3SRC)) 8011662: 4b37 ldr r3, [pc, #220] @ (8011740 ) 8011664: 6adb ldr r3, [r3, #44] @ 0x2c 8011666: f403 3300 and.w r3, r3, #131072 @ 0x20000 801166a: 2b00 cmp r3, #0 801166c: d105 bne.n 801167a 801166e: 4b34 ldr r3, [pc, #208] @ (8011740 ) 8011670: 6adb ldr r3, [r3, #44] @ 0x2c 8011672: f403 2380 and.w r3, r3, #262144 @ 0x40000 8011676: 2b00 cmp r3, #0 8011678: d001 beq.n 801167e { /* Update flag to indicate that PLL I2S should be active */ pllactive = 1; 801167a: 2301 movs r3, #1 801167c: 61fb str r3, [r7, #28] } /* Check if PLL I2S need to be enabled */ if (pllactive == 1) 801167e: 69fb ldr r3, [r7, #28] 8011680: 2b01 cmp r3, #1 8011682: d148 bne.n 8011716 { /* Enable PLL I2S only if not active */ if (HAL_IS_BIT_CLR(RCC->CR, RCC_CR_PLL3ON)) 8011684: 4b2e ldr r3, [pc, #184] @ (8011740 ) 8011686: 681b ldr r3, [r3, #0] 8011688: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 801168c: 2b00 cmp r3, #0 801168e: d138 bne.n 8011702 assert_param(IS_RCC_PLLI2S_MUL(PeriphClkInit->PLLI2S.PLLI2SMUL)); assert_param(IS_RCC_HSE_PREDIV2(PeriphClkInit->PLLI2S.HSEPrediv2Value)); /* Prediv2 can be written only when the PLL2 is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 8011690: 4b2b ldr r3, [pc, #172] @ (8011740 ) 8011692: 681b ldr r3, [r3, #0] 8011694: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8011698: 2b00 cmp r3, #0 801169a: d009 beq.n 80116b0 (__HAL_RCC_HSE_GET_PREDIV2() != PeriphClkInit->PLLI2S.HSEPrediv2Value)) 801169c: 4b28 ldr r3, [pc, #160] @ (8011740 ) 801169e: 6adb ldr r3, [r3, #44] @ 0x2c 80116a0: f003 02f0 and.w r2, r3, #240 @ 0xf0 80116a4: 687b ldr r3, [r7, #4] 80116a6: 699b ldr r3, [r3, #24] if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 80116a8: 429a cmp r2, r3 80116aa: d001 beq.n 80116b0 { return HAL_ERROR; 80116ac: 2301 movs r3, #1 80116ae: e042 b.n 8011736 } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(PeriphClkInit->PLLI2S.HSEPrediv2Value); 80116b0: 4b23 ldr r3, [pc, #140] @ (8011740 ) 80116b2: 6adb ldr r3, [r3, #44] @ 0x2c 80116b4: f023 02f0 bic.w r2, r3, #240 @ 0xf0 80116b8: 687b ldr r3, [r7, #4] 80116ba: 699b ldr r3, [r3, #24] 80116bc: 4920 ldr r1, [pc, #128] @ (8011740 ) 80116be: 4313 orrs r3, r2 80116c0: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLLI2S multiplication factors. */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SMUL); 80116c2: 4b1f ldr r3, [pc, #124] @ (8011740 ) 80116c4: 6adb ldr r3, [r3, #44] @ 0x2c 80116c6: f423 4270 bic.w r2, r3, #61440 @ 0xf000 80116ca: 687b ldr r3, [r7, #4] 80116cc: 695b ldr r3, [r3, #20] 80116ce: 491c ldr r1, [pc, #112] @ (8011740 ) 80116d0: 4313 orrs r3, r2 80116d2: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLLI2S. */ __HAL_RCC_PLLI2S_ENABLE(); 80116d4: 4b1d ldr r3, [pc, #116] @ (801174c ) 80116d6: 2201 movs r2, #1 80116d8: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 80116da: f7fd f8ff bl 800e8dc 80116de: 6178 str r0, [r7, #20] /* Wait till PLLI2S is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 80116e0: e008 b.n 80116f4 { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 80116e2: f7fd f8fb bl 800e8dc 80116e6: 4602 mov r2, r0 80116e8: 697b ldr r3, [r7, #20] 80116ea: 1ad3 subs r3, r2, r3 80116ec: 2b64 cmp r3, #100 @ 0x64 80116ee: d901 bls.n 80116f4 { return HAL_TIMEOUT; 80116f0: 2303 movs r3, #3 80116f2: e020 b.n 8011736 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 80116f4: 4b12 ldr r3, [pc, #72] @ (8011740 ) 80116f6: 681b ldr r3, [r3, #0] 80116f8: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 80116fc: 2b00 cmp r3, #0 80116fe: d0f0 beq.n 80116e2 8011700: e009 b.n 8011716 } } else { /* Return an error only if user wants to change the PLLI2SMUL whereas PLLI2S is active */ if (READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL3MUL) != PeriphClkInit->PLLI2S.PLLI2SMUL) 8011702: 4b0f ldr r3, [pc, #60] @ (8011740 ) 8011704: 6adb ldr r3, [r3, #44] @ 0x2c 8011706: f403 4270 and.w r2, r3, #61440 @ 0xf000 801170a: 687b ldr r3, [r7, #4] 801170c: 695b ldr r3, [r3, #20] 801170e: 429a cmp r2, r3 8011710: d001 beq.n 8011716 { return HAL_ERROR; 8011712: 2301 movs r3, #1 8011714: e00f b.n 8011736 #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 8011716: 687b ldr r3, [r7, #4] 8011718: 681b ldr r3, [r3, #0] 801171a: f003 0310 and.w r3, r3, #16 801171e: 2b00 cmp r3, #0 8011720: d008 beq.n 8011734 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8011722: 4b07 ldr r3, [pc, #28] @ (8011740 ) 8011724: 685b ldr r3, [r3, #4] 8011726: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 801172a: 687b ldr r3, [r7, #4] 801172c: 69db ldr r3, [r3, #28] 801172e: 4904 ldr r1, [pc, #16] @ (8011740 ) 8011730: 4313 orrs r3, r2 8011732: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8011734: 2300 movs r3, #0 } 8011736: 4618 mov r0, r3 8011738: 3720 adds r7, #32 801173a: 46bd mov sp, r7 801173c: bd80 pop {r7, pc} 801173e: bf00 nop 8011740: 40021000 .word 0x40021000 8011744: 40007000 .word 0x40007000 8011748: 42420440 .word 0x42420440 801174c: 42420070 .word 0x42420070 08011750 : * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock @endif * @retval Frequency in Hz (0: means that no available frequency for the peripheral) */ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) { 8011750: b580 push {r7, lr} 8011752: b08a sub sp, #40 @ 0x28 8011754: af00 add r7, sp, #0 8011756: 6078 str r0, [r7, #4] #if defined(STM32F105xC) || defined(STM32F107xC) static const uint8_t aPLLMULFactorTable[14U] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; static const uint8_t aPredivFactorTable[16U] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; 8011758: 2300 movs r3, #0 801175a: 61fb str r3, [r7, #28] 801175c: 2300 movs r3, #0 801175e: 627b str r3, [r7, #36] @ 0x24 8011760: 2300 movs r3, #0 8011762: 61bb str r3, [r7, #24] uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U; 8011764: 2300 movs r3, #0 8011766: 617b str r3, [r7, #20] 8011768: 2300 movs r3, #0 801176a: 613b str r3, [r7, #16] 801176c: 2300 movs r3, #0 801176e: 60fb str r3, [r7, #12] static const uint8_t aPLLMULFactorTable[16U] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; static const uint8_t aPredivFactorTable[2U] = {1, 2}; uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG */ uint32_t temp_reg = 0U, frequency = 0U; 8011770: 2300 movs r3, #0 8011772: 60bb str r3, [r7, #8] 8011774: 2300 movs r3, #0 8011776: 623b str r3, [r7, #32] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); switch (PeriphClk) 8011778: 687b ldr r3, [r7, #4] 801177a: 3b01 subs r3, #1 801177c: 2b0f cmp r3, #15 801177e: f200 811d bhi.w 80119bc 8011782: a201 add r2, pc, #4 @ (adr r2, 8011788 ) 8011784: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8011788: 0801193d .word 0x0801193d 801178c: 080119a1 .word 0x080119a1 8011790: 080119bd .word 0x080119bd 8011794: 0801189b .word 0x0801189b 8011798: 080119bd .word 0x080119bd 801179c: 080119bd .word 0x080119bd 80117a0: 080119bd .word 0x080119bd 80117a4: 080118ed .word 0x080118ed 80117a8: 080119bd .word 0x080119bd 80117ac: 080119bd .word 0x080119bd 80117b0: 080119bd .word 0x080119bd 80117b4: 080119bd .word 0x080119bd 80117b8: 080119bd .word 0x080119bd 80117bc: 080119bd .word 0x080119bd 80117c0: 080119bd .word 0x080119bd 80117c4: 080117c9 .word 0x080117c9 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) case RCC_PERIPHCLK_USB: { /* Get RCC configuration ------------------------------------------------------*/ temp_reg = RCC->CFGR; 80117c8: 4b83 ldr r3, [pc, #524] @ (80119d8 ) 80117ca: 685b ldr r3, [r3, #4] 80117cc: 60bb str r3, [r7, #8] /* Check if PLL is enabled */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLON)) 80117ce: 4b82 ldr r3, [pc, #520] @ (80119d8 ) 80117d0: 681b ldr r3, [r3, #0] 80117d2: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 80117d6: 2b00 cmp r3, #0 80117d8: f000 80f2 beq.w 80119c0 { pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80117dc: 68bb ldr r3, [r7, #8] 80117de: 0c9b lsrs r3, r3, #18 80117e0: f003 030f and.w r3, r3, #15 80117e4: 4a7d ldr r2, [pc, #500] @ (80119dc ) 80117e6: 5cd3 ldrb r3, [r2, r3] 80117e8: 61bb str r3, [r7, #24] if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80117ea: 68bb ldr r3, [r7, #8] 80117ec: f403 3380 and.w r3, r3, #65536 @ 0x10000 80117f0: 2b00 cmp r3, #0 80117f2: d03b beq.n 801186c { #if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\ || defined(STM32F100xE) prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 80117f4: 4b78 ldr r3, [pc, #480] @ (80119d8 ) 80117f6: 6adb ldr r3, [r3, #44] @ 0x2c 80117f8: f003 030f and.w r3, r3, #15 80117fc: 4a78 ldr r2, [pc, #480] @ (80119e0 ) 80117fe: 5cd3 ldrb r3, [r2, r3] 8011800: 61fb str r3, [r7, #28] #else prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ #if defined(STM32F105xC) || defined(STM32F107xC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 8011802: 4b75 ldr r3, [pc, #468] @ (80119d8 ) 8011804: 6adb ldr r3, [r3, #44] @ 0x2c 8011806: f403 3380 and.w r3, r3, #65536 @ 0x10000 801180a: 2b00 cmp r3, #0 801180c: d01c beq.n 8011848 { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 801180e: 4b72 ldr r3, [pc, #456] @ (80119d8 ) 8011810: 6adb ldr r3, [r3, #44] @ 0x2c 8011812: 091b lsrs r3, r3, #4 8011814: f003 030f and.w r3, r3, #15 8011818: 3301 adds r3, #1 801181a: 60fb str r3, [r7, #12] pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 801181c: 4b6e ldr r3, [pc, #440] @ (80119d8 ) 801181e: 6adb ldr r3, [r3, #44] @ 0x2c 8011820: 0a1b lsrs r3, r3, #8 8011822: f003 030f and.w r3, r3, #15 8011826: 3302 adds r3, #2 8011828: 617b str r3, [r7, #20] pllclk = (uint32_t)((((HSE_VALUE / prediv2) * pll2mul) / prediv1) * pllmul); 801182a: 4a6e ldr r2, [pc, #440] @ (80119e4 ) 801182c: 68fb ldr r3, [r7, #12] 801182e: fbb2 f3f3 udiv r3, r2, r3 8011832: 697a ldr r2, [r7, #20] 8011834: fb03 f202 mul.w r2, r3, r2 8011838: 69fb ldr r3, [r7, #28] 801183a: fbb2 f2f3 udiv r2, r2, r3 801183e: 69bb ldr r3, [r7, #24] 8011840: fb02 f303 mul.w r3, r2, r3 8011844: 627b str r3, [r7, #36] @ 0x24 8011846: e007 b.n 8011858 } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 8011848: 4a66 ldr r2, [pc, #408] @ (80119e4 ) 801184a: 69fb ldr r3, [r7, #28] 801184c: fbb2 f2f3 udiv r2, r2, r3 8011850: 69bb ldr r3, [r7, #24] 8011852: fb02 f303 mul.w r3, r2, r3 8011856: 627b str r3, [r7, #36] @ 0x24 } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 8011858: 4b60 ldr r3, [pc, #384] @ (80119dc ) 801185a: 7b5b ldrb r3, [r3, #13] 801185c: 461a mov r2, r3 801185e: 69bb ldr r3, [r7, #24] 8011860: 4293 cmp r3, r2 8011862: d108 bne.n 8011876 { pllclk = pllclk / 2; 8011864: 6a7b ldr r3, [r7, #36] @ 0x24 8011866: 085b lsrs r3, r3, #1 8011868: 627b str r3, [r7, #36] @ 0x24 801186a: e004 b.n 8011876 #endif /* STM32F105xC || STM32F107xC */ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 801186c: 69bb ldr r3, [r7, #24] 801186e: 4a5e ldr r2, [pc, #376] @ (80119e8 ) 8011870: fb02 f303 mul.w r3, r2, r3 8011874: 627b str r3, [r7, #36] @ 0x24 } /* Calcul of the USB frequency*/ #if defined(STM32F105xC) || defined(STM32F107xC) /* USBCLK = PLLVCO = (2 x PLLCLK) / USB prescaler */ if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL_DIV2) 8011876: 4b58 ldr r3, [pc, #352] @ (80119d8 ) 8011878: 685b ldr r3, [r3, #4] 801187a: f403 0380 and.w r3, r3, #4194304 @ 0x400000 801187e: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8011882: d102 bne.n 801188a { /* Prescaler of 2 selected for USB */ frequency = pllclk; 8011884: 6a7b ldr r3, [r7, #36] @ 0x24 8011886: 623b str r3, [r7, #32] /* Prescaler of 1.5 selected for USB */ frequency = (pllclk * 2) / 3; } #endif } break; 8011888: e09a b.n 80119c0 frequency = (2 * pllclk) / 3; 801188a: 6a7b ldr r3, [r7, #36] @ 0x24 801188c: 005b lsls r3, r3, #1 801188e: 4a57 ldr r2, [pc, #348] @ (80119ec ) 8011890: fba2 2303 umull r2, r3, r2, r3 8011894: 085b lsrs r3, r3, #1 8011896: 623b str r3, [r7, #32] break; 8011898: e092 b.n 80119c0 { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S2_SOURCE() == RCC_I2S2CLKSOURCE_SYSCLK) 801189a: 4b4f ldr r3, [pc, #316] @ (80119d8 ) 801189c: 6adb ldr r3, [r3, #44] @ 0x2c 801189e: f403 3300 and.w r3, r3, #131072 @ 0x20000 80118a2: 2b00 cmp r3, #0 80118a4: d103 bne.n 80118ae { /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); 80118a6: f7ff fd15 bl 80112d4 80118aa: 6238 str r0, [r7, #32] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 80118ac: e08a b.n 80119c4 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 80118ae: 4b4a ldr r3, [pc, #296] @ (80119d8 ) 80118b0: 681b ldr r3, [r3, #0] 80118b2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80118b6: 2b00 cmp r3, #0 80118b8: f000 8084 beq.w 80119c4 prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 80118bc: 4b46 ldr r3, [pc, #280] @ (80119d8 ) 80118be: 6adb ldr r3, [r3, #44] @ 0x2c 80118c0: 091b lsrs r3, r3, #4 80118c2: f003 030f and.w r3, r3, #15 80118c6: 3301 adds r3, #1 80118c8: 60fb str r3, [r7, #12] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 80118ca: 4b43 ldr r3, [pc, #268] @ (80119d8 ) 80118cc: 6adb ldr r3, [r3, #44] @ 0x2c 80118ce: 0b1b lsrs r3, r3, #12 80118d0: f003 030f and.w r3, r3, #15 80118d4: 3302 adds r3, #2 80118d6: 613b str r3, [r7, #16] frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 80118d8: 4a42 ldr r2, [pc, #264] @ (80119e4 ) 80118da: 68fb ldr r3, [r7, #12] 80118dc: fbb2 f3f3 udiv r3, r2, r3 80118e0: 693a ldr r2, [r7, #16] 80118e2: fb02 f303 mul.w r3, r2, r3 80118e6: 005b lsls r3, r3, #1 80118e8: 623b str r3, [r7, #32] break; 80118ea: e06b b.n 80119c4 { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S3_SOURCE() == RCC_I2S3CLKSOURCE_SYSCLK) 80118ec: 4b3a ldr r3, [pc, #232] @ (80119d8 ) 80118ee: 6adb ldr r3, [r3, #44] @ 0x2c 80118f0: f403 2380 and.w r3, r3, #262144 @ 0x40000 80118f4: 2b00 cmp r3, #0 80118f6: d103 bne.n 8011900 { /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); 80118f8: f7ff fcec bl 80112d4 80118fc: 6238 str r0, [r7, #32] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 80118fe: e063 b.n 80119c8 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 8011900: 4b35 ldr r3, [pc, #212] @ (80119d8 ) 8011902: 681b ldr r3, [r3, #0] 8011904: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8011908: 2b00 cmp r3, #0 801190a: d05d beq.n 80119c8 prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 801190c: 4b32 ldr r3, [pc, #200] @ (80119d8 ) 801190e: 6adb ldr r3, [r3, #44] @ 0x2c 8011910: 091b lsrs r3, r3, #4 8011912: f003 030f and.w r3, r3, #15 8011916: 3301 adds r3, #1 8011918: 60fb str r3, [r7, #12] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 801191a: 4b2f ldr r3, [pc, #188] @ (80119d8 ) 801191c: 6adb ldr r3, [r3, #44] @ 0x2c 801191e: 0b1b lsrs r3, r3, #12 8011920: f003 030f and.w r3, r3, #15 8011924: 3302 adds r3, #2 8011926: 613b str r3, [r7, #16] frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 8011928: 4a2e ldr r2, [pc, #184] @ (80119e4 ) 801192a: 68fb ldr r3, [r7, #12] 801192c: fbb2 f3f3 udiv r3, r2, r3 8011930: 693a ldr r2, [r7, #16] 8011932: fb02 f303 mul.w r3, r2, r3 8011936: 005b lsls r3, r3, #1 8011938: 623b str r3, [r7, #32] break; 801193a: e045 b.n 80119c8 } #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ case RCC_PERIPHCLK_RTC: { /* Get RCC BDCR configuration ------------------------------------------------------*/ temp_reg = RCC->BDCR; 801193c: 4b26 ldr r3, [pc, #152] @ (80119d8 ) 801193e: 6a1b ldr r3, [r3, #32] 8011940: 60bb str r3, [r7, #8] /* Check if LSE is ready if RTC clock selection is LSE */ if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) 8011942: 68bb ldr r3, [r7, #8] 8011944: f403 7340 and.w r3, r3, #768 @ 0x300 8011948: f5b3 7f80 cmp.w r3, #256 @ 0x100 801194c: d108 bne.n 8011960 801194e: 68bb ldr r3, [r7, #8] 8011950: f003 0302 and.w r3, r3, #2 8011954: 2b00 cmp r3, #0 8011956: d003 beq.n 8011960 { frequency = LSE_VALUE; 8011958: f44f 4300 mov.w r3, #32768 @ 0x8000 801195c: 623b str r3, [r7, #32] 801195e: e01e b.n 801199e } /* Check if LSI is ready if RTC clock selection is LSI */ else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) 8011960: 68bb ldr r3, [r7, #8] 8011962: f403 7340 and.w r3, r3, #768 @ 0x300 8011966: f5b3 7f00 cmp.w r3, #512 @ 0x200 801196a: d109 bne.n 8011980 801196c: 4b1a ldr r3, [pc, #104] @ (80119d8 ) 801196e: 6a5b ldr r3, [r3, #36] @ 0x24 8011970: f003 0302 and.w r3, r3, #2 8011974: 2b00 cmp r3, #0 8011976: d003 beq.n 8011980 { frequency = LSI_VALUE; 8011978: f649 4340 movw r3, #40000 @ 0x9c40 801197c: 623b str r3, [r7, #32] 801197e: e00e b.n 801199e } else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) 8011980: 68bb ldr r3, [r7, #8] 8011982: f403 7340 and.w r3, r3, #768 @ 0x300 8011986: f5b3 7f40 cmp.w r3, #768 @ 0x300 801198a: d11f bne.n 80119cc 801198c: 4b12 ldr r3, [pc, #72] @ (80119d8 ) 801198e: 681b ldr r3, [r3, #0] 8011990: f403 3300 and.w r3, r3, #131072 @ 0x20000 8011994: 2b00 cmp r3, #0 8011996: d019 beq.n 80119cc { frequency = HSE_VALUE / 128U; 8011998: 4b15 ldr r3, [pc, #84] @ (80119f0 ) 801199a: 623b str r3, [r7, #32] /* Clock not enabled for RTC*/ else { /* nothing to do: frequency already initialized to 0U */ } break; 801199c: e016 b.n 80119cc 801199e: e015 b.n 80119cc } case RCC_PERIPHCLK_ADC: { frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); 80119a0: f7ff fd72 bl 8011488 80119a4: 4602 mov r2, r0 80119a6: 4b0c ldr r3, [pc, #48] @ (80119d8 ) 80119a8: 685b ldr r3, [r3, #4] 80119aa: 0b9b lsrs r3, r3, #14 80119ac: f003 0303 and.w r3, r3, #3 80119b0: 3301 adds r3, #1 80119b2: 005b lsls r3, r3, #1 80119b4: fbb2 f3f3 udiv r3, r2, r3 80119b8: 623b str r3, [r7, #32] break; 80119ba: e008 b.n 80119ce } default: { break; 80119bc: bf00 nop 80119be: e006 b.n 80119ce break; 80119c0: bf00 nop 80119c2: e004 b.n 80119ce break; 80119c4: bf00 nop 80119c6: e002 b.n 80119ce break; 80119c8: bf00 nop 80119ca: e000 b.n 80119ce break; 80119cc: bf00 nop } } return (frequency); 80119ce: 6a3b ldr r3, [r7, #32] } 80119d0: 4618 mov r0, r3 80119d2: 3728 adds r7, #40 @ 0x28 80119d4: 46bd mov sp, r7 80119d6: bd80 pop {r7, pc} 80119d8: 40021000 .word 0x40021000 80119dc: 08016d50 .word 0x08016d50 80119e0: 08016d60 .word 0x08016d60 80119e4: 017d7840 .word 0x017d7840 80119e8: 003d0900 .word 0x003d0900 80119ec: aaaaaaab .word 0xaaaaaaab 80119f0: 0002faf0 .word 0x0002faf0 080119f4 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { 80119f4: b580 push {r7, lr} 80119f6: b084 sub sp, #16 80119f8: af00 add r7, sp, #0 80119fa: 6078 str r0, [r7, #4] uint32_t prescaler = 0U; 80119fc: 2300 movs r3, #0 80119fe: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 8011a00: 687b ldr r3, [r7, #4] 8011a02: 2b00 cmp r3, #0 8011a04: d101 bne.n 8011a0a { return HAL_ERROR; 8011a06: 2301 movs r3, #1 8011a08: e07a b.n 8011b00 { hrtc->MspDeInitCallback = HAL_RTC_MspDeInit; } } #else if (hrtc->State == HAL_RTC_STATE_RESET) 8011a0a: 687b ldr r3, [r7, #4] 8011a0c: 7c5b ldrb r3, [r3, #17] 8011a0e: b2db uxtb r3, r3 8011a10: 2b00 cmp r3, #0 8011a12: d105 bne.n 8011a20 { /* Allocate lock resource and initialize it */ hrtc->Lock = HAL_UNLOCKED; 8011a14: 687b ldr r3, [r7, #4] 8011a16: 2200 movs r2, #0 8011a18: 741a strb r2, [r3, #16] /* Initialize RTC MSP */ HAL_RTC_MspInit(hrtc); 8011a1a: 6878 ldr r0, [r7, #4] 8011a1c: f7fb fc82 bl 800d324 } #endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */ /* Set RTC state */ hrtc->State = HAL_RTC_STATE_BUSY; 8011a20: 687b ldr r3, [r7, #4] 8011a22: 2202 movs r2, #2 8011a24: 745a strb r2, [r3, #17] /* Waiting for synchro */ if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) 8011a26: 6878 ldr r0, [r7, #4] 8011a28: f000 f870 bl 8011b0c 8011a2c: 4603 mov r3, r0 8011a2e: 2b00 cmp r3, #0 8011a30: d004 beq.n 8011a3c { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 8011a32: 687b ldr r3, [r7, #4] 8011a34: 2204 movs r2, #4 8011a36: 745a strb r2, [r3, #17] return HAL_ERROR; 8011a38: 2301 movs r3, #1 8011a3a: e061 b.n 8011b00 } /* Set Initialization mode */ if (RTC_EnterInitMode(hrtc) != HAL_OK) 8011a3c: 6878 ldr r0, [r7, #4] 8011a3e: f000 f892 bl 8011b66 8011a42: 4603 mov r3, r0 8011a44: 2b00 cmp r3, #0 8011a46: d004 beq.n 8011a52 { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 8011a48: 687b ldr r3, [r7, #4] 8011a4a: 2204 movs r2, #4 8011a4c: 745a strb r2, [r3, #17] return HAL_ERROR; 8011a4e: 2301 movs r3, #1 8011a50: e056 b.n 8011b00 } else { /* Clear Flags Bits */ CLEAR_BIT(hrtc->Instance->CRL, (RTC_FLAG_OW | RTC_FLAG_ALRAF | RTC_FLAG_SEC)); 8011a52: 687b ldr r3, [r7, #4] 8011a54: 681b ldr r3, [r3, #0] 8011a56: 685a ldr r2, [r3, #4] 8011a58: 687b ldr r3, [r7, #4] 8011a5a: 681b ldr r3, [r3, #0] 8011a5c: f022 0207 bic.w r2, r2, #7 8011a60: 605a str r2, [r3, #4] if (hrtc->Init.OutPut != RTC_OUTPUTSOURCE_NONE) 8011a62: 687b ldr r3, [r7, #4] 8011a64: 689b ldr r3, [r3, #8] 8011a66: 2b00 cmp r3, #0 8011a68: d005 beq.n 8011a76 { /* Disable the selected Tamper pin */ CLEAR_BIT(BKP->CR, BKP_CR_TPE); 8011a6a: 4b27 ldr r3, [pc, #156] @ (8011b08 ) 8011a6c: 6b1b ldr r3, [r3, #48] @ 0x30 8011a6e: 4a26 ldr r2, [pc, #152] @ (8011b08 ) 8011a70: f023 0301 bic.w r3, r3, #1 8011a74: 6313 str r3, [r2, #48] @ 0x30 } /* Set the signal which will be routed to RTC Tamper pin*/ MODIFY_REG(BKP->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), hrtc->Init.OutPut); 8011a76: 4b24 ldr r3, [pc, #144] @ (8011b08 ) 8011a78: 6adb ldr r3, [r3, #44] @ 0x2c 8011a7a: f423 7260 bic.w r2, r3, #896 @ 0x380 8011a7e: 687b ldr r3, [r7, #4] 8011a80: 689b ldr r3, [r3, #8] 8011a82: 4921 ldr r1, [pc, #132] @ (8011b08 ) 8011a84: 4313 orrs r3, r2 8011a86: 62cb str r3, [r1, #44] @ 0x2c if (hrtc->Init.AsynchPrediv != RTC_AUTO_1_SECOND) 8011a88: 687b ldr r3, [r7, #4] 8011a8a: 685b ldr r3, [r3, #4] 8011a8c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8011a90: d003 beq.n 8011a9a { /* RTC Prescaler provided directly by end-user*/ prescaler = hrtc->Init.AsynchPrediv; 8011a92: 687b ldr r3, [r7, #4] 8011a94: 685b ldr r3, [r3, #4] 8011a96: 60fb str r3, [r7, #12] 8011a98: e00e b.n 8011ab8 } else { /* RTC Prescaler will be automatically calculated to get 1 second timebase */ /* Get the RTCCLK frequency */ prescaler = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_RTC); 8011a9a: 2001 movs r0, #1 8011a9c: f7ff fe58 bl 8011750 8011aa0: 60f8 str r0, [r7, #12] /* Check that RTC clock is enabled*/ if (prescaler == 0U) 8011aa2: 68fb ldr r3, [r7, #12] 8011aa4: 2b00 cmp r3, #0 8011aa6: d104 bne.n 8011ab2 { /* Should not happen. Frequency is not available*/ hrtc->State = HAL_RTC_STATE_ERROR; 8011aa8: 687b ldr r3, [r7, #4] 8011aaa: 2204 movs r2, #4 8011aac: 745a strb r2, [r3, #17] return HAL_ERROR; 8011aae: 2301 movs r3, #1 8011ab0: e026 b.n 8011b00 } else { /* RTC period = RTCCLK/(RTC_PR + 1) */ prescaler = prescaler - 1U; 8011ab2: 68fb ldr r3, [r7, #12] 8011ab4: 3b01 subs r3, #1 8011ab6: 60fb str r3, [r7, #12] } } /* Configure the RTC_PRLH / RTC_PRLL */ WRITE_REG(hrtc->Instance->PRLH, ((prescaler >> 16U) & RTC_PRLH_PRL)); 8011ab8: 68fb ldr r3, [r7, #12] 8011aba: 0c1a lsrs r2, r3, #16 8011abc: 687b ldr r3, [r7, #4] 8011abe: 681b ldr r3, [r3, #0] 8011ac0: f002 020f and.w r2, r2, #15 8011ac4: 609a str r2, [r3, #8] WRITE_REG(hrtc->Instance->PRLL, (prescaler & RTC_PRLL_PRL)); 8011ac6: 687b ldr r3, [r7, #4] 8011ac8: 681b ldr r3, [r3, #0] 8011aca: 68fa ldr r2, [r7, #12] 8011acc: b292 uxth r2, r2 8011ace: 60da str r2, [r3, #12] /* Wait for synchro */ if (RTC_ExitInitMode(hrtc) != HAL_OK) 8011ad0: 6878 ldr r0, [r7, #4] 8011ad2: f000 f870 bl 8011bb6 8011ad6: 4603 mov r3, r0 8011ad8: 2b00 cmp r3, #0 8011ada: d004 beq.n 8011ae6 { hrtc->State = HAL_RTC_STATE_ERROR; 8011adc: 687b ldr r3, [r7, #4] 8011ade: 2204 movs r2, #4 8011ae0: 745a strb r2, [r3, #17] return HAL_ERROR; 8011ae2: 2301 movs r3, #1 8011ae4: e00c b.n 8011b00 } /* Initialize date to 1st of January 2000 */ hrtc->DateToUpdate.Year = 0x00U; 8011ae6: 687b ldr r3, [r7, #4] 8011ae8: 2200 movs r2, #0 8011aea: 73da strb r2, [r3, #15] hrtc->DateToUpdate.Month = RTC_MONTH_JANUARY; 8011aec: 687b ldr r3, [r7, #4] 8011aee: 2201 movs r2, #1 8011af0: 735a strb r2, [r3, #13] hrtc->DateToUpdate.Date = 0x01U; 8011af2: 687b ldr r3, [r7, #4] 8011af4: 2201 movs r2, #1 8011af6: 739a strb r2, [r3, #14] /* Set RTC state */ hrtc->State = HAL_RTC_STATE_READY; 8011af8: 687b ldr r3, [r7, #4] 8011afa: 2201 movs r2, #1 8011afc: 745a strb r2, [r3, #17] return HAL_OK; 8011afe: 2300 movs r3, #0 } } 8011b00: 4618 mov r0, r3 8011b02: 3710 adds r7, #16 8011b04: 46bd mov sp, r7 8011b06: bd80 pop {r7, pc} 8011b08: 40006c00 .word 0x40006c00 08011b0c : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc) { 8011b0c: b580 push {r7, lr} 8011b0e: b084 sub sp, #16 8011b10: af00 add r7, sp, #0 8011b12: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8011b14: 2300 movs r3, #0 8011b16: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 8011b18: 687b ldr r3, [r7, #4] 8011b1a: 2b00 cmp r3, #0 8011b1c: d101 bne.n 8011b22 { return HAL_ERROR; 8011b1e: 2301 movs r3, #1 8011b20: e01d b.n 8011b5e } /* Clear RSF flag */ CLEAR_BIT(hrtc->Instance->CRL, RTC_FLAG_RSF); 8011b22: 687b ldr r3, [r7, #4] 8011b24: 681b ldr r3, [r3, #0] 8011b26: 685a ldr r2, [r3, #4] 8011b28: 687b ldr r3, [r7, #4] 8011b2a: 681b ldr r3, [r3, #0] 8011b2c: f022 0208 bic.w r2, r2, #8 8011b30: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8011b32: f7fc fed3 bl 800e8dc 8011b36: 60f8 str r0, [r7, #12] /* Wait the registers to be synchronised */ while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 8011b38: e009 b.n 8011b4e { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8011b3a: f7fc fecf bl 800e8dc 8011b3e: 4602 mov r2, r0 8011b40: 68fb ldr r3, [r7, #12] 8011b42: 1ad3 subs r3, r2, r3 8011b44: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8011b48: d901 bls.n 8011b4e { return HAL_TIMEOUT; 8011b4a: 2303 movs r3, #3 8011b4c: e007 b.n 8011b5e while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 8011b4e: 687b ldr r3, [r7, #4] 8011b50: 681b ldr r3, [r3, #0] 8011b52: 685b ldr r3, [r3, #4] 8011b54: f003 0308 and.w r3, r3, #8 8011b58: 2b00 cmp r3, #0 8011b5a: d0ee beq.n 8011b3a } } return HAL_OK; 8011b5c: 2300 movs r3, #0 } 8011b5e: 4618 mov r0, r3 8011b60: 3710 adds r7, #16 8011b62: 46bd mov sp, r7 8011b64: bd80 pop {r7, pc} 08011b66 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc) { 8011b66: b580 push {r7, lr} 8011b68: b084 sub sp, #16 8011b6a: af00 add r7, sp, #0 8011b6c: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8011b6e: 2300 movs r3, #0 8011b70: 60fb str r3, [r7, #12] tickstart = HAL_GetTick(); 8011b72: f7fc feb3 bl 800e8dc 8011b76: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011b78: e009 b.n 8011b8e { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8011b7a: f7fc feaf bl 800e8dc 8011b7e: 4602 mov r2, r0 8011b80: 68fb ldr r3, [r7, #12] 8011b82: 1ad3 subs r3, r2, r3 8011b84: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8011b88: d901 bls.n 8011b8e { return HAL_TIMEOUT; 8011b8a: 2303 movs r3, #3 8011b8c: e00f b.n 8011bae while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011b8e: 687b ldr r3, [r7, #4] 8011b90: 681b ldr r3, [r3, #0] 8011b92: 685b ldr r3, [r3, #4] 8011b94: f003 0320 and.w r3, r3, #32 8011b98: 2b00 cmp r3, #0 8011b9a: d0ee beq.n 8011b7a } } /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); 8011b9c: 687b ldr r3, [r7, #4] 8011b9e: 681b ldr r3, [r3, #0] 8011ba0: 685a ldr r2, [r3, #4] 8011ba2: 687b ldr r3, [r7, #4] 8011ba4: 681b ldr r3, [r3, #0] 8011ba6: f042 0210 orr.w r2, r2, #16 8011baa: 605a str r2, [r3, #4] return HAL_OK; 8011bac: 2300 movs r3, #0 } 8011bae: 4618 mov r0, r3 8011bb0: 3710 adds r7, #16 8011bb2: 46bd mov sp, r7 8011bb4: bd80 pop {r7, pc} 08011bb6 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc) { 8011bb6: b580 push {r7, lr} 8011bb8: b084 sub sp, #16 8011bba: af00 add r7, sp, #0 8011bbc: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8011bbe: 2300 movs r3, #0 8011bc0: 60fb str r3, [r7, #12] /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 8011bc2: 687b ldr r3, [r7, #4] 8011bc4: 681b ldr r3, [r3, #0] 8011bc6: 685a ldr r2, [r3, #4] 8011bc8: 687b ldr r3, [r7, #4] 8011bca: 681b ldr r3, [r3, #0] 8011bcc: f022 0210 bic.w r2, r2, #16 8011bd0: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8011bd2: f7fc fe83 bl 800e8dc 8011bd6: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011bd8: e009 b.n 8011bee { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8011bda: f7fc fe7f bl 800e8dc 8011bde: 4602 mov r2, r0 8011be0: 68fb ldr r3, [r7, #12] 8011be2: 1ad3 subs r3, r2, r3 8011be4: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8011be8: d901 bls.n 8011bee { return HAL_TIMEOUT; 8011bea: 2303 movs r3, #3 8011bec: e007 b.n 8011bfe while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011bee: 687b ldr r3, [r7, #4] 8011bf0: 681b ldr r3, [r3, #0] 8011bf2: 685b ldr r3, [r3, #4] 8011bf4: f003 0320 and.w r3, r3, #32 8011bf8: 2b00 cmp r3, #0 8011bfa: d0ee beq.n 8011bda } } return HAL_OK; 8011bfc: 2300 movs r3, #0 } 8011bfe: 4618 mov r0, r3 8011c00: 3710 adds r7, #16 8011c02: 46bd mov sp, r7 8011c04: bd80 pop {r7, pc} 08011c06 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8011c06: b580 push {r7, lr} 8011c08: b082 sub sp, #8 8011c0a: af00 add r7, sp, #0 8011c0c: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8011c0e: 687b ldr r3, [r7, #4] 8011c10: 2b00 cmp r3, #0 8011c12: d101 bne.n 8011c18 { return HAL_ERROR; 8011c14: 2301 movs r3, #1 8011c16: e041 b.n 8011c9c assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8011c18: 687b ldr r3, [r7, #4] 8011c1a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8011c1e: b2db uxtb r3, r3 8011c20: 2b00 cmp r3, #0 8011c22: d106 bne.n 8011c32 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8011c24: 687b ldr r3, [r7, #4] 8011c26: 2200 movs r2, #0 8011c28: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8011c2c: 6878 ldr r0, [r7, #4] 8011c2e: f7fc fb7f bl 800e330 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8011c32: 687b ldr r3, [r7, #4] 8011c34: 2202 movs r2, #2 8011c36: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8011c3a: 687b ldr r3, [r7, #4] 8011c3c: 681a ldr r2, [r3, #0] 8011c3e: 687b ldr r3, [r7, #4] 8011c40: 3304 adds r3, #4 8011c42: 4619 mov r1, r3 8011c44: 4610 mov r0, r2 8011c46: f000 fab9 bl 80121bc /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8011c4a: 687b ldr r3, [r7, #4] 8011c4c: 2201 movs r2, #1 8011c4e: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011c52: 687b ldr r3, [r7, #4] 8011c54: 2201 movs r2, #1 8011c56: f883 203e strb.w r2, [r3, #62] @ 0x3e 8011c5a: 687b ldr r3, [r7, #4] 8011c5c: 2201 movs r2, #1 8011c5e: f883 203f strb.w r2, [r3, #63] @ 0x3f 8011c62: 687b ldr r3, [r7, #4] 8011c64: 2201 movs r2, #1 8011c66: f883 2040 strb.w r2, [r3, #64] @ 0x40 8011c6a: 687b ldr r3, [r7, #4] 8011c6c: 2201 movs r2, #1 8011c6e: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011c72: 687b ldr r3, [r7, #4] 8011c74: 2201 movs r2, #1 8011c76: f883 2042 strb.w r2, [r3, #66] @ 0x42 8011c7a: 687b ldr r3, [r7, #4] 8011c7c: 2201 movs r2, #1 8011c7e: f883 2043 strb.w r2, [r3, #67] @ 0x43 8011c82: 687b ldr r3, [r7, #4] 8011c84: 2201 movs r2, #1 8011c86: f883 2044 strb.w r2, [r3, #68] @ 0x44 8011c8a: 687b ldr r3, [r7, #4] 8011c8c: 2201 movs r2, #1 8011c8e: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8011c92: 687b ldr r3, [r7, #4] 8011c94: 2201 movs r2, #1 8011c96: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8011c9a: 2300 movs r3, #0 } 8011c9c: 4618 mov r0, r3 8011c9e: 3708 adds r7, #8 8011ca0: 46bd mov sp, r7 8011ca2: bd80 pop {r7, pc} 08011ca4 : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 8011ca4: b580 push {r7, lr} 8011ca6: b082 sub sp, #8 8011ca8: af00 add r7, sp, #0 8011caa: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8011cac: 687b ldr r3, [r7, #4] 8011cae: 2b00 cmp r3, #0 8011cb0: d101 bne.n 8011cb6 { return HAL_ERROR; 8011cb2: 2301 movs r3, #1 8011cb4: e041 b.n 8011d3a assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8011cb6: 687b ldr r3, [r7, #4] 8011cb8: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8011cbc: b2db uxtb r3, r3 8011cbe: 2b00 cmp r3, #0 8011cc0: d106 bne.n 8011cd0 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8011cc2: 687b ldr r3, [r7, #4] 8011cc4: 2200 movs r2, #0 8011cc6: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8011cca: 6878 ldr r0, [r7, #4] 8011ccc: f000 f839 bl 8011d42 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8011cd0: 687b ldr r3, [r7, #4] 8011cd2: 2202 movs r2, #2 8011cd4: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8011cd8: 687b ldr r3, [r7, #4] 8011cda: 681a ldr r2, [r3, #0] 8011cdc: 687b ldr r3, [r7, #4] 8011cde: 3304 adds r3, #4 8011ce0: 4619 mov r1, r3 8011ce2: 4610 mov r0, r2 8011ce4: f000 fa6a bl 80121bc /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8011ce8: 687b ldr r3, [r7, #4] 8011cea: 2201 movs r2, #1 8011cec: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011cf0: 687b ldr r3, [r7, #4] 8011cf2: 2201 movs r2, #1 8011cf4: f883 203e strb.w r2, [r3, #62] @ 0x3e 8011cf8: 687b ldr r3, [r7, #4] 8011cfa: 2201 movs r2, #1 8011cfc: f883 203f strb.w r2, [r3, #63] @ 0x3f 8011d00: 687b ldr r3, [r7, #4] 8011d02: 2201 movs r2, #1 8011d04: f883 2040 strb.w r2, [r3, #64] @ 0x40 8011d08: 687b ldr r3, [r7, #4] 8011d0a: 2201 movs r2, #1 8011d0c: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011d10: 687b ldr r3, [r7, #4] 8011d12: 2201 movs r2, #1 8011d14: f883 2042 strb.w r2, [r3, #66] @ 0x42 8011d18: 687b ldr r3, [r7, #4] 8011d1a: 2201 movs r2, #1 8011d1c: f883 2043 strb.w r2, [r3, #67] @ 0x43 8011d20: 687b ldr r3, [r7, #4] 8011d22: 2201 movs r2, #1 8011d24: f883 2044 strb.w r2, [r3, #68] @ 0x44 8011d28: 687b ldr r3, [r7, #4] 8011d2a: 2201 movs r2, #1 8011d2c: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8011d30: 687b ldr r3, [r7, #4] 8011d32: 2201 movs r2, #1 8011d34: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8011d38: 2300 movs r3, #0 } 8011d3a: 4618 mov r0, r3 8011d3c: 3708 adds r7, #8 8011d3e: 46bd mov sp, r7 8011d40: bd80 pop {r7, pc} 08011d42 : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 8011d42: b480 push {r7} 8011d44: b083 sub sp, #12 8011d46: af00 add r7, sp, #0 8011d48: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 8011d4a: bf00 nop 8011d4c: 370c adds r7, #12 8011d4e: 46bd mov sp, r7 8011d50: bc80 pop {r7} 8011d52: 4770 bx lr 08011d54 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8011d54: b580 push {r7, lr} 8011d56: b084 sub sp, #16 8011d58: af00 add r7, sp, #0 8011d5a: 6078 str r0, [r7, #4] 8011d5c: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 8011d5e: 683b ldr r3, [r7, #0] 8011d60: 2b00 cmp r3, #0 8011d62: d109 bne.n 8011d78 8011d64: 687b ldr r3, [r7, #4] 8011d66: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8011d6a: b2db uxtb r3, r3 8011d6c: 2b01 cmp r3, #1 8011d6e: bf14 ite ne 8011d70: 2301 movne r3, #1 8011d72: 2300 moveq r3, #0 8011d74: b2db uxtb r3, r3 8011d76: e022 b.n 8011dbe 8011d78: 683b ldr r3, [r7, #0] 8011d7a: 2b04 cmp r3, #4 8011d7c: d109 bne.n 8011d92 8011d7e: 687b ldr r3, [r7, #4] 8011d80: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8011d84: b2db uxtb r3, r3 8011d86: 2b01 cmp r3, #1 8011d88: bf14 ite ne 8011d8a: 2301 movne r3, #1 8011d8c: 2300 moveq r3, #0 8011d8e: b2db uxtb r3, r3 8011d90: e015 b.n 8011dbe 8011d92: 683b ldr r3, [r7, #0] 8011d94: 2b08 cmp r3, #8 8011d96: d109 bne.n 8011dac 8011d98: 687b ldr r3, [r7, #4] 8011d9a: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8011d9e: b2db uxtb r3, r3 8011da0: 2b01 cmp r3, #1 8011da2: bf14 ite ne 8011da4: 2301 movne r3, #1 8011da6: 2300 moveq r3, #0 8011da8: b2db uxtb r3, r3 8011daa: e008 b.n 8011dbe 8011dac: 687b ldr r3, [r7, #4] 8011dae: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8011db2: b2db uxtb r3, r3 8011db4: 2b01 cmp r3, #1 8011db6: bf14 ite ne 8011db8: 2301 movne r3, #1 8011dba: 2300 moveq r3, #0 8011dbc: b2db uxtb r3, r3 8011dbe: 2b00 cmp r3, #0 8011dc0: d001 beq.n 8011dc6 { return HAL_ERROR; 8011dc2: 2301 movs r3, #1 8011dc4: e063 b.n 8011e8e } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8011dc6: 683b ldr r3, [r7, #0] 8011dc8: 2b00 cmp r3, #0 8011dca: d104 bne.n 8011dd6 8011dcc: 687b ldr r3, [r7, #4] 8011dce: 2202 movs r2, #2 8011dd0: f883 203e strb.w r2, [r3, #62] @ 0x3e 8011dd4: e013 b.n 8011dfe 8011dd6: 683b ldr r3, [r7, #0] 8011dd8: 2b04 cmp r3, #4 8011dda: d104 bne.n 8011de6 8011ddc: 687b ldr r3, [r7, #4] 8011dde: 2202 movs r2, #2 8011de0: f883 203f strb.w r2, [r3, #63] @ 0x3f 8011de4: e00b b.n 8011dfe 8011de6: 683b ldr r3, [r7, #0] 8011de8: 2b08 cmp r3, #8 8011dea: d104 bne.n 8011df6 8011dec: 687b ldr r3, [r7, #4] 8011dee: 2202 movs r2, #2 8011df0: f883 2040 strb.w r2, [r3, #64] @ 0x40 8011df4: e003 b.n 8011dfe 8011df6: 687b ldr r3, [r7, #4] 8011df8: 2202 movs r2, #2 8011dfa: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8011dfe: 687b ldr r3, [r7, #4] 8011e00: 681b ldr r3, [r3, #0] 8011e02: 2201 movs r2, #1 8011e04: 6839 ldr r1, [r7, #0] 8011e06: 4618 mov r0, r3 8011e08: f000 fc6e bl 80126e8 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8011e0c: 687b ldr r3, [r7, #4] 8011e0e: 681b ldr r3, [r3, #0] 8011e10: 4a21 ldr r2, [pc, #132] @ (8011e98 ) 8011e12: 4293 cmp r3, r2 8011e14: d107 bne.n 8011e26 { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 8011e16: 687b ldr r3, [r7, #4] 8011e18: 681b ldr r3, [r3, #0] 8011e1a: 6c5a ldr r2, [r3, #68] @ 0x44 8011e1c: 687b ldr r3, [r7, #4] 8011e1e: 681b ldr r3, [r3, #0] 8011e20: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8011e24: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8011e26: 687b ldr r3, [r7, #4] 8011e28: 681b ldr r3, [r3, #0] 8011e2a: 4a1b ldr r2, [pc, #108] @ (8011e98 ) 8011e2c: 4293 cmp r3, r2 8011e2e: d013 beq.n 8011e58 8011e30: 687b ldr r3, [r7, #4] 8011e32: 681b ldr r3, [r3, #0] 8011e34: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8011e38: d00e beq.n 8011e58 8011e3a: 687b ldr r3, [r7, #4] 8011e3c: 681b ldr r3, [r3, #0] 8011e3e: 4a17 ldr r2, [pc, #92] @ (8011e9c ) 8011e40: 4293 cmp r3, r2 8011e42: d009 beq.n 8011e58 8011e44: 687b ldr r3, [r7, #4] 8011e46: 681b ldr r3, [r3, #0] 8011e48: 4a15 ldr r2, [pc, #84] @ (8011ea0 ) 8011e4a: 4293 cmp r3, r2 8011e4c: d004 beq.n 8011e58 8011e4e: 687b ldr r3, [r7, #4] 8011e50: 681b ldr r3, [r3, #0] 8011e52: 4a14 ldr r2, [pc, #80] @ (8011ea4 ) 8011e54: 4293 cmp r3, r2 8011e56: d111 bne.n 8011e7c { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8011e58: 687b ldr r3, [r7, #4] 8011e5a: 681b ldr r3, [r3, #0] 8011e5c: 689b ldr r3, [r3, #8] 8011e5e: f003 0307 and.w r3, r3, #7 8011e62: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8011e64: 68fb ldr r3, [r7, #12] 8011e66: 2b06 cmp r3, #6 8011e68: d010 beq.n 8011e8c { __HAL_TIM_ENABLE(htim); 8011e6a: 687b ldr r3, [r7, #4] 8011e6c: 681b ldr r3, [r3, #0] 8011e6e: 681a ldr r2, [r3, #0] 8011e70: 687b ldr r3, [r7, #4] 8011e72: 681b ldr r3, [r3, #0] 8011e74: f042 0201 orr.w r2, r2, #1 8011e78: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8011e7a: e007 b.n 8011e8c } } else { __HAL_TIM_ENABLE(htim); 8011e7c: 687b ldr r3, [r7, #4] 8011e7e: 681b ldr r3, [r3, #0] 8011e80: 681a ldr r2, [r3, #0] 8011e82: 687b ldr r3, [r7, #4] 8011e84: 681b ldr r3, [r3, #0] 8011e86: f042 0201 orr.w r2, r2, #1 8011e8a: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 8011e8c: 2300 movs r3, #0 } 8011e8e: 4618 mov r0, r3 8011e90: 3710 adds r7, #16 8011e92: 46bd mov sp, r7 8011e94: bd80 pop {r7, pc} 8011e96: bf00 nop 8011e98: 40012c00 .word 0x40012c00 8011e9c: 40000400 .word 0x40000400 8011ea0: 40000800 .word 0x40000800 8011ea4: 40000c00 .word 0x40000c00 08011ea8 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8011ea8: b580 push {r7, lr} 8011eaa: b086 sub sp, #24 8011eac: af00 add r7, sp, #0 8011eae: 60f8 str r0, [r7, #12] 8011eb0: 60b9 str r1, [r7, #8] 8011eb2: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8011eb4: 2300 movs r3, #0 8011eb6: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 8011eb8: 68fb ldr r3, [r7, #12] 8011eba: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8011ebe: 2b01 cmp r3, #1 8011ec0: d101 bne.n 8011ec6 8011ec2: 2302 movs r3, #2 8011ec4: e0ae b.n 8012024 8011ec6: 68fb ldr r3, [r7, #12] 8011ec8: 2201 movs r2, #1 8011eca: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 8011ece: 687b ldr r3, [r7, #4] 8011ed0: 2b0c cmp r3, #12 8011ed2: f200 809f bhi.w 8012014 8011ed6: a201 add r2, pc, #4 @ (adr r2, 8011edc ) 8011ed8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8011edc: 08011f11 .word 0x08011f11 8011ee0: 08012015 .word 0x08012015 8011ee4: 08012015 .word 0x08012015 8011ee8: 08012015 .word 0x08012015 8011eec: 08011f51 .word 0x08011f51 8011ef0: 08012015 .word 0x08012015 8011ef4: 08012015 .word 0x08012015 8011ef8: 08012015 .word 0x08012015 8011efc: 08011f93 .word 0x08011f93 8011f00: 08012015 .word 0x08012015 8011f04: 08012015 .word 0x08012015 8011f08: 08012015 .word 0x08012015 8011f0c: 08011fd3 .word 0x08011fd3 { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8011f10: 68fb ldr r3, [r7, #12] 8011f12: 681b ldr r3, [r3, #0] 8011f14: 68b9 ldr r1, [r7, #8] 8011f16: 4618 mov r0, r3 8011f18: f000 f9c8 bl 80122ac /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 8011f1c: 68fb ldr r3, [r7, #12] 8011f1e: 681b ldr r3, [r3, #0] 8011f20: 699a ldr r2, [r3, #24] 8011f22: 68fb ldr r3, [r7, #12] 8011f24: 681b ldr r3, [r3, #0] 8011f26: f042 0208 orr.w r2, r2, #8 8011f2a: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 8011f2c: 68fb ldr r3, [r7, #12] 8011f2e: 681b ldr r3, [r3, #0] 8011f30: 699a ldr r2, [r3, #24] 8011f32: 68fb ldr r3, [r7, #12] 8011f34: 681b ldr r3, [r3, #0] 8011f36: f022 0204 bic.w r2, r2, #4 8011f3a: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 8011f3c: 68fb ldr r3, [r7, #12] 8011f3e: 681b ldr r3, [r3, #0] 8011f40: 6999 ldr r1, [r3, #24] 8011f42: 68bb ldr r3, [r7, #8] 8011f44: 691a ldr r2, [r3, #16] 8011f46: 68fb ldr r3, [r7, #12] 8011f48: 681b ldr r3, [r3, #0] 8011f4a: 430a orrs r2, r1 8011f4c: 619a str r2, [r3, #24] break; 8011f4e: e064 b.n 801201a { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 8011f50: 68fb ldr r3, [r7, #12] 8011f52: 681b ldr r3, [r3, #0] 8011f54: 68b9 ldr r1, [r7, #8] 8011f56: 4618 mov r0, r3 8011f58: f000 fa0e bl 8012378 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 8011f5c: 68fb ldr r3, [r7, #12] 8011f5e: 681b ldr r3, [r3, #0] 8011f60: 699a ldr r2, [r3, #24] 8011f62: 68fb ldr r3, [r7, #12] 8011f64: 681b ldr r3, [r3, #0] 8011f66: f442 6200 orr.w r2, r2, #2048 @ 0x800 8011f6a: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 8011f6c: 68fb ldr r3, [r7, #12] 8011f6e: 681b ldr r3, [r3, #0] 8011f70: 699a ldr r2, [r3, #24] 8011f72: 68fb ldr r3, [r7, #12] 8011f74: 681b ldr r3, [r3, #0] 8011f76: f422 6280 bic.w r2, r2, #1024 @ 0x400 8011f7a: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 8011f7c: 68fb ldr r3, [r7, #12] 8011f7e: 681b ldr r3, [r3, #0] 8011f80: 6999 ldr r1, [r3, #24] 8011f82: 68bb ldr r3, [r7, #8] 8011f84: 691b ldr r3, [r3, #16] 8011f86: 021a lsls r2, r3, #8 8011f88: 68fb ldr r3, [r7, #12] 8011f8a: 681b ldr r3, [r3, #0] 8011f8c: 430a orrs r2, r1 8011f8e: 619a str r2, [r3, #24] break; 8011f90: e043 b.n 801201a { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 8011f92: 68fb ldr r3, [r7, #12] 8011f94: 681b ldr r3, [r3, #0] 8011f96: 68b9 ldr r1, [r7, #8] 8011f98: 4618 mov r0, r3 8011f9a: f000 fa57 bl 801244c /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 8011f9e: 68fb ldr r3, [r7, #12] 8011fa0: 681b ldr r3, [r3, #0] 8011fa2: 69da ldr r2, [r3, #28] 8011fa4: 68fb ldr r3, [r7, #12] 8011fa6: 681b ldr r3, [r3, #0] 8011fa8: f042 0208 orr.w r2, r2, #8 8011fac: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 8011fae: 68fb ldr r3, [r7, #12] 8011fb0: 681b ldr r3, [r3, #0] 8011fb2: 69da ldr r2, [r3, #28] 8011fb4: 68fb ldr r3, [r7, #12] 8011fb6: 681b ldr r3, [r3, #0] 8011fb8: f022 0204 bic.w r2, r2, #4 8011fbc: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 8011fbe: 68fb ldr r3, [r7, #12] 8011fc0: 681b ldr r3, [r3, #0] 8011fc2: 69d9 ldr r1, [r3, #28] 8011fc4: 68bb ldr r3, [r7, #8] 8011fc6: 691a ldr r2, [r3, #16] 8011fc8: 68fb ldr r3, [r7, #12] 8011fca: 681b ldr r3, [r3, #0] 8011fcc: 430a orrs r2, r1 8011fce: 61da str r2, [r3, #28] break; 8011fd0: e023 b.n 801201a { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 8011fd2: 68fb ldr r3, [r7, #12] 8011fd4: 681b ldr r3, [r3, #0] 8011fd6: 68b9 ldr r1, [r7, #8] 8011fd8: 4618 mov r0, r3 8011fda: f000 faa1 bl 8012520 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 8011fde: 68fb ldr r3, [r7, #12] 8011fe0: 681b ldr r3, [r3, #0] 8011fe2: 69da ldr r2, [r3, #28] 8011fe4: 68fb ldr r3, [r7, #12] 8011fe6: 681b ldr r3, [r3, #0] 8011fe8: f442 6200 orr.w r2, r2, #2048 @ 0x800 8011fec: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 8011fee: 68fb ldr r3, [r7, #12] 8011ff0: 681b ldr r3, [r3, #0] 8011ff2: 69da ldr r2, [r3, #28] 8011ff4: 68fb ldr r3, [r7, #12] 8011ff6: 681b ldr r3, [r3, #0] 8011ff8: f422 6280 bic.w r2, r2, #1024 @ 0x400 8011ffc: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 8011ffe: 68fb ldr r3, [r7, #12] 8012000: 681b ldr r3, [r3, #0] 8012002: 69d9 ldr r1, [r3, #28] 8012004: 68bb ldr r3, [r7, #8] 8012006: 691b ldr r3, [r3, #16] 8012008: 021a lsls r2, r3, #8 801200a: 68fb ldr r3, [r7, #12] 801200c: 681b ldr r3, [r3, #0] 801200e: 430a orrs r2, r1 8012010: 61da str r2, [r3, #28] break; 8012012: e002 b.n 801201a } default: status = HAL_ERROR; 8012014: 2301 movs r3, #1 8012016: 75fb strb r3, [r7, #23] break; 8012018: bf00 nop } __HAL_UNLOCK(htim); 801201a: 68fb ldr r3, [r7, #12] 801201c: 2200 movs r2, #0 801201e: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8012022: 7dfb ldrb r3, [r7, #23] } 8012024: 4618 mov r0, r3 8012026: 3718 adds r7, #24 8012028: 46bd mov sp, r7 801202a: bd80 pop {r7, pc} 0801202c : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { 801202c: b580 push {r7, lr} 801202e: b084 sub sp, #16 8012030: af00 add r7, sp, #0 8012032: 6078 str r0, [r7, #4] 8012034: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8012036: 2300 movs r3, #0 8012038: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 801203a: 687b ldr r3, [r7, #4] 801203c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8012040: 2b01 cmp r3, #1 8012042: d101 bne.n 8012048 8012044: 2302 movs r3, #2 8012046: e0b4 b.n 80121b2 8012048: 687b ldr r3, [r7, #4] 801204a: 2201 movs r2, #1 801204c: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 8012050: 687b ldr r3, [r7, #4] 8012052: 2202 movs r2, #2 8012054: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 8012058: 687b ldr r3, [r7, #4] 801205a: 681b ldr r3, [r3, #0] 801205c: 689b ldr r3, [r3, #8] 801205e: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 8012060: 68bb ldr r3, [r7, #8] 8012062: f023 0377 bic.w r3, r3, #119 @ 0x77 8012066: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8012068: 68bb ldr r3, [r7, #8] 801206a: f423 437f bic.w r3, r3, #65280 @ 0xff00 801206e: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 8012070: 687b ldr r3, [r7, #4] 8012072: 681b ldr r3, [r3, #0] 8012074: 68ba ldr r2, [r7, #8] 8012076: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 8012078: 683b ldr r3, [r7, #0] 801207a: 681b ldr r3, [r3, #0] 801207c: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8012080: d03e beq.n 8012100 8012082: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8012086: f200 8087 bhi.w 8012198 801208a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 801208e: f000 8086 beq.w 801219e 8012092: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8012096: d87f bhi.n 8012198 8012098: 2b70 cmp r3, #112 @ 0x70 801209a: d01a beq.n 80120d2 801209c: 2b70 cmp r3, #112 @ 0x70 801209e: d87b bhi.n 8012198 80120a0: 2b60 cmp r3, #96 @ 0x60 80120a2: d050 beq.n 8012146 80120a4: 2b60 cmp r3, #96 @ 0x60 80120a6: d877 bhi.n 8012198 80120a8: 2b50 cmp r3, #80 @ 0x50 80120aa: d03c beq.n 8012126 80120ac: 2b50 cmp r3, #80 @ 0x50 80120ae: d873 bhi.n 8012198 80120b0: 2b40 cmp r3, #64 @ 0x40 80120b2: d058 beq.n 8012166 80120b4: 2b40 cmp r3, #64 @ 0x40 80120b6: d86f bhi.n 8012198 80120b8: 2b30 cmp r3, #48 @ 0x30 80120ba: d064 beq.n 8012186 80120bc: 2b30 cmp r3, #48 @ 0x30 80120be: d86b bhi.n 8012198 80120c0: 2b20 cmp r3, #32 80120c2: d060 beq.n 8012186 80120c4: 2b20 cmp r3, #32 80120c6: d867 bhi.n 8012198 80120c8: 2b00 cmp r3, #0 80120ca: d05c beq.n 8012186 80120cc: 2b10 cmp r3, #16 80120ce: d05a beq.n 8012186 80120d0: e062 b.n 8012198 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 80120d2: 687b ldr r3, [r7, #4] 80120d4: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 80120d6: 683b ldr r3, [r7, #0] 80120d8: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 80120da: 683b ldr r3, [r7, #0] 80120dc: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 80120de: 683b ldr r3, [r7, #0] 80120e0: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 80120e2: f000 fae2 bl 80126aa /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 80120e6: 687b ldr r3, [r7, #4] 80120e8: 681b ldr r3, [r3, #0] 80120ea: 689b ldr r3, [r3, #8] 80120ec: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 80120ee: 68bb ldr r3, [r7, #8] 80120f0: f043 0377 orr.w r3, r3, #119 @ 0x77 80120f4: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 80120f6: 687b ldr r3, [r7, #4] 80120f8: 681b ldr r3, [r3, #0] 80120fa: 68ba ldr r2, [r7, #8] 80120fc: 609a str r2, [r3, #8] break; 80120fe: e04f b.n 80121a0 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 8012100: 687b ldr r3, [r7, #4] 8012102: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 8012104: 683b ldr r3, [r7, #0] 8012106: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8012108: 683b ldr r3, [r7, #0] 801210a: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 801210c: 683b ldr r3, [r7, #0] 801210e: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 8012110: f000 facb bl 80126aa /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 8012114: 687b ldr r3, [r7, #4] 8012116: 681b ldr r3, [r3, #0] 8012118: 689a ldr r2, [r3, #8] 801211a: 687b ldr r3, [r7, #4] 801211c: 681b ldr r3, [r3, #0] 801211e: f442 4280 orr.w r2, r2, #16384 @ 0x4000 8012122: 609a str r2, [r3, #8] break; 8012124: e03c b.n 80121a0 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8012126: 687b ldr r3, [r7, #4] 8012128: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 801212a: 683b ldr r3, [r7, #0] 801212c: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 801212e: 683b ldr r3, [r7, #0] 8012130: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 8012132: 461a mov r2, r3 8012134: f000 fa42 bl 80125bc TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 8012138: 687b ldr r3, [r7, #4] 801213a: 681b ldr r3, [r3, #0] 801213c: 2150 movs r1, #80 @ 0x50 801213e: 4618 mov r0, r3 8012140: f000 fa99 bl 8012676 break; 8012144: e02c b.n 80121a0 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 8012146: 687b ldr r3, [r7, #4] 8012148: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 801214a: 683b ldr r3, [r7, #0] 801214c: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 801214e: 683b ldr r3, [r7, #0] 8012150: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, 8012152: 461a mov r2, r3 8012154: f000 fa60 bl 8012618 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 8012158: 687b ldr r3, [r7, #4] 801215a: 681b ldr r3, [r3, #0] 801215c: 2160 movs r1, #96 @ 0x60 801215e: 4618 mov r0, r3 8012160: f000 fa89 bl 8012676 break; 8012164: e01c b.n 80121a0 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8012166: 687b ldr r3, [r7, #4] 8012168: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 801216a: 683b ldr r3, [r7, #0] 801216c: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 801216e: 683b ldr r3, [r7, #0] 8012170: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 8012172: 461a mov r2, r3 8012174: f000 fa22 bl 80125bc TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 8012178: 687b ldr r3, [r7, #4] 801217a: 681b ldr r3, [r3, #0] 801217c: 2140 movs r1, #64 @ 0x40 801217e: 4618 mov r0, r3 8012180: f000 fa79 bl 8012676 break; 8012184: e00c b.n 80121a0 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 8012186: 687b ldr r3, [r7, #4] 8012188: 681a ldr r2, [r3, #0] 801218a: 683b ldr r3, [r7, #0] 801218c: 681b ldr r3, [r3, #0] 801218e: 4619 mov r1, r3 8012190: 4610 mov r0, r2 8012192: f000 fa70 bl 8012676 break; 8012196: e003 b.n 80121a0 } default: status = HAL_ERROR; 8012198: 2301 movs r3, #1 801219a: 73fb strb r3, [r7, #15] break; 801219c: e000 b.n 80121a0 break; 801219e: bf00 nop } htim->State = HAL_TIM_STATE_READY; 80121a0: 687b ldr r3, [r7, #4] 80121a2: 2201 movs r2, #1 80121a4: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 80121a8: 687b ldr r3, [r7, #4] 80121aa: 2200 movs r2, #0 80121ac: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 80121b0: 7bfb ldrb r3, [r7, #15] } 80121b2: 4618 mov r0, r3 80121b4: 3710 adds r7, #16 80121b6: 46bd mov sp, r7 80121b8: bd80 pop {r7, pc} ... 080121bc : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 80121bc: b480 push {r7} 80121be: b085 sub sp, #20 80121c0: af00 add r7, sp, #0 80121c2: 6078 str r0, [r7, #4] 80121c4: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 80121c6: 687b ldr r3, [r7, #4] 80121c8: 681b ldr r3, [r3, #0] 80121ca: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80121cc: 687b ldr r3, [r7, #4] 80121ce: 4a33 ldr r2, [pc, #204] @ (801229c ) 80121d0: 4293 cmp r3, r2 80121d2: d00f beq.n 80121f4 80121d4: 687b ldr r3, [r7, #4] 80121d6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80121da: d00b beq.n 80121f4 80121dc: 687b ldr r3, [r7, #4] 80121de: 4a30 ldr r2, [pc, #192] @ (80122a0 ) 80121e0: 4293 cmp r3, r2 80121e2: d007 beq.n 80121f4 80121e4: 687b ldr r3, [r7, #4] 80121e6: 4a2f ldr r2, [pc, #188] @ (80122a4 ) 80121e8: 4293 cmp r3, r2 80121ea: d003 beq.n 80121f4 80121ec: 687b ldr r3, [r7, #4] 80121ee: 4a2e ldr r2, [pc, #184] @ (80122a8 ) 80121f0: 4293 cmp r3, r2 80121f2: d108 bne.n 8012206 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 80121f4: 68fb ldr r3, [r7, #12] 80121f6: f023 0370 bic.w r3, r3, #112 @ 0x70 80121fa: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 80121fc: 683b ldr r3, [r7, #0] 80121fe: 685b ldr r3, [r3, #4] 8012200: 68fa ldr r2, [r7, #12] 8012202: 4313 orrs r3, r2 8012204: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8012206: 687b ldr r3, [r7, #4] 8012208: 4a24 ldr r2, [pc, #144] @ (801229c ) 801220a: 4293 cmp r3, r2 801220c: d00f beq.n 801222e 801220e: 687b ldr r3, [r7, #4] 8012210: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8012214: d00b beq.n 801222e 8012216: 687b ldr r3, [r7, #4] 8012218: 4a21 ldr r2, [pc, #132] @ (80122a0 ) 801221a: 4293 cmp r3, r2 801221c: d007 beq.n 801222e 801221e: 687b ldr r3, [r7, #4] 8012220: 4a20 ldr r2, [pc, #128] @ (80122a4 ) 8012222: 4293 cmp r3, r2 8012224: d003 beq.n 801222e 8012226: 687b ldr r3, [r7, #4] 8012228: 4a1f ldr r2, [pc, #124] @ (80122a8 ) 801222a: 4293 cmp r3, r2 801222c: d108 bne.n 8012240 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 801222e: 68fb ldr r3, [r7, #12] 8012230: f423 7340 bic.w r3, r3, #768 @ 0x300 8012234: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 8012236: 683b ldr r3, [r7, #0] 8012238: 68db ldr r3, [r3, #12] 801223a: 68fa ldr r2, [r7, #12] 801223c: 4313 orrs r3, r2 801223e: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 8012240: 68fb ldr r3, [r7, #12] 8012242: f023 0280 bic.w r2, r3, #128 @ 0x80 8012246: 683b ldr r3, [r7, #0] 8012248: 695b ldr r3, [r3, #20] 801224a: 4313 orrs r3, r2 801224c: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 801224e: 687b ldr r3, [r7, #4] 8012250: 68fa ldr r2, [r7, #12] 8012252: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8012254: 683b ldr r3, [r7, #0] 8012256: 689a ldr r2, [r3, #8] 8012258: 687b ldr r3, [r7, #4] 801225a: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 801225c: 683b ldr r3, [r7, #0] 801225e: 681a ldr r2, [r3, #0] 8012260: 687b ldr r3, [r7, #4] 8012262: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8012264: 687b ldr r3, [r7, #4] 8012266: 4a0d ldr r2, [pc, #52] @ (801229c ) 8012268: 4293 cmp r3, r2 801226a: d103 bne.n 8012274 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 801226c: 683b ldr r3, [r7, #0] 801226e: 691a ldr r2, [r3, #16] 8012270: 687b ldr r3, [r7, #4] 8012272: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8012274: 687b ldr r3, [r7, #4] 8012276: 2201 movs r2, #1 8012278: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 801227a: 687b ldr r3, [r7, #4] 801227c: 691b ldr r3, [r3, #16] 801227e: f003 0301 and.w r3, r3, #1 8012282: 2b00 cmp r3, #0 8012284: d005 beq.n 8012292 { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 8012286: 687b ldr r3, [r7, #4] 8012288: 691b ldr r3, [r3, #16] 801228a: f023 0201 bic.w r2, r3, #1 801228e: 687b ldr r3, [r7, #4] 8012290: 611a str r2, [r3, #16] } } 8012292: bf00 nop 8012294: 3714 adds r7, #20 8012296: 46bd mov sp, r7 8012298: bc80 pop {r7} 801229a: 4770 bx lr 801229c: 40012c00 .word 0x40012c00 80122a0: 40000400 .word 0x40000400 80122a4: 40000800 .word 0x40000800 80122a8: 40000c00 .word 0x40000c00 080122ac : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80122ac: b480 push {r7} 80122ae: b087 sub sp, #28 80122b0: af00 add r7, sp, #0 80122b2: 6078 str r0, [r7, #4] 80122b4: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80122b6: 687b ldr r3, [r7, #4] 80122b8: 6a1b ldr r3, [r3, #32] 80122ba: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 80122bc: 687b ldr r3, [r7, #4] 80122be: 6a1b ldr r3, [r3, #32] 80122c0: f023 0201 bic.w r2, r3, #1 80122c4: 687b ldr r3, [r7, #4] 80122c6: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80122c8: 687b ldr r3, [r7, #4] 80122ca: 685b ldr r3, [r3, #4] 80122cc: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 80122ce: 687b ldr r3, [r7, #4] 80122d0: 699b ldr r3, [r3, #24] 80122d2: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 80122d4: 68fb ldr r3, [r7, #12] 80122d6: f023 0370 bic.w r3, r3, #112 @ 0x70 80122da: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 80122dc: 68fb ldr r3, [r7, #12] 80122de: f023 0303 bic.w r3, r3, #3 80122e2: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 80122e4: 683b ldr r3, [r7, #0] 80122e6: 681b ldr r3, [r3, #0] 80122e8: 68fa ldr r2, [r7, #12] 80122ea: 4313 orrs r3, r2 80122ec: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 80122ee: 697b ldr r3, [r7, #20] 80122f0: f023 0302 bic.w r3, r3, #2 80122f4: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 80122f6: 683b ldr r3, [r7, #0] 80122f8: 689b ldr r3, [r3, #8] 80122fa: 697a ldr r2, [r7, #20] 80122fc: 4313 orrs r3, r2 80122fe: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 8012300: 687b ldr r3, [r7, #4] 8012302: 4a1c ldr r2, [pc, #112] @ (8012374 ) 8012304: 4293 cmp r3, r2 8012306: d10c bne.n 8012322 { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 8012308: 697b ldr r3, [r7, #20] 801230a: f023 0308 bic.w r3, r3, #8 801230e: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 8012310: 683b ldr r3, [r7, #0] 8012312: 68db ldr r3, [r3, #12] 8012314: 697a ldr r2, [r7, #20] 8012316: 4313 orrs r3, r2 8012318: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 801231a: 697b ldr r3, [r7, #20] 801231c: f023 0304 bic.w r3, r3, #4 8012320: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8012322: 687b ldr r3, [r7, #4] 8012324: 4a13 ldr r2, [pc, #76] @ (8012374 ) 8012326: 4293 cmp r3, r2 8012328: d111 bne.n 801234e /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 801232a: 693b ldr r3, [r7, #16] 801232c: f423 7380 bic.w r3, r3, #256 @ 0x100 8012330: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 8012332: 693b ldr r3, [r7, #16] 8012334: f423 7300 bic.w r3, r3, #512 @ 0x200 8012338: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 801233a: 683b ldr r3, [r7, #0] 801233c: 695b ldr r3, [r3, #20] 801233e: 693a ldr r2, [r7, #16] 8012340: 4313 orrs r3, r2 8012342: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 8012344: 683b ldr r3, [r7, #0] 8012346: 699b ldr r3, [r3, #24] 8012348: 693a ldr r2, [r7, #16] 801234a: 4313 orrs r3, r2 801234c: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 801234e: 687b ldr r3, [r7, #4] 8012350: 693a ldr r2, [r7, #16] 8012352: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8012354: 687b ldr r3, [r7, #4] 8012356: 68fa ldr r2, [r7, #12] 8012358: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 801235a: 683b ldr r3, [r7, #0] 801235c: 685a ldr r2, [r3, #4] 801235e: 687b ldr r3, [r7, #4] 8012360: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8012362: 687b ldr r3, [r7, #4] 8012364: 697a ldr r2, [r7, #20] 8012366: 621a str r2, [r3, #32] } 8012368: bf00 nop 801236a: 371c adds r7, #28 801236c: 46bd mov sp, r7 801236e: bc80 pop {r7} 8012370: 4770 bx lr 8012372: bf00 nop 8012374: 40012c00 .word 0x40012c00 08012378 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8012378: b480 push {r7} 801237a: b087 sub sp, #28 801237c: af00 add r7, sp, #0 801237e: 6078 str r0, [r7, #4] 8012380: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8012382: 687b ldr r3, [r7, #4] 8012384: 6a1b ldr r3, [r3, #32] 8012386: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8012388: 687b ldr r3, [r7, #4] 801238a: 6a1b ldr r3, [r3, #32] 801238c: f023 0210 bic.w r2, r3, #16 8012390: 687b ldr r3, [r7, #4] 8012392: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8012394: 687b ldr r3, [r7, #4] 8012396: 685b ldr r3, [r3, #4] 8012398: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 801239a: 687b ldr r3, [r7, #4] 801239c: 699b ldr r3, [r3, #24] 801239e: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 80123a0: 68fb ldr r3, [r7, #12] 80123a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80123a6: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 80123a8: 68fb ldr r3, [r7, #12] 80123aa: f423 7340 bic.w r3, r3, #768 @ 0x300 80123ae: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 80123b0: 683b ldr r3, [r7, #0] 80123b2: 681b ldr r3, [r3, #0] 80123b4: 021b lsls r3, r3, #8 80123b6: 68fa ldr r2, [r7, #12] 80123b8: 4313 orrs r3, r2 80123ba: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 80123bc: 697b ldr r3, [r7, #20] 80123be: f023 0320 bic.w r3, r3, #32 80123c2: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 80123c4: 683b ldr r3, [r7, #0] 80123c6: 689b ldr r3, [r3, #8] 80123c8: 011b lsls r3, r3, #4 80123ca: 697a ldr r2, [r7, #20] 80123cc: 4313 orrs r3, r2 80123ce: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 80123d0: 687b ldr r3, [r7, #4] 80123d2: 4a1d ldr r2, [pc, #116] @ (8012448 ) 80123d4: 4293 cmp r3, r2 80123d6: d10d bne.n 80123f4 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 80123d8: 697b ldr r3, [r7, #20] 80123da: f023 0380 bic.w r3, r3, #128 @ 0x80 80123de: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 80123e0: 683b ldr r3, [r7, #0] 80123e2: 68db ldr r3, [r3, #12] 80123e4: 011b lsls r3, r3, #4 80123e6: 697a ldr r2, [r7, #20] 80123e8: 4313 orrs r3, r2 80123ea: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 80123ec: 697b ldr r3, [r7, #20] 80123ee: f023 0340 bic.w r3, r3, #64 @ 0x40 80123f2: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80123f4: 687b ldr r3, [r7, #4] 80123f6: 4a14 ldr r2, [pc, #80] @ (8012448 ) 80123f8: 4293 cmp r3, r2 80123fa: d113 bne.n 8012424 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 80123fc: 693b ldr r3, [r7, #16] 80123fe: f423 6380 bic.w r3, r3, #1024 @ 0x400 8012402: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 8012404: 693b ldr r3, [r7, #16] 8012406: f423 6300 bic.w r3, r3, #2048 @ 0x800 801240a: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 801240c: 683b ldr r3, [r7, #0] 801240e: 695b ldr r3, [r3, #20] 8012410: 009b lsls r3, r3, #2 8012412: 693a ldr r2, [r7, #16] 8012414: 4313 orrs r3, r2 8012416: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 8012418: 683b ldr r3, [r7, #0] 801241a: 699b ldr r3, [r3, #24] 801241c: 009b lsls r3, r3, #2 801241e: 693a ldr r2, [r7, #16] 8012420: 4313 orrs r3, r2 8012422: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8012424: 687b ldr r3, [r7, #4] 8012426: 693a ldr r2, [r7, #16] 8012428: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 801242a: 687b ldr r3, [r7, #4] 801242c: 68fa ldr r2, [r7, #12] 801242e: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 8012430: 683b ldr r3, [r7, #0] 8012432: 685a ldr r2, [r3, #4] 8012434: 687b ldr r3, [r7, #4] 8012436: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8012438: 687b ldr r3, [r7, #4] 801243a: 697a ldr r2, [r7, #20] 801243c: 621a str r2, [r3, #32] } 801243e: bf00 nop 8012440: 371c adds r7, #28 8012442: 46bd mov sp, r7 8012444: bc80 pop {r7} 8012446: 4770 bx lr 8012448: 40012c00 .word 0x40012c00 0801244c : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 801244c: b480 push {r7} 801244e: b087 sub sp, #28 8012450: af00 add r7, sp, #0 8012452: 6078 str r0, [r7, #4] 8012454: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8012456: 687b ldr r3, [r7, #4] 8012458: 6a1b ldr r3, [r3, #32] 801245a: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 801245c: 687b ldr r3, [r7, #4] 801245e: 6a1b ldr r3, [r3, #32] 8012460: f423 7280 bic.w r2, r3, #256 @ 0x100 8012464: 687b ldr r3, [r7, #4] 8012466: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8012468: 687b ldr r3, [r7, #4] 801246a: 685b ldr r3, [r3, #4] 801246c: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 801246e: 687b ldr r3, [r7, #4] 8012470: 69db ldr r3, [r3, #28] 8012472: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 8012474: 68fb ldr r3, [r7, #12] 8012476: f023 0370 bic.w r3, r3, #112 @ 0x70 801247a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 801247c: 68fb ldr r3, [r7, #12] 801247e: f023 0303 bic.w r3, r3, #3 8012482: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8012484: 683b ldr r3, [r7, #0] 8012486: 681b ldr r3, [r3, #0] 8012488: 68fa ldr r2, [r7, #12] 801248a: 4313 orrs r3, r2 801248c: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 801248e: 697b ldr r3, [r7, #20] 8012490: f423 7300 bic.w r3, r3, #512 @ 0x200 8012494: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 8012496: 683b ldr r3, [r7, #0] 8012498: 689b ldr r3, [r3, #8] 801249a: 021b lsls r3, r3, #8 801249c: 697a ldr r2, [r7, #20] 801249e: 4313 orrs r3, r2 80124a0: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 80124a2: 687b ldr r3, [r7, #4] 80124a4: 4a1d ldr r2, [pc, #116] @ (801251c ) 80124a6: 4293 cmp r3, r2 80124a8: d10d bne.n 80124c6 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 80124aa: 697b ldr r3, [r7, #20] 80124ac: f423 6300 bic.w r3, r3, #2048 @ 0x800 80124b0: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 80124b2: 683b ldr r3, [r7, #0] 80124b4: 68db ldr r3, [r3, #12] 80124b6: 021b lsls r3, r3, #8 80124b8: 697a ldr r2, [r7, #20] 80124ba: 4313 orrs r3, r2 80124bc: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 80124be: 697b ldr r3, [r7, #20] 80124c0: f423 6380 bic.w r3, r3, #1024 @ 0x400 80124c4: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80124c6: 687b ldr r3, [r7, #4] 80124c8: 4a14 ldr r2, [pc, #80] @ (801251c ) 80124ca: 4293 cmp r3, r2 80124cc: d113 bne.n 80124f6 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 80124ce: 693b ldr r3, [r7, #16] 80124d0: f423 5380 bic.w r3, r3, #4096 @ 0x1000 80124d4: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 80124d6: 693b ldr r3, [r7, #16] 80124d8: f423 5300 bic.w r3, r3, #8192 @ 0x2000 80124dc: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 80124de: 683b ldr r3, [r7, #0] 80124e0: 695b ldr r3, [r3, #20] 80124e2: 011b lsls r3, r3, #4 80124e4: 693a ldr r2, [r7, #16] 80124e6: 4313 orrs r3, r2 80124e8: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 80124ea: 683b ldr r3, [r7, #0] 80124ec: 699b ldr r3, [r3, #24] 80124ee: 011b lsls r3, r3, #4 80124f0: 693a ldr r2, [r7, #16] 80124f2: 4313 orrs r3, r2 80124f4: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80124f6: 687b ldr r3, [r7, #4] 80124f8: 693a ldr r2, [r7, #16] 80124fa: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 80124fc: 687b ldr r3, [r7, #4] 80124fe: 68fa ldr r2, [r7, #12] 8012500: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 8012502: 683b ldr r3, [r7, #0] 8012504: 685a ldr r2, [r3, #4] 8012506: 687b ldr r3, [r7, #4] 8012508: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 801250a: 687b ldr r3, [r7, #4] 801250c: 697a ldr r2, [r7, #20] 801250e: 621a str r2, [r3, #32] } 8012510: bf00 nop 8012512: 371c adds r7, #28 8012514: 46bd mov sp, r7 8012516: bc80 pop {r7} 8012518: 4770 bx lr 801251a: bf00 nop 801251c: 40012c00 .word 0x40012c00 08012520 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8012520: b480 push {r7} 8012522: b087 sub sp, #28 8012524: af00 add r7, sp, #0 8012526: 6078 str r0, [r7, #4] 8012528: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 801252a: 687b ldr r3, [r7, #4] 801252c: 6a1b ldr r3, [r3, #32] 801252e: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 8012530: 687b ldr r3, [r7, #4] 8012532: 6a1b ldr r3, [r3, #32] 8012534: f423 5280 bic.w r2, r3, #4096 @ 0x1000 8012538: 687b ldr r3, [r7, #4] 801253a: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 801253c: 687b ldr r3, [r7, #4] 801253e: 685b ldr r3, [r3, #4] 8012540: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8012542: 687b ldr r3, [r7, #4] 8012544: 69db ldr r3, [r3, #28] 8012546: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 8012548: 68fb ldr r3, [r7, #12] 801254a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 801254e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 8012550: 68fb ldr r3, [r7, #12] 8012552: f423 7340 bic.w r3, r3, #768 @ 0x300 8012556: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8012558: 683b ldr r3, [r7, #0] 801255a: 681b ldr r3, [r3, #0] 801255c: 021b lsls r3, r3, #8 801255e: 68fa ldr r2, [r7, #12] 8012560: 4313 orrs r3, r2 8012562: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 8012564: 693b ldr r3, [r7, #16] 8012566: f423 5300 bic.w r3, r3, #8192 @ 0x2000 801256a: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 801256c: 683b ldr r3, [r7, #0] 801256e: 689b ldr r3, [r3, #8] 8012570: 031b lsls r3, r3, #12 8012572: 693a ldr r2, [r7, #16] 8012574: 4313 orrs r3, r2 8012576: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 8012578: 687b ldr r3, [r7, #4] 801257a: 4a0f ldr r2, [pc, #60] @ (80125b8 ) 801257c: 4293 cmp r3, r2 801257e: d109 bne.n 8012594 { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8012580: 697b ldr r3, [r7, #20] 8012582: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8012586: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8012588: 683b ldr r3, [r7, #0] 801258a: 695b ldr r3, [r3, #20] 801258c: 019b lsls r3, r3, #6 801258e: 697a ldr r2, [r7, #20] 8012590: 4313 orrs r3, r2 8012592: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8012594: 687b ldr r3, [r7, #4] 8012596: 697a ldr r2, [r7, #20] 8012598: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 801259a: 687b ldr r3, [r7, #4] 801259c: 68fa ldr r2, [r7, #12] 801259e: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 80125a0: 683b ldr r3, [r7, #0] 80125a2: 685a ldr r2, [r3, #4] 80125a4: 687b ldr r3, [r7, #4] 80125a6: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80125a8: 687b ldr r3, [r7, #4] 80125aa: 693a ldr r2, [r7, #16] 80125ac: 621a str r2, [r3, #32] } 80125ae: bf00 nop 80125b0: 371c adds r7, #28 80125b2: 46bd mov sp, r7 80125b4: bc80 pop {r7} 80125b6: 4770 bx lr 80125b8: 40012c00 .word 0x40012c00 080125bc : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 80125bc: b480 push {r7} 80125be: b087 sub sp, #28 80125c0: af00 add r7, sp, #0 80125c2: 60f8 str r0, [r7, #12] 80125c4: 60b9 str r1, [r7, #8] 80125c6: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 80125c8: 68fb ldr r3, [r7, #12] 80125ca: 6a1b ldr r3, [r3, #32] 80125cc: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 80125ce: 68fb ldr r3, [r7, #12] 80125d0: 6a1b ldr r3, [r3, #32] 80125d2: f023 0201 bic.w r2, r3, #1 80125d6: 68fb ldr r3, [r7, #12] 80125d8: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 80125da: 68fb ldr r3, [r7, #12] 80125dc: 699b ldr r3, [r3, #24] 80125de: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 80125e0: 693b ldr r3, [r7, #16] 80125e2: f023 03f0 bic.w r3, r3, #240 @ 0xf0 80125e6: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 80125e8: 687b ldr r3, [r7, #4] 80125ea: 011b lsls r3, r3, #4 80125ec: 693a ldr r2, [r7, #16] 80125ee: 4313 orrs r3, r2 80125f0: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 80125f2: 697b ldr r3, [r7, #20] 80125f4: f023 030a bic.w r3, r3, #10 80125f8: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 80125fa: 697a ldr r2, [r7, #20] 80125fc: 68bb ldr r3, [r7, #8] 80125fe: 4313 orrs r3, r2 8012600: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 8012602: 68fb ldr r3, [r7, #12] 8012604: 693a ldr r2, [r7, #16] 8012606: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8012608: 68fb ldr r3, [r7, #12] 801260a: 697a ldr r2, [r7, #20] 801260c: 621a str r2, [r3, #32] } 801260e: bf00 nop 8012610: 371c adds r7, #28 8012612: 46bd mov sp, r7 8012614: bc80 pop {r7} 8012616: 4770 bx lr 08012618 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8012618: b480 push {r7} 801261a: b087 sub sp, #28 801261c: af00 add r7, sp, #0 801261e: 60f8 str r0, [r7, #12] 8012620: 60b9 str r1, [r7, #8] 8012622: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; 8012624: 68fb ldr r3, [r7, #12] 8012626: 6a1b ldr r3, [r3, #32] 8012628: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; 801262a: 68fb ldr r3, [r7, #12] 801262c: 6a1b ldr r3, [r3, #32] 801262e: f023 0210 bic.w r2, r3, #16 8012632: 68fb ldr r3, [r7, #12] 8012634: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8012636: 68fb ldr r3, [r7, #12] 8012638: 699b ldr r3, [r3, #24] 801263a: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 801263c: 693b ldr r3, [r7, #16] 801263e: f423 4370 bic.w r3, r3, #61440 @ 0xf000 8012642: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); 8012644: 687b ldr r3, [r7, #4] 8012646: 031b lsls r3, r3, #12 8012648: 693a ldr r2, [r7, #16] 801264a: 4313 orrs r3, r2 801264c: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 801264e: 697b ldr r3, [r7, #20] 8012650: f023 03a0 bic.w r3, r3, #160 @ 0xa0 8012654: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); 8012656: 68bb ldr r3, [r7, #8] 8012658: 011b lsls r3, r3, #4 801265a: 697a ldr r2, [r7, #20] 801265c: 4313 orrs r3, r2 801265e: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 8012660: 68fb ldr r3, [r7, #12] 8012662: 693a ldr r2, [r7, #16] 8012664: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8012666: 68fb ldr r3, [r7, #12] 8012668: 697a ldr r2, [r7, #20] 801266a: 621a str r2, [r3, #32] } 801266c: bf00 nop 801266e: 371c adds r7, #28 8012670: 46bd mov sp, r7 8012672: bc80 pop {r7} 8012674: 4770 bx lr 08012676 : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 8012676: b480 push {r7} 8012678: b085 sub sp, #20 801267a: af00 add r7, sp, #0 801267c: 6078 str r0, [r7, #4] 801267e: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 8012680: 687b ldr r3, [r7, #4] 8012682: 689b ldr r3, [r3, #8] 8012684: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 8012686: 68fb ldr r3, [r7, #12] 8012688: f023 0370 bic.w r3, r3, #112 @ 0x70 801268c: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 801268e: 683a ldr r2, [r7, #0] 8012690: 68fb ldr r3, [r7, #12] 8012692: 4313 orrs r3, r2 8012694: f043 0307 orr.w r3, r3, #7 8012698: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 801269a: 687b ldr r3, [r7, #4] 801269c: 68fa ldr r2, [r7, #12] 801269e: 609a str r2, [r3, #8] } 80126a0: bf00 nop 80126a2: 3714 adds r7, #20 80126a4: 46bd mov sp, r7 80126a6: bc80 pop {r7} 80126a8: 4770 bx lr 080126aa : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 80126aa: b480 push {r7} 80126ac: b087 sub sp, #28 80126ae: af00 add r7, sp, #0 80126b0: 60f8 str r0, [r7, #12] 80126b2: 60b9 str r1, [r7, #8] 80126b4: 607a str r2, [r7, #4] 80126b6: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 80126b8: 68fb ldr r3, [r7, #12] 80126ba: 689b ldr r3, [r3, #8] 80126bc: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 80126be: 697b ldr r3, [r7, #20] 80126c0: f423 437f bic.w r3, r3, #65280 @ 0xff00 80126c4: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 80126c6: 683b ldr r3, [r7, #0] 80126c8: 021a lsls r2, r3, #8 80126ca: 687b ldr r3, [r7, #4] 80126cc: 431a orrs r2, r3 80126ce: 68bb ldr r3, [r7, #8] 80126d0: 4313 orrs r3, r2 80126d2: 697a ldr r2, [r7, #20] 80126d4: 4313 orrs r3, r2 80126d6: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 80126d8: 68fb ldr r3, [r7, #12] 80126da: 697a ldr r2, [r7, #20] 80126dc: 609a str r2, [r3, #8] } 80126de: bf00 nop 80126e0: 371c adds r7, #28 80126e2: 46bd mov sp, r7 80126e4: bc80 pop {r7} 80126e6: 4770 bx lr 080126e8 : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 80126e8: b480 push {r7} 80126ea: b087 sub sp, #28 80126ec: af00 add r7, sp, #0 80126ee: 60f8 str r0, [r7, #12] 80126f0: 60b9 str r1, [r7, #8] 80126f2: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 80126f4: 68bb ldr r3, [r7, #8] 80126f6: f003 031f and.w r3, r3, #31 80126fa: 2201 movs r2, #1 80126fc: fa02 f303 lsl.w r3, r2, r3 8012700: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 8012702: 68fb ldr r3, [r7, #12] 8012704: 6a1a ldr r2, [r3, #32] 8012706: 697b ldr r3, [r7, #20] 8012708: 43db mvns r3, r3 801270a: 401a ands r2, r3 801270c: 68fb ldr r3, [r7, #12] 801270e: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 8012710: 68fb ldr r3, [r7, #12] 8012712: 6a1a ldr r2, [r3, #32] 8012714: 68bb ldr r3, [r7, #8] 8012716: f003 031f and.w r3, r3, #31 801271a: 6879 ldr r1, [r7, #4] 801271c: fa01 f303 lsl.w r3, r1, r3 8012720: 431a orrs r2, r3 8012722: 68fb ldr r3, [r7, #12] 8012724: 621a str r2, [r3, #32] } 8012726: bf00 nop 8012728: 371c adds r7, #28 801272a: 46bd mov sp, r7 801272c: bc80 pop {r7} 801272e: 4770 bx lr 08012730 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 8012730: b480 push {r7} 8012732: b085 sub sp, #20 8012734: af00 add r7, sp, #0 8012736: 6078 str r0, [r7, #4] 8012738: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 801273a: 687b ldr r3, [r7, #4] 801273c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8012740: 2b01 cmp r3, #1 8012742: d101 bne.n 8012748 8012744: 2302 movs r3, #2 8012746: e04b b.n 80127e0 8012748: 687b ldr r3, [r7, #4] 801274a: 2201 movs r2, #1 801274c: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 8012750: 687b ldr r3, [r7, #4] 8012752: 2202 movs r2, #2 8012754: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8012758: 687b ldr r3, [r7, #4] 801275a: 681b ldr r3, [r3, #0] 801275c: 685b ldr r3, [r3, #4] 801275e: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8012760: 687b ldr r3, [r7, #4] 8012762: 681b ldr r3, [r3, #0] 8012764: 689b ldr r3, [r3, #8] 8012766: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8012768: 68fb ldr r3, [r7, #12] 801276a: f023 0370 bic.w r3, r3, #112 @ 0x70 801276e: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 8012770: 683b ldr r3, [r7, #0] 8012772: 681b ldr r3, [r3, #0] 8012774: 68fa ldr r2, [r7, #12] 8012776: 4313 orrs r3, r2 8012778: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 801277a: 687b ldr r3, [r7, #4] 801277c: 681b ldr r3, [r3, #0] 801277e: 68fa ldr r2, [r7, #12] 8012780: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8012782: 687b ldr r3, [r7, #4] 8012784: 681b ldr r3, [r3, #0] 8012786: 4a19 ldr r2, [pc, #100] @ (80127ec ) 8012788: 4293 cmp r3, r2 801278a: d013 beq.n 80127b4 801278c: 687b ldr r3, [r7, #4] 801278e: 681b ldr r3, [r3, #0] 8012790: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8012794: d00e beq.n 80127b4 8012796: 687b ldr r3, [r7, #4] 8012798: 681b ldr r3, [r3, #0] 801279a: 4a15 ldr r2, [pc, #84] @ (80127f0 ) 801279c: 4293 cmp r3, r2 801279e: d009 beq.n 80127b4 80127a0: 687b ldr r3, [r7, #4] 80127a2: 681b ldr r3, [r3, #0] 80127a4: 4a13 ldr r2, [pc, #76] @ (80127f4 ) 80127a6: 4293 cmp r3, r2 80127a8: d004 beq.n 80127b4 80127aa: 687b ldr r3, [r7, #4] 80127ac: 681b ldr r3, [r3, #0] 80127ae: 4a12 ldr r2, [pc, #72] @ (80127f8 ) 80127b0: 4293 cmp r3, r2 80127b2: d10c bne.n 80127ce { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 80127b4: 68bb ldr r3, [r7, #8] 80127b6: f023 0380 bic.w r3, r3, #128 @ 0x80 80127ba: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 80127bc: 683b ldr r3, [r7, #0] 80127be: 685b ldr r3, [r3, #4] 80127c0: 68ba ldr r2, [r7, #8] 80127c2: 4313 orrs r3, r2 80127c4: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 80127c6: 687b ldr r3, [r7, #4] 80127c8: 681b ldr r3, [r3, #0] 80127ca: 68ba ldr r2, [r7, #8] 80127cc: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 80127ce: 687b ldr r3, [r7, #4] 80127d0: 2201 movs r2, #1 80127d2: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 80127d6: 687b ldr r3, [r7, #4] 80127d8: 2200 movs r2, #0 80127da: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 80127de: 2300 movs r3, #0 } 80127e0: 4618 mov r0, r3 80127e2: 3714 adds r7, #20 80127e4: 46bd mov sp, r7 80127e6: bc80 pop {r7} 80127e8: 4770 bx lr 80127ea: bf00 nop 80127ec: 40012c00 .word 0x40012c00 80127f0: 40000400 .word 0x40000400 80127f4: 40000800 .word 0x40000800 80127f8: 40000c00 .word 0x40000c00 080127fc : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 80127fc: b580 push {r7, lr} 80127fe: b082 sub sp, #8 8012800: af00 add r7, sp, #0 8012802: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 8012804: 687b ldr r3, [r7, #4] 8012806: 2b00 cmp r3, #0 8012808: d101 bne.n 801280e { return HAL_ERROR; 801280a: 2301 movs r3, #1 801280c: e042 b.n 8012894 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 801280e: 687b ldr r3, [r7, #4] 8012810: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8012814: b2db uxtb r3, r3 8012816: 2b00 cmp r3, #0 8012818: d106 bne.n 8012828 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 801281a: 687b ldr r3, [r7, #4] 801281c: 2200 movs r2, #0 801281e: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 8012822: 6878 ldr r0, [r7, #4] 8012824: f7fb fe8e bl 800e544 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 8012828: 687b ldr r3, [r7, #4] 801282a: 2224 movs r2, #36 @ 0x24 801282c: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 8012830: 687b ldr r3, [r7, #4] 8012832: 681b ldr r3, [r3, #0] 8012834: 68da ldr r2, [r3, #12] 8012836: 687b ldr r3, [r7, #4] 8012838: 681b ldr r3, [r3, #0] 801283a: f422 5200 bic.w r2, r2, #8192 @ 0x2000 801283e: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 8012840: 6878 ldr r0, [r7, #4] 8012842: f000 feb3 bl 80135ac /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8012846: 687b ldr r3, [r7, #4] 8012848: 681b ldr r3, [r3, #0] 801284a: 691a ldr r2, [r3, #16] 801284c: 687b ldr r3, [r7, #4] 801284e: 681b ldr r3, [r3, #0] 8012850: f422 4290 bic.w r2, r2, #18432 @ 0x4800 8012854: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8012856: 687b ldr r3, [r7, #4] 8012858: 681b ldr r3, [r3, #0] 801285a: 695a ldr r2, [r3, #20] 801285c: 687b ldr r3, [r7, #4] 801285e: 681b ldr r3, [r3, #0] 8012860: f022 022a bic.w r2, r2, #42 @ 0x2a 8012864: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 8012866: 687b ldr r3, [r7, #4] 8012868: 681b ldr r3, [r3, #0] 801286a: 68da ldr r2, [r3, #12] 801286c: 687b ldr r3, [r7, #4] 801286e: 681b ldr r3, [r3, #0] 8012870: f442 5200 orr.w r2, r2, #8192 @ 0x2000 8012874: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8012876: 687b ldr r3, [r7, #4] 8012878: 2200 movs r2, #0 801287a: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 801287c: 687b ldr r3, [r7, #4] 801287e: 2220 movs r2, #32 8012880: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8012884: 687b ldr r3, [r7, #4] 8012886: 2220 movs r2, #32 8012888: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 801288c: 687b ldr r3, [r7, #4] 801288e: 2200 movs r2, #0 8012890: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 8012892: 2300 movs r3, #0 } 8012894: 4618 mov r0, r3 8012896: 3708 adds r7, #8 8012898: 46bd mov sp, r7 801289a: bd80 pop {r7, pc} 0801289c : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { 801289c: b480 push {r7} 801289e: b085 sub sp, #20 80128a0: af00 add r7, sp, #0 80128a2: 60f8 str r0, [r7, #12] 80128a4: 60b9 str r1, [r7, #8] 80128a6: 4613 mov r3, r2 80128a8: 80fb strh r3, [r7, #6] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 80128aa: 68fb ldr r3, [r7, #12] 80128ac: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 80128b0: b2db uxtb r3, r3 80128b2: 2b20 cmp r3, #32 80128b4: d121 bne.n 80128fa { if ((pData == NULL) || (Size == 0U)) 80128b6: 68bb ldr r3, [r7, #8] 80128b8: 2b00 cmp r3, #0 80128ba: d002 beq.n 80128c2 80128bc: 88fb ldrh r3, [r7, #6] 80128be: 2b00 cmp r3, #0 80128c0: d101 bne.n 80128c6 { return HAL_ERROR; 80128c2: 2301 movs r3, #1 80128c4: e01a b.n 80128fc } huart->pTxBuffPtr = pData; 80128c6: 68fb ldr r3, [r7, #12] 80128c8: 68ba ldr r2, [r7, #8] 80128ca: 621a str r2, [r3, #32] huart->TxXferSize = Size; 80128cc: 68fb ldr r3, [r7, #12] 80128ce: 88fa ldrh r2, [r7, #6] 80128d0: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 80128d2: 68fb ldr r3, [r7, #12] 80128d4: 88fa ldrh r2, [r7, #6] 80128d6: 84da strh r2, [r3, #38] @ 0x26 huart->ErrorCode = HAL_UART_ERROR_NONE; 80128d8: 68fb ldr r3, [r7, #12] 80128da: 2200 movs r2, #0 80128dc: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; 80128de: 68fb ldr r3, [r7, #12] 80128e0: 2221 movs r2, #33 @ 0x21 80128e2: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the UART Transmit data register empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TXE); 80128e6: 68fb ldr r3, [r7, #12] 80128e8: 681b ldr r3, [r3, #0] 80128ea: 68da ldr r2, [r3, #12] 80128ec: 68fb ldr r3, [r7, #12] 80128ee: 681b ldr r3, [r3, #0] 80128f0: f042 0280 orr.w r2, r2, #128 @ 0x80 80128f4: 60da str r2, [r3, #12] return HAL_OK; 80128f6: 2300 movs r3, #0 80128f8: e000 b.n 80128fc } else { return HAL_BUSY; 80128fa: 2302 movs r3, #2 } } 80128fc: 4618 mov r0, r3 80128fe: 3714 adds r7, #20 8012900: 46bd mov sp, r7 8012902: bc80 pop {r7} 8012904: 4770 bx lr 08012906 : * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). * @param Size Amount of data elements (uint8_t or uint16_t) to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8012906: b580 push {r7, lr} 8012908: b08c sub sp, #48 @ 0x30 801290a: af00 add r7, sp, #0 801290c: 60f8 str r0, [r7, #12] 801290e: 60b9 str r1, [r7, #8] 8012910: 4613 mov r3, r2 8012912: 80fb strh r3, [r7, #6] HAL_StatusTypeDef status; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) 8012914: 68fb ldr r3, [r7, #12] 8012916: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 801291a: b2db uxtb r3, r3 801291c: 2b20 cmp r3, #32 801291e: d14a bne.n 80129b6 { if ((pData == NULL) || (Size == 0U)) 8012920: 68bb ldr r3, [r7, #8] 8012922: 2b00 cmp r3, #0 8012924: d002 beq.n 801292c 8012926: 88fb ldrh r3, [r7, #6] 8012928: 2b00 cmp r3, #0 801292a: d101 bne.n 8012930 { return HAL_ERROR; 801292c: 2301 movs r3, #1 801292e: e043 b.n 80129b8 } /* Set Reception type to reception till IDLE Event*/ huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; 8012930: 68fb ldr r3, [r7, #12] 8012932: 2201 movs r2, #1 8012934: 631a str r2, [r3, #48] @ 0x30 huart->RxEventType = HAL_UART_RXEVENT_TC; 8012936: 68fb ldr r3, [r7, #12] 8012938: 2200 movs r2, #0 801293a: 635a str r2, [r3, #52] @ 0x34 status = UART_Start_Receive_IT(huart, pData, Size); 801293c: 88fb ldrh r3, [r7, #6] 801293e: 461a mov r2, r3 8012940: 68b9 ldr r1, [r7, #8] 8012942: 68f8 ldr r0, [r7, #12] 8012944: f000 fbfd bl 8013142 8012948: 4603 mov r3, r0 801294a: f887 302f strb.w r3, [r7, #47] @ 0x2f /* Check Rx process has been successfully started */ if (status == HAL_OK) 801294e: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 8012952: 2b00 cmp r3, #0 8012954: d12c bne.n 80129b0 { if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8012956: 68fb ldr r3, [r7, #12] 8012958: 6b1b ldr r3, [r3, #48] @ 0x30 801295a: 2b01 cmp r3, #1 801295c: d125 bne.n 80129aa { __HAL_UART_CLEAR_IDLEFLAG(huart); 801295e: 2300 movs r3, #0 8012960: 613b str r3, [r7, #16] 8012962: 68fb ldr r3, [r7, #12] 8012964: 681b ldr r3, [r3, #0] 8012966: 681b ldr r3, [r3, #0] 8012968: 613b str r3, [r7, #16] 801296a: 68fb ldr r3, [r7, #12] 801296c: 681b ldr r3, [r3, #0] 801296e: 685b ldr r3, [r3, #4] 8012970: 613b str r3, [r7, #16] 8012972: 693b ldr r3, [r7, #16] ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8012974: 68fb ldr r3, [r7, #12] 8012976: 681b ldr r3, [r3, #0] 8012978: 330c adds r3, #12 801297a: 61bb str r3, [r7, #24] */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 801297c: 69bb ldr r3, [r7, #24] 801297e: e853 3f00 ldrex r3, [r3] 8012982: 617b str r3, [r7, #20] return(result); 8012984: 697b ldr r3, [r7, #20] 8012986: f043 0310 orr.w r3, r3, #16 801298a: 62bb str r3, [r7, #40] @ 0x28 801298c: 68fb ldr r3, [r7, #12] 801298e: 681b ldr r3, [r3, #0] 8012990: 330c adds r3, #12 8012992: 6aba ldr r2, [r7, #40] @ 0x28 8012994: 627a str r2, [r7, #36] @ 0x24 8012996: 623b str r3, [r7, #32] */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012998: 6a39 ldr r1, [r7, #32] 801299a: 6a7a ldr r2, [r7, #36] @ 0x24 801299c: e841 2300 strex r3, r2, [r1] 80129a0: 61fb str r3, [r7, #28] return(result); 80129a2: 69fb ldr r3, [r7, #28] 80129a4: 2b00 cmp r3, #0 80129a6: d1e5 bne.n 8012974 80129a8: e002 b.n 80129b0 { /* In case of errors already pending when reception is started, Interrupts may have already been raised and lead to reception abortion. (Overrun error for instance). In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ status = HAL_ERROR; 80129aa: 2301 movs r3, #1 80129ac: f887 302f strb.w r3, [r7, #47] @ 0x2f } } return status; 80129b0: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 80129b4: e000 b.n 80129b8 } else { return HAL_BUSY; 80129b6: 2302 movs r3, #2 } } 80129b8: 4618 mov r0, r3 80129ba: 3730 adds r7, #48 @ 0x30 80129bc: 46bd mov sp, r7 80129be: bd80 pop {r7, pc} 080129c0 : * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be * considered as completed only when user abort complete callback is executed (not when exiting function). * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) { 80129c0: b580 push {r7, lr} 80129c2: b0a2 sub sp, #136 @ 0x88 80129c4: af00 add r7, sp, #0 80129c6: 6078 str r0, [r7, #4] uint32_t AbortCplt = 0x01U; 80129c8: 2301 movs r3, #1 80129ca: f8c7 3084 str.w r3, [r7, #132] @ 0x84 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); 80129ce: 687b ldr r3, [r7, #4] 80129d0: 681b ldr r3, [r3, #0] 80129d2: 330c adds r3, #12 80129d4: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80129d6: 6e3b ldr r3, [r7, #96] @ 0x60 80129d8: e853 3f00 ldrex r3, [r3] 80129dc: 65fb str r3, [r7, #92] @ 0x5c return(result); 80129de: 6dfb ldr r3, [r7, #92] @ 0x5c 80129e0: f423 73f0 bic.w r3, r3, #480 @ 0x1e0 80129e4: f8c7 3080 str.w r3, [r7, #128] @ 0x80 80129e8: 687b ldr r3, [r7, #4] 80129ea: 681b ldr r3, [r3, #0] 80129ec: 330c adds r3, #12 80129ee: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 80129f2: 66fa str r2, [r7, #108] @ 0x6c 80129f4: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80129f6: 6eb9 ldr r1, [r7, #104] @ 0x68 80129f8: 6efa ldr r2, [r7, #108] @ 0x6c 80129fa: e841 2300 strex r3, r2, [r1] 80129fe: 667b str r3, [r7, #100] @ 0x64 return(result); 8012a00: 6e7b ldr r3, [r7, #100] @ 0x64 8012a02: 2b00 cmp r3, #0 8012a04: d1e3 bne.n 80129ce ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8012a06: 687b ldr r3, [r7, #4] 8012a08: 681b ldr r3, [r3, #0] 8012a0a: 3314 adds r3, #20 8012a0c: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012a0e: 6cfb ldr r3, [r7, #76] @ 0x4c 8012a10: e853 3f00 ldrex r3, [r3] 8012a14: 64bb str r3, [r7, #72] @ 0x48 return(result); 8012a16: 6cbb ldr r3, [r7, #72] @ 0x48 8012a18: f023 0301 bic.w r3, r3, #1 8012a1c: 67fb str r3, [r7, #124] @ 0x7c 8012a1e: 687b ldr r3, [r7, #4] 8012a20: 681b ldr r3, [r3, #0] 8012a22: 3314 adds r3, #20 8012a24: 6ffa ldr r2, [r7, #124] @ 0x7c 8012a26: 65ba str r2, [r7, #88] @ 0x58 8012a28: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012a2a: 6d79 ldr r1, [r7, #84] @ 0x54 8012a2c: 6dba ldr r2, [r7, #88] @ 0x58 8012a2e: e841 2300 strex r3, r2, [r1] 8012a32: 653b str r3, [r7, #80] @ 0x50 return(result); 8012a34: 6d3b ldr r3, [r7, #80] @ 0x50 8012a36: 2b00 cmp r3, #0 8012a38: d1e5 bne.n 8012a06 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8012a3a: 687b ldr r3, [r7, #4] 8012a3c: 6b1b ldr r3, [r3, #48] @ 0x30 8012a3e: 2b01 cmp r3, #1 8012a40: d119 bne.n 8012a76 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); 8012a42: 687b ldr r3, [r7, #4] 8012a44: 681b ldr r3, [r3, #0] 8012a46: 330c adds r3, #12 8012a48: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012a4a: 6bbb ldr r3, [r7, #56] @ 0x38 8012a4c: e853 3f00 ldrex r3, [r3] 8012a50: 637b str r3, [r7, #52] @ 0x34 return(result); 8012a52: 6b7b ldr r3, [r7, #52] @ 0x34 8012a54: f023 0310 bic.w r3, r3, #16 8012a58: 67bb str r3, [r7, #120] @ 0x78 8012a5a: 687b ldr r3, [r7, #4] 8012a5c: 681b ldr r3, [r3, #0] 8012a5e: 330c adds r3, #12 8012a60: 6fba ldr r2, [r7, #120] @ 0x78 8012a62: 647a str r2, [r7, #68] @ 0x44 8012a64: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012a66: 6c39 ldr r1, [r7, #64] @ 0x40 8012a68: 6c7a ldr r2, [r7, #68] @ 0x44 8012a6a: e841 2300 strex r3, r2, [r1] 8012a6e: 63fb str r3, [r7, #60] @ 0x3c return(result); 8012a70: 6bfb ldr r3, [r7, #60] @ 0x3c 8012a72: 2b00 cmp r3, #0 8012a74: d1e5 bne.n 8012a42 } /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised before any call to DMA Abort functions */ /* DMA Tx Handle is valid */ if (huart->hdmatx != NULL) 8012a76: 687b ldr r3, [r7, #4] 8012a78: 6b9b ldr r3, [r3, #56] @ 0x38 8012a7a: 2b00 cmp r3, #0 8012a7c: d00f beq.n 8012a9e { /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. Otherwise, set it to NULL */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 8012a7e: 687b ldr r3, [r7, #4] 8012a80: 681b ldr r3, [r3, #0] 8012a82: 695b ldr r3, [r3, #20] 8012a84: f003 0380 and.w r3, r3, #128 @ 0x80 8012a88: 2b00 cmp r3, #0 8012a8a: d004 beq.n 8012a96 { huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback; 8012a8c: 687b ldr r3, [r7, #4] 8012a8e: 6b9b ldr r3, [r3, #56] @ 0x38 8012a90: 4a53 ldr r2, [pc, #332] @ (8012be0 ) 8012a92: 635a str r2, [r3, #52] @ 0x34 8012a94: e003 b.n 8012a9e } else { huart->hdmatx->XferAbortCallback = NULL; 8012a96: 687b ldr r3, [r7, #4] 8012a98: 6b9b ldr r3, [r3, #56] @ 0x38 8012a9a: 2200 movs r2, #0 8012a9c: 635a str r2, [r3, #52] @ 0x34 } } /* DMA Rx Handle is valid */ if (huart->hdmarx != NULL) 8012a9e: 687b ldr r3, [r7, #4] 8012aa0: 6bdb ldr r3, [r3, #60] @ 0x3c 8012aa2: 2b00 cmp r3, #0 8012aa4: d00f beq.n 8012ac6 { /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. Otherwise, set it to NULL */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012aa6: 687b ldr r3, [r7, #4] 8012aa8: 681b ldr r3, [r3, #0] 8012aaa: 695b ldr r3, [r3, #20] 8012aac: f003 0340 and.w r3, r3, #64 @ 0x40 8012ab0: 2b00 cmp r3, #0 8012ab2: d004 beq.n 8012abe { huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback; 8012ab4: 687b ldr r3, [r7, #4] 8012ab6: 6bdb ldr r3, [r3, #60] @ 0x3c 8012ab8: 4a4a ldr r2, [pc, #296] @ (8012be4 ) 8012aba: 635a str r2, [r3, #52] @ 0x34 8012abc: e003 b.n 8012ac6 } else { huart->hdmarx->XferAbortCallback = NULL; 8012abe: 687b ldr r3, [r7, #4] 8012ac0: 6bdb ldr r3, [r3, #60] @ 0x3c 8012ac2: 2200 movs r2, #0 8012ac4: 635a str r2, [r3, #52] @ 0x34 } } /* Disable the UART DMA Tx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 8012ac6: 687b ldr r3, [r7, #4] 8012ac8: 681b ldr r3, [r3, #0] 8012aca: 695b ldr r3, [r3, #20] 8012acc: f003 0380 and.w r3, r3, #128 @ 0x80 8012ad0: 2b00 cmp r3, #0 8012ad2: d02d beq.n 8012b30 { /* Disable DMA Tx at UART level */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8012ad4: 687b ldr r3, [r7, #4] 8012ad6: 681b ldr r3, [r3, #0] 8012ad8: 3314 adds r3, #20 8012ada: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012adc: 6a7b ldr r3, [r7, #36] @ 0x24 8012ade: e853 3f00 ldrex r3, [r3] 8012ae2: 623b str r3, [r7, #32] return(result); 8012ae4: 6a3b ldr r3, [r7, #32] 8012ae6: f023 0380 bic.w r3, r3, #128 @ 0x80 8012aea: 677b str r3, [r7, #116] @ 0x74 8012aec: 687b ldr r3, [r7, #4] 8012aee: 681b ldr r3, [r3, #0] 8012af0: 3314 adds r3, #20 8012af2: 6f7a ldr r2, [r7, #116] @ 0x74 8012af4: 633a str r2, [r7, #48] @ 0x30 8012af6: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012af8: 6af9 ldr r1, [r7, #44] @ 0x2c 8012afa: 6b3a ldr r2, [r7, #48] @ 0x30 8012afc: e841 2300 strex r3, r2, [r1] 8012b00: 62bb str r3, [r7, #40] @ 0x28 return(result); 8012b02: 6abb ldr r3, [r7, #40] @ 0x28 8012b04: 2b00 cmp r3, #0 8012b06: d1e5 bne.n 8012ad4 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmatx != NULL) 8012b08: 687b ldr r3, [r7, #4] 8012b0a: 6b9b ldr r3, [r3, #56] @ 0x38 8012b0c: 2b00 cmp r3, #0 8012b0e: d00f beq.n 8012b30 { /* UART Tx DMA Abort callback has already been initialised : will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ /* Abort DMA TX */ if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) 8012b10: 687b ldr r3, [r7, #4] 8012b12: 6b9b ldr r3, [r3, #56] @ 0x38 8012b14: 4618 mov r0, r3 8012b16: f7fd fc45 bl 80103a4 8012b1a: 4603 mov r3, r0 8012b1c: 2b00 cmp r3, #0 8012b1e: d004 beq.n 8012b2a { huart->hdmatx->XferAbortCallback = NULL; 8012b20: 687b ldr r3, [r7, #4] 8012b22: 6b9b ldr r3, [r3, #56] @ 0x38 8012b24: 2200 movs r2, #0 8012b26: 635a str r2, [r3, #52] @ 0x34 8012b28: e002 b.n 8012b30 } else { AbortCplt = 0x00U; 8012b2a: 2300 movs r3, #0 8012b2c: f8c7 3084 str.w r3, [r7, #132] @ 0x84 } } } /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012b30: 687b ldr r3, [r7, #4] 8012b32: 681b ldr r3, [r3, #0] 8012b34: 695b ldr r3, [r3, #20] 8012b36: f003 0340 and.w r3, r3, #64 @ 0x40 8012b3a: 2b00 cmp r3, #0 8012b3c: d030 beq.n 8012ba0 { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8012b3e: 687b ldr r3, [r7, #4] 8012b40: 681b ldr r3, [r3, #0] 8012b42: 3314 adds r3, #20 8012b44: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012b46: 693b ldr r3, [r7, #16] 8012b48: e853 3f00 ldrex r3, [r3] 8012b4c: 60fb str r3, [r7, #12] return(result); 8012b4e: 68fb ldr r3, [r7, #12] 8012b50: f023 0340 bic.w r3, r3, #64 @ 0x40 8012b54: 673b str r3, [r7, #112] @ 0x70 8012b56: 687b ldr r3, [r7, #4] 8012b58: 681b ldr r3, [r3, #0] 8012b5a: 3314 adds r3, #20 8012b5c: 6f3a ldr r2, [r7, #112] @ 0x70 8012b5e: 61fa str r2, [r7, #28] 8012b60: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012b62: 69b9 ldr r1, [r7, #24] 8012b64: 69fa ldr r2, [r7, #28] 8012b66: e841 2300 strex r3, r2, [r1] 8012b6a: 617b str r3, [r7, #20] return(result); 8012b6c: 697b ldr r3, [r7, #20] 8012b6e: 2b00 cmp r3, #0 8012b70: d1e5 bne.n 8012b3e /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmarx != NULL) 8012b72: 687b ldr r3, [r7, #4] 8012b74: 6bdb ldr r3, [r3, #60] @ 0x3c 8012b76: 2b00 cmp r3, #0 8012b78: d012 beq.n 8012ba0 { /* UART Rx DMA Abort callback has already been initialised : will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ /* Abort DMA RX */ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8012b7a: 687b ldr r3, [r7, #4] 8012b7c: 6bdb ldr r3, [r3, #60] @ 0x3c 8012b7e: 4618 mov r0, r3 8012b80: f7fd fc10 bl 80103a4 8012b84: 4603 mov r3, r0 8012b86: 2b00 cmp r3, #0 8012b88: d007 beq.n 8012b9a { huart->hdmarx->XferAbortCallback = NULL; 8012b8a: 687b ldr r3, [r7, #4] 8012b8c: 6bdb ldr r3, [r3, #60] @ 0x3c 8012b8e: 2200 movs r2, #0 8012b90: 635a str r2, [r3, #52] @ 0x34 AbortCplt = 0x01U; 8012b92: 2301 movs r3, #1 8012b94: f8c7 3084 str.w r3, [r7, #132] @ 0x84 8012b98: e002 b.n 8012ba0 } else { AbortCplt = 0x00U; 8012b9a: 2300 movs r3, #0 8012b9c: f8c7 3084 str.w r3, [r7, #132] @ 0x84 } } } /* if no DMA abort complete callback execution is required => call user Abort Complete callback */ if (AbortCplt == 0x01U) 8012ba0: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8012ba4: 2b01 cmp r3, #1 8012ba6: d116 bne.n 8012bd6 { /* Reset Tx and Rx transfer counters */ huart->TxXferCount = 0x00U; 8012ba8: 687b ldr r3, [r7, #4] 8012baa: 2200 movs r2, #0 8012bac: 84da strh r2, [r3, #38] @ 0x26 huart->RxXferCount = 0x00U; 8012bae: 687b ldr r3, [r7, #4] 8012bb0: 2200 movs r2, #0 8012bb2: 85da strh r2, [r3, #46] @ 0x2e /* Reset ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8012bb4: 687b ldr r3, [r7, #4] 8012bb6: 2200 movs r2, #0 8012bb8: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState and huart->RxState to Ready */ huart->gState = HAL_UART_STATE_READY; 8012bba: 687b ldr r3, [r7, #4] 8012bbc: 2220 movs r2, #32 8012bbe: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8012bc2: 687b ldr r3, [r7, #4] 8012bc4: 2220 movs r2, #32 8012bc6: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8012bca: 687b ldr r3, [r7, #4] 8012bcc: 2200 movs r2, #0 8012bce: 631a str r2, [r3, #48] @ 0x30 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Abort complete callback */ huart->AbortCpltCallback(huart); #else /* Call legacy weak Abort complete callback */ HAL_UART_AbortCpltCallback(huart); 8012bd0: 6878 ldr r0, [r7, #4] 8012bd2: f000 faad bl 8013130 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; 8012bd6: 2300 movs r3, #0 } 8012bd8: 4618 mov r0, r3 8012bda: 3788 adds r7, #136 @ 0x88 8012bdc: 46bd mov sp, r7 8012bde: bd80 pop {r7, pc} 8012be0: 080132a1 .word 0x080132a1 8012be4: 08013301 .word 0x08013301 08012be8 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { 8012be8: b580 push {r7, lr} 8012bea: b0ba sub sp, #232 @ 0xe8 8012bec: af00 add r7, sp, #0 8012bee: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); 8012bf0: 687b ldr r3, [r7, #4] 8012bf2: 681b ldr r3, [r3, #0] 8012bf4: 681b ldr r3, [r3, #0] 8012bf6: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8012bfa: 687b ldr r3, [r7, #4] 8012bfc: 681b ldr r3, [r3, #0] 8012bfe: 68db ldr r3, [r3, #12] 8012c00: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); 8012c04: 687b ldr r3, [r7, #4] 8012c06: 681b ldr r3, [r3, #0] 8012c08: 695b ldr r3, [r3, #20] 8012c0a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; 8012c0e: 2300 movs r3, #0 8012c10: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; 8012c14: 2300 movs r3, #0 8012c16: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); 8012c1a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012c1e: f003 030f and.w r3, r3, #15 8012c22: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) 8012c26: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8012c2a: 2b00 cmp r3, #0 8012c2c: d10f bne.n 8012c4e { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8012c2e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012c32: f003 0320 and.w r3, r3, #32 8012c36: 2b00 cmp r3, #0 8012c38: d009 beq.n 8012c4e 8012c3a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012c3e: f003 0320 and.w r3, r3, #32 8012c42: 2b00 cmp r3, #0 8012c44: d003 beq.n 8012c4e { UART_Receive_IT(huart); 8012c46: 6878 ldr r0, [r7, #4] 8012c48: f000 fbf1 bl 801342e return; 8012c4c: e25b b.n 8013106 } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) 8012c4e: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8012c52: 2b00 cmp r3, #0 8012c54: f000 80de beq.w 8012e14 8012c58: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012c5c: f003 0301 and.w r3, r3, #1 8012c60: 2b00 cmp r3, #0 8012c62: d106 bne.n 8012c72 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8012c64: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012c68: f403 7390 and.w r3, r3, #288 @ 0x120 8012c6c: 2b00 cmp r3, #0 8012c6e: f000 80d1 beq.w 8012e14 { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8012c72: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012c76: f003 0301 and.w r3, r3, #1 8012c7a: 2b00 cmp r3, #0 8012c7c: d00b beq.n 8012c96 8012c7e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012c82: f403 7380 and.w r3, r3, #256 @ 0x100 8012c86: 2b00 cmp r3, #0 8012c88: d005 beq.n 8012c96 { huart->ErrorCode |= HAL_UART_ERROR_PE; 8012c8a: 687b ldr r3, [r7, #4] 8012c8c: 6c5b ldr r3, [r3, #68] @ 0x44 8012c8e: f043 0201 orr.w r2, r3, #1 8012c92: 687b ldr r3, [r7, #4] 8012c94: 645a str r2, [r3, #68] @ 0x44 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8012c96: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012c9a: f003 0304 and.w r3, r3, #4 8012c9e: 2b00 cmp r3, #0 8012ca0: d00b beq.n 8012cba 8012ca2: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012ca6: f003 0301 and.w r3, r3, #1 8012caa: 2b00 cmp r3, #0 8012cac: d005 beq.n 8012cba { huart->ErrorCode |= HAL_UART_ERROR_NE; 8012cae: 687b ldr r3, [r7, #4] 8012cb0: 6c5b ldr r3, [r3, #68] @ 0x44 8012cb2: f043 0202 orr.w r2, r3, #2 8012cb6: 687b ldr r3, [r7, #4] 8012cb8: 645a str r2, [r3, #68] @ 0x44 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8012cba: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012cbe: f003 0302 and.w r3, r3, #2 8012cc2: 2b00 cmp r3, #0 8012cc4: d00b beq.n 8012cde 8012cc6: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012cca: f003 0301 and.w r3, r3, #1 8012cce: 2b00 cmp r3, #0 8012cd0: d005 beq.n 8012cde { huart->ErrorCode |= HAL_UART_ERROR_FE; 8012cd2: 687b ldr r3, [r7, #4] 8012cd4: 6c5b ldr r3, [r3, #68] @ 0x44 8012cd6: f043 0204 orr.w r2, r3, #4 8012cda: 687b ldr r3, [r7, #4] 8012cdc: 645a str r2, [r3, #68] @ 0x44 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) 8012cde: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012ce2: f003 0308 and.w r3, r3, #8 8012ce6: 2b00 cmp r3, #0 8012ce8: d011 beq.n 8012d0e 8012cea: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012cee: f003 0320 and.w r3, r3, #32 8012cf2: 2b00 cmp r3, #0 8012cf4: d105 bne.n 8012d02 || ((cr3its & USART_CR3_EIE) != RESET))) 8012cf6: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012cfa: f003 0301 and.w r3, r3, #1 8012cfe: 2b00 cmp r3, #0 8012d00: d005 beq.n 8012d0e { huart->ErrorCode |= HAL_UART_ERROR_ORE; 8012d02: 687b ldr r3, [r7, #4] 8012d04: 6c5b ldr r3, [r3, #68] @ 0x44 8012d06: f043 0208 orr.w r2, r3, #8 8012d0a: 687b ldr r3, [r7, #4] 8012d0c: 645a str r2, [r3, #68] @ 0x44 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) 8012d0e: 687b ldr r3, [r7, #4] 8012d10: 6c5b ldr r3, [r3, #68] @ 0x44 8012d12: 2b00 cmp r3, #0 8012d14: f000 81f2 beq.w 80130fc { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8012d18: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012d1c: f003 0320 and.w r3, r3, #32 8012d20: 2b00 cmp r3, #0 8012d22: d008 beq.n 8012d36 8012d24: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012d28: f003 0320 and.w r3, r3, #32 8012d2c: 2b00 cmp r3, #0 8012d2e: d002 beq.n 8012d36 { UART_Receive_IT(huart); 8012d30: 6878 ldr r0, [r7, #4] 8012d32: f000 fb7c bl 801342e } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8012d36: 687b ldr r3, [r7, #4] 8012d38: 681b ldr r3, [r3, #0] 8012d3a: 695b ldr r3, [r3, #20] 8012d3c: f003 0340 and.w r3, r3, #64 @ 0x40 8012d40: 2b00 cmp r3, #0 8012d42: bf14 ite ne 8012d44: 2301 movne r3, #1 8012d46: 2300 moveq r3, #0 8012d48: b2db uxtb r3, r3 8012d4a: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8012d4e: 687b ldr r3, [r7, #4] 8012d50: 6c5b ldr r3, [r3, #68] @ 0x44 8012d52: f003 0308 and.w r3, r3, #8 8012d56: 2b00 cmp r3, #0 8012d58: d103 bne.n 8012d62 8012d5a: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 8012d5e: 2b00 cmp r3, #0 8012d60: d04f beq.n 8012e02 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); 8012d62: 6878 ldr r0, [r7, #4] 8012d64: f000 fa26 bl 80131b4 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012d68: 687b ldr r3, [r7, #4] 8012d6a: 681b ldr r3, [r3, #0] 8012d6c: 695b ldr r3, [r3, #20] 8012d6e: f003 0340 and.w r3, r3, #64 @ 0x40 8012d72: 2b00 cmp r3, #0 8012d74: d041 beq.n 8012dfa { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8012d76: 687b ldr r3, [r7, #4] 8012d78: 681b ldr r3, [r3, #0] 8012d7a: 3314 adds r3, #20 8012d7c: f8c7 309c str.w r3, [r7, #156] @ 0x9c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012d80: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 8012d84: e853 3f00 ldrex r3, [r3] 8012d88: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); 8012d8c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8012d90: f023 0340 bic.w r3, r3, #64 @ 0x40 8012d94: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 8012d98: 687b ldr r3, [r7, #4] 8012d9a: 681b ldr r3, [r3, #0] 8012d9c: 3314 adds r3, #20 8012d9e: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 8012da2: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 8012da6: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012daa: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 8012dae: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 8012db2: e841 2300 strex r3, r2, [r1] 8012db6: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); 8012dba: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 8012dbe: 2b00 cmp r3, #0 8012dc0: d1d9 bne.n 8012d76 /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) 8012dc2: 687b ldr r3, [r7, #4] 8012dc4: 6bdb ldr r3, [r3, #60] @ 0x3c 8012dc6: 2b00 cmp r3, #0 8012dc8: d013 beq.n 8012df2 { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8012dca: 687b ldr r3, [r7, #4] 8012dcc: 6bdb ldr r3, [r3, #60] @ 0x3c 8012dce: 4a7e ldr r2, [pc, #504] @ (8012fc8 ) 8012dd0: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8012dd2: 687b ldr r3, [r7, #4] 8012dd4: 6bdb ldr r3, [r3, #60] @ 0x3c 8012dd6: 4618 mov r0, r3 8012dd8: f7fd fae4 bl 80103a4 8012ddc: 4603 mov r3, r0 8012dde: 2b00 cmp r3, #0 8012de0: d016 beq.n 8012e10 { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); 8012de2: 687b ldr r3, [r7, #4] 8012de4: 6bdb ldr r3, [r3, #60] @ 0x3c 8012de6: 6b5b ldr r3, [r3, #52] @ 0x34 8012de8: 687a ldr r2, [r7, #4] 8012dea: 6bd2 ldr r2, [r2, #60] @ 0x3c 8012dec: 4610 mov r0, r2 8012dee: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012df0: e00e b.n 8012e10 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8012df2: 6878 ldr r0, [r7, #4] 8012df4: f000 f993 bl 801311e if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012df8: e00a b.n 8012e10 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8012dfa: 6878 ldr r0, [r7, #4] 8012dfc: f000 f98f bl 801311e if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012e00: e006 b.n 8012e10 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8012e02: 6878 ldr r0, [r7, #4] 8012e04: f000 f98b bl 801311e #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8012e08: 687b ldr r3, [r7, #4] 8012e0a: 2200 movs r2, #0 8012e0c: 645a str r2, [r3, #68] @ 0x44 } } return; 8012e0e: e175 b.n 80130fc if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012e10: bf00 nop return; 8012e12: e173 b.n 80130fc } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8012e14: 687b ldr r3, [r7, #4] 8012e16: 6b1b ldr r3, [r3, #48] @ 0x30 8012e18: 2b01 cmp r3, #1 8012e1a: f040 814f bne.w 80130bc && ((isrflags & USART_SR_IDLE) != 0U) 8012e1e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012e22: f003 0310 and.w r3, r3, #16 8012e26: 2b00 cmp r3, #0 8012e28: f000 8148 beq.w 80130bc && ((cr1its & USART_SR_IDLE) != 0U)) 8012e2c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012e30: f003 0310 and.w r3, r3, #16 8012e34: 2b00 cmp r3, #0 8012e36: f000 8141 beq.w 80130bc { __HAL_UART_CLEAR_IDLEFLAG(huart); 8012e3a: 2300 movs r3, #0 8012e3c: 60bb str r3, [r7, #8] 8012e3e: 687b ldr r3, [r7, #4] 8012e40: 681b ldr r3, [r3, #0] 8012e42: 681b ldr r3, [r3, #0] 8012e44: 60bb str r3, [r7, #8] 8012e46: 687b ldr r3, [r7, #4] 8012e48: 681b ldr r3, [r3, #0] 8012e4a: 685b ldr r3, [r3, #4] 8012e4c: 60bb str r3, [r7, #8] 8012e4e: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012e50: 687b ldr r3, [r7, #4] 8012e52: 681b ldr r3, [r3, #0] 8012e54: 695b ldr r3, [r3, #20] 8012e56: f003 0340 and.w r3, r3, #64 @ 0x40 8012e5a: 2b00 cmp r3, #0 8012e5c: f000 80b6 beq.w 8012fcc { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); 8012e60: 687b ldr r3, [r7, #4] 8012e62: 6bdb ldr r3, [r3, #60] @ 0x3c 8012e64: 681b ldr r3, [r3, #0] 8012e66: 685b ldr r3, [r3, #4] 8012e68: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) 8012e6c: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe 8012e70: 2b00 cmp r3, #0 8012e72: f000 8145 beq.w 8013100 && (nb_remaining_rx_data < huart->RxXferSize)) 8012e76: 687b ldr r3, [r7, #4] 8012e78: 8d9b ldrh r3, [r3, #44] @ 0x2c 8012e7a: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 8012e7e: 429a cmp r2, r3 8012e80: f080 813e bcs.w 8013100 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; 8012e84: 687b ldr r3, [r7, #4] 8012e86: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 8012e8a: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) 8012e8c: 687b ldr r3, [r7, #4] 8012e8e: 6bdb ldr r3, [r3, #60] @ 0x3c 8012e90: 699b ldr r3, [r3, #24] 8012e92: 2b20 cmp r3, #32 8012e94: f000 8088 beq.w 8012fa8 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8012e98: 687b ldr r3, [r7, #4] 8012e9a: 681b ldr r3, [r3, #0] 8012e9c: 330c adds r3, #12 8012e9e: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012ea2: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 8012ea6: e853 3f00 ldrex r3, [r3] 8012eaa: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); 8012eae: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8012eb2: f423 7380 bic.w r3, r3, #256 @ 0x100 8012eb6: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 8012eba: 687b ldr r3, [r7, #4] 8012ebc: 681b ldr r3, [r3, #0] 8012ebe: 330c adds r3, #12 8012ec0: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 8012ec4: f8c7 2094 str.w r2, [r7, #148] @ 0x94 8012ec8: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012ecc: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 8012ed0: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 8012ed4: e841 2300 strex r3, r2, [r1] 8012ed8: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); 8012edc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8012ee0: 2b00 cmp r3, #0 8012ee2: d1d9 bne.n 8012e98 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8012ee4: 687b ldr r3, [r7, #4] 8012ee6: 681b ldr r3, [r3, #0] 8012ee8: 3314 adds r3, #20 8012eea: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012eec: 6f7b ldr r3, [r7, #116] @ 0x74 8012eee: e853 3f00 ldrex r3, [r3] 8012ef2: 673b str r3, [r7, #112] @ 0x70 return(result); 8012ef4: 6f3b ldr r3, [r7, #112] @ 0x70 8012ef6: f023 0301 bic.w r3, r3, #1 8012efa: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8012efe: 687b ldr r3, [r7, #4] 8012f00: 681b ldr r3, [r3, #0] 8012f02: 3314 adds r3, #20 8012f04: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 8012f08: f8c7 2080 str.w r2, [r7, #128] @ 0x80 8012f0c: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012f0e: 6ff9 ldr r1, [r7, #124] @ 0x7c 8012f10: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 8012f14: e841 2300 strex r3, r2, [r1] 8012f18: 67bb str r3, [r7, #120] @ 0x78 return(result); 8012f1a: 6fbb ldr r3, [r7, #120] @ 0x78 8012f1c: 2b00 cmp r3, #0 8012f1e: d1e1 bne.n 8012ee4 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8012f20: 687b ldr r3, [r7, #4] 8012f22: 681b ldr r3, [r3, #0] 8012f24: 3314 adds r3, #20 8012f26: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012f28: 6e3b ldr r3, [r7, #96] @ 0x60 8012f2a: e853 3f00 ldrex r3, [r3] 8012f2e: 65fb str r3, [r7, #92] @ 0x5c return(result); 8012f30: 6dfb ldr r3, [r7, #92] @ 0x5c 8012f32: f023 0340 bic.w r3, r3, #64 @ 0x40 8012f36: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 8012f3a: 687b ldr r3, [r7, #4] 8012f3c: 681b ldr r3, [r3, #0] 8012f3e: 3314 adds r3, #20 8012f40: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 8012f44: 66fa str r2, [r7, #108] @ 0x6c 8012f46: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012f48: 6eb9 ldr r1, [r7, #104] @ 0x68 8012f4a: 6efa ldr r2, [r7, #108] @ 0x6c 8012f4c: e841 2300 strex r3, r2, [r1] 8012f50: 667b str r3, [r7, #100] @ 0x64 return(result); 8012f52: 6e7b ldr r3, [r7, #100] @ 0x64 8012f54: 2b00 cmp r3, #0 8012f56: d1e3 bne.n 8012f20 /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8012f58: 687b ldr r3, [r7, #4] 8012f5a: 2220 movs r2, #32 8012f5c: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8012f60: 687b ldr r3, [r7, #4] 8012f62: 2200 movs r2, #0 8012f64: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8012f66: 687b ldr r3, [r7, #4] 8012f68: 681b ldr r3, [r3, #0] 8012f6a: 330c adds r3, #12 8012f6c: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012f6e: 6cfb ldr r3, [r7, #76] @ 0x4c 8012f70: e853 3f00 ldrex r3, [r3] 8012f74: 64bb str r3, [r7, #72] @ 0x48 return(result); 8012f76: 6cbb ldr r3, [r7, #72] @ 0x48 8012f78: f023 0310 bic.w r3, r3, #16 8012f7c: f8c7 30ac str.w r3, [r7, #172] @ 0xac 8012f80: 687b ldr r3, [r7, #4] 8012f82: 681b ldr r3, [r3, #0] 8012f84: 330c adds r3, #12 8012f86: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac 8012f8a: 65ba str r2, [r7, #88] @ 0x58 8012f8c: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012f8e: 6d79 ldr r1, [r7, #84] @ 0x54 8012f90: 6dba ldr r2, [r7, #88] @ 0x58 8012f92: e841 2300 strex r3, r2, [r1] 8012f96: 653b str r3, [r7, #80] @ 0x50 return(result); 8012f98: 6d3b ldr r3, [r7, #80] @ 0x50 8012f9a: 2b00 cmp r3, #0 8012f9c: d1e3 bne.n 8012f66 /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); 8012f9e: 687b ldr r3, [r7, #4] 8012fa0: 6bdb ldr r3, [r3, #60] @ 0x3c 8012fa2: 4618 mov r0, r3 8012fa4: f7fd f9c3 bl 801032e } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 8012fa8: 687b ldr r3, [r7, #4] 8012faa: 2202 movs r2, #2 8012fac: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); 8012fae: 687b ldr r3, [r7, #4] 8012fb0: 8d9a ldrh r2, [r3, #44] @ 0x2c 8012fb2: 687b ldr r3, [r7, #4] 8012fb4: 8ddb ldrh r3, [r3, #46] @ 0x2e 8012fb6: b29b uxth r3, r3 8012fb8: 1ad3 subs r3, r2, r3 8012fba: b29b uxth r3, r3 8012fbc: 4619 mov r1, r3 8012fbe: 6878 ldr r0, [r7, #4] 8012fc0: f7fa fa72 bl 800d4a8 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 8012fc4: e09c b.n 8013100 8012fc6: bf00 nop 8012fc8: 08013279 .word 0x08013279 else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8012fcc: 687b ldr r3, [r7, #4] 8012fce: 8d9a ldrh r2, [r3, #44] @ 0x2c 8012fd0: 687b ldr r3, [r7, #4] 8012fd2: 8ddb ldrh r3, [r3, #46] @ 0x2e 8012fd4: b29b uxth r3, r3 8012fd6: 1ad3 subs r3, r2, r3 8012fd8: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) 8012fdc: 687b ldr r3, [r7, #4] 8012fde: 8ddb ldrh r3, [r3, #46] @ 0x2e 8012fe0: b29b uxth r3, r3 8012fe2: 2b00 cmp r3, #0 8012fe4: f000 808e beq.w 8013104 && (nb_rx_data > 0U)) 8012fe8: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 8012fec: 2b00 cmp r3, #0 8012fee: f000 8089 beq.w 8013104 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8012ff2: 687b ldr r3, [r7, #4] 8012ff4: 681b ldr r3, [r3, #0] 8012ff6: 330c adds r3, #12 8012ff8: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012ffa: 6bbb ldr r3, [r7, #56] @ 0x38 8012ffc: e853 3f00 ldrex r3, [r3] 8013000: 637b str r3, [r7, #52] @ 0x34 return(result); 8013002: 6b7b ldr r3, [r7, #52] @ 0x34 8013004: f423 7390 bic.w r3, r3, #288 @ 0x120 8013008: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 801300c: 687b ldr r3, [r7, #4] 801300e: 681b ldr r3, [r3, #0] 8013010: 330c adds r3, #12 8013012: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 8013016: 647a str r2, [r7, #68] @ 0x44 8013018: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801301a: 6c39 ldr r1, [r7, #64] @ 0x40 801301c: 6c7a ldr r2, [r7, #68] @ 0x44 801301e: e841 2300 strex r3, r2, [r1] 8013022: 63fb str r3, [r7, #60] @ 0x3c return(result); 8013024: 6bfb ldr r3, [r7, #60] @ 0x3c 8013026: 2b00 cmp r3, #0 8013028: d1e3 bne.n 8012ff2 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 801302a: 687b ldr r3, [r7, #4] 801302c: 681b ldr r3, [r3, #0] 801302e: 3314 adds r3, #20 8013030: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8013032: 6a7b ldr r3, [r7, #36] @ 0x24 8013034: e853 3f00 ldrex r3, [r3] 8013038: 623b str r3, [r7, #32] return(result); 801303a: 6a3b ldr r3, [r7, #32] 801303c: f023 0301 bic.w r3, r3, #1 8013040: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 8013044: 687b ldr r3, [r7, #4] 8013046: 681b ldr r3, [r3, #0] 8013048: 3314 adds r3, #20 801304a: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 801304e: 633a str r2, [r7, #48] @ 0x30 8013050: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013052: 6af9 ldr r1, [r7, #44] @ 0x2c 8013054: 6b3a ldr r2, [r7, #48] @ 0x30 8013056: e841 2300 strex r3, r2, [r1] 801305a: 62bb str r3, [r7, #40] @ 0x28 return(result); 801305c: 6abb ldr r3, [r7, #40] @ 0x28 801305e: 2b00 cmp r3, #0 8013060: d1e3 bne.n 801302a /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8013062: 687b ldr r3, [r7, #4] 8013064: 2220 movs r2, #32 8013066: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 801306a: 687b ldr r3, [r7, #4] 801306c: 2200 movs r2, #0 801306e: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8013070: 687b ldr r3, [r7, #4] 8013072: 681b ldr r3, [r3, #0] 8013074: 330c adds r3, #12 8013076: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8013078: 693b ldr r3, [r7, #16] 801307a: e853 3f00 ldrex r3, [r3] 801307e: 60fb str r3, [r7, #12] return(result); 8013080: 68fb ldr r3, [r7, #12] 8013082: f023 0310 bic.w r3, r3, #16 8013086: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 801308a: 687b ldr r3, [r7, #4] 801308c: 681b ldr r3, [r3, #0] 801308e: 330c adds r3, #12 8013090: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 8013094: 61fa str r2, [r7, #28] 8013096: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013098: 69b9 ldr r1, [r7, #24] 801309a: 69fa ldr r2, [r7, #28] 801309c: e841 2300 strex r3, r2, [r1] 80130a0: 617b str r3, [r7, #20] return(result); 80130a2: 697b ldr r3, [r7, #20] 80130a4: 2b00 cmp r3, #0 80130a6: d1e3 bne.n 8013070 /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 80130a8: 687b ldr r3, [r7, #4] 80130aa: 2202 movs r2, #2 80130ac: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); 80130ae: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 80130b2: 4619 mov r1, r3 80130b4: 6878 ldr r0, [r7, #4] 80130b6: f7fa f9f7 bl 800d4a8 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 80130ba: e023 b.n 8013104 } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 80130bc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 80130c0: f003 0380 and.w r3, r3, #128 @ 0x80 80130c4: 2b00 cmp r3, #0 80130c6: d009 beq.n 80130dc 80130c8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80130cc: f003 0380 and.w r3, r3, #128 @ 0x80 80130d0: 2b00 cmp r3, #0 80130d2: d003 beq.n 80130dc { UART_Transmit_IT(huart); 80130d4: 6878 ldr r0, [r7, #4] 80130d6: f000 f943 bl 8013360 return; 80130da: e014 b.n 8013106 } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 80130dc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 80130e0: f003 0340 and.w r3, r3, #64 @ 0x40 80130e4: 2b00 cmp r3, #0 80130e6: d00e beq.n 8013106 80130e8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80130ec: f003 0340 and.w r3, r3, #64 @ 0x40 80130f0: 2b00 cmp r3, #0 80130f2: d008 beq.n 8013106 { UART_EndTransmit_IT(huart); 80130f4: 6878 ldr r0, [r7, #4] 80130f6: f000 f982 bl 80133fe return; 80130fa: e004 b.n 8013106 return; 80130fc: bf00 nop 80130fe: e002 b.n 8013106 return; 8013100: bf00 nop 8013102: e000 b.n 8013106 return; 8013104: bf00 nop } } 8013106: 37e8 adds r7, #232 @ 0xe8 8013108: 46bd mov sp, r7 801310a: bd80 pop {r7, pc} 0801310c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { 801310c: b480 push {r7} 801310e: b083 sub sp, #12 8013110: af00 add r7, sp, #0 8013112: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } 8013114: bf00 nop 8013116: 370c adds r7, #12 8013118: 46bd mov sp, r7 801311a: bc80 pop {r7} 801311c: 4770 bx lr 0801311e : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { 801311e: b480 push {r7} 8013120: b083 sub sp, #12 8013122: af00 add r7, sp, #0 8013124: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } 8013126: bf00 nop 8013128: 370c adds r7, #12 801312a: 46bd mov sp, r7 801312c: bc80 pop {r7} 801312e: 4770 bx lr 08013130 : * @brief UART Abort Complete callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart) { 8013130: b480 push {r7} 8013132: b083 sub sp, #12 8013134: af00 add r7, sp, #0 8013136: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_AbortCpltCallback can be implemented in the user file. */ } 8013138: bf00 nop 801313a: 370c adds r7, #12 801313c: 46bd mov sp, r7 801313e: bc80 pop {r7} 8013140: 4770 bx lr 08013142 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8013142: b480 push {r7} 8013144: b085 sub sp, #20 8013146: af00 add r7, sp, #0 8013148: 60f8 str r0, [r7, #12] 801314a: 60b9 str r1, [r7, #8] 801314c: 4613 mov r3, r2 801314e: 80fb strh r3, [r7, #6] huart->pRxBuffPtr = pData; 8013150: 68fb ldr r3, [r7, #12] 8013152: 68ba ldr r2, [r7, #8] 8013154: 629a str r2, [r3, #40] @ 0x28 huart->RxXferSize = Size; 8013156: 68fb ldr r3, [r7, #12] 8013158: 88fa ldrh r2, [r7, #6] 801315a: 859a strh r2, [r3, #44] @ 0x2c huart->RxXferCount = Size; 801315c: 68fb ldr r3, [r7, #12] 801315e: 88fa ldrh r2, [r7, #6] 8013160: 85da strh r2, [r3, #46] @ 0x2e huart->ErrorCode = HAL_UART_ERROR_NONE; 8013162: 68fb ldr r3, [r7, #12] 8013164: 2200 movs r2, #0 8013166: 645a str r2, [r3, #68] @ 0x44 huart->RxState = HAL_UART_STATE_BUSY_RX; 8013168: 68fb ldr r3, [r7, #12] 801316a: 2222 movs r2, #34 @ 0x22 801316c: f883 2042 strb.w r2, [r3, #66] @ 0x42 if (huart->Init.Parity != UART_PARITY_NONE) 8013170: 68fb ldr r3, [r7, #12] 8013172: 691b ldr r3, [r3, #16] 8013174: 2b00 cmp r3, #0 8013176: d007 beq.n 8013188 { /* Enable the UART Parity Error Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8013178: 68fb ldr r3, [r7, #12] 801317a: 681b ldr r3, [r3, #0] 801317c: 68da ldr r2, [r3, #12] 801317e: 68fb ldr r3, [r7, #12] 8013180: 681b ldr r3, [r3, #0] 8013182: f442 7280 orr.w r2, r2, #256 @ 0x100 8013186: 60da str r2, [r3, #12] } /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8013188: 68fb ldr r3, [r7, #12] 801318a: 681b ldr r3, [r3, #0] 801318c: 695a ldr r2, [r3, #20] 801318e: 68fb ldr r3, [r7, #12] 8013190: 681b ldr r3, [r3, #0] 8013192: f042 0201 orr.w r2, r2, #1 8013196: 615a str r2, [r3, #20] /* Enable the UART Data Register not empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 8013198: 68fb ldr r3, [r7, #12] 801319a: 681b ldr r3, [r3, #0] 801319c: 68da ldr r2, [r3, #12] 801319e: 68fb ldr r3, [r7, #12] 80131a0: 681b ldr r3, [r3, #0] 80131a2: f042 0220 orr.w r2, r2, #32 80131a6: 60da str r2, [r3, #12] return HAL_OK; 80131a8: 2300 movs r3, #0 } 80131aa: 4618 mov r0, r3 80131ac: 3714 adds r7, #20 80131ae: 46bd mov sp, r7 80131b0: bc80 pop {r7} 80131b2: 4770 bx lr 080131b4 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 80131b4: b480 push {r7} 80131b6: b095 sub sp, #84 @ 0x54 80131b8: af00 add r7, sp, #0 80131ba: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80131bc: 687b ldr r3, [r7, #4] 80131be: 681b ldr r3, [r3, #0] 80131c0: 330c adds r3, #12 80131c2: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80131c4: 6b7b ldr r3, [r7, #52] @ 0x34 80131c6: e853 3f00 ldrex r3, [r3] 80131ca: 633b str r3, [r7, #48] @ 0x30 return(result); 80131cc: 6b3b ldr r3, [r7, #48] @ 0x30 80131ce: f423 7390 bic.w r3, r3, #288 @ 0x120 80131d2: 64fb str r3, [r7, #76] @ 0x4c 80131d4: 687b ldr r3, [r7, #4] 80131d6: 681b ldr r3, [r3, #0] 80131d8: 330c adds r3, #12 80131da: 6cfa ldr r2, [r7, #76] @ 0x4c 80131dc: 643a str r2, [r7, #64] @ 0x40 80131de: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80131e0: 6bf9 ldr r1, [r7, #60] @ 0x3c 80131e2: 6c3a ldr r2, [r7, #64] @ 0x40 80131e4: e841 2300 strex r3, r2, [r1] 80131e8: 63bb str r3, [r7, #56] @ 0x38 return(result); 80131ea: 6bbb ldr r3, [r7, #56] @ 0x38 80131ec: 2b00 cmp r3, #0 80131ee: d1e5 bne.n 80131bc ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80131f0: 687b ldr r3, [r7, #4] 80131f2: 681b ldr r3, [r3, #0] 80131f4: 3314 adds r3, #20 80131f6: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80131f8: 6a3b ldr r3, [r7, #32] 80131fa: e853 3f00 ldrex r3, [r3] 80131fe: 61fb str r3, [r7, #28] return(result); 8013200: 69fb ldr r3, [r7, #28] 8013202: f023 0301 bic.w r3, r3, #1 8013206: 64bb str r3, [r7, #72] @ 0x48 8013208: 687b ldr r3, [r7, #4] 801320a: 681b ldr r3, [r3, #0] 801320c: 3314 adds r3, #20 801320e: 6cba ldr r2, [r7, #72] @ 0x48 8013210: 62fa str r2, [r7, #44] @ 0x2c 8013212: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013214: 6ab9 ldr r1, [r7, #40] @ 0x28 8013216: 6afa ldr r2, [r7, #44] @ 0x2c 8013218: e841 2300 strex r3, r2, [r1] 801321c: 627b str r3, [r7, #36] @ 0x24 return(result); 801321e: 6a7b ldr r3, [r7, #36] @ 0x24 8013220: 2b00 cmp r3, #0 8013222: d1e5 bne.n 80131f0 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8013224: 687b ldr r3, [r7, #4] 8013226: 6b1b ldr r3, [r3, #48] @ 0x30 8013228: 2b01 cmp r3, #1 801322a: d119 bne.n 8013260 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 801322c: 687b ldr r3, [r7, #4] 801322e: 681b ldr r3, [r3, #0] 8013230: 330c adds r3, #12 8013232: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8013234: 68fb ldr r3, [r7, #12] 8013236: e853 3f00 ldrex r3, [r3] 801323a: 60bb str r3, [r7, #8] return(result); 801323c: 68bb ldr r3, [r7, #8] 801323e: f023 0310 bic.w r3, r3, #16 8013242: 647b str r3, [r7, #68] @ 0x44 8013244: 687b ldr r3, [r7, #4] 8013246: 681b ldr r3, [r3, #0] 8013248: 330c adds r3, #12 801324a: 6c7a ldr r2, [r7, #68] @ 0x44 801324c: 61ba str r2, [r7, #24] 801324e: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013250: 6979 ldr r1, [r7, #20] 8013252: 69ba ldr r2, [r7, #24] 8013254: e841 2300 strex r3, r2, [r1] 8013258: 613b str r3, [r7, #16] return(result); 801325a: 693b ldr r3, [r7, #16] 801325c: 2b00 cmp r3, #0 801325e: d1e5 bne.n 801322c } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8013260: 687b ldr r3, [r7, #4] 8013262: 2220 movs r2, #32 8013264: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8013268: 687b ldr r3, [r7, #4] 801326a: 2200 movs r2, #0 801326c: 631a str r2, [r3, #48] @ 0x30 } 801326e: bf00 nop 8013270: 3754 adds r7, #84 @ 0x54 8013272: 46bd mov sp, r7 8013274: bc80 pop {r7} 8013276: 4770 bx lr 08013278 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { 8013278: b580 push {r7, lr} 801327a: b084 sub sp, #16 801327c: af00 add r7, sp, #0 801327e: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8013280: 687b ldr r3, [r7, #4] 8013282: 6a5b ldr r3, [r3, #36] @ 0x24 8013284: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; 8013286: 68fb ldr r3, [r7, #12] 8013288: 2200 movs r2, #0 801328a: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; 801328c: 68fb ldr r3, [r7, #12] 801328e: 2200 movs r2, #0 8013290: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8013292: 68f8 ldr r0, [r7, #12] 8013294: f7ff ff43 bl 801311e #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8013298: bf00 nop 801329a: 3710 adds r7, #16 801329c: 46bd mov sp, r7 801329e: bd80 pop {r7, pc} 080132a0 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) { 80132a0: b580 push {r7, lr} 80132a2: b084 sub sp, #16 80132a4: af00 add r7, sp, #0 80132a6: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 80132a8: 687b ldr r3, [r7, #4] 80132aa: 6a5b ldr r3, [r3, #36] @ 0x24 80132ac: 60fb str r3, [r7, #12] huart->hdmatx->XferAbortCallback = NULL; 80132ae: 68fb ldr r3, [r7, #12] 80132b0: 6b9b ldr r3, [r3, #56] @ 0x38 80132b2: 2200 movs r2, #0 80132b4: 635a str r2, [r3, #52] @ 0x34 /* Check if an Abort process is still ongoing */ if (huart->hdmarx != NULL) 80132b6: 68fb ldr r3, [r7, #12] 80132b8: 6bdb ldr r3, [r3, #60] @ 0x3c 80132ba: 2b00 cmp r3, #0 80132bc: d004 beq.n 80132c8 { if (huart->hdmarx->XferAbortCallback != NULL) 80132be: 68fb ldr r3, [r7, #12] 80132c0: 6bdb ldr r3, [r3, #60] @ 0x3c 80132c2: 6b5b ldr r3, [r3, #52] @ 0x34 80132c4: 2b00 cmp r3, #0 80132c6: d117 bne.n 80132f8 return; } } /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ huart->TxXferCount = 0x00U; 80132c8: 68fb ldr r3, [r7, #12] 80132ca: 2200 movs r2, #0 80132cc: 84da strh r2, [r3, #38] @ 0x26 huart->RxXferCount = 0x00U; 80132ce: 68fb ldr r3, [r7, #12] 80132d0: 2200 movs r2, #0 80132d2: 85da strh r2, [r3, #46] @ 0x2e /* Reset ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 80132d4: 68fb ldr r3, [r7, #12] 80132d6: 2200 movs r2, #0 80132d8: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState and huart->RxState to Ready */ huart->gState = HAL_UART_STATE_READY; 80132da: 68fb ldr r3, [r7, #12] 80132dc: 2220 movs r2, #32 80132de: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 80132e2: 68fb ldr r3, [r7, #12] 80132e4: 2220 movs r2, #32 80132e6: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80132ea: 68fb ldr r3, [r7, #12] 80132ec: 2200 movs r2, #0 80132ee: 631a str r2, [r3, #48] @ 0x30 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Abort complete callback */ huart->AbortCpltCallback(huart); #else /* Call legacy weak Abort complete callback */ HAL_UART_AbortCpltCallback(huart); 80132f0: 68f8 ldr r0, [r7, #12] 80132f2: f7ff ff1d bl 8013130 80132f6: e000 b.n 80132fa return; 80132f8: bf00 nop #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 80132fa: 3710 adds r7, #16 80132fc: 46bd mov sp, r7 80132fe: bd80 pop {r7, pc} 08013300 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) { 8013300: b580 push {r7, lr} 8013302: b084 sub sp, #16 8013304: af00 add r7, sp, #0 8013306: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8013308: 687b ldr r3, [r7, #4] 801330a: 6a5b ldr r3, [r3, #36] @ 0x24 801330c: 60fb str r3, [r7, #12] huart->hdmarx->XferAbortCallback = NULL; 801330e: 68fb ldr r3, [r7, #12] 8013310: 6bdb ldr r3, [r3, #60] @ 0x3c 8013312: 2200 movs r2, #0 8013314: 635a str r2, [r3, #52] @ 0x34 /* Check if an Abort process is still ongoing */ if (huart->hdmatx != NULL) 8013316: 68fb ldr r3, [r7, #12] 8013318: 6b9b ldr r3, [r3, #56] @ 0x38 801331a: 2b00 cmp r3, #0 801331c: d004 beq.n 8013328 { if (huart->hdmatx->XferAbortCallback != NULL) 801331e: 68fb ldr r3, [r7, #12] 8013320: 6b9b ldr r3, [r3, #56] @ 0x38 8013322: 6b5b ldr r3, [r3, #52] @ 0x34 8013324: 2b00 cmp r3, #0 8013326: d117 bne.n 8013358 return; } } /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ huart->TxXferCount = 0x00U; 8013328: 68fb ldr r3, [r7, #12] 801332a: 2200 movs r2, #0 801332c: 84da strh r2, [r3, #38] @ 0x26 huart->RxXferCount = 0x00U; 801332e: 68fb ldr r3, [r7, #12] 8013330: 2200 movs r2, #0 8013332: 85da strh r2, [r3, #46] @ 0x2e /* Reset ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8013334: 68fb ldr r3, [r7, #12] 8013336: 2200 movs r2, #0 8013338: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState and huart->RxState to Ready */ huart->gState = HAL_UART_STATE_READY; 801333a: 68fb ldr r3, [r7, #12] 801333c: 2220 movs r2, #32 801333e: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8013342: 68fb ldr r3, [r7, #12] 8013344: 2220 movs r2, #32 8013346: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 801334a: 68fb ldr r3, [r7, #12] 801334c: 2200 movs r2, #0 801334e: 631a str r2, [r3, #48] @ 0x30 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Abort complete callback */ huart->AbortCpltCallback(huart); #else /* Call legacy weak Abort complete callback */ HAL_UART_AbortCpltCallback(huart); 8013350: 68f8 ldr r0, [r7, #12] 8013352: f7ff feed bl 8013130 8013356: e000 b.n 801335a return; 8013358: bf00 nop #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 801335a: 3710 adds r7, #16 801335c: 46bd mov sp, r7 801335e: bd80 pop {r7, pc} 08013360 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { 8013360: b480 push {r7} 8013362: b085 sub sp, #20 8013364: af00 add r7, sp, #0 8013366: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) 8013368: 687b ldr r3, [r7, #4] 801336a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 801336e: b2db uxtb r3, r3 8013370: 2b21 cmp r3, #33 @ 0x21 8013372: d13e bne.n 80133f2 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8013374: 687b ldr r3, [r7, #4] 8013376: 689b ldr r3, [r3, #8] 8013378: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 801337c: d114 bne.n 80133a8 801337e: 687b ldr r3, [r7, #4] 8013380: 691b ldr r3, [r3, #16] 8013382: 2b00 cmp r3, #0 8013384: d110 bne.n 80133a8 { tmp = (const uint16_t *) huart->pTxBuffPtr; 8013386: 687b ldr r3, [r7, #4] 8013388: 6a1b ldr r3, [r3, #32] 801338a: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 801338c: 68fb ldr r3, [r7, #12] 801338e: 881b ldrh r3, [r3, #0] 8013390: 461a mov r2, r3 8013392: 687b ldr r3, [r7, #4] 8013394: 681b ldr r3, [r3, #0] 8013396: f3c2 0208 ubfx r2, r2, #0, #9 801339a: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; 801339c: 687b ldr r3, [r7, #4] 801339e: 6a1b ldr r3, [r3, #32] 80133a0: 1c9a adds r2, r3, #2 80133a2: 687b ldr r3, [r7, #4] 80133a4: 621a str r2, [r3, #32] 80133a6: e008 b.n 80133ba } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 80133a8: 687b ldr r3, [r7, #4] 80133aa: 6a1b ldr r3, [r3, #32] 80133ac: 1c59 adds r1, r3, #1 80133ae: 687a ldr r2, [r7, #4] 80133b0: 6211 str r1, [r2, #32] 80133b2: 781a ldrb r2, [r3, #0] 80133b4: 687b ldr r3, [r7, #4] 80133b6: 681b ldr r3, [r3, #0] 80133b8: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) 80133ba: 687b ldr r3, [r7, #4] 80133bc: 8cdb ldrh r3, [r3, #38] @ 0x26 80133be: b29b uxth r3, r3 80133c0: 3b01 subs r3, #1 80133c2: b29b uxth r3, r3 80133c4: 687a ldr r2, [r7, #4] 80133c6: 4619 mov r1, r3 80133c8: 84d1 strh r1, [r2, #38] @ 0x26 80133ca: 2b00 cmp r3, #0 80133cc: d10f bne.n 80133ee { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 80133ce: 687b ldr r3, [r7, #4] 80133d0: 681b ldr r3, [r3, #0] 80133d2: 68da ldr r2, [r3, #12] 80133d4: 687b ldr r3, [r7, #4] 80133d6: 681b ldr r3, [r3, #0] 80133d8: f022 0280 bic.w r2, r2, #128 @ 0x80 80133dc: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 80133de: 687b ldr r3, [r7, #4] 80133e0: 681b ldr r3, [r3, #0] 80133e2: 68da ldr r2, [r3, #12] 80133e4: 687b ldr r3, [r7, #4] 80133e6: 681b ldr r3, [r3, #0] 80133e8: f042 0240 orr.w r2, r2, #64 @ 0x40 80133ec: 60da str r2, [r3, #12] } return HAL_OK; 80133ee: 2300 movs r3, #0 80133f0: e000 b.n 80133f4 } else { return HAL_BUSY; 80133f2: 2302 movs r3, #2 } } 80133f4: 4618 mov r0, r3 80133f6: 3714 adds r7, #20 80133f8: 46bd mov sp, r7 80133fa: bc80 pop {r7} 80133fc: 4770 bx lr 080133fe : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { 80133fe: b580 push {r7, lr} 8013400: b082 sub sp, #8 8013402: af00 add r7, sp, #0 8013404: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8013406: 687b ldr r3, [r7, #4] 8013408: 681b ldr r3, [r3, #0] 801340a: 68da ldr r2, [r3, #12] 801340c: 687b ldr r3, [r7, #4] 801340e: 681b ldr r3, [r3, #0] 8013410: f022 0240 bic.w r2, r2, #64 @ 0x40 8013414: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8013416: 687b ldr r3, [r7, #4] 8013418: 2220 movs r2, #32 801341a: f883 2041 strb.w r2, [r3, #65] @ 0x41 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); 801341e: 6878 ldr r0, [r7, #4] 8013420: f7fa f894 bl 800d54c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; 8013424: 2300 movs r3, #0 } 8013426: 4618 mov r0, r3 8013428: 3708 adds r7, #8 801342a: 46bd mov sp, r7 801342c: bd80 pop {r7, pc} 0801342e : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { 801342e: b580 push {r7, lr} 8013430: b08c sub sp, #48 @ 0x30 8013432: af00 add r7, sp, #0 8013434: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) 8013436: 687b ldr r3, [r7, #4] 8013438: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 801343c: b2db uxtb r3, r3 801343e: 2b22 cmp r3, #34 @ 0x22 8013440: f040 80ae bne.w 80135a0 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8013444: 687b ldr r3, [r7, #4] 8013446: 689b ldr r3, [r3, #8] 8013448: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 801344c: d117 bne.n 801347e 801344e: 687b ldr r3, [r7, #4] 8013450: 691b ldr r3, [r3, #16] 8013452: 2b00 cmp r3, #0 8013454: d113 bne.n 801347e { pdata8bits = NULL; 8013456: 2300 movs r3, #0 8013458: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = (uint16_t *) huart->pRxBuffPtr; 801345a: 687b ldr r3, [r7, #4] 801345c: 6a9b ldr r3, [r3, #40] @ 0x28 801345e: 62bb str r3, [r7, #40] @ 0x28 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8013460: 687b ldr r3, [r7, #4] 8013462: 681b ldr r3, [r3, #0] 8013464: 685b ldr r3, [r3, #4] 8013466: b29b uxth r3, r3 8013468: f3c3 0308 ubfx r3, r3, #0, #9 801346c: b29a uxth r2, r3 801346e: 6abb ldr r3, [r7, #40] @ 0x28 8013470: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; 8013472: 687b ldr r3, [r7, #4] 8013474: 6a9b ldr r3, [r3, #40] @ 0x28 8013476: 1c9a adds r2, r3, #2 8013478: 687b ldr r3, [r7, #4] 801347a: 629a str r2, [r3, #40] @ 0x28 801347c: e026 b.n 80134cc } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; 801347e: 687b ldr r3, [r7, #4] 8013480: 6a9b ldr r3, [r3, #40] @ 0x28 8013482: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = NULL; 8013484: 2300 movs r3, #0 8013486: 62bb str r3, [r7, #40] @ 0x28 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) 8013488: 687b ldr r3, [r7, #4] 801348a: 689b ldr r3, [r3, #8] 801348c: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8013490: d007 beq.n 80134a2 8013492: 687b ldr r3, [r7, #4] 8013494: 689b ldr r3, [r3, #8] 8013496: 2b00 cmp r3, #0 8013498: d10a bne.n 80134b0 801349a: 687b ldr r3, [r7, #4] 801349c: 691b ldr r3, [r3, #16] 801349e: 2b00 cmp r3, #0 80134a0: d106 bne.n 80134b0 { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 80134a2: 687b ldr r3, [r7, #4] 80134a4: 681b ldr r3, [r3, #0] 80134a6: 685b ldr r3, [r3, #4] 80134a8: b2da uxtb r2, r3 80134aa: 6afb ldr r3, [r7, #44] @ 0x2c 80134ac: 701a strb r2, [r3, #0] 80134ae: e008 b.n 80134c2 } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 80134b0: 687b ldr r3, [r7, #4] 80134b2: 681b ldr r3, [r3, #0] 80134b4: 685b ldr r3, [r3, #4] 80134b6: b2db uxtb r3, r3 80134b8: f003 037f and.w r3, r3, #127 @ 0x7f 80134bc: b2da uxtb r2, r3 80134be: 6afb ldr r3, [r7, #44] @ 0x2c 80134c0: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; 80134c2: 687b ldr r3, [r7, #4] 80134c4: 6a9b ldr r3, [r3, #40] @ 0x28 80134c6: 1c5a adds r2, r3, #1 80134c8: 687b ldr r3, [r7, #4] 80134ca: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) 80134cc: 687b ldr r3, [r7, #4] 80134ce: 8ddb ldrh r3, [r3, #46] @ 0x2e 80134d0: b29b uxth r3, r3 80134d2: 3b01 subs r3, #1 80134d4: b29b uxth r3, r3 80134d6: 687a ldr r2, [r7, #4] 80134d8: 4619 mov r1, r3 80134da: 85d1 strh r1, [r2, #46] @ 0x2e 80134dc: 2b00 cmp r3, #0 80134de: d15d bne.n 801359c { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80134e0: 687b ldr r3, [r7, #4] 80134e2: 681b ldr r3, [r3, #0] 80134e4: 68da ldr r2, [r3, #12] 80134e6: 687b ldr r3, [r7, #4] 80134e8: 681b ldr r3, [r3, #0] 80134ea: f022 0220 bic.w r2, r2, #32 80134ee: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80134f0: 687b ldr r3, [r7, #4] 80134f2: 681b ldr r3, [r3, #0] 80134f4: 68da ldr r2, [r3, #12] 80134f6: 687b ldr r3, [r7, #4] 80134f8: 681b ldr r3, [r3, #0] 80134fa: f422 7280 bic.w r2, r2, #256 @ 0x100 80134fe: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 8013500: 687b ldr r3, [r7, #4] 8013502: 681b ldr r3, [r3, #0] 8013504: 695a ldr r2, [r3, #20] 8013506: 687b ldr r3, [r7, #4] 8013508: 681b ldr r3, [r3, #0] 801350a: f022 0201 bic.w r2, r2, #1 801350e: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8013510: 687b ldr r3, [r7, #4] 8013512: 2220 movs r2, #32 8013514: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Initialize type of RxEvent to Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; 8013518: 687b ldr r3, [r7, #4] 801351a: 2200 movs r2, #0 801351c: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 801351e: 687b ldr r3, [r7, #4] 8013520: 6b1b ldr r3, [r3, #48] @ 0x30 8013522: 2b01 cmp r3, #1 8013524: d135 bne.n 8013592 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8013526: 687b ldr r3, [r7, #4] 8013528: 2200 movs r2, #0 801352a: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 801352c: 687b ldr r3, [r7, #4] 801352e: 681b ldr r3, [r3, #0] 8013530: 330c adds r3, #12 8013532: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8013534: 697b ldr r3, [r7, #20] 8013536: e853 3f00 ldrex r3, [r3] 801353a: 613b str r3, [r7, #16] return(result); 801353c: 693b ldr r3, [r7, #16] 801353e: f023 0310 bic.w r3, r3, #16 8013542: 627b str r3, [r7, #36] @ 0x24 8013544: 687b ldr r3, [r7, #4] 8013546: 681b ldr r3, [r3, #0] 8013548: 330c adds r3, #12 801354a: 6a7a ldr r2, [r7, #36] @ 0x24 801354c: 623a str r2, [r7, #32] 801354e: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013550: 69f9 ldr r1, [r7, #28] 8013552: 6a3a ldr r2, [r7, #32] 8013554: e841 2300 strex r3, r2, [r1] 8013558: 61bb str r3, [r7, #24] return(result); 801355a: 69bb ldr r3, [r7, #24] 801355c: 2b00 cmp r3, #0 801355e: d1e5 bne.n 801352c /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) 8013560: 687b ldr r3, [r7, #4] 8013562: 681b ldr r3, [r3, #0] 8013564: 681b ldr r3, [r3, #0] 8013566: f003 0310 and.w r3, r3, #16 801356a: 2b10 cmp r3, #16 801356c: d10a bne.n 8013584 { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); 801356e: 2300 movs r3, #0 8013570: 60fb str r3, [r7, #12] 8013572: 687b ldr r3, [r7, #4] 8013574: 681b ldr r3, [r3, #0] 8013576: 681b ldr r3, [r3, #0] 8013578: 60fb str r3, [r7, #12] 801357a: 687b ldr r3, [r7, #4] 801357c: 681b ldr r3, [r3, #0] 801357e: 685b ldr r3, [r3, #4] 8013580: 60fb str r3, [r7, #12] 8013582: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); 8013584: 687b ldr r3, [r7, #4] 8013586: 8d9b ldrh r3, [r3, #44] @ 0x2c 8013588: 4619 mov r1, r3 801358a: 6878 ldr r0, [r7, #4] 801358c: f7f9 ff8c bl 800d4a8 8013590: e002 b.n 8013598 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); 8013592: 6878 ldr r0, [r7, #4] 8013594: f7ff fdba bl 801310c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; 8013598: 2300 movs r3, #0 801359a: e002 b.n 80135a2 } return HAL_OK; 801359c: 2300 movs r3, #0 801359e: e000 b.n 80135a2 } else { return HAL_BUSY; 80135a0: 2302 movs r3, #2 } } 80135a2: 4618 mov r0, r3 80135a4: 3730 adds r7, #48 @ 0x30 80135a6: 46bd mov sp, r7 80135a8: bd80 pop {r7, pc} ... 080135ac : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80135ac: b580 push {r7, lr} 80135ae: b084 sub sp, #16 80135b0: af00 add r7, sp, #0 80135b2: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80135b4: 687b ldr r3, [r7, #4] 80135b6: 681b ldr r3, [r3, #0] 80135b8: 691b ldr r3, [r3, #16] 80135ba: f423 5140 bic.w r1, r3, #12288 @ 0x3000 80135be: 687b ldr r3, [r7, #4] 80135c0: 68da ldr r2, [r3, #12] 80135c2: 687b ldr r3, [r7, #4] 80135c4: 681b ldr r3, [r3, #0] 80135c6: 430a orrs r2, r1 80135c8: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80135ca: 687b ldr r3, [r7, #4] 80135cc: 689a ldr r2, [r3, #8] 80135ce: 687b ldr r3, [r7, #4] 80135d0: 691b ldr r3, [r3, #16] 80135d2: 431a orrs r2, r3 80135d4: 687b ldr r3, [r7, #4] 80135d6: 695b ldr r3, [r3, #20] 80135d8: 4313 orrs r3, r2 80135da: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 80135dc: 687b ldr r3, [r7, #4] 80135de: 681b ldr r3, [r3, #0] 80135e0: 68db ldr r3, [r3, #12] 80135e2: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 80135e6: f023 030c bic.w r3, r3, #12 80135ea: 687a ldr r2, [r7, #4] 80135ec: 6812 ldr r2, [r2, #0] 80135ee: 68b9 ldr r1, [r7, #8] 80135f0: 430b orrs r3, r1 80135f2: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 80135f4: 687b ldr r3, [r7, #4] 80135f6: 681b ldr r3, [r3, #0] 80135f8: 695b ldr r3, [r3, #20] 80135fa: f423 7140 bic.w r1, r3, #768 @ 0x300 80135fe: 687b ldr r3, [r7, #4] 8013600: 699a ldr r2, [r3, #24] 8013602: 687b ldr r3, [r7, #4] 8013604: 681b ldr r3, [r3, #0] 8013606: 430a orrs r2, r1 8013608: 615a str r2, [r3, #20] if(huart->Instance == USART1) 801360a: 687b ldr r3, [r7, #4] 801360c: 681b ldr r3, [r3, #0] 801360e: 4a2c ldr r2, [pc, #176] @ (80136c0 ) 8013610: 4293 cmp r3, r2 8013612: d103 bne.n 801361c { pclk = HAL_RCC_GetPCLK2Freq(); 8013614: f7fd ff38 bl 8011488 8013618: 60f8 str r0, [r7, #12] 801361a: e002 b.n 8013622 } else { pclk = HAL_RCC_GetPCLK1Freq(); 801361c: f7fd ff20 bl 8011460 8013620: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 8013622: 68fa ldr r2, [r7, #12] 8013624: 4613 mov r3, r2 8013626: 009b lsls r3, r3, #2 8013628: 4413 add r3, r2 801362a: 009a lsls r2, r3, #2 801362c: 441a add r2, r3 801362e: 687b ldr r3, [r7, #4] 8013630: 685b ldr r3, [r3, #4] 8013632: 009b lsls r3, r3, #2 8013634: fbb2 f3f3 udiv r3, r2, r3 8013638: 4a22 ldr r2, [pc, #136] @ (80136c4 ) 801363a: fba2 2303 umull r2, r3, r2, r3 801363e: 095b lsrs r3, r3, #5 8013640: 0119 lsls r1, r3, #4 8013642: 68fa ldr r2, [r7, #12] 8013644: 4613 mov r3, r2 8013646: 009b lsls r3, r3, #2 8013648: 4413 add r3, r2 801364a: 009a lsls r2, r3, #2 801364c: 441a add r2, r3 801364e: 687b ldr r3, [r7, #4] 8013650: 685b ldr r3, [r3, #4] 8013652: 009b lsls r3, r3, #2 8013654: fbb2 f2f3 udiv r2, r2, r3 8013658: 4b1a ldr r3, [pc, #104] @ (80136c4 ) 801365a: fba3 0302 umull r0, r3, r3, r2 801365e: 095b lsrs r3, r3, #5 8013660: 2064 movs r0, #100 @ 0x64 8013662: fb00 f303 mul.w r3, r0, r3 8013666: 1ad3 subs r3, r2, r3 8013668: 011b lsls r3, r3, #4 801366a: 3332 adds r3, #50 @ 0x32 801366c: 4a15 ldr r2, [pc, #84] @ (80136c4 ) 801366e: fba2 2303 umull r2, r3, r2, r3 8013672: 095b lsrs r3, r3, #5 8013674: f003 03f0 and.w r3, r3, #240 @ 0xf0 8013678: 4419 add r1, r3 801367a: 68fa ldr r2, [r7, #12] 801367c: 4613 mov r3, r2 801367e: 009b lsls r3, r3, #2 8013680: 4413 add r3, r2 8013682: 009a lsls r2, r3, #2 8013684: 441a add r2, r3 8013686: 687b ldr r3, [r7, #4] 8013688: 685b ldr r3, [r3, #4] 801368a: 009b lsls r3, r3, #2 801368c: fbb2 f2f3 udiv r2, r2, r3 8013690: 4b0c ldr r3, [pc, #48] @ (80136c4 ) 8013692: fba3 0302 umull r0, r3, r3, r2 8013696: 095b lsrs r3, r3, #5 8013698: 2064 movs r0, #100 @ 0x64 801369a: fb00 f303 mul.w r3, r0, r3 801369e: 1ad3 subs r3, r2, r3 80136a0: 011b lsls r3, r3, #4 80136a2: 3332 adds r3, #50 @ 0x32 80136a4: 4a07 ldr r2, [pc, #28] @ (80136c4 ) 80136a6: fba2 2303 umull r2, r3, r2, r3 80136aa: 095b lsrs r3, r3, #5 80136ac: f003 020f and.w r2, r3, #15 80136b0: 687b ldr r3, [r7, #4] 80136b2: 681b ldr r3, [r3, #0] 80136b4: 440a add r2, r1 80136b6: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 80136b8: bf00 nop 80136ba: 3710 adds r7, #16 80136bc: 46bd mov sp, r7 80136be: bd80 pop {r7, pc} 80136c0: 40013800 .word 0x40013800 80136c4: 51eb851f .word 0x51eb851f 080136c8 <__cvt>: 80136c8: 2b00 cmp r3, #0 80136ca: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80136ce: 461d mov r5, r3 80136d0: bfbb ittet lt 80136d2: f103 4300 addlt.w r3, r3, #2147483648 @ 0x80000000 80136d6: 461d movlt r5, r3 80136d8: 2300 movge r3, #0 80136da: 232d movlt r3, #45 @ 0x2d 80136dc: b088 sub sp, #32 80136de: 4614 mov r4, r2 80136e0: bfb8 it lt 80136e2: 4614 movlt r4, r2 80136e4: 9a12 ldr r2, [sp, #72] @ 0x48 80136e6: 9e10 ldr r6, [sp, #64] @ 0x40 80136e8: 7013 strb r3, [r2, #0] 80136ea: 9b14 ldr r3, [sp, #80] @ 0x50 80136ec: f8dd a04c ldr.w sl, [sp, #76] @ 0x4c 80136f0: f023 0820 bic.w r8, r3, #32 80136f4: f1b8 0f46 cmp.w r8, #70 @ 0x46 80136f8: d005 beq.n 8013706 <__cvt+0x3e> 80136fa: f1b8 0f45 cmp.w r8, #69 @ 0x45 80136fe: d100 bne.n 8013702 <__cvt+0x3a> 8013700: 3601 adds r6, #1 8013702: 2302 movs r3, #2 8013704: e000 b.n 8013708 <__cvt+0x40> 8013706: 2303 movs r3, #3 8013708: aa07 add r2, sp, #28 801370a: 9204 str r2, [sp, #16] 801370c: aa06 add r2, sp, #24 801370e: e9cd a202 strd sl, r2, [sp, #8] 8013712: e9cd 3600 strd r3, r6, [sp] 8013716: 4622 mov r2, r4 8013718: 462b mov r3, r5 801371a: f000 ff01 bl 8014520 <_dtoa_r> 801371e: f1b8 0f47 cmp.w r8, #71 @ 0x47 8013722: 4607 mov r7, r0 8013724: d119 bne.n 801375a <__cvt+0x92> 8013726: 9b11 ldr r3, [sp, #68] @ 0x44 8013728: 07db lsls r3, r3, #31 801372a: d50e bpl.n 801374a <__cvt+0x82> 801372c: eb00 0906 add.w r9, r0, r6 8013730: 2200 movs r2, #0 8013732: 2300 movs r3, #0 8013734: 4620 mov r0, r4 8013736: 4629 mov r1, r5 8013738: f7f5 f9a2 bl 8008a80 <__aeabi_dcmpeq> 801373c: b108 cbz r0, 8013742 <__cvt+0x7a> 801373e: f8cd 901c str.w r9, [sp, #28] 8013742: 2230 movs r2, #48 @ 0x30 8013744: 9b07 ldr r3, [sp, #28] 8013746: 454b cmp r3, r9 8013748: d31e bcc.n 8013788 <__cvt+0xc0> 801374a: 4638 mov r0, r7 801374c: 9b07 ldr r3, [sp, #28] 801374e: 9a15 ldr r2, [sp, #84] @ 0x54 8013750: 1bdb subs r3, r3, r7 8013752: 6013 str r3, [r2, #0] 8013754: b008 add sp, #32 8013756: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 801375a: f1b8 0f46 cmp.w r8, #70 @ 0x46 801375e: eb00 0906 add.w r9, r0, r6 8013762: d1e5 bne.n 8013730 <__cvt+0x68> 8013764: 7803 ldrb r3, [r0, #0] 8013766: 2b30 cmp r3, #48 @ 0x30 8013768: d10a bne.n 8013780 <__cvt+0xb8> 801376a: 2200 movs r2, #0 801376c: 2300 movs r3, #0 801376e: 4620 mov r0, r4 8013770: 4629 mov r1, r5 8013772: f7f5 f985 bl 8008a80 <__aeabi_dcmpeq> 8013776: b918 cbnz r0, 8013780 <__cvt+0xb8> 8013778: f1c6 0601 rsb r6, r6, #1 801377c: f8ca 6000 str.w r6, [sl] 8013780: f8da 3000 ldr.w r3, [sl] 8013784: 4499 add r9, r3 8013786: e7d3 b.n 8013730 <__cvt+0x68> 8013788: 1c59 adds r1, r3, #1 801378a: 9107 str r1, [sp, #28] 801378c: 701a strb r2, [r3, #0] 801378e: e7d9 b.n 8013744 <__cvt+0x7c> 08013790 <__exponent>: 8013790: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 8013792: 2900 cmp r1, #0 8013794: bfb6 itet lt 8013796: 232d movlt r3, #45 @ 0x2d 8013798: 232b movge r3, #43 @ 0x2b 801379a: 4249 neglt r1, r1 801379c: 2909 cmp r1, #9 801379e: 7002 strb r2, [r0, #0] 80137a0: 7043 strb r3, [r0, #1] 80137a2: dd29 ble.n 80137f8 <__exponent+0x68> 80137a4: f10d 0307 add.w r3, sp, #7 80137a8: 461d mov r5, r3 80137aa: 270a movs r7, #10 80137ac: fbb1 f6f7 udiv r6, r1, r7 80137b0: 461a mov r2, r3 80137b2: fb07 1416 mls r4, r7, r6, r1 80137b6: 3430 adds r4, #48 @ 0x30 80137b8: f802 4c01 strb.w r4, [r2, #-1] 80137bc: 460c mov r4, r1 80137be: 2c63 cmp r4, #99 @ 0x63 80137c0: 4631 mov r1, r6 80137c2: f103 33ff add.w r3, r3, #4294967295 @ 0xffffffff 80137c6: dcf1 bgt.n 80137ac <__exponent+0x1c> 80137c8: 3130 adds r1, #48 @ 0x30 80137ca: 1e94 subs r4, r2, #2 80137cc: f803 1c01 strb.w r1, [r3, #-1] 80137d0: 4623 mov r3, r4 80137d2: 1c41 adds r1, r0, #1 80137d4: 42ab cmp r3, r5 80137d6: d30a bcc.n 80137ee <__exponent+0x5e> 80137d8: f10d 0309 add.w r3, sp, #9 80137dc: 1a9b subs r3, r3, r2 80137de: 42ac cmp r4, r5 80137e0: bf88 it hi 80137e2: 2300 movhi r3, #0 80137e4: 3302 adds r3, #2 80137e6: 4403 add r3, r0 80137e8: 1a18 subs r0, r3, r0 80137ea: b003 add sp, #12 80137ec: bdf0 pop {r4, r5, r6, r7, pc} 80137ee: f813 6b01 ldrb.w r6, [r3], #1 80137f2: f801 6f01 strb.w r6, [r1, #1]! 80137f6: e7ed b.n 80137d4 <__exponent+0x44> 80137f8: 2330 movs r3, #48 @ 0x30 80137fa: 3130 adds r1, #48 @ 0x30 80137fc: 7083 strb r3, [r0, #2] 80137fe: 70c1 strb r1, [r0, #3] 8013800: 1d03 adds r3, r0, #4 8013802: e7f1 b.n 80137e8 <__exponent+0x58> 08013804 <_printf_float>: 8013804: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8013808: b091 sub sp, #68 @ 0x44 801380a: 460c mov r4, r1 801380c: f8dd 8068 ldr.w r8, [sp, #104] @ 0x68 8013810: 4616 mov r6, r2 8013812: 461f mov r7, r3 8013814: 4605 mov r5, r0 8013816: f000 fdbd bl 8014394 <_localeconv_r> 801381a: 6803 ldr r3, [r0, #0] 801381c: 4618 mov r0, r3 801381e: 9308 str r3, [sp, #32] 8013820: f7f4 fd02 bl 8008228 8013824: 2300 movs r3, #0 8013826: 930e str r3, [sp, #56] @ 0x38 8013828: f8d8 3000 ldr.w r3, [r8] 801382c: 9009 str r0, [sp, #36] @ 0x24 801382e: 3307 adds r3, #7 8013830: f023 0307 bic.w r3, r3, #7 8013834: f103 0208 add.w r2, r3, #8 8013838: f894 a018 ldrb.w sl, [r4, #24] 801383c: f8d4 b000 ldr.w fp, [r4] 8013840: f8c8 2000 str.w r2, [r8] 8013844: e9d3 8900 ldrd r8, r9, [r3] 8013848: f029 4300 bic.w r3, r9, #2147483648 @ 0x80000000 801384c: 930b str r3, [sp, #44] @ 0x2c 801384e: f8cd 8028 str.w r8, [sp, #40] @ 0x28 8013852: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8013856: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 801385a: e9c4 8912 strd r8, r9, [r4, #72] @ 0x48 801385e: 4b9c ldr r3, [pc, #624] @ (8013ad0 <_printf_float+0x2cc>) 8013860: f7f5 f940 bl 8008ae4 <__aeabi_dcmpun> 8013864: bb70 cbnz r0, 80138c4 <_printf_float+0xc0> 8013866: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 801386a: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 801386e: 4b98 ldr r3, [pc, #608] @ (8013ad0 <_printf_float+0x2cc>) 8013870: f7f5 f91a bl 8008aa8 <__aeabi_dcmple> 8013874: bb30 cbnz r0, 80138c4 <_printf_float+0xc0> 8013876: 2200 movs r2, #0 8013878: 2300 movs r3, #0 801387a: 4640 mov r0, r8 801387c: 4649 mov r1, r9 801387e: f7f5 f909 bl 8008a94 <__aeabi_dcmplt> 8013882: b110 cbz r0, 801388a <_printf_float+0x86> 8013884: 232d movs r3, #45 @ 0x2d 8013886: f884 3043 strb.w r3, [r4, #67] @ 0x43 801388a: 4a92 ldr r2, [pc, #584] @ (8013ad4 <_printf_float+0x2d0>) 801388c: 4b92 ldr r3, [pc, #584] @ (8013ad8 <_printf_float+0x2d4>) 801388e: f1ba 0f47 cmp.w sl, #71 @ 0x47 8013892: bf8c ite hi 8013894: 4690 movhi r8, r2 8013896: 4698 movls r8, r3 8013898: 2303 movs r3, #3 801389a: f04f 0900 mov.w r9, #0 801389e: 6123 str r3, [r4, #16] 80138a0: f02b 0304 bic.w r3, fp, #4 80138a4: 6023 str r3, [r4, #0] 80138a6: 4633 mov r3, r6 80138a8: 4621 mov r1, r4 80138aa: 4628 mov r0, r5 80138ac: 9700 str r7, [sp, #0] 80138ae: aa0f add r2, sp, #60 @ 0x3c 80138b0: f000 f9d4 bl 8013c5c <_printf_common> 80138b4: 3001 adds r0, #1 80138b6: f040 8090 bne.w 80139da <_printf_float+0x1d6> 80138ba: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80138be: b011 add sp, #68 @ 0x44 80138c0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80138c4: 4642 mov r2, r8 80138c6: 464b mov r3, r9 80138c8: 4640 mov r0, r8 80138ca: 4649 mov r1, r9 80138cc: f7f5 f90a bl 8008ae4 <__aeabi_dcmpun> 80138d0: b148 cbz r0, 80138e6 <_printf_float+0xe2> 80138d2: 464b mov r3, r9 80138d4: 2b00 cmp r3, #0 80138d6: bfb8 it lt 80138d8: 232d movlt r3, #45 @ 0x2d 80138da: 4a80 ldr r2, [pc, #512] @ (8013adc <_printf_float+0x2d8>) 80138dc: bfb8 it lt 80138de: f884 3043 strblt.w r3, [r4, #67] @ 0x43 80138e2: 4b7f ldr r3, [pc, #508] @ (8013ae0 <_printf_float+0x2dc>) 80138e4: e7d3 b.n 801388e <_printf_float+0x8a> 80138e6: 6863 ldr r3, [r4, #4] 80138e8: f00a 01df and.w r1, sl, #223 @ 0xdf 80138ec: 1c5a adds r2, r3, #1 80138ee: d13f bne.n 8013970 <_printf_float+0x16c> 80138f0: 2306 movs r3, #6 80138f2: 6063 str r3, [r4, #4] 80138f4: 2200 movs r2, #0 80138f6: f44b 6380 orr.w r3, fp, #1024 @ 0x400 80138fa: 6023 str r3, [r4, #0] 80138fc: 9206 str r2, [sp, #24] 80138fe: aa0e add r2, sp, #56 @ 0x38 8013900: e9cd a204 strd sl, r2, [sp, #16] 8013904: aa0d add r2, sp, #52 @ 0x34 8013906: 9203 str r2, [sp, #12] 8013908: f10d 0233 add.w r2, sp, #51 @ 0x33 801390c: e9cd 3201 strd r3, r2, [sp, #4] 8013910: 6863 ldr r3, [r4, #4] 8013912: 4642 mov r2, r8 8013914: 9300 str r3, [sp, #0] 8013916: 4628 mov r0, r5 8013918: 464b mov r3, r9 801391a: 910a str r1, [sp, #40] @ 0x28 801391c: f7ff fed4 bl 80136c8 <__cvt> 8013920: 990a ldr r1, [sp, #40] @ 0x28 8013922: 4680 mov r8, r0 8013924: 2947 cmp r1, #71 @ 0x47 8013926: 990d ldr r1, [sp, #52] @ 0x34 8013928: d128 bne.n 801397c <_printf_float+0x178> 801392a: 1cc8 adds r0, r1, #3 801392c: db02 blt.n 8013934 <_printf_float+0x130> 801392e: 6863 ldr r3, [r4, #4] 8013930: 4299 cmp r1, r3 8013932: dd40 ble.n 80139b6 <_printf_float+0x1b2> 8013934: f1aa 0a02 sub.w sl, sl, #2 8013938: fa5f fa8a uxtb.w sl, sl 801393c: 4652 mov r2, sl 801393e: 3901 subs r1, #1 8013940: f104 0050 add.w r0, r4, #80 @ 0x50 8013944: 910d str r1, [sp, #52] @ 0x34 8013946: f7ff ff23 bl 8013790 <__exponent> 801394a: 9a0e ldr r2, [sp, #56] @ 0x38 801394c: 4681 mov r9, r0 801394e: 1813 adds r3, r2, r0 8013950: 2a01 cmp r2, #1 8013952: 6123 str r3, [r4, #16] 8013954: dc02 bgt.n 801395c <_printf_float+0x158> 8013956: 6822 ldr r2, [r4, #0] 8013958: 07d2 lsls r2, r2, #31 801395a: d501 bpl.n 8013960 <_printf_float+0x15c> 801395c: 3301 adds r3, #1 801395e: 6123 str r3, [r4, #16] 8013960: f89d 3033 ldrb.w r3, [sp, #51] @ 0x33 8013964: 2b00 cmp r3, #0 8013966: d09e beq.n 80138a6 <_printf_float+0xa2> 8013968: 232d movs r3, #45 @ 0x2d 801396a: f884 3043 strb.w r3, [r4, #67] @ 0x43 801396e: e79a b.n 80138a6 <_printf_float+0xa2> 8013970: 2947 cmp r1, #71 @ 0x47 8013972: d1bf bne.n 80138f4 <_printf_float+0xf0> 8013974: 2b00 cmp r3, #0 8013976: d1bd bne.n 80138f4 <_printf_float+0xf0> 8013978: 2301 movs r3, #1 801397a: e7ba b.n 80138f2 <_printf_float+0xee> 801397c: f1ba 0f65 cmp.w sl, #101 @ 0x65 8013980: d9dc bls.n 801393c <_printf_float+0x138> 8013982: f1ba 0f66 cmp.w sl, #102 @ 0x66 8013986: d118 bne.n 80139ba <_printf_float+0x1b6> 8013988: 2900 cmp r1, #0 801398a: 6863 ldr r3, [r4, #4] 801398c: dd0b ble.n 80139a6 <_printf_float+0x1a2> 801398e: 6121 str r1, [r4, #16] 8013990: b913 cbnz r3, 8013998 <_printf_float+0x194> 8013992: 6822 ldr r2, [r4, #0] 8013994: 07d0 lsls r0, r2, #31 8013996: d502 bpl.n 801399e <_printf_float+0x19a> 8013998: 3301 adds r3, #1 801399a: 440b add r3, r1 801399c: 6123 str r3, [r4, #16] 801399e: f04f 0900 mov.w r9, #0 80139a2: 65a1 str r1, [r4, #88] @ 0x58 80139a4: e7dc b.n 8013960 <_printf_float+0x15c> 80139a6: b913 cbnz r3, 80139ae <_printf_float+0x1aa> 80139a8: 6822 ldr r2, [r4, #0] 80139aa: 07d2 lsls r2, r2, #31 80139ac: d501 bpl.n 80139b2 <_printf_float+0x1ae> 80139ae: 3302 adds r3, #2 80139b0: e7f4 b.n 801399c <_printf_float+0x198> 80139b2: 2301 movs r3, #1 80139b4: e7f2 b.n 801399c <_printf_float+0x198> 80139b6: f04f 0a67 mov.w sl, #103 @ 0x67 80139ba: 9b0e ldr r3, [sp, #56] @ 0x38 80139bc: 4299 cmp r1, r3 80139be: db05 blt.n 80139cc <_printf_float+0x1c8> 80139c0: 6823 ldr r3, [r4, #0] 80139c2: 6121 str r1, [r4, #16] 80139c4: 07d8 lsls r0, r3, #31 80139c6: d5ea bpl.n 801399e <_printf_float+0x19a> 80139c8: 1c4b adds r3, r1, #1 80139ca: e7e7 b.n 801399c <_printf_float+0x198> 80139cc: 2900 cmp r1, #0 80139ce: bfcc ite gt 80139d0: 2201 movgt r2, #1 80139d2: f1c1 0202 rsble r2, r1, #2 80139d6: 4413 add r3, r2 80139d8: e7e0 b.n 801399c <_printf_float+0x198> 80139da: 6823 ldr r3, [r4, #0] 80139dc: 055a lsls r2, r3, #21 80139de: d407 bmi.n 80139f0 <_printf_float+0x1ec> 80139e0: 6923 ldr r3, [r4, #16] 80139e2: 4642 mov r2, r8 80139e4: 4631 mov r1, r6 80139e6: 4628 mov r0, r5 80139e8: 47b8 blx r7 80139ea: 3001 adds r0, #1 80139ec: d12b bne.n 8013a46 <_printf_float+0x242> 80139ee: e764 b.n 80138ba <_printf_float+0xb6> 80139f0: f1ba 0f65 cmp.w sl, #101 @ 0x65 80139f4: f240 80dc bls.w 8013bb0 <_printf_float+0x3ac> 80139f8: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 80139fc: 2200 movs r2, #0 80139fe: 2300 movs r3, #0 8013a00: f7f5 f83e bl 8008a80 <__aeabi_dcmpeq> 8013a04: 2800 cmp r0, #0 8013a06: d033 beq.n 8013a70 <_printf_float+0x26c> 8013a08: 2301 movs r3, #1 8013a0a: 4631 mov r1, r6 8013a0c: 4628 mov r0, r5 8013a0e: 4a35 ldr r2, [pc, #212] @ (8013ae4 <_printf_float+0x2e0>) 8013a10: 47b8 blx r7 8013a12: 3001 adds r0, #1 8013a14: f43f af51 beq.w 80138ba <_printf_float+0xb6> 8013a18: e9dd 380d ldrd r3, r8, [sp, #52] @ 0x34 8013a1c: 4543 cmp r3, r8 8013a1e: db02 blt.n 8013a26 <_printf_float+0x222> 8013a20: 6823 ldr r3, [r4, #0] 8013a22: 07d8 lsls r0, r3, #31 8013a24: d50f bpl.n 8013a46 <_printf_float+0x242> 8013a26: e9dd 2308 ldrd r2, r3, [sp, #32] 8013a2a: 4631 mov r1, r6 8013a2c: 4628 mov r0, r5 8013a2e: 47b8 blx r7 8013a30: 3001 adds r0, #1 8013a32: f43f af42 beq.w 80138ba <_printf_float+0xb6> 8013a36: f04f 0900 mov.w r9, #0 8013a3a: f108 38ff add.w r8, r8, #4294967295 @ 0xffffffff 8013a3e: f104 0a1a add.w sl, r4, #26 8013a42: 45c8 cmp r8, r9 8013a44: dc09 bgt.n 8013a5a <_printf_float+0x256> 8013a46: 6823 ldr r3, [r4, #0] 8013a48: 079b lsls r3, r3, #30 8013a4a: f100 8102 bmi.w 8013c52 <_printf_float+0x44e> 8013a4e: 68e0 ldr r0, [r4, #12] 8013a50: 9b0f ldr r3, [sp, #60] @ 0x3c 8013a52: 4298 cmp r0, r3 8013a54: bfb8 it lt 8013a56: 4618 movlt r0, r3 8013a58: e731 b.n 80138be <_printf_float+0xba> 8013a5a: 2301 movs r3, #1 8013a5c: 4652 mov r2, sl 8013a5e: 4631 mov r1, r6 8013a60: 4628 mov r0, r5 8013a62: 47b8 blx r7 8013a64: 3001 adds r0, #1 8013a66: f43f af28 beq.w 80138ba <_printf_float+0xb6> 8013a6a: f109 0901 add.w r9, r9, #1 8013a6e: e7e8 b.n 8013a42 <_printf_float+0x23e> 8013a70: 9b0d ldr r3, [sp, #52] @ 0x34 8013a72: 2b00 cmp r3, #0 8013a74: dc38 bgt.n 8013ae8 <_printf_float+0x2e4> 8013a76: 2301 movs r3, #1 8013a78: 4631 mov r1, r6 8013a7a: 4628 mov r0, r5 8013a7c: 4a19 ldr r2, [pc, #100] @ (8013ae4 <_printf_float+0x2e0>) 8013a7e: 47b8 blx r7 8013a80: 3001 adds r0, #1 8013a82: f43f af1a beq.w 80138ba <_printf_float+0xb6> 8013a86: e9dd 390d ldrd r3, r9, [sp, #52] @ 0x34 8013a8a: ea59 0303 orrs.w r3, r9, r3 8013a8e: d102 bne.n 8013a96 <_printf_float+0x292> 8013a90: 6823 ldr r3, [r4, #0] 8013a92: 07d9 lsls r1, r3, #31 8013a94: d5d7 bpl.n 8013a46 <_printf_float+0x242> 8013a96: e9dd 2308 ldrd r2, r3, [sp, #32] 8013a9a: 4631 mov r1, r6 8013a9c: 4628 mov r0, r5 8013a9e: 47b8 blx r7 8013aa0: 3001 adds r0, #1 8013aa2: f43f af0a beq.w 80138ba <_printf_float+0xb6> 8013aa6: f04f 0a00 mov.w sl, #0 8013aaa: f104 0b1a add.w fp, r4, #26 8013aae: 9b0d ldr r3, [sp, #52] @ 0x34 8013ab0: 425b negs r3, r3 8013ab2: 4553 cmp r3, sl 8013ab4: dc01 bgt.n 8013aba <_printf_float+0x2b6> 8013ab6: 464b mov r3, r9 8013ab8: e793 b.n 80139e2 <_printf_float+0x1de> 8013aba: 2301 movs r3, #1 8013abc: 465a mov r2, fp 8013abe: 4631 mov r1, r6 8013ac0: 4628 mov r0, r5 8013ac2: 47b8 blx r7 8013ac4: 3001 adds r0, #1 8013ac6: f43f aef8 beq.w 80138ba <_printf_float+0xb6> 8013aca: f10a 0a01 add.w sl, sl, #1 8013ace: e7ee b.n 8013aae <_printf_float+0x2aa> 8013ad0: 7fefffff .word 0x7fefffff 8013ad4: 08016d74 .word 0x08016d74 8013ad8: 08016d70 .word 0x08016d70 8013adc: 08016d7c .word 0x08016d7c 8013ae0: 08016d78 .word 0x08016d78 8013ae4: 08016d80 .word 0x08016d80 8013ae8: 6da3 ldr r3, [r4, #88] @ 0x58 8013aea: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 8013aee: 4553 cmp r3, sl 8013af0: bfa8 it ge 8013af2: 4653 movge r3, sl 8013af4: 2b00 cmp r3, #0 8013af6: 4699 mov r9, r3 8013af8: dc36 bgt.n 8013b68 <_printf_float+0x364> 8013afa: f04f 0b00 mov.w fp, #0 8013afe: ea29 79e9 bic.w r9, r9, r9, asr #31 8013b02: f104 021a add.w r2, r4, #26 8013b06: 6da3 ldr r3, [r4, #88] @ 0x58 8013b08: 930a str r3, [sp, #40] @ 0x28 8013b0a: eba3 0309 sub.w r3, r3, r9 8013b0e: 455b cmp r3, fp 8013b10: dc31 bgt.n 8013b76 <_printf_float+0x372> 8013b12: 9b0d ldr r3, [sp, #52] @ 0x34 8013b14: 459a cmp sl, r3 8013b16: dc3a bgt.n 8013b8e <_printf_float+0x38a> 8013b18: 6823 ldr r3, [r4, #0] 8013b1a: 07da lsls r2, r3, #31 8013b1c: d437 bmi.n 8013b8e <_printf_float+0x38a> 8013b1e: 9b0d ldr r3, [sp, #52] @ 0x34 8013b20: ebaa 0903 sub.w r9, sl, r3 8013b24: 9b0a ldr r3, [sp, #40] @ 0x28 8013b26: ebaa 0303 sub.w r3, sl, r3 8013b2a: 4599 cmp r9, r3 8013b2c: bfa8 it ge 8013b2e: 4699 movge r9, r3 8013b30: f1b9 0f00 cmp.w r9, #0 8013b34: dc33 bgt.n 8013b9e <_printf_float+0x39a> 8013b36: f04f 0800 mov.w r8, #0 8013b3a: ea29 79e9 bic.w r9, r9, r9, asr #31 8013b3e: f104 0b1a add.w fp, r4, #26 8013b42: 9b0d ldr r3, [sp, #52] @ 0x34 8013b44: ebaa 0303 sub.w r3, sl, r3 8013b48: eba3 0309 sub.w r3, r3, r9 8013b4c: 4543 cmp r3, r8 8013b4e: f77f af7a ble.w 8013a46 <_printf_float+0x242> 8013b52: 2301 movs r3, #1 8013b54: 465a mov r2, fp 8013b56: 4631 mov r1, r6 8013b58: 4628 mov r0, r5 8013b5a: 47b8 blx r7 8013b5c: 3001 adds r0, #1 8013b5e: f43f aeac beq.w 80138ba <_printf_float+0xb6> 8013b62: f108 0801 add.w r8, r8, #1 8013b66: e7ec b.n 8013b42 <_printf_float+0x33e> 8013b68: 4642 mov r2, r8 8013b6a: 4631 mov r1, r6 8013b6c: 4628 mov r0, r5 8013b6e: 47b8 blx r7 8013b70: 3001 adds r0, #1 8013b72: d1c2 bne.n 8013afa <_printf_float+0x2f6> 8013b74: e6a1 b.n 80138ba <_printf_float+0xb6> 8013b76: 2301 movs r3, #1 8013b78: 4631 mov r1, r6 8013b7a: 4628 mov r0, r5 8013b7c: 920a str r2, [sp, #40] @ 0x28 8013b7e: 47b8 blx r7 8013b80: 3001 adds r0, #1 8013b82: f43f ae9a beq.w 80138ba <_printf_float+0xb6> 8013b86: 9a0a ldr r2, [sp, #40] @ 0x28 8013b88: f10b 0b01 add.w fp, fp, #1 8013b8c: e7bb b.n 8013b06 <_printf_float+0x302> 8013b8e: 4631 mov r1, r6 8013b90: e9dd 2308 ldrd r2, r3, [sp, #32] 8013b94: 4628 mov r0, r5 8013b96: 47b8 blx r7 8013b98: 3001 adds r0, #1 8013b9a: d1c0 bne.n 8013b1e <_printf_float+0x31a> 8013b9c: e68d b.n 80138ba <_printf_float+0xb6> 8013b9e: 9a0a ldr r2, [sp, #40] @ 0x28 8013ba0: 464b mov r3, r9 8013ba2: 4631 mov r1, r6 8013ba4: 4628 mov r0, r5 8013ba6: 4442 add r2, r8 8013ba8: 47b8 blx r7 8013baa: 3001 adds r0, #1 8013bac: d1c3 bne.n 8013b36 <_printf_float+0x332> 8013bae: e684 b.n 80138ba <_printf_float+0xb6> 8013bb0: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 8013bb4: f1ba 0f01 cmp.w sl, #1 8013bb8: dc01 bgt.n 8013bbe <_printf_float+0x3ba> 8013bba: 07db lsls r3, r3, #31 8013bbc: d536 bpl.n 8013c2c <_printf_float+0x428> 8013bbe: 2301 movs r3, #1 8013bc0: 4642 mov r2, r8 8013bc2: 4631 mov r1, r6 8013bc4: 4628 mov r0, r5 8013bc6: 47b8 blx r7 8013bc8: 3001 adds r0, #1 8013bca: f43f ae76 beq.w 80138ba <_printf_float+0xb6> 8013bce: e9dd 2308 ldrd r2, r3, [sp, #32] 8013bd2: 4631 mov r1, r6 8013bd4: 4628 mov r0, r5 8013bd6: 47b8 blx r7 8013bd8: 3001 adds r0, #1 8013bda: f43f ae6e beq.w 80138ba <_printf_float+0xb6> 8013bde: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 8013be2: 2200 movs r2, #0 8013be4: 2300 movs r3, #0 8013be6: f10a 3aff add.w sl, sl, #4294967295 @ 0xffffffff 8013bea: f7f4 ff49 bl 8008a80 <__aeabi_dcmpeq> 8013bee: b9c0 cbnz r0, 8013c22 <_printf_float+0x41e> 8013bf0: 4653 mov r3, sl 8013bf2: f108 0201 add.w r2, r8, #1 8013bf6: 4631 mov r1, r6 8013bf8: 4628 mov r0, r5 8013bfa: 47b8 blx r7 8013bfc: 3001 adds r0, #1 8013bfe: d10c bne.n 8013c1a <_printf_float+0x416> 8013c00: e65b b.n 80138ba <_printf_float+0xb6> 8013c02: 2301 movs r3, #1 8013c04: 465a mov r2, fp 8013c06: 4631 mov r1, r6 8013c08: 4628 mov r0, r5 8013c0a: 47b8 blx r7 8013c0c: 3001 adds r0, #1 8013c0e: f43f ae54 beq.w 80138ba <_printf_float+0xb6> 8013c12: f108 0801 add.w r8, r8, #1 8013c16: 45d0 cmp r8, sl 8013c18: dbf3 blt.n 8013c02 <_printf_float+0x3fe> 8013c1a: 464b mov r3, r9 8013c1c: f104 0250 add.w r2, r4, #80 @ 0x50 8013c20: e6e0 b.n 80139e4 <_printf_float+0x1e0> 8013c22: f04f 0800 mov.w r8, #0 8013c26: f104 0b1a add.w fp, r4, #26 8013c2a: e7f4 b.n 8013c16 <_printf_float+0x412> 8013c2c: 2301 movs r3, #1 8013c2e: 4642 mov r2, r8 8013c30: e7e1 b.n 8013bf6 <_printf_float+0x3f2> 8013c32: 2301 movs r3, #1 8013c34: 464a mov r2, r9 8013c36: 4631 mov r1, r6 8013c38: 4628 mov r0, r5 8013c3a: 47b8 blx r7 8013c3c: 3001 adds r0, #1 8013c3e: f43f ae3c beq.w 80138ba <_printf_float+0xb6> 8013c42: f108 0801 add.w r8, r8, #1 8013c46: 68e3 ldr r3, [r4, #12] 8013c48: 990f ldr r1, [sp, #60] @ 0x3c 8013c4a: 1a5b subs r3, r3, r1 8013c4c: 4543 cmp r3, r8 8013c4e: dcf0 bgt.n 8013c32 <_printf_float+0x42e> 8013c50: e6fd b.n 8013a4e <_printf_float+0x24a> 8013c52: f04f 0800 mov.w r8, #0 8013c56: f104 0919 add.w r9, r4, #25 8013c5a: e7f4 b.n 8013c46 <_printf_float+0x442> 08013c5c <_printf_common>: 8013c5c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8013c60: 4616 mov r6, r2 8013c62: 4698 mov r8, r3 8013c64: 688a ldr r2, [r1, #8] 8013c66: 690b ldr r3, [r1, #16] 8013c68: 4607 mov r7, r0 8013c6a: 4293 cmp r3, r2 8013c6c: bfb8 it lt 8013c6e: 4613 movlt r3, r2 8013c70: 6033 str r3, [r6, #0] 8013c72: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 8013c76: 460c mov r4, r1 8013c78: f8dd 9020 ldr.w r9, [sp, #32] 8013c7c: b10a cbz r2, 8013c82 <_printf_common+0x26> 8013c7e: 3301 adds r3, #1 8013c80: 6033 str r3, [r6, #0] 8013c82: 6823 ldr r3, [r4, #0] 8013c84: 0699 lsls r1, r3, #26 8013c86: bf42 ittt mi 8013c88: 6833 ldrmi r3, [r6, #0] 8013c8a: 3302 addmi r3, #2 8013c8c: 6033 strmi r3, [r6, #0] 8013c8e: 6825 ldr r5, [r4, #0] 8013c90: f015 0506 ands.w r5, r5, #6 8013c94: d106 bne.n 8013ca4 <_printf_common+0x48> 8013c96: f104 0a19 add.w sl, r4, #25 8013c9a: 68e3 ldr r3, [r4, #12] 8013c9c: 6832 ldr r2, [r6, #0] 8013c9e: 1a9b subs r3, r3, r2 8013ca0: 42ab cmp r3, r5 8013ca2: dc2b bgt.n 8013cfc <_printf_common+0xa0> 8013ca4: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 8013ca8: 6822 ldr r2, [r4, #0] 8013caa: 3b00 subs r3, #0 8013cac: bf18 it ne 8013cae: 2301 movne r3, #1 8013cb0: 0692 lsls r2, r2, #26 8013cb2: d430 bmi.n 8013d16 <_printf_common+0xba> 8013cb4: 4641 mov r1, r8 8013cb6: 4638 mov r0, r7 8013cb8: f104 0243 add.w r2, r4, #67 @ 0x43 8013cbc: 47c8 blx r9 8013cbe: 3001 adds r0, #1 8013cc0: d023 beq.n 8013d0a <_printf_common+0xae> 8013cc2: 6823 ldr r3, [r4, #0] 8013cc4: 6922 ldr r2, [r4, #16] 8013cc6: f003 0306 and.w r3, r3, #6 8013cca: 2b04 cmp r3, #4 8013ccc: bf14 ite ne 8013cce: 2500 movne r5, #0 8013cd0: 6833 ldreq r3, [r6, #0] 8013cd2: f04f 0600 mov.w r6, #0 8013cd6: bf08 it eq 8013cd8: 68e5 ldreq r5, [r4, #12] 8013cda: f104 041a add.w r4, r4, #26 8013cde: bf08 it eq 8013ce0: 1aed subeq r5, r5, r3 8013ce2: f854 3c12 ldr.w r3, [r4, #-18] 8013ce6: bf08 it eq 8013ce8: ea25 75e5 biceq.w r5, r5, r5, asr #31 8013cec: 4293 cmp r3, r2 8013cee: bfc4 itt gt 8013cf0: 1a9b subgt r3, r3, r2 8013cf2: 18ed addgt r5, r5, r3 8013cf4: 42b5 cmp r5, r6 8013cf6: d11a bne.n 8013d2e <_printf_common+0xd2> 8013cf8: 2000 movs r0, #0 8013cfa: e008 b.n 8013d0e <_printf_common+0xb2> 8013cfc: 2301 movs r3, #1 8013cfe: 4652 mov r2, sl 8013d00: 4641 mov r1, r8 8013d02: 4638 mov r0, r7 8013d04: 47c8 blx r9 8013d06: 3001 adds r0, #1 8013d08: d103 bne.n 8013d12 <_printf_common+0xb6> 8013d0a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013d0e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8013d12: 3501 adds r5, #1 8013d14: e7c1 b.n 8013c9a <_printf_common+0x3e> 8013d16: 2030 movs r0, #48 @ 0x30 8013d18: 18e1 adds r1, r4, r3 8013d1a: f881 0043 strb.w r0, [r1, #67] @ 0x43 8013d1e: 1c5a adds r2, r3, #1 8013d20: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 8013d24: 4422 add r2, r4 8013d26: 3302 adds r3, #2 8013d28: f882 1043 strb.w r1, [r2, #67] @ 0x43 8013d2c: e7c2 b.n 8013cb4 <_printf_common+0x58> 8013d2e: 2301 movs r3, #1 8013d30: 4622 mov r2, r4 8013d32: 4641 mov r1, r8 8013d34: 4638 mov r0, r7 8013d36: 47c8 blx r9 8013d38: 3001 adds r0, #1 8013d3a: d0e6 beq.n 8013d0a <_printf_common+0xae> 8013d3c: 3601 adds r6, #1 8013d3e: e7d9 b.n 8013cf4 <_printf_common+0x98> 08013d40 <_printf_i>: 8013d40: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 8013d44: 7e0f ldrb r7, [r1, #24] 8013d46: 4691 mov r9, r2 8013d48: 2f78 cmp r7, #120 @ 0x78 8013d4a: 4680 mov r8, r0 8013d4c: 460c mov r4, r1 8013d4e: 469a mov sl, r3 8013d50: 9e0c ldr r6, [sp, #48] @ 0x30 8013d52: f101 0243 add.w r2, r1, #67 @ 0x43 8013d56: d807 bhi.n 8013d68 <_printf_i+0x28> 8013d58: 2f62 cmp r7, #98 @ 0x62 8013d5a: d80a bhi.n 8013d72 <_printf_i+0x32> 8013d5c: 2f00 cmp r7, #0 8013d5e: f000 80d1 beq.w 8013f04 <_printf_i+0x1c4> 8013d62: 2f58 cmp r7, #88 @ 0x58 8013d64: f000 80b8 beq.w 8013ed8 <_printf_i+0x198> 8013d68: f104 0642 add.w r6, r4, #66 @ 0x42 8013d6c: f884 7042 strb.w r7, [r4, #66] @ 0x42 8013d70: e03a b.n 8013de8 <_printf_i+0xa8> 8013d72: f1a7 0363 sub.w r3, r7, #99 @ 0x63 8013d76: 2b15 cmp r3, #21 8013d78: d8f6 bhi.n 8013d68 <_printf_i+0x28> 8013d7a: a101 add r1, pc, #4 @ (adr r1, 8013d80 <_printf_i+0x40>) 8013d7c: f851 f023 ldr.w pc, [r1, r3, lsl #2] 8013d80: 08013dd9 .word 0x08013dd9 8013d84: 08013ded .word 0x08013ded 8013d88: 08013d69 .word 0x08013d69 8013d8c: 08013d69 .word 0x08013d69 8013d90: 08013d69 .word 0x08013d69 8013d94: 08013d69 .word 0x08013d69 8013d98: 08013ded .word 0x08013ded 8013d9c: 08013d69 .word 0x08013d69 8013da0: 08013d69 .word 0x08013d69 8013da4: 08013d69 .word 0x08013d69 8013da8: 08013d69 .word 0x08013d69 8013dac: 08013eeb .word 0x08013eeb 8013db0: 08013e17 .word 0x08013e17 8013db4: 08013ea5 .word 0x08013ea5 8013db8: 08013d69 .word 0x08013d69 8013dbc: 08013d69 .word 0x08013d69 8013dc0: 08013f0d .word 0x08013f0d 8013dc4: 08013d69 .word 0x08013d69 8013dc8: 08013e17 .word 0x08013e17 8013dcc: 08013d69 .word 0x08013d69 8013dd0: 08013d69 .word 0x08013d69 8013dd4: 08013ead .word 0x08013ead 8013dd8: 6833 ldr r3, [r6, #0] 8013dda: 1d1a adds r2, r3, #4 8013ddc: 681b ldr r3, [r3, #0] 8013dde: 6032 str r2, [r6, #0] 8013de0: f104 0642 add.w r6, r4, #66 @ 0x42 8013de4: f884 3042 strb.w r3, [r4, #66] @ 0x42 8013de8: 2301 movs r3, #1 8013dea: e09c b.n 8013f26 <_printf_i+0x1e6> 8013dec: 6833 ldr r3, [r6, #0] 8013dee: 6820 ldr r0, [r4, #0] 8013df0: 1d19 adds r1, r3, #4 8013df2: 6031 str r1, [r6, #0] 8013df4: 0606 lsls r6, r0, #24 8013df6: d501 bpl.n 8013dfc <_printf_i+0xbc> 8013df8: 681d ldr r5, [r3, #0] 8013dfa: e003 b.n 8013e04 <_printf_i+0xc4> 8013dfc: 0645 lsls r5, r0, #25 8013dfe: d5fb bpl.n 8013df8 <_printf_i+0xb8> 8013e00: f9b3 5000 ldrsh.w r5, [r3] 8013e04: 2d00 cmp r5, #0 8013e06: da03 bge.n 8013e10 <_printf_i+0xd0> 8013e08: 232d movs r3, #45 @ 0x2d 8013e0a: 426d negs r5, r5 8013e0c: f884 3043 strb.w r3, [r4, #67] @ 0x43 8013e10: 230a movs r3, #10 8013e12: 4858 ldr r0, [pc, #352] @ (8013f74 <_printf_i+0x234>) 8013e14: e011 b.n 8013e3a <_printf_i+0xfa> 8013e16: 6821 ldr r1, [r4, #0] 8013e18: 6833 ldr r3, [r6, #0] 8013e1a: 0608 lsls r0, r1, #24 8013e1c: f853 5b04 ldr.w r5, [r3], #4 8013e20: d402 bmi.n 8013e28 <_printf_i+0xe8> 8013e22: 0649 lsls r1, r1, #25 8013e24: bf48 it mi 8013e26: b2ad uxthmi r5, r5 8013e28: 2f6f cmp r7, #111 @ 0x6f 8013e2a: 6033 str r3, [r6, #0] 8013e2c: bf14 ite ne 8013e2e: 230a movne r3, #10 8013e30: 2308 moveq r3, #8 8013e32: 4850 ldr r0, [pc, #320] @ (8013f74 <_printf_i+0x234>) 8013e34: 2100 movs r1, #0 8013e36: f884 1043 strb.w r1, [r4, #67] @ 0x43 8013e3a: 6866 ldr r6, [r4, #4] 8013e3c: 2e00 cmp r6, #0 8013e3e: 60a6 str r6, [r4, #8] 8013e40: db05 blt.n 8013e4e <_printf_i+0x10e> 8013e42: 6821 ldr r1, [r4, #0] 8013e44: 432e orrs r6, r5 8013e46: f021 0104 bic.w r1, r1, #4 8013e4a: 6021 str r1, [r4, #0] 8013e4c: d04b beq.n 8013ee6 <_printf_i+0x1a6> 8013e4e: 4616 mov r6, r2 8013e50: fbb5 f1f3 udiv r1, r5, r3 8013e54: fb03 5711 mls r7, r3, r1, r5 8013e58: 5dc7 ldrb r7, [r0, r7] 8013e5a: f806 7d01 strb.w r7, [r6, #-1]! 8013e5e: 462f mov r7, r5 8013e60: 42bb cmp r3, r7 8013e62: 460d mov r5, r1 8013e64: d9f4 bls.n 8013e50 <_printf_i+0x110> 8013e66: 2b08 cmp r3, #8 8013e68: d10b bne.n 8013e82 <_printf_i+0x142> 8013e6a: 6823 ldr r3, [r4, #0] 8013e6c: 07df lsls r7, r3, #31 8013e6e: d508 bpl.n 8013e82 <_printf_i+0x142> 8013e70: 6923 ldr r3, [r4, #16] 8013e72: 6861 ldr r1, [r4, #4] 8013e74: 4299 cmp r1, r3 8013e76: bfde ittt le 8013e78: 2330 movle r3, #48 @ 0x30 8013e7a: f806 3c01 strble.w r3, [r6, #-1] 8013e7e: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff 8013e82: 1b92 subs r2, r2, r6 8013e84: 6122 str r2, [r4, #16] 8013e86: 464b mov r3, r9 8013e88: 4621 mov r1, r4 8013e8a: 4640 mov r0, r8 8013e8c: f8cd a000 str.w sl, [sp] 8013e90: aa03 add r2, sp, #12 8013e92: f7ff fee3 bl 8013c5c <_printf_common> 8013e96: 3001 adds r0, #1 8013e98: d14a bne.n 8013f30 <_printf_i+0x1f0> 8013e9a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013e9e: b004 add sp, #16 8013ea0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8013ea4: 6823 ldr r3, [r4, #0] 8013ea6: f043 0320 orr.w r3, r3, #32 8013eaa: 6023 str r3, [r4, #0] 8013eac: 2778 movs r7, #120 @ 0x78 8013eae: 4832 ldr r0, [pc, #200] @ (8013f78 <_printf_i+0x238>) 8013eb0: f884 7045 strb.w r7, [r4, #69] @ 0x45 8013eb4: 6823 ldr r3, [r4, #0] 8013eb6: 6831 ldr r1, [r6, #0] 8013eb8: 061f lsls r7, r3, #24 8013eba: f851 5b04 ldr.w r5, [r1], #4 8013ebe: d402 bmi.n 8013ec6 <_printf_i+0x186> 8013ec0: 065f lsls r7, r3, #25 8013ec2: bf48 it mi 8013ec4: b2ad uxthmi r5, r5 8013ec6: 6031 str r1, [r6, #0] 8013ec8: 07d9 lsls r1, r3, #31 8013eca: bf44 itt mi 8013ecc: f043 0320 orrmi.w r3, r3, #32 8013ed0: 6023 strmi r3, [r4, #0] 8013ed2: b11d cbz r5, 8013edc <_printf_i+0x19c> 8013ed4: 2310 movs r3, #16 8013ed6: e7ad b.n 8013e34 <_printf_i+0xf4> 8013ed8: 4826 ldr r0, [pc, #152] @ (8013f74 <_printf_i+0x234>) 8013eda: e7e9 b.n 8013eb0 <_printf_i+0x170> 8013edc: 6823 ldr r3, [r4, #0] 8013ede: f023 0320 bic.w r3, r3, #32 8013ee2: 6023 str r3, [r4, #0] 8013ee4: e7f6 b.n 8013ed4 <_printf_i+0x194> 8013ee6: 4616 mov r6, r2 8013ee8: e7bd b.n 8013e66 <_printf_i+0x126> 8013eea: 6833 ldr r3, [r6, #0] 8013eec: 6825 ldr r5, [r4, #0] 8013eee: 1d18 adds r0, r3, #4 8013ef0: 6961 ldr r1, [r4, #20] 8013ef2: 6030 str r0, [r6, #0] 8013ef4: 062e lsls r6, r5, #24 8013ef6: 681b ldr r3, [r3, #0] 8013ef8: d501 bpl.n 8013efe <_printf_i+0x1be> 8013efa: 6019 str r1, [r3, #0] 8013efc: e002 b.n 8013f04 <_printf_i+0x1c4> 8013efe: 0668 lsls r0, r5, #25 8013f00: d5fb bpl.n 8013efa <_printf_i+0x1ba> 8013f02: 8019 strh r1, [r3, #0] 8013f04: 2300 movs r3, #0 8013f06: 4616 mov r6, r2 8013f08: 6123 str r3, [r4, #16] 8013f0a: e7bc b.n 8013e86 <_printf_i+0x146> 8013f0c: 6833 ldr r3, [r6, #0] 8013f0e: 2100 movs r1, #0 8013f10: 1d1a adds r2, r3, #4 8013f12: 6032 str r2, [r6, #0] 8013f14: 681e ldr r6, [r3, #0] 8013f16: 6862 ldr r2, [r4, #4] 8013f18: 4630 mov r0, r6 8013f1a: f000 fa3f bl 801439c 8013f1e: b108 cbz r0, 8013f24 <_printf_i+0x1e4> 8013f20: 1b80 subs r0, r0, r6 8013f22: 6060 str r0, [r4, #4] 8013f24: 6863 ldr r3, [r4, #4] 8013f26: 6123 str r3, [r4, #16] 8013f28: 2300 movs r3, #0 8013f2a: f884 3043 strb.w r3, [r4, #67] @ 0x43 8013f2e: e7aa b.n 8013e86 <_printf_i+0x146> 8013f30: 4632 mov r2, r6 8013f32: 4649 mov r1, r9 8013f34: 4640 mov r0, r8 8013f36: 6923 ldr r3, [r4, #16] 8013f38: 47d0 blx sl 8013f3a: 3001 adds r0, #1 8013f3c: d0ad beq.n 8013e9a <_printf_i+0x15a> 8013f3e: 6823 ldr r3, [r4, #0] 8013f40: 079b lsls r3, r3, #30 8013f42: d413 bmi.n 8013f6c <_printf_i+0x22c> 8013f44: 68e0 ldr r0, [r4, #12] 8013f46: 9b03 ldr r3, [sp, #12] 8013f48: 4298 cmp r0, r3 8013f4a: bfb8 it lt 8013f4c: 4618 movlt r0, r3 8013f4e: e7a6 b.n 8013e9e <_printf_i+0x15e> 8013f50: 2301 movs r3, #1 8013f52: 4632 mov r2, r6 8013f54: 4649 mov r1, r9 8013f56: 4640 mov r0, r8 8013f58: 47d0 blx sl 8013f5a: 3001 adds r0, #1 8013f5c: d09d beq.n 8013e9a <_printf_i+0x15a> 8013f5e: 3501 adds r5, #1 8013f60: 68e3 ldr r3, [r4, #12] 8013f62: 9903 ldr r1, [sp, #12] 8013f64: 1a5b subs r3, r3, r1 8013f66: 42ab cmp r3, r5 8013f68: dcf2 bgt.n 8013f50 <_printf_i+0x210> 8013f6a: e7eb b.n 8013f44 <_printf_i+0x204> 8013f6c: 2500 movs r5, #0 8013f6e: f104 0619 add.w r6, r4, #25 8013f72: e7f5 b.n 8013f60 <_printf_i+0x220> 8013f74: 08016d82 .word 0x08016d82 8013f78: 08016d93 .word 0x08016d93 08013f7c : 8013f7c: 2300 movs r3, #0 8013f7e: b510 push {r4, lr} 8013f80: 4604 mov r4, r0 8013f82: e9c0 3300 strd r3, r3, [r0] 8013f86: e9c0 3304 strd r3, r3, [r0, #16] 8013f8a: 6083 str r3, [r0, #8] 8013f8c: 8181 strh r1, [r0, #12] 8013f8e: 6643 str r3, [r0, #100] @ 0x64 8013f90: 81c2 strh r2, [r0, #14] 8013f92: 6183 str r3, [r0, #24] 8013f94: 4619 mov r1, r3 8013f96: 2208 movs r2, #8 8013f98: 305c adds r0, #92 @ 0x5c 8013f9a: f000 f8ff bl 801419c 8013f9e: 4b0d ldr r3, [pc, #52] @ (8013fd4 ) 8013fa0: 6224 str r4, [r4, #32] 8013fa2: 6263 str r3, [r4, #36] @ 0x24 8013fa4: 4b0c ldr r3, [pc, #48] @ (8013fd8 ) 8013fa6: 62a3 str r3, [r4, #40] @ 0x28 8013fa8: 4b0c ldr r3, [pc, #48] @ (8013fdc ) 8013faa: 62e3 str r3, [r4, #44] @ 0x2c 8013fac: 4b0c ldr r3, [pc, #48] @ (8013fe0 ) 8013fae: 6323 str r3, [r4, #48] @ 0x30 8013fb0: 4b0c ldr r3, [pc, #48] @ (8013fe4 ) 8013fb2: 429c cmp r4, r3 8013fb4: d006 beq.n 8013fc4 8013fb6: f103 0268 add.w r2, r3, #104 @ 0x68 8013fba: 4294 cmp r4, r2 8013fbc: d002 beq.n 8013fc4 8013fbe: 33d0 adds r3, #208 @ 0xd0 8013fc0: 429c cmp r4, r3 8013fc2: d105 bne.n 8013fd0 8013fc4: f104 0058 add.w r0, r4, #88 @ 0x58 8013fc8: e8bd 4010 ldmia.w sp!, {r4, lr} 8013fcc: f000 b9de b.w 801438c <__retarget_lock_init_recursive> 8013fd0: bd10 pop {r4, pc} 8013fd2: bf00 nop 8013fd4: 08015fa9 .word 0x08015fa9 8013fd8: 08015fcb .word 0x08015fcb 8013fdc: 08016003 .word 0x08016003 8013fe0: 08016027 .word 0x08016027 8013fe4: 20001090 .word 0x20001090 08013fe8 : 8013fe8: 4a02 ldr r2, [pc, #8] @ (8013ff4 ) 8013fea: 4903 ldr r1, [pc, #12] @ (8013ff8 ) 8013fec: 4803 ldr r0, [pc, #12] @ (8013ffc ) 8013fee: f000 b8a5 b.w 801413c <_fwalk_sglue> 8013ff2: bf00 nop 8013ff4: 20000084 .word 0x20000084 8013ff8: 0801584d .word 0x0801584d 8013ffc: 20000094 .word 0x20000094 08014000 : 8014000: 6841 ldr r1, [r0, #4] 8014002: 4b0c ldr r3, [pc, #48] @ (8014034 ) 8014004: b510 push {r4, lr} 8014006: 4299 cmp r1, r3 8014008: 4604 mov r4, r0 801400a: d001 beq.n 8014010 801400c: f001 fc1e bl 801584c <_fflush_r> 8014010: 68a1 ldr r1, [r4, #8] 8014012: 4b09 ldr r3, [pc, #36] @ (8014038 ) 8014014: 4299 cmp r1, r3 8014016: d002 beq.n 801401e 8014018: 4620 mov r0, r4 801401a: f001 fc17 bl 801584c <_fflush_r> 801401e: 68e1 ldr r1, [r4, #12] 8014020: 4b06 ldr r3, [pc, #24] @ (801403c ) 8014022: 4299 cmp r1, r3 8014024: d004 beq.n 8014030 8014026: 4620 mov r0, r4 8014028: e8bd 4010 ldmia.w sp!, {r4, lr} 801402c: f001 bc0e b.w 801584c <_fflush_r> 8014030: bd10 pop {r4, pc} 8014032: bf00 nop 8014034: 20001090 .word 0x20001090 8014038: 200010f8 .word 0x200010f8 801403c: 20001160 .word 0x20001160 08014040 : 8014040: b510 push {r4, lr} 8014042: 4b0b ldr r3, [pc, #44] @ (8014070 ) 8014044: 4c0b ldr r4, [pc, #44] @ (8014074 ) 8014046: 4a0c ldr r2, [pc, #48] @ (8014078 ) 8014048: 4620 mov r0, r4 801404a: 601a str r2, [r3, #0] 801404c: 2104 movs r1, #4 801404e: 2200 movs r2, #0 8014050: f7ff ff94 bl 8013f7c 8014054: f104 0068 add.w r0, r4, #104 @ 0x68 8014058: 2201 movs r2, #1 801405a: 2109 movs r1, #9 801405c: f7ff ff8e bl 8013f7c 8014060: f104 00d0 add.w r0, r4, #208 @ 0xd0 8014064: 2202 movs r2, #2 8014066: e8bd 4010 ldmia.w sp!, {r4, lr} 801406a: 2112 movs r1, #18 801406c: f7ff bf86 b.w 8013f7c 8014070: 200011c8 .word 0x200011c8 8014074: 20001090 .word 0x20001090 8014078: 08013fe9 .word 0x08013fe9 0801407c <__sfp_lock_acquire>: 801407c: 4801 ldr r0, [pc, #4] @ (8014084 <__sfp_lock_acquire+0x8>) 801407e: f000 b986 b.w 801438e <__retarget_lock_acquire_recursive> 8014082: bf00 nop 8014084: 200011cd .word 0x200011cd 08014088 <__sfp_lock_release>: 8014088: 4801 ldr r0, [pc, #4] @ (8014090 <__sfp_lock_release+0x8>) 801408a: f000 b981 b.w 8014390 <__retarget_lock_release_recursive> 801408e: bf00 nop 8014090: 200011cd .word 0x200011cd 08014094 <__sinit>: 8014094: b510 push {r4, lr} 8014096: 4604 mov r4, r0 8014098: f7ff fff0 bl 801407c <__sfp_lock_acquire> 801409c: 6a23 ldr r3, [r4, #32] 801409e: b11b cbz r3, 80140a8 <__sinit+0x14> 80140a0: e8bd 4010 ldmia.w sp!, {r4, lr} 80140a4: f7ff bff0 b.w 8014088 <__sfp_lock_release> 80140a8: 4b04 ldr r3, [pc, #16] @ (80140bc <__sinit+0x28>) 80140aa: 6223 str r3, [r4, #32] 80140ac: 4b04 ldr r3, [pc, #16] @ (80140c0 <__sinit+0x2c>) 80140ae: 681b ldr r3, [r3, #0] 80140b0: 2b00 cmp r3, #0 80140b2: d1f5 bne.n 80140a0 <__sinit+0xc> 80140b4: f7ff ffc4 bl 8014040 80140b8: e7f2 b.n 80140a0 <__sinit+0xc> 80140ba: bf00 nop 80140bc: 08014001 .word 0x08014001 80140c0: 200011c8 .word 0x200011c8 080140c4 <_vsniprintf_r>: 80140c4: b530 push {r4, r5, lr} 80140c6: 4614 mov r4, r2 80140c8: 2c00 cmp r4, #0 80140ca: 4605 mov r5, r0 80140cc: 461a mov r2, r3 80140ce: b09b sub sp, #108 @ 0x6c 80140d0: da05 bge.n 80140de <_vsniprintf_r+0x1a> 80140d2: 238b movs r3, #139 @ 0x8b 80140d4: 6003 str r3, [r0, #0] 80140d6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80140da: b01b add sp, #108 @ 0x6c 80140dc: bd30 pop {r4, r5, pc} 80140de: f44f 7302 mov.w r3, #520 @ 0x208 80140e2: f8ad 300c strh.w r3, [sp, #12] 80140e6: f04f 0300 mov.w r3, #0 80140ea: 9319 str r3, [sp, #100] @ 0x64 80140ec: bf0c ite eq 80140ee: 4623 moveq r3, r4 80140f0: f104 33ff addne.w r3, r4, #4294967295 @ 0xffffffff 80140f4: 9302 str r3, [sp, #8] 80140f6: 9305 str r3, [sp, #20] 80140f8: f64f 73ff movw r3, #65535 @ 0xffff 80140fc: 9100 str r1, [sp, #0] 80140fe: 9104 str r1, [sp, #16] 8014100: f8ad 300e strh.w r3, [sp, #14] 8014104: 4669 mov r1, sp 8014106: 9b1e ldr r3, [sp, #120] @ 0x78 8014108: f001 f83a bl 8015180 <_svfiprintf_r> 801410c: 1c43 adds r3, r0, #1 801410e: bfbc itt lt 8014110: 238b movlt r3, #139 @ 0x8b 8014112: 602b strlt r3, [r5, #0] 8014114: 2c00 cmp r4, #0 8014116: d0e0 beq.n 80140da <_vsniprintf_r+0x16> 8014118: 2200 movs r2, #0 801411a: 9b00 ldr r3, [sp, #0] 801411c: 701a strb r2, [r3, #0] 801411e: e7dc b.n 80140da <_vsniprintf_r+0x16> 08014120 : 8014120: b507 push {r0, r1, r2, lr} 8014122: 9300 str r3, [sp, #0] 8014124: 4613 mov r3, r2 8014126: 460a mov r2, r1 8014128: 4601 mov r1, r0 801412a: 4803 ldr r0, [pc, #12] @ (8014138 ) 801412c: 6800 ldr r0, [r0, #0] 801412e: f7ff ffc9 bl 80140c4 <_vsniprintf_r> 8014132: b003 add sp, #12 8014134: f85d fb04 ldr.w pc, [sp], #4 8014138: 20000090 .word 0x20000090 0801413c <_fwalk_sglue>: 801413c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8014140: 4607 mov r7, r0 8014142: 4688 mov r8, r1 8014144: 4614 mov r4, r2 8014146: 2600 movs r6, #0 8014148: e9d4 9501 ldrd r9, r5, [r4, #4] 801414c: f1b9 0901 subs.w r9, r9, #1 8014150: d505 bpl.n 801415e <_fwalk_sglue+0x22> 8014152: 6824 ldr r4, [r4, #0] 8014154: 2c00 cmp r4, #0 8014156: d1f7 bne.n 8014148 <_fwalk_sglue+0xc> 8014158: 4630 mov r0, r6 801415a: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 801415e: 89ab ldrh r3, [r5, #12] 8014160: 2b01 cmp r3, #1 8014162: d907 bls.n 8014174 <_fwalk_sglue+0x38> 8014164: f9b5 300e ldrsh.w r3, [r5, #14] 8014168: 3301 adds r3, #1 801416a: d003 beq.n 8014174 <_fwalk_sglue+0x38> 801416c: 4629 mov r1, r5 801416e: 4638 mov r0, r7 8014170: 47c0 blx r8 8014172: 4306 orrs r6, r0 8014174: 3568 adds r5, #104 @ 0x68 8014176: e7e9 b.n 801414c <_fwalk_sglue+0x10> 08014178 : 8014178: b40f push {r0, r1, r2, r3} 801417a: b507 push {r0, r1, r2, lr} 801417c: 4906 ldr r1, [pc, #24] @ (8014198 ) 801417e: ab04 add r3, sp, #16 8014180: 6808 ldr r0, [r1, #0] 8014182: f853 2b04 ldr.w r2, [r3], #4 8014186: 6881 ldr r1, [r0, #8] 8014188: 9301 str r3, [sp, #4] 801418a: f001 f91d bl 80153c8 <_vfiprintf_r> 801418e: b003 add sp, #12 8014190: f85d eb04 ldr.w lr, [sp], #4 8014194: b004 add sp, #16 8014196: 4770 bx lr 8014198: 20000090 .word 0x20000090 0801419c : 801419c: 4603 mov r3, r0 801419e: 4402 add r2, r0 80141a0: 4293 cmp r3, r2 80141a2: d100 bne.n 80141a6 80141a4: 4770 bx lr 80141a6: f803 1b01 strb.w r1, [r3], #1 80141aa: e7f9 b.n 80141a0 080141ac : 80141ac: b538 push {r3, r4, r5, lr} 80141ae: 4b0b ldr r3, [pc, #44] @ (80141dc ) 80141b0: 4604 mov r4, r0 80141b2: 681d ldr r5, [r3, #0] 80141b4: 6b6b ldr r3, [r5, #52] @ 0x34 80141b6: b953 cbnz r3, 80141ce 80141b8: 2024 movs r0, #36 @ 0x24 80141ba: f001 fa1d bl 80155f8 80141be: 4602 mov r2, r0 80141c0: 6368 str r0, [r5, #52] @ 0x34 80141c2: b920 cbnz r0, 80141ce 80141c4: 213d movs r1, #61 @ 0x3d 80141c6: 4b06 ldr r3, [pc, #24] @ (80141e0 ) 80141c8: 4806 ldr r0, [pc, #24] @ (80141e4 ) 80141ca: f000 f903 bl 80143d4 <__assert_func> 80141ce: 4620 mov r0, r4 80141d0: 6b69 ldr r1, [r5, #52] @ 0x34 80141d2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80141d6: f000 b807 b.w 80141e8 80141da: bf00 nop 80141dc: 20000090 .word 0x20000090 80141e0: 08016da4 .word 0x08016da4 80141e4: 08016dbb .word 0x08016dbb 080141e8 : 80141e8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80141ec: 2300 movs r3, #0 80141ee: 460c mov r4, r1 80141f0: e9d0 0100 ldrd r0, r1, [r0] 80141f4: 4a4c ldr r2, [pc, #304] @ (8014328 ) 80141f6: f7f4 fffd bl 80091f4 <__aeabi_ldivmod> 80141fa: f44f 6161 mov.w r1, #3600 @ 0xe10 80141fe: 2a00 cmp r2, #0 8014200: bfbc itt lt 8014202: f502 32a8 addlt.w r2, r2, #86016 @ 0x15000 8014206: f502 72c0 addlt.w r2, r2, #384 @ 0x180 801420a: fbb2 f3f1 udiv r3, r2, r1 801420e: fb01 2213 mls r2, r1, r3, r2 8014212: f04f 013c mov.w r1, #60 @ 0x3c 8014216: 60a3 str r3, [r4, #8] 8014218: fbb2 f3f1 udiv r3, r2, r1 801421c: fb01 2213 mls r2, r1, r3, r2 8014220: 6022 str r2, [r4, #0] 8014222: f04f 0207 mov.w r2, #7 8014226: f500 202f add.w r0, r0, #716800 @ 0xaf000 801422a: bfac ite ge 801422c: f600 206c addwge r0, r0, #2668 @ 0xa6c 8014230: f600 206b addwlt r0, r0, #2667 @ 0xa6b 8014234: 6063 str r3, [r4, #4] 8014236: 1cc3 adds r3, r0, #3 8014238: fb93 f2f2 sdiv r2, r3, r2 801423c: ebc2 02c2 rsb r2, r2, r2, lsl #3 8014240: 1a9b subs r3, r3, r2 8014242: 493a ldr r1, [pc, #232] @ (801432c ) 8014244: d555 bpl.n 80142f2 8014246: 3307 adds r3, #7 8014248: 61a3 str r3, [r4, #24] 801424a: f5a0 330e sub.w r3, r0, #145408 @ 0x23800 801424e: f5a3 732c sub.w r3, r3, #688 @ 0x2b0 8014252: fb93 f1f1 sdiv r1, r3, r1 8014256: 4b36 ldr r3, [pc, #216] @ (8014330 ) 8014258: f240 5cb4 movw ip, #1460 @ 0x5b4 801425c: fb03 0001 mla r0, r3, r1, r0 8014260: f648 63ac movw r3, #36524 @ 0x8eac 8014264: fbb0 f3f3 udiv r3, r0, r3 8014268: fbb0 f2fc udiv r2, r0, ip 801426c: 4403 add r3, r0 801426e: 1a9b subs r3, r3, r2 8014270: 4a30 ldr r2, [pc, #192] @ (8014334 ) 8014272: f240 176d movw r7, #365 @ 0x16d 8014276: fbb0 f2f2 udiv r2, r0, r2 801427a: 1a9b subs r3, r3, r2 801427c: fbb3 f2f7 udiv r2, r3, r7 8014280: 2664 movs r6, #100 @ 0x64 8014282: fbb3 f3fc udiv r3, r3, ip 8014286: fbb2 f5f6 udiv r5, r2, r6 801428a: 1aeb subs r3, r5, r3 801428c: 4403 add r3, r0 801428e: 2099 movs r0, #153 @ 0x99 8014290: fb07 3312 mls r3, r7, r2, r3 8014294: eb03 0783 add.w r7, r3, r3, lsl #2 8014298: 3702 adds r7, #2 801429a: fbb7 fcf0 udiv ip, r7, r0 801429e: f04f 0805 mov.w r8, #5 80142a2: fb00 f00c mul.w r0, r0, ip 80142a6: 3002 adds r0, #2 80142a8: fbb0 f0f8 udiv r0, r0, r8 80142ac: f103 0e01 add.w lr, r3, #1 80142b0: ebae 0000 sub.w r0, lr, r0 80142b4: f240 5ef9 movw lr, #1529 @ 0x5f9 80142b8: 4577 cmp r7, lr 80142ba: bf8c ite hi 80142bc: f06f 0709 mvnhi.w r7, #9 80142c0: 2702 movls r7, #2 80142c2: 4467 add r7, ip 80142c4: f44f 7cc8 mov.w ip, #400 @ 0x190 80142c8: fb0c 2101 mla r1, ip, r1, r2 80142cc: 2f01 cmp r7, #1 80142ce: bf98 it ls 80142d0: 3101 addls r1, #1 80142d2: f5b3 7f99 cmp.w r3, #306 @ 0x132 80142d6: d312 bcc.n 80142fe 80142d8: f5a3 7399 sub.w r3, r3, #306 @ 0x132 80142dc: 61e3 str r3, [r4, #28] 80142de: 2300 movs r3, #0 80142e0: f2a1 716c subw r1, r1, #1900 @ 0x76c 80142e4: 60e0 str r0, [r4, #12] 80142e6: e9c4 7104 strd r7, r1, [r4, #16] 80142ea: 4620 mov r0, r4 80142ec: 6223 str r3, [r4, #32] 80142ee: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80142f2: 2800 cmp r0, #0 80142f4: 61a3 str r3, [r4, #24] 80142f6: dba8 blt.n 801424a 80142f8: fb90 f1f1 sdiv r1, r0, r1 80142fc: e7ab b.n 8014256 80142fe: f012 0f03 tst.w r2, #3 8014302: d102 bne.n 801430a 8014304: fb06 2515 mls r5, r6, r5, r2 8014308: b95d cbnz r5, 8014322 801430a: f44f 75c8 mov.w r5, #400 @ 0x190 801430e: fbb2 f6f5 udiv r6, r2, r5 8014312: fb05 2216 mls r2, r5, r6, r2 8014316: fab2 f282 clz r2, r2 801431a: 0952 lsrs r2, r2, #5 801431c: 333b adds r3, #59 @ 0x3b 801431e: 4413 add r3, r2 8014320: e7dc b.n 80142dc 8014322: 2201 movs r2, #1 8014324: e7fa b.n 801431c 8014326: bf00 nop 8014328: 00015180 .word 0x00015180 801432c: 00023ab1 .word 0x00023ab1 8014330: fffdc54f .word 0xfffdc54f 8014334: 00023ab0 .word 0x00023ab0 08014338 <__errno>: 8014338: 4b01 ldr r3, [pc, #4] @ (8014340 <__errno+0x8>) 801433a: 6818 ldr r0, [r3, #0] 801433c: 4770 bx lr 801433e: bf00 nop 8014340: 20000090 .word 0x20000090 08014344 <__libc_init_array>: 8014344: b570 push {r4, r5, r6, lr} 8014346: 2600 movs r6, #0 8014348: 4d0c ldr r5, [pc, #48] @ (801437c <__libc_init_array+0x38>) 801434a: 4c0d ldr r4, [pc, #52] @ (8014380 <__libc_init_array+0x3c>) 801434c: 1b64 subs r4, r4, r5 801434e: 10a4 asrs r4, r4, #2 8014350: 42a6 cmp r6, r4 8014352: d109 bne.n 8014368 <__libc_init_array+0x24> 8014354: f002 f904 bl 8016560 <_init> 8014358: 2600 movs r6, #0 801435a: 4d0a ldr r5, [pc, #40] @ (8014384 <__libc_init_array+0x40>) 801435c: 4c0a ldr r4, [pc, #40] @ (8014388 <__libc_init_array+0x44>) 801435e: 1b64 subs r4, r4, r5 8014360: 10a4 asrs r4, r4, #2 8014362: 42a6 cmp r6, r4 8014364: d105 bne.n 8014372 <__libc_init_array+0x2e> 8014366: bd70 pop {r4, r5, r6, pc} 8014368: f855 3b04 ldr.w r3, [r5], #4 801436c: 4798 blx r3 801436e: 3601 adds r6, #1 8014370: e7ee b.n 8014350 <__libc_init_array+0xc> 8014372: f855 3b04 ldr.w r3, [r5], #4 8014376: 4798 blx r3 8014378: 3601 adds r6, #1 801437a: e7f2 b.n 8014362 <__libc_init_array+0x1e> 801437c: 08017144 .word 0x08017144 8014380: 08017144 .word 0x08017144 8014384: 08017144 .word 0x08017144 8014388: 08017148 .word 0x08017148 0801438c <__retarget_lock_init_recursive>: 801438c: 4770 bx lr 0801438e <__retarget_lock_acquire_recursive>: 801438e: 4770 bx lr 08014390 <__retarget_lock_release_recursive>: 8014390: 4770 bx lr ... 08014394 <_localeconv_r>: 8014394: 4800 ldr r0, [pc, #0] @ (8014398 <_localeconv_r+0x4>) 8014396: 4770 bx lr 8014398: 200001d0 .word 0x200001d0 0801439c : 801439c: 4603 mov r3, r0 801439e: b510 push {r4, lr} 80143a0: b2c9 uxtb r1, r1 80143a2: 4402 add r2, r0 80143a4: 4293 cmp r3, r2 80143a6: 4618 mov r0, r3 80143a8: d101 bne.n 80143ae 80143aa: 2000 movs r0, #0 80143ac: e003 b.n 80143b6 80143ae: 7804 ldrb r4, [r0, #0] 80143b0: 3301 adds r3, #1 80143b2: 428c cmp r4, r1 80143b4: d1f6 bne.n 80143a4 80143b6: bd10 pop {r4, pc} 080143b8 : 80143b8: 440a add r2, r1 80143ba: 4291 cmp r1, r2 80143bc: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff 80143c0: d100 bne.n 80143c4 80143c2: 4770 bx lr 80143c4: b510 push {r4, lr} 80143c6: f811 4b01 ldrb.w r4, [r1], #1 80143ca: 4291 cmp r1, r2 80143cc: f803 4f01 strb.w r4, [r3, #1]! 80143d0: d1f9 bne.n 80143c6 80143d2: bd10 pop {r4, pc} 080143d4 <__assert_func>: 80143d4: b51f push {r0, r1, r2, r3, r4, lr} 80143d6: 4614 mov r4, r2 80143d8: 461a mov r2, r3 80143da: 4b09 ldr r3, [pc, #36] @ (8014400 <__assert_func+0x2c>) 80143dc: 4605 mov r5, r0 80143de: 681b ldr r3, [r3, #0] 80143e0: 68d8 ldr r0, [r3, #12] 80143e2: b14c cbz r4, 80143f8 <__assert_func+0x24> 80143e4: 4b07 ldr r3, [pc, #28] @ (8014404 <__assert_func+0x30>) 80143e6: e9cd 3401 strd r3, r4, [sp, #4] 80143ea: 9100 str r1, [sp, #0] 80143ec: 462b mov r3, r5 80143ee: 4906 ldr r1, [pc, #24] @ (8014408 <__assert_func+0x34>) 80143f0: f001 fe1e bl 8016030 80143f4: f001 ffe4 bl 80163c0 80143f8: 4b04 ldr r3, [pc, #16] @ (801440c <__assert_func+0x38>) 80143fa: 461c mov r4, r3 80143fc: e7f3 b.n 80143e6 <__assert_func+0x12> 80143fe: bf00 nop 8014400: 20000090 .word 0x20000090 8014404: 08016e13 .word 0x08016e13 8014408: 08016e20 .word 0x08016e20 801440c: 08016e4e .word 0x08016e4e 08014410 : 8014410: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8014414: 6903 ldr r3, [r0, #16] 8014416: 690c ldr r4, [r1, #16] 8014418: 4607 mov r7, r0 801441a: 42a3 cmp r3, r4 801441c: db7e blt.n 801451c 801441e: 3c01 subs r4, #1 8014420: 00a3 lsls r3, r4, #2 8014422: f100 0514 add.w r5, r0, #20 8014426: f101 0814 add.w r8, r1, #20 801442a: 9300 str r3, [sp, #0] 801442c: eb05 0384 add.w r3, r5, r4, lsl #2 8014430: 9301 str r3, [sp, #4] 8014432: f858 3024 ldr.w r3, [r8, r4, lsl #2] 8014436: f855 2024 ldr.w r2, [r5, r4, lsl #2] 801443a: 3301 adds r3, #1 801443c: 429a cmp r2, r3 801443e: fbb2 f6f3 udiv r6, r2, r3 8014442: eb08 0984 add.w r9, r8, r4, lsl #2 8014446: d32e bcc.n 80144a6 8014448: f04f 0a00 mov.w sl, #0 801444c: 46c4 mov ip, r8 801444e: 46ae mov lr, r5 8014450: 46d3 mov fp, sl 8014452: f85c 3b04 ldr.w r3, [ip], #4 8014456: b298 uxth r0, r3 8014458: fb06 a000 mla r0, r6, r0, sl 801445c: 0c1b lsrs r3, r3, #16 801445e: 0c02 lsrs r2, r0, #16 8014460: fb06 2303 mla r3, r6, r3, r2 8014464: f8de 2000 ldr.w r2, [lr] 8014468: b280 uxth r0, r0 801446a: b292 uxth r2, r2 801446c: 1a12 subs r2, r2, r0 801446e: 445a add r2, fp 8014470: f8de 0000 ldr.w r0, [lr] 8014474: ea4f 4a13 mov.w sl, r3, lsr #16 8014478: b29b uxth r3, r3 801447a: ebc3 4322 rsb r3, r3, r2, asr #16 801447e: eb03 4310 add.w r3, r3, r0, lsr #16 8014482: b292 uxth r2, r2 8014484: ea42 4203 orr.w r2, r2, r3, lsl #16 8014488: 45e1 cmp r9, ip 801448a: ea4f 4b23 mov.w fp, r3, asr #16 801448e: f84e 2b04 str.w r2, [lr], #4 8014492: d2de bcs.n 8014452 8014494: 9b00 ldr r3, [sp, #0] 8014496: 58eb ldr r3, [r5, r3] 8014498: b92b cbnz r3, 80144a6 801449a: 9b01 ldr r3, [sp, #4] 801449c: 3b04 subs r3, #4 801449e: 429d cmp r5, r3 80144a0: 461a mov r2, r3 80144a2: d32f bcc.n 8014504 80144a4: 613c str r4, [r7, #16] 80144a6: 4638 mov r0, r7 80144a8: f001 fc76 bl 8015d98 <__mcmp> 80144ac: 2800 cmp r0, #0 80144ae: db25 blt.n 80144fc 80144b0: 4629 mov r1, r5 80144b2: 2000 movs r0, #0 80144b4: f858 2b04 ldr.w r2, [r8], #4 80144b8: f8d1 c000 ldr.w ip, [r1] 80144bc: fa1f fe82 uxth.w lr, r2 80144c0: fa1f f38c uxth.w r3, ip 80144c4: eba3 030e sub.w r3, r3, lr 80144c8: 4403 add r3, r0 80144ca: 0c12 lsrs r2, r2, #16 80144cc: ebc2 4223 rsb r2, r2, r3, asr #16 80144d0: eb02 421c add.w r2, r2, ip, lsr #16 80144d4: b29b uxth r3, r3 80144d6: ea43 4302 orr.w r3, r3, r2, lsl #16 80144da: 45c1 cmp r9, r8 80144dc: ea4f 4022 mov.w r0, r2, asr #16 80144e0: f841 3b04 str.w r3, [r1], #4 80144e4: d2e6 bcs.n 80144b4 80144e6: f855 2024 ldr.w r2, [r5, r4, lsl #2] 80144ea: eb05 0384 add.w r3, r5, r4, lsl #2 80144ee: b922 cbnz r2, 80144fa 80144f0: 3b04 subs r3, #4 80144f2: 429d cmp r5, r3 80144f4: 461a mov r2, r3 80144f6: d30b bcc.n 8014510 80144f8: 613c str r4, [r7, #16] 80144fa: 3601 adds r6, #1 80144fc: 4630 mov r0, r6 80144fe: b003 add sp, #12 8014500: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8014504: 6812 ldr r2, [r2, #0] 8014506: 3b04 subs r3, #4 8014508: 2a00 cmp r2, #0 801450a: d1cb bne.n 80144a4 801450c: 3c01 subs r4, #1 801450e: e7c6 b.n 801449e 8014510: 6812 ldr r2, [r2, #0] 8014512: 3b04 subs r3, #4 8014514: 2a00 cmp r2, #0 8014516: d1ef bne.n 80144f8 8014518: 3c01 subs r4, #1 801451a: e7ea b.n 80144f2 801451c: 2000 movs r0, #0 801451e: e7ee b.n 80144fe 08014520 <_dtoa_r>: 8014520: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8014524: 4614 mov r4, r2 8014526: 461d mov r5, r3 8014528: 69c7 ldr r7, [r0, #28] 801452a: b097 sub sp, #92 @ 0x5c 801452c: 4681 mov r9, r0 801452e: e9cd 4506 strd r4, r5, [sp, #24] 8014532: 9e23 ldr r6, [sp, #140] @ 0x8c 8014534: b97f cbnz r7, 8014556 <_dtoa_r+0x36> 8014536: 2010 movs r0, #16 8014538: f001 f85e bl 80155f8 801453c: 4602 mov r2, r0 801453e: f8c9 001c str.w r0, [r9, #28] 8014542: b920 cbnz r0, 801454e <_dtoa_r+0x2e> 8014544: 21ef movs r1, #239 @ 0xef 8014546: 4bac ldr r3, [pc, #688] @ (80147f8 <_dtoa_r+0x2d8>) 8014548: 48ac ldr r0, [pc, #688] @ (80147fc <_dtoa_r+0x2dc>) 801454a: f7ff ff43 bl 80143d4 <__assert_func> 801454e: e9c0 7701 strd r7, r7, [r0, #4] 8014552: 6007 str r7, [r0, #0] 8014554: 60c7 str r7, [r0, #12] 8014556: f8d9 301c ldr.w r3, [r9, #28] 801455a: 6819 ldr r1, [r3, #0] 801455c: b159 cbz r1, 8014576 <_dtoa_r+0x56> 801455e: 685a ldr r2, [r3, #4] 8014560: 2301 movs r3, #1 8014562: 4093 lsls r3, r2 8014564: 604a str r2, [r1, #4] 8014566: 608b str r3, [r1, #8] 8014568: 4648 mov r0, r9 801456a: f001 f9e3 bl 8015934 <_Bfree> 801456e: 2200 movs r2, #0 8014570: f8d9 301c ldr.w r3, [r9, #28] 8014574: 601a str r2, [r3, #0] 8014576: 1e2b subs r3, r5, #0 8014578: bfaf iteee ge 801457a: 2300 movge r3, #0 801457c: 2201 movlt r2, #1 801457e: f023 4300 biclt.w r3, r3, #2147483648 @ 0x80000000 8014582: 9307 strlt r3, [sp, #28] 8014584: bfa8 it ge 8014586: 6033 strge r3, [r6, #0] 8014588: f8dd 801c ldr.w r8, [sp, #28] 801458c: 4b9c ldr r3, [pc, #624] @ (8014800 <_dtoa_r+0x2e0>) 801458e: bfb8 it lt 8014590: 6032 strlt r2, [r6, #0] 8014592: ea33 0308 bics.w r3, r3, r8 8014596: d112 bne.n 80145be <_dtoa_r+0x9e> 8014598: f242 730f movw r3, #9999 @ 0x270f 801459c: 9a22 ldr r2, [sp, #136] @ 0x88 801459e: 6013 str r3, [r2, #0] 80145a0: f3c8 0313 ubfx r3, r8, #0, #20 80145a4: 4323 orrs r3, r4 80145a6: f000 855e beq.w 8015066 <_dtoa_r+0xb46> 80145aa: 9b24 ldr r3, [sp, #144] @ 0x90 80145ac: f8df a254 ldr.w sl, [pc, #596] @ 8014804 <_dtoa_r+0x2e4> 80145b0: 2b00 cmp r3, #0 80145b2: f000 8560 beq.w 8015076 <_dtoa_r+0xb56> 80145b6: f10a 0303 add.w r3, sl, #3 80145ba: f000 bd5a b.w 8015072 <_dtoa_r+0xb52> 80145be: e9dd 2306 ldrd r2, r3, [sp, #24] 80145c2: e9cd 230c strd r2, r3, [sp, #48] @ 0x30 80145c6: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 80145ca: 2200 movs r2, #0 80145cc: 2300 movs r3, #0 80145ce: f7f4 fa57 bl 8008a80 <__aeabi_dcmpeq> 80145d2: 4607 mov r7, r0 80145d4: b158 cbz r0, 80145ee <_dtoa_r+0xce> 80145d6: 2301 movs r3, #1 80145d8: 9a22 ldr r2, [sp, #136] @ 0x88 80145da: 6013 str r3, [r2, #0] 80145dc: 9b24 ldr r3, [sp, #144] @ 0x90 80145de: b113 cbz r3, 80145e6 <_dtoa_r+0xc6> 80145e0: 4b89 ldr r3, [pc, #548] @ (8014808 <_dtoa_r+0x2e8>) 80145e2: 9a24 ldr r2, [sp, #144] @ 0x90 80145e4: 6013 str r3, [r2, #0] 80145e6: f8df a224 ldr.w sl, [pc, #548] @ 801480c <_dtoa_r+0x2ec> 80145ea: f000 bd44 b.w 8015076 <_dtoa_r+0xb56> 80145ee: ab14 add r3, sp, #80 @ 0x50 80145f0: 9301 str r3, [sp, #4] 80145f2: ab15 add r3, sp, #84 @ 0x54 80145f4: 9300 str r3, [sp, #0] 80145f6: 4648 mov r0, r9 80145f8: e9dd 230c ldrd r2, r3, [sp, #48] @ 0x30 80145fc: f001 fc7c bl 8015ef8 <__d2b> 8014600: f3c8 560a ubfx r6, r8, #20, #11 8014604: 9003 str r0, [sp, #12] 8014606: 2e00 cmp r6, #0 8014608: d078 beq.n 80146fc <_dtoa_r+0x1dc> 801460a: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 801460e: 9b0d ldr r3, [sp, #52] @ 0x34 8014610: f2a6 36ff subw r6, r6, #1023 @ 0x3ff 8014614: f3c3 0313 ubfx r3, r3, #0, #20 8014618: f043 537f orr.w r3, r3, #1069547520 @ 0x3fc00000 801461c: f443 1340 orr.w r3, r3, #3145728 @ 0x300000 8014620: 9712 str r7, [sp, #72] @ 0x48 8014622: 4619 mov r1, r3 8014624: 2200 movs r2, #0 8014626: 4b7a ldr r3, [pc, #488] @ (8014810 <_dtoa_r+0x2f0>) 8014628: f7f3 fe0a bl 8008240 <__aeabi_dsub> 801462c: a36c add r3, pc, #432 @ (adr r3, 80147e0 <_dtoa_r+0x2c0>) 801462e: e9d3 2300 ldrd r2, r3, [r3] 8014632: f7f3 ffbd bl 80085b0 <__aeabi_dmul> 8014636: a36c add r3, pc, #432 @ (adr r3, 80147e8 <_dtoa_r+0x2c8>) 8014638: e9d3 2300 ldrd r2, r3, [r3] 801463c: f7f3 fe02 bl 8008244 <__adddf3> 8014640: 4604 mov r4, r0 8014642: 4630 mov r0, r6 8014644: 460d mov r5, r1 8014646: f7f3 ff49 bl 80084dc <__aeabi_i2d> 801464a: a369 add r3, pc, #420 @ (adr r3, 80147f0 <_dtoa_r+0x2d0>) 801464c: e9d3 2300 ldrd r2, r3, [r3] 8014650: f7f3 ffae bl 80085b0 <__aeabi_dmul> 8014654: 4602 mov r2, r0 8014656: 460b mov r3, r1 8014658: 4620 mov r0, r4 801465a: 4629 mov r1, r5 801465c: f7f3 fdf2 bl 8008244 <__adddf3> 8014660: 4604 mov r4, r0 8014662: 460d mov r5, r1 8014664: f7f4 fa54 bl 8008b10 <__aeabi_d2iz> 8014668: 2200 movs r2, #0 801466a: 4607 mov r7, r0 801466c: 2300 movs r3, #0 801466e: 4620 mov r0, r4 8014670: 4629 mov r1, r5 8014672: f7f4 fa0f bl 8008a94 <__aeabi_dcmplt> 8014676: b140 cbz r0, 801468a <_dtoa_r+0x16a> 8014678: 4638 mov r0, r7 801467a: f7f3 ff2f bl 80084dc <__aeabi_i2d> 801467e: 4622 mov r2, r4 8014680: 462b mov r3, r5 8014682: f7f4 f9fd bl 8008a80 <__aeabi_dcmpeq> 8014686: b900 cbnz r0, 801468a <_dtoa_r+0x16a> 8014688: 3f01 subs r7, #1 801468a: 2f16 cmp r7, #22 801468c: d854 bhi.n 8014738 <_dtoa_r+0x218> 801468e: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 8014692: 4b60 ldr r3, [pc, #384] @ (8014814 <_dtoa_r+0x2f4>) 8014694: eb03 03c7 add.w r3, r3, r7, lsl #3 8014698: e9d3 2300 ldrd r2, r3, [r3] 801469c: f7f4 f9fa bl 8008a94 <__aeabi_dcmplt> 80146a0: 2800 cmp r0, #0 80146a2: d04b beq.n 801473c <_dtoa_r+0x21c> 80146a4: 2300 movs r3, #0 80146a6: 3f01 subs r7, #1 80146a8: 930f str r3, [sp, #60] @ 0x3c 80146aa: 9b14 ldr r3, [sp, #80] @ 0x50 80146ac: 1b9b subs r3, r3, r6 80146ae: 1e5a subs r2, r3, #1 80146b0: bf49 itett mi 80146b2: f1c3 0301 rsbmi r3, r3, #1 80146b6: 2300 movpl r3, #0 80146b8: 9304 strmi r3, [sp, #16] 80146ba: 2300 movmi r3, #0 80146bc: 9209 str r2, [sp, #36] @ 0x24 80146be: bf54 ite pl 80146c0: 9304 strpl r3, [sp, #16] 80146c2: 9309 strmi r3, [sp, #36] @ 0x24 80146c4: 2f00 cmp r7, #0 80146c6: db3b blt.n 8014740 <_dtoa_r+0x220> 80146c8: 9b09 ldr r3, [sp, #36] @ 0x24 80146ca: 970e str r7, [sp, #56] @ 0x38 80146cc: 443b add r3, r7 80146ce: 9309 str r3, [sp, #36] @ 0x24 80146d0: 2300 movs r3, #0 80146d2: 930a str r3, [sp, #40] @ 0x28 80146d4: 9b20 ldr r3, [sp, #128] @ 0x80 80146d6: 2b09 cmp r3, #9 80146d8: d865 bhi.n 80147a6 <_dtoa_r+0x286> 80146da: 2b05 cmp r3, #5 80146dc: bfc4 itt gt 80146de: 3b04 subgt r3, #4 80146e0: 9320 strgt r3, [sp, #128] @ 0x80 80146e2: 9b20 ldr r3, [sp, #128] @ 0x80 80146e4: bfc8 it gt 80146e6: 2400 movgt r4, #0 80146e8: f1a3 0302 sub.w r3, r3, #2 80146ec: bfd8 it le 80146ee: 2401 movle r4, #1 80146f0: 2b03 cmp r3, #3 80146f2: d864 bhi.n 80147be <_dtoa_r+0x29e> 80146f4: e8df f003 tbb [pc, r3] 80146f8: 2c385553 .word 0x2c385553 80146fc: e9dd 6314 ldrd r6, r3, [sp, #80] @ 0x50 8014700: 441e add r6, r3 8014702: f206 4332 addw r3, r6, #1074 @ 0x432 8014706: 2b20 cmp r3, #32 8014708: bfc1 itttt gt 801470a: f1c3 0340 rsbgt r3, r3, #64 @ 0x40 801470e: fa08 f803 lslgt.w r8, r8, r3 8014712: f206 4312 addwgt r3, r6, #1042 @ 0x412 8014716: fa24 f303 lsrgt.w r3, r4, r3 801471a: bfd6 itet le 801471c: f1c3 0320 rsble r3, r3, #32 8014720: ea48 0003 orrgt.w r0, r8, r3 8014724: fa04 f003 lslle.w r0, r4, r3 8014728: f7f3 fec8 bl 80084bc <__aeabi_ui2d> 801472c: 2201 movs r2, #1 801472e: f1a1 73f8 sub.w r3, r1, #32505856 @ 0x1f00000 8014732: 3e01 subs r6, #1 8014734: 9212 str r2, [sp, #72] @ 0x48 8014736: e774 b.n 8014622 <_dtoa_r+0x102> 8014738: 2301 movs r3, #1 801473a: e7b5 b.n 80146a8 <_dtoa_r+0x188> 801473c: 900f str r0, [sp, #60] @ 0x3c 801473e: e7b4 b.n 80146aa <_dtoa_r+0x18a> 8014740: 9b04 ldr r3, [sp, #16] 8014742: 1bdb subs r3, r3, r7 8014744: 9304 str r3, [sp, #16] 8014746: 427b negs r3, r7 8014748: 930a str r3, [sp, #40] @ 0x28 801474a: 2300 movs r3, #0 801474c: 930e str r3, [sp, #56] @ 0x38 801474e: e7c1 b.n 80146d4 <_dtoa_r+0x1b4> 8014750: 2301 movs r3, #1 8014752: 930b str r3, [sp, #44] @ 0x2c 8014754: 9b21 ldr r3, [sp, #132] @ 0x84 8014756: eb07 0b03 add.w fp, r7, r3 801475a: f10b 0301 add.w r3, fp, #1 801475e: 2b01 cmp r3, #1 8014760: 9308 str r3, [sp, #32] 8014762: bfb8 it lt 8014764: 2301 movlt r3, #1 8014766: e006 b.n 8014776 <_dtoa_r+0x256> 8014768: 2301 movs r3, #1 801476a: 930b str r3, [sp, #44] @ 0x2c 801476c: 9b21 ldr r3, [sp, #132] @ 0x84 801476e: 2b00 cmp r3, #0 8014770: dd28 ble.n 80147c4 <_dtoa_r+0x2a4> 8014772: 469b mov fp, r3 8014774: 9308 str r3, [sp, #32] 8014776: 2100 movs r1, #0 8014778: 2204 movs r2, #4 801477a: f8d9 001c ldr.w r0, [r9, #28] 801477e: f102 0514 add.w r5, r2, #20 8014782: 429d cmp r5, r3 8014784: d926 bls.n 80147d4 <_dtoa_r+0x2b4> 8014786: 6041 str r1, [r0, #4] 8014788: 4648 mov r0, r9 801478a: f001 f893 bl 80158b4 <_Balloc> 801478e: 4682 mov sl, r0 8014790: 2800 cmp r0, #0 8014792: d143 bne.n 801481c <_dtoa_r+0x2fc> 8014794: 4602 mov r2, r0 8014796: f240 11af movw r1, #431 @ 0x1af 801479a: 4b1f ldr r3, [pc, #124] @ (8014818 <_dtoa_r+0x2f8>) 801479c: e6d4 b.n 8014548 <_dtoa_r+0x28> 801479e: 2300 movs r3, #0 80147a0: e7e3 b.n 801476a <_dtoa_r+0x24a> 80147a2: 2300 movs r3, #0 80147a4: e7d5 b.n 8014752 <_dtoa_r+0x232> 80147a6: 2401 movs r4, #1 80147a8: 2300 movs r3, #0 80147aa: 940b str r4, [sp, #44] @ 0x2c 80147ac: 9320 str r3, [sp, #128] @ 0x80 80147ae: f04f 3bff mov.w fp, #4294967295 @ 0xffffffff 80147b2: 2200 movs r2, #0 80147b4: 2312 movs r3, #18 80147b6: f8cd b020 str.w fp, [sp, #32] 80147ba: 9221 str r2, [sp, #132] @ 0x84 80147bc: e7db b.n 8014776 <_dtoa_r+0x256> 80147be: 2301 movs r3, #1 80147c0: 930b str r3, [sp, #44] @ 0x2c 80147c2: e7f4 b.n 80147ae <_dtoa_r+0x28e> 80147c4: f04f 0b01 mov.w fp, #1 80147c8: 465b mov r3, fp 80147ca: f8cd b020 str.w fp, [sp, #32] 80147ce: f8cd b084 str.w fp, [sp, #132] @ 0x84 80147d2: e7d0 b.n 8014776 <_dtoa_r+0x256> 80147d4: 3101 adds r1, #1 80147d6: 0052 lsls r2, r2, #1 80147d8: e7d1 b.n 801477e <_dtoa_r+0x25e> 80147da: bf00 nop 80147dc: f3af 8000 nop.w 80147e0: 636f4361 .word 0x636f4361 80147e4: 3fd287a7 .word 0x3fd287a7 80147e8: 8b60c8b3 .word 0x8b60c8b3 80147ec: 3fc68a28 .word 0x3fc68a28 80147f0: 509f79fb .word 0x509f79fb 80147f4: 3fd34413 .word 0x3fd34413 80147f8: 08016da4 .word 0x08016da4 80147fc: 08016e5c .word 0x08016e5c 8014800: 7ff00000 .word 0x7ff00000 8014804: 08016e58 .word 0x08016e58 8014808: 08016d81 .word 0x08016d81 801480c: 08016d80 .word 0x08016d80 8014810: 3ff80000 .word 0x3ff80000 8014814: 08016f70 .word 0x08016f70 8014818: 08016eb4 .word 0x08016eb4 801481c: f8d9 301c ldr.w r3, [r9, #28] 8014820: 6018 str r0, [r3, #0] 8014822: 9b08 ldr r3, [sp, #32] 8014824: 2b0e cmp r3, #14 8014826: f200 80a1 bhi.w 801496c <_dtoa_r+0x44c> 801482a: 2c00 cmp r4, #0 801482c: f000 809e beq.w 801496c <_dtoa_r+0x44c> 8014830: 2f00 cmp r7, #0 8014832: dd33 ble.n 801489c <_dtoa_r+0x37c> 8014834: 4b9c ldr r3, [pc, #624] @ (8014aa8 <_dtoa_r+0x588>) 8014836: f007 020f and.w r2, r7, #15 801483a: eb03 03c2 add.w r3, r3, r2, lsl #3 801483e: 05f8 lsls r0, r7, #23 8014840: e9d3 3400 ldrd r3, r4, [r3] 8014844: e9cd 3410 strd r3, r4, [sp, #64] @ 0x40 8014848: ea4f 1427 mov.w r4, r7, asr #4 801484c: d516 bpl.n 801487c <_dtoa_r+0x35c> 801484e: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 8014852: 4b96 ldr r3, [pc, #600] @ (8014aac <_dtoa_r+0x58c>) 8014854: 2603 movs r6, #3 8014856: e9d3 2308 ldrd r2, r3, [r3, #32] 801485a: f7f3 ffd3 bl 8008804 <__aeabi_ddiv> 801485e: e9cd 0106 strd r0, r1, [sp, #24] 8014862: f004 040f and.w r4, r4, #15 8014866: 4d91 ldr r5, [pc, #580] @ (8014aac <_dtoa_r+0x58c>) 8014868: b954 cbnz r4, 8014880 <_dtoa_r+0x360> 801486a: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 801486e: e9dd 0106 ldrd r0, r1, [sp, #24] 8014872: f7f3 ffc7 bl 8008804 <__aeabi_ddiv> 8014876: e9cd 0106 strd r0, r1, [sp, #24] 801487a: e028 b.n 80148ce <_dtoa_r+0x3ae> 801487c: 2602 movs r6, #2 801487e: e7f2 b.n 8014866 <_dtoa_r+0x346> 8014880: 07e1 lsls r1, r4, #31 8014882: d508 bpl.n 8014896 <_dtoa_r+0x376> 8014884: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8014888: e9d5 2300 ldrd r2, r3, [r5] 801488c: f7f3 fe90 bl 80085b0 <__aeabi_dmul> 8014890: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8014894: 3601 adds r6, #1 8014896: 1064 asrs r4, r4, #1 8014898: 3508 adds r5, #8 801489a: e7e5 b.n 8014868 <_dtoa_r+0x348> 801489c: f000 80af beq.w 80149fe <_dtoa_r+0x4de> 80148a0: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 80148a4: 427c negs r4, r7 80148a6: 4b80 ldr r3, [pc, #512] @ (8014aa8 <_dtoa_r+0x588>) 80148a8: f004 020f and.w r2, r4, #15 80148ac: eb03 03c2 add.w r3, r3, r2, lsl #3 80148b0: e9d3 2300 ldrd r2, r3, [r3] 80148b4: f7f3 fe7c bl 80085b0 <__aeabi_dmul> 80148b8: 2602 movs r6, #2 80148ba: 2300 movs r3, #0 80148bc: e9cd 0106 strd r0, r1, [sp, #24] 80148c0: 4d7a ldr r5, [pc, #488] @ (8014aac <_dtoa_r+0x58c>) 80148c2: 1124 asrs r4, r4, #4 80148c4: 2c00 cmp r4, #0 80148c6: f040 808f bne.w 80149e8 <_dtoa_r+0x4c8> 80148ca: 2b00 cmp r3, #0 80148cc: d1d3 bne.n 8014876 <_dtoa_r+0x356> 80148ce: e9dd 4506 ldrd r4, r5, [sp, #24] 80148d2: 9b0f ldr r3, [sp, #60] @ 0x3c 80148d4: 2b00 cmp r3, #0 80148d6: f000 8094 beq.w 8014a02 <_dtoa_r+0x4e2> 80148da: 2200 movs r2, #0 80148dc: 4620 mov r0, r4 80148de: 4629 mov r1, r5 80148e0: 4b73 ldr r3, [pc, #460] @ (8014ab0 <_dtoa_r+0x590>) 80148e2: f7f4 f8d7 bl 8008a94 <__aeabi_dcmplt> 80148e6: 2800 cmp r0, #0 80148e8: f000 808b beq.w 8014a02 <_dtoa_r+0x4e2> 80148ec: 9b08 ldr r3, [sp, #32] 80148ee: 2b00 cmp r3, #0 80148f0: f000 8087 beq.w 8014a02 <_dtoa_r+0x4e2> 80148f4: f1bb 0f00 cmp.w fp, #0 80148f8: dd34 ble.n 8014964 <_dtoa_r+0x444> 80148fa: 4620 mov r0, r4 80148fc: 2200 movs r2, #0 80148fe: 4629 mov r1, r5 8014900: 4b6c ldr r3, [pc, #432] @ (8014ab4 <_dtoa_r+0x594>) 8014902: f7f3 fe55 bl 80085b0 <__aeabi_dmul> 8014906: 465c mov r4, fp 8014908: e9cd 0106 strd r0, r1, [sp, #24] 801490c: f107 38ff add.w r8, r7, #4294967295 @ 0xffffffff 8014910: 3601 adds r6, #1 8014912: 4630 mov r0, r6 8014914: f7f3 fde2 bl 80084dc <__aeabi_i2d> 8014918: e9dd 2306 ldrd r2, r3, [sp, #24] 801491c: f7f3 fe48 bl 80085b0 <__aeabi_dmul> 8014920: 2200 movs r2, #0 8014922: 4b65 ldr r3, [pc, #404] @ (8014ab8 <_dtoa_r+0x598>) 8014924: f7f3 fc8e bl 8008244 <__adddf3> 8014928: 4605 mov r5, r0 801492a: f1a1 7650 sub.w r6, r1, #54525952 @ 0x3400000 801492e: 2c00 cmp r4, #0 8014930: d16a bne.n 8014a08 <_dtoa_r+0x4e8> 8014932: e9dd 0106 ldrd r0, r1, [sp, #24] 8014936: 2200 movs r2, #0 8014938: 4b60 ldr r3, [pc, #384] @ (8014abc <_dtoa_r+0x59c>) 801493a: f7f3 fc81 bl 8008240 <__aeabi_dsub> 801493e: 4602 mov r2, r0 8014940: 460b mov r3, r1 8014942: e9cd 2306 strd r2, r3, [sp, #24] 8014946: 462a mov r2, r5 8014948: 4633 mov r3, r6 801494a: f7f4 f8c1 bl 8008ad0 <__aeabi_dcmpgt> 801494e: 2800 cmp r0, #0 8014950: f040 8298 bne.w 8014e84 <_dtoa_r+0x964> 8014954: e9dd 0106 ldrd r0, r1, [sp, #24] 8014958: 462a mov r2, r5 801495a: f106 4300 add.w r3, r6, #2147483648 @ 0x80000000 801495e: f7f4 f899 bl 8008a94 <__aeabi_dcmplt> 8014962: bb38 cbnz r0, 80149b4 <_dtoa_r+0x494> 8014964: e9dd 340c ldrd r3, r4, [sp, #48] @ 0x30 8014968: e9cd 3406 strd r3, r4, [sp, #24] 801496c: 9b15 ldr r3, [sp, #84] @ 0x54 801496e: 2b00 cmp r3, #0 8014970: f2c0 8157 blt.w 8014c22 <_dtoa_r+0x702> 8014974: 2f0e cmp r7, #14 8014976: f300 8154 bgt.w 8014c22 <_dtoa_r+0x702> 801497a: 4b4b ldr r3, [pc, #300] @ (8014aa8 <_dtoa_r+0x588>) 801497c: eb03 03c7 add.w r3, r3, r7, lsl #3 8014980: e9d3 3400 ldrd r3, r4, [r3] 8014984: e9cd 3404 strd r3, r4, [sp, #16] 8014988: 9b21 ldr r3, [sp, #132] @ 0x84 801498a: 2b00 cmp r3, #0 801498c: f280 80e5 bge.w 8014b5a <_dtoa_r+0x63a> 8014990: 9b08 ldr r3, [sp, #32] 8014992: 2b00 cmp r3, #0 8014994: f300 80e1 bgt.w 8014b5a <_dtoa_r+0x63a> 8014998: d10c bne.n 80149b4 <_dtoa_r+0x494> 801499a: e9dd 0104 ldrd r0, r1, [sp, #16] 801499e: 2200 movs r2, #0 80149a0: 4b46 ldr r3, [pc, #280] @ (8014abc <_dtoa_r+0x59c>) 80149a2: f7f3 fe05 bl 80085b0 <__aeabi_dmul> 80149a6: e9dd 2306 ldrd r2, r3, [sp, #24] 80149aa: f7f4 f887 bl 8008abc <__aeabi_dcmpge> 80149ae: 2800 cmp r0, #0 80149b0: f000 8266 beq.w 8014e80 <_dtoa_r+0x960> 80149b4: 2400 movs r4, #0 80149b6: 4625 mov r5, r4 80149b8: 9b21 ldr r3, [sp, #132] @ 0x84 80149ba: 4656 mov r6, sl 80149bc: ea6f 0803 mvn.w r8, r3 80149c0: 2700 movs r7, #0 80149c2: 4621 mov r1, r4 80149c4: 4648 mov r0, r9 80149c6: f000 ffb5 bl 8015934 <_Bfree> 80149ca: 2d00 cmp r5, #0 80149cc: f000 80bd beq.w 8014b4a <_dtoa_r+0x62a> 80149d0: b12f cbz r7, 80149de <_dtoa_r+0x4be> 80149d2: 42af cmp r7, r5 80149d4: d003 beq.n 80149de <_dtoa_r+0x4be> 80149d6: 4639 mov r1, r7 80149d8: 4648 mov r0, r9 80149da: f000 ffab bl 8015934 <_Bfree> 80149de: 4629 mov r1, r5 80149e0: 4648 mov r0, r9 80149e2: f000 ffa7 bl 8015934 <_Bfree> 80149e6: e0b0 b.n 8014b4a <_dtoa_r+0x62a> 80149e8: 07e2 lsls r2, r4, #31 80149ea: d505 bpl.n 80149f8 <_dtoa_r+0x4d8> 80149ec: e9d5 2300 ldrd r2, r3, [r5] 80149f0: f7f3 fdde bl 80085b0 <__aeabi_dmul> 80149f4: 2301 movs r3, #1 80149f6: 3601 adds r6, #1 80149f8: 1064 asrs r4, r4, #1 80149fa: 3508 adds r5, #8 80149fc: e762 b.n 80148c4 <_dtoa_r+0x3a4> 80149fe: 2602 movs r6, #2 8014a00: e765 b.n 80148ce <_dtoa_r+0x3ae> 8014a02: 46b8 mov r8, r7 8014a04: 9c08 ldr r4, [sp, #32] 8014a06: e784 b.n 8014912 <_dtoa_r+0x3f2> 8014a08: 4b27 ldr r3, [pc, #156] @ (8014aa8 <_dtoa_r+0x588>) 8014a0a: 990b ldr r1, [sp, #44] @ 0x2c 8014a0c: eb03 03c4 add.w r3, r3, r4, lsl #3 8014a10: e953 2302 ldrd r2, r3, [r3, #-8] 8014a14: 4454 add r4, sl 8014a16: 2900 cmp r1, #0 8014a18: d054 beq.n 8014ac4 <_dtoa_r+0x5a4> 8014a1a: 2000 movs r0, #0 8014a1c: 4928 ldr r1, [pc, #160] @ (8014ac0 <_dtoa_r+0x5a0>) 8014a1e: f7f3 fef1 bl 8008804 <__aeabi_ddiv> 8014a22: 4633 mov r3, r6 8014a24: 462a mov r2, r5 8014a26: f7f3 fc0b bl 8008240 <__aeabi_dsub> 8014a2a: 4656 mov r6, sl 8014a2c: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8014a30: e9dd 0106 ldrd r0, r1, [sp, #24] 8014a34: f7f4 f86c bl 8008b10 <__aeabi_d2iz> 8014a38: 4605 mov r5, r0 8014a3a: f7f3 fd4f bl 80084dc <__aeabi_i2d> 8014a3e: 4602 mov r2, r0 8014a40: 460b mov r3, r1 8014a42: e9dd 0106 ldrd r0, r1, [sp, #24] 8014a46: f7f3 fbfb bl 8008240 <__aeabi_dsub> 8014a4a: 4602 mov r2, r0 8014a4c: 460b mov r3, r1 8014a4e: 3530 adds r5, #48 @ 0x30 8014a50: e9cd 2306 strd r2, r3, [sp, #24] 8014a54: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014a58: f806 5b01 strb.w r5, [r6], #1 8014a5c: f7f4 f81a bl 8008a94 <__aeabi_dcmplt> 8014a60: 2800 cmp r0, #0 8014a62: d172 bne.n 8014b4a <_dtoa_r+0x62a> 8014a64: e9dd 2306 ldrd r2, r3, [sp, #24] 8014a68: 2000 movs r0, #0 8014a6a: 4911 ldr r1, [pc, #68] @ (8014ab0 <_dtoa_r+0x590>) 8014a6c: f7f3 fbe8 bl 8008240 <__aeabi_dsub> 8014a70: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014a74: f7f4 f80e bl 8008a94 <__aeabi_dcmplt> 8014a78: 2800 cmp r0, #0 8014a7a: f040 80b4 bne.w 8014be6 <_dtoa_r+0x6c6> 8014a7e: 42a6 cmp r6, r4 8014a80: f43f af70 beq.w 8014964 <_dtoa_r+0x444> 8014a84: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8014a88: 2200 movs r2, #0 8014a8a: 4b0a ldr r3, [pc, #40] @ (8014ab4 <_dtoa_r+0x594>) 8014a8c: f7f3 fd90 bl 80085b0 <__aeabi_dmul> 8014a90: 2200 movs r2, #0 8014a92: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8014a96: e9dd 0106 ldrd r0, r1, [sp, #24] 8014a9a: 4b06 ldr r3, [pc, #24] @ (8014ab4 <_dtoa_r+0x594>) 8014a9c: f7f3 fd88 bl 80085b0 <__aeabi_dmul> 8014aa0: e9cd 0106 strd r0, r1, [sp, #24] 8014aa4: e7c4 b.n 8014a30 <_dtoa_r+0x510> 8014aa6: bf00 nop 8014aa8: 08016f70 .word 0x08016f70 8014aac: 08016f48 .word 0x08016f48 8014ab0: 3ff00000 .word 0x3ff00000 8014ab4: 40240000 .word 0x40240000 8014ab8: 401c0000 .word 0x401c0000 8014abc: 40140000 .word 0x40140000 8014ac0: 3fe00000 .word 0x3fe00000 8014ac4: 4631 mov r1, r6 8014ac6: 4628 mov r0, r5 8014ac8: f7f3 fd72 bl 80085b0 <__aeabi_dmul> 8014acc: 4656 mov r6, sl 8014ace: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8014ad2: 9413 str r4, [sp, #76] @ 0x4c 8014ad4: e9dd 0106 ldrd r0, r1, [sp, #24] 8014ad8: f7f4 f81a bl 8008b10 <__aeabi_d2iz> 8014adc: 4605 mov r5, r0 8014ade: f7f3 fcfd bl 80084dc <__aeabi_i2d> 8014ae2: 4602 mov r2, r0 8014ae4: 460b mov r3, r1 8014ae6: e9dd 0106 ldrd r0, r1, [sp, #24] 8014aea: f7f3 fba9 bl 8008240 <__aeabi_dsub> 8014aee: 4602 mov r2, r0 8014af0: 460b mov r3, r1 8014af2: 3530 adds r5, #48 @ 0x30 8014af4: f806 5b01 strb.w r5, [r6], #1 8014af8: 42a6 cmp r6, r4 8014afa: e9cd 2306 strd r2, r3, [sp, #24] 8014afe: f04f 0200 mov.w r2, #0 8014b02: d124 bne.n 8014b4e <_dtoa_r+0x62e> 8014b04: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8014b08: 4bae ldr r3, [pc, #696] @ (8014dc4 <_dtoa_r+0x8a4>) 8014b0a: f7f3 fb9b bl 8008244 <__adddf3> 8014b0e: 4602 mov r2, r0 8014b10: 460b mov r3, r1 8014b12: e9dd 0106 ldrd r0, r1, [sp, #24] 8014b16: f7f3 ffdb bl 8008ad0 <__aeabi_dcmpgt> 8014b1a: 2800 cmp r0, #0 8014b1c: d163 bne.n 8014be6 <_dtoa_r+0x6c6> 8014b1e: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014b22: 2000 movs r0, #0 8014b24: 49a7 ldr r1, [pc, #668] @ (8014dc4 <_dtoa_r+0x8a4>) 8014b26: f7f3 fb8b bl 8008240 <__aeabi_dsub> 8014b2a: 4602 mov r2, r0 8014b2c: 460b mov r3, r1 8014b2e: e9dd 0106 ldrd r0, r1, [sp, #24] 8014b32: f7f3 ffaf bl 8008a94 <__aeabi_dcmplt> 8014b36: 2800 cmp r0, #0 8014b38: f43f af14 beq.w 8014964 <_dtoa_r+0x444> 8014b3c: 9e13 ldr r6, [sp, #76] @ 0x4c 8014b3e: 1e73 subs r3, r6, #1 8014b40: 9313 str r3, [sp, #76] @ 0x4c 8014b42: f816 3c01 ldrb.w r3, [r6, #-1] 8014b46: 2b30 cmp r3, #48 @ 0x30 8014b48: d0f8 beq.n 8014b3c <_dtoa_r+0x61c> 8014b4a: 4647 mov r7, r8 8014b4c: e03b b.n 8014bc6 <_dtoa_r+0x6a6> 8014b4e: 4b9e ldr r3, [pc, #632] @ (8014dc8 <_dtoa_r+0x8a8>) 8014b50: f7f3 fd2e bl 80085b0 <__aeabi_dmul> 8014b54: e9cd 0106 strd r0, r1, [sp, #24] 8014b58: e7bc b.n 8014ad4 <_dtoa_r+0x5b4> 8014b5a: 4656 mov r6, sl 8014b5c: e9dd 4506 ldrd r4, r5, [sp, #24] 8014b60: e9dd 2304 ldrd r2, r3, [sp, #16] 8014b64: 4620 mov r0, r4 8014b66: 4629 mov r1, r5 8014b68: f7f3 fe4c bl 8008804 <__aeabi_ddiv> 8014b6c: f7f3 ffd0 bl 8008b10 <__aeabi_d2iz> 8014b70: 4680 mov r8, r0 8014b72: f7f3 fcb3 bl 80084dc <__aeabi_i2d> 8014b76: e9dd 2304 ldrd r2, r3, [sp, #16] 8014b7a: f7f3 fd19 bl 80085b0 <__aeabi_dmul> 8014b7e: 4602 mov r2, r0 8014b80: 460b mov r3, r1 8014b82: 4620 mov r0, r4 8014b84: 4629 mov r1, r5 8014b86: f7f3 fb5b bl 8008240 <__aeabi_dsub> 8014b8a: f108 0430 add.w r4, r8, #48 @ 0x30 8014b8e: 9d08 ldr r5, [sp, #32] 8014b90: f806 4b01 strb.w r4, [r6], #1 8014b94: eba6 040a sub.w r4, r6, sl 8014b98: 42a5 cmp r5, r4 8014b9a: 4602 mov r2, r0 8014b9c: 460b mov r3, r1 8014b9e: d133 bne.n 8014c08 <_dtoa_r+0x6e8> 8014ba0: f7f3 fb50 bl 8008244 <__adddf3> 8014ba4: e9dd 2304 ldrd r2, r3, [sp, #16] 8014ba8: 4604 mov r4, r0 8014baa: 460d mov r5, r1 8014bac: f7f3 ff90 bl 8008ad0 <__aeabi_dcmpgt> 8014bb0: b9c0 cbnz r0, 8014be4 <_dtoa_r+0x6c4> 8014bb2: e9dd 2304 ldrd r2, r3, [sp, #16] 8014bb6: 4620 mov r0, r4 8014bb8: 4629 mov r1, r5 8014bba: f7f3 ff61 bl 8008a80 <__aeabi_dcmpeq> 8014bbe: b110 cbz r0, 8014bc6 <_dtoa_r+0x6a6> 8014bc0: f018 0f01 tst.w r8, #1 8014bc4: d10e bne.n 8014be4 <_dtoa_r+0x6c4> 8014bc6: 4648 mov r0, r9 8014bc8: 9903 ldr r1, [sp, #12] 8014bca: f000 feb3 bl 8015934 <_Bfree> 8014bce: 2300 movs r3, #0 8014bd0: 7033 strb r3, [r6, #0] 8014bd2: 9b22 ldr r3, [sp, #136] @ 0x88 8014bd4: 3701 adds r7, #1 8014bd6: 601f str r7, [r3, #0] 8014bd8: 9b24 ldr r3, [sp, #144] @ 0x90 8014bda: 2b00 cmp r3, #0 8014bdc: f000 824b beq.w 8015076 <_dtoa_r+0xb56> 8014be0: 601e str r6, [r3, #0] 8014be2: e248 b.n 8015076 <_dtoa_r+0xb56> 8014be4: 46b8 mov r8, r7 8014be6: 4633 mov r3, r6 8014be8: 461e mov r6, r3 8014bea: f813 2d01 ldrb.w r2, [r3, #-1]! 8014bee: 2a39 cmp r2, #57 @ 0x39 8014bf0: d106 bne.n 8014c00 <_dtoa_r+0x6e0> 8014bf2: 459a cmp sl, r3 8014bf4: d1f8 bne.n 8014be8 <_dtoa_r+0x6c8> 8014bf6: 2230 movs r2, #48 @ 0x30 8014bf8: f108 0801 add.w r8, r8, #1 8014bfc: f88a 2000 strb.w r2, [sl] 8014c00: 781a ldrb r2, [r3, #0] 8014c02: 3201 adds r2, #1 8014c04: 701a strb r2, [r3, #0] 8014c06: e7a0 b.n 8014b4a <_dtoa_r+0x62a> 8014c08: 2200 movs r2, #0 8014c0a: 4b6f ldr r3, [pc, #444] @ (8014dc8 <_dtoa_r+0x8a8>) 8014c0c: f7f3 fcd0 bl 80085b0 <__aeabi_dmul> 8014c10: 2200 movs r2, #0 8014c12: 2300 movs r3, #0 8014c14: 4604 mov r4, r0 8014c16: 460d mov r5, r1 8014c18: f7f3 ff32 bl 8008a80 <__aeabi_dcmpeq> 8014c1c: 2800 cmp r0, #0 8014c1e: d09f beq.n 8014b60 <_dtoa_r+0x640> 8014c20: e7d1 b.n 8014bc6 <_dtoa_r+0x6a6> 8014c22: 9a0b ldr r2, [sp, #44] @ 0x2c 8014c24: 2a00 cmp r2, #0 8014c26: f000 80ea beq.w 8014dfe <_dtoa_r+0x8de> 8014c2a: 9a20 ldr r2, [sp, #128] @ 0x80 8014c2c: 2a01 cmp r2, #1 8014c2e: f300 80cd bgt.w 8014dcc <_dtoa_r+0x8ac> 8014c32: 9a12 ldr r2, [sp, #72] @ 0x48 8014c34: 2a00 cmp r2, #0 8014c36: f000 80c1 beq.w 8014dbc <_dtoa_r+0x89c> 8014c3a: f203 4333 addw r3, r3, #1075 @ 0x433 8014c3e: 9c0a ldr r4, [sp, #40] @ 0x28 8014c40: 9e04 ldr r6, [sp, #16] 8014c42: 9a04 ldr r2, [sp, #16] 8014c44: 2101 movs r1, #1 8014c46: 441a add r2, r3 8014c48: 9204 str r2, [sp, #16] 8014c4a: 9a09 ldr r2, [sp, #36] @ 0x24 8014c4c: 4648 mov r0, r9 8014c4e: 441a add r2, r3 8014c50: 9209 str r2, [sp, #36] @ 0x24 8014c52: f000 ff23 bl 8015a9c <__i2b> 8014c56: 4605 mov r5, r0 8014c58: b166 cbz r6, 8014c74 <_dtoa_r+0x754> 8014c5a: 9b09 ldr r3, [sp, #36] @ 0x24 8014c5c: 2b00 cmp r3, #0 8014c5e: dd09 ble.n 8014c74 <_dtoa_r+0x754> 8014c60: 42b3 cmp r3, r6 8014c62: bfa8 it ge 8014c64: 4633 movge r3, r6 8014c66: 9a04 ldr r2, [sp, #16] 8014c68: 1af6 subs r6, r6, r3 8014c6a: 1ad2 subs r2, r2, r3 8014c6c: 9204 str r2, [sp, #16] 8014c6e: 9a09 ldr r2, [sp, #36] @ 0x24 8014c70: 1ad3 subs r3, r2, r3 8014c72: 9309 str r3, [sp, #36] @ 0x24 8014c74: 9b0a ldr r3, [sp, #40] @ 0x28 8014c76: b30b cbz r3, 8014cbc <_dtoa_r+0x79c> 8014c78: 9b0b ldr r3, [sp, #44] @ 0x2c 8014c7a: 2b00 cmp r3, #0 8014c7c: f000 80c6 beq.w 8014e0c <_dtoa_r+0x8ec> 8014c80: 2c00 cmp r4, #0 8014c82: f000 80c0 beq.w 8014e06 <_dtoa_r+0x8e6> 8014c86: 4629 mov r1, r5 8014c88: 4622 mov r2, r4 8014c8a: 4648 mov r0, r9 8014c8c: f000 ffbe bl 8015c0c <__pow5mult> 8014c90: 9a03 ldr r2, [sp, #12] 8014c92: 4601 mov r1, r0 8014c94: 4605 mov r5, r0 8014c96: 4648 mov r0, r9 8014c98: f000 ff16 bl 8015ac8 <__multiply> 8014c9c: 9903 ldr r1, [sp, #12] 8014c9e: 4680 mov r8, r0 8014ca0: 4648 mov r0, r9 8014ca2: f000 fe47 bl 8015934 <_Bfree> 8014ca6: 9b0a ldr r3, [sp, #40] @ 0x28 8014ca8: 1b1b subs r3, r3, r4 8014caa: 930a str r3, [sp, #40] @ 0x28 8014cac: f000 80b1 beq.w 8014e12 <_dtoa_r+0x8f2> 8014cb0: 4641 mov r1, r8 8014cb2: 9a0a ldr r2, [sp, #40] @ 0x28 8014cb4: 4648 mov r0, r9 8014cb6: f000 ffa9 bl 8015c0c <__pow5mult> 8014cba: 9003 str r0, [sp, #12] 8014cbc: 2101 movs r1, #1 8014cbe: 4648 mov r0, r9 8014cc0: f000 feec bl 8015a9c <__i2b> 8014cc4: 9b0e ldr r3, [sp, #56] @ 0x38 8014cc6: 4604 mov r4, r0 8014cc8: 2b00 cmp r3, #0 8014cca: f000 81d8 beq.w 801507e <_dtoa_r+0xb5e> 8014cce: 461a mov r2, r3 8014cd0: 4601 mov r1, r0 8014cd2: 4648 mov r0, r9 8014cd4: f000 ff9a bl 8015c0c <__pow5mult> 8014cd8: 9b20 ldr r3, [sp, #128] @ 0x80 8014cda: 4604 mov r4, r0 8014cdc: 2b01 cmp r3, #1 8014cde: f300 809f bgt.w 8014e20 <_dtoa_r+0x900> 8014ce2: 9b06 ldr r3, [sp, #24] 8014ce4: 2b00 cmp r3, #0 8014ce6: f040 8097 bne.w 8014e18 <_dtoa_r+0x8f8> 8014cea: 9b07 ldr r3, [sp, #28] 8014cec: f3c3 0313 ubfx r3, r3, #0, #20 8014cf0: 2b00 cmp r3, #0 8014cf2: f040 8093 bne.w 8014e1c <_dtoa_r+0x8fc> 8014cf6: 9b07 ldr r3, [sp, #28] 8014cf8: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 8014cfc: 0d1b lsrs r3, r3, #20 8014cfe: 051b lsls r3, r3, #20 8014d00: b133 cbz r3, 8014d10 <_dtoa_r+0x7f0> 8014d02: 9b04 ldr r3, [sp, #16] 8014d04: 3301 adds r3, #1 8014d06: 9304 str r3, [sp, #16] 8014d08: 9b09 ldr r3, [sp, #36] @ 0x24 8014d0a: 3301 adds r3, #1 8014d0c: 9309 str r3, [sp, #36] @ 0x24 8014d0e: 2301 movs r3, #1 8014d10: 930a str r3, [sp, #40] @ 0x28 8014d12: 9b0e ldr r3, [sp, #56] @ 0x38 8014d14: 2b00 cmp r3, #0 8014d16: f000 81b8 beq.w 801508a <_dtoa_r+0xb6a> 8014d1a: 6923 ldr r3, [r4, #16] 8014d1c: eb04 0383 add.w r3, r4, r3, lsl #2 8014d20: 6918 ldr r0, [r3, #16] 8014d22: f000 fe6f bl 8015a04 <__hi0bits> 8014d26: f1c0 0020 rsb r0, r0, #32 8014d2a: 9b09 ldr r3, [sp, #36] @ 0x24 8014d2c: 4418 add r0, r3 8014d2e: f010 001f ands.w r0, r0, #31 8014d32: f000 8082 beq.w 8014e3a <_dtoa_r+0x91a> 8014d36: f1c0 0320 rsb r3, r0, #32 8014d3a: 2b04 cmp r3, #4 8014d3c: dd73 ble.n 8014e26 <_dtoa_r+0x906> 8014d3e: 9b04 ldr r3, [sp, #16] 8014d40: f1c0 001c rsb r0, r0, #28 8014d44: 4403 add r3, r0 8014d46: 9304 str r3, [sp, #16] 8014d48: 9b09 ldr r3, [sp, #36] @ 0x24 8014d4a: 4406 add r6, r0 8014d4c: 4403 add r3, r0 8014d4e: 9309 str r3, [sp, #36] @ 0x24 8014d50: 9b04 ldr r3, [sp, #16] 8014d52: 2b00 cmp r3, #0 8014d54: dd05 ble.n 8014d62 <_dtoa_r+0x842> 8014d56: 461a mov r2, r3 8014d58: 4648 mov r0, r9 8014d5a: 9903 ldr r1, [sp, #12] 8014d5c: f000 ffb0 bl 8015cc0 <__lshift> 8014d60: 9003 str r0, [sp, #12] 8014d62: 9b09 ldr r3, [sp, #36] @ 0x24 8014d64: 2b00 cmp r3, #0 8014d66: dd05 ble.n 8014d74 <_dtoa_r+0x854> 8014d68: 4621 mov r1, r4 8014d6a: 461a mov r2, r3 8014d6c: 4648 mov r0, r9 8014d6e: f000 ffa7 bl 8015cc0 <__lshift> 8014d72: 4604 mov r4, r0 8014d74: 9b0f ldr r3, [sp, #60] @ 0x3c 8014d76: 2b00 cmp r3, #0 8014d78: d061 beq.n 8014e3e <_dtoa_r+0x91e> 8014d7a: 4621 mov r1, r4 8014d7c: 9803 ldr r0, [sp, #12] 8014d7e: f001 f80b bl 8015d98 <__mcmp> 8014d82: 2800 cmp r0, #0 8014d84: da5b bge.n 8014e3e <_dtoa_r+0x91e> 8014d86: 2300 movs r3, #0 8014d88: 220a movs r2, #10 8014d8a: 4648 mov r0, r9 8014d8c: 9903 ldr r1, [sp, #12] 8014d8e: f000 fdf3 bl 8015978 <__multadd> 8014d92: 9b0b ldr r3, [sp, #44] @ 0x2c 8014d94: f107 38ff add.w r8, r7, #4294967295 @ 0xffffffff 8014d98: 9003 str r0, [sp, #12] 8014d9a: 2b00 cmp r3, #0 8014d9c: f000 8177 beq.w 801508e <_dtoa_r+0xb6e> 8014da0: 4629 mov r1, r5 8014da2: 2300 movs r3, #0 8014da4: 220a movs r2, #10 8014da6: 4648 mov r0, r9 8014da8: f000 fde6 bl 8015978 <__multadd> 8014dac: f1bb 0f00 cmp.w fp, #0 8014db0: 4605 mov r5, r0 8014db2: dc6f bgt.n 8014e94 <_dtoa_r+0x974> 8014db4: 9b20 ldr r3, [sp, #128] @ 0x80 8014db6: 2b02 cmp r3, #2 8014db8: dc49 bgt.n 8014e4e <_dtoa_r+0x92e> 8014dba: e06b b.n 8014e94 <_dtoa_r+0x974> 8014dbc: 9b14 ldr r3, [sp, #80] @ 0x50 8014dbe: f1c3 0336 rsb r3, r3, #54 @ 0x36 8014dc2: e73c b.n 8014c3e <_dtoa_r+0x71e> 8014dc4: 3fe00000 .word 0x3fe00000 8014dc8: 40240000 .word 0x40240000 8014dcc: 9b08 ldr r3, [sp, #32] 8014dce: 1e5c subs r4, r3, #1 8014dd0: 9b0a ldr r3, [sp, #40] @ 0x28 8014dd2: 42a3 cmp r3, r4 8014dd4: db09 blt.n 8014dea <_dtoa_r+0x8ca> 8014dd6: 1b1c subs r4, r3, r4 8014dd8: 9b08 ldr r3, [sp, #32] 8014dda: 2b00 cmp r3, #0 8014ddc: f6bf af30 bge.w 8014c40 <_dtoa_r+0x720> 8014de0: 9b04 ldr r3, [sp, #16] 8014de2: 9a08 ldr r2, [sp, #32] 8014de4: 1a9e subs r6, r3, r2 8014de6: 2300 movs r3, #0 8014de8: e72b b.n 8014c42 <_dtoa_r+0x722> 8014dea: 9b0a ldr r3, [sp, #40] @ 0x28 8014dec: 9a0e ldr r2, [sp, #56] @ 0x38 8014dee: 1ae3 subs r3, r4, r3 8014df0: 441a add r2, r3 8014df2: 940a str r4, [sp, #40] @ 0x28 8014df4: 9e04 ldr r6, [sp, #16] 8014df6: 2400 movs r4, #0 8014df8: 9b08 ldr r3, [sp, #32] 8014dfa: 920e str r2, [sp, #56] @ 0x38 8014dfc: e721 b.n 8014c42 <_dtoa_r+0x722> 8014dfe: 9c0a ldr r4, [sp, #40] @ 0x28 8014e00: 9e04 ldr r6, [sp, #16] 8014e02: 9d0b ldr r5, [sp, #44] @ 0x2c 8014e04: e728 b.n 8014c58 <_dtoa_r+0x738> 8014e06: f8dd 800c ldr.w r8, [sp, #12] 8014e0a: e751 b.n 8014cb0 <_dtoa_r+0x790> 8014e0c: 9a0a ldr r2, [sp, #40] @ 0x28 8014e0e: 9903 ldr r1, [sp, #12] 8014e10: e750 b.n 8014cb4 <_dtoa_r+0x794> 8014e12: f8cd 800c str.w r8, [sp, #12] 8014e16: e751 b.n 8014cbc <_dtoa_r+0x79c> 8014e18: 2300 movs r3, #0 8014e1a: e779 b.n 8014d10 <_dtoa_r+0x7f0> 8014e1c: 9b06 ldr r3, [sp, #24] 8014e1e: e777 b.n 8014d10 <_dtoa_r+0x7f0> 8014e20: 2300 movs r3, #0 8014e22: 930a str r3, [sp, #40] @ 0x28 8014e24: e779 b.n 8014d1a <_dtoa_r+0x7fa> 8014e26: d093 beq.n 8014d50 <_dtoa_r+0x830> 8014e28: 9a04 ldr r2, [sp, #16] 8014e2a: 331c adds r3, #28 8014e2c: 441a add r2, r3 8014e2e: 9204 str r2, [sp, #16] 8014e30: 9a09 ldr r2, [sp, #36] @ 0x24 8014e32: 441e add r6, r3 8014e34: 441a add r2, r3 8014e36: 9209 str r2, [sp, #36] @ 0x24 8014e38: e78a b.n 8014d50 <_dtoa_r+0x830> 8014e3a: 4603 mov r3, r0 8014e3c: e7f4 b.n 8014e28 <_dtoa_r+0x908> 8014e3e: 9b08 ldr r3, [sp, #32] 8014e40: 46b8 mov r8, r7 8014e42: 2b00 cmp r3, #0 8014e44: dc20 bgt.n 8014e88 <_dtoa_r+0x968> 8014e46: 469b mov fp, r3 8014e48: 9b20 ldr r3, [sp, #128] @ 0x80 8014e4a: 2b02 cmp r3, #2 8014e4c: dd1e ble.n 8014e8c <_dtoa_r+0x96c> 8014e4e: f1bb 0f00 cmp.w fp, #0 8014e52: f47f adb1 bne.w 80149b8 <_dtoa_r+0x498> 8014e56: 4621 mov r1, r4 8014e58: 465b mov r3, fp 8014e5a: 2205 movs r2, #5 8014e5c: 4648 mov r0, r9 8014e5e: f000 fd8b bl 8015978 <__multadd> 8014e62: 4601 mov r1, r0 8014e64: 4604 mov r4, r0 8014e66: 9803 ldr r0, [sp, #12] 8014e68: f000 ff96 bl 8015d98 <__mcmp> 8014e6c: 2800 cmp r0, #0 8014e6e: f77f ada3 ble.w 80149b8 <_dtoa_r+0x498> 8014e72: 4656 mov r6, sl 8014e74: 2331 movs r3, #49 @ 0x31 8014e76: f108 0801 add.w r8, r8, #1 8014e7a: f806 3b01 strb.w r3, [r6], #1 8014e7e: e59f b.n 80149c0 <_dtoa_r+0x4a0> 8014e80: 46b8 mov r8, r7 8014e82: 9c08 ldr r4, [sp, #32] 8014e84: 4625 mov r5, r4 8014e86: e7f4 b.n 8014e72 <_dtoa_r+0x952> 8014e88: f8dd b020 ldr.w fp, [sp, #32] 8014e8c: 9b0b ldr r3, [sp, #44] @ 0x2c 8014e8e: 2b00 cmp r3, #0 8014e90: f000 8101 beq.w 8015096 <_dtoa_r+0xb76> 8014e94: 2e00 cmp r6, #0 8014e96: dd05 ble.n 8014ea4 <_dtoa_r+0x984> 8014e98: 4629 mov r1, r5 8014e9a: 4632 mov r2, r6 8014e9c: 4648 mov r0, r9 8014e9e: f000 ff0f bl 8015cc0 <__lshift> 8014ea2: 4605 mov r5, r0 8014ea4: 9b0a ldr r3, [sp, #40] @ 0x28 8014ea6: 2b00 cmp r3, #0 8014ea8: d05c beq.n 8014f64 <_dtoa_r+0xa44> 8014eaa: 4648 mov r0, r9 8014eac: 6869 ldr r1, [r5, #4] 8014eae: f000 fd01 bl 80158b4 <_Balloc> 8014eb2: 4606 mov r6, r0 8014eb4: b928 cbnz r0, 8014ec2 <_dtoa_r+0x9a2> 8014eb6: 4602 mov r2, r0 8014eb8: f240 21ef movw r1, #751 @ 0x2ef 8014ebc: 4b80 ldr r3, [pc, #512] @ (80150c0 <_dtoa_r+0xba0>) 8014ebe: f7ff bb43 b.w 8014548 <_dtoa_r+0x28> 8014ec2: 692a ldr r2, [r5, #16] 8014ec4: f105 010c add.w r1, r5, #12 8014ec8: 3202 adds r2, #2 8014eca: 0092 lsls r2, r2, #2 8014ecc: 300c adds r0, #12 8014ece: f7ff fa73 bl 80143b8 8014ed2: 2201 movs r2, #1 8014ed4: 4631 mov r1, r6 8014ed6: 4648 mov r0, r9 8014ed8: f000 fef2 bl 8015cc0 <__lshift> 8014edc: 462f mov r7, r5 8014ede: 4605 mov r5, r0 8014ee0: f10a 0301 add.w r3, sl, #1 8014ee4: 9304 str r3, [sp, #16] 8014ee6: eb0a 030b add.w r3, sl, fp 8014eea: 930a str r3, [sp, #40] @ 0x28 8014eec: 9b06 ldr r3, [sp, #24] 8014eee: f003 0301 and.w r3, r3, #1 8014ef2: 9309 str r3, [sp, #36] @ 0x24 8014ef4: 9b04 ldr r3, [sp, #16] 8014ef6: 4621 mov r1, r4 8014ef8: 9803 ldr r0, [sp, #12] 8014efa: f103 3bff add.w fp, r3, #4294967295 @ 0xffffffff 8014efe: f7ff fa87 bl 8014410 8014f02: 4603 mov r3, r0 8014f04: 4639 mov r1, r7 8014f06: 3330 adds r3, #48 @ 0x30 8014f08: 9006 str r0, [sp, #24] 8014f0a: 9803 ldr r0, [sp, #12] 8014f0c: 930b str r3, [sp, #44] @ 0x2c 8014f0e: f000 ff43 bl 8015d98 <__mcmp> 8014f12: 462a mov r2, r5 8014f14: 9008 str r0, [sp, #32] 8014f16: 4621 mov r1, r4 8014f18: 4648 mov r0, r9 8014f1a: f000 ff59 bl 8015dd0 <__mdiff> 8014f1e: 68c2 ldr r2, [r0, #12] 8014f20: 4606 mov r6, r0 8014f22: 9b0b ldr r3, [sp, #44] @ 0x2c 8014f24: bb02 cbnz r2, 8014f68 <_dtoa_r+0xa48> 8014f26: 4601 mov r1, r0 8014f28: 9803 ldr r0, [sp, #12] 8014f2a: f000 ff35 bl 8015d98 <__mcmp> 8014f2e: 4602 mov r2, r0 8014f30: 9b0b ldr r3, [sp, #44] @ 0x2c 8014f32: 4631 mov r1, r6 8014f34: 4648 mov r0, r9 8014f36: e9cd 320b strd r3, r2, [sp, #44] @ 0x2c 8014f3a: f000 fcfb bl 8015934 <_Bfree> 8014f3e: 9b20 ldr r3, [sp, #128] @ 0x80 8014f40: 9a0c ldr r2, [sp, #48] @ 0x30 8014f42: 9e04 ldr r6, [sp, #16] 8014f44: ea42 0103 orr.w r1, r2, r3 8014f48: 9b09 ldr r3, [sp, #36] @ 0x24 8014f4a: 4319 orrs r1, r3 8014f4c: 9b0b ldr r3, [sp, #44] @ 0x2c 8014f4e: d10d bne.n 8014f6c <_dtoa_r+0xa4c> 8014f50: 2b39 cmp r3, #57 @ 0x39 8014f52: d027 beq.n 8014fa4 <_dtoa_r+0xa84> 8014f54: 9a08 ldr r2, [sp, #32] 8014f56: 2a00 cmp r2, #0 8014f58: dd01 ble.n 8014f5e <_dtoa_r+0xa3e> 8014f5a: 9b06 ldr r3, [sp, #24] 8014f5c: 3331 adds r3, #49 @ 0x31 8014f5e: f88b 3000 strb.w r3, [fp] 8014f62: e52e b.n 80149c2 <_dtoa_r+0x4a2> 8014f64: 4628 mov r0, r5 8014f66: e7b9 b.n 8014edc <_dtoa_r+0x9bc> 8014f68: 2201 movs r2, #1 8014f6a: e7e2 b.n 8014f32 <_dtoa_r+0xa12> 8014f6c: 9908 ldr r1, [sp, #32] 8014f6e: 2900 cmp r1, #0 8014f70: db04 blt.n 8014f7c <_dtoa_r+0xa5c> 8014f72: 9820 ldr r0, [sp, #128] @ 0x80 8014f74: 4301 orrs r1, r0 8014f76: 9809 ldr r0, [sp, #36] @ 0x24 8014f78: 4301 orrs r1, r0 8014f7a: d120 bne.n 8014fbe <_dtoa_r+0xa9e> 8014f7c: 2a00 cmp r2, #0 8014f7e: ddee ble.n 8014f5e <_dtoa_r+0xa3e> 8014f80: 2201 movs r2, #1 8014f82: 9903 ldr r1, [sp, #12] 8014f84: 4648 mov r0, r9 8014f86: 9304 str r3, [sp, #16] 8014f88: f000 fe9a bl 8015cc0 <__lshift> 8014f8c: 4621 mov r1, r4 8014f8e: 9003 str r0, [sp, #12] 8014f90: f000 ff02 bl 8015d98 <__mcmp> 8014f94: 2800 cmp r0, #0 8014f96: 9b04 ldr r3, [sp, #16] 8014f98: dc02 bgt.n 8014fa0 <_dtoa_r+0xa80> 8014f9a: d1e0 bne.n 8014f5e <_dtoa_r+0xa3e> 8014f9c: 07da lsls r2, r3, #31 8014f9e: d5de bpl.n 8014f5e <_dtoa_r+0xa3e> 8014fa0: 2b39 cmp r3, #57 @ 0x39 8014fa2: d1da bne.n 8014f5a <_dtoa_r+0xa3a> 8014fa4: 2339 movs r3, #57 @ 0x39 8014fa6: f88b 3000 strb.w r3, [fp] 8014faa: 4633 mov r3, r6 8014fac: 461e mov r6, r3 8014fae: f816 2c01 ldrb.w r2, [r6, #-1] 8014fb2: 3b01 subs r3, #1 8014fb4: 2a39 cmp r2, #57 @ 0x39 8014fb6: d04e beq.n 8015056 <_dtoa_r+0xb36> 8014fb8: 3201 adds r2, #1 8014fba: 701a strb r2, [r3, #0] 8014fbc: e501 b.n 80149c2 <_dtoa_r+0x4a2> 8014fbe: 2a00 cmp r2, #0 8014fc0: dd03 ble.n 8014fca <_dtoa_r+0xaaa> 8014fc2: 2b39 cmp r3, #57 @ 0x39 8014fc4: d0ee beq.n 8014fa4 <_dtoa_r+0xa84> 8014fc6: 3301 adds r3, #1 8014fc8: e7c9 b.n 8014f5e <_dtoa_r+0xa3e> 8014fca: 9a04 ldr r2, [sp, #16] 8014fcc: 990a ldr r1, [sp, #40] @ 0x28 8014fce: f802 3c01 strb.w r3, [r2, #-1] 8014fd2: 428a cmp r2, r1 8014fd4: d028 beq.n 8015028 <_dtoa_r+0xb08> 8014fd6: 2300 movs r3, #0 8014fd8: 220a movs r2, #10 8014fda: 9903 ldr r1, [sp, #12] 8014fdc: 4648 mov r0, r9 8014fde: f000 fccb bl 8015978 <__multadd> 8014fe2: 42af cmp r7, r5 8014fe4: 9003 str r0, [sp, #12] 8014fe6: f04f 0300 mov.w r3, #0 8014fea: f04f 020a mov.w r2, #10 8014fee: 4639 mov r1, r7 8014ff0: 4648 mov r0, r9 8014ff2: d107 bne.n 8015004 <_dtoa_r+0xae4> 8014ff4: f000 fcc0 bl 8015978 <__multadd> 8014ff8: 4607 mov r7, r0 8014ffa: 4605 mov r5, r0 8014ffc: 9b04 ldr r3, [sp, #16] 8014ffe: 3301 adds r3, #1 8015000: 9304 str r3, [sp, #16] 8015002: e777 b.n 8014ef4 <_dtoa_r+0x9d4> 8015004: f000 fcb8 bl 8015978 <__multadd> 8015008: 4629 mov r1, r5 801500a: 4607 mov r7, r0 801500c: 2300 movs r3, #0 801500e: 220a movs r2, #10 8015010: 4648 mov r0, r9 8015012: f000 fcb1 bl 8015978 <__multadd> 8015016: 4605 mov r5, r0 8015018: e7f0 b.n 8014ffc <_dtoa_r+0xadc> 801501a: f1bb 0f00 cmp.w fp, #0 801501e: bfcc ite gt 8015020: 465e movgt r6, fp 8015022: 2601 movle r6, #1 8015024: 2700 movs r7, #0 8015026: 4456 add r6, sl 8015028: 2201 movs r2, #1 801502a: 9903 ldr r1, [sp, #12] 801502c: 4648 mov r0, r9 801502e: 9304 str r3, [sp, #16] 8015030: f000 fe46 bl 8015cc0 <__lshift> 8015034: 4621 mov r1, r4 8015036: 9003 str r0, [sp, #12] 8015038: f000 feae bl 8015d98 <__mcmp> 801503c: 2800 cmp r0, #0 801503e: dcb4 bgt.n 8014faa <_dtoa_r+0xa8a> 8015040: d102 bne.n 8015048 <_dtoa_r+0xb28> 8015042: 9b04 ldr r3, [sp, #16] 8015044: 07db lsls r3, r3, #31 8015046: d4b0 bmi.n 8014faa <_dtoa_r+0xa8a> 8015048: 4633 mov r3, r6 801504a: 461e mov r6, r3 801504c: f813 2d01 ldrb.w r2, [r3, #-1]! 8015050: 2a30 cmp r2, #48 @ 0x30 8015052: d0fa beq.n 801504a <_dtoa_r+0xb2a> 8015054: e4b5 b.n 80149c2 <_dtoa_r+0x4a2> 8015056: 459a cmp sl, r3 8015058: d1a8 bne.n 8014fac <_dtoa_r+0xa8c> 801505a: 2331 movs r3, #49 @ 0x31 801505c: f108 0801 add.w r8, r8, #1 8015060: f88a 3000 strb.w r3, [sl] 8015064: e4ad b.n 80149c2 <_dtoa_r+0x4a2> 8015066: 9b24 ldr r3, [sp, #144] @ 0x90 8015068: f8df a058 ldr.w sl, [pc, #88] @ 80150c4 <_dtoa_r+0xba4> 801506c: b11b cbz r3, 8015076 <_dtoa_r+0xb56> 801506e: f10a 0308 add.w r3, sl, #8 8015072: 9a24 ldr r2, [sp, #144] @ 0x90 8015074: 6013 str r3, [r2, #0] 8015076: 4650 mov r0, sl 8015078: b017 add sp, #92 @ 0x5c 801507a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 801507e: 9b20 ldr r3, [sp, #128] @ 0x80 8015080: 2b01 cmp r3, #1 8015082: f77f ae2e ble.w 8014ce2 <_dtoa_r+0x7c2> 8015086: 9b0e ldr r3, [sp, #56] @ 0x38 8015088: 930a str r3, [sp, #40] @ 0x28 801508a: 2001 movs r0, #1 801508c: e64d b.n 8014d2a <_dtoa_r+0x80a> 801508e: f1bb 0f00 cmp.w fp, #0 8015092: f77f aed9 ble.w 8014e48 <_dtoa_r+0x928> 8015096: 4656 mov r6, sl 8015098: 4621 mov r1, r4 801509a: 9803 ldr r0, [sp, #12] 801509c: f7ff f9b8 bl 8014410 80150a0: f100 0330 add.w r3, r0, #48 @ 0x30 80150a4: f806 3b01 strb.w r3, [r6], #1 80150a8: eba6 020a sub.w r2, r6, sl 80150ac: 4593 cmp fp, r2 80150ae: ddb4 ble.n 801501a <_dtoa_r+0xafa> 80150b0: 2300 movs r3, #0 80150b2: 220a movs r2, #10 80150b4: 4648 mov r0, r9 80150b6: 9903 ldr r1, [sp, #12] 80150b8: f000 fc5e bl 8015978 <__multadd> 80150bc: 9003 str r0, [sp, #12] 80150be: e7eb b.n 8015098 <_dtoa_r+0xb78> 80150c0: 08016eb4 .word 0x08016eb4 80150c4: 08016e4f .word 0x08016e4f 080150c8 <__ssputs_r>: 80150c8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80150cc: 461f mov r7, r3 80150ce: 688e ldr r6, [r1, #8] 80150d0: 4682 mov sl, r0 80150d2: 42be cmp r6, r7 80150d4: 460c mov r4, r1 80150d6: 4690 mov r8, r2 80150d8: 680b ldr r3, [r1, #0] 80150da: d82d bhi.n 8015138 <__ssputs_r+0x70> 80150dc: f9b1 200c ldrsh.w r2, [r1, #12] 80150e0: f412 6f90 tst.w r2, #1152 @ 0x480 80150e4: d026 beq.n 8015134 <__ssputs_r+0x6c> 80150e6: 6965 ldr r5, [r4, #20] 80150e8: 6909 ldr r1, [r1, #16] 80150ea: eb05 0545 add.w r5, r5, r5, lsl #1 80150ee: eba3 0901 sub.w r9, r3, r1 80150f2: eb05 75d5 add.w r5, r5, r5, lsr #31 80150f6: 1c7b adds r3, r7, #1 80150f8: 444b add r3, r9 80150fa: 106d asrs r5, r5, #1 80150fc: 429d cmp r5, r3 80150fe: bf38 it cc 8015100: 461d movcc r5, r3 8015102: 0553 lsls r3, r2, #21 8015104: d527 bpl.n 8015156 <__ssputs_r+0x8e> 8015106: 4629 mov r1, r5 8015108: f000 faa0 bl 801564c <_malloc_r> 801510c: 4606 mov r6, r0 801510e: b360 cbz r0, 801516a <__ssputs_r+0xa2> 8015110: 464a mov r2, r9 8015112: 6921 ldr r1, [r4, #16] 8015114: f7ff f950 bl 80143b8 8015118: 89a3 ldrh r3, [r4, #12] 801511a: f423 6390 bic.w r3, r3, #1152 @ 0x480 801511e: f043 0380 orr.w r3, r3, #128 @ 0x80 8015122: 81a3 strh r3, [r4, #12] 8015124: 6126 str r6, [r4, #16] 8015126: 444e add r6, r9 8015128: 6026 str r6, [r4, #0] 801512a: 463e mov r6, r7 801512c: 6165 str r5, [r4, #20] 801512e: eba5 0509 sub.w r5, r5, r9 8015132: 60a5 str r5, [r4, #8] 8015134: 42be cmp r6, r7 8015136: d900 bls.n 801513a <__ssputs_r+0x72> 8015138: 463e mov r6, r7 801513a: 4632 mov r2, r6 801513c: 4641 mov r1, r8 801513e: 6820 ldr r0, [r4, #0] 8015140: f001 f8ab bl 801629a 8015144: 2000 movs r0, #0 8015146: 68a3 ldr r3, [r4, #8] 8015148: 1b9b subs r3, r3, r6 801514a: 60a3 str r3, [r4, #8] 801514c: 6823 ldr r3, [r4, #0] 801514e: 4433 add r3, r6 8015150: 6023 str r3, [r4, #0] 8015152: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8015156: 462a mov r2, r5 8015158: f000 ff7c bl 8016054 <_realloc_r> 801515c: 4606 mov r6, r0 801515e: 2800 cmp r0, #0 8015160: d1e0 bne.n 8015124 <__ssputs_r+0x5c> 8015162: 4650 mov r0, sl 8015164: 6921 ldr r1, [r4, #16] 8015166: f001 f947 bl 80163f8 <_free_r> 801516a: 230c movs r3, #12 801516c: f8ca 3000 str.w r3, [sl] 8015170: 89a3 ldrh r3, [r4, #12] 8015172: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8015176: f043 0340 orr.w r3, r3, #64 @ 0x40 801517a: 81a3 strh r3, [r4, #12] 801517c: e7e9 b.n 8015152 <__ssputs_r+0x8a> ... 08015180 <_svfiprintf_r>: 8015180: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8015184: 4698 mov r8, r3 8015186: 898b ldrh r3, [r1, #12] 8015188: 4607 mov r7, r0 801518a: 061b lsls r3, r3, #24 801518c: 460d mov r5, r1 801518e: 4614 mov r4, r2 8015190: b09d sub sp, #116 @ 0x74 8015192: d510 bpl.n 80151b6 <_svfiprintf_r+0x36> 8015194: 690b ldr r3, [r1, #16] 8015196: b973 cbnz r3, 80151b6 <_svfiprintf_r+0x36> 8015198: 2140 movs r1, #64 @ 0x40 801519a: f000 fa57 bl 801564c <_malloc_r> 801519e: 6028 str r0, [r5, #0] 80151a0: 6128 str r0, [r5, #16] 80151a2: b930 cbnz r0, 80151b2 <_svfiprintf_r+0x32> 80151a4: 230c movs r3, #12 80151a6: 603b str r3, [r7, #0] 80151a8: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80151ac: b01d add sp, #116 @ 0x74 80151ae: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80151b2: 2340 movs r3, #64 @ 0x40 80151b4: 616b str r3, [r5, #20] 80151b6: 2300 movs r3, #0 80151b8: 9309 str r3, [sp, #36] @ 0x24 80151ba: 2320 movs r3, #32 80151bc: f88d 3029 strb.w r3, [sp, #41] @ 0x29 80151c0: 2330 movs r3, #48 @ 0x30 80151c2: f04f 0901 mov.w r9, #1 80151c6: f8cd 800c str.w r8, [sp, #12] 80151ca: f8df 8198 ldr.w r8, [pc, #408] @ 8015364 <_svfiprintf_r+0x1e4> 80151ce: f88d 302a strb.w r3, [sp, #42] @ 0x2a 80151d2: 4623 mov r3, r4 80151d4: 469a mov sl, r3 80151d6: f813 2b01 ldrb.w r2, [r3], #1 80151da: b10a cbz r2, 80151e0 <_svfiprintf_r+0x60> 80151dc: 2a25 cmp r2, #37 @ 0x25 80151de: d1f9 bne.n 80151d4 <_svfiprintf_r+0x54> 80151e0: ebba 0b04 subs.w fp, sl, r4 80151e4: d00b beq.n 80151fe <_svfiprintf_r+0x7e> 80151e6: 465b mov r3, fp 80151e8: 4622 mov r2, r4 80151ea: 4629 mov r1, r5 80151ec: 4638 mov r0, r7 80151ee: f7ff ff6b bl 80150c8 <__ssputs_r> 80151f2: 3001 adds r0, #1 80151f4: f000 80a7 beq.w 8015346 <_svfiprintf_r+0x1c6> 80151f8: 9a09 ldr r2, [sp, #36] @ 0x24 80151fa: 445a add r2, fp 80151fc: 9209 str r2, [sp, #36] @ 0x24 80151fe: f89a 3000 ldrb.w r3, [sl] 8015202: 2b00 cmp r3, #0 8015204: f000 809f beq.w 8015346 <_svfiprintf_r+0x1c6> 8015208: 2300 movs r3, #0 801520a: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 801520e: e9cd 2305 strd r2, r3, [sp, #20] 8015212: f10a 0a01 add.w sl, sl, #1 8015216: 9304 str r3, [sp, #16] 8015218: 9307 str r3, [sp, #28] 801521a: f88d 3053 strb.w r3, [sp, #83] @ 0x53 801521e: 931a str r3, [sp, #104] @ 0x68 8015220: 4654 mov r4, sl 8015222: 2205 movs r2, #5 8015224: f814 1b01 ldrb.w r1, [r4], #1 8015228: 484e ldr r0, [pc, #312] @ (8015364 <_svfiprintf_r+0x1e4>) 801522a: f7ff f8b7 bl 801439c 801522e: 9a04 ldr r2, [sp, #16] 8015230: b9d8 cbnz r0, 801526a <_svfiprintf_r+0xea> 8015232: 06d0 lsls r0, r2, #27 8015234: bf44 itt mi 8015236: 2320 movmi r3, #32 8015238: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 801523c: 0711 lsls r1, r2, #28 801523e: bf44 itt mi 8015240: 232b movmi r3, #43 @ 0x2b 8015242: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 8015246: f89a 3000 ldrb.w r3, [sl] 801524a: 2b2a cmp r3, #42 @ 0x2a 801524c: d015 beq.n 801527a <_svfiprintf_r+0xfa> 801524e: 4654 mov r4, sl 8015250: 2000 movs r0, #0 8015252: f04f 0c0a mov.w ip, #10 8015256: 9a07 ldr r2, [sp, #28] 8015258: 4621 mov r1, r4 801525a: f811 3b01 ldrb.w r3, [r1], #1 801525e: 3b30 subs r3, #48 @ 0x30 8015260: 2b09 cmp r3, #9 8015262: d94b bls.n 80152fc <_svfiprintf_r+0x17c> 8015264: b1b0 cbz r0, 8015294 <_svfiprintf_r+0x114> 8015266: 9207 str r2, [sp, #28] 8015268: e014 b.n 8015294 <_svfiprintf_r+0x114> 801526a: eba0 0308 sub.w r3, r0, r8 801526e: fa09 f303 lsl.w r3, r9, r3 8015272: 4313 orrs r3, r2 8015274: 46a2 mov sl, r4 8015276: 9304 str r3, [sp, #16] 8015278: e7d2 b.n 8015220 <_svfiprintf_r+0xa0> 801527a: 9b03 ldr r3, [sp, #12] 801527c: 1d19 adds r1, r3, #4 801527e: 681b ldr r3, [r3, #0] 8015280: 9103 str r1, [sp, #12] 8015282: 2b00 cmp r3, #0 8015284: bfbb ittet lt 8015286: 425b neglt r3, r3 8015288: f042 0202 orrlt.w r2, r2, #2 801528c: 9307 strge r3, [sp, #28] 801528e: 9307 strlt r3, [sp, #28] 8015290: bfb8 it lt 8015292: 9204 strlt r2, [sp, #16] 8015294: 7823 ldrb r3, [r4, #0] 8015296: 2b2e cmp r3, #46 @ 0x2e 8015298: d10a bne.n 80152b0 <_svfiprintf_r+0x130> 801529a: 7863 ldrb r3, [r4, #1] 801529c: 2b2a cmp r3, #42 @ 0x2a 801529e: d132 bne.n 8015306 <_svfiprintf_r+0x186> 80152a0: 9b03 ldr r3, [sp, #12] 80152a2: 3402 adds r4, #2 80152a4: 1d1a adds r2, r3, #4 80152a6: 681b ldr r3, [r3, #0] 80152a8: 9203 str r2, [sp, #12] 80152aa: ea43 73e3 orr.w r3, r3, r3, asr #31 80152ae: 9305 str r3, [sp, #20] 80152b0: f8df a0b4 ldr.w sl, [pc, #180] @ 8015368 <_svfiprintf_r+0x1e8> 80152b4: 2203 movs r2, #3 80152b6: 4650 mov r0, sl 80152b8: 7821 ldrb r1, [r4, #0] 80152ba: f7ff f86f bl 801439c 80152be: b138 cbz r0, 80152d0 <_svfiprintf_r+0x150> 80152c0: 2240 movs r2, #64 @ 0x40 80152c2: 9b04 ldr r3, [sp, #16] 80152c4: eba0 000a sub.w r0, r0, sl 80152c8: 4082 lsls r2, r0 80152ca: 4313 orrs r3, r2 80152cc: 3401 adds r4, #1 80152ce: 9304 str r3, [sp, #16] 80152d0: f814 1b01 ldrb.w r1, [r4], #1 80152d4: 2206 movs r2, #6 80152d6: 4825 ldr r0, [pc, #148] @ (801536c <_svfiprintf_r+0x1ec>) 80152d8: f88d 1028 strb.w r1, [sp, #40] @ 0x28 80152dc: f7ff f85e bl 801439c 80152e0: 2800 cmp r0, #0 80152e2: d036 beq.n 8015352 <_svfiprintf_r+0x1d2> 80152e4: 4b22 ldr r3, [pc, #136] @ (8015370 <_svfiprintf_r+0x1f0>) 80152e6: bb1b cbnz r3, 8015330 <_svfiprintf_r+0x1b0> 80152e8: 9b03 ldr r3, [sp, #12] 80152ea: 3307 adds r3, #7 80152ec: f023 0307 bic.w r3, r3, #7 80152f0: 3308 adds r3, #8 80152f2: 9303 str r3, [sp, #12] 80152f4: 9b09 ldr r3, [sp, #36] @ 0x24 80152f6: 4433 add r3, r6 80152f8: 9309 str r3, [sp, #36] @ 0x24 80152fa: e76a b.n 80151d2 <_svfiprintf_r+0x52> 80152fc: 460c mov r4, r1 80152fe: 2001 movs r0, #1 8015300: fb0c 3202 mla r2, ip, r2, r3 8015304: e7a8 b.n 8015258 <_svfiprintf_r+0xd8> 8015306: 2300 movs r3, #0 8015308: f04f 0c0a mov.w ip, #10 801530c: 4619 mov r1, r3 801530e: 3401 adds r4, #1 8015310: 9305 str r3, [sp, #20] 8015312: 4620 mov r0, r4 8015314: f810 2b01 ldrb.w r2, [r0], #1 8015318: 3a30 subs r2, #48 @ 0x30 801531a: 2a09 cmp r2, #9 801531c: d903 bls.n 8015326 <_svfiprintf_r+0x1a6> 801531e: 2b00 cmp r3, #0 8015320: d0c6 beq.n 80152b0 <_svfiprintf_r+0x130> 8015322: 9105 str r1, [sp, #20] 8015324: e7c4 b.n 80152b0 <_svfiprintf_r+0x130> 8015326: 4604 mov r4, r0 8015328: 2301 movs r3, #1 801532a: fb0c 2101 mla r1, ip, r1, r2 801532e: e7f0 b.n 8015312 <_svfiprintf_r+0x192> 8015330: ab03 add r3, sp, #12 8015332: 9300 str r3, [sp, #0] 8015334: 462a mov r2, r5 8015336: 4638 mov r0, r7 8015338: 4b0e ldr r3, [pc, #56] @ (8015374 <_svfiprintf_r+0x1f4>) 801533a: a904 add r1, sp, #16 801533c: f7fe fa62 bl 8013804 <_printf_float> 8015340: 1c42 adds r2, r0, #1 8015342: 4606 mov r6, r0 8015344: d1d6 bne.n 80152f4 <_svfiprintf_r+0x174> 8015346: 89ab ldrh r3, [r5, #12] 8015348: 065b lsls r3, r3, #25 801534a: f53f af2d bmi.w 80151a8 <_svfiprintf_r+0x28> 801534e: 9809 ldr r0, [sp, #36] @ 0x24 8015350: e72c b.n 80151ac <_svfiprintf_r+0x2c> 8015352: ab03 add r3, sp, #12 8015354: 9300 str r3, [sp, #0] 8015356: 462a mov r2, r5 8015358: 4638 mov r0, r7 801535a: 4b06 ldr r3, [pc, #24] @ (8015374 <_svfiprintf_r+0x1f4>) 801535c: a904 add r1, sp, #16 801535e: f7fe fcef bl 8013d40 <_printf_i> 8015362: e7ed b.n 8015340 <_svfiprintf_r+0x1c0> 8015364: 08016ec5 .word 0x08016ec5 8015368: 08016ecb .word 0x08016ecb 801536c: 08016ecf .word 0x08016ecf 8015370: 08013805 .word 0x08013805 8015374: 080150c9 .word 0x080150c9 08015378 <__sfputc_r>: 8015378: 6893 ldr r3, [r2, #8] 801537a: b410 push {r4} 801537c: 3b01 subs r3, #1 801537e: 2b00 cmp r3, #0 8015380: 6093 str r3, [r2, #8] 8015382: da07 bge.n 8015394 <__sfputc_r+0x1c> 8015384: 6994 ldr r4, [r2, #24] 8015386: 42a3 cmp r3, r4 8015388: db01 blt.n 801538e <__sfputc_r+0x16> 801538a: 290a cmp r1, #10 801538c: d102 bne.n 8015394 <__sfputc_r+0x1c> 801538e: bc10 pop {r4} 8015390: f000 be8e b.w 80160b0 <__swbuf_r> 8015394: 6813 ldr r3, [r2, #0] 8015396: 1c58 adds r0, r3, #1 8015398: 6010 str r0, [r2, #0] 801539a: 7019 strb r1, [r3, #0] 801539c: 4608 mov r0, r1 801539e: bc10 pop {r4} 80153a0: 4770 bx lr 080153a2 <__sfputs_r>: 80153a2: b5f8 push {r3, r4, r5, r6, r7, lr} 80153a4: 4606 mov r6, r0 80153a6: 460f mov r7, r1 80153a8: 4614 mov r4, r2 80153aa: 18d5 adds r5, r2, r3 80153ac: 42ac cmp r4, r5 80153ae: d101 bne.n 80153b4 <__sfputs_r+0x12> 80153b0: 2000 movs r0, #0 80153b2: e007 b.n 80153c4 <__sfputs_r+0x22> 80153b4: 463a mov r2, r7 80153b6: 4630 mov r0, r6 80153b8: f814 1b01 ldrb.w r1, [r4], #1 80153bc: f7ff ffdc bl 8015378 <__sfputc_r> 80153c0: 1c43 adds r3, r0, #1 80153c2: d1f3 bne.n 80153ac <__sfputs_r+0xa> 80153c4: bdf8 pop {r3, r4, r5, r6, r7, pc} ... 080153c8 <_vfiprintf_r>: 80153c8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80153cc: 460d mov r5, r1 80153ce: 4614 mov r4, r2 80153d0: 4698 mov r8, r3 80153d2: 4606 mov r6, r0 80153d4: b09d sub sp, #116 @ 0x74 80153d6: b118 cbz r0, 80153e0 <_vfiprintf_r+0x18> 80153d8: 6a03 ldr r3, [r0, #32] 80153da: b90b cbnz r3, 80153e0 <_vfiprintf_r+0x18> 80153dc: f7fe fe5a bl 8014094 <__sinit> 80153e0: 6e6b ldr r3, [r5, #100] @ 0x64 80153e2: 07d9 lsls r1, r3, #31 80153e4: d405 bmi.n 80153f2 <_vfiprintf_r+0x2a> 80153e6: 89ab ldrh r3, [r5, #12] 80153e8: 059a lsls r2, r3, #22 80153ea: d402 bmi.n 80153f2 <_vfiprintf_r+0x2a> 80153ec: 6da8 ldr r0, [r5, #88] @ 0x58 80153ee: f7fe ffce bl 801438e <__retarget_lock_acquire_recursive> 80153f2: 89ab ldrh r3, [r5, #12] 80153f4: 071b lsls r3, r3, #28 80153f6: d501 bpl.n 80153fc <_vfiprintf_r+0x34> 80153f8: 692b ldr r3, [r5, #16] 80153fa: b99b cbnz r3, 8015424 <_vfiprintf_r+0x5c> 80153fc: 4629 mov r1, r5 80153fe: 4630 mov r0, r6 8015400: f000 fe94 bl 801612c <__swsetup_r> 8015404: b170 cbz r0, 8015424 <_vfiprintf_r+0x5c> 8015406: 6e6b ldr r3, [r5, #100] @ 0x64 8015408: 07dc lsls r4, r3, #31 801540a: d504 bpl.n 8015416 <_vfiprintf_r+0x4e> 801540c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8015410: b01d add sp, #116 @ 0x74 8015412: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8015416: 89ab ldrh r3, [r5, #12] 8015418: 0598 lsls r0, r3, #22 801541a: d4f7 bmi.n 801540c <_vfiprintf_r+0x44> 801541c: 6da8 ldr r0, [r5, #88] @ 0x58 801541e: f7fe ffb7 bl 8014390 <__retarget_lock_release_recursive> 8015422: e7f3 b.n 801540c <_vfiprintf_r+0x44> 8015424: 2300 movs r3, #0 8015426: 9309 str r3, [sp, #36] @ 0x24 8015428: 2320 movs r3, #32 801542a: f88d 3029 strb.w r3, [sp, #41] @ 0x29 801542e: 2330 movs r3, #48 @ 0x30 8015430: f04f 0901 mov.w r9, #1 8015434: f8cd 800c str.w r8, [sp, #12] 8015438: f8df 81a8 ldr.w r8, [pc, #424] @ 80155e4 <_vfiprintf_r+0x21c> 801543c: f88d 302a strb.w r3, [sp, #42] @ 0x2a 8015440: 4623 mov r3, r4 8015442: 469a mov sl, r3 8015444: f813 2b01 ldrb.w r2, [r3], #1 8015448: b10a cbz r2, 801544e <_vfiprintf_r+0x86> 801544a: 2a25 cmp r2, #37 @ 0x25 801544c: d1f9 bne.n 8015442 <_vfiprintf_r+0x7a> 801544e: ebba 0b04 subs.w fp, sl, r4 8015452: d00b beq.n 801546c <_vfiprintf_r+0xa4> 8015454: 465b mov r3, fp 8015456: 4622 mov r2, r4 8015458: 4629 mov r1, r5 801545a: 4630 mov r0, r6 801545c: f7ff ffa1 bl 80153a2 <__sfputs_r> 8015460: 3001 adds r0, #1 8015462: f000 80a7 beq.w 80155b4 <_vfiprintf_r+0x1ec> 8015466: 9a09 ldr r2, [sp, #36] @ 0x24 8015468: 445a add r2, fp 801546a: 9209 str r2, [sp, #36] @ 0x24 801546c: f89a 3000 ldrb.w r3, [sl] 8015470: 2b00 cmp r3, #0 8015472: f000 809f beq.w 80155b4 <_vfiprintf_r+0x1ec> 8015476: 2300 movs r3, #0 8015478: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 801547c: e9cd 2305 strd r2, r3, [sp, #20] 8015480: f10a 0a01 add.w sl, sl, #1 8015484: 9304 str r3, [sp, #16] 8015486: 9307 str r3, [sp, #28] 8015488: f88d 3053 strb.w r3, [sp, #83] @ 0x53 801548c: 931a str r3, [sp, #104] @ 0x68 801548e: 4654 mov r4, sl 8015490: 2205 movs r2, #5 8015492: f814 1b01 ldrb.w r1, [r4], #1 8015496: 4853 ldr r0, [pc, #332] @ (80155e4 <_vfiprintf_r+0x21c>) 8015498: f7fe ff80 bl 801439c 801549c: 9a04 ldr r2, [sp, #16] 801549e: b9d8 cbnz r0, 80154d8 <_vfiprintf_r+0x110> 80154a0: 06d1 lsls r1, r2, #27 80154a2: bf44 itt mi 80154a4: 2320 movmi r3, #32 80154a6: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80154aa: 0713 lsls r3, r2, #28 80154ac: bf44 itt mi 80154ae: 232b movmi r3, #43 @ 0x2b 80154b0: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80154b4: f89a 3000 ldrb.w r3, [sl] 80154b8: 2b2a cmp r3, #42 @ 0x2a 80154ba: d015 beq.n 80154e8 <_vfiprintf_r+0x120> 80154bc: 4654 mov r4, sl 80154be: 2000 movs r0, #0 80154c0: f04f 0c0a mov.w ip, #10 80154c4: 9a07 ldr r2, [sp, #28] 80154c6: 4621 mov r1, r4 80154c8: f811 3b01 ldrb.w r3, [r1], #1 80154cc: 3b30 subs r3, #48 @ 0x30 80154ce: 2b09 cmp r3, #9 80154d0: d94b bls.n 801556a <_vfiprintf_r+0x1a2> 80154d2: b1b0 cbz r0, 8015502 <_vfiprintf_r+0x13a> 80154d4: 9207 str r2, [sp, #28] 80154d6: e014 b.n 8015502 <_vfiprintf_r+0x13a> 80154d8: eba0 0308 sub.w r3, r0, r8 80154dc: fa09 f303 lsl.w r3, r9, r3 80154e0: 4313 orrs r3, r2 80154e2: 46a2 mov sl, r4 80154e4: 9304 str r3, [sp, #16] 80154e6: e7d2 b.n 801548e <_vfiprintf_r+0xc6> 80154e8: 9b03 ldr r3, [sp, #12] 80154ea: 1d19 adds r1, r3, #4 80154ec: 681b ldr r3, [r3, #0] 80154ee: 9103 str r1, [sp, #12] 80154f0: 2b00 cmp r3, #0 80154f2: bfbb ittet lt 80154f4: 425b neglt r3, r3 80154f6: f042 0202 orrlt.w r2, r2, #2 80154fa: 9307 strge r3, [sp, #28] 80154fc: 9307 strlt r3, [sp, #28] 80154fe: bfb8 it lt 8015500: 9204 strlt r2, [sp, #16] 8015502: 7823 ldrb r3, [r4, #0] 8015504: 2b2e cmp r3, #46 @ 0x2e 8015506: d10a bne.n 801551e <_vfiprintf_r+0x156> 8015508: 7863 ldrb r3, [r4, #1] 801550a: 2b2a cmp r3, #42 @ 0x2a 801550c: d132 bne.n 8015574 <_vfiprintf_r+0x1ac> 801550e: 9b03 ldr r3, [sp, #12] 8015510: 3402 adds r4, #2 8015512: 1d1a adds r2, r3, #4 8015514: 681b ldr r3, [r3, #0] 8015516: 9203 str r2, [sp, #12] 8015518: ea43 73e3 orr.w r3, r3, r3, asr #31 801551c: 9305 str r3, [sp, #20] 801551e: f8df a0c8 ldr.w sl, [pc, #200] @ 80155e8 <_vfiprintf_r+0x220> 8015522: 2203 movs r2, #3 8015524: 4650 mov r0, sl 8015526: 7821 ldrb r1, [r4, #0] 8015528: f7fe ff38 bl 801439c 801552c: b138 cbz r0, 801553e <_vfiprintf_r+0x176> 801552e: 2240 movs r2, #64 @ 0x40 8015530: 9b04 ldr r3, [sp, #16] 8015532: eba0 000a sub.w r0, r0, sl 8015536: 4082 lsls r2, r0 8015538: 4313 orrs r3, r2 801553a: 3401 adds r4, #1 801553c: 9304 str r3, [sp, #16] 801553e: f814 1b01 ldrb.w r1, [r4], #1 8015542: 2206 movs r2, #6 8015544: 4829 ldr r0, [pc, #164] @ (80155ec <_vfiprintf_r+0x224>) 8015546: f88d 1028 strb.w r1, [sp, #40] @ 0x28 801554a: f7fe ff27 bl 801439c 801554e: 2800 cmp r0, #0 8015550: d03f beq.n 80155d2 <_vfiprintf_r+0x20a> 8015552: 4b27 ldr r3, [pc, #156] @ (80155f0 <_vfiprintf_r+0x228>) 8015554: bb1b cbnz r3, 801559e <_vfiprintf_r+0x1d6> 8015556: 9b03 ldr r3, [sp, #12] 8015558: 3307 adds r3, #7 801555a: f023 0307 bic.w r3, r3, #7 801555e: 3308 adds r3, #8 8015560: 9303 str r3, [sp, #12] 8015562: 9b09 ldr r3, [sp, #36] @ 0x24 8015564: 443b add r3, r7 8015566: 9309 str r3, [sp, #36] @ 0x24 8015568: e76a b.n 8015440 <_vfiprintf_r+0x78> 801556a: 460c mov r4, r1 801556c: 2001 movs r0, #1 801556e: fb0c 3202 mla r2, ip, r2, r3 8015572: e7a8 b.n 80154c6 <_vfiprintf_r+0xfe> 8015574: 2300 movs r3, #0 8015576: f04f 0c0a mov.w ip, #10 801557a: 4619 mov r1, r3 801557c: 3401 adds r4, #1 801557e: 9305 str r3, [sp, #20] 8015580: 4620 mov r0, r4 8015582: f810 2b01 ldrb.w r2, [r0], #1 8015586: 3a30 subs r2, #48 @ 0x30 8015588: 2a09 cmp r2, #9 801558a: d903 bls.n 8015594 <_vfiprintf_r+0x1cc> 801558c: 2b00 cmp r3, #0 801558e: d0c6 beq.n 801551e <_vfiprintf_r+0x156> 8015590: 9105 str r1, [sp, #20] 8015592: e7c4 b.n 801551e <_vfiprintf_r+0x156> 8015594: 4604 mov r4, r0 8015596: 2301 movs r3, #1 8015598: fb0c 2101 mla r1, ip, r1, r2 801559c: e7f0 b.n 8015580 <_vfiprintf_r+0x1b8> 801559e: ab03 add r3, sp, #12 80155a0: 9300 str r3, [sp, #0] 80155a2: 462a mov r2, r5 80155a4: 4630 mov r0, r6 80155a6: 4b13 ldr r3, [pc, #76] @ (80155f4 <_vfiprintf_r+0x22c>) 80155a8: a904 add r1, sp, #16 80155aa: f7fe f92b bl 8013804 <_printf_float> 80155ae: 4607 mov r7, r0 80155b0: 1c78 adds r0, r7, #1 80155b2: d1d6 bne.n 8015562 <_vfiprintf_r+0x19a> 80155b4: 6e6b ldr r3, [r5, #100] @ 0x64 80155b6: 07d9 lsls r1, r3, #31 80155b8: d405 bmi.n 80155c6 <_vfiprintf_r+0x1fe> 80155ba: 89ab ldrh r3, [r5, #12] 80155bc: 059a lsls r2, r3, #22 80155be: d402 bmi.n 80155c6 <_vfiprintf_r+0x1fe> 80155c0: 6da8 ldr r0, [r5, #88] @ 0x58 80155c2: f7fe fee5 bl 8014390 <__retarget_lock_release_recursive> 80155c6: 89ab ldrh r3, [r5, #12] 80155c8: 065b lsls r3, r3, #25 80155ca: f53f af1f bmi.w 801540c <_vfiprintf_r+0x44> 80155ce: 9809 ldr r0, [sp, #36] @ 0x24 80155d0: e71e b.n 8015410 <_vfiprintf_r+0x48> 80155d2: ab03 add r3, sp, #12 80155d4: 9300 str r3, [sp, #0] 80155d6: 462a mov r2, r5 80155d8: 4630 mov r0, r6 80155da: 4b06 ldr r3, [pc, #24] @ (80155f4 <_vfiprintf_r+0x22c>) 80155dc: a904 add r1, sp, #16 80155de: f7fe fbaf bl 8013d40 <_printf_i> 80155e2: e7e4 b.n 80155ae <_vfiprintf_r+0x1e6> 80155e4: 08016ec5 .word 0x08016ec5 80155e8: 08016ecb .word 0x08016ecb 80155ec: 08016ecf .word 0x08016ecf 80155f0: 08013805 .word 0x08013805 80155f4: 080153a3 .word 0x080153a3 080155f8 : 80155f8: 4b02 ldr r3, [pc, #8] @ (8015604 ) 80155fa: 4601 mov r1, r0 80155fc: 6818 ldr r0, [r3, #0] 80155fe: f000 b825 b.w 801564c <_malloc_r> 8015602: bf00 nop 8015604: 20000090 .word 0x20000090 08015608 : 8015608: b570 push {r4, r5, r6, lr} 801560a: 4e0f ldr r6, [pc, #60] @ (8015648 ) 801560c: 460c mov r4, r1 801560e: 6831 ldr r1, [r6, #0] 8015610: 4605 mov r5, r0 8015612: b911 cbnz r1, 801561a 8015614: f000 fe90 bl 8016338 <_sbrk_r> 8015618: 6030 str r0, [r6, #0] 801561a: 4621 mov r1, r4 801561c: 4628 mov r0, r5 801561e: f000 fe8b bl 8016338 <_sbrk_r> 8015622: 1c43 adds r3, r0, #1 8015624: d103 bne.n 801562e 8015626: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff 801562a: 4620 mov r0, r4 801562c: bd70 pop {r4, r5, r6, pc} 801562e: 1cc4 adds r4, r0, #3 8015630: f024 0403 bic.w r4, r4, #3 8015634: 42a0 cmp r0, r4 8015636: d0f8 beq.n 801562a 8015638: 1a21 subs r1, r4, r0 801563a: 4628 mov r0, r5 801563c: f000 fe7c bl 8016338 <_sbrk_r> 8015640: 3001 adds r0, #1 8015642: d1f2 bne.n 801562a 8015644: e7ef b.n 8015626 8015646: bf00 nop 8015648: 200011d0 .word 0x200011d0 0801564c <_malloc_r>: 801564c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8015650: 1ccd adds r5, r1, #3 8015652: f025 0503 bic.w r5, r5, #3 8015656: 3508 adds r5, #8 8015658: 2d0c cmp r5, #12 801565a: bf38 it cc 801565c: 250c movcc r5, #12 801565e: 2d00 cmp r5, #0 8015660: 4606 mov r6, r0 8015662: db01 blt.n 8015668 <_malloc_r+0x1c> 8015664: 42a9 cmp r1, r5 8015666: d904 bls.n 8015672 <_malloc_r+0x26> 8015668: 230c movs r3, #12 801566a: 6033 str r3, [r6, #0] 801566c: 2000 movs r0, #0 801566e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8015672: f8df 80d4 ldr.w r8, [pc, #212] @ 8015748 <_malloc_r+0xfc> 8015676: f000 f911 bl 801589c <__malloc_lock> 801567a: f8d8 3000 ldr.w r3, [r8] 801567e: 461c mov r4, r3 8015680: bb44 cbnz r4, 80156d4 <_malloc_r+0x88> 8015682: 4629 mov r1, r5 8015684: 4630 mov r0, r6 8015686: f7ff ffbf bl 8015608 801568a: 1c43 adds r3, r0, #1 801568c: 4604 mov r4, r0 801568e: d158 bne.n 8015742 <_malloc_r+0xf6> 8015690: f8d8 4000 ldr.w r4, [r8] 8015694: 4627 mov r7, r4 8015696: 2f00 cmp r7, #0 8015698: d143 bne.n 8015722 <_malloc_r+0xd6> 801569a: 2c00 cmp r4, #0 801569c: d04b beq.n 8015736 <_malloc_r+0xea> 801569e: 6823 ldr r3, [r4, #0] 80156a0: 4639 mov r1, r7 80156a2: 4630 mov r0, r6 80156a4: eb04 0903 add.w r9, r4, r3 80156a8: f000 fe46 bl 8016338 <_sbrk_r> 80156ac: 4581 cmp r9, r0 80156ae: d142 bne.n 8015736 <_malloc_r+0xea> 80156b0: 6821 ldr r1, [r4, #0] 80156b2: 4630 mov r0, r6 80156b4: 1a6d subs r5, r5, r1 80156b6: 4629 mov r1, r5 80156b8: f7ff ffa6 bl 8015608 80156bc: 3001 adds r0, #1 80156be: d03a beq.n 8015736 <_malloc_r+0xea> 80156c0: 6823 ldr r3, [r4, #0] 80156c2: 442b add r3, r5 80156c4: 6023 str r3, [r4, #0] 80156c6: f8d8 3000 ldr.w r3, [r8] 80156ca: 685a ldr r2, [r3, #4] 80156cc: bb62 cbnz r2, 8015728 <_malloc_r+0xdc> 80156ce: f8c8 7000 str.w r7, [r8] 80156d2: e00f b.n 80156f4 <_malloc_r+0xa8> 80156d4: 6822 ldr r2, [r4, #0] 80156d6: 1b52 subs r2, r2, r5 80156d8: d420 bmi.n 801571c <_malloc_r+0xd0> 80156da: 2a0b cmp r2, #11 80156dc: d917 bls.n 801570e <_malloc_r+0xc2> 80156de: 1961 adds r1, r4, r5 80156e0: 42a3 cmp r3, r4 80156e2: 6025 str r5, [r4, #0] 80156e4: bf18 it ne 80156e6: 6059 strne r1, [r3, #4] 80156e8: 6863 ldr r3, [r4, #4] 80156ea: bf08 it eq 80156ec: f8c8 1000 streq.w r1, [r8] 80156f0: 5162 str r2, [r4, r5] 80156f2: 604b str r3, [r1, #4] 80156f4: 4630 mov r0, r6 80156f6: f000 f8d7 bl 80158a8 <__malloc_unlock> 80156fa: f104 000b add.w r0, r4, #11 80156fe: 1d23 adds r3, r4, #4 8015700: f020 0007 bic.w r0, r0, #7 8015704: 1ac2 subs r2, r0, r3 8015706: bf1c itt ne 8015708: 1a1b subne r3, r3, r0 801570a: 50a3 strne r3, [r4, r2] 801570c: e7af b.n 801566e <_malloc_r+0x22> 801570e: 6862 ldr r2, [r4, #4] 8015710: 42a3 cmp r3, r4 8015712: bf0c ite eq 8015714: f8c8 2000 streq.w r2, [r8] 8015718: 605a strne r2, [r3, #4] 801571a: e7eb b.n 80156f4 <_malloc_r+0xa8> 801571c: 4623 mov r3, r4 801571e: 6864 ldr r4, [r4, #4] 8015720: e7ae b.n 8015680 <_malloc_r+0x34> 8015722: 463c mov r4, r7 8015724: 687f ldr r7, [r7, #4] 8015726: e7b6 b.n 8015696 <_malloc_r+0x4a> 8015728: 461a mov r2, r3 801572a: 685b ldr r3, [r3, #4] 801572c: 42a3 cmp r3, r4 801572e: d1fb bne.n 8015728 <_malloc_r+0xdc> 8015730: 2300 movs r3, #0 8015732: 6053 str r3, [r2, #4] 8015734: e7de b.n 80156f4 <_malloc_r+0xa8> 8015736: 230c movs r3, #12 8015738: 4630 mov r0, r6 801573a: 6033 str r3, [r6, #0] 801573c: f000 f8b4 bl 80158a8 <__malloc_unlock> 8015740: e794 b.n 801566c <_malloc_r+0x20> 8015742: 6005 str r5, [r0, #0] 8015744: e7d6 b.n 80156f4 <_malloc_r+0xa8> 8015746: bf00 nop 8015748: 200011d4 .word 0x200011d4 0801574c <__sflush_r>: 801574c: f9b1 200c ldrsh.w r2, [r1, #12] 8015750: b5f8 push {r3, r4, r5, r6, r7, lr} 8015752: 0716 lsls r6, r2, #28 8015754: 4605 mov r5, r0 8015756: 460c mov r4, r1 8015758: d454 bmi.n 8015804 <__sflush_r+0xb8> 801575a: 684b ldr r3, [r1, #4] 801575c: 2b00 cmp r3, #0 801575e: dc02 bgt.n 8015766 <__sflush_r+0x1a> 8015760: 6c0b ldr r3, [r1, #64] @ 0x40 8015762: 2b00 cmp r3, #0 8015764: dd48 ble.n 80157f8 <__sflush_r+0xac> 8015766: 6ae6 ldr r6, [r4, #44] @ 0x2c 8015768: 2e00 cmp r6, #0 801576a: d045 beq.n 80157f8 <__sflush_r+0xac> 801576c: 2300 movs r3, #0 801576e: f412 5280 ands.w r2, r2, #4096 @ 0x1000 8015772: 682f ldr r7, [r5, #0] 8015774: 6a21 ldr r1, [r4, #32] 8015776: 602b str r3, [r5, #0] 8015778: d030 beq.n 80157dc <__sflush_r+0x90> 801577a: 6d62 ldr r2, [r4, #84] @ 0x54 801577c: 89a3 ldrh r3, [r4, #12] 801577e: 0759 lsls r1, r3, #29 8015780: d505 bpl.n 801578e <__sflush_r+0x42> 8015782: 6863 ldr r3, [r4, #4] 8015784: 1ad2 subs r2, r2, r3 8015786: 6b63 ldr r3, [r4, #52] @ 0x34 8015788: b10b cbz r3, 801578e <__sflush_r+0x42> 801578a: 6c23 ldr r3, [r4, #64] @ 0x40 801578c: 1ad2 subs r2, r2, r3 801578e: 2300 movs r3, #0 8015790: 4628 mov r0, r5 8015792: 6ae6 ldr r6, [r4, #44] @ 0x2c 8015794: 6a21 ldr r1, [r4, #32] 8015796: 47b0 blx r6 8015798: 1c43 adds r3, r0, #1 801579a: 89a3 ldrh r3, [r4, #12] 801579c: d106 bne.n 80157ac <__sflush_r+0x60> 801579e: 6829 ldr r1, [r5, #0] 80157a0: 291d cmp r1, #29 80157a2: d82b bhi.n 80157fc <__sflush_r+0xb0> 80157a4: 4a28 ldr r2, [pc, #160] @ (8015848 <__sflush_r+0xfc>) 80157a6: 40ca lsrs r2, r1 80157a8: 07d6 lsls r6, r2, #31 80157aa: d527 bpl.n 80157fc <__sflush_r+0xb0> 80157ac: 2200 movs r2, #0 80157ae: 6062 str r2, [r4, #4] 80157b0: 6922 ldr r2, [r4, #16] 80157b2: 04d9 lsls r1, r3, #19 80157b4: 6022 str r2, [r4, #0] 80157b6: d504 bpl.n 80157c2 <__sflush_r+0x76> 80157b8: 1c42 adds r2, r0, #1 80157ba: d101 bne.n 80157c0 <__sflush_r+0x74> 80157bc: 682b ldr r3, [r5, #0] 80157be: b903 cbnz r3, 80157c2 <__sflush_r+0x76> 80157c0: 6560 str r0, [r4, #84] @ 0x54 80157c2: 6b61 ldr r1, [r4, #52] @ 0x34 80157c4: 602f str r7, [r5, #0] 80157c6: b1b9 cbz r1, 80157f8 <__sflush_r+0xac> 80157c8: f104 0344 add.w r3, r4, #68 @ 0x44 80157cc: 4299 cmp r1, r3 80157ce: d002 beq.n 80157d6 <__sflush_r+0x8a> 80157d0: 4628 mov r0, r5 80157d2: f000 fe11 bl 80163f8 <_free_r> 80157d6: 2300 movs r3, #0 80157d8: 6363 str r3, [r4, #52] @ 0x34 80157da: e00d b.n 80157f8 <__sflush_r+0xac> 80157dc: 2301 movs r3, #1 80157de: 4628 mov r0, r5 80157e0: 47b0 blx r6 80157e2: 4602 mov r2, r0 80157e4: 1c50 adds r0, r2, #1 80157e6: d1c9 bne.n 801577c <__sflush_r+0x30> 80157e8: 682b ldr r3, [r5, #0] 80157ea: 2b00 cmp r3, #0 80157ec: d0c6 beq.n 801577c <__sflush_r+0x30> 80157ee: 2b1d cmp r3, #29 80157f0: d001 beq.n 80157f6 <__sflush_r+0xaa> 80157f2: 2b16 cmp r3, #22 80157f4: d11d bne.n 8015832 <__sflush_r+0xe6> 80157f6: 602f str r7, [r5, #0] 80157f8: 2000 movs r0, #0 80157fa: e021 b.n 8015840 <__sflush_r+0xf4> 80157fc: f043 0340 orr.w r3, r3, #64 @ 0x40 8015800: b21b sxth r3, r3 8015802: e01a b.n 801583a <__sflush_r+0xee> 8015804: 690f ldr r7, [r1, #16] 8015806: 2f00 cmp r7, #0 8015808: d0f6 beq.n 80157f8 <__sflush_r+0xac> 801580a: 0793 lsls r3, r2, #30 801580c: bf18 it ne 801580e: 2300 movne r3, #0 8015810: 680e ldr r6, [r1, #0] 8015812: bf08 it eq 8015814: 694b ldreq r3, [r1, #20] 8015816: 1bf6 subs r6, r6, r7 8015818: 600f str r7, [r1, #0] 801581a: 608b str r3, [r1, #8] 801581c: 2e00 cmp r6, #0 801581e: ddeb ble.n 80157f8 <__sflush_r+0xac> 8015820: 4633 mov r3, r6 8015822: 463a mov r2, r7 8015824: 4628 mov r0, r5 8015826: 6a21 ldr r1, [r4, #32] 8015828: f8d4 c028 ldr.w ip, [r4, #40] @ 0x28 801582c: 47e0 blx ip 801582e: 2800 cmp r0, #0 8015830: dc07 bgt.n 8015842 <__sflush_r+0xf6> 8015832: f9b4 300c ldrsh.w r3, [r4, #12] 8015836: f043 0340 orr.w r3, r3, #64 @ 0x40 801583a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 801583e: 81a3 strh r3, [r4, #12] 8015840: bdf8 pop {r3, r4, r5, r6, r7, pc} 8015842: 4407 add r7, r0 8015844: 1a36 subs r6, r6, r0 8015846: e7e9 b.n 801581c <__sflush_r+0xd0> 8015848: 20400001 .word 0x20400001 0801584c <_fflush_r>: 801584c: b538 push {r3, r4, r5, lr} 801584e: 690b ldr r3, [r1, #16] 8015850: 4605 mov r5, r0 8015852: 460c mov r4, r1 8015854: b913 cbnz r3, 801585c <_fflush_r+0x10> 8015856: 2500 movs r5, #0 8015858: 4628 mov r0, r5 801585a: bd38 pop {r3, r4, r5, pc} 801585c: b118 cbz r0, 8015866 <_fflush_r+0x1a> 801585e: 6a03 ldr r3, [r0, #32] 8015860: b90b cbnz r3, 8015866 <_fflush_r+0x1a> 8015862: f7fe fc17 bl 8014094 <__sinit> 8015866: f9b4 300c ldrsh.w r3, [r4, #12] 801586a: 2b00 cmp r3, #0 801586c: d0f3 beq.n 8015856 <_fflush_r+0xa> 801586e: 6e62 ldr r2, [r4, #100] @ 0x64 8015870: 07d0 lsls r0, r2, #31 8015872: d404 bmi.n 801587e <_fflush_r+0x32> 8015874: 0599 lsls r1, r3, #22 8015876: d402 bmi.n 801587e <_fflush_r+0x32> 8015878: 6da0 ldr r0, [r4, #88] @ 0x58 801587a: f7fe fd88 bl 801438e <__retarget_lock_acquire_recursive> 801587e: 4628 mov r0, r5 8015880: 4621 mov r1, r4 8015882: f7ff ff63 bl 801574c <__sflush_r> 8015886: 6e63 ldr r3, [r4, #100] @ 0x64 8015888: 4605 mov r5, r0 801588a: 07da lsls r2, r3, #31 801588c: d4e4 bmi.n 8015858 <_fflush_r+0xc> 801588e: 89a3 ldrh r3, [r4, #12] 8015890: 059b lsls r3, r3, #22 8015892: d4e1 bmi.n 8015858 <_fflush_r+0xc> 8015894: 6da0 ldr r0, [r4, #88] @ 0x58 8015896: f7fe fd7b bl 8014390 <__retarget_lock_release_recursive> 801589a: e7dd b.n 8015858 <_fflush_r+0xc> 0801589c <__malloc_lock>: 801589c: 4801 ldr r0, [pc, #4] @ (80158a4 <__malloc_lock+0x8>) 801589e: f7fe bd76 b.w 801438e <__retarget_lock_acquire_recursive> 80158a2: bf00 nop 80158a4: 200011cc .word 0x200011cc 080158a8 <__malloc_unlock>: 80158a8: 4801 ldr r0, [pc, #4] @ (80158b0 <__malloc_unlock+0x8>) 80158aa: f7fe bd71 b.w 8014390 <__retarget_lock_release_recursive> 80158ae: bf00 nop 80158b0: 200011cc .word 0x200011cc 080158b4 <_Balloc>: 80158b4: b570 push {r4, r5, r6, lr} 80158b6: 69c6 ldr r6, [r0, #28] 80158b8: 4604 mov r4, r0 80158ba: 460d mov r5, r1 80158bc: b976 cbnz r6, 80158dc <_Balloc+0x28> 80158be: 2010 movs r0, #16 80158c0: f7ff fe9a bl 80155f8 80158c4: 4602 mov r2, r0 80158c6: 61e0 str r0, [r4, #28] 80158c8: b920 cbnz r0, 80158d4 <_Balloc+0x20> 80158ca: 216b movs r1, #107 @ 0x6b 80158cc: 4b17 ldr r3, [pc, #92] @ (801592c <_Balloc+0x78>) 80158ce: 4818 ldr r0, [pc, #96] @ (8015930 <_Balloc+0x7c>) 80158d0: f7fe fd80 bl 80143d4 <__assert_func> 80158d4: e9c0 6601 strd r6, r6, [r0, #4] 80158d8: 6006 str r6, [r0, #0] 80158da: 60c6 str r6, [r0, #12] 80158dc: 69e6 ldr r6, [r4, #28] 80158de: 68f3 ldr r3, [r6, #12] 80158e0: b183 cbz r3, 8015904 <_Balloc+0x50> 80158e2: 69e3 ldr r3, [r4, #28] 80158e4: 68db ldr r3, [r3, #12] 80158e6: f853 0025 ldr.w r0, [r3, r5, lsl #2] 80158ea: b9b8 cbnz r0, 801591c <_Balloc+0x68> 80158ec: 2101 movs r1, #1 80158ee: fa01 f605 lsl.w r6, r1, r5 80158f2: 1d72 adds r2, r6, #5 80158f4: 4620 mov r0, r4 80158f6: 0092 lsls r2, r2, #2 80158f8: f000 fd69 bl 80163ce <_calloc_r> 80158fc: b160 cbz r0, 8015918 <_Balloc+0x64> 80158fe: e9c0 5601 strd r5, r6, [r0, #4] 8015902: e00e b.n 8015922 <_Balloc+0x6e> 8015904: 2221 movs r2, #33 @ 0x21 8015906: 2104 movs r1, #4 8015908: 4620 mov r0, r4 801590a: f000 fd60 bl 80163ce <_calloc_r> 801590e: 69e3 ldr r3, [r4, #28] 8015910: 60f0 str r0, [r6, #12] 8015912: 68db ldr r3, [r3, #12] 8015914: 2b00 cmp r3, #0 8015916: d1e4 bne.n 80158e2 <_Balloc+0x2e> 8015918: 2000 movs r0, #0 801591a: bd70 pop {r4, r5, r6, pc} 801591c: 6802 ldr r2, [r0, #0] 801591e: f843 2025 str.w r2, [r3, r5, lsl #2] 8015922: 2300 movs r3, #0 8015924: e9c0 3303 strd r3, r3, [r0, #12] 8015928: e7f7 b.n 801591a <_Balloc+0x66> 801592a: bf00 nop 801592c: 08016da4 .word 0x08016da4 8015930: 08016ed6 .word 0x08016ed6 08015934 <_Bfree>: 8015934: b570 push {r4, r5, r6, lr} 8015936: 69c6 ldr r6, [r0, #28] 8015938: 4605 mov r5, r0 801593a: 460c mov r4, r1 801593c: b976 cbnz r6, 801595c <_Bfree+0x28> 801593e: 2010 movs r0, #16 8015940: f7ff fe5a bl 80155f8 8015944: 4602 mov r2, r0 8015946: 61e8 str r0, [r5, #28] 8015948: b920 cbnz r0, 8015954 <_Bfree+0x20> 801594a: 218f movs r1, #143 @ 0x8f 801594c: 4b08 ldr r3, [pc, #32] @ (8015970 <_Bfree+0x3c>) 801594e: 4809 ldr r0, [pc, #36] @ (8015974 <_Bfree+0x40>) 8015950: f7fe fd40 bl 80143d4 <__assert_func> 8015954: e9c0 6601 strd r6, r6, [r0, #4] 8015958: 6006 str r6, [r0, #0] 801595a: 60c6 str r6, [r0, #12] 801595c: b13c cbz r4, 801596e <_Bfree+0x3a> 801595e: 69eb ldr r3, [r5, #28] 8015960: 6862 ldr r2, [r4, #4] 8015962: 68db ldr r3, [r3, #12] 8015964: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8015968: 6021 str r1, [r4, #0] 801596a: f843 4022 str.w r4, [r3, r2, lsl #2] 801596e: bd70 pop {r4, r5, r6, pc} 8015970: 08016da4 .word 0x08016da4 8015974: 08016ed6 .word 0x08016ed6 08015978 <__multadd>: 8015978: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 801597c: 4607 mov r7, r0 801597e: 460c mov r4, r1 8015980: 461e mov r6, r3 8015982: 2000 movs r0, #0 8015984: 690d ldr r5, [r1, #16] 8015986: f101 0c14 add.w ip, r1, #20 801598a: f8dc 3000 ldr.w r3, [ip] 801598e: 3001 adds r0, #1 8015990: b299 uxth r1, r3 8015992: fb02 6101 mla r1, r2, r1, r6 8015996: 0c1e lsrs r6, r3, #16 8015998: 0c0b lsrs r3, r1, #16 801599a: fb02 3306 mla r3, r2, r6, r3 801599e: b289 uxth r1, r1 80159a0: eb01 4103 add.w r1, r1, r3, lsl #16 80159a4: 4285 cmp r5, r0 80159a6: ea4f 4613 mov.w r6, r3, lsr #16 80159aa: f84c 1b04 str.w r1, [ip], #4 80159ae: dcec bgt.n 801598a <__multadd+0x12> 80159b0: b30e cbz r6, 80159f6 <__multadd+0x7e> 80159b2: 68a3 ldr r3, [r4, #8] 80159b4: 42ab cmp r3, r5 80159b6: dc19 bgt.n 80159ec <__multadd+0x74> 80159b8: 6861 ldr r1, [r4, #4] 80159ba: 4638 mov r0, r7 80159bc: 3101 adds r1, #1 80159be: f7ff ff79 bl 80158b4 <_Balloc> 80159c2: 4680 mov r8, r0 80159c4: b928 cbnz r0, 80159d2 <__multadd+0x5a> 80159c6: 4602 mov r2, r0 80159c8: 21ba movs r1, #186 @ 0xba 80159ca: 4b0c ldr r3, [pc, #48] @ (80159fc <__multadd+0x84>) 80159cc: 480c ldr r0, [pc, #48] @ (8015a00 <__multadd+0x88>) 80159ce: f7fe fd01 bl 80143d4 <__assert_func> 80159d2: 6922 ldr r2, [r4, #16] 80159d4: f104 010c add.w r1, r4, #12 80159d8: 3202 adds r2, #2 80159da: 0092 lsls r2, r2, #2 80159dc: 300c adds r0, #12 80159de: f7fe fceb bl 80143b8 80159e2: 4621 mov r1, r4 80159e4: 4638 mov r0, r7 80159e6: f7ff ffa5 bl 8015934 <_Bfree> 80159ea: 4644 mov r4, r8 80159ec: eb04 0385 add.w r3, r4, r5, lsl #2 80159f0: 3501 adds r5, #1 80159f2: 615e str r6, [r3, #20] 80159f4: 6125 str r5, [r4, #16] 80159f6: 4620 mov r0, r4 80159f8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80159fc: 08016eb4 .word 0x08016eb4 8015a00: 08016ed6 .word 0x08016ed6 08015a04 <__hi0bits>: 8015a04: 4603 mov r3, r0 8015a06: f5b0 3f80 cmp.w r0, #65536 @ 0x10000 8015a0a: bf3a itte cc 8015a0c: 0403 lslcc r3, r0, #16 8015a0e: 2010 movcc r0, #16 8015a10: 2000 movcs r0, #0 8015a12: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8015a16: bf3c itt cc 8015a18: 021b lslcc r3, r3, #8 8015a1a: 3008 addcc r0, #8 8015a1c: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000 8015a20: bf3c itt cc 8015a22: 011b lslcc r3, r3, #4 8015a24: 3004 addcc r0, #4 8015a26: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8015a2a: bf3c itt cc 8015a2c: 009b lslcc r3, r3, #2 8015a2e: 3002 addcc r0, #2 8015a30: 2b00 cmp r3, #0 8015a32: db05 blt.n 8015a40 <__hi0bits+0x3c> 8015a34: f013 4f80 tst.w r3, #1073741824 @ 0x40000000 8015a38: f100 0001 add.w r0, r0, #1 8015a3c: bf08 it eq 8015a3e: 2020 moveq r0, #32 8015a40: 4770 bx lr 08015a42 <__lo0bits>: 8015a42: 6803 ldr r3, [r0, #0] 8015a44: 4602 mov r2, r0 8015a46: f013 0007 ands.w r0, r3, #7 8015a4a: d00b beq.n 8015a64 <__lo0bits+0x22> 8015a4c: 07d9 lsls r1, r3, #31 8015a4e: d421 bmi.n 8015a94 <__lo0bits+0x52> 8015a50: 0798 lsls r0, r3, #30 8015a52: bf49 itett mi 8015a54: 085b lsrmi r3, r3, #1 8015a56: 089b lsrpl r3, r3, #2 8015a58: 2001 movmi r0, #1 8015a5a: 6013 strmi r3, [r2, #0] 8015a5c: bf5c itt pl 8015a5e: 2002 movpl r0, #2 8015a60: 6013 strpl r3, [r2, #0] 8015a62: 4770 bx lr 8015a64: b299 uxth r1, r3 8015a66: b909 cbnz r1, 8015a6c <__lo0bits+0x2a> 8015a68: 2010 movs r0, #16 8015a6a: 0c1b lsrs r3, r3, #16 8015a6c: b2d9 uxtb r1, r3 8015a6e: b909 cbnz r1, 8015a74 <__lo0bits+0x32> 8015a70: 3008 adds r0, #8 8015a72: 0a1b lsrs r3, r3, #8 8015a74: 0719 lsls r1, r3, #28 8015a76: bf04 itt eq 8015a78: 091b lsreq r3, r3, #4 8015a7a: 3004 addeq r0, #4 8015a7c: 0799 lsls r1, r3, #30 8015a7e: bf04 itt eq 8015a80: 089b lsreq r3, r3, #2 8015a82: 3002 addeq r0, #2 8015a84: 07d9 lsls r1, r3, #31 8015a86: d403 bmi.n 8015a90 <__lo0bits+0x4e> 8015a88: 085b lsrs r3, r3, #1 8015a8a: f100 0001 add.w r0, r0, #1 8015a8e: d003 beq.n 8015a98 <__lo0bits+0x56> 8015a90: 6013 str r3, [r2, #0] 8015a92: 4770 bx lr 8015a94: 2000 movs r0, #0 8015a96: 4770 bx lr 8015a98: 2020 movs r0, #32 8015a9a: 4770 bx lr 08015a9c <__i2b>: 8015a9c: b510 push {r4, lr} 8015a9e: 460c mov r4, r1 8015aa0: 2101 movs r1, #1 8015aa2: f7ff ff07 bl 80158b4 <_Balloc> 8015aa6: 4602 mov r2, r0 8015aa8: b928 cbnz r0, 8015ab6 <__i2b+0x1a> 8015aaa: f240 1145 movw r1, #325 @ 0x145 8015aae: 4b04 ldr r3, [pc, #16] @ (8015ac0 <__i2b+0x24>) 8015ab0: 4804 ldr r0, [pc, #16] @ (8015ac4 <__i2b+0x28>) 8015ab2: f7fe fc8f bl 80143d4 <__assert_func> 8015ab6: 2301 movs r3, #1 8015ab8: 6144 str r4, [r0, #20] 8015aba: 6103 str r3, [r0, #16] 8015abc: bd10 pop {r4, pc} 8015abe: bf00 nop 8015ac0: 08016eb4 .word 0x08016eb4 8015ac4: 08016ed6 .word 0x08016ed6 08015ac8 <__multiply>: 8015ac8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8015acc: 4617 mov r7, r2 8015ace: 690a ldr r2, [r1, #16] 8015ad0: 693b ldr r3, [r7, #16] 8015ad2: 4689 mov r9, r1 8015ad4: 429a cmp r2, r3 8015ad6: bfa2 ittt ge 8015ad8: 463b movge r3, r7 8015ada: 460f movge r7, r1 8015adc: 4699 movge r9, r3 8015ade: 693d ldr r5, [r7, #16] 8015ae0: f8d9 a010 ldr.w sl, [r9, #16] 8015ae4: 68bb ldr r3, [r7, #8] 8015ae6: 6879 ldr r1, [r7, #4] 8015ae8: eb05 060a add.w r6, r5, sl 8015aec: 42b3 cmp r3, r6 8015aee: b085 sub sp, #20 8015af0: bfb8 it lt 8015af2: 3101 addlt r1, #1 8015af4: f7ff fede bl 80158b4 <_Balloc> 8015af8: b930 cbnz r0, 8015b08 <__multiply+0x40> 8015afa: 4602 mov r2, r0 8015afc: f44f 71b1 mov.w r1, #354 @ 0x162 8015b00: 4b40 ldr r3, [pc, #256] @ (8015c04 <__multiply+0x13c>) 8015b02: 4841 ldr r0, [pc, #260] @ (8015c08 <__multiply+0x140>) 8015b04: f7fe fc66 bl 80143d4 <__assert_func> 8015b08: f100 0414 add.w r4, r0, #20 8015b0c: 4623 mov r3, r4 8015b0e: 2200 movs r2, #0 8015b10: eb04 0e86 add.w lr, r4, r6, lsl #2 8015b14: 4573 cmp r3, lr 8015b16: d320 bcc.n 8015b5a <__multiply+0x92> 8015b18: f107 0814 add.w r8, r7, #20 8015b1c: f109 0114 add.w r1, r9, #20 8015b20: eb08 0585 add.w r5, r8, r5, lsl #2 8015b24: eb01 038a add.w r3, r1, sl, lsl #2 8015b28: 9302 str r3, [sp, #8] 8015b2a: 1beb subs r3, r5, r7 8015b2c: 3b15 subs r3, #21 8015b2e: f023 0303 bic.w r3, r3, #3 8015b32: 3304 adds r3, #4 8015b34: 3715 adds r7, #21 8015b36: 42bd cmp r5, r7 8015b38: bf38 it cc 8015b3a: 2304 movcc r3, #4 8015b3c: 9301 str r3, [sp, #4] 8015b3e: 9b02 ldr r3, [sp, #8] 8015b40: 9103 str r1, [sp, #12] 8015b42: 428b cmp r3, r1 8015b44: d80c bhi.n 8015b60 <__multiply+0x98> 8015b46: 2e00 cmp r6, #0 8015b48: dd03 ble.n 8015b52 <__multiply+0x8a> 8015b4a: f85e 3d04 ldr.w r3, [lr, #-4]! 8015b4e: 2b00 cmp r3, #0 8015b50: d055 beq.n 8015bfe <__multiply+0x136> 8015b52: 6106 str r6, [r0, #16] 8015b54: b005 add sp, #20 8015b56: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8015b5a: f843 2b04 str.w r2, [r3], #4 8015b5e: e7d9 b.n 8015b14 <__multiply+0x4c> 8015b60: f8b1 a000 ldrh.w sl, [r1] 8015b64: f1ba 0f00 cmp.w sl, #0 8015b68: d01f beq.n 8015baa <__multiply+0xe2> 8015b6a: 46c4 mov ip, r8 8015b6c: 46a1 mov r9, r4 8015b6e: 2700 movs r7, #0 8015b70: f85c 2b04 ldr.w r2, [ip], #4 8015b74: f8d9 3000 ldr.w r3, [r9] 8015b78: fa1f fb82 uxth.w fp, r2 8015b7c: b29b uxth r3, r3 8015b7e: fb0a 330b mla r3, sl, fp, r3 8015b82: 443b add r3, r7 8015b84: f8d9 7000 ldr.w r7, [r9] 8015b88: 0c12 lsrs r2, r2, #16 8015b8a: 0c3f lsrs r7, r7, #16 8015b8c: fb0a 7202 mla r2, sl, r2, r7 8015b90: eb02 4213 add.w r2, r2, r3, lsr #16 8015b94: b29b uxth r3, r3 8015b96: ea43 4302 orr.w r3, r3, r2, lsl #16 8015b9a: 4565 cmp r5, ip 8015b9c: ea4f 4712 mov.w r7, r2, lsr #16 8015ba0: f849 3b04 str.w r3, [r9], #4 8015ba4: d8e4 bhi.n 8015b70 <__multiply+0xa8> 8015ba6: 9b01 ldr r3, [sp, #4] 8015ba8: 50e7 str r7, [r4, r3] 8015baa: 9b03 ldr r3, [sp, #12] 8015bac: 3104 adds r1, #4 8015bae: f8b3 9002 ldrh.w r9, [r3, #2] 8015bb2: f1b9 0f00 cmp.w r9, #0 8015bb6: d020 beq.n 8015bfa <__multiply+0x132> 8015bb8: 4647 mov r7, r8 8015bba: 46a4 mov ip, r4 8015bbc: f04f 0a00 mov.w sl, #0 8015bc0: 6823 ldr r3, [r4, #0] 8015bc2: f8b7 b000 ldrh.w fp, [r7] 8015bc6: f8bc 2002 ldrh.w r2, [ip, #2] 8015bca: b29b uxth r3, r3 8015bcc: fb09 220b mla r2, r9, fp, r2 8015bd0: 4452 add r2, sl 8015bd2: ea43 4302 orr.w r3, r3, r2, lsl #16 8015bd6: f84c 3b04 str.w r3, [ip], #4 8015bda: f857 3b04 ldr.w r3, [r7], #4 8015bde: ea4f 4a13 mov.w sl, r3, lsr #16 8015be2: f8bc 3000 ldrh.w r3, [ip] 8015be6: 42bd cmp r5, r7 8015be8: fb09 330a mla r3, r9, sl, r3 8015bec: eb03 4312 add.w r3, r3, r2, lsr #16 8015bf0: ea4f 4a13 mov.w sl, r3, lsr #16 8015bf4: d8e5 bhi.n 8015bc2 <__multiply+0xfa> 8015bf6: 9a01 ldr r2, [sp, #4] 8015bf8: 50a3 str r3, [r4, r2] 8015bfa: 3404 adds r4, #4 8015bfc: e79f b.n 8015b3e <__multiply+0x76> 8015bfe: 3e01 subs r6, #1 8015c00: e7a1 b.n 8015b46 <__multiply+0x7e> 8015c02: bf00 nop 8015c04: 08016eb4 .word 0x08016eb4 8015c08: 08016ed6 .word 0x08016ed6 08015c0c <__pow5mult>: 8015c0c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8015c10: 4615 mov r5, r2 8015c12: f012 0203 ands.w r2, r2, #3 8015c16: 4607 mov r7, r0 8015c18: 460e mov r6, r1 8015c1a: d007 beq.n 8015c2c <__pow5mult+0x20> 8015c1c: 4c25 ldr r4, [pc, #148] @ (8015cb4 <__pow5mult+0xa8>) 8015c1e: 3a01 subs r2, #1 8015c20: 2300 movs r3, #0 8015c22: f854 2022 ldr.w r2, [r4, r2, lsl #2] 8015c26: f7ff fea7 bl 8015978 <__multadd> 8015c2a: 4606 mov r6, r0 8015c2c: 10ad asrs r5, r5, #2 8015c2e: d03d beq.n 8015cac <__pow5mult+0xa0> 8015c30: 69fc ldr r4, [r7, #28] 8015c32: b97c cbnz r4, 8015c54 <__pow5mult+0x48> 8015c34: 2010 movs r0, #16 8015c36: f7ff fcdf bl 80155f8 8015c3a: 4602 mov r2, r0 8015c3c: 61f8 str r0, [r7, #28] 8015c3e: b928 cbnz r0, 8015c4c <__pow5mult+0x40> 8015c40: f240 11b3 movw r1, #435 @ 0x1b3 8015c44: 4b1c ldr r3, [pc, #112] @ (8015cb8 <__pow5mult+0xac>) 8015c46: 481d ldr r0, [pc, #116] @ (8015cbc <__pow5mult+0xb0>) 8015c48: f7fe fbc4 bl 80143d4 <__assert_func> 8015c4c: e9c0 4401 strd r4, r4, [r0, #4] 8015c50: 6004 str r4, [r0, #0] 8015c52: 60c4 str r4, [r0, #12] 8015c54: f8d7 801c ldr.w r8, [r7, #28] 8015c58: f8d8 4008 ldr.w r4, [r8, #8] 8015c5c: b94c cbnz r4, 8015c72 <__pow5mult+0x66> 8015c5e: f240 2171 movw r1, #625 @ 0x271 8015c62: 4638 mov r0, r7 8015c64: f7ff ff1a bl 8015a9c <__i2b> 8015c68: 2300 movs r3, #0 8015c6a: 4604 mov r4, r0 8015c6c: f8c8 0008 str.w r0, [r8, #8] 8015c70: 6003 str r3, [r0, #0] 8015c72: f04f 0900 mov.w r9, #0 8015c76: 07eb lsls r3, r5, #31 8015c78: d50a bpl.n 8015c90 <__pow5mult+0x84> 8015c7a: 4631 mov r1, r6 8015c7c: 4622 mov r2, r4 8015c7e: 4638 mov r0, r7 8015c80: f7ff ff22 bl 8015ac8 <__multiply> 8015c84: 4680 mov r8, r0 8015c86: 4631 mov r1, r6 8015c88: 4638 mov r0, r7 8015c8a: f7ff fe53 bl 8015934 <_Bfree> 8015c8e: 4646 mov r6, r8 8015c90: 106d asrs r5, r5, #1 8015c92: d00b beq.n 8015cac <__pow5mult+0xa0> 8015c94: 6820 ldr r0, [r4, #0] 8015c96: b938 cbnz r0, 8015ca8 <__pow5mult+0x9c> 8015c98: 4622 mov r2, r4 8015c9a: 4621 mov r1, r4 8015c9c: 4638 mov r0, r7 8015c9e: f7ff ff13 bl 8015ac8 <__multiply> 8015ca2: 6020 str r0, [r4, #0] 8015ca4: f8c0 9000 str.w r9, [r0] 8015ca8: 4604 mov r4, r0 8015caa: e7e4 b.n 8015c76 <__pow5mult+0x6a> 8015cac: 4630 mov r0, r6 8015cae: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8015cb2: bf00 nop 8015cb4: 08016f3c .word 0x08016f3c 8015cb8: 08016da4 .word 0x08016da4 8015cbc: 08016ed6 .word 0x08016ed6 08015cc0 <__lshift>: 8015cc0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8015cc4: 460c mov r4, r1 8015cc6: 4607 mov r7, r0 8015cc8: 4691 mov r9, r2 8015cca: 6923 ldr r3, [r4, #16] 8015ccc: 6849 ldr r1, [r1, #4] 8015cce: eb03 1862 add.w r8, r3, r2, asr #5 8015cd2: 68a3 ldr r3, [r4, #8] 8015cd4: ea4f 1a62 mov.w sl, r2, asr #5 8015cd8: f108 0601 add.w r6, r8, #1 8015cdc: 42b3 cmp r3, r6 8015cde: db0b blt.n 8015cf8 <__lshift+0x38> 8015ce0: 4638 mov r0, r7 8015ce2: f7ff fde7 bl 80158b4 <_Balloc> 8015ce6: 4605 mov r5, r0 8015ce8: b948 cbnz r0, 8015cfe <__lshift+0x3e> 8015cea: 4602 mov r2, r0 8015cec: f44f 71ef mov.w r1, #478 @ 0x1de 8015cf0: 4b27 ldr r3, [pc, #156] @ (8015d90 <__lshift+0xd0>) 8015cf2: 4828 ldr r0, [pc, #160] @ (8015d94 <__lshift+0xd4>) 8015cf4: f7fe fb6e bl 80143d4 <__assert_func> 8015cf8: 3101 adds r1, #1 8015cfa: 005b lsls r3, r3, #1 8015cfc: e7ee b.n 8015cdc <__lshift+0x1c> 8015cfe: 2300 movs r3, #0 8015d00: f100 0114 add.w r1, r0, #20 8015d04: f100 0210 add.w r2, r0, #16 8015d08: 4618 mov r0, r3 8015d0a: 4553 cmp r3, sl 8015d0c: db33 blt.n 8015d76 <__lshift+0xb6> 8015d0e: 6920 ldr r0, [r4, #16] 8015d10: ea2a 7aea bic.w sl, sl, sl, asr #31 8015d14: f104 0314 add.w r3, r4, #20 8015d18: f019 091f ands.w r9, r9, #31 8015d1c: eb01 018a add.w r1, r1, sl, lsl #2 8015d20: eb03 0c80 add.w ip, r3, r0, lsl #2 8015d24: d02b beq.n 8015d7e <__lshift+0xbe> 8015d26: 468a mov sl, r1 8015d28: 2200 movs r2, #0 8015d2a: f1c9 0e20 rsb lr, r9, #32 8015d2e: 6818 ldr r0, [r3, #0] 8015d30: fa00 f009 lsl.w r0, r0, r9 8015d34: 4310 orrs r0, r2 8015d36: f84a 0b04 str.w r0, [sl], #4 8015d3a: f853 2b04 ldr.w r2, [r3], #4 8015d3e: 459c cmp ip, r3 8015d40: fa22 f20e lsr.w r2, r2, lr 8015d44: d8f3 bhi.n 8015d2e <__lshift+0x6e> 8015d46: ebac 0304 sub.w r3, ip, r4 8015d4a: 3b15 subs r3, #21 8015d4c: f023 0303 bic.w r3, r3, #3 8015d50: 3304 adds r3, #4 8015d52: f104 0015 add.w r0, r4, #21 8015d56: 4560 cmp r0, ip 8015d58: bf88 it hi 8015d5a: 2304 movhi r3, #4 8015d5c: 50ca str r2, [r1, r3] 8015d5e: b10a cbz r2, 8015d64 <__lshift+0xa4> 8015d60: f108 0602 add.w r6, r8, #2 8015d64: 3e01 subs r6, #1 8015d66: 4638 mov r0, r7 8015d68: 4621 mov r1, r4 8015d6a: 612e str r6, [r5, #16] 8015d6c: f7ff fde2 bl 8015934 <_Bfree> 8015d70: 4628 mov r0, r5 8015d72: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8015d76: f842 0f04 str.w r0, [r2, #4]! 8015d7a: 3301 adds r3, #1 8015d7c: e7c5 b.n 8015d0a <__lshift+0x4a> 8015d7e: 3904 subs r1, #4 8015d80: f853 2b04 ldr.w r2, [r3], #4 8015d84: 459c cmp ip, r3 8015d86: f841 2f04 str.w r2, [r1, #4]! 8015d8a: d8f9 bhi.n 8015d80 <__lshift+0xc0> 8015d8c: e7ea b.n 8015d64 <__lshift+0xa4> 8015d8e: bf00 nop 8015d90: 08016eb4 .word 0x08016eb4 8015d94: 08016ed6 .word 0x08016ed6 08015d98 <__mcmp>: 8015d98: 4603 mov r3, r0 8015d9a: 690a ldr r2, [r1, #16] 8015d9c: 6900 ldr r0, [r0, #16] 8015d9e: b530 push {r4, r5, lr} 8015da0: 1a80 subs r0, r0, r2 8015da2: d10e bne.n 8015dc2 <__mcmp+0x2a> 8015da4: 3314 adds r3, #20 8015da6: 3114 adds r1, #20 8015da8: eb03 0482 add.w r4, r3, r2, lsl #2 8015dac: eb01 0182 add.w r1, r1, r2, lsl #2 8015db0: f854 5d04 ldr.w r5, [r4, #-4]! 8015db4: f851 2d04 ldr.w r2, [r1, #-4]! 8015db8: 4295 cmp r5, r2 8015dba: d003 beq.n 8015dc4 <__mcmp+0x2c> 8015dbc: d205 bcs.n 8015dca <__mcmp+0x32> 8015dbe: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8015dc2: bd30 pop {r4, r5, pc} 8015dc4: 42a3 cmp r3, r4 8015dc6: d3f3 bcc.n 8015db0 <__mcmp+0x18> 8015dc8: e7fb b.n 8015dc2 <__mcmp+0x2a> 8015dca: 2001 movs r0, #1 8015dcc: e7f9 b.n 8015dc2 <__mcmp+0x2a> ... 08015dd0 <__mdiff>: 8015dd0: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8015dd4: 4689 mov r9, r1 8015dd6: 4606 mov r6, r0 8015dd8: 4611 mov r1, r2 8015dda: 4648 mov r0, r9 8015ddc: 4614 mov r4, r2 8015dde: f7ff ffdb bl 8015d98 <__mcmp> 8015de2: 1e05 subs r5, r0, #0 8015de4: d112 bne.n 8015e0c <__mdiff+0x3c> 8015de6: 4629 mov r1, r5 8015de8: 4630 mov r0, r6 8015dea: f7ff fd63 bl 80158b4 <_Balloc> 8015dee: 4602 mov r2, r0 8015df0: b928 cbnz r0, 8015dfe <__mdiff+0x2e> 8015df2: f240 2137 movw r1, #567 @ 0x237 8015df6: 4b3e ldr r3, [pc, #248] @ (8015ef0 <__mdiff+0x120>) 8015df8: 483e ldr r0, [pc, #248] @ (8015ef4 <__mdiff+0x124>) 8015dfa: f7fe faeb bl 80143d4 <__assert_func> 8015dfe: 2301 movs r3, #1 8015e00: e9c0 3504 strd r3, r5, [r0, #16] 8015e04: 4610 mov r0, r2 8015e06: b003 add sp, #12 8015e08: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8015e0c: bfbc itt lt 8015e0e: 464b movlt r3, r9 8015e10: 46a1 movlt r9, r4 8015e12: 4630 mov r0, r6 8015e14: f8d9 1004 ldr.w r1, [r9, #4] 8015e18: bfba itte lt 8015e1a: 461c movlt r4, r3 8015e1c: 2501 movlt r5, #1 8015e1e: 2500 movge r5, #0 8015e20: f7ff fd48 bl 80158b4 <_Balloc> 8015e24: 4602 mov r2, r0 8015e26: b918 cbnz r0, 8015e30 <__mdiff+0x60> 8015e28: f240 2145 movw r1, #581 @ 0x245 8015e2c: 4b30 ldr r3, [pc, #192] @ (8015ef0 <__mdiff+0x120>) 8015e2e: e7e3 b.n 8015df8 <__mdiff+0x28> 8015e30: f100 0b14 add.w fp, r0, #20 8015e34: f8d9 7010 ldr.w r7, [r9, #16] 8015e38: f109 0310 add.w r3, r9, #16 8015e3c: 60c5 str r5, [r0, #12] 8015e3e: f04f 0c00 mov.w ip, #0 8015e42: f109 0514 add.w r5, r9, #20 8015e46: 46d9 mov r9, fp 8015e48: 6926 ldr r6, [r4, #16] 8015e4a: f104 0e14 add.w lr, r4, #20 8015e4e: eb05 0887 add.w r8, r5, r7, lsl #2 8015e52: eb0e 0686 add.w r6, lr, r6, lsl #2 8015e56: 9301 str r3, [sp, #4] 8015e58: 9b01 ldr r3, [sp, #4] 8015e5a: f85e 0b04 ldr.w r0, [lr], #4 8015e5e: f853 af04 ldr.w sl, [r3, #4]! 8015e62: b281 uxth r1, r0 8015e64: 9301 str r3, [sp, #4] 8015e66: fa1f f38a uxth.w r3, sl 8015e6a: 1a5b subs r3, r3, r1 8015e6c: 0c00 lsrs r0, r0, #16 8015e6e: 4463 add r3, ip 8015e70: ebc0 401a rsb r0, r0, sl, lsr #16 8015e74: eb00 4023 add.w r0, r0, r3, asr #16 8015e78: b29b uxth r3, r3 8015e7a: ea43 4300 orr.w r3, r3, r0, lsl #16 8015e7e: 4576 cmp r6, lr 8015e80: ea4f 4c20 mov.w ip, r0, asr #16 8015e84: f849 3b04 str.w r3, [r9], #4 8015e88: d8e6 bhi.n 8015e58 <__mdiff+0x88> 8015e8a: 1b33 subs r3, r6, r4 8015e8c: 3b15 subs r3, #21 8015e8e: f023 0303 bic.w r3, r3, #3 8015e92: 3415 adds r4, #21 8015e94: 3304 adds r3, #4 8015e96: 42a6 cmp r6, r4 8015e98: bf38 it cc 8015e9a: 2304 movcc r3, #4 8015e9c: 441d add r5, r3 8015e9e: 445b add r3, fp 8015ea0: 461e mov r6, r3 8015ea2: 462c mov r4, r5 8015ea4: 4544 cmp r4, r8 8015ea6: d30e bcc.n 8015ec6 <__mdiff+0xf6> 8015ea8: f108 0103 add.w r1, r8, #3 8015eac: 1b49 subs r1, r1, r5 8015eae: f021 0103 bic.w r1, r1, #3 8015eb2: 3d03 subs r5, #3 8015eb4: 45a8 cmp r8, r5 8015eb6: bf38 it cc 8015eb8: 2100 movcc r1, #0 8015eba: 440b add r3, r1 8015ebc: f853 1d04 ldr.w r1, [r3, #-4]! 8015ec0: b199 cbz r1, 8015eea <__mdiff+0x11a> 8015ec2: 6117 str r7, [r2, #16] 8015ec4: e79e b.n 8015e04 <__mdiff+0x34> 8015ec6: 46e6 mov lr, ip 8015ec8: f854 1b04 ldr.w r1, [r4], #4 8015ecc: fa1f fc81 uxth.w ip, r1 8015ed0: 44f4 add ip, lr 8015ed2: 0c08 lsrs r0, r1, #16 8015ed4: 4471 add r1, lr 8015ed6: eb00 402c add.w r0, r0, ip, asr #16 8015eda: b289 uxth r1, r1 8015edc: ea41 4100 orr.w r1, r1, r0, lsl #16 8015ee0: ea4f 4c20 mov.w ip, r0, asr #16 8015ee4: f846 1b04 str.w r1, [r6], #4 8015ee8: e7dc b.n 8015ea4 <__mdiff+0xd4> 8015eea: 3f01 subs r7, #1 8015eec: e7e6 b.n 8015ebc <__mdiff+0xec> 8015eee: bf00 nop 8015ef0: 08016eb4 .word 0x08016eb4 8015ef4: 08016ed6 .word 0x08016ed6 08015ef8 <__d2b>: 8015ef8: e92d 4373 stmdb sp!, {r0, r1, r4, r5, r6, r8, r9, lr} 8015efc: 2101 movs r1, #1 8015efe: 4690 mov r8, r2 8015f00: 4699 mov r9, r3 8015f02: 9e08 ldr r6, [sp, #32] 8015f04: f7ff fcd6 bl 80158b4 <_Balloc> 8015f08: 4604 mov r4, r0 8015f0a: b930 cbnz r0, 8015f1a <__d2b+0x22> 8015f0c: 4602 mov r2, r0 8015f0e: f240 310f movw r1, #783 @ 0x30f 8015f12: 4b23 ldr r3, [pc, #140] @ (8015fa0 <__d2b+0xa8>) 8015f14: 4823 ldr r0, [pc, #140] @ (8015fa4 <__d2b+0xac>) 8015f16: f7fe fa5d bl 80143d4 <__assert_func> 8015f1a: f3c9 550a ubfx r5, r9, #20, #11 8015f1e: f3c9 0313 ubfx r3, r9, #0, #20 8015f22: b10d cbz r5, 8015f28 <__d2b+0x30> 8015f24: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8015f28: 9301 str r3, [sp, #4] 8015f2a: f1b8 0300 subs.w r3, r8, #0 8015f2e: d024 beq.n 8015f7a <__d2b+0x82> 8015f30: 4668 mov r0, sp 8015f32: 9300 str r3, [sp, #0] 8015f34: f7ff fd85 bl 8015a42 <__lo0bits> 8015f38: e9dd 1200 ldrd r1, r2, [sp] 8015f3c: b1d8 cbz r0, 8015f76 <__d2b+0x7e> 8015f3e: f1c0 0320 rsb r3, r0, #32 8015f42: fa02 f303 lsl.w r3, r2, r3 8015f46: 430b orrs r3, r1 8015f48: 40c2 lsrs r2, r0 8015f4a: 6163 str r3, [r4, #20] 8015f4c: 9201 str r2, [sp, #4] 8015f4e: 9b01 ldr r3, [sp, #4] 8015f50: 2b00 cmp r3, #0 8015f52: bf0c ite eq 8015f54: 2201 moveq r2, #1 8015f56: 2202 movne r2, #2 8015f58: 61a3 str r3, [r4, #24] 8015f5a: 6122 str r2, [r4, #16] 8015f5c: b1ad cbz r5, 8015f8a <__d2b+0x92> 8015f5e: f2a5 4533 subw r5, r5, #1075 @ 0x433 8015f62: 4405 add r5, r0 8015f64: 6035 str r5, [r6, #0] 8015f66: f1c0 0035 rsb r0, r0, #53 @ 0x35 8015f6a: 9b09 ldr r3, [sp, #36] @ 0x24 8015f6c: 6018 str r0, [r3, #0] 8015f6e: 4620 mov r0, r4 8015f70: b002 add sp, #8 8015f72: e8bd 8370 ldmia.w sp!, {r4, r5, r6, r8, r9, pc} 8015f76: 6161 str r1, [r4, #20] 8015f78: e7e9 b.n 8015f4e <__d2b+0x56> 8015f7a: a801 add r0, sp, #4 8015f7c: f7ff fd61 bl 8015a42 <__lo0bits> 8015f80: 9b01 ldr r3, [sp, #4] 8015f82: 2201 movs r2, #1 8015f84: 6163 str r3, [r4, #20] 8015f86: 3020 adds r0, #32 8015f88: e7e7 b.n 8015f5a <__d2b+0x62> 8015f8a: f2a0 4032 subw r0, r0, #1074 @ 0x432 8015f8e: eb04 0382 add.w r3, r4, r2, lsl #2 8015f92: 6030 str r0, [r6, #0] 8015f94: 6918 ldr r0, [r3, #16] 8015f96: f7ff fd35 bl 8015a04 <__hi0bits> 8015f9a: ebc0 1042 rsb r0, r0, r2, lsl #5 8015f9e: e7e4 b.n 8015f6a <__d2b+0x72> 8015fa0: 08016eb4 .word 0x08016eb4 8015fa4: 08016ed6 .word 0x08016ed6 08015fa8 <__sread>: 8015fa8: b510 push {r4, lr} 8015faa: 460c mov r4, r1 8015fac: f9b1 100e ldrsh.w r1, [r1, #14] 8015fb0: f000 f9b0 bl 8016314 <_read_r> 8015fb4: 2800 cmp r0, #0 8015fb6: bfab itete ge 8015fb8: 6d63 ldrge r3, [r4, #84] @ 0x54 8015fba: 89a3 ldrhlt r3, [r4, #12] 8015fbc: 181b addge r3, r3, r0 8015fbe: f423 5380 biclt.w r3, r3, #4096 @ 0x1000 8015fc2: bfac ite ge 8015fc4: 6563 strge r3, [r4, #84] @ 0x54 8015fc6: 81a3 strhlt r3, [r4, #12] 8015fc8: bd10 pop {r4, pc} 08015fca <__swrite>: 8015fca: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8015fce: 461f mov r7, r3 8015fd0: 898b ldrh r3, [r1, #12] 8015fd2: 4605 mov r5, r0 8015fd4: 05db lsls r3, r3, #23 8015fd6: 460c mov r4, r1 8015fd8: 4616 mov r6, r2 8015fda: d505 bpl.n 8015fe8 <__swrite+0x1e> 8015fdc: 2302 movs r3, #2 8015fde: 2200 movs r2, #0 8015fe0: f9b1 100e ldrsh.w r1, [r1, #14] 8015fe4: f000 f984 bl 80162f0 <_lseek_r> 8015fe8: 89a3 ldrh r3, [r4, #12] 8015fea: 4632 mov r2, r6 8015fec: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8015ff0: 81a3 strh r3, [r4, #12] 8015ff2: 4628 mov r0, r5 8015ff4: 463b mov r3, r7 8015ff6: f9b4 100e ldrsh.w r1, [r4, #14] 8015ffa: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8015ffe: f000 b9ab b.w 8016358 <_write_r> 08016002 <__sseek>: 8016002: b510 push {r4, lr} 8016004: 460c mov r4, r1 8016006: f9b1 100e ldrsh.w r1, [r1, #14] 801600a: f000 f971 bl 80162f0 <_lseek_r> 801600e: 1c43 adds r3, r0, #1 8016010: 89a3 ldrh r3, [r4, #12] 8016012: bf15 itete ne 8016014: 6560 strne r0, [r4, #84] @ 0x54 8016016: f423 5380 biceq.w r3, r3, #4096 @ 0x1000 801601a: f443 5380 orrne.w r3, r3, #4096 @ 0x1000 801601e: 81a3 strheq r3, [r4, #12] 8016020: bf18 it ne 8016022: 81a3 strhne r3, [r4, #12] 8016024: bd10 pop {r4, pc} 08016026 <__sclose>: 8016026: f9b1 100e ldrsh.w r1, [r1, #14] 801602a: f000 b9a7 b.w 801637c <_close_r> ... 08016030 : 8016030: b40e push {r1, r2, r3} 8016032: b503 push {r0, r1, lr} 8016034: 4601 mov r1, r0 8016036: ab03 add r3, sp, #12 8016038: 4805 ldr r0, [pc, #20] @ (8016050 ) 801603a: f853 2b04 ldr.w r2, [r3], #4 801603e: 6800 ldr r0, [r0, #0] 8016040: 9301 str r3, [sp, #4] 8016042: f7ff f9c1 bl 80153c8 <_vfiprintf_r> 8016046: b002 add sp, #8 8016048: f85d eb04 ldr.w lr, [sp], #4 801604c: b003 add sp, #12 801604e: 4770 bx lr 8016050: 20000090 .word 0x20000090 08016054 <_realloc_r>: 8016054: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8016058: 4607 mov r7, r0 801605a: 4614 mov r4, r2 801605c: 460d mov r5, r1 801605e: b921 cbnz r1, 801606a <_realloc_r+0x16> 8016060: 4611 mov r1, r2 8016062: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8016066: f7ff baf1 b.w 801564c <_malloc_r> 801606a: b92a cbnz r2, 8016078 <_realloc_r+0x24> 801606c: f000 f9c4 bl 80163f8 <_free_r> 8016070: 4625 mov r5, r4 8016072: 4628 mov r0, r5 8016074: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8016078: f000 fa18 bl 80164ac <_malloc_usable_size_r> 801607c: 4284 cmp r4, r0 801607e: 4606 mov r6, r0 8016080: d802 bhi.n 8016088 <_realloc_r+0x34> 8016082: ebb4 0f50 cmp.w r4, r0, lsr #1 8016086: d8f4 bhi.n 8016072 <_realloc_r+0x1e> 8016088: 4621 mov r1, r4 801608a: 4638 mov r0, r7 801608c: f7ff fade bl 801564c <_malloc_r> 8016090: 4680 mov r8, r0 8016092: b908 cbnz r0, 8016098 <_realloc_r+0x44> 8016094: 4645 mov r5, r8 8016096: e7ec b.n 8016072 <_realloc_r+0x1e> 8016098: 42b4 cmp r4, r6 801609a: 4622 mov r2, r4 801609c: 4629 mov r1, r5 801609e: bf28 it cs 80160a0: 4632 movcs r2, r6 80160a2: f7fe f989 bl 80143b8 80160a6: 4629 mov r1, r5 80160a8: 4638 mov r0, r7 80160aa: f000 f9a5 bl 80163f8 <_free_r> 80160ae: e7f1 b.n 8016094 <_realloc_r+0x40> 080160b0 <__swbuf_r>: 80160b0: b5f8 push {r3, r4, r5, r6, r7, lr} 80160b2: 460e mov r6, r1 80160b4: 4614 mov r4, r2 80160b6: 4605 mov r5, r0 80160b8: b118 cbz r0, 80160c2 <__swbuf_r+0x12> 80160ba: 6a03 ldr r3, [r0, #32] 80160bc: b90b cbnz r3, 80160c2 <__swbuf_r+0x12> 80160be: f7fd ffe9 bl 8014094 <__sinit> 80160c2: 69a3 ldr r3, [r4, #24] 80160c4: 60a3 str r3, [r4, #8] 80160c6: 89a3 ldrh r3, [r4, #12] 80160c8: 071a lsls r2, r3, #28 80160ca: d501 bpl.n 80160d0 <__swbuf_r+0x20> 80160cc: 6923 ldr r3, [r4, #16] 80160ce: b943 cbnz r3, 80160e2 <__swbuf_r+0x32> 80160d0: 4621 mov r1, r4 80160d2: 4628 mov r0, r5 80160d4: f000 f82a bl 801612c <__swsetup_r> 80160d8: b118 cbz r0, 80160e2 <__swbuf_r+0x32> 80160da: f04f 37ff mov.w r7, #4294967295 @ 0xffffffff 80160de: 4638 mov r0, r7 80160e0: bdf8 pop {r3, r4, r5, r6, r7, pc} 80160e2: 6823 ldr r3, [r4, #0] 80160e4: 6922 ldr r2, [r4, #16] 80160e6: b2f6 uxtb r6, r6 80160e8: 1a98 subs r0, r3, r2 80160ea: 6963 ldr r3, [r4, #20] 80160ec: 4637 mov r7, r6 80160ee: 4283 cmp r3, r0 80160f0: dc05 bgt.n 80160fe <__swbuf_r+0x4e> 80160f2: 4621 mov r1, r4 80160f4: 4628 mov r0, r5 80160f6: f7ff fba9 bl 801584c <_fflush_r> 80160fa: 2800 cmp r0, #0 80160fc: d1ed bne.n 80160da <__swbuf_r+0x2a> 80160fe: 68a3 ldr r3, [r4, #8] 8016100: 3b01 subs r3, #1 8016102: 60a3 str r3, [r4, #8] 8016104: 6823 ldr r3, [r4, #0] 8016106: 1c5a adds r2, r3, #1 8016108: 6022 str r2, [r4, #0] 801610a: 701e strb r6, [r3, #0] 801610c: 6962 ldr r2, [r4, #20] 801610e: 1c43 adds r3, r0, #1 8016110: 429a cmp r2, r3 8016112: d004 beq.n 801611e <__swbuf_r+0x6e> 8016114: 89a3 ldrh r3, [r4, #12] 8016116: 07db lsls r3, r3, #31 8016118: d5e1 bpl.n 80160de <__swbuf_r+0x2e> 801611a: 2e0a cmp r6, #10 801611c: d1df bne.n 80160de <__swbuf_r+0x2e> 801611e: 4621 mov r1, r4 8016120: 4628 mov r0, r5 8016122: f7ff fb93 bl 801584c <_fflush_r> 8016126: 2800 cmp r0, #0 8016128: d0d9 beq.n 80160de <__swbuf_r+0x2e> 801612a: e7d6 b.n 80160da <__swbuf_r+0x2a> 0801612c <__swsetup_r>: 801612c: b538 push {r3, r4, r5, lr} 801612e: 4b29 ldr r3, [pc, #164] @ (80161d4 <__swsetup_r+0xa8>) 8016130: 4605 mov r5, r0 8016132: 6818 ldr r0, [r3, #0] 8016134: 460c mov r4, r1 8016136: b118 cbz r0, 8016140 <__swsetup_r+0x14> 8016138: 6a03 ldr r3, [r0, #32] 801613a: b90b cbnz r3, 8016140 <__swsetup_r+0x14> 801613c: f7fd ffaa bl 8014094 <__sinit> 8016140: f9b4 300c ldrsh.w r3, [r4, #12] 8016144: 0719 lsls r1, r3, #28 8016146: d422 bmi.n 801618e <__swsetup_r+0x62> 8016148: 06da lsls r2, r3, #27 801614a: d407 bmi.n 801615c <__swsetup_r+0x30> 801614c: 2209 movs r2, #9 801614e: 602a str r2, [r5, #0] 8016150: f043 0340 orr.w r3, r3, #64 @ 0x40 8016154: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8016158: 81a3 strh r3, [r4, #12] 801615a: e033 b.n 80161c4 <__swsetup_r+0x98> 801615c: 0758 lsls r0, r3, #29 801615e: d512 bpl.n 8016186 <__swsetup_r+0x5a> 8016160: 6b61 ldr r1, [r4, #52] @ 0x34 8016162: b141 cbz r1, 8016176 <__swsetup_r+0x4a> 8016164: f104 0344 add.w r3, r4, #68 @ 0x44 8016168: 4299 cmp r1, r3 801616a: d002 beq.n 8016172 <__swsetup_r+0x46> 801616c: 4628 mov r0, r5 801616e: f000 f943 bl 80163f8 <_free_r> 8016172: 2300 movs r3, #0 8016174: 6363 str r3, [r4, #52] @ 0x34 8016176: 89a3 ldrh r3, [r4, #12] 8016178: f023 0324 bic.w r3, r3, #36 @ 0x24 801617c: 81a3 strh r3, [r4, #12] 801617e: 2300 movs r3, #0 8016180: 6063 str r3, [r4, #4] 8016182: 6923 ldr r3, [r4, #16] 8016184: 6023 str r3, [r4, #0] 8016186: 89a3 ldrh r3, [r4, #12] 8016188: f043 0308 orr.w r3, r3, #8 801618c: 81a3 strh r3, [r4, #12] 801618e: 6923 ldr r3, [r4, #16] 8016190: b94b cbnz r3, 80161a6 <__swsetup_r+0x7a> 8016192: 89a3 ldrh r3, [r4, #12] 8016194: f403 7320 and.w r3, r3, #640 @ 0x280 8016198: f5b3 7f00 cmp.w r3, #512 @ 0x200 801619c: d003 beq.n 80161a6 <__swsetup_r+0x7a> 801619e: 4621 mov r1, r4 80161a0: 4628 mov r0, r5 80161a2: f000 f83e bl 8016222 <__smakebuf_r> 80161a6: f9b4 300c ldrsh.w r3, [r4, #12] 80161aa: f013 0201 ands.w r2, r3, #1 80161ae: d00a beq.n 80161c6 <__swsetup_r+0x9a> 80161b0: 2200 movs r2, #0 80161b2: 60a2 str r2, [r4, #8] 80161b4: 6962 ldr r2, [r4, #20] 80161b6: 4252 negs r2, r2 80161b8: 61a2 str r2, [r4, #24] 80161ba: 6922 ldr r2, [r4, #16] 80161bc: b942 cbnz r2, 80161d0 <__swsetup_r+0xa4> 80161be: f013 0080 ands.w r0, r3, #128 @ 0x80 80161c2: d1c5 bne.n 8016150 <__swsetup_r+0x24> 80161c4: bd38 pop {r3, r4, r5, pc} 80161c6: 0799 lsls r1, r3, #30 80161c8: bf58 it pl 80161ca: 6962 ldrpl r2, [r4, #20] 80161cc: 60a2 str r2, [r4, #8] 80161ce: e7f4 b.n 80161ba <__swsetup_r+0x8e> 80161d0: 2000 movs r0, #0 80161d2: e7f7 b.n 80161c4 <__swsetup_r+0x98> 80161d4: 20000090 .word 0x20000090 080161d8 <__swhatbuf_r>: 80161d8: b570 push {r4, r5, r6, lr} 80161da: 460c mov r4, r1 80161dc: f9b1 100e ldrsh.w r1, [r1, #14] 80161e0: 4615 mov r5, r2 80161e2: 2900 cmp r1, #0 80161e4: 461e mov r6, r3 80161e6: b096 sub sp, #88 @ 0x58 80161e8: da0c bge.n 8016204 <__swhatbuf_r+0x2c> 80161ea: 89a3 ldrh r3, [r4, #12] 80161ec: 2100 movs r1, #0 80161ee: f013 0f80 tst.w r3, #128 @ 0x80 80161f2: bf14 ite ne 80161f4: 2340 movne r3, #64 @ 0x40 80161f6: f44f 6380 moveq.w r3, #1024 @ 0x400 80161fa: 2000 movs r0, #0 80161fc: 6031 str r1, [r6, #0] 80161fe: 602b str r3, [r5, #0] 8016200: b016 add sp, #88 @ 0x58 8016202: bd70 pop {r4, r5, r6, pc} 8016204: 466a mov r2, sp 8016206: f000 f8c9 bl 801639c <_fstat_r> 801620a: 2800 cmp r0, #0 801620c: dbed blt.n 80161ea <__swhatbuf_r+0x12> 801620e: 9901 ldr r1, [sp, #4] 8016210: f401 4170 and.w r1, r1, #61440 @ 0xf000 8016214: f5a1 5300 sub.w r3, r1, #8192 @ 0x2000 8016218: 4259 negs r1, r3 801621a: 4159 adcs r1, r3 801621c: f44f 6380 mov.w r3, #1024 @ 0x400 8016220: e7eb b.n 80161fa <__swhatbuf_r+0x22> 08016222 <__smakebuf_r>: 8016222: 898b ldrh r3, [r1, #12] 8016224: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 8016226: 079d lsls r5, r3, #30 8016228: 4606 mov r6, r0 801622a: 460c mov r4, r1 801622c: d507 bpl.n 801623e <__smakebuf_r+0x1c> 801622e: f104 0347 add.w r3, r4, #71 @ 0x47 8016232: 6023 str r3, [r4, #0] 8016234: 6123 str r3, [r4, #16] 8016236: 2301 movs r3, #1 8016238: 6163 str r3, [r4, #20] 801623a: b003 add sp, #12 801623c: bdf0 pop {r4, r5, r6, r7, pc} 801623e: 466a mov r2, sp 8016240: ab01 add r3, sp, #4 8016242: f7ff ffc9 bl 80161d8 <__swhatbuf_r> 8016246: 9f00 ldr r7, [sp, #0] 8016248: 4605 mov r5, r0 801624a: 4639 mov r1, r7 801624c: 4630 mov r0, r6 801624e: f7ff f9fd bl 801564c <_malloc_r> 8016252: b948 cbnz r0, 8016268 <__smakebuf_r+0x46> 8016254: f9b4 300c ldrsh.w r3, [r4, #12] 8016258: 059a lsls r2, r3, #22 801625a: d4ee bmi.n 801623a <__smakebuf_r+0x18> 801625c: f023 0303 bic.w r3, r3, #3 8016260: f043 0302 orr.w r3, r3, #2 8016264: 81a3 strh r3, [r4, #12] 8016266: e7e2 b.n 801622e <__smakebuf_r+0xc> 8016268: 89a3 ldrh r3, [r4, #12] 801626a: e9c4 0704 strd r0, r7, [r4, #16] 801626e: f043 0380 orr.w r3, r3, #128 @ 0x80 8016272: 81a3 strh r3, [r4, #12] 8016274: 9b01 ldr r3, [sp, #4] 8016276: 6020 str r0, [r4, #0] 8016278: b15b cbz r3, 8016292 <__smakebuf_r+0x70> 801627a: 4630 mov r0, r6 801627c: f9b4 100e ldrsh.w r1, [r4, #14] 8016280: f000 f826 bl 80162d0 <_isatty_r> 8016284: b128 cbz r0, 8016292 <__smakebuf_r+0x70> 8016286: 89a3 ldrh r3, [r4, #12] 8016288: f023 0303 bic.w r3, r3, #3 801628c: f043 0301 orr.w r3, r3, #1 8016290: 81a3 strh r3, [r4, #12] 8016292: 89a3 ldrh r3, [r4, #12] 8016294: 431d orrs r5, r3 8016296: 81a5 strh r5, [r4, #12] 8016298: e7cf b.n 801623a <__smakebuf_r+0x18> 0801629a : 801629a: 4288 cmp r0, r1 801629c: b510 push {r4, lr} 801629e: eb01 0402 add.w r4, r1, r2 80162a2: d902 bls.n 80162aa 80162a4: 4284 cmp r4, r0 80162a6: 4623 mov r3, r4 80162a8: d807 bhi.n 80162ba 80162aa: 1e43 subs r3, r0, #1 80162ac: 42a1 cmp r1, r4 80162ae: d008 beq.n 80162c2 80162b0: f811 2b01 ldrb.w r2, [r1], #1 80162b4: f803 2f01 strb.w r2, [r3, #1]! 80162b8: e7f8 b.n 80162ac 80162ba: 4601 mov r1, r0 80162bc: 4402 add r2, r0 80162be: 428a cmp r2, r1 80162c0: d100 bne.n 80162c4 80162c2: bd10 pop {r4, pc} 80162c4: f813 4d01 ldrb.w r4, [r3, #-1]! 80162c8: f802 4d01 strb.w r4, [r2, #-1]! 80162cc: e7f7 b.n 80162be ... 080162d0 <_isatty_r>: 80162d0: b538 push {r3, r4, r5, lr} 80162d2: 2300 movs r3, #0 80162d4: 4d05 ldr r5, [pc, #20] @ (80162ec <_isatty_r+0x1c>) 80162d6: 4604 mov r4, r0 80162d8: 4608 mov r0, r1 80162da: 602b str r3, [r5, #0] 80162dc: f7f7 ff49 bl 800e172 <_isatty> 80162e0: 1c43 adds r3, r0, #1 80162e2: d102 bne.n 80162ea <_isatty_r+0x1a> 80162e4: 682b ldr r3, [r5, #0] 80162e6: b103 cbz r3, 80162ea <_isatty_r+0x1a> 80162e8: 6023 str r3, [r4, #0] 80162ea: bd38 pop {r3, r4, r5, pc} 80162ec: 200011d8 .word 0x200011d8 080162f0 <_lseek_r>: 80162f0: b538 push {r3, r4, r5, lr} 80162f2: 4604 mov r4, r0 80162f4: 4608 mov r0, r1 80162f6: 4611 mov r1, r2 80162f8: 2200 movs r2, #0 80162fa: 4d05 ldr r5, [pc, #20] @ (8016310 <_lseek_r+0x20>) 80162fc: 602a str r2, [r5, #0] 80162fe: 461a mov r2, r3 8016300: f7f7 ff41 bl 800e186 <_lseek> 8016304: 1c43 adds r3, r0, #1 8016306: d102 bne.n 801630e <_lseek_r+0x1e> 8016308: 682b ldr r3, [r5, #0] 801630a: b103 cbz r3, 801630e <_lseek_r+0x1e> 801630c: 6023 str r3, [r4, #0] 801630e: bd38 pop {r3, r4, r5, pc} 8016310: 200011d8 .word 0x200011d8 08016314 <_read_r>: 8016314: b538 push {r3, r4, r5, lr} 8016316: 4604 mov r4, r0 8016318: 4608 mov r0, r1 801631a: 4611 mov r1, r2 801631c: 2200 movs r2, #0 801631e: 4d05 ldr r5, [pc, #20] @ (8016334 <_read_r+0x20>) 8016320: 602a str r2, [r5, #0] 8016322: 461a mov r2, r3 8016324: f7f7 feee bl 800e104 <_read> 8016328: 1c43 adds r3, r0, #1 801632a: d102 bne.n 8016332 <_read_r+0x1e> 801632c: 682b ldr r3, [r5, #0] 801632e: b103 cbz r3, 8016332 <_read_r+0x1e> 8016330: 6023 str r3, [r4, #0] 8016332: bd38 pop {r3, r4, r5, pc} 8016334: 200011d8 .word 0x200011d8 08016338 <_sbrk_r>: 8016338: b538 push {r3, r4, r5, lr} 801633a: 2300 movs r3, #0 801633c: 4d05 ldr r5, [pc, #20] @ (8016354 <_sbrk_r+0x1c>) 801633e: 4604 mov r4, r0 8016340: 4608 mov r0, r1 8016342: 602b str r3, [r5, #0] 8016344: f7f7 ff2c bl 800e1a0 <_sbrk> 8016348: 1c43 adds r3, r0, #1 801634a: d102 bne.n 8016352 <_sbrk_r+0x1a> 801634c: 682b ldr r3, [r5, #0] 801634e: b103 cbz r3, 8016352 <_sbrk_r+0x1a> 8016350: 6023 str r3, [r4, #0] 8016352: bd38 pop {r3, r4, r5, pc} 8016354: 200011d8 .word 0x200011d8 08016358 <_write_r>: 8016358: b538 push {r3, r4, r5, lr} 801635a: 4604 mov r4, r0 801635c: 4608 mov r0, r1 801635e: 4611 mov r1, r2 8016360: 2200 movs r2, #0 8016362: 4d05 ldr r5, [pc, #20] @ (8016378 <_write_r+0x20>) 8016364: 602a str r2, [r5, #0] 8016366: 461a mov r2, r3 8016368: f7f5 f816 bl 800b398 <_write> 801636c: 1c43 adds r3, r0, #1 801636e: d102 bne.n 8016376 <_write_r+0x1e> 8016370: 682b ldr r3, [r5, #0] 8016372: b103 cbz r3, 8016376 <_write_r+0x1e> 8016374: 6023 str r3, [r4, #0] 8016376: bd38 pop {r3, r4, r5, pc} 8016378: 200011d8 .word 0x200011d8 0801637c <_close_r>: 801637c: b538 push {r3, r4, r5, lr} 801637e: 2300 movs r3, #0 8016380: 4d05 ldr r5, [pc, #20] @ (8016398 <_close_r+0x1c>) 8016382: 4604 mov r4, r0 8016384: 4608 mov r0, r1 8016386: 602b str r3, [r5, #0] 8016388: f7f7 fed9 bl 800e13e <_close> 801638c: 1c43 adds r3, r0, #1 801638e: d102 bne.n 8016396 <_close_r+0x1a> 8016390: 682b ldr r3, [r5, #0] 8016392: b103 cbz r3, 8016396 <_close_r+0x1a> 8016394: 6023 str r3, [r4, #0] 8016396: bd38 pop {r3, r4, r5, pc} 8016398: 200011d8 .word 0x200011d8 0801639c <_fstat_r>: 801639c: b538 push {r3, r4, r5, lr} 801639e: 2300 movs r3, #0 80163a0: 4d06 ldr r5, [pc, #24] @ (80163bc <_fstat_r+0x20>) 80163a2: 4604 mov r4, r0 80163a4: 4608 mov r0, r1 80163a6: 4611 mov r1, r2 80163a8: 602b str r3, [r5, #0] 80163aa: f7f7 fed3 bl 800e154 <_fstat> 80163ae: 1c43 adds r3, r0, #1 80163b0: d102 bne.n 80163b8 <_fstat_r+0x1c> 80163b2: 682b ldr r3, [r5, #0] 80163b4: b103 cbz r3, 80163b8 <_fstat_r+0x1c> 80163b6: 6023 str r3, [r4, #0] 80163b8: bd38 pop {r3, r4, r5, pc} 80163ba: bf00 nop 80163bc: 200011d8 .word 0x200011d8 080163c0 : 80163c0: 2006 movs r0, #6 80163c2: b508 push {r3, lr} 80163c4: f000 f8b0 bl 8016528 80163c8: 2001 movs r0, #1 80163ca: f7f7 fe90 bl 800e0ee <_exit> 080163ce <_calloc_r>: 80163ce: b570 push {r4, r5, r6, lr} 80163d0: fba1 5402 umull r5, r4, r1, r2 80163d4: b934 cbnz r4, 80163e4 <_calloc_r+0x16> 80163d6: 4629 mov r1, r5 80163d8: f7ff f938 bl 801564c <_malloc_r> 80163dc: 4606 mov r6, r0 80163de: b928 cbnz r0, 80163ec <_calloc_r+0x1e> 80163e0: 4630 mov r0, r6 80163e2: bd70 pop {r4, r5, r6, pc} 80163e4: 220c movs r2, #12 80163e6: 2600 movs r6, #0 80163e8: 6002 str r2, [r0, #0] 80163ea: e7f9 b.n 80163e0 <_calloc_r+0x12> 80163ec: 462a mov r2, r5 80163ee: 4621 mov r1, r4 80163f0: f7fd fed4 bl 801419c 80163f4: e7f4 b.n 80163e0 <_calloc_r+0x12> ... 080163f8 <_free_r>: 80163f8: b538 push {r3, r4, r5, lr} 80163fa: 4605 mov r5, r0 80163fc: 2900 cmp r1, #0 80163fe: d040 beq.n 8016482 <_free_r+0x8a> 8016400: f851 3c04 ldr.w r3, [r1, #-4] 8016404: 1f0c subs r4, r1, #4 8016406: 2b00 cmp r3, #0 8016408: bfb8 it lt 801640a: 18e4 addlt r4, r4, r3 801640c: f7ff fa46 bl 801589c <__malloc_lock> 8016410: 4a1c ldr r2, [pc, #112] @ (8016484 <_free_r+0x8c>) 8016412: 6813 ldr r3, [r2, #0] 8016414: b933 cbnz r3, 8016424 <_free_r+0x2c> 8016416: 6063 str r3, [r4, #4] 8016418: 6014 str r4, [r2, #0] 801641a: 4628 mov r0, r5 801641c: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8016420: f7ff ba42 b.w 80158a8 <__malloc_unlock> 8016424: 42a3 cmp r3, r4 8016426: d908 bls.n 801643a <_free_r+0x42> 8016428: 6820 ldr r0, [r4, #0] 801642a: 1821 adds r1, r4, r0 801642c: 428b cmp r3, r1 801642e: bf01 itttt eq 8016430: 6819 ldreq r1, [r3, #0] 8016432: 685b ldreq r3, [r3, #4] 8016434: 1809 addeq r1, r1, r0 8016436: 6021 streq r1, [r4, #0] 8016438: e7ed b.n 8016416 <_free_r+0x1e> 801643a: 461a mov r2, r3 801643c: 685b ldr r3, [r3, #4] 801643e: b10b cbz r3, 8016444 <_free_r+0x4c> 8016440: 42a3 cmp r3, r4 8016442: d9fa bls.n 801643a <_free_r+0x42> 8016444: 6811 ldr r1, [r2, #0] 8016446: 1850 adds r0, r2, r1 8016448: 42a0 cmp r0, r4 801644a: d10b bne.n 8016464 <_free_r+0x6c> 801644c: 6820 ldr r0, [r4, #0] 801644e: 4401 add r1, r0 8016450: 1850 adds r0, r2, r1 8016452: 4283 cmp r3, r0 8016454: 6011 str r1, [r2, #0] 8016456: d1e0 bne.n 801641a <_free_r+0x22> 8016458: 6818 ldr r0, [r3, #0] 801645a: 685b ldr r3, [r3, #4] 801645c: 4408 add r0, r1 801645e: 6010 str r0, [r2, #0] 8016460: 6053 str r3, [r2, #4] 8016462: e7da b.n 801641a <_free_r+0x22> 8016464: d902 bls.n 801646c <_free_r+0x74> 8016466: 230c movs r3, #12 8016468: 602b str r3, [r5, #0] 801646a: e7d6 b.n 801641a <_free_r+0x22> 801646c: 6820 ldr r0, [r4, #0] 801646e: 1821 adds r1, r4, r0 8016470: 428b cmp r3, r1 8016472: bf01 itttt eq 8016474: 6819 ldreq r1, [r3, #0] 8016476: 685b ldreq r3, [r3, #4] 8016478: 1809 addeq r1, r1, r0 801647a: 6021 streq r1, [r4, #0] 801647c: 6063 str r3, [r4, #4] 801647e: 6054 str r4, [r2, #4] 8016480: e7cb b.n 801641a <_free_r+0x22> 8016482: bd38 pop {r3, r4, r5, pc} 8016484: 200011d4 .word 0x200011d4 08016488 <__ascii_mbtowc>: 8016488: b082 sub sp, #8 801648a: b901 cbnz r1, 801648e <__ascii_mbtowc+0x6> 801648c: a901 add r1, sp, #4 801648e: b142 cbz r2, 80164a2 <__ascii_mbtowc+0x1a> 8016490: b14b cbz r3, 80164a6 <__ascii_mbtowc+0x1e> 8016492: 7813 ldrb r3, [r2, #0] 8016494: 600b str r3, [r1, #0] 8016496: 7812 ldrb r2, [r2, #0] 8016498: 1e10 subs r0, r2, #0 801649a: bf18 it ne 801649c: 2001 movne r0, #1 801649e: b002 add sp, #8 80164a0: 4770 bx lr 80164a2: 4610 mov r0, r2 80164a4: e7fb b.n 801649e <__ascii_mbtowc+0x16> 80164a6: f06f 0001 mvn.w r0, #1 80164aa: e7f8 b.n 801649e <__ascii_mbtowc+0x16> 080164ac <_malloc_usable_size_r>: 80164ac: f851 3c04 ldr.w r3, [r1, #-4] 80164b0: 1f18 subs r0, r3, #4 80164b2: 2b00 cmp r3, #0 80164b4: bfbc itt lt 80164b6: 580b ldrlt r3, [r1, r0] 80164b8: 18c0 addlt r0, r0, r3 80164ba: 4770 bx lr 080164bc <__ascii_wctomb>: 80164bc: 4603 mov r3, r0 80164be: 4608 mov r0, r1 80164c0: b141 cbz r1, 80164d4 <__ascii_wctomb+0x18> 80164c2: 2aff cmp r2, #255 @ 0xff 80164c4: d904 bls.n 80164d0 <__ascii_wctomb+0x14> 80164c6: 228a movs r2, #138 @ 0x8a 80164c8: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80164cc: 601a str r2, [r3, #0] 80164ce: 4770 bx lr 80164d0: 2001 movs r0, #1 80164d2: 700a strb r2, [r1, #0] 80164d4: 4770 bx lr 080164d6 <_raise_r>: 80164d6: 291f cmp r1, #31 80164d8: b538 push {r3, r4, r5, lr} 80164da: 4605 mov r5, r0 80164dc: 460c mov r4, r1 80164de: d904 bls.n 80164ea <_raise_r+0x14> 80164e0: 2316 movs r3, #22 80164e2: 6003 str r3, [r0, #0] 80164e4: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80164e8: bd38 pop {r3, r4, r5, pc} 80164ea: 6bc2 ldr r2, [r0, #60] @ 0x3c 80164ec: b112 cbz r2, 80164f4 <_raise_r+0x1e> 80164ee: f852 3021 ldr.w r3, [r2, r1, lsl #2] 80164f2: b94b cbnz r3, 8016508 <_raise_r+0x32> 80164f4: 4628 mov r0, r5 80164f6: f000 f831 bl 801655c <_getpid_r> 80164fa: 4622 mov r2, r4 80164fc: 4601 mov r1, r0 80164fe: 4628 mov r0, r5 8016500: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8016504: f000 b818 b.w 8016538 <_kill_r> 8016508: 2b01 cmp r3, #1 801650a: d00a beq.n 8016522 <_raise_r+0x4c> 801650c: 1c59 adds r1, r3, #1 801650e: d103 bne.n 8016518 <_raise_r+0x42> 8016510: 2316 movs r3, #22 8016512: 6003 str r3, [r0, #0] 8016514: 2001 movs r0, #1 8016516: e7e7 b.n 80164e8 <_raise_r+0x12> 8016518: 2100 movs r1, #0 801651a: 4620 mov r0, r4 801651c: f842 1024 str.w r1, [r2, r4, lsl #2] 8016520: 4798 blx r3 8016522: 2000 movs r0, #0 8016524: e7e0 b.n 80164e8 <_raise_r+0x12> ... 08016528 : 8016528: 4b02 ldr r3, [pc, #8] @ (8016534 ) 801652a: 4601 mov r1, r0 801652c: 6818 ldr r0, [r3, #0] 801652e: f7ff bfd2 b.w 80164d6 <_raise_r> 8016532: bf00 nop 8016534: 20000090 .word 0x20000090 08016538 <_kill_r>: 8016538: b538 push {r3, r4, r5, lr} 801653a: 2300 movs r3, #0 801653c: 4d06 ldr r5, [pc, #24] @ (8016558 <_kill_r+0x20>) 801653e: 4604 mov r4, r0 8016540: 4608 mov r0, r1 8016542: 4611 mov r1, r2 8016544: 602b str r3, [r5, #0] 8016546: f7f7 fdc2 bl 800e0ce <_kill> 801654a: 1c43 adds r3, r0, #1 801654c: d102 bne.n 8016554 <_kill_r+0x1c> 801654e: 682b ldr r3, [r5, #0] 8016550: b103 cbz r3, 8016554 <_kill_r+0x1c> 8016552: 6023 str r3, [r4, #0] 8016554: bd38 pop {r3, r4, r5, pc} 8016556: bf00 nop 8016558: 200011d8 .word 0x200011d8 0801655c <_getpid_r>: 801655c: f7f7 bdb0 b.w 800e0c0 <_getpid> 08016560 <_init>: 8016560: b5f8 push {r3, r4, r5, r6, r7, lr} 8016562: bf00 nop 8016564: bcf8 pop {r3, r4, r5, r6, r7} 8016566: bc08 pop {r3} 8016568: 469e mov lr, r3 801656a: 4770 bx lr 0801656c <_fini>: 801656c: b5f8 push {r3, r4, r5, r6, r7, lr} 801656e: bf00 nop 8016570: bcf8 pop {r3, r4, r5, r6, r7} 8016572: bc08 pop {r3} 8016574: 469e mov lr, r3 8016576: 4770 bx lr