GbTModuleSW.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000d454 080001e8 080001e8 000011e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000eb0 0800d640 0800d640 0000e640 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0800e4f0 0800e4f0 0001023c 2**0 CONTENTS 4 .ARM 00000008 0800e4f0 0800e4f0 0000f4f0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 0800e4f8 0800e4f8 0001023c 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0800e4f8 0800e4f8 0000f4f8 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .fini_array 00000004 0800e4fc 0800e4fc 0000f4fc 2**2 CONTENTS, ALLOC, LOAD, DATA 8 .data 0000023c 20000000 0800e500 00010000 2**3 CONTENTS, ALLOC, LOAD, DATA 9 .bss 000032d0 2000023c 0800e73c 0001023c 2**2 ALLOC 10 ._user_heap_stack 00000604 2000350c 0800e73c 0001050c 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 0001023c 2**0 CONTENTS, READONLY 12 .debug_info 0001196b 00000000 00000000 00010265 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00004245 00000000 00000000 00021bd0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00001098 00000000 00000000 00025e18 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 00000c6c 00000000 00000000 00026eb0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 00024410 00000000 00000000 00027b1c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001773a 00000000 00000000 0004bf2c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000bfdf4 00000000 00000000 00063666 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 0012345a 2**0 CONTENTS, READONLY 20 .debug_frame 00005958 00000000 00000000 001234a0 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000069 00000000 00000000 00128df8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080001e8 <__do_global_dtors_aux>: 80001e8: b510 push {r4, lr} 80001ea: 4c05 ldr r4, [pc, #20] @ (8000200 <__do_global_dtors_aux+0x18>) 80001ec: 7823 ldrb r3, [r4, #0] 80001ee: b933 cbnz r3, 80001fe <__do_global_dtors_aux+0x16> 80001f0: 4b04 ldr r3, [pc, #16] @ (8000204 <__do_global_dtors_aux+0x1c>) 80001f2: b113 cbz r3, 80001fa <__do_global_dtors_aux+0x12> 80001f4: 4804 ldr r0, [pc, #16] @ (8000208 <__do_global_dtors_aux+0x20>) 80001f6: f3af 8000 nop.w 80001fa: 2301 movs r3, #1 80001fc: 7023 strb r3, [r4, #0] 80001fe: bd10 pop {r4, pc} 8000200: 2000023c .word 0x2000023c 8000204: 00000000 .word 0x00000000 8000208: 0800d624 .word 0x0800d624 0800020c : 800020c: b508 push {r3, lr} 800020e: 4b03 ldr r3, [pc, #12] @ (800021c ) 8000210: b11b cbz r3, 800021a 8000212: 4903 ldr r1, [pc, #12] @ (8000220 ) 8000214: 4803 ldr r0, [pc, #12] @ (8000224 ) 8000216: f3af 8000 nop.w 800021a: bd08 pop {r3, pc} 800021c: 00000000 .word 0x00000000 8000220: 20000240 .word 0x20000240 8000224: 0800d624 .word 0x0800d624 08000228 : 8000228: 4603 mov r3, r0 800022a: f813 2b01 ldrb.w r2, [r3], #1 800022e: 2a00 cmp r2, #0 8000230: d1fb bne.n 800022a 8000232: 1a18 subs r0, r3, r0 8000234: 3801 subs r0, #1 8000236: 4770 bx lr 08000238 : 8000238: f810 2b01 ldrb.w r2, [r0], #1 800023c: f811 3b01 ldrb.w r3, [r1], #1 8000240: 2a01 cmp r2, #1 8000242: bf28 it cs 8000244: 429a cmpcs r2, r3 8000246: d0f7 beq.n 8000238 8000248: 1ad0 subs r0, r2, r3 800024a: 4770 bx lr 0800024c <__aeabi_drsub>: 800024c: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 8000250: e002 b.n 8000258 <__adddf3> 8000252: bf00 nop 08000254 <__aeabi_dsub>: 8000254: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 08000258 <__adddf3>: 8000258: b530 push {r4, r5, lr} 800025a: ea4f 0441 mov.w r4, r1, lsl #1 800025e: ea4f 0543 mov.w r5, r3, lsl #1 8000262: ea94 0f05 teq r4, r5 8000266: bf08 it eq 8000268: ea90 0f02 teqeq r0, r2 800026c: bf1f itttt ne 800026e: ea54 0c00 orrsne.w ip, r4, r0 8000272: ea55 0c02 orrsne.w ip, r5, r2 8000276: ea7f 5c64 mvnsne.w ip, r4, asr #21 800027a: ea7f 5c65 mvnsne.w ip, r5, asr #21 800027e: f000 80e2 beq.w 8000446 <__adddf3+0x1ee> 8000282: ea4f 5454 mov.w r4, r4, lsr #21 8000286: ebd4 5555 rsbs r5, r4, r5, lsr #21 800028a: bfb8 it lt 800028c: 426d neglt r5, r5 800028e: dd0c ble.n 80002aa <__adddf3+0x52> 8000290: 442c add r4, r5 8000292: ea80 0202 eor.w r2, r0, r2 8000296: ea81 0303 eor.w r3, r1, r3 800029a: ea82 0000 eor.w r0, r2, r0 800029e: ea83 0101 eor.w r1, r3, r1 80002a2: ea80 0202 eor.w r2, r0, r2 80002a6: ea81 0303 eor.w r3, r1, r3 80002aa: 2d36 cmp r5, #54 @ 0x36 80002ac: bf88 it hi 80002ae: bd30 pophi {r4, r5, pc} 80002b0: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 80002b4: ea4f 3101 mov.w r1, r1, lsl #12 80002b8: f44f 1c80 mov.w ip, #1048576 @ 0x100000 80002bc: ea4c 3111 orr.w r1, ip, r1, lsr #12 80002c0: d002 beq.n 80002c8 <__adddf3+0x70> 80002c2: 4240 negs r0, r0 80002c4: eb61 0141 sbc.w r1, r1, r1, lsl #1 80002c8: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 80002cc: ea4f 3303 mov.w r3, r3, lsl #12 80002d0: ea4c 3313 orr.w r3, ip, r3, lsr #12 80002d4: d002 beq.n 80002dc <__adddf3+0x84> 80002d6: 4252 negs r2, r2 80002d8: eb63 0343 sbc.w r3, r3, r3, lsl #1 80002dc: ea94 0f05 teq r4, r5 80002e0: f000 80a7 beq.w 8000432 <__adddf3+0x1da> 80002e4: f1a4 0401 sub.w r4, r4, #1 80002e8: f1d5 0e20 rsbs lr, r5, #32 80002ec: db0d blt.n 800030a <__adddf3+0xb2> 80002ee: fa02 fc0e lsl.w ip, r2, lr 80002f2: fa22 f205 lsr.w r2, r2, r5 80002f6: 1880 adds r0, r0, r2 80002f8: f141 0100 adc.w r1, r1, #0 80002fc: fa03 f20e lsl.w r2, r3, lr 8000300: 1880 adds r0, r0, r2 8000302: fa43 f305 asr.w r3, r3, r5 8000306: 4159 adcs r1, r3 8000308: e00e b.n 8000328 <__adddf3+0xd0> 800030a: f1a5 0520 sub.w r5, r5, #32 800030e: f10e 0e20 add.w lr, lr, #32 8000312: 2a01 cmp r2, #1 8000314: fa03 fc0e lsl.w ip, r3, lr 8000318: bf28 it cs 800031a: f04c 0c02 orrcs.w ip, ip, #2 800031e: fa43 f305 asr.w r3, r3, r5 8000322: 18c0 adds r0, r0, r3 8000324: eb51 71e3 adcs.w r1, r1, r3, asr #31 8000328: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 800032c: d507 bpl.n 800033e <__adddf3+0xe6> 800032e: f04f 0e00 mov.w lr, #0 8000332: f1dc 0c00 rsbs ip, ip, #0 8000336: eb7e 0000 sbcs.w r0, lr, r0 800033a: eb6e 0101 sbc.w r1, lr, r1 800033e: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 8000342: d31b bcc.n 800037c <__adddf3+0x124> 8000344: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 8000348: d30c bcc.n 8000364 <__adddf3+0x10c> 800034a: 0849 lsrs r1, r1, #1 800034c: ea5f 0030 movs.w r0, r0, rrx 8000350: ea4f 0c3c mov.w ip, ip, rrx 8000354: f104 0401 add.w r4, r4, #1 8000358: ea4f 5244 mov.w r2, r4, lsl #21 800035c: f512 0f80 cmn.w r2, #4194304 @ 0x400000 8000360: f080 809a bcs.w 8000498 <__adddf3+0x240> 8000364: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8000368: bf08 it eq 800036a: ea5f 0c50 movseq.w ip, r0, lsr #1 800036e: f150 0000 adcs.w r0, r0, #0 8000372: eb41 5104 adc.w r1, r1, r4, lsl #20 8000376: ea41 0105 orr.w r1, r1, r5 800037a: bd30 pop {r4, r5, pc} 800037c: ea5f 0c4c movs.w ip, ip, lsl #1 8000380: 4140 adcs r0, r0 8000382: eb41 0101 adc.w r1, r1, r1 8000386: 3c01 subs r4, #1 8000388: bf28 it cs 800038a: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 800038e: d2e9 bcs.n 8000364 <__adddf3+0x10c> 8000390: f091 0f00 teq r1, #0 8000394: bf04 itt eq 8000396: 4601 moveq r1, r0 8000398: 2000 moveq r0, #0 800039a: fab1 f381 clz r3, r1 800039e: bf08 it eq 80003a0: 3320 addeq r3, #32 80003a2: f1a3 030b sub.w r3, r3, #11 80003a6: f1b3 0220 subs.w r2, r3, #32 80003aa: da0c bge.n 80003c6 <__adddf3+0x16e> 80003ac: 320c adds r2, #12 80003ae: dd08 ble.n 80003c2 <__adddf3+0x16a> 80003b0: f102 0c14 add.w ip, r2, #20 80003b4: f1c2 020c rsb r2, r2, #12 80003b8: fa01 f00c lsl.w r0, r1, ip 80003bc: fa21 f102 lsr.w r1, r1, r2 80003c0: e00c b.n 80003dc <__adddf3+0x184> 80003c2: f102 0214 add.w r2, r2, #20 80003c6: bfd8 it le 80003c8: f1c2 0c20 rsble ip, r2, #32 80003cc: fa01 f102 lsl.w r1, r1, r2 80003d0: fa20 fc0c lsr.w ip, r0, ip 80003d4: bfdc itt le 80003d6: ea41 010c orrle.w r1, r1, ip 80003da: 4090 lslle r0, r2 80003dc: 1ae4 subs r4, r4, r3 80003de: bfa2 ittt ge 80003e0: eb01 5104 addge.w r1, r1, r4, lsl #20 80003e4: 4329 orrge r1, r5 80003e6: bd30 popge {r4, r5, pc} 80003e8: ea6f 0404 mvn.w r4, r4 80003ec: 3c1f subs r4, #31 80003ee: da1c bge.n 800042a <__adddf3+0x1d2> 80003f0: 340c adds r4, #12 80003f2: dc0e bgt.n 8000412 <__adddf3+0x1ba> 80003f4: f104 0414 add.w r4, r4, #20 80003f8: f1c4 0220 rsb r2, r4, #32 80003fc: fa20 f004 lsr.w r0, r0, r4 8000400: fa01 f302 lsl.w r3, r1, r2 8000404: ea40 0003 orr.w r0, r0, r3 8000408: fa21 f304 lsr.w r3, r1, r4 800040c: ea45 0103 orr.w r1, r5, r3 8000410: bd30 pop {r4, r5, pc} 8000412: f1c4 040c rsb r4, r4, #12 8000416: f1c4 0220 rsb r2, r4, #32 800041a: fa20 f002 lsr.w r0, r0, r2 800041e: fa01 f304 lsl.w r3, r1, r4 8000422: ea40 0003 orr.w r0, r0, r3 8000426: 4629 mov r1, r5 8000428: bd30 pop {r4, r5, pc} 800042a: fa21 f004 lsr.w r0, r1, r4 800042e: 4629 mov r1, r5 8000430: bd30 pop {r4, r5, pc} 8000432: f094 0f00 teq r4, #0 8000436: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 800043a: bf06 itte eq 800043c: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 8000440: 3401 addeq r4, #1 8000442: 3d01 subne r5, #1 8000444: e74e b.n 80002e4 <__adddf3+0x8c> 8000446: ea7f 5c64 mvns.w ip, r4, asr #21 800044a: bf18 it ne 800044c: ea7f 5c65 mvnsne.w ip, r5, asr #21 8000450: d029 beq.n 80004a6 <__adddf3+0x24e> 8000452: ea94 0f05 teq r4, r5 8000456: bf08 it eq 8000458: ea90 0f02 teqeq r0, r2 800045c: d005 beq.n 800046a <__adddf3+0x212> 800045e: ea54 0c00 orrs.w ip, r4, r0 8000462: bf04 itt eq 8000464: 4619 moveq r1, r3 8000466: 4610 moveq r0, r2 8000468: bd30 pop {r4, r5, pc} 800046a: ea91 0f03 teq r1, r3 800046e: bf1e ittt ne 8000470: 2100 movne r1, #0 8000472: 2000 movne r0, #0 8000474: bd30 popne {r4, r5, pc} 8000476: ea5f 5c54 movs.w ip, r4, lsr #21 800047a: d105 bne.n 8000488 <__adddf3+0x230> 800047c: 0040 lsls r0, r0, #1 800047e: 4149 adcs r1, r1 8000480: bf28 it cs 8000482: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 8000486: bd30 pop {r4, r5, pc} 8000488: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 800048c: bf3c itt cc 800048e: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 8000492: bd30 popcc {r4, r5, pc} 8000494: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8000498: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 800049c: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 80004a0: f04f 0000 mov.w r0, #0 80004a4: bd30 pop {r4, r5, pc} 80004a6: ea7f 5c64 mvns.w ip, r4, asr #21 80004aa: bf1a itte ne 80004ac: 4619 movne r1, r3 80004ae: 4610 movne r0, r2 80004b0: ea7f 5c65 mvnseq.w ip, r5, asr #21 80004b4: bf1c itt ne 80004b6: 460b movne r3, r1 80004b8: 4602 movne r2, r0 80004ba: ea50 3401 orrs.w r4, r0, r1, lsl #12 80004be: bf06 itte eq 80004c0: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80004c4: ea91 0f03 teqeq r1, r3 80004c8: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 80004cc: bd30 pop {r4, r5, pc} 80004ce: bf00 nop 080004d0 <__aeabi_ui2d>: 80004d0: f090 0f00 teq r0, #0 80004d4: bf04 itt eq 80004d6: 2100 moveq r1, #0 80004d8: 4770 bxeq lr 80004da: b530 push {r4, r5, lr} 80004dc: f44f 6480 mov.w r4, #1024 @ 0x400 80004e0: f104 0432 add.w r4, r4, #50 @ 0x32 80004e4: f04f 0500 mov.w r5, #0 80004e8: f04f 0100 mov.w r1, #0 80004ec: e750 b.n 8000390 <__adddf3+0x138> 80004ee: bf00 nop 080004f0 <__aeabi_i2d>: 80004f0: f090 0f00 teq r0, #0 80004f4: bf04 itt eq 80004f6: 2100 moveq r1, #0 80004f8: 4770 bxeq lr 80004fa: b530 push {r4, r5, lr} 80004fc: f44f 6480 mov.w r4, #1024 @ 0x400 8000500: f104 0432 add.w r4, r4, #50 @ 0x32 8000504: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 8000508: bf48 it mi 800050a: 4240 negmi r0, r0 800050c: f04f 0100 mov.w r1, #0 8000510: e73e b.n 8000390 <__adddf3+0x138> 8000512: bf00 nop 08000514 <__aeabi_f2d>: 8000514: 0042 lsls r2, r0, #1 8000516: ea4f 01e2 mov.w r1, r2, asr #3 800051a: ea4f 0131 mov.w r1, r1, rrx 800051e: ea4f 7002 mov.w r0, r2, lsl #28 8000522: bf1f itttt ne 8000524: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 8000528: f093 4f7f teqne r3, #4278190080 @ 0xff000000 800052c: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 8000530: 4770 bxne lr 8000532: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 8000536: bf08 it eq 8000538: 4770 bxeq lr 800053a: f093 4f7f teq r3, #4278190080 @ 0xff000000 800053e: bf04 itt eq 8000540: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 8000544: 4770 bxeq lr 8000546: b530 push {r4, r5, lr} 8000548: f44f 7460 mov.w r4, #896 @ 0x380 800054c: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8000550: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 8000554: e71c b.n 8000390 <__adddf3+0x138> 8000556: bf00 nop 08000558 <__aeabi_ul2d>: 8000558: ea50 0201 orrs.w r2, r0, r1 800055c: bf08 it eq 800055e: 4770 bxeq lr 8000560: b530 push {r4, r5, lr} 8000562: f04f 0500 mov.w r5, #0 8000566: e00a b.n 800057e <__aeabi_l2d+0x16> 08000568 <__aeabi_l2d>: 8000568: ea50 0201 orrs.w r2, r0, r1 800056c: bf08 it eq 800056e: 4770 bxeq lr 8000570: b530 push {r4, r5, lr} 8000572: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 8000576: d502 bpl.n 800057e <__aeabi_l2d+0x16> 8000578: 4240 negs r0, r0 800057a: eb61 0141 sbc.w r1, r1, r1, lsl #1 800057e: f44f 6480 mov.w r4, #1024 @ 0x400 8000582: f104 0432 add.w r4, r4, #50 @ 0x32 8000586: ea5f 5c91 movs.w ip, r1, lsr #22 800058a: f43f aed8 beq.w 800033e <__adddf3+0xe6> 800058e: f04f 0203 mov.w r2, #3 8000592: ea5f 0cdc movs.w ip, ip, lsr #3 8000596: bf18 it ne 8000598: 3203 addne r2, #3 800059a: ea5f 0cdc movs.w ip, ip, lsr #3 800059e: bf18 it ne 80005a0: 3203 addne r2, #3 80005a2: eb02 02dc add.w r2, r2, ip, lsr #3 80005a6: f1c2 0320 rsb r3, r2, #32 80005aa: fa00 fc03 lsl.w ip, r0, r3 80005ae: fa20 f002 lsr.w r0, r0, r2 80005b2: fa01 fe03 lsl.w lr, r1, r3 80005b6: ea40 000e orr.w r0, r0, lr 80005ba: fa21 f102 lsr.w r1, r1, r2 80005be: 4414 add r4, r2 80005c0: e6bd b.n 800033e <__adddf3+0xe6> 80005c2: bf00 nop 080005c4 <__aeabi_dmul>: 80005c4: b570 push {r4, r5, r6, lr} 80005c6: f04f 0cff mov.w ip, #255 @ 0xff 80005ca: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 80005ce: ea1c 5411 ands.w r4, ip, r1, lsr #20 80005d2: bf1d ittte ne 80005d4: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80005d8: ea94 0f0c teqne r4, ip 80005dc: ea95 0f0c teqne r5, ip 80005e0: f000 f8de bleq 80007a0 <__aeabi_dmul+0x1dc> 80005e4: 442c add r4, r5 80005e6: ea81 0603 eor.w r6, r1, r3 80005ea: ea21 514c bic.w r1, r1, ip, lsl #21 80005ee: ea23 534c bic.w r3, r3, ip, lsl #21 80005f2: ea50 3501 orrs.w r5, r0, r1, lsl #12 80005f6: bf18 it ne 80005f8: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80005fc: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8000600: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8000604: d038 beq.n 8000678 <__aeabi_dmul+0xb4> 8000606: fba0 ce02 umull ip, lr, r0, r2 800060a: f04f 0500 mov.w r5, #0 800060e: fbe1 e502 umlal lr, r5, r1, r2 8000612: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 8000616: fbe0 e503 umlal lr, r5, r0, r3 800061a: f04f 0600 mov.w r6, #0 800061e: fbe1 5603 umlal r5, r6, r1, r3 8000622: f09c 0f00 teq ip, #0 8000626: bf18 it ne 8000628: f04e 0e01 orrne.w lr, lr, #1 800062c: f1a4 04ff sub.w r4, r4, #255 @ 0xff 8000630: f5b6 7f00 cmp.w r6, #512 @ 0x200 8000634: f564 7440 sbc.w r4, r4, #768 @ 0x300 8000638: d204 bcs.n 8000644 <__aeabi_dmul+0x80> 800063a: ea5f 0e4e movs.w lr, lr, lsl #1 800063e: 416d adcs r5, r5 8000640: eb46 0606 adc.w r6, r6, r6 8000644: ea42 21c6 orr.w r1, r2, r6, lsl #11 8000648: ea41 5155 orr.w r1, r1, r5, lsr #21 800064c: ea4f 20c5 mov.w r0, r5, lsl #11 8000650: ea40 505e orr.w r0, r0, lr, lsr #21 8000654: ea4f 2ece mov.w lr, lr, lsl #11 8000658: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 800065c: bf88 it hi 800065e: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 8000662: d81e bhi.n 80006a2 <__aeabi_dmul+0xde> 8000664: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 8000668: bf08 it eq 800066a: ea5f 0e50 movseq.w lr, r0, lsr #1 800066e: f150 0000 adcs.w r0, r0, #0 8000672: eb41 5104 adc.w r1, r1, r4, lsl #20 8000676: bd70 pop {r4, r5, r6, pc} 8000678: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 800067c: ea46 0101 orr.w r1, r6, r1 8000680: ea40 0002 orr.w r0, r0, r2 8000684: ea81 0103 eor.w r1, r1, r3 8000688: ebb4 045c subs.w r4, r4, ip, lsr #1 800068c: bfc2 ittt gt 800068e: ebd4 050c rsbsgt r5, r4, ip 8000692: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8000696: bd70 popgt {r4, r5, r6, pc} 8000698: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 800069c: f04f 0e00 mov.w lr, #0 80006a0: 3c01 subs r4, #1 80006a2: f300 80ab bgt.w 80007fc <__aeabi_dmul+0x238> 80006a6: f114 0f36 cmn.w r4, #54 @ 0x36 80006aa: bfde ittt le 80006ac: 2000 movle r0, #0 80006ae: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 80006b2: bd70 pople {r4, r5, r6, pc} 80006b4: f1c4 0400 rsb r4, r4, #0 80006b8: 3c20 subs r4, #32 80006ba: da35 bge.n 8000728 <__aeabi_dmul+0x164> 80006bc: 340c adds r4, #12 80006be: dc1b bgt.n 80006f8 <__aeabi_dmul+0x134> 80006c0: f104 0414 add.w r4, r4, #20 80006c4: f1c4 0520 rsb r5, r4, #32 80006c8: fa00 f305 lsl.w r3, r0, r5 80006cc: fa20 f004 lsr.w r0, r0, r4 80006d0: fa01 f205 lsl.w r2, r1, r5 80006d4: ea40 0002 orr.w r0, r0, r2 80006d8: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 80006dc: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 80006e0: eb10 70d3 adds.w r0, r0, r3, lsr #31 80006e4: fa21 f604 lsr.w r6, r1, r4 80006e8: eb42 0106 adc.w r1, r2, r6 80006ec: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80006f0: bf08 it eq 80006f2: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80006f6: bd70 pop {r4, r5, r6, pc} 80006f8: f1c4 040c rsb r4, r4, #12 80006fc: f1c4 0520 rsb r5, r4, #32 8000700: fa00 f304 lsl.w r3, r0, r4 8000704: fa20 f005 lsr.w r0, r0, r5 8000708: fa01 f204 lsl.w r2, r1, r4 800070c: ea40 0002 orr.w r0, r0, r2 8000710: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8000714: eb10 70d3 adds.w r0, r0, r3, lsr #31 8000718: f141 0100 adc.w r1, r1, #0 800071c: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8000720: bf08 it eq 8000722: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8000726: bd70 pop {r4, r5, r6, pc} 8000728: f1c4 0520 rsb r5, r4, #32 800072c: fa00 f205 lsl.w r2, r0, r5 8000730: ea4e 0e02 orr.w lr, lr, r2 8000734: fa20 f304 lsr.w r3, r0, r4 8000738: fa01 f205 lsl.w r2, r1, r5 800073c: ea43 0302 orr.w r3, r3, r2 8000740: fa21 f004 lsr.w r0, r1, r4 8000744: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8000748: fa21 f204 lsr.w r2, r1, r4 800074c: ea20 0002 bic.w r0, r0, r2 8000750: eb00 70d3 add.w r0, r0, r3, lsr #31 8000754: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8000758: bf08 it eq 800075a: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800075e: bd70 pop {r4, r5, r6, pc} 8000760: f094 0f00 teq r4, #0 8000764: d10f bne.n 8000786 <__aeabi_dmul+0x1c2> 8000766: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 800076a: 0040 lsls r0, r0, #1 800076c: eb41 0101 adc.w r1, r1, r1 8000770: f411 1f80 tst.w r1, #1048576 @ 0x100000 8000774: bf08 it eq 8000776: 3c01 subeq r4, #1 8000778: d0f7 beq.n 800076a <__aeabi_dmul+0x1a6> 800077a: ea41 0106 orr.w r1, r1, r6 800077e: f095 0f00 teq r5, #0 8000782: bf18 it ne 8000784: 4770 bxne lr 8000786: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 800078a: 0052 lsls r2, r2, #1 800078c: eb43 0303 adc.w r3, r3, r3 8000790: f413 1f80 tst.w r3, #1048576 @ 0x100000 8000794: bf08 it eq 8000796: 3d01 subeq r5, #1 8000798: d0f7 beq.n 800078a <__aeabi_dmul+0x1c6> 800079a: ea43 0306 orr.w r3, r3, r6 800079e: 4770 bx lr 80007a0: ea94 0f0c teq r4, ip 80007a4: ea0c 5513 and.w r5, ip, r3, lsr #20 80007a8: bf18 it ne 80007aa: ea95 0f0c teqne r5, ip 80007ae: d00c beq.n 80007ca <__aeabi_dmul+0x206> 80007b0: ea50 0641 orrs.w r6, r0, r1, lsl #1 80007b4: bf18 it ne 80007b6: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80007ba: d1d1 bne.n 8000760 <__aeabi_dmul+0x19c> 80007bc: ea81 0103 eor.w r1, r1, r3 80007c0: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80007c4: f04f 0000 mov.w r0, #0 80007c8: bd70 pop {r4, r5, r6, pc} 80007ca: ea50 0641 orrs.w r6, r0, r1, lsl #1 80007ce: bf06 itte eq 80007d0: 4610 moveq r0, r2 80007d2: 4619 moveq r1, r3 80007d4: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80007d8: d019 beq.n 800080e <__aeabi_dmul+0x24a> 80007da: ea94 0f0c teq r4, ip 80007de: d102 bne.n 80007e6 <__aeabi_dmul+0x222> 80007e0: ea50 3601 orrs.w r6, r0, r1, lsl #12 80007e4: d113 bne.n 800080e <__aeabi_dmul+0x24a> 80007e6: ea95 0f0c teq r5, ip 80007ea: d105 bne.n 80007f8 <__aeabi_dmul+0x234> 80007ec: ea52 3603 orrs.w r6, r2, r3, lsl #12 80007f0: bf1c itt ne 80007f2: 4610 movne r0, r2 80007f4: 4619 movne r1, r3 80007f6: d10a bne.n 800080e <__aeabi_dmul+0x24a> 80007f8: ea81 0103 eor.w r1, r1, r3 80007fc: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8000800: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 8000804: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 8000808: f04f 0000 mov.w r0, #0 800080c: bd70 pop {r4, r5, r6, pc} 800080e: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 8000812: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 8000816: bd70 pop {r4, r5, r6, pc} 08000818 <__aeabi_ddiv>: 8000818: b570 push {r4, r5, r6, lr} 800081a: f04f 0cff mov.w ip, #255 @ 0xff 800081e: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 8000822: ea1c 5411 ands.w r4, ip, r1, lsr #20 8000826: bf1d ittte ne 8000828: ea1c 5513 andsne.w r5, ip, r3, lsr #20 800082c: ea94 0f0c teqne r4, ip 8000830: ea95 0f0c teqne r5, ip 8000834: f000 f8a7 bleq 8000986 <__aeabi_ddiv+0x16e> 8000838: eba4 0405 sub.w r4, r4, r5 800083c: ea81 0e03 eor.w lr, r1, r3 8000840: ea52 3503 orrs.w r5, r2, r3, lsl #12 8000844: ea4f 3101 mov.w r1, r1, lsl #12 8000848: f000 8088 beq.w 800095c <__aeabi_ddiv+0x144> 800084c: ea4f 3303 mov.w r3, r3, lsl #12 8000850: f04f 5580 mov.w r5, #268435456 @ 0x10000000 8000854: ea45 1313 orr.w r3, r5, r3, lsr #4 8000858: ea43 6312 orr.w r3, r3, r2, lsr #24 800085c: ea4f 2202 mov.w r2, r2, lsl #8 8000860: ea45 1511 orr.w r5, r5, r1, lsr #4 8000864: ea45 6510 orr.w r5, r5, r0, lsr #24 8000868: ea4f 2600 mov.w r6, r0, lsl #8 800086c: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000 8000870: 429d cmp r5, r3 8000872: bf08 it eq 8000874: 4296 cmpeq r6, r2 8000876: f144 04fd adc.w r4, r4, #253 @ 0xfd 800087a: f504 7440 add.w r4, r4, #768 @ 0x300 800087e: d202 bcs.n 8000886 <__aeabi_ddiv+0x6e> 8000880: 085b lsrs r3, r3, #1 8000882: ea4f 0232 mov.w r2, r2, rrx 8000886: 1ab6 subs r6, r6, r2 8000888: eb65 0503 sbc.w r5, r5, r3 800088c: 085b lsrs r3, r3, #1 800088e: ea4f 0232 mov.w r2, r2, rrx 8000892: f44f 1080 mov.w r0, #1048576 @ 0x100000 8000896: f44f 2c00 mov.w ip, #524288 @ 0x80000 800089a: ebb6 0e02 subs.w lr, r6, r2 800089e: eb75 0e03 sbcs.w lr, r5, r3 80008a2: bf22 ittt cs 80008a4: 1ab6 subcs r6, r6, r2 80008a6: 4675 movcs r5, lr 80008a8: ea40 000c orrcs.w r0, r0, ip 80008ac: 085b lsrs r3, r3, #1 80008ae: ea4f 0232 mov.w r2, r2, rrx 80008b2: ebb6 0e02 subs.w lr, r6, r2 80008b6: eb75 0e03 sbcs.w lr, r5, r3 80008ba: bf22 ittt cs 80008bc: 1ab6 subcs r6, r6, r2 80008be: 4675 movcs r5, lr 80008c0: ea40 005c orrcs.w r0, r0, ip, lsr #1 80008c4: 085b lsrs r3, r3, #1 80008c6: ea4f 0232 mov.w r2, r2, rrx 80008ca: ebb6 0e02 subs.w lr, r6, r2 80008ce: eb75 0e03 sbcs.w lr, r5, r3 80008d2: bf22 ittt cs 80008d4: 1ab6 subcs r6, r6, r2 80008d6: 4675 movcs r5, lr 80008d8: ea40 009c orrcs.w r0, r0, ip, lsr #2 80008dc: 085b lsrs r3, r3, #1 80008de: ea4f 0232 mov.w r2, r2, rrx 80008e2: ebb6 0e02 subs.w lr, r6, r2 80008e6: eb75 0e03 sbcs.w lr, r5, r3 80008ea: bf22 ittt cs 80008ec: 1ab6 subcs r6, r6, r2 80008ee: 4675 movcs r5, lr 80008f0: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80008f4: ea55 0e06 orrs.w lr, r5, r6 80008f8: d018 beq.n 800092c <__aeabi_ddiv+0x114> 80008fa: ea4f 1505 mov.w r5, r5, lsl #4 80008fe: ea45 7516 orr.w r5, r5, r6, lsr #28 8000902: ea4f 1606 mov.w r6, r6, lsl #4 8000906: ea4f 03c3 mov.w r3, r3, lsl #3 800090a: ea43 7352 orr.w r3, r3, r2, lsr #29 800090e: ea4f 02c2 mov.w r2, r2, lsl #3 8000912: ea5f 1c1c movs.w ip, ip, lsr #4 8000916: d1c0 bne.n 800089a <__aeabi_ddiv+0x82> 8000918: f411 1f80 tst.w r1, #1048576 @ 0x100000 800091c: d10b bne.n 8000936 <__aeabi_ddiv+0x11e> 800091e: ea41 0100 orr.w r1, r1, r0 8000922: f04f 0000 mov.w r0, #0 8000926: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000 800092a: e7b6 b.n 800089a <__aeabi_ddiv+0x82> 800092c: f411 1f80 tst.w r1, #1048576 @ 0x100000 8000930: bf04 itt eq 8000932: 4301 orreq r1, r0 8000934: 2000 moveq r0, #0 8000936: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 800093a: bf88 it hi 800093c: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 8000940: f63f aeaf bhi.w 80006a2 <__aeabi_dmul+0xde> 8000944: ebb5 0c03 subs.w ip, r5, r3 8000948: bf04 itt eq 800094a: ebb6 0c02 subseq.w ip, r6, r2 800094e: ea5f 0c50 movseq.w ip, r0, lsr #1 8000952: f150 0000 adcs.w r0, r0, #0 8000956: eb41 5104 adc.w r1, r1, r4, lsl #20 800095a: bd70 pop {r4, r5, r6, pc} 800095c: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000 8000960: ea4e 3111 orr.w r1, lr, r1, lsr #12 8000964: eb14 045c adds.w r4, r4, ip, lsr #1 8000968: bfc2 ittt gt 800096a: ebd4 050c rsbsgt r5, r4, ip 800096e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8000972: bd70 popgt {r4, r5, r6, pc} 8000974: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8000978: f04f 0e00 mov.w lr, #0 800097c: 3c01 subs r4, #1 800097e: e690 b.n 80006a2 <__aeabi_dmul+0xde> 8000980: ea45 0e06 orr.w lr, r5, r6 8000984: e68d b.n 80006a2 <__aeabi_dmul+0xde> 8000986: ea0c 5513 and.w r5, ip, r3, lsr #20 800098a: ea94 0f0c teq r4, ip 800098e: bf08 it eq 8000990: ea95 0f0c teqeq r5, ip 8000994: f43f af3b beq.w 800080e <__aeabi_dmul+0x24a> 8000998: ea94 0f0c teq r4, ip 800099c: d10a bne.n 80009b4 <__aeabi_ddiv+0x19c> 800099e: ea50 3401 orrs.w r4, r0, r1, lsl #12 80009a2: f47f af34 bne.w 800080e <__aeabi_dmul+0x24a> 80009a6: ea95 0f0c teq r5, ip 80009aa: f47f af25 bne.w 80007f8 <__aeabi_dmul+0x234> 80009ae: 4610 mov r0, r2 80009b0: 4619 mov r1, r3 80009b2: e72c b.n 800080e <__aeabi_dmul+0x24a> 80009b4: ea95 0f0c teq r5, ip 80009b8: d106 bne.n 80009c8 <__aeabi_ddiv+0x1b0> 80009ba: ea52 3503 orrs.w r5, r2, r3, lsl #12 80009be: f43f aefd beq.w 80007bc <__aeabi_dmul+0x1f8> 80009c2: 4610 mov r0, r2 80009c4: 4619 mov r1, r3 80009c6: e722 b.n 800080e <__aeabi_dmul+0x24a> 80009c8: ea50 0641 orrs.w r6, r0, r1, lsl #1 80009cc: bf18 it ne 80009ce: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80009d2: f47f aec5 bne.w 8000760 <__aeabi_dmul+0x19c> 80009d6: ea50 0441 orrs.w r4, r0, r1, lsl #1 80009da: f47f af0d bne.w 80007f8 <__aeabi_dmul+0x234> 80009de: ea52 0543 orrs.w r5, r2, r3, lsl #1 80009e2: f47f aeeb bne.w 80007bc <__aeabi_dmul+0x1f8> 80009e6: e712 b.n 800080e <__aeabi_dmul+0x24a> 080009e8 <__gedf2>: 80009e8: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 80009ec: e006 b.n 80009fc <__cmpdf2+0x4> 80009ee: bf00 nop 080009f0 <__ledf2>: 80009f0: f04f 0c01 mov.w ip, #1 80009f4: e002 b.n 80009fc <__cmpdf2+0x4> 80009f6: bf00 nop 080009f8 <__cmpdf2>: 80009f8: f04f 0c01 mov.w ip, #1 80009fc: f84d cd04 str.w ip, [sp, #-4]! 8000a00: ea4f 0c41 mov.w ip, r1, lsl #1 8000a04: ea7f 5c6c mvns.w ip, ip, asr #21 8000a08: ea4f 0c43 mov.w ip, r3, lsl #1 8000a0c: bf18 it ne 8000a0e: ea7f 5c6c mvnsne.w ip, ip, asr #21 8000a12: d01b beq.n 8000a4c <__cmpdf2+0x54> 8000a14: b001 add sp, #4 8000a16: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8000a1a: bf0c ite eq 8000a1c: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8000a20: ea91 0f03 teqne r1, r3 8000a24: bf02 ittt eq 8000a26: ea90 0f02 teqeq r0, r2 8000a2a: 2000 moveq r0, #0 8000a2c: 4770 bxeq lr 8000a2e: f110 0f00 cmn.w r0, #0 8000a32: ea91 0f03 teq r1, r3 8000a36: bf58 it pl 8000a38: 4299 cmppl r1, r3 8000a3a: bf08 it eq 8000a3c: 4290 cmpeq r0, r2 8000a3e: bf2c ite cs 8000a40: 17d8 asrcs r0, r3, #31 8000a42: ea6f 70e3 mvncc.w r0, r3, asr #31 8000a46: f040 0001 orr.w r0, r0, #1 8000a4a: 4770 bx lr 8000a4c: ea4f 0c41 mov.w ip, r1, lsl #1 8000a50: ea7f 5c6c mvns.w ip, ip, asr #21 8000a54: d102 bne.n 8000a5c <__cmpdf2+0x64> 8000a56: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000a5a: d107 bne.n 8000a6c <__cmpdf2+0x74> 8000a5c: ea4f 0c43 mov.w ip, r3, lsl #1 8000a60: ea7f 5c6c mvns.w ip, ip, asr #21 8000a64: d1d6 bne.n 8000a14 <__cmpdf2+0x1c> 8000a66: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000a6a: d0d3 beq.n 8000a14 <__cmpdf2+0x1c> 8000a6c: f85d 0b04 ldr.w r0, [sp], #4 8000a70: 4770 bx lr 8000a72: bf00 nop 08000a74 <__aeabi_cdrcmple>: 8000a74: 4684 mov ip, r0 8000a76: 4610 mov r0, r2 8000a78: 4662 mov r2, ip 8000a7a: 468c mov ip, r1 8000a7c: 4619 mov r1, r3 8000a7e: 4663 mov r3, ip 8000a80: e000 b.n 8000a84 <__aeabi_cdcmpeq> 8000a82: bf00 nop 08000a84 <__aeabi_cdcmpeq>: 8000a84: b501 push {r0, lr} 8000a86: f7ff ffb7 bl 80009f8 <__cmpdf2> 8000a8a: 2800 cmp r0, #0 8000a8c: bf48 it mi 8000a8e: f110 0f00 cmnmi.w r0, #0 8000a92: bd01 pop {r0, pc} 08000a94 <__aeabi_dcmpeq>: 8000a94: f84d ed08 str.w lr, [sp, #-8]! 8000a98: f7ff fff4 bl 8000a84 <__aeabi_cdcmpeq> 8000a9c: bf0c ite eq 8000a9e: 2001 moveq r0, #1 8000aa0: 2000 movne r0, #0 8000aa2: f85d fb08 ldr.w pc, [sp], #8 8000aa6: bf00 nop 08000aa8 <__aeabi_dcmplt>: 8000aa8: f84d ed08 str.w lr, [sp, #-8]! 8000aac: f7ff ffea bl 8000a84 <__aeabi_cdcmpeq> 8000ab0: bf34 ite cc 8000ab2: 2001 movcc r0, #1 8000ab4: 2000 movcs r0, #0 8000ab6: f85d fb08 ldr.w pc, [sp], #8 8000aba: bf00 nop 08000abc <__aeabi_dcmple>: 8000abc: f84d ed08 str.w lr, [sp, #-8]! 8000ac0: f7ff ffe0 bl 8000a84 <__aeabi_cdcmpeq> 8000ac4: bf94 ite ls 8000ac6: 2001 movls r0, #1 8000ac8: 2000 movhi r0, #0 8000aca: f85d fb08 ldr.w pc, [sp], #8 8000ace: bf00 nop 08000ad0 <__aeabi_dcmpge>: 8000ad0: f84d ed08 str.w lr, [sp, #-8]! 8000ad4: f7ff ffce bl 8000a74 <__aeabi_cdrcmple> 8000ad8: bf94 ite ls 8000ada: 2001 movls r0, #1 8000adc: 2000 movhi r0, #0 8000ade: f85d fb08 ldr.w pc, [sp], #8 8000ae2: bf00 nop 08000ae4 <__aeabi_dcmpgt>: 8000ae4: f84d ed08 str.w lr, [sp, #-8]! 8000ae8: f7ff ffc4 bl 8000a74 <__aeabi_cdrcmple> 8000aec: bf34 ite cc 8000aee: 2001 movcc r0, #1 8000af0: 2000 movcs r0, #0 8000af2: f85d fb08 ldr.w pc, [sp], #8 8000af6: bf00 nop 08000af8 <__aeabi_dcmpun>: 8000af8: ea4f 0c41 mov.w ip, r1, lsl #1 8000afc: ea7f 5c6c mvns.w ip, ip, asr #21 8000b00: d102 bne.n 8000b08 <__aeabi_dcmpun+0x10> 8000b02: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000b06: d10a bne.n 8000b1e <__aeabi_dcmpun+0x26> 8000b08: ea4f 0c43 mov.w ip, r3, lsl #1 8000b0c: ea7f 5c6c mvns.w ip, ip, asr #21 8000b10: d102 bne.n 8000b18 <__aeabi_dcmpun+0x20> 8000b12: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000b16: d102 bne.n 8000b1e <__aeabi_dcmpun+0x26> 8000b18: f04f 0000 mov.w r0, #0 8000b1c: 4770 bx lr 8000b1e: f04f 0001 mov.w r0, #1 8000b22: 4770 bx lr 08000b24 <__aeabi_d2iz>: 8000b24: ea4f 0241 mov.w r2, r1, lsl #1 8000b28: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 8000b2c: d215 bcs.n 8000b5a <__aeabi_d2iz+0x36> 8000b2e: d511 bpl.n 8000b54 <__aeabi_d2iz+0x30> 8000b30: f46f 7378 mvn.w r3, #992 @ 0x3e0 8000b34: ebb3 5262 subs.w r2, r3, r2, asr #21 8000b38: d912 bls.n 8000b60 <__aeabi_d2iz+0x3c> 8000b3a: ea4f 23c1 mov.w r3, r1, lsl #11 8000b3e: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8000b42: ea43 5350 orr.w r3, r3, r0, lsr #21 8000b46: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8000b4a: fa23 f002 lsr.w r0, r3, r2 8000b4e: bf18 it ne 8000b50: 4240 negne r0, r0 8000b52: 4770 bx lr 8000b54: f04f 0000 mov.w r0, #0 8000b58: 4770 bx lr 8000b5a: ea50 3001 orrs.w r0, r0, r1, lsl #12 8000b5e: d105 bne.n 8000b6c <__aeabi_d2iz+0x48> 8000b60: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 8000b64: bf08 it eq 8000b66: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 8000b6a: 4770 bx lr 8000b6c: f04f 0000 mov.w r0, #0 8000b70: 4770 bx lr 8000b72: bf00 nop 08000b74 <__aeabi_d2f>: 8000b74: ea4f 0241 mov.w r2, r1, lsl #1 8000b78: f1b2 43e0 subs.w r3, r2, #1879048192 @ 0x70000000 8000b7c: bf24 itt cs 8000b7e: f5b3 1c00 subscs.w ip, r3, #2097152 @ 0x200000 8000b82: f1dc 5cfe rsbscs ip, ip, #532676608 @ 0x1fc00000 8000b86: d90d bls.n 8000ba4 <__aeabi_d2f+0x30> 8000b88: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8000b8c: ea4f 02c0 mov.w r2, r0, lsl #3 8000b90: ea4c 7050 orr.w r0, ip, r0, lsr #29 8000b94: f1b2 4f00 cmp.w r2, #2147483648 @ 0x80000000 8000b98: eb40 0083 adc.w r0, r0, r3, lsl #2 8000b9c: bf08 it eq 8000b9e: f020 0001 biceq.w r0, r0, #1 8000ba2: 4770 bx lr 8000ba4: f011 4f80 tst.w r1, #1073741824 @ 0x40000000 8000ba8: d121 bne.n 8000bee <__aeabi_d2f+0x7a> 8000baa: f113 7238 adds.w r2, r3, #48234496 @ 0x2e00000 8000bae: bfbc itt lt 8000bb0: f001 4000 andlt.w r0, r1, #2147483648 @ 0x80000000 8000bb4: 4770 bxlt lr 8000bb6: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8000bba: ea4f 5252 mov.w r2, r2, lsr #21 8000bbe: f1c2 0218 rsb r2, r2, #24 8000bc2: f1c2 0c20 rsb ip, r2, #32 8000bc6: fa10 f30c lsls.w r3, r0, ip 8000bca: fa20 f002 lsr.w r0, r0, r2 8000bce: bf18 it ne 8000bd0: f040 0001 orrne.w r0, r0, #1 8000bd4: ea4f 23c1 mov.w r3, r1, lsl #11 8000bd8: ea4f 23d3 mov.w r3, r3, lsr #11 8000bdc: fa03 fc0c lsl.w ip, r3, ip 8000be0: ea40 000c orr.w r0, r0, ip 8000be4: fa23 f302 lsr.w r3, r3, r2 8000be8: ea4f 0343 mov.w r3, r3, lsl #1 8000bec: e7cc b.n 8000b88 <__aeabi_d2f+0x14> 8000bee: ea7f 5362 mvns.w r3, r2, asr #21 8000bf2: d107 bne.n 8000c04 <__aeabi_d2f+0x90> 8000bf4: ea50 3301 orrs.w r3, r0, r1, lsl #12 8000bf8: bf1e ittt ne 8000bfa: f04f 40fe movne.w r0, #2130706432 @ 0x7f000000 8000bfe: f440 0040 orrne.w r0, r0, #12582912 @ 0xc00000 8000c02: 4770 bxne lr 8000c04: f001 4000 and.w r0, r1, #2147483648 @ 0x80000000 8000c08: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8000c0c: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8000c10: 4770 bx lr 8000c12: bf00 nop 08000c14 <__aeabi_frsub>: 8000c14: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 8000c18: e002 b.n 8000c20 <__addsf3> 8000c1a: bf00 nop 08000c1c <__aeabi_fsub>: 8000c1c: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 08000c20 <__addsf3>: 8000c20: 0042 lsls r2, r0, #1 8000c22: bf1f itttt ne 8000c24: ea5f 0341 movsne.w r3, r1, lsl #1 8000c28: ea92 0f03 teqne r2, r3 8000c2c: ea7f 6c22 mvnsne.w ip, r2, asr #24 8000c30: ea7f 6c23 mvnsne.w ip, r3, asr #24 8000c34: d06a beq.n 8000d0c <__addsf3+0xec> 8000c36: ea4f 6212 mov.w r2, r2, lsr #24 8000c3a: ebd2 6313 rsbs r3, r2, r3, lsr #24 8000c3e: bfc1 itttt gt 8000c40: 18d2 addgt r2, r2, r3 8000c42: 4041 eorgt r1, r0 8000c44: 4048 eorgt r0, r1 8000c46: 4041 eorgt r1, r0 8000c48: bfb8 it lt 8000c4a: 425b neglt r3, r3 8000c4c: 2b19 cmp r3, #25 8000c4e: bf88 it hi 8000c50: 4770 bxhi lr 8000c52: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 8000c56: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8000c5a: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 8000c5e: bf18 it ne 8000c60: 4240 negne r0, r0 8000c62: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8000c66: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 8000c6a: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 8000c6e: bf18 it ne 8000c70: 4249 negne r1, r1 8000c72: ea92 0f03 teq r2, r3 8000c76: d03f beq.n 8000cf8 <__addsf3+0xd8> 8000c78: f1a2 0201 sub.w r2, r2, #1 8000c7c: fa41 fc03 asr.w ip, r1, r3 8000c80: eb10 000c adds.w r0, r0, ip 8000c84: f1c3 0320 rsb r3, r3, #32 8000c88: fa01 f103 lsl.w r1, r1, r3 8000c8c: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8000c90: d502 bpl.n 8000c98 <__addsf3+0x78> 8000c92: 4249 negs r1, r1 8000c94: eb60 0040 sbc.w r0, r0, r0, lsl #1 8000c98: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 8000c9c: d313 bcc.n 8000cc6 <__addsf3+0xa6> 8000c9e: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 8000ca2: d306 bcc.n 8000cb2 <__addsf3+0x92> 8000ca4: 0840 lsrs r0, r0, #1 8000ca6: ea4f 0131 mov.w r1, r1, rrx 8000caa: f102 0201 add.w r2, r2, #1 8000cae: 2afe cmp r2, #254 @ 0xfe 8000cb0: d251 bcs.n 8000d56 <__addsf3+0x136> 8000cb2: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 8000cb6: eb40 50c2 adc.w r0, r0, r2, lsl #23 8000cba: bf08 it eq 8000cbc: f020 0001 biceq.w r0, r0, #1 8000cc0: ea40 0003 orr.w r0, r0, r3 8000cc4: 4770 bx lr 8000cc6: 0049 lsls r1, r1, #1 8000cc8: eb40 0000 adc.w r0, r0, r0 8000ccc: 3a01 subs r2, #1 8000cce: bf28 it cs 8000cd0: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 8000cd4: d2ed bcs.n 8000cb2 <__addsf3+0x92> 8000cd6: fab0 fc80 clz ip, r0 8000cda: f1ac 0c08 sub.w ip, ip, #8 8000cde: ebb2 020c subs.w r2, r2, ip 8000ce2: fa00 f00c lsl.w r0, r0, ip 8000ce6: bfaa itet ge 8000ce8: eb00 50c2 addge.w r0, r0, r2, lsl #23 8000cec: 4252 neglt r2, r2 8000cee: 4318 orrge r0, r3 8000cf0: bfbc itt lt 8000cf2: 40d0 lsrlt r0, r2 8000cf4: 4318 orrlt r0, r3 8000cf6: 4770 bx lr 8000cf8: f092 0f00 teq r2, #0 8000cfc: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 8000d00: bf06 itte eq 8000d02: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 8000d06: 3201 addeq r2, #1 8000d08: 3b01 subne r3, #1 8000d0a: e7b5 b.n 8000c78 <__addsf3+0x58> 8000d0c: ea4f 0341 mov.w r3, r1, lsl #1 8000d10: ea7f 6c22 mvns.w ip, r2, asr #24 8000d14: bf18 it ne 8000d16: ea7f 6c23 mvnsne.w ip, r3, asr #24 8000d1a: d021 beq.n 8000d60 <__addsf3+0x140> 8000d1c: ea92 0f03 teq r2, r3 8000d20: d004 beq.n 8000d2c <__addsf3+0x10c> 8000d22: f092 0f00 teq r2, #0 8000d26: bf08 it eq 8000d28: 4608 moveq r0, r1 8000d2a: 4770 bx lr 8000d2c: ea90 0f01 teq r0, r1 8000d30: bf1c itt ne 8000d32: 2000 movne r0, #0 8000d34: 4770 bxne lr 8000d36: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 8000d3a: d104 bne.n 8000d46 <__addsf3+0x126> 8000d3c: 0040 lsls r0, r0, #1 8000d3e: bf28 it cs 8000d40: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 8000d44: 4770 bx lr 8000d46: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 8000d4a: bf3c itt cc 8000d4c: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 8000d50: 4770 bxcc lr 8000d52: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8000d56: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 8000d5a: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8000d5e: 4770 bx lr 8000d60: ea7f 6222 mvns.w r2, r2, asr #24 8000d64: bf16 itet ne 8000d66: 4608 movne r0, r1 8000d68: ea7f 6323 mvnseq.w r3, r3, asr #24 8000d6c: 4601 movne r1, r0 8000d6e: 0242 lsls r2, r0, #9 8000d70: bf06 itte eq 8000d72: ea5f 2341 movseq.w r3, r1, lsl #9 8000d76: ea90 0f01 teqeq r0, r1 8000d7a: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 8000d7e: 4770 bx lr 08000d80 <__aeabi_ui2f>: 8000d80: f04f 0300 mov.w r3, #0 8000d84: e004 b.n 8000d90 <__aeabi_i2f+0x8> 8000d86: bf00 nop 08000d88 <__aeabi_i2f>: 8000d88: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 8000d8c: bf48 it mi 8000d8e: 4240 negmi r0, r0 8000d90: ea5f 0c00 movs.w ip, r0 8000d94: bf08 it eq 8000d96: 4770 bxeq lr 8000d98: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 8000d9c: 4601 mov r1, r0 8000d9e: f04f 0000 mov.w r0, #0 8000da2: e01c b.n 8000dde <__aeabi_l2f+0x2a> 08000da4 <__aeabi_ul2f>: 8000da4: ea50 0201 orrs.w r2, r0, r1 8000da8: bf08 it eq 8000daa: 4770 bxeq lr 8000dac: f04f 0300 mov.w r3, #0 8000db0: e00a b.n 8000dc8 <__aeabi_l2f+0x14> 8000db2: bf00 nop 08000db4 <__aeabi_l2f>: 8000db4: ea50 0201 orrs.w r2, r0, r1 8000db8: bf08 it eq 8000dba: 4770 bxeq lr 8000dbc: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 8000dc0: d502 bpl.n 8000dc8 <__aeabi_l2f+0x14> 8000dc2: 4240 negs r0, r0 8000dc4: eb61 0141 sbc.w r1, r1, r1, lsl #1 8000dc8: ea5f 0c01 movs.w ip, r1 8000dcc: bf02 ittt eq 8000dce: 4684 moveq ip, r0 8000dd0: 4601 moveq r1, r0 8000dd2: 2000 moveq r0, #0 8000dd4: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 8000dd8: bf08 it eq 8000dda: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 8000dde: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 8000de2: fabc f28c clz r2, ip 8000de6: 3a08 subs r2, #8 8000de8: eba3 53c2 sub.w r3, r3, r2, lsl #23 8000dec: db10 blt.n 8000e10 <__aeabi_l2f+0x5c> 8000dee: fa01 fc02 lsl.w ip, r1, r2 8000df2: 4463 add r3, ip 8000df4: fa00 fc02 lsl.w ip, r0, r2 8000df8: f1c2 0220 rsb r2, r2, #32 8000dfc: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8000e00: fa20 f202 lsr.w r2, r0, r2 8000e04: eb43 0002 adc.w r0, r3, r2 8000e08: bf08 it eq 8000e0a: f020 0001 biceq.w r0, r0, #1 8000e0e: 4770 bx lr 8000e10: f102 0220 add.w r2, r2, #32 8000e14: fa01 fc02 lsl.w ip, r1, r2 8000e18: f1c2 0220 rsb r2, r2, #32 8000e1c: ea50 004c orrs.w r0, r0, ip, lsl #1 8000e20: fa21 f202 lsr.w r2, r1, r2 8000e24: eb43 0002 adc.w r0, r3, r2 8000e28: bf08 it eq 8000e2a: ea20 70dc biceq.w r0, r0, ip, lsr #31 8000e2e: 4770 bx lr 08000e30 <__aeabi_fmul>: 8000e30: f04f 0cff mov.w ip, #255 @ 0xff 8000e34: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8000e38: bf1e ittt ne 8000e3a: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8000e3e: ea92 0f0c teqne r2, ip 8000e42: ea93 0f0c teqne r3, ip 8000e46: d06f beq.n 8000f28 <__aeabi_fmul+0xf8> 8000e48: 441a add r2, r3 8000e4a: ea80 0c01 eor.w ip, r0, r1 8000e4e: 0240 lsls r0, r0, #9 8000e50: bf18 it ne 8000e52: ea5f 2141 movsne.w r1, r1, lsl #9 8000e56: d01e beq.n 8000e96 <__aeabi_fmul+0x66> 8000e58: f04f 6300 mov.w r3, #134217728 @ 0x8000000 8000e5c: ea43 1050 orr.w r0, r3, r0, lsr #5 8000e60: ea43 1151 orr.w r1, r3, r1, lsr #5 8000e64: fba0 3101 umull r3, r1, r0, r1 8000e68: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8000e6c: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 8000e70: bf3e ittt cc 8000e72: 0049 lslcc r1, r1, #1 8000e74: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8000e78: 005b lslcc r3, r3, #1 8000e7a: ea40 0001 orr.w r0, r0, r1 8000e7e: f162 027f sbc.w r2, r2, #127 @ 0x7f 8000e82: 2afd cmp r2, #253 @ 0xfd 8000e84: d81d bhi.n 8000ec2 <__aeabi_fmul+0x92> 8000e86: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8000e8a: eb40 50c2 adc.w r0, r0, r2, lsl #23 8000e8e: bf08 it eq 8000e90: f020 0001 biceq.w r0, r0, #1 8000e94: 4770 bx lr 8000e96: f090 0f00 teq r0, #0 8000e9a: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8000e9e: bf08 it eq 8000ea0: 0249 lsleq r1, r1, #9 8000ea2: ea4c 2050 orr.w r0, ip, r0, lsr #9 8000ea6: ea40 2051 orr.w r0, r0, r1, lsr #9 8000eaa: 3a7f subs r2, #127 @ 0x7f 8000eac: bfc2 ittt gt 8000eae: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 8000eb2: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8000eb6: 4770 bxgt lr 8000eb8: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8000ebc: f04f 0300 mov.w r3, #0 8000ec0: 3a01 subs r2, #1 8000ec2: dc5d bgt.n 8000f80 <__aeabi_fmul+0x150> 8000ec4: f112 0f19 cmn.w r2, #25 8000ec8: bfdc itt le 8000eca: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 8000ece: 4770 bxle lr 8000ed0: f1c2 0200 rsb r2, r2, #0 8000ed4: 0041 lsls r1, r0, #1 8000ed6: fa21 f102 lsr.w r1, r1, r2 8000eda: f1c2 0220 rsb r2, r2, #32 8000ede: fa00 fc02 lsl.w ip, r0, r2 8000ee2: ea5f 0031 movs.w r0, r1, rrx 8000ee6: f140 0000 adc.w r0, r0, #0 8000eea: ea53 034c orrs.w r3, r3, ip, lsl #1 8000eee: bf08 it eq 8000ef0: ea20 70dc biceq.w r0, r0, ip, lsr #31 8000ef4: 4770 bx lr 8000ef6: f092 0f00 teq r2, #0 8000efa: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 8000efe: bf02 ittt eq 8000f00: 0040 lsleq r0, r0, #1 8000f02: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 8000f06: 3a01 subeq r2, #1 8000f08: d0f9 beq.n 8000efe <__aeabi_fmul+0xce> 8000f0a: ea40 000c orr.w r0, r0, ip 8000f0e: f093 0f00 teq r3, #0 8000f12: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8000f16: bf02 ittt eq 8000f18: 0049 lsleq r1, r1, #1 8000f1a: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8000f1e: 3b01 subeq r3, #1 8000f20: d0f9 beq.n 8000f16 <__aeabi_fmul+0xe6> 8000f22: ea41 010c orr.w r1, r1, ip 8000f26: e78f b.n 8000e48 <__aeabi_fmul+0x18> 8000f28: ea0c 53d1 and.w r3, ip, r1, lsr #23 8000f2c: ea92 0f0c teq r2, ip 8000f30: bf18 it ne 8000f32: ea93 0f0c teqne r3, ip 8000f36: d00a beq.n 8000f4e <__aeabi_fmul+0x11e> 8000f38: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 8000f3c: bf18 it ne 8000f3e: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 8000f42: d1d8 bne.n 8000ef6 <__aeabi_fmul+0xc6> 8000f44: ea80 0001 eor.w r0, r0, r1 8000f48: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8000f4c: 4770 bx lr 8000f4e: f090 0f00 teq r0, #0 8000f52: bf17 itett ne 8000f54: f090 4f00 teqne r0, #2147483648 @ 0x80000000 8000f58: 4608 moveq r0, r1 8000f5a: f091 0f00 teqne r1, #0 8000f5e: f091 4f00 teqne r1, #2147483648 @ 0x80000000 8000f62: d014 beq.n 8000f8e <__aeabi_fmul+0x15e> 8000f64: ea92 0f0c teq r2, ip 8000f68: d101 bne.n 8000f6e <__aeabi_fmul+0x13e> 8000f6a: 0242 lsls r2, r0, #9 8000f6c: d10f bne.n 8000f8e <__aeabi_fmul+0x15e> 8000f6e: ea93 0f0c teq r3, ip 8000f72: d103 bne.n 8000f7c <__aeabi_fmul+0x14c> 8000f74: 024b lsls r3, r1, #9 8000f76: bf18 it ne 8000f78: 4608 movne r0, r1 8000f7a: d108 bne.n 8000f8e <__aeabi_fmul+0x15e> 8000f7c: ea80 0001 eor.w r0, r0, r1 8000f80: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8000f84: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8000f88: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8000f8c: 4770 bx lr 8000f8e: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8000f92: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 8000f96: 4770 bx lr 08000f98 <__aeabi_fdiv>: 8000f98: f04f 0cff mov.w ip, #255 @ 0xff 8000f9c: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8000fa0: bf1e ittt ne 8000fa2: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8000fa6: ea92 0f0c teqne r2, ip 8000faa: ea93 0f0c teqne r3, ip 8000fae: d069 beq.n 8001084 <__aeabi_fdiv+0xec> 8000fb0: eba2 0203 sub.w r2, r2, r3 8000fb4: ea80 0c01 eor.w ip, r0, r1 8000fb8: 0249 lsls r1, r1, #9 8000fba: ea4f 2040 mov.w r0, r0, lsl #9 8000fbe: d037 beq.n 8001030 <__aeabi_fdiv+0x98> 8000fc0: f04f 5380 mov.w r3, #268435456 @ 0x10000000 8000fc4: ea43 1111 orr.w r1, r3, r1, lsr #4 8000fc8: ea43 1310 orr.w r3, r3, r0, lsr #4 8000fcc: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8000fd0: 428b cmp r3, r1 8000fd2: bf38 it cc 8000fd4: 005b lslcc r3, r3, #1 8000fd6: f142 027d adc.w r2, r2, #125 @ 0x7d 8000fda: f44f 0c00 mov.w ip, #8388608 @ 0x800000 8000fde: 428b cmp r3, r1 8000fe0: bf24 itt cs 8000fe2: 1a5b subcs r3, r3, r1 8000fe4: ea40 000c orrcs.w r0, r0, ip 8000fe8: ebb3 0f51 cmp.w r3, r1, lsr #1 8000fec: bf24 itt cs 8000fee: eba3 0351 subcs.w r3, r3, r1, lsr #1 8000ff2: ea40 005c orrcs.w r0, r0, ip, lsr #1 8000ff6: ebb3 0f91 cmp.w r3, r1, lsr #2 8000ffa: bf24 itt cs 8000ffc: eba3 0391 subcs.w r3, r3, r1, lsr #2 8001000: ea40 009c orrcs.w r0, r0, ip, lsr #2 8001004: ebb3 0fd1 cmp.w r3, r1, lsr #3 8001008: bf24 itt cs 800100a: eba3 03d1 subcs.w r3, r3, r1, lsr #3 800100e: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8001012: 011b lsls r3, r3, #4 8001014: bf18 it ne 8001016: ea5f 1c1c movsne.w ip, ip, lsr #4 800101a: d1e0 bne.n 8000fde <__aeabi_fdiv+0x46> 800101c: 2afd cmp r2, #253 @ 0xfd 800101e: f63f af50 bhi.w 8000ec2 <__aeabi_fmul+0x92> 8001022: 428b cmp r3, r1 8001024: eb40 50c2 adc.w r0, r0, r2, lsl #23 8001028: bf08 it eq 800102a: f020 0001 biceq.w r0, r0, #1 800102e: 4770 bx lr 8001030: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8001034: ea4c 2050 orr.w r0, ip, r0, lsr #9 8001038: 327f adds r2, #127 @ 0x7f 800103a: bfc2 ittt gt 800103c: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 8001040: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8001044: 4770 bxgt lr 8001046: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 800104a: f04f 0300 mov.w r3, #0 800104e: 3a01 subs r2, #1 8001050: e737 b.n 8000ec2 <__aeabi_fmul+0x92> 8001052: f092 0f00 teq r2, #0 8001056: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 800105a: bf02 ittt eq 800105c: 0040 lsleq r0, r0, #1 800105e: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 8001062: 3a01 subeq r2, #1 8001064: d0f9 beq.n 800105a <__aeabi_fdiv+0xc2> 8001066: ea40 000c orr.w r0, r0, ip 800106a: f093 0f00 teq r3, #0 800106e: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8001072: bf02 ittt eq 8001074: 0049 lsleq r1, r1, #1 8001076: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 800107a: 3b01 subeq r3, #1 800107c: d0f9 beq.n 8001072 <__aeabi_fdiv+0xda> 800107e: ea41 010c orr.w r1, r1, ip 8001082: e795 b.n 8000fb0 <__aeabi_fdiv+0x18> 8001084: ea0c 53d1 and.w r3, ip, r1, lsr #23 8001088: ea92 0f0c teq r2, ip 800108c: d108 bne.n 80010a0 <__aeabi_fdiv+0x108> 800108e: 0242 lsls r2, r0, #9 8001090: f47f af7d bne.w 8000f8e <__aeabi_fmul+0x15e> 8001094: ea93 0f0c teq r3, ip 8001098: f47f af70 bne.w 8000f7c <__aeabi_fmul+0x14c> 800109c: 4608 mov r0, r1 800109e: e776 b.n 8000f8e <__aeabi_fmul+0x15e> 80010a0: ea93 0f0c teq r3, ip 80010a4: d104 bne.n 80010b0 <__aeabi_fdiv+0x118> 80010a6: 024b lsls r3, r1, #9 80010a8: f43f af4c beq.w 8000f44 <__aeabi_fmul+0x114> 80010ac: 4608 mov r0, r1 80010ae: e76e b.n 8000f8e <__aeabi_fmul+0x15e> 80010b0: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 80010b4: bf18 it ne 80010b6: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 80010ba: d1ca bne.n 8001052 <__aeabi_fdiv+0xba> 80010bc: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 80010c0: f47f af5c bne.w 8000f7c <__aeabi_fmul+0x14c> 80010c4: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 80010c8: f47f af3c bne.w 8000f44 <__aeabi_fmul+0x114> 80010cc: e75f b.n 8000f8e <__aeabi_fmul+0x15e> 80010ce: bf00 nop 080010d0 <__gesf2>: 80010d0: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 80010d4: e006 b.n 80010e4 <__cmpsf2+0x4> 80010d6: bf00 nop 080010d8 <__lesf2>: 80010d8: f04f 0c01 mov.w ip, #1 80010dc: e002 b.n 80010e4 <__cmpsf2+0x4> 80010de: bf00 nop 080010e0 <__cmpsf2>: 80010e0: f04f 0c01 mov.w ip, #1 80010e4: f84d cd04 str.w ip, [sp, #-4]! 80010e8: ea4f 0240 mov.w r2, r0, lsl #1 80010ec: ea4f 0341 mov.w r3, r1, lsl #1 80010f0: ea7f 6c22 mvns.w ip, r2, asr #24 80010f4: bf18 it ne 80010f6: ea7f 6c23 mvnsne.w ip, r3, asr #24 80010fa: d011 beq.n 8001120 <__cmpsf2+0x40> 80010fc: b001 add sp, #4 80010fe: ea52 0c53 orrs.w ip, r2, r3, lsr #1 8001102: bf18 it ne 8001104: ea90 0f01 teqne r0, r1 8001108: bf58 it pl 800110a: ebb2 0003 subspl.w r0, r2, r3 800110e: bf88 it hi 8001110: 17c8 asrhi r0, r1, #31 8001112: bf38 it cc 8001114: ea6f 70e1 mvncc.w r0, r1, asr #31 8001118: bf18 it ne 800111a: f040 0001 orrne.w r0, r0, #1 800111e: 4770 bx lr 8001120: ea7f 6c22 mvns.w ip, r2, asr #24 8001124: d102 bne.n 800112c <__cmpsf2+0x4c> 8001126: ea5f 2c40 movs.w ip, r0, lsl #9 800112a: d105 bne.n 8001138 <__cmpsf2+0x58> 800112c: ea7f 6c23 mvns.w ip, r3, asr #24 8001130: d1e4 bne.n 80010fc <__cmpsf2+0x1c> 8001132: ea5f 2c41 movs.w ip, r1, lsl #9 8001136: d0e1 beq.n 80010fc <__cmpsf2+0x1c> 8001138: f85d 0b04 ldr.w r0, [sp], #4 800113c: 4770 bx lr 800113e: bf00 nop 08001140 <__aeabi_cfrcmple>: 8001140: 4684 mov ip, r0 8001142: 4608 mov r0, r1 8001144: 4661 mov r1, ip 8001146: e7ff b.n 8001148 <__aeabi_cfcmpeq> 08001148 <__aeabi_cfcmpeq>: 8001148: b50f push {r0, r1, r2, r3, lr} 800114a: f7ff ffc9 bl 80010e0 <__cmpsf2> 800114e: 2800 cmp r0, #0 8001150: bf48 it mi 8001152: f110 0f00 cmnmi.w r0, #0 8001156: bd0f pop {r0, r1, r2, r3, pc} 08001158 <__aeabi_fcmpeq>: 8001158: f84d ed08 str.w lr, [sp, #-8]! 800115c: f7ff fff4 bl 8001148 <__aeabi_cfcmpeq> 8001160: bf0c ite eq 8001162: 2001 moveq r0, #1 8001164: 2000 movne r0, #0 8001166: f85d fb08 ldr.w pc, [sp], #8 800116a: bf00 nop 0800116c <__aeabi_fcmplt>: 800116c: f84d ed08 str.w lr, [sp, #-8]! 8001170: f7ff ffea bl 8001148 <__aeabi_cfcmpeq> 8001174: bf34 ite cc 8001176: 2001 movcc r0, #1 8001178: 2000 movcs r0, #0 800117a: f85d fb08 ldr.w pc, [sp], #8 800117e: bf00 nop 08001180 <__aeabi_fcmple>: 8001180: f84d ed08 str.w lr, [sp, #-8]! 8001184: f7ff ffe0 bl 8001148 <__aeabi_cfcmpeq> 8001188: bf94 ite ls 800118a: 2001 movls r0, #1 800118c: 2000 movhi r0, #0 800118e: f85d fb08 ldr.w pc, [sp], #8 8001192: bf00 nop 08001194 <__aeabi_fcmpge>: 8001194: f84d ed08 str.w lr, [sp, #-8]! 8001198: f7ff ffd2 bl 8001140 <__aeabi_cfrcmple> 800119c: bf94 ite ls 800119e: 2001 movls r0, #1 80011a0: 2000 movhi r0, #0 80011a2: f85d fb08 ldr.w pc, [sp], #8 80011a6: bf00 nop 080011a8 <__aeabi_fcmpgt>: 80011a8: f84d ed08 str.w lr, [sp, #-8]! 80011ac: f7ff ffc8 bl 8001140 <__aeabi_cfrcmple> 80011b0: bf34 ite cc 80011b2: 2001 movcc r0, #1 80011b4: 2000 movcs r0, #0 80011b6: f85d fb08 ldr.w pc, [sp], #8 80011ba: bf00 nop 080011bc <__aeabi_f2iz>: 80011bc: ea4f 0240 mov.w r2, r0, lsl #1 80011c0: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 80011c4: d30f bcc.n 80011e6 <__aeabi_f2iz+0x2a> 80011c6: f04f 039e mov.w r3, #158 @ 0x9e 80011ca: ebb3 6212 subs.w r2, r3, r2, lsr #24 80011ce: d90d bls.n 80011ec <__aeabi_f2iz+0x30> 80011d0: ea4f 2300 mov.w r3, r0, lsl #8 80011d4: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 80011d8: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 80011dc: fa23 f002 lsr.w r0, r3, r2 80011e0: bf18 it ne 80011e2: 4240 negne r0, r0 80011e4: 4770 bx lr 80011e6: f04f 0000 mov.w r0, #0 80011ea: 4770 bx lr 80011ec: f112 0f61 cmn.w r2, #97 @ 0x61 80011f0: d101 bne.n 80011f6 <__aeabi_f2iz+0x3a> 80011f2: 0242 lsls r2, r0, #9 80011f4: d105 bne.n 8001202 <__aeabi_f2iz+0x46> 80011f6: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 80011fa: bf08 it eq 80011fc: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 8001200: 4770 bx lr 8001202: f04f 0000 mov.w r0, #0 8001206: 4770 bx lr 08001208 <__aeabi_ldivmod>: 8001208: b97b cbnz r3, 800122a <__aeabi_ldivmod+0x22> 800120a: b972 cbnz r2, 800122a <__aeabi_ldivmod+0x22> 800120c: 2900 cmp r1, #0 800120e: bfbe ittt lt 8001210: 2000 movlt r0, #0 8001212: f04f 4100 movlt.w r1, #2147483648 @ 0x80000000 8001216: e006 blt.n 8001226 <__aeabi_ldivmod+0x1e> 8001218: bf08 it eq 800121a: 2800 cmpeq r0, #0 800121c: bf1c itt ne 800121e: f06f 4100 mvnne.w r1, #2147483648 @ 0x80000000 8001222: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 8001226: f000 b9b3 b.w 8001590 <__aeabi_idiv0> 800122a: f1ad 0c08 sub.w ip, sp, #8 800122e: e96d ce04 strd ip, lr, [sp, #-16]! 8001232: 2900 cmp r1, #0 8001234: db09 blt.n 800124a <__aeabi_ldivmod+0x42> 8001236: 2b00 cmp r3, #0 8001238: db1a blt.n 8001270 <__aeabi_ldivmod+0x68> 800123a: f000 f84d bl 80012d8 <__udivmoddi4> 800123e: f8dd e004 ldr.w lr, [sp, #4] 8001242: e9dd 2302 ldrd r2, r3, [sp, #8] 8001246: b004 add sp, #16 8001248: 4770 bx lr 800124a: 4240 negs r0, r0 800124c: eb61 0141 sbc.w r1, r1, r1, lsl #1 8001250: 2b00 cmp r3, #0 8001252: db1b blt.n 800128c <__aeabi_ldivmod+0x84> 8001254: f000 f840 bl 80012d8 <__udivmoddi4> 8001258: f8dd e004 ldr.w lr, [sp, #4] 800125c: e9dd 2302 ldrd r2, r3, [sp, #8] 8001260: b004 add sp, #16 8001262: 4240 negs r0, r0 8001264: eb61 0141 sbc.w r1, r1, r1, lsl #1 8001268: 4252 negs r2, r2 800126a: eb63 0343 sbc.w r3, r3, r3, lsl #1 800126e: 4770 bx lr 8001270: 4252 negs r2, r2 8001272: eb63 0343 sbc.w r3, r3, r3, lsl #1 8001276: f000 f82f bl 80012d8 <__udivmoddi4> 800127a: f8dd e004 ldr.w lr, [sp, #4] 800127e: e9dd 2302 ldrd r2, r3, [sp, #8] 8001282: b004 add sp, #16 8001284: 4240 negs r0, r0 8001286: eb61 0141 sbc.w r1, r1, r1, lsl #1 800128a: 4770 bx lr 800128c: 4252 negs r2, r2 800128e: eb63 0343 sbc.w r3, r3, r3, lsl #1 8001292: f000 f821 bl 80012d8 <__udivmoddi4> 8001296: f8dd e004 ldr.w lr, [sp, #4] 800129a: e9dd 2302 ldrd r2, r3, [sp, #8] 800129e: b004 add sp, #16 80012a0: 4252 negs r2, r2 80012a2: eb63 0343 sbc.w r3, r3, r3, lsl #1 80012a6: 4770 bx lr 080012a8 <__aeabi_uldivmod>: 80012a8: b953 cbnz r3, 80012c0 <__aeabi_uldivmod+0x18> 80012aa: b94a cbnz r2, 80012c0 <__aeabi_uldivmod+0x18> 80012ac: 2900 cmp r1, #0 80012ae: bf08 it eq 80012b0: 2800 cmpeq r0, #0 80012b2: bf1c itt ne 80012b4: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff 80012b8: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 80012bc: f000 b968 b.w 8001590 <__aeabi_idiv0> 80012c0: f1ad 0c08 sub.w ip, sp, #8 80012c4: e96d ce04 strd ip, lr, [sp, #-16]! 80012c8: f000 f806 bl 80012d8 <__udivmoddi4> 80012cc: f8dd e004 ldr.w lr, [sp, #4] 80012d0: e9dd 2302 ldrd r2, r3, [sp, #8] 80012d4: b004 add sp, #16 80012d6: 4770 bx lr 080012d8 <__udivmoddi4>: 80012d8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80012dc: 9d08 ldr r5, [sp, #32] 80012de: 460c mov r4, r1 80012e0: 2b00 cmp r3, #0 80012e2: d14e bne.n 8001382 <__udivmoddi4+0xaa> 80012e4: 4694 mov ip, r2 80012e6: 458c cmp ip, r1 80012e8: 4686 mov lr, r0 80012ea: fab2 f282 clz r2, r2 80012ee: d962 bls.n 80013b6 <__udivmoddi4+0xde> 80012f0: b14a cbz r2, 8001306 <__udivmoddi4+0x2e> 80012f2: f1c2 0320 rsb r3, r2, #32 80012f6: 4091 lsls r1, r2 80012f8: fa20 f303 lsr.w r3, r0, r3 80012fc: fa0c fc02 lsl.w ip, ip, r2 8001300: 4319 orrs r1, r3 8001302: fa00 fe02 lsl.w lr, r0, r2 8001306: ea4f 471c mov.w r7, ip, lsr #16 800130a: fbb1 f4f7 udiv r4, r1, r7 800130e: fb07 1114 mls r1, r7, r4, r1 8001312: fa1f f68c uxth.w r6, ip 8001316: ea4f 431e mov.w r3, lr, lsr #16 800131a: ea43 4301 orr.w r3, r3, r1, lsl #16 800131e: fb04 f106 mul.w r1, r4, r6 8001322: 4299 cmp r1, r3 8001324: d90a bls.n 800133c <__udivmoddi4+0x64> 8001326: eb1c 0303 adds.w r3, ip, r3 800132a: f104 30ff add.w r0, r4, #4294967295 @ 0xffffffff 800132e: f080 8110 bcs.w 8001552 <__udivmoddi4+0x27a> 8001332: 4299 cmp r1, r3 8001334: f240 810d bls.w 8001552 <__udivmoddi4+0x27a> 8001338: 3c02 subs r4, #2 800133a: 4463 add r3, ip 800133c: 1a59 subs r1, r3, r1 800133e: fbb1 f0f7 udiv r0, r1, r7 8001342: fb07 1110 mls r1, r7, r0, r1 8001346: fb00 f606 mul.w r6, r0, r6 800134a: fa1f f38e uxth.w r3, lr 800134e: ea43 4301 orr.w r3, r3, r1, lsl #16 8001352: 429e cmp r6, r3 8001354: d90a bls.n 800136c <__udivmoddi4+0x94> 8001356: eb1c 0303 adds.w r3, ip, r3 800135a: f100 31ff add.w r1, r0, #4294967295 @ 0xffffffff 800135e: f080 80fa bcs.w 8001556 <__udivmoddi4+0x27e> 8001362: 429e cmp r6, r3 8001364: f240 80f7 bls.w 8001556 <__udivmoddi4+0x27e> 8001368: 4463 add r3, ip 800136a: 3802 subs r0, #2 800136c: 2100 movs r1, #0 800136e: 1b9b subs r3, r3, r6 8001370: ea40 4004 orr.w r0, r0, r4, lsl #16 8001374: b11d cbz r5, 800137e <__udivmoddi4+0xa6> 8001376: 40d3 lsrs r3, r2 8001378: 2200 movs r2, #0 800137a: e9c5 3200 strd r3, r2, [r5] 800137e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8001382: 428b cmp r3, r1 8001384: d905 bls.n 8001392 <__udivmoddi4+0xba> 8001386: b10d cbz r5, 800138c <__udivmoddi4+0xb4> 8001388: e9c5 0100 strd r0, r1, [r5] 800138c: 2100 movs r1, #0 800138e: 4608 mov r0, r1 8001390: e7f5 b.n 800137e <__udivmoddi4+0xa6> 8001392: fab3 f183 clz r1, r3 8001396: 2900 cmp r1, #0 8001398: d146 bne.n 8001428 <__udivmoddi4+0x150> 800139a: 42a3 cmp r3, r4 800139c: d302 bcc.n 80013a4 <__udivmoddi4+0xcc> 800139e: 4290 cmp r0, r2 80013a0: f0c0 80ee bcc.w 8001580 <__udivmoddi4+0x2a8> 80013a4: 1a86 subs r6, r0, r2 80013a6: eb64 0303 sbc.w r3, r4, r3 80013aa: 2001 movs r0, #1 80013ac: 2d00 cmp r5, #0 80013ae: d0e6 beq.n 800137e <__udivmoddi4+0xa6> 80013b0: e9c5 6300 strd r6, r3, [r5] 80013b4: e7e3 b.n 800137e <__udivmoddi4+0xa6> 80013b6: 2a00 cmp r2, #0 80013b8: f040 808f bne.w 80014da <__udivmoddi4+0x202> 80013bc: eba1 040c sub.w r4, r1, ip 80013c0: 2101 movs r1, #1 80013c2: ea4f 481c mov.w r8, ip, lsr #16 80013c6: fa1f f78c uxth.w r7, ip 80013ca: fbb4 f6f8 udiv r6, r4, r8 80013ce: fb08 4416 mls r4, r8, r6, r4 80013d2: fb07 f006 mul.w r0, r7, r6 80013d6: ea4f 431e mov.w r3, lr, lsr #16 80013da: ea43 4304 orr.w r3, r3, r4, lsl #16 80013de: 4298 cmp r0, r3 80013e0: d908 bls.n 80013f4 <__udivmoddi4+0x11c> 80013e2: eb1c 0303 adds.w r3, ip, r3 80013e6: f106 34ff add.w r4, r6, #4294967295 @ 0xffffffff 80013ea: d202 bcs.n 80013f2 <__udivmoddi4+0x11a> 80013ec: 4298 cmp r0, r3 80013ee: f200 80cb bhi.w 8001588 <__udivmoddi4+0x2b0> 80013f2: 4626 mov r6, r4 80013f4: 1a1c subs r4, r3, r0 80013f6: fbb4 f0f8 udiv r0, r4, r8 80013fa: fb08 4410 mls r4, r8, r0, r4 80013fe: fb00 f707 mul.w r7, r0, r7 8001402: fa1f f38e uxth.w r3, lr 8001406: ea43 4304 orr.w r3, r3, r4, lsl #16 800140a: 429f cmp r7, r3 800140c: d908 bls.n 8001420 <__udivmoddi4+0x148> 800140e: eb1c 0303 adds.w r3, ip, r3 8001412: f100 34ff add.w r4, r0, #4294967295 @ 0xffffffff 8001416: d202 bcs.n 800141e <__udivmoddi4+0x146> 8001418: 429f cmp r7, r3 800141a: f200 80ae bhi.w 800157a <__udivmoddi4+0x2a2> 800141e: 4620 mov r0, r4 8001420: 1bdb subs r3, r3, r7 8001422: ea40 4006 orr.w r0, r0, r6, lsl #16 8001426: e7a5 b.n 8001374 <__udivmoddi4+0x9c> 8001428: f1c1 0720 rsb r7, r1, #32 800142c: 408b lsls r3, r1 800142e: fa22 fc07 lsr.w ip, r2, r7 8001432: ea4c 0c03 orr.w ip, ip, r3 8001436: fa24 f607 lsr.w r6, r4, r7 800143a: ea4f 491c mov.w r9, ip, lsr #16 800143e: fbb6 f8f9 udiv r8, r6, r9 8001442: fa1f fe8c uxth.w lr, ip 8001446: fb09 6618 mls r6, r9, r8, r6 800144a: fa20 f307 lsr.w r3, r0, r7 800144e: 408c lsls r4, r1 8001450: fa00 fa01 lsl.w sl, r0, r1 8001454: fb08 f00e mul.w r0, r8, lr 8001458: 431c orrs r4, r3 800145a: 0c23 lsrs r3, r4, #16 800145c: ea43 4306 orr.w r3, r3, r6, lsl #16 8001460: 4298 cmp r0, r3 8001462: fa02 f201 lsl.w r2, r2, r1 8001466: d90a bls.n 800147e <__udivmoddi4+0x1a6> 8001468: eb1c 0303 adds.w r3, ip, r3 800146c: f108 36ff add.w r6, r8, #4294967295 @ 0xffffffff 8001470: f080 8081 bcs.w 8001576 <__udivmoddi4+0x29e> 8001474: 4298 cmp r0, r3 8001476: d97e bls.n 8001576 <__udivmoddi4+0x29e> 8001478: f1a8 0802 sub.w r8, r8, #2 800147c: 4463 add r3, ip 800147e: 1a1e subs r6, r3, r0 8001480: fbb6 f3f9 udiv r3, r6, r9 8001484: fb09 6613 mls r6, r9, r3, r6 8001488: fb03 fe0e mul.w lr, r3, lr 800148c: b2a4 uxth r4, r4 800148e: ea44 4406 orr.w r4, r4, r6, lsl #16 8001492: 45a6 cmp lr, r4 8001494: d908 bls.n 80014a8 <__udivmoddi4+0x1d0> 8001496: eb1c 0404 adds.w r4, ip, r4 800149a: f103 30ff add.w r0, r3, #4294967295 @ 0xffffffff 800149e: d266 bcs.n 800156e <__udivmoddi4+0x296> 80014a0: 45a6 cmp lr, r4 80014a2: d964 bls.n 800156e <__udivmoddi4+0x296> 80014a4: 3b02 subs r3, #2 80014a6: 4464 add r4, ip 80014a8: ea43 4008 orr.w r0, r3, r8, lsl #16 80014ac: fba0 8302 umull r8, r3, r0, r2 80014b0: eba4 040e sub.w r4, r4, lr 80014b4: 429c cmp r4, r3 80014b6: 46c6 mov lr, r8 80014b8: 461e mov r6, r3 80014ba: d350 bcc.n 800155e <__udivmoddi4+0x286> 80014bc: d04d beq.n 800155a <__udivmoddi4+0x282> 80014be: b155 cbz r5, 80014d6 <__udivmoddi4+0x1fe> 80014c0: ebba 030e subs.w r3, sl, lr 80014c4: eb64 0406 sbc.w r4, r4, r6 80014c8: fa04 f707 lsl.w r7, r4, r7 80014cc: 40cb lsrs r3, r1 80014ce: 431f orrs r7, r3 80014d0: 40cc lsrs r4, r1 80014d2: e9c5 7400 strd r7, r4, [r5] 80014d6: 2100 movs r1, #0 80014d8: e751 b.n 800137e <__udivmoddi4+0xa6> 80014da: fa0c fc02 lsl.w ip, ip, r2 80014de: f1c2 0320 rsb r3, r2, #32 80014e2: 40d9 lsrs r1, r3 80014e4: ea4f 481c mov.w r8, ip, lsr #16 80014e8: fa20 f303 lsr.w r3, r0, r3 80014ec: fa00 fe02 lsl.w lr, r0, r2 80014f0: fbb1 f0f8 udiv r0, r1, r8 80014f4: fb08 1110 mls r1, r8, r0, r1 80014f8: 4094 lsls r4, r2 80014fa: 431c orrs r4, r3 80014fc: fa1f f78c uxth.w r7, ip 8001500: 0c23 lsrs r3, r4, #16 8001502: ea43 4301 orr.w r3, r3, r1, lsl #16 8001506: fb00 f107 mul.w r1, r0, r7 800150a: 4299 cmp r1, r3 800150c: d908 bls.n 8001520 <__udivmoddi4+0x248> 800150e: eb1c 0303 adds.w r3, ip, r3 8001512: f100 36ff add.w r6, r0, #4294967295 @ 0xffffffff 8001516: d22c bcs.n 8001572 <__udivmoddi4+0x29a> 8001518: 4299 cmp r1, r3 800151a: d92a bls.n 8001572 <__udivmoddi4+0x29a> 800151c: 3802 subs r0, #2 800151e: 4463 add r3, ip 8001520: 1a5b subs r3, r3, r1 8001522: fbb3 f1f8 udiv r1, r3, r8 8001526: fb08 3311 mls r3, r8, r1, r3 800152a: b2a4 uxth r4, r4 800152c: ea44 4403 orr.w r4, r4, r3, lsl #16 8001530: fb01 f307 mul.w r3, r1, r7 8001534: 42a3 cmp r3, r4 8001536: d908 bls.n 800154a <__udivmoddi4+0x272> 8001538: eb1c 0404 adds.w r4, ip, r4 800153c: f101 36ff add.w r6, r1, #4294967295 @ 0xffffffff 8001540: d213 bcs.n 800156a <__udivmoddi4+0x292> 8001542: 42a3 cmp r3, r4 8001544: d911 bls.n 800156a <__udivmoddi4+0x292> 8001546: 3902 subs r1, #2 8001548: 4464 add r4, ip 800154a: 1ae4 subs r4, r4, r3 800154c: ea41 4100 orr.w r1, r1, r0, lsl #16 8001550: e73b b.n 80013ca <__udivmoddi4+0xf2> 8001552: 4604 mov r4, r0 8001554: e6f2 b.n 800133c <__udivmoddi4+0x64> 8001556: 4608 mov r0, r1 8001558: e708 b.n 800136c <__udivmoddi4+0x94> 800155a: 45c2 cmp sl, r8 800155c: d2af bcs.n 80014be <__udivmoddi4+0x1e6> 800155e: ebb8 0e02 subs.w lr, r8, r2 8001562: eb63 060c sbc.w r6, r3, ip 8001566: 3801 subs r0, #1 8001568: e7a9 b.n 80014be <__udivmoddi4+0x1e6> 800156a: 4631 mov r1, r6 800156c: e7ed b.n 800154a <__udivmoddi4+0x272> 800156e: 4603 mov r3, r0 8001570: e79a b.n 80014a8 <__udivmoddi4+0x1d0> 8001572: 4630 mov r0, r6 8001574: e7d4 b.n 8001520 <__udivmoddi4+0x248> 8001576: 46b0 mov r8, r6 8001578: e781 b.n 800147e <__udivmoddi4+0x1a6> 800157a: 4463 add r3, ip 800157c: 3802 subs r0, #2 800157e: e74f b.n 8001420 <__udivmoddi4+0x148> 8001580: 4606 mov r6, r0 8001582: 4623 mov r3, r4 8001584: 4608 mov r0, r1 8001586: e711 b.n 80013ac <__udivmoddi4+0xd4> 8001588: 3e02 subs r6, #2 800158a: 4463 add r3, ip 800158c: e732 b.n 80013f4 <__udivmoddi4+0x11c> 800158e: bf00 nop 08001590 <__aeabi_idiv0>: 8001590: 4770 bx lr 8001592: bf00 nop 08001594 : ADC_HandleTypeDef hadc1; /* ADC1 init function */ void MX_ADC1_Init(void) { 8001594: b580 push {r7, lr} 8001596: b084 sub sp, #16 8001598: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 800159a: 1d3b adds r3, r7, #4 800159c: 2200 movs r2, #0 800159e: 601a str r2, [r3, #0] 80015a0: 605a str r2, [r3, #4] 80015a2: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 80015a4: 4b18 ldr r3, [pc, #96] @ (8001608 ) 80015a6: 4a19 ldr r2, [pc, #100] @ (800160c ) 80015a8: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 80015aa: 4b17 ldr r3, [pc, #92] @ (8001608 ) 80015ac: 2200 movs r2, #0 80015ae: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = DISABLE; 80015b0: 4b15 ldr r3, [pc, #84] @ (8001608 ) 80015b2: 2200 movs r2, #0 80015b4: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 80015b6: 4b14 ldr r3, [pc, #80] @ (8001608 ) 80015b8: 2200 movs r2, #0 80015ba: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80015bc: 4b12 ldr r3, [pc, #72] @ (8001608 ) 80015be: f44f 2260 mov.w r2, #917504 @ 0xe0000 80015c2: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80015c4: 4b10 ldr r3, [pc, #64] @ (8001608 ) 80015c6: 2200 movs r2, #0 80015c8: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 1; 80015ca: 4b0f ldr r3, [pc, #60] @ (8001608 ) 80015cc: 2201 movs r2, #1 80015ce: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 80015d0: 480d ldr r0, [pc, #52] @ (8001608 ) 80015d2: f004 f95d bl 8005890 80015d6: 4603 mov r3, r0 80015d8: 2b00 cmp r3, #0 80015da: d001 beq.n 80015e0 { Error_Handler(); 80015dc: f003 fd00 bl 8004fe0 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 80015e0: 2308 movs r3, #8 80015e2: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 80015e4: 2301 movs r3, #1 80015e6: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 80015e8: 2300 movs r3, #0 80015ea: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80015ec: 1d3b adds r3, r7, #4 80015ee: 4619 mov r1, r3 80015f0: 4805 ldr r0, [pc, #20] @ (8001608 ) 80015f2: f004 fc11 bl 8005e18 80015f6: 4603 mov r3, r0 80015f8: 2b00 cmp r3, #0 80015fa: d001 beq.n 8001600 { Error_Handler(); 80015fc: f003 fcf0 bl 8004fe0 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 8001600: bf00 nop 8001602: 3710 adds r7, #16 8001604: 46bd mov sp, r7 8001606: bd80 pop {r7, pc} 8001608: 20000258 .word 0x20000258 800160c: 40012400 .word 0x40012400 08001610 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { 8001610: b580 push {r7, lr} 8001612: b08a sub sp, #40 @ 0x28 8001614: af00 add r7, sp, #0 8001616: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001618: f107 0318 add.w r3, r7, #24 800161c: 2200 movs r2, #0 800161e: 601a str r2, [r3, #0] 8001620: 605a str r2, [r3, #4] 8001622: 609a str r2, [r3, #8] 8001624: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) 8001626: 687b ldr r3, [r7, #4] 8001628: 681b ldr r3, [r3, #0] 800162a: 4a1f ldr r2, [pc, #124] @ (80016a8 ) 800162c: 4293 cmp r3, r2 800162e: d137 bne.n 80016a0 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8001630: 4b1e ldr r3, [pc, #120] @ (80016ac ) 8001632: 699b ldr r3, [r3, #24] 8001634: 4a1d ldr r2, [pc, #116] @ (80016ac ) 8001636: f443 7300 orr.w r3, r3, #512 @ 0x200 800163a: 6193 str r3, [r2, #24] 800163c: 4b1b ldr r3, [pc, #108] @ (80016ac ) 800163e: 699b ldr r3, [r3, #24] 8001640: f403 7300 and.w r3, r3, #512 @ 0x200 8001644: 617b str r3, [r7, #20] 8001646: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001648: 4b18 ldr r3, [pc, #96] @ (80016ac ) 800164a: 699b ldr r3, [r3, #24] 800164c: 4a17 ldr r2, [pc, #92] @ (80016ac ) 800164e: f043 0304 orr.w r3, r3, #4 8001652: 6193 str r3, [r2, #24] 8001654: 4b15 ldr r3, [pc, #84] @ (80016ac ) 8001656: 699b ldr r3, [r3, #24] 8001658: f003 0304 and.w r3, r3, #4 800165c: 613b str r3, [r7, #16] 800165e: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001660: 4b12 ldr r3, [pc, #72] @ (80016ac ) 8001662: 699b ldr r3, [r3, #24] 8001664: 4a11 ldr r2, [pc, #68] @ (80016ac ) 8001666: f043 0308 orr.w r3, r3, #8 800166a: 6193 str r3, [r2, #24] 800166c: 4b0f ldr r3, [pc, #60] @ (80016ac ) 800166e: 699b ldr r3, [r3, #24] 8001670: f003 0308 and.w r3, r3, #8 8001674: 60fb str r3, [r7, #12] 8001676: 68fb ldr r3, [r7, #12] /**ADC1 GPIO Configuration PA6 ------> ADC1_IN6 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = ADC_CC1_Pin; 8001678: 2340 movs r3, #64 @ 0x40 800167a: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 800167c: 2303 movs r3, #3 800167e: 61fb str r3, [r7, #28] HAL_GPIO_Init(ADC_CC1_GPIO_Port, &GPIO_InitStruct); 8001680: f107 0318 add.w r3, r7, #24 8001684: 4619 mov r1, r3 8001686: 480a ldr r0, [pc, #40] @ (80016b0 ) 8001688: f005 ff02 bl 8007490 GPIO_InitStruct.Pin = ADC_NTC1_Pin|ADC_NTC2_Pin; 800168c: 2303 movs r3, #3 800168e: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8001690: 2303 movs r3, #3 8001692: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001694: f107 0318 add.w r3, r7, #24 8001698: 4619 mov r1, r3 800169a: 4806 ldr r0, [pc, #24] @ (80016b4 ) 800169c: f005 fef8 bl 8007490 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 80016a0: bf00 nop 80016a2: 3728 adds r7, #40 @ 0x28 80016a4: 46bd mov sp, r7 80016a6: bd80 pop {r7, pc} 80016a8: 40012400 .word 0x40012400 80016ac: 40021000 .word 0x40021000 80016b0: 40010800 .word 0x40010800 80016b4: 40010c00 .word 0x40010c00 080016b8 : //TODO: //TEMP READ //GBT_TEMP_SENSORS void RELAY_Write(relay_t num, uint8_t state){ 80016b8: b580 push {r7, lr} 80016ba: b082 sub sp, #8 80016bc: af00 add r7, sp, #0 80016be: 4603 mov r3, r0 80016c0: 460a mov r2, r1 80016c2: 71fb strb r3, [r7, #7] 80016c4: 4613 mov r3, r2 80016c6: 71bb strb r3, [r7, #6] if(num==RELAY_AUX)HAL_GPIO_WritePin(RELAY_AUX_GPIO_Port, RELAY_AUX_Pin, state); 80016c8: 79fb ldrb r3, [r7, #7] 80016ca: 2b00 cmp r3, #0 80016cc: d105 bne.n 80016da 80016ce: 79bb ldrb r3, [r7, #6] 80016d0: 461a mov r2, r3 80016d2: 2110 movs r1, #16 80016d4: 4808 ldr r0, [pc, #32] @ (80016f8 ) 80016d6: f006 f876 bl 80077c6 if(num==RELAY_CC)HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, state); 80016da: 79fb ldrb r3, [r7, #7] 80016dc: 2b01 cmp r3, #1 80016de: d106 bne.n 80016ee 80016e0: 79bb ldrb r3, [r7, #6] 80016e2: 461a mov r2, r3 80016e4: f44f 4100 mov.w r1, #32768 @ 0x8000 80016e8: 4804 ldr r0, [pc, #16] @ (80016fc ) 80016ea: f006 f86c bl 80077c6 } 80016ee: bf00 nop 80016f0: 3708 adds r7, #8 80016f2: 46bd mov sp, r7 80016f4: bd80 pop {r7, pc} 80016f6: bf00 nop 80016f8: 40010c00 .word 0x40010c00 80016fc: 40011800 .word 0x40011800 08001700 : // // HAL_ADC_Stop(&hadc1); // stop adc return 0; } void Init_Peripheral(){ 8001700: b580 push {r7, lr} 8001702: af00 add r7, sp, #0 HAL_ADCEx_Calibration_Start(&hadc1); 8001704: 4806 ldr r0, [pc, #24] @ (8001720 ) 8001706: f004 fd1b bl 8006140 RELAY_Write(RELAY_AUX, 0); 800170a: 2100 movs r1, #0 800170c: 2000 movs r0, #0 800170e: f7ff ffd3 bl 80016b8 RELAY_Write(RELAY_CC, 1); 8001712: 2101 movs r1, #1 8001714: 2001 movs r0, #1 8001716: f7ff ffcf bl 80016b8 } 800171a: bf00 nop 800171c: bd80 pop {r7, pc} 800171e: bf00 nop 8001720: 20000258 .word 0x20000258 08001724 : float pt1000_to_temperature(float resistance) { 8001724: b590 push {r4, r7, lr} 8001726: b087 sub sp, #28 8001728: af00 add r7, sp, #0 800172a: 6078 str r0, [r7, #4] // Константы для PT1000 const float R0 = 1000.0; // Сопротивление при 0 °C 800172c: 4b0c ldr r3, [pc, #48] @ (8001760 ) 800172e: 617b str r3, [r7, #20] const float C_A = 3.9083E-3f; 8001730: 4b0c ldr r3, [pc, #48] @ (8001764 ) 8001732: 613b str r3, [r7, #16] // const float B = -5.775e-07; // Второй коэффициент (°C^-2) // // // Расчет температуры по формуле // float temperature = -A / (B - (R0 / resistance - 1) * A); float temperature = (resistance-R0) / ( R0 * C_A); 8001734: 6979 ldr r1, [r7, #20] 8001736: 6878 ldr r0, [r7, #4] 8001738: f7ff fa70 bl 8000c1c <__aeabi_fsub> 800173c: 4603 mov r3, r0 800173e: 461c mov r4, r3 8001740: 6939 ldr r1, [r7, #16] 8001742: 6978 ldr r0, [r7, #20] 8001744: f7ff fb74 bl 8000e30 <__aeabi_fmul> 8001748: 4603 mov r3, r0 800174a: 4619 mov r1, r3 800174c: 4620 mov r0, r4 800174e: f7ff fc23 bl 8000f98 <__aeabi_fdiv> 8001752: 4603 mov r3, r0 8001754: 60fb str r3, [r7, #12] return temperature; 8001756: 68fb ldr r3, [r7, #12] } 8001758: 4618 mov r0, r3 800175a: 371c adds r7, #28 800175c: 46bd mov sp, r7 800175e: bd90 pop {r4, r7, pc} 8001760: 447a0000 .word 0x447a0000 8001764: 3b801132 .word 0x3b801132 08001768 : float calculate_NTC_resistance(int adc_value, float Vref, float Vin, float R) { 8001768: b5b0 push {r4, r5, r7, lr} 800176a: b086 sub sp, #24 800176c: af00 add r7, sp, #0 800176e: 60f8 str r0, [r7, #12] 8001770: 60b9 str r1, [r7, #8] 8001772: 607a str r2, [r7, #4] 8001774: 603b str r3, [r7, #0] // Преобразуем значение АЦП в выходное напряжение float Vout = (adc_value / 4095.0) * Vref; 8001776: 68f8 ldr r0, [r7, #12] 8001778: f7fe feba bl 80004f0 <__aeabi_i2d> 800177c: a31c add r3, pc, #112 @ (adr r3, 80017f0 ) 800177e: e9d3 2300 ldrd r2, r3, [r3] 8001782: f7ff f849 bl 8000818 <__aeabi_ddiv> 8001786: 4602 mov r2, r0 8001788: 460b mov r3, r1 800178a: 4614 mov r4, r2 800178c: 461d mov r5, r3 800178e: 68b8 ldr r0, [r7, #8] 8001790: f7fe fec0 bl 8000514 <__aeabi_f2d> 8001794: 4602 mov r2, r0 8001796: 460b mov r3, r1 8001798: 4620 mov r0, r4 800179a: 4629 mov r1, r5 800179c: f7fe ff12 bl 80005c4 <__aeabi_dmul> 80017a0: 4602 mov r2, r0 80017a2: 460b mov r3, r1 80017a4: 4610 mov r0, r2 80017a6: 4619 mov r1, r3 80017a8: f7ff f9e4 bl 8000b74 <__aeabi_d2f> 80017ac: 4603 mov r3, r0 80017ae: 617b str r3, [r7, #20] // Проверяем, чтобы Vout не было равно Vin if (Vout >= Vin) { 80017b0: 6879 ldr r1, [r7, #4] 80017b2: 6978 ldr r0, [r7, #20] 80017b4: f7ff fcee bl 8001194 <__aeabi_fcmpge> 80017b8: 4603 mov r3, r0 80017ba: 2b00 cmp r3, #0 80017bc: d001 beq.n 80017c2 return -1; // Ошибка: Vout не может быть больше или равно Vin 80017be: 4b0e ldr r3, [pc, #56] @ (80017f8 ) 80017c0: e010 b.n 80017e4 } // Вычисляем сопротивление термистора float R_NTC = R * (Vout / (Vin - Vout)); 80017c2: 6979 ldr r1, [r7, #20] 80017c4: 6878 ldr r0, [r7, #4] 80017c6: f7ff fa29 bl 8000c1c <__aeabi_fsub> 80017ca: 4603 mov r3, r0 80017cc: 4619 mov r1, r3 80017ce: 6978 ldr r0, [r7, #20] 80017d0: f7ff fbe2 bl 8000f98 <__aeabi_fdiv> 80017d4: 4603 mov r3, r0 80017d6: 4619 mov r1, r3 80017d8: 6838 ldr r0, [r7, #0] 80017da: f7ff fb29 bl 8000e30 <__aeabi_fmul> 80017de: 4603 mov r3, r0 80017e0: 613b str r3, [r7, #16] return R_NTC; 80017e2: 693b ldr r3, [r7, #16] } 80017e4: 4618 mov r0, r3 80017e6: 3718 adds r7, #24 80017e8: 46bd mov sp, r7 80017ea: bdb0 pop {r4, r5, r7, pc} 80017ec: f3af 8000 nop.w 80017f0: 00000000 .word 0x00000000 80017f4: 40affe00 .word 0x40affe00 80017f8: bf800000 .word 0xbf800000 080017fc : int16_t GBT_ReadTemp(uint8_t ch){ 80017fc: b580 push {r7, lr} 80017fe: b088 sub sp, #32 8001800: af00 add r7, sp, #0 8001802: 4603 mov r3, r0 8001804: 71fb strb r3, [r7, #7] //TODO if(ch)ADC_Select_Channel(ADC_CHANNEL_8); 8001806: 79fb ldrb r3, [r7, #7] 8001808: 2b00 cmp r3, #0 800180a: d003 beq.n 8001814 800180c: 2008 movs r0, #8 800180e: f000 f83b bl 8001888 8001812: e002 b.n 800181a else ADC_Select_Channel(ADC_CHANNEL_9); 8001814: 2009 movs r0, #9 8001816: f000 f837 bl 8001888 // Начало конверсии HAL_ADC_Start(&hadc1); 800181a: 4817 ldr r0, [pc, #92] @ (8001878 ) 800181c: f004 f910 bl 8005a40 // Ожидание окончания конверсии HAL_ADC_PollForConversion(&hadc1, HAL_MAX_DELAY); 8001820: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 8001824: 4814 ldr r0, [pc, #80] @ (8001878 ) 8001826: f004 f9e5 bl 8005bf4 // Получение значения uint32_t adcValue = HAL_ADC_GetValue(&hadc1); 800182a: 4813 ldr r0, [pc, #76] @ (8001878 ) 800182c: f004 fae8 bl 8005e00 8001830: 61f8 str r0, [r7, #28] // Остановка АЦП (по желанию) HAL_ADC_Stop(&hadc1); 8001832: 4811 ldr r0, [pc, #68] @ (8001878 ) 8001834: f004 f9b2 bl 8005b9c if(adcValue>4000) return 20; //Термодатчик не подключен 8001838: 69fb ldr r3, [r7, #28] 800183a: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800183e: d901 bls.n 8001844 8001840: 2314 movs r3, #20 8001842: e015 b.n 8001870 // int adc_value = 2048; // Пример значения АЦП float Vref = 3.3; // Напряжение опорное 8001844: 4b0d ldr r3, [pc, #52] @ (800187c ) 8001846: 61bb str r3, [r7, #24] float Vin = 5.0; // Входное напряжение 8001848: 4b0d ldr r3, [pc, #52] @ (8001880 ) 800184a: 617b str r3, [r7, #20] float R = 1000; // Сопротивление резистора в Омах 800184c: 4b0d ldr r3, [pc, #52] @ (8001884 ) 800184e: 613b str r3, [r7, #16] float temp = pt1000_to_temperature(calculate_NTC_resistance(adcValue, Vref, Vin, R)); 8001850: 69f8 ldr r0, [r7, #28] 8001852: 693b ldr r3, [r7, #16] 8001854: 697a ldr r2, [r7, #20] 8001856: 69b9 ldr r1, [r7, #24] 8001858: f7ff ff86 bl 8001768 800185c: 4603 mov r3, r0 800185e: 4618 mov r0, r3 8001860: f7ff ff60 bl 8001724 8001864: 60f8 str r0, [r7, #12] return (int16_t)temp; 8001866: 68f8 ldr r0, [r7, #12] 8001868: f7ff fca8 bl 80011bc <__aeabi_f2iz> 800186c: 4603 mov r3, r0 800186e: b21b sxth r3, r3 } 8001870: 4618 mov r0, r3 8001872: 3720 adds r7, #32 8001874: 46bd mov sp, r7 8001876: bd80 pop {r7, pc} 8001878: 20000258 .word 0x20000258 800187c: 40533333 .word 0x40533333 8001880: 40a00000 .word 0x40a00000 8001884: 447a0000 .word 0x447a0000 08001888 : void ADC_Select_Channel(uint32_t ch) { 8001888: b580 push {r7, lr} 800188a: b086 sub sp, #24 800188c: af00 add r7, sp, #0 800188e: 6078 str r0, [r7, #4] ADC_ChannelConfTypeDef conf = { 8001890: 687b ldr r3, [r7, #4] 8001892: 60fb str r3, [r7, #12] 8001894: 2301 movs r3, #1 8001896: 613b str r3, [r7, #16] 8001898: 2303 movs r3, #3 800189a: 617b str r3, [r7, #20] .Channel = ch, .Rank = 1, .SamplingTime = ADC_SAMPLETIME_28CYCLES_5, }; if (HAL_ADC_ConfigChannel(&hadc1, &conf) != HAL_OK) { 800189c: f107 030c add.w r3, r7, #12 80018a0: 4619 mov r1, r3 80018a2: 4806 ldr r0, [pc, #24] @ (80018bc ) 80018a4: f004 fab8 bl 8005e18 80018a8: 4603 mov r3, r0 80018aa: 2b00 cmp r3, #0 80018ac: d001 beq.n 80018b2 Error_Handler(); 80018ae: f003 fb97 bl 8004fe0 } } 80018b2: bf00 nop 80018b4: 3718 adds r7, #24 80018b6: 46bd mov sp, r7 80018b8: bd80 pop {r7, pc} 80018ba: bf00 nop 80018bc: 20000258 .word 0x20000258 080018c0 : uint8_t SW_GetAddr(){ 80018c0: b580 push {r7, lr} 80018c2: af00 add r7, sp, #0 if(!HAL_GPIO_ReadPin(ADDR_0_GPIO_Port, ADDR_0_Pin)){ 80018c4: f44f 6180 mov.w r1, #1024 @ 0x400 80018c8: 480f ldr r0, [pc, #60] @ (8001908 ) 80018ca: f005 ff65 bl 8007798 80018ce: 4603 mov r3, r0 80018d0: 2b00 cmp r3, #0 80018d2: d10b bne.n 80018ec if(!HAL_GPIO_ReadPin(ADDR_1_GPIO_Port, ADDR_1_Pin)){ 80018d4: f44f 6100 mov.w r1, #2048 @ 0x800 80018d8: 480b ldr r0, [pc, #44] @ (8001908 ) 80018da: f005 ff5d bl 8007798 80018de: 4603 mov r3, r0 80018e0: 2b00 cmp r3, #0 80018e2: d101 bne.n 80018e8 return 0x23; 80018e4: 2323 movs r3, #35 @ 0x23 80018e6: e00c b.n 8001902 }else{ return 0x21; 80018e8: 2321 movs r3, #33 @ 0x21 80018ea: e00a b.n 8001902 } }else{ if(!HAL_GPIO_ReadPin(ADDR_1_GPIO_Port, ADDR_1_Pin)){ 80018ec: f44f 6100 mov.w r1, #2048 @ 0x800 80018f0: 4805 ldr r0, [pc, #20] @ (8001908 ) 80018f2: f005 ff51 bl 8007798 80018f6: 4603 mov r3, r0 80018f8: 2b00 cmp r3, #0 80018fa: d101 bne.n 8001900 return 0x22; 80018fc: 2322 movs r3, #34 @ 0x22 80018fe: e000 b.n 8001902 }else{ return 0x20; 8001900: 2320 movs r3, #32 } } } 8001902: 4618 mov r0, r3 8001904: bd80 pop {r7, pc} 8001906: bf00 nop 8001908: 40011800 .word 0x40011800 0800190c : CAN_HandleTypeDef hcan1; CAN_HandleTypeDef hcan2; /* CAN1 init function */ void MX_CAN1_Init(void) { 800190c: b580 push {r7, lr} 800190e: af00 add r7, sp, #0 /* USER CODE END CAN1_Init 0 */ /* USER CODE BEGIN CAN1_Init 1 */ /* USER CODE END CAN1_Init 1 */ hcan1.Instance = CAN1; 8001910: 4b17 ldr r3, [pc, #92] @ (8001970 ) 8001912: 4a18 ldr r2, [pc, #96] @ (8001974 ) 8001914: 601a str r2, [r3, #0] hcan1.Init.Prescaler = 8; 8001916: 4b16 ldr r3, [pc, #88] @ (8001970 ) 8001918: 2208 movs r2, #8 800191a: 605a str r2, [r3, #4] hcan1.Init.Mode = CAN_MODE_NORMAL; 800191c: 4b14 ldr r3, [pc, #80] @ (8001970 ) 800191e: 2200 movs r2, #0 8001920: 609a str r2, [r3, #8] hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ; 8001922: 4b13 ldr r3, [pc, #76] @ (8001970 ) 8001924: 2200 movs r2, #0 8001926: 60da str r2, [r3, #12] hcan1.Init.TimeSeg1 = CAN_BS1_15TQ; 8001928: 4b11 ldr r3, [pc, #68] @ (8001970 ) 800192a: f44f 2260 mov.w r2, #917504 @ 0xe0000 800192e: 611a str r2, [r3, #16] hcan1.Init.TimeSeg2 = CAN_BS2_2TQ; 8001930: 4b0f ldr r3, [pc, #60] @ (8001970 ) 8001932: f44f 1280 mov.w r2, #1048576 @ 0x100000 8001936: 615a str r2, [r3, #20] hcan1.Init.TimeTriggeredMode = DISABLE; 8001938: 4b0d ldr r3, [pc, #52] @ (8001970 ) 800193a: 2200 movs r2, #0 800193c: 761a strb r2, [r3, #24] hcan1.Init.AutoBusOff = ENABLE; 800193e: 4b0c ldr r3, [pc, #48] @ (8001970 ) 8001940: 2201 movs r2, #1 8001942: 765a strb r2, [r3, #25] hcan1.Init.AutoWakeUp = ENABLE; 8001944: 4b0a ldr r3, [pc, #40] @ (8001970 ) 8001946: 2201 movs r2, #1 8001948: 769a strb r2, [r3, #26] hcan1.Init.AutoRetransmission = DISABLE; 800194a: 4b09 ldr r3, [pc, #36] @ (8001970 ) 800194c: 2200 movs r2, #0 800194e: 76da strb r2, [r3, #27] hcan1.Init.ReceiveFifoLocked = DISABLE; 8001950: 4b07 ldr r3, [pc, #28] @ (8001970 ) 8001952: 2200 movs r2, #0 8001954: 771a strb r2, [r3, #28] hcan1.Init.TransmitFifoPriority = ENABLE; 8001956: 4b06 ldr r3, [pc, #24] @ (8001970 ) 8001958: 2201 movs r2, #1 800195a: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan1) != HAL_OK) 800195c: 4804 ldr r0, [pc, #16] @ (8001970 ) 800195e: f004 fc9b bl 8006298 8001962: 4603 mov r3, r0 8001964: 2b00 cmp r3, #0 8001966: d001 beq.n 800196c { Error_Handler(); 8001968: f003 fb3a bl 8004fe0 } /* USER CODE BEGIN CAN1_Init 2 */ /* USER CODE END CAN1_Init 2 */ } 800196c: bf00 nop 800196e: bd80 pop {r7, pc} 8001970: 20000288 .word 0x20000288 8001974: 40006400 .word 0x40006400 08001978 : /* CAN2 init function */ void MX_CAN2_Init(void) { 8001978: b580 push {r7, lr} 800197a: af00 add r7, sp, #0 /* USER CODE END CAN2_Init 0 */ /* USER CODE BEGIN CAN2_Init 1 */ /* USER CODE END CAN2_Init 1 */ hcan2.Instance = CAN2; 800197c: 4b17 ldr r3, [pc, #92] @ (80019dc ) 800197e: 4a18 ldr r2, [pc, #96] @ (80019e0 ) 8001980: 601a str r2, [r3, #0] hcan2.Init.Prescaler = 16; 8001982: 4b16 ldr r3, [pc, #88] @ (80019dc ) 8001984: 2210 movs r2, #16 8001986: 605a str r2, [r3, #4] hcan2.Init.Mode = CAN_MODE_NORMAL; 8001988: 4b14 ldr r3, [pc, #80] @ (80019dc ) 800198a: 2200 movs r2, #0 800198c: 609a str r2, [r3, #8] hcan2.Init.SyncJumpWidth = CAN_SJW_1TQ; 800198e: 4b13 ldr r3, [pc, #76] @ (80019dc ) 8001990: 2200 movs r2, #0 8001992: 60da str r2, [r3, #12] hcan2.Init.TimeSeg1 = CAN_BS1_15TQ; 8001994: 4b11 ldr r3, [pc, #68] @ (80019dc ) 8001996: f44f 2260 mov.w r2, #917504 @ 0xe0000 800199a: 611a str r2, [r3, #16] hcan2.Init.TimeSeg2 = CAN_BS2_2TQ; 800199c: 4b0f ldr r3, [pc, #60] @ (80019dc ) 800199e: f44f 1280 mov.w r2, #1048576 @ 0x100000 80019a2: 615a str r2, [r3, #20] hcan2.Init.TimeTriggeredMode = DISABLE; 80019a4: 4b0d ldr r3, [pc, #52] @ (80019dc ) 80019a6: 2200 movs r2, #0 80019a8: 761a strb r2, [r3, #24] hcan2.Init.AutoBusOff = ENABLE; 80019aa: 4b0c ldr r3, [pc, #48] @ (80019dc ) 80019ac: 2201 movs r2, #1 80019ae: 765a strb r2, [r3, #25] hcan2.Init.AutoWakeUp = ENABLE; 80019b0: 4b0a ldr r3, [pc, #40] @ (80019dc ) 80019b2: 2201 movs r2, #1 80019b4: 769a strb r2, [r3, #26] hcan2.Init.AutoRetransmission = ENABLE; 80019b6: 4b09 ldr r3, [pc, #36] @ (80019dc ) 80019b8: 2201 movs r2, #1 80019ba: 76da strb r2, [r3, #27] hcan2.Init.ReceiveFifoLocked = DISABLE; 80019bc: 4b07 ldr r3, [pc, #28] @ (80019dc ) 80019be: 2200 movs r2, #0 80019c0: 771a strb r2, [r3, #28] hcan2.Init.TransmitFifoPriority = ENABLE; 80019c2: 4b06 ldr r3, [pc, #24] @ (80019dc ) 80019c4: 2201 movs r2, #1 80019c6: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan2) != HAL_OK) 80019c8: 4804 ldr r0, [pc, #16] @ (80019dc ) 80019ca: f004 fc65 bl 8006298 80019ce: 4603 mov r3, r0 80019d0: 2b00 cmp r3, #0 80019d2: d001 beq.n 80019d8 { Error_Handler(); 80019d4: f003 fb04 bl 8004fe0 } /* USER CODE BEGIN CAN2_Init 2 */ /* USER CODE END CAN2_Init 2 */ } 80019d8: bf00 nop 80019da: bd80 pop {r7, pc} 80019dc: 200002b0 .word 0x200002b0 80019e0: 40006800 .word 0x40006800 080019e4 : static uint32_t HAL_RCC_CAN1_CLK_ENABLED=0; void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle) { 80019e4: b580 push {r7, lr} 80019e6: b08e sub sp, #56 @ 0x38 80019e8: af00 add r7, sp, #0 80019ea: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80019ec: f107 0320 add.w r3, r7, #32 80019f0: 2200 movs r2, #0 80019f2: 601a str r2, [r3, #0] 80019f4: 605a str r2, [r3, #4] 80019f6: 609a str r2, [r3, #8] 80019f8: 60da str r2, [r3, #12] if(canHandle->Instance==CAN1) 80019fa: 687b ldr r3, [r7, #4] 80019fc: 681b ldr r3, [r3, #0] 80019fe: 4a61 ldr r2, [pc, #388] @ (8001b84 ) 8001a00: 4293 cmp r3, r2 8001a02: d153 bne.n 8001aac { /* USER CODE BEGIN CAN1_MspInit 0 */ /* USER CODE END CAN1_MspInit 0 */ /* CAN1 clock enable */ HAL_RCC_CAN1_CLK_ENABLED++; 8001a04: 4b60 ldr r3, [pc, #384] @ (8001b88 ) 8001a06: 681b ldr r3, [r3, #0] 8001a08: 3301 adds r3, #1 8001a0a: 4a5f ldr r2, [pc, #380] @ (8001b88 ) 8001a0c: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8001a0e: 4b5e ldr r3, [pc, #376] @ (8001b88 ) 8001a10: 681b ldr r3, [r3, #0] 8001a12: 2b01 cmp r3, #1 8001a14: d10b bne.n 8001a2e __HAL_RCC_CAN1_CLK_ENABLE(); 8001a16: 4b5d ldr r3, [pc, #372] @ (8001b8c ) 8001a18: 69db ldr r3, [r3, #28] 8001a1a: 4a5c ldr r2, [pc, #368] @ (8001b8c ) 8001a1c: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8001a20: 61d3 str r3, [r2, #28] 8001a22: 4b5a ldr r3, [pc, #360] @ (8001b8c ) 8001a24: 69db ldr r3, [r3, #28] 8001a26: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8001a2a: 61fb str r3, [r7, #28] 8001a2c: 69fb ldr r3, [r7, #28] } __HAL_RCC_GPIOD_CLK_ENABLE(); 8001a2e: 4b57 ldr r3, [pc, #348] @ (8001b8c ) 8001a30: 699b ldr r3, [r3, #24] 8001a32: 4a56 ldr r2, [pc, #344] @ (8001b8c ) 8001a34: f043 0320 orr.w r3, r3, #32 8001a38: 6193 str r3, [r2, #24] 8001a3a: 4b54 ldr r3, [pc, #336] @ (8001b8c ) 8001a3c: 699b ldr r3, [r3, #24] 8001a3e: f003 0320 and.w r3, r3, #32 8001a42: 61bb str r3, [r7, #24] 8001a44: 69bb ldr r3, [r7, #24] /**CAN1 GPIO Configuration PD0 ------> CAN1_RX PD1 ------> CAN1_TX */ GPIO_InitStruct.Pin = GPIO_PIN_0; 8001a46: 2301 movs r3, #1 8001a48: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001a4a: 2300 movs r3, #0 8001a4c: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001a4e: 2300 movs r3, #0 8001a50: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8001a52: f107 0320 add.w r3, r7, #32 8001a56: 4619 mov r1, r3 8001a58: 484d ldr r0, [pc, #308] @ (8001b90 ) 8001a5a: f005 fd19 bl 8007490 GPIO_InitStruct.Pin = GPIO_PIN_1; 8001a5e: 2302 movs r3, #2 8001a60: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001a62: 2302 movs r3, #2 8001a64: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001a66: 2303 movs r3, #3 8001a68: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8001a6a: f107 0320 add.w r3, r7, #32 8001a6e: 4619 mov r1, r3 8001a70: 4847 ldr r0, [pc, #284] @ (8001b90 ) 8001a72: f005 fd0d bl 8007490 __HAL_AFIO_REMAP_CAN1_3(); 8001a76: 4b47 ldr r3, [pc, #284] @ (8001b94 ) 8001a78: 685b ldr r3, [r3, #4] 8001a7a: 633b str r3, [r7, #48] @ 0x30 8001a7c: 6b3b ldr r3, [r7, #48] @ 0x30 8001a7e: f423 43c0 bic.w r3, r3, #24576 @ 0x6000 8001a82: 633b str r3, [r7, #48] @ 0x30 8001a84: 6b3b ldr r3, [r7, #48] @ 0x30 8001a86: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8001a8a: 633b str r3, [r7, #48] @ 0x30 8001a8c: 6b3b ldr r3, [r7, #48] @ 0x30 8001a8e: f443 43c0 orr.w r3, r3, #24576 @ 0x6000 8001a92: 633b str r3, [r7, #48] @ 0x30 8001a94: 4a3f ldr r2, [pc, #252] @ (8001b94 ) 8001a96: 6b3b ldr r3, [r7, #48] @ 0x30 8001a98: 6053 str r3, [r2, #4] /* CAN1 interrupt Init */ HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 0, 0); 8001a9a: 2200 movs r2, #0 8001a9c: 2100 movs r1, #0 8001a9e: 2014 movs r0, #20 8001aa0: f005 fb7d bl 800719e HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn); 8001aa4: 2014 movs r0, #20 8001aa6: f005 fb96 bl 80071d6 HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); /* USER CODE BEGIN CAN2_MspInit 1 */ /* USER CODE END CAN2_MspInit 1 */ } } 8001aaa: e067 b.n 8001b7c else if(canHandle->Instance==CAN2) 8001aac: 687b ldr r3, [r7, #4] 8001aae: 681b ldr r3, [r3, #0] 8001ab0: 4a39 ldr r2, [pc, #228] @ (8001b98 ) 8001ab2: 4293 cmp r3, r2 8001ab4: d162 bne.n 8001b7c __HAL_RCC_CAN2_CLK_ENABLE(); 8001ab6: 4b35 ldr r3, [pc, #212] @ (8001b8c ) 8001ab8: 69db ldr r3, [r3, #28] 8001aba: 4a34 ldr r2, [pc, #208] @ (8001b8c ) 8001abc: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000 8001ac0: 61d3 str r3, [r2, #28] 8001ac2: 4b32 ldr r3, [pc, #200] @ (8001b8c ) 8001ac4: 69db ldr r3, [r3, #28] 8001ac6: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8001aca: 617b str r3, [r7, #20] 8001acc: 697b ldr r3, [r7, #20] HAL_RCC_CAN1_CLK_ENABLED++; 8001ace: 4b2e ldr r3, [pc, #184] @ (8001b88 ) 8001ad0: 681b ldr r3, [r3, #0] 8001ad2: 3301 adds r3, #1 8001ad4: 4a2c ldr r2, [pc, #176] @ (8001b88 ) 8001ad6: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8001ad8: 4b2b ldr r3, [pc, #172] @ (8001b88 ) 8001ada: 681b ldr r3, [r3, #0] 8001adc: 2b01 cmp r3, #1 8001ade: d10b bne.n 8001af8 __HAL_RCC_CAN1_CLK_ENABLE(); 8001ae0: 4b2a ldr r3, [pc, #168] @ (8001b8c ) 8001ae2: 69db ldr r3, [r3, #28] 8001ae4: 4a29 ldr r2, [pc, #164] @ (8001b8c ) 8001ae6: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8001aea: 61d3 str r3, [r2, #28] 8001aec: 4b27 ldr r3, [pc, #156] @ (8001b8c ) 8001aee: 69db ldr r3, [r3, #28] 8001af0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8001af4: 613b str r3, [r7, #16] 8001af6: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001af8: 4b24 ldr r3, [pc, #144] @ (8001b8c ) 8001afa: 699b ldr r3, [r3, #24] 8001afc: 4a23 ldr r2, [pc, #140] @ (8001b8c ) 8001afe: f043 0308 orr.w r3, r3, #8 8001b02: 6193 str r3, [r2, #24] 8001b04: 4b21 ldr r3, [pc, #132] @ (8001b8c ) 8001b06: 699b ldr r3, [r3, #24] 8001b08: f003 0308 and.w r3, r3, #8 8001b0c: 60fb str r3, [r7, #12] 8001b0e: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_5; 8001b10: 2320 movs r3, #32 8001b12: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001b14: 2300 movs r3, #0 8001b16: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001b18: 2300 movs r3, #0 8001b1a: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001b1c: f107 0320 add.w r3, r7, #32 8001b20: 4619 mov r1, r3 8001b22: 481e ldr r0, [pc, #120] @ (8001b9c ) 8001b24: f005 fcb4 bl 8007490 GPIO_InitStruct.Pin = GPIO_PIN_6; 8001b28: 2340 movs r3, #64 @ 0x40 8001b2a: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001b2c: 2302 movs r3, #2 8001b2e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001b30: 2303 movs r3, #3 8001b32: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001b34: f107 0320 add.w r3, r7, #32 8001b38: 4619 mov r1, r3 8001b3a: 4818 ldr r0, [pc, #96] @ (8001b9c ) 8001b3c: f005 fca8 bl 8007490 __HAL_AFIO_REMAP_CAN2_ENABLE(); 8001b40: 4b14 ldr r3, [pc, #80] @ (8001b94 ) 8001b42: 685b ldr r3, [r3, #4] 8001b44: 637b str r3, [r7, #52] @ 0x34 8001b46: 6b7b ldr r3, [r7, #52] @ 0x34 8001b48: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8001b4c: 637b str r3, [r7, #52] @ 0x34 8001b4e: 6b7b ldr r3, [r7, #52] @ 0x34 8001b50: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 8001b54: 637b str r3, [r7, #52] @ 0x34 8001b56: 4a0f ldr r2, [pc, #60] @ (8001b94 ) 8001b58: 6b7b ldr r3, [r7, #52] @ 0x34 8001b5a: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(CAN2_TX_IRQn, 0, 0); 8001b5c: 2200 movs r2, #0 8001b5e: 2100 movs r1, #0 8001b60: 203f movs r0, #63 @ 0x3f 8001b62: f005 fb1c bl 800719e HAL_NVIC_EnableIRQ(CAN2_TX_IRQn); 8001b66: 203f movs r0, #63 @ 0x3f 8001b68: f005 fb35 bl 80071d6 HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 0, 0); 8001b6c: 2200 movs r2, #0 8001b6e: 2100 movs r1, #0 8001b70: 2041 movs r0, #65 @ 0x41 8001b72: f005 fb14 bl 800719e HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); 8001b76: 2041 movs r0, #65 @ 0x41 8001b78: f005 fb2d bl 80071d6 } 8001b7c: bf00 nop 8001b7e: 3738 adds r7, #56 @ 0x38 8001b80: 46bd mov sp, r7 8001b82: bd80 pop {r7, pc} 8001b84: 40006400 .word 0x40006400 8001b88: 200002d8 .word 0x200002d8 8001b8c: 40021000 .word 0x40021000 8001b90: 40011400 .word 0x40011400 8001b94: 40010000 .word 0x40010000 8001b98: 40006800 .word 0x40006800 8001b9c: 40010c00 .word 0x40010c00 08001ba0 : extern GBT_EDCAN_Output_t GBT_EDCAN_Output; extern GBT_EDCAN_Input_t GBT_EDCAN_Input; void GBT_Init(){ 8001ba0: b580 push {r7, lr} 8001ba2: af00 add r7, sp, #0 GBT_State = GBT_DISABLED; 8001ba4: 4b04 ldr r3, [pc, #16] @ (8001bb8 ) 8001ba6: 2210 movs r2, #16 8001ba8: 701a strb r2, [r3, #0] GBT_EDCAN_Input.chargeControl = CHARGING_NOT_ALLOWED; 8001baa: 4b04 ldr r3, [pc, #16] @ (8001bbc ) 8001bac: 2201 movs r2, #1 8001bae: 715a strb r2, [r3, #5] GBT_Reset(); 8001bb0: f000 fe2a bl 8002808 } 8001bb4: bf00 nop 8001bb6: bd80 pop {r7, pc} 8001bb8: 200002dc .word 0x200002dc 8001bbc: 200004b4 .word 0x200004b4 08001bc0 : void GBT_ChargerTask(){ 8001bc0: b5b0 push {r4, r5, r7, lr} 8001bc2: b084 sub sp, #16 8001bc4: af02 add r7, sp, #8 //GBT_LockTask(); if(j_rx.state == 2){ 8001bc6: 4ba1 ldr r3, [pc, #644] @ (8001e4c ) 8001bc8: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8001bcc: 2b02 cmp r3, #2 8001bce: f040 80c1 bne.w 8001d54 switch (j_rx.PGN){ 8001bd2: 4b9e ldr r3, [pc, #632] @ (8001e4c ) 8001bd4: f8d3 3100 ldr.w r3, [r3, #256] @ 0x100 8001bd8: f5b3 5f1c cmp.w r3, #9984 @ 0x2700 8001bdc: d044 beq.n 8001c68 8001bde: f5b3 5f1c cmp.w r3, #9984 @ 0x2700 8001be2: f200 80b3 bhi.w 8001d4c 8001be6: f5b3 5fe0 cmp.w r3, #7168 @ 0x1c00 8001bea: f000 80a6 beq.w 8001d3a 8001bee: f5b3 5fe0 cmp.w r3, #7168 @ 0x1c00 8001bf2: f200 80ab bhi.w 8001d4c 8001bf6: f5b3 5fb8 cmp.w r3, #5888 @ 0x1700 8001bfa: f000 80a2 beq.w 8001d42 8001bfe: f5b3 5fb8 cmp.w r3, #5888 @ 0x1700 8001c02: f200 80a3 bhi.w 8001d4c 8001c06: f5b3 5fb0 cmp.w r3, #5632 @ 0x1600 8001c0a: f000 809c beq.w 8001d46 8001c0e: f5b3 5fb0 cmp.w r3, #5632 @ 0x1600 8001c12: f200 809b bhi.w 8001d4c 8001c16: f5b3 5fa8 cmp.w r3, #5376 @ 0x1500 8001c1a: f000 8096 beq.w 8001d4a 8001c1e: f5b3 5fa8 cmp.w r3, #5376 @ 0x1500 8001c22: f200 8093 bhi.w 8001d4c 8001c26: f5b3 5f98 cmp.w r3, #4864 @ 0x1300 8001c2a: d07b beq.n 8001d24 8001c2c: f5b3 5f98 cmp.w r3, #4864 @ 0x1300 8001c30: f200 808c bhi.w 8001d4c 8001c34: f5b3 5f88 cmp.w r3, #4352 @ 0x1100 8001c38: d063 beq.n 8001d02 8001c3a: f5b3 5f88 cmp.w r3, #4352 @ 0x1100 8001c3e: f200 8085 bhi.w 8001d4c 8001c42: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8001c46: d044 beq.n 8001cd2 8001c48: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8001c4c: d87e bhi.n 8001d4c 8001c4e: f5b3 6f10 cmp.w r3, #2304 @ 0x900 8001c52: d02b beq.n 8001cac 8001c54: f5b3 6f10 cmp.w r3, #2304 @ 0x900 8001c58: d878 bhi.n 8001d4c 8001c5a: f5b3 7f00 cmp.w r3, #512 @ 0x200 8001c5e: d00b beq.n 8001c78 8001c60: f5b3 6fc0 cmp.w r3, #1536 @ 0x600 8001c64: d018 beq.n 8001c98 8001c66: e071 b.n 8001d4c case 0x2700: //PGN BHM GBT_BHM_recv = 1; 8001c68: 4b79 ldr r3, [pc, #484] @ (8001e50 ) 8001c6a: 2201 movs r2, #1 8001c6c: 701a strb r2, [r3, #0] memcpy (&GBT_MaxVoltage, j_rx.data, sizeof(GBT_MaxVoltage)); 8001c6e: 4b77 ldr r3, [pc, #476] @ (8001e4c ) 8001c70: 881a ldrh r2, [r3, #0] 8001c72: 4b78 ldr r3, [pc, #480] @ (8001e54 ) 8001c74: 801a strh r2, [r3, #0] break; 8001c76: e069 b.n 8001d4c case 0x0200: //PGN BRM LONG GBT_BAT_INFO_recv = 1; 8001c78: 4b77 ldr r3, [pc, #476] @ (8001e58 ) 8001c7a: 2201 movs r2, #1 8001c7c: 701a strb r2, [r3, #0] memcpy (&GBT_EVInfo, j_rx.data, sizeof(GBT_EVInfo)); 8001c7e: 4a77 ldr r2, [pc, #476] @ (8001e5c ) 8001c80: 4b72 ldr r3, [pc, #456] @ (8001e4c ) 8001c82: 4614 mov r4, r2 8001c84: 461d mov r5, r3 8001c86: cd0f ldmia r5!, {r0, r1, r2, r3} 8001c88: c40f stmia r4!, {r0, r1, r2, r3} 8001c8a: cd0f ldmia r5!, {r0, r1, r2, r3} 8001c8c: c40f stmia r4!, {r0, r1, r2, r3} 8001c8e: cd0f ldmia r5!, {r0, r1, r2, r3} 8001c90: c40f stmia r4!, {r0, r1, r2, r3} 8001c92: 682b ldr r3, [r5, #0] 8001c94: 7023 strb r3, [r4, #0] break; 8001c96: e059 b.n 8001d4c case 0x0600: //PGN BCP LONG GBT_BAT_STAT_recv = 1; 8001c98: 4b71 ldr r3, [pc, #452] @ (8001e60 ) 8001c9a: 2201 movs r2, #1 8001c9c: 701a strb r2, [r3, #0] memcpy (&GBT_BATStat, j_rx.data, sizeof(GBT_BATStat)); 8001c9e: 4a71 ldr r2, [pc, #452] @ (8001e64 ) 8001ca0: 4b6a ldr r3, [pc, #424] @ (8001e4c ) 8001ca2: 4614 mov r4, r2 8001ca4: cb0f ldmia r3, {r0, r1, r2, r3} 8001ca6: c407 stmia r4!, {r0, r1, r2} 8001ca8: 7023 strb r3, [r4, #0] break; 8001caa: e04f b.n 8001d4c case 0x0900: //PGN BRO GBT_BRO_recv = 1; 8001cac: 4b6e ldr r3, [pc, #440] @ (8001e68 ) 8001cae: 2201 movs r2, #1 8001cb0: 701a strb r2, [r3, #0] if(j_rx.data[0] == 0xAA) EV_ready = 1; 8001cb2: 4b66 ldr r3, [pc, #408] @ (8001e4c ) 8001cb4: 781b ldrb r3, [r3, #0] 8001cb6: 2baa cmp r3, #170 @ 0xaa 8001cb8: d103 bne.n 8001cc2 8001cba: 4b6c ldr r3, [pc, #432] @ (8001e6c ) 8001cbc: 2201 movs r2, #1 8001cbe: 701a strb r2, [r3, #0] 8001cc0: e002 b.n 8001cc8 else EV_ready = 0; 8001cc2: 4b6a ldr r3, [pc, #424] @ (8001e6c ) 8001cc4: 2200 movs r2, #0 8001cc6: 701a strb r2, [r3, #0] GBT_BRO = j_rx.data[0]; 8001cc8: 4b60 ldr r3, [pc, #384] @ (8001e4c ) 8001cca: 781a ldrb r2, [r3, #0] 8001ccc: 4b68 ldr r3, [pc, #416] @ (8001e70 ) 8001cce: 701a strb r2, [r3, #0] break; 8001cd0: e03c b.n 8001d4c case 0x1000: //PGN BCL //TODO: power block memcpy (&GBT_ReqPower, j_rx.data, sizeof(GBT_ReqPower)); 8001cd2: 4b68 ldr r3, [pc, #416] @ (8001e74 ) 8001cd4: 4a5d ldr r2, [pc, #372] @ (8001e4c ) 8001cd6: e892 0003 ldmia.w r2, {r0, r1} 8001cda: 6018 str r0, [r3, #0] 8001cdc: 3304 adds r3, #4 8001cde: 7019 strb r1, [r3, #0] uint16_t volt=GBT_ReqPower.requestedVoltage; 8001ce0: 4b64 ldr r3, [pc, #400] @ (8001e74 ) 8001ce2: 881b ldrh r3, [r3, #0] 8001ce4: 80fb strh r3, [r7, #6] GBT_EDCAN_Output.requestedVoltage = volt; 8001ce6: 4b64 ldr r3, [pc, #400] @ (8001e78 ) 8001ce8: 88fa ldrh r2, [r7, #6] 8001cea: f8a3 2001 strh.w r2, [r3, #1] uint16_t curr=4000-GBT_ReqPower.requestedCurrent; 8001cee: 4b61 ldr r3, [pc, #388] @ (8001e74 ) 8001cf0: 885b ldrh r3, [r3, #2] 8001cf2: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 8001cf6: 80bb strh r3, [r7, #4] GBT_EDCAN_Output.requestedCurrent = curr; 8001cf8: 4b5f ldr r3, [pc, #380] @ (8001e78 ) 8001cfa: 88ba ldrh r2, [r7, #4] 8001cfc: f8a3 2003 strh.w r2, [r3, #3] break; 8001d00: e024 b.n 8001d4c case 0x1100: //PGN BCS //TODO memcpy (&GBT_ChargingStatus, j_rx.data, sizeof(GBT_ChargingStatus)); 8001d02: 4b5e ldr r3, [pc, #376] @ (8001e7c ) 8001d04: 4a51 ldr r2, [pc, #324] @ (8001e4c ) 8001d06: ca07 ldmia r2, {r0, r1, r2} 8001d08: c303 stmia r3!, {r0, r1} 8001d0a: 701a strb r2, [r3, #0] GBT_EDCAN_Output.chargingRemainingTimeMin = GBT_ChargingStatus.estimatedRemainingChargingTime; 8001d0c: 4b5b ldr r3, [pc, #364] @ (8001e7c ) 8001d0e: f8b3 3007 ldrh.w r3, [r3, #7] 8001d12: b29a uxth r2, r3 8001d14: 4b58 ldr r3, [pc, #352] @ (8001e78 ) 8001d16: f8a3 2007 strh.w r2, [r3, #7] GBT_EDCAN_Output.chargingPercentage = GBT_ChargingStatus.currentChargeState; 8001d1a: 4b58 ldr r3, [pc, #352] @ (8001e7c ) 8001d1c: 799a ldrb r2, [r3, #6] 8001d1e: 4b56 ldr r3, [pc, #344] @ (8001e78 ) 8001d20: 719a strb r2, [r3, #6] break; 8001d22: e013 b.n 8001d4c case 0x1300: //PGN BSM //TODO memcpy (&GBT_BatteryStatus, j_rx.data, sizeof(GBT_BatteryStatus)); 8001d24: 4b56 ldr r3, [pc, #344] @ (8001e80 ) 8001d26: 4a49 ldr r2, [pc, #292] @ (8001e4c ) 8001d28: e892 0003 ldmia.w r2, {r0, r1} 8001d2c: 6018 str r0, [r3, #0] 8001d2e: 3304 adds r3, #4 8001d30: 8019 strh r1, [r3, #0] 8001d32: 3302 adds r3, #2 8001d34: 0c0a lsrs r2, r1, #16 8001d36: 701a strb r2, [r3, #0] break; 8001d38: e008 b.n 8001d4c // case 0x1900: //PGN BST // break; case 0x1C00: //PGN BSD //TODO SOC Voltage Temp GBT_BSD_recv = 1; 8001d3a: 4b52 ldr r3, [pc, #328] @ (8001e84 ) 8001d3c: 2201 movs r2, #1 8001d3e: 701a strb r2, [r3, #0] break; 8001d40: e004 b.n 8001d4c break; 8001d42: bf00 nop 8001d44: e002 b.n 8001d4c break; 8001d46: bf00 nop 8001d48: e000 b.n 8001d4c break; 8001d4a: bf00 nop // break; //BSM BMV BMT BSP BST BSD BEM } j_rx.state = 0; 8001d4c: 4b3f ldr r3, [pc, #252] @ (8001e4c ) 8001d4e: 2200 movs r2, #0 8001d50: f883 210a strb.w r2, [r3, #266] @ 0x10a } if((HAL_GetTick() - GBT_delay_start) < GBT_delay){ 8001d54: f003 fd6e bl 8005834 8001d58: 4602 mov r2, r0 8001d5a: 4b4b ldr r3, [pc, #300] @ (8001e88 ) 8001d5c: 681b ldr r3, [r3, #0] 8001d5e: 1ad2 subs r2, r2, r3 8001d60: 4b4a ldr r3, [pc, #296] @ (8001e8c ) 8001d62: 681b ldr r3, [r3, #0] 8001d64: 429a cmp r2, r3 8001d66: f0c0 839b bcc.w 80024a0 //waiting }else switch (GBT_State){ 8001d6a: 4b49 ldr r3, [pc, #292] @ (8001e90 ) 8001d6c: 781b ldrb r3, [r3, #0] 8001d6e: 3b10 subs r3, #16 8001d70: 2b15 cmp r3, #21 8001d72: f200 837c bhi.w 800246e 8001d76: a201 add r2, pc, #4 @ (adr r2, 8001d7c ) 8001d78: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001d7c: 08001dd5 .word 0x08001dd5 8001d80: 0800246f .word 0x0800246f 8001d84: 0800246f .word 0x0800246f 8001d88: 08001df1 .word 0x08001df1 8001d8c: 08001e01 .word 0x08001e01 8001d90: 08001ea1 .word 0x08001ea1 8001d94: 08001f1d .word 0x08001f1d 8001d98: 08002027 .word 0x08002027 8001d9c: 08002125 .word 0x08002125 8001da0: 0800224b .word 0x0800224b 8001da4: 0800246f .word 0x0800246f 8001da8: 0800246f .word 0x0800246f 8001dac: 0800246f .word 0x0800246f 8001db0: 0800246f .word 0x0800246f 8001db4: 0800246f .word 0x0800246f 8001db8: 0800246f .word 0x0800246f 8001dbc: 08002279 .word 0x08002279 8001dc0: 080022d7 .word 0x080022d7 8001dc4: 080023eb .word 0x080023eb 8001dc8: 0800242d .word 0x0800242d 8001dcc: 0800244d .word 0x0800244d 8001dd0: 0800245f .word 0x0800245f case GBT_DISABLED: RELAY_Write(RELAY_AUX, 0); 8001dd4: 2100 movs r1, #0 8001dd6: 2000 movs r0, #0 8001dd8: f7ff fc6e bl 80016b8 if(connectorState == CONN_Charging){ 8001ddc: 4b2d ldr r3, [pc, #180] @ (8001e94 ) 8001dde: 781b ldrb r3, [r3, #0] 8001de0: 2b05 cmp r3, #5 8001de2: f040 8348 bne.w 8002476 GBT_Reset(); 8001de6: f000 fd0f bl 8002808 GBT_Start();//TODO IF protections (maybe not needed) 8001dea: f000 fd81 bl 80028f0 } break; 8001dee: e342 b.n 8002476 // GBT_Delay(500); // } // break; case GBT_S3_STARTED: GBT_SwitchState(GBT_S31_WAIT_BHM); 8001df0: 2014 movs r0, #20 8001df2: f000 fb83 bl 80024fc GBT_Delay(500); 8001df6: f44f 70fa mov.w r0, #500 @ 0x1f4 8001dfa: f000 fcaf bl 800275c break; 8001dfe: e34f b.n 80024a0 case GBT_S31_WAIT_BHM: if(j_rx.state == 0) GBT_SendCHM(); 8001e00: 4b12 ldr r3, [pc, #72] @ (8001e4c ) 8001e02: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8001e06: 2b00 cmp r3, #0 8001e08: d101 bne.n 8001e0e 8001e0a: f001 fd69 bl 80038e0 GBT_Delay(250); 8001e0e: 20fa movs r0, #250 @ 0xfa 8001e10: f000 fca4 bl 800275c if(GBT_BHM_recv) { 8001e14: 4b0e ldr r3, [pc, #56] @ (8001e50 ) 8001e16: 781b ldrb r3, [r3, #0] 8001e18: 2b00 cmp r3, #0 8001e1a: d002 beq.n 8001e22 GBT_SwitchState(GBT_S4_ISOTEST); 8001e1c: 2015 movs r0, #21 8001e1e: f000 fb6d bl 80024fc } //Timeout 10S if((GBT_BHM_recv == 0) && (GBT_StateTick()>10000)) { //BHM Timeout 8001e22: 4b0b ldr r3, [pc, #44] @ (8001e50 ) 8001e24: 781b ldrb r3, [r3, #0] 8001e26: 2b00 cmp r3, #0 8001e28: f040 8327 bne.w 800247a 8001e2c: f000 fc8a bl 8002744 8001e30: 4603 mov r3, r0 8001e32: f242 7210 movw r2, #10000 @ 0x2710 8001e36: 4293 cmp r3, r2 8001e38: f240 831f bls.w 800247a GBT_Error(0xFCF0C0FC); 8001e3c: 4816 ldr r0, [pc, #88] @ (8001e98 ) 8001e3e: f000 fcb7 bl 80027b0 EDCAN_printf(LOG_WARN, "BHM Timeout\n"); 8001e42: 4916 ldr r1, [pc, #88] @ (8001e9c ) 8001e44: 2004 movs r0, #4 8001e46: f002 ff63 bl 8004d10 } break; 8001e4a: e316 b.n 800247a 8001e4c: 200004bc .word 0x200004bc 8001e50: 200002ef .word 0x200002ef 8001e54: 20000304 .word 0x20000304 8001e58: 200002ec .word 0x200002ec 8001e5c: 20000308 .word 0x20000308 8001e60: 200002ed .word 0x200002ed 8001e64: 2000033c .word 0x2000033c 8001e68: 200002ee .word 0x200002ee 8001e6c: 200002f1 .word 0x200002f1 8001e70: 20000380 .word 0x20000380 8001e74: 2000034c .word 0x2000034c 8001e78: 200004a4 .word 0x200004a4 8001e7c: 2000035c .word 0x2000035c 8001e80: 20000368 .word 0x20000368 8001e84: 200002f0 .word 0x200002f0 8001e88: 200002e4 .word 0x200002e4 8001e8c: 200002e8 .word 0x200002e8 8001e90: 200002dc .word 0x200002dc 8001e94: 20000390 .word 0x20000390 8001e98: fcf0c0fc .word 0xfcf0c0fc 8001e9c: 0800d640 .word 0x0800d640 case GBT_S4_ISOTEST: if(j_rx.state == 0) GBT_SendCHM(); 8001ea0: 4bb7 ldr r3, [pc, #732] @ (8002180 ) 8001ea2: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8001ea6: 2b00 cmp r3, #0 8001ea8: d101 bne.n 8001eae 8001eaa: f001 fd19 bl 80038e0 GBT_Delay(250); 8001eae: 20fa movs r0, #250 @ 0xfa 8001eb0: f000 fc54 bl 800275c GBT_EDCAN_Output.requestedVoltage = GBT_MaxVoltage.maxOutputVoltage; 8001eb4: 4bb3 ldr r3, [pc, #716] @ (8002184 ) 8001eb6: 881a ldrh r2, [r3, #0] 8001eb8: 4bb3 ldr r3, [pc, #716] @ (8002188 ) 8001eba: f8a3 2001 strh.w r2, [r3, #1] GBT_EDCAN_Output.requestedCurrent = 10; // 1A max 8001ebe: 4bb2 ldr r3, [pc, #712] @ (8002188 ) 8001ec0: 2200 movs r2, #0 8001ec2: f042 020a orr.w r2, r2, #10 8001ec6: 70da strb r2, [r3, #3] 8001ec8: 2200 movs r2, #0 8001eca: 711a strb r2, [r3, #4] GBT_EDCAN_Output.enablePSU = 1; 8001ecc: 4bae ldr r3, [pc, #696] @ (8002188 ) 8001ece: 2201 movs r2, #1 8001ed0: 701a strb r2, [r3, #0] //TODO: Isolation test trigger if(GBT_EDCAN_Input.chargingError == GBT_ERR_INSULATION){ 8001ed2: 4bae ldr r3, [pc, #696] @ (800218c ) 8001ed4: 799b ldrb r3, [r3, #6] 8001ed6: 2b01 cmp r3, #1 8001ed8: d103 bne.n 8001ee2 GBT_Stop(GBT_CST_OTHERFALUT); 8001eda: f24f 40f0 movw r0, #62704 @ 0xf4f0 8001ede: f000 fc51 bl 8002784 } if(GBT_StateTick()>5000){ 8001ee2: f000 fc2f bl 8002744 8001ee6: 4603 mov r3, r0 8001ee8: f241 3288 movw r2, #5000 @ 0x1388 8001eec: 4293 cmp r3, r2 8001eee: f240 82c6 bls.w 800247e GBT_SwitchState(GBT_S5_BAT_INFO); 8001ef2: 2016 movs r0, #22 8001ef4: f000 fb02 bl 80024fc GBT_EDCAN_Output.requestedVoltage = 50; 8001ef8: 4ba3 ldr r3, [pc, #652] @ (8002188 ) 8001efa: 2200 movs r2, #0 8001efc: f042 0232 orr.w r2, r2, #50 @ 0x32 8001f00: 705a strb r2, [r3, #1] 8001f02: 2200 movs r2, #0 8001f04: 709a strb r2, [r3, #2] GBT_EDCAN_Output.requestedCurrent = 10; // 1A max 8001f06: 4ba0 ldr r3, [pc, #640] @ (8002188 ) 8001f08: 2200 movs r2, #0 8001f0a: f042 020a orr.w r2, r2, #10 8001f0e: 70da strb r2, [r3, #3] 8001f10: 2200 movs r2, #0 8001f12: 711a strb r2, [r3, #4] GBT_EDCAN_Output.enablePSU = 0; 8001f14: 4b9c ldr r3, [pc, #624] @ (8002188 ) 8001f16: 2200 movs r2, #0 8001f18: 701a strb r2, [r3, #0] } break; 8001f1a: e2b0 b.n 800247e case GBT_S5_BAT_INFO: if(j_rx.state == 0) GBT_SendCRM(0x00); 8001f1c: 4b98 ldr r3, [pc, #608] @ (8002180 ) 8001f1e: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8001f22: 2b00 cmp r3, #0 8001f24: d102 bne.n 8001f2c 8001f26: 2000 movs r0, #0 8001f28: f001 fcee bl 8003908 GBT_Delay(250); 8001f2c: 20fa movs r0, #250 @ 0xfa 8001f2e: f000 fc15 bl 800275c if(GBT_BAT_INFO_recv){ //BRM 8001f32: 4b97 ldr r3, [pc, #604] @ (8002190 ) 8001f34: 781b ldrb r3, [r3, #0] 8001f36: 2b00 cmp r3, #0 8001f38: d060 beq.n 8001ffc //Got battery info GBT_SwitchState(GBT_S6_BAT_STAT); 8001f3a: 2017 movs r0, #23 8001f3c: f000 fade bl 80024fc EDCAN_printf(LOG_INFO, "EV info:\n"); 8001f40: 4994 ldr r1, [pc, #592] @ (8002194 ) 8001f42: 2006 movs r0, #6 8001f44: f002 fee4 bl 8004d10 EDCAN_printf(LOG_INFO, "GBT_ver V%d.%d%d\n",GBT_EVInfo.version[0],GBT_EVInfo.version[1],GBT_EVInfo.version[2]); 8001f48: 4b93 ldr r3, [pc, #588] @ (8002198 ) 8001f4a: 781b ldrb r3, [r3, #0] 8001f4c: 461a mov r2, r3 8001f4e: 4b92 ldr r3, [pc, #584] @ (8002198 ) 8001f50: 785b ldrb r3, [r3, #1] 8001f52: 4619 mov r1, r3 8001f54: 4b90 ldr r3, [pc, #576] @ (8002198 ) 8001f56: 789b ldrb r3, [r3, #2] 8001f58: 9300 str r3, [sp, #0] 8001f5a: 460b mov r3, r1 8001f5c: 498f ldr r1, [pc, #572] @ (800219c ) 8001f5e: 2006 movs r0, #6 8001f60: f002 fed6 bl 8004d10 EDCAN_printf(LOG_INFO, "Battery type: %d\n",GBT_EVInfo.batteryType); 8001f64: 4b8c ldr r3, [pc, #560] @ (8002198 ) 8001f66: 78db ldrb r3, [r3, #3] 8001f68: 461a mov r2, r3 8001f6a: 498d ldr r1, [pc, #564] @ (80021a0 ) 8001f6c: 2006 movs r0, #6 8001f6e: f002 fecf bl 8004d10 EDCAN_printf(LOG_INFO, "Battery capacity: %d\n", GBT_EVInfo.batteryCapacity); // 0.1Ah/bit 8001f72: 4b89 ldr r3, [pc, #548] @ (8002198 ) 8001f74: 889b ldrh r3, [r3, #4] 8001f76: 461a mov r2, r3 8001f78: 498a ldr r1, [pc, #552] @ (80021a4 ) 8001f7a: 2006 movs r0, #6 8001f7c: f002 fec8 bl 8004d10 EDCAN_printf(LOG_INFO, "Battery voltage: %d\n", GBT_EVInfo.batteryVoltage); // 0.1V/bit 8001f80: 4b85 ldr r3, [pc, #532] @ (8002198 ) 8001f82: 88db ldrh r3, [r3, #6] 8001f84: 461a mov r2, r3 8001f86: 4988 ldr r1, [pc, #544] @ (80021a8 ) 8001f88: 2006 movs r0, #6 8001f8a: f002 fec1 bl 8004d10 EDCAN_printf(LOG_INFO, "Battery vendor: %.4s\n", GBT_EVInfo.batteryVendor); // Battery vendor (ASCII string) 8001f8e: 4a87 ldr r2, [pc, #540] @ (80021ac ) 8001f90: 4987 ldr r1, [pc, #540] @ (80021b0 ) 8001f92: 2006 movs r0, #6 8001f94: f002 febc bl 8004d10 EDCAN_printf(LOG_INFO, "Battery SN: %lu\n", GBT_EVInfo.batterySN); // int 8001f98: 4b7f ldr r3, [pc, #508] @ (8002198 ) 8001f9a: 68db ldr r3, [r3, #12] 8001f9c: 461a mov r2, r3 8001f9e: 4985 ldr r1, [pc, #532] @ (80021b4 ) 8001fa0: 2006 movs r0, #6 8001fa2: f002 feb5 bl 8004d10 EDCAN_printf(LOG_INFO, "Battery manufacture date: %02d.%02d.%04d\n", GBT_EVInfo.batteryManuD, GBT_EVInfo.batteryManuM ,GBT_EVInfo.batteryManuY+1985); // year (offset 1985) 8001fa6: 4b7c ldr r3, [pc, #496] @ (8002198 ) 8001fa8: 7c9b ldrb r3, [r3, #18] 8001faa: 461a mov r2, r3 8001fac: 4b7a ldr r3, [pc, #488] @ (8002198 ) 8001fae: 7c5b ldrb r3, [r3, #17] 8001fb0: 4619 mov r1, r3 8001fb2: 4b79 ldr r3, [pc, #484] @ (8002198 ) 8001fb4: 7c1b ldrb r3, [r3, #16] 8001fb6: f203 73c1 addw r3, r3, #1985 @ 0x7c1 8001fba: 9300 str r3, [sp, #0] 8001fbc: 460b mov r3, r1 8001fbe: 497e ldr r1, [pc, #504] @ (80021b8 ) 8001fc0: 2006 movs r0, #6 8001fc2: f002 fea5 bl 8004d10 EDCAN_printf(LOG_INFO, "Battery cycles: %d\n", GBT_EVInfo.batteryCycleCount); //uint24_t 8001fc6: 4b74 ldr r3, [pc, #464] @ (8002198 ) 8001fc8: 7cda ldrb r2, [r3, #19] 8001fca: 8a9b ldrh r3, [r3, #20] 8001fcc: 021b lsls r3, r3, #8 8001fce: 4313 orrs r3, r2 8001fd0: 461a mov r2, r3 8001fd2: 497a ldr r1, [pc, #488] @ (80021bc ) 8001fd4: 2006 movs r0, #6 8001fd6: f002 fe9b bl 8004d10 EDCAN_printf(LOG_INFO, "Own auto: %d\n", GBT_EVInfo.ownAuto); // 0 = lizing, 1 = own auto 8001fda: 4b6f ldr r3, [pc, #444] @ (8002198 ) 8001fdc: 7d9b ldrb r3, [r3, #22] 8001fde: 461a mov r2, r3 8001fe0: 4977 ldr r1, [pc, #476] @ (80021c0 ) 8001fe2: 2006 movs r0, #6 8001fe4: f002 fe94 bl 8004d10 EDCAN_printf(LOG_INFO, "EVIN: %.17s\n", GBT_EVInfo.EVIN); //EVIN 8001fe8: 4a76 ldr r2, [pc, #472] @ (80021c4 ) 8001fea: 4977 ldr r1, [pc, #476] @ (80021c8 ) 8001fec: 2006 movs r0, #6 8001fee: f002 fe8f bl 8004d10 EDCAN_printf(LOG_INFO, "EV_SW_VER: %.8s\n", GBT_EVInfo.EV_SW_VER); 8001ff2: 4a76 ldr r2, [pc, #472] @ (80021cc ) 8001ff4: 4976 ldr r1, [pc, #472] @ (80021d0 ) 8001ff6: 2006 movs r0, #6 8001ff8: f002 fe8a bl 8004d10 } //Timeout if((GBT_StateTick()>5000) && (GBT_BAT_INFO_recv == 0)){ 8001ffc: f000 fba2 bl 8002744 8002000: 4603 mov r3, r0 8002002: f241 3288 movw r2, #5000 @ 0x1388 8002006: 4293 cmp r3, r2 8002008: f240 823b bls.w 8002482 800200c: 4b60 ldr r3, [pc, #384] @ (8002190 ) 800200e: 781b ldrb r3, [r3, #0] 8002010: 2b00 cmp r3, #0 8002012: f040 8236 bne.w 8002482 GBT_Error(0xFDF0C0FC); //BRM Timeout 8002016: 486f ldr r0, [pc, #444] @ (80021d4 ) 8002018: f000 fbca bl 80027b0 EDCAN_printf(LOG_WARN, "BRM Timeout\n"); 800201c: 496e ldr r1, [pc, #440] @ (80021d8 ) 800201e: 2004 movs r0, #4 8002020: f002 fe76 bl 8004d10 } break; 8002024: e22d b.n 8002482 case GBT_S6_BAT_STAT: if(j_rx.state == 0) GBT_SendCRM(0xAA); 8002026: 4b56 ldr r3, [pc, #344] @ (8002180 ) 8002028: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800202c: 2b00 cmp r3, #0 800202e: d102 bne.n 8002036 8002030: 20aa movs r0, #170 @ 0xaa 8002032: f001 fc69 bl 8003908 GBT_Delay(250); 8002036: 20fa movs r0, #250 @ 0xfa 8002038: f000 fb90 bl 800275c if(GBT_BAT_STAT_recv){ 800203c: 4b67 ldr r3, [pc, #412] @ (80021dc ) 800203e: 781b ldrb r3, [r3, #0] 8002040: 2b00 cmp r3, #0 8002042: d05a beq.n 80020fa //Got battery status GBT_SwitchState(GBT_S7_BMS_WAIT); 8002044: 2018 movs r0, #24 8002046: f000 fa59 bl 80024fc EDCAN_printf(LOG_INFO, "Battery info:\n"); 800204a: 4965 ldr r1, [pc, #404] @ (80021e0 ) 800204c: 2006 movs r0, #6 800204e: f002 fe5f bl 8004d10 EDCAN_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxCellVoltage/100); // 0.01v/bit 8002052: 4b64 ldr r3, [pc, #400] @ (80021e4 ) 8002054: 881b ldrh r3, [r3, #0] 8002056: 4a64 ldr r2, [pc, #400] @ (80021e8 ) 8002058: fba2 2303 umull r2, r3, r2, r3 800205c: 095b lsrs r3, r3, #5 800205e: b29b uxth r3, r3 8002060: 461a mov r2, r3 8002062: 4962 ldr r1, [pc, #392] @ (80021ec ) 8002064: 2006 movs r0, #6 8002066: f002 fe53 bl 8004d10 EDCAN_printf(LOG_INFO, "maxCC %dA\n",GBT_BATStat.maxChargingCurrent/10); // 0.1A/bit 800206a: 4b5e ldr r3, [pc, #376] @ (80021e4 ) 800206c: 885b ldrh r3, [r3, #2] 800206e: 4a60 ldr r2, [pc, #384] @ (80021f0 ) 8002070: fba2 2303 umull r2, r3, r2, r3 8002074: 08db lsrs r3, r3, #3 8002076: b29b uxth r3, r3 8002078: 461a mov r2, r3 800207a: 495e ldr r1, [pc, #376] @ (80021f4 ) 800207c: 2006 movs r0, #6 800207e: f002 fe47 bl 8004d10 EDCAN_printf(LOG_INFO, "totE %dkWh\n",GBT_BATStat.totalEnergy/10); // 0.1kWh 8002082: 4b58 ldr r3, [pc, #352] @ (80021e4 ) 8002084: 889b ldrh r3, [r3, #4] 8002086: 4a5a ldr r2, [pc, #360] @ (80021f0 ) 8002088: fba2 2303 umull r2, r3, r2, r3 800208c: 08db lsrs r3, r3, #3 800208e: b29b uxth r3, r3 8002090: 461a mov r2, r3 8002092: 4959 ldr r1, [pc, #356] @ (80021f8 ) 8002094: 2006 movs r0, #6 8002096: f002 fe3b bl 8004d10 EDCAN_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxChargingVoltage/10); // 0.1V/ bit 800209a: 4b52 ldr r3, [pc, #328] @ (80021e4 ) 800209c: 88db ldrh r3, [r3, #6] 800209e: 4a54 ldr r2, [pc, #336] @ (80021f0 ) 80020a0: fba2 2303 umull r2, r3, r2, r3 80020a4: 08db lsrs r3, r3, #3 80020a6: b29b uxth r3, r3 80020a8: 461a mov r2, r3 80020aa: 4950 ldr r1, [pc, #320] @ (80021ec ) 80020ac: 2006 movs r0, #6 80020ae: f002 fe2f bl 8004d10 EDCAN_printf(LOG_INFO, "maxT %dC\n",(int16_t)GBT_BATStat.maxTemp-50); // 1C/bit, -50C offset 80020b2: 4b4c ldr r3, [pc, #304] @ (80021e4 ) 80020b4: 7a1b ldrb r3, [r3, #8] 80020b6: 3b32 subs r3, #50 @ 0x32 80020b8: 461a mov r2, r3 80020ba: 4950 ldr r1, [pc, #320] @ (80021fc ) 80020bc: 2006 movs r0, #6 80020be: f002 fe27 bl 8004d10 EDCAN_printf(LOG_INFO, "SOC %dp\n",GBT_BATStat.SOC/10); // 0.1%/bit , 0..100% 80020c2: 4b48 ldr r3, [pc, #288] @ (80021e4 ) 80020c4: f8b3 3009 ldrh.w r3, [r3, #9] 80020c8: b29b uxth r3, r3 80020ca: 4a49 ldr r2, [pc, #292] @ (80021f0 ) 80020cc: fba2 2303 umull r2, r3, r2, r3 80020d0: 08db lsrs r3, r3, #3 80020d2: b29b uxth r3, r3 80020d4: 461a mov r2, r3 80020d6: 494a ldr r1, [pc, #296] @ (8002200 ) 80020d8: 2006 movs r0, #6 80020da: f002 fe19 bl 8004d10 EDCAN_printf(LOG_INFO, "Volt. %dV\n",GBT_BATStat.measVoltage/10); // 0.1V/bit 80020de: 4b41 ldr r3, [pc, #260] @ (80021e4 ) 80020e0: f8b3 300b ldrh.w r3, [r3, #11] 80020e4: b29b uxth r3, r3 80020e6: 4a42 ldr r2, [pc, #264] @ (80021f0 ) 80020e8: fba2 2303 umull r2, r3, r2, r3 80020ec: 08db lsrs r3, r3, #3 80020ee: b29b uxth r3, r3 80020f0: 461a mov r2, r3 80020f2: 4944 ldr r1, [pc, #272] @ (8002204 ) 80020f4: 2006 movs r0, #6 80020f6: f002 fe0b bl 8004d10 } if((GBT_StateTick()>5000) && (GBT_BAT_STAT_recv == 0)){ 80020fa: f000 fb23 bl 8002744 80020fe: 4603 mov r3, r0 8002100: f241 3288 movw r2, #5000 @ 0x1388 8002104: 4293 cmp r3, r2 8002106: f240 81be bls.w 8002486 800210a: 4b34 ldr r3, [pc, #208] @ (80021dc ) 800210c: 781b ldrb r3, [r3, #0] 800210e: 2b00 cmp r3, #0 8002110: f040 81b9 bne.w 8002486 GBT_Error(0xFCF1C0FC); //BCP Timeout 8002114: 483c ldr r0, [pc, #240] @ (8002208 ) 8002116: f000 fb4b bl 80027b0 EDCAN_printf(LOG_WARN, "BCP Timeout\n"); 800211a: 493c ldr r1, [pc, #240] @ (800220c ) 800211c: 2004 movs r0, #4 800211e: f002 fdf7 bl 8004d10 } break; 8002122: e1b0 b.n 8002486 case GBT_S7_BMS_WAIT: if(j_rx.state == 0) GBT_SendCTS(); 8002124: 4b16 ldr r3, [pc, #88] @ (8002180 ) 8002126: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800212a: 2b00 cmp r3, #0 800212c: d101 bne.n 8002132 800212e: f001 fbb3 bl 8003898 HAL_Delay(2); 8002132: 2002 movs r0, #2 8002134: f003 fb88 bl 8005848 if(j_rx.state == 0) GBT_SendCML(); 8002138: 4b11 ldr r3, [pc, #68] @ (8002180 ) 800213a: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800213e: 2b00 cmp r3, #0 8002140: d101 bne.n 8002146 8002142: f001 fbbf bl 80038c4 GBT_Delay(250); 8002146: 20fa movs r0, #250 @ 0xfa 8002148: f000 fb08 bl 800275c if((GBT_StateTick()>5000) && (GBT_BRO_recv == 0)){ 800214c: f000 fafa bl 8002744 8002150: 4603 mov r3, r0 8002152: f241 3288 movw r2, #5000 @ 0x1388 8002156: 4293 cmp r3, r2 8002158: d90a bls.n 8002170 800215a: 4b2d ldr r3, [pc, #180] @ (8002210 ) 800215c: 781b ldrb r3, [r3, #0] 800215e: 2b00 cmp r3, #0 8002160: d106 bne.n 8002170 GBT_Error(0xFCF4C0FC); //BRO Timeout 8002162: 482c ldr r0, [pc, #176] @ (8002214 ) 8002164: f000 fb24 bl 80027b0 EDCAN_printf(LOG_WARN, "BRO Timeout\n"); 8002168: 492b ldr r1, [pc, #172] @ (8002218 ) 800216a: 2004 movs r0, #4 800216c: f002 fdd0 bl 8004d10 } if(EV_ready){ 8002170: 4b2a ldr r3, [pc, #168] @ (800221c ) 8002172: 781b ldrb r3, [r3, #0] 8002174: 2b00 cmp r3, #0 8002176: d053 beq.n 8002220 //EV ready (AA) GBT_SwitchState(GBT_S8_INIT_CHARGER); 8002178: 2019 movs r0, #25 800217a: f000 f9bf bl 80024fc if((GBT_StateTick()>60000) && (GBT_BRO_recv == 1)){ GBT_Error(0xFCF4C0FC); //BRO Timeout EDCAN_printf(LOG_WARN, "BRO Timeout\n"); } } break; 800217e: e184 b.n 800248a 8002180: 200004bc .word 0x200004bc 8002184: 20000304 .word 0x20000304 8002188: 200004a4 .word 0x200004a4 800218c: 200004b4 .word 0x200004b4 8002190: 200002ec .word 0x200002ec 8002194: 0800d650 .word 0x0800d650 8002198: 20000308 .word 0x20000308 800219c: 0800d65c .word 0x0800d65c 80021a0: 0800d670 .word 0x0800d670 80021a4: 0800d684 .word 0x0800d684 80021a8: 0800d69c .word 0x0800d69c 80021ac: 20000310 .word 0x20000310 80021b0: 0800d6b4 .word 0x0800d6b4 80021b4: 0800d6cc .word 0x0800d6cc 80021b8: 0800d6e0 .word 0x0800d6e0 80021bc: 0800d70c .word 0x0800d70c 80021c0: 0800d720 .word 0x0800d720 80021c4: 20000320 .word 0x20000320 80021c8: 0800d730 .word 0x0800d730 80021cc: 20000331 .word 0x20000331 80021d0: 0800d740 .word 0x0800d740 80021d4: fdf0c0fc .word 0xfdf0c0fc 80021d8: 0800d754 .word 0x0800d754 80021dc: 200002ed .word 0x200002ed 80021e0: 0800d764 .word 0x0800d764 80021e4: 2000033c .word 0x2000033c 80021e8: 51eb851f .word 0x51eb851f 80021ec: 0800d774 .word 0x0800d774 80021f0: cccccccd .word 0xcccccccd 80021f4: 0800d780 .word 0x0800d780 80021f8: 0800d78c .word 0x0800d78c 80021fc: 0800d798 .word 0x0800d798 8002200: 0800d7a4 .word 0x0800d7a4 8002204: 0800d7b0 .word 0x0800d7b0 8002208: fcf1c0fc .word 0xfcf1c0fc 800220c: 0800d7bc .word 0x0800d7bc 8002210: 200002ee .word 0x200002ee 8002214: fcf4c0fc .word 0xfcf4c0fc 8002218: 0800d7cc .word 0x0800d7cc 800221c: 200002f1 .word 0x200002f1 if((GBT_StateTick()>60000) && (GBT_BRO_recv == 1)){ 8002220: f000 fa90 bl 8002744 8002224: 4603 mov r3, r0 8002226: f64e 2260 movw r2, #60000 @ 0xea60 800222a: 4293 cmp r3, r2 800222c: f240 812d bls.w 800248a 8002230: 4b9d ldr r3, [pc, #628] @ (80024a8 ) 8002232: 781b ldrb r3, [r3, #0] 8002234: 2b01 cmp r3, #1 8002236: f040 8128 bne.w 800248a GBT_Error(0xFCF4C0FC); //BRO Timeout 800223a: 489c ldr r0, [pc, #624] @ (80024ac ) 800223c: f000 fab8 bl 80027b0 EDCAN_printf(LOG_WARN, "BRO Timeout\n"); 8002240: 499b ldr r1, [pc, #620] @ (80024b0 ) 8002242: 2004 movs r0, #4 8002244: f002 fd64 bl 8004d10 break; 8002248: e11f b.n 800248a case GBT_S8_INIT_CHARGER: if(j_rx.state == 0) GBT_SendCRO(0x00); 800224a: 4b9a ldr r3, [pc, #616] @ (80024b4 ) 800224c: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8002250: 2b00 cmp r3, #0 8002252: d102 bne.n 800225a 8002254: 2000 movs r0, #0 8002256: f001 fb6d bl 8003934 //TODO GBT_Delay(250); 800225a: 20fa movs r0, #250 @ 0xfa 800225c: f000 fa7e bl 800275c if(GBT_StateTick()>1500){ 8002260: f000 fa70 bl 8002744 8002264: 4603 mov r3, r0 8002266: f240 52dc movw r2, #1500 @ 0x5dc 800226a: 4293 cmp r3, r2 800226c: f240 810f bls.w 800248e //Power Modules initiated GBT_SwitchState(GBT_S9_WAIT_BCL); 8002270: 2020 movs r0, #32 8002272: f000 f943 bl 80024fc } break; 8002276: e10a b.n 800248e case GBT_S9_WAIT_BCL: if(j_rx.state == 0) GBT_SendCRO(0xAA); 8002278: 4b8e ldr r3, [pc, #568] @ (80024b4 ) 800227a: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800227e: 2b00 cmp r3, #0 8002280: d102 bne.n 8002288 8002282: 20aa movs r0, #170 @ 0xaa 8002284: f001 fb56 bl 8003934 GBT_Delay(250); 8002288: 20fa movs r0, #250 @ 0xfa 800228a: f000 fa67 bl 800275c if(GBT_ReqPower.chargingMode != 0){ //REFACTORING 800228e: 4b8a ldr r3, [pc, #552] @ (80024b8 ) 8002290: 791b ldrb r3, [r3, #4] 8002292: 2b00 cmp r3, #0 8002294: f000 80fd beq.w 8002492 //BCL power requirements received GBT_SwitchState(GBT_S10_CHARGING); 8002298: 2021 movs r0, #33 @ 0x21 800229a: f000 f92f bl 80024fc CONN_SetState(CONN_Charging); 800229e: 2005 movs r0, #5 80022a0: f000 fbba bl 8002a18 uint16_t curr=4000-GBT_ReqPower.requestedCurrent; 80022a4: 4b84 ldr r3, [pc, #528] @ (80024b8 ) 80022a6: 885b ldrh r3, [r3, #2] 80022a8: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 80022ac: 807b strh r3, [r7, #2] uint16_t volt=GBT_ReqPower.requestedVoltage; 80022ae: 4b82 ldr r3, [pc, #520] @ (80024b8 ) 80022b0: 881b ldrh r3, [r3, #0] 80022b2: 803b strh r3, [r7, #0] //TODO Limits GBT_EDCAN_Output.requestedVoltage = volt; 80022b4: 4b81 ldr r3, [pc, #516] @ (80024bc ) 80022b6: 883a ldrh r2, [r7, #0] 80022b8: f8a3 2001 strh.w r2, [r3, #1] GBT_EDCAN_Output.requestedCurrent = curr; 80022bc: 4b7f ldr r3, [pc, #508] @ (80024bc ) 80022be: 887a ldrh r2, [r7, #2] 80022c0: f8a3 2003 strh.w r2, [r3, #3] GBT_EDCAN_Output.enablePSU = 1; 80022c4: 4b7d ldr r3, [pc, #500] @ (80024bc ) 80022c6: 2201 movs r2, #1 80022c8: 701a strb r2, [r3, #0] GBT_TimeChargingStarted = get_Current_Time(); 80022ca: f002 fecf bl 800506c 80022ce: 4603 mov r3, r0 80022d0: 4a7b ldr r2, [pc, #492] @ (80024c0 ) 80022d2: 6013 str r3, [r2, #0] } break; 80022d4: e0dd b.n 8002492 case GBT_S10_CHARGING: //CHARGING //TODO BCL BCS BSM missing ERRORS if(GBT_EDCAN_Input.chargeControl == CHARGING_NOT_ALLOWED) GBT_Stop(GBT_CST_SUSPENDS_ARTIFICIALLY); 80022d6: 4b7b ldr r3, [pc, #492] @ (80024c4 ) 80022d8: 795b ldrb r3, [r3, #5] 80022da: 2b01 cmp r3, #1 80022dc: d102 bne.n 80022e4 80022de: 487a ldr r0, [pc, #488] @ (80024c8 ) 80022e0: f000 fa50 bl 8002784 if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK) GBT_Stop(GBT_CST_SUSPENDS_ARTIFICIALLY);//GBT_ForceStop(); 80022e4: 4b77 ldr r3, [pc, #476] @ (80024c4 ) 80022e6: 795b ldrb r3, [r3, #5] 80022e8: 2b03 cmp r3, #3 80022ea: d102 bne.n 80022f2 80022ec: 4876 ldr r0, [pc, #472] @ (80024c8 ) 80022ee: f000 fa49 bl 8002784 if(GBT_LockState.error) GBT_Stop(GBT_CST_OTHERFALUT); 80022f2: 4b76 ldr r3, [pc, #472] @ (80024cc ) 80022f4: 785b ldrb r3, [r3, #1] 80022f6: 2b00 cmp r3, #0 80022f8: d003 beq.n 8002302 80022fa: f24f 40f0 movw r0, #62704 @ 0xf4f0 80022fe: f000 fa41 bl 8002784 if((GBT_ReadTemp(0) > 90) || (GBT_ReadTemp(1) > 90)) { 8002302: 2000 movs r0, #0 8002304: f7ff fa7a bl 80017fc 8002308: 4603 mov r3, r0 800230a: 2b5a cmp r3, #90 @ 0x5a 800230c: dc05 bgt.n 800231a 800230e: 2001 movs r0, #1 8002310: f7ff fa74 bl 80017fc 8002314: 4603 mov r3, r0 8002316: 2b5a cmp r3, #90 @ 0x5a 8002318: dd10 ble.n 800233c GBT_Stop(GBT_CST_CONNECTOR_OVER_TEMP); 800231a: 486d ldr r0, [pc, #436] @ (80024d0 ) 800231c: f000 fa32 bl 8002784 EDCAN_printf(LOG_WARN, "Connector overheat %d %d\n", GBT_ReadTemp(0), GBT_ReadTemp(1)); 8002320: 2000 movs r0, #0 8002322: f7ff fa6b bl 80017fc 8002326: 4603 mov r3, r0 8002328: 461c mov r4, r3 800232a: 2001 movs r0, #1 800232c: f7ff fa66 bl 80017fc 8002330: 4603 mov r3, r0 8002332: 4622 mov r2, r4 8002334: 4967 ldr r1, [pc, #412] @ (80024d4 ) 8002336: 2004 movs r0, #4 8002338: f002 fcea bl 8004d10 } if(GBT_EDCAN_Input.chargingError == GBT_ERR_INSULATION) { 800233c: 4b61 ldr r3, [pc, #388] @ (80024c4 ) 800233e: 799b ldrb r3, [r3, #6] 8002340: 2b01 cmp r3, #1 8002342: d107 bne.n 8002354 GBT_Stop(GBT_CST_OTHERFALUT); 8002344: f24f 40f0 movw r0, #62704 @ 0xf4f0 8002348: f000 fa1c bl 8002784 EDCAN_printf(LOG_WARN, "Isolation error\n"); 800234c: 4962 ldr r1, [pc, #392] @ (80024d8 ) 800234e: 2004 movs r0, #4 8002350: f002 fcde bl 8004d10 } //GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111100;//NOT PERMITTED GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111101; 8002354: 4b61 ldr r3, [pc, #388] @ (80024dc ) 8002356: f64f 72fd movw r2, #65533 @ 0xfffd 800235a: 80da strh r2, [r3, #6] GBT_ChargerCurrentStatus.chargingTime = (get_Current_Time() - GBT_TimeChargingStarted)/60; 800235c: f002 fe86 bl 800506c 8002360: 4602 mov r2, r0 8002362: 4b57 ldr r3, [pc, #348] @ (80024c0 ) 8002364: 681b ldr r3, [r3, #0] 8002366: 1ad3 subs r3, r2, r3 8002368: 4a5d ldr r2, [pc, #372] @ (80024e0 ) 800236a: fba2 2303 umull r2, r3, r2, r3 800236e: 095b lsrs r3, r3, #5 8002370: b29a uxth r2, r3 8002372: 4b5a ldr r3, [pc, #360] @ (80024dc ) 8002374: 809a strh r2, [r3, #4] // GBT_ChargerCurrentStatus.outputCurrent = 4000 - GBT_EDCAN_Output.requestedCurrent; // GBT_ChargerCurrentStatus.outputVoltage = GBT_EDCAN_Output.requestedVoltage; GBT_ChargerCurrentStatus.outputCurrent = 4000 - GBT_EDCAN_Input.measuredCurrent; 8002376: 4b53 ldr r3, [pc, #332] @ (80024c4 ) 8002378: f8b3 3003 ldrh.w r3, [r3, #3] 800237c: b29b uxth r3, r3 800237e: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 8002382: b29a uxth r2, r3 8002384: 4b55 ldr r3, [pc, #340] @ (80024dc ) 8002386: 805a strh r2, [r3, #2] GBT_ChargerCurrentStatus.outputVoltage = GBT_EDCAN_Input.measuredVoltage; 8002388: 4b4e ldr r3, [pc, #312] @ (80024c4 ) 800238a: f8b3 3001 ldrh.w r3, [r3, #1] 800238e: b29a uxth r2, r3 8002390: 4b52 ldr r3, [pc, #328] @ (80024dc ) 8002392: 801a strh r2, [r3, #0] GBT_EDCAN_Output.chargingElapsedTimeMin = (get_Current_Time() - GBT_TimeChargingStarted)/60; 8002394: f002 fe6a bl 800506c 8002398: 4602 mov r2, r0 800239a: 4b49 ldr r3, [pc, #292] @ (80024c0 ) 800239c: 681b ldr r3, [r3, #0] 800239e: 1ad3 subs r3, r2, r3 80023a0: 4a4f ldr r2, [pc, #316] @ (80024e0 ) 80023a2: fba2 2303 umull r2, r3, r2, r3 80023a6: 095b lsrs r3, r3, #5 80023a8: b29a uxth r2, r3 80023aa: 4b44 ldr r3, [pc, #272] @ (80024bc ) 80023ac: f8a3 2009 strh.w r2, [r3, #9] GBT_EDCAN_Output.chargingElapsedTimeSec = (get_Current_Time() - GBT_TimeChargingStarted)%60; 80023b0: f002 fe5c bl 800506c 80023b4: 4602 mov r2, r0 80023b6: 4b42 ldr r3, [pc, #264] @ (80024c0 ) 80023b8: 681b ldr r3, [r3, #0] 80023ba: 1ad1 subs r1, r2, r3 80023bc: 4b48 ldr r3, [pc, #288] @ (80024e0 ) 80023be: fba3 2301 umull r2, r3, r3, r1 80023c2: 095a lsrs r2, r3, #5 80023c4: 4613 mov r3, r2 80023c6: 011b lsls r3, r3, #4 80023c8: 1a9b subs r3, r3, r2 80023ca: 009b lsls r3, r3, #2 80023cc: 1aca subs r2, r1, r3 80023ce: b2d2 uxtb r2, r2 80023d0: 4b3a ldr r3, [pc, #232] @ (80024bc ) 80023d2: 72da strb r2, [r3, #11] if(j_rx.state == 0) GBT_SendCCS(); 80023d4: 4b37 ldr r3, [pc, #220] @ (80024b4 ) 80023d6: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 80023da: 2b00 cmp r3, #0 80023dc: d101 bne.n 80023e2 80023de: f001 fabd bl 800395c GBT_Delay(50); 80023e2: 2032 movs r0, #50 @ 0x32 80023e4: f000 f9ba bl 800275c //TODO: снижение тока если перегрев контактов break; 80023e8: e05a b.n 80024a0 case GBT_STOP: GBT_Delay(10); 80023ea: 200a movs r0, #10 80023ec: f000 f9b6 bl 800275c GBT_EDCAN_Output.enablePSU = 0; 80023f0: 4b32 ldr r3, [pc, #200] @ (80024bc ) 80023f2: 2200 movs r2, #0 80023f4: 701a strb r2, [r3, #0] GBT_SendCST(GBT_StopCauseCode); 80023f6: 4b3b ldr r3, [pc, #236] @ (80024e4 ) 80023f8: 681b ldr r3, [r3, #0] 80023fa: 4618 mov r0, r3 80023fc: f001 fabc bl 8003978 //RELAY_Write(RELAY_OUTPUT, 0); //GBT_SwitchState(GBT_DISABLED); if(GBT_StateTick()>10000){ 8002400: f000 f9a0 bl 8002744 8002404: 4603 mov r3, r0 8002406: f242 7210 movw r2, #10000 @ 0x2710 800240a: 4293 cmp r3, r2 800240c: d906 bls.n 800241c EDCAN_printf(LOG_WARN, "BSD Timeout\n"); 800240e: 4936 ldr r1, [pc, #216] @ (80024e8 ) 8002410: 2004 movs r0, #4 8002412: f002 fc7d bl 8004d10 GBT_Error(0xFCF0C0FD); //BSD Timeout 8002416: 4835 ldr r0, [pc, #212] @ (80024ec ) 8002418: f000 f9ca bl 80027b0 } if(GBT_BSD_recv != 0){ 800241c: 4b34 ldr r3, [pc, #208] @ (80024f0 ) 800241e: 781b ldrb r3, [r3, #0] 8002420: 2b00 cmp r3, #0 8002422: d038 beq.n 8002496 GBT_SwitchState(GBT_STOP_CSD); 8002424: 2023 movs r0, #35 @ 0x23 8002426: f000 f869 bl 80024fc } break; 800242a: e034 b.n 8002496 case GBT_STOP_CSD: GBT_Delay(250); 800242c: 20fa movs r0, #250 @ 0xfa 800242e: f000 f995 bl 800275c GBT_SendCSD(); 8002432: f001 fac1 bl 80039b8 if(GBT_StateTick()>2500){ //2.5S 8002436: f000 f985 bl 8002744 800243a: 4603 mov r3, r0 800243c: f640 12c4 movw r2, #2500 @ 0x9c4 8002440: 4293 cmp r3, r2 8002442: d92a bls.n 800249a GBT_SwitchState(GBT_COMPLETE); 8002444: 2025 movs r0, #37 @ 0x25 8002446: f000 f859 bl 80024fc // GBT_Reset(); //CONN_SetState(CONN_Occupied_complete); //if(connectorState == CONN_Occupied_charging) //PSU_Mode(0x0100); } break; 800244a: e026 b.n 800249a case GBT_ERROR: GBT_SendCEM(GBT_ErrorCode); //2.5S 800244c: 4b29 ldr r3, [pc, #164] @ (80024f4 ) 800244e: 681b ldr r3, [r3, #0] 8002450: 4618 mov r0, r3 8002452: f001 fad1 bl 80039f8 GBT_SwitchState(GBT_COMPLETE); 8002456: 2025 movs r0, #37 @ 0x25 8002458: f000 f850 bl 80024fc // GBT_Reset(); // break; 800245c: e020 b.n 80024a0 case GBT_COMPLETE: if(connectorState != CONN_Finishing) GBT_SwitchState(GBT_DISABLED); 800245e: 4b26 ldr r3, [pc, #152] @ (80024f8 ) 8002460: 781b ldrb r3, [r3, #0] 8002462: 2b06 cmp r3, #6 8002464: d01b beq.n 800249e 8002466: 2010 movs r0, #16 8002468: f000 f848 bl 80024fc break; 800246c: e017 b.n 800249e default: GBT_SwitchState(GBT_DISABLED); 800246e: 2010 movs r0, #16 8002470: f000 f844 bl 80024fc } } 8002474: e014 b.n 80024a0 break; 8002476: bf00 nop 8002478: e012 b.n 80024a0 break; 800247a: bf00 nop 800247c: e010 b.n 80024a0 break; 800247e: bf00 nop 8002480: e00e b.n 80024a0 break; 8002482: bf00 nop 8002484: e00c b.n 80024a0 break; 8002486: bf00 nop 8002488: e00a b.n 80024a0 break; 800248a: bf00 nop 800248c: e008 b.n 80024a0 break; 800248e: bf00 nop 8002490: e006 b.n 80024a0 break; 8002492: bf00 nop 8002494: e004 b.n 80024a0 break; 8002496: bf00 nop 8002498: e002 b.n 80024a0 break; 800249a: bf00 nop 800249c: e000 b.n 80024a0 break; 800249e: bf00 nop } 80024a0: bf00 nop 80024a2: 3708 adds r7, #8 80024a4: 46bd mov sp, r7 80024a6: bdb0 pop {r4, r5, r7, pc} 80024a8: 200002ee .word 0x200002ee 80024ac: fcf4c0fc .word 0xfcf4c0fc 80024b0: 0800d7cc .word 0x0800d7cc 80024b4: 200004bc .word 0x200004bc 80024b8: 2000034c .word 0x2000034c 80024bc: 200004a4 .word 0x200004a4 80024c0: 20000384 .word 0x20000384 80024c4: 200004b4 .word 0x200004b4 80024c8: 0400f0f0 .word 0x0400f0f0 80024cc: 200005cc .word 0x200005cc 80024d0: 0001f0f0 .word 0x0001f0f0 80024d4: 0800d7dc .word 0x0800d7dc 80024d8: 0800d7f8 .word 0x0800d7f8 80024dc: 20000370 .word 0x20000370 80024e0: 88888889 .word 0x88888889 80024e4: 20000388 .word 0x20000388 80024e8: 0800d80c .word 0x0800d80c 80024ec: fcf0c0fd .word 0xfcf0c0fd 80024f0: 200002f0 .word 0x200002f0 80024f4: 2000038c .word 0x2000038c 80024f8: 20000390 .word 0x20000390 080024fc : void GBT_SwitchState(gbtState_t state){ 80024fc: b580 push {r7, lr} 80024fe: b082 sub sp, #8 8002500: af00 add r7, sp, #0 8002502: 4603 mov r3, r0 8002504: 71fb strb r3, [r7, #7] GBT_State = state; 8002506: 4a70 ldr r2, [pc, #448] @ (80026c8 ) 8002508: 79fb ldrb r3, [r7, #7] 800250a: 7013 strb r3, [r2, #0] ED_status = state; 800250c: 4a6f ldr r2, [pc, #444] @ (80026cc ) 800250e: 79fb ldrb r3, [r7, #7] 8002510: 7013 strb r3, [r2, #0] GBT_state_tick = HAL_GetTick(); 8002512: f003 f98f bl 8005834 8002516: 4603 mov r3, r0 8002518: 4a6d ldr r2, [pc, #436] @ (80026d0 ) 800251a: 6013 str r3, [r2, #0] if(GBT_State == GBT_DISABLED) printf ("GBT_DISABLED\n"); 800251c: 4b6a ldr r3, [pc, #424] @ (80026c8 ) 800251e: 781b ldrb r3, [r3, #0] 8002520: 2b10 cmp r3, #16 8002522: d102 bne.n 800252a 8002524: 486b ldr r0, [pc, #428] @ (80026d4 ) 8002526: f007 fd91 bl 800a04c // if(GBT_State == GBT_S0_UNCONNECTED) printf ("GBT_S0_UNCONNECTED\n"); // if(GBT_State == GBT_S1_CONNECTED) printf ("GBT_S1_CONNECTED\n"); // if(GBT_State == GBT_S2_LOCKED) printf ("GBT_S2_LOCKED\n"); if(GBT_State == GBT_S3_STARTED) printf ("GBT_S3_STARTED\n"); 800252a: 4b67 ldr r3, [pc, #412] @ (80026c8 ) 800252c: 781b ldrb r3, [r3, #0] 800252e: 2b13 cmp r3, #19 8002530: d102 bne.n 8002538 8002532: 4869 ldr r0, [pc, #420] @ (80026d8 ) 8002534: f007 fd8a bl 800a04c if(GBT_State == GBT_S31_WAIT_BHM) printf ("GBT_S31_WAIT_BHM\n"); 8002538: 4b63 ldr r3, [pc, #396] @ (80026c8 ) 800253a: 781b ldrb r3, [r3, #0] 800253c: 2b14 cmp r3, #20 800253e: d102 bne.n 8002546 8002540: 4866 ldr r0, [pc, #408] @ (80026dc ) 8002542: f007 fd83 bl 800a04c if(GBT_State == GBT_S4_ISOTEST) printf ("GBT_S4_ISOTEST\n"); 8002546: 4b60 ldr r3, [pc, #384] @ (80026c8 ) 8002548: 781b ldrb r3, [r3, #0] 800254a: 2b15 cmp r3, #21 800254c: d102 bne.n 8002554 800254e: 4864 ldr r0, [pc, #400] @ (80026e0 ) 8002550: f007 fd7c bl 800a04c if(GBT_State == GBT_S5_BAT_INFO) printf ("GBT_S5_BAT_INFO\n"); 8002554: 4b5c ldr r3, [pc, #368] @ (80026c8 ) 8002556: 781b ldrb r3, [r3, #0] 8002558: 2b16 cmp r3, #22 800255a: d102 bne.n 8002562 800255c: 4861 ldr r0, [pc, #388] @ (80026e4 ) 800255e: f007 fd75 bl 800a04c if(GBT_State == GBT_S6_BAT_STAT) printf ("GBT_S6_BAT_STAT\n"); 8002562: 4b59 ldr r3, [pc, #356] @ (80026c8 ) 8002564: 781b ldrb r3, [r3, #0] 8002566: 2b17 cmp r3, #23 8002568: d102 bne.n 8002570 800256a: 485f ldr r0, [pc, #380] @ (80026e8 ) 800256c: f007 fd6e bl 800a04c if(GBT_State == GBT_S7_BMS_WAIT) printf ("GBT_S7_BMS_WAIT\n"); 8002570: 4b55 ldr r3, [pc, #340] @ (80026c8 ) 8002572: 781b ldrb r3, [r3, #0] 8002574: 2b18 cmp r3, #24 8002576: d102 bne.n 800257e 8002578: 485c ldr r0, [pc, #368] @ (80026ec ) 800257a: f007 fd67 bl 800a04c if(GBT_State == GBT_S8_INIT_CHARGER)printf ("GBT_S8_INIT_CHARGER\n"); 800257e: 4b52 ldr r3, [pc, #328] @ (80026c8 ) 8002580: 781b ldrb r3, [r3, #0] 8002582: 2b19 cmp r3, #25 8002584: d102 bne.n 800258c 8002586: 485a ldr r0, [pc, #360] @ (80026f0 ) 8002588: f007 fd60 bl 800a04c if(GBT_State == GBT_S9_WAIT_BCL) printf ("GBT_S9_WAIT_BCL\n"); 800258c: 4b4e ldr r3, [pc, #312] @ (80026c8 ) 800258e: 781b ldrb r3, [r3, #0] 8002590: 2b20 cmp r3, #32 8002592: d102 bne.n 800259a 8002594: 4857 ldr r0, [pc, #348] @ (80026f4 ) 8002596: f007 fd59 bl 800a04c if(GBT_State == GBT_S10_CHARGING) printf ("GBT_S10_CHARGING\n"); 800259a: 4b4b ldr r3, [pc, #300] @ (80026c8 ) 800259c: 781b ldrb r3, [r3, #0] 800259e: 2b21 cmp r3, #33 @ 0x21 80025a0: d102 bne.n 80025a8 80025a2: 4855 ldr r0, [pc, #340] @ (80026f8 ) 80025a4: f007 fd52 bl 800a04c if(GBT_State == GBT_STOP) printf ("GBT_STOP\n"); 80025a8: 4b47 ldr r3, [pc, #284] @ (80026c8 ) 80025aa: 781b ldrb r3, [r3, #0] 80025ac: 2b22 cmp r3, #34 @ 0x22 80025ae: d102 bne.n 80025b6 80025b0: 4852 ldr r0, [pc, #328] @ (80026fc ) 80025b2: f007 fd4b bl 800a04c if(GBT_State == GBT_STOP_CSD) printf ("GBT_STOP_CSD\n"); 80025b6: 4b44 ldr r3, [pc, #272] @ (80026c8 ) 80025b8: 781b ldrb r3, [r3, #0] 80025ba: 2b23 cmp r3, #35 @ 0x23 80025bc: d102 bne.n 80025c4 80025be: 4850 ldr r0, [pc, #320] @ (8002700 ) 80025c0: f007 fd44 bl 800a04c if(GBT_State == GBT_ERROR) printf ("GBT_ERROR\n"); 80025c4: 4b40 ldr r3, [pc, #256] @ (80026c8 ) 80025c6: 781b ldrb r3, [r3, #0] 80025c8: 2b24 cmp r3, #36 @ 0x24 80025ca: d102 bne.n 80025d2 80025cc: 484d ldr r0, [pc, #308] @ (8002704 ) 80025ce: f007 fd3d bl 800a04c if(GBT_State == GBT_COMPLETE) printf ("GBT_COMPLETE\n"); 80025d2: 4b3d ldr r3, [pc, #244] @ (80026c8 ) 80025d4: 781b ldrb r3, [r3, #0] 80025d6: 2b25 cmp r3, #37 @ 0x25 80025d8: d102 bne.n 80025e0 80025da: 484b ldr r0, [pc, #300] @ (8002708 ) 80025dc: f007 fd36 bl 800a04c if(GBT_State == GBT_DISABLED) EDCAN_printf(LOG_INFO, "GBT_DISABLED\n"); 80025e0: 4b39 ldr r3, [pc, #228] @ (80026c8 ) 80025e2: 781b ldrb r3, [r3, #0] 80025e4: 2b10 cmp r3, #16 80025e6: d103 bne.n 80025f0 80025e8: 4948 ldr r1, [pc, #288] @ (800270c ) 80025ea: 2006 movs r0, #6 80025ec: f002 fb90 bl 8004d10 if(GBT_State == GBT_S3_STARTED) EDCAN_printf(LOG_INFO, "GBT_S3_STARTED\n"); 80025f0: 4b35 ldr r3, [pc, #212] @ (80026c8 ) 80025f2: 781b ldrb r3, [r3, #0] 80025f4: 2b13 cmp r3, #19 80025f6: d103 bne.n 8002600 80025f8: 4945 ldr r1, [pc, #276] @ (8002710 ) 80025fa: 2006 movs r0, #6 80025fc: f002 fb88 bl 8004d10 if(GBT_State == GBT_S31_WAIT_BHM) EDCAN_printf(LOG_INFO, "GBT_S31_WAIT_BHM\n"); 8002600: 4b31 ldr r3, [pc, #196] @ (80026c8 ) 8002602: 781b ldrb r3, [r3, #0] 8002604: 2b14 cmp r3, #20 8002606: d103 bne.n 8002610 8002608: 4942 ldr r1, [pc, #264] @ (8002714 ) 800260a: 2006 movs r0, #6 800260c: f002 fb80 bl 8004d10 if(GBT_State == GBT_S4_ISOTEST) EDCAN_printf(LOG_INFO, "GBT_S4_ISOTEST\n"); 8002610: 4b2d ldr r3, [pc, #180] @ (80026c8 ) 8002612: 781b ldrb r3, [r3, #0] 8002614: 2b15 cmp r3, #21 8002616: d103 bne.n 8002620 8002618: 493f ldr r1, [pc, #252] @ (8002718 ) 800261a: 2006 movs r0, #6 800261c: f002 fb78 bl 8004d10 if(GBT_State == GBT_S5_BAT_INFO) EDCAN_printf(LOG_INFO, "GBT_S5_BAT_INFO\n"); 8002620: 4b29 ldr r3, [pc, #164] @ (80026c8 ) 8002622: 781b ldrb r3, [r3, #0] 8002624: 2b16 cmp r3, #22 8002626: d103 bne.n 8002630 8002628: 493c ldr r1, [pc, #240] @ (800271c ) 800262a: 2006 movs r0, #6 800262c: f002 fb70 bl 8004d10 if(GBT_State == GBT_S6_BAT_STAT) EDCAN_printf(LOG_INFO, "GBT_S6_BAT_STAT\n"); 8002630: 4b25 ldr r3, [pc, #148] @ (80026c8 ) 8002632: 781b ldrb r3, [r3, #0] 8002634: 2b17 cmp r3, #23 8002636: d103 bne.n 8002640 8002638: 4939 ldr r1, [pc, #228] @ (8002720 ) 800263a: 2006 movs r0, #6 800263c: f002 fb68 bl 8004d10 if(GBT_State == GBT_S7_BMS_WAIT) EDCAN_printf(LOG_INFO, "GBT_S7_BMS_WAIT\n"); 8002640: 4b21 ldr r3, [pc, #132] @ (80026c8 ) 8002642: 781b ldrb r3, [r3, #0] 8002644: 2b18 cmp r3, #24 8002646: d103 bne.n 8002650 8002648: 4936 ldr r1, [pc, #216] @ (8002724 ) 800264a: 2006 movs r0, #6 800264c: f002 fb60 bl 8004d10 if(GBT_State == GBT_S8_INIT_CHARGER)EDCAN_printf(LOG_INFO, "GBT_S8_INIT_CHARGER\n"); 8002650: 4b1d ldr r3, [pc, #116] @ (80026c8 ) 8002652: 781b ldrb r3, [r3, #0] 8002654: 2b19 cmp r3, #25 8002656: d103 bne.n 8002660 8002658: 4933 ldr r1, [pc, #204] @ (8002728 ) 800265a: 2006 movs r0, #6 800265c: f002 fb58 bl 8004d10 if(GBT_State == GBT_S9_WAIT_BCL) EDCAN_printf(LOG_INFO, "GBT_S9_WAIT_BCL\n"); 8002660: 4b19 ldr r3, [pc, #100] @ (80026c8 ) 8002662: 781b ldrb r3, [r3, #0] 8002664: 2b20 cmp r3, #32 8002666: d103 bne.n 8002670 8002668: 4930 ldr r1, [pc, #192] @ (800272c ) 800266a: 2006 movs r0, #6 800266c: f002 fb50 bl 8004d10 if(GBT_State == GBT_S10_CHARGING) EDCAN_printf(LOG_INFO, "GBT_S10_CHARGING\n"); 8002670: 4b15 ldr r3, [pc, #84] @ (80026c8 ) 8002672: 781b ldrb r3, [r3, #0] 8002674: 2b21 cmp r3, #33 @ 0x21 8002676: d103 bne.n 8002680 8002678: 492d ldr r1, [pc, #180] @ (8002730 ) 800267a: 2006 movs r0, #6 800267c: f002 fb48 bl 8004d10 if(GBT_State == GBT_STOP) EDCAN_printf(LOG_INFO, "GBT_STOP\n"); 8002680: 4b11 ldr r3, [pc, #68] @ (80026c8 ) 8002682: 781b ldrb r3, [r3, #0] 8002684: 2b22 cmp r3, #34 @ 0x22 8002686: d103 bne.n 8002690 8002688: 492a ldr r1, [pc, #168] @ (8002734 ) 800268a: 2006 movs r0, #6 800268c: f002 fb40 bl 8004d10 if(GBT_State == GBT_STOP_CSD) EDCAN_printf(LOG_INFO, "GBT_STOP_CSD\n"); 8002690: 4b0d ldr r3, [pc, #52] @ (80026c8 ) 8002692: 781b ldrb r3, [r3, #0] 8002694: 2b23 cmp r3, #35 @ 0x23 8002696: d103 bne.n 80026a0 8002698: 4927 ldr r1, [pc, #156] @ (8002738 ) 800269a: 2006 movs r0, #6 800269c: f002 fb38 bl 8004d10 if(GBT_State == GBT_ERROR) EDCAN_printf(LOG_WARN, "GBT_ERROR\n"); 80026a0: 4b09 ldr r3, [pc, #36] @ (80026c8 ) 80026a2: 781b ldrb r3, [r3, #0] 80026a4: 2b24 cmp r3, #36 @ 0x24 80026a6: d103 bne.n 80026b0 80026a8: 4924 ldr r1, [pc, #144] @ (800273c ) 80026aa: 2004 movs r0, #4 80026ac: f002 fb30 bl 8004d10 if(GBT_State == GBT_COMPLETE) EDCAN_printf(LOG_INFO, "GBT_COMPLETE\n"); 80026b0: 4b05 ldr r3, [pc, #20] @ (80026c8 ) 80026b2: 781b ldrb r3, [r3, #0] 80026b4: 2b25 cmp r3, #37 @ 0x25 80026b6: d103 bne.n 80026c0 80026b8: 4921 ldr r1, [pc, #132] @ (8002740 ) 80026ba: 2006 movs r0, #6 80026bc: f002 fb28 bl 8004d10 } 80026c0: bf00 nop 80026c2: 3708 adds r7, #8 80026c4: 46bd mov sp, r7 80026c6: bd80 pop {r7, pc} 80026c8: 200002dc .word 0x200002dc 80026cc: 20003328 .word 0x20003328 80026d0: 200002e0 .word 0x200002e0 80026d4: 0800d81c .word 0x0800d81c 80026d8: 0800d82c .word 0x0800d82c 80026dc: 0800d83c .word 0x0800d83c 80026e0: 0800d850 .word 0x0800d850 80026e4: 0800d860 .word 0x0800d860 80026e8: 0800d870 .word 0x0800d870 80026ec: 0800d880 .word 0x0800d880 80026f0: 0800d890 .word 0x0800d890 80026f4: 0800d8a4 .word 0x0800d8a4 80026f8: 0800d8b4 .word 0x0800d8b4 80026fc: 0800d8c8 .word 0x0800d8c8 8002700: 0800d8d4 .word 0x0800d8d4 8002704: 0800d8e4 .word 0x0800d8e4 8002708: 0800d8f0 .word 0x0800d8f0 800270c: 0800d900 .word 0x0800d900 8002710: 0800d910 .word 0x0800d910 8002714: 0800d920 .word 0x0800d920 8002718: 0800d934 .word 0x0800d934 800271c: 0800d944 .word 0x0800d944 8002720: 0800d958 .word 0x0800d958 8002724: 0800d96c .word 0x0800d96c 8002728: 0800d980 .word 0x0800d980 800272c: 0800d998 .word 0x0800d998 8002730: 0800d9ac .word 0x0800d9ac 8002734: 0800d9c0 .word 0x0800d9c0 8002738: 0800d9cc .word 0x0800d9cc 800273c: 0800d9dc .word 0x0800d9dc 8002740: 0800d9e8 .word 0x0800d9e8 08002744 : uint32_t GBT_StateTick(){ 8002744: b580 push {r7, lr} 8002746: af00 add r7, sp, #0 return HAL_GetTick() - GBT_state_tick; 8002748: f003 f874 bl 8005834 800274c: 4602 mov r2, r0 800274e: 4b02 ldr r3, [pc, #8] @ (8002758 ) 8002750: 681b ldr r3, [r3, #0] 8002752: 1ad3 subs r3, r2, r3 } 8002754: 4618 mov r0, r3 8002756: bd80 pop {r7, pc} 8002758: 200002e0 .word 0x200002e0 0800275c : void GBT_Delay(uint32_t delay){ 800275c: b580 push {r7, lr} 800275e: b082 sub sp, #8 8002760: af00 add r7, sp, #0 8002762: 6078 str r0, [r7, #4] GBT_delay_start = HAL_GetTick(); 8002764: f003 f866 bl 8005834 8002768: 4603 mov r3, r0 800276a: 4a04 ldr r2, [pc, #16] @ (800277c ) 800276c: 6013 str r3, [r2, #0] GBT_delay = delay; 800276e: 4a04 ldr r2, [pc, #16] @ (8002780 ) 8002770: 687b ldr r3, [r7, #4] 8002772: 6013 str r3, [r2, #0] } 8002774: bf00 nop 8002776: 3708 adds r7, #8 8002778: 46bd mov sp, r7 800277a: bd80 pop {r7, pc} 800277c: 200002e4 .word 0x200002e4 8002780: 200002e8 .word 0x200002e8 08002784 : void GBT_Stop(uint32_t causecode){ 8002784: b580 push {r7, lr} 8002786: b082 sub sp, #8 8002788: af00 add r7, sp, #0 800278a: 6078 str r0, [r7, #4] GBT_StopCauseCode = causecode; 800278c: 4a06 ldr r2, [pc, #24] @ (80027a8 ) 800278e: 687b ldr r3, [r7, #4] 8002790: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 8002792: 4b06 ldr r3, [pc, #24] @ (80027ac ) 8002794: 781b ldrb r3, [r3, #0] 8002796: 2b22 cmp r3, #34 @ 0x22 8002798: d002 beq.n 80027a0 800279a: 2022 movs r0, #34 @ 0x22 800279c: f7ff feae bl 80024fc } 80027a0: bf00 nop 80027a2: 3708 adds r7, #8 80027a4: 46bd mov sp, r7 80027a6: bd80 pop {r7, pc} 80027a8: 20000388 .word 0x20000388 80027ac: 200002dc .word 0x200002dc 080027b0 : void GBT_Error(uint32_t errorcode){ 80027b0: b580 push {r7, lr} 80027b2: b082 sub sp, #8 80027b4: af00 add r7, sp, #0 80027b6: 6078 str r0, [r7, #4] EDCAN_printf(LOG_WARN, "GBT Error code: 0x%X\n", errorcode); 80027b8: 687a ldr r2, [r7, #4] 80027ba: 4907 ldr r1, [pc, #28] @ (80027d8 ) 80027bc: 2004 movs r0, #4 80027be: f002 faa7 bl 8004d10 GBT_ErrorCode = errorcode; 80027c2: 4a06 ldr r2, [pc, #24] @ (80027dc ) 80027c4: 687b ldr r3, [r7, #4] 80027c6: 6013 str r3, [r2, #0] GBT_SwitchState(GBT_ERROR); 80027c8: 2024 movs r0, #36 @ 0x24 80027ca: f7ff fe97 bl 80024fc } 80027ce: bf00 nop 80027d0: 3708 adds r7, #8 80027d2: 46bd mov sp, r7 80027d4: bd80 pop {r7, pc} 80027d6: bf00 nop 80027d8: 0800d9f8 .word 0x0800d9f8 80027dc: 2000038c .word 0x2000038c 080027e0 : void GBT_ForceStop(){ 80027e0: b580 push {r7, lr} 80027e2: af00 add r7, sp, #0 GBT_EDCAN_Output.enablePSU = 0; 80027e4: 4b07 ldr r3, [pc, #28] @ (8002804 ) 80027e6: 2200 movs r2, #0 80027e8: 701a strb r2, [r3, #0] GBT_SwitchState(GBT_COMPLETE); 80027ea: 2025 movs r0, #37 @ 0x25 80027ec: f7ff fe86 bl 80024fc GBT_Lock(0); 80027f0: 2000 movs r0, #0 80027f2: f001 fcad bl 8004150 RELAY_Write(RELAY_AUX, 0); 80027f6: 2100 movs r1, #0 80027f8: 2000 movs r0, #0 80027fa: f7fe ff5d bl 80016b8 } 80027fe: bf00 nop 8002800: bd80 pop {r7, pc} 8002802: bf00 nop 8002804: 200004a4 .word 0x200004a4 08002808 : void GBT_Reset(){ 8002808: b580 push {r7, lr} 800280a: af00 add r7, sp, #0 GBT_BAT_INFO_recv = 0; 800280c: 4b27 ldr r3, [pc, #156] @ (80028ac ) 800280e: 2200 movs r2, #0 8002810: 701a strb r2, [r3, #0] GBT_BAT_STAT_recv = 0; 8002812: 4b27 ldr r3, [pc, #156] @ (80028b0 ) 8002814: 2200 movs r2, #0 8002816: 701a strb r2, [r3, #0] GBT_BRO_recv = 0; 8002818: 4b26 ldr r3, [pc, #152] @ (80028b4 ) 800281a: 2200 movs r2, #0 800281c: 701a strb r2, [r3, #0] GBT_BHM_recv = 0; 800281e: 4b26 ldr r3, [pc, #152] @ (80028b8 ) 8002820: 2200 movs r2, #0 8002822: 701a strb r2, [r3, #0] GBT_BSD_recv = 0; 8002824: 4b25 ldr r3, [pc, #148] @ (80028bc ) 8002826: 2200 movs r2, #0 8002828: 701a strb r2, [r3, #0] EV_ready = 0; 800282a: 4b25 ldr r3, [pc, #148] @ (80028c0 ) 800282c: 2200 movs r2, #0 800282e: 701a strb r2, [r3, #0] memset(&GBT_EVInfo, 0, sizeof (GBT_EVInfo)); 8002830: 2231 movs r2, #49 @ 0x31 8002832: 2100 movs r1, #0 8002834: 4823 ldr r0, [pc, #140] @ (80028c4 ) 8002836: f007 fc23 bl 800a080 memset(&GBT_BATStat, 0, sizeof (GBT_BATStat)); 800283a: 220d movs r2, #13 800283c: 2100 movs r1, #0 800283e: 4822 ldr r0, [pc, #136] @ (80028c8 ) 8002840: f007 fc1e bl 800a080 memset(&GBT_ReqPower, 0, sizeof (GBT_ReqPower)); 8002844: 2205 movs r2, #5 8002846: 2100 movs r1, #0 8002848: 4820 ldr r0, [pc, #128] @ (80028cc ) 800284a: f007 fc19 bl 800a080 memset(&GBT_CurrPower, 0, sizeof (GBT_CurrPower)); 800284e: 2205 movs r2, #5 8002850: 2100 movs r1, #0 8002852: 481f ldr r0, [pc, #124] @ (80028d0 ) 8002854: f007 fc14 bl 800a080 memset(&GBT_MaxVoltage, 0, sizeof (GBT_MaxVoltage)); 8002858: 2202 movs r2, #2 800285a: 2100 movs r1, #0 800285c: 481d ldr r0, [pc, #116] @ (80028d4 ) 800285e: f007 fc0f bl 800a080 memset(&GBT_ChargingStatus, 0, sizeof (GBT_ChargingStatus)); 8002862: 2209 movs r2, #9 8002864: 2100 movs r1, #0 8002866: 481c ldr r0, [pc, #112] @ (80028d8 ) 8002868: f007 fc0a bl 800a080 memset(&GBT_BatteryStatus, 0, sizeof (GBT_BatteryStatus)); 800286c: 2207 movs r2, #7 800286e: 2100 movs r1, #0 8002870: 481a ldr r0, [pc, #104] @ (80028dc ) 8002872: f007 fc05 bl 800a080 memset(&GBT_ChargerCurrentStatus, 0, sizeof (GBT_ChargerCurrentStatus)); 8002876: 2208 movs r2, #8 8002878: 2100 movs r1, #0 800287a: 4819 ldr r0, [pc, #100] @ (80028e0 ) 800287c: f007 fc00 bl 800a080 memset(&GBT_ChargerStop, 0, sizeof (GBT_ChargerStop)); 8002880: 2208 movs r2, #8 8002882: 2100 movs r1, #0 8002884: 4817 ldr r0, [pc, #92] @ (80028e4 ) 8002886: f007 fbfb bl 800a080 GBT_CurrPower.requestedCurrent = 4000; //0A 800288a: 4b11 ldr r3, [pc, #68] @ (80028d0 ) 800288c: f44f 627a mov.w r2, #4000 @ 0xfa0 8002890: 805a strh r2, [r3, #2] GBT_CurrPower.requestedVoltage = 500; //50V 8002892: 4b0f ldr r3, [pc, #60] @ (80028d0 ) 8002894: f44f 72fa mov.w r2, #500 @ 0x1f4 8002898: 801a strh r2, [r3, #0] GBT_TimeChargingStarted = 0; 800289a: 4b13 ldr r3, [pc, #76] @ (80028e8 ) 800289c: 2200 movs r2, #0 800289e: 601a str r2, [r3, #0] GBT_BRO = 0x00; 80028a0: 4b12 ldr r3, [pc, #72] @ (80028ec ) 80028a2: 2200 movs r2, #0 80028a4: 701a strb r2, [r3, #0] } 80028a6: bf00 nop 80028a8: bd80 pop {r7, pc} 80028aa: bf00 nop 80028ac: 200002ec .word 0x200002ec 80028b0: 200002ed .word 0x200002ed 80028b4: 200002ee .word 0x200002ee 80028b8: 200002ef .word 0x200002ef 80028bc: 200002f0 .word 0x200002f0 80028c0: 200002f1 .word 0x200002f1 80028c4: 20000308 .word 0x20000308 80028c8: 2000033c .word 0x2000033c 80028cc: 2000034c .word 0x2000034c 80028d0: 20000354 .word 0x20000354 80028d4: 20000304 .word 0x20000304 80028d8: 2000035c .word 0x2000035c 80028dc: 20000368 .word 0x20000368 80028e0: 20000370 .word 0x20000370 80028e4: 20000378 .word 0x20000378 80028e8: 20000384 .word 0x20000384 80028ec: 20000380 .word 0x20000380 080028f0 : void GBT_Start(){ 80028f0: b580 push {r7, lr} 80028f2: af00 add r7, sp, #0 RELAY_Write(RELAY_AUX, 1); 80028f4: 2101 movs r1, #1 80028f6: 2000 movs r0, #0 80028f8: f7fe fede bl 80016b8 GBT_SwitchState(GBT_S3_STARTED); 80028fc: 2013 movs r0, #19 80028fe: f7ff fdfd bl 80024fc } 8002902: bf00 nop 8002904: bd80 pop {r7, pc} 08002906 : extern GBT_EDCAN_Output_t GBT_EDCAN_Output; extern GBT_EDCAN_Input_t GBT_EDCAN_Input; uint8_t CC_STATE_FILTERED; void CONN_Init(){ 8002906: b580 push {r7, lr} 8002908: af00 add r7, sp, #0 CONN_SetState(CONN_Initializing); 800290a: 2001 movs r0, #1 800290c: f000 f884 bl 8002a18 } 8002910: bf00 nop 8002912: bd80 pop {r7, pc} 08002914 : void CONN_Task(){ 8002914: b580 push {r7, lr} 8002916: af00 add r7, sp, #0 switch (connectorState){ 8002918: 4b3b ldr r3, [pc, #236] @ (8002a08 ) 800291a: 781b ldrb r3, [r3, #0] 800291c: 3b01 subs r3, #1 800291e: 2b05 cmp r3, #5 8002920: d864 bhi.n 80029ec 8002922: a201 add r2, pc, #4 @ (adr r2, 8002928 ) 8002924: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8002928: 08002941 .word 0x08002941 800292c: 08002955 .word 0x08002955 8002930: 0800295d .word 0x0800295d 8002934: 08002989 .word 0x08002989 8002938: 080029bf .word 0x080029bf 800293c: 080029d5 .word 0x080029d5 case CONN_Initializing: // unlocked GBT_Lock(0); 8002940: 2000 movs r0, #0 8002942: f001 fc05 bl 8004150 CONN_SetState(CONN_Available); 8002946: 2003 movs r0, #3 8002948: f000 f866 bl 8002a18 GBT_LockState.error = 0; 800294c: 4b2f ldr r3, [pc, #188] @ (8002a0c ) 800294e: 2200 movs r2, #0 8002950: 705a strb r2, [r3, #1] break; 8002952: e056 b.n 8002a02 case CONN_Faulted: //unlocked GBT_Lock(0); 8002954: 2000 movs r0, #0 8002956: f001 fbfb bl 8004150 break; 800295a: e052 b.n 8002a02 case CONN_Available: //unlocked, waiting to connect GBT_Lock(0); 800295c: 2000 movs r0, #0 800295e: f001 fbf7 bl 8004150 GBT_LockState.error = 0; 8002962: 4b2a ldr r3, [pc, #168] @ (8002a0c ) 8002964: 2200 movs r2, #0 8002966: 705a strb r2, [r3, #1] if((CONN_CC_GetState()==GBT_CC_4V) && (GBT_EDCAN_Input.chargeControl != FORCE_UNLOCK)){ // Исправить 8002968: f000 f8dc bl 8002b24 800296c: 4603 mov r3, r0 800296e: 2b03 cmp r3, #3 8002970: d140 bne.n 80029f4 8002972: 4b27 ldr r3, [pc, #156] @ (8002a10 ) 8002974: 795b ldrb r3, [r3, #5] 8002976: 2b03 cmp r3, #3 8002978: d03c beq.n 80029f4 CONN_SetState(CONN_Preparing); 800297a: 2004 movs r0, #4 800297c: f000 f84c bl 8002a18 GBT_Lock(1); 8002980: 2001 movs r0, #1 8002982: f001 fbe5 bl 8004150 } break; 8002986: e035 b.n 80029f4 // Выйти из двух состояний в Finished если force unlock case CONN_Preparing: //locked, waiting to charge GBT_Lock(1); 8002988: 2001 movs r0, #1 800298a: f001 fbe1 bl 8004150 if(CONN_CC_GetState()==GBT_CC_4V){ 800298e: f000 f8c9 bl 8002b24 8002992: 4603 mov r3, r0 8002994: 2b03 cmp r3, #3 8002996: d10e bne.n 80029b6 if(GBT_EDCAN_Input.chargeControl == CHARGING_ALLOWED){ 8002998: 4b1d ldr r3, [pc, #116] @ (8002a10 ) 800299a: 795b ldrb r3, [r3, #5] 800299c: 2b02 cmp r3, #2 800299e: d102 bne.n 80029a6 // RELAY_Write(RELAY_AUX, 1); // GBT_Start(); CONN_SetState(CONN_Charging); 80029a0: 2005 movs r0, #5 80029a2: f000 f839 bl 8002a18 } if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK){ 80029a6: 4b1a ldr r3, [pc, #104] @ (8002a10 ) 80029a8: 795b ldrb r3, [r3, #5] 80029aa: 2b03 cmp r3, #3 80029ac: d124 bne.n 80029f8 CONN_SetState(CONN_Available);//TODO: CONN_Occupied_complete 80029ae: 2003 movs r0, #3 80029b0: f000 f832 bl 8002a18 } //if (CHARGING_NOT_ALLOWED) stay here }else{ CONN_SetState(CONN_Available); } break; 80029b4: e020 b.n 80029f8 CONN_SetState(CONN_Available); 80029b6: 2003 movs r0, #3 80029b8: f000 f82e bl 8002a18 break; 80029bc: e01c b.n 80029f8 case CONN_Charging://charging, locked GBT_Lock(1); 80029be: 2001 movs r0, #1 80029c0: f001 fbc6 bl 8004150 if(GBT_State == GBT_COMPLETE){ 80029c4: 4b13 ldr r3, [pc, #76] @ (8002a14 ) 80029c6: 781b ldrb r3, [r3, #0] 80029c8: 2b25 cmp r3, #37 @ 0x25 80029ca: d117 bne.n 80029fc CONN_SetState(CONN_Finishing); 80029cc: 2006 movs r0, #6 80029ce: f000 f823 bl 8002a18 } // break; 80029d2: e013 b.n 80029fc case CONN_Finishing://charging completed, waiting to disconnect, unlocked GBT_Lock(0); 80029d4: 2000 movs r0, #0 80029d6: f001 fbbb bl 8004150 // RELAY_Write(RELAY_AUX, 0); //TODO: Reconnection // if(GBT_EDCAN_Input.chargeControl == CHARGING_NOT_ALLOWED){ // CONN_SetState(CONN_Initializing); // } if(CONN_CC_GetState()==GBT_CC_6V){ 80029da: f000 f8a3 bl 8002b24 80029de: 4603 mov r3, r0 80029e0: 2b02 cmp r3, #2 80029e2: d10d bne.n 8002a00 CONN_SetState(CONN_Initializing); 80029e4: 2001 movs r0, #1 80029e6: f000 f817 bl 8002a18 } //Проблема, если нажать кнопку и не вынуть пистолет, то он снова блочится break; 80029ea: e009 b.n 8002a00 default: CONN_SetState(CONN_Initializing); 80029ec: 2001 movs r0, #1 80029ee: f000 f813 bl 8002a18 } } 80029f2: e006 b.n 8002a02 break; 80029f4: bf00 nop 80029f6: e004 b.n 8002a02 break; 80029f8: bf00 nop 80029fa: e002 b.n 8002a02 break; 80029fc: bf00 nop 80029fe: e000 b.n 8002a02 break; 8002a00: bf00 nop } 8002a02: bf00 nop 8002a04: bd80 pop {r7, pc} 8002a06: bf00 nop 8002a08: 20000390 .word 0x20000390 8002a0c: 200005cc .word 0x200005cc 8002a10: 200004b4 .word 0x200004b4 8002a14: 200002dc .word 0x200002dc 08002a18 : //external //CONN_SetState(CONN_Error); //CONN_SetState(CONN_Occupied_charging); //CONN_SetState(CONN_Occupied_Complete); void CONN_SetState(CONN_State_t state){ 8002a18: b580 push {r7, lr} 8002a1a: b082 sub sp, #8 8002a1c: af00 add r7, sp, #0 8002a1e: 4603 mov r3, r0 8002a20: 71fb strb r3, [r7, #7] connectorState = state; 8002a22: 4a1a ldr r2, [pc, #104] @ (8002a8c ) 8002a24: 79fb ldrb r3, [r7, #7] 8002a26: 7013 strb r3, [r2, #0] if(connectorState == CONN_Initializing) printf ("CONN_Initializing\n"); 8002a28: 4b18 ldr r3, [pc, #96] @ (8002a8c ) 8002a2a: 781b ldrb r3, [r3, #0] 8002a2c: 2b01 cmp r3, #1 8002a2e: d102 bne.n 8002a36 8002a30: 4817 ldr r0, [pc, #92] @ (8002a90 ) 8002a32: f007 fb0b bl 800a04c if(connectorState == CONN_Faulted) printf ("CONN_Error\n"); 8002a36: 4b15 ldr r3, [pc, #84] @ (8002a8c ) 8002a38: 781b ldrb r3, [r3, #0] 8002a3a: 2b02 cmp r3, #2 8002a3c: d102 bne.n 8002a44 8002a3e: 4815 ldr r0, [pc, #84] @ (8002a94 ) 8002a40: f007 fb04 bl 800a04c if(connectorState == CONN_Available) printf ("CONN_Available\n"); 8002a44: 4b11 ldr r3, [pc, #68] @ (8002a8c ) 8002a46: 781b ldrb r3, [r3, #0] 8002a48: 2b03 cmp r3, #3 8002a4a: d102 bne.n 8002a52 8002a4c: 4812 ldr r0, [pc, #72] @ (8002a98 ) 8002a4e: f007 fafd bl 800a04c if(connectorState == CONN_Preparing) printf ("CONN_Occupied_waiting\n"); 8002a52: 4b0e ldr r3, [pc, #56] @ (8002a8c ) 8002a54: 781b ldrb r3, [r3, #0] 8002a56: 2b04 cmp r3, #4 8002a58: d102 bne.n 8002a60 8002a5a: 4810 ldr r0, [pc, #64] @ (8002a9c ) 8002a5c: f007 faf6 bl 800a04c if(connectorState == CONN_Charging) printf ("CONN_Occupied_charging\n"); 8002a60: 4b0a ldr r3, [pc, #40] @ (8002a8c ) 8002a62: 781b ldrb r3, [r3, #0] 8002a64: 2b05 cmp r3, #5 8002a66: d102 bne.n 8002a6e 8002a68: 480d ldr r0, [pc, #52] @ (8002aa0 ) 8002a6a: f007 faef bl 800a04c if(connectorState == CONN_Finishing) printf ("CONN_Occupied_complete\n"); 8002a6e: 4b07 ldr r3, [pc, #28] @ (8002a8c ) 8002a70: 781b ldrb r3, [r3, #0] 8002a72: 2b06 cmp r3, #6 8002a74: d102 bne.n 8002a7c 8002a76: 480b ldr r0, [pc, #44] @ (8002aa4 ) 8002a78: f007 fae8 bl 800a04c GBT_EDCAN_Output.connectorState = state; 8002a7c: 4a0a ldr r2, [pc, #40] @ (8002aa8 ) 8002a7e: 79fb ldrb r3, [r7, #7] 8002a80: 7313 strb r3, [r2, #12] } 8002a82: bf00 nop 8002a84: 3708 adds r7, #8 8002a86: 46bd mov sp, r7 8002a88: bd80 pop {r7, pc} 8002a8a: bf00 nop 8002a8c: 20000390 .word 0x20000390 8002a90: 0800da10 .word 0x0800da10 8002a94: 0800da24 .word 0x0800da24 8002a98: 0800da30 .word 0x0800da30 8002a9c: 0800da40 .word 0x0800da40 8002aa0: 0800da58 .word 0x0800da58 8002aa4: 0800da70 .word 0x0800da70 8002aa8: 200004a4 .word 0x200004a4 08002aac : void CONN_CC_ReadStateFiltered() { 8002aac: b580 push {r7, lr} 8002aae: b082 sub sp, #8 8002ab0: af00 add r7, sp, #0 static uint32_t last_change_time; static uint32_t last_check_time; static uint8_t prev_state; // if((last_check_time+100)>HAL_GetTick()) return; if((HAL_GetTick()-last_check_time)<100) return; 8002ab2: f002 febf bl 8005834 8002ab6: 4602 mov r2, r0 8002ab8: 4b16 ldr r3, [pc, #88] @ (8002b14 ) 8002aba: 681b ldr r3, [r3, #0] 8002abc: 1ad3 subs r3, r2, r3 8002abe: 2b63 cmp r3, #99 @ 0x63 8002ac0: d924 bls.n 8002b0c last_check_time = HAL_GetTick(); 8002ac2: f002 feb7 bl 8005834 8002ac6: 4603 mov r3, r0 8002ac8: 4a12 ldr r2, [pc, #72] @ (8002b14 ) 8002aca: 6013 str r3, [r2, #0] uint8_t new_state = CONN_CC_GetStateRaw(); 8002acc: f000 f834 bl 8002b38 8002ad0: 4603 mov r3, r0 8002ad2: 71fb strb r3, [r7, #7] if (new_state != prev_state) { 8002ad4: 4b10 ldr r3, [pc, #64] @ (8002b18 ) 8002ad6: 781b ldrb r3, [r3, #0] 8002ad8: 79fa ldrb r2, [r7, #7] 8002ada: 429a cmp r2, r3 8002adc: d008 beq.n 8002af0 last_change_time = HAL_GetTick(); 8002ade: f002 fea9 bl 8005834 8002ae2: 4603 mov r3, r0 8002ae4: 4a0d ldr r2, [pc, #52] @ (8002b1c ) 8002ae6: 6013 str r3, [r2, #0] prev_state = new_state; 8002ae8: 4a0b ldr r2, [pc, #44] @ (8002b18 ) 8002aea: 79fb ldrb r3, [r7, #7] 8002aec: 7013 strb r3, [r2, #0] 8002aee: e00e b.n 8002b0e } else if ((HAL_GetTick() - last_change_time) >= 300) { 8002af0: f002 fea0 bl 8005834 8002af4: 4602 mov r2, r0 8002af6: 4b09 ldr r3, [pc, #36] @ (8002b1c ) 8002af8: 681b ldr r3, [r3, #0] 8002afa: 1ad3 subs r3, r2, r3 8002afc: f5b3 7f96 cmp.w r3, #300 @ 0x12c 8002b00: d305 bcc.n 8002b0e CC_STATE_FILTERED = prev_state; 8002b02: 4b05 ldr r3, [pc, #20] @ (8002b18 ) 8002b04: 781a ldrb r2, [r3, #0] 8002b06: 4b06 ldr r3, [pc, #24] @ (8002b20 ) 8002b08: 701a strb r2, [r3, #0] 8002b0a: e000 b.n 8002b0e if((HAL_GetTick()-last_check_time)<100) return; 8002b0c: bf00 nop // case GBT_CC_2V: // printf("FGBT_CC_2V\n"); // break; // // } } 8002b0e: 3708 adds r7, #8 8002b10: 46bd mov sp, r7 8002b12: bd80 pop {r7, pc} 8002b14: 20000394 .word 0x20000394 8002b18: 20000398 .word 0x20000398 8002b1c: 2000039c .word 0x2000039c 8002b20: 20000391 .word 0x20000391 08002b24 : uint8_t CONN_CC_GetState(){ 8002b24: b480 push {r7} 8002b26: af00 add r7, sp, #0 return CC_STATE_FILTERED; 8002b28: 4b02 ldr r3, [pc, #8] @ (8002b34 ) 8002b2a: 781b ldrb r3, [r3, #0] } 8002b2c: 4618 mov r0, r3 8002b2e: 46bd mov sp, r7 8002b30: bc80 pop {r7} 8002b32: 4770 bx lr 8002b34: 20000391 .word 0x20000391 08002b38 : uint8_t CONN_CC_GetStateRaw(){ 8002b38: b580 push {r7, lr} 8002b3a: b082 sub sp, #8 8002b3c: af00 add r7, sp, #0 //Vin*k= 1.09v //12vin = 1353 ADC //TODO: Filter 100ms uint32_t adc; float volt; ADC_Select_Channel(ADC_CHANNEL_6); 8002b3e: 2006 movs r0, #6 8002b40: f7fe fea2 bl 8001888 HAL_ADC_Start(&hadc1); 8002b44: 482e ldr r0, [pc, #184] @ (8002c00 ) 8002b46: f002 ff7b bl 8005a40 HAL_ADC_PollForConversion(&hadc1, 100); 8002b4a: 2164 movs r1, #100 @ 0x64 8002b4c: 482c ldr r0, [pc, #176] @ (8002c00 ) 8002b4e: f003 f851 bl 8005bf4 adc = HAL_ADC_GetValue(&hadc1); 8002b52: 482b ldr r0, [pc, #172] @ (8002c00 ) 8002b54: f003 f954 bl 8005e00 8002b58: 6078 str r0, [r7, #4] HAL_ADC_Stop(&hadc1); 8002b5a: 4829 ldr r0, [pc, #164] @ (8002c00 ) 8002b5c: f003 f81e bl 8005b9c volt = (float)adc/113.4f; 8002b60: 6878 ldr r0, [r7, #4] 8002b62: f7fe f90d bl 8000d80 <__aeabi_ui2f> 8002b66: 4603 mov r3, r0 8002b68: 4926 ldr r1, [pc, #152] @ (8002c04 ) 8002b6a: 4618 mov r0, r3 8002b6c: f7fe fa14 bl 8000f98 <__aeabi_fdiv> 8002b70: 4603 mov r3, r0 8002b72: 603b str r3, [r7, #0] // if((volt<12.6f) && (volt>11.4f)) return GBT_CC_12V; // if((volt<6.8f) && (volt>5.2f)) return GBT_CC_6V; // if((volt<4.8f) && (volt>3.2f)) return GBT_CC_4V; // if((volt<2.8f) && (volt>1.2f)) return GBT_CC_2V; if((volt<13.0f) && (volt>11.0f)) return GBT_CC_12V; 8002b74: 4924 ldr r1, [pc, #144] @ (8002c08 ) 8002b76: 6838 ldr r0, [r7, #0] 8002b78: f7fe faf8 bl 800116c <__aeabi_fcmplt> 8002b7c: 4603 mov r3, r0 8002b7e: 2b00 cmp r3, #0 8002b80: d008 beq.n 8002b94 8002b82: 4922 ldr r1, [pc, #136] @ (8002c0c ) 8002b84: 6838 ldr r0, [r7, #0] 8002b86: f7fe fb0f bl 80011a8 <__aeabi_fcmpgt> 8002b8a: 4603 mov r3, r0 8002b8c: 2b00 cmp r3, #0 8002b8e: d001 beq.n 8002b94 8002b90: 2301 movs r3, #1 8002b92: e031 b.n 8002bf8 if((volt<7.2f) && (volt>4.8f)) return GBT_CC_6V; 8002b94: 491e ldr r1, [pc, #120] @ (8002c10 ) 8002b96: 6838 ldr r0, [r7, #0] 8002b98: f7fe fae8 bl 800116c <__aeabi_fcmplt> 8002b9c: 4603 mov r3, r0 8002b9e: 2b00 cmp r3, #0 8002ba0: d008 beq.n 8002bb4 8002ba2: 491c ldr r1, [pc, #112] @ (8002c14 ) 8002ba4: 6838 ldr r0, [r7, #0] 8002ba6: f7fe faff bl 80011a8 <__aeabi_fcmpgt> 8002baa: 4603 mov r3, r0 8002bac: 2b00 cmp r3, #0 8002bae: d001 beq.n 8002bb4 8002bb0: 2302 movs r3, #2 8002bb2: e021 b.n 8002bf8 if((volt<4.8f) && (volt>3.0f)) return GBT_CC_4V; 8002bb4: 4917 ldr r1, [pc, #92] @ (8002c14 ) 8002bb6: 6838 ldr r0, [r7, #0] 8002bb8: f7fe fad8 bl 800116c <__aeabi_fcmplt> 8002bbc: 4603 mov r3, r0 8002bbe: 2b00 cmp r3, #0 8002bc0: d008 beq.n 8002bd4 8002bc2: 4915 ldr r1, [pc, #84] @ (8002c18 ) 8002bc4: 6838 ldr r0, [r7, #0] 8002bc6: f7fe faef bl 80011a8 <__aeabi_fcmpgt> 8002bca: 4603 mov r3, r0 8002bcc: 2b00 cmp r3, #0 8002bce: d001 beq.n 8002bd4 8002bd0: 2303 movs r3, #3 8002bd2: e011 b.n 8002bf8 if((volt<3.0f) && (volt>1.0f)) return GBT_CC_2V; 8002bd4: 4910 ldr r1, [pc, #64] @ (8002c18 ) 8002bd6: 6838 ldr r0, [r7, #0] 8002bd8: f7fe fac8 bl 800116c <__aeabi_fcmplt> 8002bdc: 4603 mov r3, r0 8002bde: 2b00 cmp r3, #0 8002be0: d009 beq.n 8002bf6 8002be2: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 8002be6: 6838 ldr r0, [r7, #0] 8002be8: f7fe fade bl 80011a8 <__aeabi_fcmpgt> 8002bec: 4603 mov r3, r0 8002bee: 2b00 cmp r3, #0 8002bf0: d001 beq.n 8002bf6 8002bf2: 2304 movs r3, #4 8002bf4: e000 b.n 8002bf8 return GBT_CC_UNKNOWN; 8002bf6: 2300 movs r3, #0 } 8002bf8: 4618 mov r0, r3 8002bfa: 3708 adds r7, #8 8002bfc: 46bd mov sp, r7 8002bfe: bd80 pop {r7, pc} 8002c00: 20000258 .word 0x20000258 8002c04: 42e2cccd .word 0x42e2cccd 8002c08: 41500000 .word 0x41500000 8002c0c: 41300000 .word 0x41300000 8002c10: 40e66666 .word 0x40e66666 8002c14: 4099999a .word 0x4099999a 8002c18: 40400000 .word 0x40400000 08002c1c : float CONN_CC_GetAdc(){ 8002c1c: b580 push {r7, lr} 8002c1e: b082 sub sp, #8 8002c20: af00 add r7, sp, #0 //Vin*k= 1.09v //12vin = 1353 ADC uint32_t adc; float volt; ADC_Select_Channel(ADC_CHANNEL_6); 8002c22: 2006 movs r0, #6 8002c24: f7fe fe30 bl 8001888 HAL_ADC_Start(&hadc1); 8002c28: 480e ldr r0, [pc, #56] @ (8002c64 ) 8002c2a: f002 ff09 bl 8005a40 HAL_ADC_PollForConversion(&hadc1, 100); 8002c2e: 2164 movs r1, #100 @ 0x64 8002c30: 480c ldr r0, [pc, #48] @ (8002c64 ) 8002c32: f002 ffdf bl 8005bf4 adc = HAL_ADC_GetValue(&hadc1); 8002c36: 480b ldr r0, [pc, #44] @ (8002c64 ) 8002c38: f003 f8e2 bl 8005e00 8002c3c: 6078 str r0, [r7, #4] HAL_ADC_Stop(&hadc1); 8002c3e: 4809 ldr r0, [pc, #36] @ (8002c64 ) 8002c40: f002 ffac bl 8005b9c volt = (float)adc/113.4f; 8002c44: 6878 ldr r0, [r7, #4] 8002c46: f7fe f89b bl 8000d80 <__aeabi_ui2f> 8002c4a: 4603 mov r3, r0 8002c4c: 4906 ldr r1, [pc, #24] @ (8002c68 ) 8002c4e: 4618 mov r0, r3 8002c50: f7fe f9a2 bl 8000f98 <__aeabi_fdiv> 8002c54: 4603 mov r3, r0 8002c56: 603b str r3, [r7, #0] return volt; 8002c58: 683b ldr r3, [r7, #0] } 8002c5a: 4618 mov r0, r3 8002c5c: 3708 adds r7, #8 8002c5e: 46bd mov sp, r7 8002c60: bd80 pop {r7, pc} 8002c62: bf00 nop 8002c64: 20000258 .word 0x20000258 8002c68: 42e2cccd .word 0x42e2cccd 08002c6c <__NVIC_SystemReset>: /** \brief System Reset \details Initiates a system reset request to reset the MCU. */ __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) { 8002c6c: b480 push {r7} 8002c6e: af00 add r7, sp, #0 \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __STATIC_FORCEINLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 8002c70: f3bf 8f4f dsb sy } 8002c74: bf00 nop __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8002c76: 4b06 ldr r3, [pc, #24] @ (8002c90 <__NVIC_SystemReset+0x24>) 8002c78: 68db ldr r3, [r3, #12] 8002c7a: f403 62e0 and.w r2, r3, #1792 @ 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8002c7e: 4904 ldr r1, [pc, #16] @ (8002c90 <__NVIC_SystemReset+0x24>) 8002c80: 4b04 ldr r3, [pc, #16] @ (8002c94 <__NVIC_SystemReset+0x28>) 8002c82: 4313 orrs r3, r2 8002c84: 60cb str r3, [r1, #12] __ASM volatile ("dsb 0xF":::"memory"); 8002c86: f3bf 8f4f dsb sy } 8002c8a: bf00 nop SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ __DSB(); /* Ensure completion of memory access */ for(;;) /* wait until reset */ { __NOP(); 8002c8c: bf00 nop 8002c8e: e7fd b.n 8002c8c <__NVIC_SystemReset+0x20> 8002c90: e000ed00 .word 0xe000ed00 8002c94: 05fa0004 .word 0x05fa0004 08002c98 <_write>: extern UART_HandleTypeDef huart2; #if defined(__GNUC__) int _write(int fd, char * ptr, int len) { 8002c98: b580 push {r7, lr} 8002c9a: b084 sub sp, #16 8002c9c: af00 add r7, sp, #0 8002c9e: 60f8 str r0, [r7, #12] 8002ca0: 60b9 str r1, [r7, #8] 8002ca2: 607a str r2, [r7, #4] HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, 1); 8002ca4: 2201 movs r2, #1 8002ca6: 2110 movs r1, #16 8002ca8: 480a ldr r0, [pc, #40] @ (8002cd4 <_write+0x3c>) 8002caa: f004 fd8c bl 80077c6 HAL_UART_Transmit(&huart2, (uint8_t *) ptr, len, HAL_MAX_DELAY); 8002cae: 687b ldr r3, [r7, #4] 8002cb0: b29a uxth r2, r3 8002cb2: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 8002cb6: 68b9 ldr r1, [r7, #8] 8002cb8: 4807 ldr r0, [pc, #28] @ (8002cd8 <_write+0x40>) 8002cba: f005 fecb bl 8008a54 HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, 0); 8002cbe: 2200 movs r2, #0 8002cc0: 2110 movs r1, #16 8002cc2: 4804 ldr r0, [pc, #16] @ (8002cd4 <_write+0x3c>) 8002cc4: f004 fd7f bl 80077c6 return len; 8002cc8: 687b ldr r3, [r7, #4] } 8002cca: 4618 mov r0, r3 8002ccc: 3710 adds r7, #16 8002cce: 46bd mov sp, r7 8002cd0: bd80 pop {r7, pc} 8002cd2: bf00 nop 8002cd4: 40011400 .word 0x40011400 8002cd8: 20003354 .word 0x20003354 08002cdc : #endif void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size){ 8002cdc: b580 push {r7, lr} 8002cde: b082 sub sp, #8 8002ce0: af00 add r7, sp, #0 8002ce2: 6078 str r0, [r7, #4] 8002ce4: 460b mov r3, r1 8002ce6: 807b strh r3, [r7, #2] // if(huart->Instance == USART1){ // mm_rx_interrupt(huart, Size); // } if(huart->Instance == USART2){ 8002ce8: 687b ldr r3, [r7, #4] 8002cea: 681b ldr r3, [r3, #0] 8002cec: 4a05 ldr r2, [pc, #20] @ (8002d04 ) 8002cee: 4293 cmp r3, r2 8002cf0: d104 bne.n 8002cfc debug_rx_interrupt(huart, Size); 8002cf2: 887b ldrh r3, [r7, #2] 8002cf4: 4619 mov r1, r3 8002cf6: 6878 ldr r0, [r7, #4] 8002cf8: f000 f806 bl 8002d08 } } 8002cfc: bf00 nop 8002cfe: 3708 adds r7, #8 8002d00: 46bd mov sp, r7 8002d02: bd80 pop {r7, pc} 8002d04: 40004400 .word 0x40004400 08002d08 : void debug_rx_interrupt(UART_HandleTypeDef *huart, uint16_t Size){ 8002d08: b480 push {r7} 8002d0a: b083 sub sp, #12 8002d0c: af00 add r7, sp, #0 8002d0e: 6078 str r0, [r7, #4] 8002d10: 460b mov r3, r1 8002d12: 807b strh r3, [r7, #2] debug_rx_buffer[Size] = '\0'; 8002d14: 887b ldrh r3, [r7, #2] 8002d16: 4a07 ldr r2, [pc, #28] @ (8002d34 ) 8002d18: 2100 movs r1, #0 8002d1a: 54d1 strb r1, [r2, r3] debug_rx_buffer_size = Size; 8002d1c: 887b ldrh r3, [r7, #2] 8002d1e: b2da uxtb r2, r3 8002d20: 4b05 ldr r3, [pc, #20] @ (8002d38 ) 8002d22: 701a strb r2, [r3, #0] debug_cmd_received = 1; 8002d24: 4b05 ldr r3, [pc, #20] @ (8002d3c ) 8002d26: 2201 movs r2, #1 8002d28: 701a strb r2, [r3, #0] } 8002d2a: bf00 nop 8002d2c: 370c adds r7, #12 8002d2e: 46bd mov sp, r7 8002d30: bc80 pop {r7} 8002d32: 4770 bx lr 8002d34: 200003a0 .word 0x200003a0 8002d38: 200004a1 .word 0x200004a1 8002d3c: 200004a0 .word 0x200004a0 08002d40 : void debug_init(){ 8002d40: b580 push {r7, lr} 8002d42: af00 add r7, sp, #0 HAL_UARTEx_ReceiveToIdle_IT(&huart2,debug_rx_buffer,255); 8002d44: 22ff movs r2, #255 @ 0xff 8002d46: 4903 ldr r1, [pc, #12] @ (8002d54 ) 8002d48: 4803 ldr r0, [pc, #12] @ (8002d58 ) 8002d4a: f005 ff15 bl 8008b78 // mm_schedule_write(0x02, 0x00FF, 0xFFFF); //for (int i=0;i<60;i++) // mm_schedule_write(0x02, 0x0000, 0xFF00); // mm_schedule_write(0x01, 0x0000, 0x0100); // mm_schedule_write(0x01, 0x0000, 0x0100); } 8002d4e: bf00 nop 8002d50: bd80 pop {r7, pc} 8002d52: bf00 nop 8002d54: 200003a0 .word 0x200003a0 8002d58: 20003354 .word 0x20003354 08002d5c : void parse_command(uint8_t* buffer, size_t length) { 8002d5c: b5b0 push {r4, r5, r7, lr} 8002d5e: b086 sub sp, #24 8002d60: af00 add r7, sp, #0 8002d62: 6078 str r0, [r7, #4] 8002d64: 6039 str r1, [r7, #0] // ignore \r \n symbols size_t i = 0; 8002d66: 2300 movs r3, #0 8002d68: 617b str r3, [r7, #20] for (i = 0; i < length; i++) { 8002d6a: 2300 movs r3, #0 8002d6c: 617b str r3, [r7, #20] 8002d6e: e016 b.n 8002d9e if (buffer[i] == '\r' || buffer[i] == '\n') { 8002d70: 687a ldr r2, [r7, #4] 8002d72: 697b ldr r3, [r7, #20] 8002d74: 4413 add r3, r2 8002d76: 781b ldrb r3, [r3, #0] 8002d78: 2b0d cmp r3, #13 8002d7a: d005 beq.n 8002d88 8002d7c: 687a ldr r2, [r7, #4] 8002d7e: 697b ldr r3, [r7, #20] 8002d80: 4413 add r3, r2 8002d82: 781b ldrb r3, [r3, #0] 8002d84: 2b0a cmp r3, #10 8002d86: d107 bne.n 8002d98 buffer[i] = '\0'; 8002d88: 687a ldr r2, [r7, #4] 8002d8a: 697b ldr r3, [r7, #20] 8002d8c: 4413 add r3, r2 8002d8e: 2200 movs r2, #0 8002d90: 701a strb r2, [r3, #0] length = i; 8002d92: 697b ldr r3, [r7, #20] 8002d94: 603b str r3, [r7, #0] break; 8002d96: e006 b.n 8002da6 for (i = 0; i < length; i++) { 8002d98: 697b ldr r3, [r7, #20] 8002d9a: 3301 adds r3, #1 8002d9c: 617b str r3, [r7, #20] 8002d9e: 697a ldr r2, [r7, #20] 8002da0: 683b ldr r3, [r7, #0] 8002da2: 429a cmp r2, r3 8002da4: d3e4 bcc.n 8002d70 } } if (buffer[0] == 0) return; 8002da6: 687b ldr r3, [r7, #4] 8002da8: 781b ldrb r3, [r3, #0] 8002daa: 2b00 cmp r3, #0 8002dac: f000 82d4 beq.w 8003358 if (strncmp((const char*)buffer, "reset", length) == 0) { 8002db0: 683a ldr r2, [r7, #0] 8002db2: 49ad ldr r1, [pc, #692] @ (8003068 ) 8002db4: 6878 ldr r0, [r7, #4] 8002db6: f007 f951 bl 800a05c 8002dba: 4603 mov r3, r0 8002dbc: 2b00 cmp r3, #0 8002dbe: d104 bne.n 8002dca printf("Resetting...\n"); 8002dc0: 48aa ldr r0, [pc, #680] @ (800306c ) 8002dc2: f007 f943 bl 800a04c NVIC_SystemReset(); 8002dc6: f7ff ff51 bl 8002c6c <__NVIC_SystemReset> } else if (strncmp((const char*)buffer, "relayaux", length) == 0) { 8002dca: 683a ldr r2, [r7, #0] 8002dcc: 49a8 ldr r1, [pc, #672] @ (8003070 ) 8002dce: 6878 ldr r0, [r7, #4] 8002dd0: f007 f944 bl 800a05c 8002dd4: 4603 mov r3, r0 8002dd6: 2b00 cmp r3, #0 8002dd8: d10e bne.n 8002df8 printf("Relaying...\n"); 8002dda: 48a6 ldr r0, [pc, #664] @ (8003074 ) 8002ddc: f007 f936 bl 800a04c RELAY_Write(RELAY_AUX, 1); 8002de0: 2101 movs r1, #1 8002de2: 2000 movs r0, #0 8002de4: f7fe fc68 bl 80016b8 HAL_Delay(200); 8002de8: 20c8 movs r0, #200 @ 0xc8 8002dea: f002 fd2d bl 8005848 RELAY_Write(RELAY_AUX, 0); 8002dee: 2100 movs r1, #0 8002df0: 2000 movs r0, #0 8002df2: f7fe fc61 bl 80016b8 8002df6: e2b0 b.n 800335a } else if (strncmp((const char*)buffer, "relaycc", length) == 0) { 8002df8: 683a ldr r2, [r7, #0] 8002dfa: 499f ldr r1, [pc, #636] @ (8003078 ) 8002dfc: 6878 ldr r0, [r7, #4] 8002dfe: f007 f92d bl 800a05c 8002e02: 4603 mov r3, r0 8002e04: 2b00 cmp r3, #0 8002e06: d10e bne.n 8002e26 printf("Relaying...\n"); 8002e08: 489a ldr r0, [pc, #616] @ (8003074 ) 8002e0a: f007 f91f bl 800a04c RELAY_Write(RELAY_CC, 1); 8002e0e: 2101 movs r1, #1 8002e10: 2001 movs r0, #1 8002e12: f7fe fc51 bl 80016b8 HAL_Delay(200); 8002e16: 20c8 movs r0, #200 @ 0xc8 8002e18: f002 fd16 bl 8005848 RELAY_Write(RELAY_CC, 0); 8002e1c: 2100 movs r1, #0 8002e1e: 2001 movs r0, #1 8002e20: f7fe fc4a bl 80016b8 8002e24: e299 b.n 800335a // } else if (strncmp((const char*)buffer, "voltage", length) == 0) { // printf("Voltaging...\n"); // mm_schedule_read(0x02, 0x0001); } else if (strncmp((const char*)buffer, "adc", length) == 0) { 8002e26: 683a ldr r2, [r7, #0] 8002e28: 4994 ldr r1, [pc, #592] @ (800307c ) 8002e2a: 6878 ldr r0, [r7, #4] 8002e2c: f007 f916 bl 800a05c 8002e30: 4603 mov r3, r0 8002e32: 2b00 cmp r3, #0 8002e34: d10b bne.n 8002e4e printf("CC1=%.2f\n", CONN_CC_GetAdc()); 8002e36: f7ff fef1 bl 8002c1c 8002e3a: 4603 mov r3, r0 8002e3c: 4618 mov r0, r3 8002e3e: f7fd fb69 bl 8000514 <__aeabi_f2d> 8002e42: 4602 mov r2, r0 8002e44: 460b mov r3, r1 8002e46: 488e ldr r0, [pc, #568] @ (8003080 ) 8002e48: f007 f898 bl 8009f7c 8002e4c: e285 b.n 800335a } else if (strncmp((const char*)buffer, "lock_state", length) == 0) { 8002e4e: 683a ldr r2, [r7, #0] 8002e50: 498c ldr r1, [pc, #560] @ (8003084 ) 8002e52: 6878 ldr r0, [r7, #4] 8002e54: f007 f902 bl 800a05c 8002e58: 4603 mov r3, r0 8002e5a: 2b00 cmp r3, #0 8002e5c: d107 bne.n 8002e6e printf("Lock state=%d\n", GBT_LockGetState()); 8002e5e: f001 f959 bl 8004114 8002e62: 4603 mov r3, r0 8002e64: 4619 mov r1, r3 8002e66: 4888 ldr r0, [pc, #544] @ (8003088 ) 8002e68: f007 f888 bl 8009f7c 8002e6c: e275 b.n 800335a } else if (strncmp((const char*)buffer, "lock_lock", length) == 0) { 8002e6e: 683a ldr r2, [r7, #0] 8002e70: 4986 ldr r1, [pc, #536] @ (800308c ) 8002e72: 6878 ldr r0, [r7, #4] 8002e74: f007 f8f2 bl 800a05c 8002e78: 4603 mov r3, r0 8002e7a: 2b00 cmp r3, #0 8002e7c: d106 bne.n 8002e8c printf("Locked\n"); 8002e7e: 4884 ldr r0, [pc, #528] @ (8003090 ) 8002e80: f007 f8e4 bl 800a04c GBT_Lock(1); 8002e84: 2001 movs r0, #1 8002e86: f001 f963 bl 8004150 8002e8a: e266 b.n 800335a } else if (strncmp((const char*)buffer, "lock_unlock", length) == 0) { 8002e8c: 683a ldr r2, [r7, #0] 8002e8e: 4981 ldr r1, [pc, #516] @ (8003094 ) 8002e90: 6878 ldr r0, [r7, #4] 8002e92: f007 f8e3 bl 800a05c 8002e96: 4603 mov r3, r0 8002e98: 2b00 cmp r3, #0 8002e9a: d106 bne.n 8002eaa printf("Unlocked\n"); 8002e9c: 487e ldr r0, [pc, #504] @ (8003098 ) 8002e9e: f007 f8d5 bl 800a04c GBT_Lock(0); 8002ea2: 2000 movs r0, #0 8002ea4: f001 f954 bl 8004150 8002ea8: e257 b.n 800335a } else if (strncmp((const char*)buffer, "complete", length) == 0) { 8002eaa: 683a ldr r2, [r7, #0] 8002eac: 497b ldr r1, [pc, #492] @ (800309c ) 8002eae: 6878 ldr r0, [r7, #4] 8002eb0: f007 f8d4 bl 800a05c 8002eb4: 4603 mov r3, r0 8002eb6: 2b00 cmp r3, #0 8002eb8: d103 bne.n 8002ec2 CONN_SetState(CONN_Finishing); 8002eba: 2006 movs r0, #6 8002ebc: f7ff fdac bl 8002a18 8002ec0: e24b b.n 800335a } else if (strncmp((const char*)buffer, "start", length) == 0) { 8002ec2: 683a ldr r2, [r7, #0] 8002ec4: 4976 ldr r1, [pc, #472] @ (80030a0 ) 8002ec6: 6878 ldr r0, [r7, #4] 8002ec8: f007 f8c8 bl 800a05c 8002ecc: 4603 mov r3, r0 8002ece: 2b00 cmp r3, #0 8002ed0: d105 bne.n 8002ede printf("Started\n"); 8002ed2: 4874 ldr r0, [pc, #464] @ (80030a4 ) 8002ed4: f007 f8ba bl 800a04c GBT_Start(); 8002ed8: f7ff fd0a bl 80028f0 8002edc: e23d b.n 800335a } else if (strncmp((const char*)buffer, "stop", length) == 0) { 8002ede: 683a ldr r2, [r7, #0] 8002ee0: 4971 ldr r1, [pc, #452] @ (80030a8 ) 8002ee2: 6878 ldr r0, [r7, #4] 8002ee4: f007 f8ba bl 800a05c 8002ee8: 4603 mov r3, r0 8002eea: 2b00 cmp r3, #0 8002eec: d106 bne.n 8002efc printf("Stopped\n"); 8002eee: 486f ldr r0, [pc, #444] @ (80030ac ) 8002ef0: f007 f8ac bl 800a04c GBT_Stop(GBT_CST_SUSPENDS_ARTIFICIALLY); 8002ef4: 486e ldr r0, [pc, #440] @ (80030b0 ) 8002ef6: f7ff fc45 bl 8002784 8002efa: e22e b.n 800335a } else if (strncmp((const char*)buffer, "stop1", length) == 0) { 8002efc: 683a ldr r2, [r7, #0] 8002efe: 496d ldr r1, [pc, #436] @ (80030b4 ) 8002f00: 6878 ldr r0, [r7, #4] 8002f02: f007 f8ab bl 800a05c 8002f06: 4603 mov r3, r0 8002f08: 2b00 cmp r3, #0 8002f0a: d105 bne.n 8002f18 printf("Stopped\n"); 8002f0c: 4867 ldr r0, [pc, #412] @ (80030ac ) 8002f0e: f007 f89d bl 800a04c GBT_ForceStop(); 8002f12: f7ff fc65 bl 80027e0 8002f16: e220 b.n 800335a // printf("Stopped\n"); // GBT_Lock(1); // GBT_SwitchState(GBT_S2_LOCKED); // GBT_Delay(500); } else if (strncmp((const char*)buffer, "cc_state", length) == 0) { 8002f18: 683a ldr r2, [r7, #0] 8002f1a: 4967 ldr r1, [pc, #412] @ (80030b8 ) 8002f1c: 6878 ldr r0, [r7, #4] 8002f1e: f007 f89d bl 800a05c 8002f22: 4603 mov r3, r0 8002f24: 2b00 cmp r3, #0 8002f26: d127 bne.n 8002f78 switch(CONN_CC_GetState()){ 8002f28: f7ff fdfc bl 8002b24 8002f2c: 4603 mov r3, r0 8002f2e: 2b04 cmp r3, #4 8002f30: f200 8213 bhi.w 800335a 8002f34: a201 add r2, pc, #4 @ (adr r2, 8002f3c ) 8002f36: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8002f3a: bf00 nop 8002f3c: 08002f51 .word 0x08002f51 8002f40: 08002f59 .word 0x08002f59 8002f44: 08002f61 .word 0x08002f61 8002f48: 08002f69 .word 0x08002f69 8002f4c: 08002f71 .word 0x08002f71 case GBT_CC_UNKNOWN: printf("GBT_CC_UNKNOWN\n"); 8002f50: 485a ldr r0, [pc, #360] @ (80030bc ) 8002f52: f007 f87b bl 800a04c break; 8002f56: e200 b.n 800335a case GBT_CC_12V: printf("GBT_CC_12V\n"); 8002f58: 4859 ldr r0, [pc, #356] @ (80030c0 ) 8002f5a: f007 f877 bl 800a04c break; 8002f5e: e1fc b.n 800335a case GBT_CC_6V: printf("GBT_CC_6V\n"); 8002f60: 4858 ldr r0, [pc, #352] @ (80030c4 ) 8002f62: f007 f873 bl 800a04c break; 8002f66: e1f8 b.n 800335a case GBT_CC_4V: printf("GBT_CC_4V\n"); 8002f68: 4857 ldr r0, [pc, #348] @ (80030c8 ) 8002f6a: f007 f86f bl 800a04c break; 8002f6e: e1f4 b.n 800335a case GBT_CC_2V: printf("GBT_CC_2V\n"); 8002f70: 4856 ldr r0, [pc, #344] @ (80030cc ) 8002f72: f007 f86b bl 800a04c break; 8002f76: e1f0 b.n 800335a } } else if (strncmp((const char*)buffer, "temp", length) == 0) { 8002f78: 683a ldr r2, [r7, #0] 8002f7a: 4955 ldr r1, [pc, #340] @ (80030d0 ) 8002f7c: 6878 ldr r0, [r7, #4] 8002f7e: f007 f86d bl 800a05c 8002f82: 4603 mov r3, r0 8002f84: 2b00 cmp r3, #0 8002f86: d110 bne.n 8002faa printf("temp1 %d\n",GBT_ReadTemp(0)); 8002f88: 2000 movs r0, #0 8002f8a: f7fe fc37 bl 80017fc 8002f8e: 4603 mov r3, r0 8002f90: 4619 mov r1, r3 8002f92: 4850 ldr r0, [pc, #320] @ (80030d4 ) 8002f94: f006 fff2 bl 8009f7c printf("temp2 %d\n",GBT_ReadTemp(1)); 8002f98: 2001 movs r0, #1 8002f9a: f7fe fc2f bl 80017fc 8002f9e: 4603 mov r3, r0 8002fa0: 4619 mov r1, r3 8002fa2: 484d ldr r0, [pc, #308] @ (80030d8 ) 8002fa4: f006 ffea bl 8009f7c 8002fa8: e1d7 b.n 800335a } else if (strncmp((const char*)buffer, "info1", length) == 0) { 8002faa: 683a ldr r2, [r7, #0] 8002fac: 494b ldr r1, [pc, #300] @ (80030dc ) 8002fae: 6878 ldr r0, [r7, #4] 8002fb0: f007 f854 bl 800a05c 8002fb4: 4603 mov r3, r0 8002fb6: 2b00 cmp r3, #0 8002fb8: f040 80a6 bne.w 8003108 printf("Battery info:\n"); 8002fbc: 4848 ldr r0, [pc, #288] @ (80030e0 ) 8002fbe: f007 f845 bl 800a04c printf("maxCV %dV\n",GBT_BATStat.maxCellVoltage/100); // 0.01v/bit 8002fc2: 4b48 ldr r3, [pc, #288] @ (80030e4 ) 8002fc4: 881b ldrh r3, [r3, #0] 8002fc6: b29b uxth r3, r3 8002fc8: 4a47 ldr r2, [pc, #284] @ (80030e8 ) 8002fca: fba2 2303 umull r2, r3, r2, r3 8002fce: 095b lsrs r3, r3, #5 8002fd0: b29b uxth r3, r3 8002fd2: 4619 mov r1, r3 8002fd4: 4845 ldr r0, [pc, #276] @ (80030ec ) 8002fd6: f006 ffd1 bl 8009f7c printf("maxCC %dA\n",GBT_BATStat.maxChargingCurrent/10); // 0.1A/bit 8002fda: 4b42 ldr r3, [pc, #264] @ (80030e4 ) 8002fdc: 885b ldrh r3, [r3, #2] 8002fde: b29b uxth r3, r3 8002fe0: 4a43 ldr r2, [pc, #268] @ (80030f0 ) 8002fe2: fba2 2303 umull r2, r3, r2, r3 8002fe6: 08db lsrs r3, r3, #3 8002fe8: b29b uxth r3, r3 8002fea: 4619 mov r1, r3 8002fec: 4841 ldr r0, [pc, #260] @ (80030f4 ) 8002fee: f006 ffc5 bl 8009f7c printf("totE %dkWh\n",GBT_BATStat.totalEnergy/10); // 0.1kWh 8002ff2: 4b3c ldr r3, [pc, #240] @ (80030e4 ) 8002ff4: 889b ldrh r3, [r3, #4] 8002ff6: b29b uxth r3, r3 8002ff8: 4a3d ldr r2, [pc, #244] @ (80030f0 ) 8002ffa: fba2 2303 umull r2, r3, r2, r3 8002ffe: 08db lsrs r3, r3, #3 8003000: b29b uxth r3, r3 8003002: 4619 mov r1, r3 8003004: 483c ldr r0, [pc, #240] @ (80030f8 ) 8003006: f006 ffb9 bl 8009f7c printf("maxCV %dV\n",GBT_BATStat.maxChargingVoltage/10); // 0.1V/ bit 800300a: 4b36 ldr r3, [pc, #216] @ (80030e4 ) 800300c: 88db ldrh r3, [r3, #6] 800300e: b29b uxth r3, r3 8003010: 4a37 ldr r2, [pc, #220] @ (80030f0 ) 8003012: fba2 2303 umull r2, r3, r2, r3 8003016: 08db lsrs r3, r3, #3 8003018: b29b uxth r3, r3 800301a: 4619 mov r1, r3 800301c: 4833 ldr r0, [pc, #204] @ (80030ec ) 800301e: f006 ffad bl 8009f7c printf("maxT %dC\n",(int16_t)GBT_BATStat.maxTemp-50); // 1C/bit, -50C offset 8003022: 4b30 ldr r3, [pc, #192] @ (80030e4 ) 8003024: 7a1b ldrb r3, [r3, #8] 8003026: 3b32 subs r3, #50 @ 0x32 8003028: 4619 mov r1, r3 800302a: 4834 ldr r0, [pc, #208] @ (80030fc ) 800302c: f006 ffa6 bl 8009f7c printf("SOC %dp\n",GBT_BATStat.SOC/10); // 0.1%/bit , 0..100% 8003030: 4b2c ldr r3, [pc, #176] @ (80030e4 ) 8003032: f8b3 3009 ldrh.w r3, [r3, #9] 8003036: b29b uxth r3, r3 8003038: 4a2d ldr r2, [pc, #180] @ (80030f0 ) 800303a: fba2 2303 umull r2, r3, r2, r3 800303e: 08db lsrs r3, r3, #3 8003040: b29b uxth r3, r3 8003042: 4619 mov r1, r3 8003044: 482e ldr r0, [pc, #184] @ (8003100 ) 8003046: f006 ff99 bl 8009f7c printf("Volt. %dV\n",GBT_BATStat.measVoltage/10); // 0.1V/bit 800304a: 4b26 ldr r3, [pc, #152] @ (80030e4 ) 800304c: f8b3 300b ldrh.w r3, [r3, #11] 8003050: b29b uxth r3, r3 8003052: 4a27 ldr r2, [pc, #156] @ (80030f0 ) 8003054: fba2 2303 umull r2, r3, r2, r3 8003058: 08db lsrs r3, r3, #3 800305a: b29b uxth r3, r3 800305c: 4619 mov r1, r3 800305e: 4829 ldr r0, [pc, #164] @ (8003104 ) 8003060: f006 ff8c bl 8009f7c 8003064: e179 b.n 800335a 8003066: bf00 nop 8003068: 0800da88 .word 0x0800da88 800306c: 0800da90 .word 0x0800da90 8003070: 0800daa0 .word 0x0800daa0 8003074: 0800daac .word 0x0800daac 8003078: 0800dab8 .word 0x0800dab8 800307c: 0800dac0 .word 0x0800dac0 8003080: 0800dac4 .word 0x0800dac4 8003084: 0800dad0 .word 0x0800dad0 8003088: 0800dadc .word 0x0800dadc 800308c: 0800daec .word 0x0800daec 8003090: 0800daf8 .word 0x0800daf8 8003094: 0800db00 .word 0x0800db00 8003098: 0800db0c .word 0x0800db0c 800309c: 0800db18 .word 0x0800db18 80030a0: 0800db24 .word 0x0800db24 80030a4: 0800db2c .word 0x0800db2c 80030a8: 0800db34 .word 0x0800db34 80030ac: 0800db3c .word 0x0800db3c 80030b0: 0400f0f0 .word 0x0400f0f0 80030b4: 0800db44 .word 0x0800db44 80030b8: 0800db4c .word 0x0800db4c 80030bc: 0800db58 .word 0x0800db58 80030c0: 0800db68 .word 0x0800db68 80030c4: 0800db74 .word 0x0800db74 80030c8: 0800db80 .word 0x0800db80 80030cc: 0800db8c .word 0x0800db8c 80030d0: 0800db98 .word 0x0800db98 80030d4: 0800dba0 .word 0x0800dba0 80030d8: 0800dbac .word 0x0800dbac 80030dc: 0800dbb8 .word 0x0800dbb8 80030e0: 0800dbc0 .word 0x0800dbc0 80030e4: 2000033c .word 0x2000033c 80030e8: 51eb851f .word 0x51eb851f 80030ec: 0800dbd0 .word 0x0800dbd0 80030f0: cccccccd .word 0xcccccccd 80030f4: 0800dbdc .word 0x0800dbdc 80030f8: 0800dbe8 .word 0x0800dbe8 80030fc: 0800dbf4 .word 0x0800dbf4 8003100: 0800dc00 .word 0x0800dc00 8003104: 0800dc0c .word 0x0800dc0c } else if (strncmp((const char*)buffer, "info2", length) == 0) { 8003108: 683a ldr r2, [r7, #0] 800310a: 4995 ldr r1, [pc, #596] @ (8003360 ) 800310c: 6878 ldr r0, [r7, #4] 800310e: f006 ffa5 bl 800a05c 8003112: 4603 mov r3, r0 8003114: 2b00 cmp r3, #0 8003116: d153 bne.n 80031c0 printf("EV info:\n"); 8003118: 4892 ldr r0, [pc, #584] @ (8003364 ) 800311a: f006 ff97 bl 800a04c printf("GBT_ver V%d.%d%d\n",GBT_EVInfo.version[0],GBT_EVInfo.version[1],GBT_EVInfo.version[2]); 800311e: 4b92 ldr r3, [pc, #584] @ (8003368 ) 8003120: 781b ldrb r3, [r3, #0] 8003122: 4619 mov r1, r3 8003124: 4b90 ldr r3, [pc, #576] @ (8003368 ) 8003126: 785b ldrb r3, [r3, #1] 8003128: 461a mov r2, r3 800312a: 4b8f ldr r3, [pc, #572] @ (8003368 ) 800312c: 789b ldrb r3, [r3, #2] 800312e: 488f ldr r0, [pc, #572] @ (800336c ) 8003130: f006 ff24 bl 8009f7c printf("Battery type: %d\n",GBT_EVInfo.batteryType); 8003134: 4b8c ldr r3, [pc, #560] @ (8003368 ) 8003136: 78db ldrb r3, [r3, #3] 8003138: 4619 mov r1, r3 800313a: 488d ldr r0, [pc, #564] @ (8003370 ) 800313c: f006 ff1e bl 8009f7c printf("Battery capacity: %d\n", GBT_EVInfo.batteryCapacity); // 0.1Ah/bit 8003140: 4b89 ldr r3, [pc, #548] @ (8003368 ) 8003142: 889b ldrh r3, [r3, #4] 8003144: b29b uxth r3, r3 8003146: 4619 mov r1, r3 8003148: 488a ldr r0, [pc, #552] @ (8003374 ) 800314a: f006 ff17 bl 8009f7c printf("Battery voltage: %d\n", GBT_EVInfo.batteryVoltage); // 0.1V/bit 800314e: 4b86 ldr r3, [pc, #536] @ (8003368 ) 8003150: 88db ldrh r3, [r3, #6] 8003152: b29b uxth r3, r3 8003154: 4619 mov r1, r3 8003156: 4888 ldr r0, [pc, #544] @ (8003378 ) 8003158: f006 ff10 bl 8009f7c printf("Battery vendor: %.4s\n", GBT_EVInfo.batteryVendor); // Battery vendor (ASCII string) 800315c: 4987 ldr r1, [pc, #540] @ (800337c ) 800315e: 4888 ldr r0, [pc, #544] @ (8003380 ) 8003160: f006 ff0c bl 8009f7c printf("Battery SN: %lu\n", GBT_EVInfo.batterySN); // int 8003164: 4b80 ldr r3, [pc, #512] @ (8003368 ) 8003166: 68db ldr r3, [r3, #12] 8003168: 4619 mov r1, r3 800316a: 4886 ldr r0, [pc, #536] @ (8003384 ) 800316c: f006 ff06 bl 8009f7c printf("Battery manufacture date: %02d.%02d.%04d\n", GBT_EVInfo.batteryManuD, GBT_EVInfo.batteryManuM ,GBT_EVInfo.batteryManuY+1985); // year (offset 1985) 8003170: 4b7d ldr r3, [pc, #500] @ (8003368 ) 8003172: 7c9b ldrb r3, [r3, #18] 8003174: 4619 mov r1, r3 8003176: 4b7c ldr r3, [pc, #496] @ (8003368 ) 8003178: 7c5b ldrb r3, [r3, #17] 800317a: 461a mov r2, r3 800317c: 4b7a ldr r3, [pc, #488] @ (8003368 ) 800317e: 7c1b ldrb r3, [r3, #16] 8003180: f203 73c1 addw r3, r3, #1985 @ 0x7c1 8003184: 4880 ldr r0, [pc, #512] @ (8003388 ) 8003186: f006 fef9 bl 8009f7c printf("Battery cycles: %d\n", GBT_EVInfo.batteryCycleCount); //uint24_t 800318a: 4b77 ldr r3, [pc, #476] @ (8003368 ) 800318c: 7cda ldrb r2, [r3, #19] 800318e: 7d19 ldrb r1, [r3, #20] 8003190: 0209 lsls r1, r1, #8 8003192: 430a orrs r2, r1 8003194: 7d5b ldrb r3, [r3, #21] 8003196: 041b lsls r3, r3, #16 8003198: 4313 orrs r3, r2 800319a: 4619 mov r1, r3 800319c: 487b ldr r0, [pc, #492] @ (800338c ) 800319e: f006 feed bl 8009f7c printf("Own auto: %d\n", GBT_EVInfo.ownAuto); // 0 = lizing, 1 = own auto 80031a2: 4b71 ldr r3, [pc, #452] @ (8003368 ) 80031a4: 7d9b ldrb r3, [r3, #22] 80031a6: 4619 mov r1, r3 80031a8: 4879 ldr r0, [pc, #484] @ (8003390 ) 80031aa: f006 fee7 bl 8009f7c printf("EVIN: %.17s\n", GBT_EVInfo.EVIN); //EVIN 80031ae: 4979 ldr r1, [pc, #484] @ (8003394 ) 80031b0: 4879 ldr r0, [pc, #484] @ (8003398 ) 80031b2: f006 fee3 bl 8009f7c printf("EV_SW_VER: %.8s\n", GBT_EVInfo.EV_SW_VER); 80031b6: 4979 ldr r1, [pc, #484] @ (800339c ) 80031b8: 4879 ldr r0, [pc, #484] @ (80033a0 ) 80031ba: f006 fedf bl 8009f7c 80031be: e0cc b.n 800335a } else if (strncmp((const char*)buffer, "info3", length) == 0) { 80031c0: 683a ldr r2, [r7, #0] 80031c2: 4978 ldr r1, [pc, #480] @ (80033a4 ) 80031c4: 6878 ldr r0, [r7, #4] 80031c6: f006 ff49 bl 800a05c 80031ca: 4603 mov r3, r0 80031cc: 2b00 cmp r3, #0 80031ce: d133 bne.n 8003238 printf("GBT_MaxLoad info:\n"); 80031d0: 4875 ldr r0, [pc, #468] @ (80033a8 ) 80031d2: f006 ff3b bl 800a04c printf("Output max current: %d\n",GBT_MaxLoad.maxOutputCurrent); 80031d6: 4b75 ldr r3, [pc, #468] @ (80033ac ) 80031d8: 889b ldrh r3, [r3, #4] 80031da: b29b uxth r3, r3 80031dc: 4619 mov r1, r3 80031de: 4874 ldr r0, [pc, #464] @ (80033b0 ) 80031e0: f006 fecc bl 8009f7c printf("Output min current: %d\n",GBT_MaxLoad.minOutputCurrent); 80031e4: 4b71 ldr r3, [pc, #452] @ (80033ac ) 80031e6: 88db ldrh r3, [r3, #6] 80031e8: b29b uxth r3, r3 80031ea: 4619 mov r1, r3 80031ec: 4871 ldr r0, [pc, #452] @ (80033b4 ) 80031ee: f006 fec5 bl 8009f7c printf("Output max voltage: %d\n",GBT_MaxLoad.maxOutputVoltage); 80031f2: 4b6e ldr r3, [pc, #440] @ (80033ac ) 80031f4: 881b ldrh r3, [r3, #0] 80031f6: b29b uxth r3, r3 80031f8: 4619 mov r1, r3 80031fa: 486f ldr r0, [pc, #444] @ (80033b8 ) 80031fc: f006 febe bl 8009f7c printf("Output min voltage: %d\n",GBT_MaxLoad.minOutputVoltage); 8003200: 4b6a ldr r3, [pc, #424] @ (80033ac ) 8003202: 885b ldrh r3, [r3, #2] 8003204: b29b uxth r3, r3 8003206: 4619 mov r1, r3 8003208: 486c ldr r0, [pc, #432] @ (80033bc ) 800320a: f006 feb7 bl 8009f7c printf("\nGBT_ChargerInfo info:\n"); 800320e: 486c ldr r0, [pc, #432] @ (80033c0 ) 8003210: f006 ff1c bl 800a04c printf("BMS Recognized: %d\n",GBT_ChargerInfo.bmsIdentified); 8003214: 4b6b ldr r3, [pc, #428] @ (80033c4 ) 8003216: 781b ldrb r3, [r3, #0] 8003218: 4619 mov r1, r3 800321a: 486b ldr r0, [pc, #428] @ (80033c8 ) 800321c: f006 feae bl 8009f7c printf("Charger location: %.3s\n",GBT_ChargerInfo.chargerLocation); 8003220: 496a ldr r1, [pc, #424] @ (80033cc ) 8003222: 486b ldr r0, [pc, #428] @ (80033d0 ) 8003224: f006 feaa bl 8009f7c printf("Charger number: %lu\n",GBT_ChargerInfo.chargerNumber); 8003228: 4b66 ldr r3, [pc, #408] @ (80033c4 ) 800322a: f8d3 3001 ldr.w r3, [r3, #1] 800322e: 4619 mov r1, r3 8003230: 4868 ldr r0, [pc, #416] @ (80033d4 ) 8003232: f006 fea3 bl 8009f7c 8003236: e090 b.n 800335a } else if (strncmp((const char*)buffer, "help", length) == 0) { 8003238: 683a ldr r2, [r7, #0] 800323a: 4967 ldr r1, [pc, #412] @ (80033d8 ) 800323c: 6878 ldr r0, [r7, #4] 800323e: f006 ff0d bl 800a05c 8003242: 4603 mov r3, r0 8003244: 2b00 cmp r3, #0 8003246: d136 bne.n 80032b6 printf("Command list:\n"); 8003248: 4864 ldr r0, [pc, #400] @ (80033dc ) 800324a: f006 feff bl 800a04c printf("reset\n"); 800324e: 4864 ldr r0, [pc, #400] @ (80033e0 ) 8003250: f006 fefc bl 800a04c printf("help\n"); 8003254: 4860 ldr r0, [pc, #384] @ (80033d8 ) 8003256: f006 fef9 bl 800a04c printf("cc_state\n"); 800325a: 4862 ldr r0, [pc, #392] @ (80033e4 ) 800325c: f006 fef6 bl 800a04c printf("lock_lock\n"); 8003260: 4861 ldr r0, [pc, #388] @ (80033e8 ) 8003262: f006 fef3 bl 800a04c printf("lock_unlock\n"); 8003266: 4861 ldr r0, [pc, #388] @ (80033ec ) 8003268: f006 fef0 bl 800a04c printf("lock_state\n"); 800326c: 4860 ldr r0, [pc, #384] @ (80033f0 ) 800326e: f006 feed bl 800a04c printf("adc\n"); 8003272: 4860 ldr r0, [pc, #384] @ (80033f4 ) 8003274: f006 feea bl 800a04c printf("relay(cc,aux)\n"); 8003278: 485f ldr r0, [pc, #380] @ (80033f8 ) 800327a: f006 fee7 bl 800a04c printf("start\n"); 800327e: 485f ldr r0, [pc, #380] @ (80033fc ) 8003280: f006 fee4 bl 800a04c printf("stop\n"); 8003284: 485e ldr r0, [pc, #376] @ (8003400 ) 8003286: f006 fee1 bl 800a04c printf("stop1\n"); 800328a: 485e ldr r0, [pc, #376] @ (8003404 ) 800328c: f006 fede bl 800a04c // printf("force\n"); printf("temp\n"); 8003290: 485d ldr r0, [pc, #372] @ (8003408 ) 8003292: f006 fedb bl 800a04c printf("info1\n"); 8003296: 485d ldr r0, [pc, #372] @ (800340c ) 8003298: f006 fed8 bl 800a04c printf("info2\n"); 800329c: 4830 ldr r0, [pc, #192] @ (8003360 ) 800329e: f006 fed5 bl 800a04c printf("info3\n"); 80032a2: 4840 ldr r0, [pc, #256] @ (80033a4 ) 80032a4: f006 fed2 bl 800a04c printf("time\n"); 80032a8: 4859 ldr r0, [pc, #356] @ (8003410 ) 80032aa: f006 fecf bl 800a04c printf("cantest\n"); 80032ae: 4859 ldr r0, [pc, #356] @ (8003414 ) 80032b0: f006 fecc bl 800a04c 80032b4: e051 b.n 800335a //TODO: info commands } else if (strncmp((const char*)buffer, "time", length) == 0) { 80032b6: 683a ldr r2, [r7, #0] 80032b8: 4955 ldr r1, [pc, #340] @ (8003410 ) 80032ba: 6878 ldr r0, [r7, #4] 80032bc: f006 fece bl 800a05c 80032c0: 4603 mov r3, r0 80032c2: 2b00 cmp r3, #0 80032c4: d135 bne.n 8003332 time_t unix_time = (time_t)get_Current_Time(); 80032c6: f001 fed1 bl 800506c 80032ca: 4603 mov r3, r0 80032cc: 17da asrs r2, r3, #31 80032ce: 461c mov r4, r3 80032d0: 4615 mov r5, r2 80032d2: e9c7 4502 strd r4, r5, [r7, #8] struct tm *parts = localtime(&unix_time); 80032d6: f107 0308 add.w r3, r7, #8 80032da: 4618 mov r0, r3 80032dc: f006 ff9c bl 800a218 80032e0: 6138 str r0, [r7, #16] printf("Year: %d\n", parts->tm_year + 1900); 80032e2: 693b ldr r3, [r7, #16] 80032e4: 695b ldr r3, [r3, #20] 80032e6: f203 736c addw r3, r3, #1900 @ 0x76c 80032ea: 4619 mov r1, r3 80032ec: 484a ldr r0, [pc, #296] @ (8003418 ) 80032ee: f006 fe45 bl 8009f7c printf("Month: %d\n", parts->tm_mon + 1); 80032f2: 693b ldr r3, [r7, #16] 80032f4: 691b ldr r3, [r3, #16] 80032f6: 3301 adds r3, #1 80032f8: 4619 mov r1, r3 80032fa: 4848 ldr r0, [pc, #288] @ (800341c ) 80032fc: f006 fe3e bl 8009f7c printf("Day: %d\n", parts->tm_mday); 8003300: 693b ldr r3, [r7, #16] 8003302: 68db ldr r3, [r3, #12] 8003304: 4619 mov r1, r3 8003306: 4846 ldr r0, [pc, #280] @ (8003420 ) 8003308: f006 fe38 bl 8009f7c printf("Hour: %d\n", parts->tm_hour); 800330c: 693b ldr r3, [r7, #16] 800330e: 689b ldr r3, [r3, #8] 8003310: 4619 mov r1, r3 8003312: 4844 ldr r0, [pc, #272] @ (8003424 ) 8003314: f006 fe32 bl 8009f7c printf("Minute: %d\n", parts->tm_min); 8003318: 693b ldr r3, [r7, #16] 800331a: 685b ldr r3, [r3, #4] 800331c: 4619 mov r1, r3 800331e: 4842 ldr r0, [pc, #264] @ (8003428 ) 8003320: f006 fe2c bl 8009f7c printf("Second: %d\n", parts->tm_sec); 8003324: 693b ldr r3, [r7, #16] 8003326: 681b ldr r3, [r3, #0] 8003328: 4619 mov r1, r3 800332a: 4840 ldr r0, [pc, #256] @ (800342c ) 800332c: f006 fe26 bl 8009f7c 8003330: e013 b.n 800335a } else if (strncmp((const char*)buffer, "cantest", length) == 0) { 8003332: 683a ldr r2, [r7, #0] 8003334: 4937 ldr r1, [pc, #220] @ (8003414 ) 8003336: 6878 ldr r0, [r7, #4] 8003338: f006 fe90 bl 800a05c 800333c: 4603 mov r3, r0 800333e: 2b00 cmp r3, #0 8003340: d106 bne.n 8003350 //GBT_SendCHM(); GBT_Error(0xFDF0C0FC); //BRM Timeout 8003342: 483b ldr r0, [pc, #236] @ (8003430 ) 8003344: f7ff fa34 bl 80027b0 printf("can test\n"); 8003348: 483a ldr r0, [pc, #232] @ (8003434 ) 800334a: f006 fe7f bl 800a04c 800334e: e004 b.n 800335a } else { printf("Unknown command\n"); 8003350: 4839 ldr r0, [pc, #228] @ (8003438 ) 8003352: f006 fe7b bl 800a04c 8003356: e000 b.n 800335a if (buffer[0] == 0) return; 8003358: bf00 nop } } 800335a: 3718 adds r7, #24 800335c: 46bd mov sp, r7 800335e: bdb0 pop {r4, r5, r7, pc} 8003360: 0800dc18 .word 0x0800dc18 8003364: 0800dc20 .word 0x0800dc20 8003368: 20000308 .word 0x20000308 800336c: 0800dc2c .word 0x0800dc2c 8003370: 0800dc40 .word 0x0800dc40 8003374: 0800dc54 .word 0x0800dc54 8003378: 0800dc6c .word 0x0800dc6c 800337c: 20000310 .word 0x20000310 8003380: 0800dc84 .word 0x0800dc84 8003384: 0800dc9c .word 0x0800dc9c 8003388: 0800dcb0 .word 0x0800dcb0 800338c: 0800dcdc .word 0x0800dcdc 8003390: 0800dcf0 .word 0x0800dcf0 8003394: 20000320 .word 0x20000320 8003398: 0800dd00 .word 0x0800dd00 800339c: 20000331 .word 0x20000331 80033a0: 0800dd10 .word 0x0800dd10 80033a4: 0800dd24 .word 0x0800dd24 80033a8: 0800dd2c .word 0x0800dd2c 80033ac: 200002f4 .word 0x200002f4 80033b0: 0800dd40 .word 0x0800dd40 80033b4: 0800dd58 .word 0x0800dd58 80033b8: 0800dd70 .word 0x0800dd70 80033bc: 0800dd88 .word 0x0800dd88 80033c0: 0800dda0 .word 0x0800dda0 80033c4: 200002fc .word 0x200002fc 80033c8: 0800ddb8 .word 0x0800ddb8 80033cc: 20000301 .word 0x20000301 80033d0: 0800ddcc .word 0x0800ddcc 80033d4: 0800dde4 .word 0x0800dde4 80033d8: 0800ddfc .word 0x0800ddfc 80033dc: 0800de04 .word 0x0800de04 80033e0: 0800da88 .word 0x0800da88 80033e4: 0800db4c .word 0x0800db4c 80033e8: 0800daec .word 0x0800daec 80033ec: 0800db00 .word 0x0800db00 80033f0: 0800dad0 .word 0x0800dad0 80033f4: 0800dac0 .word 0x0800dac0 80033f8: 0800de14 .word 0x0800de14 80033fc: 0800db24 .word 0x0800db24 8003400: 0800db34 .word 0x0800db34 8003404: 0800db44 .word 0x0800db44 8003408: 0800db98 .word 0x0800db98 800340c: 0800dbb8 .word 0x0800dbb8 8003410: 0800de24 .word 0x0800de24 8003414: 0800de2c .word 0x0800de2c 8003418: 0800de34 .word 0x0800de34 800341c: 0800de40 .word 0x0800de40 8003420: 0800de4c .word 0x0800de4c 8003424: 0800de58 .word 0x0800de58 8003428: 0800de64 .word 0x0800de64 800342c: 0800de70 .word 0x0800de70 8003430: fdf0c0fc .word 0xfdf0c0fc 8003434: 0800de7c .word 0x0800de7c 8003438: 0800de88 .word 0x0800de88 0800343c : void debug_task(){ 800343c: b580 push {r7, lr} 800343e: af00 add r7, sp, #0 if(debug_cmd_received){ 8003440: 4b09 ldr r3, [pc, #36] @ (8003468 ) 8003442: 781b ldrb r3, [r3, #0] 8003444: 2b00 cmp r3, #0 8003446: d00d beq.n 8003464 parse_command(debug_rx_buffer, debug_rx_buffer_size); 8003448: 4b08 ldr r3, [pc, #32] @ (800346c ) 800344a: 781b ldrb r3, [r3, #0] 800344c: 4619 mov r1, r3 800344e: 4808 ldr r0, [pc, #32] @ (8003470 ) 8003450: f7ff fc84 bl 8002d5c HAL_UARTEx_ReceiveToIdle_IT(&huart2,debug_rx_buffer,255); 8003454: 22ff movs r2, #255 @ 0xff 8003456: 4906 ldr r1, [pc, #24] @ (8003470 ) 8003458: 4806 ldr r0, [pc, #24] @ (8003474 ) 800345a: f005 fb8d bl 8008b78 debug_cmd_received = 0; 800345e: 4b02 ldr r3, [pc, #8] @ (8003468 ) 8003460: 2200 movs r2, #0 8003462: 701a strb r2, [r3, #0] } } 8003464: bf00 nop 8003466: bd80 pop {r7, pc} 8003468: 200004a0 .word 0x200004a0 800346c: 200004a1 .word 0x200004a1 8003470: 200003a0 .word 0x200003a0 8003474: 20003354 .word 0x20003354 08003478 : * DestinationID: Packet Destination ID * Addr: First register address in sequence * *data: pointer for data array * len: length of data (1..255) */ void EDCAN_ReadHandler(uint8_t SourceID, uint8_t DestinationID, uint16_t Addr, uint8_t *data, uint8_t len){ 8003478: b480 push {r7} 800347a: b085 sub sp, #20 800347c: af00 add r7, sp, #0 800347e: 603b str r3, [r7, #0] 8003480: 4603 mov r3, r0 8003482: 71fb strb r3, [r7, #7] 8003484: 460b mov r3, r1 8003486: 71bb strb r3, [r7, #6] 8003488: 4613 mov r3, r2 800348a: 80bb strh r3, [r7, #4] // printf("Destination ID = %d\n", DestinationID); // printf("Address = %d\n", Addr); // printf("Len = %d\n", len); // printf("\n"); for (uint16_t AddrOffset = 0; AddrOffset < len; AddrOffset++){ //по очереди перебираем все полученные регистры через Handler 800348c: 2300 movs r3, #0 800348e: 81fb strh r3, [r7, #14] 8003490: e002 b.n 8003498 8003492: 89fb ldrh r3, [r7, #14] 8003494: 3301 adds r3, #1 8003496: 81fb strh r3, [r7, #14] 8003498: 7e3b ldrb r3, [r7, #24] 800349a: b29b uxth r3, r3 800349c: 89fa ldrh r2, [r7, #14] 800349e: 429a cmp r2, r3 80034a0: d3f7 bcc.n 8003492 // } // } } // printf("\n"); } 80034a2: bf00 nop 80034a4: bf00 nop 80034a6: 3714 adds r7, #20 80034a8: 46bd mov sp, r7 80034aa: bc80 pop {r7} 80034ac: 4770 bx lr ... 080034b0 : * DestinationID: Packet Destination ID * Addr: First register address in sequence * *data: pointer for data array * len: length of data (1..255) */ void EDCAN_WriteUserRegister(uint16_t addr, uint8_t value){ 80034b0: b580 push {r7, lr} 80034b2: b082 sub sp, #8 80034b4: af00 add r7, sp, #0 80034b6: 4603 mov r3, r0 80034b8: 460a mov r2, r1 80034ba: 80fb strh r3, [r7, #6] 80034bc: 4613 mov r3, r2 80034be: 717b strb r3, [r7, #5] switch(addr){ 80034c0: 88fb ldrh r3, [r7, #6] 80034c2: f5b3 7f0a cmp.w r3, #552 @ 0x228 80034c6: dc5d bgt.n 8003584 80034c8: f5b3 7f00 cmp.w r3, #512 @ 0x200 80034cc: f2c0 808f blt.w 80035ee 80034d0: f5a3 7300 sub.w r3, r3, #512 @ 0x200 80034d4: 2b28 cmp r3, #40 @ 0x28 80034d6: f200 808a bhi.w 80035ee 80034da: a201 add r2, pc, #4 @ (adr r2, 80034e0 ) 80034dc: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80034e0: 080035cf .word 0x080035cf 80034e4: 080035cf .word 0x080035cf 80034e8: 080035cf .word 0x080035cf 80034ec: 080035cf .word 0x080035cf 80034f0: 080035cf .word 0x080035cf 80034f4: 080035cf .word 0x080035cf 80034f8: 080035cf .word 0x080035cf 80034fc: 080035cf .word 0x080035cf 8003500: 080035cf .word 0x080035cf 8003504: 080035ef .word 0x080035ef 8003508: 080035ef .word 0x080035ef 800350c: 080035ef .word 0x080035ef 8003510: 080035ef .word 0x080035ef 8003514: 080035ef .word 0x080035ef 8003518: 080035ef .word 0x080035ef 800351c: 080035ef .word 0x080035ef 8003520: 0800358f .word 0x0800358f 8003524: 0800359b .word 0x0800359b 8003528: 080035a7 .word 0x080035a7 800352c: 080035b3 .word 0x080035b3 8003530: 080035ef .word 0x080035ef 8003534: 080035ef .word 0x080035ef 8003538: 080035ef .word 0x080035ef 800353c: 080035ef .word 0x080035ef 8003540: 080035ef .word 0x080035ef 8003544: 080035ef .word 0x080035ef 8003548: 080035ef .word 0x080035ef 800354c: 080035ef .word 0x080035ef 8003550: 080035ef .word 0x080035ef 8003554: 080035ef .word 0x080035ef 8003558: 080035ef .word 0x080035ef 800355c: 080035ef .word 0x080035ef 8003560: 080035bf .word 0x080035bf 8003564: 080035bf .word 0x080035bf 8003568: 080035bf .word 0x080035bf 800356c: 080035bf .word 0x080035bf 8003570: 080035bf .word 0x080035bf 8003574: 080035bf .word 0x080035bf 8003578: 080035bf .word 0x080035bf 800357c: 080035bf .word 0x080035bf 8003580: 080035bf .word 0x080035bf 8003584: f5a3 63b0 sub.w r3, r3, #1408 @ 0x580 8003588: 2b07 cmp r3, #7 800358a: d830 bhi.n 80035ee 800358c: e027 b.n 80035de // if(value)GBT_Charger_Enable = 1; // else GBT_Charger_Enable = 0; // break; case EDCAN_REG_TIME_0: writeTimeReg(0, value); 800358e: 797b ldrb r3, [r7, #5] 8003590: 4619 mov r1, r3 8003592: 2000 movs r0, #0 8003594: f001 fe12 bl 80051bc break; 8003598: e02d b.n 80035f6 case EDCAN_REG_TIME_1: writeTimeReg(1, value); 800359a: 797b ldrb r3, [r7, #5] 800359c: 4619 mov r1, r3 800359e: 2001 movs r0, #1 80035a0: f001 fe0c bl 80051bc break; 80035a4: e027 b.n 80035f6 case EDCAN_REG_TIME_2: writeTimeReg(2, value); 80035a6: 797b ldrb r3, [r7, #5] 80035a8: 4619 mov r1, r3 80035aa: 2002 movs r0, #2 80035ac: f001 fe06 bl 80051bc break; 80035b0: e021 b.n 80035f6 case EDCAN_REG_TIME_3: writeTimeReg(3, value); 80035b2: 797b ldrb r3, [r7, #5] 80035b4: 4619 mov r1, r3 80035b6: 2003 movs r0, #3 80035b8: f001 fe00 bl 80051bc break; 80035bc: e01b b.n 80035f6 //0x220 case EDCAN_REG_MAX_LOAD ... (EDCAN_REG_MAX_LOAD+sizeof(GBT_CML_t)): ((uint8_t*)&GBT_MaxLoad)[addr - EDCAN_REG_MAX_LOAD] = value; 80035be: 88fb ldrh r3, [r7, #6] 80035c0: f5a3 7308 sub.w r3, r3, #544 @ 0x220 80035c4: 4a0e ldr r2, [pc, #56] @ (8003600 ) 80035c6: 4413 add r3, r2 80035c8: 797a ldrb r2, [r7, #5] 80035ca: 701a strb r2, [r3, #0] break; 80035cc: e013 b.n 80035f6 //0x200 case EDCAN_REG_CHARGER_INFO ... (EDCAN_REG_CHARGER_INFO+sizeof(GBT_CRM_t)): ((uint8_t*)&GBT_ChargerInfo)[addr - EDCAN_REG_CHARGER_INFO] = value; 80035ce: 88fb ldrh r3, [r7, #6] 80035d0: f5a3 7300 sub.w r3, r3, #512 @ 0x200 80035d4: 4a0b ldr r2, [pc, #44] @ (8003604 ) 80035d6: 4413 add r3, r2 80035d8: 797a ldrb r2, [r7, #5] 80035da: 701a strb r2, [r3, #0] break; 80035dc: e00b b.n 80035f6 //0x580 case EDCAN_REG_INPUT ... (EDCAN_REG_INPUT+sizeof(GBT_EDCAN_Input_t)): ((uint8_t*)&GBT_EDCAN_Input)[addr - EDCAN_REG_INPUT] = value; 80035de: 88fb ldrh r3, [r7, #6] 80035e0: f5a3 63b0 sub.w r3, r3, #1408 @ 0x580 80035e4: 4a08 ldr r2, [pc, #32] @ (8003608 ) 80035e6: 4413 add r3, r2 80035e8: 797a ldrb r2, [r7, #5] 80035ea: 701a strb r2, [r3, #0] //TODO //GBT_EDCAN_Input.measuredCurrent; break; 80035ec: e003 b.n 80035f6 default: printf ("Unknown register\n"); 80035ee: 4807 ldr r0, [pc, #28] @ (800360c ) 80035f0: f006 fd2c bl 800a04c } } 80035f4: bf00 nop 80035f6: bf00 nop 80035f8: 3708 adds r7, #8 80035fa: 46bd mov sp, r7 80035fc: bd80 pop {r7, pc} 80035fe: bf00 nop 8003600: 200002f4 .word 0x200002f4 8003604: 200002fc .word 0x200002fc 8003608: 200004b4 .word 0x200004b4 800360c: 0800de98 .word 0x0800de98 08003610 : uint8_t EDCAN_GetUserRegisterValue(uint16_t addr){ 8003610: b580 push {r7, lr} 8003612: b082 sub sp, #8 8003614: af00 add r7, sp, #0 8003616: 4603 mov r3, r0 8003618: 80fb strh r3, [r7, #6] switch (addr){ 800361a: 88fb ldrh r3, [r7, #6] 800361c: f5b3 6fb1 cmp.w r3, #1416 @ 0x588 8003620: f280 8122 bge.w 8003868 8003624: f5b3 6fb0 cmp.w r3, #1408 @ 0x580 8003628: f280 8117 bge.w 800385a 800362c: f240 520d movw r2, #1293 @ 0x50d 8003630: 4293 cmp r3, r2 8003632: f300 8119 bgt.w 8003868 8003636: f5b3 6fa0 cmp.w r3, #1280 @ 0x500 800363a: f280 8107 bge.w 800384c 800363e: f5b3 7f62 cmp.w r3, #904 @ 0x388 8003642: f280 8111 bge.w 8003868 8003646: f5b3 7f54 cmp.w r3, #848 @ 0x350 800364a: da07 bge.n 800365c 800364c: f5b3 7f0a cmp.w r3, #552 @ 0x228 8003650: f300 80b6 bgt.w 80037c0 8003654: f5b3 7f04 cmp.w r3, #528 @ 0x210 8003658: da78 bge.n 800374c 800365a: e105 b.n 8003868 800365c: f5a3 7354 sub.w r3, r3, #848 @ 0x350 8003660: 2b37 cmp r3, #55 @ 0x37 8003662: f200 8101 bhi.w 8003868 8003666: a201 add r2, pc, #4 @ (adr r2, 800366c ) 8003668: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800366c: 0800380f .word 0x0800380f 8003670: 0800380f .word 0x0800380f 8003674: 0800380f .word 0x0800380f 8003678: 0800380f .word 0x0800380f 800367c: 0800380f .word 0x0800380f 8003680: 0800380f .word 0x0800380f 8003684: 0800380f .word 0x0800380f 8003688: 0800380f .word 0x0800380f 800368c: 0800380f .word 0x0800380f 8003690: 0800380f .word 0x0800380f 8003694: 0800380f .word 0x0800380f 8003698: 0800380f .word 0x0800380f 800369c: 0800380f .word 0x0800380f 80036a0: 0800380f .word 0x0800380f 80036a4: 08003869 .word 0x08003869 80036a8: 0800381d .word 0x0800381d 80036ac: 08003823 .word 0x08003823 80036b0: 08003823 .word 0x08003823 80036b4: 08003823 .word 0x08003823 80036b8: 08003823 .word 0x08003823 80036bc: 08003823 .word 0x08003823 80036c0: 08003823 .word 0x08003823 80036c4: 08003869 .word 0x08003869 80036c8: 08003869 .word 0x08003869 80036cc: 08003869 .word 0x08003869 80036d0: 08003869 .word 0x08003869 80036d4: 08003869 .word 0x08003869 80036d8: 08003869 .word 0x08003869 80036dc: 08003869 .word 0x08003869 80036e0: 08003869 .word 0x08003869 80036e4: 08003869 .word 0x08003869 80036e8: 08003869 .word 0x08003869 80036ec: 08003831 .word 0x08003831 80036f0: 08003831 .word 0x08003831 80036f4: 08003831 .word 0x08003831 80036f8: 08003831 .word 0x08003831 80036fc: 08003831 .word 0x08003831 8003700: 08003831 .word 0x08003831 8003704: 08003831 .word 0x08003831 8003708: 08003831 .word 0x08003831 800370c: 08003831 .word 0x08003831 8003710: 08003831 .word 0x08003831 8003714: 08003869 .word 0x08003869 8003718: 08003869 .word 0x08003869 800371c: 08003869 .word 0x08003869 8003720: 08003869 .word 0x08003869 8003724: 08003869 .word 0x08003869 8003728: 08003869 .word 0x08003869 800372c: 0800383f .word 0x0800383f 8003730: 0800383f .word 0x0800383f 8003734: 0800383f .word 0x0800383f 8003738: 0800383f .word 0x0800383f 800373c: 0800383f .word 0x0800383f 8003740: 0800383f .word 0x0800383f 8003744: 0800383f .word 0x0800383f 8003748: 0800383f .word 0x0800383f 800374c: f5a3 7304 sub.w r3, r3, #528 @ 0x210 8003750: 2b18 cmp r3, #24 8003752: f200 8089 bhi.w 8003868 8003756: a201 add r2, pc, #4 @ (adr r2, 800375c ) 8003758: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800375c: 080037cb .word 0x080037cb 8003760: 080037d5 .word 0x080037d5 8003764: 080037df .word 0x080037df 8003768: 080037e9 .word 0x080037e9 800376c: 08003869 .word 0x08003869 8003770: 08003869 .word 0x08003869 8003774: 08003869 .word 0x08003869 8003778: 08003869 .word 0x08003869 800377c: 08003869 .word 0x08003869 8003780: 08003869 .word 0x08003869 8003784: 08003869 .word 0x08003869 8003788: 08003869 .word 0x08003869 800378c: 08003869 .word 0x08003869 8003790: 08003869 .word 0x08003869 8003794: 08003869 .word 0x08003869 8003798: 08003869 .word 0x08003869 800379c: 080037f3 .word 0x080037f3 80037a0: 080037f3 .word 0x080037f3 80037a4: 080037f3 .word 0x080037f3 80037a8: 080037f3 .word 0x080037f3 80037ac: 080037f3 .word 0x080037f3 80037b0: 080037f3 .word 0x080037f3 80037b4: 080037f3 .word 0x080037f3 80037b8: 080037f3 .word 0x080037f3 80037bc: 080037f3 .word 0x080037f3 80037c0: f5a3 7344 sub.w r3, r3, #784 @ 0x310 80037c4: 2b30 cmp r3, #48 @ 0x30 80037c6: d84f bhi.n 8003868 80037c8: e01a b.n 8003800 // /* регистры 256..2047 используются пользовательских нужд */ // 0x400 case EDCAN_REG_TIME_0: return getTimeReg(0); 80037ca: 2000 movs r0, #0 80037cc: f001 fd1e bl 800520c 80037d0: 4603 mov r3, r0 80037d2: e04a b.n 800386a break; case EDCAN_REG_TIME_1: return getTimeReg(1); 80037d4: 2001 movs r0, #1 80037d6: f001 fd19 bl 800520c 80037da: 4603 mov r3, r0 80037dc: e045 b.n 800386a break; case EDCAN_REG_TIME_2: return getTimeReg(2); 80037de: 2002 movs r0, #2 80037e0: f001 fd14 bl 800520c 80037e4: 4603 mov r3, r0 80037e6: e040 b.n 800386a break; case EDCAN_REG_TIME_3: return getTimeReg(3); 80037e8: 2003 movs r0, #3 80037ea: f001 fd0f bl 800520c 80037ee: 4603 mov r3, r0 80037f0: e03b b.n 800386a break; //0x220 case EDCAN_REG_MAX_LOAD ... (EDCAN_REG_MAX_LOAD+sizeof(GBT_CML_t)): return ((uint8_t*)&GBT_MaxLoad)[addr - EDCAN_REG_MAX_LOAD]; 80037f2: 88fb ldrh r3, [r7, #6] 80037f4: f5a3 7308 sub.w r3, r3, #544 @ 0x220 80037f8: 4a1e ldr r2, [pc, #120] @ (8003874 ) 80037fa: 4413 add r3, r2 80037fc: 781b ldrb r3, [r3, #0] 80037fe: e034 b.n 800386a //0x310 case EDCAN_REG_BRM ... (EDCAN_REG_BRM+sizeof(GBT_BRM_t)-1): return ((uint8_t*)&GBT_EVInfo)[addr - EDCAN_REG_BRM]; 8003800: 88fb ldrh r3, [r7, #6] 8003802: f5a3 7344 sub.w r3, r3, #784 @ 0x310 8003806: 4a1c ldr r2, [pc, #112] @ (8003878 ) 8003808: 4413 add r3, r2 800380a: 781b ldrb r3, [r3, #0] 800380c: e02d b.n 800386a //0x340 case EDCAN_REG_BCP ... (EDCAN_REG_BCP+sizeof(GBT_BCP_t)): return ((uint8_t*)&GBT_BATStat)[addr - EDCAN_REG_BCP]; 800380e: 88fb ldrh r3, [r7, #6] 8003810: f5a3 7354 sub.w r3, r3, #848 @ 0x350 8003814: 4a19 ldr r2, [pc, #100] @ (800387c ) 8003816: 4413 add r3, r2 8003818: 781b ldrb r3, [r3, #0] 800381a: e026 b.n 800386a //0x34F case EDCAN_REG_BRO: return GBT_BRO; 800381c: 4b18 ldr r3, [pc, #96] @ (8003880 ) 800381e: 781b ldrb r3, [r3, #0] 8003820: e023 b.n 800386a //0x350 case EDCAN_REG_BCL ... (EDCAN_REG_BCL+sizeof(GBT_BCL_t)): return ((uint8_t*)&GBT_ReqPower)[addr - EDCAN_REG_BCL]; 8003822: 88fb ldrh r3, [r7, #6] 8003824: f5a3 7358 sub.w r3, r3, #864 @ 0x360 8003828: 4a16 ldr r2, [pc, #88] @ (8003884 ) 800382a: 4413 add r3, r2 800382c: 781b ldrb r3, [r3, #0] 800382e: e01c b.n 800386a //0x360 case EDCAN_REG_BCS ... (EDCAN_REG_BCS+sizeof(GBT_BCS_t)): return ((uint8_t*)&GBT_ChargingStatus)[addr - EDCAN_REG_BCS]; 8003830: 88fb ldrh r3, [r7, #6] 8003832: f5a3 735c sub.w r3, r3, #880 @ 0x370 8003836: 4a14 ldr r2, [pc, #80] @ (8003888 ) 8003838: 4413 add r3, r2 800383a: 781b ldrb r3, [r3, #0] 800383c: e015 b.n 800386a //0x370 case EDCAN_REG_BSM ... (EDCAN_REG_BSM+sizeof(GBT_BSM_t)): return ((uint8_t*)&GBT_BatteryStatus)[addr - EDCAN_REG_BSM]; 800383e: 88fb ldrh r3, [r7, #6] 8003840: f5a3 7360 sub.w r3, r3, #896 @ 0x380 8003844: 4a11 ldr r2, [pc, #68] @ (800388c ) 8003846: 4413 add r3, r2 8003848: 781b ldrb r3, [r3, #0] 800384a: e00e b.n 800386a //0x500 case EDCAN_REG_OUTPUT ... (EDCAN_REG_OUTPUT+sizeof(GBT_EDCAN_Output_t)): return ((uint8_t*)&GBT_EDCAN_Output)[addr - EDCAN_REG_OUTPUT]; 800384c: 88fb ldrh r3, [r7, #6] 800384e: f5a3 63a0 sub.w r3, r3, #1280 @ 0x500 8003852: 4a0f ldr r2, [pc, #60] @ (8003890 ) 8003854: 4413 add r3, r2 8003856: 781b ldrb r3, [r3, #0] 8003858: e007 b.n 800386a //0x580 case EDCAN_REG_INPUT ... (EDCAN_REG_INPUT+sizeof(GBT_EDCAN_Input_t)): return ((uint8_t*)&GBT_EDCAN_Input)[addr - EDCAN_REG_INPUT]; 800385a: 88fb ldrh r3, [r7, #6] 800385c: f5a3 63b0 sub.w r3, r3, #1408 @ 0x580 8003860: 4a0c ldr r2, [pc, #48] @ (8003894 ) 8003862: 4413 add r3, r2 8003864: 781b ldrb r3, [r3, #0] 8003866: e000 b.n 800386a default: return 0x00; 8003868: 2300 movs r3, #0 } } 800386a: 4618 mov r0, r3 800386c: 3708 adds r7, #8 800386e: 46bd mov sp, r7 8003870: bd80 pop {r7, pc} 8003872: bf00 nop 8003874: 200002f4 .word 0x200002f4 8003878: 20000308 .word 0x20000308 800387c: 2000033c .word 0x2000033c 8003880: 20000380 .word 0x20000380 8003884: 2000034c .word 0x2000034c 8003888: 2000035c .word 0x2000035c 800388c: 20000368 .word 0x20000368 8003890: 200004a4 .word 0x200004a4 8003894: 200004b4 .word 0x200004b4 08003898 : // GB/T Time Synchronization Packet #include "main.h" #include "soft_rtc.h" #include "charger_gbt.h" void GBT_SendCTS(){ 8003898: b580 push {r7, lr} 800389a: b082 sub sp, #8 800389c: af00 add r7, sp, #0 uint8_t data[7]; unix_to_bcd(get_Current_Time(), data); 800389e: f001 fbe5 bl 800506c 80038a2: 4602 mov r2, r0 80038a4: 463b mov r3, r7 80038a6: 4619 mov r1, r3 80038a8: 4610 mov r0, r2 80038aa: f001 fc1b bl 80050e4 // data[3] = 0x05; //days // data[4] = 0x05; //month // data[5] = 0x24; //years // data[6] = 0x20; //centuries J_SendPacket(0x000700, 6, 7, data); 80038ae: 463b mov r3, r7 80038b0: 2207 movs r2, #7 80038b2: 2106 movs r1, #6 80038b4: f44f 60e0 mov.w r0, #1792 @ 0x700 80038b8: f000 fb06 bl 8003ec8 } 80038bc: bf00 nop 80038be: 3708 adds r7, #8 80038c0: 46bd mov sp, r7 80038c2: bd80 pop {r7, pc} 080038c4 : //GB/T Max Load Packet void GBT_SendCML(){ 80038c4: b580 push {r7, lr} 80038c6: af00 add r7, sp, #0 // data[4] = 0xC4; //-150A maximum output current // data[5] = 0x09; // // data[6] = 0x8C; //-2A minimum output current // data[7] = 0x0F; // J_SendPacket(0x000800, 6, 8, (uint8_t*)&GBT_MaxLoad); 80038c8: 4b04 ldr r3, [pc, #16] @ (80038dc ) 80038ca: 2208 movs r2, #8 80038cc: 2106 movs r1, #6 80038ce: f44f 6000 mov.w r0, #2048 @ 0x800 80038d2: f000 faf9 bl 8003ec8 } 80038d6: bf00 nop 80038d8: bd80 pop {r7, pc} 80038da: bf00 nop 80038dc: 200002f4 .word 0x200002f4 080038e0 : //GB/T Version packet void GBT_SendCHM(){ 80038e0: b580 push {r7, lr} 80038e2: b082 sub sp, #8 80038e4: af00 add r7, sp, #0 uint8_t data[3]; data[0] = 0x01; 80038e6: 2301 movs r3, #1 80038e8: 713b strb r3, [r7, #4] data[1] = 0x01; 80038ea: 2301 movs r3, #1 80038ec: 717b strb r3, [r7, #5] data[2] = 0x00; 80038ee: 2300 movs r3, #0 80038f0: 71bb strb r3, [r7, #6] J_SendPacket(0x2600, 6, 3, data); 80038f2: 1d3b adds r3, r7, #4 80038f4: 2203 movs r2, #3 80038f6: 2106 movs r1, #6 80038f8: f44f 5018 mov.w r0, #9728 @ 0x2600 80038fc: f000 fae4 bl 8003ec8 } 8003900: bf00 nop 8003902: 3708 adds r7, #8 8003904: 46bd mov sp, r7 8003906: bd80 pop {r7, pc} 08003908 : //GB/T CRM Packet (state=BMS identified) void GBT_SendCRM(uint8_t state){ 8003908: b580 push {r7, lr} 800390a: b082 sub sp, #8 800390c: af00 add r7, sp, #0 800390e: 4603 mov r3, r0 8003910: 71fb strb r3, [r7, #7] // data[3] = 0x01; // data[4] = 0x00; // data[5] = 0x42; //TODO: location BFG // data[6] = 0x46; // data[7] = 0x47; GBT_ChargerInfo.bmsIdentified = state; 8003912: 4a07 ldr r2, [pc, #28] @ (8003930 ) 8003914: 79fb ldrb r3, [r7, #7] 8003916: 7013 strb r3, [r2, #0] J_SendPacket(0x100, 6, 8, (uint8_t *)&GBT_ChargerInfo); 8003918: 4b05 ldr r3, [pc, #20] @ (8003930 ) 800391a: 2208 movs r2, #8 800391c: 2106 movs r1, #6 800391e: f44f 7080 mov.w r0, #256 @ 0x100 8003922: f000 fad1 bl 8003ec8 } 8003926: bf00 nop 8003928: 3708 adds r7, #8 800392a: 46bd mov sp, r7 800392c: bd80 pop {r7, pc} 800392e: bf00 nop 8003930: 200002fc .word 0x200002fc 08003934 : //GB/T CRO packet (Charger ready) void GBT_SendCRO(uint8_t state){ 8003934: b580 push {r7, lr} 8003936: b084 sub sp, #16 8003938: af00 add r7, sp, #0 800393a: 4603 mov r3, r0 800393c: 71fb strb r3, [r7, #7] uint8_t data[1]; data[0] = state; 800393e: 79fb ldrb r3, [r7, #7] 8003940: 733b strb r3, [r7, #12] J_SendPacket(0xA00, 4, 1, data); 8003942: f107 030c add.w r3, r7, #12 8003946: 2201 movs r2, #1 8003948: 2104 movs r1, #4 800394a: f44f 6020 mov.w r0, #2560 @ 0xa00 800394e: f000 fabb bl 8003ec8 } 8003952: bf00 nop 8003954: 3710 adds r7, #16 8003956: 46bd mov sp, r7 8003958: bd80 pop {r7, pc} ... 0800395c : //GB/T CCS packet (Charger current status) void GBT_SendCCS(){ 800395c: b580 push {r7, lr} 800395e: af00 add r7, sp, #0 // data[3] = GBT_CurrPower.requestedCurrent>>8; //TODO: current // data[4] = GBT_StateTick()/60000; //charging time (min) // data[5] = 0; //TODO: 255 min+ // data[6] = 0b11111101; //charging not permitted // data[7] = 0xFF; J_SendPacket(0x1200, 6, 8, (uint8_t *)&GBT_ChargerCurrentStatus); 8003960: 4b04 ldr r3, [pc, #16] @ (8003974 ) 8003962: 2208 movs r2, #8 8003964: 2106 movs r1, #6 8003966: f44f 5090 mov.w r0, #4608 @ 0x1200 800396a: f000 faad bl 8003ec8 } 800396e: bf00 nop 8003970: bd80 pop {r7, pc} 8003972: bf00 nop 8003974: 20000370 .word 0x20000370 08003978 : // GB/T Charging Stop packet void GBT_SendCST(uint32_t Cause){ 8003978: b580 push {r7, lr} 800397a: b084 sub sp, #16 800397c: af00 add r7, sp, #0 800397e: 6078 str r0, [r7, #4] uint8_t data[8]; data[0] = (Cause>>24) & 0xFF; // Error 8003980: 687b ldr r3, [r7, #4] 8003982: 0e1b lsrs r3, r3, #24 8003984: b2db uxtb r3, r3 8003986: 723b strb r3, [r7, #8] data[1] = (Cause>>16) & 0xFF; // 8003988: 687b ldr r3, [r7, #4] 800398a: 0c1b lsrs r3, r3, #16 800398c: b2db uxtb r3, r3 800398e: 727b strb r3, [r7, #9] data[2] = (Cause>>8) & 0xFF; // 8003990: 687b ldr r3, [r7, #4] 8003992: 0a1b lsrs r3, r3, #8 8003994: b2db uxtb r3, r3 8003996: 72bb strb r3, [r7, #10] data[3] = Cause & 0xFF; // 8003998: 687b ldr r3, [r7, #4] 800399a: b2db uxtb r3, r3 800399c: 72fb strb r3, [r7, #11] J_SendPacket(0x1A00, 4, 4, data); 800399e: f107 0308 add.w r3, r7, #8 80039a2: 2204 movs r2, #4 80039a4: 2104 movs r1, #4 80039a6: f44f 50d0 mov.w r0, #6656 @ 0x1a00 80039aa: f000 fa8d bl 8003ec8 } 80039ae: bf00 nop 80039b0: 3710 adds r7, #16 80039b2: 46bd mov sp, r7 80039b4: bd80 pop {r7, pc} ... 080039b8 : void GBT_SendCSD(){ 80039b8: b580 push {r7, lr} 80039ba: af00 add r7, sp, #0 GBT_ChargerStop.chargerNumber = GBT_ChargerInfo.chargerNumber; 80039bc: 4b0b ldr r3, [pc, #44] @ (80039ec ) 80039be: f8d3 3001 ldr.w r3, [r3, #1] 80039c2: 4a0b ldr r2, [pc, #44] @ (80039f0 ) 80039c4: 6053 str r3, [r2, #4] GBT_ChargerStop.outputEnergy = 0; //TODO Energy meters 80039c6: 4b0a ldr r3, [pc, #40] @ (80039f0 ) 80039c8: 2200 movs r2, #0 80039ca: 709a strb r2, [r3, #2] 80039cc: 2200 movs r2, #0 80039ce: 70da strb r2, [r3, #3] GBT_ChargerStop.chargingTime = GBT_ChargerCurrentStatus.chargingTime; 80039d0: 4b08 ldr r3, [pc, #32] @ (80039f4 ) 80039d2: 889b ldrh r3, [r3, #4] 80039d4: b29a uxth r2, r3 80039d6: 4b06 ldr r3, [pc, #24] @ (80039f0 ) 80039d8: 801a strh r2, [r3, #0] J_SendPacket(0x1D00, 6, 7, (uint8_t *)&GBT_ChargerStop); 80039da: 4b05 ldr r3, [pc, #20] @ (80039f0 ) 80039dc: 2207 movs r2, #7 80039de: 2106 movs r1, #6 80039e0: f44f 50e8 mov.w r0, #7424 @ 0x1d00 80039e4: f000 fa70 bl 8003ec8 } 80039e8: bf00 nop 80039ea: bd80 pop {r7, pc} 80039ec: 200002fc .word 0x200002fc 80039f0: 20000378 .word 0x20000378 80039f4: 20000370 .word 0x20000370 080039f8 : void GBT_SendCEM(uint32_t ErrorCode){ 80039f8: b580 push {r7, lr} 80039fa: b084 sub sp, #16 80039fc: af00 add r7, sp, #0 80039fe: 6078 str r0, [r7, #4] uint8_t data[8]; data[0] = (ErrorCode>>24) & 0xFF; // Error 8003a00: 687b ldr r3, [r7, #4] 8003a02: 0e1b lsrs r3, r3, #24 8003a04: b2db uxtb r3, r3 8003a06: 723b strb r3, [r7, #8] data[1] = (ErrorCode>>16) & 0xFF; // 8003a08: 687b ldr r3, [r7, #4] 8003a0a: 0c1b lsrs r3, r3, #16 8003a0c: b2db uxtb r3, r3 8003a0e: 727b strb r3, [r7, #9] data[2] = (ErrorCode>>8) & 0xFF; // 8003a10: 687b ldr r3, [r7, #4] 8003a12: 0a1b lsrs r3, r3, #8 8003a14: b2db uxtb r3, r3 8003a16: 72bb strb r3, [r7, #10] data[3] = ErrorCode & 0xFF; // 8003a18: 687b ldr r3, [r7, #4] 8003a1a: b2db uxtb r3, r3 8003a1c: 72fb strb r3, [r7, #11] J_SendPacket(0x1F00, 4, 4, data); 8003a1e: f107 0308 add.w r3, r7, #8 8003a22: 2204 movs r2, #4 8003a24: 2104 movs r1, #4 8003a26: f44f 50f8 mov.w r0, #7936 @ 0x1f00 8003a2a: f000 fa4d bl 8003ec8 } 8003a2e: bf00 nop 8003a30: 3710 adds r7, #16 8003a32: 46bd mov sp, r7 8003a34: bd80 pop {r7, pc} ... 08003a38 : * Output * EVENT_OUT * EXTI */ void MX_GPIO_Init(void) { 8003a38: b580 push {r7, lr} 8003a3a: b08a sub sp, #40 @ 0x28 8003a3c: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003a3e: f107 0318 add.w r3, r7, #24 8003a42: 2200 movs r2, #0 8003a44: 601a str r2, [r3, #0] 8003a46: 605a str r2, [r3, #4] 8003a48: 609a str r2, [r3, #8] 8003a4a: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8003a4c: 4b53 ldr r3, [pc, #332] @ (8003b9c ) 8003a4e: 699b ldr r3, [r3, #24] 8003a50: 4a52 ldr r2, [pc, #328] @ (8003b9c ) 8003a52: f043 0310 orr.w r3, r3, #16 8003a56: 6193 str r3, [r2, #24] 8003a58: 4b50 ldr r3, [pc, #320] @ (8003b9c ) 8003a5a: 699b ldr r3, [r3, #24] 8003a5c: f003 0310 and.w r3, r3, #16 8003a60: 617b str r3, [r7, #20] 8003a62: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 8003a64: 4b4d ldr r3, [pc, #308] @ (8003b9c ) 8003a66: 699b ldr r3, [r3, #24] 8003a68: 4a4c ldr r2, [pc, #304] @ (8003b9c ) 8003a6a: f043 0304 orr.w r3, r3, #4 8003a6e: 6193 str r3, [r2, #24] 8003a70: 4b4a ldr r3, [pc, #296] @ (8003b9c ) 8003a72: 699b ldr r3, [r3, #24] 8003a74: f003 0304 and.w r3, r3, #4 8003a78: 613b str r3, [r7, #16] 8003a7a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8003a7c: 4b47 ldr r3, [pc, #284] @ (8003b9c ) 8003a7e: 699b ldr r3, [r3, #24] 8003a80: 4a46 ldr r2, [pc, #280] @ (8003b9c ) 8003a82: f043 0308 orr.w r3, r3, #8 8003a86: 6193 str r3, [r2, #24] 8003a88: 4b44 ldr r3, [pc, #272] @ (8003b9c ) 8003a8a: 699b ldr r3, [r3, #24] 8003a8c: f003 0308 and.w r3, r3, #8 8003a90: 60fb str r3, [r7, #12] 8003a92: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOE_CLK_ENABLE(); 8003a94: 4b41 ldr r3, [pc, #260] @ (8003b9c ) 8003a96: 699b ldr r3, [r3, #24] 8003a98: 4a40 ldr r2, [pc, #256] @ (8003b9c ) 8003a9a: f043 0340 orr.w r3, r3, #64 @ 0x40 8003a9e: 6193 str r3, [r2, #24] 8003aa0: 4b3e ldr r3, [pc, #248] @ (8003b9c ) 8003aa2: 699b ldr r3, [r3, #24] 8003aa4: f003 0340 and.w r3, r3, #64 @ 0x40 8003aa8: 60bb str r3, [r7, #8] 8003aaa: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOD_CLK_ENABLE(); 8003aac: 4b3b ldr r3, [pc, #236] @ (8003b9c ) 8003aae: 699b ldr r3, [r3, #24] 8003ab0: 4a3a ldr r2, [pc, #232] @ (8003b9c ) 8003ab2: f043 0320 orr.w r3, r3, #32 8003ab6: 6193 str r3, [r2, #24] 8003ab8: 4b38 ldr r3, [pc, #224] @ (8003b9c ) 8003aba: 699b ldr r3, [r3, #24] 8003abc: f003 0320 and.w r3, r3, #32 8003ac0: 607b str r3, [r7, #4] 8003ac2: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, LOCK_A_Pin|LOCK_B_Pin, GPIO_PIN_RESET); 8003ac4: 2200 movs r2, #0 8003ac6: 2130 movs r1, #48 @ 0x30 8003ac8: 4835 ldr r0, [pc, #212] @ (8003ba0 ) 8003aca: f003 fe7c bl 80077c6 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, GPIO_PIN_RESET); 8003ace: 2200 movs r2, #0 8003ad0: f44f 4100 mov.w r1, #32768 @ 0x8000 8003ad4: 4833 ldr r0, [pc, #204] @ (8003ba4 ) 8003ad6: f003 fe76 bl 80077c6 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 8003ada: 2200 movs r2, #0 8003adc: 2110 movs r1, #16 8003ade: 4832 ldr r0, [pc, #200] @ (8003ba8 ) 8003ae0: f003 fe71 bl 80077c6 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RELAY_AUX_GPIO_Port, RELAY_AUX_Pin, GPIO_PIN_RESET); 8003ae4: 2200 movs r2, #0 8003ae6: 2110 movs r1, #16 8003ae8: 4830 ldr r0, [pc, #192] @ (8003bac ) 8003aea: f003 fe6c bl 80077c6 /*Configure GPIO pins : PCPin PCPin */ GPIO_InitStruct.Pin = LOCK_A_Pin|LOCK_B_Pin; 8003aee: 2330 movs r3, #48 @ 0x30 8003af0: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8003af2: 2301 movs r3, #1 8003af4: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003af6: 2300 movs r3, #0 8003af8: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003afa: 2302 movs r3, #2 8003afc: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8003afe: f107 0318 add.w r3, r7, #24 8003b02: 4619 mov r1, r3 8003b04: 4826 ldr r0, [pc, #152] @ (8003ba0 ) 8003b06: f003 fcc3 bl 8007490 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = LOCK_FB_Pin; 8003b0a: f44f 7300 mov.w r3, #512 @ 0x200 8003b0e: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8003b10: 2300 movs r3, #0 8003b12: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003b14: 2300 movs r3, #0 8003b16: 623b str r3, [r7, #32] HAL_GPIO_Init(LOCK_FB_GPIO_Port, &GPIO_InitStruct); 8003b18: f107 0318 add.w r3, r7, #24 8003b1c: 4619 mov r1, r3 8003b1e: 4821 ldr r0, [pc, #132] @ (8003ba4 ) 8003b20: f003 fcb6 bl 8007490 /*Configure GPIO pins : PEPin PEPin */ GPIO_InitStruct.Pin = ADDR_0_Pin|ADDR_1_Pin; 8003b24: f44f 6340 mov.w r3, #3072 @ 0xc00 8003b28: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8003b2a: 2300 movs r3, #0 8003b2c: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 8003b2e: 2301 movs r3, #1 8003b30: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8003b32: f107 0318 add.w r3, r7, #24 8003b36: 4619 mov r1, r3 8003b38: 481a ldr r0, [pc, #104] @ (8003ba4 ) 8003b3a: f003 fca9 bl 8007490 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = RELAY_CC_Pin; 8003b3e: f44f 4300 mov.w r3, #32768 @ 0x8000 8003b42: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8003b44: 2301 movs r3, #1 8003b46: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003b48: 2300 movs r3, #0 8003b4a: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003b4c: 2302 movs r3, #2 8003b4e: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(RELAY_CC_GPIO_Port, &GPIO_InitStruct); 8003b50: f107 0318 add.w r3, r7, #24 8003b54: 4619 mov r1, r3 8003b56: 4813 ldr r0, [pc, #76] @ (8003ba4 ) 8003b58: f003 fc9a bl 8007490 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = USART2_DIR_Pin; 8003b5c: 2310 movs r3, #16 8003b5e: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8003b60: 2301 movs r3, #1 8003b62: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003b64: 2300 movs r3, #0 8003b66: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003b68: 2302 movs r3, #2 8003b6a: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(USART2_DIR_GPIO_Port, &GPIO_InitStruct); 8003b6c: f107 0318 add.w r3, r7, #24 8003b70: 4619 mov r1, r3 8003b72: 480d ldr r0, [pc, #52] @ (8003ba8 ) 8003b74: f003 fc8c bl 8007490 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = RELAY_AUX_Pin; 8003b78: 2310 movs r3, #16 8003b7a: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8003b7c: 2301 movs r3, #1 8003b7e: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003b80: 2300 movs r3, #0 8003b82: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003b84: 2302 movs r3, #2 8003b86: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(RELAY_AUX_GPIO_Port, &GPIO_InitStruct); 8003b88: f107 0318 add.w r3, r7, #24 8003b8c: 4619 mov r1, r3 8003b8e: 4807 ldr r0, [pc, #28] @ (8003bac ) 8003b90: f003 fc7e bl 8007490 } 8003b94: bf00 nop 8003b96: 3728 adds r7, #40 @ 0x28 8003b98: 46bd mov sp, r7 8003b9a: bd80 pop {r7, pc} 8003b9c: 40021000 .word 0x40021000 8003ba0: 40011000 .word 0x40011000 8003ba4: 40011800 .word 0x40011800 8003ba8: 40011400 .word 0x40011400 8003bac: 40010c00 .word 0x40010c00 08003bb0 : extern GBT_BCL_t GBT_CurrPower; j_receive_t j_rx; void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) { 8003bb0: b590 push {r4, r7, lr} 8003bb2: b0cd sub sp, #308 @ 0x134 8003bb4: af40 add r7, sp, #256 @ 0x100 8003bb6: 6078 str r0, [r7, #4] CAN_RxHeaderTypeDef RxHeader; uint8_t RxData[8] = {0,}; 8003bb8: 2300 movs r3, #0 8003bba: 60fb str r3, [r7, #12] 8003bbc: 2300 movs r3, #0 8003bbe: 613b str r3, [r7, #16] if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &RxHeader, RxData) == HAL_OK) 8003bc0: f107 030c add.w r3, r7, #12 8003bc4: f107 0214 add.w r2, r7, #20 8003bc8: 2100 movs r1, #0 8003bca: 6878 ldr r0, [r7, #4] 8003bcc: f002 fedb bl 8006986 8003bd0: 4603 mov r3, r0 8003bd2: 2b00 cmp r3, #0 8003bd4: f040 8152 bne.w 8003e7c { if((RxHeader.ExtId & 0x00FFFF) == ((J_ID_SE << 8) | J_ID_EV)){ // SA, DA match 8003bd8: 69bb ldr r3, [r7, #24] 8003bda: b29b uxth r3, r3 8003bdc: f245 62f4 movw r2, #22260 @ 0x56f4 8003be0: 4293 cmp r3, r2 8003be2: f040 814b bne.w 8003e7c switch ((RxHeader.ExtId>>8) & 0x00FF00){ 8003be6: 69bb ldr r3, [r7, #24] 8003be8: 0a1b lsrs r3, r3, #8 8003bea: f403 437f and.w r3, r3, #65280 @ 0xff00 8003bee: f5b3 4f6c cmp.w r3, #60416 @ 0xec00 8003bf2: d013 beq.n 8003c1c 8003bf4: f5b3 4f6c cmp.w r3, #60416 @ 0xec00 8003bf8: f200 810b bhi.w 8003e12 8003bfc: f5b3 4f6b cmp.w r3, #60160 @ 0xeb00 8003c00: d056 beq.n 8003cb0 8003c02: f5b3 4f6b cmp.w r3, #60160 @ 0xeb00 8003c06: f200 8104 bhi.w 8003e12 8003c0a: f5b3 5fc8 cmp.w r3, #6400 @ 0x1900 8003c0e: f000 80dc beq.w 8003dca 8003c12: f5b3 5ff0 cmp.w r3, #7680 @ 0x1e00 8003c16: f000 80b5 beq.w 8003d84 8003c1a: e0fa b.n 8003e12 case 0xEC00: //PGN Connection Management Message if(RxData[0] == 16){ //Request to Send 8003c1c: 7b3b ldrb r3, [r7, #12] 8003c1e: 2b10 cmp r3, #16 8003c20: d13d bne.n 8003c9e /* Set the RTS values */ j_rx.size = RxData[1] | (RxData[2]<<8); 8003c22: 7b7b ldrb r3, [r7, #13] 8003c24: b21a sxth r2, r3 8003c26: 7bbb ldrb r3, [r7, #14] 8003c28: 021b lsls r3, r3, #8 8003c2a: b21b sxth r3, r3 8003c2c: 4313 orrs r3, r2 8003c2e: b21b sxth r3, r3 8003c30: b29a uxth r2, r3 8003c32: 4b94 ldr r3, [pc, #592] @ (8003e84 ) 8003c34: f8a3 2104 strh.w r2, [r3, #260] @ 0x104 j_rx.packet = 1; 8003c38: 4b92 ldr r3, [pc, #584] @ (8003e84 ) 8003c3a: 2201 movs r2, #1 8003c3c: f883 2107 strb.w r2, [r3, #263] @ 0x107 j_rx.packets = RxData[3]; 8003c40: 7bfa ldrb r2, [r7, #15] 8003c42: 4b90 ldr r3, [pc, #576] @ (8003e84 ) 8003c44: f883 2106 strb.w r2, [r3, #262] @ 0x106 j_rx.step = 2; //TODO 8003c48: 4b8e ldr r3, [pc, #568] @ (8003e84 ) 8003c4a: 2202 movs r2, #2 8003c4c: f883 2108 strb.w r2, [r3, #264] @ 0x108 j_rx.step_cts_remain = j_rx.step; 8003c50: 4b8c ldr r3, [pc, #560] @ (8003e84 ) 8003c52: f893 2108 ldrb.w r2, [r3, #264] @ 0x108 8003c56: 4b8b ldr r3, [pc, #556] @ (8003e84 ) 8003c58: f883 2109 strb.w r2, [r3, #265] @ 0x109 j_rx.PGN = (RxData[7] << 16) | (RxData[6] << 8) | RxData[5]; 8003c5c: 7cfb ldrb r3, [r7, #19] 8003c5e: 041a lsls r2, r3, #16 8003c60: 7cbb ldrb r3, [r7, #18] 8003c62: 021b lsls r3, r3, #8 8003c64: 4313 orrs r3, r2 8003c66: 7c7a ldrb r2, [r7, #17] 8003c68: 4313 orrs r3, r2 8003c6a: 461a mov r2, r3 8003c6c: 4b85 ldr r3, [pc, #532] @ (8003e84 ) 8003c6e: f8c3 2100 str.w r2, [r3, #256] @ 0x100 if(j_rx.size<256) { //TODO: valid check 8003c72: 4b84 ldr r3, [pc, #528] @ (8003e84 ) 8003c74: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 8003c78: 2bff cmp r3, #255 @ 0xff 8003c7a: d810 bhi.n 8003c9e J_SendCTS(j_rx); 8003c7c: 4c81 ldr r4, [pc, #516] @ (8003e84 ) 8003c7e: 4668 mov r0, sp 8003c80: f104 0310 add.w r3, r4, #16 8003c84: f44f 7280 mov.w r2, #256 @ 0x100 8003c88: 4619 mov r1, r3 8003c8a: f006 fef4 bl 800aa76 8003c8e: e894 000f ldmia.w r4, {r0, r1, r2, r3} 8003c92: f000 f941 bl 8003f18 j_rx.state = 1; 8003c96: 4b7b ldr r3, [pc, #492] @ (8003e84 ) 8003c98: 2201 movs r2, #1 8003c9a: f883 210a strb.w r2, [r3, #266] @ 0x10a } } if(RxData[0] == 255){ //Connection Abort 8003c9e: 7b3b ldrb r3, [r7, #12] 8003ca0: 2bff cmp r3, #255 @ 0xff 8003ca2: f040 80e6 bne.w 8003e72 j_rx.state = 0; 8003ca6: 4b77 ldr r3, [pc, #476] @ (8003e84 ) 8003ca8: 2200 movs r2, #0 8003caa: f883 210a strb.w r2, [r3, #266] @ 0x10a * 1CECF456 11 02 01 FF FF 00 02 00 * 1CEB56F4 01 01 01 00 03 46 05 40 * 1CEC56F4 FF FF FF FF FF 00 00 00 */ break; 8003cae: e0e0 b.n 8003e72 case 0xEB00: //PGN Data Message if(j_rx.state != 1) break; 8003cb0: 4b74 ldr r3, [pc, #464] @ (8003e84 ) 8003cb2: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8003cb6: 2b01 cmp r3, #1 8003cb8: f040 80dd bne.w 8003e76 if((RxData[0]>0) && (RxData[0]<35)){ //Array limit check 8003cbc: 7b3b ldrb r3, [r7, #12] 8003cbe: 2b00 cmp r3, #0 8003cc0: f000 80db beq.w 8003e7a 8003cc4: 7b3b ldrb r3, [r7, #12] 8003cc6: 2b22 cmp r3, #34 @ 0x22 8003cc8: f200 80d7 bhi.w 8003e7a if(j_rx.packet == RxData[0]){ //step check 8003ccc: 4b6d ldr r3, [pc, #436] @ (8003e84 ) 8003cce: f893 2107 ldrb.w r2, [r3, #263] @ 0x107 8003cd2: 7b3b ldrb r3, [r7, #12] 8003cd4: 429a cmp r2, r3 8003cd6: f040 80d0 bne.w 8003e7a memcpy (&j_rx.data[(RxData[0]-1)*7], &RxData[1],7); 8003cda: 7b3b ldrb r3, [r7, #12] 8003cdc: 1e5a subs r2, r3, #1 8003cde: 4613 mov r3, r2 8003ce0: 00db lsls r3, r3, #3 8003ce2: 1a9b subs r3, r3, r2 8003ce4: 4a67 ldr r2, [pc, #412] @ (8003e84 ) 8003ce6: 1898 adds r0, r3, r2 8003ce8: f107 030c add.w r3, r7, #12 8003cec: 3301 adds r3, #1 8003cee: 2207 movs r2, #7 8003cf0: 4619 mov r1, r3 8003cf2: f006 fec0 bl 800aa76 j_rx.packet++; 8003cf6: 4b63 ldr r3, [pc, #396] @ (8003e84 ) 8003cf8: f893 3107 ldrb.w r3, [r3, #263] @ 0x107 8003cfc: 3301 adds r3, #1 8003cfe: b2da uxtb r2, r3 8003d00: 4b60 ldr r3, [pc, #384] @ (8003e84 ) 8003d02: f883 2107 strb.w r2, [r3, #263] @ 0x107 if(j_rx.packet > j_rx.packets){ 8003d06: 4b5f ldr r3, [pc, #380] @ (8003e84 ) 8003d08: f893 2107 ldrb.w r2, [r3, #263] @ 0x107 8003d0c: 4b5d ldr r3, [pc, #372] @ (8003e84 ) 8003d0e: f893 3106 ldrb.w r3, [r3, #262] @ 0x106 8003d12: 429a cmp r2, r3 8003d14: d911 bls.n 8003d3a //End of transmission J_SendACK(j_rx); 8003d16: 4c5b ldr r4, [pc, #364] @ (8003e84 ) 8003d18: 4668 mov r0, sp 8003d1a: f104 0310 add.w r3, r4, #16 8003d1e: f44f 7280 mov.w r2, #256 @ 0x100 8003d22: 4619 mov r1, r3 8003d24: f006 fea7 bl 800aa76 8003d28: e894 000f ldmia.w r4, {r0, r1, r2, r3} 8003d2c: f000 f93a bl 8003fa4 j_rx.state = 2; 8003d30: 4b54 ldr r3, [pc, #336] @ (8003e84 ) 8003d32: 2202 movs r2, #2 8003d34: f883 210a strb.w r2, [r3, #266] @ 0x10a j_rx.step_cts_remain = 2; } } } } break; 8003d38: e09f b.n 8003e7a if(j_rx.step_cts_remain > 0) j_rx.step_cts_remain--; 8003d3a: 4b52 ldr r3, [pc, #328] @ (8003e84 ) 8003d3c: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 8003d40: 2b00 cmp r3, #0 8003d42: d007 beq.n 8003d54 8003d44: 4b4f ldr r3, [pc, #316] @ (8003e84 ) 8003d46: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 8003d4a: 3b01 subs r3, #1 8003d4c: b2da uxtb r2, r3 8003d4e: 4b4d ldr r3, [pc, #308] @ (8003e84 ) 8003d50: f883 2109 strb.w r2, [r3, #265] @ 0x109 if(j_rx.step_cts_remain == 0){ 8003d54: 4b4b ldr r3, [pc, #300] @ (8003e84 ) 8003d56: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 8003d5a: 2b00 cmp r3, #0 8003d5c: f040 808d bne.w 8003e7a J_SendCTS(j_rx); 8003d60: 4c48 ldr r4, [pc, #288] @ (8003e84 ) 8003d62: 4668 mov r0, sp 8003d64: f104 0310 add.w r3, r4, #16 8003d68: f44f 7280 mov.w r2, #256 @ 0x100 8003d6c: 4619 mov r1, r3 8003d6e: f006 fe82 bl 800aa76 8003d72: e894 000f ldmia.w r4, {r0, r1, r2, r3} 8003d76: f000 f8cf bl 8003f18 j_rx.step_cts_remain = 2; 8003d7a: 4b42 ldr r3, [pc, #264] @ (8003e84 ) 8003d7c: 2202 movs r2, #2 8003d7e: f883 2109 strb.w r2, [r3, #265] @ 0x109 break; 8003d82: e07a b.n 8003e7a case 0x1E00: //PGN BEM (ERROR) //Error force stop EDCAN_printf(LOG_WARN, "BEM Received, force stopping...\n"); 8003d84: 4940 ldr r1, [pc, #256] @ (8003e88 ) 8003d86: 2004 movs r0, #4 8003d88: f000 ffc2 bl 8004d10 EDCAN_printf(LOG_WARN, "BEM: %02X %02X %02X %02X", RxData[0], RxData[1], RxData[2], RxData[3]); 8003d8c: 7b3b ldrb r3, [r7, #12] 8003d8e: 4619 mov r1, r3 8003d90: 7b7b ldrb r3, [r7, #13] 8003d92: 4618 mov r0, r3 8003d94: 7bbb ldrb r3, [r7, #14] 8003d96: 7bfa ldrb r2, [r7, #15] 8003d98: 9201 str r2, [sp, #4] 8003d9a: 9300 str r3, [sp, #0] 8003d9c: 4603 mov r3, r0 8003d9e: 460a mov r2, r1 8003da0: 493a ldr r1, [pc, #232] @ (8003e8c ) 8003da2: 2004 movs r0, #4 8003da4: f000 ffb4 bl 8004d10 EDCAN_printf(LOG_WARN, " %02X %02X %02X %02X\n", RxData[4], RxData[5], RxData[6], RxData[7]); 8003da8: 7c3b ldrb r3, [r7, #16] 8003daa: 4619 mov r1, r3 8003dac: 7c7b ldrb r3, [r7, #17] 8003dae: 4618 mov r0, r3 8003db0: 7cbb ldrb r3, [r7, #18] 8003db2: 7cfa ldrb r2, [r7, #19] 8003db4: 9201 str r2, [sp, #4] 8003db6: 9300 str r3, [sp, #0] 8003db8: 4603 mov r3, r0 8003dba: 460a mov r2, r1 8003dbc: 4934 ldr r1, [pc, #208] @ (8003e90 ) 8003dbe: 2004 movs r0, #4 8003dc0: f000 ffa6 bl 8004d10 GBT_ForceStop(); 8003dc4: f7fe fd0c bl 80027e0 break; 8003dc8: e058 b.n 8003e7c case 0x1900: //PGN BST (STOP) //Normal stop EDCAN_printf(LOG_WARN, "BST Received, stopping...\n"); 8003dca: 4932 ldr r1, [pc, #200] @ (8003e94 ) 8003dcc: 2004 movs r0, #4 8003dce: f000 ff9f bl 8004d10 EDCAN_printf(LOG_WARN, "BST: %02X %02X %02X %02X", RxData[0], RxData[1], RxData[2], RxData[3]); 8003dd2: 7b3b ldrb r3, [r7, #12] 8003dd4: 4619 mov r1, r3 8003dd6: 7b7b ldrb r3, [r7, #13] 8003dd8: 4618 mov r0, r3 8003dda: 7bbb ldrb r3, [r7, #14] 8003ddc: 7bfa ldrb r2, [r7, #15] 8003dde: 9201 str r2, [sp, #4] 8003de0: 9300 str r3, [sp, #0] 8003de2: 4603 mov r3, r0 8003de4: 460a mov r2, r1 8003de6: 492c ldr r1, [pc, #176] @ (8003e98 ) 8003de8: 2004 movs r0, #4 8003dea: f000 ff91 bl 8004d10 EDCAN_printf(LOG_WARN, " %02X %02X %02X %02X\n", RxData[4], RxData[5], RxData[6], RxData[7]); 8003dee: 7c3b ldrb r3, [r7, #16] 8003df0: 4619 mov r1, r3 8003df2: 7c7b ldrb r3, [r7, #17] 8003df4: 4618 mov r0, r3 8003df6: 7cbb ldrb r3, [r7, #18] 8003df8: 7cfa ldrb r2, [r7, #19] 8003dfa: 9201 str r2, [sp, #4] 8003dfc: 9300 str r3, [sp, #0] 8003dfe: 4603 mov r3, r0 8003e00: 460a mov r2, r1 8003e02: 4923 ldr r1, [pc, #140] @ (8003e90 ) 8003e04: 2004 movs r0, #4 8003e06: f000 ff83 bl 8004d10 GBT_Stop(GBT_CST_BMS_ACTIVELY_SUSPENDS); 8003e0a: 4824 ldr r0, [pc, #144] @ (8003e9c ) 8003e0c: f7fe fcba bl 8002784 break; 8003e10: e034 b.n 8003e7c default: if(j_rx.state == 0){//TODO protections 8003e12: 4b1c ldr r3, [pc, #112] @ (8003e84 ) 8003e14: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8003e18: 2b00 cmp r3, #0 8003e1a: d12f bne.n 8003e7c //Short packet j_rx.size = RxHeader.DLC; 8003e1c: 6a7b ldr r3, [r7, #36] @ 0x24 8003e1e: b29a uxth r2, r3 8003e20: 4b18 ldr r3, [pc, #96] @ (8003e84 ) 8003e22: f8a3 2104 strh.w r2, [r3, #260] @ 0x104 j_rx.packet = 1; 8003e26: 4b17 ldr r3, [pc, #92] @ (8003e84 ) 8003e28: 2201 movs r2, #1 8003e2a: f883 2107 strb.w r2, [r3, #263] @ 0x107 j_rx.packets = 1; 8003e2e: 4b15 ldr r3, [pc, #84] @ (8003e84 ) 8003e30: 2201 movs r2, #1 8003e32: f883 2106 strb.w r2, [r3, #262] @ 0x106 j_rx.step = 1; 8003e36: 4b13 ldr r3, [pc, #76] @ (8003e84 ) 8003e38: 2201 movs r2, #1 8003e3a: f883 2108 strb.w r2, [r3, #264] @ 0x108 j_rx.step_cts_remain = 0; 8003e3e: 4b11 ldr r3, [pc, #68] @ (8003e84 ) 8003e40: 2200 movs r2, #0 8003e42: f883 2109 strb.w r2, [r3, #265] @ 0x109 j_rx.PGN = (RxHeader.ExtId>>8) & 0x00FF00; 8003e46: 69bb ldr r3, [r7, #24] 8003e48: 0a1b lsrs r3, r3, #8 8003e4a: f403 437f and.w r3, r3, #65280 @ 0xff00 8003e4e: 4a0d ldr r2, [pc, #52] @ (8003e84 ) 8003e50: f8c2 3100 str.w r3, [r2, #256] @ 0x100 j_rx.state = 2; 8003e54: 4b0b ldr r3, [pc, #44] @ (8003e84 ) 8003e56: 2202 movs r2, #2 8003e58: f883 210a strb.w r2, [r3, #266] @ 0x10a memcpy (j_rx.data, RxData, j_rx.size); 8003e5c: 4b09 ldr r3, [pc, #36] @ (8003e84 ) 8003e5e: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 8003e62: 461a mov r2, r3 8003e64: f107 030c add.w r3, r7, #12 8003e68: 4619 mov r1, r3 8003e6a: 4806 ldr r0, [pc, #24] @ (8003e84 ) 8003e6c: f006 fe03 bl 800aa76 } } } } } 8003e70: e004 b.n 8003e7c break; 8003e72: bf00 nop 8003e74: e002 b.n 8003e7c if(j_rx.state != 1) break; 8003e76: bf00 nop 8003e78: e000 b.n 8003e7c break; 8003e7a: bf00 nop } 8003e7c: bf00 nop 8003e7e: 3734 adds r7, #52 @ 0x34 8003e80: 46bd mov sp, r7 8003e82: bd90 pop {r4, r7, pc} 8003e84: 200004bc .word 0x200004bc 8003e88: 0800deac .word 0x0800deac 8003e8c: 0800ded0 .word 0x0800ded0 8003e90: 0800deec .word 0x0800deec 8003e94: 0800df04 .word 0x0800df04 8003e98: 0800df20 .word 0x0800df20 8003e9c: 4000f0f0 .word 0x4000f0f0 08003ea0 : void GBT_CAN_ReInit(){ 8003ea0: b580 push {r7, lr} 8003ea2: af00 add r7, sp, #0 HAL_CAN_Stop(&hcan1); 8003ea4: 4807 ldr r0, [pc, #28] @ (8003ec4 ) 8003ea6: f002 fc17 bl 80066d8 MX_CAN1_Init(); 8003eaa: f7fd fd2f bl 800190c HAL_CAN_Start(&hcan1); 8003eae: 4805 ldr r0, [pc, #20] @ (8003ec4 ) 8003eb0: f002 fbce bl 8006650 HAL_CAN_ActivateNotification(&hcan1, CAN_IT_RX_FIFO0_MSG_PENDING); 8003eb4: 2102 movs r1, #2 8003eb6: 4803 ldr r0, [pc, #12] @ (8003ec4 ) 8003eb8: f002 fe76 bl 8006ba8 GBT_CAN_FilterInit(); 8003ebc: f000 f8ac bl 8004018 } 8003ec0: bf00 nop 8003ec2: bd80 pop {r7, pc} 8003ec4: 20000288 .word 0x20000288 08003ec8 : void J_SendPacket(uint32_t PGN, uint8_t pri, uint8_t DLC, uint8_t *data){ 8003ec8: b580 push {r7, lr} 8003eca: b08c sub sp, #48 @ 0x30 8003ecc: af00 add r7, sp, #0 8003ece: 60f8 str r0, [r7, #12] 8003ed0: 607b str r3, [r7, #4] 8003ed2: 460b mov r3, r1 8003ed4: 72fb strb r3, [r7, #11] 8003ed6: 4613 mov r3, r2 8003ed8: 72bb strb r3, [r7, #10] CAN_TxHeaderTypeDef tx_header; uint32_t tx_mailbox; tx_header.ExtId = (pri << 26) | (PGN << 8) | (J_ID_EV << 8) | J_ID_SE; 8003eda: 7afb ldrb r3, [r7, #11] 8003edc: 069a lsls r2, r3, #26 8003ede: 68fb ldr r3, [r7, #12] 8003ee0: 021b lsls r3, r3, #8 8003ee2: 4313 orrs r3, r2 8003ee4: f443 4374 orr.w r3, r3, #62464 @ 0xf400 8003ee8: f043 0356 orr.w r3, r3, #86 @ 0x56 8003eec: 61fb str r3, [r7, #28] tx_header.RTR = CAN_RTR_DATA; 8003eee: 2300 movs r3, #0 8003ef0: 627b str r3, [r7, #36] @ 0x24 tx_header.IDE = CAN_ID_EXT; 8003ef2: 2304 movs r3, #4 8003ef4: 623b str r3, [r7, #32] tx_header.DLC = DLC; 8003ef6: 7abb ldrb r3, [r7, #10] 8003ef8: 62bb str r3, [r7, #40] @ 0x28 //TODO buffer wait HAL_CAN_AddTxMessage(&hcan1, &tx_header, data, &tx_mailbox); 8003efa: f107 0314 add.w r3, r7, #20 8003efe: f107 0118 add.w r1, r7, #24 8003f02: 687a ldr r2, [r7, #4] 8003f04: 4803 ldr r0, [pc, #12] @ (8003f14 ) 8003f06: f002 fc30 bl 800676a //HAL_Delay(2); } 8003f0a: bf00 nop 8003f0c: 3730 adds r7, #48 @ 0x30 8003f0e: 46bd mov sp, r7 8003f10: bd80 pop {r7, pc} 8003f12: bf00 nop 8003f14: 20000288 .word 0x20000288 08003f18 : //void J_SendPacketLong(){ // //TODO (no need) //} // J1939 sequence Clear To Send packet void J_SendCTS(j_receive_t rx){ 8003f18: b084 sub sp, #16 8003f1a: b580 push {r7, lr} 8003f1c: b082 sub sp, #8 8003f1e: af00 add r7, sp, #0 8003f20: f107 0c10 add.w ip, r7, #16 8003f24: e88c 000f stmia.w ip, {r0, r1, r2, r3} //if(rx.packets <= rx.packet) return; TODO uint8_t data[8]; data[0] = 17; //CONTROL_BYTE_TP_CM_CTS 8003f28: 2311 movs r3, #17 8003f2a: 703b strb r3, [r7, #0] data[1] = rx.step;//total_number_of_packages_transmitted 8003f2c: f897 3118 ldrb.w r3, [r7, #280] @ 0x118 8003f30: 707b strb r3, [r7, #1] if (rx.step > (rx.packets - rx.packet+1)) data[1] = rx.packets - rx.packet+1; 8003f32: f897 3118 ldrb.w r3, [r7, #280] @ 0x118 8003f36: 461a mov r2, r3 8003f38: f897 3116 ldrb.w r3, [r7, #278] @ 0x116 8003f3c: 4619 mov r1, r3 8003f3e: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 8003f42: 1acb subs r3, r1, r3 8003f44: 3301 adds r3, #1 8003f46: 429a cmp r2, r3 8003f48: dd08 ble.n 8003f5c 8003f4a: f897 2116 ldrb.w r2, [r7, #278] @ 0x116 8003f4e: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 8003f52: 1ad3 subs r3, r2, r3 8003f54: b2db uxtb r3, r3 8003f56: 3301 adds r3, #1 8003f58: b2db uxtb r3, r3 8003f5a: 707b strb r3, [r7, #1] data[2] = rx.packet;//next_packet_number_transmitted 8003f5c: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 8003f60: 70bb strb r3, [r7, #2] data[3] = 0xFF; /* Reserved */ 8003f62: 23ff movs r3, #255 @ 0xff 8003f64: 70fb strb r3, [r7, #3] data[4] = 0xFF; 8003f66: 23ff movs r3, #255 @ 0xff 8003f68: 713b strb r3, [r7, #4] data[5] = rx.PGN; 8003f6a: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 8003f6e: b2db uxtb r3, r3 8003f70: 717b strb r3, [r7, #5] data[6] = rx.PGN >> 8; 8003f72: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 8003f76: 0a1b lsrs r3, r3, #8 8003f78: b2db uxtb r3, r3 8003f7a: 71bb strb r3, [r7, #6] data[7] = rx.PGN >> 16; 8003f7c: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 8003f80: 0c1b lsrs r3, r3, #16 8003f82: b2db uxtb r3, r3 8003f84: 71fb strb r3, [r7, #7] J_SendPacket(0x00EC00, 7, 8, data); 8003f86: 463b mov r3, r7 8003f88: 2208 movs r2, #8 8003f8a: 2107 movs r1, #7 8003f8c: f44f 406c mov.w r0, #60416 @ 0xec00 8003f90: f7ff ff9a bl 8003ec8 } 8003f94: bf00 nop 8003f96: 3708 adds r7, #8 8003f98: 46bd mov sp, r7 8003f9a: e8bd 4080 ldmia.w sp!, {r7, lr} 8003f9e: b004 add sp, #16 8003fa0: 4770 bx lr ... 08003fa4 : // J1939 sequence ACK packet void J_SendACK(j_receive_t rx){//uint32_t PGN, uint8_t step, uint8_t packet){ 8003fa4: b084 sub sp, #16 8003fa6: b580 push {r7, lr} 8003fa8: b082 sub sp, #8 8003faa: af00 add r7, sp, #0 8003fac: f107 0c10 add.w ip, r7, #16 8003fb0: e88c 000f stmia.w ip, {r0, r1, r2, r3} uint8_t data[8]; data[0] = 19; //CONTROL_BYTE_TP_CM_ACK 8003fb4: 2313 movs r3, #19 8003fb6: 703b strb r3, [r7, #0] data[1] = j_rx.size; 8003fb8: 4b16 ldr r3, [pc, #88] @ (8004014 ) 8003fba: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 8003fbe: b2db uxtb r3, r3 8003fc0: 707b strb r3, [r7, #1] data[2] = j_rx.size>>8; 8003fc2: 4b14 ldr r3, [pc, #80] @ (8004014 ) 8003fc4: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 8003fc8: 0a1b lsrs r3, r3, #8 8003fca: b29b uxth r3, r3 8003fcc: b2db uxtb r3, r3 8003fce: 70bb strb r3, [r7, #2] data[3] = j_rx.packets; 8003fd0: 4b10 ldr r3, [pc, #64] @ (8004014 ) 8003fd2: f893 3106 ldrb.w r3, [r3, #262] @ 0x106 8003fd6: 70fb strb r3, [r7, #3] data[4] = 0xFF;//TODO 8003fd8: 23ff movs r3, #255 @ 0xff 8003fda: 713b strb r3, [r7, #4] data[5] = rx.PGN; 8003fdc: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 8003fe0: b2db uxtb r3, r3 8003fe2: 717b strb r3, [r7, #5] data[6] = rx.PGN >> 8; 8003fe4: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 8003fe8: 0a1b lsrs r3, r3, #8 8003fea: b2db uxtb r3, r3 8003fec: 71bb strb r3, [r7, #6] data[7] = rx.PGN >> 16; 8003fee: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 8003ff2: 0c1b lsrs r3, r3, #16 8003ff4: b2db uxtb r3, r3 8003ff6: 71fb strb r3, [r7, #7] J_SendPacket(0x00EC00, 7, 8, data); 8003ff8: 463b mov r3, r7 8003ffa: 2208 movs r2, #8 8003ffc: 2107 movs r1, #7 8003ffe: f44f 406c mov.w r0, #60416 @ 0xec00 8004002: f7ff ff61 bl 8003ec8 } 8004006: bf00 nop 8004008: 3708 adds r7, #8 800400a: 46bd mov sp, r7 800400c: e8bd 4080 ldmia.w sp!, {r7, lr} 8004010: b004 add sp, #16 8004012: 4770 bx lr 8004014: 200004bc .word 0x200004bc 08004018 : void GBT_CAN_FilterInit(){ 8004018: b580 push {r7, lr} 800401a: b08a sub sp, #40 @ 0x28 800401c: af00 add r7, sp, #0 CAN_FilterTypeDef sFilterConfig; sFilterConfig.FilterBank = 0; 800401e: 2300 movs r3, #0 8004020: 617b str r3, [r7, #20] sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; 8004022: 2300 movs r3, #0 8004024: 61bb str r3, [r7, #24] sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; 8004026: 2301 movs r3, #1 8004028: 61fb str r3, [r7, #28] sFilterConfig.FilterIdHigh = 0x0000; 800402a: 2300 movs r3, #0 800402c: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = 0x0000; 800402e: 2300 movs r3, #0 8004030: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 8004032: 2300 movs r3, #0 8004034: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = 0x0000; 8004036: 2300 movs r3, #0 8004038: 60fb str r3, [r7, #12] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0; 800403a: 2300 movs r3, #0 800403c: 613b str r3, [r7, #16] sFilterConfig.FilterActivation = ENABLE; 800403e: 2301 movs r3, #1 8004040: 623b str r3, [r7, #32] //sFilterConfig.SlaveStartFilterBank = 14; if(HAL_CAN_ConfigFilter(&hcan1, &sFilterConfig) != HAL_OK) 8004042: 463b mov r3, r7 8004044: 4619 mov r1, r3 8004046: 4806 ldr r0, [pc, #24] @ (8004060 ) 8004048: f002 fa22 bl 8006490 800404c: 4603 mov r3, r0 800404e: 2b00 cmp r3, #0 8004050: d001 beq.n 8004056 { Error_Handler(); 8004052: f000 ffc5 bl 8004fe0 } } 8004056: bf00 nop 8004058: 3728 adds r7, #40 @ 0x28 800405a: 46bd mov sp, r7 800405c: bd80 pop {r7, pc} 800405e: bf00 nop 8004060: 20000288 .word 0x20000288 08004064 : uint8_t LOCK_DELAY = 50; GBT_LockState_t GBT_LockState; void GBT_ForceLock(uint8_t state){ 8004064: b580 push {r7, lr} 8004066: b082 sub sp, #8 8004068: af00 add r7, sp, #0 800406a: 4603 mov r3, r0 800406c: 71fb strb r3, [r7, #7] if(LOCK_MOTOR_POLARITY){ 800406e: 4b26 ldr r3, [pc, #152] @ (8004108 ) 8004070: 781b ldrb r3, [r3, #0] 8004072: 2b00 cmp r3, #0 8004074: d022 beq.n 80040bc if(state){//LOCK 8004076: 79fb ldrb r3, [r7, #7] 8004078: 2b00 cmp r3, #0 800407a: d00f beq.n 800409c HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1); 800407c: 2201 movs r2, #1 800407e: 2120 movs r1, #32 8004080: 4822 ldr r0, [pc, #136] @ (800410c ) 8004082: f003 fba0 bl 80077c6 HAL_Delay(LOCK_DELAY); 8004086: 4b22 ldr r3, [pc, #136] @ (8004110 ) 8004088: 781b ldrb r3, [r3, #0] 800408a: 4618 mov r0, r3 800408c: f001 fbdc bl 8005848 HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0); 8004090: 2200 movs r2, #0 8004092: 2120 movs r1, #32 8004094: 481d ldr r0, [pc, #116] @ (800410c ) 8004096: f003 fb96 bl 80077c6 HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1); HAL_Delay(LOCK_DELAY); HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0); } } } 800409a: e031 b.n 8004100 HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1); 800409c: 2201 movs r2, #1 800409e: 2110 movs r1, #16 80040a0: 481a ldr r0, [pc, #104] @ (800410c ) 80040a2: f003 fb90 bl 80077c6 HAL_Delay(LOCK_DELAY); 80040a6: 4b1a ldr r3, [pc, #104] @ (8004110 ) 80040a8: 781b ldrb r3, [r3, #0] 80040aa: 4618 mov r0, r3 80040ac: f001 fbcc bl 8005848 HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0); 80040b0: 2200 movs r2, #0 80040b2: 2110 movs r1, #16 80040b4: 4815 ldr r0, [pc, #84] @ (800410c ) 80040b6: f003 fb86 bl 80077c6 } 80040ba: e021 b.n 8004100 if(state){//LOCK 80040bc: 79fb ldrb r3, [r7, #7] 80040be: 2b00 cmp r3, #0 80040c0: d00f beq.n 80040e2 HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1); 80040c2: 2201 movs r2, #1 80040c4: 2110 movs r1, #16 80040c6: 4811 ldr r0, [pc, #68] @ (800410c ) 80040c8: f003 fb7d bl 80077c6 HAL_Delay(LOCK_DELAY); 80040cc: 4b10 ldr r3, [pc, #64] @ (8004110 ) 80040ce: 781b ldrb r3, [r3, #0] 80040d0: 4618 mov r0, r3 80040d2: f001 fbb9 bl 8005848 HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0); 80040d6: 2200 movs r2, #0 80040d8: 2110 movs r1, #16 80040da: 480c ldr r0, [pc, #48] @ (800410c ) 80040dc: f003 fb73 bl 80077c6 } 80040e0: e00e b.n 8004100 HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1); 80040e2: 2201 movs r2, #1 80040e4: 2120 movs r1, #32 80040e6: 4809 ldr r0, [pc, #36] @ (800410c ) 80040e8: f003 fb6d bl 80077c6 HAL_Delay(LOCK_DELAY); 80040ec: 4b08 ldr r3, [pc, #32] @ (8004110 ) 80040ee: 781b ldrb r3, [r3, #0] 80040f0: 4618 mov r0, r3 80040f2: f001 fba9 bl 8005848 HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0); 80040f6: 2200 movs r2, #0 80040f8: 2120 movs r1, #32 80040fa: 4804 ldr r0, [pc, #16] @ (800410c ) 80040fc: f003 fb63 bl 80077c6 } 8004100: bf00 nop 8004102: 3708 adds r7, #8 8004104: 46bd mov sp, r7 8004106: bd80 pop {r7, pc} 8004108: 20000001 .word 0x20000001 800410c: 40011000 .word 0x40011000 8004110: 20000002 .word 0x20000002 08004114 : uint8_t GBT_LockGetState(){ 8004114: b580 push {r7, lr} 8004116: af00 add r7, sp, #0 //1 = locked //0 = unlocked if(LOCK_POLARITY){ 8004118: 4b0b ldr r3, [pc, #44] @ (8004148 ) 800411a: 781b ldrb r3, [r3, #0] 800411c: 2b00 cmp r3, #0 800411e: d006 beq.n 800412e return HAL_GPIO_ReadPin(LOCK_FB_GPIO_Port, LOCK_FB_Pin); 8004120: f44f 7100 mov.w r1, #512 @ 0x200 8004124: 4809 ldr r0, [pc, #36] @ (800414c ) 8004126: f003 fb37 bl 8007798 800412a: 4603 mov r3, r0 800412c: e00a b.n 8004144 }else{ return !HAL_GPIO_ReadPin(LOCK_FB_GPIO_Port, LOCK_FB_Pin); 800412e: f44f 7100 mov.w r1, #512 @ 0x200 8004132: 4806 ldr r0, [pc, #24] @ (800414c ) 8004134: f003 fb30 bl 8007798 8004138: 4603 mov r3, r0 800413a: 2b00 cmp r3, #0 800413c: bf0c ite eq 800413e: 2301 moveq r3, #1 8004140: 2300 movne r3, #0 8004142: b2db uxtb r3, r3 } } 8004144: 4618 mov r0, r3 8004146: bd80 pop {r7, pc} 8004148: 20000000 .word 0x20000000 800414c: 40011800 .word 0x40011800 08004150 : void GBT_Lock(uint8_t state){ 8004150: b480 push {r7} 8004152: b083 sub sp, #12 8004154: af00 add r7, sp, #0 8004156: 4603 mov r3, r0 8004158: 71fb strb r3, [r7, #7] GBT_LockState.demand = state; 800415a: 4a04 ldr r2, [pc, #16] @ (800416c ) 800415c: 79fb ldrb r3, [r7, #7] 800415e: 7013 strb r3, [r2, #0] } 8004160: bf00 nop 8004162: 370c adds r7, #12 8004164: 46bd mov sp, r7 8004166: bc80 pop {r7} 8004168: 4770 bx lr 800416a: bf00 nop 800416c: 200005cc .word 0x200005cc 08004170 : void GBT_ManageLock(){ 8004170: b580 push {r7, lr} 8004172: b082 sub sp, #8 8004174: af00 add r7, sp, #0 uint8_t MAX_RETRIES = 5; 8004176: 2305 movs r3, #5 8004178: 71bb strb r3, [r7, #6] if (GBT_LockState.error) { 800417a: 4b25 ldr r3, [pc, #148] @ (8004210 ) 800417c: 785b ldrb r3, [r3, #1] 800417e: 2b00 cmp r3, #0 8004180: d142 bne.n 8004208 return; } bool lock_is_open = GBT_LockGetState() == 0; 8004182: f7ff ffc7 bl 8004114 8004186: 4603 mov r3, r0 8004188: 2b00 cmp r3, #0 800418a: bf0c ite eq 800418c: 2301 moveq r3, #1 800418e: 2300 movne r3, #0 8004190: 717b strb r3, [r7, #5] bool lock_should_be_open = GBT_LockState.demand == 0; 8004192: 4b1f ldr r3, [pc, #124] @ (8004210 ) 8004194: 781b ldrb r3, [r3, #0] 8004196: 2b00 cmp r3, #0 8004198: bf0c ite eq 800419a: 2301 moveq r3, #1 800419c: 2300 movne r3, #0 800419e: 713b strb r3, [r7, #4] uint8_t retry_count = 0; 80041a0: 2300 movs r3, #0 80041a2: 71fb strb r3, [r7, #7] if (lock_is_open != lock_should_be_open) { 80041a4: 797a ldrb r2, [r7, #5] 80041a6: 793b ldrb r3, [r7, #4] 80041a8: 429a cmp r2, r3 80041aa: d02e beq.n 800420a while (retry_count < MAX_RETRIES) { 80041ac: e018 b.n 80041e0 if (lock_should_be_open) { 80041ae: 793b ldrb r3, [r7, #4] 80041b0: 2b00 cmp r3, #0 80041b2: d003 beq.n 80041bc GBT_ForceLock(0); 80041b4: 2000 movs r0, #0 80041b6: f7ff ff55 bl 8004064 80041ba: e002 b.n 80041c2 } else { GBT_ForceLock(1); 80041bc: 2001 movs r0, #1 80041be: f7ff ff51 bl 8004064 } lock_is_open = GBT_LockGetState() == 0; 80041c2: f7ff ffa7 bl 8004114 80041c6: 4603 mov r3, r0 80041c8: 2b00 cmp r3, #0 80041ca: bf0c ite eq 80041cc: 2301 moveq r3, #1 80041ce: 2300 movne r3, #0 80041d0: 717b strb r3, [r7, #5] if (lock_is_open == lock_should_be_open) { 80041d2: 797a ldrb r2, [r7, #5] 80041d4: 793b ldrb r3, [r7, #4] 80041d6: 429a cmp r2, r3 80041d8: d007 beq.n 80041ea break; } retry_count++; 80041da: 79fb ldrb r3, [r7, #7] 80041dc: 3301 adds r3, #1 80041de: 71fb strb r3, [r7, #7] while (retry_count < MAX_RETRIES) { 80041e0: 79fa ldrb r2, [r7, #7] 80041e2: 79bb ldrb r3, [r7, #6] 80041e4: 429a cmp r2, r3 80041e6: d3e2 bcc.n 80041ae 80041e8: e000 b.n 80041ec break; 80041ea: bf00 nop } if (retry_count >= MAX_RETRIES) { 80041ec: 79fa ldrb r2, [r7, #7] 80041ee: 79bb ldrb r3, [r7, #6] 80041f0: 429a cmp r2, r3 80041f2: d30a bcc.n 800420a GBT_LockState.error = 1; 80041f4: 4b06 ldr r3, [pc, #24] @ (8004210 ) 80041f6: 2201 movs r2, #1 80041f8: 705a strb r2, [r3, #1] GBT_ForceLock(0); 80041fa: 2000 movs r0, #0 80041fc: f7ff ff32 bl 8004064 printf ("Lock error\n"); 8004200: 4804 ldr r0, [pc, #16] @ (8004214 ) 8004202: f005 ff23 bl 800a04c 8004206: e000 b.n 800420a return; 8004208: bf00 nop } } } 800420a: 3708 adds r7, #8 800420c: 46bd mov sp, r7 800420e: bd80 pop {r7, pc} 8004210: 200005cc .word 0x200005cc 8004214: 0800df3c .word 0x0800df3c 08004218 <__NVIC_SystemReset>: { 8004218: b480 push {r7} 800421a: af00 add r7, sp, #0 __ASM volatile ("dsb 0xF":::"memory"); 800421c: f3bf 8f4f dsb sy } 8004220: bf00 nop (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8004222: 4b06 ldr r3, [pc, #24] @ (800423c <__NVIC_SystemReset+0x24>) 8004224: 68db ldr r3, [r3, #12] 8004226: f403 62e0 and.w r2, r3, #1792 @ 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800422a: 4904 ldr r1, [pc, #16] @ (800423c <__NVIC_SystemReset+0x24>) 800422c: 4b04 ldr r3, [pc, #16] @ (8004240 <__NVIC_SystemReset+0x28>) 800422e: 4313 orrs r3, r2 8004230: 60cb str r3, [r1, #12] __ASM volatile ("dsb 0xF":::"memory"); 8004232: f3bf 8f4f dsb sy } 8004236: bf00 nop __NOP(); 8004238: bf00 nop 800423a: e7fd b.n 8004238 <__NVIC_SystemReset+0x20> 800423c: e000ed00 .word 0xe000ed00 8004240: 05fa0004 .word 0x05fa0004 08004244 : /** * @brief CAN Interrupt Handler for EDCAN (CAN2) * */ void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan){ 8004244: b580 push {r7, lr} 8004246: b082 sub sp, #8 8004248: af00 add r7, sp, #0 800424a: 6078 str r0, [r7, #4] if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO1, &RxHeader, RxData) == HAL_OK) 800424c: 4b21 ldr r3, [pc, #132] @ (80042d4 ) 800424e: 4a22 ldr r2, [pc, #136] @ (80042d8 ) 8004250: 2101 movs r1, #1 8004252: 6878 ldr r0, [r7, #4] 8004254: f002 fb97 bl 8006986 8004258: 4603 mov r3, r0 800425a: 2b00 cmp r3, #0 800425c: d136 bne.n 80042cc { memcpy(&RxFrame.ExtID, &RxHeader.ExtId, sizeof(RxFrame.ExtID)); 800425e: 4b1e ldr r3, [pc, #120] @ (80042d8 ) 8004260: 685b ldr r3, [r3, #4] 8004262: 4a1e ldr r2, [pc, #120] @ (80042dc ) 8004264: 6013 str r3, [r2, #0] RxFrame.DLC = RxHeader.DLC; 8004266: 4b1c ldr r3, [pc, #112] @ (80042d8 ) 8004268: 691b ldr r3, [r3, #16] 800426a: b2da uxtb r2, r3 800426c: 4b1b ldr r3, [pc, #108] @ (80042dc ) 800426e: 731a strb r2, [r3, #12] memcpy(RxFrame.data, RxData, RxHeader.DLC); 8004270: 4b19 ldr r3, [pc, #100] @ (80042d8 ) 8004272: 691b ldr r3, [r3, #16] 8004274: 461a mov r2, r3 8004276: 4917 ldr r1, [pc, #92] @ (80042d4 ) 8004278: 4819 ldr r0, [pc, #100] @ (80042e0 ) 800427a: f006 fbfc bl 800aa76 if((RxFrame.ExtID.DestinationID == ED_OwnID) || (RxFrame.ExtID.DestinationID == 0xFF) || (RxFrame.ExtID.DestinationID == ED_SecondID)){ 800427e: 4b17 ldr r3, [pc, #92] @ (80042dc ) 8004280: 781a ldrb r2, [r3, #0] 8004282: 4b18 ldr r3, [pc, #96] @ (80042e4 ) 8004284: 781b ldrb r3, [r3, #0] 8004286: 429a cmp r2, r3 8004288: d009 beq.n 800429e 800428a: 4b14 ldr r3, [pc, #80] @ (80042dc ) 800428c: 781b ldrb r3, [r3, #0] 800428e: 2bff cmp r3, #255 @ 0xff 8004290: d005 beq.n 800429e 8004292: 4b12 ldr r3, [pc, #72] @ (80042dc ) 8004294: 781a ldrb r2, [r3, #0] 8004296: 4b14 ldr r3, [pc, #80] @ (80042e8 ) 8004298: 781b ldrb r3, [r3, #0] 800429a: 429a cmp r2, r3 800429c: d116 bne.n 80042cc //Мгновенная перезагрузка #ifndef EDCAN_RESET_REG if(RxFrame.ExtID.RegisterAddress == 0x26){ 800429e: 4b0f ldr r3, [pc, #60] @ (80042dc ) 80042a0: 885b ldrh r3, [r3, #2] 80042a2: f3c3 030a ubfx r3, r3, #0, #11 80042a6: b29b uxth r3, r3 80042a8: 2b26 cmp r3, #38 @ 0x26 80042aa: d105 bne.n 80042b8 if(RxFrame.data[0] == 0x66) NVIC_SystemReset(); 80042ac: 4b0b ldr r3, [pc, #44] @ (80042dc ) 80042ae: 791b ldrb r3, [r3, #4] 80042b0: 2b66 cmp r3, #102 @ 0x66 80042b2: d101 bne.n 80042b8 80042b4: f7ff ffb0 bl 8004218 <__NVIC_SystemReset> if(RxFrame.ExtID.RegisterAddress == EDCAN_RESET_REG){ if(RxFrame.data[0] == 0x66) NVIC_SystemReset(); } #endif //Выходим из Silent Mode сразу после получения любого пакета if(silentmode_enable) EDCAN_EnterSilentMode(0); 80042b8: 4b0c ldr r3, [pc, #48] @ (80042ec ) 80042ba: 681b ldr r3, [r3, #0] 80042bc: 2b00 cmp r3, #0 80042be: d002 beq.n 80042c6 80042c0: 2000 movs r0, #0 80042c2: f000 f999 bl 80045f8 EDCAN_RxBufferAdd (&RxFrame); 80042c6: 4805 ldr r0, [pc, #20] @ (80042dc ) 80042c8: f000 fb04 bl 80048d4 // EDCAN_ExchangeRxBuffer(); } } } 80042cc: bf00 nop 80042ce: 3708 adds r7, #8 80042d0: 46bd mov sp, r7 80042d2: bd80 pop {r7, pc} 80042d4: 200005d0 .word 0x200005d0 80042d8: 200005d8 .word 0x200005d8 80042dc: 200005f4 .word 0x200005f4 80042e0: 200005f8 .word 0x200005f8 80042e4: 200005ce .word 0x200005ce 80042e8: 20000003 .word 0x20000003 80042ec: 2000060c .word 0x2000060c 080042f0 : #endif void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan_){ 80042f0: b580 push {r7, lr} 80042f2: b082 sub sp, #8 80042f4: af00 add r7, sp, #0 80042f6: 6078 str r0, [r7, #4] if (hcan_->Instance == ED_CAN_INSTANCE.Instance){ 80042f8: 687b ldr r3, [r7, #4] 80042fa: 681a ldr r2, [r3, #0] 80042fc: 4b07 ldr r3, [pc, #28] @ (800431c ) 80042fe: 681b ldr r3, [r3, #0] 8004300: 429a cmp r2, r3 8004302: d107 bne.n 8004314 lasttxexchangetime = HAL_GetTick() + 1; 8004304: f001 fa96 bl 8005834 8004308: 4603 mov r3, r0 800430a: 3301 adds r3, #1 800430c: 4a04 ldr r2, [pc, #16] @ (8004320 ) 800430e: 6013 str r3, [r2, #0] EDCAN_ExchangeTxBuffer(); 8004310: f000 fa88 bl 8004824 } } 8004314: bf00 nop 8004316: 3708 adds r7, #8 8004318: 46bd mov sp, r7 800431a: bd80 pop {r7, pc} 800431c: 200002b0 .word 0x200002b0 8004320: 20000610 .word 0x20000610 08004324 : void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan_){ 8004324: b580 push {r7, lr} 8004326: b082 sub sp, #8 8004328: af00 add r7, sp, #0 800432a: 6078 str r0, [r7, #4] if (hcan_->Instance == ED_CAN_INSTANCE.Instance){ 800432c: 687b ldr r3, [r7, #4] 800432e: 681a ldr r2, [r3, #0] 8004330: 4b07 ldr r3, [pc, #28] @ (8004350 ) 8004332: 681b ldr r3, [r3, #0] 8004334: 429a cmp r2, r3 8004336: d107 bne.n 8004348 lasttxexchangetime = HAL_GetTick() + 1; 8004338: f001 fa7c bl 8005834 800433c: 4603 mov r3, r0 800433e: 3301 adds r3, #1 8004340: 4a04 ldr r2, [pc, #16] @ (8004354 ) 8004342: 6013 str r3, [r2, #0] EDCAN_ExchangeTxBuffer(); 8004344: f000 fa6e bl 8004824 } } 8004348: bf00 nop 800434a: 3708 adds r7, #8 800434c: 46bd mov sp, r7 800434e: bd80 pop {r7, pc} 8004350: 200002b0 .word 0x200002b0 8004354: 20000610 .word 0x20000610 08004358 : void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan_){ 8004358: b580 push {r7, lr} 800435a: b082 sub sp, #8 800435c: af00 add r7, sp, #0 800435e: 6078 str r0, [r7, #4] if (hcan_->Instance == ED_CAN_INSTANCE.Instance){ 8004360: 687b ldr r3, [r7, #4] 8004362: 681a ldr r2, [r3, #0] 8004364: 4b07 ldr r3, [pc, #28] @ (8004384 ) 8004366: 681b ldr r3, [r3, #0] 8004368: 429a cmp r2, r3 800436a: d107 bne.n 800437c lasttxexchangetime = HAL_GetTick() + 1; 800436c: f001 fa62 bl 8005834 8004370: 4603 mov r3, r0 8004372: 3301 adds r3, #1 8004374: 4a04 ldr r2, [pc, #16] @ (8004388 ) 8004376: 6013 str r3, [r2, #0] EDCAN_ExchangeTxBuffer(); 8004378: f000 fa54 bl 8004824 } } 800437c: bf00 nop 800437e: 3708 adds r7, #8 8004380: 46bd mov sp, r7 8004382: bd80 pop {r7, pc} 8004384: 200002b0 .word 0x200002b0 8004388: 20000610 .word 0x20000610 0800438c : /** * @brief EDCAN Initialization function * * @param _OwnID: EDCAN Device ID */ void EDCAN_Init(uint8_t _OwnID){ 800438c: b480 push {r7} 800438e: b083 sub sp, #12 8004390: af00 add r7, sp, #0 8004392: 4603 mov r3, r0 8004394: 71fb strb r3, [r7, #7] ED_OwnID = _OwnID; 8004396: 4a04 ldr r2, [pc, #16] @ (80043a8 ) 8004398: 79fb ldrb r3, [r7, #7] 800439a: 7013 strb r3, [r2, #0] }; 800439c: bf00 nop 800439e: 370c adds r7, #12 80043a0: 46bd mov sp, r7 80043a2: bc80 pop {r7} 80043a4: 4770 bx lr 80043a6: bf00 nop 80043a8: 200005ce .word 0x200005ce 080043ac : /** * @brief CAN Reinitialization function * * */ void CAN_ReInit(){ 80043ac: b580 push {r7, lr} 80043ae: af00 add r7, sp, #0 HAL_CAN_Stop(&ED_CAN_INSTANCE); 80043b0: 4807 ldr r0, [pc, #28] @ (80043d0 ) 80043b2: f002 f991 bl 80066d8 #ifdef ED_CAN1 MX_CAN1_Init(); #endif #ifdef ED_CAN2 MX_CAN2_Init(); 80043b6: f7fd fadf bl 8001978 #endif EDCAN_FilterInit(); 80043ba: f000 f80b bl 80043d4 HAL_CAN_Start(&ED_CAN_INSTANCE); 80043be: 4804 ldr r0, [pc, #16] @ (80043d0 ) 80043c0: f002 f946 bl 8006650 #ifdef ED_CAN1 HAL_CAN_ActivateNotification(&ED_CAN_INSTANCE, CAN_IT_RX_FIFO0_MSG_PENDING | /*CAN_IT_ERROR | CAN_IT_BUSOFF | CAN_IT_LAST_ERROR_CODE |*/ CAN_IT_TX_MAILBOX_EMPTY); #endif #ifdef ED_CAN2 HAL_CAN_ActivateNotification(&ED_CAN_INSTANCE, CAN_IT_RX_FIFO1_MSG_PENDING | /*CAN_IT_ERROR | CAN_IT_BUSOFF | CAN_IT_LAST_ERROR_CODE |*/ CAN_IT_TX_MAILBOX_EMPTY); 80043c4: 2111 movs r1, #17 80043c6: 4802 ldr r0, [pc, #8] @ (80043d0 ) 80043c8: f002 fbee bl 8006ba8 #endif } 80043cc: bf00 nop 80043ce: bd80 pop {r7, pc} 80043d0: 200002b0 .word 0x200002b0 080043d4 : * * @param _OwnID: EDCAN Device ID * * @retval HAL status */ void EDCAN_FilterInit(){ 80043d4: b580 push {r7, lr} 80043d6: b08a sub sp, #40 @ 0x28 80043d8: af00 add r7, sp, #0 CAN_FilterTypeDef sFilterConfig; //Filter for Own ID sFilterConfig.FilterBank = 0; 80043da: 2300 movs r3, #0 80043dc: 617b str r3, [r7, #20] sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; 80043de: 2300 movs r3, #0 80043e0: 61bb str r3, [r7, #24] sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; 80043e2: 2301 movs r3, #1 80043e4: 61fb str r3, [r7, #28] sFilterConfig.FilterIdHigh = 0x0000; 80043e6: 2300 movs r3, #0 80043e8: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = (uint16_t)(ED_OwnID<<3)|0b100; 80043ea: 4b33 ldr r3, [pc, #204] @ (80044b8 ) 80043ec: 781b ldrb r3, [r3, #0] 80043ee: 00db lsls r3, r3, #3 80043f0: b29b uxth r3, r3 80043f2: f043 0304 orr.w r3, r3, #4 80043f6: b29b uxth r3, r3 80043f8: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 80043fa: 2300 movs r3, #0 80043fc: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = (uint16_t)(0xFF<<3)|0b100; 80043fe: f240 73fc movw r3, #2044 @ 0x7fc 8004402: 60fb str r3, [r7, #12] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0; 8004404: 2300 movs r3, #0 8004406: 613b str r3, [r7, #16] sFilterConfig.FilterActivation = ENABLE; 8004408: 2301 movs r3, #1 800440a: 623b str r3, [r7, #32] #ifdef ED_CAN2 sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO1; 800440c: 2301 movs r3, #1 800440e: 613b str r3, [r7, #16] sFilterConfig.SlaveStartFilterBank = 14; 8004410: 230e movs r3, #14 8004412: 627b str r3, [r7, #36] @ 0x24 sFilterConfig.FilterBank = 14; 8004414: 230e movs r3, #14 8004416: 617b str r3, [r7, #20] #endif if(HAL_CAN_ConfigFilter(&ED_CAN_INSTANCE, &sFilterConfig) != HAL_OK){ 8004418: 463b mov r3, r7 800441a: 4619 mov r1, r3 800441c: 4827 ldr r0, [pc, #156] @ (80044bc ) 800441e: f002 f837 bl 8006490 8004422: 4603 mov r3, r0 8004424: 2b00 cmp r3, #0 8004426: d001 beq.n 800442c Error_Handler(); 8004428: f000 fdda bl 8004fe0 } // Filter for broadcast ID sFilterConfig.FilterBank = 1; 800442c: 2301 movs r3, #1 800442e: 617b str r3, [r7, #20] sFilterConfig.FilterIdHigh = 0x0000; 8004430: 2300 movs r3, #0 8004432: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = (uint16_t)(0xFF<<3)|0b100; 8004434: f240 73fc movw r3, #2044 @ 0x7fc 8004438: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 800443a: 2300 movs r3, #0 800443c: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = (uint16_t)(0xFF<<3)|0b100; 800443e: f240 73fc movw r3, #2044 @ 0x7fc 8004442: 60fb str r3, [r7, #12] #ifdef ED_CAN2 sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO1; 8004444: 2301 movs r3, #1 8004446: 613b str r3, [r7, #16] sFilterConfig.SlaveStartFilterBank = 14; 8004448: 230e movs r3, #14 800444a: 627b str r3, [r7, #36] @ 0x24 sFilterConfig.FilterBank = 15; 800444c: 230f movs r3, #15 800444e: 617b str r3, [r7, #20] #endif if(HAL_CAN_ConfigFilter(&ED_CAN_INSTANCE, &sFilterConfig) != HAL_OK) 8004450: 463b mov r3, r7 8004452: 4619 mov r1, r3 8004454: 4819 ldr r0, [pc, #100] @ (80044bc ) 8004456: f002 f81b bl 8006490 800445a: 4603 mov r3, r0 800445c: 2b00 cmp r3, #0 800445e: d001 beq.n 8004464 { Error_Handler(); 8004460: f000 fdbe bl 8004fe0 } // Filter for second ID if(ED_SecondID != 0xFF){ 8004464: 4b16 ldr r3, [pc, #88] @ (80044c0 ) 8004466: 781b ldrb r3, [r3, #0] 8004468: 2bff cmp r3, #255 @ 0xff 800446a: d020 beq.n 80044ae sFilterConfig.FilterBank = 2; 800446c: 2302 movs r3, #2 800446e: 617b str r3, [r7, #20] sFilterConfig.FilterIdHigh = 0x0000; 8004470: 2300 movs r3, #0 8004472: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = (uint16_t)(ED_SecondID<<3)|0b100; 8004474: 4b12 ldr r3, [pc, #72] @ (80044c0 ) 8004476: 781b ldrb r3, [r3, #0] 8004478: 00db lsls r3, r3, #3 800447a: b29b uxth r3, r3 800447c: f043 0304 orr.w r3, r3, #4 8004480: b29b uxth r3, r3 8004482: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 8004484: 2300 movs r3, #0 8004486: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = (uint16_t)(0xFF<<3)|0b100; 8004488: f240 73fc movw r3, #2044 @ 0x7fc 800448c: 60fb str r3, [r7, #12] #ifdef ED_CAN2 sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO1; 800448e: 2301 movs r3, #1 8004490: 613b str r3, [r7, #16] sFilterConfig.SlaveStartFilterBank = 14; 8004492: 230e movs r3, #14 8004494: 627b str r3, [r7, #36] @ 0x24 sFilterConfig.FilterBank = 16; 8004496: 2310 movs r3, #16 8004498: 617b str r3, [r7, #20] #endif if(HAL_CAN_ConfigFilter(&ED_CAN_INSTANCE, &sFilterConfig) != HAL_OK) 800449a: 463b mov r3, r7 800449c: 4619 mov r1, r3 800449e: 4807 ldr r0, [pc, #28] @ (80044bc ) 80044a0: f001 fff6 bl 8006490 80044a4: 4603 mov r3, r0 80044a6: 2b00 cmp r3, #0 80044a8: d001 beq.n 80044ae { Error_Handler(); 80044aa: f000 fd99 bl 8004fe0 } } } 80044ae: bf00 nop 80044b0: 3728 adds r7, #40 @ 0x28 80044b2: 46bd mov sp, r7 80044b4: bd80 pop {r7, pc} 80044b6: bf00 nop 80044b8: 200005ce .word 0x200005ce 80044bc: 200002b0 .word 0x200002b0 80044c0: 20000003 .word 0x20000003 080044c4 : * @param DestinationID: Packet Destination ID * @param RegAddr: First register address in sequence * @param *data: pointer to data array to be send * @param len: length of data (1..8) */ void EDCAN_SendPacketRead(uint8_t DestinationID, uint16_t RegAddr, const uint8_t *data, uint8_t len){ 80044c4: b580 push {r7, lr} 80044c6: b08c sub sp, #48 @ 0x30 80044c8: af00 add r7, sp, #0 80044ca: 603a str r2, [r7, #0] 80044cc: 461a mov r2, r3 80044ce: 4603 mov r3, r0 80044d0: 71fb strb r3, [r7, #7] 80044d2: 460b mov r3, r1 80044d4: 80bb strh r3, [r7, #4] 80044d6: 4613 mov r3, r2 80044d8: 71bb strb r3, [r7, #6] EDCAN_TxFrame_t tx_frame; EDCAN_frameId_t ExtID; //CAN_TxHeaderTypeDef tx_header; //uint32_t tx_mailbox; ExtID.DestinationID = DestinationID; 80044da: 79fb ldrb r3, [r7, #7] 80044dc: 733b strb r3, [r7, #12] ExtID.SourceID = ED_OwnID; 80044de: 4b15 ldr r3, [pc, #84] @ (8004534 ) 80044e0: 781b ldrb r3, [r3, #0] 80044e2: 737b strb r3, [r7, #13] ExtID.RegisterAddress = RegAddr; 80044e4: 88bb ldrh r3, [r7, #4] 80044e6: f3c3 030a ubfx r3, r3, #0, #11 80044ea: b29a uxth r2, r3 80044ec: 89fb ldrh r3, [r7, #14] 80044ee: f362 030a bfi r3, r2, #0, #11 80044f2: 81fb strh r3, [r7, #14] ExtID.PacketType = ED_READ; 80044f4: 7bfb ldrb r3, [r7, #15] 80044f6: 2202 movs r2, #2 80044f8: f362 03c4 bfi r3, r2, #3, #2 80044fc: 73fb strb r3, [r7, #15] memcpy(&tx_frame.tx_header.ExtId, &ExtID, sizeof(ExtID)); 80044fe: 68fb ldr r3, [r7, #12] 8004500: 617b str r3, [r7, #20] tx_frame.tx_header.RTR = CAN_RTR_DATA; 8004502: 2300 movs r3, #0 8004504: 61fb str r3, [r7, #28] tx_frame.tx_header.IDE = CAN_ID_EXT; 8004506: 2304 movs r3, #4 8004508: 61bb str r3, [r7, #24] tx_frame.tx_header.DLC = len; 800450a: 79bb ldrb r3, [r7, #6] 800450c: 623b str r3, [r7, #32] memcpy(&tx_frame.data, data, len); 800450e: 79ba ldrb r2, [r7, #6] 8004510: f107 0310 add.w r3, r7, #16 8004514: 3318 adds r3, #24 8004516: 6839 ldr r1, [r7, #0] 8004518: 4618 mov r0, r3 800451a: f006 faac bl 800aa76 //EDCAN_AddTxMessage(&ED_CAN_INSTANCE, &tx_header, data, &tx_mailbox); //Добавление пакета в буфер EDCAN_TxBufferAdd(&tx_frame); 800451e: f107 0310 add.w r3, r7, #16 8004522: 4618 mov r0, r3 8004524: f000 f8be bl 80046a4 //Также, попытаемся сразу перенести пакет в CAN (если там есть свободное место) //Если свободного места нету, то пакет перенесется в CAN позже по прерыванию освобождения буфера EDCAN_ExchangeTxBuffer(); 8004528: f000 f97c bl 8004824 } 800452c: bf00 nop 800452e: 3730 adds r7, #48 @ 0x30 8004530: 46bd mov sp, r7 8004532: bd80 pop {r7, pc} 8004534: 200005ce .word 0x200005ce 08004538 : /** * @brief EDCAN loop function * Функция для управления буферами, должна быть в while(1) * */ void EDCAN_Loop(){ 8004538: b580 push {r7, lr} 800453a: af00 add r7, sp, #0 //Функция переинициализации пока что не используется // if(can_error){ // CAN_ReInit(); // can_error=0; // } if(silentmode_enable){ 800453c: 4b1f ldr r3, [pc, #124] @ (80045bc ) 800453e: 681b ldr r3, [r3, #0] 8004540: 2b00 cmp r3, #0 8004542: d00f beq.n 8004564 if((HAL_GetTick() - silentmode_start_time) > silentmode_delay){ 8004544: f001 f976 bl 8005834 8004548: 4602 mov r2, r0 800454a: 4b1d ldr r3, [pc, #116] @ (80045c0 ) 800454c: 681b ldr r3, [r3, #0] 800454e: 1ad2 subs r2, r2, r3 8004550: 4b1c ldr r3, [pc, #112] @ (80045c4 ) 8004552: 681b ldr r3, [r3, #0] 8004554: 429a cmp r2, r3 8004556: d905 bls.n 8004564 silentmode_enable = 0; 8004558: 4b18 ldr r3, [pc, #96] @ (80045bc ) 800455a: 2200 movs r2, #0 800455c: 601a str r2, [r3, #0] EDCAN_SetSilentMode(0); 800455e: 2000 movs r0, #0 8004560: f000 f87a bl 8004658 } } //every 2ms exchange buffer // if (HAL_GetTick() > lasttxexchangetime){ if(EDCAN_getTxBufferElementCount()>0){ 8004564: f000 f8ec bl 8004740 8004568: 4603 mov r3, r0 800456a: 2b00 cmp r3, #0 800456c: d007 beq.n 800457e lasttxexchangetime = HAL_GetTick() + 1; 800456e: f001 f961 bl 8005834 8004572: 4603 mov r3, r0 8004574: 3301 adds r3, #1 8004576: 4a14 ldr r2, [pc, #80] @ (80045c8 ) 8004578: 6013 str r3, [r2, #0] //__disable_irq(); EDCAN_ExchangeTxBuffer(); 800457a: f000 f953 bl 8004824 //__enable_irq(); } // } //every 1s alive packet if ((HAL_GetTick() - lastalivepackettime) > 1000){ 800457e: f001 f959 bl 8005834 8004582: 4602 mov r2, r0 8004584: 4b11 ldr r3, [pc, #68] @ (80045cc ) 8004586: 681b ldr r3, [r3, #0] 8004588: 1ad3 subs r3, r2, r3 800458a: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800458e: d906 bls.n 800459e lastalivepackettime = HAL_GetTick(); 8004590: f001 f950 bl 8005834 8004594: 4603 mov r3, r0 8004596: 4a0d ldr r2, [pc, #52] @ (80045cc ) 8004598: 6013 str r3, [r2, #0] EDCAN_SendAlivePacket(); 800459a: f000 f819 bl 80045d0 } //exchange buffer // if (HAL_GetTick() > lastrxexchangetime){ if((EDCAN_getRxBufferElementCount()>0)&&(EDCAN_getTxBufferElementCount()<(BUFFER_SIZE*3/4))){ 800459e: f000 fa1f bl 80049e0 80045a2: 4603 mov r3, r0 80045a4: 2b00 cmp r3, #0 80045a6: d006 beq.n 80045b6 80045a8: f000 f8ca bl 8004740 80045ac: 4603 mov r3, r0 80045ae: 2bbf cmp r3, #191 @ 0xbf 80045b0: d801 bhi.n 80045b6 // lastrxexchangetime = HAL_GetTick() + 1; EDCAN_ExchangeRxBuffer(); 80045b2: f000 fa21 bl 80049f8 } // } } 80045b6: bf00 nop 80045b8: bd80 pop {r7, pc} 80045ba: bf00 nop 80045bc: 2000060c .word 0x2000060c 80045c0: 20000604 .word 0x20000604 80045c4: 20000608 .word 0x20000608 80045c8: 20000610 .word 0x20000610 80045cc: 20000614 .word 0x20000614 080045d0 : void EDCAN_SendAlivePacket(){ 80045d0: b580 push {r7, lr} 80045d2: b082 sub sp, #8 80045d4: af00 add r7, sp, #0 uint8_t data[1]; uint8_t DestinationID = 0x00; 80045d6: 2300 movs r3, #0 80045d8: 71fb strb r3, [r7, #7] data[0] = EDCAN_GetOwnRegisterValue(EDCAN_REG_SYS_STATUS); 80045da: 2000 movs r0, #0 80045dc: f000 fb14 bl 8004c08 80045e0: 4603 mov r3, r0 80045e2: 713b strb r3, [r7, #4] EDCAN_SendPacketRead(DestinationID, EDCAN_REG_SYS_STATUS, data, 1); 80045e4: 1d3a adds r2, r7, #4 80045e6: 79f8 ldrb r0, [r7, #7] 80045e8: 2301 movs r3, #1 80045ea: 2100 movs r1, #0 80045ec: f7ff ff6a bl 80044c4 } 80045f0: bf00 nop 80045f2: 3708 adds r7, #8 80045f4: 46bd mov sp, r7 80045f6: bd80 pop {r7, pc} 080045f8 : //функция установки таймера для входа в Silent режим //По истечении времени time выход из режима silent //если time = 0, выход из режима silent и сброс таймера void EDCAN_EnterSilentMode(uint8_t time){ 80045f8: b580 push {r7, lr} 80045fa: b082 sub sp, #8 80045fc: af00 add r7, sp, #0 80045fe: 4603 mov r3, r0 8004600: 71fb strb r3, [r7, #7] if(time==0){ 8004602: 79fb ldrb r3, [r7, #7] 8004604: 2b00 cmp r3, #0 8004606: d10b bne.n 8004620 EDCAN_SetSilentMode(0); 8004608: 2000 movs r0, #0 800460a: f000 f825 bl 8004658 silentmode_start_time = HAL_GetTick(); 800460e: f001 f911 bl 8005834 8004612: 4603 mov r3, r0 8004614: 4a0d ldr r2, [pc, #52] @ (800464c ) 8004616: 6013 str r3, [r2, #0] silentmode_enable = 0; 8004618: 4b0d ldr r3, [pc, #52] @ (8004650 ) 800461a: 2200 movs r2, #0 800461c: 601a str r2, [r3, #0] EDCAN_SetSilentMode(1); silentmode_delay = ((uint32_t)time * 1000); silentmode_start_time = HAL_GetTick(); silentmode_enable = 1; } } 800461e: e011 b.n 8004644 EDCAN_SetSilentMode(1); 8004620: 2001 movs r0, #1 8004622: f000 f819 bl 8004658 silentmode_delay = ((uint32_t)time * 1000); 8004626: 79fb ldrb r3, [r7, #7] 8004628: f44f 727a mov.w r2, #1000 @ 0x3e8 800462c: fb02 f303 mul.w r3, r2, r3 8004630: 4a08 ldr r2, [pc, #32] @ (8004654 ) 8004632: 6013 str r3, [r2, #0] silentmode_start_time = HAL_GetTick(); 8004634: f001 f8fe bl 8005834 8004638: 4603 mov r3, r0 800463a: 4a04 ldr r2, [pc, #16] @ (800464c ) 800463c: 6013 str r3, [r2, #0] silentmode_enable = 1; 800463e: 4b04 ldr r3, [pc, #16] @ (8004650 ) 8004640: 2201 movs r2, #1 8004642: 601a str r2, [r3, #0] } 8004644: bf00 nop 8004646: 3708 adds r7, #8 8004648: 46bd mov sp, r7 800464a: bd80 pop {r7, pc} 800464c: 20000604 .word 0x20000604 8004650: 2000060c .word 0x2000060c 8004654: 20000608 .word 0x20000608 08004658 : //Функция входа в Silent Режим void EDCAN_SetSilentMode(uint8_t state){ 8004658: b580 push {r7, lr} 800465a: b082 sub sp, #8 800465c: af00 add r7, sp, #0 800465e: 4603 mov r3, r0 8004660: 71fb strb r3, [r7, #7] HAL_CAN_Stop(&ED_CAN_INSTANCE); 8004662: 480f ldr r0, [pc, #60] @ (80046a0 ) 8004664: f002 f838 bl 80066d8 if(state){ 8004668: 79fb ldrb r3, [r7, #7] 800466a: 2b00 cmp r3, #0 800466c: d008 beq.n 8004680 ED_CAN_INSTANCE.Instance->BTR |= CAN_MODE_SILENT; 800466e: 4b0c ldr r3, [pc, #48] @ (80046a0 ) 8004670: 681b ldr r3, [r3, #0] 8004672: 69da ldr r2, [r3, #28] 8004674: 4b0a ldr r3, [pc, #40] @ (80046a0 ) 8004676: 681b ldr r3, [r3, #0] 8004678: f042 4200 orr.w r2, r2, #2147483648 @ 0x80000000 800467c: 61da str r2, [r3, #28] 800467e: e007 b.n 8004690 }else{ ED_CAN_INSTANCE.Instance->BTR &= ~CAN_MODE_SILENT; 8004680: 4b07 ldr r3, [pc, #28] @ (80046a0 ) 8004682: 681b ldr r3, [r3, #0] 8004684: 69da ldr r2, [r3, #28] 8004686: 4b06 ldr r3, [pc, #24] @ (80046a0 ) 8004688: 681b ldr r3, [r3, #0] 800468a: f022 4200 bic.w r2, r2, #2147483648 @ 0x80000000 800468e: 61da str r2, [r3, #28] } HAL_CAN_Start(&ED_CAN_INSTANCE); 8004690: 4803 ldr r0, [pc, #12] @ (80046a0 ) 8004692: f001 ffdd bl 8006650 } 8004696: bf00 nop 8004698: 3708 adds r7, #8 800469a: 46bd mov sp, r7 800469c: bd80 pop {r7, pc} 800469e: bf00 nop 80046a0: 200002b0 .word 0x200002b0 080046a4 : TxCircularBuffer_t txBuffer = { .head = 0, .tail = 0, .count = 0, .busy = 0 }; RxCircularBuffer_t rxBuffer = { .head = 0, .tail = 0, .count = 0, .busy = 0 }; // Добавление элемента в буфер void EDCAN_TxBufferAdd(EDCAN_TxFrame_t *frame) { 80046a4: b580 push {r7, lr} 80046a6: b082 sub sp, #8 80046a8: af00 add r7, sp, #0 80046aa: 6078 str r0, [r7, #4] __ASM volatile ("cpsid i" : : : "memory"); 80046ac: b672 cpsid i } 80046ae: bf00 nop __disable_irq(); memcpy(&txBuffer.buffer[txBuffer.head], frame, sizeof(EDCAN_TxFrame_t)); 80046b0: 4b22 ldr r3, [pc, #136] @ (800473c ) 80046b2: f503 5300 add.w r3, r3, #8192 @ 0x2000 80046b6: 881b ldrh r3, [r3, #0] 80046b8: 015b lsls r3, r3, #5 80046ba: 4a20 ldr r2, [pc, #128] @ (800473c ) 80046bc: 4413 add r3, r2 80046be: 2220 movs r2, #32 80046c0: 6879 ldr r1, [r7, #4] 80046c2: 4618 mov r0, r3 80046c4: f006 f9d7 bl 800aa76 txBuffer.head = (txBuffer.head + 1) % BUFFER_SIZE; 80046c8: 4b1c ldr r3, [pc, #112] @ (800473c ) 80046ca: f503 5300 add.w r3, r3, #8192 @ 0x2000 80046ce: 881b ldrh r3, [r3, #0] 80046d0: 3301 adds r3, #1 80046d2: 425a negs r2, r3 80046d4: b2db uxtb r3, r3 80046d6: b2d2 uxtb r2, r2 80046d8: bf58 it pl 80046da: 4253 negpl r3, r2 80046dc: b29a uxth r2, r3 80046de: 4b17 ldr r3, [pc, #92] @ (800473c ) 80046e0: f503 5300 add.w r3, r3, #8192 @ 0x2000 80046e4: 801a strh r2, [r3, #0] if (txBuffer.count == BUFFER_SIZE) { 80046e6: 4b15 ldr r3, [pc, #84] @ (800473c ) 80046e8: f503 5300 add.w r3, r3, #8192 @ 0x2000 80046ec: f9b3 3004 ldrsh.w r3, [r3, #4] 80046f0: f5b3 7f80 cmp.w r3, #256 @ 0x100 80046f4: d10f bne.n 8004716 txBuffer.tail = (txBuffer.tail + 1) % BUFFER_SIZE; // Перезапись старых данных 80046f6: 4b11 ldr r3, [pc, #68] @ (800473c ) 80046f8: f503 5300 add.w r3, r3, #8192 @ 0x2000 80046fc: 885b ldrh r3, [r3, #2] 80046fe: 3301 adds r3, #1 8004700: 425a negs r2, r3 8004702: b2db uxtb r3, r3 8004704: b2d2 uxtb r2, r2 8004706: bf58 it pl 8004708: 4253 negpl r3, r2 800470a: b29a uxth r2, r3 800470c: 4b0b ldr r3, [pc, #44] @ (800473c ) 800470e: f503 5300 add.w r3, r3, #8192 @ 0x2000 8004712: 805a strh r2, [r3, #2] 8004714: e00c b.n 8004730 } else { txBuffer.count++; 8004716: 4b09 ldr r3, [pc, #36] @ (800473c ) 8004718: f503 5300 add.w r3, r3, #8192 @ 0x2000 800471c: f9b3 3004 ldrsh.w r3, [r3, #4] 8004720: b29b uxth r3, r3 8004722: 3301 adds r3, #1 8004724: b29b uxth r3, r3 8004726: b21a sxth r2, r3 8004728: 4b04 ldr r3, [pc, #16] @ (800473c ) 800472a: f503 5300 add.w r3, r3, #8192 @ 0x2000 800472e: 809a strh r2, [r3, #4] __ASM volatile ("cpsie i" : : : "memory"); 8004730: b662 cpsie i } 8004732: bf00 nop } __enable_irq(); } 8004734: bf00 nop 8004736: 3708 adds r7, #8 8004738: 46bd mov sp, r7 800473a: bd80 pop {r7, pc} 800473c: 20000618 .word 0x20000618 08004740 : //Количество элементов в буфере uint16_t EDCAN_getTxBufferElementCount() { 8004740: b480 push {r7} 8004742: af00 add r7, sp, #0 return txBuffer.count; 8004744: 4b04 ldr r3, [pc, #16] @ (8004758 ) 8004746: f503 5300 add.w r3, r3, #8192 @ 0x2000 800474a: f9b3 3004 ldrsh.w r3, [r3, #4] 800474e: b29b uxth r3, r3 } 8004750: 4618 mov r0, r3 8004752: 46bd mov sp, r7 8004754: bc80 pop {r7} 8004756: 4770 bx lr 8004758: 20000618 .word 0x20000618 0800475c : // функция для получения первого элемента без удаления его из буфера bool EDCAN_TxBufferPeekFirst(EDCAN_TxFrame_t *frame) { 800475c: b580 push {r7, lr} 800475e: b082 sub sp, #8 8004760: af00 add r7, sp, #0 8004762: 6078 str r0, [r7, #4] if (txBuffer.count > 0) { 8004764: 4b0c ldr r3, [pc, #48] @ (8004798 ) 8004766: f503 5300 add.w r3, r3, #8192 @ 0x2000 800476a: f9b3 3004 ldrsh.w r3, [r3, #4] 800476e: 2b00 cmp r3, #0 8004770: dd0d ble.n 800478e memcpy(frame, &txBuffer.buffer[txBuffer.tail], sizeof(EDCAN_TxFrame_t)); 8004772: 4b09 ldr r3, [pc, #36] @ (8004798 ) 8004774: f503 5300 add.w r3, r3, #8192 @ 0x2000 8004778: 885b ldrh r3, [r3, #2] 800477a: 015b lsls r3, r3, #5 800477c: 4a06 ldr r2, [pc, #24] @ (8004798 ) 800477e: 4413 add r3, r2 8004780: 2220 movs r2, #32 8004782: 4619 mov r1, r3 8004784: 6878 ldr r0, [r7, #4] 8004786: f006 f976 bl 800aa76 return true; 800478a: 2301 movs r3, #1 800478c: e000 b.n 8004790 } else { // Буфер пуст, можно добавить обработку ошибки return false; 800478e: 2300 movs r3, #0 } } 8004790: 4618 mov r0, r3 8004792: 3708 adds r7, #8 8004794: 46bd mov sp, r7 8004796: bd80 pop {r7, pc} 8004798: 20000618 .word 0x20000618 0800479c : // функция для удаления первого элемента из буфера bool EDCAN_TxBufferRemoveFirst() { 800479c: b480 push {r7} 800479e: af00 add r7, sp, #0 if (txBuffer.count > 0) { 80047a0: 4b1f ldr r3, [pc, #124] @ (8004820 ) 80047a2: f503 5300 add.w r3, r3, #8192 @ 0x2000 80047a6: f9b3 3004 ldrsh.w r3, [r3, #4] 80047aa: 2b00 cmp r3, #0 80047ac: dd33 ble.n 8004816 txBuffer.tail = (txBuffer.tail + 1) % BUFFER_SIZE; 80047ae: 4b1c ldr r3, [pc, #112] @ (8004820 ) 80047b0: f503 5300 add.w r3, r3, #8192 @ 0x2000 80047b4: 885b ldrh r3, [r3, #2] 80047b6: 3301 adds r3, #1 80047b8: 425a negs r2, r3 80047ba: b2db uxtb r3, r3 80047bc: b2d2 uxtb r2, r2 80047be: bf58 it pl 80047c0: 4253 negpl r3, r2 80047c2: b29a uxth r2, r3 80047c4: 4b16 ldr r3, [pc, #88] @ (8004820 ) 80047c6: f503 5300 add.w r3, r3, #8192 @ 0x2000 80047ca: 805a strh r2, [r3, #2] txBuffer.count--; 80047cc: 4b14 ldr r3, [pc, #80] @ (8004820 ) 80047ce: f503 5300 add.w r3, r3, #8192 @ 0x2000 80047d2: f9b3 3004 ldrsh.w r3, [r3, #4] 80047d6: b29b uxth r3, r3 80047d8: 3b01 subs r3, #1 80047da: b29b uxth r3, r3 80047dc: b21a sxth r2, r3 80047de: 4b10 ldr r3, [pc, #64] @ (8004820 ) 80047e0: f503 5300 add.w r3, r3, #8192 @ 0x2000 80047e4: 809a strh r2, [r3, #4] if(txBuffer.count < 0){ 80047e6: 4b0e ldr r3, [pc, #56] @ (8004820 ) 80047e8: f503 5300 add.w r3, r3, #8192 @ 0x2000 80047ec: f9b3 3004 ldrsh.w r3, [r3, #4] 80047f0: 2b00 cmp r3, #0 80047f2: da0e bge.n 8004812 //printf("hueta\n"); txBuffer.count = 0; 80047f4: 4b0a ldr r3, [pc, #40] @ (8004820 ) 80047f6: f503 5300 add.w r3, r3, #8192 @ 0x2000 80047fa: 2200 movs r2, #0 80047fc: 809a strh r2, [r3, #4] txBuffer.tail = 0; 80047fe: 4b08 ldr r3, [pc, #32] @ (8004820 ) 8004800: f503 5300 add.w r3, r3, #8192 @ 0x2000 8004804: 2200 movs r2, #0 8004806: 805a strh r2, [r3, #2] txBuffer.head = 0; 8004808: 4b05 ldr r3, [pc, #20] @ (8004820 ) 800480a: f503 5300 add.w r3, r3, #8192 @ 0x2000 800480e: 2200 movs r2, #0 8004810: 801a strh r2, [r3, #0] } return true; 8004812: 2301 movs r3, #1 8004814: e000 b.n 8004818 } else { // Буфер пуст, можно добавить обработку ошибки return false; 8004816: 2300 movs r3, #0 } } 8004818: 4618 mov r0, r3 800481a: 46bd mov sp, r7 800481c: bc80 pop {r7} 800481e: 4770 bx lr 8004820: 20000618 .word 0x20000618 08004824 : //Функция для передачи данных из буфера в mailbox CAN шины void EDCAN_ExchangeTxBuffer(){ 8004824: b580 push {r7, lr} 8004826: b08a sub sp, #40 @ 0x28 8004828: af00 add r7, sp, #0 EDCAN_TxFrame_t TxFrame; uint32_t tx_mailbox; HAL_StatusTypeDef CAN_result; //если буфер занят, то выходим нах if (txBuffer.busy) return; 800482a: 4b26 ldr r3, [pc, #152] @ (80048c4 ) 800482c: f503 5300 add.w r3, r3, #8192 @ 0x2000 8004830: 799b ldrb r3, [r3, #6] 8004832: 2b00 cmp r3, #0 8004834: d142 bne.n 80048bc txBuffer.busy = 1; 8004836: 4b23 ldr r3, [pc, #140] @ (80048c4 ) 8004838: f503 5300 add.w r3, r3, #8192 @ 0x2000 800483c: 2201 movs r2, #1 800483e: 719a strb r2, [r3, #6] //Если есть свободные Mailbox if(HAL_CAN_GetTxMailboxesFreeLevel(&ED_CAN_INSTANCE) > 0){ 8004840: 4821 ldr r0, [pc, #132] @ (80048c8 ) 8004842: f002 f86c bl 800691e 8004846: 4603 mov r3, r0 8004848: 2b00 cmp r3, #0 800484a: d031 beq.n 80048b0 //Если есть элементы в буфере, извлечь первый элемент буфера if(EDCAN_TxBufferPeekFirst(&TxFrame)) { 800484c: 1d3b adds r3, r7, #4 800484e: 4618 mov r0, r3 8004850: f7ff ff84 bl 800475c 8004854: 4603 mov r3, r0 8004856: 2b00 cmp r3, #0 8004858: d02a beq.n 80048b0 /* отправка сообщения */ CAN_result = HAL_CAN_AddTxMessage(&ED_CAN_INSTANCE, &TxFrame.tx_header, TxFrame.data, &tx_mailbox); 800485a: 4638 mov r0, r7 800485c: 1d3b adds r3, r7, #4 800485e: f103 0218 add.w r2, r3, #24 8004862: 1d39 adds r1, r7, #4 8004864: 4603 mov r3, r0 8004866: 4818 ldr r0, [pc, #96] @ (80048c8 ) 8004868: f001 ff7f bl 800676a 800486c: 4603 mov r3, r0 800486e: f887 3027 strb.w r3, [r7, #39] @ 0x27 /* если отправка удалась, выход */ if(CAN_result == HAL_OK) { 8004872: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8004876: 2b00 cmp r3, #0 8004878: d102 bne.n 8004880 //Удаление элемента буфера в случае успешной передачи EDCAN_TxBufferRemoveFirst(); 800487a: f7ff ff8f bl 800479c 800487e: e017 b.n 80048b0 //printf("tx ok\n"); }else if(CAN_result == HAL_ERROR) { 8004880: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8004884: 2b01 cmp r3, #1 8004886: d113 bne.n 80048b0 /* если ошибка, обработка ошибки */ if(ED_CAN_INSTANCE.ErrorCode & HAL_CAN_ERROR_NOT_INITIALIZED) { 8004888: 4b0f ldr r3, [pc, #60] @ (80048c8 ) 800488a: 6a5b ldr r3, [r3, #36] @ 0x24 800488c: f403 2380 and.w r3, r3, #262144 @ 0x40000 8004890: 2b00 cmp r3, #0 8004892: d004 beq.n 800489e CAN_ReInit(); //CAN не инициализирован, переинициализация 8004894: f7ff fd8a bl 80043ac printf("CAN Reinit\n"); 8004898: 480c ldr r0, [pc, #48] @ (80048cc ) 800489a: f005 fbd7 bl 800a04c } //if(ED_CAN_INSTANCE.ErrorCode & HAL_CAN_ERROR_PARAM) printf("tx full\n"); printf("CAN.ErrorCode = %d\n",(int)ED_CAN_INSTANCE.ErrorCode); 800489e: 4b0a ldr r3, [pc, #40] @ (80048c8 ) 80048a0: 6a5b ldr r3, [r3, #36] @ 0x24 80048a2: 4619 mov r1, r3 80048a4: 480a ldr r0, [pc, #40] @ (80048d0 ) 80048a6: f005 fb69 bl 8009f7c ED_CAN_INSTANCE.ErrorCode = 0; //Clear errors 80048aa: 4b07 ldr r3, [pc, #28] @ (80048c8 ) 80048ac: 2200 movs r2, #0 80048ae: 625a str r2, [r3, #36] @ 0x24 } } } txBuffer.busy = 0; 80048b0: 4b04 ldr r3, [pc, #16] @ (80048c4 ) 80048b2: f503 5300 add.w r3, r3, #8192 @ 0x2000 80048b6: 2200 movs r2, #0 80048b8: 719a strb r2, [r3, #6] 80048ba: e000 b.n 80048be if (txBuffer.busy) return; 80048bc: bf00 nop } 80048be: 3728 adds r7, #40 @ 0x28 80048c0: 46bd mov sp, r7 80048c2: bd80 pop {r7, pc} 80048c4: 20000618 .word 0x20000618 80048c8: 200002b0 .word 0x200002b0 80048cc: 0800df48 .word 0x0800df48 80048d0: 0800df54 .word 0x0800df54 080048d4 : // return false; // } //} // Функции работы с Rx буфером void EDCAN_RxBufferAdd(EDCAN_RxFrame_t *frame) { 80048d4: b580 push {r7, lr} 80048d6: b082 sub sp, #8 80048d8: af00 add r7, sp, #0 80048da: 6078 str r0, [r7, #4] // Исполнение из прерывания memcpy(&rxBuffer.buffer[rxBuffer.head], frame, sizeof(EDCAN_RxFrame_t)); 80048dc: 4b1f ldr r3, [pc, #124] @ (800495c ) 80048de: f8b3 3d00 ldrh.w r3, [r3, #3328] @ 0xd00 80048e2: 461a mov r2, r3 80048e4: 4613 mov r3, r2 80048e6: 005b lsls r3, r3, #1 80048e8: 4413 add r3, r2 80048ea: 009b lsls r3, r3, #2 80048ec: 4413 add r3, r2 80048ee: 4a1b ldr r2, [pc, #108] @ (800495c ) 80048f0: 4413 add r3, r2 80048f2: 220d movs r2, #13 80048f4: 6879 ldr r1, [r7, #4] 80048f6: 4618 mov r0, r3 80048f8: f006 f8bd bl 800aa76 rxBuffer.head = (rxBuffer.head + 1) % BUFFER_SIZE; 80048fc: 4b17 ldr r3, [pc, #92] @ (800495c ) 80048fe: f8b3 3d00 ldrh.w r3, [r3, #3328] @ 0xd00 8004902: 3301 adds r3, #1 8004904: 425a negs r2, r3 8004906: b2db uxtb r3, r3 8004908: b2d2 uxtb r2, r2 800490a: bf58 it pl 800490c: 4253 negpl r3, r2 800490e: b29a uxth r2, r3 8004910: 4b12 ldr r3, [pc, #72] @ (800495c ) 8004912: f8a3 2d00 strh.w r2, [r3, #3328] @ 0xd00 if (rxBuffer.count == BUFFER_SIZE) { 8004916: 4b11 ldr r3, [pc, #68] @ (800495c ) 8004918: f9b3 3d04 ldrsh.w r3, [r3, #3332] @ 0xd04 800491c: f5b3 7f80 cmp.w r3, #256 @ 0x100 8004920: d10d bne.n 800493e rxBuffer.tail = (rxBuffer.tail + 1) % BUFFER_SIZE; // Перезапись старых данных 8004922: 4b0e ldr r3, [pc, #56] @ (800495c ) 8004924: f8b3 3d02 ldrh.w r3, [r3, #3330] @ 0xd02 8004928: 3301 adds r3, #1 800492a: 425a negs r2, r3 800492c: b2db uxtb r3, r3 800492e: b2d2 uxtb r2, r2 8004930: bf58 it pl 8004932: 4253 negpl r3, r2 8004934: b29a uxth r2, r3 8004936: 4b09 ldr r3, [pc, #36] @ (800495c ) 8004938: f8a3 2d02 strh.w r2, [r3, #3330] @ 0xd02 } else { rxBuffer.count++; } } 800493c: e009 b.n 8004952 rxBuffer.count++; 800493e: 4b07 ldr r3, [pc, #28] @ (800495c ) 8004940: f9b3 3d04 ldrsh.w r3, [r3, #3332] @ 0xd04 8004944: b29b uxth r3, r3 8004946: 3301 adds r3, #1 8004948: b29b uxth r3, r3 800494a: b21a sxth r2, r3 800494c: 4b03 ldr r3, [pc, #12] @ (800495c ) 800494e: f8a3 2d04 strh.w r2, [r3, #3332] @ 0xd04 } 8004952: bf00 nop 8004954: 3708 adds r7, #8 8004956: 46bd mov sp, r7 8004958: bd80 pop {r7, pc} 800495a: bf00 nop 800495c: 20002620 .word 0x20002620 08004960 : //Извлечь и удалить первый элемент буфера bool EDCAN_RxBufferGet(EDCAN_RxFrame_t *frame) { 8004960: b580 push {r7, lr} 8004962: b082 sub sp, #8 8004964: af00 add r7, sp, #0 8004966: 6078 str r0, [r7, #4] __ASM volatile ("cpsid i" : : : "memory"); 8004968: b672 cpsid i } 800496a: bf00 nop //LOCKED function __disable_irq(); if (rxBuffer.count > 0) { 800496c: 4b1b ldr r3, [pc, #108] @ (80049dc ) 800496e: f9b3 3d04 ldrsh.w r3, [r3, #3332] @ 0xd04 8004972: 2b00 cmp r3, #0 8004974: dd2a ble.n 80049cc memcpy(frame, &rxBuffer.buffer[rxBuffer.tail], sizeof(EDCAN_RxFrame_t)); 8004976: 4b19 ldr r3, [pc, #100] @ (80049dc ) 8004978: f8b3 3d02 ldrh.w r3, [r3, #3330] @ 0xd02 800497c: 461a mov r2, r3 800497e: 4613 mov r3, r2 8004980: 005b lsls r3, r3, #1 8004982: 4413 add r3, r2 8004984: 009b lsls r3, r3, #2 8004986: 4413 add r3, r2 8004988: 4a14 ldr r2, [pc, #80] @ (80049dc ) 800498a: 4413 add r3, r2 800498c: 220d movs r2, #13 800498e: 4619 mov r1, r3 8004990: 6878 ldr r0, [r7, #4] 8004992: f006 f870 bl 800aa76 rxBuffer.tail = (rxBuffer.tail + 1) % BUFFER_SIZE; 8004996: 4b11 ldr r3, [pc, #68] @ (80049dc ) 8004998: f8b3 3d02 ldrh.w r3, [r3, #3330] @ 0xd02 800499c: 3301 adds r3, #1 800499e: 425a negs r2, r3 80049a0: b2db uxtb r3, r3 80049a2: b2d2 uxtb r2, r2 80049a4: bf58 it pl 80049a6: 4253 negpl r3, r2 80049a8: b29a uxth r2, r3 80049aa: 4b0c ldr r3, [pc, #48] @ (80049dc ) 80049ac: f8a3 2d02 strh.w r2, [r3, #3330] @ 0xd02 rxBuffer.count--; 80049b0: 4b0a ldr r3, [pc, #40] @ (80049dc ) 80049b2: f9b3 3d04 ldrsh.w r3, [r3, #3332] @ 0xd04 80049b6: b29b uxth r3, r3 80049b8: 3b01 subs r3, #1 80049ba: b29b uxth r3, r3 80049bc: b21a sxth r2, r3 80049be: 4b07 ldr r3, [pc, #28] @ (80049dc ) 80049c0: f8a3 2d04 strh.w r2, [r3, #3332] @ 0xd04 __ASM volatile ("cpsie i" : : : "memory"); 80049c4: b662 cpsie i } 80049c6: bf00 nop __enable_irq(); return true; 80049c8: 2301 movs r3, #1 80049ca: e002 b.n 80049d2 __ASM volatile ("cpsie i" : : : "memory"); 80049cc: b662 cpsie i } 80049ce: bf00 nop } else { // Буфер пуст, можно добавить обработку ошибки __enable_irq(); return false; 80049d0: 2300 movs r3, #0 } } 80049d2: 4618 mov r0, r3 80049d4: 3708 adds r7, #8 80049d6: 46bd mov sp, r7 80049d8: bd80 pop {r7, pc} 80049da: bf00 nop 80049dc: 20002620 .word 0x20002620 080049e0 : //Количество элементов в буфере uint16_t EDCAN_getRxBufferElementCount() { 80049e0: b480 push {r7} 80049e2: af00 add r7, sp, #0 return rxBuffer.count; 80049e4: 4b03 ldr r3, [pc, #12] @ (80049f4 ) 80049e6: f9b3 3d04 ldrsh.w r3, [r3, #3332] @ 0xd04 80049ea: b29b uxth r3, r3 } 80049ec: 4618 mov r0, r3 80049ee: 46bd mov sp, r7 80049f0: bc80 pop {r7} 80049f2: 4770 bx lr 80049f4: 20002620 .word 0x20002620 080049f8 : //Функция для обработки входящих пакетов из буфера void EDCAN_ExchangeRxBuffer(){ 80049f8: b590 push {r4, r7, lr} 80049fa: b087 sub sp, #28 80049fc: af02 add r7, sp, #8 EDCAN_RxFrame_t Rxframe; if (EDCAN_RxBufferGet(&Rxframe)){ 80049fe: 463b mov r3, r7 8004a00: 4618 mov r0, r3 8004a02: f7ff ffad bl 8004960 8004a06: 4603 mov r3, r0 8004a08: 2b00 cmp r3, #0 8004a0a: d039 beq.n 8004a80 if(Rxframe.ExtID.PacketType == ED_WRITE){ 8004a0c: 78fb ldrb r3, [r7, #3] 8004a0e: f003 0318 and.w r3, r3, #24 8004a12: b2db uxtb r3, r3 8004a14: 2b00 cmp r3, #0 8004a16: d10e bne.n 8004a36 EDCAN_WriteHandler(Rxframe.ExtID.SourceID, Rxframe.ExtID.DestinationID, Rxframe.ExtID.RegisterAddress, Rxframe.data, Rxframe.DLC); 8004a18: 7878 ldrb r0, [r7, #1] 8004a1a: 7839 ldrb r1, [r7, #0] 8004a1c: 887b ldrh r3, [r7, #2] 8004a1e: f3c3 030a ubfx r3, r3, #0, #11 8004a22: b29b uxth r3, r3 8004a24: 461c mov r4, r3 8004a26: 7b3b ldrb r3, [r7, #12] 8004a28: 463a mov r2, r7 8004a2a: 3204 adds r2, #4 8004a2c: 9300 str r3, [sp, #0] 8004a2e: 4613 mov r3, r2 8004a30: 4622 mov r2, r4 8004a32: f000 f829 bl 8004a88 } if(Rxframe.ExtID.PacketType == ED_READREQ){ 8004a36: 78fb ldrb r3, [r7, #3] 8004a38: f003 0318 and.w r3, r3, #24 8004a3c: b2db uxtb r3, r3 8004a3e: 2b08 cmp r3, #8 8004a40: d109 bne.n 8004a56 EDCAN_ReadRequestHandler(Rxframe.ExtID.SourceID, Rxframe.ExtID.DestinationID, Rxframe.ExtID.RegisterAddress, Rxframe.data[0]); 8004a42: 7878 ldrb r0, [r7, #1] 8004a44: 7839 ldrb r1, [r7, #0] 8004a46: 887b ldrh r3, [r7, #2] 8004a48: f3c3 030a ubfx r3, r3, #0, #11 8004a4c: b29b uxth r3, r3 8004a4e: 461a mov r2, r3 8004a50: 793b ldrb r3, [r7, #4] 8004a52: f000 f8f0 bl 8004c36 } if(Rxframe.ExtID.PacketType == ED_READ){ 8004a56: 78fb ldrb r3, [r7, #3] 8004a58: f003 0318 and.w r3, r3, #24 8004a5c: b2db uxtb r3, r3 8004a5e: 2b10 cmp r3, #16 8004a60: d10e bne.n 8004a80 EDCAN_ReadHandler(Rxframe.ExtID.SourceID, Rxframe.ExtID.DestinationID, Rxframe.ExtID.RegisterAddress, Rxframe.data, Rxframe.DLC); 8004a62: 7878 ldrb r0, [r7, #1] 8004a64: 7839 ldrb r1, [r7, #0] 8004a66: 887b ldrh r3, [r7, #2] 8004a68: f3c3 030a ubfx r3, r3, #0, #11 8004a6c: b29b uxth r3, r3 8004a6e: 461c mov r4, r3 8004a70: 7b3b ldrb r3, [r7, #12] 8004a72: 463a mov r2, r7 8004a74: 3204 adds r2, #4 8004a76: 9300 str r3, [sp, #0] 8004a78: 4613 mov r3, r2 8004a7a: 4622 mov r2, r4 8004a7c: f7fe fcfc bl 8003478 } } } 8004a80: bf00 nop 8004a82: 3714 adds r7, #20 8004a84: 46bd mov sp, r7 8004a86: bd90 pop {r4, r7, pc} 08004a88 : * DestinationID: Packet Destination ID * Addr: First register address in sequence * *data: pointer for data array * len: length of data (1..255) */ void EDCAN_WriteHandler(uint8_t SourceID, uint8_t DestinationID, uint16_t Addr, uint8_t *data, uint8_t len){ 8004a88: b580 push {r7, lr} 8004a8a: b084 sub sp, #16 8004a8c: af00 add r7, sp, #0 8004a8e: 603b str r3, [r7, #0] 8004a90: 4603 mov r3, r0 8004a92: 71fb strb r3, [r7, #7] 8004a94: 460b mov r3, r1 8004a96: 71bb strb r3, [r7, #6] 8004a98: 4613 mov r3, r2 8004a9a: 80bb strh r3, [r7, #4] // printf("Destination ID = %d\n", DestinationID); // printf("Address = %d\n", Addr); // printf("Len = %d\n", len); // printf("\n"); for (uint16_t AddrOffset = 0; AddrOffset < len; AddrOffset++){ //по очереди перебираем все полученные регистры через Handler 8004a9c: 2300 movs r3, #0 8004a9e: 81fb strh r3, [r7, #14] 8004aa0: e01e b.n 8004ae0 // printf ("register[%d] = %d\n", Addr+AddrOffset, data[AddrOffset]); if((Addr+AddrOffset)>=256){ 8004aa2: 88ba ldrh r2, [r7, #4] 8004aa4: 89fb ldrh r3, [r7, #14] 8004aa6: 4413 add r3, r2 8004aa8: 2bff cmp r3, #255 @ 0xff 8004aaa: dd0b ble.n 8004ac4 EDCAN_WriteUserRegister(Addr+AddrOffset, data[AddrOffset]); 8004aac: 88ba ldrh r2, [r7, #4] 8004aae: 89fb ldrh r3, [r7, #14] 8004ab0: 4413 add r3, r2 8004ab2: b298 uxth r0, r3 8004ab4: 89fb ldrh r3, [r7, #14] 8004ab6: 683a ldr r2, [r7, #0] 8004ab8: 4413 add r3, r2 8004aba: 781b ldrb r3, [r3, #0] 8004abc: 4619 mov r1, r3 8004abe: f7fe fcf7 bl 80034b0 8004ac2: e00a b.n 8004ada }else{ EDCAN_WriteSystemRegister(Addr+AddrOffset, data[AddrOffset]); 8004ac4: 88ba ldrh r2, [r7, #4] 8004ac6: 89fb ldrh r3, [r7, #14] 8004ac8: 4413 add r3, r2 8004aca: b298 uxth r0, r3 8004acc: 89fb ldrh r3, [r7, #14] 8004ace: 683a ldr r2, [r7, #0] 8004ad0: 4413 add r3, r2 8004ad2: 781b ldrb r3, [r3, #0] 8004ad4: 4619 mov r1, r3 8004ad6: f000 f80d bl 8004af4 for (uint16_t AddrOffset = 0; AddrOffset < len; AddrOffset++){ //по очереди перебираем все полученные регистры через Handler 8004ada: 89fb ldrh r3, [r7, #14] 8004adc: 3301 adds r3, #1 8004ade: 81fb strh r3, [r7, #14] 8004ae0: 7e3b ldrb r3, [r7, #24] 8004ae2: b29b uxth r3, r3 8004ae4: 89fa ldrh r2, [r7, #14] 8004ae6: 429a cmp r2, r3 8004ae8: d3db bcc.n 8004aa2 } } } 8004aea: bf00 nop 8004aec: bf00 nop 8004aee: 3710 adds r7, #16 8004af0: 46bd mov sp, r7 8004af2: bd80 pop {r7, pc} 08004af4 : void EDCAN_WriteSystemRegister(uint16_t addr, uint8_t value){ 8004af4: b580 push {r7, lr} 8004af6: b082 sub sp, #8 8004af8: af00 add r7, sp, #0 8004afa: 4603 mov r3, r0 8004afc: 460a mov r2, r1 8004afe: 80fb strh r3, [r7, #6] 8004b00: 4613 mov r3, r2 8004b02: 717b strb r3, [r7, #5] switch(addr){ 8004b04: 88fb ldrh r3, [r7, #6] 8004b06: 2b00 cmp r3, #0 8004b08: d002 beq.n 8004b10 8004b0a: 2b20 cmp r3, #32 8004b0c: d00b beq.n 8004b26 // break; //default: // printf ("Unknown register\n"); } } 8004b0e: e010 b.n 8004b32 if(value == 0x10){ 8004b10: 797b ldrb r3, [r7, #5] 8004b12: 2b10 cmp r3, #16 8004b14: d10c bne.n 8004b30 if(ED_status==0)ED_status = 0x10; 8004b16: 4b09 ldr r3, [pc, #36] @ (8004b3c ) 8004b18: 781b ldrb r3, [r3, #0] 8004b1a: 2b00 cmp r3, #0 8004b1c: d108 bne.n 8004b30 8004b1e: 4b07 ldr r3, [pc, #28] @ (8004b3c ) 8004b20: 2210 movs r2, #16 8004b22: 701a strb r2, [r3, #0] break; 8004b24: e004 b.n 8004b30 EDCAN_EnterSilentMode(value); 8004b26: 797b ldrb r3, [r7, #5] 8004b28: 4618 mov r0, r3 8004b2a: f7ff fd65 bl 80045f8 break; 8004b2e: e000 b.n 8004b32 break; 8004b30: bf00 nop } 8004b32: bf00 nop 8004b34: 3708 adds r7, #8 8004b36: 46bd mov sp, r7 8004b38: bd80 pop {r7, pc} 8004b3a: bf00 nop 8004b3c: 20003328 .word 0x20003328 08004b40 : * @brief Handler to get System register values (0..255) * * @param addr: register address * @retval register value (uint8_t) */ uint8_t EDCAN_GetSystemRegisterValue(uint16_t addr){ 8004b40: b580 push {r7, lr} 8004b42: b082 sub sp, #8 8004b44: af00 add r7, sp, #0 8004b46: 4603 mov r3, r0 8004b48: 80fb strh r3, [r7, #6] static uint32_t uptime_buffer; switch (addr){ 8004b4a: 88fb ldrh r3, [r7, #6] 8004b4c: 2b17 cmp r3, #23 8004b4e: d852 bhi.n 8004bf6 8004b50: a201 add r2, pc, #4 @ (adr r2, 8004b58 ) 8004b52: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004b56: bf00 nop 8004b58: 08004bb9 .word 0x08004bb9 8004b5c: 08004bc3 .word 0x08004bc3 8004b60: 08004bbf .word 0x08004bbf 8004b64: 08004bf7 .word 0x08004bf7 8004b68: 08004bf7 .word 0x08004bf7 8004b6c: 08004bf7 .word 0x08004bf7 8004b70: 08004bf7 .word 0x08004bf7 8004b74: 08004bf7 .word 0x08004bf7 8004b78: 08004bf7 .word 0x08004bf7 8004b7c: 08004bf7 .word 0x08004bf7 8004b80: 08004bf7 .word 0x08004bf7 8004b84: 08004bf7 .word 0x08004bf7 8004b88: 08004bf7 .word 0x08004bf7 8004b8c: 08004bf7 .word 0x08004bf7 8004b90: 08004bf7 .word 0x08004bf7 8004b94: 08004bf7 .word 0x08004bf7 8004b98: 08004bf7 .word 0x08004bf7 8004b9c: 08004bf7 .word 0x08004bf7 8004ba0: 08004bf7 .word 0x08004bf7 8004ba4: 08004bf7 .word 0x08004bf7 8004ba8: 08004bc7 .word 0x08004bc7 8004bac: 08004bd9 .word 0x08004bd9 8004bb0: 08004be3 .word 0x08004be3 8004bb4: 08004bed .word 0x08004bed /* регистры 0..255 используются для Системных регистров*/ case EDCAN_REG_SYS_STATUS: return ED_status; 8004bb8: 4b11 ldr r3, [pc, #68] @ (8004c00 ) 8004bba: 781b ldrb r3, [r3, #0] 8004bbc: e01c b.n 8004bf8 break; case EDCAN_REG_SYS_FWVER: return FWVER; 8004bbe: 2301 movs r3, #1 8004bc0: e01a b.n 8004bf8 break; case EDCAN_REG_SYS_DEVICEID: return DEVICE_ID; 8004bc2: 2320 movs r3, #32 8004bc4: e018 b.n 8004bf8 break; case EDCAN_REG_SYS_UPTIME0: uptime_buffer = HAL_GetTick(); 8004bc6: f000 fe35 bl 8005834 8004bca: 4603 mov r3, r0 8004bcc: 4a0d ldr r2, [pc, #52] @ (8004c04 ) 8004bce: 6013 str r3, [r2, #0] return uptime_buffer & 0xFF; 8004bd0: 4b0c ldr r3, [pc, #48] @ (8004c04 ) 8004bd2: 681b ldr r3, [r3, #0] 8004bd4: b2db uxtb r3, r3 8004bd6: e00f b.n 8004bf8 break; case EDCAN_REG_SYS_UPTIME1: return (uptime_buffer>>8) & 0xFF; 8004bd8: 4b0a ldr r3, [pc, #40] @ (8004c04 ) 8004bda: 681b ldr r3, [r3, #0] 8004bdc: 0a1b lsrs r3, r3, #8 8004bde: b2db uxtb r3, r3 8004be0: e00a b.n 8004bf8 break; case EDCAN_REG_SYS_UPTIME2: return (uptime_buffer>>16) & 0xFF; 8004be2: 4b08 ldr r3, [pc, #32] @ (8004c04 ) 8004be4: 681b ldr r3, [r3, #0] 8004be6: 0c1b lsrs r3, r3, #16 8004be8: b2db uxtb r3, r3 8004bea: e005 b.n 8004bf8 break; case EDCAN_REG_SYS_UPTIME3: return (uptime_buffer>>24) & 0xFF; 8004bec: 4b05 ldr r3, [pc, #20] @ (8004c04 ) 8004bee: 681b ldr r3, [r3, #0] 8004bf0: 0e1b lsrs r3, r3, #24 8004bf2: b2db uxtb r3, r3 8004bf4: e000 b.n 8004bf8 break; default: return 0x00; 8004bf6: 2300 movs r3, #0 } } 8004bf8: 4618 mov r0, r3 8004bfa: 3708 adds r7, #8 8004bfc: 46bd mov sp, r7 8004bfe: bd80 pop {r7, pc} 8004c00: 20003328 .word 0x20003328 8004c04: 2000332c .word 0x2000332c 08004c08 : * @brief Handler to get own register values * * @param addr: register address * @retval register value (uint8_t) */ uint8_t EDCAN_GetOwnRegisterValue (uint16_t addr){ 8004c08: b580 push {r7, lr} 8004c0a: b082 sub sp, #8 8004c0c: af00 add r7, sp, #0 8004c0e: 4603 mov r3, r0 8004c10: 80fb strh r3, [r7, #6] if(addr<256){ 8004c12: 88fb ldrh r3, [r7, #6] 8004c14: 2bff cmp r3, #255 @ 0xff 8004c16: d805 bhi.n 8004c24 return EDCAN_GetSystemRegisterValue(addr); // 0..255 8004c18: 88fb ldrh r3, [r7, #6] 8004c1a: 4618 mov r0, r3 8004c1c: f7ff ff90 bl 8004b40 8004c20: 4603 mov r3, r0 8004c22: e004 b.n 8004c2e }else { return EDCAN_GetUserRegisterValue(addr); // 256..2047 8004c24: 88fb ldrh r3, [r7, #6] 8004c26: 4618 mov r0, r3 8004c28: f7fe fcf2 bl 8003610 8004c2c: 4603 mov r3, r0 } } 8004c2e: 4618 mov r0, r3 8004c30: 3708 adds r7, #8 8004c32: 46bd mov sp, r7 8004c34: bd80 pop {r7, pc} 08004c36 : * DestinationID: Packet Destination ID * Addr: First register address in sequence * *data: pointer for data array * len: length of data (1..255) */ void EDCAN_ReadRequestHandler(uint8_t SourceID, uint8_t DestinationID, uint16_t Addr, uint8_t len){ 8004c36: b590 push {r4, r7, lr} 8004c38: b087 sub sp, #28 8004c3a: af00 add r7, sp, #0 8004c3c: 4604 mov r4, r0 8004c3e: 4608 mov r0, r1 8004c40: 4611 mov r1, r2 8004c42: 461a mov r2, r3 8004c44: 4623 mov r3, r4 8004c46: 71fb strb r3, [r7, #7] 8004c48: 4603 mov r3, r0 8004c4a: 71bb strb r3, [r7, #6] 8004c4c: 460b mov r3, r1 8004c4e: 80bb strh r3, [r7, #4] 8004c50: 4613 mov r3, r2 8004c52: 70fb strb r3, [r7, #3] //Получили пакет Read (запрошенное значение регистров) uint8_t TxData[8]; uint16_t AddrOffset = Addr; 8004c54: 88bb ldrh r3, [r7, #4] 8004c56: 82fb strh r3, [r7, #22] // printf("Destination ID = %d\n", DestinationID); // printf("Address = %d\n", Addr); // printf("Len = %d\n", len); // printf("\n"); while (len>0){ //по очереди перебираем все полученные регистры через Handler 8004c58: e051 b.n 8004cfe if(len>=8){ //если количество регистров больше 8, отправляем 8 и разбиваем на несколько пакетов 8004c5a: 78fb ldrb r3, [r7, #3] 8004c5c: 2b07 cmp r3, #7 8004c5e: d926 bls.n 8004cae for(uint8_t n = 0; n < 8; n++){ 8004c60: 2300 movs r3, #0 8004c62: 757b strb r3, [r7, #21] 8004c64: e012 b.n 8004c8c TxData[n] = EDCAN_GetOwnRegisterValue(n+AddrOffset); 8004c66: 7d7b ldrb r3, [r7, #21] 8004c68: b29a uxth r2, r3 8004c6a: 8afb ldrh r3, [r7, #22] 8004c6c: 4413 add r3, r2 8004c6e: b29b uxth r3, r3 8004c70: 7d7c ldrb r4, [r7, #21] 8004c72: 4618 mov r0, r3 8004c74: f7ff ffc8 bl 8004c08 8004c78: 4603 mov r3, r0 8004c7a: 461a mov r2, r3 8004c7c: f104 0318 add.w r3, r4, #24 8004c80: 443b add r3, r7 8004c82: f803 2c0c strb.w r2, [r3, #-12] for(uint8_t n = 0; n < 8; n++){ 8004c86: 7d7b ldrb r3, [r7, #21] 8004c88: 3301 adds r3, #1 8004c8a: 757b strb r3, [r7, #21] 8004c8c: 7d7b ldrb r3, [r7, #21] 8004c8e: 2b07 cmp r3, #7 8004c90: d9e9 bls.n 8004c66 //printf ("register[%d] = %d\n", n+AddrOffset, TxData[n]); } EDCAN_SendPacketRead(SourceID, AddrOffset, TxData, 8); /* отправляем ответный пакет со значениями собственных регистров */ 8004c92: f107 020c add.w r2, r7, #12 8004c96: 8af9 ldrh r1, [r7, #22] 8004c98: 79f8 ldrb r0, [r7, #7] 8004c9a: 2308 movs r3, #8 8004c9c: f7ff fc12 bl 80044c4 //printf ("sent%d, %d\n", AddrOffset, len); AddrOffset +=8; 8004ca0: 8afb ldrh r3, [r7, #22] 8004ca2: 3308 adds r3, #8 8004ca4: 82fb strh r3, [r7, #22] len -=8; 8004ca6: 78fb ldrb r3, [r7, #3] 8004ca8: 3b08 subs r3, #8 8004caa: 70fb strb r3, [r7, #3] 8004cac: e027 b.n 8004cfe }else{ for(uint8_t n = 0; n < len; n++){ 8004cae: 2300 movs r3, #0 8004cb0: 753b strb r3, [r7, #20] 8004cb2: e012 b.n 8004cda TxData[n] = EDCAN_GetOwnRegisterValue(n+AddrOffset); 8004cb4: 7d3b ldrb r3, [r7, #20] 8004cb6: b29a uxth r2, r3 8004cb8: 8afb ldrh r3, [r7, #22] 8004cba: 4413 add r3, r2 8004cbc: b29b uxth r3, r3 8004cbe: 7d3c ldrb r4, [r7, #20] 8004cc0: 4618 mov r0, r3 8004cc2: f7ff ffa1 bl 8004c08 8004cc6: 4603 mov r3, r0 8004cc8: 461a mov r2, r3 8004cca: f104 0318 add.w r3, r4, #24 8004cce: 443b add r3, r7 8004cd0: f803 2c0c strb.w r2, [r3, #-12] for(uint8_t n = 0; n < len; n++){ 8004cd4: 7d3b ldrb r3, [r7, #20] 8004cd6: 3301 adds r3, #1 8004cd8: 753b strb r3, [r7, #20] 8004cda: 7d3a ldrb r2, [r7, #20] 8004cdc: 78fb ldrb r3, [r7, #3] 8004cde: 429a cmp r2, r3 8004ce0: d3e8 bcc.n 8004cb4 //printf ("register[%d] = %d\n", n+AddrOffset, TxData[n]); } EDCAN_SendPacketRead(SourceID, AddrOffset, TxData, len); /* отправляем ответный пакет со значениями собственных регистров */ 8004ce2: 78fb ldrb r3, [r7, #3] 8004ce4: f107 020c add.w r2, r7, #12 8004ce8: 8af9 ldrh r1, [r7, #22] 8004cea: 79f8 ldrb r0, [r7, #7] 8004cec: f7ff fbea bl 80044c4 //printf ("sent%d, %d\n", AddrOffset, len); AddrOffset +=len; 8004cf0: 78fb ldrb r3, [r7, #3] 8004cf2: b29a uxth r2, r3 8004cf4: 8afb ldrh r3, [r7, #22] 8004cf6: 4413 add r3, r2 8004cf8: 82fb strh r3, [r7, #22] len = 0; 8004cfa: 2300 movs r3, #0 8004cfc: 70fb strb r3, [r7, #3] while (len>0){ //по очереди перебираем все полученные регистры через Handler 8004cfe: 78fb ldrb r3, [r7, #3] 8004d00: 2b00 cmp r3, #0 8004d02: d1aa bne.n 8004c5a } } // printf("\n"); } 8004d04: bf00 nop 8004d06: bf00 nop 8004d08: 371c adds r7, #28 8004d0a: 46bd mov sp, r7 8004d0c: bd90 pop {r4, r7, pc} ... 08004d10 : // EDCAN_printf(LOG_WARN, "LOG_WARN test\n"); // EDCAN_printf(LOG_NOTICE, "LOG_NOTICE test\n"); // EDCAN_printf(LOG_INFO, "LOG_INFO test\n"); // EDCAN_printf(LOG_DEBUG, "LOG_DEBUG test\n"); void EDCAN_printf(EDCAN_LogLevel_t loglevel, const char *format, ...) { 8004d10: b40e push {r1, r2, r3} 8004d12: b580 push {r7, lr} 8004d14: f2ad 4d14 subw sp, sp, #1044 @ 0x414 8004d18: af00 add r7, sp, #0 8004d1a: 4602 mov r2, r0 8004d1c: f507 6382 add.w r3, r7, #1040 @ 0x410 8004d20: f2a3 4309 subw r3, r3, #1033 @ 0x409 8004d24: 701a strb r2, [r3, #0] char buffer[1024]; // Размер буфера можно изменить в зависимости от потребностей va_list args; va_start(args, format); 8004d26: f507 6284 add.w r2, r7, #1056 @ 0x420 8004d2a: f507 6382 add.w r3, r7, #1040 @ 0x410 8004d2e: f5a3 6381 sub.w r3, r3, #1032 @ 0x408 8004d32: 601a str r2, [r3, #0] int offset = snprintf(buffer, sizeof(buffer), "%d", loglevel); // Записываем лог-уровень в начало 8004d34: f507 6382 add.w r3, r7, #1040 @ 0x410 8004d38: f2a3 4309 subw r3, r3, #1033 @ 0x409 8004d3c: 781b ldrb r3, [r3, #0] 8004d3e: f107 000c add.w r0, r7, #12 8004d42: 4a17 ldr r2, [pc, #92] @ (8004da0 ) 8004d44: f44f 6180 mov.w r1, #1024 @ 0x400 8004d48: f004 ffe8 bl 8009d1c 8004d4c: f8c7 040c str.w r0, [r7, #1036] @ 0x40c vsnprintf(buffer + offset, sizeof(buffer) - offset, format, args); // Записываем основное сообщение с учётом смещения 8004d50: f8d7 340c ldr.w r3, [r7, #1036] @ 0x40c 8004d54: f107 020c add.w r2, r7, #12 8004d58: 18d0 adds r0, r2, r3 8004d5a: f8d7 340c ldr.w r3, [r7, #1036] @ 0x40c 8004d5e: f5c3 6180 rsb r1, r3, #1024 @ 0x400 8004d62: f507 6382 add.w r3, r7, #1040 @ 0x410 8004d66: f5a3 6381 sub.w r3, r3, #1032 @ 0x408 8004d6a: 681b ldr r3, [r3, #0] 8004d6c: f8d7 241c ldr.w r2, [r7, #1052] @ 0x41c 8004d70: f005 f8f6 bl 8009f60 va_end(args); EDCAN_Log(buffer, strlen(buffer)); 8004d74: f107 030c add.w r3, r7, #12 8004d78: 4618 mov r0, r3 8004d7a: f7fb fa55 bl 8000228 8004d7e: 4603 mov r3, r0 8004d80: b29a uxth r2, r3 8004d82: f107 030c add.w r3, r7, #12 8004d86: 4611 mov r1, r2 8004d88: 4618 mov r0, r3 8004d8a: f000 f80b bl 8004da4 } 8004d8e: bf00 nop 8004d90: f207 4714 addw r7, r7, #1044 @ 0x414 8004d94: 46bd mov sp, r7 8004d96: e8bd 4080 ldmia.w sp!, {r7, lr} 8004d9a: b003 add sp, #12 8004d9c: 4770 bx lr 8004d9e: bf00 nop 8004da0: 0800df68 .word 0x0800df68 08004da4 : * @param DestinationID: Packet Destination ID * @param RegAddr: First register address in sequence * @param *data: pointer to data array to be send * @param len: length of data to be sent */ void EDCAN_Log(const char *data, uint16_t len) { 8004da4: b580 push {r7, lr} 8004da6: b086 sub sp, #24 8004da8: af00 add r7, sp, #0 8004daa: 6078 str r0, [r7, #4] 8004dac: 460b mov r3, r1 8004dae: 807b strh r3, [r7, #2] uint8_t DestinationID = 0x00; 8004db0: 2300 movs r3, #0 8004db2: 73fb strb r3, [r7, #15] uint16_t remainingBytes = len;//strlen(data)+1; //add zero symbol 8004db4: 887b ldrh r3, [r7, #2] 8004db6: 82fb strh r3, [r7, #22] uint16_t currentRegAddr = 0x00; //LOG reg addr 8004db8: 2300 movs r3, #0 8004dba: 81bb strh r3, [r7, #12] uint8_t *currentDataPtr = data; 8004dbc: 687b ldr r3, [r7, #4] 8004dbe: 613b str r3, [r7, #16] while (remainingBytes > 0) { 8004dc0: e014 b.n 8004dec uint8_t packetSize = (remainingBytes > 8) ? 8 : remainingBytes; 8004dc2: 8afb ldrh r3, [r7, #22] 8004dc4: 2b08 cmp r3, #8 8004dc6: bf28 it cs 8004dc8: 2308 movcs r3, #8 8004dca: b29b uxth r3, r3 8004dcc: 72fb strb r3, [r7, #11] EDCAN_SendPacketLog(DestinationID, currentRegAddr, currentDataPtr, packetSize); 8004dce: 7afb ldrb r3, [r7, #11] 8004dd0: 89b9 ldrh r1, [r7, #12] 8004dd2: 7bf8 ldrb r0, [r7, #15] 8004dd4: 693a ldr r2, [r7, #16] 8004dd6: f000 f811 bl 8004dfc remainingBytes -= packetSize; 8004dda: 7afb ldrb r3, [r7, #11] 8004ddc: b29b uxth r3, r3 8004dde: 8afa ldrh r2, [r7, #22] 8004de0: 1ad3 subs r3, r2, r3 8004de2: 82fb strh r3, [r7, #22] //currentRegAddr += packetSize; // Assuming the register address increments by the number of bytes sent currentDataPtr += packetSize; 8004de4: 7afb ldrb r3, [r7, #11] 8004de6: 693a ldr r2, [r7, #16] 8004de8: 4413 add r3, r2 8004dea: 613b str r3, [r7, #16] while (remainingBytes > 0) { 8004dec: 8afb ldrh r3, [r7, #22] 8004dee: 2b00 cmp r3, #0 8004df0: d1e7 bne.n 8004dc2 } } 8004df2: bf00 nop 8004df4: bf00 nop 8004df6: 3718 adds r7, #24 8004df8: 46bd mov sp, r7 8004dfa: bd80 pop {r7, pc} 08004dfc : * @param DestinationID: Packet Destination ID * @param RegAddr: First register address in sequence * @param *data: pointer to data array to be send * @param len: length of data (1..8) */ void EDCAN_SendPacketLog(uint8_t DestinationID, uint16_t RegAddr, const uint8_t *data, uint8_t len){ 8004dfc: b580 push {r7, lr} 8004dfe: b08c sub sp, #48 @ 0x30 8004e00: af00 add r7, sp, #0 8004e02: 603a str r2, [r7, #0] 8004e04: 461a mov r2, r3 8004e06: 4603 mov r3, r0 8004e08: 71fb strb r3, [r7, #7] 8004e0a: 460b mov r3, r1 8004e0c: 80bb strh r3, [r7, #4] 8004e0e: 4613 mov r3, r2 8004e10: 71bb strb r3, [r7, #6] EDCAN_TxFrame_t tx_frame; EDCAN_frameId_t ExtID; //CAN_TxHeaderTypeDef tx_header; //uint32_t tx_mailbox; ExtID.DestinationID = DestinationID; 8004e12: 79fb ldrb r3, [r7, #7] 8004e14: 733b strb r3, [r7, #12] ExtID.SourceID = ED_OwnID; 8004e16: 4b15 ldr r3, [pc, #84] @ (8004e6c ) 8004e18: 781b ldrb r3, [r3, #0] 8004e1a: 737b strb r3, [r7, #13] ExtID.RegisterAddress = RegAddr; 8004e1c: 88bb ldrh r3, [r7, #4] 8004e1e: f3c3 030a ubfx r3, r3, #0, #11 8004e22: b29a uxth r2, r3 8004e24: 89fb ldrh r3, [r7, #14] 8004e26: f362 030a bfi r3, r2, #0, #11 8004e2a: 81fb strh r3, [r7, #14] ExtID.PacketType = ED_LOG; 8004e2c: 7bfb ldrb r3, [r7, #15] 8004e2e: f043 0318 orr.w r3, r3, #24 8004e32: 73fb strb r3, [r7, #15] memcpy(&tx_frame.tx_header.ExtId, &ExtID, sizeof(ExtID)); 8004e34: 68fb ldr r3, [r7, #12] 8004e36: 617b str r3, [r7, #20] tx_frame.tx_header.RTR = CAN_RTR_DATA; 8004e38: 2300 movs r3, #0 8004e3a: 61fb str r3, [r7, #28] tx_frame.tx_header.IDE = CAN_ID_EXT; 8004e3c: 2304 movs r3, #4 8004e3e: 61bb str r3, [r7, #24] tx_frame.tx_header.DLC = len; 8004e40: 79bb ldrb r3, [r7, #6] 8004e42: 623b str r3, [r7, #32] memcpy(&tx_frame.data, data, len); 8004e44: 79ba ldrb r2, [r7, #6] 8004e46: f107 0310 add.w r3, r7, #16 8004e4a: 3318 adds r3, #24 8004e4c: 6839 ldr r1, [r7, #0] 8004e4e: 4618 mov r0, r3 8004e50: f005 fe11 bl 800aa76 //EDCAN_AddTxMessage(&ED_CAN_INSTANCE, &tx_header, data, &tx_mailbox); //Добавление пакета в буфер EDCAN_TxBufferAdd(&tx_frame); 8004e54: f107 0310 add.w r3, r7, #16 8004e58: 4618 mov r0, r3 8004e5a: f7ff fc23 bl 80046a4 //Также, попытаемся сразу перенести пакет в CAN (если там есть свободное место) //Если свободного места нету, то пакет перенесется в CAN позже по прерыванию освобождения буфера EDCAN_ExchangeTxBuffer(); 8004e5e: f7ff fce1 bl 8004824 } 8004e62: bf00 nop 8004e64: 3730 adds r7, #48 @ 0x30 8004e66: 46bd mov sp, r7 8004e68: bd80 pop {r7, pc} 8004e6a: bf00 nop 8004e6c: 200005ce .word 0x200005ce 08004e70
: /** * @brief The application entry point. * @retval int */ int main(void) { 8004e70: b580 push {r7, lr} 8004e72: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8004e74: f000 fc86 bl 8005784 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8004e78: f000 f842 bl 8004f00 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8004e7c: f7fe fddc bl 8003a38 MX_ADC1_Init(); 8004e80: f7fc fb88 bl 8001594 MX_CAN1_Init(); 8004e84: f7fc fd42 bl 800190c MX_CAN2_Init(); 8004e88: f7fc fd76 bl 8001978 MX_USART2_UART_Init(); 8004e8c: f000 fbc8 bl 8005620 MX_RTC_Init(); 8004e90: f000 f8ac bl 8004fec /* USER CODE BEGIN 2 */ CAN_ReInit(); 8004e94: f7ff fa8a bl 80043ac Init_Peripheral(); 8004e98: f7fc fc32 bl 8001700 HAL_Delay(300); 8004e9c: f44f 7096 mov.w r0, #300 @ 0x12c 8004ea0: f000 fcd2 bl 8005848 GBT_Init(); 8004ea4: f7fc fe7c bl 8001ba0 set_Time(1721651966); 8004ea8: 4812 ldr r0, [pc, #72] @ (8004ef4 ) 8004eaa: f000 f8e9 bl 8005080 printf("Startup (type \'help\' for command list)\n"); 8004eae: 4812 ldr r0, [pc, #72] @ (8004ef8 ) 8004eb0: f005 f8cc bl 800a04c debug_init(); 8004eb4: f7fd ff44 bl 8002d40 EDCAN_Init(SW_GetAddr()); //0x20..0x23 8004eb8: f7fc fd02 bl 80018c0 8004ebc: 4603 mov r3, r0 8004ebe: 4618 mov r0, r3 8004ec0: f7ff fa64 bl 800438c EDCAN_printf(LOG_INFO, "Startup\n"); 8004ec4: 490d ldr r1, [pc, #52] @ (8004efc ) 8004ec6: 2006 movs r0, #6 8004ec8: f7ff ff22 bl 8004d10 //EDCAN_Init(0x20); //Адрес EDCAN GBT_CAN_ReInit(); 8004ecc: f7fe ffe8 bl 8003ea0 CAN_ReInit(); 8004ed0: f7ff fa6c bl 80043ac CONN_Init(); 8004ed4: f7fd fd17 bl 8002906 { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ // HAL_Delay(1); EDCAN_Loop(); 8004ed8: f7ff fb2e bl 8004538 //can_task(); debug_task(); 8004edc: f7fe faae bl 800343c CONN_CC_ReadStateFiltered(); 8004ee0: f7fd fde4 bl 8002aac GBT_ManageLock(); 8004ee4: f7ff f944 bl 8004170 CONN_Task(); 8004ee8: f7fd fd14 bl 8002914 GBT_ChargerTask(); 8004eec: f7fc fe68 bl 8001bc0 { 8004ef0: bf00 nop 8004ef2: e7f1 b.n 8004ed8 8004ef4: 669e52fe .word 0x669e52fe 8004ef8: 0800df6c .word 0x0800df6c 8004efc: 0800df94 .word 0x0800df94 08004f00 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8004f00: b580 push {r7, lr} 8004f02: b09c sub sp, #112 @ 0x70 8004f04: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8004f06: f107 0338 add.w r3, r7, #56 @ 0x38 8004f0a: 2238 movs r2, #56 @ 0x38 8004f0c: 2100 movs r1, #0 8004f0e: 4618 mov r0, r3 8004f10: f005 f8b6 bl 800a080 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8004f14: f107 0324 add.w r3, r7, #36 @ 0x24 8004f18: 2200 movs r2, #0 8004f1a: 601a str r2, [r3, #0] 8004f1c: 605a str r2, [r3, #4] 8004f1e: 609a str r2, [r3, #8] 8004f20: 60da str r2, [r3, #12] 8004f22: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8004f24: 1d3b adds r3, r7, #4 8004f26: 2220 movs r2, #32 8004f28: 2100 movs r1, #0 8004f2a: 4618 mov r0, r3 8004f2c: f005 f8a8 bl 800a080 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; 8004f30: 2305 movs r3, #5 8004f32: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8004f34: f44f 3380 mov.w r3, #65536 @ 0x10000 8004f38: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5; 8004f3a: 2304 movs r3, #4 8004f3c: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.LSEState = RCC_LSE_ON; 8004f3e: 2301 movs r3, #1 8004f40: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8004f42: 2301 movs r3, #1 8004f44: 64fb str r3, [r7, #76] @ 0x4c RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2; 8004f46: f44f 3380 mov.w r3, #65536 @ 0x10000 8004f4a: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8004f4c: 2302 movs r3, #2 8004f4e: 65bb str r3, [r7, #88] @ 0x58 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8004f50: f44f 3380 mov.w r3, #65536 @ 0x10000 8004f54: 65fb str r3, [r7, #92] @ 0x5c RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 8004f56: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000 8004f5a: 663b str r3, [r7, #96] @ 0x60 RCC_OscInitStruct.PLL2.PLL2State = RCC_PLL2_ON; 8004f5c: 2302 movs r3, #2 8004f5e: 667b str r3, [r7, #100] @ 0x64 RCC_OscInitStruct.PLL2.PLL2MUL = RCC_PLL2_MUL8; 8004f60: f44f 63c0 mov.w r3, #1536 @ 0x600 8004f64: 66bb str r3, [r7, #104] @ 0x68 RCC_OscInitStruct.PLL2.HSEPrediv2Value = RCC_HSE_PREDIV2_DIV5; 8004f66: 2340 movs r3, #64 @ 0x40 8004f68: 66fb str r3, [r7, #108] @ 0x6c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8004f6a: f107 0338 add.w r3, r7, #56 @ 0x38 8004f6e: 4618 mov r0, r3 8004f70: f002 fc4e bl 8007810 8004f74: 4603 mov r3, r0 8004f76: 2b00 cmp r3, #0 8004f78: d001 beq.n 8004f7e { Error_Handler(); 8004f7a: f000 f831 bl 8004fe0 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8004f7e: 230f movs r3, #15 8004f80: 627b str r3, [r7, #36] @ 0x24 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8004f82: 2302 movs r3, #2 8004f84: 62bb str r3, [r7, #40] @ 0x28 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8004f86: 2300 movs r3, #0 8004f88: 62fb str r3, [r7, #44] @ 0x2c RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8004f8a: f44f 6380 mov.w r3, #1024 @ 0x400 8004f8e: 633b str r3, [r7, #48] @ 0x30 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8004f90: 2300 movs r3, #0 8004f92: 637b str r3, [r7, #52] @ 0x34 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8004f94: f107 0324 add.w r3, r7, #36 @ 0x24 8004f98: 2102 movs r1, #2 8004f9a: 4618 mov r0, r3 8004f9c: f002 ff4e bl 8007e3c 8004fa0: 4603 mov r3, r0 8004fa2: 2b00 cmp r3, #0 8004fa4: d001 beq.n 8004faa { Error_Handler(); 8004fa6: f000 f81b bl 8004fe0 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC; 8004faa: 2303 movs r3, #3 8004fac: 607b str r3, [r7, #4] PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 8004fae: f44f 7380 mov.w r3, #256 @ 0x100 8004fb2: 60bb str r3, [r7, #8] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 8004fb4: f44f 4300 mov.w r3, #32768 @ 0x8000 8004fb8: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8004fba: 1d3b adds r3, r7, #4 8004fbc: 4618 mov r0, r3 8004fbe: f003 f955 bl 800826c 8004fc2: 4603 mov r3, r0 8004fc4: 2b00 cmp r3, #0 8004fc6: d001 beq.n 8004fcc { Error_Handler(); 8004fc8: f000 f80a bl 8004fe0 } /** Configure the Systick interrupt time */ __HAL_RCC_PLLI2S_ENABLE(); 8004fcc: 4b03 ldr r3, [pc, #12] @ (8004fdc ) 8004fce: 2201 movs r2, #1 8004fd0: 601a str r2, [r3, #0] } 8004fd2: bf00 nop 8004fd4: 3770 adds r7, #112 @ 0x70 8004fd6: 46bd mov sp, r7 8004fd8: bd80 pop {r7, pc} 8004fda: bf00 nop 8004fdc: 42420070 .word 0x42420070 08004fe0 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8004fe0: b480 push {r7} 8004fe2: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 8004fe4: b672 cpsid i } 8004fe6: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8004fe8: bf00 nop 8004fea: e7fd b.n 8004fe8 08004fec : RTC_HandleTypeDef hrtc; /* RTC init function */ void MX_RTC_Init(void) { 8004fec: b580 push {r7, lr} 8004fee: af00 add r7, sp, #0 /* USER CODE END RTC_Init 1 */ /** Initialize RTC Only */ hrtc.Instance = RTC; 8004ff0: 4b0a ldr r3, [pc, #40] @ (800501c ) 8004ff2: 4a0b ldr r2, [pc, #44] @ (8005020 ) 8004ff4: 601a str r2, [r3, #0] hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND; 8004ff6: 4b09 ldr r3, [pc, #36] @ (800501c ) 8004ff8: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8004ffc: 605a str r2, [r3, #4] hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM; 8004ffe: 4b07 ldr r3, [pc, #28] @ (800501c ) 8005000: f44f 7280 mov.w r2, #256 @ 0x100 8005004: 609a str r2, [r3, #8] if (HAL_RTC_Init(&hrtc) != HAL_OK) 8005006: 4805 ldr r0, [pc, #20] @ (800501c ) 8005008: f003 fbc4 bl 8008794 800500c: 4603 mov r3, r0 800500e: 2b00 cmp r3, #0 8005010: d001 beq.n 8005016 { Error_Handler(); 8005012: f7ff ffe5 bl 8004fe0 } /* USER CODE BEGIN RTC_Init 2 */ /* USER CODE END RTC_Init 2 */ } 8005016: bf00 nop 8005018: bd80 pop {r7, pc} 800501a: bf00 nop 800501c: 20003330 .word 0x20003330 8005020: 40002800 .word 0x40002800 08005024 : void HAL_RTC_MspInit(RTC_HandleTypeDef* rtcHandle) { 8005024: b580 push {r7, lr} 8005026: b084 sub sp, #16 8005028: af00 add r7, sp, #0 800502a: 6078 str r0, [r7, #4] if(rtcHandle->Instance==RTC) 800502c: 687b ldr r3, [r7, #4] 800502e: 681b ldr r3, [r3, #0] 8005030: 4a0b ldr r2, [pc, #44] @ (8005060 ) 8005032: 4293 cmp r3, r2 8005034: d110 bne.n 8005058 { /* USER CODE BEGIN RTC_MspInit 0 */ /* USER CODE END RTC_MspInit 0 */ HAL_PWR_EnableBkUpAccess(); 8005036: f002 fbdf bl 80077f8 /* Enable BKP CLK enable for backup registers */ __HAL_RCC_BKP_CLK_ENABLE(); 800503a: 4b0a ldr r3, [pc, #40] @ (8005064 ) 800503c: 69db ldr r3, [r3, #28] 800503e: 4a09 ldr r2, [pc, #36] @ (8005064 ) 8005040: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 8005044: 61d3 str r3, [r2, #28] 8005046: 4b07 ldr r3, [pc, #28] @ (8005064 ) 8005048: 69db ldr r3, [r3, #28] 800504a: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 800504e: 60fb str r3, [r7, #12] 8005050: 68fb ldr r3, [r7, #12] /* RTC clock enable */ __HAL_RCC_RTC_ENABLE(); 8005052: 4b05 ldr r3, [pc, #20] @ (8005068 ) 8005054: 2201 movs r2, #1 8005056: 601a str r2, [r3, #0] /* USER CODE BEGIN RTC_MspInit 1 */ /* USER CODE END RTC_MspInit 1 */ } } 8005058: bf00 nop 800505a: 3710 adds r7, #16 800505c: 46bd mov sp, r7 800505e: bd80 pop {r7, pc} 8005060: 40002800 .word 0x40002800 8005064: 40021000 .word 0x40021000 8005068: 4242043c .word 0x4242043c 0800506c : static uint32_t RTC1_ReadTimeCounter(RTC_HandleTypeDef *hrtc); static HAL_StatusTypeDef RTC1_ExitInitMode(RTC_HandleTypeDef *hrtc); static HAL_StatusTypeDef RTC1_EnterInitMode(RTC_HandleTypeDef *hrtc); uint32_t get_Current_Time(){ 800506c: b580 push {r7, lr} 800506e: af00 add r7, sp, #0 return RTC1_ReadTimeCounter(&hrtc); 8005070: 4802 ldr r0, [pc, #8] @ (800507c ) 8005072: f000 f8fb bl 800526c 8005076: 4603 mov r3, r0 } 8005078: 4618 mov r0, r3 800507a: bd80 pop {r7, pc} 800507c: 20003330 .word 0x20003330 08005080 : void set_Time(uint32_t unix_time){ 8005080: b580 push {r7, lr} 8005082: b082 sub sp, #8 8005084: af00 add r7, sp, #0 8005086: 6078 str r0, [r7, #4] RTC1_WriteTimeCounter(&hrtc, unix_time); 8005088: 6879 ldr r1, [r7, #4] 800508a: 4803 ldr r0, [pc, #12] @ (8005098 ) 800508c: f000 f91e bl 80052cc } 8005090: bf00 nop 8005092: 3708 adds r7, #8 8005094: 46bd mov sp, r7 8005096: bd80 pop {r7, pc} 8005098: 20003330 .word 0x20003330 0800509c : uint8_t to_bcd(int value) { 800509c: b480 push {r7} 800509e: b083 sub sp, #12 80050a0: af00 add r7, sp, #0 80050a2: 6078 str r0, [r7, #4] return ((value / 10) << 4) | (value % 10); 80050a4: 687b ldr r3, [r7, #4] 80050a6: 4a0e ldr r2, [pc, #56] @ (80050e0 ) 80050a8: fb82 1203 smull r1, r2, r2, r3 80050ac: 1092 asrs r2, r2, #2 80050ae: 17db asrs r3, r3, #31 80050b0: 1ad3 subs r3, r2, r3 80050b2: 011b lsls r3, r3, #4 80050b4: b258 sxtb r0, r3 80050b6: 687a ldr r2, [r7, #4] 80050b8: 4b09 ldr r3, [pc, #36] @ (80050e0 ) 80050ba: fb83 1302 smull r1, r3, r3, r2 80050be: 1099 asrs r1, r3, #2 80050c0: 17d3 asrs r3, r2, #31 80050c2: 1ac9 subs r1, r1, r3 80050c4: 460b mov r3, r1 80050c6: 009b lsls r3, r3, #2 80050c8: 440b add r3, r1 80050ca: 005b lsls r3, r3, #1 80050cc: 1ad1 subs r1, r2, r3 80050ce: b24b sxtb r3, r1 80050d0: 4303 orrs r3, r0 80050d2: b25b sxtb r3, r3 80050d4: b2db uxtb r3, r3 } 80050d6: 4618 mov r0, r3 80050d8: 370c adds r7, #12 80050da: 46bd mov sp, r7 80050dc: bc80 pop {r7} 80050de: 4770 bx lr 80050e0: 66666667 .word 0x66666667 080050e4 : void unix_to_bcd(uint32_t unix_time, uint8_t *time) { 80050e4: b590 push {r4, r7, lr} 80050e6: b087 sub sp, #28 80050e8: af00 add r7, sp, #0 80050ea: 6078 str r0, [r7, #4] 80050ec: 6039 str r1, [r7, #0] struct tm *tm_info; time_t raw_time = (time_t)unix_time; 80050ee: 6879 ldr r1, [r7, #4] 80050f0: 2000 movs r0, #0 80050f2: 460a mov r2, r1 80050f4: 4603 mov r3, r0 80050f6: e9c7 2302 strd r2, r3, [r7, #8] tm_info = gmtime(&raw_time); 80050fa: f107 0308 add.w r3, r7, #8 80050fe: 4618 mov r0, r3 8005100: f004 ffc6 bl 800a090 8005104: 6178 str r0, [r7, #20] time[0] = to_bcd(tm_info->tm_sec); 8005106: 697b ldr r3, [r7, #20] 8005108: 681b ldr r3, [r3, #0] 800510a: 4618 mov r0, r3 800510c: f7ff ffc6 bl 800509c 8005110: 4603 mov r3, r0 8005112: 461a mov r2, r3 8005114: 683b ldr r3, [r7, #0] 8005116: 701a strb r2, [r3, #0] time[1] = to_bcd(tm_info->tm_min); 8005118: 697b ldr r3, [r7, #20] 800511a: 685a ldr r2, [r3, #4] 800511c: 683b ldr r3, [r7, #0] 800511e: 1c5c adds r4, r3, #1 8005120: 4610 mov r0, r2 8005122: f7ff ffbb bl 800509c 8005126: 4603 mov r3, r0 8005128: 7023 strb r3, [r4, #0] time[2] = to_bcd(tm_info->tm_hour); 800512a: 697b ldr r3, [r7, #20] 800512c: 689a ldr r2, [r3, #8] 800512e: 683b ldr r3, [r7, #0] 8005130: 1c9c adds r4, r3, #2 8005132: 4610 mov r0, r2 8005134: f7ff ffb2 bl 800509c 8005138: 4603 mov r3, r0 800513a: 7023 strb r3, [r4, #0] time[3] = to_bcd(tm_info->tm_mday); 800513c: 697b ldr r3, [r7, #20] 800513e: 68da ldr r2, [r3, #12] 8005140: 683b ldr r3, [r7, #0] 8005142: 1cdc adds r4, r3, #3 8005144: 4610 mov r0, r2 8005146: f7ff ffa9 bl 800509c 800514a: 4603 mov r3, r0 800514c: 7023 strb r3, [r4, #0] time[4] = to_bcd(tm_info->tm_mon + 1); // tm_mon is 0-11 800514e: 697b ldr r3, [r7, #20] 8005150: 691b ldr r3, [r3, #16] 8005152: 1c5a adds r2, r3, #1 8005154: 683b ldr r3, [r7, #0] 8005156: 1d1c adds r4, r3, #4 8005158: 4610 mov r0, r2 800515a: f7ff ff9f bl 800509c 800515e: 4603 mov r3, r0 8005160: 7023 strb r3, [r4, #0] time[5] = to_bcd((tm_info->tm_year + 1900) % 100); // Year in 2 digits 8005162: 697b ldr r3, [r7, #20] 8005164: 695b ldr r3, [r3, #20] 8005166: f203 736c addw r3, r3, #1900 @ 0x76c 800516a: 4a13 ldr r2, [pc, #76] @ (80051b8 ) 800516c: fb82 1203 smull r1, r2, r2, r3 8005170: 1151 asrs r1, r2, #5 8005172: 17da asrs r2, r3, #31 8005174: 1a8a subs r2, r1, r2 8005176: 2164 movs r1, #100 @ 0x64 8005178: fb01 f202 mul.w r2, r1, r2 800517c: 1a9a subs r2, r3, r2 800517e: 683b ldr r3, [r7, #0] 8005180: 1d5c adds r4, r3, #5 8005182: 4610 mov r0, r2 8005184: f7ff ff8a bl 800509c 8005188: 4603 mov r3, r0 800518a: 7023 strb r3, [r4, #0] time[6] = to_bcd((tm_info->tm_year + 1900) / 100); // Century in 2 digits 800518c: 697b ldr r3, [r7, #20] 800518e: 695b ldr r3, [r3, #20] 8005190: f203 736c addw r3, r3, #1900 @ 0x76c 8005194: 4a08 ldr r2, [pc, #32] @ (80051b8 ) 8005196: fb82 1203 smull r1, r2, r2, r3 800519a: 1152 asrs r2, r2, #5 800519c: 17db asrs r3, r3, #31 800519e: 1ad2 subs r2, r2, r3 80051a0: 683b ldr r3, [r7, #0] 80051a2: 1d9c adds r4, r3, #6 80051a4: 4610 mov r0, r2 80051a6: f7ff ff79 bl 800509c 80051aa: 4603 mov r3, r0 80051ac: 7023 strb r3, [r4, #0] } 80051ae: bf00 nop 80051b0: 371c adds r7, #28 80051b2: 46bd mov sp, r7 80051b4: bd90 pop {r4, r7, pc} 80051b6: bf00 nop 80051b8: 51eb851f .word 0x51eb851f 080051bc : void writeTimeReg(uint8_t reg_number, uint8_t value){ 80051bc: b580 push {r7, lr} 80051be: b082 sub sp, #8 80051c0: af00 add r7, sp, #0 80051c2: 4603 mov r3, r0 80051c4: 460a mov r2, r1 80051c6: 71fb strb r3, [r7, #7] 80051c8: 4613 mov r3, r2 80051ca: 71bb strb r3, [r7, #6] tmp_time[reg_number] = value; 80051cc: 79fb ldrb r3, [r7, #7] 80051ce: 490e ldr r1, [pc, #56] @ (8005208 ) 80051d0: 79ba ldrb r2, [r7, #6] 80051d2: 54ca strb r2, [r1, r3] if(reg_number == 3) set_Time((tmp_time[0])+(tmp_time[1]<<8)+(tmp_time[2]<<16)+(tmp_time[3]<<24)); 80051d4: 79fb ldrb r3, [r7, #7] 80051d6: 2b03 cmp r3, #3 80051d8: d111 bne.n 80051fe 80051da: 4b0b ldr r3, [pc, #44] @ (8005208 ) 80051dc: 781b ldrb r3, [r3, #0] 80051de: 461a mov r2, r3 80051e0: 4b09 ldr r3, [pc, #36] @ (8005208 ) 80051e2: 785b ldrb r3, [r3, #1] 80051e4: 021b lsls r3, r3, #8 80051e6: 441a add r2, r3 80051e8: 4b07 ldr r3, [pc, #28] @ (8005208 ) 80051ea: 789b ldrb r3, [r3, #2] 80051ec: 041b lsls r3, r3, #16 80051ee: 441a add r2, r3 80051f0: 4b05 ldr r3, [pc, #20] @ (8005208 ) 80051f2: 78db ldrb r3, [r3, #3] 80051f4: 061b lsls r3, r3, #24 80051f6: 4413 add r3, r2 80051f8: 4618 mov r0, r3 80051fa: f7ff ff41 bl 8005080 }; 80051fe: bf00 nop 8005200: 3708 adds r7, #8 8005202: 46bd mov sp, r7 8005204: bd80 pop {r7, pc} 8005206: bf00 nop 8005208: 20003344 .word 0x20003344 0800520c : uint8_t getTimeReg(uint8_t reg_number){ 800520c: b580 push {r7, lr} 800520e: b082 sub sp, #8 8005210: af00 add r7, sp, #0 8005212: 4603 mov r3, r0 8005214: 71fb strb r3, [r7, #7] if(reg_number == 0){ 8005216: 79fb ldrb r3, [r7, #7] 8005218: 2b00 cmp r3, #0 800521a: d108 bne.n 800522e tmp_time32 = get_Current_Time(); 800521c: f7ff ff26 bl 800506c 8005220: 4603 mov r3, r0 8005222: 4a11 ldr r2, [pc, #68] @ (8005268 ) 8005224: 6013 str r3, [r2, #0] return tmp_time32 & 0xFF; 8005226: 4b10 ldr r3, [pc, #64] @ (8005268 ) 8005228: 681b ldr r3, [r3, #0] 800522a: b2db uxtb r3, r3 800522c: e018 b.n 8005260 }else if(reg_number == 1){ 800522e: 79fb ldrb r3, [r7, #7] 8005230: 2b01 cmp r3, #1 8005232: d104 bne.n 800523e return (tmp_time32>>8) & 0xFF; 8005234: 4b0c ldr r3, [pc, #48] @ (8005268 ) 8005236: 681b ldr r3, [r3, #0] 8005238: 0a1b lsrs r3, r3, #8 800523a: b2db uxtb r3, r3 800523c: e010 b.n 8005260 }else if(reg_number == 2){ 800523e: 79fb ldrb r3, [r7, #7] 8005240: 2b02 cmp r3, #2 8005242: d104 bne.n 800524e return (tmp_time32>>16) & 0xFF; 8005244: 4b08 ldr r3, [pc, #32] @ (8005268 ) 8005246: 681b ldr r3, [r3, #0] 8005248: 0c1b lsrs r3, r3, #16 800524a: b2db uxtb r3, r3 800524c: e008 b.n 8005260 }else if(reg_number == 3){ 800524e: 79fb ldrb r3, [r7, #7] 8005250: 2b03 cmp r3, #3 8005252: d104 bne.n 800525e return (tmp_time32>>24) & 0xFF; 8005254: 4b04 ldr r3, [pc, #16] @ (8005268 ) 8005256: 681b ldr r3, [r3, #0] 8005258: 0e1b lsrs r3, r3, #24 800525a: b2db uxtb r3, r3 800525c: e000 b.n 8005260 }else{ return 0x00; 800525e: 2300 movs r3, #0 } }; 8005260: 4618 mov r0, r3 8005262: 3708 adds r7, #8 8005264: 46bd mov sp, r7 8005266: bd80 pop {r7, pc} 8005268: 20003348 .word 0x20003348 0800526c : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval Time counter */ static uint32_t RTC1_ReadTimeCounter(RTC_HandleTypeDef *hrtc) { 800526c: b480 push {r7} 800526e: b087 sub sp, #28 8005270: af00 add r7, sp, #0 8005272: 6078 str r0, [r7, #4] uint16_t high1 = 0U, high2 = 0U, low = 0U; 8005274: 2300 movs r3, #0 8005276: 827b strh r3, [r7, #18] 8005278: 2300 movs r3, #0 800527a: 823b strh r3, [r7, #16] 800527c: 2300 movs r3, #0 800527e: 81fb strh r3, [r7, #14] uint32_t timecounter = 0U; 8005280: 2300 movs r3, #0 8005282: 617b str r3, [r7, #20] high1 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT); 8005284: 687b ldr r3, [r7, #4] 8005286: 681b ldr r3, [r3, #0] 8005288: 699b ldr r3, [r3, #24] 800528a: 827b strh r3, [r7, #18] low = READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT); 800528c: 687b ldr r3, [r7, #4] 800528e: 681b ldr r3, [r3, #0] 8005290: 69db ldr r3, [r3, #28] 8005292: 81fb strh r3, [r7, #14] high2 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT); 8005294: 687b ldr r3, [r7, #4] 8005296: 681b ldr r3, [r3, #0] 8005298: 699b ldr r3, [r3, #24] 800529a: 823b strh r3, [r7, #16] if (high1 != high2) 800529c: 8a7a ldrh r2, [r7, #18] 800529e: 8a3b ldrh r3, [r7, #16] 80052a0: 429a cmp r2, r3 80052a2: d008 beq.n 80052b6 { /* In this case the counter roll over during reading of CNTL and CNTH registers, read again CNTL register then return the counter value */ timecounter = (((uint32_t) high2 << 16U) | READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT)); 80052a4: 8a3b ldrh r3, [r7, #16] 80052a6: 041a lsls r2, r3, #16 80052a8: 687b ldr r3, [r7, #4] 80052aa: 681b ldr r3, [r3, #0] 80052ac: 69db ldr r3, [r3, #28] 80052ae: b29b uxth r3, r3 80052b0: 4313 orrs r3, r2 80052b2: 617b str r3, [r7, #20] 80052b4: e004 b.n 80052c0 } else { /* No counter roll over during reading of CNTL and CNTH registers, counter value is equal to first value of CNTL and CNTH */ timecounter = (((uint32_t) high1 << 16U) | low); 80052b6: 8a7b ldrh r3, [r7, #18] 80052b8: 041a lsls r2, r3, #16 80052ba: 89fb ldrh r3, [r7, #14] 80052bc: 4313 orrs r3, r2 80052be: 617b str r3, [r7, #20] } return timecounter; 80052c0: 697b ldr r3, [r7, #20] } 80052c2: 4618 mov r0, r3 80052c4: 371c adds r7, #28 80052c6: 46bd mov sp, r7 80052c8: bc80 pop {r7} 80052ca: 4770 bx lr 080052cc : * the configuration information for RTC. * @param TimeCounter: Counter to write in RTC_CNT registers * @retval HAL status */ static HAL_StatusTypeDef RTC1_WriteTimeCounter(RTC_HandleTypeDef *hrtc, uint32_t TimeCounter) { 80052cc: b580 push {r7, lr} 80052ce: b084 sub sp, #16 80052d0: af00 add r7, sp, #0 80052d2: 6078 str r0, [r7, #4] 80052d4: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 80052d6: 2300 movs r3, #0 80052d8: 73fb strb r3, [r7, #15] /* Set Initialization mode */ if (RTC1_EnterInitMode(hrtc) != HAL_OK) 80052da: 6878 ldr r0, [r7, #4] 80052dc: f000 f81d bl 800531a 80052e0: 4603 mov r3, r0 80052e2: 2b00 cmp r3, #0 80052e4: d002 beq.n 80052ec { status = HAL_ERROR; 80052e6: 2301 movs r3, #1 80052e8: 73fb strb r3, [r7, #15] 80052ea: e011 b.n 8005310 } else { /* Set RTC COUNTER MSB word */ WRITE_REG(hrtc->Instance->CNTH, (TimeCounter >> 16U)); 80052ec: 687b ldr r3, [r7, #4] 80052ee: 681b ldr r3, [r3, #0] 80052f0: 683a ldr r2, [r7, #0] 80052f2: 0c12 lsrs r2, r2, #16 80052f4: 619a str r2, [r3, #24] /* Set RTC COUNTER LSB word */ WRITE_REG(hrtc->Instance->CNTL, (TimeCounter & RTC_CNTL_RTC_CNT)); 80052f6: 687b ldr r3, [r7, #4] 80052f8: 681b ldr r3, [r3, #0] 80052fa: 683a ldr r2, [r7, #0] 80052fc: b292 uxth r2, r2 80052fe: 61da str r2, [r3, #28] /* Wait for synchro */ if (RTC1_ExitInitMode(hrtc) != HAL_OK) 8005300: 6878 ldr r0, [r7, #4] 8005302: f000 f832 bl 800536a 8005306: 4603 mov r3, r0 8005308: 2b00 cmp r3, #0 800530a: d001 beq.n 8005310 { status = HAL_ERROR; 800530c: 2301 movs r3, #1 800530e: 73fb strb r3, [r7, #15] } } return status; 8005310: 7bfb ldrb r3, [r7, #15] } 8005312: 4618 mov r0, r3 8005314: 3710 adds r7, #16 8005316: 46bd mov sp, r7 8005318: bd80 pop {r7, pc} 0800531a : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC1_EnterInitMode(RTC_HandleTypeDef *hrtc) { 800531a: b580 push {r7, lr} 800531c: b084 sub sp, #16 800531e: af00 add r7, sp, #0 8005320: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8005322: 2300 movs r3, #0 8005324: 60fb str r3, [r7, #12] tickstart = HAL_GetTick(); 8005326: f000 fa85 bl 8005834 800532a: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800532c: e009 b.n 8005342 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800532e: f000 fa81 bl 8005834 8005332: 4602 mov r2, r0 8005334: 68fb ldr r3, [r7, #12] 8005336: 1ad3 subs r3, r2, r3 8005338: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800533c: d901 bls.n 8005342 { return HAL_TIMEOUT; 800533e: 2303 movs r3, #3 8005340: e00f b.n 8005362 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8005342: 687b ldr r3, [r7, #4] 8005344: 681b ldr r3, [r3, #0] 8005346: 685b ldr r3, [r3, #4] 8005348: f003 0320 and.w r3, r3, #32 800534c: 2b00 cmp r3, #0 800534e: d0ee beq.n 800532e } } /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); 8005350: 687b ldr r3, [r7, #4] 8005352: 681b ldr r3, [r3, #0] 8005354: 685a ldr r2, [r3, #4] 8005356: 687b ldr r3, [r7, #4] 8005358: 681b ldr r3, [r3, #0] 800535a: f042 0210 orr.w r2, r2, #16 800535e: 605a str r2, [r3, #4] return HAL_OK; 8005360: 2300 movs r3, #0 } 8005362: 4618 mov r0, r3 8005364: 3710 adds r7, #16 8005366: 46bd mov sp, r7 8005368: bd80 pop {r7, pc} 0800536a : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC1_ExitInitMode(RTC_HandleTypeDef *hrtc) { 800536a: b580 push {r7, lr} 800536c: b084 sub sp, #16 800536e: af00 add r7, sp, #0 8005370: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8005372: 2300 movs r3, #0 8005374: 60fb str r3, [r7, #12] /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 8005376: 687b ldr r3, [r7, #4] 8005378: 681b ldr r3, [r3, #0] 800537a: 685a ldr r2, [r3, #4] 800537c: 687b ldr r3, [r7, #4] 800537e: 681b ldr r3, [r3, #0] 8005380: f022 0210 bic.w r2, r2, #16 8005384: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8005386: f000 fa55 bl 8005834 800538a: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800538c: e009 b.n 80053a2 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800538e: f000 fa51 bl 8005834 8005392: 4602 mov r2, r0 8005394: 68fb ldr r3, [r7, #12] 8005396: 1ad3 subs r3, r2, r3 8005398: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800539c: d901 bls.n 80053a2 { return HAL_TIMEOUT; 800539e: 2303 movs r3, #3 80053a0: e007 b.n 80053b2 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 80053a2: 687b ldr r3, [r7, #4] 80053a4: 681b ldr r3, [r3, #0] 80053a6: 685b ldr r3, [r3, #4] 80053a8: f003 0320 and.w r3, r3, #32 80053ac: 2b00 cmp r3, #0 80053ae: d0ee beq.n 800538e } } return HAL_OK; 80053b0: 2300 movs r3, #0 } 80053b2: 4618 mov r0, r3 80053b4: 3710 adds r7, #16 80053b6: 46bd mov sp, r7 80053b8: bd80 pop {r7, pc} ... 080053bc : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 80053bc: b480 push {r7} 80053be: b085 sub sp, #20 80053c0: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 80053c2: 4b15 ldr r3, [pc, #84] @ (8005418 ) 80053c4: 699b ldr r3, [r3, #24] 80053c6: 4a14 ldr r2, [pc, #80] @ (8005418 ) 80053c8: f043 0301 orr.w r3, r3, #1 80053cc: 6193 str r3, [r2, #24] 80053ce: 4b12 ldr r3, [pc, #72] @ (8005418 ) 80053d0: 699b ldr r3, [r3, #24] 80053d2: f003 0301 and.w r3, r3, #1 80053d6: 60bb str r3, [r7, #8] 80053d8: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 80053da: 4b0f ldr r3, [pc, #60] @ (8005418 ) 80053dc: 69db ldr r3, [r3, #28] 80053de: 4a0e ldr r2, [pc, #56] @ (8005418 ) 80053e0: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80053e4: 61d3 str r3, [r2, #28] 80053e6: 4b0c ldr r3, [pc, #48] @ (8005418 ) 80053e8: 69db ldr r3, [r3, #28] 80053ea: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80053ee: 607b str r3, [r7, #4] 80053f0: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80053f2: 4b0a ldr r3, [pc, #40] @ (800541c ) 80053f4: 685b ldr r3, [r3, #4] 80053f6: 60fb str r3, [r7, #12] 80053f8: 68fb ldr r3, [r7, #12] 80053fa: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 80053fe: 60fb str r3, [r7, #12] 8005400: 68fb ldr r3, [r7, #12] 8005402: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8005406: 60fb str r3, [r7, #12] 8005408: 4a04 ldr r2, [pc, #16] @ (800541c ) 800540a: 68fb ldr r3, [r7, #12] 800540c: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800540e: bf00 nop 8005410: 3714 adds r7, #20 8005412: 46bd mov sp, r7 8005414: bc80 pop {r7} 8005416: 4770 bx lr 8005418: 40021000 .word 0x40021000 800541c: 40010000 .word 0x40010000 08005420 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8005420: b480 push {r7} 8005422: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8005424: bf00 nop 8005426: e7fd b.n 8005424 08005428 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8005428: b480 push {r7} 800542a: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 800542c: bf00 nop 800542e: e7fd b.n 800542c 08005430 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8005430: b480 push {r7} 8005432: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8005434: bf00 nop 8005436: e7fd b.n 8005434 08005438 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8005438: b480 push {r7} 800543a: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 800543c: bf00 nop 800543e: e7fd b.n 800543c 08005440 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8005440: b480 push {r7} 8005442: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8005444: bf00 nop 8005446: e7fd b.n 8005444 08005448 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8005448: b480 push {r7} 800544a: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 800544c: bf00 nop 800544e: 46bd mov sp, r7 8005450: bc80 pop {r7} 8005452: 4770 bx lr 08005454 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8005454: b480 push {r7} 8005456: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8005458: bf00 nop 800545a: 46bd mov sp, r7 800545c: bc80 pop {r7} 800545e: 4770 bx lr 08005460 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8005460: b480 push {r7} 8005462: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8005464: bf00 nop 8005466: 46bd mov sp, r7 8005468: bc80 pop {r7} 800546a: 4770 bx lr 0800546c : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 800546c: b580 push {r7, lr} 800546e: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8005470: f000 f9ce bl 8005810 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8005474: bf00 nop 8005476: bd80 pop {r7, pc} 08005478 : /** * @brief This function handles CAN1 RX0 interrupt. */ void CAN1_RX0_IRQHandler(void) { 8005478: b580 push {r7, lr} 800547a: af00 add r7, sp, #0 /* USER CODE BEGIN CAN1_RX0_IRQn 0 */ /* USER CODE END CAN1_RX0_IRQn 0 */ HAL_CAN_IRQHandler(&hcan1); 800547c: 4802 ldr r0, [pc, #8] @ (8005488 ) 800547e: f001 fbb8 bl 8006bf2 /* USER CODE BEGIN CAN1_RX0_IRQn 1 */ /* USER CODE END CAN1_RX0_IRQn 1 */ } 8005482: bf00 nop 8005484: bd80 pop {r7, pc} 8005486: bf00 nop 8005488: 20000288 .word 0x20000288 0800548c : /** * @brief This function handles USART2 global interrupt. */ void USART2_IRQHandler(void) { 800548c: b580 push {r7, lr} 800548e: af00 add r7, sp, #0 /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 8005490: 4802 ldr r0, [pc, #8] @ (800549c ) 8005492: f003 fbc1 bl 8008c18 /* USER CODE BEGIN USART2_IRQn 1 */ /* USER CODE END USART2_IRQn 1 */ } 8005496: bf00 nop 8005498: bd80 pop {r7, pc} 800549a: bf00 nop 800549c: 20003354 .word 0x20003354 080054a0 : /** * @brief This function handles CAN2 TX interrupt. */ void CAN2_TX_IRQHandler(void) { 80054a0: b580 push {r7, lr} 80054a2: af00 add r7, sp, #0 /* USER CODE BEGIN CAN2_TX_IRQn 0 */ /* USER CODE END CAN2_TX_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 80054a4: 4802 ldr r0, [pc, #8] @ (80054b0 ) 80054a6: f001 fba4 bl 8006bf2 /* USER CODE BEGIN CAN2_TX_IRQn 1 */ /* USER CODE END CAN2_TX_IRQn 1 */ } 80054aa: bf00 nop 80054ac: bd80 pop {r7, pc} 80054ae: bf00 nop 80054b0: 200002b0 .word 0x200002b0 080054b4 : /** * @brief This function handles CAN2 RX1 interrupt. */ void CAN2_RX1_IRQHandler(void) { 80054b4: b580 push {r7, lr} 80054b6: af00 add r7, sp, #0 /* USER CODE BEGIN CAN2_RX1_IRQn 0 */ /* USER CODE END CAN2_RX1_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 80054b8: 4802 ldr r0, [pc, #8] @ (80054c4 ) 80054ba: f001 fb9a bl 8006bf2 /* USER CODE BEGIN CAN2_RX1_IRQn 1 */ /* USER CODE END CAN2_RX1_IRQn 1 */ } 80054be: bf00 nop 80054c0: bd80 pop {r7, pc} 80054c2: bf00 nop 80054c4: 200002b0 .word 0x200002b0 080054c8 <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 80054c8: b480 push {r7} 80054ca: af00 add r7, sp, #0 return 1; 80054cc: 2301 movs r3, #1 } 80054ce: 4618 mov r0, r3 80054d0: 46bd mov sp, r7 80054d2: bc80 pop {r7} 80054d4: 4770 bx lr 080054d6 <_kill>: int _kill(int pid, int sig) { 80054d6: b580 push {r7, lr} 80054d8: b082 sub sp, #8 80054da: af00 add r7, sp, #0 80054dc: 6078 str r0, [r7, #4] 80054de: 6039 str r1, [r7, #0] (void)pid; (void)sig; errno = EINVAL; 80054e0: f005 fa8c bl 800a9fc <__errno> 80054e4: 4603 mov r3, r0 80054e6: 2216 movs r2, #22 80054e8: 601a str r2, [r3, #0] return -1; 80054ea: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 80054ee: 4618 mov r0, r3 80054f0: 3708 adds r7, #8 80054f2: 46bd mov sp, r7 80054f4: bd80 pop {r7, pc} 080054f6 <_exit>: void _exit (int status) { 80054f6: b580 push {r7, lr} 80054f8: b082 sub sp, #8 80054fa: af00 add r7, sp, #0 80054fc: 6078 str r0, [r7, #4] _kill(status, -1); 80054fe: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 8005502: 6878 ldr r0, [r7, #4] 8005504: f7ff ffe7 bl 80054d6 <_kill> while (1) {} /* Make sure we hang here */ 8005508: bf00 nop 800550a: e7fd b.n 8005508 <_exit+0x12> 0800550c <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 800550c: b580 push {r7, lr} 800550e: b086 sub sp, #24 8005510: af00 add r7, sp, #0 8005512: 60f8 str r0, [r7, #12] 8005514: 60b9 str r1, [r7, #8] 8005516: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8005518: 2300 movs r3, #0 800551a: 617b str r3, [r7, #20] 800551c: e00a b.n 8005534 <_read+0x28> { *ptr++ = __io_getchar(); 800551e: f3af 8000 nop.w 8005522: 4601 mov r1, r0 8005524: 68bb ldr r3, [r7, #8] 8005526: 1c5a adds r2, r3, #1 8005528: 60ba str r2, [r7, #8] 800552a: b2ca uxtb r2, r1 800552c: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 800552e: 697b ldr r3, [r7, #20] 8005530: 3301 adds r3, #1 8005532: 617b str r3, [r7, #20] 8005534: 697a ldr r2, [r7, #20] 8005536: 687b ldr r3, [r7, #4] 8005538: 429a cmp r2, r3 800553a: dbf0 blt.n 800551e <_read+0x12> } return len; 800553c: 687b ldr r3, [r7, #4] } 800553e: 4618 mov r0, r3 8005540: 3718 adds r7, #24 8005542: 46bd mov sp, r7 8005544: bd80 pop {r7, pc} 08005546 <_close>: } return len; } int _close(int file) { 8005546: b480 push {r7} 8005548: b083 sub sp, #12 800554a: af00 add r7, sp, #0 800554c: 6078 str r0, [r7, #4] (void)file; return -1; 800554e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 8005552: 4618 mov r0, r3 8005554: 370c adds r7, #12 8005556: 46bd mov sp, r7 8005558: bc80 pop {r7} 800555a: 4770 bx lr 0800555c <_fstat>: int _fstat(int file, struct stat *st) { 800555c: b480 push {r7} 800555e: b083 sub sp, #12 8005560: af00 add r7, sp, #0 8005562: 6078 str r0, [r7, #4] 8005564: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; 8005566: 683b ldr r3, [r7, #0] 8005568: f44f 5200 mov.w r2, #8192 @ 0x2000 800556c: 605a str r2, [r3, #4] return 0; 800556e: 2300 movs r3, #0 } 8005570: 4618 mov r0, r3 8005572: 370c adds r7, #12 8005574: 46bd mov sp, r7 8005576: bc80 pop {r7} 8005578: 4770 bx lr 0800557a <_isatty>: int _isatty(int file) { 800557a: b480 push {r7} 800557c: b083 sub sp, #12 800557e: af00 add r7, sp, #0 8005580: 6078 str r0, [r7, #4] (void)file; return 1; 8005582: 2301 movs r3, #1 } 8005584: 4618 mov r0, r3 8005586: 370c adds r7, #12 8005588: 46bd mov sp, r7 800558a: bc80 pop {r7} 800558c: 4770 bx lr 0800558e <_lseek>: int _lseek(int file, int ptr, int dir) { 800558e: b480 push {r7} 8005590: b085 sub sp, #20 8005592: af00 add r7, sp, #0 8005594: 60f8 str r0, [r7, #12] 8005596: 60b9 str r1, [r7, #8] 8005598: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; 800559a: 2300 movs r3, #0 } 800559c: 4618 mov r0, r3 800559e: 3714 adds r7, #20 80055a0: 46bd mov sp, r7 80055a2: bc80 pop {r7} 80055a4: 4770 bx lr ... 080055a8 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 80055a8: b580 push {r7, lr} 80055aa: b086 sub sp, #24 80055ac: af00 add r7, sp, #0 80055ae: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 80055b0: 4a14 ldr r2, [pc, #80] @ (8005604 <_sbrk+0x5c>) 80055b2: 4b15 ldr r3, [pc, #84] @ (8005608 <_sbrk+0x60>) 80055b4: 1ad3 subs r3, r2, r3 80055b6: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 80055b8: 697b ldr r3, [r7, #20] 80055ba: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 80055bc: 4b13 ldr r3, [pc, #76] @ (800560c <_sbrk+0x64>) 80055be: 681b ldr r3, [r3, #0] 80055c0: 2b00 cmp r3, #0 80055c2: d102 bne.n 80055ca <_sbrk+0x22> { __sbrk_heap_end = &_end; 80055c4: 4b11 ldr r3, [pc, #68] @ (800560c <_sbrk+0x64>) 80055c6: 4a12 ldr r2, [pc, #72] @ (8005610 <_sbrk+0x68>) 80055c8: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 80055ca: 4b10 ldr r3, [pc, #64] @ (800560c <_sbrk+0x64>) 80055cc: 681a ldr r2, [r3, #0] 80055ce: 687b ldr r3, [r7, #4] 80055d0: 4413 add r3, r2 80055d2: 693a ldr r2, [r7, #16] 80055d4: 429a cmp r2, r3 80055d6: d207 bcs.n 80055e8 <_sbrk+0x40> { errno = ENOMEM; 80055d8: f005 fa10 bl 800a9fc <__errno> 80055dc: 4603 mov r3, r0 80055de: 220c movs r2, #12 80055e0: 601a str r2, [r3, #0] return (void *)-1; 80055e2: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 80055e6: e009 b.n 80055fc <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 80055e8: 4b08 ldr r3, [pc, #32] @ (800560c <_sbrk+0x64>) 80055ea: 681b ldr r3, [r3, #0] 80055ec: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 80055ee: 4b07 ldr r3, [pc, #28] @ (800560c <_sbrk+0x64>) 80055f0: 681a ldr r2, [r3, #0] 80055f2: 687b ldr r3, [r7, #4] 80055f4: 4413 add r3, r2 80055f6: 4a05 ldr r2, [pc, #20] @ (800560c <_sbrk+0x64>) 80055f8: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 80055fa: 68fb ldr r3, [r7, #12] } 80055fc: 4618 mov r0, r3 80055fe: 3718 adds r7, #24 8005600: 46bd mov sp, r7 8005602: bd80 pop {r7, pc} 8005604: 20010000 .word 0x20010000 8005608: 00000400 .word 0x00000400 800560c: 20003350 .word 0x20003350 8005610: 20003510 .word 0x20003510 08005614 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 8005614: b480 push {r7} 8005616: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 8005618: bf00 nop 800561a: 46bd mov sp, r7 800561c: bc80 pop {r7} 800561e: 4770 bx lr 08005620 : UART_HandleTypeDef huart2; /* USART2 init function */ void MX_USART2_UART_Init(void) { 8005620: b580 push {r7, lr} 8005622: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 8005624: 4b11 ldr r3, [pc, #68] @ (800566c ) 8005626: 4a12 ldr r2, [pc, #72] @ (8005670 ) 8005628: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 800562a: 4b10 ldr r3, [pc, #64] @ (800566c ) 800562c: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8005630: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 8005632: 4b0e ldr r3, [pc, #56] @ (800566c ) 8005634: 2200 movs r2, #0 8005636: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 8005638: 4b0c ldr r3, [pc, #48] @ (800566c ) 800563a: 2200 movs r2, #0 800563c: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 800563e: 4b0b ldr r3, [pc, #44] @ (800566c ) 8005640: 2200 movs r2, #0 8005642: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 8005644: 4b09 ldr r3, [pc, #36] @ (800566c ) 8005646: 220c movs r2, #12 8005648: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800564a: 4b08 ldr r3, [pc, #32] @ (800566c ) 800564c: 2200 movs r2, #0 800564e: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8005650: 4b06 ldr r3, [pc, #24] @ (800566c ) 8005652: 2200 movs r2, #0 8005654: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 8005656: 4805 ldr r0, [pc, #20] @ (800566c ) 8005658: f003 f9af bl 80089ba 800565c: 4603 mov r3, r0 800565e: 2b00 cmp r3, #0 8005660: d001 beq.n 8005666 { Error_Handler(); 8005662: f7ff fcbd bl 8004fe0 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } 8005666: bf00 nop 8005668: bd80 pop {r7, pc} 800566a: bf00 nop 800566c: 20003354 .word 0x20003354 8005670: 40004400 .word 0x40004400 08005674 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { 8005674: b580 push {r7, lr} 8005676: b08a sub sp, #40 @ 0x28 8005678: af00 add r7, sp, #0 800567a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800567c: f107 0314 add.w r3, r7, #20 8005680: 2200 movs r2, #0 8005682: 601a str r2, [r3, #0] 8005684: 605a str r2, [r3, #4] 8005686: 609a str r2, [r3, #8] 8005688: 60da str r2, [r3, #12] if(uartHandle->Instance==USART2) 800568a: 687b ldr r3, [r7, #4] 800568c: 681b ldr r3, [r3, #0] 800568e: 4a26 ldr r2, [pc, #152] @ (8005728 ) 8005690: 4293 cmp r3, r2 8005692: d145 bne.n 8005720 { /* USER CODE BEGIN USART2_MspInit 0 */ /* USER CODE END USART2_MspInit 0 */ /* USART2 clock enable */ __HAL_RCC_USART2_CLK_ENABLE(); 8005694: 4b25 ldr r3, [pc, #148] @ (800572c ) 8005696: 69db ldr r3, [r3, #28] 8005698: 4a24 ldr r2, [pc, #144] @ (800572c ) 800569a: f443 3300 orr.w r3, r3, #131072 @ 0x20000 800569e: 61d3 str r3, [r2, #28] 80056a0: 4b22 ldr r3, [pc, #136] @ (800572c ) 80056a2: 69db ldr r3, [r3, #28] 80056a4: f403 3300 and.w r3, r3, #131072 @ 0x20000 80056a8: 613b str r3, [r7, #16] 80056aa: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOD_CLK_ENABLE(); 80056ac: 4b1f ldr r3, [pc, #124] @ (800572c ) 80056ae: 699b ldr r3, [r3, #24] 80056b0: 4a1e ldr r2, [pc, #120] @ (800572c ) 80056b2: f043 0320 orr.w r3, r3, #32 80056b6: 6193 str r3, [r2, #24] 80056b8: 4b1c ldr r3, [pc, #112] @ (800572c ) 80056ba: 699b ldr r3, [r3, #24] 80056bc: f003 0320 and.w r3, r3, #32 80056c0: 60fb str r3, [r7, #12] 80056c2: 68fb ldr r3, [r7, #12] /**USART2 GPIO Configuration PD5 ------> USART2_TX PD6 ------> USART2_RX */ GPIO_InitStruct.Pin = GPIO_PIN_5; 80056c4: 2320 movs r3, #32 80056c6: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80056c8: 2302 movs r3, #2 80056ca: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80056cc: 2303 movs r3, #3 80056ce: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 80056d0: f107 0314 add.w r3, r7, #20 80056d4: 4619 mov r1, r3 80056d6: 4816 ldr r0, [pc, #88] @ (8005730 ) 80056d8: f001 feda bl 8007490 GPIO_InitStruct.Pin = GPIO_PIN_6; 80056dc: 2340 movs r3, #64 @ 0x40 80056de: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80056e0: 2300 movs r3, #0 80056e2: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 80056e4: 2300 movs r3, #0 80056e6: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 80056e8: f107 0314 add.w r3, r7, #20 80056ec: 4619 mov r1, r3 80056ee: 4810 ldr r0, [pc, #64] @ (8005730 ) 80056f0: f001 fece bl 8007490 __HAL_AFIO_REMAP_USART2_ENABLE(); 80056f4: 4b0f ldr r3, [pc, #60] @ (8005734 ) 80056f6: 685b ldr r3, [r3, #4] 80056f8: 627b str r3, [r7, #36] @ 0x24 80056fa: 6a7b ldr r3, [r7, #36] @ 0x24 80056fc: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8005700: 627b str r3, [r7, #36] @ 0x24 8005702: 6a7b ldr r3, [r7, #36] @ 0x24 8005704: f043 0308 orr.w r3, r3, #8 8005708: 627b str r3, [r7, #36] @ 0x24 800570a: 4a0a ldr r2, [pc, #40] @ (8005734 ) 800570c: 6a7b ldr r3, [r7, #36] @ 0x24 800570e: 6053 str r3, [r2, #4] /* USART2 interrupt Init */ HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 8005710: 2200 movs r2, #0 8005712: 2100 movs r1, #0 8005714: 2026 movs r0, #38 @ 0x26 8005716: f001 fd42 bl 800719e HAL_NVIC_EnableIRQ(USART2_IRQn); 800571a: 2026 movs r0, #38 @ 0x26 800571c: f001 fd5b bl 80071d6 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 8005720: bf00 nop 8005722: 3728 adds r7, #40 @ 0x28 8005724: 46bd mov sp, r7 8005726: bd80 pop {r7, pc} 8005728: 40004400 .word 0x40004400 800572c: 40021000 .word 0x40021000 8005730: 40011400 .word 0x40011400 8005734: 40010000 .word 0x40010000 08005738 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit 8005738: f7ff ff6c bl 8005614 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 800573c: 480b ldr r0, [pc, #44] @ (800576c ) ldr r1, =_edata 800573e: 490c ldr r1, [pc, #48] @ (8005770 ) ldr r2, =_sidata 8005740: 4a0c ldr r2, [pc, #48] @ (8005774 ) movs r3, #0 8005742: 2300 movs r3, #0 b LoopCopyDataInit 8005744: e002 b.n 800574c 08005746 : CopyDataInit: ldr r4, [r2, r3] 8005746: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8005748: 50c4 str r4, [r0, r3] adds r3, r3, #4 800574a: 3304 adds r3, #4 0800574c : LoopCopyDataInit: adds r4, r0, r3 800574c: 18c4 adds r4, r0, r3 cmp r4, r1 800574e: 428c cmp r4, r1 bcc CopyDataInit 8005750: d3f9 bcc.n 8005746 /* Zero fill the bss segment. */ ldr r2, =_sbss 8005752: 4a09 ldr r2, [pc, #36] @ (8005778 ) ldr r4, =_ebss 8005754: 4c09 ldr r4, [pc, #36] @ (800577c ) movs r3, #0 8005756: 2300 movs r3, #0 b LoopFillZerobss 8005758: e001 b.n 800575e 0800575a : FillZerobss: str r3, [r2] 800575a: 6013 str r3, [r2, #0] adds r2, r2, #4 800575c: 3204 adds r2, #4 0800575e : LoopFillZerobss: cmp r2, r4 800575e: 42a2 cmp r2, r4 bcc FillZerobss 8005760: d3fb bcc.n 800575a /* Call static constructors */ bl __libc_init_array 8005762: f005 f951 bl 800aa08 <__libc_init_array> /* Call the application's entry point.*/ bl main 8005766: f7ff fb83 bl 8004e70
bx lr 800576a: 4770 bx lr ldr r0, =_sdata 800576c: 20000000 .word 0x20000000 ldr r1, =_edata 8005770: 2000023c .word 0x2000023c ldr r2, =_sidata 8005774: 0800e500 .word 0x0800e500 ldr r2, =_sbss 8005778: 2000023c .word 0x2000023c ldr r4, =_ebss 800577c: 2000350c .word 0x2000350c 08005780 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8005780: e7fe b.n 8005780 ... 08005784 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8005784: b580 push {r7, lr} 8005786: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8005788: 4b08 ldr r3, [pc, #32] @ (80057ac ) 800578a: 681b ldr r3, [r3, #0] 800578c: 4a07 ldr r2, [pc, #28] @ (80057ac ) 800578e: f043 0310 orr.w r3, r3, #16 8005792: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8005794: 2003 movs r0, #3 8005796: f001 fcf7 bl 8007188 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 800579a: 200f movs r0, #15 800579c: f000 f808 bl 80057b0 /* Init the low level hardware */ HAL_MspInit(); 80057a0: f7ff fe0c bl 80053bc /* Return function status */ return HAL_OK; 80057a4: 2300 movs r3, #0 } 80057a6: 4618 mov r0, r3 80057a8: bd80 pop {r7, pc} 80057aa: bf00 nop 80057ac: 40022000 .word 0x40022000 080057b0 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 80057b0: b580 push {r7, lr} 80057b2: b082 sub sp, #8 80057b4: af00 add r7, sp, #0 80057b6: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 80057b8: 4b12 ldr r3, [pc, #72] @ (8005804 ) 80057ba: 681a ldr r2, [r3, #0] 80057bc: 4b12 ldr r3, [pc, #72] @ (8005808 ) 80057be: 781b ldrb r3, [r3, #0] 80057c0: 4619 mov r1, r3 80057c2: f44f 737a mov.w r3, #1000 @ 0x3e8 80057c6: fbb3 f3f1 udiv r3, r3, r1 80057ca: fbb2 f3f3 udiv r3, r2, r3 80057ce: 4618 mov r0, r3 80057d0: f001 fd0f bl 80071f2 80057d4: 4603 mov r3, r0 80057d6: 2b00 cmp r3, #0 80057d8: d001 beq.n 80057de { return HAL_ERROR; 80057da: 2301 movs r3, #1 80057dc: e00e b.n 80057fc } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 80057de: 687b ldr r3, [r7, #4] 80057e0: 2b0f cmp r3, #15 80057e2: d80a bhi.n 80057fa { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 80057e4: 2200 movs r2, #0 80057e6: 6879 ldr r1, [r7, #4] 80057e8: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80057ec: f001 fcd7 bl 800719e uwTickPrio = TickPriority; 80057f0: 4a06 ldr r2, [pc, #24] @ (800580c ) 80057f2: 687b ldr r3, [r7, #4] 80057f4: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 80057f6: 2300 movs r3, #0 80057f8: e000 b.n 80057fc return HAL_ERROR; 80057fa: 2301 movs r3, #1 } 80057fc: 4618 mov r0, r3 80057fe: 3708 adds r7, #8 8005800: 46bd mov sp, r7 8005802: bd80 pop {r7, pc} 8005804: 20000008 .word 0x20000008 8005808: 20000010 .word 0x20000010 800580c: 2000000c .word 0x2000000c 08005810 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8005810: b480 push {r7} 8005812: af00 add r7, sp, #0 uwTick += uwTickFreq; 8005814: 4b05 ldr r3, [pc, #20] @ (800582c ) 8005816: 781b ldrb r3, [r3, #0] 8005818: 461a mov r2, r3 800581a: 4b05 ldr r3, [pc, #20] @ (8005830 ) 800581c: 681b ldr r3, [r3, #0] 800581e: 4413 add r3, r2 8005820: 4a03 ldr r2, [pc, #12] @ (8005830 ) 8005822: 6013 str r3, [r2, #0] } 8005824: bf00 nop 8005826: 46bd mov sp, r7 8005828: bc80 pop {r7} 800582a: 4770 bx lr 800582c: 20000010 .word 0x20000010 8005830: 20003398 .word 0x20003398 08005834 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8005834: b480 push {r7} 8005836: af00 add r7, sp, #0 return uwTick; 8005838: 4b02 ldr r3, [pc, #8] @ (8005844 ) 800583a: 681b ldr r3, [r3, #0] } 800583c: 4618 mov r0, r3 800583e: 46bd mov sp, r7 8005840: bc80 pop {r7} 8005842: 4770 bx lr 8005844: 20003398 .word 0x20003398 08005848 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8005848: b580 push {r7, lr} 800584a: b084 sub sp, #16 800584c: af00 add r7, sp, #0 800584e: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8005850: f7ff fff0 bl 8005834 8005854: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 8005856: 687b ldr r3, [r7, #4] 8005858: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800585a: 68fb ldr r3, [r7, #12] 800585c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8005860: d005 beq.n 800586e { wait += (uint32_t)(uwTickFreq); 8005862: 4b0a ldr r3, [pc, #40] @ (800588c ) 8005864: 781b ldrb r3, [r3, #0] 8005866: 461a mov r2, r3 8005868: 68fb ldr r3, [r7, #12] 800586a: 4413 add r3, r2 800586c: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 800586e: bf00 nop 8005870: f7ff ffe0 bl 8005834 8005874: 4602 mov r2, r0 8005876: 68bb ldr r3, [r7, #8] 8005878: 1ad3 subs r3, r2, r3 800587a: 68fa ldr r2, [r7, #12] 800587c: 429a cmp r2, r3 800587e: d8f7 bhi.n 8005870 { } } 8005880: bf00 nop 8005882: bf00 nop 8005884: 3710 adds r7, #16 8005886: 46bd mov sp, r7 8005888: bd80 pop {r7, pc} 800588a: bf00 nop 800588c: 20000010 .word 0x20000010 08005890 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 8005890: b580 push {r7, lr} 8005892: b086 sub sp, #24 8005894: af00 add r7, sp, #0 8005896: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8005898: 2300 movs r3, #0 800589a: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 800589c: 2300 movs r3, #0 800589e: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 80058a0: 2300 movs r3, #0 80058a2: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 80058a4: 2300 movs r3, #0 80058a6: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 80058a8: 687b ldr r3, [r7, #4] 80058aa: 2b00 cmp r3, #0 80058ac: d101 bne.n 80058b2 { return HAL_ERROR; 80058ae: 2301 movs r3, #1 80058b0: e0be b.n 8005a30 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 80058b2: 687b ldr r3, [r7, #4] 80058b4: 689b ldr r3, [r3, #8] 80058b6: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 80058b8: 687b ldr r3, [r7, #4] 80058ba: 6a9b ldr r3, [r3, #40] @ 0x28 80058bc: 2b00 cmp r3, #0 80058be: d109 bne.n 80058d4 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 80058c0: 687b ldr r3, [r7, #4] 80058c2: 2200 movs r2, #0 80058c4: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 80058c6: 687b ldr r3, [r7, #4] 80058c8: 2200 movs r2, #0 80058ca: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 80058ce: 6878 ldr r0, [r7, #4] 80058d0: f7fb fe9e bl 8001610 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 80058d4: 6878 ldr r0, [r7, #4] 80058d6: f000 fbf1 bl 80060bc 80058da: 4603 mov r3, r0 80058dc: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 80058de: 687b ldr r3, [r7, #4] 80058e0: 6a9b ldr r3, [r3, #40] @ 0x28 80058e2: f003 0310 and.w r3, r3, #16 80058e6: 2b00 cmp r3, #0 80058e8: f040 8099 bne.w 8005a1e 80058ec: 7dfb ldrb r3, [r7, #23] 80058ee: 2b00 cmp r3, #0 80058f0: f040 8095 bne.w 8005a1e (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 80058f4: 687b ldr r3, [r7, #4] 80058f6: 6a9b ldr r3, [r3, #40] @ 0x28 80058f8: f423 5388 bic.w r3, r3, #4352 @ 0x1100 80058fc: f023 0302 bic.w r3, r3, #2 8005900: f043 0202 orr.w r2, r3, #2 8005904: 687b ldr r3, [r7, #4] 8005906: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 8005908: 687b ldr r3, [r7, #4] 800590a: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800590c: 687b ldr r3, [r7, #4] 800590e: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 8005910: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 8005912: 687b ldr r3, [r7, #4] 8005914: 7b1b ldrb r3, [r3, #12] 8005916: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8005918: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 800591a: 68ba ldr r2, [r7, #8] 800591c: 4313 orrs r3, r2 800591e: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 8005920: 687b ldr r3, [r7, #4] 8005922: 689b ldr r3, [r3, #8] 8005924: f5b3 7f80 cmp.w r3, #256 @ 0x100 8005928: d003 beq.n 8005932 800592a: 687b ldr r3, [r7, #4] 800592c: 689b ldr r3, [r3, #8] 800592e: 2b01 cmp r3, #1 8005930: d102 bne.n 8005938 8005932: f44f 7380 mov.w r3, #256 @ 0x100 8005936: e000 b.n 800593a 8005938: 2300 movs r3, #0 800593a: 693a ldr r2, [r7, #16] 800593c: 4313 orrs r3, r2 800593e: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 8005940: 687b ldr r3, [r7, #4] 8005942: 7d1b ldrb r3, [r3, #20] 8005944: 2b01 cmp r3, #1 8005946: d119 bne.n 800597c { if (hadc->Init.ContinuousConvMode == DISABLE) 8005948: 687b ldr r3, [r7, #4] 800594a: 7b1b ldrb r3, [r3, #12] 800594c: 2b00 cmp r3, #0 800594e: d109 bne.n 8005964 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 8005950: 687b ldr r3, [r7, #4] 8005952: 699b ldr r3, [r3, #24] 8005954: 3b01 subs r3, #1 8005956: 035a lsls r2, r3, #13 8005958: 693b ldr r3, [r7, #16] 800595a: 4313 orrs r3, r2 800595c: f443 6300 orr.w r3, r3, #2048 @ 0x800 8005960: 613b str r3, [r7, #16] 8005962: e00b b.n 800597c { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8005964: 687b ldr r3, [r7, #4] 8005966: 6a9b ldr r3, [r3, #40] @ 0x28 8005968: f043 0220 orr.w r2, r3, #32 800596c: 687b ldr r3, [r7, #4] 800596e: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005970: 687b ldr r3, [r7, #4] 8005972: 6adb ldr r3, [r3, #44] @ 0x2c 8005974: f043 0201 orr.w r2, r3, #1 8005978: 687b ldr r3, [r7, #4] 800597a: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 800597c: 687b ldr r3, [r7, #4] 800597e: 681b ldr r3, [r3, #0] 8005980: 685b ldr r3, [r3, #4] 8005982: f423 4169 bic.w r1, r3, #59648 @ 0xe900 8005986: 687b ldr r3, [r7, #4] 8005988: 681b ldr r3, [r3, #0] 800598a: 693a ldr r2, [r7, #16] 800598c: 430a orrs r2, r1 800598e: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 8005990: 687b ldr r3, [r7, #4] 8005992: 681b ldr r3, [r3, #0] 8005994: 689a ldr r2, [r3, #8] 8005996: 4b28 ldr r3, [pc, #160] @ (8005a38 ) 8005998: 4013 ands r3, r2 800599a: 687a ldr r2, [r7, #4] 800599c: 6812 ldr r2, [r2, #0] 800599e: 68b9 ldr r1, [r7, #8] 80059a0: 430b orrs r3, r1 80059a2: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 80059a4: 687b ldr r3, [r7, #4] 80059a6: 689b ldr r3, [r3, #8] 80059a8: f5b3 7f80 cmp.w r3, #256 @ 0x100 80059ac: d003 beq.n 80059b6 80059ae: 687b ldr r3, [r7, #4] 80059b0: 689b ldr r3, [r3, #8] 80059b2: 2b01 cmp r3, #1 80059b4: d104 bne.n 80059c0 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 80059b6: 687b ldr r3, [r7, #4] 80059b8: 691b ldr r3, [r3, #16] 80059ba: 3b01 subs r3, #1 80059bc: 051b lsls r3, r3, #20 80059be: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 80059c0: 687b ldr r3, [r7, #4] 80059c2: 681b ldr r3, [r3, #0] 80059c4: 6adb ldr r3, [r3, #44] @ 0x2c 80059c6: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 80059ca: 687b ldr r3, [r7, #4] 80059cc: 681b ldr r3, [r3, #0] 80059ce: 68fa ldr r2, [r7, #12] 80059d0: 430a orrs r2, r1 80059d2: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80059d4: 687b ldr r3, [r7, #4] 80059d6: 681b ldr r3, [r3, #0] 80059d8: 689a ldr r2, [r3, #8] 80059da: 4b18 ldr r3, [pc, #96] @ (8005a3c ) 80059dc: 4013 ands r3, r2 80059de: 68ba ldr r2, [r7, #8] 80059e0: 429a cmp r2, r3 80059e2: d10b bne.n 80059fc ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 80059e4: 687b ldr r3, [r7, #4] 80059e6: 2200 movs r2, #0 80059e8: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 80059ea: 687b ldr r3, [r7, #4] 80059ec: 6a9b ldr r3, [r3, #40] @ 0x28 80059ee: f023 0303 bic.w r3, r3, #3 80059f2: f043 0201 orr.w r2, r3, #1 80059f6: 687b ldr r3, [r7, #4] 80059f8: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80059fa: e018 b.n 8005a2e HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 80059fc: 687b ldr r3, [r7, #4] 80059fe: 6a9b ldr r3, [r3, #40] @ 0x28 8005a00: f023 0312 bic.w r3, r3, #18 8005a04: f043 0210 orr.w r2, r3, #16 8005a08: 687b ldr r3, [r7, #4] 8005a0a: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005a0c: 687b ldr r3, [r7, #4] 8005a0e: 6adb ldr r3, [r3, #44] @ 0x2c 8005a10: f043 0201 orr.w r2, r3, #1 8005a14: 687b ldr r3, [r7, #4] 8005a16: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 8005a18: 2301 movs r3, #1 8005a1a: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8005a1c: e007 b.n 8005a2e } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8005a1e: 687b ldr r3, [r7, #4] 8005a20: 6a9b ldr r3, [r3, #40] @ 0x28 8005a22: f043 0210 orr.w r2, r3, #16 8005a26: 687b ldr r3, [r7, #4] 8005a28: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8005a2a: 2301 movs r3, #1 8005a2c: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8005a2e: 7dfb ldrb r3, [r7, #23] } 8005a30: 4618 mov r0, r3 8005a32: 3718 adds r7, #24 8005a34: 46bd mov sp, r7 8005a36: bd80 pop {r7, pc} 8005a38: ffe1f7fd .word 0xffe1f7fd 8005a3c: ff1f0efe .word 0xff1f0efe 08005a40 : * Interruptions enabled in this function: None. * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) { 8005a40: b580 push {r7, lr} 8005a42: b084 sub sp, #16 8005a44: af00 add r7, sp, #0 8005a46: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8005a48: 2300 movs r3, #0 8005a4a: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 8005a4c: 687b ldr r3, [r7, #4] 8005a4e: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8005a52: 2b01 cmp r3, #1 8005a54: d101 bne.n 8005a5a 8005a56: 2302 movs r3, #2 8005a58: e098 b.n 8005b8c 8005a5a: 687b ldr r3, [r7, #4] 8005a5c: 2201 movs r2, #1 8005a5e: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 8005a62: 6878 ldr r0, [r7, #4] 8005a64: f000 fad0 bl 8006008 8005a68: 4603 mov r3, r0 8005a6a: 73fb strb r3, [r7, #15] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 8005a6c: 7bfb ldrb r3, [r7, #15] 8005a6e: 2b00 cmp r3, #0 8005a70: f040 8087 bne.w 8005b82 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 8005a74: 687b ldr r3, [r7, #4] 8005a76: 6a9b ldr r3, [r3, #40] @ 0x28 8005a78: f423 7340 bic.w r3, r3, #768 @ 0x300 8005a7c: f023 0301 bic.w r3, r3, #1 8005a80: f443 7280 orr.w r2, r3, #256 @ 0x100 8005a84: 687b ldr r3, [r7, #4] 8005a86: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 8005a88: 687b ldr r3, [r7, #4] 8005a8a: 681b ldr r3, [r3, #0] 8005a8c: 4a41 ldr r2, [pc, #260] @ (8005b94 ) 8005a8e: 4293 cmp r3, r2 8005a90: d105 bne.n 8005a9e 8005a92: 4b41 ldr r3, [pc, #260] @ (8005b98 ) 8005a94: 685b ldr r3, [r3, #4] 8005a96: f403 2370 and.w r3, r3, #983040 @ 0xf0000 8005a9a: 2b00 cmp r3, #0 8005a9c: d115 bne.n 8005aca { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8005a9e: 687b ldr r3, [r7, #4] 8005aa0: 6a9b ldr r3, [r3, #40] @ 0x28 8005aa2: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 8005aa6: 687b ldr r3, [r7, #4] 8005aa8: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 8005aaa: 687b ldr r3, [r7, #4] 8005aac: 681b ldr r3, [r3, #0] 8005aae: 685b ldr r3, [r3, #4] 8005ab0: f403 6380 and.w r3, r3, #1024 @ 0x400 8005ab4: 2b00 cmp r3, #0 8005ab6: d026 beq.n 8005b06 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 8005ab8: 687b ldr r3, [r7, #4] 8005aba: 6a9b ldr r3, [r3, #40] @ 0x28 8005abc: f423 5340 bic.w r3, r3, #12288 @ 0x3000 8005ac0: f443 5280 orr.w r2, r3, #4096 @ 0x1000 8005ac4: 687b ldr r3, [r7, #4] 8005ac6: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 8005ac8: e01d b.n 8005b06 } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8005aca: 687b ldr r3, [r7, #4] 8005acc: 6a9b ldr r3, [r3, #40] @ 0x28 8005ace: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 8005ad2: 687b ldr r3, [r7, #4] 8005ad4: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 8005ad6: 687b ldr r3, [r7, #4] 8005ad8: 681b ldr r3, [r3, #0] 8005ada: 4a2f ldr r2, [pc, #188] @ (8005b98 ) 8005adc: 4293 cmp r3, r2 8005ade: d004 beq.n 8005aea 8005ae0: 687b ldr r3, [r7, #4] 8005ae2: 681b ldr r3, [r3, #0] 8005ae4: 4a2b ldr r2, [pc, #172] @ (8005b94 ) 8005ae6: 4293 cmp r3, r2 8005ae8: d10d bne.n 8005b06 8005aea: 4b2b ldr r3, [pc, #172] @ (8005b98 ) 8005aec: 685b ldr r3, [r3, #4] 8005aee: f403 6380 and.w r3, r3, #1024 @ 0x400 8005af2: 2b00 cmp r3, #0 8005af4: d007 beq.n 8005b06 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 8005af6: 687b ldr r3, [r7, #4] 8005af8: 6a9b ldr r3, [r3, #40] @ 0x28 8005afa: f423 5340 bic.w r3, r3, #12288 @ 0x3000 8005afe: f443 5280 orr.w r2, r3, #4096 @ 0x1000 8005b02: 687b ldr r3, [r7, #4] 8005b04: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8005b06: 687b ldr r3, [r7, #4] 8005b08: 6a9b ldr r3, [r3, #40] @ 0x28 8005b0a: f403 5380 and.w r3, r3, #4096 @ 0x1000 8005b0e: 2b00 cmp r3, #0 8005b10: d006 beq.n 8005b20 { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 8005b12: 687b ldr r3, [r7, #4] 8005b14: 6adb ldr r3, [r3, #44] @ 0x2c 8005b16: f023 0206 bic.w r2, r3, #6 8005b1a: 687b ldr r3, [r7, #4] 8005b1c: 62da str r2, [r3, #44] @ 0x2c 8005b1e: e002 b.n 8005b26 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 8005b20: 687b ldr r3, [r7, #4] 8005b22: 2200 movs r2, #0 8005b24: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 8005b26: 687b ldr r3, [r7, #4] 8005b28: 2200 movs r2, #0 8005b2a: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Clear regular group conversion flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 8005b2e: 687b ldr r3, [r7, #4] 8005b30: 681b ldr r3, [r3, #0] 8005b32: f06f 0202 mvn.w r2, #2 8005b36: 601a str r2, [r3, #0] /* - if ADC is slave, ADC is enabled only (conversion is not started). */ /* - if ADC is master, ADC is enabled and conversion is started. */ /* If ADC is master, ADC is enabled and conversion is started. */ /* Note: Alternate trigger for single conversion could be to force an */ /* additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/ if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8005b38: 687b ldr r3, [r7, #4] 8005b3a: 681b ldr r3, [r3, #0] 8005b3c: 689b ldr r3, [r3, #8] 8005b3e: f403 2360 and.w r3, r3, #917504 @ 0xe0000 8005b42: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 8005b46: d113 bne.n 8005b70 ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) ) 8005b48: 687b ldr r3, [r7, #4] 8005b4a: 681b ldr r3, [r3, #0] if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8005b4c: 4a11 ldr r2, [pc, #68] @ (8005b94 ) 8005b4e: 4293 cmp r3, r2 8005b50: d105 bne.n 8005b5e ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) ) 8005b52: 4b11 ldr r3, [pc, #68] @ (8005b98 ) 8005b54: 685b ldr r3, [r3, #4] 8005b56: f403 2370 and.w r3, r3, #983040 @ 0xf0000 if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8005b5a: 2b00 cmp r3, #0 8005b5c: d108 bne.n 8005b70 { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 8005b5e: 687b ldr r3, [r7, #4] 8005b60: 681b ldr r3, [r3, #0] 8005b62: 689a ldr r2, [r3, #8] 8005b64: 687b ldr r3, [r7, #4] 8005b66: 681b ldr r3, [r3, #0] 8005b68: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 8005b6c: 609a str r2, [r3, #8] 8005b6e: e00c b.n 8005b8a } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 8005b70: 687b ldr r3, [r7, #4] 8005b72: 681b ldr r3, [r3, #0] 8005b74: 689a ldr r2, [r3, #8] 8005b76: 687b ldr r3, [r7, #4] 8005b78: 681b ldr r3, [r3, #0] 8005b7a: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 8005b7e: 609a str r2, [r3, #8] 8005b80: e003 b.n 8005b8a } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 8005b82: 687b ldr r3, [r7, #4] 8005b84: 2200 movs r2, #0 8005b86: f883 2024 strb.w r2, [r3, #36] @ 0x24 } /* Return function status */ return tmp_hal_status; 8005b8a: 7bfb ldrb r3, [r7, #15] } 8005b8c: 4618 mov r0, r3 8005b8e: 3710 adds r7, #16 8005b90: 46bd mov sp, r7 8005b92: bd80 pop {r7, pc} 8005b94: 40012800 .word 0x40012800 8005b98: 40012400 .word 0x40012400 08005b9c : * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) { 8005b9c: b580 push {r7, lr} 8005b9e: b084 sub sp, #16 8005ba0: af00 add r7, sp, #0 8005ba2: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8005ba4: 2300 movs r3, #0 8005ba6: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 8005ba8: 687b ldr r3, [r7, #4] 8005baa: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8005bae: 2b01 cmp r3, #1 8005bb0: d101 bne.n 8005bb6 8005bb2: 2302 movs r3, #2 8005bb4: e01a b.n 8005bec 8005bb6: 687b ldr r3, [r7, #4] 8005bb8: 2201 movs r2, #1 8005bba: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 8005bbe: 6878 ldr r0, [r7, #4] 8005bc0: f000 fa7c bl 80060bc 8005bc4: 4603 mov r3, r0 8005bc6: 73fb strb r3, [r7, #15] /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) 8005bc8: 7bfb ldrb r3, [r7, #15] 8005bca: 2b00 cmp r3, #0 8005bcc: d109 bne.n 8005be2 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8005bce: 687b ldr r3, [r7, #4] 8005bd0: 6a9b ldr r3, [r3, #40] @ 0x28 8005bd2: f423 5388 bic.w r3, r3, #4352 @ 0x1100 8005bd6: f023 0301 bic.w r3, r3, #1 8005bda: f043 0201 orr.w r2, r3, #1 8005bde: 687b ldr r3, [r7, #4] 8005be0: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 8005be2: 687b ldr r3, [r7, #4] 8005be4: 2200 movs r2, #0 8005be6: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 8005bea: 7bfb ldrb r3, [r7, #15] } 8005bec: 4618 mov r0, r3 8005bee: 3710 adds r7, #16 8005bf0: 46bd mov sp, r7 8005bf2: bd80 pop {r7, pc} 08005bf4 : * @param hadc: ADC handle * @param Timeout: Timeout value in millisecond. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) { 8005bf4: b590 push {r4, r7, lr} 8005bf6: b087 sub sp, #28 8005bf8: af00 add r7, sp, #0 8005bfa: 6078 str r0, [r7, #4] 8005bfc: 6039 str r1, [r7, #0] uint32_t tickstart = 0U; 8005bfe: 2300 movs r3, #0 8005c00: 617b str r3, [r7, #20] /* Variables for polling in case of scan mode enabled and polling for each */ /* conversion. */ __IO uint32_t Conversion_Timeout_CPU_cycles = 0U; 8005c02: 2300 movs r3, #0 8005c04: 60fb str r3, [r7, #12] uint32_t Conversion_Timeout_CPU_cycles_max = 0U; 8005c06: 2300 movs r3, #0 8005c08: 613b str r3, [r7, #16] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Get tick count */ tickstart = HAL_GetTick(); 8005c0a: f7ff fe13 bl 8005834 8005c0e: 6178 str r0, [r7, #20] /* Verification that ADC configuration is compliant with polling for */ /* each conversion: */ /* Particular case is ADC configured in DMA mode */ if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA)) 8005c10: 687b ldr r3, [r7, #4] 8005c12: 681b ldr r3, [r3, #0] 8005c14: 689b ldr r3, [r3, #8] 8005c16: f403 7380 and.w r3, r3, #256 @ 0x100 8005c1a: 2b00 cmp r3, #0 8005c1c: d00b beq.n 8005c36 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8005c1e: 687b ldr r3, [r7, #4] 8005c20: 6a9b ldr r3, [r3, #40] @ 0x28 8005c22: f043 0220 orr.w r2, r3, #32 8005c26: 687b ldr r3, [r7, #4] 8005c28: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 8005c2a: 687b ldr r3, [r7, #4] 8005c2c: 2200 movs r2, #0 8005c2e: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 8005c32: 2301 movs r3, #1 8005c34: e0d3 b.n 8005dde /* from ADC conversion time (selected sampling time + conversion time of */ /* 12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on */ /* settings, conversion time range can be from 28 to 32256 CPU cycles). */ /* As flag EOC is not set after each conversion, no timeout status can */ /* be set. */ if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 8005c36: 687b ldr r3, [r7, #4] 8005c38: 681b ldr r3, [r3, #0] 8005c3a: 685b ldr r3, [r3, #4] 8005c3c: f403 7380 and.w r3, r3, #256 @ 0x100 8005c40: 2b00 cmp r3, #0 8005c42: d131 bne.n 8005ca8 HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ) 8005c44: 687b ldr r3, [r7, #4] 8005c46: 681b ldr r3, [r3, #0] 8005c48: 6adb ldr r3, [r3, #44] @ 0x2c 8005c4a: f403 0370 and.w r3, r3, #15728640 @ 0xf00000 if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 8005c4e: 2b00 cmp r3, #0 8005c50: d12a bne.n 8005ca8 { /* Wait until End of Conversion flag is raised */ while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 8005c52: e021 b.n 8005c98 { /* Check if timeout is disabled (set to infinite wait) */ if(Timeout != HAL_MAX_DELAY) 8005c54: 683b ldr r3, [r7, #0] 8005c56: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8005c5a: d01d beq.n 8005c98 { if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout)) 8005c5c: 683b ldr r3, [r7, #0] 8005c5e: 2b00 cmp r3, #0 8005c60: d007 beq.n 8005c72 8005c62: f7ff fde7 bl 8005834 8005c66: 4602 mov r2, r0 8005c68: 697b ldr r3, [r7, #20] 8005c6a: 1ad3 subs r3, r2, r3 8005c6c: 683a ldr r2, [r7, #0] 8005c6e: 429a cmp r2, r3 8005c70: d212 bcs.n 8005c98 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 8005c72: 687b ldr r3, [r7, #4] 8005c74: 681b ldr r3, [r3, #0] 8005c76: 681b ldr r3, [r3, #0] 8005c78: f003 0302 and.w r3, r3, #2 8005c7c: 2b00 cmp r3, #0 8005c7e: d10b bne.n 8005c98 { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 8005c80: 687b ldr r3, [r7, #4] 8005c82: 6a9b ldr r3, [r3, #40] @ 0x28 8005c84: f043 0204 orr.w r2, r3, #4 8005c88: 687b ldr r3, [r7, #4] 8005c8a: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 8005c8c: 687b ldr r3, [r7, #4] 8005c8e: 2200 movs r2, #0 8005c90: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_TIMEOUT; 8005c94: 2303 movs r3, #3 8005c96: e0a2 b.n 8005dde while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 8005c98: 687b ldr r3, [r7, #4] 8005c9a: 681b ldr r3, [r3, #0] 8005c9c: 681b ldr r3, [r3, #0] 8005c9e: f003 0302 and.w r3, r3, #2 8005ca2: 2b00 cmp r3, #0 8005ca4: d0d6 beq.n 8005c54 if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 8005ca6: e070 b.n 8005d8a /* Replace polling by wait for maximum conversion time */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles */ /* and ADC maximum conversion cycles on all channels. */ /* - Wait for the expected ADC clock cycles delay */ Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 8005ca8: 4b4f ldr r3, [pc, #316] @ (8005de8 ) 8005caa: 681c ldr r4, [r3, #0] 8005cac: 2002 movs r0, #2 8005cae: f002 fc0f bl 80084d0 8005cb2: 4603 mov r3, r0 8005cb4: fbb4 f2f3 udiv r2, r4, r3 * ADC_CONVCYCLES_MAX_RANGE(hadc) ); 8005cb8: 687b ldr r3, [r7, #4] 8005cba: 681b ldr r3, [r3, #0] 8005cbc: 6919 ldr r1, [r3, #16] 8005cbe: 4b4b ldr r3, [pc, #300] @ (8005dec ) 8005cc0: 400b ands r3, r1 8005cc2: 2b00 cmp r3, #0 8005cc4: d118 bne.n 8005cf8 8005cc6: 687b ldr r3, [r7, #4] 8005cc8: 681b ldr r3, [r3, #0] 8005cca: 68d9 ldr r1, [r3, #12] 8005ccc: 4b48 ldr r3, [pc, #288] @ (8005df0 ) 8005cce: 400b ands r3, r1 8005cd0: 2b00 cmp r3, #0 8005cd2: d111 bne.n 8005cf8 8005cd4: 687b ldr r3, [r7, #4] 8005cd6: 681b ldr r3, [r3, #0] 8005cd8: 6919 ldr r1, [r3, #16] 8005cda: 4b46 ldr r3, [pc, #280] @ (8005df4 ) 8005cdc: 400b ands r3, r1 8005cde: 2b00 cmp r3, #0 8005ce0: d108 bne.n 8005cf4 8005ce2: 687b ldr r3, [r7, #4] 8005ce4: 681b ldr r3, [r3, #0] 8005ce6: 68d9 ldr r1, [r3, #12] 8005ce8: 4b43 ldr r3, [pc, #268] @ (8005df8 ) 8005cea: 400b ands r3, r1 8005cec: 2b00 cmp r3, #0 8005cee: d101 bne.n 8005cf4 8005cf0: 2314 movs r3, #20 8005cf2: e020 b.n 8005d36 8005cf4: 2329 movs r3, #41 @ 0x29 8005cf6: e01e b.n 8005d36 8005cf8: 687b ldr r3, [r7, #4] 8005cfa: 681b ldr r3, [r3, #0] 8005cfc: 6919 ldr r1, [r3, #16] 8005cfe: 4b3d ldr r3, [pc, #244] @ (8005df4 ) 8005d00: 400b ands r3, r1 8005d02: 2b00 cmp r3, #0 8005d04: d106 bne.n 8005d14 8005d06: 687b ldr r3, [r7, #4] 8005d08: 681b ldr r3, [r3, #0] 8005d0a: 68d9 ldr r1, [r3, #12] 8005d0c: 4b3a ldr r3, [pc, #232] @ (8005df8 ) 8005d0e: 400b ands r3, r1 8005d10: 2b00 cmp r3, #0 8005d12: d00d beq.n 8005d30 8005d14: 687b ldr r3, [r7, #4] 8005d16: 681b ldr r3, [r3, #0] 8005d18: 6919 ldr r1, [r3, #16] 8005d1a: 4b38 ldr r3, [pc, #224] @ (8005dfc ) 8005d1c: 400b ands r3, r1 8005d1e: 2b00 cmp r3, #0 8005d20: d108 bne.n 8005d34 8005d22: 687b ldr r3, [r7, #4] 8005d24: 681b ldr r3, [r3, #0] 8005d26: 68d9 ldr r1, [r3, #12] 8005d28: 4b34 ldr r3, [pc, #208] @ (8005dfc ) 8005d2a: 400b ands r3, r1 8005d2c: 2b00 cmp r3, #0 8005d2e: d101 bne.n 8005d34 8005d30: 2354 movs r3, #84 @ 0x54 8005d32: e000 b.n 8005d36 8005d34: 23fc movs r3, #252 @ 0xfc Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock 8005d36: fb02 f303 mul.w r3, r2, r3 8005d3a: 613b str r3, [r7, #16] while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 8005d3c: e021 b.n 8005d82 { /* Check if timeout is disabled (set to infinite wait) */ if(Timeout != HAL_MAX_DELAY) 8005d3e: 683b ldr r3, [r7, #0] 8005d40: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8005d44: d01a beq.n 8005d7c { if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) 8005d46: 683b ldr r3, [r7, #0] 8005d48: 2b00 cmp r3, #0 8005d4a: d007 beq.n 8005d5c 8005d4c: f7ff fd72 bl 8005834 8005d50: 4602 mov r2, r0 8005d52: 697b ldr r3, [r7, #20] 8005d54: 1ad3 subs r3, r2, r3 8005d56: 683a ldr r2, [r7, #0] 8005d58: 429a cmp r2, r3 8005d5a: d20f bcs.n 8005d7c { /* New check to avoid false timeout detection in case of preemption */ if(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 8005d5c: 68fb ldr r3, [r7, #12] 8005d5e: 693a ldr r2, [r7, #16] 8005d60: 429a cmp r2, r3 8005d62: d90b bls.n 8005d7c { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 8005d64: 687b ldr r3, [r7, #4] 8005d66: 6a9b ldr r3, [r3, #40] @ 0x28 8005d68: f043 0204 orr.w r2, r3, #4 8005d6c: 687b ldr r3, [r7, #4] 8005d6e: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 8005d70: 687b ldr r3, [r7, #4] 8005d72: 2200 movs r2, #0 8005d74: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_TIMEOUT; 8005d78: 2303 movs r3, #3 8005d7a: e030 b.n 8005dde } } } Conversion_Timeout_CPU_cycles ++; 8005d7c: 68fb ldr r3, [r7, #12] 8005d7e: 3301 adds r3, #1 8005d80: 60fb str r3, [r7, #12] while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 8005d82: 68fb ldr r3, [r7, #12] 8005d84: 693a ldr r2, [r7, #16] 8005d86: 429a cmp r2, r3 8005d88: d8d9 bhi.n 8005d3e } } /* Clear regular group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC); 8005d8a: 687b ldr r3, [r7, #4] 8005d8c: 681b ldr r3, [r3, #0] 8005d8e: f06f 0212 mvn.w r2, #18 8005d92: 601a str r2, [r3, #0] /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 8005d94: 687b ldr r3, [r7, #4] 8005d96: 6a9b ldr r3, [r3, #40] @ 0x28 8005d98: f443 7200 orr.w r2, r3, #512 @ 0x200 8005d9c: 687b ldr r3, [r7, #4] 8005d9e: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8005da0: 687b ldr r3, [r7, #4] 8005da2: 681b ldr r3, [r3, #0] 8005da4: 689b ldr r3, [r3, #8] 8005da6: f403 2360 and.w r3, r3, #917504 @ 0xe0000 8005daa: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 8005dae: d115 bne.n 8005ddc (hadc->Init.ContinuousConvMode == DISABLE) ) 8005db0: 687b ldr r3, [r7, #4] 8005db2: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8005db4: 2b00 cmp r3, #0 8005db6: d111 bne.n 8005ddc { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 8005db8: 687b ldr r3, [r7, #4] 8005dba: 6a9b ldr r3, [r3, #40] @ 0x28 8005dbc: f423 7280 bic.w r2, r3, #256 @ 0x100 8005dc0: 687b ldr r3, [r7, #4] 8005dc2: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8005dc4: 687b ldr r3, [r7, #4] 8005dc6: 6a9b ldr r3, [r3, #40] @ 0x28 8005dc8: f403 5380 and.w r3, r3, #4096 @ 0x1000 8005dcc: 2b00 cmp r3, #0 8005dce: d105 bne.n 8005ddc { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 8005dd0: 687b ldr r3, [r7, #4] 8005dd2: 6a9b ldr r3, [r3, #40] @ 0x28 8005dd4: f043 0201 orr.w r2, r3, #1 8005dd8: 687b ldr r3, [r7, #4] 8005dda: 629a str r2, [r3, #40] @ 0x28 } } /* Return ADC state */ return HAL_OK; 8005ddc: 2300 movs r3, #0 } 8005dde: 4618 mov r0, r3 8005de0: 371c adds r7, #28 8005de2: 46bd mov sp, r7 8005de4: bd90 pop {r4, r7, pc} 8005de6: bf00 nop 8005de8: 20000008 .word 0x20000008 8005dec: 24924924 .word 0x24924924 8005df0: 00924924 .word 0x00924924 8005df4: 12492492 .word 0x12492492 8005df8: 00492492 .word 0x00492492 8005dfc: 00249249 .word 0x00249249 08005e00 : * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). * @param hadc: ADC handle * @retval ADC group regular conversion data */ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) { 8005e00: b480 push {r7} 8005e02: b083 sub sp, #12 8005e04: af00 add r7, sp, #0 8005e06: 6078 str r0, [r7, #4] /* Note: EOC flag is not cleared here by software because automatically */ /* cleared by hardware when reading register DR. */ /* Return ADC converted value */ return hadc->Instance->DR; 8005e08: 687b ldr r3, [r7, #4] 8005e0a: 681b ldr r3, [r3, #0] 8005e0c: 6cdb ldr r3, [r3, #76] @ 0x4c } 8005e0e: 4618 mov r0, r3 8005e10: 370c adds r7, #12 8005e12: 46bd mov sp, r7 8005e14: bc80 pop {r7} 8005e16: 4770 bx lr 08005e18 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 8005e18: b480 push {r7} 8005e1a: b085 sub sp, #20 8005e1c: af00 add r7, sp, #0 8005e1e: 6078 str r0, [r7, #4] 8005e20: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8005e22: 2300 movs r3, #0 8005e24: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 8005e26: 2300 movs r3, #0 8005e28: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 8005e2a: 687b ldr r3, [r7, #4] 8005e2c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8005e30: 2b01 cmp r3, #1 8005e32: d101 bne.n 8005e38 8005e34: 2302 movs r3, #2 8005e36: e0dc b.n 8005ff2 8005e38: 687b ldr r3, [r7, #4] 8005e3a: 2201 movs r2, #1 8005e3c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 8005e40: 683b ldr r3, [r7, #0] 8005e42: 685b ldr r3, [r3, #4] 8005e44: 2b06 cmp r3, #6 8005e46: d81c bhi.n 8005e82 { MODIFY_REG(hadc->Instance->SQR3 , 8005e48: 687b ldr r3, [r7, #4] 8005e4a: 681b ldr r3, [r3, #0] 8005e4c: 6b59 ldr r1, [r3, #52] @ 0x34 8005e4e: 683b ldr r3, [r7, #0] 8005e50: 685a ldr r2, [r3, #4] 8005e52: 4613 mov r3, r2 8005e54: 009b lsls r3, r3, #2 8005e56: 4413 add r3, r2 8005e58: 3b05 subs r3, #5 8005e5a: 221f movs r2, #31 8005e5c: fa02 f303 lsl.w r3, r2, r3 8005e60: 43db mvns r3, r3 8005e62: 4019 ands r1, r3 8005e64: 683b ldr r3, [r7, #0] 8005e66: 6818 ldr r0, [r3, #0] 8005e68: 683b ldr r3, [r7, #0] 8005e6a: 685a ldr r2, [r3, #4] 8005e6c: 4613 mov r3, r2 8005e6e: 009b lsls r3, r3, #2 8005e70: 4413 add r3, r2 8005e72: 3b05 subs r3, #5 8005e74: fa00 f203 lsl.w r2, r0, r3 8005e78: 687b ldr r3, [r7, #4] 8005e7a: 681b ldr r3, [r3, #0] 8005e7c: 430a orrs r2, r1 8005e7e: 635a str r2, [r3, #52] @ 0x34 8005e80: e03c b.n 8005efc ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 8005e82: 683b ldr r3, [r7, #0] 8005e84: 685b ldr r3, [r3, #4] 8005e86: 2b0c cmp r3, #12 8005e88: d81c bhi.n 8005ec4 { MODIFY_REG(hadc->Instance->SQR2 , 8005e8a: 687b ldr r3, [r7, #4] 8005e8c: 681b ldr r3, [r3, #0] 8005e8e: 6b19 ldr r1, [r3, #48] @ 0x30 8005e90: 683b ldr r3, [r7, #0] 8005e92: 685a ldr r2, [r3, #4] 8005e94: 4613 mov r3, r2 8005e96: 009b lsls r3, r3, #2 8005e98: 4413 add r3, r2 8005e9a: 3b23 subs r3, #35 @ 0x23 8005e9c: 221f movs r2, #31 8005e9e: fa02 f303 lsl.w r3, r2, r3 8005ea2: 43db mvns r3, r3 8005ea4: 4019 ands r1, r3 8005ea6: 683b ldr r3, [r7, #0] 8005ea8: 6818 ldr r0, [r3, #0] 8005eaa: 683b ldr r3, [r7, #0] 8005eac: 685a ldr r2, [r3, #4] 8005eae: 4613 mov r3, r2 8005eb0: 009b lsls r3, r3, #2 8005eb2: 4413 add r3, r2 8005eb4: 3b23 subs r3, #35 @ 0x23 8005eb6: fa00 f203 lsl.w r2, r0, r3 8005eba: 687b ldr r3, [r7, #4] 8005ebc: 681b ldr r3, [r3, #0] 8005ebe: 430a orrs r2, r1 8005ec0: 631a str r2, [r3, #48] @ 0x30 8005ec2: e01b b.n 8005efc ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 8005ec4: 687b ldr r3, [r7, #4] 8005ec6: 681b ldr r3, [r3, #0] 8005ec8: 6ad9 ldr r1, [r3, #44] @ 0x2c 8005eca: 683b ldr r3, [r7, #0] 8005ecc: 685a ldr r2, [r3, #4] 8005ece: 4613 mov r3, r2 8005ed0: 009b lsls r3, r3, #2 8005ed2: 4413 add r3, r2 8005ed4: 3b41 subs r3, #65 @ 0x41 8005ed6: 221f movs r2, #31 8005ed8: fa02 f303 lsl.w r3, r2, r3 8005edc: 43db mvns r3, r3 8005ede: 4019 ands r1, r3 8005ee0: 683b ldr r3, [r7, #0] 8005ee2: 6818 ldr r0, [r3, #0] 8005ee4: 683b ldr r3, [r7, #0] 8005ee6: 685a ldr r2, [r3, #4] 8005ee8: 4613 mov r3, r2 8005eea: 009b lsls r3, r3, #2 8005eec: 4413 add r3, r2 8005eee: 3b41 subs r3, #65 @ 0x41 8005ef0: fa00 f203 lsl.w r2, r0, r3 8005ef4: 687b ldr r3, [r7, #4] 8005ef6: 681b ldr r3, [r3, #0] 8005ef8: 430a orrs r2, r1 8005efa: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 8005efc: 683b ldr r3, [r7, #0] 8005efe: 681b ldr r3, [r3, #0] 8005f00: 2b09 cmp r3, #9 8005f02: d91c bls.n 8005f3e { MODIFY_REG(hadc->Instance->SMPR1 , 8005f04: 687b ldr r3, [r7, #4] 8005f06: 681b ldr r3, [r3, #0] 8005f08: 68d9 ldr r1, [r3, #12] 8005f0a: 683b ldr r3, [r7, #0] 8005f0c: 681a ldr r2, [r3, #0] 8005f0e: 4613 mov r3, r2 8005f10: 005b lsls r3, r3, #1 8005f12: 4413 add r3, r2 8005f14: 3b1e subs r3, #30 8005f16: 2207 movs r2, #7 8005f18: fa02 f303 lsl.w r3, r2, r3 8005f1c: 43db mvns r3, r3 8005f1e: 4019 ands r1, r3 8005f20: 683b ldr r3, [r7, #0] 8005f22: 6898 ldr r0, [r3, #8] 8005f24: 683b ldr r3, [r7, #0] 8005f26: 681a ldr r2, [r3, #0] 8005f28: 4613 mov r3, r2 8005f2a: 005b lsls r3, r3, #1 8005f2c: 4413 add r3, r2 8005f2e: 3b1e subs r3, #30 8005f30: fa00 f203 lsl.w r2, r0, r3 8005f34: 687b ldr r3, [r7, #4] 8005f36: 681b ldr r3, [r3, #0] 8005f38: 430a orrs r2, r1 8005f3a: 60da str r2, [r3, #12] 8005f3c: e019 b.n 8005f72 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 8005f3e: 687b ldr r3, [r7, #4] 8005f40: 681b ldr r3, [r3, #0] 8005f42: 6919 ldr r1, [r3, #16] 8005f44: 683b ldr r3, [r7, #0] 8005f46: 681a ldr r2, [r3, #0] 8005f48: 4613 mov r3, r2 8005f4a: 005b lsls r3, r3, #1 8005f4c: 4413 add r3, r2 8005f4e: 2207 movs r2, #7 8005f50: fa02 f303 lsl.w r3, r2, r3 8005f54: 43db mvns r3, r3 8005f56: 4019 ands r1, r3 8005f58: 683b ldr r3, [r7, #0] 8005f5a: 6898 ldr r0, [r3, #8] 8005f5c: 683b ldr r3, [r7, #0] 8005f5e: 681a ldr r2, [r3, #0] 8005f60: 4613 mov r3, r2 8005f62: 005b lsls r3, r3, #1 8005f64: 4413 add r3, r2 8005f66: fa00 f203 lsl.w r2, r0, r3 8005f6a: 687b ldr r3, [r7, #4] 8005f6c: 681b ldr r3, [r3, #0] 8005f6e: 430a orrs r2, r1 8005f70: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8005f72: 683b ldr r3, [r7, #0] 8005f74: 681b ldr r3, [r3, #0] 8005f76: 2b10 cmp r3, #16 8005f78: d003 beq.n 8005f82 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 8005f7a: 683b ldr r3, [r7, #0] 8005f7c: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8005f7e: 2b11 cmp r3, #17 8005f80: d132 bne.n 8005fe8 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 8005f82: 687b ldr r3, [r7, #4] 8005f84: 681b ldr r3, [r3, #0] 8005f86: 4a1d ldr r2, [pc, #116] @ (8005ffc ) 8005f88: 4293 cmp r3, r2 8005f8a: d125 bne.n 8005fd8 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 8005f8c: 687b ldr r3, [r7, #4] 8005f8e: 681b ldr r3, [r3, #0] 8005f90: 689b ldr r3, [r3, #8] 8005f92: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8005f96: 2b00 cmp r3, #0 8005f98: d126 bne.n 8005fe8 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 8005f9a: 687b ldr r3, [r7, #4] 8005f9c: 681b ldr r3, [r3, #0] 8005f9e: 689a ldr r2, [r3, #8] 8005fa0: 687b ldr r3, [r7, #4] 8005fa2: 681b ldr r3, [r3, #0] 8005fa4: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 8005fa8: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 8005faa: 683b ldr r3, [r7, #0] 8005fac: 681b ldr r3, [r3, #0] 8005fae: 2b10 cmp r3, #16 8005fb0: d11a bne.n 8005fe8 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8005fb2: 4b13 ldr r3, [pc, #76] @ (8006000 ) 8005fb4: 681b ldr r3, [r3, #0] 8005fb6: 4a13 ldr r2, [pc, #76] @ (8006004 ) 8005fb8: fba2 2303 umull r2, r3, r2, r3 8005fbc: 0c9a lsrs r2, r3, #18 8005fbe: 4613 mov r3, r2 8005fc0: 009b lsls r3, r3, #2 8005fc2: 4413 add r3, r2 8005fc4: 005b lsls r3, r3, #1 8005fc6: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8005fc8: e002 b.n 8005fd0 { wait_loop_index--; 8005fca: 68bb ldr r3, [r7, #8] 8005fcc: 3b01 subs r3, #1 8005fce: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8005fd0: 68bb ldr r3, [r7, #8] 8005fd2: 2b00 cmp r3, #0 8005fd4: d1f9 bne.n 8005fca 8005fd6: e007 b.n 8005fe8 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8005fd8: 687b ldr r3, [r7, #4] 8005fda: 6a9b ldr r3, [r3, #40] @ 0x28 8005fdc: f043 0220 orr.w r2, r3, #32 8005fe0: 687b ldr r3, [r7, #4] 8005fe2: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8005fe4: 2301 movs r3, #1 8005fe6: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 8005fe8: 687b ldr r3, [r7, #4] 8005fea: 2200 movs r2, #0 8005fec: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 8005ff0: 7bfb ldrb r3, [r7, #15] } 8005ff2: 4618 mov r0, r3 8005ff4: 3714 adds r7, #20 8005ff6: 46bd mov sp, r7 8005ff8: bc80 pop {r7} 8005ffa: 4770 bx lr 8005ffc: 40012400 .word 0x40012400 8006000: 20000008 .word 0x20000008 8006004: 431bde83 .word 0x431bde83 08006008 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 8006008: b580 push {r7, lr} 800600a: b084 sub sp, #16 800600c: af00 add r7, sp, #0 800600e: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8006010: 2300 movs r3, #0 8006012: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 8006014: 2300 movs r3, #0 8006016: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 8006018: 687b ldr r3, [r7, #4] 800601a: 681b ldr r3, [r3, #0] 800601c: 689b ldr r3, [r3, #8] 800601e: f003 0301 and.w r3, r3, #1 8006022: 2b01 cmp r3, #1 8006024: d040 beq.n 80060a8 { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 8006026: 687b ldr r3, [r7, #4] 8006028: 681b ldr r3, [r3, #0] 800602a: 689a ldr r2, [r3, #8] 800602c: 687b ldr r3, [r7, #4] 800602e: 681b ldr r3, [r3, #0] 8006030: f042 0201 orr.w r2, r2, #1 8006034: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 8006036: 4b1f ldr r3, [pc, #124] @ (80060b4 ) 8006038: 681b ldr r3, [r3, #0] 800603a: 4a1f ldr r2, [pc, #124] @ (80060b8 ) 800603c: fba2 2303 umull r2, r3, r2, r3 8006040: 0c9b lsrs r3, r3, #18 8006042: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8006044: e002 b.n 800604c { wait_loop_index--; 8006046: 68bb ldr r3, [r7, #8] 8006048: 3b01 subs r3, #1 800604a: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800604c: 68bb ldr r3, [r7, #8] 800604e: 2b00 cmp r3, #0 8006050: d1f9 bne.n 8006046 } /* Get tick count */ tickstart = HAL_GetTick(); 8006052: f7ff fbef bl 8005834 8006056: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 8006058: e01f b.n 800609a { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 800605a: f7ff fbeb bl 8005834 800605e: 4602 mov r2, r0 8006060: 68fb ldr r3, [r7, #12] 8006062: 1ad3 subs r3, r2, r3 8006064: 2b02 cmp r3, #2 8006066: d918 bls.n 800609a { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 8006068: 687b ldr r3, [r7, #4] 800606a: 681b ldr r3, [r3, #0] 800606c: 689b ldr r3, [r3, #8] 800606e: f003 0301 and.w r3, r3, #1 8006072: 2b01 cmp r3, #1 8006074: d011 beq.n 800609a { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8006076: 687b ldr r3, [r7, #4] 8006078: 6a9b ldr r3, [r3, #40] @ 0x28 800607a: f043 0210 orr.w r2, r3, #16 800607e: 687b ldr r3, [r7, #4] 8006080: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8006082: 687b ldr r3, [r7, #4] 8006084: 6adb ldr r3, [r3, #44] @ 0x2c 8006086: f043 0201 orr.w r2, r3, #1 800608a: 687b ldr r3, [r7, #4] 800608c: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 800608e: 687b ldr r3, [r7, #4] 8006090: 2200 movs r2, #0 8006092: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 8006096: 2301 movs r3, #1 8006098: e007 b.n 80060aa while(ADC_IS_ENABLE(hadc) == RESET) 800609a: 687b ldr r3, [r7, #4] 800609c: 681b ldr r3, [r3, #0] 800609e: 689b ldr r3, [r3, #8] 80060a0: f003 0301 and.w r3, r3, #1 80060a4: 2b01 cmp r3, #1 80060a6: d1d8 bne.n 800605a } } } /* Return HAL status */ return HAL_OK; 80060a8: 2300 movs r3, #0 } 80060aa: 4618 mov r0, r3 80060ac: 3710 adds r7, #16 80060ae: 46bd mov sp, r7 80060b0: bd80 pop {r7, pc} 80060b2: bf00 nop 80060b4: 20000008 .word 0x20000008 80060b8: 431bde83 .word 0x431bde83 080060bc : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 80060bc: b580 push {r7, lr} 80060be: b084 sub sp, #16 80060c0: af00 add r7, sp, #0 80060c2: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 80060c4: 2300 movs r3, #0 80060c6: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 80060c8: 687b ldr r3, [r7, #4] 80060ca: 681b ldr r3, [r3, #0] 80060cc: 689b ldr r3, [r3, #8] 80060ce: f003 0301 and.w r3, r3, #1 80060d2: 2b01 cmp r3, #1 80060d4: d12e bne.n 8006134 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 80060d6: 687b ldr r3, [r7, #4] 80060d8: 681b ldr r3, [r3, #0] 80060da: 689a ldr r2, [r3, #8] 80060dc: 687b ldr r3, [r7, #4] 80060de: 681b ldr r3, [r3, #0] 80060e0: f022 0201 bic.w r2, r2, #1 80060e4: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 80060e6: f7ff fba5 bl 8005834 80060ea: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 80060ec: e01b b.n 8006126 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 80060ee: f7ff fba1 bl 8005834 80060f2: 4602 mov r2, r0 80060f4: 68fb ldr r3, [r7, #12] 80060f6: 1ad3 subs r3, r2, r3 80060f8: 2b02 cmp r3, #2 80060fa: d914 bls.n 8006126 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 80060fc: 687b ldr r3, [r7, #4] 80060fe: 681b ldr r3, [r3, #0] 8006100: 689b ldr r3, [r3, #8] 8006102: f003 0301 and.w r3, r3, #1 8006106: 2b01 cmp r3, #1 8006108: d10d bne.n 8006126 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800610a: 687b ldr r3, [r7, #4] 800610c: 6a9b ldr r3, [r3, #40] @ 0x28 800610e: f043 0210 orr.w r2, r3, #16 8006112: 687b ldr r3, [r7, #4] 8006114: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8006116: 687b ldr r3, [r7, #4] 8006118: 6adb ldr r3, [r3, #44] @ 0x2c 800611a: f043 0201 orr.w r2, r3, #1 800611e: 687b ldr r3, [r7, #4] 8006120: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 8006122: 2301 movs r3, #1 8006124: e007 b.n 8006136 while(ADC_IS_ENABLE(hadc) != RESET) 8006126: 687b ldr r3, [r7, #4] 8006128: 681b ldr r3, [r3, #0] 800612a: 689b ldr r3, [r3, #8] 800612c: f003 0301 and.w r3, r3, #1 8006130: 2b01 cmp r3, #1 8006132: d0dc beq.n 80060ee } } } /* Return HAL status */ return HAL_OK; 8006134: 2300 movs r3, #0 } 8006136: 4618 mov r0, r3 8006138: 3710 adds r7, #16 800613a: 46bd mov sp, r7 800613c: bd80 pop {r7, pc} ... 08006140 : * the completion of this function. * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) { 8006140: b590 push {r4, r7, lr} 8006142: b087 sub sp, #28 8006144: af00 add r7, sp, #0 8006146: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8006148: 2300 movs r3, #0 800614a: 75fb strb r3, [r7, #23] uint32_t tickstart; __IO uint32_t wait_loop_index = 0U; 800614c: 2300 movs r3, #0 800614e: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 8006150: 687b ldr r3, [r7, #4] 8006152: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8006156: 2b01 cmp r3, #1 8006158: d101 bne.n 800615e 800615a: 2302 movs r3, #2 800615c: e095 b.n 800628a 800615e: 687b ldr r3, [r7, #4] 8006160: 2201 movs r2, #1 8006162: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* 1. Calibration prerequisite: */ /* - ADC must be disabled for at least two ADC clock cycles in disable */ /* mode before ADC enable */ /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 8006166: 6878 ldr r0, [r7, #4] 8006168: f7ff ffa8 bl 80060bc 800616c: 4603 mov r3, r0 800616e: 75fb strb r3, [r7, #23] /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) 8006170: 7dfb ldrb r3, [r7, #23] 8006172: 2b00 cmp r3, #0 8006174: f040 8084 bne.w 8006280 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8006178: 687b ldr r3, [r7, #4] 800617a: 6a9b ldr r3, [r3, #40] @ 0x28 800617c: f423 5388 bic.w r3, r3, #4352 @ 0x1100 8006180: f023 0302 bic.w r3, r3, #2 8006184: f043 0202 orr.w r2, r3, #2 8006188: 687b ldr r3, [r7, #4] 800618a: 629a str r2, [r3, #40] @ 0x28 /* Hardware prerequisite: delay before starting the calibration. */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles. */ /* - Wait for the expected ADC clock cycles delay */ wait_loop_index = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 800618c: 4b41 ldr r3, [pc, #260] @ (8006294 ) 800618e: 681c ldr r4, [r3, #0] 8006190: 2002 movs r0, #2 8006192: f002 f99d bl 80084d0 8006196: 4603 mov r3, r0 8006198: fbb4 f3f3 udiv r3, r4, r3 * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES ); 800619c: 005b lsls r3, r3, #1 wait_loop_index = ((SystemCoreClock 800619e: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 80061a0: e002 b.n 80061a8 { wait_loop_index--; 80061a2: 68fb ldr r3, [r7, #12] 80061a4: 3b01 subs r3, #1 80061a6: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 80061a8: 68fb ldr r3, [r7, #12] 80061aa: 2b00 cmp r3, #0 80061ac: d1f9 bne.n 80061a2 } /* 2. Enable the ADC peripheral */ ADC_Enable(hadc); 80061ae: 6878 ldr r0, [r7, #4] 80061b0: f7ff ff2a bl 8006008 /* 3. Resets ADC calibration registers */ SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL); 80061b4: 687b ldr r3, [r7, #4] 80061b6: 681b ldr r3, [r3, #0] 80061b8: 689a ldr r2, [r3, #8] 80061ba: 687b ldr r3, [r7, #4] 80061bc: 681b ldr r3, [r3, #0] 80061be: f042 0208 orr.w r2, r2, #8 80061c2: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 80061c4: f7ff fb36 bl 8005834 80061c8: 6138 str r0, [r7, #16] /* Wait for calibration reset completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 80061ca: e01b b.n 8006204 { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 80061cc: f7ff fb32 bl 8005834 80061d0: 4602 mov r2, r0 80061d2: 693b ldr r3, [r7, #16] 80061d4: 1ad3 subs r3, r2, r3 80061d6: 2b0a cmp r3, #10 80061d8: d914 bls.n 8006204 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 80061da: 687b ldr r3, [r7, #4] 80061dc: 681b ldr r3, [r3, #0] 80061de: 689b ldr r3, [r3, #8] 80061e0: f003 0308 and.w r3, r3, #8 80061e4: 2b00 cmp r3, #0 80061e6: d00d beq.n 8006204 { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 80061e8: 687b ldr r3, [r7, #4] 80061ea: 6a9b ldr r3, [r3, #40] @ 0x28 80061ec: f023 0312 bic.w r3, r3, #18 80061f0: f043 0210 orr.w r2, r3, #16 80061f4: 687b ldr r3, [r7, #4] 80061f6: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 80061f8: 687b ldr r3, [r7, #4] 80061fa: 2200 movs r2, #0 80061fc: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 8006200: 2301 movs r3, #1 8006202: e042 b.n 800628a while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 8006204: 687b ldr r3, [r7, #4] 8006206: 681b ldr r3, [r3, #0] 8006208: 689b ldr r3, [r3, #8] 800620a: f003 0308 and.w r3, r3, #8 800620e: 2b00 cmp r3, #0 8006210: d1dc bne.n 80061cc } } } /* 4. Start ADC calibration */ SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL); 8006212: 687b ldr r3, [r7, #4] 8006214: 681b ldr r3, [r3, #0] 8006216: 689a ldr r2, [r3, #8] 8006218: 687b ldr r3, [r7, #4] 800621a: 681b ldr r3, [r3, #0] 800621c: f042 0204 orr.w r2, r2, #4 8006220: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 8006222: f7ff fb07 bl 8005834 8006226: 6138 str r0, [r7, #16] /* Wait for calibration completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 8006228: e01b b.n 8006262 { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 800622a: f7ff fb03 bl 8005834 800622e: 4602 mov r2, r0 8006230: 693b ldr r3, [r7, #16] 8006232: 1ad3 subs r3, r2, r3 8006234: 2b0a cmp r3, #10 8006236: d914 bls.n 8006262 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 8006238: 687b ldr r3, [r7, #4] 800623a: 681b ldr r3, [r3, #0] 800623c: 689b ldr r3, [r3, #8] 800623e: f003 0304 and.w r3, r3, #4 8006242: 2b00 cmp r3, #0 8006244: d00d beq.n 8006262 { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 8006246: 687b ldr r3, [r7, #4] 8006248: 6a9b ldr r3, [r3, #40] @ 0x28 800624a: f023 0312 bic.w r3, r3, #18 800624e: f043 0210 orr.w r2, r3, #16 8006252: 687b ldr r3, [r7, #4] 8006254: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 8006256: 687b ldr r3, [r7, #4] 8006258: 2200 movs r2, #0 800625a: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800625e: 2301 movs r3, #1 8006260: e013 b.n 800628a while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 8006262: 687b ldr r3, [r7, #4] 8006264: 681b ldr r3, [r3, #0] 8006266: 689b ldr r3, [r3, #8] 8006268: f003 0304 and.w r3, r3, #4 800626c: 2b00 cmp r3, #0 800626e: d1dc bne.n 800622a } } } /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8006270: 687b ldr r3, [r7, #4] 8006272: 6a9b ldr r3, [r3, #40] @ 0x28 8006274: f023 0303 bic.w r3, r3, #3 8006278: f043 0201 orr.w r2, r3, #1 800627c: 687b ldr r3, [r7, #4] 800627e: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 8006280: 687b ldr r3, [r7, #4] 8006282: 2200 movs r2, #0 8006284: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 8006288: 7dfb ldrb r3, [r7, #23] } 800628a: 4618 mov r0, r3 800628c: 371c adds r7, #28 800628e: 46bd mov sp, r7 8006290: bd90 pop {r4, r7, pc} 8006292: bf00 nop 8006294: 20000008 .word 0x20000008 08006298 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) { 8006298: b580 push {r7, lr} 800629a: b084 sub sp, #16 800629c: af00 add r7, sp, #0 800629e: 6078 str r0, [r7, #4] uint32_t tickstart; /* Check CAN handle */ if (hcan == NULL) 80062a0: 687b ldr r3, [r7, #4] 80062a2: 2b00 cmp r3, #0 80062a4: d101 bne.n 80062aa { return HAL_ERROR; 80062a6: 2301 movs r3, #1 80062a8: e0ed b.n 8006486 /* Init the low level hardware: CLOCK, NVIC */ hcan->MspInitCallback(hcan); } #else if (hcan->State == HAL_CAN_STATE_RESET) 80062aa: 687b ldr r3, [r7, #4] 80062ac: f893 3020 ldrb.w r3, [r3, #32] 80062b0: b2db uxtb r3, r3 80062b2: 2b00 cmp r3, #0 80062b4: d102 bne.n 80062bc { /* Init the low level hardware: CLOCK, NVIC */ HAL_CAN_MspInit(hcan); 80062b6: 6878 ldr r0, [r7, #4] 80062b8: f7fb fb94 bl 80019e4 } #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 80062bc: 687b ldr r3, [r7, #4] 80062be: 681b ldr r3, [r3, #0] 80062c0: 681a ldr r2, [r3, #0] 80062c2: 687b ldr r3, [r7, #4] 80062c4: 681b ldr r3, [r3, #0] 80062c6: f042 0201 orr.w r2, r2, #1 80062ca: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 80062cc: f7ff fab2 bl 8005834 80062d0: 60f8 str r0, [r7, #12] /* Wait initialisation acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 80062d2: e012 b.n 80062fa { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 80062d4: f7ff faae bl 8005834 80062d8: 4602 mov r2, r0 80062da: 68fb ldr r3, [r7, #12] 80062dc: 1ad3 subs r3, r2, r3 80062de: 2b0a cmp r3, #10 80062e0: d90b bls.n 80062fa { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 80062e2: 687b ldr r3, [r7, #4] 80062e4: 6a5b ldr r3, [r3, #36] @ 0x24 80062e6: f443 3200 orr.w r2, r3, #131072 @ 0x20000 80062ea: 687b ldr r3, [r7, #4] 80062ec: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 80062ee: 687b ldr r3, [r7, #4] 80062f0: 2205 movs r2, #5 80062f2: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 80062f6: 2301 movs r3, #1 80062f8: e0c5 b.n 8006486 while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 80062fa: 687b ldr r3, [r7, #4] 80062fc: 681b ldr r3, [r3, #0] 80062fe: 685b ldr r3, [r3, #4] 8006300: f003 0301 and.w r3, r3, #1 8006304: 2b00 cmp r3, #0 8006306: d0e5 beq.n 80062d4 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 8006308: 687b ldr r3, [r7, #4] 800630a: 681b ldr r3, [r3, #0] 800630c: 681a ldr r2, [r3, #0] 800630e: 687b ldr r3, [r7, #4] 8006310: 681b ldr r3, [r3, #0] 8006312: f022 0202 bic.w r2, r2, #2 8006316: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8006318: f7ff fa8c bl 8005834 800631c: 60f8 str r0, [r7, #12] /* Check Sleep mode leave acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 800631e: e012 b.n 8006346 { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 8006320: f7ff fa88 bl 8005834 8006324: 4602 mov r2, r0 8006326: 68fb ldr r3, [r7, #12] 8006328: 1ad3 subs r3, r2, r3 800632a: 2b0a cmp r3, #10 800632c: d90b bls.n 8006346 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800632e: 687b ldr r3, [r7, #4] 8006330: 6a5b ldr r3, [r3, #36] @ 0x24 8006332: f443 3200 orr.w r2, r3, #131072 @ 0x20000 8006336: 687b ldr r3, [r7, #4] 8006338: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800633a: 687b ldr r3, [r7, #4] 800633c: 2205 movs r2, #5 800633e: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 8006342: 2301 movs r3, #1 8006344: e09f b.n 8006486 while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 8006346: 687b ldr r3, [r7, #4] 8006348: 681b ldr r3, [r3, #0] 800634a: 685b ldr r3, [r3, #4] 800634c: f003 0302 and.w r3, r3, #2 8006350: 2b00 cmp r3, #0 8006352: d1e5 bne.n 8006320 } } /* Set the time triggered communication mode */ if (hcan->Init.TimeTriggeredMode == ENABLE) 8006354: 687b ldr r3, [r7, #4] 8006356: 7e1b ldrb r3, [r3, #24] 8006358: 2b01 cmp r3, #1 800635a: d108 bne.n 800636e { SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 800635c: 687b ldr r3, [r7, #4] 800635e: 681b ldr r3, [r3, #0] 8006360: 681a ldr r2, [r3, #0] 8006362: 687b ldr r3, [r7, #4] 8006364: 681b ldr r3, [r3, #0] 8006366: f042 0280 orr.w r2, r2, #128 @ 0x80 800636a: 601a str r2, [r3, #0] 800636c: e007 b.n 800637e } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 800636e: 687b ldr r3, [r7, #4] 8006370: 681b ldr r3, [r3, #0] 8006372: 681a ldr r2, [r3, #0] 8006374: 687b ldr r3, [r7, #4] 8006376: 681b ldr r3, [r3, #0] 8006378: f022 0280 bic.w r2, r2, #128 @ 0x80 800637c: 601a str r2, [r3, #0] } /* Set the automatic bus-off management */ if (hcan->Init.AutoBusOff == ENABLE) 800637e: 687b ldr r3, [r7, #4] 8006380: 7e5b ldrb r3, [r3, #25] 8006382: 2b01 cmp r3, #1 8006384: d108 bne.n 8006398 { SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 8006386: 687b ldr r3, [r7, #4] 8006388: 681b ldr r3, [r3, #0] 800638a: 681a ldr r2, [r3, #0] 800638c: 687b ldr r3, [r7, #4] 800638e: 681b ldr r3, [r3, #0] 8006390: f042 0240 orr.w r2, r2, #64 @ 0x40 8006394: 601a str r2, [r3, #0] 8006396: e007 b.n 80063a8 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 8006398: 687b ldr r3, [r7, #4] 800639a: 681b ldr r3, [r3, #0] 800639c: 681a ldr r2, [r3, #0] 800639e: 687b ldr r3, [r7, #4] 80063a0: 681b ldr r3, [r3, #0] 80063a2: f022 0240 bic.w r2, r2, #64 @ 0x40 80063a6: 601a str r2, [r3, #0] } /* Set the automatic wake-up mode */ if (hcan->Init.AutoWakeUp == ENABLE) 80063a8: 687b ldr r3, [r7, #4] 80063aa: 7e9b ldrb r3, [r3, #26] 80063ac: 2b01 cmp r3, #1 80063ae: d108 bne.n 80063c2 { SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 80063b0: 687b ldr r3, [r7, #4] 80063b2: 681b ldr r3, [r3, #0] 80063b4: 681a ldr r2, [r3, #0] 80063b6: 687b ldr r3, [r7, #4] 80063b8: 681b ldr r3, [r3, #0] 80063ba: f042 0220 orr.w r2, r2, #32 80063be: 601a str r2, [r3, #0] 80063c0: e007 b.n 80063d2 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 80063c2: 687b ldr r3, [r7, #4] 80063c4: 681b ldr r3, [r3, #0] 80063c6: 681a ldr r2, [r3, #0] 80063c8: 687b ldr r3, [r7, #4] 80063ca: 681b ldr r3, [r3, #0] 80063cc: f022 0220 bic.w r2, r2, #32 80063d0: 601a str r2, [r3, #0] } /* Set the automatic retransmission */ if (hcan->Init.AutoRetransmission == ENABLE) 80063d2: 687b ldr r3, [r7, #4] 80063d4: 7edb ldrb r3, [r3, #27] 80063d6: 2b01 cmp r3, #1 80063d8: d108 bne.n 80063ec { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); 80063da: 687b ldr r3, [r7, #4] 80063dc: 681b ldr r3, [r3, #0] 80063de: 681a ldr r2, [r3, #0] 80063e0: 687b ldr r3, [r7, #4] 80063e2: 681b ldr r3, [r3, #0] 80063e4: f022 0210 bic.w r2, r2, #16 80063e8: 601a str r2, [r3, #0] 80063ea: e007 b.n 80063fc } else { SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); 80063ec: 687b ldr r3, [r7, #4] 80063ee: 681b ldr r3, [r3, #0] 80063f0: 681a ldr r2, [r3, #0] 80063f2: 687b ldr r3, [r7, #4] 80063f4: 681b ldr r3, [r3, #0] 80063f6: f042 0210 orr.w r2, r2, #16 80063fa: 601a str r2, [r3, #0] } /* Set the receive FIFO locked mode */ if (hcan->Init.ReceiveFifoLocked == ENABLE) 80063fc: 687b ldr r3, [r7, #4] 80063fe: 7f1b ldrb r3, [r3, #28] 8006400: 2b01 cmp r3, #1 8006402: d108 bne.n 8006416 { SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 8006404: 687b ldr r3, [r7, #4] 8006406: 681b ldr r3, [r3, #0] 8006408: 681a ldr r2, [r3, #0] 800640a: 687b ldr r3, [r7, #4] 800640c: 681b ldr r3, [r3, #0] 800640e: f042 0208 orr.w r2, r2, #8 8006412: 601a str r2, [r3, #0] 8006414: e007 b.n 8006426 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 8006416: 687b ldr r3, [r7, #4] 8006418: 681b ldr r3, [r3, #0] 800641a: 681a ldr r2, [r3, #0] 800641c: 687b ldr r3, [r7, #4] 800641e: 681b ldr r3, [r3, #0] 8006420: f022 0208 bic.w r2, r2, #8 8006424: 601a str r2, [r3, #0] } /* Set the transmit FIFO priority */ if (hcan->Init.TransmitFifoPriority == ENABLE) 8006426: 687b ldr r3, [r7, #4] 8006428: 7f5b ldrb r3, [r3, #29] 800642a: 2b01 cmp r3, #1 800642c: d108 bne.n 8006440 { SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 800642e: 687b ldr r3, [r7, #4] 8006430: 681b ldr r3, [r3, #0] 8006432: 681a ldr r2, [r3, #0] 8006434: 687b ldr r3, [r7, #4] 8006436: 681b ldr r3, [r3, #0] 8006438: f042 0204 orr.w r2, r2, #4 800643c: 601a str r2, [r3, #0] 800643e: e007 b.n 8006450 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 8006440: 687b ldr r3, [r7, #4] 8006442: 681b ldr r3, [r3, #0] 8006444: 681a ldr r2, [r3, #0] 8006446: 687b ldr r3, [r7, #4] 8006448: 681b ldr r3, [r3, #0] 800644a: f022 0204 bic.w r2, r2, #4 800644e: 601a str r2, [r3, #0] } /* Set the bit timing register */ WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | 8006450: 687b ldr r3, [r7, #4] 8006452: 689a ldr r2, [r3, #8] 8006454: 687b ldr r3, [r7, #4] 8006456: 68db ldr r3, [r3, #12] 8006458: 431a orrs r2, r3 800645a: 687b ldr r3, [r7, #4] 800645c: 691b ldr r3, [r3, #16] 800645e: 431a orrs r2, r3 8006460: 687b ldr r3, [r7, #4] 8006462: 695b ldr r3, [r3, #20] 8006464: ea42 0103 orr.w r1, r2, r3 8006468: 687b ldr r3, [r7, #4] 800646a: 685b ldr r3, [r3, #4] 800646c: 1e5a subs r2, r3, #1 800646e: 687b ldr r3, [r7, #4] 8006470: 681b ldr r3, [r3, #0] 8006472: 430a orrs r2, r1 8006474: 61da str r2, [r3, #28] hcan->Init.TimeSeg1 | hcan->Init.TimeSeg2 | (hcan->Init.Prescaler - 1U))); /* Initialize the error code */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 8006476: 687b ldr r3, [r7, #4] 8006478: 2200 movs r2, #0 800647a: 625a str r2, [r3, #36] @ 0x24 /* Initialize the CAN state */ hcan->State = HAL_CAN_STATE_READY; 800647c: 687b ldr r3, [r7, #4] 800647e: 2201 movs r2, #1 8006480: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 8006484: 2300 movs r3, #0 } 8006486: 4618 mov r0, r3 8006488: 3710 adds r7, #16 800648a: 46bd mov sp, r7 800648c: bd80 pop {r7, pc} ... 08006490 : * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that * contains the filter configuration information. * @retval None */ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig) { 8006490: b480 push {r7} 8006492: b087 sub sp, #28 8006494: af00 add r7, sp, #0 8006496: 6078 str r0, [r7, #4] 8006498: 6039 str r1, [r7, #0] uint32_t filternbrbitpos; CAN_TypeDef *can_ip = hcan->Instance; 800649a: 687b ldr r3, [r7, #4] 800649c: 681b ldr r3, [r3, #0] 800649e: 617b str r3, [r7, #20] HAL_CAN_StateTypeDef state = hcan->State; 80064a0: 687b ldr r3, [r7, #4] 80064a2: f893 3020 ldrb.w r3, [r3, #32] 80064a6: 74fb strb r3, [r7, #19] if ((state == HAL_CAN_STATE_READY) || 80064a8: 7cfb ldrb r3, [r7, #19] 80064aa: 2b01 cmp r3, #1 80064ac: d003 beq.n 80064b6 80064ae: 7cfb ldrb r3, [r7, #19] 80064b0: 2b02 cmp r3, #2 80064b2: f040 80be bne.w 8006632 assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); #if defined(CAN2) /* CAN1 and CAN2 are dual instances with 28 common filters banks */ /* Select master instance to access the filter banks */ can_ip = CAN1; 80064b6: 4b65 ldr r3, [pc, #404] @ (800664c ) 80064b8: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); #endif /* Initialisation mode for the filter */ SET_BIT(can_ip->FMR, CAN_FMR_FINIT); 80064ba: 697b ldr r3, [r7, #20] 80064bc: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 80064c0: f043 0201 orr.w r2, r3, #1 80064c4: 697b ldr r3, [r7, #20] 80064c6: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #if defined(CAN2) /* Select the start filter number of CAN2 slave instance */ CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); 80064ca: 697b ldr r3, [r7, #20] 80064cc: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 80064d0: f423 527c bic.w r2, r3, #16128 @ 0x3f00 80064d4: 697b ldr r3, [r7, #20] 80064d6: f8c3 2200 str.w r2, [r3, #512] @ 0x200 SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); 80064da: 697b ldr r3, [r7, #20] 80064dc: f8d3 2200 ldr.w r2, [r3, #512] @ 0x200 80064e0: 683b ldr r3, [r7, #0] 80064e2: 6a5b ldr r3, [r3, #36] @ 0x24 80064e4: 021b lsls r3, r3, #8 80064e6: 431a orrs r2, r3 80064e8: 697b ldr r3, [r7, #20] 80064ea: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #endif /* Convert filter number into bit position */ filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); 80064ee: 683b ldr r3, [r7, #0] 80064f0: 695b ldr r3, [r3, #20] 80064f2: f003 031f and.w r3, r3, #31 80064f6: 2201 movs r2, #1 80064f8: fa02 f303 lsl.w r3, r2, r3 80064fc: 60fb str r3, [r7, #12] /* Filter Deactivation */ CLEAR_BIT(can_ip->FA1R, filternbrbitpos); 80064fe: 697b ldr r3, [r7, #20] 8006500: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 8006504: 68fb ldr r3, [r7, #12] 8006506: 43db mvns r3, r3 8006508: 401a ands r2, r3 800650a: 697b ldr r3, [r7, #20] 800650c: f8c3 221c str.w r2, [r3, #540] @ 0x21c /* Filter Scale */ if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) 8006510: 683b ldr r3, [r7, #0] 8006512: 69db ldr r3, [r3, #28] 8006514: 2b00 cmp r3, #0 8006516: d123 bne.n 8006560 { /* 16-bit scale for the filter */ CLEAR_BIT(can_ip->FS1R, filternbrbitpos); 8006518: 697b ldr r3, [r7, #20] 800651a: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 800651e: 68fb ldr r3, [r7, #12] 8006520: 43db mvns r3, r3 8006522: 401a ands r2, r3 8006524: 697b ldr r3, [r7, #20] 8006526: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* First 16-bit identifier and First 16-bit mask */ /* Or First 16-bit identifier and Second 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 800652a: 683b ldr r3, [r7, #0] 800652c: 68db ldr r3, [r3, #12] 800652e: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 8006530: 683b ldr r3, [r7, #0] 8006532: 685b ldr r3, [r3, #4] 8006534: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 8006536: 683a ldr r2, [r7, #0] 8006538: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 800653a: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800653c: 697b ldr r3, [r7, #20] 800653e: 3248 adds r2, #72 @ 0x48 8006540: f843 1032 str.w r1, [r3, r2, lsl #3] /* Second 16-bit identifier and Second 16-bit mask */ /* Or Third 16-bit identifier and Fourth 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 8006544: 683b ldr r3, [r7, #0] 8006546: 689b ldr r3, [r3, #8] 8006548: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); 800654a: 683b ldr r3, [r7, #0] 800654c: 681b ldr r3, [r3, #0] 800654e: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 8006550: 683b ldr r3, [r7, #0] 8006552: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 8006554: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 8006556: 6979 ldr r1, [r7, #20] 8006558: 3348 adds r3, #72 @ 0x48 800655a: 00db lsls r3, r3, #3 800655c: 440b add r3, r1 800655e: 605a str r2, [r3, #4] } if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) 8006560: 683b ldr r3, [r7, #0] 8006562: 69db ldr r3, [r3, #28] 8006564: 2b01 cmp r3, #1 8006566: d122 bne.n 80065ae { /* 32-bit scale for the filter */ SET_BIT(can_ip->FS1R, filternbrbitpos); 8006568: 697b ldr r3, [r7, #20] 800656a: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 800656e: 68fb ldr r3, [r7, #12] 8006570: 431a orrs r2, r3 8006572: 697b ldr r3, [r7, #20] 8006574: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* 32-bit identifier or First 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 8006578: 683b ldr r3, [r7, #0] 800657a: 681b ldr r3, [r3, #0] 800657c: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 800657e: 683b ldr r3, [r7, #0] 8006580: 685b ldr r3, [r3, #4] 8006582: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 8006584: 683a ldr r2, [r7, #0] 8006586: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 8006588: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800658a: 697b ldr r3, [r7, #20] 800658c: 3248 adds r2, #72 @ 0x48 800658e: f843 1032 str.w r1, [r3, r2, lsl #3] /* 32-bit mask or Second 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 8006592: 683b ldr r3, [r7, #0] 8006594: 689b ldr r3, [r3, #8] 8006596: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); 8006598: 683b ldr r3, [r7, #0] 800659a: 68db ldr r3, [r3, #12] 800659c: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800659e: 683b ldr r3, [r7, #0] 80065a0: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 80065a2: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 80065a4: 6979 ldr r1, [r7, #20] 80065a6: 3348 adds r3, #72 @ 0x48 80065a8: 00db lsls r3, r3, #3 80065aa: 440b add r3, r1 80065ac: 605a str r2, [r3, #4] } /* Filter Mode */ if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) 80065ae: 683b ldr r3, [r7, #0] 80065b0: 699b ldr r3, [r3, #24] 80065b2: 2b00 cmp r3, #0 80065b4: d109 bne.n 80065ca { /* Id/Mask mode for the filter*/ CLEAR_BIT(can_ip->FM1R, filternbrbitpos); 80065b6: 697b ldr r3, [r7, #20] 80065b8: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 80065bc: 68fb ldr r3, [r7, #12] 80065be: 43db mvns r3, r3 80065c0: 401a ands r2, r3 80065c2: 697b ldr r3, [r7, #20] 80065c4: f8c3 2204 str.w r2, [r3, #516] @ 0x204 80065c8: e007 b.n 80065da } else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ { /* Identifier list mode for the filter*/ SET_BIT(can_ip->FM1R, filternbrbitpos); 80065ca: 697b ldr r3, [r7, #20] 80065cc: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 80065d0: 68fb ldr r3, [r7, #12] 80065d2: 431a orrs r2, r3 80065d4: 697b ldr r3, [r7, #20] 80065d6: f8c3 2204 str.w r2, [r3, #516] @ 0x204 } /* Filter FIFO assignment */ if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) 80065da: 683b ldr r3, [r7, #0] 80065dc: 691b ldr r3, [r3, #16] 80065de: 2b00 cmp r3, #0 80065e0: d109 bne.n 80065f6 { /* FIFO 0 assignation for the filter */ CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); 80065e2: 697b ldr r3, [r7, #20] 80065e4: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 80065e8: 68fb ldr r3, [r7, #12] 80065ea: 43db mvns r3, r3 80065ec: 401a ands r2, r3 80065ee: 697b ldr r3, [r7, #20] 80065f0: f8c3 2214 str.w r2, [r3, #532] @ 0x214 80065f4: e007 b.n 8006606 } else { /* FIFO 1 assignation for the filter */ SET_BIT(can_ip->FFA1R, filternbrbitpos); 80065f6: 697b ldr r3, [r7, #20] 80065f8: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 80065fc: 68fb ldr r3, [r7, #12] 80065fe: 431a orrs r2, r3 8006600: 697b ldr r3, [r7, #20] 8006602: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } /* Filter activation */ if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) 8006606: 683b ldr r3, [r7, #0] 8006608: 6a1b ldr r3, [r3, #32] 800660a: 2b01 cmp r3, #1 800660c: d107 bne.n 800661e { SET_BIT(can_ip->FA1R, filternbrbitpos); 800660e: 697b ldr r3, [r7, #20] 8006610: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 8006614: 68fb ldr r3, [r7, #12] 8006616: 431a orrs r2, r3 8006618: 697b ldr r3, [r7, #20] 800661a: f8c3 221c str.w r2, [r3, #540] @ 0x21c } /* Leave the initialisation mode for the filter */ CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); 800661e: 697b ldr r3, [r7, #20] 8006620: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 8006624: f023 0201 bic.w r2, r3, #1 8006628: 697b ldr r3, [r7, #20] 800662a: f8c3 2200 str.w r2, [r3, #512] @ 0x200 /* Return function status */ return HAL_OK; 800662e: 2300 movs r3, #0 8006630: e006 b.n 8006640 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 8006632: 687b ldr r3, [r7, #4] 8006634: 6a5b ldr r3, [r3, #36] @ 0x24 8006636: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800663a: 687b ldr r3, [r7, #4] 800663c: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800663e: 2301 movs r3, #1 } } 8006640: 4618 mov r0, r3 8006642: 371c adds r7, #28 8006644: 46bd mov sp, r7 8006646: bc80 pop {r7} 8006648: 4770 bx lr 800664a: bf00 nop 800664c: 40006400 .word 0x40006400 08006650 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) { 8006650: b580 push {r7, lr} 8006652: b084 sub sp, #16 8006654: af00 add r7, sp, #0 8006656: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_READY) 8006658: 687b ldr r3, [r7, #4] 800665a: f893 3020 ldrb.w r3, [r3, #32] 800665e: b2db uxtb r3, r3 8006660: 2b01 cmp r3, #1 8006662: d12e bne.n 80066c2 { /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_LISTENING; 8006664: 687b ldr r3, [r7, #4] 8006666: 2202 movs r2, #2 8006668: f883 2020 strb.w r2, [r3, #32] /* Request leave initialisation */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800666c: 687b ldr r3, [r7, #4] 800666e: 681b ldr r3, [r3, #0] 8006670: 681a ldr r2, [r3, #0] 8006672: 687b ldr r3, [r7, #4] 8006674: 681b ldr r3, [r3, #0] 8006676: f022 0201 bic.w r2, r2, #1 800667a: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800667c: f7ff f8da bl 8005834 8006680: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 8006682: e012 b.n 80066aa { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 8006684: f7ff f8d6 bl 8005834 8006688: 4602 mov r2, r0 800668a: 68fb ldr r3, [r7, #12] 800668c: 1ad3 subs r3, r2, r3 800668e: 2b0a cmp r3, #10 8006690: d90b bls.n 80066aa { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 8006692: 687b ldr r3, [r7, #4] 8006694: 6a5b ldr r3, [r3, #36] @ 0x24 8006696: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800669a: 687b ldr r3, [r7, #4] 800669c: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800669e: 687b ldr r3, [r7, #4] 80066a0: 2205 movs r2, #5 80066a2: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 80066a6: 2301 movs r3, #1 80066a8: e012 b.n 80066d0 while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 80066aa: 687b ldr r3, [r7, #4] 80066ac: 681b ldr r3, [r3, #0] 80066ae: 685b ldr r3, [r3, #4] 80066b0: f003 0301 and.w r3, r3, #1 80066b4: 2b00 cmp r3, #0 80066b6: d1e5 bne.n 8006684 } } /* Reset the CAN ErrorCode */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 80066b8: 687b ldr r3, [r7, #4] 80066ba: 2200 movs r2, #0 80066bc: 625a str r2, [r3, #36] @ 0x24 /* Return function status */ return HAL_OK; 80066be: 2300 movs r3, #0 80066c0: e006 b.n 80066d0 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; 80066c2: 687b ldr r3, [r7, #4] 80066c4: 6a5b ldr r3, [r3, #36] @ 0x24 80066c6: f443 2200 orr.w r2, r3, #524288 @ 0x80000 80066ca: 687b ldr r3, [r7, #4] 80066cc: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 80066ce: 2301 movs r3, #1 } } 80066d0: 4618 mov r0, r3 80066d2: 3710 adds r7, #16 80066d4: 46bd mov sp, r7 80066d6: bd80 pop {r7, pc} 080066d8 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) { 80066d8: b580 push {r7, lr} 80066da: b084 sub sp, #16 80066dc: af00 add r7, sp, #0 80066de: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_LISTENING) 80066e0: 687b ldr r3, [r7, #4] 80066e2: f893 3020 ldrb.w r3, [r3, #32] 80066e6: b2db uxtb r3, r3 80066e8: 2b02 cmp r3, #2 80066ea: d133 bne.n 8006754 { /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 80066ec: 687b ldr r3, [r7, #4] 80066ee: 681b ldr r3, [r3, #0] 80066f0: 681a ldr r2, [r3, #0] 80066f2: 687b ldr r3, [r7, #4] 80066f4: 681b ldr r3, [r3, #0] 80066f6: f042 0201 orr.w r2, r2, #1 80066fa: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 80066fc: f7ff f89a bl 8005834 8006700: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 8006702: e012 b.n 800672a { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 8006704: f7ff f896 bl 8005834 8006708: 4602 mov r2, r0 800670a: 68fb ldr r3, [r7, #12] 800670c: 1ad3 subs r3, r2, r3 800670e: 2b0a cmp r3, #10 8006710: d90b bls.n 800672a { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 8006712: 687b ldr r3, [r7, #4] 8006714: 6a5b ldr r3, [r3, #36] @ 0x24 8006716: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800671a: 687b ldr r3, [r7, #4] 800671c: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800671e: 687b ldr r3, [r7, #4] 8006720: 2205 movs r2, #5 8006722: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 8006726: 2301 movs r3, #1 8006728: e01b b.n 8006762 while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800672a: 687b ldr r3, [r7, #4] 800672c: 681b ldr r3, [r3, #0] 800672e: 685b ldr r3, [r3, #4] 8006730: f003 0301 and.w r3, r3, #1 8006734: 2b00 cmp r3, #0 8006736: d0e5 beq.n 8006704 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 8006738: 687b ldr r3, [r7, #4] 800673a: 681b ldr r3, [r3, #0] 800673c: 681a ldr r2, [r3, #0] 800673e: 687b ldr r3, [r7, #4] 8006740: 681b ldr r3, [r3, #0] 8006742: f022 0202 bic.w r2, r2, #2 8006746: 601a str r2, [r3, #0] /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_READY; 8006748: 687b ldr r3, [r7, #4] 800674a: 2201 movs r2, #1 800674c: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 8006750: 2300 movs r3, #0 8006752: e006 b.n 8006762 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; 8006754: 687b ldr r3, [r7, #4] 8006756: 6a5b ldr r3, [r3, #36] @ 0x24 8006758: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800675c: 687b ldr r3, [r7, #4] 800675e: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8006760: 2301 movs r3, #1 } } 8006762: 4618 mov r0, r3 8006764: 3710 adds r7, #16 8006766: 46bd mov sp, r7 8006768: bd80 pop {r7, pc} 0800676a : * the TxMailbox used to store the Tx message. * This parameter can be a value of @arg CAN_Tx_Mailboxes. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox) { 800676a: b480 push {r7} 800676c: b089 sub sp, #36 @ 0x24 800676e: af00 add r7, sp, #0 8006770: 60f8 str r0, [r7, #12] 8006772: 60b9 str r1, [r7, #8] 8006774: 607a str r2, [r7, #4] 8006776: 603b str r3, [r7, #0] uint32_t transmitmailbox; HAL_CAN_StateTypeDef state = hcan->State; 8006778: 68fb ldr r3, [r7, #12] 800677a: f893 3020 ldrb.w r3, [r3, #32] 800677e: 77fb strb r3, [r7, #31] uint32_t tsr = READ_REG(hcan->Instance->TSR); 8006780: 68fb ldr r3, [r7, #12] 8006782: 681b ldr r3, [r3, #0] 8006784: 689b ldr r3, [r3, #8] 8006786: 61bb str r3, [r7, #24] { assert_param(IS_CAN_EXTID(pHeader->ExtId)); } assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); if ((state == HAL_CAN_STATE_READY) || 8006788: 7ffb ldrb r3, [r7, #31] 800678a: 2b01 cmp r3, #1 800678c: d003 beq.n 8006796 800678e: 7ffb ldrb r3, [r7, #31] 8006790: 2b02 cmp r3, #2 8006792: f040 80b8 bne.w 8006906 (state == HAL_CAN_STATE_LISTENING)) { /* Check that all the Tx mailboxes are not full */ if (((tsr & CAN_TSR_TME0) != 0U) || 8006796: 69bb ldr r3, [r7, #24] 8006798: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 800679c: 2b00 cmp r3, #0 800679e: d10a bne.n 80067b6 ((tsr & CAN_TSR_TME1) != 0U) || 80067a0: 69bb ldr r3, [r7, #24] 80067a2: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 if (((tsr & CAN_TSR_TME0) != 0U) || 80067a6: 2b00 cmp r3, #0 80067a8: d105 bne.n 80067b6 ((tsr & CAN_TSR_TME2) != 0U)) 80067aa: 69bb ldr r3, [r7, #24] 80067ac: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 ((tsr & CAN_TSR_TME1) != 0U) || 80067b0: 2b00 cmp r3, #0 80067b2: f000 80a0 beq.w 80068f6 { /* Select an empty transmit mailbox */ transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; 80067b6: 69bb ldr r3, [r7, #24] 80067b8: 0e1b lsrs r3, r3, #24 80067ba: f003 0303 and.w r3, r3, #3 80067be: 617b str r3, [r7, #20] /* Check transmit mailbox value */ if (transmitmailbox > 2U) 80067c0: 697b ldr r3, [r7, #20] 80067c2: 2b02 cmp r3, #2 80067c4: d907 bls.n 80067d6 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_INTERNAL; 80067c6: 68fb ldr r3, [r7, #12] 80067c8: 6a5b ldr r3, [r3, #36] @ 0x24 80067ca: f443 0200 orr.w r2, r3, #8388608 @ 0x800000 80067ce: 68fb ldr r3, [r7, #12] 80067d0: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 80067d2: 2301 movs r3, #1 80067d4: e09e b.n 8006914 } /* Store the Tx mailbox */ *pTxMailbox = (uint32_t)1 << transmitmailbox; 80067d6: 2201 movs r2, #1 80067d8: 697b ldr r3, [r7, #20] 80067da: 409a lsls r2, r3 80067dc: 683b ldr r3, [r7, #0] 80067de: 601a str r2, [r3, #0] /* Set up the Id */ if (pHeader->IDE == CAN_ID_STD) 80067e0: 68bb ldr r3, [r7, #8] 80067e2: 689b ldr r3, [r3, #8] 80067e4: 2b00 cmp r3, #0 80067e6: d10d bne.n 8006804 { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 80067e8: 68bb ldr r3, [r7, #8] 80067ea: 681b ldr r3, [r3, #0] 80067ec: 055a lsls r2, r3, #21 pHeader->RTR); 80067ee: 68bb ldr r3, [r7, #8] 80067f0: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 80067f2: 68f9 ldr r1, [r7, #12] 80067f4: 6809 ldr r1, [r1, #0] 80067f6: 431a orrs r2, r3 80067f8: 697b ldr r3, [r7, #20] 80067fa: 3318 adds r3, #24 80067fc: 011b lsls r3, r3, #4 80067fe: 440b add r3, r1 8006800: 601a str r2, [r3, #0] 8006802: e00f b.n 8006824 } else { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 8006804: 68bb ldr r3, [r7, #8] 8006806: 685b ldr r3, [r3, #4] 8006808: 00da lsls r2, r3, #3 pHeader->IDE | 800680a: 68bb ldr r3, [r7, #8] 800680c: 689b ldr r3, [r3, #8] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800680e: 431a orrs r2, r3 pHeader->RTR); 8006810: 68bb ldr r3, [r7, #8] 8006812: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 8006814: 68f9 ldr r1, [r7, #12] 8006816: 6809 ldr r1, [r1, #0] pHeader->IDE | 8006818: 431a orrs r2, r3 hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800681a: 697b ldr r3, [r7, #20] 800681c: 3318 adds r3, #24 800681e: 011b lsls r3, r3, #4 8006820: 440b add r3, r1 8006822: 601a str r2, [r3, #0] } /* Set up the DLC */ hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); 8006824: 68fb ldr r3, [r7, #12] 8006826: 6819 ldr r1, [r3, #0] 8006828: 68bb ldr r3, [r7, #8] 800682a: 691a ldr r2, [r3, #16] 800682c: 697b ldr r3, [r7, #20] 800682e: 3318 adds r3, #24 8006830: 011b lsls r3, r3, #4 8006832: 440b add r3, r1 8006834: 3304 adds r3, #4 8006836: 601a str r2, [r3, #0] /* Set up the Transmit Global Time mode */ if (pHeader->TransmitGlobalTime == ENABLE) 8006838: 68bb ldr r3, [r7, #8] 800683a: 7d1b ldrb r3, [r3, #20] 800683c: 2b01 cmp r3, #1 800683e: d111 bne.n 8006864 { SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); 8006840: 68fb ldr r3, [r7, #12] 8006842: 681a ldr r2, [r3, #0] 8006844: 697b ldr r3, [r7, #20] 8006846: 3318 adds r3, #24 8006848: 011b lsls r3, r3, #4 800684a: 4413 add r3, r2 800684c: 3304 adds r3, #4 800684e: 681b ldr r3, [r3, #0] 8006850: 68fa ldr r2, [r7, #12] 8006852: 6811 ldr r1, [r2, #0] 8006854: f443 7280 orr.w r2, r3, #256 @ 0x100 8006858: 697b ldr r3, [r7, #20] 800685a: 3318 adds r3, #24 800685c: 011b lsls r3, r3, #4 800685e: 440b add r3, r1 8006860: 3304 adds r3, #4 8006862: 601a str r2, [r3, #0] } /* Set up the data field */ WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, 8006864: 687b ldr r3, [r7, #4] 8006866: 3307 adds r3, #7 8006868: 781b ldrb r3, [r3, #0] 800686a: 061a lsls r2, r3, #24 800686c: 687b ldr r3, [r7, #4] 800686e: 3306 adds r3, #6 8006870: 781b ldrb r3, [r3, #0] 8006872: 041b lsls r3, r3, #16 8006874: 431a orrs r2, r3 8006876: 687b ldr r3, [r7, #4] 8006878: 3305 adds r3, #5 800687a: 781b ldrb r3, [r3, #0] 800687c: 021b lsls r3, r3, #8 800687e: 4313 orrs r3, r2 8006880: 687a ldr r2, [r7, #4] 8006882: 3204 adds r2, #4 8006884: 7812 ldrb r2, [r2, #0] 8006886: 4610 mov r0, r2 8006888: 68fa ldr r2, [r7, #12] 800688a: 6811 ldr r1, [r2, #0] 800688c: ea43 0200 orr.w r2, r3, r0 8006890: 697b ldr r3, [r7, #20] 8006892: 011b lsls r3, r3, #4 8006894: 440b add r3, r1 8006896: f503 73c6 add.w r3, r3, #396 @ 0x18c 800689a: 601a str r2, [r3, #0] ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, 800689c: 687b ldr r3, [r7, #4] 800689e: 3303 adds r3, #3 80068a0: 781b ldrb r3, [r3, #0] 80068a2: 061a lsls r2, r3, #24 80068a4: 687b ldr r3, [r7, #4] 80068a6: 3302 adds r3, #2 80068a8: 781b ldrb r3, [r3, #0] 80068aa: 041b lsls r3, r3, #16 80068ac: 431a orrs r2, r3 80068ae: 687b ldr r3, [r7, #4] 80068b0: 3301 adds r3, #1 80068b2: 781b ldrb r3, [r3, #0] 80068b4: 021b lsls r3, r3, #8 80068b6: 4313 orrs r3, r2 80068b8: 687a ldr r2, [r7, #4] 80068ba: 7812 ldrb r2, [r2, #0] 80068bc: 4610 mov r0, r2 80068be: 68fa ldr r2, [r7, #12] 80068c0: 6811 ldr r1, [r2, #0] 80068c2: ea43 0200 orr.w r2, r3, r0 80068c6: 697b ldr r3, [r7, #20] 80068c8: 011b lsls r3, r3, #4 80068ca: 440b add r3, r1 80068cc: f503 73c4 add.w r3, r3, #392 @ 0x188 80068d0: 601a str r2, [r3, #0] ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); /* Request transmission */ SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); 80068d2: 68fb ldr r3, [r7, #12] 80068d4: 681a ldr r2, [r3, #0] 80068d6: 697b ldr r3, [r7, #20] 80068d8: 3318 adds r3, #24 80068da: 011b lsls r3, r3, #4 80068dc: 4413 add r3, r2 80068de: 681b ldr r3, [r3, #0] 80068e0: 68fa ldr r2, [r7, #12] 80068e2: 6811 ldr r1, [r2, #0] 80068e4: f043 0201 orr.w r2, r3, #1 80068e8: 697b ldr r3, [r7, #20] 80068ea: 3318 adds r3, #24 80068ec: 011b lsls r3, r3, #4 80068ee: 440b add r3, r1 80068f0: 601a str r2, [r3, #0] /* Return function status */ return HAL_OK; 80068f2: 2300 movs r3, #0 80068f4: e00e b.n 8006914 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 80068f6: 68fb ldr r3, [r7, #12] 80068f8: 6a5b ldr r3, [r3, #36] @ 0x24 80068fa: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 80068fe: 68fb ldr r3, [r7, #12] 8006900: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8006902: 2301 movs r3, #1 8006904: e006 b.n 8006914 } } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 8006906: 68fb ldr r3, [r7, #12] 8006908: 6a5b ldr r3, [r3, #36] @ 0x24 800690a: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800690e: 68fb ldr r3, [r7, #12] 8006910: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8006912: 2301 movs r3, #1 } } 8006914: 4618 mov r0, r3 8006916: 3724 adds r7, #36 @ 0x24 8006918: 46bd mov sp, r7 800691a: bc80 pop {r7} 800691c: 4770 bx lr 0800691e : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval Number of free Tx Mailboxes. */ uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan) { 800691e: b480 push {r7} 8006920: b085 sub sp, #20 8006922: af00 add r7, sp, #0 8006924: 6078 str r0, [r7, #4] uint32_t freelevel = 0U; 8006926: 2300 movs r3, #0 8006928: 60fb str r3, [r7, #12] HAL_CAN_StateTypeDef state = hcan->State; 800692a: 687b ldr r3, [r7, #4] 800692c: f893 3020 ldrb.w r3, [r3, #32] 8006930: 72fb strb r3, [r7, #11] if ((state == HAL_CAN_STATE_READY) || 8006932: 7afb ldrb r3, [r7, #11] 8006934: 2b01 cmp r3, #1 8006936: d002 beq.n 800693e 8006938: 7afb ldrb r3, [r7, #11] 800693a: 2b02 cmp r3, #2 800693c: d11d bne.n 800697a (state == HAL_CAN_STATE_LISTENING)) { /* Check Tx Mailbox 0 status */ if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) 800693e: 687b ldr r3, [r7, #4] 8006940: 681b ldr r3, [r3, #0] 8006942: 689b ldr r3, [r3, #8] 8006944: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8006948: 2b00 cmp r3, #0 800694a: d002 beq.n 8006952 { freelevel++; 800694c: 68fb ldr r3, [r7, #12] 800694e: 3301 adds r3, #1 8006950: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 1 status */ if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) 8006952: 687b ldr r3, [r7, #4] 8006954: 681b ldr r3, [r3, #0] 8006956: 689b ldr r3, [r3, #8] 8006958: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 800695c: 2b00 cmp r3, #0 800695e: d002 beq.n 8006966 { freelevel++; 8006960: 68fb ldr r3, [r7, #12] 8006962: 3301 adds r3, #1 8006964: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 2 status */ if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) 8006966: 687b ldr r3, [r7, #4] 8006968: 681b ldr r3, [r3, #0] 800696a: 689b ldr r3, [r3, #8] 800696c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8006970: 2b00 cmp r3, #0 8006972: d002 beq.n 800697a { freelevel++; 8006974: 68fb ldr r3, [r7, #12] 8006976: 3301 adds r3, #1 8006978: 60fb str r3, [r7, #12] } } /* Return Tx Mailboxes free level */ return freelevel; 800697a: 68fb ldr r3, [r7, #12] } 800697c: 4618 mov r0, r3 800697e: 3714 adds r7, #20 8006980: 46bd mov sp, r7 8006982: bc80 pop {r7} 8006984: 4770 bx lr 08006986 : * of the Rx frame will be stored. * @param aData array where the payload of the Rx frame will be stored. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) { 8006986: b480 push {r7} 8006988: b087 sub sp, #28 800698a: af00 add r7, sp, #0 800698c: 60f8 str r0, [r7, #12] 800698e: 60b9 str r1, [r7, #8] 8006990: 607a str r2, [r7, #4] 8006992: 603b str r3, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 8006994: 68fb ldr r3, [r7, #12] 8006996: f893 3020 ldrb.w r3, [r3, #32] 800699a: 75fb strb r3, [r7, #23] assert_param(IS_CAN_RX_FIFO(RxFifo)); if ((state == HAL_CAN_STATE_READY) || 800699c: 7dfb ldrb r3, [r7, #23] 800699e: 2b01 cmp r3, #1 80069a0: d003 beq.n 80069aa 80069a2: 7dfb ldrb r3, [r7, #23] 80069a4: 2b02 cmp r3, #2 80069a6: f040 80f3 bne.w 8006b90 (state == HAL_CAN_STATE_LISTENING)) { /* Check the Rx FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 80069aa: 68bb ldr r3, [r7, #8] 80069ac: 2b00 cmp r3, #0 80069ae: d10e bne.n 80069ce { /* Check that the Rx FIFO 0 is not empty */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) 80069b0: 68fb ldr r3, [r7, #12] 80069b2: 681b ldr r3, [r3, #0] 80069b4: 68db ldr r3, [r3, #12] 80069b6: f003 0303 and.w r3, r3, #3 80069ba: 2b00 cmp r3, #0 80069bc: d116 bne.n 80069ec { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 80069be: 68fb ldr r3, [r7, #12] 80069c0: 6a5b ldr r3, [r3, #36] @ 0x24 80069c2: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 80069c6: 68fb ldr r3, [r7, #12] 80069c8: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 80069ca: 2301 movs r3, #1 80069cc: e0e7 b.n 8006b9e } } else /* Rx element is assigned to Rx FIFO 1 */ { /* Check that the Rx FIFO 1 is not empty */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) 80069ce: 68fb ldr r3, [r7, #12] 80069d0: 681b ldr r3, [r3, #0] 80069d2: 691b ldr r3, [r3, #16] 80069d4: f003 0303 and.w r3, r3, #3 80069d8: 2b00 cmp r3, #0 80069da: d107 bne.n 80069ec { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 80069dc: 68fb ldr r3, [r7, #12] 80069de: 6a5b ldr r3, [r3, #36] @ 0x24 80069e0: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 80069e4: 68fb ldr r3, [r7, #12] 80069e6: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 80069e8: 2301 movs r3, #1 80069ea: e0d8 b.n 8006b9e } } /* Get the header */ pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; 80069ec: 68fb ldr r3, [r7, #12] 80069ee: 681a ldr r2, [r3, #0] 80069f0: 68bb ldr r3, [r7, #8] 80069f2: 331b adds r3, #27 80069f4: 011b lsls r3, r3, #4 80069f6: 4413 add r3, r2 80069f8: 681b ldr r3, [r3, #0] 80069fa: f003 0204 and.w r2, r3, #4 80069fe: 687b ldr r3, [r7, #4] 8006a00: 609a str r2, [r3, #8] if (pHeader->IDE == CAN_ID_STD) 8006a02: 687b ldr r3, [r7, #4] 8006a04: 689b ldr r3, [r3, #8] 8006a06: 2b00 cmp r3, #0 8006a08: d10c bne.n 8006a24 { pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; 8006a0a: 68fb ldr r3, [r7, #12] 8006a0c: 681a ldr r2, [r3, #0] 8006a0e: 68bb ldr r3, [r7, #8] 8006a10: 331b adds r3, #27 8006a12: 011b lsls r3, r3, #4 8006a14: 4413 add r3, r2 8006a16: 681b ldr r3, [r3, #0] 8006a18: 0d5b lsrs r3, r3, #21 8006a1a: f3c3 020a ubfx r2, r3, #0, #11 8006a1e: 687b ldr r3, [r7, #4] 8006a20: 601a str r2, [r3, #0] 8006a22: e00b b.n 8006a3c } else { pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; 8006a24: 68fb ldr r3, [r7, #12] 8006a26: 681a ldr r2, [r3, #0] 8006a28: 68bb ldr r3, [r7, #8] 8006a2a: 331b adds r3, #27 8006a2c: 011b lsls r3, r3, #4 8006a2e: 4413 add r3, r2 8006a30: 681b ldr r3, [r3, #0] 8006a32: 08db lsrs r3, r3, #3 8006a34: f023 4260 bic.w r2, r3, #3758096384 @ 0xe0000000 8006a38: 687b ldr r3, [r7, #4] 8006a3a: 605a str r2, [r3, #4] } pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); 8006a3c: 68fb ldr r3, [r7, #12] 8006a3e: 681a ldr r2, [r3, #0] 8006a40: 68bb ldr r3, [r7, #8] 8006a42: 331b adds r3, #27 8006a44: 011b lsls r3, r3, #4 8006a46: 4413 add r3, r2 8006a48: 681b ldr r3, [r3, #0] 8006a4a: f003 0202 and.w r2, r3, #2 8006a4e: 687b ldr r3, [r7, #4] 8006a50: 60da str r2, [r3, #12] pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; 8006a52: 68fb ldr r3, [r7, #12] 8006a54: 681a ldr r2, [r3, #0] 8006a56: 68bb ldr r3, [r7, #8] 8006a58: 331b adds r3, #27 8006a5a: 011b lsls r3, r3, #4 8006a5c: 4413 add r3, r2 8006a5e: 3304 adds r3, #4 8006a60: 681b ldr r3, [r3, #0] 8006a62: f003 020f and.w r2, r3, #15 8006a66: 687b ldr r3, [r7, #4] 8006a68: 611a str r2, [r3, #16] pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; 8006a6a: 68fb ldr r3, [r7, #12] 8006a6c: 681a ldr r2, [r3, #0] 8006a6e: 68bb ldr r3, [r7, #8] 8006a70: 331b adds r3, #27 8006a72: 011b lsls r3, r3, #4 8006a74: 4413 add r3, r2 8006a76: 3304 adds r3, #4 8006a78: 681b ldr r3, [r3, #0] 8006a7a: 0a1b lsrs r3, r3, #8 8006a7c: b2da uxtb r2, r3 8006a7e: 687b ldr r3, [r7, #4] 8006a80: 619a str r2, [r3, #24] pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; 8006a82: 68fb ldr r3, [r7, #12] 8006a84: 681a ldr r2, [r3, #0] 8006a86: 68bb ldr r3, [r7, #8] 8006a88: 331b adds r3, #27 8006a8a: 011b lsls r3, r3, #4 8006a8c: 4413 add r3, r2 8006a8e: 3304 adds r3, #4 8006a90: 681b ldr r3, [r3, #0] 8006a92: 0c1b lsrs r3, r3, #16 8006a94: b29a uxth r2, r3 8006a96: 687b ldr r3, [r7, #4] 8006a98: 615a str r2, [r3, #20] /* Get the data */ aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos); 8006a9a: 68fb ldr r3, [r7, #12] 8006a9c: 681a ldr r2, [r3, #0] 8006a9e: 68bb ldr r3, [r7, #8] 8006aa0: 011b lsls r3, r3, #4 8006aa2: 4413 add r3, r2 8006aa4: f503 73dc add.w r3, r3, #440 @ 0x1b8 8006aa8: 681b ldr r3, [r3, #0] 8006aaa: b2da uxtb r2, r3 8006aac: 683b ldr r3, [r7, #0] 8006aae: 701a strb r2, [r3, #0] aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos); 8006ab0: 68fb ldr r3, [r7, #12] 8006ab2: 681a ldr r2, [r3, #0] 8006ab4: 68bb ldr r3, [r7, #8] 8006ab6: 011b lsls r3, r3, #4 8006ab8: 4413 add r3, r2 8006aba: f503 73dc add.w r3, r3, #440 @ 0x1b8 8006abe: 681b ldr r3, [r3, #0] 8006ac0: 0a1a lsrs r2, r3, #8 8006ac2: 683b ldr r3, [r7, #0] 8006ac4: 3301 adds r3, #1 8006ac6: b2d2 uxtb r2, r2 8006ac8: 701a strb r2, [r3, #0] aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos); 8006aca: 68fb ldr r3, [r7, #12] 8006acc: 681a ldr r2, [r3, #0] 8006ace: 68bb ldr r3, [r7, #8] 8006ad0: 011b lsls r3, r3, #4 8006ad2: 4413 add r3, r2 8006ad4: f503 73dc add.w r3, r3, #440 @ 0x1b8 8006ad8: 681b ldr r3, [r3, #0] 8006ada: 0c1a lsrs r2, r3, #16 8006adc: 683b ldr r3, [r7, #0] 8006ade: 3302 adds r3, #2 8006ae0: b2d2 uxtb r2, r2 8006ae2: 701a strb r2, [r3, #0] aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos); 8006ae4: 68fb ldr r3, [r7, #12] 8006ae6: 681a ldr r2, [r3, #0] 8006ae8: 68bb ldr r3, [r7, #8] 8006aea: 011b lsls r3, r3, #4 8006aec: 4413 add r3, r2 8006aee: f503 73dc add.w r3, r3, #440 @ 0x1b8 8006af2: 681b ldr r3, [r3, #0] 8006af4: 0e1a lsrs r2, r3, #24 8006af6: 683b ldr r3, [r7, #0] 8006af8: 3303 adds r3, #3 8006afa: b2d2 uxtb r2, r2 8006afc: 701a strb r2, [r3, #0] aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos); 8006afe: 68fb ldr r3, [r7, #12] 8006b00: 681a ldr r2, [r3, #0] 8006b02: 68bb ldr r3, [r7, #8] 8006b04: 011b lsls r3, r3, #4 8006b06: 4413 add r3, r2 8006b08: f503 73de add.w r3, r3, #444 @ 0x1bc 8006b0c: 681a ldr r2, [r3, #0] 8006b0e: 683b ldr r3, [r7, #0] 8006b10: 3304 adds r3, #4 8006b12: b2d2 uxtb r2, r2 8006b14: 701a strb r2, [r3, #0] aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos); 8006b16: 68fb ldr r3, [r7, #12] 8006b18: 681a ldr r2, [r3, #0] 8006b1a: 68bb ldr r3, [r7, #8] 8006b1c: 011b lsls r3, r3, #4 8006b1e: 4413 add r3, r2 8006b20: f503 73de add.w r3, r3, #444 @ 0x1bc 8006b24: 681b ldr r3, [r3, #0] 8006b26: 0a1a lsrs r2, r3, #8 8006b28: 683b ldr r3, [r7, #0] 8006b2a: 3305 adds r3, #5 8006b2c: b2d2 uxtb r2, r2 8006b2e: 701a strb r2, [r3, #0] aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos); 8006b30: 68fb ldr r3, [r7, #12] 8006b32: 681a ldr r2, [r3, #0] 8006b34: 68bb ldr r3, [r7, #8] 8006b36: 011b lsls r3, r3, #4 8006b38: 4413 add r3, r2 8006b3a: f503 73de add.w r3, r3, #444 @ 0x1bc 8006b3e: 681b ldr r3, [r3, #0] 8006b40: 0c1a lsrs r2, r3, #16 8006b42: 683b ldr r3, [r7, #0] 8006b44: 3306 adds r3, #6 8006b46: b2d2 uxtb r2, r2 8006b48: 701a strb r2, [r3, #0] aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos); 8006b4a: 68fb ldr r3, [r7, #12] 8006b4c: 681a ldr r2, [r3, #0] 8006b4e: 68bb ldr r3, [r7, #8] 8006b50: 011b lsls r3, r3, #4 8006b52: 4413 add r3, r2 8006b54: f503 73de add.w r3, r3, #444 @ 0x1bc 8006b58: 681b ldr r3, [r3, #0] 8006b5a: 0e1a lsrs r2, r3, #24 8006b5c: 683b ldr r3, [r7, #0] 8006b5e: 3307 adds r3, #7 8006b60: b2d2 uxtb r2, r2 8006b62: 701a strb r2, [r3, #0] /* Release the FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 8006b64: 68bb ldr r3, [r7, #8] 8006b66: 2b00 cmp r3, #0 8006b68: d108 bne.n 8006b7c { /* Release RX FIFO 0 */ SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); 8006b6a: 68fb ldr r3, [r7, #12] 8006b6c: 681b ldr r3, [r3, #0] 8006b6e: 68da ldr r2, [r3, #12] 8006b70: 68fb ldr r3, [r7, #12] 8006b72: 681b ldr r3, [r3, #0] 8006b74: f042 0220 orr.w r2, r2, #32 8006b78: 60da str r2, [r3, #12] 8006b7a: e007 b.n 8006b8c } else /* Rx element is assigned to Rx FIFO 1 */ { /* Release RX FIFO 1 */ SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); 8006b7c: 68fb ldr r3, [r7, #12] 8006b7e: 681b ldr r3, [r3, #0] 8006b80: 691a ldr r2, [r3, #16] 8006b82: 68fb ldr r3, [r7, #12] 8006b84: 681b ldr r3, [r3, #0] 8006b86: f042 0220 orr.w r2, r2, #32 8006b8a: 611a str r2, [r3, #16] } /* Return function status */ return HAL_OK; 8006b8c: 2300 movs r3, #0 8006b8e: e006 b.n 8006b9e } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 8006b90: 68fb ldr r3, [r7, #12] 8006b92: 6a5b ldr r3, [r3, #36] @ 0x24 8006b94: f443 2280 orr.w r2, r3, #262144 @ 0x40000 8006b98: 68fb ldr r3, [r7, #12] 8006b9a: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8006b9c: 2301 movs r3, #1 } } 8006b9e: 4618 mov r0, r3 8006ba0: 371c adds r7, #28 8006ba2: 46bd mov sp, r7 8006ba4: bc80 pop {r7} 8006ba6: 4770 bx lr 08006ba8 : * @param ActiveITs indicates which interrupts will be enabled. * This parameter can be any combination of @arg CAN_Interrupts. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) { 8006ba8: b480 push {r7} 8006baa: b085 sub sp, #20 8006bac: af00 add r7, sp, #0 8006bae: 6078 str r0, [r7, #4] 8006bb0: 6039 str r1, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 8006bb2: 687b ldr r3, [r7, #4] 8006bb4: f893 3020 ldrb.w r3, [r3, #32] 8006bb8: 73fb strb r3, [r7, #15] /* Check function parameters */ assert_param(IS_CAN_IT(ActiveITs)); if ((state == HAL_CAN_STATE_READY) || 8006bba: 7bfb ldrb r3, [r7, #15] 8006bbc: 2b01 cmp r3, #1 8006bbe: d002 beq.n 8006bc6 8006bc0: 7bfb ldrb r3, [r7, #15] 8006bc2: 2b02 cmp r3, #2 8006bc4: d109 bne.n 8006bda (state == HAL_CAN_STATE_LISTENING)) { /* Enable the selected interrupts */ __HAL_CAN_ENABLE_IT(hcan, ActiveITs); 8006bc6: 687b ldr r3, [r7, #4] 8006bc8: 681b ldr r3, [r3, #0] 8006bca: 6959 ldr r1, [r3, #20] 8006bcc: 687b ldr r3, [r7, #4] 8006bce: 681b ldr r3, [r3, #0] 8006bd0: 683a ldr r2, [r7, #0] 8006bd2: 430a orrs r2, r1 8006bd4: 615a str r2, [r3, #20] /* Return function status */ return HAL_OK; 8006bd6: 2300 movs r3, #0 8006bd8: e006 b.n 8006be8 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 8006bda: 687b ldr r3, [r7, #4] 8006bdc: 6a5b ldr r3, [r3, #36] @ 0x24 8006bde: f443 2280 orr.w r2, r3, #262144 @ 0x40000 8006be2: 687b ldr r3, [r7, #4] 8006be4: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8006be6: 2301 movs r3, #1 } } 8006be8: 4618 mov r0, r3 8006bea: 3714 adds r7, #20 8006bec: 46bd mov sp, r7 8006bee: bc80 pop {r7} 8006bf0: 4770 bx lr 08006bf2 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) { 8006bf2: b580 push {r7, lr} 8006bf4: b08a sub sp, #40 @ 0x28 8006bf6: af00 add r7, sp, #0 8006bf8: 6078 str r0, [r7, #4] uint32_t errorcode = HAL_CAN_ERROR_NONE; 8006bfa: 2300 movs r3, #0 8006bfc: 627b str r3, [r7, #36] @ 0x24 uint32_t interrupts = READ_REG(hcan->Instance->IER); 8006bfe: 687b ldr r3, [r7, #4] 8006c00: 681b ldr r3, [r3, #0] 8006c02: 695b ldr r3, [r3, #20] 8006c04: 623b str r3, [r7, #32] uint32_t msrflags = READ_REG(hcan->Instance->MSR); 8006c06: 687b ldr r3, [r7, #4] 8006c08: 681b ldr r3, [r3, #0] 8006c0a: 685b ldr r3, [r3, #4] 8006c0c: 61fb str r3, [r7, #28] uint32_t tsrflags = READ_REG(hcan->Instance->TSR); 8006c0e: 687b ldr r3, [r7, #4] 8006c10: 681b ldr r3, [r3, #0] 8006c12: 689b ldr r3, [r3, #8] 8006c14: 61bb str r3, [r7, #24] uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); 8006c16: 687b ldr r3, [r7, #4] 8006c18: 681b ldr r3, [r3, #0] 8006c1a: 68db ldr r3, [r3, #12] 8006c1c: 617b str r3, [r7, #20] uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); 8006c1e: 687b ldr r3, [r7, #4] 8006c20: 681b ldr r3, [r3, #0] 8006c22: 691b ldr r3, [r3, #16] 8006c24: 613b str r3, [r7, #16] uint32_t esrflags = READ_REG(hcan->Instance->ESR); 8006c26: 687b ldr r3, [r7, #4] 8006c28: 681b ldr r3, [r3, #0] 8006c2a: 699b ldr r3, [r3, #24] 8006c2c: 60fb str r3, [r7, #12] /* Transmit Mailbox empty interrupt management *****************************/ if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) 8006c2e: 6a3b ldr r3, [r7, #32] 8006c30: f003 0301 and.w r3, r3, #1 8006c34: 2b00 cmp r3, #0 8006c36: d07c beq.n 8006d32 { /* Transmit Mailbox 0 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP0) != 0U) 8006c38: 69bb ldr r3, [r7, #24] 8006c3a: f003 0301 and.w r3, r3, #1 8006c3e: 2b00 cmp r3, #0 8006c40: d023 beq.n 8006c8a { /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); 8006c42: 687b ldr r3, [r7, #4] 8006c44: 681b ldr r3, [r3, #0] 8006c46: 2201 movs r2, #1 8006c48: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK0) != 0U) 8006c4a: 69bb ldr r3, [r7, #24] 8006c4c: f003 0302 and.w r3, r3, #2 8006c50: 2b00 cmp r3, #0 8006c52: d003 beq.n 8006c5c #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0CompleteCallback(hcan); 8006c54: 6878 ldr r0, [r7, #4] 8006c56: f7fd fb4b bl 80042f0 8006c5a: e016 b.n 8006c8a #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST0) != 0U) 8006c5c: 69bb ldr r3, [r7, #24] 8006c5e: f003 0304 and.w r3, r3, #4 8006c62: 2b00 cmp r3, #0 8006c64: d004 beq.n 8006c70 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST0; 8006c66: 6a7b ldr r3, [r7, #36] @ 0x24 8006c68: f443 6300 orr.w r3, r3, #2048 @ 0x800 8006c6c: 627b str r3, [r7, #36] @ 0x24 8006c6e: e00c b.n 8006c8a } else if ((tsrflags & CAN_TSR_TERR0) != 0U) 8006c70: 69bb ldr r3, [r7, #24] 8006c72: f003 0308 and.w r3, r3, #8 8006c76: 2b00 cmp r3, #0 8006c78: d004 beq.n 8006c84 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR0; 8006c7a: 6a7b ldr r3, [r7, #36] @ 0x24 8006c7c: f443 5380 orr.w r3, r3, #4096 @ 0x1000 8006c80: 627b str r3, [r7, #36] @ 0x24 8006c82: e002 b.n 8006c8a #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0AbortCallback(hcan); 8006c84: 6878 ldr r0, [r7, #4] 8006c86: f000 f96b bl 8006f60 } } } /* Transmit Mailbox 1 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP1) != 0U) 8006c8a: 69bb ldr r3, [r7, #24] 8006c8c: f403 7380 and.w r3, r3, #256 @ 0x100 8006c90: 2b00 cmp r3, #0 8006c92: d024 beq.n 8006cde { /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); 8006c94: 687b ldr r3, [r7, #4] 8006c96: 681b ldr r3, [r3, #0] 8006c98: f44f 7280 mov.w r2, #256 @ 0x100 8006c9c: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK1) != 0U) 8006c9e: 69bb ldr r3, [r7, #24] 8006ca0: f403 7300 and.w r3, r3, #512 @ 0x200 8006ca4: 2b00 cmp r3, #0 8006ca6: d003 beq.n 8006cb0 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1CompleteCallback(hcan); 8006ca8: 6878 ldr r0, [r7, #4] 8006caa: f7fd fb3b bl 8004324 8006cae: e016 b.n 8006cde #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST1) != 0U) 8006cb0: 69bb ldr r3, [r7, #24] 8006cb2: f403 6380 and.w r3, r3, #1024 @ 0x400 8006cb6: 2b00 cmp r3, #0 8006cb8: d004 beq.n 8006cc4 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST1; 8006cba: 6a7b ldr r3, [r7, #36] @ 0x24 8006cbc: f443 5300 orr.w r3, r3, #8192 @ 0x2000 8006cc0: 627b str r3, [r7, #36] @ 0x24 8006cc2: e00c b.n 8006cde } else if ((tsrflags & CAN_TSR_TERR1) != 0U) 8006cc4: 69bb ldr r3, [r7, #24] 8006cc6: f403 6300 and.w r3, r3, #2048 @ 0x800 8006cca: 2b00 cmp r3, #0 8006ccc: d004 beq.n 8006cd8 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR1; 8006cce: 6a7b ldr r3, [r7, #36] @ 0x24 8006cd0: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8006cd4: 627b str r3, [r7, #36] @ 0x24 8006cd6: e002 b.n 8006cde #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1AbortCallback(hcan); 8006cd8: 6878 ldr r0, [r7, #4] 8006cda: f000 f94a bl 8006f72 } } } /* Transmit Mailbox 2 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP2) != 0U) 8006cde: 69bb ldr r3, [r7, #24] 8006ce0: f403 3380 and.w r3, r3, #65536 @ 0x10000 8006ce4: 2b00 cmp r3, #0 8006ce6: d024 beq.n 8006d32 { /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); 8006ce8: 687b ldr r3, [r7, #4] 8006cea: 681b ldr r3, [r3, #0] 8006cec: f44f 3280 mov.w r2, #65536 @ 0x10000 8006cf0: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK2) != 0U) 8006cf2: 69bb ldr r3, [r7, #24] 8006cf4: f403 3300 and.w r3, r3, #131072 @ 0x20000 8006cf8: 2b00 cmp r3, #0 8006cfa: d003 beq.n 8006d04 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2CompleteCallback(hcan); 8006cfc: 6878 ldr r0, [r7, #4] 8006cfe: f7fd fb2b bl 8004358 8006d02: e016 b.n 8006d32 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST2) != 0U) 8006d04: 69bb ldr r3, [r7, #24] 8006d06: f403 2380 and.w r3, r3, #262144 @ 0x40000 8006d0a: 2b00 cmp r3, #0 8006d0c: d004 beq.n 8006d18 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST2; 8006d0e: 6a7b ldr r3, [r7, #36] @ 0x24 8006d10: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006d14: 627b str r3, [r7, #36] @ 0x24 8006d16: e00c b.n 8006d32 } else if ((tsrflags & CAN_TSR_TERR2) != 0U) 8006d18: 69bb ldr r3, [r7, #24] 8006d1a: f403 2300 and.w r3, r3, #524288 @ 0x80000 8006d1e: 2b00 cmp r3, #0 8006d20: d004 beq.n 8006d2c { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR2; 8006d22: 6a7b ldr r3, [r7, #36] @ 0x24 8006d24: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8006d28: 627b str r3, [r7, #36] @ 0x24 8006d2a: e002 b.n 8006d32 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2AbortCallback(hcan); 8006d2c: 6878 ldr r0, [r7, #4] 8006d2e: f000 f929 bl 8006f84 } } } /* Receive FIFO 0 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) 8006d32: 6a3b ldr r3, [r7, #32] 8006d34: f003 0308 and.w r3, r3, #8 8006d38: 2b00 cmp r3, #0 8006d3a: d00c beq.n 8006d56 { if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) 8006d3c: 697b ldr r3, [r7, #20] 8006d3e: f003 0310 and.w r3, r3, #16 8006d42: 2b00 cmp r3, #0 8006d44: d007 beq.n 8006d56 { /* Set CAN error code to Rx Fifo 0 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV0; 8006d46: 6a7b ldr r3, [r7, #36] @ 0x24 8006d48: f443 7300 orr.w r3, r3, #512 @ 0x200 8006d4c: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO0 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); 8006d4e: 687b ldr r3, [r7, #4] 8006d50: 681b ldr r3, [r3, #0] 8006d52: 2210 movs r2, #16 8006d54: 60da str r2, [r3, #12] } } /* Receive FIFO 0 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) 8006d56: 6a3b ldr r3, [r7, #32] 8006d58: f003 0304 and.w r3, r3, #4 8006d5c: 2b00 cmp r3, #0 8006d5e: d00b beq.n 8006d78 { if ((rf0rflags & CAN_RF0R_FULL0) != 0U) 8006d60: 697b ldr r3, [r7, #20] 8006d62: f003 0308 and.w r3, r3, #8 8006d66: 2b00 cmp r3, #0 8006d68: d006 beq.n 8006d78 { /* Clear FIFO 0 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); 8006d6a: 687b ldr r3, [r7, #4] 8006d6c: 681b ldr r3, [r3, #0] 8006d6e: 2208 movs r2, #8 8006d70: 60da str r2, [r3, #12] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0FullCallback(hcan); 8006d72: 6878 ldr r0, [r7, #4] 8006d74: f000 f90f bl 8006f96 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 0 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) 8006d78: 6a3b ldr r3, [r7, #32] 8006d7a: f003 0302 and.w r3, r3, #2 8006d7e: 2b00 cmp r3, #0 8006d80: d009 beq.n 8006d96 { /* Check if message is still pending */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) 8006d82: 687b ldr r3, [r7, #4] 8006d84: 681b ldr r3, [r3, #0] 8006d86: 68db ldr r3, [r3, #12] 8006d88: f003 0303 and.w r3, r3, #3 8006d8c: 2b00 cmp r3, #0 8006d8e: d002 beq.n 8006d96 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0MsgPendingCallback(hcan); 8006d90: 6878 ldr r0, [r7, #4] 8006d92: f7fc ff0d bl 8003bb0 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) 8006d96: 6a3b ldr r3, [r7, #32] 8006d98: f003 0340 and.w r3, r3, #64 @ 0x40 8006d9c: 2b00 cmp r3, #0 8006d9e: d00c beq.n 8006dba { if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) 8006da0: 693b ldr r3, [r7, #16] 8006da2: f003 0310 and.w r3, r3, #16 8006da6: 2b00 cmp r3, #0 8006da8: d007 beq.n 8006dba { /* Set CAN error code to Rx Fifo 1 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV1; 8006daa: 6a7b ldr r3, [r7, #36] @ 0x24 8006dac: f443 6380 orr.w r3, r3, #1024 @ 0x400 8006db0: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO1 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); 8006db2: 687b ldr r3, [r7, #4] 8006db4: 681b ldr r3, [r3, #0] 8006db6: 2210 movs r2, #16 8006db8: 611a str r2, [r3, #16] } } /* Receive FIFO 1 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) 8006dba: 6a3b ldr r3, [r7, #32] 8006dbc: f003 0320 and.w r3, r3, #32 8006dc0: 2b00 cmp r3, #0 8006dc2: d00b beq.n 8006ddc { if ((rf1rflags & CAN_RF1R_FULL1) != 0U) 8006dc4: 693b ldr r3, [r7, #16] 8006dc6: f003 0308 and.w r3, r3, #8 8006dca: 2b00 cmp r3, #0 8006dcc: d006 beq.n 8006ddc { /* Clear FIFO 1 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); 8006dce: 687b ldr r3, [r7, #4] 8006dd0: 681b ldr r3, [r3, #0] 8006dd2: 2208 movs r2, #8 8006dd4: 611a str r2, [r3, #16] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1FullCallback(hcan); 8006dd6: 6878 ldr r0, [r7, #4] 8006dd8: f000 f8e6 bl 8006fa8 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) 8006ddc: 6a3b ldr r3, [r7, #32] 8006dde: f003 0310 and.w r3, r3, #16 8006de2: 2b00 cmp r3, #0 8006de4: d009 beq.n 8006dfa { /* Check if message is still pending */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) 8006de6: 687b ldr r3, [r7, #4] 8006de8: 681b ldr r3, [r3, #0] 8006dea: 691b ldr r3, [r3, #16] 8006dec: f003 0303 and.w r3, r3, #3 8006df0: 2b00 cmp r3, #0 8006df2: d002 beq.n 8006dfa #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1MsgPendingCallback(hcan); 8006df4: 6878 ldr r0, [r7, #4] 8006df6: f7fd fa25 bl 8004244 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Sleep interrupt management *********************************************/ if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) 8006dfa: 6a3b ldr r3, [r7, #32] 8006dfc: f403 3300 and.w r3, r3, #131072 @ 0x20000 8006e00: 2b00 cmp r3, #0 8006e02: d00b beq.n 8006e1c { if ((msrflags & CAN_MSR_SLAKI) != 0U) 8006e04: 69fb ldr r3, [r7, #28] 8006e06: f003 0310 and.w r3, r3, #16 8006e0a: 2b00 cmp r3, #0 8006e0c: d006 beq.n 8006e1c { /* Clear Sleep interrupt Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); 8006e0e: 687b ldr r3, [r7, #4] 8006e10: 681b ldr r3, [r3, #0] 8006e12: 2210 movs r2, #16 8006e14: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->SleepCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_SleepCallback(hcan); 8006e16: 6878 ldr r0, [r7, #4] 8006e18: f000 f8cf bl 8006fba #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* WakeUp interrupt management *********************************************/ if ((interrupts & CAN_IT_WAKEUP) != 0U) 8006e1c: 6a3b ldr r3, [r7, #32] 8006e1e: f403 3380 and.w r3, r3, #65536 @ 0x10000 8006e22: 2b00 cmp r3, #0 8006e24: d00b beq.n 8006e3e { if ((msrflags & CAN_MSR_WKUI) != 0U) 8006e26: 69fb ldr r3, [r7, #28] 8006e28: f003 0308 and.w r3, r3, #8 8006e2c: 2b00 cmp r3, #0 8006e2e: d006 beq.n 8006e3e { /* Clear WakeUp Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); 8006e30: 687b ldr r3, [r7, #4] 8006e32: 681b ldr r3, [r3, #0] 8006e34: 2208 movs r2, #8 8006e36: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->WakeUpFromRxMsgCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_WakeUpFromRxMsgCallback(hcan); 8006e38: 6878 ldr r0, [r7, #4] 8006e3a: f000 f8c7 bl 8006fcc #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Error interrupts management *********************************************/ if ((interrupts & CAN_IT_ERROR) != 0U) 8006e3e: 6a3b ldr r3, [r7, #32] 8006e40: f403 4300 and.w r3, r3, #32768 @ 0x8000 8006e44: 2b00 cmp r3, #0 8006e46: d07b beq.n 8006f40 { if ((msrflags & CAN_MSR_ERRI) != 0U) 8006e48: 69fb ldr r3, [r7, #28] 8006e4a: f003 0304 and.w r3, r3, #4 8006e4e: 2b00 cmp r3, #0 8006e50: d072 beq.n 8006f38 { /* Check Error Warning Flag */ if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 8006e52: 6a3b ldr r3, [r7, #32] 8006e54: f403 7380 and.w r3, r3, #256 @ 0x100 8006e58: 2b00 cmp r3, #0 8006e5a: d008 beq.n 8006e6e ((esrflags & CAN_ESR_EWGF) != 0U)) 8006e5c: 68fb ldr r3, [r7, #12] 8006e5e: f003 0301 and.w r3, r3, #1 if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 8006e62: 2b00 cmp r3, #0 8006e64: d003 beq.n 8006e6e { /* Set CAN error code to Error Warning */ errorcode |= HAL_CAN_ERROR_EWG; 8006e66: 6a7b ldr r3, [r7, #36] @ 0x24 8006e68: f043 0301 orr.w r3, r3, #1 8006e6c: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Warning Flag as read-only */ } /* Check Error Passive Flag */ if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 8006e6e: 6a3b ldr r3, [r7, #32] 8006e70: f403 7300 and.w r3, r3, #512 @ 0x200 8006e74: 2b00 cmp r3, #0 8006e76: d008 beq.n 8006e8a ((esrflags & CAN_ESR_EPVF) != 0U)) 8006e78: 68fb ldr r3, [r7, #12] 8006e7a: f003 0302 and.w r3, r3, #2 if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 8006e7e: 2b00 cmp r3, #0 8006e80: d003 beq.n 8006e8a { /* Set CAN error code to Error Passive */ errorcode |= HAL_CAN_ERROR_EPV; 8006e82: 6a7b ldr r3, [r7, #36] @ 0x24 8006e84: f043 0302 orr.w r3, r3, #2 8006e88: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Passive Flag as read-only */ } /* Check Bus-off Flag */ if (((interrupts & CAN_IT_BUSOFF) != 0U) && 8006e8a: 6a3b ldr r3, [r7, #32] 8006e8c: f403 6380 and.w r3, r3, #1024 @ 0x400 8006e90: 2b00 cmp r3, #0 8006e92: d008 beq.n 8006ea6 ((esrflags & CAN_ESR_BOFF) != 0U)) 8006e94: 68fb ldr r3, [r7, #12] 8006e96: f003 0304 and.w r3, r3, #4 if (((interrupts & CAN_IT_BUSOFF) != 0U) && 8006e9a: 2b00 cmp r3, #0 8006e9c: d003 beq.n 8006ea6 { /* Set CAN error code to Bus-Off */ errorcode |= HAL_CAN_ERROR_BOF; 8006e9e: 6a7b ldr r3, [r7, #36] @ 0x24 8006ea0: f043 0304 orr.w r3, r3, #4 8006ea4: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Bus-Off as read-only */ } /* Check Last Error Code Flag */ if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 8006ea6: 6a3b ldr r3, [r7, #32] 8006ea8: f403 6300 and.w r3, r3, #2048 @ 0x800 8006eac: 2b00 cmp r3, #0 8006eae: d043 beq.n 8006f38 ((esrflags & CAN_ESR_LEC) != 0U)) 8006eb0: 68fb ldr r3, [r7, #12] 8006eb2: f003 0370 and.w r3, r3, #112 @ 0x70 if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 8006eb6: 2b00 cmp r3, #0 8006eb8: d03e beq.n 8006f38 { switch (esrflags & CAN_ESR_LEC) 8006eba: 68fb ldr r3, [r7, #12] 8006ebc: f003 0370 and.w r3, r3, #112 @ 0x70 8006ec0: 2b60 cmp r3, #96 @ 0x60 8006ec2: d02b beq.n 8006f1c 8006ec4: 2b60 cmp r3, #96 @ 0x60 8006ec6: d82e bhi.n 8006f26 8006ec8: 2b50 cmp r3, #80 @ 0x50 8006eca: d022 beq.n 8006f12 8006ecc: 2b50 cmp r3, #80 @ 0x50 8006ece: d82a bhi.n 8006f26 8006ed0: 2b40 cmp r3, #64 @ 0x40 8006ed2: d019 beq.n 8006f08 8006ed4: 2b40 cmp r3, #64 @ 0x40 8006ed6: d826 bhi.n 8006f26 8006ed8: 2b30 cmp r3, #48 @ 0x30 8006eda: d010 beq.n 8006efe 8006edc: 2b30 cmp r3, #48 @ 0x30 8006ede: d822 bhi.n 8006f26 8006ee0: 2b10 cmp r3, #16 8006ee2: d002 beq.n 8006eea 8006ee4: 2b20 cmp r3, #32 8006ee6: d005 beq.n 8006ef4 case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): /* Set CAN error code to CRC error */ errorcode |= HAL_CAN_ERROR_CRC; break; default: break; 8006ee8: e01d b.n 8006f26 errorcode |= HAL_CAN_ERROR_STF; 8006eea: 6a7b ldr r3, [r7, #36] @ 0x24 8006eec: f043 0308 orr.w r3, r3, #8 8006ef0: 627b str r3, [r7, #36] @ 0x24 break; 8006ef2: e019 b.n 8006f28 errorcode |= HAL_CAN_ERROR_FOR; 8006ef4: 6a7b ldr r3, [r7, #36] @ 0x24 8006ef6: f043 0310 orr.w r3, r3, #16 8006efa: 627b str r3, [r7, #36] @ 0x24 break; 8006efc: e014 b.n 8006f28 errorcode |= HAL_CAN_ERROR_ACK; 8006efe: 6a7b ldr r3, [r7, #36] @ 0x24 8006f00: f043 0320 orr.w r3, r3, #32 8006f04: 627b str r3, [r7, #36] @ 0x24 break; 8006f06: e00f b.n 8006f28 errorcode |= HAL_CAN_ERROR_BR; 8006f08: 6a7b ldr r3, [r7, #36] @ 0x24 8006f0a: f043 0340 orr.w r3, r3, #64 @ 0x40 8006f0e: 627b str r3, [r7, #36] @ 0x24 break; 8006f10: e00a b.n 8006f28 errorcode |= HAL_CAN_ERROR_BD; 8006f12: 6a7b ldr r3, [r7, #36] @ 0x24 8006f14: f043 0380 orr.w r3, r3, #128 @ 0x80 8006f18: 627b str r3, [r7, #36] @ 0x24 break; 8006f1a: e005 b.n 8006f28 errorcode |= HAL_CAN_ERROR_CRC; 8006f1c: 6a7b ldr r3, [r7, #36] @ 0x24 8006f1e: f443 7380 orr.w r3, r3, #256 @ 0x100 8006f22: 627b str r3, [r7, #36] @ 0x24 break; 8006f24: e000 b.n 8006f28 break; 8006f26: bf00 nop } /* Clear Last error code Flag */ CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); 8006f28: 687b ldr r3, [r7, #4] 8006f2a: 681b ldr r3, [r3, #0] 8006f2c: 699a ldr r2, [r3, #24] 8006f2e: 687b ldr r3, [r7, #4] 8006f30: 681b ldr r3, [r3, #0] 8006f32: f022 0270 bic.w r2, r2, #112 @ 0x70 8006f36: 619a str r2, [r3, #24] } } /* Clear ERRI Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); 8006f38: 687b ldr r3, [r7, #4] 8006f3a: 681b ldr r3, [r3, #0] 8006f3c: 2204 movs r2, #4 8006f3e: 605a str r2, [r3, #4] } /* Call the Error call Back in case of Errors */ if (errorcode != HAL_CAN_ERROR_NONE) 8006f40: 6a7b ldr r3, [r7, #36] @ 0x24 8006f42: 2b00 cmp r3, #0 8006f44: d008 beq.n 8006f58 { /* Update error code in handle */ hcan->ErrorCode |= errorcode; 8006f46: 687b ldr r3, [r7, #4] 8006f48: 6a5a ldr r2, [r3, #36] @ 0x24 8006f4a: 6a7b ldr r3, [r7, #36] @ 0x24 8006f4c: 431a orrs r2, r3 8006f4e: 687b ldr r3, [r7, #4] 8006f50: 625a str r2, [r3, #36] @ 0x24 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->ErrorCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_ErrorCallback(hcan); 8006f52: 6878 ldr r0, [r7, #4] 8006f54: f000 f843 bl 8006fde #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } 8006f58: bf00 nop 8006f5a: 3728 adds r7, #40 @ 0x28 8006f5c: 46bd mov sp, r7 8006f5e: bd80 pop {r7, pc} 08006f60 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) { 8006f60: b480 push {r7} 8006f62: b083 sub sp, #12 8006f64: af00 add r7, sp, #0 8006f66: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0AbortCallback could be implemented in the user file */ } 8006f68: bf00 nop 8006f6a: 370c adds r7, #12 8006f6c: 46bd mov sp, r7 8006f6e: bc80 pop {r7} 8006f70: 4770 bx lr 08006f72 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) { 8006f72: b480 push {r7} 8006f74: b083 sub sp, #12 8006f76: af00 add r7, sp, #0 8006f78: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1AbortCallback could be implemented in the user file */ } 8006f7a: bf00 nop 8006f7c: 370c adds r7, #12 8006f7e: 46bd mov sp, r7 8006f80: bc80 pop {r7} 8006f82: 4770 bx lr 08006f84 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) { 8006f84: b480 push {r7} 8006f86: b083 sub sp, #12 8006f88: af00 add r7, sp, #0 8006f8a: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2AbortCallback could be implemented in the user file */ } 8006f8c: bf00 nop 8006f8e: 370c adds r7, #12 8006f90: 46bd mov sp, r7 8006f92: bc80 pop {r7} 8006f94: 4770 bx lr 08006f96 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) { 8006f96: b480 push {r7} 8006f98: b083 sub sp, #12 8006f9a: af00 add r7, sp, #0 8006f9c: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo0FullCallback could be implemented in the user file */ } 8006f9e: bf00 nop 8006fa0: 370c adds r7, #12 8006fa2: 46bd mov sp, r7 8006fa4: bc80 pop {r7} 8006fa6: 4770 bx lr 08006fa8 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) { 8006fa8: b480 push {r7} 8006faa: b083 sub sp, #12 8006fac: af00 add r7, sp, #0 8006fae: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo1FullCallback could be implemented in the user file */ } 8006fb0: bf00 nop 8006fb2: 370c adds r7, #12 8006fb4: 46bd mov sp, r7 8006fb6: bc80 pop {r7} 8006fb8: 4770 bx lr 08006fba : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) { 8006fba: b480 push {r7} 8006fbc: b083 sub sp, #12 8006fbe: af00 add r7, sp, #0 8006fc0: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_SleepCallback could be implemented in the user file */ } 8006fc2: bf00 nop 8006fc4: 370c adds r7, #12 8006fc6: 46bd mov sp, r7 8006fc8: bc80 pop {r7} 8006fca: 4770 bx lr 08006fcc : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) { 8006fcc: b480 push {r7} 8006fce: b083 sub sp, #12 8006fd0: af00 add r7, sp, #0 8006fd2: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the user file */ } 8006fd4: bf00 nop 8006fd6: 370c adds r7, #12 8006fd8: 46bd mov sp, r7 8006fda: bc80 pop {r7} 8006fdc: 4770 bx lr 08006fde : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) { 8006fde: b480 push {r7} 8006fe0: b083 sub sp, #12 8006fe2: af00 add r7, sp, #0 8006fe4: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_ErrorCallback could be implemented in the user file */ } 8006fe6: bf00 nop 8006fe8: 370c adds r7, #12 8006fea: 46bd mov sp, r7 8006fec: bc80 pop {r7} 8006fee: 4770 bx lr 08006ff0 <__NVIC_SetPriorityGrouping>: { 8006ff0: b480 push {r7} 8006ff2: b085 sub sp, #20 8006ff4: af00 add r7, sp, #0 8006ff6: 6078 str r0, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8006ff8: 687b ldr r3, [r7, #4] 8006ffa: f003 0307 and.w r3, r3, #7 8006ffe: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8007000: 4b0c ldr r3, [pc, #48] @ (8007034 <__NVIC_SetPriorityGrouping+0x44>) 8007002: 68db ldr r3, [r3, #12] 8007004: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8007006: 68ba ldr r2, [r7, #8] 8007008: f64f 03ff movw r3, #63743 @ 0xf8ff 800700c: 4013 ands r3, r2 800700e: 60bb str r3, [r7, #8] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8007010: 68fb ldr r3, [r7, #12] 8007012: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8007014: 68bb ldr r3, [r7, #8] 8007016: 4313 orrs r3, r2 reg_value = (reg_value | 8007018: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 800701c: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8007020: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8007022: 4a04 ldr r2, [pc, #16] @ (8007034 <__NVIC_SetPriorityGrouping+0x44>) 8007024: 68bb ldr r3, [r7, #8] 8007026: 60d3 str r3, [r2, #12] } 8007028: bf00 nop 800702a: 3714 adds r7, #20 800702c: 46bd mov sp, r7 800702e: bc80 pop {r7} 8007030: 4770 bx lr 8007032: bf00 nop 8007034: e000ed00 .word 0xe000ed00 08007038 <__NVIC_GetPriorityGrouping>: { 8007038: b480 push {r7} 800703a: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 800703c: 4b04 ldr r3, [pc, #16] @ (8007050 <__NVIC_GetPriorityGrouping+0x18>) 800703e: 68db ldr r3, [r3, #12] 8007040: 0a1b lsrs r3, r3, #8 8007042: f003 0307 and.w r3, r3, #7 } 8007046: 4618 mov r0, r3 8007048: 46bd mov sp, r7 800704a: bc80 pop {r7} 800704c: 4770 bx lr 800704e: bf00 nop 8007050: e000ed00 .word 0xe000ed00 08007054 <__NVIC_EnableIRQ>: { 8007054: b480 push {r7} 8007056: b083 sub sp, #12 8007058: af00 add r7, sp, #0 800705a: 4603 mov r3, r0 800705c: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 800705e: f997 3007 ldrsb.w r3, [r7, #7] 8007062: 2b00 cmp r3, #0 8007064: db0b blt.n 800707e <__NVIC_EnableIRQ+0x2a> NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8007066: 79fb ldrb r3, [r7, #7] 8007068: f003 021f and.w r2, r3, #31 800706c: 4906 ldr r1, [pc, #24] @ (8007088 <__NVIC_EnableIRQ+0x34>) 800706e: f997 3007 ldrsb.w r3, [r7, #7] 8007072: 095b lsrs r3, r3, #5 8007074: 2001 movs r0, #1 8007076: fa00 f202 lsl.w r2, r0, r2 800707a: f841 2023 str.w r2, [r1, r3, lsl #2] } 800707e: bf00 nop 8007080: 370c adds r7, #12 8007082: 46bd mov sp, r7 8007084: bc80 pop {r7} 8007086: 4770 bx lr 8007088: e000e100 .word 0xe000e100 0800708c <__NVIC_SetPriority>: { 800708c: b480 push {r7} 800708e: b083 sub sp, #12 8007090: af00 add r7, sp, #0 8007092: 4603 mov r3, r0 8007094: 6039 str r1, [r7, #0] 8007096: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8007098: f997 3007 ldrsb.w r3, [r7, #7] 800709c: 2b00 cmp r3, #0 800709e: db0a blt.n 80070b6 <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80070a0: 683b ldr r3, [r7, #0] 80070a2: b2da uxtb r2, r3 80070a4: 490c ldr r1, [pc, #48] @ (80070d8 <__NVIC_SetPriority+0x4c>) 80070a6: f997 3007 ldrsb.w r3, [r7, #7] 80070aa: 0112 lsls r2, r2, #4 80070ac: b2d2 uxtb r2, r2 80070ae: 440b add r3, r1 80070b0: f883 2300 strb.w r2, [r3, #768] @ 0x300 } 80070b4: e00a b.n 80070cc <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80070b6: 683b ldr r3, [r7, #0] 80070b8: b2da uxtb r2, r3 80070ba: 4908 ldr r1, [pc, #32] @ (80070dc <__NVIC_SetPriority+0x50>) 80070bc: 79fb ldrb r3, [r7, #7] 80070be: f003 030f and.w r3, r3, #15 80070c2: 3b04 subs r3, #4 80070c4: 0112 lsls r2, r2, #4 80070c6: b2d2 uxtb r2, r2 80070c8: 440b add r3, r1 80070ca: 761a strb r2, [r3, #24] } 80070cc: bf00 nop 80070ce: 370c adds r7, #12 80070d0: 46bd mov sp, r7 80070d2: bc80 pop {r7} 80070d4: 4770 bx lr 80070d6: bf00 nop 80070d8: e000e100 .word 0xe000e100 80070dc: e000ed00 .word 0xe000ed00 080070e0 : { 80070e0: b480 push {r7} 80070e2: b089 sub sp, #36 @ 0x24 80070e4: af00 add r7, sp, #0 80070e6: 60f8 str r0, [r7, #12] 80070e8: 60b9 str r1, [r7, #8] 80070ea: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80070ec: 68fb ldr r3, [r7, #12] 80070ee: f003 0307 and.w r3, r3, #7 80070f2: 61fb str r3, [r7, #28] PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80070f4: 69fb ldr r3, [r7, #28] 80070f6: f1c3 0307 rsb r3, r3, #7 80070fa: 2b04 cmp r3, #4 80070fc: bf28 it cs 80070fe: 2304 movcs r3, #4 8007100: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8007102: 69fb ldr r3, [r7, #28] 8007104: 3304 adds r3, #4 8007106: 2b06 cmp r3, #6 8007108: d902 bls.n 8007110 800710a: 69fb ldr r3, [r7, #28] 800710c: 3b03 subs r3, #3 800710e: e000 b.n 8007112 8007110: 2300 movs r3, #0 8007112: 617b str r3, [r7, #20] ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8007114: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8007118: 69bb ldr r3, [r7, #24] 800711a: fa02 f303 lsl.w r3, r2, r3 800711e: 43da mvns r2, r3 8007120: 68bb ldr r3, [r7, #8] 8007122: 401a ands r2, r3 8007124: 697b ldr r3, [r7, #20] 8007126: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8007128: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 800712c: 697b ldr r3, [r7, #20] 800712e: fa01 f303 lsl.w r3, r1, r3 8007132: 43d9 mvns r1, r3 8007134: 687b ldr r3, [r7, #4] 8007136: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8007138: 4313 orrs r3, r2 } 800713a: 4618 mov r0, r3 800713c: 3724 adds r7, #36 @ 0x24 800713e: 46bd mov sp, r7 8007140: bc80 pop {r7} 8007142: 4770 bx lr 08007144 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8007144: b580 push {r7, lr} 8007146: b082 sub sp, #8 8007148: af00 add r7, sp, #0 800714a: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 800714c: 687b ldr r3, [r7, #4] 800714e: 3b01 subs r3, #1 8007150: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8007154: d301 bcc.n 800715a { return (1UL); /* Reload value impossible */ 8007156: 2301 movs r3, #1 8007158: e00f b.n 800717a } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800715a: 4a0a ldr r2, [pc, #40] @ (8007184 ) 800715c: 687b ldr r3, [r7, #4] 800715e: 3b01 subs r3, #1 8007160: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8007162: 210f movs r1, #15 8007164: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8007168: f7ff ff90 bl 800708c <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 800716c: 4b05 ldr r3, [pc, #20] @ (8007184 ) 800716e: 2200 movs r2, #0 8007170: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8007172: 4b04 ldr r3, [pc, #16] @ (8007184 ) 8007174: 2207 movs r2, #7 8007176: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8007178: 2300 movs r3, #0 } 800717a: 4618 mov r0, r3 800717c: 3708 adds r7, #8 800717e: 46bd mov sp, r7 8007180: bd80 pop {r7, pc} 8007182: bf00 nop 8007184: e000e010 .word 0xe000e010 08007188 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8007188: b580 push {r7, lr} 800718a: b082 sub sp, #8 800718c: af00 add r7, sp, #0 800718e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8007190: 6878 ldr r0, [r7, #4] 8007192: f7ff ff2d bl 8006ff0 <__NVIC_SetPriorityGrouping> } 8007196: bf00 nop 8007198: 3708 adds r7, #8 800719a: 46bd mov sp, r7 800719c: bd80 pop {r7, pc} 0800719e : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 800719e: b580 push {r7, lr} 80071a0: b086 sub sp, #24 80071a2: af00 add r7, sp, #0 80071a4: 4603 mov r3, r0 80071a6: 60b9 str r1, [r7, #8] 80071a8: 607a str r2, [r7, #4] 80071aa: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 80071ac: 2300 movs r3, #0 80071ae: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 80071b0: f7ff ff42 bl 8007038 <__NVIC_GetPriorityGrouping> 80071b4: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 80071b6: 687a ldr r2, [r7, #4] 80071b8: 68b9 ldr r1, [r7, #8] 80071ba: 6978 ldr r0, [r7, #20] 80071bc: f7ff ff90 bl 80070e0 80071c0: 4602 mov r2, r0 80071c2: f997 300f ldrsb.w r3, [r7, #15] 80071c6: 4611 mov r1, r2 80071c8: 4618 mov r0, r3 80071ca: f7ff ff5f bl 800708c <__NVIC_SetPriority> } 80071ce: bf00 nop 80071d0: 3718 adds r7, #24 80071d2: 46bd mov sp, r7 80071d4: bd80 pop {r7, pc} 080071d6 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80071d6: b580 push {r7, lr} 80071d8: b082 sub sp, #8 80071da: af00 add r7, sp, #0 80071dc: 4603 mov r3, r0 80071de: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80071e0: f997 3007 ldrsb.w r3, [r7, #7] 80071e4: 4618 mov r0, r3 80071e6: f7ff ff35 bl 8007054 <__NVIC_EnableIRQ> } 80071ea: bf00 nop 80071ec: 3708 adds r7, #8 80071ee: 46bd mov sp, r7 80071f0: bd80 pop {r7, pc} 080071f2 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 80071f2: b580 push {r7, lr} 80071f4: b082 sub sp, #8 80071f6: af00 add r7, sp, #0 80071f8: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 80071fa: 6878 ldr r0, [r7, #4] 80071fc: f7ff ffa2 bl 8007144 8007200: 4603 mov r3, r0 } 8007202: 4618 mov r0, r3 8007204: 3708 adds r7, #8 8007206: 46bd mov sp, r7 8007208: bd80 pop {r7, pc} 0800720a : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 800720a: b480 push {r7} 800720c: b085 sub sp, #20 800720e: af00 add r7, sp, #0 8007210: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8007212: 2300 movs r3, #0 8007214: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) 8007216: 687b ldr r3, [r7, #4] 8007218: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 800721c: 2b02 cmp r3, #2 800721e: d008 beq.n 8007232 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8007220: 687b ldr r3, [r7, #4] 8007222: 2204 movs r2, #4 8007224: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8007226: 687b ldr r3, [r7, #4] 8007228: 2200 movs r2, #0 800722a: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800722e: 2301 movs r3, #1 8007230: e020 b.n 8007274 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8007232: 687b ldr r3, [r7, #4] 8007234: 681b ldr r3, [r3, #0] 8007236: 681a ldr r2, [r3, #0] 8007238: 687b ldr r3, [r7, #4] 800723a: 681b ldr r3, [r3, #0] 800723c: f022 020e bic.w r2, r2, #14 8007240: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8007242: 687b ldr r3, [r7, #4] 8007244: 681b ldr r3, [r3, #0] 8007246: 681a ldr r2, [r3, #0] 8007248: 687b ldr r3, [r7, #4] 800724a: 681b ldr r3, [r3, #0] 800724c: f022 0201 bic.w r2, r2, #1 8007250: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8007252: 687b ldr r3, [r7, #4] 8007254: 6c1a ldr r2, [r3, #64] @ 0x40 8007256: 687b ldr r3, [r7, #4] 8007258: 6bdb ldr r3, [r3, #60] @ 0x3c 800725a: 2101 movs r1, #1 800725c: fa01 f202 lsl.w r2, r1, r2 8007260: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8007262: 687b ldr r3, [r7, #4] 8007264: 2201 movs r2, #1 8007266: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 800726a: 687b ldr r3, [r7, #4] 800726c: 2200 movs r2, #0 800726e: f883 2020 strb.w r2, [r3, #32] return status; 8007272: 7bfb ldrb r3, [r7, #15] } 8007274: 4618 mov r0, r3 8007276: 3714 adds r7, #20 8007278: 46bd mov sp, r7 800727a: bc80 pop {r7} 800727c: 4770 bx lr ... 08007280 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 8007280: b580 push {r7, lr} 8007282: b084 sub sp, #16 8007284: af00 add r7, sp, #0 8007286: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8007288: 2300 movs r3, #0 800728a: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) 800728c: 687b ldr r3, [r7, #4] 800728e: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8007292: 2b02 cmp r3, #2 8007294: d005 beq.n 80072a2 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8007296: 687b ldr r3, [r7, #4] 8007298: 2204 movs r2, #4 800729a: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; 800729c: 2301 movs r3, #1 800729e: 73fb strb r3, [r7, #15] 80072a0: e0d6 b.n 8007450 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80072a2: 687b ldr r3, [r7, #4] 80072a4: 681b ldr r3, [r3, #0] 80072a6: 681a ldr r2, [r3, #0] 80072a8: 687b ldr r3, [r7, #4] 80072aa: 681b ldr r3, [r3, #0] 80072ac: f022 020e bic.w r2, r2, #14 80072b0: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80072b2: 687b ldr r3, [r7, #4] 80072b4: 681b ldr r3, [r3, #0] 80072b6: 681a ldr r2, [r3, #0] 80072b8: 687b ldr r3, [r7, #4] 80072ba: 681b ldr r3, [r3, #0] 80072bc: f022 0201 bic.w r2, r2, #1 80072c0: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80072c2: 687b ldr r3, [r7, #4] 80072c4: 681b ldr r3, [r3, #0] 80072c6: 461a mov r2, r3 80072c8: 4b64 ldr r3, [pc, #400] @ (800745c ) 80072ca: 429a cmp r2, r3 80072cc: d958 bls.n 8007380 80072ce: 687b ldr r3, [r7, #4] 80072d0: 681b ldr r3, [r3, #0] 80072d2: 4a63 ldr r2, [pc, #396] @ (8007460 ) 80072d4: 4293 cmp r3, r2 80072d6: d04f beq.n 8007378 80072d8: 687b ldr r3, [r7, #4] 80072da: 681b ldr r3, [r3, #0] 80072dc: 4a61 ldr r2, [pc, #388] @ (8007464 ) 80072de: 4293 cmp r3, r2 80072e0: d048 beq.n 8007374 80072e2: 687b ldr r3, [r7, #4] 80072e4: 681b ldr r3, [r3, #0] 80072e6: 4a60 ldr r2, [pc, #384] @ (8007468 ) 80072e8: 4293 cmp r3, r2 80072ea: d040 beq.n 800736e 80072ec: 687b ldr r3, [r7, #4] 80072ee: 681b ldr r3, [r3, #0] 80072f0: 4a5e ldr r2, [pc, #376] @ (800746c ) 80072f2: 4293 cmp r3, r2 80072f4: d038 beq.n 8007368 80072f6: 687b ldr r3, [r7, #4] 80072f8: 681b ldr r3, [r3, #0] 80072fa: 4a5d ldr r2, [pc, #372] @ (8007470 ) 80072fc: 4293 cmp r3, r2 80072fe: d030 beq.n 8007362 8007300: 687b ldr r3, [r7, #4] 8007302: 681b ldr r3, [r3, #0] 8007304: 4a5b ldr r2, [pc, #364] @ (8007474 ) 8007306: 4293 cmp r3, r2 8007308: d028 beq.n 800735c 800730a: 687b ldr r3, [r7, #4] 800730c: 681b ldr r3, [r3, #0] 800730e: 4a53 ldr r2, [pc, #332] @ (800745c ) 8007310: 4293 cmp r3, r2 8007312: d020 beq.n 8007356 8007314: 687b ldr r3, [r7, #4] 8007316: 681b ldr r3, [r3, #0] 8007318: 4a57 ldr r2, [pc, #348] @ (8007478 ) 800731a: 4293 cmp r3, r2 800731c: d019 beq.n 8007352 800731e: 687b ldr r3, [r7, #4] 8007320: 681b ldr r3, [r3, #0] 8007322: 4a56 ldr r2, [pc, #344] @ (800747c ) 8007324: 4293 cmp r3, r2 8007326: d012 beq.n 800734e 8007328: 687b ldr r3, [r7, #4] 800732a: 681b ldr r3, [r3, #0] 800732c: 4a54 ldr r2, [pc, #336] @ (8007480 ) 800732e: 4293 cmp r3, r2 8007330: d00a beq.n 8007348 8007332: 687b ldr r3, [r7, #4] 8007334: 681b ldr r3, [r3, #0] 8007336: 4a53 ldr r2, [pc, #332] @ (8007484 ) 8007338: 4293 cmp r3, r2 800733a: d102 bne.n 8007342 800733c: f44f 5380 mov.w r3, #4096 @ 0x1000 8007340: e01b b.n 800737a 8007342: f44f 3380 mov.w r3, #65536 @ 0x10000 8007346: e018 b.n 800737a 8007348: f44f 7380 mov.w r3, #256 @ 0x100 800734c: e015 b.n 800737a 800734e: 2310 movs r3, #16 8007350: e013 b.n 800737a 8007352: 2301 movs r3, #1 8007354: e011 b.n 800737a 8007356: f04f 7380 mov.w r3, #16777216 @ 0x1000000 800735a: e00e b.n 800737a 800735c: f44f 1380 mov.w r3, #1048576 @ 0x100000 8007360: e00b b.n 800737a 8007362: f44f 3380 mov.w r3, #65536 @ 0x10000 8007366: e008 b.n 800737a 8007368: f44f 5380 mov.w r3, #4096 @ 0x1000 800736c: e005 b.n 800737a 800736e: f44f 7380 mov.w r3, #256 @ 0x100 8007372: e002 b.n 800737a 8007374: 2310 movs r3, #16 8007376: e000 b.n 800737a 8007378: 2301 movs r3, #1 800737a: 4a43 ldr r2, [pc, #268] @ (8007488 ) 800737c: 6053 str r3, [r2, #4] 800737e: e057 b.n 8007430 8007380: 687b ldr r3, [r7, #4] 8007382: 681b ldr r3, [r3, #0] 8007384: 4a36 ldr r2, [pc, #216] @ (8007460 ) 8007386: 4293 cmp r3, r2 8007388: d04f beq.n 800742a 800738a: 687b ldr r3, [r7, #4] 800738c: 681b ldr r3, [r3, #0] 800738e: 4a35 ldr r2, [pc, #212] @ (8007464 ) 8007390: 4293 cmp r3, r2 8007392: d048 beq.n 8007426 8007394: 687b ldr r3, [r7, #4] 8007396: 681b ldr r3, [r3, #0] 8007398: 4a33 ldr r2, [pc, #204] @ (8007468 ) 800739a: 4293 cmp r3, r2 800739c: d040 beq.n 8007420 800739e: 687b ldr r3, [r7, #4] 80073a0: 681b ldr r3, [r3, #0] 80073a2: 4a32 ldr r2, [pc, #200] @ (800746c ) 80073a4: 4293 cmp r3, r2 80073a6: d038 beq.n 800741a 80073a8: 687b ldr r3, [r7, #4] 80073aa: 681b ldr r3, [r3, #0] 80073ac: 4a30 ldr r2, [pc, #192] @ (8007470 ) 80073ae: 4293 cmp r3, r2 80073b0: d030 beq.n 8007414 80073b2: 687b ldr r3, [r7, #4] 80073b4: 681b ldr r3, [r3, #0] 80073b6: 4a2f ldr r2, [pc, #188] @ (8007474 ) 80073b8: 4293 cmp r3, r2 80073ba: d028 beq.n 800740e 80073bc: 687b ldr r3, [r7, #4] 80073be: 681b ldr r3, [r3, #0] 80073c0: 4a26 ldr r2, [pc, #152] @ (800745c ) 80073c2: 4293 cmp r3, r2 80073c4: d020 beq.n 8007408 80073c6: 687b ldr r3, [r7, #4] 80073c8: 681b ldr r3, [r3, #0] 80073ca: 4a2b ldr r2, [pc, #172] @ (8007478 ) 80073cc: 4293 cmp r3, r2 80073ce: d019 beq.n 8007404 80073d0: 687b ldr r3, [r7, #4] 80073d2: 681b ldr r3, [r3, #0] 80073d4: 4a29 ldr r2, [pc, #164] @ (800747c ) 80073d6: 4293 cmp r3, r2 80073d8: d012 beq.n 8007400 80073da: 687b ldr r3, [r7, #4] 80073dc: 681b ldr r3, [r3, #0] 80073de: 4a28 ldr r2, [pc, #160] @ (8007480 ) 80073e0: 4293 cmp r3, r2 80073e2: d00a beq.n 80073fa 80073e4: 687b ldr r3, [r7, #4] 80073e6: 681b ldr r3, [r3, #0] 80073e8: 4a26 ldr r2, [pc, #152] @ (8007484 ) 80073ea: 4293 cmp r3, r2 80073ec: d102 bne.n 80073f4 80073ee: f44f 5380 mov.w r3, #4096 @ 0x1000 80073f2: e01b b.n 800742c 80073f4: f44f 3380 mov.w r3, #65536 @ 0x10000 80073f8: e018 b.n 800742c 80073fa: f44f 7380 mov.w r3, #256 @ 0x100 80073fe: e015 b.n 800742c 8007400: 2310 movs r3, #16 8007402: e013 b.n 800742c 8007404: 2301 movs r3, #1 8007406: e011 b.n 800742c 8007408: f04f 7380 mov.w r3, #16777216 @ 0x1000000 800740c: e00e b.n 800742c 800740e: f44f 1380 mov.w r3, #1048576 @ 0x100000 8007412: e00b b.n 800742c 8007414: f44f 3380 mov.w r3, #65536 @ 0x10000 8007418: e008 b.n 800742c 800741a: f44f 5380 mov.w r3, #4096 @ 0x1000 800741e: e005 b.n 800742c 8007420: f44f 7380 mov.w r3, #256 @ 0x100 8007424: e002 b.n 800742c 8007426: 2310 movs r3, #16 8007428: e000 b.n 800742c 800742a: 2301 movs r3, #1 800742c: 4a17 ldr r2, [pc, #92] @ (800748c ) 800742e: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8007430: 687b ldr r3, [r7, #4] 8007432: 2201 movs r2, #1 8007434: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8007438: 687b ldr r3, [r7, #4] 800743a: 2200 movs r2, #0 800743c: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8007440: 687b ldr r3, [r7, #4] 8007442: 6b5b ldr r3, [r3, #52] @ 0x34 8007444: 2b00 cmp r3, #0 8007446: d003 beq.n 8007450 { hdma->XferAbortCallback(hdma); 8007448: 687b ldr r3, [r7, #4] 800744a: 6b5b ldr r3, [r3, #52] @ 0x34 800744c: 6878 ldr r0, [r7, #4] 800744e: 4798 blx r3 } } return status; 8007450: 7bfb ldrb r3, [r7, #15] } 8007452: 4618 mov r0, r3 8007454: 3710 adds r7, #16 8007456: 46bd mov sp, r7 8007458: bd80 pop {r7, pc} 800745a: bf00 nop 800745c: 40020080 .word 0x40020080 8007460: 40020008 .word 0x40020008 8007464: 4002001c .word 0x4002001c 8007468: 40020030 .word 0x40020030 800746c: 40020044 .word 0x40020044 8007470: 40020058 .word 0x40020058 8007474: 4002006c .word 0x4002006c 8007478: 40020408 .word 0x40020408 800747c: 4002041c .word 0x4002041c 8007480: 40020430 .word 0x40020430 8007484: 40020444 .word 0x40020444 8007488: 40020400 .word 0x40020400 800748c: 40020000 .word 0x40020000 08007490 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8007490: b480 push {r7} 8007492: b08b sub sp, #44 @ 0x2c 8007494: af00 add r7, sp, #0 8007496: 6078 str r0, [r7, #4] 8007498: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 800749a: 2300 movs r3, #0 800749c: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 800749e: 2300 movs r3, #0 80074a0: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80074a2: e169 b.n 8007778 { /* Get the IO position */ ioposition = (0x01uL << position); 80074a4: 2201 movs r2, #1 80074a6: 6a7b ldr r3, [r7, #36] @ 0x24 80074a8: fa02 f303 lsl.w r3, r2, r3 80074ac: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80074ae: 683b ldr r3, [r7, #0] 80074b0: 681b ldr r3, [r3, #0] 80074b2: 69fa ldr r2, [r7, #28] 80074b4: 4013 ands r3, r2 80074b6: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 80074b8: 69ba ldr r2, [r7, #24] 80074ba: 69fb ldr r3, [r7, #28] 80074bc: 429a cmp r2, r3 80074be: f040 8158 bne.w 8007772 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 80074c2: 683b ldr r3, [r7, #0] 80074c4: 685b ldr r3, [r3, #4] 80074c6: 4a9a ldr r2, [pc, #616] @ (8007730 ) 80074c8: 4293 cmp r3, r2 80074ca: d05e beq.n 800758a 80074cc: 4a98 ldr r2, [pc, #608] @ (8007730 ) 80074ce: 4293 cmp r3, r2 80074d0: d875 bhi.n 80075be 80074d2: 4a98 ldr r2, [pc, #608] @ (8007734 ) 80074d4: 4293 cmp r3, r2 80074d6: d058 beq.n 800758a 80074d8: 4a96 ldr r2, [pc, #600] @ (8007734 ) 80074da: 4293 cmp r3, r2 80074dc: d86f bhi.n 80075be 80074de: 4a96 ldr r2, [pc, #600] @ (8007738 ) 80074e0: 4293 cmp r3, r2 80074e2: d052 beq.n 800758a 80074e4: 4a94 ldr r2, [pc, #592] @ (8007738 ) 80074e6: 4293 cmp r3, r2 80074e8: d869 bhi.n 80075be 80074ea: 4a94 ldr r2, [pc, #592] @ (800773c ) 80074ec: 4293 cmp r3, r2 80074ee: d04c beq.n 800758a 80074f0: 4a92 ldr r2, [pc, #584] @ (800773c ) 80074f2: 4293 cmp r3, r2 80074f4: d863 bhi.n 80075be 80074f6: 4a92 ldr r2, [pc, #584] @ (8007740 ) 80074f8: 4293 cmp r3, r2 80074fa: d046 beq.n 800758a 80074fc: 4a90 ldr r2, [pc, #576] @ (8007740 ) 80074fe: 4293 cmp r3, r2 8007500: d85d bhi.n 80075be 8007502: 2b12 cmp r3, #18 8007504: d82a bhi.n 800755c 8007506: 2b12 cmp r3, #18 8007508: d859 bhi.n 80075be 800750a: a201 add r2, pc, #4 @ (adr r2, 8007510 ) 800750c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8007510: 0800758b .word 0x0800758b 8007514: 08007565 .word 0x08007565 8007518: 08007577 .word 0x08007577 800751c: 080075b9 .word 0x080075b9 8007520: 080075bf .word 0x080075bf 8007524: 080075bf .word 0x080075bf 8007528: 080075bf .word 0x080075bf 800752c: 080075bf .word 0x080075bf 8007530: 080075bf .word 0x080075bf 8007534: 080075bf .word 0x080075bf 8007538: 080075bf .word 0x080075bf 800753c: 080075bf .word 0x080075bf 8007540: 080075bf .word 0x080075bf 8007544: 080075bf .word 0x080075bf 8007548: 080075bf .word 0x080075bf 800754c: 080075bf .word 0x080075bf 8007550: 080075bf .word 0x080075bf 8007554: 0800756d .word 0x0800756d 8007558: 08007581 .word 0x08007581 800755c: 4a79 ldr r2, [pc, #484] @ (8007744 ) 800755e: 4293 cmp r3, r2 8007560: d013 beq.n 800758a config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 8007562: e02c b.n 80075be config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8007564: 683b ldr r3, [r7, #0] 8007566: 68db ldr r3, [r3, #12] 8007568: 623b str r3, [r7, #32] break; 800756a: e029 b.n 80075c0 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 800756c: 683b ldr r3, [r7, #0] 800756e: 68db ldr r3, [r3, #12] 8007570: 3304 adds r3, #4 8007572: 623b str r3, [r7, #32] break; 8007574: e024 b.n 80075c0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8007576: 683b ldr r3, [r7, #0] 8007578: 68db ldr r3, [r3, #12] 800757a: 3308 adds r3, #8 800757c: 623b str r3, [r7, #32] break; 800757e: e01f b.n 80075c0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8007580: 683b ldr r3, [r7, #0] 8007582: 68db ldr r3, [r3, #12] 8007584: 330c adds r3, #12 8007586: 623b str r3, [r7, #32] break; 8007588: e01a b.n 80075c0 if (GPIO_Init->Pull == GPIO_NOPULL) 800758a: 683b ldr r3, [r7, #0] 800758c: 689b ldr r3, [r3, #8] 800758e: 2b00 cmp r3, #0 8007590: d102 bne.n 8007598 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8007592: 2304 movs r3, #4 8007594: 623b str r3, [r7, #32] break; 8007596: e013 b.n 80075c0 else if (GPIO_Init->Pull == GPIO_PULLUP) 8007598: 683b ldr r3, [r7, #0] 800759a: 689b ldr r3, [r3, #8] 800759c: 2b01 cmp r3, #1 800759e: d105 bne.n 80075ac config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80075a0: 2308 movs r3, #8 80075a2: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 80075a4: 687b ldr r3, [r7, #4] 80075a6: 69fa ldr r2, [r7, #28] 80075a8: 611a str r2, [r3, #16] break; 80075aa: e009 b.n 80075c0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80075ac: 2308 movs r3, #8 80075ae: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 80075b0: 687b ldr r3, [r7, #4] 80075b2: 69fa ldr r2, [r7, #28] 80075b4: 615a str r2, [r3, #20] break; 80075b6: e003 b.n 80075c0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80075b8: 2300 movs r3, #0 80075ba: 623b str r3, [r7, #32] break; 80075bc: e000 b.n 80075c0 break; 80075be: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80075c0: 69bb ldr r3, [r7, #24] 80075c2: 2bff cmp r3, #255 @ 0xff 80075c4: d801 bhi.n 80075ca 80075c6: 687b ldr r3, [r7, #4] 80075c8: e001 b.n 80075ce 80075ca: 687b ldr r3, [r7, #4] 80075cc: 3304 adds r3, #4 80075ce: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 80075d0: 69bb ldr r3, [r7, #24] 80075d2: 2bff cmp r3, #255 @ 0xff 80075d4: d802 bhi.n 80075dc 80075d6: 6a7b ldr r3, [r7, #36] @ 0x24 80075d8: 009b lsls r3, r3, #2 80075da: e002 b.n 80075e2 80075dc: 6a7b ldr r3, [r7, #36] @ 0x24 80075de: 3b08 subs r3, #8 80075e0: 009b lsls r3, r3, #2 80075e2: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80075e4: 697b ldr r3, [r7, #20] 80075e6: 681a ldr r2, [r3, #0] 80075e8: 210f movs r1, #15 80075ea: 693b ldr r3, [r7, #16] 80075ec: fa01 f303 lsl.w r3, r1, r3 80075f0: 43db mvns r3, r3 80075f2: 401a ands r2, r3 80075f4: 6a39 ldr r1, [r7, #32] 80075f6: 693b ldr r3, [r7, #16] 80075f8: fa01 f303 lsl.w r3, r1, r3 80075fc: 431a orrs r2, r3 80075fe: 697b ldr r3, [r7, #20] 8007600: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8007602: 683b ldr r3, [r7, #0] 8007604: 685b ldr r3, [r3, #4] 8007606: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800760a: 2b00 cmp r3, #0 800760c: f000 80b1 beq.w 8007772 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8007610: 4b4d ldr r3, [pc, #308] @ (8007748 ) 8007612: 699b ldr r3, [r3, #24] 8007614: 4a4c ldr r2, [pc, #304] @ (8007748 ) 8007616: f043 0301 orr.w r3, r3, #1 800761a: 6193 str r3, [r2, #24] 800761c: 4b4a ldr r3, [pc, #296] @ (8007748 ) 800761e: 699b ldr r3, [r3, #24] 8007620: f003 0301 and.w r3, r3, #1 8007624: 60bb str r3, [r7, #8] 8007626: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8007628: 4a48 ldr r2, [pc, #288] @ (800774c ) 800762a: 6a7b ldr r3, [r7, #36] @ 0x24 800762c: 089b lsrs r3, r3, #2 800762e: 3302 adds r3, #2 8007630: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8007634: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8007636: 6a7b ldr r3, [r7, #36] @ 0x24 8007638: f003 0303 and.w r3, r3, #3 800763c: 009b lsls r3, r3, #2 800763e: 220f movs r2, #15 8007640: fa02 f303 lsl.w r3, r2, r3 8007644: 43db mvns r3, r3 8007646: 68fa ldr r2, [r7, #12] 8007648: 4013 ands r3, r2 800764a: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 800764c: 687b ldr r3, [r7, #4] 800764e: 4a40 ldr r2, [pc, #256] @ (8007750 ) 8007650: 4293 cmp r3, r2 8007652: d013 beq.n 800767c 8007654: 687b ldr r3, [r7, #4] 8007656: 4a3f ldr r2, [pc, #252] @ (8007754 ) 8007658: 4293 cmp r3, r2 800765a: d00d beq.n 8007678 800765c: 687b ldr r3, [r7, #4] 800765e: 4a3e ldr r2, [pc, #248] @ (8007758 ) 8007660: 4293 cmp r3, r2 8007662: d007 beq.n 8007674 8007664: 687b ldr r3, [r7, #4] 8007666: 4a3d ldr r2, [pc, #244] @ (800775c ) 8007668: 4293 cmp r3, r2 800766a: d101 bne.n 8007670 800766c: 2303 movs r3, #3 800766e: e006 b.n 800767e 8007670: 2304 movs r3, #4 8007672: e004 b.n 800767e 8007674: 2302 movs r3, #2 8007676: e002 b.n 800767e 8007678: 2301 movs r3, #1 800767a: e000 b.n 800767e 800767c: 2300 movs r3, #0 800767e: 6a7a ldr r2, [r7, #36] @ 0x24 8007680: f002 0203 and.w r2, r2, #3 8007684: 0092 lsls r2, r2, #2 8007686: 4093 lsls r3, r2 8007688: 68fa ldr r2, [r7, #12] 800768a: 4313 orrs r3, r2 800768c: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 800768e: 492f ldr r1, [pc, #188] @ (800774c ) 8007690: 6a7b ldr r3, [r7, #36] @ 0x24 8007692: 089b lsrs r3, r3, #2 8007694: 3302 adds r3, #2 8007696: 68fa ldr r2, [r7, #12] 8007698: f841 2023 str.w r2, [r1, r3, lsl #2] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 800769c: 683b ldr r3, [r7, #0] 800769e: 685b ldr r3, [r3, #4] 80076a0: f403 3380 and.w r3, r3, #65536 @ 0x10000 80076a4: 2b00 cmp r3, #0 80076a6: d006 beq.n 80076b6 { SET_BIT(EXTI->IMR, iocurrent); 80076a8: 4b2d ldr r3, [pc, #180] @ (8007760 ) 80076aa: 681a ldr r2, [r3, #0] 80076ac: 492c ldr r1, [pc, #176] @ (8007760 ) 80076ae: 69bb ldr r3, [r7, #24] 80076b0: 4313 orrs r3, r2 80076b2: 600b str r3, [r1, #0] 80076b4: e006 b.n 80076c4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 80076b6: 4b2a ldr r3, [pc, #168] @ (8007760 ) 80076b8: 681a ldr r2, [r3, #0] 80076ba: 69bb ldr r3, [r7, #24] 80076bc: 43db mvns r3, r3 80076be: 4928 ldr r1, [pc, #160] @ (8007760 ) 80076c0: 4013 ands r3, r2 80076c2: 600b str r3, [r1, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 80076c4: 683b ldr r3, [r7, #0] 80076c6: 685b ldr r3, [r3, #4] 80076c8: f403 3300 and.w r3, r3, #131072 @ 0x20000 80076cc: 2b00 cmp r3, #0 80076ce: d006 beq.n 80076de { SET_BIT(EXTI->EMR, iocurrent); 80076d0: 4b23 ldr r3, [pc, #140] @ (8007760 ) 80076d2: 685a ldr r2, [r3, #4] 80076d4: 4922 ldr r1, [pc, #136] @ (8007760 ) 80076d6: 69bb ldr r3, [r7, #24] 80076d8: 4313 orrs r3, r2 80076da: 604b str r3, [r1, #4] 80076dc: e006 b.n 80076ec } else { CLEAR_BIT(EXTI->EMR, iocurrent); 80076de: 4b20 ldr r3, [pc, #128] @ (8007760 ) 80076e0: 685a ldr r2, [r3, #4] 80076e2: 69bb ldr r3, [r7, #24] 80076e4: 43db mvns r3, r3 80076e6: 491e ldr r1, [pc, #120] @ (8007760 ) 80076e8: 4013 ands r3, r2 80076ea: 604b str r3, [r1, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 80076ec: 683b ldr r3, [r7, #0] 80076ee: 685b ldr r3, [r3, #4] 80076f0: f403 1380 and.w r3, r3, #1048576 @ 0x100000 80076f4: 2b00 cmp r3, #0 80076f6: d006 beq.n 8007706 { SET_BIT(EXTI->RTSR, iocurrent); 80076f8: 4b19 ldr r3, [pc, #100] @ (8007760 ) 80076fa: 689a ldr r2, [r3, #8] 80076fc: 4918 ldr r1, [pc, #96] @ (8007760 ) 80076fe: 69bb ldr r3, [r7, #24] 8007700: 4313 orrs r3, r2 8007702: 608b str r3, [r1, #8] 8007704: e006 b.n 8007714 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8007706: 4b16 ldr r3, [pc, #88] @ (8007760 ) 8007708: 689a ldr r2, [r3, #8] 800770a: 69bb ldr r3, [r7, #24] 800770c: 43db mvns r3, r3 800770e: 4914 ldr r1, [pc, #80] @ (8007760 ) 8007710: 4013 ands r3, r2 8007712: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8007714: 683b ldr r3, [r7, #0] 8007716: 685b ldr r3, [r3, #4] 8007718: f403 1300 and.w r3, r3, #2097152 @ 0x200000 800771c: 2b00 cmp r3, #0 800771e: d021 beq.n 8007764 { SET_BIT(EXTI->FTSR, iocurrent); 8007720: 4b0f ldr r3, [pc, #60] @ (8007760 ) 8007722: 68da ldr r2, [r3, #12] 8007724: 490e ldr r1, [pc, #56] @ (8007760 ) 8007726: 69bb ldr r3, [r7, #24] 8007728: 4313 orrs r3, r2 800772a: 60cb str r3, [r1, #12] 800772c: e021 b.n 8007772 800772e: bf00 nop 8007730: 10320000 .word 0x10320000 8007734: 10310000 .word 0x10310000 8007738: 10220000 .word 0x10220000 800773c: 10210000 .word 0x10210000 8007740: 10120000 .word 0x10120000 8007744: 10110000 .word 0x10110000 8007748: 40021000 .word 0x40021000 800774c: 40010000 .word 0x40010000 8007750: 40010800 .word 0x40010800 8007754: 40010c00 .word 0x40010c00 8007758: 40011000 .word 0x40011000 800775c: 40011400 .word 0x40011400 8007760: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8007764: 4b0b ldr r3, [pc, #44] @ (8007794 ) 8007766: 68da ldr r2, [r3, #12] 8007768: 69bb ldr r3, [r7, #24] 800776a: 43db mvns r3, r3 800776c: 4909 ldr r1, [pc, #36] @ (8007794 ) 800776e: 4013 ands r3, r2 8007770: 60cb str r3, [r1, #12] } } } position++; 8007772: 6a7b ldr r3, [r7, #36] @ 0x24 8007774: 3301 adds r3, #1 8007776: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 8007778: 683b ldr r3, [r7, #0] 800777a: 681a ldr r2, [r3, #0] 800777c: 6a7b ldr r3, [r7, #36] @ 0x24 800777e: fa22 f303 lsr.w r3, r2, r3 8007782: 2b00 cmp r3, #0 8007784: f47f ae8e bne.w 80074a4 } } 8007788: bf00 nop 800778a: bf00 nop 800778c: 372c adds r7, #44 @ 0x2c 800778e: 46bd mov sp, r7 8007790: bc80 pop {r7} 8007792: 4770 bx lr 8007794: 40010400 .word 0x40010400 08007798 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8007798: b480 push {r7} 800779a: b085 sub sp, #20 800779c: af00 add r7, sp, #0 800779e: 6078 str r0, [r7, #4] 80077a0: 460b mov r3, r1 80077a2: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 80077a4: 687b ldr r3, [r7, #4] 80077a6: 689a ldr r2, [r3, #8] 80077a8: 887b ldrh r3, [r7, #2] 80077aa: 4013 ands r3, r2 80077ac: 2b00 cmp r3, #0 80077ae: d002 beq.n 80077b6 { bitstatus = GPIO_PIN_SET; 80077b0: 2301 movs r3, #1 80077b2: 73fb strb r3, [r7, #15] 80077b4: e001 b.n 80077ba } else { bitstatus = GPIO_PIN_RESET; 80077b6: 2300 movs r3, #0 80077b8: 73fb strb r3, [r7, #15] } return bitstatus; 80077ba: 7bfb ldrb r3, [r7, #15] } 80077bc: 4618 mov r0, r3 80077be: 3714 adds r7, #20 80077c0: 46bd mov sp, r7 80077c2: bc80 pop {r7} 80077c4: 4770 bx lr 080077c6 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 80077c6: b480 push {r7} 80077c8: b083 sub sp, #12 80077ca: af00 add r7, sp, #0 80077cc: 6078 str r0, [r7, #4] 80077ce: 460b mov r3, r1 80077d0: 807b strh r3, [r7, #2] 80077d2: 4613 mov r3, r2 80077d4: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80077d6: 787b ldrb r3, [r7, #1] 80077d8: 2b00 cmp r3, #0 80077da: d003 beq.n 80077e4 { GPIOx->BSRR = GPIO_Pin; 80077dc: 887a ldrh r2, [r7, #2] 80077de: 687b ldr r3, [r7, #4] 80077e0: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 80077e2: e003 b.n 80077ec GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 80077e4: 887b ldrh r3, [r7, #2] 80077e6: 041a lsls r2, r3, #16 80077e8: 687b ldr r3, [r7, #4] 80077ea: 611a str r2, [r3, #16] } 80077ec: bf00 nop 80077ee: 370c adds r7, #12 80077f0: 46bd mov sp, r7 80077f2: bc80 pop {r7} 80077f4: 4770 bx lr ... 080077f8 : * @note If the HSE divided by 128 is used as the RTC clock, the * Backup Domain Access should be kept enabled. * @retval None */ void HAL_PWR_EnableBkUpAccess(void) { 80077f8: b480 push {r7} 80077fa: af00 add r7, sp, #0 /* Enable access to RTC and backup registers */ *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; 80077fc: 4b03 ldr r3, [pc, #12] @ (800780c ) 80077fe: 2201 movs r2, #1 8007800: 601a str r2, [r3, #0] } 8007802: bf00 nop 8007804: 46bd mov sp, r7 8007806: bc80 pop {r7} 8007808: 4770 bx lr 800780a: bf00 nop 800780c: 420e0020 .word 0x420e0020 08007810 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8007810: b580 push {r7, lr} 8007812: b086 sub sp, #24 8007814: af00 add r7, sp, #0 8007816: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8007818: 687b ldr r3, [r7, #4] 800781a: 2b00 cmp r3, #0 800781c: d101 bne.n 8007822 { return HAL_ERROR; 800781e: 2301 movs r3, #1 8007820: e304 b.n 8007e2c /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8007822: 687b ldr r3, [r7, #4] 8007824: 681b ldr r3, [r3, #0] 8007826: f003 0301 and.w r3, r3, #1 800782a: 2b00 cmp r3, #0 800782c: f000 8087 beq.w 800793e { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8007830: 4b92 ldr r3, [pc, #584] @ (8007a7c ) 8007832: 685b ldr r3, [r3, #4] 8007834: f003 030c and.w r3, r3, #12 8007838: 2b04 cmp r3, #4 800783a: d00c beq.n 8007856 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 800783c: 4b8f ldr r3, [pc, #572] @ (8007a7c ) 800783e: 685b ldr r3, [r3, #4] 8007840: f003 030c and.w r3, r3, #12 8007844: 2b08 cmp r3, #8 8007846: d112 bne.n 800786e 8007848: 4b8c ldr r3, [pc, #560] @ (8007a7c ) 800784a: 685b ldr r3, [r3, #4] 800784c: f403 3380 and.w r3, r3, #65536 @ 0x10000 8007850: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8007854: d10b bne.n 800786e { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8007856: 4b89 ldr r3, [pc, #548] @ (8007a7c ) 8007858: 681b ldr r3, [r3, #0] 800785a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800785e: 2b00 cmp r3, #0 8007860: d06c beq.n 800793c 8007862: 687b ldr r3, [r7, #4] 8007864: 689b ldr r3, [r3, #8] 8007866: 2b00 cmp r3, #0 8007868: d168 bne.n 800793c { return HAL_ERROR; 800786a: 2301 movs r3, #1 800786c: e2de b.n 8007e2c } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800786e: 687b ldr r3, [r7, #4] 8007870: 689b ldr r3, [r3, #8] 8007872: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8007876: d106 bne.n 8007886 8007878: 4b80 ldr r3, [pc, #512] @ (8007a7c ) 800787a: 681b ldr r3, [r3, #0] 800787c: 4a7f ldr r2, [pc, #508] @ (8007a7c ) 800787e: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8007882: 6013 str r3, [r2, #0] 8007884: e02e b.n 80078e4 8007886: 687b ldr r3, [r7, #4] 8007888: 689b ldr r3, [r3, #8] 800788a: 2b00 cmp r3, #0 800788c: d10c bne.n 80078a8 800788e: 4b7b ldr r3, [pc, #492] @ (8007a7c ) 8007890: 681b ldr r3, [r3, #0] 8007892: 4a7a ldr r2, [pc, #488] @ (8007a7c ) 8007894: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8007898: 6013 str r3, [r2, #0] 800789a: 4b78 ldr r3, [pc, #480] @ (8007a7c ) 800789c: 681b ldr r3, [r3, #0] 800789e: 4a77 ldr r2, [pc, #476] @ (8007a7c ) 80078a0: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80078a4: 6013 str r3, [r2, #0] 80078a6: e01d b.n 80078e4 80078a8: 687b ldr r3, [r7, #4] 80078aa: 689b ldr r3, [r3, #8] 80078ac: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 80078b0: d10c bne.n 80078cc 80078b2: 4b72 ldr r3, [pc, #456] @ (8007a7c ) 80078b4: 681b ldr r3, [r3, #0] 80078b6: 4a71 ldr r2, [pc, #452] @ (8007a7c ) 80078b8: f443 2380 orr.w r3, r3, #262144 @ 0x40000 80078bc: 6013 str r3, [r2, #0] 80078be: 4b6f ldr r3, [pc, #444] @ (8007a7c ) 80078c0: 681b ldr r3, [r3, #0] 80078c2: 4a6e ldr r2, [pc, #440] @ (8007a7c ) 80078c4: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80078c8: 6013 str r3, [r2, #0] 80078ca: e00b b.n 80078e4 80078cc: 4b6b ldr r3, [pc, #428] @ (8007a7c ) 80078ce: 681b ldr r3, [r3, #0] 80078d0: 4a6a ldr r2, [pc, #424] @ (8007a7c ) 80078d2: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80078d6: 6013 str r3, [r2, #0] 80078d8: 4b68 ldr r3, [pc, #416] @ (8007a7c ) 80078da: 681b ldr r3, [r3, #0] 80078dc: 4a67 ldr r2, [pc, #412] @ (8007a7c ) 80078de: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80078e2: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 80078e4: 687b ldr r3, [r7, #4] 80078e6: 689b ldr r3, [r3, #8] 80078e8: 2b00 cmp r3, #0 80078ea: d013 beq.n 8007914 { /* Get Start Tick */ tickstart = HAL_GetTick(); 80078ec: f7fd ffa2 bl 8005834 80078f0: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80078f2: e008 b.n 8007906 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 80078f4: f7fd ff9e bl 8005834 80078f8: 4602 mov r2, r0 80078fa: 693b ldr r3, [r7, #16] 80078fc: 1ad3 subs r3, r2, r3 80078fe: 2b64 cmp r3, #100 @ 0x64 8007900: d901 bls.n 8007906 { return HAL_TIMEOUT; 8007902: 2303 movs r3, #3 8007904: e292 b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8007906: 4b5d ldr r3, [pc, #372] @ (8007a7c ) 8007908: 681b ldr r3, [r3, #0] 800790a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800790e: 2b00 cmp r3, #0 8007910: d0f0 beq.n 80078f4 8007912: e014 b.n 800793e } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8007914: f7fd ff8e bl 8005834 8007918: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800791a: e008 b.n 800792e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 800791c: f7fd ff8a bl 8005834 8007920: 4602 mov r2, r0 8007922: 693b ldr r3, [r7, #16] 8007924: 1ad3 subs r3, r2, r3 8007926: 2b64 cmp r3, #100 @ 0x64 8007928: d901 bls.n 800792e { return HAL_TIMEOUT; 800792a: 2303 movs r3, #3 800792c: e27e b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800792e: 4b53 ldr r3, [pc, #332] @ (8007a7c ) 8007930: 681b ldr r3, [r3, #0] 8007932: f403 3300 and.w r3, r3, #131072 @ 0x20000 8007936: 2b00 cmp r3, #0 8007938: d1f0 bne.n 800791c 800793a: e000 b.n 800793e if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 800793c: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 800793e: 687b ldr r3, [r7, #4] 8007940: 681b ldr r3, [r3, #0] 8007942: f003 0302 and.w r3, r3, #2 8007946: 2b00 cmp r3, #0 8007948: d063 beq.n 8007a12 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 800794a: 4b4c ldr r3, [pc, #304] @ (8007a7c ) 800794c: 685b ldr r3, [r3, #4] 800794e: f003 030c and.w r3, r3, #12 8007952: 2b00 cmp r3, #0 8007954: d00b beq.n 800796e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8007956: 4b49 ldr r3, [pc, #292] @ (8007a7c ) 8007958: 685b ldr r3, [r3, #4] 800795a: f003 030c and.w r3, r3, #12 800795e: 2b08 cmp r3, #8 8007960: d11c bne.n 800799c 8007962: 4b46 ldr r3, [pc, #280] @ (8007a7c ) 8007964: 685b ldr r3, [r3, #4] 8007966: f403 3380 and.w r3, r3, #65536 @ 0x10000 800796a: 2b00 cmp r3, #0 800796c: d116 bne.n 800799c { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800796e: 4b43 ldr r3, [pc, #268] @ (8007a7c ) 8007970: 681b ldr r3, [r3, #0] 8007972: f003 0302 and.w r3, r3, #2 8007976: 2b00 cmp r3, #0 8007978: d005 beq.n 8007986 800797a: 687b ldr r3, [r7, #4] 800797c: 695b ldr r3, [r3, #20] 800797e: 2b01 cmp r3, #1 8007980: d001 beq.n 8007986 { return HAL_ERROR; 8007982: 2301 movs r3, #1 8007984: e252 b.n 8007e2c } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8007986: 4b3d ldr r3, [pc, #244] @ (8007a7c ) 8007988: 681b ldr r3, [r3, #0] 800798a: f023 02f8 bic.w r2, r3, #248 @ 0xf8 800798e: 687b ldr r3, [r7, #4] 8007990: 699b ldr r3, [r3, #24] 8007992: 00db lsls r3, r3, #3 8007994: 4939 ldr r1, [pc, #228] @ (8007a7c ) 8007996: 4313 orrs r3, r2 8007998: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800799a: e03a b.n 8007a12 } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 800799c: 687b ldr r3, [r7, #4] 800799e: 695b ldr r3, [r3, #20] 80079a0: 2b00 cmp r3, #0 80079a2: d020 beq.n 80079e6 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 80079a4: 4b36 ldr r3, [pc, #216] @ (8007a80 ) 80079a6: 2201 movs r2, #1 80079a8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80079aa: f7fd ff43 bl 8005834 80079ae: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80079b0: e008 b.n 80079c4 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80079b2: f7fd ff3f bl 8005834 80079b6: 4602 mov r2, r0 80079b8: 693b ldr r3, [r7, #16] 80079ba: 1ad3 subs r3, r2, r3 80079bc: 2b02 cmp r3, #2 80079be: d901 bls.n 80079c4 { return HAL_TIMEOUT; 80079c0: 2303 movs r3, #3 80079c2: e233 b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80079c4: 4b2d ldr r3, [pc, #180] @ (8007a7c ) 80079c6: 681b ldr r3, [r3, #0] 80079c8: f003 0302 and.w r3, r3, #2 80079cc: 2b00 cmp r3, #0 80079ce: d0f0 beq.n 80079b2 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80079d0: 4b2a ldr r3, [pc, #168] @ (8007a7c ) 80079d2: 681b ldr r3, [r3, #0] 80079d4: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80079d8: 687b ldr r3, [r7, #4] 80079da: 699b ldr r3, [r3, #24] 80079dc: 00db lsls r3, r3, #3 80079de: 4927 ldr r1, [pc, #156] @ (8007a7c ) 80079e0: 4313 orrs r3, r2 80079e2: 600b str r3, [r1, #0] 80079e4: e015 b.n 8007a12 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 80079e6: 4b26 ldr r3, [pc, #152] @ (8007a80 ) 80079e8: 2200 movs r2, #0 80079ea: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80079ec: f7fd ff22 bl 8005834 80079f0: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80079f2: e008 b.n 8007a06 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80079f4: f7fd ff1e bl 8005834 80079f8: 4602 mov r2, r0 80079fa: 693b ldr r3, [r7, #16] 80079fc: 1ad3 subs r3, r2, r3 80079fe: 2b02 cmp r3, #2 8007a00: d901 bls.n 8007a06 { return HAL_TIMEOUT; 8007a02: 2303 movs r3, #3 8007a04: e212 b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8007a06: 4b1d ldr r3, [pc, #116] @ (8007a7c ) 8007a08: 681b ldr r3, [r3, #0] 8007a0a: f003 0302 and.w r3, r3, #2 8007a0e: 2b00 cmp r3, #0 8007a10: d1f0 bne.n 80079f4 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8007a12: 687b ldr r3, [r7, #4] 8007a14: 681b ldr r3, [r3, #0] 8007a16: f003 0308 and.w r3, r3, #8 8007a1a: 2b00 cmp r3, #0 8007a1c: d03a beq.n 8007a94 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8007a1e: 687b ldr r3, [r7, #4] 8007a20: 69db ldr r3, [r3, #28] 8007a22: 2b00 cmp r3, #0 8007a24: d019 beq.n 8007a5a { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8007a26: 4b17 ldr r3, [pc, #92] @ (8007a84 ) 8007a28: 2201 movs r2, #1 8007a2a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007a2c: f7fd ff02 bl 8005834 8007a30: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8007a32: e008 b.n 8007a46 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8007a34: f7fd fefe bl 8005834 8007a38: 4602 mov r2, r0 8007a3a: 693b ldr r3, [r7, #16] 8007a3c: 1ad3 subs r3, r2, r3 8007a3e: 2b02 cmp r3, #2 8007a40: d901 bls.n 8007a46 { return HAL_TIMEOUT; 8007a42: 2303 movs r3, #3 8007a44: e1f2 b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8007a46: 4b0d ldr r3, [pc, #52] @ (8007a7c ) 8007a48: 6a5b ldr r3, [r3, #36] @ 0x24 8007a4a: f003 0302 and.w r3, r3, #2 8007a4e: 2b00 cmp r3, #0 8007a50: d0f0 beq.n 8007a34 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 8007a52: 2001 movs r0, #1 8007a54: f000 fbec bl 8008230 8007a58: e01c b.n 8007a94 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8007a5a: 4b0a ldr r3, [pc, #40] @ (8007a84 ) 8007a5c: 2200 movs r2, #0 8007a5e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007a60: f7fd fee8 bl 8005834 8007a64: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8007a66: e00f b.n 8007a88 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8007a68: f7fd fee4 bl 8005834 8007a6c: 4602 mov r2, r0 8007a6e: 693b ldr r3, [r7, #16] 8007a70: 1ad3 subs r3, r2, r3 8007a72: 2b02 cmp r3, #2 8007a74: d908 bls.n 8007a88 { return HAL_TIMEOUT; 8007a76: 2303 movs r3, #3 8007a78: e1d8 b.n 8007e2c 8007a7a: bf00 nop 8007a7c: 40021000 .word 0x40021000 8007a80: 42420000 .word 0x42420000 8007a84: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8007a88: 4b9b ldr r3, [pc, #620] @ (8007cf8 ) 8007a8a: 6a5b ldr r3, [r3, #36] @ 0x24 8007a8c: f003 0302 and.w r3, r3, #2 8007a90: 2b00 cmp r3, #0 8007a92: d1e9 bne.n 8007a68 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8007a94: 687b ldr r3, [r7, #4] 8007a96: 681b ldr r3, [r3, #0] 8007a98: f003 0304 and.w r3, r3, #4 8007a9c: 2b00 cmp r3, #0 8007a9e: f000 80a6 beq.w 8007bee { FlagStatus pwrclkchanged = RESET; 8007aa2: 2300 movs r3, #0 8007aa4: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8007aa6: 4b94 ldr r3, [pc, #592] @ (8007cf8 ) 8007aa8: 69db ldr r3, [r3, #28] 8007aaa: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8007aae: 2b00 cmp r3, #0 8007ab0: d10d bne.n 8007ace { __HAL_RCC_PWR_CLK_ENABLE(); 8007ab2: 4b91 ldr r3, [pc, #580] @ (8007cf8 ) 8007ab4: 69db ldr r3, [r3, #28] 8007ab6: 4a90 ldr r2, [pc, #576] @ (8007cf8 ) 8007ab8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8007abc: 61d3 str r3, [r2, #28] 8007abe: 4b8e ldr r3, [pc, #568] @ (8007cf8 ) 8007ac0: 69db ldr r3, [r3, #28] 8007ac2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8007ac6: 60bb str r3, [r7, #8] 8007ac8: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8007aca: 2301 movs r3, #1 8007acc: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8007ace: 4b8b ldr r3, [pc, #556] @ (8007cfc ) 8007ad0: 681b ldr r3, [r3, #0] 8007ad2: f403 7380 and.w r3, r3, #256 @ 0x100 8007ad6: 2b00 cmp r3, #0 8007ad8: d118 bne.n 8007b0c { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8007ada: 4b88 ldr r3, [pc, #544] @ (8007cfc ) 8007adc: 681b ldr r3, [r3, #0] 8007ade: 4a87 ldr r2, [pc, #540] @ (8007cfc ) 8007ae0: f443 7380 orr.w r3, r3, #256 @ 0x100 8007ae4: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8007ae6: f7fd fea5 bl 8005834 8007aea: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8007aec: e008 b.n 8007b00 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8007aee: f7fd fea1 bl 8005834 8007af2: 4602 mov r2, r0 8007af4: 693b ldr r3, [r7, #16] 8007af6: 1ad3 subs r3, r2, r3 8007af8: 2b64 cmp r3, #100 @ 0x64 8007afa: d901 bls.n 8007b00 { return HAL_TIMEOUT; 8007afc: 2303 movs r3, #3 8007afe: e195 b.n 8007e2c while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8007b00: 4b7e ldr r3, [pc, #504] @ (8007cfc ) 8007b02: 681b ldr r3, [r3, #0] 8007b04: f403 7380 and.w r3, r3, #256 @ 0x100 8007b08: 2b00 cmp r3, #0 8007b0a: d0f0 beq.n 8007aee } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8007b0c: 687b ldr r3, [r7, #4] 8007b0e: 691b ldr r3, [r3, #16] 8007b10: 2b01 cmp r3, #1 8007b12: d106 bne.n 8007b22 8007b14: 4b78 ldr r3, [pc, #480] @ (8007cf8 ) 8007b16: 6a1b ldr r3, [r3, #32] 8007b18: 4a77 ldr r2, [pc, #476] @ (8007cf8 ) 8007b1a: f043 0301 orr.w r3, r3, #1 8007b1e: 6213 str r3, [r2, #32] 8007b20: e02d b.n 8007b7e 8007b22: 687b ldr r3, [r7, #4] 8007b24: 691b ldr r3, [r3, #16] 8007b26: 2b00 cmp r3, #0 8007b28: d10c bne.n 8007b44 8007b2a: 4b73 ldr r3, [pc, #460] @ (8007cf8 ) 8007b2c: 6a1b ldr r3, [r3, #32] 8007b2e: 4a72 ldr r2, [pc, #456] @ (8007cf8 ) 8007b30: f023 0301 bic.w r3, r3, #1 8007b34: 6213 str r3, [r2, #32] 8007b36: 4b70 ldr r3, [pc, #448] @ (8007cf8 ) 8007b38: 6a1b ldr r3, [r3, #32] 8007b3a: 4a6f ldr r2, [pc, #444] @ (8007cf8 ) 8007b3c: f023 0304 bic.w r3, r3, #4 8007b40: 6213 str r3, [r2, #32] 8007b42: e01c b.n 8007b7e 8007b44: 687b ldr r3, [r7, #4] 8007b46: 691b ldr r3, [r3, #16] 8007b48: 2b05 cmp r3, #5 8007b4a: d10c bne.n 8007b66 8007b4c: 4b6a ldr r3, [pc, #424] @ (8007cf8 ) 8007b4e: 6a1b ldr r3, [r3, #32] 8007b50: 4a69 ldr r2, [pc, #420] @ (8007cf8 ) 8007b52: f043 0304 orr.w r3, r3, #4 8007b56: 6213 str r3, [r2, #32] 8007b58: 4b67 ldr r3, [pc, #412] @ (8007cf8 ) 8007b5a: 6a1b ldr r3, [r3, #32] 8007b5c: 4a66 ldr r2, [pc, #408] @ (8007cf8 ) 8007b5e: f043 0301 orr.w r3, r3, #1 8007b62: 6213 str r3, [r2, #32] 8007b64: e00b b.n 8007b7e 8007b66: 4b64 ldr r3, [pc, #400] @ (8007cf8 ) 8007b68: 6a1b ldr r3, [r3, #32] 8007b6a: 4a63 ldr r2, [pc, #396] @ (8007cf8 ) 8007b6c: f023 0301 bic.w r3, r3, #1 8007b70: 6213 str r3, [r2, #32] 8007b72: 4b61 ldr r3, [pc, #388] @ (8007cf8 ) 8007b74: 6a1b ldr r3, [r3, #32] 8007b76: 4a60 ldr r2, [pc, #384] @ (8007cf8 ) 8007b78: f023 0304 bic.w r3, r3, #4 8007b7c: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 8007b7e: 687b ldr r3, [r7, #4] 8007b80: 691b ldr r3, [r3, #16] 8007b82: 2b00 cmp r3, #0 8007b84: d015 beq.n 8007bb2 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8007b86: f7fd fe55 bl 8005834 8007b8a: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8007b8c: e00a b.n 8007ba4 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8007b8e: f7fd fe51 bl 8005834 8007b92: 4602 mov r2, r0 8007b94: 693b ldr r3, [r7, #16] 8007b96: 1ad3 subs r3, r2, r3 8007b98: f241 3288 movw r2, #5000 @ 0x1388 8007b9c: 4293 cmp r3, r2 8007b9e: d901 bls.n 8007ba4 { return HAL_TIMEOUT; 8007ba0: 2303 movs r3, #3 8007ba2: e143 b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8007ba4: 4b54 ldr r3, [pc, #336] @ (8007cf8 ) 8007ba6: 6a1b ldr r3, [r3, #32] 8007ba8: f003 0302 and.w r3, r3, #2 8007bac: 2b00 cmp r3, #0 8007bae: d0ee beq.n 8007b8e 8007bb0: e014 b.n 8007bdc } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8007bb2: f7fd fe3f bl 8005834 8007bb6: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8007bb8: e00a b.n 8007bd0 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8007bba: f7fd fe3b bl 8005834 8007bbe: 4602 mov r2, r0 8007bc0: 693b ldr r3, [r7, #16] 8007bc2: 1ad3 subs r3, r2, r3 8007bc4: f241 3288 movw r2, #5000 @ 0x1388 8007bc8: 4293 cmp r3, r2 8007bca: d901 bls.n 8007bd0 { return HAL_TIMEOUT; 8007bcc: 2303 movs r3, #3 8007bce: e12d b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8007bd0: 4b49 ldr r3, [pc, #292] @ (8007cf8 ) 8007bd2: 6a1b ldr r3, [r3, #32] 8007bd4: f003 0302 and.w r3, r3, #2 8007bd8: 2b00 cmp r3, #0 8007bda: d1ee bne.n 8007bba } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8007bdc: 7dfb ldrb r3, [r7, #23] 8007bde: 2b01 cmp r3, #1 8007be0: d105 bne.n 8007bee { __HAL_RCC_PWR_CLK_DISABLE(); 8007be2: 4b45 ldr r3, [pc, #276] @ (8007cf8 ) 8007be4: 69db ldr r3, [r3, #28] 8007be6: 4a44 ldr r2, [pc, #272] @ (8007cf8 ) 8007be8: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8007bec: 61d3 str r3, [r2, #28] #if defined(RCC_CR_PLL2ON) /*-------------------------------- PLL2 Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL2(RCC_OscInitStruct->PLL2.PLL2State)); if ((RCC_OscInitStruct->PLL2.PLL2State) != RCC_PLL2_NONE) 8007bee: 687b ldr r3, [r7, #4] 8007bf0: 6adb ldr r3, [r3, #44] @ 0x2c 8007bf2: 2b00 cmp r3, #0 8007bf4: f000 808c beq.w 8007d10 { /* This bit can not be cleared if the PLL2 clock is used indirectly as system clock (i.e. it is used as PLL clock entry that is used as system clock). */ if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8007bf8: 4b3f ldr r3, [pc, #252] @ (8007cf8 ) 8007bfa: 685b ldr r3, [r3, #4] 8007bfc: f403 3380 and.w r3, r3, #65536 @ 0x10000 8007c00: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8007c04: d10e bne.n 8007c24 (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 8007c06: 4b3c ldr r3, [pc, #240] @ (8007cf8 ) 8007c08: 685b ldr r3, [r3, #4] 8007c0a: f003 030c and.w r3, r3, #12 if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8007c0e: 2b08 cmp r3, #8 8007c10: d108 bne.n 8007c24 ((READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) == RCC_CFGR2_PREDIV1SRC_PLL2)) 8007c12: 4b39 ldr r3, [pc, #228] @ (8007cf8 ) 8007c14: 6adb ldr r3, [r3, #44] @ 0x2c 8007c16: f403 3380 and.w r3, r3, #65536 @ 0x10000 (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 8007c1a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8007c1e: d101 bne.n 8007c24 { return HAL_ERROR; 8007c20: 2301 movs r3, #1 8007c22: e103 b.n 8007e2c } else { if ((RCC_OscInitStruct->PLL2.PLL2State) == RCC_PLL2_ON) 8007c24: 687b ldr r3, [r7, #4] 8007c26: 6adb ldr r3, [r3, #44] @ 0x2c 8007c28: 2b02 cmp r3, #2 8007c2a: d14e bne.n 8007cca assert_param(IS_RCC_PLL2_MUL(RCC_OscInitStruct->PLL2.PLL2MUL)); assert_param(IS_RCC_HSE_PREDIV2(RCC_OscInitStruct->PLL2.HSEPrediv2Value)); /* Prediv2 can be written only when the PLLI2S is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 8007c2c: 4b32 ldr r3, [pc, #200] @ (8007cf8 ) 8007c2e: 681b ldr r3, [r3, #0] 8007c30: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8007c34: 2b00 cmp r3, #0 8007c36: d009 beq.n 8007c4c (__HAL_RCC_HSE_GET_PREDIV2() != RCC_OscInitStruct->PLL2.HSEPrediv2Value)) 8007c38: 4b2f ldr r3, [pc, #188] @ (8007cf8 ) 8007c3a: 6adb ldr r3, [r3, #44] @ 0x2c 8007c3c: f003 02f0 and.w r2, r3, #240 @ 0xf0 8007c40: 687b ldr r3, [r7, #4] 8007c42: 6b5b ldr r3, [r3, #52] @ 0x34 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 8007c44: 429a cmp r2, r3 8007c46: d001 beq.n 8007c4c { return HAL_ERROR; 8007c48: 2301 movs r3, #1 8007c4a: e0ef b.n 8007e2c } /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 8007c4c: 4b2c ldr r3, [pc, #176] @ (8007d00 ) 8007c4e: 2200 movs r2, #0 8007c50: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007c52: f7fd fdef bl 8005834 8007c56: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8007c58: e008 b.n 8007c6c { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8007c5a: f7fd fdeb bl 8005834 8007c5e: 4602 mov r2, r0 8007c60: 693b ldr r3, [r7, #16] 8007c62: 1ad3 subs r3, r2, r3 8007c64: 2b64 cmp r3, #100 @ 0x64 8007c66: d901 bls.n 8007c6c { return HAL_TIMEOUT; 8007c68: 2303 movs r3, #3 8007c6a: e0df b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8007c6c: 4b22 ldr r3, [pc, #136] @ (8007cf8 ) 8007c6e: 681b ldr r3, [r3, #0] 8007c70: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8007c74: 2b00 cmp r3, #0 8007c76: d1f0 bne.n 8007c5a } } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(RCC_OscInitStruct->PLL2.HSEPrediv2Value); 8007c78: 4b1f ldr r3, [pc, #124] @ (8007cf8 ) 8007c7a: 6adb ldr r3, [r3, #44] @ 0x2c 8007c7c: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8007c80: 687b ldr r3, [r7, #4] 8007c82: 6b5b ldr r3, [r3, #52] @ 0x34 8007c84: 491c ldr r1, [pc, #112] @ (8007cf8 ) 8007c86: 4313 orrs r3, r2 8007c88: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLL2 multiplication factors. */ __HAL_RCC_PLL2_CONFIG(RCC_OscInitStruct->PLL2.PLL2MUL); 8007c8a: 4b1b ldr r3, [pc, #108] @ (8007cf8 ) 8007c8c: 6adb ldr r3, [r3, #44] @ 0x2c 8007c8e: f423 6270 bic.w r2, r3, #3840 @ 0xf00 8007c92: 687b ldr r3, [r7, #4] 8007c94: 6b1b ldr r3, [r3, #48] @ 0x30 8007c96: 4918 ldr r1, [pc, #96] @ (8007cf8 ) 8007c98: 4313 orrs r3, r2 8007c9a: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLL2. */ __HAL_RCC_PLL2_ENABLE(); 8007c9c: 4b18 ldr r3, [pc, #96] @ (8007d00 ) 8007c9e: 2201 movs r2, #1 8007ca0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007ca2: f7fd fdc7 bl 8005834 8007ca6: 6138 str r0, [r7, #16] /* Wait till PLL2 is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 8007ca8: e008 b.n 8007cbc { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8007caa: f7fd fdc3 bl 8005834 8007cae: 4602 mov r2, r0 8007cb0: 693b ldr r3, [r7, #16] 8007cb2: 1ad3 subs r3, r2, r3 8007cb4: 2b64 cmp r3, #100 @ 0x64 8007cb6: d901 bls.n 8007cbc { return HAL_TIMEOUT; 8007cb8: 2303 movs r3, #3 8007cba: e0b7 b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 8007cbc: 4b0e ldr r3, [pc, #56] @ (8007cf8 ) 8007cbe: 681b ldr r3, [r3, #0] 8007cc0: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8007cc4: 2b00 cmp r3, #0 8007cc6: d0f0 beq.n 8007caa 8007cc8: e022 b.n 8007d10 } } else { /* Set PREDIV1 source to HSE */ CLEAR_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC); 8007cca: 4b0b ldr r3, [pc, #44] @ (8007cf8 ) 8007ccc: 6adb ldr r3, [r3, #44] @ 0x2c 8007cce: 4a0a ldr r2, [pc, #40] @ (8007cf8 ) 8007cd0: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8007cd4: 62d3 str r3, [r2, #44] @ 0x2c /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 8007cd6: 4b0a ldr r3, [pc, #40] @ (8007d00 ) 8007cd8: 2200 movs r2, #0 8007cda: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007cdc: f7fd fdaa bl 8005834 8007ce0: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8007ce2: e00f b.n 8007d04 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8007ce4: f7fd fda6 bl 8005834 8007ce8: 4602 mov r2, r0 8007cea: 693b ldr r3, [r7, #16] 8007cec: 1ad3 subs r3, r2, r3 8007cee: 2b64 cmp r3, #100 @ 0x64 8007cf0: d908 bls.n 8007d04 { return HAL_TIMEOUT; 8007cf2: 2303 movs r3, #3 8007cf4: e09a b.n 8007e2c 8007cf6: bf00 nop 8007cf8: 40021000 .word 0x40021000 8007cfc: 40007000 .word 0x40007000 8007d00: 42420068 .word 0x42420068 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8007d04: 4b4b ldr r3, [pc, #300] @ (8007e34 ) 8007d06: 681b ldr r3, [r3, #0] 8007d08: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8007d0c: 2b00 cmp r3, #0 8007d0e: d1e9 bne.n 8007ce4 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8007d10: 687b ldr r3, [r7, #4] 8007d12: 6a1b ldr r3, [r3, #32] 8007d14: 2b00 cmp r3, #0 8007d16: f000 8088 beq.w 8007e2a { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8007d1a: 4b46 ldr r3, [pc, #280] @ (8007e34 ) 8007d1c: 685b ldr r3, [r3, #4] 8007d1e: f003 030c and.w r3, r3, #12 8007d22: 2b08 cmp r3, #8 8007d24: d068 beq.n 8007df8 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8007d26: 687b ldr r3, [r7, #4] 8007d28: 6a1b ldr r3, [r3, #32] 8007d2a: 2b02 cmp r3, #2 8007d2c: d14d bne.n 8007dca /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8007d2e: 4b42 ldr r3, [pc, #264] @ (8007e38 ) 8007d30: 2200 movs r2, #0 8007d32: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007d34: f7fd fd7e bl 8005834 8007d38: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8007d3a: e008 b.n 8007d4e { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8007d3c: f7fd fd7a bl 8005834 8007d40: 4602 mov r2, r0 8007d42: 693b ldr r3, [r7, #16] 8007d44: 1ad3 subs r3, r2, r3 8007d46: 2b02 cmp r3, #2 8007d48: d901 bls.n 8007d4e { return HAL_TIMEOUT; 8007d4a: 2303 movs r3, #3 8007d4c: e06e b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8007d4e: 4b39 ldr r3, [pc, #228] @ (8007e34 ) 8007d50: 681b ldr r3, [r3, #0] 8007d52: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8007d56: 2b00 cmp r3, #0 8007d58: d1f0 bne.n 8007d3c } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8007d5a: 687b ldr r3, [r7, #4] 8007d5c: 6a5b ldr r3, [r3, #36] @ 0x24 8007d5e: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8007d62: d10f bne.n 8007d84 assert_param(IS_RCC_HSE_PREDIV(RCC_OscInitStruct->HSEPredivValue)); #if defined(RCC_CFGR2_PREDIV1SRC) assert_param(IS_RCC_PREDIV1_SOURCE(RCC_OscInitStruct->Prediv1Source)); /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); 8007d64: 4b33 ldr r3, [pc, #204] @ (8007e34 ) 8007d66: 6ada ldr r2, [r3, #44] @ 0x2c 8007d68: 687b ldr r3, [r7, #4] 8007d6a: 685b ldr r3, [r3, #4] 8007d6c: 4931 ldr r1, [pc, #196] @ (8007e34 ) 8007d6e: 4313 orrs r3, r2 8007d70: 62cb str r3, [r1, #44] @ 0x2c #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8007d72: 4b30 ldr r3, [pc, #192] @ (8007e34 ) 8007d74: 6adb ldr r3, [r3, #44] @ 0x2c 8007d76: f023 020f bic.w r2, r3, #15 8007d7a: 687b ldr r3, [r7, #4] 8007d7c: 68db ldr r3, [r3, #12] 8007d7e: 492d ldr r1, [pc, #180] @ (8007e34 ) 8007d80: 4313 orrs r3, r2 8007d82: 62cb str r3, [r1, #44] @ 0x2c } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8007d84: 4b2b ldr r3, [pc, #172] @ (8007e34 ) 8007d86: 685b ldr r3, [r3, #4] 8007d88: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 8007d8c: 687b ldr r3, [r7, #4] 8007d8e: 6a59 ldr r1, [r3, #36] @ 0x24 8007d90: 687b ldr r3, [r7, #4] 8007d92: 6a9b ldr r3, [r3, #40] @ 0x28 8007d94: 430b orrs r3, r1 8007d96: 4927 ldr r1, [pc, #156] @ (8007e34 ) 8007d98: 4313 orrs r3, r2 8007d9a: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8007d9c: 4b26 ldr r3, [pc, #152] @ (8007e38 ) 8007d9e: 2201 movs r2, #1 8007da0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007da2: f7fd fd47 bl 8005834 8007da6: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8007da8: e008 b.n 8007dbc { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8007daa: f7fd fd43 bl 8005834 8007dae: 4602 mov r2, r0 8007db0: 693b ldr r3, [r7, #16] 8007db2: 1ad3 subs r3, r2, r3 8007db4: 2b02 cmp r3, #2 8007db6: d901 bls.n 8007dbc { return HAL_TIMEOUT; 8007db8: 2303 movs r3, #3 8007dba: e037 b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8007dbc: 4b1d ldr r3, [pc, #116] @ (8007e34 ) 8007dbe: 681b ldr r3, [r3, #0] 8007dc0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8007dc4: 2b00 cmp r3, #0 8007dc6: d0f0 beq.n 8007daa 8007dc8: e02f b.n 8007e2a } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8007dca: 4b1b ldr r3, [pc, #108] @ (8007e38 ) 8007dcc: 2200 movs r2, #0 8007dce: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007dd0: f7fd fd30 bl 8005834 8007dd4: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8007dd6: e008 b.n 8007dea { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8007dd8: f7fd fd2c bl 8005834 8007ddc: 4602 mov r2, r0 8007dde: 693b ldr r3, [r7, #16] 8007de0: 1ad3 subs r3, r2, r3 8007de2: 2b02 cmp r3, #2 8007de4: d901 bls.n 8007dea { return HAL_TIMEOUT; 8007de6: 2303 movs r3, #3 8007de8: e020 b.n 8007e2c while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8007dea: 4b12 ldr r3, [pc, #72] @ (8007e34 ) 8007dec: 681b ldr r3, [r3, #0] 8007dee: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8007df2: 2b00 cmp r3, #0 8007df4: d1f0 bne.n 8007dd8 8007df6: e018 b.n 8007e2a } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8007df8: 687b ldr r3, [r7, #4] 8007dfa: 6a1b ldr r3, [r3, #32] 8007dfc: 2b01 cmp r3, #1 8007dfe: d101 bne.n 8007e04 { return HAL_ERROR; 8007e00: 2301 movs r3, #1 8007e02: e013 b.n 8007e2c } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 8007e04: 4b0b ldr r3, [pc, #44] @ (8007e34 ) 8007e06: 685b ldr r3, [r3, #4] 8007e08: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8007e0a: 68fb ldr r3, [r7, #12] 8007e0c: f403 3280 and.w r2, r3, #65536 @ 0x10000 8007e10: 687b ldr r3, [r7, #4] 8007e12: 6a5b ldr r3, [r3, #36] @ 0x24 8007e14: 429a cmp r2, r3 8007e16: d106 bne.n 8007e26 (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8007e18: 68fb ldr r3, [r7, #12] 8007e1a: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 8007e1e: 687b ldr r3, [r7, #4] 8007e20: 6a9b ldr r3, [r3, #40] @ 0x28 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8007e22: 429a cmp r2, r3 8007e24: d001 beq.n 8007e2a { return HAL_ERROR; 8007e26: 2301 movs r3, #1 8007e28: e000 b.n 8007e2c } } } } return HAL_OK; 8007e2a: 2300 movs r3, #0 } 8007e2c: 4618 mov r0, r3 8007e2e: 3718 adds r7, #24 8007e30: 46bd mov sp, r7 8007e32: bd80 pop {r7, pc} 8007e34: 40021000 .word 0x40021000 8007e38: 42420060 .word 0x42420060 08007e3c : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8007e3c: b580 push {r7, lr} 8007e3e: b084 sub sp, #16 8007e40: af00 add r7, sp, #0 8007e42: 6078 str r0, [r7, #4] 8007e44: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 8007e46: 687b ldr r3, [r7, #4] 8007e48: 2b00 cmp r3, #0 8007e4a: d101 bne.n 8007e50 { return HAL_ERROR; 8007e4c: 2301 movs r3, #1 8007e4e: e0d0 b.n 8007ff2 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8007e50: 4b6a ldr r3, [pc, #424] @ (8007ffc ) 8007e52: 681b ldr r3, [r3, #0] 8007e54: f003 0307 and.w r3, r3, #7 8007e58: 683a ldr r2, [r7, #0] 8007e5a: 429a cmp r2, r3 8007e5c: d910 bls.n 8007e80 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8007e5e: 4b67 ldr r3, [pc, #412] @ (8007ffc ) 8007e60: 681b ldr r3, [r3, #0] 8007e62: f023 0207 bic.w r2, r3, #7 8007e66: 4965 ldr r1, [pc, #404] @ (8007ffc ) 8007e68: 683b ldr r3, [r7, #0] 8007e6a: 4313 orrs r3, r2 8007e6c: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8007e6e: 4b63 ldr r3, [pc, #396] @ (8007ffc ) 8007e70: 681b ldr r3, [r3, #0] 8007e72: f003 0307 and.w r3, r3, #7 8007e76: 683a ldr r2, [r7, #0] 8007e78: 429a cmp r2, r3 8007e7a: d001 beq.n 8007e80 { return HAL_ERROR; 8007e7c: 2301 movs r3, #1 8007e7e: e0b8 b.n 8007ff2 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8007e80: 687b ldr r3, [r7, #4] 8007e82: 681b ldr r3, [r3, #0] 8007e84: f003 0302 and.w r3, r3, #2 8007e88: 2b00 cmp r3, #0 8007e8a: d020 beq.n 8007ece { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8007e8c: 687b ldr r3, [r7, #4] 8007e8e: 681b ldr r3, [r3, #0] 8007e90: f003 0304 and.w r3, r3, #4 8007e94: 2b00 cmp r3, #0 8007e96: d005 beq.n 8007ea4 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8007e98: 4b59 ldr r3, [pc, #356] @ (8008000 ) 8007e9a: 685b ldr r3, [r3, #4] 8007e9c: 4a58 ldr r2, [pc, #352] @ (8008000 ) 8007e9e: f443 63e0 orr.w r3, r3, #1792 @ 0x700 8007ea2: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8007ea4: 687b ldr r3, [r7, #4] 8007ea6: 681b ldr r3, [r3, #0] 8007ea8: f003 0308 and.w r3, r3, #8 8007eac: 2b00 cmp r3, #0 8007eae: d005 beq.n 8007ebc { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8007eb0: 4b53 ldr r3, [pc, #332] @ (8008000 ) 8007eb2: 685b ldr r3, [r3, #4] 8007eb4: 4a52 ldr r2, [pc, #328] @ (8008000 ) 8007eb6: f443 5360 orr.w r3, r3, #14336 @ 0x3800 8007eba: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8007ebc: 4b50 ldr r3, [pc, #320] @ (8008000 ) 8007ebe: 685b ldr r3, [r3, #4] 8007ec0: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8007ec4: 687b ldr r3, [r7, #4] 8007ec6: 689b ldr r3, [r3, #8] 8007ec8: 494d ldr r1, [pc, #308] @ (8008000 ) 8007eca: 4313 orrs r3, r2 8007ecc: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8007ece: 687b ldr r3, [r7, #4] 8007ed0: 681b ldr r3, [r3, #0] 8007ed2: f003 0301 and.w r3, r3, #1 8007ed6: 2b00 cmp r3, #0 8007ed8: d040 beq.n 8007f5c { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8007eda: 687b ldr r3, [r7, #4] 8007edc: 685b ldr r3, [r3, #4] 8007ede: 2b01 cmp r3, #1 8007ee0: d107 bne.n 8007ef2 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8007ee2: 4b47 ldr r3, [pc, #284] @ (8008000 ) 8007ee4: 681b ldr r3, [r3, #0] 8007ee6: f403 3300 and.w r3, r3, #131072 @ 0x20000 8007eea: 2b00 cmp r3, #0 8007eec: d115 bne.n 8007f1a { return HAL_ERROR; 8007eee: 2301 movs r3, #1 8007ef0: e07f b.n 8007ff2 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8007ef2: 687b ldr r3, [r7, #4] 8007ef4: 685b ldr r3, [r3, #4] 8007ef6: 2b02 cmp r3, #2 8007ef8: d107 bne.n 8007f0a { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8007efa: 4b41 ldr r3, [pc, #260] @ (8008000 ) 8007efc: 681b ldr r3, [r3, #0] 8007efe: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8007f02: 2b00 cmp r3, #0 8007f04: d109 bne.n 8007f1a { return HAL_ERROR; 8007f06: 2301 movs r3, #1 8007f08: e073 b.n 8007ff2 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8007f0a: 4b3d ldr r3, [pc, #244] @ (8008000 ) 8007f0c: 681b ldr r3, [r3, #0] 8007f0e: f003 0302 and.w r3, r3, #2 8007f12: 2b00 cmp r3, #0 8007f14: d101 bne.n 8007f1a { return HAL_ERROR; 8007f16: 2301 movs r3, #1 8007f18: e06b b.n 8007ff2 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8007f1a: 4b39 ldr r3, [pc, #228] @ (8008000 ) 8007f1c: 685b ldr r3, [r3, #4] 8007f1e: f023 0203 bic.w r2, r3, #3 8007f22: 687b ldr r3, [r7, #4] 8007f24: 685b ldr r3, [r3, #4] 8007f26: 4936 ldr r1, [pc, #216] @ (8008000 ) 8007f28: 4313 orrs r3, r2 8007f2a: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007f2c: f7fd fc82 bl 8005834 8007f30: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8007f32: e00a b.n 8007f4a { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8007f34: f7fd fc7e bl 8005834 8007f38: 4602 mov r2, r0 8007f3a: 68fb ldr r3, [r7, #12] 8007f3c: 1ad3 subs r3, r2, r3 8007f3e: f241 3288 movw r2, #5000 @ 0x1388 8007f42: 4293 cmp r3, r2 8007f44: d901 bls.n 8007f4a { return HAL_TIMEOUT; 8007f46: 2303 movs r3, #3 8007f48: e053 b.n 8007ff2 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8007f4a: 4b2d ldr r3, [pc, #180] @ (8008000 ) 8007f4c: 685b ldr r3, [r3, #4] 8007f4e: f003 020c and.w r2, r3, #12 8007f52: 687b ldr r3, [r7, #4] 8007f54: 685b ldr r3, [r3, #4] 8007f56: 009b lsls r3, r3, #2 8007f58: 429a cmp r2, r3 8007f5a: d1eb bne.n 8007f34 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 8007f5c: 4b27 ldr r3, [pc, #156] @ (8007ffc ) 8007f5e: 681b ldr r3, [r3, #0] 8007f60: f003 0307 and.w r3, r3, #7 8007f64: 683a ldr r2, [r7, #0] 8007f66: 429a cmp r2, r3 8007f68: d210 bcs.n 8007f8c { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8007f6a: 4b24 ldr r3, [pc, #144] @ (8007ffc ) 8007f6c: 681b ldr r3, [r3, #0] 8007f6e: f023 0207 bic.w r2, r3, #7 8007f72: 4922 ldr r1, [pc, #136] @ (8007ffc ) 8007f74: 683b ldr r3, [r7, #0] 8007f76: 4313 orrs r3, r2 8007f78: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8007f7a: 4b20 ldr r3, [pc, #128] @ (8007ffc ) 8007f7c: 681b ldr r3, [r3, #0] 8007f7e: f003 0307 and.w r3, r3, #7 8007f82: 683a ldr r2, [r7, #0] 8007f84: 429a cmp r2, r3 8007f86: d001 beq.n 8007f8c { return HAL_ERROR; 8007f88: 2301 movs r3, #1 8007f8a: e032 b.n 8007ff2 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8007f8c: 687b ldr r3, [r7, #4] 8007f8e: 681b ldr r3, [r3, #0] 8007f90: f003 0304 and.w r3, r3, #4 8007f94: 2b00 cmp r3, #0 8007f96: d008 beq.n 8007faa { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8007f98: 4b19 ldr r3, [pc, #100] @ (8008000 ) 8007f9a: 685b ldr r3, [r3, #4] 8007f9c: f423 62e0 bic.w r2, r3, #1792 @ 0x700 8007fa0: 687b ldr r3, [r7, #4] 8007fa2: 68db ldr r3, [r3, #12] 8007fa4: 4916 ldr r1, [pc, #88] @ (8008000 ) 8007fa6: 4313 orrs r3, r2 8007fa8: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8007faa: 687b ldr r3, [r7, #4] 8007fac: 681b ldr r3, [r3, #0] 8007fae: f003 0308 and.w r3, r3, #8 8007fb2: 2b00 cmp r3, #0 8007fb4: d009 beq.n 8007fca { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8007fb6: 4b12 ldr r3, [pc, #72] @ (8008000 ) 8007fb8: 685b ldr r3, [r3, #4] 8007fba: f423 5260 bic.w r2, r3, #14336 @ 0x3800 8007fbe: 687b ldr r3, [r7, #4] 8007fc0: 691b ldr r3, [r3, #16] 8007fc2: 00db lsls r3, r3, #3 8007fc4: 490e ldr r1, [pc, #56] @ (8008000 ) 8007fc6: 4313 orrs r3, r2 8007fc8: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 8007fca: f000 f821 bl 8008010 8007fce: 4602 mov r2, r0 8007fd0: 4b0b ldr r3, [pc, #44] @ (8008000 ) 8007fd2: 685b ldr r3, [r3, #4] 8007fd4: 091b lsrs r3, r3, #4 8007fd6: f003 030f and.w r3, r3, #15 8007fda: 490a ldr r1, [pc, #40] @ (8008004 ) 8007fdc: 5ccb ldrb r3, [r1, r3] 8007fde: fa22 f303 lsr.w r3, r2, r3 8007fe2: 4a09 ldr r2, [pc, #36] @ (8008008 ) 8007fe4: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 8007fe6: 4b09 ldr r3, [pc, #36] @ (800800c ) 8007fe8: 681b ldr r3, [r3, #0] 8007fea: 4618 mov r0, r3 8007fec: f7fd fbe0 bl 80057b0 return HAL_OK; 8007ff0: 2300 movs r3, #0 } 8007ff2: 4618 mov r0, r3 8007ff4: 3710 adds r7, #16 8007ff6: 46bd mov sp, r7 8007ff8: bd80 pop {r7, pc} 8007ffa: bf00 nop 8007ffc: 40022000 .word 0x40022000 8008000: 40021000 .word 0x40021000 8008004: 0800dfec .word 0x0800dfec 8008008: 20000008 .word 0x20000008 800800c: 2000000c .word 0x2000000c 08008010 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 8008010: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008014: b099 sub sp, #100 @ 0x64 8008016: af00 add r7, sp, #0 #if defined(RCC_CFGR2_PREDIV1SRC) const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; 8008018: 4b66 ldr r3, [pc, #408] @ (80081b4 ) 800801a: f107 0434 add.w r4, r7, #52 @ 0x34 800801e: cb0f ldmia r3, {r0, r1, r2, r3} 8008020: c407 stmia r4!, {r0, r1, r2} 8008022: 8023 strh r3, [r4, #0] const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; 8008024: 4b64 ldr r3, [pc, #400] @ (80081b8 ) 8008026: f107 0424 add.w r4, r7, #36 @ 0x24 800802a: cb0f ldmia r3, {r0, r1, r2, r3} 800802c: e884 000f stmia.w r4, {r0, r1, r2, r3} #else const uint8_t aPredivFactorTable[2] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 8008030: 2300 movs r3, #0 8008032: 657b str r3, [r7, #84] @ 0x54 8008034: 2300 movs r3, #0 8008036: 653b str r3, [r7, #80] @ 0x50 8008038: 2300 movs r3, #0 800803a: 65fb str r3, [r7, #92] @ 0x5c 800803c: 2300 movs r3, #0 800803e: 64fb str r3, [r7, #76] @ 0x4c uint32_t sysclockfreq = 0U; 8008040: 2300 movs r3, #0 8008042: 65bb str r3, [r7, #88] @ 0x58 #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; 8008044: 2300 movs r3, #0 8008046: 64bb str r3, [r7, #72] @ 0x48 8008048: 2300 movs r3, #0 800804a: 647b str r3, [r7, #68] @ 0x44 #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 800804c: 4b5b ldr r3, [pc, #364] @ (80081bc ) 800804e: 685b ldr r3, [r3, #4] 8008050: 657b str r3, [r7, #84] @ 0x54 /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 8008052: 6d7b ldr r3, [r7, #84] @ 0x54 8008054: f003 030c and.w r3, r3, #12 8008058: 2b04 cmp r3, #4 800805a: d002 beq.n 8008062 800805c: 2b08 cmp r3, #8 800805e: d003 beq.n 8008068 8008060: e09f b.n 80081a2 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 8008062: 4b57 ldr r3, [pc, #348] @ (80081c0 ) 8008064: 65bb str r3, [r7, #88] @ 0x58 break; 8008066: e09f b.n 80081a8 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8008068: 6d7b ldr r3, [r7, #84] @ 0x54 800806a: 0c9b lsrs r3, r3, #18 800806c: f003 030f and.w r3, r3, #15 8008070: 3340 adds r3, #64 @ 0x40 8008072: f107 0220 add.w r2, r7, #32 8008076: 4413 add r3, r2 8008078: f813 3c2c ldrb.w r3, [r3, #-44] 800807c: 64fb str r3, [r7, #76] @ 0x4c if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 800807e: 6d7b ldr r3, [r7, #84] @ 0x54 8008080: f403 3380 and.w r3, r3, #65536 @ 0x10000 8008084: 2b00 cmp r3, #0 8008086: f000 8084 beq.w 8008192 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 800808a: 4b4c ldr r3, [pc, #304] @ (80081bc ) 800808c: 6adb ldr r3, [r3, #44] @ 0x2c 800808e: f003 030f and.w r3, r3, #15 8008092: 3340 adds r3, #64 @ 0x40 8008094: f107 0220 add.w r2, r7, #32 8008098: 4413 add r3, r2 800809a: f813 3c3c ldrb.w r3, [r3, #-60] 800809e: 653b str r3, [r7, #80] @ 0x50 #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /*RCC_CFGR2_PREDIV1*/ #if defined(RCC_CFGR2_PREDIV1SRC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 80080a0: 4b46 ldr r3, [pc, #280] @ (80081bc ) 80080a2: 6adb ldr r3, [r3, #44] @ 0x2c 80080a4: f403 3380 and.w r3, r3, #65536 @ 0x10000 80080a8: 2b00 cmp r3, #0 80080aa: d060 beq.n 800816e { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 80080ac: 4b43 ldr r3, [pc, #268] @ (80081bc ) 80080ae: 6adb ldr r3, [r3, #44] @ 0x2c 80080b0: 091b lsrs r3, r3, #4 80080b2: f003 030f and.w r3, r3, #15 80080b6: 3301 adds r3, #1 80080b8: 64bb str r3, [r7, #72] @ 0x48 pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 80080ba: 4b40 ldr r3, [pc, #256] @ (80081bc ) 80080bc: 6adb ldr r3, [r3, #44] @ 0x2c 80080be: 0a1b lsrs r3, r3, #8 80080c0: f003 030f and.w r3, r3, #15 80080c4: 3302 adds r3, #2 80080c6: 647b str r3, [r7, #68] @ 0x44 pllclk = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pll2mul * (uint64_t)pllmul) / ((uint64_t)prediv2 * (uint64_t)prediv)); 80080c8: 6c7b ldr r3, [r7, #68] @ 0x44 80080ca: 2200 movs r2, #0 80080cc: 613b str r3, [r7, #16] 80080ce: 617a str r2, [r7, #20] 80080d0: 6cfb ldr r3, [r7, #76] @ 0x4c 80080d2: 2200 movs r2, #0 80080d4: 61bb str r3, [r7, #24] 80080d6: 61fa str r2, [r7, #28] 80080d8: e9d7 3404 ldrd r3, r4, [r7, #16] 80080dc: 4622 mov r2, r4 80080de: e9d7 0106 ldrd r0, r1, [r7, #24] 80080e2: 4684 mov ip, r0 80080e4: fb0c f202 mul.w r2, ip, r2 80080e8: e9c7 0106 strd r0, r1, [r7, #24] 80080ec: 468c mov ip, r1 80080ee: 4618 mov r0, r3 80080f0: 4621 mov r1, r4 80080f2: 4603 mov r3, r0 80080f4: fb03 f30c mul.w r3, r3, ip 80080f8: 4413 add r3, r2 80080fa: 4602 mov r2, r0 80080fc: 69b9 ldr r1, [r7, #24] 80080fe: fba2 8901 umull r8, r9, r2, r1 8008102: 444b add r3, r9 8008104: 4699 mov r9, r3 8008106: 4b2e ldr r3, [pc, #184] @ (80081c0 ) 8008108: fb03 f209 mul.w r2, r3, r9 800810c: 2300 movs r3, #0 800810e: fb03 f308 mul.w r3, r3, r8 8008112: 4413 add r3, r2 8008114: 4a2a ldr r2, [pc, #168] @ (80081c0 ) 8008116: fba8 ab02 umull sl, fp, r8, r2 800811a: 445b add r3, fp 800811c: 469b mov fp, r3 800811e: 6cbb ldr r3, [r7, #72] @ 0x48 8008120: 2200 movs r2, #0 8008122: 60bb str r3, [r7, #8] 8008124: 60fa str r2, [r7, #12] 8008126: 6d3b ldr r3, [r7, #80] @ 0x50 8008128: 2200 movs r2, #0 800812a: 603b str r3, [r7, #0] 800812c: 607a str r2, [r7, #4] 800812e: e9d7 3402 ldrd r3, r4, [r7, #8] 8008132: 4622 mov r2, r4 8008134: e9d7 8900 ldrd r8, r9, [r7] 8008138: 4641 mov r1, r8 800813a: fb01 f202 mul.w r2, r1, r2 800813e: 46cc mov ip, r9 8008140: 4618 mov r0, r3 8008142: 4621 mov r1, r4 8008144: 4603 mov r3, r0 8008146: fb03 f30c mul.w r3, r3, ip 800814a: 4413 add r3, r2 800814c: 4602 mov r2, r0 800814e: 4641 mov r1, r8 8008150: fba2 5601 umull r5, r6, r2, r1 8008154: 4433 add r3, r6 8008156: 461e mov r6, r3 8008158: 462a mov r2, r5 800815a: 4633 mov r3, r6 800815c: 4650 mov r0, sl 800815e: 4659 mov r1, fp 8008160: f7f9 f8a2 bl 80012a8 <__aeabi_uldivmod> 8008164: 4602 mov r2, r0 8008166: 460b mov r3, r1 8008168: 4613 mov r3, r2 800816a: 65fb str r3, [r7, #92] @ 0x5c 800816c: e007 b.n 800817e } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 800816e: 6cfb ldr r3, [r7, #76] @ 0x4c 8008170: 4a13 ldr r2, [pc, #76] @ (80081c0 ) 8008172: fb03 f202 mul.w r2, r3, r2 8008176: 6d3b ldr r3, [r7, #80] @ 0x50 8008178: fbb2 f3f3 udiv r3, r2, r3 800817c: 65fb str r3, [r7, #92] @ 0x5c } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 800817e: f897 3041 ldrb.w r3, [r7, #65] @ 0x41 8008182: 461a mov r2, r3 8008184: 6cfb ldr r3, [r7, #76] @ 0x4c 8008186: 4293 cmp r3, r2 8008188: d108 bne.n 800819c { pllclk = pllclk / 2; 800818a: 6dfb ldr r3, [r7, #92] @ 0x5c 800818c: 085b lsrs r3, r3, #1 800818e: 65fb str r3, [r7, #92] @ 0x5c 8008190: e004 b.n 800819c #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8008192: 6cfb ldr r3, [r7, #76] @ 0x4c 8008194: 4a0b ldr r2, [pc, #44] @ (80081c4 ) 8008196: fb02 f303 mul.w r3, r2, r3 800819a: 65fb str r3, [r7, #92] @ 0x5c } sysclockfreq = pllclk; 800819c: 6dfb ldr r3, [r7, #92] @ 0x5c 800819e: 65bb str r3, [r7, #88] @ 0x58 break; 80081a0: e002 b.n 80081a8 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 80081a2: 4b09 ldr r3, [pc, #36] @ (80081c8 ) 80081a4: 65bb str r3, [r7, #88] @ 0x58 break; 80081a6: bf00 nop } } return sysclockfreq; 80081a8: 6dbb ldr r3, [r7, #88] @ 0x58 } 80081aa: 4618 mov r0, r3 80081ac: 3764 adds r7, #100 @ 0x64 80081ae: 46bd mov sp, r7 80081b0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80081b4: 0800dfa0 .word 0x0800dfa0 80081b8: 0800dfb0 .word 0x0800dfb0 80081bc: 40021000 .word 0x40021000 80081c0: 017d7840 .word 0x017d7840 80081c4: 003d0900 .word 0x003d0900 80081c8: 007a1200 .word 0x007a1200 080081cc : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 80081cc: b480 push {r7} 80081ce: af00 add r7, sp, #0 return SystemCoreClock; 80081d0: 4b02 ldr r3, [pc, #8] @ (80081dc ) 80081d2: 681b ldr r3, [r3, #0] } 80081d4: 4618 mov r0, r3 80081d6: 46bd mov sp, r7 80081d8: bc80 pop {r7} 80081da: 4770 bx lr 80081dc: 20000008 .word 0x20000008 080081e0 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 80081e0: b580 push {r7, lr} 80081e2: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 80081e4: f7ff fff2 bl 80081cc 80081e8: 4602 mov r2, r0 80081ea: 4b05 ldr r3, [pc, #20] @ (8008200 ) 80081ec: 685b ldr r3, [r3, #4] 80081ee: 0a1b lsrs r3, r3, #8 80081f0: f003 0307 and.w r3, r3, #7 80081f4: 4903 ldr r1, [pc, #12] @ (8008204 ) 80081f6: 5ccb ldrb r3, [r1, r3] 80081f8: fa22 f303 lsr.w r3, r2, r3 } 80081fc: 4618 mov r0, r3 80081fe: bd80 pop {r7, pc} 8008200: 40021000 .word 0x40021000 8008204: 0800dffc .word 0x0800dffc 08008208 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 8008208: b580 push {r7, lr} 800820a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 800820c: f7ff ffde bl 80081cc 8008210: 4602 mov r2, r0 8008212: 4b05 ldr r3, [pc, #20] @ (8008228 ) 8008214: 685b ldr r3, [r3, #4] 8008216: 0adb lsrs r3, r3, #11 8008218: f003 0307 and.w r3, r3, #7 800821c: 4903 ldr r1, [pc, #12] @ (800822c ) 800821e: 5ccb ldrb r3, [r1, r3] 8008220: fa22 f303 lsr.w r3, r2, r3 } 8008224: 4618 mov r0, r3 8008226: bd80 pop {r7, pc} 8008228: 40021000 .word 0x40021000 800822c: 0800dffc .word 0x0800dffc 08008230 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 8008230: b480 push {r7} 8008232: b085 sub sp, #20 8008234: af00 add r7, sp, #0 8008236: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8008238: 4b0a ldr r3, [pc, #40] @ (8008264 ) 800823a: 681b ldr r3, [r3, #0] 800823c: 4a0a ldr r2, [pc, #40] @ (8008268 ) 800823e: fba2 2303 umull r2, r3, r2, r3 8008242: 0a5b lsrs r3, r3, #9 8008244: 687a ldr r2, [r7, #4] 8008246: fb02 f303 mul.w r3, r2, r3 800824a: 60fb str r3, [r7, #12] do { __NOP(); 800824c: bf00 nop } while (Delay --); 800824e: 68fb ldr r3, [r7, #12] 8008250: 1e5a subs r2, r3, #1 8008252: 60fa str r2, [r7, #12] 8008254: 2b00 cmp r3, #0 8008256: d1f9 bne.n 800824c } 8008258: bf00 nop 800825a: bf00 nop 800825c: 3714 adds r7, #20 800825e: 46bd mov sp, r7 8008260: bc80 pop {r7} 8008262: 4770 bx lr 8008264: 20000008 .word 0x20000008 8008268: 10624dd3 .word 0x10624dd3 0800826c : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 800826c: b580 push {r7, lr} 800826e: b088 sub sp, #32 8008270: af00 add r7, sp, #0 8008272: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 8008274: 2300 movs r3, #0 8008276: 617b str r3, [r7, #20] 8008278: 2300 movs r3, #0 800827a: 613b str r3, [r7, #16] #if defined(STM32F105xC) || defined(STM32F107xC) uint32_t pllactive = 0U; 800827c: 2300 movs r3, #0 800827e: 61fb str r3, [r7, #28] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8008280: 687b ldr r3, [r7, #4] 8008282: 681b ldr r3, [r3, #0] 8008284: f003 0301 and.w r3, r3, #1 8008288: 2b00 cmp r3, #0 800828a: d07d beq.n 8008388 { FlagStatus pwrclkchanged = RESET; 800828c: 2300 movs r3, #0 800828e: 76fb strb r3, [r7, #27] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8008290: 4b8b ldr r3, [pc, #556] @ (80084c0 ) 8008292: 69db ldr r3, [r3, #28] 8008294: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8008298: 2b00 cmp r3, #0 800829a: d10d bne.n 80082b8 { __HAL_RCC_PWR_CLK_ENABLE(); 800829c: 4b88 ldr r3, [pc, #544] @ (80084c0 ) 800829e: 69db ldr r3, [r3, #28] 80082a0: 4a87 ldr r2, [pc, #540] @ (80084c0 ) 80082a2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80082a6: 61d3 str r3, [r2, #28] 80082a8: 4b85 ldr r3, [pc, #532] @ (80084c0 ) 80082aa: 69db ldr r3, [r3, #28] 80082ac: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80082b0: 60fb str r3, [r7, #12] 80082b2: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; 80082b4: 2301 movs r3, #1 80082b6: 76fb strb r3, [r7, #27] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80082b8: 4b82 ldr r3, [pc, #520] @ (80084c4 ) 80082ba: 681b ldr r3, [r3, #0] 80082bc: f403 7380 and.w r3, r3, #256 @ 0x100 80082c0: 2b00 cmp r3, #0 80082c2: d118 bne.n 80082f6 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80082c4: 4b7f ldr r3, [pc, #508] @ (80084c4 ) 80082c6: 681b ldr r3, [r3, #0] 80082c8: 4a7e ldr r2, [pc, #504] @ (80084c4 ) 80082ca: f443 7380 orr.w r3, r3, #256 @ 0x100 80082ce: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80082d0: f7fd fab0 bl 8005834 80082d4: 6178 str r0, [r7, #20] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80082d6: e008 b.n 80082ea { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80082d8: f7fd faac bl 8005834 80082dc: 4602 mov r2, r0 80082de: 697b ldr r3, [r7, #20] 80082e0: 1ad3 subs r3, r2, r3 80082e2: 2b64 cmp r3, #100 @ 0x64 80082e4: d901 bls.n 80082ea { return HAL_TIMEOUT; 80082e6: 2303 movs r3, #3 80082e8: e0e5 b.n 80084b6 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80082ea: 4b76 ldr r3, [pc, #472] @ (80084c4 ) 80082ec: 681b ldr r3, [r3, #0] 80082ee: f403 7380 and.w r3, r3, #256 @ 0x100 80082f2: 2b00 cmp r3, #0 80082f4: d0f0 beq.n 80082d8 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 80082f6: 4b72 ldr r3, [pc, #456] @ (80084c0 ) 80082f8: 6a1b ldr r3, [r3, #32] 80082fa: f403 7340 and.w r3, r3, #768 @ 0x300 80082fe: 613b str r3, [r7, #16] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8008300: 693b ldr r3, [r7, #16] 8008302: 2b00 cmp r3, #0 8008304: d02e beq.n 8008364 8008306: 687b ldr r3, [r7, #4] 8008308: 685b ldr r3, [r3, #4] 800830a: f403 7340 and.w r3, r3, #768 @ 0x300 800830e: 693a ldr r2, [r7, #16] 8008310: 429a cmp r2, r3 8008312: d027 beq.n 8008364 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8008314: 4b6a ldr r3, [pc, #424] @ (80084c0 ) 8008316: 6a1b ldr r3, [r3, #32] 8008318: f423 7340 bic.w r3, r3, #768 @ 0x300 800831c: 613b str r3, [r7, #16] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 800831e: 4b6a ldr r3, [pc, #424] @ (80084c8 ) 8008320: 2201 movs r2, #1 8008322: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8008324: 4b68 ldr r3, [pc, #416] @ (80084c8 ) 8008326: 2200 movs r2, #0 8008328: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 800832a: 4a65 ldr r2, [pc, #404] @ (80084c0 ) 800832c: 693b ldr r3, [r7, #16] 800832e: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 8008330: 693b ldr r3, [r7, #16] 8008332: f003 0301 and.w r3, r3, #1 8008336: 2b00 cmp r3, #0 8008338: d014 beq.n 8008364 { /* Get Start Tick */ tickstart = HAL_GetTick(); 800833a: f7fd fa7b bl 8005834 800833e: 6178 str r0, [r7, #20] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8008340: e00a b.n 8008358 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8008342: f7fd fa77 bl 8005834 8008346: 4602 mov r2, r0 8008348: 697b ldr r3, [r7, #20] 800834a: 1ad3 subs r3, r2, r3 800834c: f241 3288 movw r2, #5000 @ 0x1388 8008350: 4293 cmp r3, r2 8008352: d901 bls.n 8008358 { return HAL_TIMEOUT; 8008354: 2303 movs r3, #3 8008356: e0ae b.n 80084b6 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8008358: 4b59 ldr r3, [pc, #356] @ (80084c0 ) 800835a: 6a1b ldr r3, [r3, #32] 800835c: f003 0302 and.w r3, r3, #2 8008360: 2b00 cmp r3, #0 8008362: d0ee beq.n 8008342 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8008364: 4b56 ldr r3, [pc, #344] @ (80084c0 ) 8008366: 6a1b ldr r3, [r3, #32] 8008368: f423 7240 bic.w r2, r3, #768 @ 0x300 800836c: 687b ldr r3, [r7, #4] 800836e: 685b ldr r3, [r3, #4] 8008370: 4953 ldr r1, [pc, #332] @ (80084c0 ) 8008372: 4313 orrs r3, r2 8008374: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8008376: 7efb ldrb r3, [r7, #27] 8008378: 2b01 cmp r3, #1 800837a: d105 bne.n 8008388 { __HAL_RCC_PWR_CLK_DISABLE(); 800837c: 4b50 ldr r3, [pc, #320] @ (80084c0 ) 800837e: 69db ldr r3, [r3, #28] 8008380: 4a4f ldr r2, [pc, #316] @ (80084c0 ) 8008382: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8008386: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8008388: 687b ldr r3, [r7, #4] 800838a: 681b ldr r3, [r3, #0] 800838c: f003 0302 and.w r3, r3, #2 8008390: 2b00 cmp r3, #0 8008392: d008 beq.n 80083a6 { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8008394: 4b4a ldr r3, [pc, #296] @ (80084c0 ) 8008396: 685b ldr r3, [r3, #4] 8008398: f423 4240 bic.w r2, r3, #49152 @ 0xc000 800839c: 687b ldr r3, [r7, #4] 800839e: 689b ldr r3, [r3, #8] 80083a0: 4947 ldr r1, [pc, #284] @ (80084c0 ) 80083a2: 4313 orrs r3, r2 80083a4: 604b str r3, [r1, #4] } #if defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ I2S2 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S2) == RCC_PERIPHCLK_I2S2) 80083a6: 687b ldr r3, [r7, #4] 80083a8: 681b ldr r3, [r3, #0] 80083aa: f003 0304 and.w r3, r3, #4 80083ae: 2b00 cmp r3, #0 80083b0: d008 beq.n 80083c4 { /* Check the parameters */ assert_param(IS_RCC_I2S2CLKSOURCE(PeriphClkInit->I2s2ClockSelection)); /* Configure the I2S2 clock source */ __HAL_RCC_I2S2_CONFIG(PeriphClkInit->I2s2ClockSelection); 80083b2: 4b43 ldr r3, [pc, #268] @ (80084c0 ) 80083b4: 6adb ldr r3, [r3, #44] @ 0x2c 80083b6: f423 3200 bic.w r2, r3, #131072 @ 0x20000 80083ba: 687b ldr r3, [r7, #4] 80083bc: 68db ldr r3, [r3, #12] 80083be: 4940 ldr r1, [pc, #256] @ (80084c0 ) 80083c0: 4313 orrs r3, r2 80083c2: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ I2S3 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S3) == RCC_PERIPHCLK_I2S3) 80083c4: 687b ldr r3, [r7, #4] 80083c6: 681b ldr r3, [r3, #0] 80083c8: f003 0308 and.w r3, r3, #8 80083cc: 2b00 cmp r3, #0 80083ce: d008 beq.n 80083e2 { /* Check the parameters */ assert_param(IS_RCC_I2S3CLKSOURCE(PeriphClkInit->I2s3ClockSelection)); /* Configure the I2S3 clock source */ __HAL_RCC_I2S3_CONFIG(PeriphClkInit->I2s3ClockSelection); 80083d0: 4b3b ldr r3, [pc, #236] @ (80084c0 ) 80083d2: 6adb ldr r3, [r3, #44] @ 0x2c 80083d4: f423 2280 bic.w r2, r3, #262144 @ 0x40000 80083d8: 687b ldr r3, [r7, #4] 80083da: 691b ldr r3, [r3, #16] 80083dc: 4938 ldr r1, [pc, #224] @ (80084c0 ) 80083de: 4313 orrs r3, r2 80083e0: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ PLL I2S Configuration ----------------------*/ /* Check that PLLI2S need to be enabled */ if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S2SRC) || HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S3SRC)) 80083e2: 4b37 ldr r3, [pc, #220] @ (80084c0 ) 80083e4: 6adb ldr r3, [r3, #44] @ 0x2c 80083e6: f403 3300 and.w r3, r3, #131072 @ 0x20000 80083ea: 2b00 cmp r3, #0 80083ec: d105 bne.n 80083fa 80083ee: 4b34 ldr r3, [pc, #208] @ (80084c0 ) 80083f0: 6adb ldr r3, [r3, #44] @ 0x2c 80083f2: f403 2380 and.w r3, r3, #262144 @ 0x40000 80083f6: 2b00 cmp r3, #0 80083f8: d001 beq.n 80083fe { /* Update flag to indicate that PLL I2S should be active */ pllactive = 1; 80083fa: 2301 movs r3, #1 80083fc: 61fb str r3, [r7, #28] } /* Check if PLL I2S need to be enabled */ if (pllactive == 1) 80083fe: 69fb ldr r3, [r7, #28] 8008400: 2b01 cmp r3, #1 8008402: d148 bne.n 8008496 { /* Enable PLL I2S only if not active */ if (HAL_IS_BIT_CLR(RCC->CR, RCC_CR_PLL3ON)) 8008404: 4b2e ldr r3, [pc, #184] @ (80084c0 ) 8008406: 681b ldr r3, [r3, #0] 8008408: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800840c: 2b00 cmp r3, #0 800840e: d138 bne.n 8008482 assert_param(IS_RCC_PLLI2S_MUL(PeriphClkInit->PLLI2S.PLLI2SMUL)); assert_param(IS_RCC_HSE_PREDIV2(PeriphClkInit->PLLI2S.HSEPrediv2Value)); /* Prediv2 can be written only when the PLL2 is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 8008410: 4b2b ldr r3, [pc, #172] @ (80084c0 ) 8008412: 681b ldr r3, [r3, #0] 8008414: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8008418: 2b00 cmp r3, #0 800841a: d009 beq.n 8008430 (__HAL_RCC_HSE_GET_PREDIV2() != PeriphClkInit->PLLI2S.HSEPrediv2Value)) 800841c: 4b28 ldr r3, [pc, #160] @ (80084c0 ) 800841e: 6adb ldr r3, [r3, #44] @ 0x2c 8008420: f003 02f0 and.w r2, r3, #240 @ 0xf0 8008424: 687b ldr r3, [r7, #4] 8008426: 699b ldr r3, [r3, #24] if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 8008428: 429a cmp r2, r3 800842a: d001 beq.n 8008430 { return HAL_ERROR; 800842c: 2301 movs r3, #1 800842e: e042 b.n 80084b6 } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(PeriphClkInit->PLLI2S.HSEPrediv2Value); 8008430: 4b23 ldr r3, [pc, #140] @ (80084c0 ) 8008432: 6adb ldr r3, [r3, #44] @ 0x2c 8008434: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8008438: 687b ldr r3, [r7, #4] 800843a: 699b ldr r3, [r3, #24] 800843c: 4920 ldr r1, [pc, #128] @ (80084c0 ) 800843e: 4313 orrs r3, r2 8008440: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLLI2S multiplication factors. */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SMUL); 8008442: 4b1f ldr r3, [pc, #124] @ (80084c0 ) 8008444: 6adb ldr r3, [r3, #44] @ 0x2c 8008446: f423 4270 bic.w r2, r3, #61440 @ 0xf000 800844a: 687b ldr r3, [r7, #4] 800844c: 695b ldr r3, [r3, #20] 800844e: 491c ldr r1, [pc, #112] @ (80084c0 ) 8008450: 4313 orrs r3, r2 8008452: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLLI2S. */ __HAL_RCC_PLLI2S_ENABLE(); 8008454: 4b1d ldr r3, [pc, #116] @ (80084cc ) 8008456: 2201 movs r2, #1 8008458: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 800845a: f7fd f9eb bl 8005834 800845e: 6178 str r0, [r7, #20] /* Wait till PLLI2S is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 8008460: e008 b.n 8008474 { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 8008462: f7fd f9e7 bl 8005834 8008466: 4602 mov r2, r0 8008468: 697b ldr r3, [r7, #20] 800846a: 1ad3 subs r3, r2, r3 800846c: 2b64 cmp r3, #100 @ 0x64 800846e: d901 bls.n 8008474 { return HAL_TIMEOUT; 8008470: 2303 movs r3, #3 8008472: e020 b.n 80084b6 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 8008474: 4b12 ldr r3, [pc, #72] @ (80084c0 ) 8008476: 681b ldr r3, [r3, #0] 8008478: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 800847c: 2b00 cmp r3, #0 800847e: d0f0 beq.n 8008462 8008480: e009 b.n 8008496 } } else { /* Return an error only if user wants to change the PLLI2SMUL whereas PLLI2S is active */ if (READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL3MUL) != PeriphClkInit->PLLI2S.PLLI2SMUL) 8008482: 4b0f ldr r3, [pc, #60] @ (80084c0 ) 8008484: 6adb ldr r3, [r3, #44] @ 0x2c 8008486: f403 4270 and.w r2, r3, #61440 @ 0xf000 800848a: 687b ldr r3, [r7, #4] 800848c: 695b ldr r3, [r3, #20] 800848e: 429a cmp r2, r3 8008490: d001 beq.n 8008496 { return HAL_ERROR; 8008492: 2301 movs r3, #1 8008494: e00f b.n 80084b6 #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 8008496: 687b ldr r3, [r7, #4] 8008498: 681b ldr r3, [r3, #0] 800849a: f003 0310 and.w r3, r3, #16 800849e: 2b00 cmp r3, #0 80084a0: d008 beq.n 80084b4 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 80084a2: 4b07 ldr r3, [pc, #28] @ (80084c0 ) 80084a4: 685b ldr r3, [r3, #4] 80084a6: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 80084aa: 687b ldr r3, [r7, #4] 80084ac: 69db ldr r3, [r3, #28] 80084ae: 4904 ldr r1, [pc, #16] @ (80084c0 ) 80084b0: 4313 orrs r3, r2 80084b2: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 80084b4: 2300 movs r3, #0 } 80084b6: 4618 mov r0, r3 80084b8: 3720 adds r7, #32 80084ba: 46bd mov sp, r7 80084bc: bd80 pop {r7, pc} 80084be: bf00 nop 80084c0: 40021000 .word 0x40021000 80084c4: 40007000 .word 0x40007000 80084c8: 42420440 .word 0x42420440 80084cc: 42420070 .word 0x42420070 080084d0 : * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock @endif * @retval Frequency in Hz (0: means that no available frequency for the peripheral) */ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) { 80084d0: b590 push {r4, r7, lr} 80084d2: b093 sub sp, #76 @ 0x4c 80084d4: af00 add r7, sp, #0 80084d6: 6078 str r0, [r7, #4] #if defined(STM32F105xC) || defined(STM32F107xC) const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; 80084d8: 4ba7 ldr r3, [pc, #668] @ (8008778 ) 80084da: f107 0418 add.w r4, r7, #24 80084de: cb0f ldmia r3, {r0, r1, r2, r3} 80084e0: c407 stmia r4!, {r0, r1, r2} 80084e2: 8023 strh r3, [r4, #0] const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; 80084e4: 4ba5 ldr r3, [pc, #660] @ (800877c ) 80084e6: f107 0408 add.w r4, r7, #8 80084ea: cb0f ldmia r3, {r0, r1, r2, r3} 80084ec: e884 000f stmia.w r4, {r0, r1, r2, r3} uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; 80084f0: 2300 movs r3, #0 80084f2: 63fb str r3, [r7, #60] @ 0x3c 80084f4: 2300 movs r3, #0 80084f6: 647b str r3, [r7, #68] @ 0x44 80084f8: 2300 movs r3, #0 80084fa: 63bb str r3, [r7, #56] @ 0x38 uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U; 80084fc: 2300 movs r3, #0 80084fe: 637b str r3, [r7, #52] @ 0x34 8008500: 2300 movs r3, #0 8008502: 633b str r3, [r7, #48] @ 0x30 8008504: 2300 movs r3, #0 8008506: 62fb str r3, [r7, #44] @ 0x2c const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; const uint8_t aPredivFactorTable[2] = {1, 2}; uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG */ uint32_t temp_reg = 0U, frequency = 0U; 8008508: 2300 movs r3, #0 800850a: 62bb str r3, [r7, #40] @ 0x28 800850c: 2300 movs r3, #0 800850e: 643b str r3, [r7, #64] @ 0x40 /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); switch (PeriphClk) 8008510: 687b ldr r3, [r7, #4] 8008512: 3b01 subs r3, #1 8008514: 2b0f cmp r3, #15 8008516: f200 8121 bhi.w 800875c 800851a: a201 add r2, pc, #4 @ (adr r2, 8008520 ) 800851c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8008520: 080086dd .word 0x080086dd 8008524: 08008741 .word 0x08008741 8008528: 0800875d .word 0x0800875d 800852c: 0800863b .word 0x0800863b 8008530: 0800875d .word 0x0800875d 8008534: 0800875d .word 0x0800875d 8008538: 0800875d .word 0x0800875d 800853c: 0800868d .word 0x0800868d 8008540: 0800875d .word 0x0800875d 8008544: 0800875d .word 0x0800875d 8008548: 0800875d .word 0x0800875d 800854c: 0800875d .word 0x0800875d 8008550: 0800875d .word 0x0800875d 8008554: 0800875d .word 0x0800875d 8008558: 0800875d .word 0x0800875d 800855c: 08008561 .word 0x08008561 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) case RCC_PERIPHCLK_USB: { /* Get RCC configuration ------------------------------------------------------*/ temp_reg = RCC->CFGR; 8008560: 4b87 ldr r3, [pc, #540] @ (8008780 ) 8008562: 685b ldr r3, [r3, #4] 8008564: 62bb str r3, [r7, #40] @ 0x28 /* Check if PLL is enabled */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLON)) 8008566: 4b86 ldr r3, [pc, #536] @ (8008780 ) 8008568: 681b ldr r3, [r3, #0] 800856a: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 800856e: 2b00 cmp r3, #0 8008570: f000 80f6 beq.w 8008760 { pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8008574: 6abb ldr r3, [r7, #40] @ 0x28 8008576: 0c9b lsrs r3, r3, #18 8008578: f003 030f and.w r3, r3, #15 800857c: 3348 adds r3, #72 @ 0x48 800857e: 443b add r3, r7 8008580: f813 3c30 ldrb.w r3, [r3, #-48] 8008584: 63bb str r3, [r7, #56] @ 0x38 if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8008586: 6abb ldr r3, [r7, #40] @ 0x28 8008588: f403 3380 and.w r3, r3, #65536 @ 0x10000 800858c: 2b00 cmp r3, #0 800858e: d03d beq.n 800860c { #if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\ || defined(STM32F100xE) prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 8008590: 4b7b ldr r3, [pc, #492] @ (8008780 ) 8008592: 6adb ldr r3, [r3, #44] @ 0x2c 8008594: f003 030f and.w r3, r3, #15 8008598: 3348 adds r3, #72 @ 0x48 800859a: 443b add r3, r7 800859c: f813 3c40 ldrb.w r3, [r3, #-64] 80085a0: 63fb str r3, [r7, #60] @ 0x3c #else prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ #if defined(STM32F105xC) || defined(STM32F107xC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 80085a2: 4b77 ldr r3, [pc, #476] @ (8008780 ) 80085a4: 6adb ldr r3, [r3, #44] @ 0x2c 80085a6: f403 3380 and.w r3, r3, #65536 @ 0x10000 80085aa: 2b00 cmp r3, #0 80085ac: d01c beq.n 80085e8 { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 80085ae: 4b74 ldr r3, [pc, #464] @ (8008780 ) 80085b0: 6adb ldr r3, [r3, #44] @ 0x2c 80085b2: 091b lsrs r3, r3, #4 80085b4: f003 030f and.w r3, r3, #15 80085b8: 3301 adds r3, #1 80085ba: 62fb str r3, [r7, #44] @ 0x2c pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 80085bc: 4b70 ldr r3, [pc, #448] @ (8008780 ) 80085be: 6adb ldr r3, [r3, #44] @ 0x2c 80085c0: 0a1b lsrs r3, r3, #8 80085c2: f003 030f and.w r3, r3, #15 80085c6: 3302 adds r3, #2 80085c8: 637b str r3, [r7, #52] @ 0x34 pllclk = (uint32_t)((((HSE_VALUE / prediv2) * pll2mul) / prediv1) * pllmul); 80085ca: 4a6e ldr r2, [pc, #440] @ (8008784 ) 80085cc: 6afb ldr r3, [r7, #44] @ 0x2c 80085ce: fbb2 f3f3 udiv r3, r2, r3 80085d2: 6b7a ldr r2, [r7, #52] @ 0x34 80085d4: fb03 f202 mul.w r2, r3, r2 80085d8: 6bfb ldr r3, [r7, #60] @ 0x3c 80085da: fbb2 f2f3 udiv r2, r2, r3 80085de: 6bbb ldr r3, [r7, #56] @ 0x38 80085e0: fb02 f303 mul.w r3, r2, r3 80085e4: 647b str r3, [r7, #68] @ 0x44 80085e6: e007 b.n 80085f8 } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 80085e8: 4a66 ldr r2, [pc, #408] @ (8008784 ) 80085ea: 6bfb ldr r3, [r7, #60] @ 0x3c 80085ec: fbb2 f2f3 udiv r2, r2, r3 80085f0: 6bbb ldr r3, [r7, #56] @ 0x38 80085f2: fb02 f303 mul.w r3, r2, r3 80085f6: 647b str r3, [r7, #68] @ 0x44 } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 80085f8: f897 3025 ldrb.w r3, [r7, #37] @ 0x25 80085fc: 461a mov r2, r3 80085fe: 6bbb ldr r3, [r7, #56] @ 0x38 8008600: 4293 cmp r3, r2 8008602: d108 bne.n 8008616 { pllclk = pllclk / 2; 8008604: 6c7b ldr r3, [r7, #68] @ 0x44 8008606: 085b lsrs r3, r3, #1 8008608: 647b str r3, [r7, #68] @ 0x44 800860a: e004 b.n 8008616 #endif /* STM32F105xC || STM32F107xC */ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 800860c: 6bbb ldr r3, [r7, #56] @ 0x38 800860e: 4a5e ldr r2, [pc, #376] @ (8008788 ) 8008610: fb02 f303 mul.w r3, r2, r3 8008614: 647b str r3, [r7, #68] @ 0x44 } /* Calcul of the USB frequency*/ #if defined(STM32F105xC) || defined(STM32F107xC) /* USBCLK = PLLVCO = (2 x PLLCLK) / USB prescaler */ if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL_DIV2) 8008616: 4b5a ldr r3, [pc, #360] @ (8008780 ) 8008618: 685b ldr r3, [r3, #4] 800861a: f403 0380 and.w r3, r3, #4194304 @ 0x400000 800861e: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8008622: d102 bne.n 800862a { /* Prescaler of 2 selected for USB */ frequency = pllclk; 8008624: 6c7b ldr r3, [r7, #68] @ 0x44 8008626: 643b str r3, [r7, #64] @ 0x40 /* Prescaler of 1.5 selected for USB */ frequency = (pllclk * 2) / 3; } #endif } break; 8008628: e09a b.n 8008760 frequency = (2 * pllclk) / 3; 800862a: 6c7b ldr r3, [r7, #68] @ 0x44 800862c: 005b lsls r3, r3, #1 800862e: 4a57 ldr r2, [pc, #348] @ (800878c ) 8008630: fba2 2303 umull r2, r3, r2, r3 8008634: 085b lsrs r3, r3, #1 8008636: 643b str r3, [r7, #64] @ 0x40 break; 8008638: e092 b.n 8008760 { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S2_SOURCE() == RCC_I2S2CLKSOURCE_SYSCLK) 800863a: 4b51 ldr r3, [pc, #324] @ (8008780 ) 800863c: 6adb ldr r3, [r3, #44] @ 0x2c 800863e: f403 3300 and.w r3, r3, #131072 @ 0x20000 8008642: 2b00 cmp r3, #0 8008644: d103 bne.n 800864e { /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); 8008646: f7ff fce3 bl 8008010 800864a: 6438 str r0, [r7, #64] @ 0x40 pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 800864c: e08a b.n 8008764 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 800864e: 4b4c ldr r3, [pc, #304] @ (8008780 ) 8008650: 681b ldr r3, [r3, #0] 8008652: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8008656: 2b00 cmp r3, #0 8008658: f000 8084 beq.w 8008764 prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 800865c: 4b48 ldr r3, [pc, #288] @ (8008780 ) 800865e: 6adb ldr r3, [r3, #44] @ 0x2c 8008660: 091b lsrs r3, r3, #4 8008662: f003 030f and.w r3, r3, #15 8008666: 3301 adds r3, #1 8008668: 62fb str r3, [r7, #44] @ 0x2c pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 800866a: 4b45 ldr r3, [pc, #276] @ (8008780 ) 800866c: 6adb ldr r3, [r3, #44] @ 0x2c 800866e: 0b1b lsrs r3, r3, #12 8008670: f003 030f and.w r3, r3, #15 8008674: 3302 adds r3, #2 8008676: 633b str r3, [r7, #48] @ 0x30 frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 8008678: 4a42 ldr r2, [pc, #264] @ (8008784 ) 800867a: 6afb ldr r3, [r7, #44] @ 0x2c 800867c: fbb2 f3f3 udiv r3, r2, r3 8008680: 6b3a ldr r2, [r7, #48] @ 0x30 8008682: fb02 f303 mul.w r3, r2, r3 8008686: 005b lsls r3, r3, #1 8008688: 643b str r3, [r7, #64] @ 0x40 break; 800868a: e06b b.n 8008764 { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S3_SOURCE() == RCC_I2S3CLKSOURCE_SYSCLK) 800868c: 4b3c ldr r3, [pc, #240] @ (8008780 ) 800868e: 6adb ldr r3, [r3, #44] @ 0x2c 8008690: f403 2380 and.w r3, r3, #262144 @ 0x40000 8008694: 2b00 cmp r3, #0 8008696: d103 bne.n 80086a0 { /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); 8008698: f7ff fcba bl 8008010 800869c: 6438 str r0, [r7, #64] @ 0x40 pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 800869e: e063 b.n 8008768 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 80086a0: 4b37 ldr r3, [pc, #220] @ (8008780 ) 80086a2: 681b ldr r3, [r3, #0] 80086a4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80086a8: 2b00 cmp r3, #0 80086aa: d05d beq.n 8008768 prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 80086ac: 4b34 ldr r3, [pc, #208] @ (8008780 ) 80086ae: 6adb ldr r3, [r3, #44] @ 0x2c 80086b0: 091b lsrs r3, r3, #4 80086b2: f003 030f and.w r3, r3, #15 80086b6: 3301 adds r3, #1 80086b8: 62fb str r3, [r7, #44] @ 0x2c pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 80086ba: 4b31 ldr r3, [pc, #196] @ (8008780 ) 80086bc: 6adb ldr r3, [r3, #44] @ 0x2c 80086be: 0b1b lsrs r3, r3, #12 80086c0: f003 030f and.w r3, r3, #15 80086c4: 3302 adds r3, #2 80086c6: 633b str r3, [r7, #48] @ 0x30 frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 80086c8: 4a2e ldr r2, [pc, #184] @ (8008784 ) 80086ca: 6afb ldr r3, [r7, #44] @ 0x2c 80086cc: fbb2 f3f3 udiv r3, r2, r3 80086d0: 6b3a ldr r2, [r7, #48] @ 0x30 80086d2: fb02 f303 mul.w r3, r2, r3 80086d6: 005b lsls r3, r3, #1 80086d8: 643b str r3, [r7, #64] @ 0x40 break; 80086da: e045 b.n 8008768 } #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ case RCC_PERIPHCLK_RTC: { /* Get RCC BDCR configuration ------------------------------------------------------*/ temp_reg = RCC->BDCR; 80086dc: 4b28 ldr r3, [pc, #160] @ (8008780 ) 80086de: 6a1b ldr r3, [r3, #32] 80086e0: 62bb str r3, [r7, #40] @ 0x28 /* Check if LSE is ready if RTC clock selection is LSE */ if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) 80086e2: 6abb ldr r3, [r7, #40] @ 0x28 80086e4: f403 7340 and.w r3, r3, #768 @ 0x300 80086e8: f5b3 7f80 cmp.w r3, #256 @ 0x100 80086ec: d108 bne.n 8008700 80086ee: 6abb ldr r3, [r7, #40] @ 0x28 80086f0: f003 0302 and.w r3, r3, #2 80086f4: 2b00 cmp r3, #0 80086f6: d003 beq.n 8008700 { frequency = LSE_VALUE; 80086f8: f44f 4300 mov.w r3, #32768 @ 0x8000 80086fc: 643b str r3, [r7, #64] @ 0x40 80086fe: e01e b.n 800873e } /* Check if LSI is ready if RTC clock selection is LSI */ else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) 8008700: 6abb ldr r3, [r7, #40] @ 0x28 8008702: f403 7340 and.w r3, r3, #768 @ 0x300 8008706: f5b3 7f00 cmp.w r3, #512 @ 0x200 800870a: d109 bne.n 8008720 800870c: 4b1c ldr r3, [pc, #112] @ (8008780 ) 800870e: 6a5b ldr r3, [r3, #36] @ 0x24 8008710: f003 0302 and.w r3, r3, #2 8008714: 2b00 cmp r3, #0 8008716: d003 beq.n 8008720 { frequency = LSI_VALUE; 8008718: f649 4340 movw r3, #40000 @ 0x9c40 800871c: 643b str r3, [r7, #64] @ 0x40 800871e: e00e b.n 800873e } else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) 8008720: 6abb ldr r3, [r7, #40] @ 0x28 8008722: f403 7340 and.w r3, r3, #768 @ 0x300 8008726: f5b3 7f40 cmp.w r3, #768 @ 0x300 800872a: d11f bne.n 800876c 800872c: 4b14 ldr r3, [pc, #80] @ (8008780 ) 800872e: 681b ldr r3, [r3, #0] 8008730: f403 3300 and.w r3, r3, #131072 @ 0x20000 8008734: 2b00 cmp r3, #0 8008736: d019 beq.n 800876c { frequency = HSE_VALUE / 128U; 8008738: 4b15 ldr r3, [pc, #84] @ (8008790 ) 800873a: 643b str r3, [r7, #64] @ 0x40 /* Clock not enabled for RTC*/ else { /* nothing to do: frequency already initialized to 0U */ } break; 800873c: e016 b.n 800876c 800873e: e015 b.n 800876c } case RCC_PERIPHCLK_ADC: { frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); 8008740: f7ff fd62 bl 8008208 8008744: 4602 mov r2, r0 8008746: 4b0e ldr r3, [pc, #56] @ (8008780 ) 8008748: 685b ldr r3, [r3, #4] 800874a: 0b9b lsrs r3, r3, #14 800874c: f003 0303 and.w r3, r3, #3 8008750: 3301 adds r3, #1 8008752: 005b lsls r3, r3, #1 8008754: fbb2 f3f3 udiv r3, r2, r3 8008758: 643b str r3, [r7, #64] @ 0x40 break; 800875a: e008 b.n 800876e } default: { break; 800875c: bf00 nop 800875e: e006 b.n 800876e break; 8008760: bf00 nop 8008762: e004 b.n 800876e break; 8008764: bf00 nop 8008766: e002 b.n 800876e break; 8008768: bf00 nop 800876a: e000 b.n 800876e break; 800876c: bf00 nop } } return (frequency); 800876e: 6c3b ldr r3, [r7, #64] @ 0x40 } 8008770: 4618 mov r0, r3 8008772: 374c adds r7, #76 @ 0x4c 8008774: 46bd mov sp, r7 8008776: bd90 pop {r4, r7, pc} 8008778: 0800dfc0 .word 0x0800dfc0 800877c: 0800dfd0 .word 0x0800dfd0 8008780: 40021000 .word 0x40021000 8008784: 017d7840 .word 0x017d7840 8008788: 003d0900 .word 0x003d0900 800878c: aaaaaaab .word 0xaaaaaaab 8008790: 0002faf0 .word 0x0002faf0 08008794 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { 8008794: b580 push {r7, lr} 8008796: b084 sub sp, #16 8008798: af00 add r7, sp, #0 800879a: 6078 str r0, [r7, #4] uint32_t prescaler = 0U; 800879c: 2300 movs r3, #0 800879e: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 80087a0: 687b ldr r3, [r7, #4] 80087a2: 2b00 cmp r3, #0 80087a4: d101 bne.n 80087aa { return HAL_ERROR; 80087a6: 2301 movs r3, #1 80087a8: e084 b.n 80088b4 { hrtc->MspDeInitCallback = HAL_RTC_MspDeInit; } } #else if (hrtc->State == HAL_RTC_STATE_RESET) 80087aa: 687b ldr r3, [r7, #4] 80087ac: 7c5b ldrb r3, [r3, #17] 80087ae: b2db uxtb r3, r3 80087b0: 2b00 cmp r3, #0 80087b2: d105 bne.n 80087c0 { /* Allocate lock resource and initialize it */ hrtc->Lock = HAL_UNLOCKED; 80087b4: 687b ldr r3, [r7, #4] 80087b6: 2200 movs r2, #0 80087b8: 741a strb r2, [r3, #16] /* Initialize RTC MSP */ HAL_RTC_MspInit(hrtc); 80087ba: 6878 ldr r0, [r7, #4] 80087bc: f7fc fc32 bl 8005024 } #endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */ /* Set RTC state */ hrtc->State = HAL_RTC_STATE_BUSY; 80087c0: 687b ldr r3, [r7, #4] 80087c2: 2202 movs r2, #2 80087c4: 745a strb r2, [r3, #17] /* Waiting for synchro */ if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) 80087c6: 6878 ldr r0, [r7, #4] 80087c8: f000 f87a bl 80088c0 80087cc: 4603 mov r3, r0 80087ce: 2b00 cmp r3, #0 80087d0: d004 beq.n 80087dc { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 80087d2: 687b ldr r3, [r7, #4] 80087d4: 2204 movs r2, #4 80087d6: 745a strb r2, [r3, #17] return HAL_ERROR; 80087d8: 2301 movs r3, #1 80087da: e06b b.n 80088b4 } /* Set Initialization mode */ if (RTC_EnterInitMode(hrtc) != HAL_OK) 80087dc: 6878 ldr r0, [r7, #4] 80087de: f000 f89c bl 800891a 80087e2: 4603 mov r3, r0 80087e4: 2b00 cmp r3, #0 80087e6: d004 beq.n 80087f2 { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 80087e8: 687b ldr r3, [r7, #4] 80087ea: 2204 movs r2, #4 80087ec: 745a strb r2, [r3, #17] return HAL_ERROR; 80087ee: 2301 movs r3, #1 80087f0: e060 b.n 80088b4 } else { /* Clear Flags Bits */ CLEAR_BIT(hrtc->Instance->CRL, (RTC_FLAG_OW | RTC_FLAG_ALRAF | RTC_FLAG_SEC)); 80087f2: 687b ldr r3, [r7, #4] 80087f4: 681b ldr r3, [r3, #0] 80087f6: 685a ldr r2, [r3, #4] 80087f8: 687b ldr r3, [r7, #4] 80087fa: 681b ldr r3, [r3, #0] 80087fc: f022 0207 bic.w r2, r2, #7 8008800: 605a str r2, [r3, #4] if (hrtc->Init.OutPut != RTC_OUTPUTSOURCE_NONE) 8008802: 687b ldr r3, [r7, #4] 8008804: 689b ldr r3, [r3, #8] 8008806: 2b00 cmp r3, #0 8008808: d005 beq.n 8008816 { /* Disable the selected Tamper pin */ CLEAR_BIT(BKP->CR, BKP_CR_TPE); 800880a: 4b2c ldr r3, [pc, #176] @ (80088bc ) 800880c: 6b1b ldr r3, [r3, #48] @ 0x30 800880e: 4a2b ldr r2, [pc, #172] @ (80088bc ) 8008810: f023 0301 bic.w r3, r3, #1 8008814: 6313 str r3, [r2, #48] @ 0x30 } /* Set the signal which will be routed to RTC Tamper pin*/ MODIFY_REG(BKP->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), hrtc->Init.OutPut); 8008816: 4b29 ldr r3, [pc, #164] @ (80088bc ) 8008818: 6adb ldr r3, [r3, #44] @ 0x2c 800881a: f423 7260 bic.w r2, r3, #896 @ 0x380 800881e: 687b ldr r3, [r7, #4] 8008820: 689b ldr r3, [r3, #8] 8008822: 4926 ldr r1, [pc, #152] @ (80088bc ) 8008824: 4313 orrs r3, r2 8008826: 62cb str r3, [r1, #44] @ 0x2c if (hrtc->Init.AsynchPrediv != RTC_AUTO_1_SECOND) 8008828: 687b ldr r3, [r7, #4] 800882a: 685b ldr r3, [r3, #4] 800882c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8008830: d003 beq.n 800883a { /* RTC Prescaler provided directly by end-user*/ prescaler = hrtc->Init.AsynchPrediv; 8008832: 687b ldr r3, [r7, #4] 8008834: 685b ldr r3, [r3, #4] 8008836: 60fb str r3, [r7, #12] 8008838: e00e b.n 8008858 } else { /* RTC Prescaler will be automatically calculated to get 1 second timebase */ /* Get the RTCCLK frequency */ prescaler = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_RTC); 800883a: 2001 movs r0, #1 800883c: f7ff fe48 bl 80084d0 8008840: 60f8 str r0, [r7, #12] /* Check that RTC clock is enabled*/ if (prescaler == 0U) 8008842: 68fb ldr r3, [r7, #12] 8008844: 2b00 cmp r3, #0 8008846: d104 bne.n 8008852 { /* Should not happen. Frequency is not available*/ hrtc->State = HAL_RTC_STATE_ERROR; 8008848: 687b ldr r3, [r7, #4] 800884a: 2204 movs r2, #4 800884c: 745a strb r2, [r3, #17] return HAL_ERROR; 800884e: 2301 movs r3, #1 8008850: e030 b.n 80088b4 } else { /* RTC period = RTCCLK/(RTC_PR + 1) */ prescaler = prescaler - 1U; 8008852: 68fb ldr r3, [r7, #12] 8008854: 3b01 subs r3, #1 8008856: 60fb str r3, [r7, #12] } } /* Configure the RTC_PRLH / RTC_PRLL */ MODIFY_REG(hrtc->Instance->PRLH, RTC_PRLH_PRL, (prescaler >> 16U)); 8008858: 687b ldr r3, [r7, #4] 800885a: 681b ldr r3, [r3, #0] 800885c: 689b ldr r3, [r3, #8] 800885e: f023 010f bic.w r1, r3, #15 8008862: 68fb ldr r3, [r7, #12] 8008864: 0c1a lsrs r2, r3, #16 8008866: 687b ldr r3, [r7, #4] 8008868: 681b ldr r3, [r3, #0] 800886a: 430a orrs r2, r1 800886c: 609a str r2, [r3, #8] MODIFY_REG(hrtc->Instance->PRLL, RTC_PRLL_PRL, (prescaler & RTC_PRLL_PRL)); 800886e: 687b ldr r3, [r7, #4] 8008870: 681b ldr r3, [r3, #0] 8008872: 68db ldr r3, [r3, #12] 8008874: 0c1b lsrs r3, r3, #16 8008876: 041b lsls r3, r3, #16 8008878: 68fa ldr r2, [r7, #12] 800887a: b291 uxth r1, r2 800887c: 687a ldr r2, [r7, #4] 800887e: 6812 ldr r2, [r2, #0] 8008880: 430b orrs r3, r1 8008882: 60d3 str r3, [r2, #12] /* Wait for synchro */ if (RTC_ExitInitMode(hrtc) != HAL_OK) 8008884: 6878 ldr r0, [r7, #4] 8008886: f000 f870 bl 800896a 800888a: 4603 mov r3, r0 800888c: 2b00 cmp r3, #0 800888e: d004 beq.n 800889a { hrtc->State = HAL_RTC_STATE_ERROR; 8008890: 687b ldr r3, [r7, #4] 8008892: 2204 movs r2, #4 8008894: 745a strb r2, [r3, #17] return HAL_ERROR; 8008896: 2301 movs r3, #1 8008898: e00c b.n 80088b4 } /* Initialize date to 1st of January 2000 */ hrtc->DateToUpdate.Year = 0x00U; 800889a: 687b ldr r3, [r7, #4] 800889c: 2200 movs r2, #0 800889e: 73da strb r2, [r3, #15] hrtc->DateToUpdate.Month = RTC_MONTH_JANUARY; 80088a0: 687b ldr r3, [r7, #4] 80088a2: 2201 movs r2, #1 80088a4: 735a strb r2, [r3, #13] hrtc->DateToUpdate.Date = 0x01U; 80088a6: 687b ldr r3, [r7, #4] 80088a8: 2201 movs r2, #1 80088aa: 739a strb r2, [r3, #14] /* Set RTC state */ hrtc->State = HAL_RTC_STATE_READY; 80088ac: 687b ldr r3, [r7, #4] 80088ae: 2201 movs r2, #1 80088b0: 745a strb r2, [r3, #17] return HAL_OK; 80088b2: 2300 movs r3, #0 } } 80088b4: 4618 mov r0, r3 80088b6: 3710 adds r7, #16 80088b8: 46bd mov sp, r7 80088ba: bd80 pop {r7, pc} 80088bc: 40006c00 .word 0x40006c00 080088c0 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc) { 80088c0: b580 push {r7, lr} 80088c2: b084 sub sp, #16 80088c4: af00 add r7, sp, #0 80088c6: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 80088c8: 2300 movs r3, #0 80088ca: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 80088cc: 687b ldr r3, [r7, #4] 80088ce: 2b00 cmp r3, #0 80088d0: d101 bne.n 80088d6 { return HAL_ERROR; 80088d2: 2301 movs r3, #1 80088d4: e01d b.n 8008912 } /* Clear RSF flag */ CLEAR_BIT(hrtc->Instance->CRL, RTC_FLAG_RSF); 80088d6: 687b ldr r3, [r7, #4] 80088d8: 681b ldr r3, [r3, #0] 80088da: 685a ldr r2, [r3, #4] 80088dc: 687b ldr r3, [r7, #4] 80088de: 681b ldr r3, [r3, #0] 80088e0: f022 0208 bic.w r2, r2, #8 80088e4: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 80088e6: f7fc ffa5 bl 8005834 80088ea: 60f8 str r0, [r7, #12] /* Wait the registers to be synchronised */ while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 80088ec: e009 b.n 8008902 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 80088ee: f7fc ffa1 bl 8005834 80088f2: 4602 mov r2, r0 80088f4: 68fb ldr r3, [r7, #12] 80088f6: 1ad3 subs r3, r2, r3 80088f8: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 80088fc: d901 bls.n 8008902 { return HAL_TIMEOUT; 80088fe: 2303 movs r3, #3 8008900: e007 b.n 8008912 while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 8008902: 687b ldr r3, [r7, #4] 8008904: 681b ldr r3, [r3, #0] 8008906: 685b ldr r3, [r3, #4] 8008908: f003 0308 and.w r3, r3, #8 800890c: 2b00 cmp r3, #0 800890e: d0ee beq.n 80088ee } } return HAL_OK; 8008910: 2300 movs r3, #0 } 8008912: 4618 mov r0, r3 8008914: 3710 adds r7, #16 8008916: 46bd mov sp, r7 8008918: bd80 pop {r7, pc} 0800891a : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc) { 800891a: b580 push {r7, lr} 800891c: b084 sub sp, #16 800891e: af00 add r7, sp, #0 8008920: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8008922: 2300 movs r3, #0 8008924: 60fb str r3, [r7, #12] tickstart = HAL_GetTick(); 8008926: f7fc ff85 bl 8005834 800892a: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800892c: e009 b.n 8008942 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800892e: f7fc ff81 bl 8005834 8008932: 4602 mov r2, r0 8008934: 68fb ldr r3, [r7, #12] 8008936: 1ad3 subs r3, r2, r3 8008938: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800893c: d901 bls.n 8008942 { return HAL_TIMEOUT; 800893e: 2303 movs r3, #3 8008940: e00f b.n 8008962 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8008942: 687b ldr r3, [r7, #4] 8008944: 681b ldr r3, [r3, #0] 8008946: 685b ldr r3, [r3, #4] 8008948: f003 0320 and.w r3, r3, #32 800894c: 2b00 cmp r3, #0 800894e: d0ee beq.n 800892e } } /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); 8008950: 687b ldr r3, [r7, #4] 8008952: 681b ldr r3, [r3, #0] 8008954: 685a ldr r2, [r3, #4] 8008956: 687b ldr r3, [r7, #4] 8008958: 681b ldr r3, [r3, #0] 800895a: f042 0210 orr.w r2, r2, #16 800895e: 605a str r2, [r3, #4] return HAL_OK; 8008960: 2300 movs r3, #0 } 8008962: 4618 mov r0, r3 8008964: 3710 adds r7, #16 8008966: 46bd mov sp, r7 8008968: bd80 pop {r7, pc} 0800896a : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc) { 800896a: b580 push {r7, lr} 800896c: b084 sub sp, #16 800896e: af00 add r7, sp, #0 8008970: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8008972: 2300 movs r3, #0 8008974: 60fb str r3, [r7, #12] /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 8008976: 687b ldr r3, [r7, #4] 8008978: 681b ldr r3, [r3, #0] 800897a: 685a ldr r2, [r3, #4] 800897c: 687b ldr r3, [r7, #4] 800897e: 681b ldr r3, [r3, #0] 8008980: f022 0210 bic.w r2, r2, #16 8008984: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8008986: f7fc ff55 bl 8005834 800898a: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800898c: e009 b.n 80089a2 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800898e: f7fc ff51 bl 8005834 8008992: 4602 mov r2, r0 8008994: 68fb ldr r3, [r7, #12] 8008996: 1ad3 subs r3, r2, r3 8008998: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800899c: d901 bls.n 80089a2 { return HAL_TIMEOUT; 800899e: 2303 movs r3, #3 80089a0: e007 b.n 80089b2 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 80089a2: 687b ldr r3, [r7, #4] 80089a4: 681b ldr r3, [r3, #0] 80089a6: 685b ldr r3, [r3, #4] 80089a8: f003 0320 and.w r3, r3, #32 80089ac: 2b00 cmp r3, #0 80089ae: d0ee beq.n 800898e } } return HAL_OK; 80089b0: 2300 movs r3, #0 } 80089b2: 4618 mov r0, r3 80089b4: 3710 adds r7, #16 80089b6: 46bd mov sp, r7 80089b8: bd80 pop {r7, pc} 080089ba : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 80089ba: b580 push {r7, lr} 80089bc: b082 sub sp, #8 80089be: af00 add r7, sp, #0 80089c0: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 80089c2: 687b ldr r3, [r7, #4] 80089c4: 2b00 cmp r3, #0 80089c6: d101 bne.n 80089cc { return HAL_ERROR; 80089c8: 2301 movs r3, #1 80089ca: e03f b.n 8008a4c assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 80089cc: 687b ldr r3, [r7, #4] 80089ce: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80089d2: b2db uxtb r3, r3 80089d4: 2b00 cmp r3, #0 80089d6: d106 bne.n 80089e6 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 80089d8: 687b ldr r3, [r7, #4] 80089da: 2200 movs r2, #0 80089dc: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 80089e0: 6878 ldr r0, [r7, #4] 80089e2: f7fc fe47 bl 8005674 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 80089e6: 687b ldr r3, [r7, #4] 80089e8: 2224 movs r2, #36 @ 0x24 80089ea: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 80089ee: 687b ldr r3, [r7, #4] 80089f0: 681b ldr r3, [r3, #0] 80089f2: 68da ldr r2, [r3, #12] 80089f4: 687b ldr r3, [r7, #4] 80089f6: 681b ldr r3, [r3, #0] 80089f8: f422 5200 bic.w r2, r2, #8192 @ 0x2000 80089fc: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 80089fe: 6878 ldr r0, [r7, #4] 8008a00: f000 fca2 bl 8009348 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8008a04: 687b ldr r3, [r7, #4] 8008a06: 681b ldr r3, [r3, #0] 8008a08: 691a ldr r2, [r3, #16] 8008a0a: 687b ldr r3, [r7, #4] 8008a0c: 681b ldr r3, [r3, #0] 8008a0e: f422 4290 bic.w r2, r2, #18432 @ 0x4800 8008a12: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8008a14: 687b ldr r3, [r7, #4] 8008a16: 681b ldr r3, [r3, #0] 8008a18: 695a ldr r2, [r3, #20] 8008a1a: 687b ldr r3, [r7, #4] 8008a1c: 681b ldr r3, [r3, #0] 8008a1e: f022 022a bic.w r2, r2, #42 @ 0x2a 8008a22: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 8008a24: 687b ldr r3, [r7, #4] 8008a26: 681b ldr r3, [r3, #0] 8008a28: 68da ldr r2, [r3, #12] 8008a2a: 687b ldr r3, [r7, #4] 8008a2c: 681b ldr r3, [r3, #0] 8008a2e: f442 5200 orr.w r2, r2, #8192 @ 0x2000 8008a32: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8008a34: 687b ldr r3, [r7, #4] 8008a36: 2200 movs r2, #0 8008a38: 641a str r2, [r3, #64] @ 0x40 huart->gState = HAL_UART_STATE_READY; 8008a3a: 687b ldr r3, [r7, #4] 8008a3c: 2220 movs r2, #32 8008a3e: f883 203d strb.w r2, [r3, #61] @ 0x3d huart->RxState = HAL_UART_STATE_READY; 8008a42: 687b ldr r3, [r7, #4] 8008a44: 2220 movs r2, #32 8008a46: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; 8008a4a: 2300 movs r3, #0 } 8008a4c: 4618 mov r0, r3 8008a4e: 3708 adds r7, #8 8008a50: 46bd mov sp, r7 8008a52: bd80 pop {r7, pc} 08008a54 : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8008a54: b580 push {r7, lr} 8008a56: b08a sub sp, #40 @ 0x28 8008a58: af02 add r7, sp, #8 8008a5a: 60f8 str r0, [r7, #12] 8008a5c: 60b9 str r1, [r7, #8] 8008a5e: 603b str r3, [r7, #0] 8008a60: 4613 mov r3, r2 8008a62: 80fb strh r3, [r7, #6] uint8_t *pdata8bits; uint16_t *pdata16bits; uint32_t tickstart = 0U; 8008a64: 2300 movs r3, #0 8008a66: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 8008a68: 68fb ldr r3, [r7, #12] 8008a6a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8008a6e: b2db uxtb r3, r3 8008a70: 2b20 cmp r3, #32 8008a72: d17c bne.n 8008b6e { if ((pData == NULL) || (Size == 0U)) 8008a74: 68bb ldr r3, [r7, #8] 8008a76: 2b00 cmp r3, #0 8008a78: d002 beq.n 8008a80 8008a7a: 88fb ldrh r3, [r7, #6] 8008a7c: 2b00 cmp r3, #0 8008a7e: d101 bne.n 8008a84 { return HAL_ERROR; 8008a80: 2301 movs r3, #1 8008a82: e075 b.n 8008b70 } /* Process Locked */ __HAL_LOCK(huart); 8008a84: 68fb ldr r3, [r7, #12] 8008a86: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8008a8a: 2b01 cmp r3, #1 8008a8c: d101 bne.n 8008a92 8008a8e: 2302 movs r3, #2 8008a90: e06e b.n 8008b70 8008a92: 68fb ldr r3, [r7, #12] 8008a94: 2201 movs r2, #1 8008a96: f883 203c strb.w r2, [r3, #60] @ 0x3c huart->ErrorCode = HAL_UART_ERROR_NONE; 8008a9a: 68fb ldr r3, [r7, #12] 8008a9c: 2200 movs r2, #0 8008a9e: 641a str r2, [r3, #64] @ 0x40 huart->gState = HAL_UART_STATE_BUSY_TX; 8008aa0: 68fb ldr r3, [r7, #12] 8008aa2: 2221 movs r2, #33 @ 0x21 8008aa4: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); 8008aa8: f7fc fec4 bl 8005834 8008aac: 6178 str r0, [r7, #20] huart->TxXferSize = Size; 8008aae: 68fb ldr r3, [r7, #12] 8008ab0: 88fa ldrh r2, [r7, #6] 8008ab2: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 8008ab4: 68fb ldr r3, [r7, #12] 8008ab6: 88fa ldrh r2, [r7, #6] 8008ab8: 84da strh r2, [r3, #38] @ 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8008aba: 68fb ldr r3, [r7, #12] 8008abc: 689b ldr r3, [r3, #8] 8008abe: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8008ac2: d108 bne.n 8008ad6 8008ac4: 68fb ldr r3, [r7, #12] 8008ac6: 691b ldr r3, [r3, #16] 8008ac8: 2b00 cmp r3, #0 8008aca: d104 bne.n 8008ad6 { pdata8bits = NULL; 8008acc: 2300 movs r3, #0 8008ace: 61fb str r3, [r7, #28] pdata16bits = (uint16_t *) pData; 8008ad0: 68bb ldr r3, [r7, #8] 8008ad2: 61bb str r3, [r7, #24] 8008ad4: e003 b.n 8008ade } else { pdata8bits = pData; 8008ad6: 68bb ldr r3, [r7, #8] 8008ad8: 61fb str r3, [r7, #28] pdata16bits = NULL; 8008ada: 2300 movs r3, #0 8008adc: 61bb str r3, [r7, #24] } /* Process Unlocked */ __HAL_UNLOCK(huart); 8008ade: 68fb ldr r3, [r7, #12] 8008ae0: 2200 movs r2, #0 8008ae2: f883 203c strb.w r2, [r3, #60] @ 0x3c while (huart->TxXferCount > 0U) 8008ae6: e02a b.n 8008b3e { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8008ae8: 683b ldr r3, [r7, #0] 8008aea: 9300 str r3, [sp, #0] 8008aec: 697b ldr r3, [r7, #20] 8008aee: 2200 movs r2, #0 8008af0: 2180 movs r1, #128 @ 0x80 8008af2: 68f8 ldr r0, [r7, #12] 8008af4: f000 fa55 bl 8008fa2 8008af8: 4603 mov r3, r0 8008afa: 2b00 cmp r3, #0 8008afc: d001 beq.n 8008b02 { return HAL_TIMEOUT; 8008afe: 2303 movs r3, #3 8008b00: e036 b.n 8008b70 } if (pdata8bits == NULL) 8008b02: 69fb ldr r3, [r7, #28] 8008b04: 2b00 cmp r3, #0 8008b06: d10b bne.n 8008b20 { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); 8008b08: 69bb ldr r3, [r7, #24] 8008b0a: 881b ldrh r3, [r3, #0] 8008b0c: 461a mov r2, r3 8008b0e: 68fb ldr r3, [r7, #12] 8008b10: 681b ldr r3, [r3, #0] 8008b12: f3c2 0208 ubfx r2, r2, #0, #9 8008b16: 605a str r2, [r3, #4] pdata16bits++; 8008b18: 69bb ldr r3, [r7, #24] 8008b1a: 3302 adds r3, #2 8008b1c: 61bb str r3, [r7, #24] 8008b1e: e007 b.n 8008b30 } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); 8008b20: 69fb ldr r3, [r7, #28] 8008b22: 781a ldrb r2, [r3, #0] 8008b24: 68fb ldr r3, [r7, #12] 8008b26: 681b ldr r3, [r3, #0] 8008b28: 605a str r2, [r3, #4] pdata8bits++; 8008b2a: 69fb ldr r3, [r7, #28] 8008b2c: 3301 adds r3, #1 8008b2e: 61fb str r3, [r7, #28] } huart->TxXferCount--; 8008b30: 68fb ldr r3, [r7, #12] 8008b32: 8cdb ldrh r3, [r3, #38] @ 0x26 8008b34: b29b uxth r3, r3 8008b36: 3b01 subs r3, #1 8008b38: b29a uxth r2, r3 8008b3a: 68fb ldr r3, [r7, #12] 8008b3c: 84da strh r2, [r3, #38] @ 0x26 while (huart->TxXferCount > 0U) 8008b3e: 68fb ldr r3, [r7, #12] 8008b40: 8cdb ldrh r3, [r3, #38] @ 0x26 8008b42: b29b uxth r3, r3 8008b44: 2b00 cmp r3, #0 8008b46: d1cf bne.n 8008ae8 } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8008b48: 683b ldr r3, [r7, #0] 8008b4a: 9300 str r3, [sp, #0] 8008b4c: 697b ldr r3, [r7, #20] 8008b4e: 2200 movs r2, #0 8008b50: 2140 movs r1, #64 @ 0x40 8008b52: 68f8 ldr r0, [r7, #12] 8008b54: f000 fa25 bl 8008fa2 8008b58: 4603 mov r3, r0 8008b5a: 2b00 cmp r3, #0 8008b5c: d001 beq.n 8008b62 { return HAL_TIMEOUT; 8008b5e: 2303 movs r3, #3 8008b60: e006 b.n 8008b70 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8008b62: 68fb ldr r3, [r7, #12] 8008b64: 2220 movs r2, #32 8008b66: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8008b6a: 2300 movs r3, #0 8008b6c: e000 b.n 8008b70 } else { return HAL_BUSY; 8008b6e: 2302 movs r3, #2 } } 8008b70: 4618 mov r0, r3 8008b72: 3720 adds r7, #32 8008b74: 46bd mov sp, r7 8008b76: bd80 pop {r7, pc} 08008b78 : * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). * @param Size Amount of data elements (uint8_t or uint16_t) to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8008b78: b580 push {r7, lr} 8008b7a: b086 sub sp, #24 8008b7c: af00 add r7, sp, #0 8008b7e: 60f8 str r0, [r7, #12] 8008b80: 60b9 str r1, [r7, #8] 8008b82: 4613 mov r3, r2 8008b84: 80fb strh r3, [r7, #6] HAL_StatusTypeDef status; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) 8008b86: 68fb ldr r3, [r7, #12] 8008b88: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8008b8c: b2db uxtb r3, r3 8008b8e: 2b20 cmp r3, #32 8008b90: d13c bne.n 8008c0c { if ((pData == NULL) || (Size == 0U)) 8008b92: 68bb ldr r3, [r7, #8] 8008b94: 2b00 cmp r3, #0 8008b96: d002 beq.n 8008b9e 8008b98: 88fb ldrh r3, [r7, #6] 8008b9a: 2b00 cmp r3, #0 8008b9c: d101 bne.n 8008ba2 { return HAL_ERROR; 8008b9e: 2301 movs r3, #1 8008ba0: e035 b.n 8008c0e } __HAL_LOCK(huart); 8008ba2: 68fb ldr r3, [r7, #12] 8008ba4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8008ba8: 2b01 cmp r3, #1 8008baa: d101 bne.n 8008bb0 8008bac: 2302 movs r3, #2 8008bae: e02e b.n 8008c0e 8008bb0: 68fb ldr r3, [r7, #12] 8008bb2: 2201 movs r2, #1 8008bb4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Set Reception type to reception till IDLE Event*/ huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; 8008bb8: 68fb ldr r3, [r7, #12] 8008bba: 2201 movs r2, #1 8008bbc: 631a str r2, [r3, #48] @ 0x30 status = UART_Start_Receive_IT(huart, pData, Size); 8008bbe: 88fb ldrh r3, [r7, #6] 8008bc0: 461a mov r2, r3 8008bc2: 68b9 ldr r1, [r7, #8] 8008bc4: 68f8 ldr r0, [r7, #12] 8008bc6: f000 fa36 bl 8009036 8008bca: 4603 mov r3, r0 8008bcc: 75fb strb r3, [r7, #23] /* Check Rx process has been successfully started */ if (status == HAL_OK) 8008bce: 7dfb ldrb r3, [r7, #23] 8008bd0: 2b00 cmp r3, #0 8008bd2: d119 bne.n 8008c08 { if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8008bd4: 68fb ldr r3, [r7, #12] 8008bd6: 6b1b ldr r3, [r3, #48] @ 0x30 8008bd8: 2b01 cmp r3, #1 8008bda: d113 bne.n 8008c04 { __HAL_UART_CLEAR_IDLEFLAG(huart); 8008bdc: 2300 movs r3, #0 8008bde: 613b str r3, [r7, #16] 8008be0: 68fb ldr r3, [r7, #12] 8008be2: 681b ldr r3, [r3, #0] 8008be4: 681b ldr r3, [r3, #0] 8008be6: 613b str r3, [r7, #16] 8008be8: 68fb ldr r3, [r7, #12] 8008bea: 681b ldr r3, [r3, #0] 8008bec: 685b ldr r3, [r3, #4] 8008bee: 613b str r3, [r7, #16] 8008bf0: 693b ldr r3, [r7, #16] SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8008bf2: 68fb ldr r3, [r7, #12] 8008bf4: 681b ldr r3, [r3, #0] 8008bf6: 68da ldr r2, [r3, #12] 8008bf8: 68fb ldr r3, [r7, #12] 8008bfa: 681b ldr r3, [r3, #0] 8008bfc: f042 0210 orr.w r2, r2, #16 8008c00: 60da str r2, [r3, #12] 8008c02: e001 b.n 8008c08 { /* In case of errors already pending when reception is started, Interrupts may have already been raised and lead to reception abortion. (Overrun error for instance). In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ status = HAL_ERROR; 8008c04: 2301 movs r3, #1 8008c06: 75fb strb r3, [r7, #23] } } return status; 8008c08: 7dfb ldrb r3, [r7, #23] 8008c0a: e000 b.n 8008c0e } else { return HAL_BUSY; 8008c0c: 2302 movs r3, #2 } } 8008c0e: 4618 mov r0, r3 8008c10: 3718 adds r7, #24 8008c12: 46bd mov sp, r7 8008c14: bd80 pop {r7, pc} ... 08008c18 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { 8008c18: b580 push {r7, lr} 8008c1a: b08a sub sp, #40 @ 0x28 8008c1c: af00 add r7, sp, #0 8008c1e: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); 8008c20: 687b ldr r3, [r7, #4] 8008c22: 681b ldr r3, [r3, #0] 8008c24: 681b ldr r3, [r3, #0] 8008c26: 627b str r3, [r7, #36] @ 0x24 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8008c28: 687b ldr r3, [r7, #4] 8008c2a: 681b ldr r3, [r3, #0] 8008c2c: 68db ldr r3, [r3, #12] 8008c2e: 623b str r3, [r7, #32] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8008c30: 687b ldr r3, [r7, #4] 8008c32: 681b ldr r3, [r3, #0] 8008c34: 695b ldr r3, [r3, #20] 8008c36: 61fb str r3, [r7, #28] uint32_t errorflags = 0x00U; 8008c38: 2300 movs r3, #0 8008c3a: 61bb str r3, [r7, #24] uint32_t dmarequest = 0x00U; 8008c3c: 2300 movs r3, #0 8008c3e: 617b str r3, [r7, #20] /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); 8008c40: 6a7b ldr r3, [r7, #36] @ 0x24 8008c42: f003 030f and.w r3, r3, #15 8008c46: 61bb str r3, [r7, #24] if (errorflags == RESET) 8008c48: 69bb ldr r3, [r7, #24] 8008c4a: 2b00 cmp r3, #0 8008c4c: d10d bne.n 8008c6a { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8008c4e: 6a7b ldr r3, [r7, #36] @ 0x24 8008c50: f003 0320 and.w r3, r3, #32 8008c54: 2b00 cmp r3, #0 8008c56: d008 beq.n 8008c6a 8008c58: 6a3b ldr r3, [r7, #32] 8008c5a: f003 0320 and.w r3, r3, #32 8008c5e: 2b00 cmp r3, #0 8008c60: d003 beq.n 8008c6a { UART_Receive_IT(huart); 8008c62: 6878 ldr r0, [r7, #4] 8008c64: f000 fac7 bl 80091f6 return; 8008c68: e17b b.n 8008f62 } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8008c6a: 69bb ldr r3, [r7, #24] 8008c6c: 2b00 cmp r3, #0 8008c6e: f000 80b1 beq.w 8008dd4 8008c72: 69fb ldr r3, [r7, #28] 8008c74: f003 0301 and.w r3, r3, #1 8008c78: 2b00 cmp r3, #0 8008c7a: d105 bne.n 8008c88 8008c7c: 6a3b ldr r3, [r7, #32] 8008c7e: f403 7390 and.w r3, r3, #288 @ 0x120 8008c82: 2b00 cmp r3, #0 8008c84: f000 80a6 beq.w 8008dd4 { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8008c88: 6a7b ldr r3, [r7, #36] @ 0x24 8008c8a: f003 0301 and.w r3, r3, #1 8008c8e: 2b00 cmp r3, #0 8008c90: d00a beq.n 8008ca8 8008c92: 6a3b ldr r3, [r7, #32] 8008c94: f403 7380 and.w r3, r3, #256 @ 0x100 8008c98: 2b00 cmp r3, #0 8008c9a: d005 beq.n 8008ca8 { huart->ErrorCode |= HAL_UART_ERROR_PE; 8008c9c: 687b ldr r3, [r7, #4] 8008c9e: 6c1b ldr r3, [r3, #64] @ 0x40 8008ca0: f043 0201 orr.w r2, r3, #1 8008ca4: 687b ldr r3, [r7, #4] 8008ca6: 641a str r2, [r3, #64] @ 0x40 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8008ca8: 6a7b ldr r3, [r7, #36] @ 0x24 8008caa: f003 0304 and.w r3, r3, #4 8008cae: 2b00 cmp r3, #0 8008cb0: d00a beq.n 8008cc8 8008cb2: 69fb ldr r3, [r7, #28] 8008cb4: f003 0301 and.w r3, r3, #1 8008cb8: 2b00 cmp r3, #0 8008cba: d005 beq.n 8008cc8 { huart->ErrorCode |= HAL_UART_ERROR_NE; 8008cbc: 687b ldr r3, [r7, #4] 8008cbe: 6c1b ldr r3, [r3, #64] @ 0x40 8008cc0: f043 0202 orr.w r2, r3, #2 8008cc4: 687b ldr r3, [r7, #4] 8008cc6: 641a str r2, [r3, #64] @ 0x40 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8008cc8: 6a7b ldr r3, [r7, #36] @ 0x24 8008cca: f003 0302 and.w r3, r3, #2 8008cce: 2b00 cmp r3, #0 8008cd0: d00a beq.n 8008ce8 8008cd2: 69fb ldr r3, [r7, #28] 8008cd4: f003 0301 and.w r3, r3, #1 8008cd8: 2b00 cmp r3, #0 8008cda: d005 beq.n 8008ce8 { huart->ErrorCode |= HAL_UART_ERROR_FE; 8008cdc: 687b ldr r3, [r7, #4] 8008cde: 6c1b ldr r3, [r3, #64] @ 0x40 8008ce0: f043 0204 orr.w r2, r3, #4 8008ce4: 687b ldr r3, [r7, #4] 8008ce6: 641a str r2, [r3, #64] @ 0x40 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET))) 8008ce8: 6a7b ldr r3, [r7, #36] @ 0x24 8008cea: f003 0308 and.w r3, r3, #8 8008cee: 2b00 cmp r3, #0 8008cf0: d00f beq.n 8008d12 8008cf2: 6a3b ldr r3, [r7, #32] 8008cf4: f003 0320 and.w r3, r3, #32 8008cf8: 2b00 cmp r3, #0 8008cfa: d104 bne.n 8008d06 8008cfc: 69fb ldr r3, [r7, #28] 8008cfe: f003 0301 and.w r3, r3, #1 8008d02: 2b00 cmp r3, #0 8008d04: d005 beq.n 8008d12 { huart->ErrorCode |= HAL_UART_ERROR_ORE; 8008d06: 687b ldr r3, [r7, #4] 8008d08: 6c1b ldr r3, [r3, #64] @ 0x40 8008d0a: f043 0208 orr.w r2, r3, #8 8008d0e: 687b ldr r3, [r7, #4] 8008d10: 641a str r2, [r3, #64] @ 0x40 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) 8008d12: 687b ldr r3, [r7, #4] 8008d14: 6c1b ldr r3, [r3, #64] @ 0x40 8008d16: 2b00 cmp r3, #0 8008d18: f000 811e beq.w 8008f58 { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8008d1c: 6a7b ldr r3, [r7, #36] @ 0x24 8008d1e: f003 0320 and.w r3, r3, #32 8008d22: 2b00 cmp r3, #0 8008d24: d007 beq.n 8008d36 8008d26: 6a3b ldr r3, [r7, #32] 8008d28: f003 0320 and.w r3, r3, #32 8008d2c: 2b00 cmp r3, #0 8008d2e: d002 beq.n 8008d36 { UART_Receive_IT(huart); 8008d30: 6878 ldr r0, [r7, #4] 8008d32: f000 fa60 bl 80091f6 } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8008d36: 687b ldr r3, [r7, #4] 8008d38: 681b ldr r3, [r3, #0] 8008d3a: 695b ldr r3, [r3, #20] 8008d3c: f003 0340 and.w r3, r3, #64 @ 0x40 8008d40: 2b00 cmp r3, #0 8008d42: bf14 ite ne 8008d44: 2301 movne r3, #1 8008d46: 2300 moveq r3, #0 8008d48: b2db uxtb r3, r3 8008d4a: 617b str r3, [r7, #20] if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8008d4c: 687b ldr r3, [r7, #4] 8008d4e: 6c1b ldr r3, [r3, #64] @ 0x40 8008d50: f003 0308 and.w r3, r3, #8 8008d54: 2b00 cmp r3, #0 8008d56: d102 bne.n 8008d5e 8008d58: 697b ldr r3, [r7, #20] 8008d5a: 2b00 cmp r3, #0 8008d5c: d031 beq.n 8008dc2 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); 8008d5e: 6878 ldr r0, [r7, #4] 8008d60: f000 f9a2 bl 80090a8 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8008d64: 687b ldr r3, [r7, #4] 8008d66: 681b ldr r3, [r3, #0] 8008d68: 695b ldr r3, [r3, #20] 8008d6a: f003 0340 and.w r3, r3, #64 @ 0x40 8008d6e: 2b00 cmp r3, #0 8008d70: d023 beq.n 8008dba { CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8008d72: 687b ldr r3, [r7, #4] 8008d74: 681b ldr r3, [r3, #0] 8008d76: 695a ldr r2, [r3, #20] 8008d78: 687b ldr r3, [r7, #4] 8008d7a: 681b ldr r3, [r3, #0] 8008d7c: f022 0240 bic.w r2, r2, #64 @ 0x40 8008d80: 615a str r2, [r3, #20] /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) 8008d82: 687b ldr r3, [r7, #4] 8008d84: 6b9b ldr r3, [r3, #56] @ 0x38 8008d86: 2b00 cmp r3, #0 8008d88: d013 beq.n 8008db2 { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8008d8a: 687b ldr r3, [r7, #4] 8008d8c: 6b9b ldr r3, [r3, #56] @ 0x38 8008d8e: 4a76 ldr r2, [pc, #472] @ (8008f68 ) 8008d90: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8008d92: 687b ldr r3, [r7, #4] 8008d94: 6b9b ldr r3, [r3, #56] @ 0x38 8008d96: 4618 mov r0, r3 8008d98: f7fe fa72 bl 8007280 8008d9c: 4603 mov r3, r0 8008d9e: 2b00 cmp r3, #0 8008da0: d016 beq.n 8008dd0 { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); 8008da2: 687b ldr r3, [r7, #4] 8008da4: 6b9b ldr r3, [r3, #56] @ 0x38 8008da6: 6b5b ldr r3, [r3, #52] @ 0x34 8008da8: 687a ldr r2, [r7, #4] 8008daa: 6b92 ldr r2, [r2, #56] @ 0x38 8008dac: 4610 mov r0, r2 8008dae: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8008db0: e00e b.n 8008dd0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8008db2: 6878 ldr r0, [r7, #4] 8008db4: f000 f8ec bl 8008f90 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8008db8: e00a b.n 8008dd0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8008dba: 6878 ldr r0, [r7, #4] 8008dbc: f000 f8e8 bl 8008f90 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8008dc0: e006 b.n 8008dd0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8008dc2: 6878 ldr r0, [r7, #4] 8008dc4: f000 f8e4 bl 8008f90 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8008dc8: 687b ldr r3, [r7, #4] 8008dca: 2200 movs r2, #0 8008dcc: 641a str r2, [r3, #64] @ 0x40 } } return; 8008dce: e0c3 b.n 8008f58 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8008dd0: bf00 nop return; 8008dd2: e0c1 b.n 8008f58 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ( (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8008dd4: 687b ldr r3, [r7, #4] 8008dd6: 6b1b ldr r3, [r3, #48] @ 0x30 8008dd8: 2b01 cmp r3, #1 8008dda: f040 80a1 bne.w 8008f20 &&((isrflags & USART_SR_IDLE) != 0U) 8008dde: 6a7b ldr r3, [r7, #36] @ 0x24 8008de0: f003 0310 and.w r3, r3, #16 8008de4: 2b00 cmp r3, #0 8008de6: f000 809b beq.w 8008f20 &&((cr1its & USART_SR_IDLE) != 0U)) 8008dea: 6a3b ldr r3, [r7, #32] 8008dec: f003 0310 and.w r3, r3, #16 8008df0: 2b00 cmp r3, #0 8008df2: f000 8095 beq.w 8008f20 { __HAL_UART_CLEAR_IDLEFLAG(huart); 8008df6: 2300 movs r3, #0 8008df8: 60fb str r3, [r7, #12] 8008dfa: 687b ldr r3, [r7, #4] 8008dfc: 681b ldr r3, [r3, #0] 8008dfe: 681b ldr r3, [r3, #0] 8008e00: 60fb str r3, [r7, #12] 8008e02: 687b ldr r3, [r7, #4] 8008e04: 681b ldr r3, [r3, #0] 8008e06: 685b ldr r3, [r3, #4] 8008e08: 60fb str r3, [r7, #12] 8008e0a: 68fb ldr r3, [r7, #12] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8008e0c: 687b ldr r3, [r7, #4] 8008e0e: 681b ldr r3, [r3, #0] 8008e10: 695b ldr r3, [r3, #20] 8008e12: f003 0340 and.w r3, r3, #64 @ 0x40 8008e16: 2b00 cmp r3, #0 8008e18: d04e beq.n 8008eb8 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); 8008e1a: 687b ldr r3, [r7, #4] 8008e1c: 6b9b ldr r3, [r3, #56] @ 0x38 8008e1e: 681b ldr r3, [r3, #0] 8008e20: 685b ldr r3, [r3, #4] 8008e22: 823b strh r3, [r7, #16] if ( (nb_remaining_rx_data > 0U) 8008e24: 8a3b ldrh r3, [r7, #16] 8008e26: 2b00 cmp r3, #0 8008e28: f000 8098 beq.w 8008f5c &&(nb_remaining_rx_data < huart->RxXferSize)) 8008e2c: 687b ldr r3, [r7, #4] 8008e2e: 8d9b ldrh r3, [r3, #44] @ 0x2c 8008e30: 8a3a ldrh r2, [r7, #16] 8008e32: 429a cmp r2, r3 8008e34: f080 8092 bcs.w 8008f5c { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; 8008e38: 687b ldr r3, [r7, #4] 8008e3a: 8a3a ldrh r2, [r7, #16] 8008e3c: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) 8008e3e: 687b ldr r3, [r7, #4] 8008e40: 6b9b ldr r3, [r3, #56] @ 0x38 8008e42: 699b ldr r3, [r3, #24] 8008e44: 2b20 cmp r3, #32 8008e46: d02b beq.n 8008ea0 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8008e48: 687b ldr r3, [r7, #4] 8008e4a: 681b ldr r3, [r3, #0] 8008e4c: 68da ldr r2, [r3, #12] 8008e4e: 687b ldr r3, [r7, #4] 8008e50: 681b ldr r3, [r3, #0] 8008e52: f422 7280 bic.w r2, r2, #256 @ 0x100 8008e56: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8008e58: 687b ldr r3, [r7, #4] 8008e5a: 681b ldr r3, [r3, #0] 8008e5c: 695a ldr r2, [r3, #20] 8008e5e: 687b ldr r3, [r7, #4] 8008e60: 681b ldr r3, [r3, #0] 8008e62: f022 0201 bic.w r2, r2, #1 8008e66: 615a str r2, [r3, #20] /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8008e68: 687b ldr r3, [r7, #4] 8008e6a: 681b ldr r3, [r3, #0] 8008e6c: 695a ldr r2, [r3, #20] 8008e6e: 687b ldr r3, [r7, #4] 8008e70: 681b ldr r3, [r3, #0] 8008e72: f022 0240 bic.w r2, r2, #64 @ 0x40 8008e76: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8008e78: 687b ldr r3, [r7, #4] 8008e7a: 2220 movs r2, #32 8008e7c: f883 203e strb.w r2, [r3, #62] @ 0x3e huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8008e80: 687b ldr r3, [r7, #4] 8008e82: 2200 movs r2, #0 8008e84: 631a str r2, [r3, #48] @ 0x30 CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8008e86: 687b ldr r3, [r7, #4] 8008e88: 681b ldr r3, [r3, #0] 8008e8a: 68da ldr r2, [r3, #12] 8008e8c: 687b ldr r3, [r7, #4] 8008e8e: 681b ldr r3, [r3, #0] 8008e90: f022 0210 bic.w r2, r2, #16 8008e94: 60da str r2, [r3, #12] /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); 8008e96: 687b ldr r3, [r7, #4] 8008e98: 6b9b ldr r3, [r3, #56] @ 0x38 8008e9a: 4618 mov r0, r3 8008e9c: f7fe f9b5 bl 800720a #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); 8008ea0: 687b ldr r3, [r7, #4] 8008ea2: 8d9a ldrh r2, [r3, #44] @ 0x2c 8008ea4: 687b ldr r3, [r7, #4] 8008ea6: 8ddb ldrh r3, [r3, #46] @ 0x2e 8008ea8: b29b uxth r3, r3 8008eaa: 1ad3 subs r3, r2, r3 8008eac: b29b uxth r3, r3 8008eae: 4619 mov r1, r3 8008eb0: 6878 ldr r0, [r7, #4] 8008eb2: f7f9 ff13 bl 8002cdc #endif } return; 8008eb6: e051 b.n 8008f5c else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8008eb8: 687b ldr r3, [r7, #4] 8008eba: 8d9a ldrh r2, [r3, #44] @ 0x2c 8008ebc: 687b ldr r3, [r7, #4] 8008ebe: 8ddb ldrh r3, [r3, #46] @ 0x2e 8008ec0: b29b uxth r3, r3 8008ec2: 1ad3 subs r3, r2, r3 8008ec4: 827b strh r3, [r7, #18] if ( (huart->RxXferCount > 0U) 8008ec6: 687b ldr r3, [r7, #4] 8008ec8: 8ddb ldrh r3, [r3, #46] @ 0x2e 8008eca: b29b uxth r3, r3 8008ecc: 2b00 cmp r3, #0 8008ece: d047 beq.n 8008f60 &&(nb_rx_data > 0U) ) 8008ed0: 8a7b ldrh r3, [r7, #18] 8008ed2: 2b00 cmp r3, #0 8008ed4: d044 beq.n 8008f60 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8008ed6: 687b ldr r3, [r7, #4] 8008ed8: 681b ldr r3, [r3, #0] 8008eda: 68da ldr r2, [r3, #12] 8008edc: 687b ldr r3, [r7, #4] 8008ede: 681b ldr r3, [r3, #0] 8008ee0: f422 7290 bic.w r2, r2, #288 @ 0x120 8008ee4: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8008ee6: 687b ldr r3, [r7, #4] 8008ee8: 681b ldr r3, [r3, #0] 8008eea: 695a ldr r2, [r3, #20] 8008eec: 687b ldr r3, [r7, #4] 8008eee: 681b ldr r3, [r3, #0] 8008ef0: f022 0201 bic.w r2, r2, #1 8008ef4: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8008ef6: 687b ldr r3, [r7, #4] 8008ef8: 2220 movs r2, #32 8008efa: f883 203e strb.w r2, [r3, #62] @ 0x3e huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8008efe: 687b ldr r3, [r7, #4] 8008f00: 2200 movs r2, #0 8008f02: 631a str r2, [r3, #48] @ 0x30 CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8008f04: 687b ldr r3, [r7, #4] 8008f06: 681b ldr r3, [r3, #0] 8008f08: 68da ldr r2, [r3, #12] 8008f0a: 687b ldr r3, [r7, #4] 8008f0c: 681b ldr r3, [r3, #0] 8008f0e: f022 0210 bic.w r2, r2, #16 8008f12: 60da str r2, [r3, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); 8008f14: 8a7b ldrh r3, [r7, #18] 8008f16: 4619 mov r1, r3 8008f18: 6878 ldr r0, [r7, #4] 8008f1a: f7f9 fedf bl 8002cdc #endif } return; 8008f1e: e01f b.n 8008f60 } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8008f20: 6a7b ldr r3, [r7, #36] @ 0x24 8008f22: f003 0380 and.w r3, r3, #128 @ 0x80 8008f26: 2b00 cmp r3, #0 8008f28: d008 beq.n 8008f3c 8008f2a: 6a3b ldr r3, [r7, #32] 8008f2c: f003 0380 and.w r3, r3, #128 @ 0x80 8008f30: 2b00 cmp r3, #0 8008f32: d003 beq.n 8008f3c { UART_Transmit_IT(huart); 8008f34: 6878 ldr r0, [r7, #4] 8008f36: f000 f8f7 bl 8009128 return; 8008f3a: e012 b.n 8008f62 } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8008f3c: 6a7b ldr r3, [r7, #36] @ 0x24 8008f3e: f003 0340 and.w r3, r3, #64 @ 0x40 8008f42: 2b00 cmp r3, #0 8008f44: d00d beq.n 8008f62 8008f46: 6a3b ldr r3, [r7, #32] 8008f48: f003 0340 and.w r3, r3, #64 @ 0x40 8008f4c: 2b00 cmp r3, #0 8008f4e: d008 beq.n 8008f62 { UART_EndTransmit_IT(huart); 8008f50: 6878 ldr r0, [r7, #4] 8008f52: f000 f938 bl 80091c6 return; 8008f56: e004 b.n 8008f62 return; 8008f58: bf00 nop 8008f5a: e002 b.n 8008f62 return; 8008f5c: bf00 nop 8008f5e: e000 b.n 8008f62 return; 8008f60: bf00 nop } } 8008f62: 3728 adds r7, #40 @ 0x28 8008f64: 46bd mov sp, r7 8008f66: bd80 pop {r7, pc} 8008f68: 08009101 .word 0x08009101 08008f6c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { 8008f6c: b480 push {r7} 8008f6e: b083 sub sp, #12 8008f70: af00 add r7, sp, #0 8008f72: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxCpltCallback could be implemented in the user file */ } 8008f74: bf00 nop 8008f76: 370c adds r7, #12 8008f78: 46bd mov sp, r7 8008f7a: bc80 pop {r7} 8008f7c: 4770 bx lr 08008f7e : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { 8008f7e: b480 push {r7} 8008f80: b083 sub sp, #12 8008f82: af00 add r7, sp, #0 8008f84: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } 8008f86: bf00 nop 8008f88: 370c adds r7, #12 8008f8a: 46bd mov sp, r7 8008f8c: bc80 pop {r7} 8008f8e: 4770 bx lr 08008f90 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { 8008f90: b480 push {r7} 8008f92: b083 sub sp, #12 8008f94: af00 add r7, sp, #0 8008f96: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } 8008f98: bf00 nop 8008f9a: 370c adds r7, #12 8008f9c: 46bd mov sp, r7 8008f9e: bc80 pop {r7} 8008fa0: 4770 bx lr 08008fa2 : * @param Tickstart Tick start value * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { 8008fa2: b580 push {r7, lr} 8008fa4: b084 sub sp, #16 8008fa6: af00 add r7, sp, #0 8008fa8: 60f8 str r0, [r7, #12] 8008faa: 60b9 str r1, [r7, #8] 8008fac: 603b str r3, [r7, #0] 8008fae: 4613 mov r3, r2 8008fb0: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8008fb2: e02c b.n 800900e { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8008fb4: 69bb ldr r3, [r7, #24] 8008fb6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8008fba: d028 beq.n 800900e { if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) 8008fbc: 69bb ldr r3, [r7, #24] 8008fbe: 2b00 cmp r3, #0 8008fc0: d007 beq.n 8008fd2 8008fc2: f7fc fc37 bl 8005834 8008fc6: 4602 mov r2, r0 8008fc8: 683b ldr r3, [r7, #0] 8008fca: 1ad3 subs r3, r2, r3 8008fcc: 69ba ldr r2, [r7, #24] 8008fce: 429a cmp r2, r3 8008fd0: d21d bcs.n 800900e { /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8008fd2: 68fb ldr r3, [r7, #12] 8008fd4: 681b ldr r3, [r3, #0] 8008fd6: 68da ldr r2, [r3, #12] 8008fd8: 68fb ldr r3, [r7, #12] 8008fda: 681b ldr r3, [r3, #0] 8008fdc: f422 72d0 bic.w r2, r2, #416 @ 0x1a0 8008fe0: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8008fe2: 68fb ldr r3, [r7, #12] 8008fe4: 681b ldr r3, [r3, #0] 8008fe6: 695a ldr r2, [r3, #20] 8008fe8: 68fb ldr r3, [r7, #12] 8008fea: 681b ldr r3, [r3, #0] 8008fec: f022 0201 bic.w r2, r2, #1 8008ff0: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 8008ff2: 68fb ldr r3, [r7, #12] 8008ff4: 2220 movs r2, #32 8008ff6: f883 203d strb.w r2, [r3, #61] @ 0x3d huart->RxState = HAL_UART_STATE_READY; 8008ffa: 68fb ldr r3, [r7, #12] 8008ffc: 2220 movs r2, #32 8008ffe: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(huart); 8009002: 68fb ldr r3, [r7, #12] 8009004: 2200 movs r2, #0 8009006: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_TIMEOUT; 800900a: 2303 movs r3, #3 800900c: e00f b.n 800902e while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 800900e: 68fb ldr r3, [r7, #12] 8009010: 681b ldr r3, [r3, #0] 8009012: 681a ldr r2, [r3, #0] 8009014: 68bb ldr r3, [r7, #8] 8009016: 4013 ands r3, r2 8009018: 68ba ldr r2, [r7, #8] 800901a: 429a cmp r2, r3 800901c: bf0c ite eq 800901e: 2301 moveq r3, #1 8009020: 2300 movne r3, #0 8009022: b2db uxtb r3, r3 8009024: 461a mov r2, r3 8009026: 79fb ldrb r3, [r7, #7] 8009028: 429a cmp r2, r3 800902a: d0c3 beq.n 8008fb4 } } } return HAL_OK; 800902c: 2300 movs r3, #0 } 800902e: 4618 mov r0, r3 8009030: 3710 adds r7, #16 8009032: 46bd mov sp, r7 8009034: bd80 pop {r7, pc} 08009036 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8009036: b480 push {r7} 8009038: b085 sub sp, #20 800903a: af00 add r7, sp, #0 800903c: 60f8 str r0, [r7, #12] 800903e: 60b9 str r1, [r7, #8] 8009040: 4613 mov r3, r2 8009042: 80fb strh r3, [r7, #6] huart->pRxBuffPtr = pData; 8009044: 68fb ldr r3, [r7, #12] 8009046: 68ba ldr r2, [r7, #8] 8009048: 629a str r2, [r3, #40] @ 0x28 huart->RxXferSize = Size; 800904a: 68fb ldr r3, [r7, #12] 800904c: 88fa ldrh r2, [r7, #6] 800904e: 859a strh r2, [r3, #44] @ 0x2c huart->RxXferCount = Size; 8009050: 68fb ldr r3, [r7, #12] 8009052: 88fa ldrh r2, [r7, #6] 8009054: 85da strh r2, [r3, #46] @ 0x2e huart->ErrorCode = HAL_UART_ERROR_NONE; 8009056: 68fb ldr r3, [r7, #12] 8009058: 2200 movs r2, #0 800905a: 641a str r2, [r3, #64] @ 0x40 huart->RxState = HAL_UART_STATE_BUSY_RX; 800905c: 68fb ldr r3, [r7, #12] 800905e: 2222 movs r2, #34 @ 0x22 8009060: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(huart); 8009064: 68fb ldr r3, [r7, #12] 8009066: 2200 movs r2, #0 8009068: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Enable the UART Parity Error Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 800906c: 68fb ldr r3, [r7, #12] 800906e: 681b ldr r3, [r3, #0] 8009070: 68da ldr r2, [r3, #12] 8009072: 68fb ldr r3, [r7, #12] 8009074: 681b ldr r3, [r3, #0] 8009076: f442 7280 orr.w r2, r2, #256 @ 0x100 800907a: 60da str r2, [r3, #12] /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 800907c: 68fb ldr r3, [r7, #12] 800907e: 681b ldr r3, [r3, #0] 8009080: 695a ldr r2, [r3, #20] 8009082: 68fb ldr r3, [r7, #12] 8009084: 681b ldr r3, [r3, #0] 8009086: f042 0201 orr.w r2, r2, #1 800908a: 615a str r2, [r3, #20] /* Enable the UART Data Register not empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 800908c: 68fb ldr r3, [r7, #12] 800908e: 681b ldr r3, [r3, #0] 8009090: 68da ldr r2, [r3, #12] 8009092: 68fb ldr r3, [r7, #12] 8009094: 681b ldr r3, [r3, #0] 8009096: f042 0220 orr.w r2, r2, #32 800909a: 60da str r2, [r3, #12] return HAL_OK; 800909c: 2300 movs r3, #0 } 800909e: 4618 mov r0, r3 80090a0: 3714 adds r7, #20 80090a2: 46bd mov sp, r7 80090a4: bc80 pop {r7} 80090a6: 4770 bx lr 080090a8 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 80090a8: b480 push {r7} 80090aa: b083 sub sp, #12 80090ac: af00 add r7, sp, #0 80090ae: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80090b0: 687b ldr r3, [r7, #4] 80090b2: 681b ldr r3, [r3, #0] 80090b4: 68da ldr r2, [r3, #12] 80090b6: 687b ldr r3, [r7, #4] 80090b8: 681b ldr r3, [r3, #0] 80090ba: f422 7290 bic.w r2, r2, #288 @ 0x120 80090be: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80090c0: 687b ldr r3, [r7, #4] 80090c2: 681b ldr r3, [r3, #0] 80090c4: 695a ldr r2, [r3, #20] 80090c6: 687b ldr r3, [r7, #4] 80090c8: 681b ldr r3, [r3, #0] 80090ca: f022 0201 bic.w r2, r2, #1 80090ce: 615a str r2, [r3, #20] /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 80090d0: 687b ldr r3, [r7, #4] 80090d2: 6b1b ldr r3, [r3, #48] @ 0x30 80090d4: 2b01 cmp r3, #1 80090d6: d107 bne.n 80090e8 { CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 80090d8: 687b ldr r3, [r7, #4] 80090da: 681b ldr r3, [r3, #0] 80090dc: 68da ldr r2, [r3, #12] 80090de: 687b ldr r3, [r7, #4] 80090e0: 681b ldr r3, [r3, #0] 80090e2: f022 0210 bic.w r2, r2, #16 80090e6: 60da str r2, [r3, #12] } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 80090e8: 687b ldr r3, [r7, #4] 80090ea: 2220 movs r2, #32 80090ec: f883 203e strb.w r2, [r3, #62] @ 0x3e huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80090f0: 687b ldr r3, [r7, #4] 80090f2: 2200 movs r2, #0 80090f4: 631a str r2, [r3, #48] @ 0x30 } 80090f6: bf00 nop 80090f8: 370c adds r7, #12 80090fa: 46bd mov sp, r7 80090fc: bc80 pop {r7} 80090fe: 4770 bx lr 08009100 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { 8009100: b580 push {r7, lr} 8009102: b084 sub sp, #16 8009104: af00 add r7, sp, #0 8009106: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8009108: 687b ldr r3, [r7, #4] 800910a: 6a5b ldr r3, [r3, #36] @ 0x24 800910c: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; 800910e: 68fb ldr r3, [r7, #12] 8009110: 2200 movs r2, #0 8009112: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; 8009114: 68fb ldr r3, [r7, #12] 8009116: 2200 movs r2, #0 8009118: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 800911a: 68f8 ldr r0, [r7, #12] 800911c: f7ff ff38 bl 8008f90 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8009120: bf00 nop 8009122: 3710 adds r7, #16 8009124: 46bd mov sp, r7 8009126: bd80 pop {r7, pc} 08009128 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { 8009128: b480 push {r7} 800912a: b085 sub sp, #20 800912c: af00 add r7, sp, #0 800912e: 6078 str r0, [r7, #4] uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) 8009130: 687b ldr r3, [r7, #4] 8009132: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8009136: b2db uxtb r3, r3 8009138: 2b21 cmp r3, #33 @ 0x21 800913a: d13e bne.n 80091ba { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 800913c: 687b ldr r3, [r7, #4] 800913e: 689b ldr r3, [r3, #8] 8009140: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009144: d114 bne.n 8009170 8009146: 687b ldr r3, [r7, #4] 8009148: 691b ldr r3, [r3, #16] 800914a: 2b00 cmp r3, #0 800914c: d110 bne.n 8009170 { tmp = (uint16_t *) huart->pTxBuffPtr; 800914e: 687b ldr r3, [r7, #4] 8009150: 6a1b ldr r3, [r3, #32] 8009152: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8009154: 68fb ldr r3, [r7, #12] 8009156: 881b ldrh r3, [r3, #0] 8009158: 461a mov r2, r3 800915a: 687b ldr r3, [r7, #4] 800915c: 681b ldr r3, [r3, #0] 800915e: f3c2 0208 ubfx r2, r2, #0, #9 8009162: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; 8009164: 687b ldr r3, [r7, #4] 8009166: 6a1b ldr r3, [r3, #32] 8009168: 1c9a adds r2, r3, #2 800916a: 687b ldr r3, [r7, #4] 800916c: 621a str r2, [r3, #32] 800916e: e008 b.n 8009182 } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8009170: 687b ldr r3, [r7, #4] 8009172: 6a1b ldr r3, [r3, #32] 8009174: 1c59 adds r1, r3, #1 8009176: 687a ldr r2, [r7, #4] 8009178: 6211 str r1, [r2, #32] 800917a: 781a ldrb r2, [r3, #0] 800917c: 687b ldr r3, [r7, #4] 800917e: 681b ldr r3, [r3, #0] 8009180: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) 8009182: 687b ldr r3, [r7, #4] 8009184: 8cdb ldrh r3, [r3, #38] @ 0x26 8009186: b29b uxth r3, r3 8009188: 3b01 subs r3, #1 800918a: b29b uxth r3, r3 800918c: 687a ldr r2, [r7, #4] 800918e: 4619 mov r1, r3 8009190: 84d1 strh r1, [r2, #38] @ 0x26 8009192: 2b00 cmp r3, #0 8009194: d10f bne.n 80091b6 { /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8009196: 687b ldr r3, [r7, #4] 8009198: 681b ldr r3, [r3, #0] 800919a: 68da ldr r2, [r3, #12] 800919c: 687b ldr r3, [r7, #4] 800919e: 681b ldr r3, [r3, #0] 80091a0: f022 0280 bic.w r2, r2, #128 @ 0x80 80091a4: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 80091a6: 687b ldr r3, [r7, #4] 80091a8: 681b ldr r3, [r3, #0] 80091aa: 68da ldr r2, [r3, #12] 80091ac: 687b ldr r3, [r7, #4] 80091ae: 681b ldr r3, [r3, #0] 80091b0: f042 0240 orr.w r2, r2, #64 @ 0x40 80091b4: 60da str r2, [r3, #12] } return HAL_OK; 80091b6: 2300 movs r3, #0 80091b8: e000 b.n 80091bc } else { return HAL_BUSY; 80091ba: 2302 movs r3, #2 } } 80091bc: 4618 mov r0, r3 80091be: 3714 adds r7, #20 80091c0: 46bd mov sp, r7 80091c2: bc80 pop {r7} 80091c4: 4770 bx lr 080091c6 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { 80091c6: b580 push {r7, lr} 80091c8: b082 sub sp, #8 80091ca: af00 add r7, sp, #0 80091cc: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80091ce: 687b ldr r3, [r7, #4] 80091d0: 681b ldr r3, [r3, #0] 80091d2: 68da ldr r2, [r3, #12] 80091d4: 687b ldr r3, [r7, #4] 80091d6: 681b ldr r3, [r3, #0] 80091d8: f022 0240 bic.w r2, r2, #64 @ 0x40 80091dc: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 80091de: 687b ldr r3, [r7, #4] 80091e0: 2220 movs r2, #32 80091e2: f883 203d strb.w r2, [r3, #61] @ 0x3d #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); 80091e6: 6878 ldr r0, [r7, #4] 80091e8: f7ff fec0 bl 8008f6c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; 80091ec: 2300 movs r3, #0 } 80091ee: 4618 mov r0, r3 80091f0: 3708 adds r7, #8 80091f2: 46bd mov sp, r7 80091f4: bd80 pop {r7, pc} 080091f6 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { 80091f6: b580 push {r7, lr} 80091f8: b086 sub sp, #24 80091fa: af00 add r7, sp, #0 80091fc: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) 80091fe: 687b ldr r3, [r7, #4] 8009200: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8009204: b2db uxtb r3, r3 8009206: 2b22 cmp r3, #34 @ 0x22 8009208: f040 8099 bne.w 800933e { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 800920c: 687b ldr r3, [r7, #4] 800920e: 689b ldr r3, [r3, #8] 8009210: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009214: d117 bne.n 8009246 8009216: 687b ldr r3, [r7, #4] 8009218: 691b ldr r3, [r3, #16] 800921a: 2b00 cmp r3, #0 800921c: d113 bne.n 8009246 { pdata8bits = NULL; 800921e: 2300 movs r3, #0 8009220: 617b str r3, [r7, #20] pdata16bits = (uint16_t *) huart->pRxBuffPtr; 8009222: 687b ldr r3, [r7, #4] 8009224: 6a9b ldr r3, [r3, #40] @ 0x28 8009226: 613b str r3, [r7, #16] *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8009228: 687b ldr r3, [r7, #4] 800922a: 681b ldr r3, [r3, #0] 800922c: 685b ldr r3, [r3, #4] 800922e: b29b uxth r3, r3 8009230: f3c3 0308 ubfx r3, r3, #0, #9 8009234: b29a uxth r2, r3 8009236: 693b ldr r3, [r7, #16] 8009238: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; 800923a: 687b ldr r3, [r7, #4] 800923c: 6a9b ldr r3, [r3, #40] @ 0x28 800923e: 1c9a adds r2, r3, #2 8009240: 687b ldr r3, [r7, #4] 8009242: 629a str r2, [r3, #40] @ 0x28 8009244: e026 b.n 8009294 } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; 8009246: 687b ldr r3, [r7, #4] 8009248: 6a9b ldr r3, [r3, #40] @ 0x28 800924a: 617b str r3, [r7, #20] pdata16bits = NULL; 800924c: 2300 movs r3, #0 800924e: 613b str r3, [r7, #16] if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) 8009250: 687b ldr r3, [r7, #4] 8009252: 689b ldr r3, [r3, #8] 8009254: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009258: d007 beq.n 800926a 800925a: 687b ldr r3, [r7, #4] 800925c: 689b ldr r3, [r3, #8] 800925e: 2b00 cmp r3, #0 8009260: d10a bne.n 8009278 8009262: 687b ldr r3, [r7, #4] 8009264: 691b ldr r3, [r3, #16] 8009266: 2b00 cmp r3, #0 8009268: d106 bne.n 8009278 { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 800926a: 687b ldr r3, [r7, #4] 800926c: 681b ldr r3, [r3, #0] 800926e: 685b ldr r3, [r3, #4] 8009270: b2da uxtb r2, r3 8009272: 697b ldr r3, [r7, #20] 8009274: 701a strb r2, [r3, #0] 8009276: e008 b.n 800928a } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 8009278: 687b ldr r3, [r7, #4] 800927a: 681b ldr r3, [r3, #0] 800927c: 685b ldr r3, [r3, #4] 800927e: b2db uxtb r3, r3 8009280: f003 037f and.w r3, r3, #127 @ 0x7f 8009284: b2da uxtb r2, r3 8009286: 697b ldr r3, [r7, #20] 8009288: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; 800928a: 687b ldr r3, [r7, #4] 800928c: 6a9b ldr r3, [r3, #40] @ 0x28 800928e: 1c5a adds r2, r3, #1 8009290: 687b ldr r3, [r7, #4] 8009292: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) 8009294: 687b ldr r3, [r7, #4] 8009296: 8ddb ldrh r3, [r3, #46] @ 0x2e 8009298: b29b uxth r3, r3 800929a: 3b01 subs r3, #1 800929c: b29b uxth r3, r3 800929e: 687a ldr r2, [r7, #4] 80092a0: 4619 mov r1, r3 80092a2: 85d1 strh r1, [r2, #46] @ 0x2e 80092a4: 2b00 cmp r3, #0 80092a6: d148 bne.n 800933a { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80092a8: 687b ldr r3, [r7, #4] 80092aa: 681b ldr r3, [r3, #0] 80092ac: 68da ldr r2, [r3, #12] 80092ae: 687b ldr r3, [r7, #4] 80092b0: 681b ldr r3, [r3, #0] 80092b2: f022 0220 bic.w r2, r2, #32 80092b6: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80092b8: 687b ldr r3, [r7, #4] 80092ba: 681b ldr r3, [r3, #0] 80092bc: 68da ldr r2, [r3, #12] 80092be: 687b ldr r3, [r7, #4] 80092c0: 681b ldr r3, [r3, #0] 80092c2: f422 7280 bic.w r2, r2, #256 @ 0x100 80092c6: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80092c8: 687b ldr r3, [r7, #4] 80092ca: 681b ldr r3, [r3, #0] 80092cc: 695a ldr r2, [r3, #20] 80092ce: 687b ldr r3, [r7, #4] 80092d0: 681b ldr r3, [r3, #0] 80092d2: f022 0201 bic.w r2, r2, #1 80092d6: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 80092d8: 687b ldr r3, [r7, #4] 80092da: 2220 movs r2, #32 80092dc: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 80092e0: 687b ldr r3, [r7, #4] 80092e2: 6b1b ldr r3, [r3, #48] @ 0x30 80092e4: 2b01 cmp r3, #1 80092e6: d123 bne.n 8009330 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80092e8: 687b ldr r3, [r7, #4] 80092ea: 2200 movs r2, #0 80092ec: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 80092ee: 687b ldr r3, [r7, #4] 80092f0: 681b ldr r3, [r3, #0] 80092f2: 68da ldr r2, [r3, #12] 80092f4: 687b ldr r3, [r7, #4] 80092f6: 681b ldr r3, [r3, #0] 80092f8: f022 0210 bic.w r2, r2, #16 80092fc: 60da str r2, [r3, #12] /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) 80092fe: 687b ldr r3, [r7, #4] 8009300: 681b ldr r3, [r3, #0] 8009302: 681b ldr r3, [r3, #0] 8009304: f003 0310 and.w r3, r3, #16 8009308: 2b10 cmp r3, #16 800930a: d10a bne.n 8009322 { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); 800930c: 2300 movs r3, #0 800930e: 60fb str r3, [r7, #12] 8009310: 687b ldr r3, [r7, #4] 8009312: 681b ldr r3, [r3, #0] 8009314: 681b ldr r3, [r3, #0] 8009316: 60fb str r3, [r7, #12] 8009318: 687b ldr r3, [r7, #4] 800931a: 681b ldr r3, [r3, #0] 800931c: 685b ldr r3, [r3, #4] 800931e: 60fb str r3, [r7, #12] 8009320: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); 8009322: 687b ldr r3, [r7, #4] 8009324: 8d9b ldrh r3, [r3, #44] @ 0x2c 8009326: 4619 mov r1, r3 8009328: 6878 ldr r0, [r7, #4] 800932a: f7f9 fcd7 bl 8002cdc 800932e: e002 b.n 8009336 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); 8009330: 6878 ldr r0, [r7, #4] 8009332: f7ff fe24 bl 8008f7e #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; 8009336: 2300 movs r3, #0 8009338: e002 b.n 8009340 } return HAL_OK; 800933a: 2300 movs r3, #0 800933c: e000 b.n 8009340 } else { return HAL_BUSY; 800933e: 2302 movs r3, #2 } } 8009340: 4618 mov r0, r3 8009342: 3718 adds r7, #24 8009344: 46bd mov sp, r7 8009346: bd80 pop {r7, pc} 08009348 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8009348: b580 push {r7, lr} 800934a: b084 sub sp, #16 800934c: af00 add r7, sp, #0 800934e: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8009350: 687b ldr r3, [r7, #4] 8009352: 681b ldr r3, [r3, #0] 8009354: 691b ldr r3, [r3, #16] 8009356: f423 5140 bic.w r1, r3, #12288 @ 0x3000 800935a: 687b ldr r3, [r7, #4] 800935c: 68da ldr r2, [r3, #12] 800935e: 687b ldr r3, [r7, #4] 8009360: 681b ldr r3, [r3, #0] 8009362: 430a orrs r2, r1 8009364: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8009366: 687b ldr r3, [r7, #4] 8009368: 689a ldr r2, [r3, #8] 800936a: 687b ldr r3, [r7, #4] 800936c: 691b ldr r3, [r3, #16] 800936e: 431a orrs r2, r3 8009370: 687b ldr r3, [r7, #4] 8009372: 695b ldr r3, [r3, #20] 8009374: 4313 orrs r3, r2 8009376: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 8009378: 687b ldr r3, [r7, #4] 800937a: 681b ldr r3, [r3, #0] 800937c: 68db ldr r3, [r3, #12] 800937e: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 8009382: f023 030c bic.w r3, r3, #12 8009386: 687a ldr r2, [r7, #4] 8009388: 6812 ldr r2, [r2, #0] 800938a: 68b9 ldr r1, [r7, #8] 800938c: 430b orrs r3, r1 800938e: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8009390: 687b ldr r3, [r7, #4] 8009392: 681b ldr r3, [r3, #0] 8009394: 695b ldr r3, [r3, #20] 8009396: f423 7140 bic.w r1, r3, #768 @ 0x300 800939a: 687b ldr r3, [r7, #4] 800939c: 699a ldr r2, [r3, #24] 800939e: 687b ldr r3, [r7, #4] 80093a0: 681b ldr r3, [r3, #0] 80093a2: 430a orrs r2, r1 80093a4: 615a str r2, [r3, #20] if(huart->Instance == USART1) 80093a6: 687b ldr r3, [r7, #4] 80093a8: 681b ldr r3, [r3, #0] 80093aa: 4a2c ldr r2, [pc, #176] @ (800945c ) 80093ac: 4293 cmp r3, r2 80093ae: d103 bne.n 80093b8 { pclk = HAL_RCC_GetPCLK2Freq(); 80093b0: f7fe ff2a bl 8008208 80093b4: 60f8 str r0, [r7, #12] 80093b6: e002 b.n 80093be } else { pclk = HAL_RCC_GetPCLK1Freq(); 80093b8: f7fe ff12 bl 80081e0 80093bc: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 80093be: 68fa ldr r2, [r7, #12] 80093c0: 4613 mov r3, r2 80093c2: 009b lsls r3, r3, #2 80093c4: 4413 add r3, r2 80093c6: 009a lsls r2, r3, #2 80093c8: 441a add r2, r3 80093ca: 687b ldr r3, [r7, #4] 80093cc: 685b ldr r3, [r3, #4] 80093ce: 009b lsls r3, r3, #2 80093d0: fbb2 f3f3 udiv r3, r2, r3 80093d4: 4a22 ldr r2, [pc, #136] @ (8009460 ) 80093d6: fba2 2303 umull r2, r3, r2, r3 80093da: 095b lsrs r3, r3, #5 80093dc: 0119 lsls r1, r3, #4 80093de: 68fa ldr r2, [r7, #12] 80093e0: 4613 mov r3, r2 80093e2: 009b lsls r3, r3, #2 80093e4: 4413 add r3, r2 80093e6: 009a lsls r2, r3, #2 80093e8: 441a add r2, r3 80093ea: 687b ldr r3, [r7, #4] 80093ec: 685b ldr r3, [r3, #4] 80093ee: 009b lsls r3, r3, #2 80093f0: fbb2 f2f3 udiv r2, r2, r3 80093f4: 4b1a ldr r3, [pc, #104] @ (8009460 ) 80093f6: fba3 0302 umull r0, r3, r3, r2 80093fa: 095b lsrs r3, r3, #5 80093fc: 2064 movs r0, #100 @ 0x64 80093fe: fb00 f303 mul.w r3, r0, r3 8009402: 1ad3 subs r3, r2, r3 8009404: 011b lsls r3, r3, #4 8009406: 3332 adds r3, #50 @ 0x32 8009408: 4a15 ldr r2, [pc, #84] @ (8009460 ) 800940a: fba2 2303 umull r2, r3, r2, r3 800940e: 095b lsrs r3, r3, #5 8009410: f003 03f0 and.w r3, r3, #240 @ 0xf0 8009414: 4419 add r1, r3 8009416: 68fa ldr r2, [r7, #12] 8009418: 4613 mov r3, r2 800941a: 009b lsls r3, r3, #2 800941c: 4413 add r3, r2 800941e: 009a lsls r2, r3, #2 8009420: 441a add r2, r3 8009422: 687b ldr r3, [r7, #4] 8009424: 685b ldr r3, [r3, #4] 8009426: 009b lsls r3, r3, #2 8009428: fbb2 f2f3 udiv r2, r2, r3 800942c: 4b0c ldr r3, [pc, #48] @ (8009460 ) 800942e: fba3 0302 umull r0, r3, r3, r2 8009432: 095b lsrs r3, r3, #5 8009434: 2064 movs r0, #100 @ 0x64 8009436: fb00 f303 mul.w r3, r0, r3 800943a: 1ad3 subs r3, r2, r3 800943c: 011b lsls r3, r3, #4 800943e: 3332 adds r3, #50 @ 0x32 8009440: 4a07 ldr r2, [pc, #28] @ (8009460 ) 8009442: fba2 2303 umull r2, r3, r2, r3 8009446: 095b lsrs r3, r3, #5 8009448: f003 020f and.w r2, r3, #15 800944c: 687b ldr r3, [r7, #4] 800944e: 681b ldr r3, [r3, #0] 8009450: 440a add r2, r1 8009452: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 8009454: bf00 nop 8009456: 3710 adds r7, #16 8009458: 46bd mov sp, r7 800945a: bd80 pop {r7, pc} 800945c: 40013800 .word 0x40013800 8009460: 51eb851f .word 0x51eb851f 08009464 <__cvt>: 8009464: 2b00 cmp r3, #0 8009466: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800946a: 461d mov r5, r3 800946c: bfbb ittet lt 800946e: f103 4300 addlt.w r3, r3, #2147483648 @ 0x80000000 8009472: 461d movlt r5, r3 8009474: 2300 movge r3, #0 8009476: 232d movlt r3, #45 @ 0x2d 8009478: b088 sub sp, #32 800947a: 4614 mov r4, r2 800947c: bfb8 it lt 800947e: 4614 movlt r4, r2 8009480: 9a12 ldr r2, [sp, #72] @ 0x48 8009482: 9e10 ldr r6, [sp, #64] @ 0x40 8009484: 7013 strb r3, [r2, #0] 8009486: 9b14 ldr r3, [sp, #80] @ 0x50 8009488: f8dd a04c ldr.w sl, [sp, #76] @ 0x4c 800948c: f023 0820 bic.w r8, r3, #32 8009490: f1b8 0f46 cmp.w r8, #70 @ 0x46 8009494: d005 beq.n 80094a2 <__cvt+0x3e> 8009496: f1b8 0f45 cmp.w r8, #69 @ 0x45 800949a: d100 bne.n 800949e <__cvt+0x3a> 800949c: 3601 adds r6, #1 800949e: 2302 movs r3, #2 80094a0: e000 b.n 80094a4 <__cvt+0x40> 80094a2: 2303 movs r3, #3 80094a4: aa07 add r2, sp, #28 80094a6: 9204 str r2, [sp, #16] 80094a8: aa06 add r2, sp, #24 80094aa: e9cd a202 strd sl, r2, [sp, #8] 80094ae: e9cd 3600 strd r3, r6, [sp] 80094b2: 4622 mov r2, r4 80094b4: 462b mov r3, r5 80094b6: f001 fb9b bl 800abf0 <_dtoa_r> 80094ba: f1b8 0f47 cmp.w r8, #71 @ 0x47 80094be: 4607 mov r7, r0 80094c0: d119 bne.n 80094f6 <__cvt+0x92> 80094c2: 9b11 ldr r3, [sp, #68] @ 0x44 80094c4: 07db lsls r3, r3, #31 80094c6: d50e bpl.n 80094e6 <__cvt+0x82> 80094c8: eb00 0906 add.w r9, r0, r6 80094cc: 2200 movs r2, #0 80094ce: 2300 movs r3, #0 80094d0: 4620 mov r0, r4 80094d2: 4629 mov r1, r5 80094d4: f7f7 fade bl 8000a94 <__aeabi_dcmpeq> 80094d8: b108 cbz r0, 80094de <__cvt+0x7a> 80094da: f8cd 901c str.w r9, [sp, #28] 80094de: 2230 movs r2, #48 @ 0x30 80094e0: 9b07 ldr r3, [sp, #28] 80094e2: 454b cmp r3, r9 80094e4: d31e bcc.n 8009524 <__cvt+0xc0> 80094e6: 4638 mov r0, r7 80094e8: 9b07 ldr r3, [sp, #28] 80094ea: 9a15 ldr r2, [sp, #84] @ 0x54 80094ec: 1bdb subs r3, r3, r7 80094ee: 6013 str r3, [r2, #0] 80094f0: b008 add sp, #32 80094f2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80094f6: f1b8 0f46 cmp.w r8, #70 @ 0x46 80094fa: eb00 0906 add.w r9, r0, r6 80094fe: d1e5 bne.n 80094cc <__cvt+0x68> 8009500: 7803 ldrb r3, [r0, #0] 8009502: 2b30 cmp r3, #48 @ 0x30 8009504: d10a bne.n 800951c <__cvt+0xb8> 8009506: 2200 movs r2, #0 8009508: 2300 movs r3, #0 800950a: 4620 mov r0, r4 800950c: 4629 mov r1, r5 800950e: f7f7 fac1 bl 8000a94 <__aeabi_dcmpeq> 8009512: b918 cbnz r0, 800951c <__cvt+0xb8> 8009514: f1c6 0601 rsb r6, r6, #1 8009518: f8ca 6000 str.w r6, [sl] 800951c: f8da 3000 ldr.w r3, [sl] 8009520: 4499 add r9, r3 8009522: e7d3 b.n 80094cc <__cvt+0x68> 8009524: 1c59 adds r1, r3, #1 8009526: 9107 str r1, [sp, #28] 8009528: 701a strb r2, [r3, #0] 800952a: e7d9 b.n 80094e0 <__cvt+0x7c> 0800952c <__exponent>: 800952c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 800952e: 2900 cmp r1, #0 8009530: bfb6 itet lt 8009532: 232d movlt r3, #45 @ 0x2d 8009534: 232b movge r3, #43 @ 0x2b 8009536: 4249 neglt r1, r1 8009538: 2909 cmp r1, #9 800953a: 7002 strb r2, [r0, #0] 800953c: 7043 strb r3, [r0, #1] 800953e: dd29 ble.n 8009594 <__exponent+0x68> 8009540: f10d 0307 add.w r3, sp, #7 8009544: 461d mov r5, r3 8009546: 270a movs r7, #10 8009548: fbb1 f6f7 udiv r6, r1, r7 800954c: 461a mov r2, r3 800954e: fb07 1416 mls r4, r7, r6, r1 8009552: 3430 adds r4, #48 @ 0x30 8009554: f802 4c01 strb.w r4, [r2, #-1] 8009558: 460c mov r4, r1 800955a: 2c63 cmp r4, #99 @ 0x63 800955c: 4631 mov r1, r6 800955e: f103 33ff add.w r3, r3, #4294967295 @ 0xffffffff 8009562: dcf1 bgt.n 8009548 <__exponent+0x1c> 8009564: 3130 adds r1, #48 @ 0x30 8009566: 1e94 subs r4, r2, #2 8009568: f803 1c01 strb.w r1, [r3, #-1] 800956c: 4623 mov r3, r4 800956e: 1c41 adds r1, r0, #1 8009570: 42ab cmp r3, r5 8009572: d30a bcc.n 800958a <__exponent+0x5e> 8009574: f10d 0309 add.w r3, sp, #9 8009578: 1a9b subs r3, r3, r2 800957a: 42ac cmp r4, r5 800957c: bf88 it hi 800957e: 2300 movhi r3, #0 8009580: 3302 adds r3, #2 8009582: 4403 add r3, r0 8009584: 1a18 subs r0, r3, r0 8009586: b003 add sp, #12 8009588: bdf0 pop {r4, r5, r6, r7, pc} 800958a: f813 6b01 ldrb.w r6, [r3], #1 800958e: f801 6f01 strb.w r6, [r1, #1]! 8009592: e7ed b.n 8009570 <__exponent+0x44> 8009594: 2330 movs r3, #48 @ 0x30 8009596: 3130 adds r1, #48 @ 0x30 8009598: 7083 strb r3, [r0, #2] 800959a: 70c1 strb r1, [r0, #3] 800959c: 1d03 adds r3, r0, #4 800959e: e7f1 b.n 8009584 <__exponent+0x58> 080095a0 <_printf_float>: 80095a0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80095a4: b091 sub sp, #68 @ 0x44 80095a6: 460c mov r4, r1 80095a8: f8dd 8068 ldr.w r8, [sp, #104] @ 0x68 80095ac: 4616 mov r6, r2 80095ae: 461f mov r7, r3 80095b0: 4605 mov r5, r0 80095b2: f001 fa1b bl 800a9ec <_localeconv_r> 80095b6: 6803 ldr r3, [r0, #0] 80095b8: 4618 mov r0, r3 80095ba: 9308 str r3, [sp, #32] 80095bc: f7f6 fe34 bl 8000228 80095c0: 2300 movs r3, #0 80095c2: 930e str r3, [sp, #56] @ 0x38 80095c4: f8d8 3000 ldr.w r3, [r8] 80095c8: 9009 str r0, [sp, #36] @ 0x24 80095ca: 3307 adds r3, #7 80095cc: f023 0307 bic.w r3, r3, #7 80095d0: f103 0208 add.w r2, r3, #8 80095d4: f894 a018 ldrb.w sl, [r4, #24] 80095d8: f8d4 b000 ldr.w fp, [r4] 80095dc: f8c8 2000 str.w r2, [r8] 80095e0: e9d3 8900 ldrd r8, r9, [r3] 80095e4: f029 4300 bic.w r3, r9, #2147483648 @ 0x80000000 80095e8: 930b str r3, [sp, #44] @ 0x2c 80095ea: f8cd 8028 str.w r8, [sp, #40] @ 0x28 80095ee: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80095f2: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 80095f6: e9c4 8912 strd r8, r9, [r4, #72] @ 0x48 80095fa: 4b9c ldr r3, [pc, #624] @ (800986c <_printf_float+0x2cc>) 80095fc: f7f7 fa7c bl 8000af8 <__aeabi_dcmpun> 8009600: bb70 cbnz r0, 8009660 <_printf_float+0xc0> 8009602: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 8009606: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800960a: 4b98 ldr r3, [pc, #608] @ (800986c <_printf_float+0x2cc>) 800960c: f7f7 fa56 bl 8000abc <__aeabi_dcmple> 8009610: bb30 cbnz r0, 8009660 <_printf_float+0xc0> 8009612: 2200 movs r2, #0 8009614: 2300 movs r3, #0 8009616: 4640 mov r0, r8 8009618: 4649 mov r1, r9 800961a: f7f7 fa45 bl 8000aa8 <__aeabi_dcmplt> 800961e: b110 cbz r0, 8009626 <_printf_float+0x86> 8009620: 232d movs r3, #45 @ 0x2d 8009622: f884 3043 strb.w r3, [r4, #67] @ 0x43 8009626: 4a92 ldr r2, [pc, #584] @ (8009870 <_printf_float+0x2d0>) 8009628: 4b92 ldr r3, [pc, #584] @ (8009874 <_printf_float+0x2d4>) 800962a: f1ba 0f47 cmp.w sl, #71 @ 0x47 800962e: bf94 ite ls 8009630: 4690 movls r8, r2 8009632: 4698 movhi r8, r3 8009634: 2303 movs r3, #3 8009636: f04f 0900 mov.w r9, #0 800963a: 6123 str r3, [r4, #16] 800963c: f02b 0304 bic.w r3, fp, #4 8009640: 6023 str r3, [r4, #0] 8009642: 4633 mov r3, r6 8009644: 4621 mov r1, r4 8009646: 4628 mov r0, r5 8009648: 9700 str r7, [sp, #0] 800964a: aa0f add r2, sp, #60 @ 0x3c 800964c: f000 f9d4 bl 80099f8 <_printf_common> 8009650: 3001 adds r0, #1 8009652: f040 8090 bne.w 8009776 <_printf_float+0x1d6> 8009656: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800965a: b011 add sp, #68 @ 0x44 800965c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8009660: 4642 mov r2, r8 8009662: 464b mov r3, r9 8009664: 4640 mov r0, r8 8009666: 4649 mov r1, r9 8009668: f7f7 fa46 bl 8000af8 <__aeabi_dcmpun> 800966c: b148 cbz r0, 8009682 <_printf_float+0xe2> 800966e: 464b mov r3, r9 8009670: 2b00 cmp r3, #0 8009672: bfb8 it lt 8009674: 232d movlt r3, #45 @ 0x2d 8009676: 4a80 ldr r2, [pc, #512] @ (8009878 <_printf_float+0x2d8>) 8009678: bfb8 it lt 800967a: f884 3043 strblt.w r3, [r4, #67] @ 0x43 800967e: 4b7f ldr r3, [pc, #508] @ (800987c <_printf_float+0x2dc>) 8009680: e7d3 b.n 800962a <_printf_float+0x8a> 8009682: 6863 ldr r3, [r4, #4] 8009684: f00a 01df and.w r1, sl, #223 @ 0xdf 8009688: 1c5a adds r2, r3, #1 800968a: d13f bne.n 800970c <_printf_float+0x16c> 800968c: 2306 movs r3, #6 800968e: 6063 str r3, [r4, #4] 8009690: 2200 movs r2, #0 8009692: f44b 6380 orr.w r3, fp, #1024 @ 0x400 8009696: 6023 str r3, [r4, #0] 8009698: 9206 str r2, [sp, #24] 800969a: aa0e add r2, sp, #56 @ 0x38 800969c: e9cd a204 strd sl, r2, [sp, #16] 80096a0: aa0d add r2, sp, #52 @ 0x34 80096a2: 9203 str r2, [sp, #12] 80096a4: f10d 0233 add.w r2, sp, #51 @ 0x33 80096a8: e9cd 3201 strd r3, r2, [sp, #4] 80096ac: 6863 ldr r3, [r4, #4] 80096ae: 4642 mov r2, r8 80096b0: 9300 str r3, [sp, #0] 80096b2: 4628 mov r0, r5 80096b4: 464b mov r3, r9 80096b6: 910a str r1, [sp, #40] @ 0x28 80096b8: f7ff fed4 bl 8009464 <__cvt> 80096bc: 990a ldr r1, [sp, #40] @ 0x28 80096be: 4680 mov r8, r0 80096c0: 2947 cmp r1, #71 @ 0x47 80096c2: 990d ldr r1, [sp, #52] @ 0x34 80096c4: d128 bne.n 8009718 <_printf_float+0x178> 80096c6: 1cc8 adds r0, r1, #3 80096c8: db02 blt.n 80096d0 <_printf_float+0x130> 80096ca: 6863 ldr r3, [r4, #4] 80096cc: 4299 cmp r1, r3 80096ce: dd40 ble.n 8009752 <_printf_float+0x1b2> 80096d0: f1aa 0a02 sub.w sl, sl, #2 80096d4: fa5f fa8a uxtb.w sl, sl 80096d8: 4652 mov r2, sl 80096da: 3901 subs r1, #1 80096dc: f104 0050 add.w r0, r4, #80 @ 0x50 80096e0: 910d str r1, [sp, #52] @ 0x34 80096e2: f7ff ff23 bl 800952c <__exponent> 80096e6: 9a0e ldr r2, [sp, #56] @ 0x38 80096e8: 4681 mov r9, r0 80096ea: 1813 adds r3, r2, r0 80096ec: 2a01 cmp r2, #1 80096ee: 6123 str r3, [r4, #16] 80096f0: dc02 bgt.n 80096f8 <_printf_float+0x158> 80096f2: 6822 ldr r2, [r4, #0] 80096f4: 07d2 lsls r2, r2, #31 80096f6: d501 bpl.n 80096fc <_printf_float+0x15c> 80096f8: 3301 adds r3, #1 80096fa: 6123 str r3, [r4, #16] 80096fc: f89d 3033 ldrb.w r3, [sp, #51] @ 0x33 8009700: 2b00 cmp r3, #0 8009702: d09e beq.n 8009642 <_printf_float+0xa2> 8009704: 232d movs r3, #45 @ 0x2d 8009706: f884 3043 strb.w r3, [r4, #67] @ 0x43 800970a: e79a b.n 8009642 <_printf_float+0xa2> 800970c: 2947 cmp r1, #71 @ 0x47 800970e: d1bf bne.n 8009690 <_printf_float+0xf0> 8009710: 2b00 cmp r3, #0 8009712: d1bd bne.n 8009690 <_printf_float+0xf0> 8009714: 2301 movs r3, #1 8009716: e7ba b.n 800968e <_printf_float+0xee> 8009718: f1ba 0f65 cmp.w sl, #101 @ 0x65 800971c: d9dc bls.n 80096d8 <_printf_float+0x138> 800971e: f1ba 0f66 cmp.w sl, #102 @ 0x66 8009722: d118 bne.n 8009756 <_printf_float+0x1b6> 8009724: 2900 cmp r1, #0 8009726: 6863 ldr r3, [r4, #4] 8009728: dd0b ble.n 8009742 <_printf_float+0x1a2> 800972a: 6121 str r1, [r4, #16] 800972c: b913 cbnz r3, 8009734 <_printf_float+0x194> 800972e: 6822 ldr r2, [r4, #0] 8009730: 07d0 lsls r0, r2, #31 8009732: d502 bpl.n 800973a <_printf_float+0x19a> 8009734: 3301 adds r3, #1 8009736: 440b add r3, r1 8009738: 6123 str r3, [r4, #16] 800973a: f04f 0900 mov.w r9, #0 800973e: 65a1 str r1, [r4, #88] @ 0x58 8009740: e7dc b.n 80096fc <_printf_float+0x15c> 8009742: b913 cbnz r3, 800974a <_printf_float+0x1aa> 8009744: 6822 ldr r2, [r4, #0] 8009746: 07d2 lsls r2, r2, #31 8009748: d501 bpl.n 800974e <_printf_float+0x1ae> 800974a: 3302 adds r3, #2 800974c: e7f4 b.n 8009738 <_printf_float+0x198> 800974e: 2301 movs r3, #1 8009750: e7f2 b.n 8009738 <_printf_float+0x198> 8009752: f04f 0a67 mov.w sl, #103 @ 0x67 8009756: 9b0e ldr r3, [sp, #56] @ 0x38 8009758: 4299 cmp r1, r3 800975a: db05 blt.n 8009768 <_printf_float+0x1c8> 800975c: 6823 ldr r3, [r4, #0] 800975e: 6121 str r1, [r4, #16] 8009760: 07d8 lsls r0, r3, #31 8009762: d5ea bpl.n 800973a <_printf_float+0x19a> 8009764: 1c4b adds r3, r1, #1 8009766: e7e7 b.n 8009738 <_printf_float+0x198> 8009768: 2900 cmp r1, #0 800976a: bfcc ite gt 800976c: 2201 movgt r2, #1 800976e: f1c1 0202 rsble r2, r1, #2 8009772: 4413 add r3, r2 8009774: e7e0 b.n 8009738 <_printf_float+0x198> 8009776: 6823 ldr r3, [r4, #0] 8009778: 055a lsls r2, r3, #21 800977a: d407 bmi.n 800978c <_printf_float+0x1ec> 800977c: 6923 ldr r3, [r4, #16] 800977e: 4642 mov r2, r8 8009780: 4631 mov r1, r6 8009782: 4628 mov r0, r5 8009784: 47b8 blx r7 8009786: 3001 adds r0, #1 8009788: d12b bne.n 80097e2 <_printf_float+0x242> 800978a: e764 b.n 8009656 <_printf_float+0xb6> 800978c: f1ba 0f65 cmp.w sl, #101 @ 0x65 8009790: f240 80dc bls.w 800994c <_printf_float+0x3ac> 8009794: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 8009798: 2200 movs r2, #0 800979a: 2300 movs r3, #0 800979c: f7f7 f97a bl 8000a94 <__aeabi_dcmpeq> 80097a0: 2800 cmp r0, #0 80097a2: d033 beq.n 800980c <_printf_float+0x26c> 80097a4: 2301 movs r3, #1 80097a6: 4631 mov r1, r6 80097a8: 4628 mov r0, r5 80097aa: 4a35 ldr r2, [pc, #212] @ (8009880 <_printf_float+0x2e0>) 80097ac: 47b8 blx r7 80097ae: 3001 adds r0, #1 80097b0: f43f af51 beq.w 8009656 <_printf_float+0xb6> 80097b4: e9dd 380d ldrd r3, r8, [sp, #52] @ 0x34 80097b8: 4543 cmp r3, r8 80097ba: db02 blt.n 80097c2 <_printf_float+0x222> 80097bc: 6823 ldr r3, [r4, #0] 80097be: 07d8 lsls r0, r3, #31 80097c0: d50f bpl.n 80097e2 <_printf_float+0x242> 80097c2: e9dd 2308 ldrd r2, r3, [sp, #32] 80097c6: 4631 mov r1, r6 80097c8: 4628 mov r0, r5 80097ca: 47b8 blx r7 80097cc: 3001 adds r0, #1 80097ce: f43f af42 beq.w 8009656 <_printf_float+0xb6> 80097d2: f04f 0900 mov.w r9, #0 80097d6: f108 38ff add.w r8, r8, #4294967295 @ 0xffffffff 80097da: f104 0a1a add.w sl, r4, #26 80097de: 45c8 cmp r8, r9 80097e0: dc09 bgt.n 80097f6 <_printf_float+0x256> 80097e2: 6823 ldr r3, [r4, #0] 80097e4: 079b lsls r3, r3, #30 80097e6: f100 8102 bmi.w 80099ee <_printf_float+0x44e> 80097ea: 68e0 ldr r0, [r4, #12] 80097ec: 9b0f ldr r3, [sp, #60] @ 0x3c 80097ee: 4298 cmp r0, r3 80097f0: bfb8 it lt 80097f2: 4618 movlt r0, r3 80097f4: e731 b.n 800965a <_printf_float+0xba> 80097f6: 2301 movs r3, #1 80097f8: 4652 mov r2, sl 80097fa: 4631 mov r1, r6 80097fc: 4628 mov r0, r5 80097fe: 47b8 blx r7 8009800: 3001 adds r0, #1 8009802: f43f af28 beq.w 8009656 <_printf_float+0xb6> 8009806: f109 0901 add.w r9, r9, #1 800980a: e7e8 b.n 80097de <_printf_float+0x23e> 800980c: 9b0d ldr r3, [sp, #52] @ 0x34 800980e: 2b00 cmp r3, #0 8009810: dc38 bgt.n 8009884 <_printf_float+0x2e4> 8009812: 2301 movs r3, #1 8009814: 4631 mov r1, r6 8009816: 4628 mov r0, r5 8009818: 4a19 ldr r2, [pc, #100] @ (8009880 <_printf_float+0x2e0>) 800981a: 47b8 blx r7 800981c: 3001 adds r0, #1 800981e: f43f af1a beq.w 8009656 <_printf_float+0xb6> 8009822: e9dd 390d ldrd r3, r9, [sp, #52] @ 0x34 8009826: ea59 0303 orrs.w r3, r9, r3 800982a: d102 bne.n 8009832 <_printf_float+0x292> 800982c: 6823 ldr r3, [r4, #0] 800982e: 07d9 lsls r1, r3, #31 8009830: d5d7 bpl.n 80097e2 <_printf_float+0x242> 8009832: e9dd 2308 ldrd r2, r3, [sp, #32] 8009836: 4631 mov r1, r6 8009838: 4628 mov r0, r5 800983a: 47b8 blx r7 800983c: 3001 adds r0, #1 800983e: f43f af0a beq.w 8009656 <_printf_float+0xb6> 8009842: f04f 0a00 mov.w sl, #0 8009846: f104 0b1a add.w fp, r4, #26 800984a: 9b0d ldr r3, [sp, #52] @ 0x34 800984c: 425b negs r3, r3 800984e: 4553 cmp r3, sl 8009850: dc01 bgt.n 8009856 <_printf_float+0x2b6> 8009852: 464b mov r3, r9 8009854: e793 b.n 800977e <_printf_float+0x1de> 8009856: 2301 movs r3, #1 8009858: 465a mov r2, fp 800985a: 4631 mov r1, r6 800985c: 4628 mov r0, r5 800985e: 47b8 blx r7 8009860: 3001 adds r0, #1 8009862: f43f aef8 beq.w 8009656 <_printf_float+0xb6> 8009866: f10a 0a01 add.w sl, sl, #1 800986a: e7ee b.n 800984a <_printf_float+0x2aa> 800986c: 7fefffff .word 0x7fefffff 8009870: 0800e004 .word 0x0800e004 8009874: 0800e008 .word 0x0800e008 8009878: 0800e00c .word 0x0800e00c 800987c: 0800e010 .word 0x0800e010 8009880: 0800e4e9 .word 0x0800e4e9 8009884: 6da3 ldr r3, [r4, #88] @ 0x58 8009886: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 800988a: 4553 cmp r3, sl 800988c: bfa8 it ge 800988e: 4653 movge r3, sl 8009890: 2b00 cmp r3, #0 8009892: 4699 mov r9, r3 8009894: dc36 bgt.n 8009904 <_printf_float+0x364> 8009896: f04f 0b00 mov.w fp, #0 800989a: ea29 79e9 bic.w r9, r9, r9, asr #31 800989e: f104 021a add.w r2, r4, #26 80098a2: 6da3 ldr r3, [r4, #88] @ 0x58 80098a4: 930a str r3, [sp, #40] @ 0x28 80098a6: eba3 0309 sub.w r3, r3, r9 80098aa: 455b cmp r3, fp 80098ac: dc31 bgt.n 8009912 <_printf_float+0x372> 80098ae: 9b0d ldr r3, [sp, #52] @ 0x34 80098b0: 459a cmp sl, r3 80098b2: dc3a bgt.n 800992a <_printf_float+0x38a> 80098b4: 6823 ldr r3, [r4, #0] 80098b6: 07da lsls r2, r3, #31 80098b8: d437 bmi.n 800992a <_printf_float+0x38a> 80098ba: 9b0d ldr r3, [sp, #52] @ 0x34 80098bc: ebaa 0903 sub.w r9, sl, r3 80098c0: 9b0a ldr r3, [sp, #40] @ 0x28 80098c2: ebaa 0303 sub.w r3, sl, r3 80098c6: 4599 cmp r9, r3 80098c8: bfa8 it ge 80098ca: 4699 movge r9, r3 80098cc: f1b9 0f00 cmp.w r9, #0 80098d0: dc33 bgt.n 800993a <_printf_float+0x39a> 80098d2: f04f 0800 mov.w r8, #0 80098d6: ea29 79e9 bic.w r9, r9, r9, asr #31 80098da: f104 0b1a add.w fp, r4, #26 80098de: 9b0d ldr r3, [sp, #52] @ 0x34 80098e0: ebaa 0303 sub.w r3, sl, r3 80098e4: eba3 0309 sub.w r3, r3, r9 80098e8: 4543 cmp r3, r8 80098ea: f77f af7a ble.w 80097e2 <_printf_float+0x242> 80098ee: 2301 movs r3, #1 80098f0: 465a mov r2, fp 80098f2: 4631 mov r1, r6 80098f4: 4628 mov r0, r5 80098f6: 47b8 blx r7 80098f8: 3001 adds r0, #1 80098fa: f43f aeac beq.w 8009656 <_printf_float+0xb6> 80098fe: f108 0801 add.w r8, r8, #1 8009902: e7ec b.n 80098de <_printf_float+0x33e> 8009904: 4642 mov r2, r8 8009906: 4631 mov r1, r6 8009908: 4628 mov r0, r5 800990a: 47b8 blx r7 800990c: 3001 adds r0, #1 800990e: d1c2 bne.n 8009896 <_printf_float+0x2f6> 8009910: e6a1 b.n 8009656 <_printf_float+0xb6> 8009912: 2301 movs r3, #1 8009914: 4631 mov r1, r6 8009916: 4628 mov r0, r5 8009918: 920a str r2, [sp, #40] @ 0x28 800991a: 47b8 blx r7 800991c: 3001 adds r0, #1 800991e: f43f ae9a beq.w 8009656 <_printf_float+0xb6> 8009922: 9a0a ldr r2, [sp, #40] @ 0x28 8009924: f10b 0b01 add.w fp, fp, #1 8009928: e7bb b.n 80098a2 <_printf_float+0x302> 800992a: 4631 mov r1, r6 800992c: e9dd 2308 ldrd r2, r3, [sp, #32] 8009930: 4628 mov r0, r5 8009932: 47b8 blx r7 8009934: 3001 adds r0, #1 8009936: d1c0 bne.n 80098ba <_printf_float+0x31a> 8009938: e68d b.n 8009656 <_printf_float+0xb6> 800993a: 9a0a ldr r2, [sp, #40] @ 0x28 800993c: 464b mov r3, r9 800993e: 4631 mov r1, r6 8009940: 4628 mov r0, r5 8009942: 4442 add r2, r8 8009944: 47b8 blx r7 8009946: 3001 adds r0, #1 8009948: d1c3 bne.n 80098d2 <_printf_float+0x332> 800994a: e684 b.n 8009656 <_printf_float+0xb6> 800994c: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 8009950: f1ba 0f01 cmp.w sl, #1 8009954: dc01 bgt.n 800995a <_printf_float+0x3ba> 8009956: 07db lsls r3, r3, #31 8009958: d536 bpl.n 80099c8 <_printf_float+0x428> 800995a: 2301 movs r3, #1 800995c: 4642 mov r2, r8 800995e: 4631 mov r1, r6 8009960: 4628 mov r0, r5 8009962: 47b8 blx r7 8009964: 3001 adds r0, #1 8009966: f43f ae76 beq.w 8009656 <_printf_float+0xb6> 800996a: e9dd 2308 ldrd r2, r3, [sp, #32] 800996e: 4631 mov r1, r6 8009970: 4628 mov r0, r5 8009972: 47b8 blx r7 8009974: 3001 adds r0, #1 8009976: f43f ae6e beq.w 8009656 <_printf_float+0xb6> 800997a: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 800997e: 2200 movs r2, #0 8009980: 2300 movs r3, #0 8009982: f10a 3aff add.w sl, sl, #4294967295 @ 0xffffffff 8009986: f7f7 f885 bl 8000a94 <__aeabi_dcmpeq> 800998a: b9c0 cbnz r0, 80099be <_printf_float+0x41e> 800998c: 4653 mov r3, sl 800998e: f108 0201 add.w r2, r8, #1 8009992: 4631 mov r1, r6 8009994: 4628 mov r0, r5 8009996: 47b8 blx r7 8009998: 3001 adds r0, #1 800999a: d10c bne.n 80099b6 <_printf_float+0x416> 800999c: e65b b.n 8009656 <_printf_float+0xb6> 800999e: 2301 movs r3, #1 80099a0: 465a mov r2, fp 80099a2: 4631 mov r1, r6 80099a4: 4628 mov r0, r5 80099a6: 47b8 blx r7 80099a8: 3001 adds r0, #1 80099aa: f43f ae54 beq.w 8009656 <_printf_float+0xb6> 80099ae: f108 0801 add.w r8, r8, #1 80099b2: 45d0 cmp r8, sl 80099b4: dbf3 blt.n 800999e <_printf_float+0x3fe> 80099b6: 464b mov r3, r9 80099b8: f104 0250 add.w r2, r4, #80 @ 0x50 80099bc: e6e0 b.n 8009780 <_printf_float+0x1e0> 80099be: f04f 0800 mov.w r8, #0 80099c2: f104 0b1a add.w fp, r4, #26 80099c6: e7f4 b.n 80099b2 <_printf_float+0x412> 80099c8: 2301 movs r3, #1 80099ca: 4642 mov r2, r8 80099cc: e7e1 b.n 8009992 <_printf_float+0x3f2> 80099ce: 2301 movs r3, #1 80099d0: 464a mov r2, r9 80099d2: 4631 mov r1, r6 80099d4: 4628 mov r0, r5 80099d6: 47b8 blx r7 80099d8: 3001 adds r0, #1 80099da: f43f ae3c beq.w 8009656 <_printf_float+0xb6> 80099de: f108 0801 add.w r8, r8, #1 80099e2: 68e3 ldr r3, [r4, #12] 80099e4: 990f ldr r1, [sp, #60] @ 0x3c 80099e6: 1a5b subs r3, r3, r1 80099e8: 4543 cmp r3, r8 80099ea: dcf0 bgt.n 80099ce <_printf_float+0x42e> 80099ec: e6fd b.n 80097ea <_printf_float+0x24a> 80099ee: f04f 0800 mov.w r8, #0 80099f2: f104 0919 add.w r9, r4, #25 80099f6: e7f4 b.n 80099e2 <_printf_float+0x442> 080099f8 <_printf_common>: 80099f8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80099fc: 4616 mov r6, r2 80099fe: 4698 mov r8, r3 8009a00: 688a ldr r2, [r1, #8] 8009a02: 690b ldr r3, [r1, #16] 8009a04: 4607 mov r7, r0 8009a06: 4293 cmp r3, r2 8009a08: bfb8 it lt 8009a0a: 4613 movlt r3, r2 8009a0c: 6033 str r3, [r6, #0] 8009a0e: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 8009a12: 460c mov r4, r1 8009a14: f8dd 9020 ldr.w r9, [sp, #32] 8009a18: b10a cbz r2, 8009a1e <_printf_common+0x26> 8009a1a: 3301 adds r3, #1 8009a1c: 6033 str r3, [r6, #0] 8009a1e: 6823 ldr r3, [r4, #0] 8009a20: 0699 lsls r1, r3, #26 8009a22: bf42 ittt mi 8009a24: 6833 ldrmi r3, [r6, #0] 8009a26: 3302 addmi r3, #2 8009a28: 6033 strmi r3, [r6, #0] 8009a2a: 6825 ldr r5, [r4, #0] 8009a2c: f015 0506 ands.w r5, r5, #6 8009a30: d106 bne.n 8009a40 <_printf_common+0x48> 8009a32: f104 0a19 add.w sl, r4, #25 8009a36: 68e3 ldr r3, [r4, #12] 8009a38: 6832 ldr r2, [r6, #0] 8009a3a: 1a9b subs r3, r3, r2 8009a3c: 42ab cmp r3, r5 8009a3e: dc2b bgt.n 8009a98 <_printf_common+0xa0> 8009a40: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 8009a44: 6822 ldr r2, [r4, #0] 8009a46: 3b00 subs r3, #0 8009a48: bf18 it ne 8009a4a: 2301 movne r3, #1 8009a4c: 0692 lsls r2, r2, #26 8009a4e: d430 bmi.n 8009ab2 <_printf_common+0xba> 8009a50: 4641 mov r1, r8 8009a52: 4638 mov r0, r7 8009a54: f104 0243 add.w r2, r4, #67 @ 0x43 8009a58: 47c8 blx r9 8009a5a: 3001 adds r0, #1 8009a5c: d023 beq.n 8009aa6 <_printf_common+0xae> 8009a5e: 6823 ldr r3, [r4, #0] 8009a60: 6922 ldr r2, [r4, #16] 8009a62: f003 0306 and.w r3, r3, #6 8009a66: 2b04 cmp r3, #4 8009a68: bf14 ite ne 8009a6a: 2500 movne r5, #0 8009a6c: 6833 ldreq r3, [r6, #0] 8009a6e: f04f 0600 mov.w r6, #0 8009a72: bf08 it eq 8009a74: 68e5 ldreq r5, [r4, #12] 8009a76: f104 041a add.w r4, r4, #26 8009a7a: bf08 it eq 8009a7c: 1aed subeq r5, r5, r3 8009a7e: f854 3c12 ldr.w r3, [r4, #-18] 8009a82: bf08 it eq 8009a84: ea25 75e5 biceq.w r5, r5, r5, asr #31 8009a88: 4293 cmp r3, r2 8009a8a: bfc4 itt gt 8009a8c: 1a9b subgt r3, r3, r2 8009a8e: 18ed addgt r5, r5, r3 8009a90: 42b5 cmp r5, r6 8009a92: d11a bne.n 8009aca <_printf_common+0xd2> 8009a94: 2000 movs r0, #0 8009a96: e008 b.n 8009aaa <_printf_common+0xb2> 8009a98: 2301 movs r3, #1 8009a9a: 4652 mov r2, sl 8009a9c: 4641 mov r1, r8 8009a9e: 4638 mov r0, r7 8009aa0: 47c8 blx r9 8009aa2: 3001 adds r0, #1 8009aa4: d103 bne.n 8009aae <_printf_common+0xb6> 8009aa6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8009aaa: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8009aae: 3501 adds r5, #1 8009ab0: e7c1 b.n 8009a36 <_printf_common+0x3e> 8009ab2: 2030 movs r0, #48 @ 0x30 8009ab4: 18e1 adds r1, r4, r3 8009ab6: f881 0043 strb.w r0, [r1, #67] @ 0x43 8009aba: 1c5a adds r2, r3, #1 8009abc: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 8009ac0: 4422 add r2, r4 8009ac2: 3302 adds r3, #2 8009ac4: f882 1043 strb.w r1, [r2, #67] @ 0x43 8009ac8: e7c2 b.n 8009a50 <_printf_common+0x58> 8009aca: 2301 movs r3, #1 8009acc: 4622 mov r2, r4 8009ace: 4641 mov r1, r8 8009ad0: 4638 mov r0, r7 8009ad2: 47c8 blx r9 8009ad4: 3001 adds r0, #1 8009ad6: d0e6 beq.n 8009aa6 <_printf_common+0xae> 8009ad8: 3601 adds r6, #1 8009ada: e7d9 b.n 8009a90 <_printf_common+0x98> 08009adc <_printf_i>: 8009adc: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 8009ae0: 7e0f ldrb r7, [r1, #24] 8009ae2: 4691 mov r9, r2 8009ae4: 2f78 cmp r7, #120 @ 0x78 8009ae6: 4680 mov r8, r0 8009ae8: 460c mov r4, r1 8009aea: 469a mov sl, r3 8009aec: 9e0c ldr r6, [sp, #48] @ 0x30 8009aee: f101 0243 add.w r2, r1, #67 @ 0x43 8009af2: d807 bhi.n 8009b04 <_printf_i+0x28> 8009af4: 2f62 cmp r7, #98 @ 0x62 8009af6: d80a bhi.n 8009b0e <_printf_i+0x32> 8009af8: 2f00 cmp r7, #0 8009afa: f000 80d3 beq.w 8009ca4 <_printf_i+0x1c8> 8009afe: 2f58 cmp r7, #88 @ 0x58 8009b00: f000 80ba beq.w 8009c78 <_printf_i+0x19c> 8009b04: f104 0642 add.w r6, r4, #66 @ 0x42 8009b08: f884 7042 strb.w r7, [r4, #66] @ 0x42 8009b0c: e03a b.n 8009b84 <_printf_i+0xa8> 8009b0e: f1a7 0363 sub.w r3, r7, #99 @ 0x63 8009b12: 2b15 cmp r3, #21 8009b14: d8f6 bhi.n 8009b04 <_printf_i+0x28> 8009b16: a101 add r1, pc, #4 @ (adr r1, 8009b1c <_printf_i+0x40>) 8009b18: f851 f023 ldr.w pc, [r1, r3, lsl #2] 8009b1c: 08009b75 .word 0x08009b75 8009b20: 08009b89 .word 0x08009b89 8009b24: 08009b05 .word 0x08009b05 8009b28: 08009b05 .word 0x08009b05 8009b2c: 08009b05 .word 0x08009b05 8009b30: 08009b05 .word 0x08009b05 8009b34: 08009b89 .word 0x08009b89 8009b38: 08009b05 .word 0x08009b05 8009b3c: 08009b05 .word 0x08009b05 8009b40: 08009b05 .word 0x08009b05 8009b44: 08009b05 .word 0x08009b05 8009b48: 08009c8b .word 0x08009c8b 8009b4c: 08009bb3 .word 0x08009bb3 8009b50: 08009c45 .word 0x08009c45 8009b54: 08009b05 .word 0x08009b05 8009b58: 08009b05 .word 0x08009b05 8009b5c: 08009cad .word 0x08009cad 8009b60: 08009b05 .word 0x08009b05 8009b64: 08009bb3 .word 0x08009bb3 8009b68: 08009b05 .word 0x08009b05 8009b6c: 08009b05 .word 0x08009b05 8009b70: 08009c4d .word 0x08009c4d 8009b74: 6833 ldr r3, [r6, #0] 8009b76: 1d1a adds r2, r3, #4 8009b78: 681b ldr r3, [r3, #0] 8009b7a: 6032 str r2, [r6, #0] 8009b7c: f104 0642 add.w r6, r4, #66 @ 0x42 8009b80: f884 3042 strb.w r3, [r4, #66] @ 0x42 8009b84: 2301 movs r3, #1 8009b86: e09e b.n 8009cc6 <_printf_i+0x1ea> 8009b88: 6833 ldr r3, [r6, #0] 8009b8a: 6820 ldr r0, [r4, #0] 8009b8c: 1d19 adds r1, r3, #4 8009b8e: 6031 str r1, [r6, #0] 8009b90: 0606 lsls r6, r0, #24 8009b92: d501 bpl.n 8009b98 <_printf_i+0xbc> 8009b94: 681d ldr r5, [r3, #0] 8009b96: e003 b.n 8009ba0 <_printf_i+0xc4> 8009b98: 0645 lsls r5, r0, #25 8009b9a: d5fb bpl.n 8009b94 <_printf_i+0xb8> 8009b9c: f9b3 5000 ldrsh.w r5, [r3] 8009ba0: 2d00 cmp r5, #0 8009ba2: da03 bge.n 8009bac <_printf_i+0xd0> 8009ba4: 232d movs r3, #45 @ 0x2d 8009ba6: 426d negs r5, r5 8009ba8: f884 3043 strb.w r3, [r4, #67] @ 0x43 8009bac: 230a movs r3, #10 8009bae: 4859 ldr r0, [pc, #356] @ (8009d14 <_printf_i+0x238>) 8009bb0: e011 b.n 8009bd6 <_printf_i+0xfa> 8009bb2: 6821 ldr r1, [r4, #0] 8009bb4: 6833 ldr r3, [r6, #0] 8009bb6: 0608 lsls r0, r1, #24 8009bb8: f853 5b04 ldr.w r5, [r3], #4 8009bbc: d402 bmi.n 8009bc4 <_printf_i+0xe8> 8009bbe: 0649 lsls r1, r1, #25 8009bc0: bf48 it mi 8009bc2: b2ad uxthmi r5, r5 8009bc4: 2f6f cmp r7, #111 @ 0x6f 8009bc6: 6033 str r3, [r6, #0] 8009bc8: bf14 ite ne 8009bca: 230a movne r3, #10 8009bcc: 2308 moveq r3, #8 8009bce: 4851 ldr r0, [pc, #324] @ (8009d14 <_printf_i+0x238>) 8009bd0: 2100 movs r1, #0 8009bd2: f884 1043 strb.w r1, [r4, #67] @ 0x43 8009bd6: 6866 ldr r6, [r4, #4] 8009bd8: 2e00 cmp r6, #0 8009bda: bfa8 it ge 8009bdc: 6821 ldrge r1, [r4, #0] 8009bde: 60a6 str r6, [r4, #8] 8009be0: bfa4 itt ge 8009be2: f021 0104 bicge.w r1, r1, #4 8009be6: 6021 strge r1, [r4, #0] 8009be8: b90d cbnz r5, 8009bee <_printf_i+0x112> 8009bea: 2e00 cmp r6, #0 8009bec: d04b beq.n 8009c86 <_printf_i+0x1aa> 8009bee: 4616 mov r6, r2 8009bf0: fbb5 f1f3 udiv r1, r5, r3 8009bf4: fb03 5711 mls r7, r3, r1, r5 8009bf8: 5dc7 ldrb r7, [r0, r7] 8009bfa: f806 7d01 strb.w r7, [r6, #-1]! 8009bfe: 462f mov r7, r5 8009c00: 42bb cmp r3, r7 8009c02: 460d mov r5, r1 8009c04: d9f4 bls.n 8009bf0 <_printf_i+0x114> 8009c06: 2b08 cmp r3, #8 8009c08: d10b bne.n 8009c22 <_printf_i+0x146> 8009c0a: 6823 ldr r3, [r4, #0] 8009c0c: 07df lsls r7, r3, #31 8009c0e: d508 bpl.n 8009c22 <_printf_i+0x146> 8009c10: 6923 ldr r3, [r4, #16] 8009c12: 6861 ldr r1, [r4, #4] 8009c14: 4299 cmp r1, r3 8009c16: bfde ittt le 8009c18: 2330 movle r3, #48 @ 0x30 8009c1a: f806 3c01 strble.w r3, [r6, #-1] 8009c1e: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff 8009c22: 1b92 subs r2, r2, r6 8009c24: 6122 str r2, [r4, #16] 8009c26: 464b mov r3, r9 8009c28: 4621 mov r1, r4 8009c2a: 4640 mov r0, r8 8009c2c: f8cd a000 str.w sl, [sp] 8009c30: aa03 add r2, sp, #12 8009c32: f7ff fee1 bl 80099f8 <_printf_common> 8009c36: 3001 adds r0, #1 8009c38: d14a bne.n 8009cd0 <_printf_i+0x1f4> 8009c3a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8009c3e: b004 add sp, #16 8009c40: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8009c44: 6823 ldr r3, [r4, #0] 8009c46: f043 0320 orr.w r3, r3, #32 8009c4a: 6023 str r3, [r4, #0] 8009c4c: 2778 movs r7, #120 @ 0x78 8009c4e: 4832 ldr r0, [pc, #200] @ (8009d18 <_printf_i+0x23c>) 8009c50: f884 7045 strb.w r7, [r4, #69] @ 0x45 8009c54: 6823 ldr r3, [r4, #0] 8009c56: 6831 ldr r1, [r6, #0] 8009c58: 061f lsls r7, r3, #24 8009c5a: f851 5b04 ldr.w r5, [r1], #4 8009c5e: d402 bmi.n 8009c66 <_printf_i+0x18a> 8009c60: 065f lsls r7, r3, #25 8009c62: bf48 it mi 8009c64: b2ad uxthmi r5, r5 8009c66: 6031 str r1, [r6, #0] 8009c68: 07d9 lsls r1, r3, #31 8009c6a: bf44 itt mi 8009c6c: f043 0320 orrmi.w r3, r3, #32 8009c70: 6023 strmi r3, [r4, #0] 8009c72: b11d cbz r5, 8009c7c <_printf_i+0x1a0> 8009c74: 2310 movs r3, #16 8009c76: e7ab b.n 8009bd0 <_printf_i+0xf4> 8009c78: 4826 ldr r0, [pc, #152] @ (8009d14 <_printf_i+0x238>) 8009c7a: e7e9 b.n 8009c50 <_printf_i+0x174> 8009c7c: 6823 ldr r3, [r4, #0] 8009c7e: f023 0320 bic.w r3, r3, #32 8009c82: 6023 str r3, [r4, #0] 8009c84: e7f6 b.n 8009c74 <_printf_i+0x198> 8009c86: 4616 mov r6, r2 8009c88: e7bd b.n 8009c06 <_printf_i+0x12a> 8009c8a: 6833 ldr r3, [r6, #0] 8009c8c: 6825 ldr r5, [r4, #0] 8009c8e: 1d18 adds r0, r3, #4 8009c90: 6961 ldr r1, [r4, #20] 8009c92: 6030 str r0, [r6, #0] 8009c94: 062e lsls r6, r5, #24 8009c96: 681b ldr r3, [r3, #0] 8009c98: d501 bpl.n 8009c9e <_printf_i+0x1c2> 8009c9a: 6019 str r1, [r3, #0] 8009c9c: e002 b.n 8009ca4 <_printf_i+0x1c8> 8009c9e: 0668 lsls r0, r5, #25 8009ca0: d5fb bpl.n 8009c9a <_printf_i+0x1be> 8009ca2: 8019 strh r1, [r3, #0] 8009ca4: 2300 movs r3, #0 8009ca6: 4616 mov r6, r2 8009ca8: 6123 str r3, [r4, #16] 8009caa: e7bc b.n 8009c26 <_printf_i+0x14a> 8009cac: 6833 ldr r3, [r6, #0] 8009cae: 2100 movs r1, #0 8009cb0: 1d1a adds r2, r3, #4 8009cb2: 6032 str r2, [r6, #0] 8009cb4: 681e ldr r6, [r3, #0] 8009cb6: 6862 ldr r2, [r4, #4] 8009cb8: 4630 mov r0, r6 8009cba: f000 fece bl 800aa5a 8009cbe: b108 cbz r0, 8009cc4 <_printf_i+0x1e8> 8009cc0: 1b80 subs r0, r0, r6 8009cc2: 6060 str r0, [r4, #4] 8009cc4: 6863 ldr r3, [r4, #4] 8009cc6: 6123 str r3, [r4, #16] 8009cc8: 2300 movs r3, #0 8009cca: f884 3043 strb.w r3, [r4, #67] @ 0x43 8009cce: e7aa b.n 8009c26 <_printf_i+0x14a> 8009cd0: 4632 mov r2, r6 8009cd2: 4649 mov r1, r9 8009cd4: 4640 mov r0, r8 8009cd6: 6923 ldr r3, [r4, #16] 8009cd8: 47d0 blx sl 8009cda: 3001 adds r0, #1 8009cdc: d0ad beq.n 8009c3a <_printf_i+0x15e> 8009cde: 6823 ldr r3, [r4, #0] 8009ce0: 079b lsls r3, r3, #30 8009ce2: d413 bmi.n 8009d0c <_printf_i+0x230> 8009ce4: 68e0 ldr r0, [r4, #12] 8009ce6: 9b03 ldr r3, [sp, #12] 8009ce8: 4298 cmp r0, r3 8009cea: bfb8 it lt 8009cec: 4618 movlt r0, r3 8009cee: e7a6 b.n 8009c3e <_printf_i+0x162> 8009cf0: 2301 movs r3, #1 8009cf2: 4632 mov r2, r6 8009cf4: 4649 mov r1, r9 8009cf6: 4640 mov r0, r8 8009cf8: 47d0 blx sl 8009cfa: 3001 adds r0, #1 8009cfc: d09d beq.n 8009c3a <_printf_i+0x15e> 8009cfe: 3501 adds r5, #1 8009d00: 68e3 ldr r3, [r4, #12] 8009d02: 9903 ldr r1, [sp, #12] 8009d04: 1a5b subs r3, r3, r1 8009d06: 42ab cmp r3, r5 8009d08: dcf2 bgt.n 8009cf0 <_printf_i+0x214> 8009d0a: e7eb b.n 8009ce4 <_printf_i+0x208> 8009d0c: 2500 movs r5, #0 8009d0e: f104 0619 add.w r6, r4, #25 8009d12: e7f5 b.n 8009d00 <_printf_i+0x224> 8009d14: 0800e014 .word 0x0800e014 8009d18: 0800e025 .word 0x0800e025 08009d1c : 8009d1c: b40c push {r2, r3} 8009d1e: b530 push {r4, r5, lr} 8009d20: 4b17 ldr r3, [pc, #92] @ (8009d80 ) 8009d22: 1e0c subs r4, r1, #0 8009d24: 681d ldr r5, [r3, #0] 8009d26: b09d sub sp, #116 @ 0x74 8009d28: da08 bge.n 8009d3c 8009d2a: 238b movs r3, #139 @ 0x8b 8009d2c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8009d30: 602b str r3, [r5, #0] 8009d32: b01d add sp, #116 @ 0x74 8009d34: e8bd 4030 ldmia.w sp!, {r4, r5, lr} 8009d38: b002 add sp, #8 8009d3a: 4770 bx lr 8009d3c: f44f 7302 mov.w r3, #520 @ 0x208 8009d40: f8ad 3014 strh.w r3, [sp, #20] 8009d44: bf0c ite eq 8009d46: 4623 moveq r3, r4 8009d48: f104 33ff addne.w r3, r4, #4294967295 @ 0xffffffff 8009d4c: 9304 str r3, [sp, #16] 8009d4e: 9307 str r3, [sp, #28] 8009d50: f64f 73ff movw r3, #65535 @ 0xffff 8009d54: 9002 str r0, [sp, #8] 8009d56: 9006 str r0, [sp, #24] 8009d58: f8ad 3016 strh.w r3, [sp, #22] 8009d5c: 4628 mov r0, r5 8009d5e: ab21 add r3, sp, #132 @ 0x84 8009d60: 9a20 ldr r2, [sp, #128] @ 0x80 8009d62: a902 add r1, sp, #8 8009d64: 9301 str r3, [sp, #4] 8009d66: f001 fda9 bl 800b8bc <_svfiprintf_r> 8009d6a: 1c43 adds r3, r0, #1 8009d6c: bfbc itt lt 8009d6e: 238b movlt r3, #139 @ 0x8b 8009d70: 602b strlt r3, [r5, #0] 8009d72: 2c00 cmp r4, #0 8009d74: d0dd beq.n 8009d32 8009d76: 2200 movs r2, #0 8009d78: 9b02 ldr r3, [sp, #8] 8009d7a: 701a strb r2, [r3, #0] 8009d7c: e7d9 b.n 8009d32 8009d7e: bf00 nop 8009d80: 20000028 .word 0x20000028 08009d84 : 8009d84: 2300 movs r3, #0 8009d86: b510 push {r4, lr} 8009d88: 4604 mov r4, r0 8009d8a: e9c0 3300 strd r3, r3, [r0] 8009d8e: e9c0 3304 strd r3, r3, [r0, #16] 8009d92: 6083 str r3, [r0, #8] 8009d94: 8181 strh r1, [r0, #12] 8009d96: 6643 str r3, [r0, #100] @ 0x64 8009d98: 81c2 strh r2, [r0, #14] 8009d9a: 6183 str r3, [r0, #24] 8009d9c: 4619 mov r1, r3 8009d9e: 2208 movs r2, #8 8009da0: 305c adds r0, #92 @ 0x5c 8009da2: f000 f96d bl 800a080 8009da6: 4b0d ldr r3, [pc, #52] @ (8009ddc ) 8009da8: 6224 str r4, [r4, #32] 8009daa: 6263 str r3, [r4, #36] @ 0x24 8009dac: 4b0c ldr r3, [pc, #48] @ (8009de0 ) 8009dae: 62a3 str r3, [r4, #40] @ 0x28 8009db0: 4b0c ldr r3, [pc, #48] @ (8009de4 ) 8009db2: 62e3 str r3, [r4, #44] @ 0x2c 8009db4: 4b0c ldr r3, [pc, #48] @ (8009de8 ) 8009db6: 6323 str r3, [r4, #48] @ 0x30 8009db8: 4b0c ldr r3, [pc, #48] @ (8009dec ) 8009dba: 429c cmp r4, r3 8009dbc: d006 beq.n 8009dcc 8009dbe: f103 0268 add.w r2, r3, #104 @ 0x68 8009dc2: 4294 cmp r4, r2 8009dc4: d002 beq.n 8009dcc 8009dc6: 33d0 adds r3, #208 @ 0xd0 8009dc8: 429c cmp r4, r3 8009dca: d105 bne.n 8009dd8 8009dcc: f104 0058 add.w r0, r4, #88 @ 0x58 8009dd0: e8bd 4010 ldmia.w sp!, {r4, lr} 8009dd4: f000 be3c b.w 800aa50 <__retarget_lock_init_recursive> 8009dd8: bd10 pop {r4, pc} 8009dda: bf00 nop 8009ddc: 0800c755 .word 0x0800c755 8009de0: 0800c77b .word 0x0800c77b 8009de4: 0800c7b3 .word 0x0800c7b3 8009de8: 0800c7d7 .word 0x0800c7d7 8009dec: 2000339c .word 0x2000339c 08009df0 : 8009df0: 4a02 ldr r2, [pc, #8] @ (8009dfc ) 8009df2: 4903 ldr r1, [pc, #12] @ (8009e00 ) 8009df4: 4803 ldr r0, [pc, #12] @ (8009e04 ) 8009df6: f000 b869 b.w 8009ecc <_fwalk_sglue> 8009dfa: bf00 nop 8009dfc: 20000014 .word 0x20000014 8009e00: 0800bf99 .word 0x0800bf99 8009e04: 2000002c .word 0x2000002c 08009e08 : 8009e08: 6841 ldr r1, [r0, #4] 8009e0a: 4b0c ldr r3, [pc, #48] @ (8009e3c ) 8009e0c: b510 push {r4, lr} 8009e0e: 4299 cmp r1, r3 8009e10: 4604 mov r4, r0 8009e12: d001 beq.n 8009e18 8009e14: f002 f8c0 bl 800bf98 <_fflush_r> 8009e18: 68a1 ldr r1, [r4, #8] 8009e1a: 4b09 ldr r3, [pc, #36] @ (8009e40 ) 8009e1c: 4299 cmp r1, r3 8009e1e: d002 beq.n 8009e26 8009e20: 4620 mov r0, r4 8009e22: f002 f8b9 bl 800bf98 <_fflush_r> 8009e26: 68e1 ldr r1, [r4, #12] 8009e28: 4b06 ldr r3, [pc, #24] @ (8009e44 ) 8009e2a: 4299 cmp r1, r3 8009e2c: d004 beq.n 8009e38 8009e2e: 4620 mov r0, r4 8009e30: e8bd 4010 ldmia.w sp!, {r4, lr} 8009e34: f002 b8b0 b.w 800bf98 <_fflush_r> 8009e38: bd10 pop {r4, pc} 8009e3a: bf00 nop 8009e3c: 2000339c .word 0x2000339c 8009e40: 20003404 .word 0x20003404 8009e44: 2000346c .word 0x2000346c 08009e48 : 8009e48: b510 push {r4, lr} 8009e4a: 4b0b ldr r3, [pc, #44] @ (8009e78 ) 8009e4c: 4c0b ldr r4, [pc, #44] @ (8009e7c ) 8009e4e: 4a0c ldr r2, [pc, #48] @ (8009e80 ) 8009e50: 4620 mov r0, r4 8009e52: 601a str r2, [r3, #0] 8009e54: 2104 movs r1, #4 8009e56: 2200 movs r2, #0 8009e58: f7ff ff94 bl 8009d84 8009e5c: f104 0068 add.w r0, r4, #104 @ 0x68 8009e60: 2201 movs r2, #1 8009e62: 2109 movs r1, #9 8009e64: f7ff ff8e bl 8009d84 8009e68: f104 00d0 add.w r0, r4, #208 @ 0xd0 8009e6c: 2202 movs r2, #2 8009e6e: e8bd 4010 ldmia.w sp!, {r4, lr} 8009e72: 2112 movs r1, #18 8009e74: f7ff bf86 b.w 8009d84 8009e78: 200034d4 .word 0x200034d4 8009e7c: 2000339c .word 0x2000339c 8009e80: 08009df1 .word 0x08009df1 08009e84 <__sfp_lock_acquire>: 8009e84: 4801 ldr r0, [pc, #4] @ (8009e8c <__sfp_lock_acquire+0x8>) 8009e86: f000 bde5 b.w 800aa54 <__retarget_lock_acquire_recursive> 8009e8a: bf00 nop 8009e8c: 200034ff .word 0x200034ff 08009e90 <__sfp_lock_release>: 8009e90: 4801 ldr r0, [pc, #4] @ (8009e98 <__sfp_lock_release+0x8>) 8009e92: f000 bde1 b.w 800aa58 <__retarget_lock_release_recursive> 8009e96: bf00 nop 8009e98: 200034ff .word 0x200034ff 08009e9c <__sinit>: 8009e9c: b510 push {r4, lr} 8009e9e: 4604 mov r4, r0 8009ea0: f7ff fff0 bl 8009e84 <__sfp_lock_acquire> 8009ea4: 6a23 ldr r3, [r4, #32] 8009ea6: b11b cbz r3, 8009eb0 <__sinit+0x14> 8009ea8: e8bd 4010 ldmia.w sp!, {r4, lr} 8009eac: f7ff bff0 b.w 8009e90 <__sfp_lock_release> 8009eb0: 4b04 ldr r3, [pc, #16] @ (8009ec4 <__sinit+0x28>) 8009eb2: 6223 str r3, [r4, #32] 8009eb4: 4b04 ldr r3, [pc, #16] @ (8009ec8 <__sinit+0x2c>) 8009eb6: 681b ldr r3, [r3, #0] 8009eb8: 2b00 cmp r3, #0 8009eba: d1f5 bne.n 8009ea8 <__sinit+0xc> 8009ebc: f7ff ffc4 bl 8009e48 8009ec0: e7f2 b.n 8009ea8 <__sinit+0xc> 8009ec2: bf00 nop 8009ec4: 08009e09 .word 0x08009e09 8009ec8: 200034d4 .word 0x200034d4 08009ecc <_fwalk_sglue>: 8009ecc: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8009ed0: 4607 mov r7, r0 8009ed2: 4688 mov r8, r1 8009ed4: 4614 mov r4, r2 8009ed6: 2600 movs r6, #0 8009ed8: e9d4 9501 ldrd r9, r5, [r4, #4] 8009edc: f1b9 0901 subs.w r9, r9, #1 8009ee0: d505 bpl.n 8009eee <_fwalk_sglue+0x22> 8009ee2: 6824 ldr r4, [r4, #0] 8009ee4: 2c00 cmp r4, #0 8009ee6: d1f7 bne.n 8009ed8 <_fwalk_sglue+0xc> 8009ee8: 4630 mov r0, r6 8009eea: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8009eee: 89ab ldrh r3, [r5, #12] 8009ef0: 2b01 cmp r3, #1 8009ef2: d907 bls.n 8009f04 <_fwalk_sglue+0x38> 8009ef4: f9b5 300e ldrsh.w r3, [r5, #14] 8009ef8: 3301 adds r3, #1 8009efa: d003 beq.n 8009f04 <_fwalk_sglue+0x38> 8009efc: 4629 mov r1, r5 8009efe: 4638 mov r0, r7 8009f00: 47c0 blx r8 8009f02: 4306 orrs r6, r0 8009f04: 3568 adds r5, #104 @ 0x68 8009f06: e7e9 b.n 8009edc <_fwalk_sglue+0x10> 08009f08 <_vsniprintf_r>: 8009f08: b530 push {r4, r5, lr} 8009f0a: 4614 mov r4, r2 8009f0c: 2c00 cmp r4, #0 8009f0e: 4605 mov r5, r0 8009f10: 461a mov r2, r3 8009f12: b09b sub sp, #108 @ 0x6c 8009f14: da05 bge.n 8009f22 <_vsniprintf_r+0x1a> 8009f16: 238b movs r3, #139 @ 0x8b 8009f18: 6003 str r3, [r0, #0] 8009f1a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8009f1e: b01b add sp, #108 @ 0x6c 8009f20: bd30 pop {r4, r5, pc} 8009f22: f44f 7302 mov.w r3, #520 @ 0x208 8009f26: f8ad 300c strh.w r3, [sp, #12] 8009f2a: bf0c ite eq 8009f2c: 4623 moveq r3, r4 8009f2e: f104 33ff addne.w r3, r4, #4294967295 @ 0xffffffff 8009f32: 9302 str r3, [sp, #8] 8009f34: 9305 str r3, [sp, #20] 8009f36: f64f 73ff movw r3, #65535 @ 0xffff 8009f3a: 9100 str r1, [sp, #0] 8009f3c: 9104 str r1, [sp, #16] 8009f3e: f8ad 300e strh.w r3, [sp, #14] 8009f42: 4669 mov r1, sp 8009f44: 9b1e ldr r3, [sp, #120] @ 0x78 8009f46: f001 fcb9 bl 800b8bc <_svfiprintf_r> 8009f4a: 1c43 adds r3, r0, #1 8009f4c: bfbc itt lt 8009f4e: 238b movlt r3, #139 @ 0x8b 8009f50: 602b strlt r3, [r5, #0] 8009f52: 2c00 cmp r4, #0 8009f54: d0e3 beq.n 8009f1e <_vsniprintf_r+0x16> 8009f56: 2200 movs r2, #0 8009f58: 9b00 ldr r3, [sp, #0] 8009f5a: 701a strb r2, [r3, #0] 8009f5c: e7df b.n 8009f1e <_vsniprintf_r+0x16> ... 08009f60 : 8009f60: b507 push {r0, r1, r2, lr} 8009f62: 9300 str r3, [sp, #0] 8009f64: 4613 mov r3, r2 8009f66: 460a mov r2, r1 8009f68: 4601 mov r1, r0 8009f6a: 4803 ldr r0, [pc, #12] @ (8009f78 ) 8009f6c: 6800 ldr r0, [r0, #0] 8009f6e: f7ff ffcb bl 8009f08 <_vsniprintf_r> 8009f72: b003 add sp, #12 8009f74: f85d fb04 ldr.w pc, [sp], #4 8009f78: 20000028 .word 0x20000028 08009f7c : 8009f7c: b40f push {r0, r1, r2, r3} 8009f7e: b507 push {r0, r1, r2, lr} 8009f80: 4906 ldr r1, [pc, #24] @ (8009f9c ) 8009f82: ab04 add r3, sp, #16 8009f84: 6808 ldr r0, [r1, #0] 8009f86: f853 2b04 ldr.w r2, [r3], #4 8009f8a: 6881 ldr r1, [r0, #8] 8009f8c: 9301 str r3, [sp, #4] 8009f8e: f001 fdb9 bl 800bb04 <_vfiprintf_r> 8009f92: b003 add sp, #12 8009f94: f85d eb04 ldr.w lr, [sp], #4 8009f98: b004 add sp, #16 8009f9a: 4770 bx lr 8009f9c: 20000028 .word 0x20000028 08009fa0 <_puts_r>: 8009fa0: 6a03 ldr r3, [r0, #32] 8009fa2: b570 push {r4, r5, r6, lr} 8009fa4: 4605 mov r5, r0 8009fa6: 460e mov r6, r1 8009fa8: 6884 ldr r4, [r0, #8] 8009faa: b90b cbnz r3, 8009fb0 <_puts_r+0x10> 8009fac: f7ff ff76 bl 8009e9c <__sinit> 8009fb0: 6e63 ldr r3, [r4, #100] @ 0x64 8009fb2: 07db lsls r3, r3, #31 8009fb4: d405 bmi.n 8009fc2 <_puts_r+0x22> 8009fb6: 89a3 ldrh r3, [r4, #12] 8009fb8: 0598 lsls r0, r3, #22 8009fba: d402 bmi.n 8009fc2 <_puts_r+0x22> 8009fbc: 6da0 ldr r0, [r4, #88] @ 0x58 8009fbe: f000 fd49 bl 800aa54 <__retarget_lock_acquire_recursive> 8009fc2: 89a3 ldrh r3, [r4, #12] 8009fc4: 0719 lsls r1, r3, #28 8009fc6: d502 bpl.n 8009fce <_puts_r+0x2e> 8009fc8: 6923 ldr r3, [r4, #16] 8009fca: 2b00 cmp r3, #0 8009fcc: d135 bne.n 800a03a <_puts_r+0x9a> 8009fce: 4621 mov r1, r4 8009fd0: 4628 mov r0, r5 8009fd2: f002 fcfd bl 800c9d0 <__swsetup_r> 8009fd6: b380 cbz r0, 800a03a <_puts_r+0x9a> 8009fd8: f04f 35ff mov.w r5, #4294967295 @ 0xffffffff 8009fdc: 6e63 ldr r3, [r4, #100] @ 0x64 8009fde: 07da lsls r2, r3, #31 8009fe0: d405 bmi.n 8009fee <_puts_r+0x4e> 8009fe2: 89a3 ldrh r3, [r4, #12] 8009fe4: 059b lsls r3, r3, #22 8009fe6: d402 bmi.n 8009fee <_puts_r+0x4e> 8009fe8: 6da0 ldr r0, [r4, #88] @ 0x58 8009fea: f000 fd35 bl 800aa58 <__retarget_lock_release_recursive> 8009fee: 4628 mov r0, r5 8009ff0: bd70 pop {r4, r5, r6, pc} 8009ff2: 2b00 cmp r3, #0 8009ff4: da04 bge.n 800a000 <_puts_r+0x60> 8009ff6: 69a2 ldr r2, [r4, #24] 8009ff8: 429a cmp r2, r3 8009ffa: dc17 bgt.n 800a02c <_puts_r+0x8c> 8009ffc: 290a cmp r1, #10 8009ffe: d015 beq.n 800a02c <_puts_r+0x8c> 800a000: 6823 ldr r3, [r4, #0] 800a002: 1c5a adds r2, r3, #1 800a004: 6022 str r2, [r4, #0] 800a006: 7019 strb r1, [r3, #0] 800a008: 68a3 ldr r3, [r4, #8] 800a00a: f816 1f01 ldrb.w r1, [r6, #1]! 800a00e: 3b01 subs r3, #1 800a010: 60a3 str r3, [r4, #8] 800a012: 2900 cmp r1, #0 800a014: d1ed bne.n 8009ff2 <_puts_r+0x52> 800a016: 2b00 cmp r3, #0 800a018: da11 bge.n 800a03e <_puts_r+0x9e> 800a01a: 4622 mov r2, r4 800a01c: 210a movs r1, #10 800a01e: 4628 mov r0, r5 800a020: f002 fc98 bl 800c954 <__swbuf_r> 800a024: 3001 adds r0, #1 800a026: d0d7 beq.n 8009fd8 <_puts_r+0x38> 800a028: 250a movs r5, #10 800a02a: e7d7 b.n 8009fdc <_puts_r+0x3c> 800a02c: 4622 mov r2, r4 800a02e: 4628 mov r0, r5 800a030: f002 fc90 bl 800c954 <__swbuf_r> 800a034: 3001 adds r0, #1 800a036: d1e7 bne.n 800a008 <_puts_r+0x68> 800a038: e7ce b.n 8009fd8 <_puts_r+0x38> 800a03a: 3e01 subs r6, #1 800a03c: e7e4 b.n 800a008 <_puts_r+0x68> 800a03e: 6823 ldr r3, [r4, #0] 800a040: 1c5a adds r2, r3, #1 800a042: 6022 str r2, [r4, #0] 800a044: 220a movs r2, #10 800a046: 701a strb r2, [r3, #0] 800a048: e7ee b.n 800a028 <_puts_r+0x88> ... 0800a04c : 800a04c: 4b02 ldr r3, [pc, #8] @ (800a058 ) 800a04e: 4601 mov r1, r0 800a050: 6818 ldr r0, [r3, #0] 800a052: f7ff bfa5 b.w 8009fa0 <_puts_r> 800a056: bf00 nop 800a058: 20000028 .word 0x20000028 0800a05c : 800a05c: b510 push {r4, lr} 800a05e: b16a cbz r2, 800a07c 800a060: 3901 subs r1, #1 800a062: 1884 adds r4, r0, r2 800a064: f810 2b01 ldrb.w r2, [r0], #1 800a068: f811 3f01 ldrb.w r3, [r1, #1]! 800a06c: 429a cmp r2, r3 800a06e: d103 bne.n 800a078 800a070: 42a0 cmp r0, r4 800a072: d001 beq.n 800a078 800a074: 2a00 cmp r2, #0 800a076: d1f5 bne.n 800a064 800a078: 1ad0 subs r0, r2, r3 800a07a: bd10 pop {r4, pc} 800a07c: 4610 mov r0, r2 800a07e: e7fc b.n 800a07a 0800a080 : 800a080: 4603 mov r3, r0 800a082: 4402 add r2, r0 800a084: 4293 cmp r3, r2 800a086: d100 bne.n 800a08a 800a088: 4770 bx lr 800a08a: f803 1b01 strb.w r1, [r3], #1 800a08e: e7f9 b.n 800a084 0800a090 : 800a090: b538 push {r3, r4, r5, lr} 800a092: 4b0b ldr r3, [pc, #44] @ (800a0c0 ) 800a094: 4604 mov r4, r0 800a096: 681d ldr r5, [r3, #0] 800a098: 6b6b ldr r3, [r5, #52] @ 0x34 800a09a: b953 cbnz r3, 800a0b2 800a09c: 2024 movs r0, #36 @ 0x24 800a09e: f001 fe49 bl 800bd34 800a0a2: 4602 mov r2, r0 800a0a4: 6368 str r0, [r5, #52] @ 0x34 800a0a6: b920 cbnz r0, 800a0b2 800a0a8: 213d movs r1, #61 @ 0x3d 800a0aa: 4b06 ldr r3, [pc, #24] @ (800a0c4 ) 800a0ac: 4806 ldr r0, [pc, #24] @ (800a0c8 ) 800a0ae: f000 fcf9 bl 800aaa4 <__assert_func> 800a0b2: 4620 mov r0, r4 800a0b4: 6b69 ldr r1, [r5, #52] @ 0x34 800a0b6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800a0ba: f000 b807 b.w 800a0cc 800a0be: bf00 nop 800a0c0: 20000028 .word 0x20000028 800a0c4: 0800e036 .word 0x0800e036 800a0c8: 0800e04d .word 0x0800e04d 0800a0cc : 800a0cc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800a0d0: 2300 movs r3, #0 800a0d2: 460c mov r4, r1 800a0d4: e9d0 0100 ldrd r0, r1, [r0] 800a0d8: 4a4b ldr r2, [pc, #300] @ (800a208 ) 800a0da: f7f7 f895 bl 8001208 <__aeabi_ldivmod> 800a0de: f44f 6161 mov.w r1, #3600 @ 0xe10 800a0e2: 2a00 cmp r2, #0 800a0e4: bfbc itt lt 800a0e6: f502 32a8 addlt.w r2, r2, #86016 @ 0x15000 800a0ea: f502 72c0 addlt.w r2, r2, #384 @ 0x180 800a0ee: fbb2 f3f1 udiv r3, r2, r1 800a0f2: fb01 2213 mls r2, r1, r3, r2 800a0f6: f04f 013c mov.w r1, #60 @ 0x3c 800a0fa: 60a3 str r3, [r4, #8] 800a0fc: fbb2 f3f1 udiv r3, r2, r1 800a100: fb01 2213 mls r2, r1, r3, r2 800a104: 6022 str r2, [r4, #0] 800a106: f04f 0207 mov.w r2, #7 800a10a: f500 202f add.w r0, r0, #716800 @ 0xaf000 800a10e: bfac ite ge 800a110: f600 206c addwge r0, r0, #2668 @ 0xa6c 800a114: f600 206b addwlt r0, r0, #2667 @ 0xa6b 800a118: 6063 str r3, [r4, #4] 800a11a: 1cc3 adds r3, r0, #3 800a11c: fb93 f2f2 sdiv r2, r3, r2 800a120: ebc2 02c2 rsb r2, r2, r2, lsl #3 800a124: 1a9b subs r3, r3, r2 800a126: bf48 it mi 800a128: 3307 addmi r3, #7 800a12a: 2800 cmp r0, #0 800a12c: 4937 ldr r1, [pc, #220] @ (800a20c ) 800a12e: 61a3 str r3, [r4, #24] 800a130: bfbd ittte lt 800a132: f5a0 330e sublt.w r3, r0, #145408 @ 0x23800 800a136: f5a3 732c sublt.w r3, r3, #688 @ 0x2b0 800a13a: fb93 f1f1 sdivlt r1, r3, r1 800a13e: fb90 f1f1 sdivge r1, r0, r1 800a142: 4b33 ldr r3, [pc, #204] @ (800a210 ) 800a144: f240 5cb4 movw ip, #1460 @ 0x5b4 800a148: fb03 0001 mla r0, r3, r1, r0 800a14c: f648 63ac movw r3, #36524 @ 0x8eac 800a150: fbb0 f3f3 udiv r3, r0, r3 800a154: fbb0 f2fc udiv r2, r0, ip 800a158: 4403 add r3, r0 800a15a: 1a9b subs r3, r3, r2 800a15c: 4a2d ldr r2, [pc, #180] @ (800a214 ) 800a15e: f240 176d movw r7, #365 @ 0x16d 800a162: fbb0 f2f2 udiv r2, r0, r2 800a166: 1a9b subs r3, r3, r2 800a168: fbb3 f2f7 udiv r2, r3, r7 800a16c: 2664 movs r6, #100 @ 0x64 800a16e: fbb3 f3fc udiv r3, r3, ip 800a172: fbb2 f5f6 udiv r5, r2, r6 800a176: 1aeb subs r3, r5, r3 800a178: 4403 add r3, r0 800a17a: 2099 movs r0, #153 @ 0x99 800a17c: fb07 3312 mls r3, r7, r2, r3 800a180: eb03 0783 add.w r7, r3, r3, lsl #2 800a184: 3702 adds r7, #2 800a186: fbb7 fcf0 udiv ip, r7, r0 800a18a: f04f 0805 mov.w r8, #5 800a18e: fb00 f00c mul.w r0, r0, ip 800a192: 3002 adds r0, #2 800a194: fbb0 f0f8 udiv r0, r0, r8 800a198: f103 0e01 add.w lr, r3, #1 800a19c: ebae 0000 sub.w r0, lr, r0 800a1a0: f240 5ef9 movw lr, #1529 @ 0x5f9 800a1a4: 4577 cmp r7, lr 800a1a6: bf8c ite hi 800a1a8: f06f 0709 mvnhi.w r7, #9 800a1ac: 2702 movls r7, #2 800a1ae: 4467 add r7, ip 800a1b0: f44f 7cc8 mov.w ip, #400 @ 0x190 800a1b4: fb0c 2101 mla r1, ip, r1, r2 800a1b8: 2f01 cmp r7, #1 800a1ba: bf98 it ls 800a1bc: 3101 addls r1, #1 800a1be: f5b3 7f99 cmp.w r3, #306 @ 0x132 800a1c2: d30c bcc.n 800a1de 800a1c4: f5a3 7399 sub.w r3, r3, #306 @ 0x132 800a1c8: 61e3 str r3, [r4, #28] 800a1ca: 2300 movs r3, #0 800a1cc: f2a1 716c subw r1, r1, #1900 @ 0x76c 800a1d0: 60e0 str r0, [r4, #12] 800a1d2: e9c4 7104 strd r7, r1, [r4, #16] 800a1d6: 4620 mov r0, r4 800a1d8: 6223 str r3, [r4, #32] 800a1da: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800a1de: f012 0f03 tst.w r2, #3 800a1e2: d102 bne.n 800a1ea 800a1e4: fb06 2515 mls r5, r6, r5, r2 800a1e8: b95d cbnz r5, 800a202 800a1ea: f44f 75c8 mov.w r5, #400 @ 0x190 800a1ee: fbb2 f6f5 udiv r6, r2, r5 800a1f2: fb05 2216 mls r2, r5, r6, r2 800a1f6: fab2 f282 clz r2, r2 800a1fa: 0952 lsrs r2, r2, #5 800a1fc: 333b adds r3, #59 @ 0x3b 800a1fe: 4413 add r3, r2 800a200: e7e2 b.n 800a1c8 800a202: 2201 movs r2, #1 800a204: e7fa b.n 800a1fc 800a206: bf00 nop 800a208: 00015180 .word 0x00015180 800a20c: 00023ab1 .word 0x00023ab1 800a210: fffdc54f .word 0xfffdc54f 800a214: 00023ab0 .word 0x00023ab0 0800a218 : 800a218: b538 push {r3, r4, r5, lr} 800a21a: 4b0b ldr r3, [pc, #44] @ (800a248 ) 800a21c: 4604 mov r4, r0 800a21e: 681d ldr r5, [r3, #0] 800a220: 6b6b ldr r3, [r5, #52] @ 0x34 800a222: b953 cbnz r3, 800a23a 800a224: 2024 movs r0, #36 @ 0x24 800a226: f001 fd85 bl 800bd34 800a22a: 4602 mov r2, r0 800a22c: 6368 str r0, [r5, #52] @ 0x34 800a22e: b920 cbnz r0, 800a23a 800a230: 2132 movs r1, #50 @ 0x32 800a232: 4b06 ldr r3, [pc, #24] @ (800a24c ) 800a234: 4806 ldr r0, [pc, #24] @ (800a250 ) 800a236: f000 fc35 bl 800aaa4 <__assert_func> 800a23a: 4620 mov r0, r4 800a23c: 6b69 ldr r1, [r5, #52] @ 0x34 800a23e: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800a242: f000 b807 b.w 800a254 800a246: bf00 nop 800a248: 20000028 .word 0x20000028 800a24c: 0800e036 .word 0x0800e036 800a250: 0800e0a5 .word 0x0800e0a5 0800a254 : 800a254: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800a258: 460c mov r4, r1 800a25a: 4680 mov r8, r0 800a25c: f000 fbca bl 800a9f4 <__gettzinfo> 800a260: 4621 mov r1, r4 800a262: 4605 mov r5, r0 800a264: 4640 mov r0, r8 800a266: f7ff ff31 bl 800a0cc 800a26a: 6943 ldr r3, [r0, #20] 800a26c: 4604 mov r4, r0 800a26e: 0799 lsls r1, r3, #30 800a270: f203 776c addw r7, r3, #1900 @ 0x76c 800a274: d106 bne.n 800a284 800a276: 2264 movs r2, #100 @ 0x64 800a278: fb97 f3f2 sdiv r3, r7, r2 800a27c: fb02 7313 mls r3, r2, r3, r7 800a280: 2b00 cmp r3, #0 800a282: d170 bne.n 800a366 800a284: f44f 72c8 mov.w r2, #400 @ 0x190 800a288: fb97 f3f2 sdiv r3, r7, r2 800a28c: fb02 7313 mls r3, r2, r3, r7 800a290: fab3 f383 clz r3, r3 800a294: 095b lsrs r3, r3, #5 800a296: 2230 movs r2, #48 @ 0x30 800a298: 4e63 ldr r6, [pc, #396] @ (800a428 ) 800a29a: fb02 6603 mla r6, r2, r3, r6 800a29e: f000 f96f bl 800a580 <__tz_lock> 800a2a2: f000 f979 bl 800a598 <_tzset_unlocked> 800a2a6: 4b61 ldr r3, [pc, #388] @ (800a42c ) 800a2a8: 681b ldr r3, [r3, #0] 800a2aa: 2b00 cmp r3, #0 800a2ac: d06a beq.n 800a384 800a2ae: 686b ldr r3, [r5, #4] 800a2b0: 42bb cmp r3, r7 800a2b2: d15a bne.n 800a36a 800a2b4: e9d8 2300 ldrd r2, r3, [r8] 800a2b8: e9d5 0108 ldrd r0, r1, [r5, #32] 800a2bc: 682f ldr r7, [r5, #0] 800a2be: 2f00 cmp r7, #0 800a2c0: d15b bne.n 800a37a 800a2c2: 4282 cmp r2, r0 800a2c4: eb73 0101 sbcs.w r1, r3, r1 800a2c8: db5e blt.n 800a388 800a2ca: 2301 movs r3, #1 800a2cc: 6223 str r3, [r4, #32] 800a2ce: 6d2b ldr r3, [r5, #80] @ 0x50 800a2d0: f44f 6261 mov.w r2, #3600 @ 0xe10 800a2d4: fb93 f0f2 sdiv r0, r3, r2 800a2d8: fb02 3310 mls r3, r2, r0, r3 800a2dc: 223c movs r2, #60 @ 0x3c 800a2de: fb93 f5f2 sdiv r5, r3, r2 800a2e2: fb02 3215 mls r2, r2, r5, r3 800a2e6: 6823 ldr r3, [r4, #0] 800a2e8: 6861 ldr r1, [r4, #4] 800a2ea: 1a9b subs r3, r3, r2 800a2ec: 68a2 ldr r2, [r4, #8] 800a2ee: 1b49 subs r1, r1, r5 800a2f0: 1a12 subs r2, r2, r0 800a2f2: 2b3b cmp r3, #59 @ 0x3b 800a2f4: 6023 str r3, [r4, #0] 800a2f6: 6061 str r1, [r4, #4] 800a2f8: 60a2 str r2, [r4, #8] 800a2fa: dd51 ble.n 800a3a0 800a2fc: 3101 adds r1, #1 800a2fe: 6061 str r1, [r4, #4] 800a300: 3b3c subs r3, #60 @ 0x3c 800a302: 6023 str r3, [r4, #0] 800a304: 6863 ldr r3, [r4, #4] 800a306: 2b3b cmp r3, #59 @ 0x3b 800a308: dd50 ble.n 800a3ac 800a30a: 3201 adds r2, #1 800a30c: 60a2 str r2, [r4, #8] 800a30e: 3b3c subs r3, #60 @ 0x3c 800a310: 6063 str r3, [r4, #4] 800a312: 68a3 ldr r3, [r4, #8] 800a314: 2b17 cmp r3, #23 800a316: dd4f ble.n 800a3b8 800a318: 69e2 ldr r2, [r4, #28] 800a31a: 3b18 subs r3, #24 800a31c: 3201 adds r2, #1 800a31e: 61e2 str r2, [r4, #28] 800a320: 69a2 ldr r2, [r4, #24] 800a322: 60a3 str r3, [r4, #8] 800a324: 3201 adds r2, #1 800a326: 2a07 cmp r2, #7 800a328: bfa8 it ge 800a32a: 2200 movge r2, #0 800a32c: 61a2 str r2, [r4, #24] 800a32e: 68e2 ldr r2, [r4, #12] 800a330: 6923 ldr r3, [r4, #16] 800a332: 3201 adds r2, #1 800a334: 60e2 str r2, [r4, #12] 800a336: f856 1023 ldr.w r1, [r6, r3, lsl #2] 800a33a: 428a cmp r2, r1 800a33c: dd0e ble.n 800a35c 800a33e: 2b0b cmp r3, #11 800a340: eba2 0201 sub.w r2, r2, r1 800a344: 60e2 str r2, [r4, #12] 800a346: f103 0201 add.w r2, r3, #1 800a34a: bf05 ittet eq 800a34c: 2200 moveq r2, #0 800a34e: 6963 ldreq r3, [r4, #20] 800a350: 6122 strne r2, [r4, #16] 800a352: 3301 addeq r3, #1 800a354: bf02 ittt eq 800a356: 6122 streq r2, [r4, #16] 800a358: 6163 streq r3, [r4, #20] 800a35a: 61e2 streq r2, [r4, #28] 800a35c: f000 f916 bl 800a58c <__tz_unlock> 800a360: 4620 mov r0, r4 800a362: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800a366: 2301 movs r3, #1 800a368: e795 b.n 800a296 800a36a: 4638 mov r0, r7 800a36c: f000 f860 bl 800a430 <__tzcalc_limits> 800a370: 2800 cmp r0, #0 800a372: d19f bne.n 800a2b4 800a374: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800a378: e004 b.n 800a384 800a37a: 4282 cmp r2, r0 800a37c: eb73 0101 sbcs.w r1, r3, r1 800a380: da02 bge.n 800a388 800a382: 2300 movs r3, #0 800a384: 6223 str r3, [r4, #32] 800a386: e009 b.n 800a39c 800a388: e9d5 0112 ldrd r0, r1, [r5, #72] @ 0x48 800a38c: 4282 cmp r2, r0 800a38e: 418b sbcs r3, r1 800a390: bfb4 ite lt 800a392: 2301 movlt r3, #1 800a394: 2300 movge r3, #0 800a396: 6223 str r3, [r4, #32] 800a398: 2b00 cmp r3, #0 800a39a: d198 bne.n 800a2ce 800a39c: 6aab ldr r3, [r5, #40] @ 0x28 800a39e: e797 b.n 800a2d0 800a3a0: 2b00 cmp r3, #0 800a3a2: daaf bge.n 800a304 800a3a4: 3901 subs r1, #1 800a3a6: 6061 str r1, [r4, #4] 800a3a8: 333c adds r3, #60 @ 0x3c 800a3aa: e7aa b.n 800a302 800a3ac: 2b00 cmp r3, #0 800a3ae: dab0 bge.n 800a312 800a3b0: 3a01 subs r2, #1 800a3b2: 60a2 str r2, [r4, #8] 800a3b4: 333c adds r3, #60 @ 0x3c 800a3b6: e7ab b.n 800a310 800a3b8: 2b00 cmp r3, #0 800a3ba: dacf bge.n 800a35c 800a3bc: 69e2 ldr r2, [r4, #28] 800a3be: 3318 adds r3, #24 800a3c0: 3a01 subs r2, #1 800a3c2: 61e2 str r2, [r4, #28] 800a3c4: 69a2 ldr r2, [r4, #24] 800a3c6: 60a3 str r3, [r4, #8] 800a3c8: 3a01 subs r2, #1 800a3ca: bf48 it mi 800a3cc: 2206 movmi r2, #6 800a3ce: 61a2 str r2, [r4, #24] 800a3d0: 68e2 ldr r2, [r4, #12] 800a3d2: 3a01 subs r2, #1 800a3d4: 60e2 str r2, [r4, #12] 800a3d6: 2a00 cmp r2, #0 800a3d8: d1c0 bne.n 800a35c 800a3da: 6923 ldr r3, [r4, #16] 800a3dc: 3b01 subs r3, #1 800a3de: d405 bmi.n 800a3ec 800a3e0: 6123 str r3, [r4, #16] 800a3e2: 6923 ldr r3, [r4, #16] 800a3e4: f856 3023 ldr.w r3, [r6, r3, lsl #2] 800a3e8: 60e3 str r3, [r4, #12] 800a3ea: e7b7 b.n 800a35c 800a3ec: 230b movs r3, #11 800a3ee: 6123 str r3, [r4, #16] 800a3f0: 6963 ldr r3, [r4, #20] 800a3f2: 1e5a subs r2, r3, #1 800a3f4: 6162 str r2, [r4, #20] 800a3f6: 0792 lsls r2, r2, #30 800a3f8: f203 736b addw r3, r3, #1899 @ 0x76b 800a3fc: d105 bne.n 800a40a 800a3fe: 2164 movs r1, #100 @ 0x64 800a400: fb93 f2f1 sdiv r2, r3, r1 800a404: fb01 3212 mls r2, r1, r2, r3 800a408: b962 cbnz r2, 800a424 800a40a: f44f 72c8 mov.w r2, #400 @ 0x190 800a40e: fb93 f1f2 sdiv r1, r3, r2 800a412: fb02 3311 mls r3, r2, r1, r3 800a416: fab3 f383 clz r3, r3 800a41a: 095b lsrs r3, r3, #5 800a41c: f503 73b6 add.w r3, r3, #364 @ 0x16c 800a420: 61e3 str r3, [r4, #28] 800a422: e7de b.n 800a3e2 800a424: 2301 movs r3, #1 800a426: e7f9 b.n 800a41c 800a428: 0800e100 .word 0x0800e100 800a42c: 200034f8 .word 0x200034f8 0800a430 <__tzcalc_limits>: 800a430: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800a434: 4604 mov r4, r0 800a436: f000 fadd bl 800a9f4 <__gettzinfo> 800a43a: f240 73b1 movw r3, #1969 @ 0x7b1 800a43e: 429c cmp r4, r3 800a440: f340 8098 ble.w 800a574 <__tzcalc_limits+0x144> 800a444: f46f 67f6 mvn.w r7, #1968 @ 0x7b0 800a448: f240 126d movw r2, #365 @ 0x16d 800a44c: 19e5 adds r5, r4, r7 800a44e: f2a4 73b2 subw r3, r4, #1970 @ 0x7b2 800a452: 10ad asrs r5, r5, #2 800a454: fb02 5503 mla r5, r2, r3, r5 800a458: f06f 0263 mvn.w r2, #99 @ 0x63 800a45c: f2a4 736d subw r3, r4, #1901 @ 0x76d 800a460: fb93 f3f2 sdiv r3, r3, r2 800a464: f46f 6cc8 mvn.w ip, #1600 @ 0x640 800a468: f44f 72c8 mov.w r2, #400 @ 0x190 800a46c: 441d add r5, r3 800a46e: eb04 030c add.w r3, r4, ip 800a472: fbb3 f3f2 udiv r3, r3, r2 800a476: 4601 mov r1, r0 800a478: 4f3f ldr r7, [pc, #252] @ (800a578 <__tzcalc_limits+0x148>) 800a47a: 6044 str r4, [r0, #4] 800a47c: 441d add r5, r3 800a47e: f100 0c50 add.w ip, r0, #80 @ 0x50 800a482: 7a0b ldrb r3, [r1, #8] 800a484: 694a ldr r2, [r1, #20] 800a486: 2b4a cmp r3, #74 @ 0x4a 800a488: d133 bne.n 800a4f2 <__tzcalc_limits+0xc2> 800a48a: 07a6 lsls r6, r4, #30 800a48c: eb05 0302 add.w r3, r5, r2 800a490: d106 bne.n 800a4a0 <__tzcalc_limits+0x70> 800a492: f04f 0e64 mov.w lr, #100 @ 0x64 800a496: fb94 f6fe sdiv r6, r4, lr 800a49a: fb0e 4616 mls r6, lr, r6, r4 800a49e: b936 cbnz r6, 800a4ae <__tzcalc_limits+0x7e> 800a4a0: f44f 7ec8 mov.w lr, #400 @ 0x190 800a4a4: fb94 f6fe sdiv r6, r4, lr 800a4a8: fb0e 4616 mls r6, lr, r6, r4 800a4ac: b9fe cbnz r6, 800a4ee <__tzcalc_limits+0xbe> 800a4ae: 2a3b cmp r2, #59 @ 0x3b 800a4b0: bfd4 ite le 800a4b2: 2200 movle r2, #0 800a4b4: 2201 movgt r2, #1 800a4b6: 4413 add r3, r2 800a4b8: 3b01 subs r3, #1 800a4ba: 698a ldr r2, [r1, #24] 800a4bc: 17d6 asrs r6, r2, #31 800a4be: fbc3 2607 smlal r2, r6, r3, r7 800a4c2: 6a8b ldr r3, [r1, #40] @ 0x28 800a4c4: 18d2 adds r2, r2, r3 800a4c6: eb46 73e3 adc.w r3, r6, r3, asr #31 800a4ca: e9c1 2308 strd r2, r3, [r1, #32] 800a4ce: 3128 adds r1, #40 @ 0x28 800a4d0: 458c cmp ip, r1 800a4d2: d1d6 bne.n 800a482 <__tzcalc_limits+0x52> 800a4d4: e9d0 4308 ldrd r4, r3, [r0, #32] 800a4d8: e9d0 1212 ldrd r1, r2, [r0, #72] @ 0x48 800a4dc: 428c cmp r4, r1 800a4de: 4193 sbcs r3, r2 800a4e0: bfb4 ite lt 800a4e2: 2301 movlt r3, #1 800a4e4: 2300 movge r3, #0 800a4e6: 6003 str r3, [r0, #0] 800a4e8: 2001 movs r0, #1 800a4ea: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800a4ee: 2200 movs r2, #0 800a4f0: e7e1 b.n 800a4b6 <__tzcalc_limits+0x86> 800a4f2: 2b44 cmp r3, #68 @ 0x44 800a4f4: d101 bne.n 800a4fa <__tzcalc_limits+0xca> 800a4f6: 18ab adds r3, r5, r2 800a4f8: e7df b.n 800a4ba <__tzcalc_limits+0x8a> 800a4fa: 07a3 lsls r3, r4, #30 800a4fc: d105 bne.n 800a50a <__tzcalc_limits+0xda> 800a4fe: 2664 movs r6, #100 @ 0x64 800a500: fb94 f3f6 sdiv r3, r4, r6 800a504: fb06 4313 mls r3, r6, r3, r4 800a508: bb73 cbnz r3, 800a568 <__tzcalc_limits+0x138> 800a50a: f44f 73c8 mov.w r3, #400 @ 0x190 800a50e: fb94 f6f3 sdiv r6, r4, r3 800a512: fb03 4616 mls r6, r3, r6, r4 800a516: fab6 f686 clz r6, r6 800a51a: 0976 lsrs r6, r6, #5 800a51c: f04f 0a30 mov.w sl, #48 @ 0x30 800a520: 462b mov r3, r5 800a522: f04f 0800 mov.w r8, #0 800a526: f8df e054 ldr.w lr, [pc, #84] @ 800a57c <__tzcalc_limits+0x14c> 800a52a: f8d1 900c ldr.w r9, [r1, #12] 800a52e: fb0a e606 mla r6, sl, r6, lr 800a532: f108 0801 add.w r8, r8, #1 800a536: 45c1 cmp r9, r8 800a538: f856 e028 ldr.w lr, [r6, r8, lsl #2] 800a53c: dc16 bgt.n 800a56c <__tzcalc_limits+0x13c> 800a53e: 2607 movs r6, #7 800a540: f103 0804 add.w r8, r3, #4 800a544: fb98 f6f6 sdiv r6, r8, r6 800a548: ebc6 06c6 rsb r6, r6, r6, lsl #3 800a54c: eba8 0606 sub.w r6, r8, r6 800a550: 1b92 subs r2, r2, r6 800a552: 690e ldr r6, [r1, #16] 800a554: bf48 it mi 800a556: 3207 addmi r2, #7 800a558: 3e01 subs r6, #1 800a55a: ebc6 06c6 rsb r6, r6, r6, lsl #3 800a55e: 4432 add r2, r6 800a560: 4572 cmp r2, lr 800a562: da05 bge.n 800a570 <__tzcalc_limits+0x140> 800a564: 4413 add r3, r2 800a566: e7a8 b.n 800a4ba <__tzcalc_limits+0x8a> 800a568: 2601 movs r6, #1 800a56a: e7d7 b.n 800a51c <__tzcalc_limits+0xec> 800a56c: 4473 add r3, lr 800a56e: e7e0 b.n 800a532 <__tzcalc_limits+0x102> 800a570: 3a07 subs r2, #7 800a572: e7f5 b.n 800a560 <__tzcalc_limits+0x130> 800a574: 2000 movs r0, #0 800a576: e7b8 b.n 800a4ea <__tzcalc_limits+0xba> 800a578: 00015180 .word 0x00015180 800a57c: 0800e0fc .word 0x0800e0fc 0800a580 <__tz_lock>: 800a580: 4801 ldr r0, [pc, #4] @ (800a588 <__tz_lock+0x8>) 800a582: f000 ba66 b.w 800aa52 <__retarget_lock_acquire> 800a586: bf00 nop 800a588: 200034fc .word 0x200034fc 0800a58c <__tz_unlock>: 800a58c: 4801 ldr r0, [pc, #4] @ (800a594 <__tz_unlock+0x8>) 800a58e: f000 ba62 b.w 800aa56 <__retarget_lock_release> 800a592: bf00 nop 800a594: 200034fc .word 0x200034fc 0800a598 <_tzset_unlocked>: 800a598: 4b01 ldr r3, [pc, #4] @ (800a5a0 <_tzset_unlocked+0x8>) 800a59a: 6818 ldr r0, [r3, #0] 800a59c: f000 b802 b.w 800a5a4 <_tzset_unlocked_r> 800a5a0: 20000028 .word 0x20000028 0800a5a4 <_tzset_unlocked_r>: 800a5a4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800a5a8: b08d sub sp, #52 @ 0x34 800a5aa: 4607 mov r7, r0 800a5ac: f000 fa22 bl 800a9f4 <__gettzinfo> 800a5b0: 496d ldr r1, [pc, #436] @ (800a768 <_tzset_unlocked_r+0x1c4>) 800a5b2: 4604 mov r4, r0 800a5b4: 4638 mov r0, r7 800a5b6: f001 f91f bl 800b7f8 <_getenv_r> 800a5ba: 4d6c ldr r5, [pc, #432] @ (800a76c <_tzset_unlocked_r+0x1c8>) 800a5bc: 4606 mov r6, r0 800a5be: bb10 cbnz r0, 800a606 <_tzset_unlocked_r+0x62> 800a5c0: 4b6b ldr r3, [pc, #428] @ (800a770 <_tzset_unlocked_r+0x1cc>) 800a5c2: 4a6c ldr r2, [pc, #432] @ (800a774 <_tzset_unlocked_r+0x1d0>) 800a5c4: 6018 str r0, [r3, #0] 800a5c6: 4b6c ldr r3, [pc, #432] @ (800a778 <_tzset_unlocked_r+0x1d4>) 800a5c8: 214a movs r1, #74 @ 0x4a 800a5ca: 6018 str r0, [r3, #0] 800a5cc: 4b6b ldr r3, [pc, #428] @ (800a77c <_tzset_unlocked_r+0x1d8>) 800a5ce: e9c4 0003 strd r0, r0, [r4, #12] 800a5d2: e9c3 2200 strd r2, r2, [r3] 800a5d6: 2200 movs r2, #0 800a5d8: 2300 movs r3, #0 800a5da: e9c4 0005 strd r0, r0, [r4, #20] 800a5de: e9c4 000d strd r0, r0, [r4, #52] @ 0x34 800a5e2: e9c4 000f strd r0, r0, [r4, #60] @ 0x3c 800a5e6: 62a0 str r0, [r4, #40] @ 0x28 800a5e8: 6520 str r0, [r4, #80] @ 0x50 800a5ea: e9c4 2308 strd r2, r3, [r4, #32] 800a5ee: e9c4 2312 strd r2, r3, [r4, #72] @ 0x48 800a5f2: 6828 ldr r0, [r5, #0] 800a5f4: 7221 strb r1, [r4, #8] 800a5f6: f884 1030 strb.w r1, [r4, #48] @ 0x30 800a5fa: f001 fba3 bl 800bd44 800a5fe: 602e str r6, [r5, #0] 800a600: b00d add sp, #52 @ 0x34 800a602: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800a606: 6829 ldr r1, [r5, #0] 800a608: 2900 cmp r1, #0 800a60a: f040 808e bne.w 800a72a <_tzset_unlocked_r+0x186> 800a60e: 6828 ldr r0, [r5, #0] 800a610: f001 fb98 bl 800bd44 800a614: 4630 mov r0, r6 800a616: f7f5 fe07 bl 8000228 800a61a: 1c41 adds r1, r0, #1 800a61c: 4638 mov r0, r7 800a61e: f001 fbbb bl 800bd98 <_malloc_r> 800a622: 6028 str r0, [r5, #0] 800a624: 2800 cmp r0, #0 800a626: f040 8086 bne.w 800a736 <_tzset_unlocked_r+0x192> 800a62a: 2300 movs r3, #0 800a62c: 4a52 ldr r2, [pc, #328] @ (800a778 <_tzset_unlocked_r+0x1d4>) 800a62e: 2000 movs r0, #0 800a630: 6013 str r3, [r2, #0] 800a632: 2100 movs r1, #0 800a634: 4a52 ldr r2, [pc, #328] @ (800a780 <_tzset_unlocked_r+0x1dc>) 800a636: f8df 8144 ldr.w r8, [pc, #324] @ 800a77c <_tzset_unlocked_r+0x1d8> 800a63a: e9c4 3303 strd r3, r3, [r4, #12] 800a63e: e9c8 2200 strd r2, r2, [r8] 800a642: 224a movs r2, #74 @ 0x4a 800a644: e9c4 3305 strd r3, r3, [r4, #20] 800a648: e9c4 0108 strd r0, r1, [r4, #32] 800a64c: e9c4 330d strd r3, r3, [r4, #52] @ 0x34 800a650: e9c4 330f strd r3, r3, [r4, #60] @ 0x3c 800a654: e9c4 0112 strd r0, r1, [r4, #72] @ 0x48 800a658: f8df a114 ldr.w sl, [pc, #276] @ 800a770 <_tzset_unlocked_r+0x1cc> 800a65c: 7222 strb r2, [r4, #8] 800a65e: f8ca 3000 str.w r3, [sl] 800a662: 62a3 str r3, [r4, #40] @ 0x28 800a664: f884 2030 strb.w r2, [r4, #48] @ 0x30 800a668: 6523 str r3, [r4, #80] @ 0x50 800a66a: 7833 ldrb r3, [r6, #0] 800a66c: 2b3a cmp r3, #58 @ 0x3a 800a66e: bf08 it eq 800a670: 3601 addeq r6, #1 800a672: 7833 ldrb r3, [r6, #0] 800a674: 2b3c cmp r3, #60 @ 0x3c 800a676: d162 bne.n 800a73e <_tzset_unlocked_r+0x19a> 800a678: 1c75 adds r5, r6, #1 800a67a: 4628 mov r0, r5 800a67c: 4a41 ldr r2, [pc, #260] @ (800a784 <_tzset_unlocked_r+0x1e0>) 800a67e: 4942 ldr r1, [pc, #264] @ (800a788 <_tzset_unlocked_r+0x1e4>) 800a680: ab0a add r3, sp, #40 @ 0x28 800a682: f002 f83d bl 800c700 800a686: 2800 cmp r0, #0 800a688: ddba ble.n 800a600 <_tzset_unlocked_r+0x5c> 800a68a: 9b0a ldr r3, [sp, #40] @ 0x28 800a68c: 1eda subs r2, r3, #3 800a68e: 2a07 cmp r2, #7 800a690: d8b6 bhi.n 800a600 <_tzset_unlocked_r+0x5c> 800a692: 5ceb ldrb r3, [r5, r3] 800a694: 2b3e cmp r3, #62 @ 0x3e 800a696: d1b3 bne.n 800a600 <_tzset_unlocked_r+0x5c> 800a698: 3602 adds r6, #2 800a69a: 9b0a ldr r3, [sp, #40] @ 0x28 800a69c: 18f5 adds r5, r6, r3 800a69e: 5cf3 ldrb r3, [r6, r3] 800a6a0: 2b2d cmp r3, #45 @ 0x2d 800a6a2: d15a bne.n 800a75a <_tzset_unlocked_r+0x1b6> 800a6a4: f04f 39ff mov.w r9, #4294967295 @ 0xffffffff 800a6a8: 3501 adds r5, #1 800a6aa: 2300 movs r3, #0 800a6ac: af08 add r7, sp, #32 800a6ae: f8ad 301e strh.w r3, [sp, #30] 800a6b2: f8ad 3020 strh.w r3, [sp, #32] 800a6b6: ab0a add r3, sp, #40 @ 0x28 800a6b8: e9cd 3701 strd r3, r7, [sp, #4] 800a6bc: 9303 str r3, [sp, #12] 800a6be: f10d 031e add.w r3, sp, #30 800a6c2: 9300 str r3, [sp, #0] 800a6c4: 4628 mov r0, r5 800a6c6: 4931 ldr r1, [pc, #196] @ (800a78c <_tzset_unlocked_r+0x1e8>) 800a6c8: ab0a add r3, sp, #40 @ 0x28 800a6ca: aa07 add r2, sp, #28 800a6cc: f002 f818 bl 800c700 800a6d0: 2800 cmp r0, #0 800a6d2: dd95 ble.n 800a600 <_tzset_unlocked_r+0x5c> 800a6d4: 223c movs r2, #60 @ 0x3c 800a6d6: f8bd 301e ldrh.w r3, [sp, #30] 800a6da: f8bd 6020 ldrh.w r6, [sp, #32] 800a6de: fb02 6603 mla r6, r2, r3, r6 800a6e2: f44f 6261 mov.w r2, #3600 @ 0xe10 800a6e6: f8bd 301c ldrh.w r3, [sp, #28] 800a6ea: fb02 6603 mla r6, r2, r3, r6 800a6ee: 9b0a ldr r3, [sp, #40] @ 0x28 800a6f0: fb09 f606 mul.w r6, r9, r6 800a6f4: eb05 0903 add.w r9, r5, r3 800a6f8: 5ceb ldrb r3, [r5, r3] 800a6fa: 2b3c cmp r3, #60 @ 0x3c 800a6fc: f040 80e8 bne.w 800a8d0 <_tzset_unlocked_r+0x32c> 800a700: f109 0501 add.w r5, r9, #1 800a704: 4628 mov r0, r5 800a706: 4a22 ldr r2, [pc, #136] @ (800a790 <_tzset_unlocked_r+0x1ec>) 800a708: 491f ldr r1, [pc, #124] @ (800a788 <_tzset_unlocked_r+0x1e4>) 800a70a: ab0a add r3, sp, #40 @ 0x28 800a70c: f001 fff8 bl 800c700 800a710: 2800 cmp r0, #0 800a712: dc41 bgt.n 800a798 <_tzset_unlocked_r+0x1f4> 800a714: f899 3001 ldrb.w r3, [r9, #1] 800a718: 2b3e cmp r3, #62 @ 0x3e 800a71a: d13d bne.n 800a798 <_tzset_unlocked_r+0x1f4> 800a71c: 4b19 ldr r3, [pc, #100] @ (800a784 <_tzset_unlocked_r+0x1e0>) 800a71e: 62a6 str r6, [r4, #40] @ 0x28 800a720: e9c8 3300 strd r3, r3, [r8] 800a724: f8ca 6000 str.w r6, [sl] 800a728: e76a b.n 800a600 <_tzset_unlocked_r+0x5c> 800a72a: f7f5 fd85 bl 8000238 800a72e: 2800 cmp r0, #0 800a730: f47f af6d bne.w 800a60e <_tzset_unlocked_r+0x6a> 800a734: e764 b.n 800a600 <_tzset_unlocked_r+0x5c> 800a736: 4631 mov r1, r6 800a738: f000 f9ab bl 800aa92 800a73c: e775 b.n 800a62a <_tzset_unlocked_r+0x86> 800a73e: 4630 mov r0, r6 800a740: 4a10 ldr r2, [pc, #64] @ (800a784 <_tzset_unlocked_r+0x1e0>) 800a742: 4914 ldr r1, [pc, #80] @ (800a794 <_tzset_unlocked_r+0x1f0>) 800a744: ab0a add r3, sp, #40 @ 0x28 800a746: f001 ffdb bl 800c700 800a74a: 2800 cmp r0, #0 800a74c: f77f af58 ble.w 800a600 <_tzset_unlocked_r+0x5c> 800a750: 9b0a ldr r3, [sp, #40] @ 0x28 800a752: 3b03 subs r3, #3 800a754: 2b07 cmp r3, #7 800a756: d9a0 bls.n 800a69a <_tzset_unlocked_r+0xf6> 800a758: e752 b.n 800a600 <_tzset_unlocked_r+0x5c> 800a75a: 2b2b cmp r3, #43 @ 0x2b 800a75c: f04f 0901 mov.w r9, #1 800a760: bf08 it eq 800a762: 3501 addeq r5, #1 800a764: e7a1 b.n 800a6aa <_tzset_unlocked_r+0x106> 800a766: bf00 nop 800a768: 0800e160 .word 0x0800e160 800a76c: 200034d8 .word 0x200034d8 800a770: 200034f4 .word 0x200034f4 800a774: 0800e163 .word 0x0800e163 800a778: 200034f8 .word 0x200034f8 800a77c: 20000020 .word 0x20000020 800a780: 0800e1e9 .word 0x0800e1e9 800a784: 200034e8 .word 0x200034e8 800a788: 0800e167 .word 0x0800e167 800a78c: 0800e19c .word 0x0800e19c 800a790: 200034dc .word 0x200034dc 800a794: 0800e17a .word 0x0800e17a 800a798: 9b0a ldr r3, [sp, #40] @ 0x28 800a79a: 1eda subs r2, r3, #3 800a79c: 2a07 cmp r2, #7 800a79e: f63f af2f bhi.w 800a600 <_tzset_unlocked_r+0x5c> 800a7a2: 5ceb ldrb r3, [r5, r3] 800a7a4: 2b3e cmp r3, #62 @ 0x3e 800a7a6: f47f af2b bne.w 800a600 <_tzset_unlocked_r+0x5c> 800a7aa: f109 0902 add.w r9, r9, #2 800a7ae: 9b0a ldr r3, [sp, #40] @ 0x28 800a7b0: eb09 0503 add.w r5, r9, r3 800a7b4: f819 3003 ldrb.w r3, [r9, r3] 800a7b8: 2b2d cmp r3, #45 @ 0x2d 800a7ba: f040 8098 bne.w 800a8ee <_tzset_unlocked_r+0x34a> 800a7be: f04f 39ff mov.w r9, #4294967295 @ 0xffffffff 800a7c2: 3501 adds r5, #1 800a7c4: 2300 movs r3, #0 800a7c6: f8ad 301c strh.w r3, [sp, #28] 800a7ca: f8ad 301e strh.w r3, [sp, #30] 800a7ce: f8ad 3020 strh.w r3, [sp, #32] 800a7d2: 930a str r3, [sp, #40] @ 0x28 800a7d4: ab0a add r3, sp, #40 @ 0x28 800a7d6: e9cd 7302 strd r7, r3, [sp, #8] 800a7da: 9301 str r3, [sp, #4] 800a7dc: f10d 031e add.w r3, sp, #30 800a7e0: 9300 str r3, [sp, #0] 800a7e2: 4628 mov r0, r5 800a7e4: 497a ldr r1, [pc, #488] @ (800a9d0 <_tzset_unlocked_r+0x42c>) 800a7e6: ab0a add r3, sp, #40 @ 0x28 800a7e8: aa07 add r2, sp, #28 800a7ea: f001 ff89 bl 800c700 800a7ee: 2800 cmp r0, #0 800a7f0: f300 8083 bgt.w 800a8fa <_tzset_unlocked_r+0x356> 800a7f4: f5a6 6361 sub.w r3, r6, #3600 @ 0xe10 800a7f8: 4627 mov r7, r4 800a7fa: f04f 0b00 mov.w fp, #0 800a7fe: 9304 str r3, [sp, #16] 800a800: 9b0a ldr r3, [sp, #40] @ 0x28 800a802: 441d add r5, r3 800a804: 782b ldrb r3, [r5, #0] 800a806: 2b2c cmp r3, #44 @ 0x2c 800a808: bf08 it eq 800a80a: 3501 addeq r5, #1 800a80c: f895 9000 ldrb.w r9, [r5] 800a810: f1b9 0f4d cmp.w r9, #77 @ 0x4d 800a814: f040 8084 bne.w 800a920 <_tzset_unlocked_r+0x37c> 800a818: ab0a add r3, sp, #40 @ 0x28 800a81a: f10d 0226 add.w r2, sp, #38 @ 0x26 800a81e: e9cd 3201 strd r3, r2, [sp, #4] 800a822: aa09 add r2, sp, #36 @ 0x24 800a824: 9200 str r2, [sp, #0] 800a826: 4628 mov r0, r5 800a828: 496a ldr r1, [pc, #424] @ (800a9d4 <_tzset_unlocked_r+0x430>) 800a82a: 9303 str r3, [sp, #12] 800a82c: f10d 0222 add.w r2, sp, #34 @ 0x22 800a830: f001 ff66 bl 800c700 800a834: 2803 cmp r0, #3 800a836: f47f aee3 bne.w 800a600 <_tzset_unlocked_r+0x5c> 800a83a: f8bd 1022 ldrh.w r1, [sp, #34] @ 0x22 800a83e: 1e4b subs r3, r1, #1 800a840: 2b0b cmp r3, #11 800a842: f63f aedd bhi.w 800a600 <_tzset_unlocked_r+0x5c> 800a846: f8bd 2024 ldrh.w r2, [sp, #36] @ 0x24 800a84a: 1e53 subs r3, r2, #1 800a84c: 2b04 cmp r3, #4 800a84e: f63f aed7 bhi.w 800a600 <_tzset_unlocked_r+0x5c> 800a852: f8bd 3026 ldrh.w r3, [sp, #38] @ 0x26 800a856: 2b06 cmp r3, #6 800a858: f63f aed2 bhi.w 800a600 <_tzset_unlocked_r+0x5c> 800a85c: e9c7 1203 strd r1, r2, [r7, #12] 800a860: f887 9008 strb.w r9, [r7, #8] 800a864: 617b str r3, [r7, #20] 800a866: 9b0a ldr r3, [sp, #40] @ 0x28 800a868: eb05 0903 add.w r9, r5, r3 800a86c: 2500 movs r5, #0 800a86e: f04f 0302 mov.w r3, #2 800a872: f8ad 501e strh.w r5, [sp, #30] 800a876: f8ad 301c strh.w r3, [sp, #28] 800a87a: f8ad 5020 strh.w r5, [sp, #32] 800a87e: 950a str r5, [sp, #40] @ 0x28 800a880: f899 3000 ldrb.w r3, [r9] 800a884: 2b2f cmp r3, #47 @ 0x2f 800a886: d177 bne.n 800a978 <_tzset_unlocked_r+0x3d4> 800a888: ab0a add r3, sp, #40 @ 0x28 800a88a: aa08 add r2, sp, #32 800a88c: e9cd 3201 strd r3, r2, [sp, #4] 800a890: f10d 021e add.w r2, sp, #30 800a894: 9200 str r2, [sp, #0] 800a896: 4648 mov r0, r9 800a898: 494f ldr r1, [pc, #316] @ (800a9d8 <_tzset_unlocked_r+0x434>) 800a89a: 9303 str r3, [sp, #12] 800a89c: aa07 add r2, sp, #28 800a89e: f001 ff2f bl 800c700 800a8a2: 42a8 cmp r0, r5 800a8a4: dc68 bgt.n 800a978 <_tzset_unlocked_r+0x3d4> 800a8a6: 214a movs r1, #74 @ 0x4a 800a8a8: 2200 movs r2, #0 800a8aa: 2300 movs r3, #0 800a8ac: e9c4 5503 strd r5, r5, [r4, #12] 800a8b0: e9c4 5505 strd r5, r5, [r4, #20] 800a8b4: e9c4 2308 strd r2, r3, [r4, #32] 800a8b8: e9c4 550d strd r5, r5, [r4, #52] @ 0x34 800a8bc: e9c4 550f strd r5, r5, [r4, #60] @ 0x3c 800a8c0: e9c4 2312 strd r2, r3, [r4, #72] @ 0x48 800a8c4: 7221 strb r1, [r4, #8] 800a8c6: 62a5 str r5, [r4, #40] @ 0x28 800a8c8: f884 1030 strb.w r1, [r4, #48] @ 0x30 800a8cc: 6525 str r5, [r4, #80] @ 0x50 800a8ce: e697 b.n 800a600 <_tzset_unlocked_r+0x5c> 800a8d0: 4648 mov r0, r9 800a8d2: 4a42 ldr r2, [pc, #264] @ (800a9dc <_tzset_unlocked_r+0x438>) 800a8d4: 4942 ldr r1, [pc, #264] @ (800a9e0 <_tzset_unlocked_r+0x43c>) 800a8d6: ab0a add r3, sp, #40 @ 0x28 800a8d8: f001 ff12 bl 800c700 800a8dc: 2800 cmp r0, #0 800a8de: f77f af1d ble.w 800a71c <_tzset_unlocked_r+0x178> 800a8e2: 9b0a ldr r3, [sp, #40] @ 0x28 800a8e4: 3b03 subs r3, #3 800a8e6: 2b07 cmp r3, #7 800a8e8: f67f af61 bls.w 800a7ae <_tzset_unlocked_r+0x20a> 800a8ec: e688 b.n 800a600 <_tzset_unlocked_r+0x5c> 800a8ee: 2b2b cmp r3, #43 @ 0x2b 800a8f0: f04f 0901 mov.w r9, #1 800a8f4: bf08 it eq 800a8f6: 3501 addeq r5, #1 800a8f8: e764 b.n 800a7c4 <_tzset_unlocked_r+0x220> 800a8fa: 213c movs r1, #60 @ 0x3c 800a8fc: f8bd 201e ldrh.w r2, [sp, #30] 800a900: f8bd 3020 ldrh.w r3, [sp, #32] 800a904: fb01 3302 mla r3, r1, r2, r3 800a908: f44f 6161 mov.w r1, #3600 @ 0xe10 800a90c: f8bd 201c ldrh.w r2, [sp, #28] 800a910: fb01 3302 mla r3, r1, r2, r3 800a914: fb09 f303 mul.w r3, r9, r3 800a918: e76e b.n 800a7f8 <_tzset_unlocked_r+0x254> 800a91a: f04f 0b01 mov.w fp, #1 800a91e: e771 b.n 800a804 <_tzset_unlocked_r+0x260> 800a920: f1b9 0f4a cmp.w r9, #74 @ 0x4a 800a924: bf0a itet eq 800a926: 464b moveq r3, r9 800a928: 2344 movne r3, #68 @ 0x44 800a92a: 3501 addeq r5, #1 800a92c: 220a movs r2, #10 800a92e: 4628 mov r0, r5 800a930: a90b add r1, sp, #44 @ 0x2c 800a932: 9305 str r3, [sp, #20] 800a934: f002 f804 bl 800c940 800a938: f8dd 902c ldr.w r9, [sp, #44] @ 0x2c 800a93c: 9b05 ldr r3, [sp, #20] 800a93e: 45a9 cmp r9, r5 800a940: f8ad 0026 strh.w r0, [sp, #38] @ 0x26 800a944: d114 bne.n 800a970 <_tzset_unlocked_r+0x3cc> 800a946: 234d movs r3, #77 @ 0x4d 800a948: f1bb 0f00 cmp.w fp, #0 800a94c: d107 bne.n 800a95e <_tzset_unlocked_r+0x3ba> 800a94e: 2103 movs r1, #3 800a950: 7223 strb r3, [r4, #8] 800a952: 2302 movs r3, #2 800a954: f8c4 b014 str.w fp, [r4, #20] 800a958: e9c4 1303 strd r1, r3, [r4, #12] 800a95c: e786 b.n 800a86c <_tzset_unlocked_r+0x2c8> 800a95e: 220b movs r2, #11 800a960: f884 3030 strb.w r3, [r4, #48] @ 0x30 800a964: 2301 movs r3, #1 800a966: e9c4 230d strd r2, r3, [r4, #52] @ 0x34 800a96a: 2300 movs r3, #0 800a96c: 63e3 str r3, [r4, #60] @ 0x3c 800a96e: e77d b.n 800a86c <_tzset_unlocked_r+0x2c8> 800a970: b280 uxth r0, r0 800a972: 723b strb r3, [r7, #8] 800a974: 6178 str r0, [r7, #20] 800a976: e779 b.n 800a86c <_tzset_unlocked_r+0x2c8> 800a978: 213c movs r1, #60 @ 0x3c 800a97a: f8bd 201e ldrh.w r2, [sp, #30] 800a97e: f8bd 3020 ldrh.w r3, [sp, #32] 800a982: 3728 adds r7, #40 @ 0x28 800a984: fb01 3302 mla r3, r1, r2, r3 800a988: f44f 6161 mov.w r1, #3600 @ 0xe10 800a98c: f8bd 201c ldrh.w r2, [sp, #28] 800a990: fb01 3302 mla r3, r1, r2, r3 800a994: f847 3c10 str.w r3, [r7, #-16] 800a998: 9d0a ldr r5, [sp, #40] @ 0x28 800a99a: 444d add r5, r9 800a99c: f1bb 0f00 cmp.w fp, #0 800a9a0: d0bb beq.n 800a91a <_tzset_unlocked_r+0x376> 800a9a2: 9b04 ldr r3, [sp, #16] 800a9a4: 6860 ldr r0, [r4, #4] 800a9a6: 6523 str r3, [r4, #80] @ 0x50 800a9a8: 4b0e ldr r3, [pc, #56] @ (800a9e4 <_tzset_unlocked_r+0x440>) 800a9aa: 62a6 str r6, [r4, #40] @ 0x28 800a9ac: f8c8 3000 str.w r3, [r8] 800a9b0: 4b0a ldr r3, [pc, #40] @ (800a9dc <_tzset_unlocked_r+0x438>) 800a9b2: f8c8 3004 str.w r3, [r8, #4] 800a9b6: f7ff fd3b bl 800a430 <__tzcalc_limits> 800a9ba: 6aa2 ldr r2, [r4, #40] @ 0x28 800a9bc: 6d23 ldr r3, [r4, #80] @ 0x50 800a9be: f8ca 2000 str.w r2, [sl] 800a9c2: 1a9b subs r3, r3, r2 800a9c4: bf18 it ne 800a9c6: 2301 movne r3, #1 800a9c8: 4a07 ldr r2, [pc, #28] @ (800a9e8 <_tzset_unlocked_r+0x444>) 800a9ca: 6013 str r3, [r2, #0] 800a9cc: e618 b.n 800a600 <_tzset_unlocked_r+0x5c> 800a9ce: bf00 nop 800a9d0: 0800e19c .word 0x0800e19c 800a9d4: 0800e188 .word 0x0800e188 800a9d8: 0800e19b .word 0x0800e19b 800a9dc: 200034dc .word 0x200034dc 800a9e0: 0800e17a .word 0x0800e17a 800a9e4: 200034e8 .word 0x200034e8 800a9e8: 200034f8 .word 0x200034f8 0800a9ec <_localeconv_r>: 800a9ec: 4800 ldr r0, [pc, #0] @ (800a9f0 <_localeconv_r+0x4>) 800a9ee: 4770 bx lr 800a9f0: 200001c0 .word 0x200001c0 0800a9f4 <__gettzinfo>: 800a9f4: 4800 ldr r0, [pc, #0] @ (800a9f8 <__gettzinfo+0x4>) 800a9f6: 4770 bx lr 800a9f8: 20000078 .word 0x20000078 0800a9fc <__errno>: 800a9fc: 4b01 ldr r3, [pc, #4] @ (800aa04 <__errno+0x8>) 800a9fe: 6818 ldr r0, [r3, #0] 800aa00: 4770 bx lr 800aa02: bf00 nop 800aa04: 20000028 .word 0x20000028 0800aa08 <__libc_init_array>: 800aa08: b570 push {r4, r5, r6, lr} 800aa0a: 2600 movs r6, #0 800aa0c: 4d0c ldr r5, [pc, #48] @ (800aa40 <__libc_init_array+0x38>) 800aa0e: 4c0d ldr r4, [pc, #52] @ (800aa44 <__libc_init_array+0x3c>) 800aa10: 1b64 subs r4, r4, r5 800aa12: 10a4 asrs r4, r4, #2 800aa14: 42a6 cmp r6, r4 800aa16: d109 bne.n 800aa2c <__libc_init_array+0x24> 800aa18: f002 fe04 bl 800d624 <_init> 800aa1c: 2600 movs r6, #0 800aa1e: 4d0a ldr r5, [pc, #40] @ (800aa48 <__libc_init_array+0x40>) 800aa20: 4c0a ldr r4, [pc, #40] @ (800aa4c <__libc_init_array+0x44>) 800aa22: 1b64 subs r4, r4, r5 800aa24: 10a4 asrs r4, r4, #2 800aa26: 42a6 cmp r6, r4 800aa28: d105 bne.n 800aa36 <__libc_init_array+0x2e> 800aa2a: bd70 pop {r4, r5, r6, pc} 800aa2c: f855 3b04 ldr.w r3, [r5], #4 800aa30: 4798 blx r3 800aa32: 3601 adds r6, #1 800aa34: e7ee b.n 800aa14 <__libc_init_array+0xc> 800aa36: f855 3b04 ldr.w r3, [r5], #4 800aa3a: 4798 blx r3 800aa3c: 3601 adds r6, #1 800aa3e: e7f2 b.n 800aa26 <__libc_init_array+0x1e> 800aa40: 0800e4f8 .word 0x0800e4f8 800aa44: 0800e4f8 .word 0x0800e4f8 800aa48: 0800e4f8 .word 0x0800e4f8 800aa4c: 0800e4fc .word 0x0800e4fc 0800aa50 <__retarget_lock_init_recursive>: 800aa50: 4770 bx lr 0800aa52 <__retarget_lock_acquire>: 800aa52: 4770 bx lr 0800aa54 <__retarget_lock_acquire_recursive>: 800aa54: 4770 bx lr 0800aa56 <__retarget_lock_release>: 800aa56: 4770 bx lr 0800aa58 <__retarget_lock_release_recursive>: 800aa58: 4770 bx lr 0800aa5a : 800aa5a: 4603 mov r3, r0 800aa5c: b510 push {r4, lr} 800aa5e: b2c9 uxtb r1, r1 800aa60: 4402 add r2, r0 800aa62: 4293 cmp r3, r2 800aa64: 4618 mov r0, r3 800aa66: d101 bne.n 800aa6c 800aa68: 2000 movs r0, #0 800aa6a: e003 b.n 800aa74 800aa6c: 7804 ldrb r4, [r0, #0] 800aa6e: 3301 adds r3, #1 800aa70: 428c cmp r4, r1 800aa72: d1f6 bne.n 800aa62 800aa74: bd10 pop {r4, pc} 0800aa76 : 800aa76: 440a add r2, r1 800aa78: 4291 cmp r1, r2 800aa7a: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff 800aa7e: d100 bne.n 800aa82 800aa80: 4770 bx lr 800aa82: b510 push {r4, lr} 800aa84: f811 4b01 ldrb.w r4, [r1], #1 800aa88: 4291 cmp r1, r2 800aa8a: f803 4f01 strb.w r4, [r3, #1]! 800aa8e: d1f9 bne.n 800aa84 800aa90: bd10 pop {r4, pc} 0800aa92 : 800aa92: 4603 mov r3, r0 800aa94: f811 2b01 ldrb.w r2, [r1], #1 800aa98: f803 2b01 strb.w r2, [r3], #1 800aa9c: 2a00 cmp r2, #0 800aa9e: d1f9 bne.n 800aa94 800aaa0: 4770 bx lr ... 0800aaa4 <__assert_func>: 800aaa4: b51f push {r0, r1, r2, r3, r4, lr} 800aaa6: 4614 mov r4, r2 800aaa8: 461a mov r2, r3 800aaaa: 4b09 ldr r3, [pc, #36] @ (800aad0 <__assert_func+0x2c>) 800aaac: 4605 mov r5, r0 800aaae: 681b ldr r3, [r3, #0] 800aab0: 68d8 ldr r0, [r3, #12] 800aab2: b954 cbnz r4, 800aaca <__assert_func+0x26> 800aab4: 4b07 ldr r3, [pc, #28] @ (800aad4 <__assert_func+0x30>) 800aab6: 461c mov r4, r3 800aab8: e9cd 3401 strd r3, r4, [sp, #4] 800aabc: 9100 str r1, [sp, #0] 800aabe: 462b mov r3, r5 800aac0: 4905 ldr r1, [pc, #20] @ (800aad8 <__assert_func+0x34>) 800aac2: f001 fe8d bl 800c7e0 800aac6: f002 f8cd bl 800cc64 800aaca: 4b04 ldr r3, [pc, #16] @ (800aadc <__assert_func+0x38>) 800aacc: e7f4 b.n 800aab8 <__assert_func+0x14> 800aace: bf00 nop 800aad0: 20000028 .word 0x20000028 800aad4: 0800e1e9 .word 0x0800e1e9 800aad8: 0800e1bb .word 0x0800e1bb 800aadc: 0800e1ae .word 0x0800e1ae 0800aae0 : 800aae0: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800aae4: 6903 ldr r3, [r0, #16] 800aae6: 690c ldr r4, [r1, #16] 800aae8: 4607 mov r7, r0 800aaea: 42a3 cmp r3, r4 800aaec: db7e blt.n 800abec 800aaee: 3c01 subs r4, #1 800aaf0: 00a3 lsls r3, r4, #2 800aaf2: f100 0514 add.w r5, r0, #20 800aaf6: f101 0814 add.w r8, r1, #20 800aafa: 9300 str r3, [sp, #0] 800aafc: eb05 0384 add.w r3, r5, r4, lsl #2 800ab00: 9301 str r3, [sp, #4] 800ab02: f858 3024 ldr.w r3, [r8, r4, lsl #2] 800ab06: f855 2024 ldr.w r2, [r5, r4, lsl #2] 800ab0a: 3301 adds r3, #1 800ab0c: 429a cmp r2, r3 800ab0e: fbb2 f6f3 udiv r6, r2, r3 800ab12: eb08 0984 add.w r9, r8, r4, lsl #2 800ab16: d32e bcc.n 800ab76 800ab18: f04f 0a00 mov.w sl, #0 800ab1c: 46c4 mov ip, r8 800ab1e: 46ae mov lr, r5 800ab20: 46d3 mov fp, sl 800ab22: f85c 3b04 ldr.w r3, [ip], #4 800ab26: b298 uxth r0, r3 800ab28: fb06 a000 mla r0, r6, r0, sl 800ab2c: 0c1b lsrs r3, r3, #16 800ab2e: 0c02 lsrs r2, r0, #16 800ab30: fb06 2303 mla r3, r6, r3, r2 800ab34: f8de 2000 ldr.w r2, [lr] 800ab38: b280 uxth r0, r0 800ab3a: b292 uxth r2, r2 800ab3c: 1a12 subs r2, r2, r0 800ab3e: 445a add r2, fp 800ab40: f8de 0000 ldr.w r0, [lr] 800ab44: ea4f 4a13 mov.w sl, r3, lsr #16 800ab48: b29b uxth r3, r3 800ab4a: ebc3 4322 rsb r3, r3, r2, asr #16 800ab4e: eb03 4310 add.w r3, r3, r0, lsr #16 800ab52: b292 uxth r2, r2 800ab54: ea42 4203 orr.w r2, r2, r3, lsl #16 800ab58: 45e1 cmp r9, ip 800ab5a: ea4f 4b23 mov.w fp, r3, asr #16 800ab5e: f84e 2b04 str.w r2, [lr], #4 800ab62: d2de bcs.n 800ab22 800ab64: 9b00 ldr r3, [sp, #0] 800ab66: 58eb ldr r3, [r5, r3] 800ab68: b92b cbnz r3, 800ab76 800ab6a: 9b01 ldr r3, [sp, #4] 800ab6c: 3b04 subs r3, #4 800ab6e: 429d cmp r5, r3 800ab70: 461a mov r2, r3 800ab72: d32f bcc.n 800abd4 800ab74: 613c str r4, [r7, #16] 800ab76: 4638 mov r0, r7 800ab78: f001 fcba bl 800c4f0 <__mcmp> 800ab7c: 2800 cmp r0, #0 800ab7e: db25 blt.n 800abcc 800ab80: 4629 mov r1, r5 800ab82: 2000 movs r0, #0 800ab84: f858 2b04 ldr.w r2, [r8], #4 800ab88: f8d1 c000 ldr.w ip, [r1] 800ab8c: fa1f fe82 uxth.w lr, r2 800ab90: fa1f f38c uxth.w r3, ip 800ab94: eba3 030e sub.w r3, r3, lr 800ab98: 4403 add r3, r0 800ab9a: 0c12 lsrs r2, r2, #16 800ab9c: ebc2 4223 rsb r2, r2, r3, asr #16 800aba0: eb02 421c add.w r2, r2, ip, lsr #16 800aba4: b29b uxth r3, r3 800aba6: ea43 4302 orr.w r3, r3, r2, lsl #16 800abaa: 45c1 cmp r9, r8 800abac: ea4f 4022 mov.w r0, r2, asr #16 800abb0: f841 3b04 str.w r3, [r1], #4 800abb4: d2e6 bcs.n 800ab84 800abb6: f855 2024 ldr.w r2, [r5, r4, lsl #2] 800abba: eb05 0384 add.w r3, r5, r4, lsl #2 800abbe: b922 cbnz r2, 800abca 800abc0: 3b04 subs r3, #4 800abc2: 429d cmp r5, r3 800abc4: 461a mov r2, r3 800abc6: d30b bcc.n 800abe0 800abc8: 613c str r4, [r7, #16] 800abca: 3601 adds r6, #1 800abcc: 4630 mov r0, r6 800abce: b003 add sp, #12 800abd0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800abd4: 6812 ldr r2, [r2, #0] 800abd6: 3b04 subs r3, #4 800abd8: 2a00 cmp r2, #0 800abda: d1cb bne.n 800ab74 800abdc: 3c01 subs r4, #1 800abde: e7c6 b.n 800ab6e 800abe0: 6812 ldr r2, [r2, #0] 800abe2: 3b04 subs r3, #4 800abe4: 2a00 cmp r2, #0 800abe6: d1ef bne.n 800abc8 800abe8: 3c01 subs r4, #1 800abea: e7ea b.n 800abc2 800abec: 2000 movs r0, #0 800abee: e7ee b.n 800abce 0800abf0 <_dtoa_r>: 800abf0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800abf4: 4614 mov r4, r2 800abf6: 461d mov r5, r3 800abf8: 69c7 ldr r7, [r0, #28] 800abfa: b097 sub sp, #92 @ 0x5c 800abfc: 4683 mov fp, r0 800abfe: e9cd 4502 strd r4, r5, [sp, #8] 800ac02: 9e23 ldr r6, [sp, #140] @ 0x8c 800ac04: b97f cbnz r7, 800ac26 <_dtoa_r+0x36> 800ac06: 2010 movs r0, #16 800ac08: f001 f894 bl 800bd34 800ac0c: 4602 mov r2, r0 800ac0e: f8cb 001c str.w r0, [fp, #28] 800ac12: b920 cbnz r0, 800ac1e <_dtoa_r+0x2e> 800ac14: 21ef movs r1, #239 @ 0xef 800ac16: 4ba8 ldr r3, [pc, #672] @ (800aeb8 <_dtoa_r+0x2c8>) 800ac18: 48a8 ldr r0, [pc, #672] @ (800aebc <_dtoa_r+0x2cc>) 800ac1a: f7ff ff43 bl 800aaa4 <__assert_func> 800ac1e: e9c0 7701 strd r7, r7, [r0, #4] 800ac22: 6007 str r7, [r0, #0] 800ac24: 60c7 str r7, [r0, #12] 800ac26: f8db 301c ldr.w r3, [fp, #28] 800ac2a: 6819 ldr r1, [r3, #0] 800ac2c: b159 cbz r1, 800ac46 <_dtoa_r+0x56> 800ac2e: 685a ldr r2, [r3, #4] 800ac30: 2301 movs r3, #1 800ac32: 4093 lsls r3, r2 800ac34: 604a str r2, [r1, #4] 800ac36: 608b str r3, [r1, #8] 800ac38: 4658 mov r0, fp 800ac3a: f001 fa21 bl 800c080 <_Bfree> 800ac3e: 2200 movs r2, #0 800ac40: f8db 301c ldr.w r3, [fp, #28] 800ac44: 601a str r2, [r3, #0] 800ac46: 1e2b subs r3, r5, #0 800ac48: bfaf iteee ge 800ac4a: 2300 movge r3, #0 800ac4c: 2201 movlt r2, #1 800ac4e: f023 4300 biclt.w r3, r3, #2147483648 @ 0x80000000 800ac52: 9303 strlt r3, [sp, #12] 800ac54: bfa8 it ge 800ac56: 6033 strge r3, [r6, #0] 800ac58: f8dd 800c ldr.w r8, [sp, #12] 800ac5c: 4b98 ldr r3, [pc, #608] @ (800aec0 <_dtoa_r+0x2d0>) 800ac5e: bfb8 it lt 800ac60: 6032 strlt r2, [r6, #0] 800ac62: ea33 0308 bics.w r3, r3, r8 800ac66: d112 bne.n 800ac8e <_dtoa_r+0x9e> 800ac68: f242 730f movw r3, #9999 @ 0x270f 800ac6c: 9a22 ldr r2, [sp, #136] @ 0x88 800ac6e: 6013 str r3, [r2, #0] 800ac70: f3c8 0313 ubfx r3, r8, #0, #20 800ac74: 4323 orrs r3, r4 800ac76: f000 8550 beq.w 800b71a <_dtoa_r+0xb2a> 800ac7a: 9b24 ldr r3, [sp, #144] @ 0x90 800ac7c: f8df a244 ldr.w sl, [pc, #580] @ 800aec4 <_dtoa_r+0x2d4> 800ac80: 2b00 cmp r3, #0 800ac82: f000 8552 beq.w 800b72a <_dtoa_r+0xb3a> 800ac86: f10a 0303 add.w r3, sl, #3 800ac8a: f000 bd4c b.w 800b726 <_dtoa_r+0xb36> 800ac8e: e9dd 2302 ldrd r2, r3, [sp, #8] 800ac92: e9cd 230c strd r2, r3, [sp, #48] @ 0x30 800ac96: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 800ac9a: 2200 movs r2, #0 800ac9c: 2300 movs r3, #0 800ac9e: f7f5 fef9 bl 8000a94 <__aeabi_dcmpeq> 800aca2: 4607 mov r7, r0 800aca4: b158 cbz r0, 800acbe <_dtoa_r+0xce> 800aca6: 2301 movs r3, #1 800aca8: 9a22 ldr r2, [sp, #136] @ 0x88 800acaa: 6013 str r3, [r2, #0] 800acac: 9b24 ldr r3, [sp, #144] @ 0x90 800acae: b113 cbz r3, 800acb6 <_dtoa_r+0xc6> 800acb0: 4b85 ldr r3, [pc, #532] @ (800aec8 <_dtoa_r+0x2d8>) 800acb2: 9a24 ldr r2, [sp, #144] @ 0x90 800acb4: 6013 str r3, [r2, #0] 800acb6: f8df a214 ldr.w sl, [pc, #532] @ 800aecc <_dtoa_r+0x2dc> 800acba: f000 bd36 b.w 800b72a <_dtoa_r+0xb3a> 800acbe: ab14 add r3, sp, #80 @ 0x50 800acc0: 9301 str r3, [sp, #4] 800acc2: ab15 add r3, sp, #84 @ 0x54 800acc4: 9300 str r3, [sp, #0] 800acc6: 4658 mov r0, fp 800acc8: e9dd 230c ldrd r2, r3, [sp, #48] @ 0x30 800accc: f001 fcc0 bl 800c650 <__d2b> 800acd0: f3c8 560a ubfx r6, r8, #20, #11 800acd4: 4681 mov r9, r0 800acd6: 2e00 cmp r6, #0 800acd8: d077 beq.n 800adca <_dtoa_r+0x1da> 800acda: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 800acde: 9b0d ldr r3, [sp, #52] @ 0x34 800ace0: f2a6 36ff subw r6, r6, #1023 @ 0x3ff 800ace4: f3c3 0313 ubfx r3, r3, #0, #20 800ace8: f043 537f orr.w r3, r3, #1069547520 @ 0x3fc00000 800acec: f443 1340 orr.w r3, r3, #3145728 @ 0x300000 800acf0: 9712 str r7, [sp, #72] @ 0x48 800acf2: 4619 mov r1, r3 800acf4: 2200 movs r2, #0 800acf6: 4b76 ldr r3, [pc, #472] @ (800aed0 <_dtoa_r+0x2e0>) 800acf8: f7f5 faac bl 8000254 <__aeabi_dsub> 800acfc: a368 add r3, pc, #416 @ (adr r3, 800aea0 <_dtoa_r+0x2b0>) 800acfe: e9d3 2300 ldrd r2, r3, [r3] 800ad02: f7f5 fc5f bl 80005c4 <__aeabi_dmul> 800ad06: a368 add r3, pc, #416 @ (adr r3, 800aea8 <_dtoa_r+0x2b8>) 800ad08: e9d3 2300 ldrd r2, r3, [r3] 800ad0c: f7f5 faa4 bl 8000258 <__adddf3> 800ad10: 4604 mov r4, r0 800ad12: 4630 mov r0, r6 800ad14: 460d mov r5, r1 800ad16: f7f5 fbeb bl 80004f0 <__aeabi_i2d> 800ad1a: a365 add r3, pc, #404 @ (adr r3, 800aeb0 <_dtoa_r+0x2c0>) 800ad1c: e9d3 2300 ldrd r2, r3, [r3] 800ad20: f7f5 fc50 bl 80005c4 <__aeabi_dmul> 800ad24: 4602 mov r2, r0 800ad26: 460b mov r3, r1 800ad28: 4620 mov r0, r4 800ad2a: 4629 mov r1, r5 800ad2c: f7f5 fa94 bl 8000258 <__adddf3> 800ad30: 4604 mov r4, r0 800ad32: 460d mov r5, r1 800ad34: f7f5 fef6 bl 8000b24 <__aeabi_d2iz> 800ad38: 2200 movs r2, #0 800ad3a: 4607 mov r7, r0 800ad3c: 2300 movs r3, #0 800ad3e: 4620 mov r0, r4 800ad40: 4629 mov r1, r5 800ad42: f7f5 feb1 bl 8000aa8 <__aeabi_dcmplt> 800ad46: b140 cbz r0, 800ad5a <_dtoa_r+0x16a> 800ad48: 4638 mov r0, r7 800ad4a: f7f5 fbd1 bl 80004f0 <__aeabi_i2d> 800ad4e: 4622 mov r2, r4 800ad50: 462b mov r3, r5 800ad52: f7f5 fe9f bl 8000a94 <__aeabi_dcmpeq> 800ad56: b900 cbnz r0, 800ad5a <_dtoa_r+0x16a> 800ad58: 3f01 subs r7, #1 800ad5a: 2f16 cmp r7, #22 800ad5c: d853 bhi.n 800ae06 <_dtoa_r+0x216> 800ad5e: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 800ad62: 4b5c ldr r3, [pc, #368] @ (800aed4 <_dtoa_r+0x2e4>) 800ad64: eb03 03c7 add.w r3, r3, r7, lsl #3 800ad68: e9d3 2300 ldrd r2, r3, [r3] 800ad6c: f7f5 fe9c bl 8000aa8 <__aeabi_dcmplt> 800ad70: 2800 cmp r0, #0 800ad72: d04a beq.n 800ae0a <_dtoa_r+0x21a> 800ad74: 2300 movs r3, #0 800ad76: 3f01 subs r7, #1 800ad78: 930f str r3, [sp, #60] @ 0x3c 800ad7a: 9b14 ldr r3, [sp, #80] @ 0x50 800ad7c: 1b9b subs r3, r3, r6 800ad7e: 1e5a subs r2, r3, #1 800ad80: bf46 itte mi 800ad82: f1c3 0801 rsbmi r8, r3, #1 800ad86: 2300 movmi r3, #0 800ad88: f04f 0800 movpl.w r8, #0 800ad8c: 9209 str r2, [sp, #36] @ 0x24 800ad8e: bf48 it mi 800ad90: 9309 strmi r3, [sp, #36] @ 0x24 800ad92: 2f00 cmp r7, #0 800ad94: db3b blt.n 800ae0e <_dtoa_r+0x21e> 800ad96: 9b09 ldr r3, [sp, #36] @ 0x24 800ad98: 970e str r7, [sp, #56] @ 0x38 800ad9a: 443b add r3, r7 800ad9c: 9309 str r3, [sp, #36] @ 0x24 800ad9e: 2300 movs r3, #0 800ada0: 930a str r3, [sp, #40] @ 0x28 800ada2: 9b20 ldr r3, [sp, #128] @ 0x80 800ada4: 2b09 cmp r3, #9 800ada6: d866 bhi.n 800ae76 <_dtoa_r+0x286> 800ada8: 2b05 cmp r3, #5 800adaa: bfc4 itt gt 800adac: 3b04 subgt r3, #4 800adae: 9320 strgt r3, [sp, #128] @ 0x80 800adb0: 9b20 ldr r3, [sp, #128] @ 0x80 800adb2: bfc8 it gt 800adb4: 2400 movgt r4, #0 800adb6: f1a3 0302 sub.w r3, r3, #2 800adba: bfd8 it le 800adbc: 2401 movle r4, #1 800adbe: 2b03 cmp r3, #3 800adc0: d864 bhi.n 800ae8c <_dtoa_r+0x29c> 800adc2: e8df f003 tbb [pc, r3] 800adc6: 382b .short 0x382b 800adc8: 5636 .short 0x5636 800adca: e9dd 6314 ldrd r6, r3, [sp, #80] @ 0x50 800adce: 441e add r6, r3 800add0: f206 4332 addw r3, r6, #1074 @ 0x432 800add4: 2b20 cmp r3, #32 800add6: bfc1 itttt gt 800add8: f1c3 0340 rsbgt r3, r3, #64 @ 0x40 800addc: fa08 f803 lslgt.w r8, r8, r3 800ade0: f206 4312 addwgt r3, r6, #1042 @ 0x412 800ade4: fa24 f303 lsrgt.w r3, r4, r3 800ade8: bfd6 itet le 800adea: f1c3 0320 rsble r3, r3, #32 800adee: ea48 0003 orrgt.w r0, r8, r3 800adf2: fa04 f003 lslle.w r0, r4, r3 800adf6: f7f5 fb6b bl 80004d0 <__aeabi_ui2d> 800adfa: 2201 movs r2, #1 800adfc: f1a1 73f8 sub.w r3, r1, #32505856 @ 0x1f00000 800ae00: 3e01 subs r6, #1 800ae02: 9212 str r2, [sp, #72] @ 0x48 800ae04: e775 b.n 800acf2 <_dtoa_r+0x102> 800ae06: 2301 movs r3, #1 800ae08: e7b6 b.n 800ad78 <_dtoa_r+0x188> 800ae0a: 900f str r0, [sp, #60] @ 0x3c 800ae0c: e7b5 b.n 800ad7a <_dtoa_r+0x18a> 800ae0e: 427b negs r3, r7 800ae10: 930a str r3, [sp, #40] @ 0x28 800ae12: 2300 movs r3, #0 800ae14: eba8 0807 sub.w r8, r8, r7 800ae18: 930e str r3, [sp, #56] @ 0x38 800ae1a: e7c2 b.n 800ada2 <_dtoa_r+0x1b2> 800ae1c: 2300 movs r3, #0 800ae1e: 930b str r3, [sp, #44] @ 0x2c 800ae20: 9b21 ldr r3, [sp, #132] @ 0x84 800ae22: 2b00 cmp r3, #0 800ae24: dc35 bgt.n 800ae92 <_dtoa_r+0x2a2> 800ae26: 2301 movs r3, #1 800ae28: 461a mov r2, r3 800ae2a: e9cd 3307 strd r3, r3, [sp, #28] 800ae2e: 9221 str r2, [sp, #132] @ 0x84 800ae30: e00b b.n 800ae4a <_dtoa_r+0x25a> 800ae32: 2301 movs r3, #1 800ae34: e7f3 b.n 800ae1e <_dtoa_r+0x22e> 800ae36: 2300 movs r3, #0 800ae38: 930b str r3, [sp, #44] @ 0x2c 800ae3a: 9b21 ldr r3, [sp, #132] @ 0x84 800ae3c: 18fb adds r3, r7, r3 800ae3e: 9308 str r3, [sp, #32] 800ae40: 3301 adds r3, #1 800ae42: 2b01 cmp r3, #1 800ae44: 9307 str r3, [sp, #28] 800ae46: bfb8 it lt 800ae48: 2301 movlt r3, #1 800ae4a: 2100 movs r1, #0 800ae4c: 2204 movs r2, #4 800ae4e: f8db 001c ldr.w r0, [fp, #28] 800ae52: f102 0514 add.w r5, r2, #20 800ae56: 429d cmp r5, r3 800ae58: d91f bls.n 800ae9a <_dtoa_r+0x2aa> 800ae5a: 6041 str r1, [r0, #4] 800ae5c: 4658 mov r0, fp 800ae5e: f001 f8cf bl 800c000 <_Balloc> 800ae62: 4682 mov sl, r0 800ae64: 2800 cmp r0, #0 800ae66: d139 bne.n 800aedc <_dtoa_r+0x2ec> 800ae68: 4602 mov r2, r0 800ae6a: f240 11af movw r1, #431 @ 0x1af 800ae6e: 4b1a ldr r3, [pc, #104] @ (800aed8 <_dtoa_r+0x2e8>) 800ae70: e6d2 b.n 800ac18 <_dtoa_r+0x28> 800ae72: 2301 movs r3, #1 800ae74: e7e0 b.n 800ae38 <_dtoa_r+0x248> 800ae76: 2401 movs r4, #1 800ae78: 2300 movs r3, #0 800ae7a: 940b str r4, [sp, #44] @ 0x2c 800ae7c: 9320 str r3, [sp, #128] @ 0x80 800ae7e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800ae82: 2200 movs r2, #0 800ae84: e9cd 3307 strd r3, r3, [sp, #28] 800ae88: 2312 movs r3, #18 800ae8a: e7d0 b.n 800ae2e <_dtoa_r+0x23e> 800ae8c: 2301 movs r3, #1 800ae8e: 930b str r3, [sp, #44] @ 0x2c 800ae90: e7f5 b.n 800ae7e <_dtoa_r+0x28e> 800ae92: 9b21 ldr r3, [sp, #132] @ 0x84 800ae94: e9cd 3307 strd r3, r3, [sp, #28] 800ae98: e7d7 b.n 800ae4a <_dtoa_r+0x25a> 800ae9a: 3101 adds r1, #1 800ae9c: 0052 lsls r2, r2, #1 800ae9e: e7d8 b.n 800ae52 <_dtoa_r+0x262> 800aea0: 636f4361 .word 0x636f4361 800aea4: 3fd287a7 .word 0x3fd287a7 800aea8: 8b60c8b3 .word 0x8b60c8b3 800aeac: 3fc68a28 .word 0x3fc68a28 800aeb0: 509f79fb .word 0x509f79fb 800aeb4: 3fd34413 .word 0x3fd34413 800aeb8: 0800e036 .word 0x0800e036 800aebc: 0800e1f7 .word 0x0800e1f7 800aec0: 7ff00000 .word 0x7ff00000 800aec4: 0800e1f3 .word 0x0800e1f3 800aec8: 0800e4ea .word 0x0800e4ea 800aecc: 0800e4e9 .word 0x0800e4e9 800aed0: 3ff80000 .word 0x3ff80000 800aed4: 0800e300 .word 0x0800e300 800aed8: 0800e24f .word 0x0800e24f 800aedc: f8db 301c ldr.w r3, [fp, #28] 800aee0: 6018 str r0, [r3, #0] 800aee2: 9b07 ldr r3, [sp, #28] 800aee4: 2b0e cmp r3, #14 800aee6: f200 80a4 bhi.w 800b032 <_dtoa_r+0x442> 800aeea: 2c00 cmp r4, #0 800aeec: f000 80a1 beq.w 800b032 <_dtoa_r+0x442> 800aef0: 2f00 cmp r7, #0 800aef2: dd33 ble.n 800af5c <_dtoa_r+0x36c> 800aef4: 4b86 ldr r3, [pc, #536] @ (800b110 <_dtoa_r+0x520>) 800aef6: f007 020f and.w r2, r7, #15 800aefa: eb03 03c2 add.w r3, r3, r2, lsl #3 800aefe: 05f8 lsls r0, r7, #23 800af00: e9d3 3400 ldrd r3, r4, [r3] 800af04: e9cd 3404 strd r3, r4, [sp, #16] 800af08: ea4f 1427 mov.w r4, r7, asr #4 800af0c: d516 bpl.n 800af3c <_dtoa_r+0x34c> 800af0e: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 800af12: 4b80 ldr r3, [pc, #512] @ (800b114 <_dtoa_r+0x524>) 800af14: 2603 movs r6, #3 800af16: e9d3 2308 ldrd r2, r3, [r3, #32] 800af1a: f7f5 fc7d bl 8000818 <__aeabi_ddiv> 800af1e: e9cd 0102 strd r0, r1, [sp, #8] 800af22: f004 040f and.w r4, r4, #15 800af26: 4d7b ldr r5, [pc, #492] @ (800b114 <_dtoa_r+0x524>) 800af28: b954 cbnz r4, 800af40 <_dtoa_r+0x350> 800af2a: e9dd 2304 ldrd r2, r3, [sp, #16] 800af2e: e9dd 0102 ldrd r0, r1, [sp, #8] 800af32: f7f5 fc71 bl 8000818 <__aeabi_ddiv> 800af36: e9cd 0102 strd r0, r1, [sp, #8] 800af3a: e028 b.n 800af8e <_dtoa_r+0x39e> 800af3c: 2602 movs r6, #2 800af3e: e7f2 b.n 800af26 <_dtoa_r+0x336> 800af40: 07e1 lsls r1, r4, #31 800af42: d508 bpl.n 800af56 <_dtoa_r+0x366> 800af44: e9dd 0104 ldrd r0, r1, [sp, #16] 800af48: e9d5 2300 ldrd r2, r3, [r5] 800af4c: f7f5 fb3a bl 80005c4 <__aeabi_dmul> 800af50: e9cd 0104 strd r0, r1, [sp, #16] 800af54: 3601 adds r6, #1 800af56: 1064 asrs r4, r4, #1 800af58: 3508 adds r5, #8 800af5a: e7e5 b.n 800af28 <_dtoa_r+0x338> 800af5c: f000 80d2 beq.w 800b104 <_dtoa_r+0x514> 800af60: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 800af64: 427c negs r4, r7 800af66: 4b6a ldr r3, [pc, #424] @ (800b110 <_dtoa_r+0x520>) 800af68: f004 020f and.w r2, r4, #15 800af6c: eb03 03c2 add.w r3, r3, r2, lsl #3 800af70: e9d3 2300 ldrd r2, r3, [r3] 800af74: f7f5 fb26 bl 80005c4 <__aeabi_dmul> 800af78: 2602 movs r6, #2 800af7a: 2300 movs r3, #0 800af7c: e9cd 0102 strd r0, r1, [sp, #8] 800af80: 4d64 ldr r5, [pc, #400] @ (800b114 <_dtoa_r+0x524>) 800af82: 1124 asrs r4, r4, #4 800af84: 2c00 cmp r4, #0 800af86: f040 80b2 bne.w 800b0ee <_dtoa_r+0x4fe> 800af8a: 2b00 cmp r3, #0 800af8c: d1d3 bne.n 800af36 <_dtoa_r+0x346> 800af8e: e9dd 4502 ldrd r4, r5, [sp, #8] 800af92: 9b0f ldr r3, [sp, #60] @ 0x3c 800af94: 2b00 cmp r3, #0 800af96: f000 80b7 beq.w 800b108 <_dtoa_r+0x518> 800af9a: 2200 movs r2, #0 800af9c: 4620 mov r0, r4 800af9e: 4629 mov r1, r5 800afa0: 4b5d ldr r3, [pc, #372] @ (800b118 <_dtoa_r+0x528>) 800afa2: f7f5 fd81 bl 8000aa8 <__aeabi_dcmplt> 800afa6: 2800 cmp r0, #0 800afa8: f000 80ae beq.w 800b108 <_dtoa_r+0x518> 800afac: 9b07 ldr r3, [sp, #28] 800afae: 2b00 cmp r3, #0 800afb0: f000 80aa beq.w 800b108 <_dtoa_r+0x518> 800afb4: 9b08 ldr r3, [sp, #32] 800afb6: 2b00 cmp r3, #0 800afb8: dd37 ble.n 800b02a <_dtoa_r+0x43a> 800afba: 1e7b subs r3, r7, #1 800afbc: 4620 mov r0, r4 800afbe: 9304 str r3, [sp, #16] 800afc0: 2200 movs r2, #0 800afc2: 4629 mov r1, r5 800afc4: 4b55 ldr r3, [pc, #340] @ (800b11c <_dtoa_r+0x52c>) 800afc6: f7f5 fafd bl 80005c4 <__aeabi_dmul> 800afca: e9cd 0102 strd r0, r1, [sp, #8] 800afce: 9c08 ldr r4, [sp, #32] 800afd0: 3601 adds r6, #1 800afd2: 4630 mov r0, r6 800afd4: f7f5 fa8c bl 80004f0 <__aeabi_i2d> 800afd8: e9dd 2302 ldrd r2, r3, [sp, #8] 800afdc: f7f5 faf2 bl 80005c4 <__aeabi_dmul> 800afe0: 2200 movs r2, #0 800afe2: 4b4f ldr r3, [pc, #316] @ (800b120 <_dtoa_r+0x530>) 800afe4: f7f5 f938 bl 8000258 <__adddf3> 800afe8: 4605 mov r5, r0 800afea: f1a1 7650 sub.w r6, r1, #54525952 @ 0x3400000 800afee: 2c00 cmp r4, #0 800aff0: f040 809a bne.w 800b128 <_dtoa_r+0x538> 800aff4: e9dd 0102 ldrd r0, r1, [sp, #8] 800aff8: 2200 movs r2, #0 800affa: 4b4a ldr r3, [pc, #296] @ (800b124 <_dtoa_r+0x534>) 800affc: f7f5 f92a bl 8000254 <__aeabi_dsub> 800b000: 4602 mov r2, r0 800b002: 460b mov r3, r1 800b004: e9cd 2302 strd r2, r3, [sp, #8] 800b008: 462a mov r2, r5 800b00a: 4633 mov r3, r6 800b00c: f7f5 fd6a bl 8000ae4 <__aeabi_dcmpgt> 800b010: 2800 cmp r0, #0 800b012: f040 828e bne.w 800b532 <_dtoa_r+0x942> 800b016: e9dd 0102 ldrd r0, r1, [sp, #8] 800b01a: 462a mov r2, r5 800b01c: f106 4300 add.w r3, r6, #2147483648 @ 0x80000000 800b020: f7f5 fd42 bl 8000aa8 <__aeabi_dcmplt> 800b024: 2800 cmp r0, #0 800b026: f040 8127 bne.w 800b278 <_dtoa_r+0x688> 800b02a: e9dd 340c ldrd r3, r4, [sp, #48] @ 0x30 800b02e: e9cd 3402 strd r3, r4, [sp, #8] 800b032: 9b15 ldr r3, [sp, #84] @ 0x54 800b034: 2b00 cmp r3, #0 800b036: f2c0 8163 blt.w 800b300 <_dtoa_r+0x710> 800b03a: 2f0e cmp r7, #14 800b03c: f300 8160 bgt.w 800b300 <_dtoa_r+0x710> 800b040: 4b33 ldr r3, [pc, #204] @ (800b110 <_dtoa_r+0x520>) 800b042: eb03 03c7 add.w r3, r3, r7, lsl #3 800b046: e9d3 3400 ldrd r3, r4, [r3] 800b04a: e9cd 3404 strd r3, r4, [sp, #16] 800b04e: 9b21 ldr r3, [sp, #132] @ 0x84 800b050: 2b00 cmp r3, #0 800b052: da03 bge.n 800b05c <_dtoa_r+0x46c> 800b054: 9b07 ldr r3, [sp, #28] 800b056: 2b00 cmp r3, #0 800b058: f340 8100 ble.w 800b25c <_dtoa_r+0x66c> 800b05c: e9dd 4502 ldrd r4, r5, [sp, #8] 800b060: 4656 mov r6, sl 800b062: e9dd 2304 ldrd r2, r3, [sp, #16] 800b066: 4620 mov r0, r4 800b068: 4629 mov r1, r5 800b06a: f7f5 fbd5 bl 8000818 <__aeabi_ddiv> 800b06e: f7f5 fd59 bl 8000b24 <__aeabi_d2iz> 800b072: 4680 mov r8, r0 800b074: f7f5 fa3c bl 80004f0 <__aeabi_i2d> 800b078: e9dd 2304 ldrd r2, r3, [sp, #16] 800b07c: f7f5 faa2 bl 80005c4 <__aeabi_dmul> 800b080: 4602 mov r2, r0 800b082: 460b mov r3, r1 800b084: 4620 mov r0, r4 800b086: 4629 mov r1, r5 800b088: f7f5 f8e4 bl 8000254 <__aeabi_dsub> 800b08c: f108 0430 add.w r4, r8, #48 @ 0x30 800b090: 9d07 ldr r5, [sp, #28] 800b092: f806 4b01 strb.w r4, [r6], #1 800b096: eba6 040a sub.w r4, r6, sl 800b09a: 42a5 cmp r5, r4 800b09c: 4602 mov r2, r0 800b09e: 460b mov r3, r1 800b0a0: f040 8116 bne.w 800b2d0 <_dtoa_r+0x6e0> 800b0a4: f7f5 f8d8 bl 8000258 <__adddf3> 800b0a8: e9dd 2304 ldrd r2, r3, [sp, #16] 800b0ac: 4604 mov r4, r0 800b0ae: 460d mov r5, r1 800b0b0: f7f5 fd18 bl 8000ae4 <__aeabi_dcmpgt> 800b0b4: 2800 cmp r0, #0 800b0b6: f040 80f8 bne.w 800b2aa <_dtoa_r+0x6ba> 800b0ba: e9dd 2304 ldrd r2, r3, [sp, #16] 800b0be: 4620 mov r0, r4 800b0c0: 4629 mov r1, r5 800b0c2: f7f5 fce7 bl 8000a94 <__aeabi_dcmpeq> 800b0c6: b118 cbz r0, 800b0d0 <_dtoa_r+0x4e0> 800b0c8: f018 0f01 tst.w r8, #1 800b0cc: f040 80ed bne.w 800b2aa <_dtoa_r+0x6ba> 800b0d0: 4649 mov r1, r9 800b0d2: 4658 mov r0, fp 800b0d4: f000 ffd4 bl 800c080 <_Bfree> 800b0d8: 2300 movs r3, #0 800b0da: 7033 strb r3, [r6, #0] 800b0dc: 9b22 ldr r3, [sp, #136] @ 0x88 800b0de: 3701 adds r7, #1 800b0e0: 601f str r7, [r3, #0] 800b0e2: 9b24 ldr r3, [sp, #144] @ 0x90 800b0e4: 2b00 cmp r3, #0 800b0e6: f000 8320 beq.w 800b72a <_dtoa_r+0xb3a> 800b0ea: 601e str r6, [r3, #0] 800b0ec: e31d b.n 800b72a <_dtoa_r+0xb3a> 800b0ee: 07e2 lsls r2, r4, #31 800b0f0: d505 bpl.n 800b0fe <_dtoa_r+0x50e> 800b0f2: e9d5 2300 ldrd r2, r3, [r5] 800b0f6: f7f5 fa65 bl 80005c4 <__aeabi_dmul> 800b0fa: 2301 movs r3, #1 800b0fc: 3601 adds r6, #1 800b0fe: 1064 asrs r4, r4, #1 800b100: 3508 adds r5, #8 800b102: e73f b.n 800af84 <_dtoa_r+0x394> 800b104: 2602 movs r6, #2 800b106: e742 b.n 800af8e <_dtoa_r+0x39e> 800b108: 9c07 ldr r4, [sp, #28] 800b10a: 9704 str r7, [sp, #16] 800b10c: e761 b.n 800afd2 <_dtoa_r+0x3e2> 800b10e: bf00 nop 800b110: 0800e300 .word 0x0800e300 800b114: 0800e2d8 .word 0x0800e2d8 800b118: 3ff00000 .word 0x3ff00000 800b11c: 40240000 .word 0x40240000 800b120: 401c0000 .word 0x401c0000 800b124: 40140000 .word 0x40140000 800b128: 4b70 ldr r3, [pc, #448] @ (800b2ec <_dtoa_r+0x6fc>) 800b12a: 990b ldr r1, [sp, #44] @ 0x2c 800b12c: eb03 03c4 add.w r3, r3, r4, lsl #3 800b130: e953 2302 ldrd r2, r3, [r3, #-8] 800b134: 4454 add r4, sl 800b136: 2900 cmp r1, #0 800b138: d045 beq.n 800b1c6 <_dtoa_r+0x5d6> 800b13a: 2000 movs r0, #0 800b13c: 496c ldr r1, [pc, #432] @ (800b2f0 <_dtoa_r+0x700>) 800b13e: f7f5 fb6b bl 8000818 <__aeabi_ddiv> 800b142: 4633 mov r3, r6 800b144: 462a mov r2, r5 800b146: f7f5 f885 bl 8000254 <__aeabi_dsub> 800b14a: 4656 mov r6, sl 800b14c: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 800b150: e9dd 0102 ldrd r0, r1, [sp, #8] 800b154: f7f5 fce6 bl 8000b24 <__aeabi_d2iz> 800b158: 4605 mov r5, r0 800b15a: f7f5 f9c9 bl 80004f0 <__aeabi_i2d> 800b15e: 4602 mov r2, r0 800b160: 460b mov r3, r1 800b162: e9dd 0102 ldrd r0, r1, [sp, #8] 800b166: f7f5 f875 bl 8000254 <__aeabi_dsub> 800b16a: 4602 mov r2, r0 800b16c: 460b mov r3, r1 800b16e: 3530 adds r5, #48 @ 0x30 800b170: e9cd 2302 strd r2, r3, [sp, #8] 800b174: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 800b178: f806 5b01 strb.w r5, [r6], #1 800b17c: f7f5 fc94 bl 8000aa8 <__aeabi_dcmplt> 800b180: 2800 cmp r0, #0 800b182: d163 bne.n 800b24c <_dtoa_r+0x65c> 800b184: e9dd 2302 ldrd r2, r3, [sp, #8] 800b188: 2000 movs r0, #0 800b18a: 495a ldr r1, [pc, #360] @ (800b2f4 <_dtoa_r+0x704>) 800b18c: f7f5 f862 bl 8000254 <__aeabi_dsub> 800b190: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 800b194: f7f5 fc88 bl 8000aa8 <__aeabi_dcmplt> 800b198: 2800 cmp r0, #0 800b19a: f040 8087 bne.w 800b2ac <_dtoa_r+0x6bc> 800b19e: 42a6 cmp r6, r4 800b1a0: f43f af43 beq.w 800b02a <_dtoa_r+0x43a> 800b1a4: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 800b1a8: 2200 movs r2, #0 800b1aa: 4b53 ldr r3, [pc, #332] @ (800b2f8 <_dtoa_r+0x708>) 800b1ac: f7f5 fa0a bl 80005c4 <__aeabi_dmul> 800b1b0: 2200 movs r2, #0 800b1b2: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 800b1b6: e9dd 0102 ldrd r0, r1, [sp, #8] 800b1ba: 4b4f ldr r3, [pc, #316] @ (800b2f8 <_dtoa_r+0x708>) 800b1bc: f7f5 fa02 bl 80005c4 <__aeabi_dmul> 800b1c0: e9cd 0102 strd r0, r1, [sp, #8] 800b1c4: e7c4 b.n 800b150 <_dtoa_r+0x560> 800b1c6: 4631 mov r1, r6 800b1c8: 4628 mov r0, r5 800b1ca: f7f5 f9fb bl 80005c4 <__aeabi_dmul> 800b1ce: 4656 mov r6, sl 800b1d0: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 800b1d4: 9413 str r4, [sp, #76] @ 0x4c 800b1d6: e9dd 0102 ldrd r0, r1, [sp, #8] 800b1da: f7f5 fca3 bl 8000b24 <__aeabi_d2iz> 800b1de: 4605 mov r5, r0 800b1e0: f7f5 f986 bl 80004f0 <__aeabi_i2d> 800b1e4: 4602 mov r2, r0 800b1e6: 460b mov r3, r1 800b1e8: e9dd 0102 ldrd r0, r1, [sp, #8] 800b1ec: f7f5 f832 bl 8000254 <__aeabi_dsub> 800b1f0: 4602 mov r2, r0 800b1f2: 460b mov r3, r1 800b1f4: 3530 adds r5, #48 @ 0x30 800b1f6: f806 5b01 strb.w r5, [r6], #1 800b1fa: 42a6 cmp r6, r4 800b1fc: e9cd 2302 strd r2, r3, [sp, #8] 800b200: f04f 0200 mov.w r2, #0 800b204: d124 bne.n 800b250 <_dtoa_r+0x660> 800b206: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 800b20a: 4b39 ldr r3, [pc, #228] @ (800b2f0 <_dtoa_r+0x700>) 800b20c: f7f5 f824 bl 8000258 <__adddf3> 800b210: 4602 mov r2, r0 800b212: 460b mov r3, r1 800b214: e9dd 0102 ldrd r0, r1, [sp, #8] 800b218: f7f5 fc64 bl 8000ae4 <__aeabi_dcmpgt> 800b21c: 2800 cmp r0, #0 800b21e: d145 bne.n 800b2ac <_dtoa_r+0x6bc> 800b220: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 800b224: 2000 movs r0, #0 800b226: 4932 ldr r1, [pc, #200] @ (800b2f0 <_dtoa_r+0x700>) 800b228: f7f5 f814 bl 8000254 <__aeabi_dsub> 800b22c: 4602 mov r2, r0 800b22e: 460b mov r3, r1 800b230: e9dd 0102 ldrd r0, r1, [sp, #8] 800b234: f7f5 fc38 bl 8000aa8 <__aeabi_dcmplt> 800b238: 2800 cmp r0, #0 800b23a: f43f aef6 beq.w 800b02a <_dtoa_r+0x43a> 800b23e: 9e13 ldr r6, [sp, #76] @ 0x4c 800b240: 1e73 subs r3, r6, #1 800b242: 9313 str r3, [sp, #76] @ 0x4c 800b244: f816 3c01 ldrb.w r3, [r6, #-1] 800b248: 2b30 cmp r3, #48 @ 0x30 800b24a: d0f8 beq.n 800b23e <_dtoa_r+0x64e> 800b24c: 9f04 ldr r7, [sp, #16] 800b24e: e73f b.n 800b0d0 <_dtoa_r+0x4e0> 800b250: 4b29 ldr r3, [pc, #164] @ (800b2f8 <_dtoa_r+0x708>) 800b252: f7f5 f9b7 bl 80005c4 <__aeabi_dmul> 800b256: e9cd 0102 strd r0, r1, [sp, #8] 800b25a: e7bc b.n 800b1d6 <_dtoa_r+0x5e6> 800b25c: d10c bne.n 800b278 <_dtoa_r+0x688> 800b25e: e9dd 0104 ldrd r0, r1, [sp, #16] 800b262: 2200 movs r2, #0 800b264: 4b25 ldr r3, [pc, #148] @ (800b2fc <_dtoa_r+0x70c>) 800b266: f7f5 f9ad bl 80005c4 <__aeabi_dmul> 800b26a: e9dd 2302 ldrd r2, r3, [sp, #8] 800b26e: f7f5 fc2f bl 8000ad0 <__aeabi_dcmpge> 800b272: 2800 cmp r0, #0 800b274: f000 815b beq.w 800b52e <_dtoa_r+0x93e> 800b278: 2400 movs r4, #0 800b27a: 4625 mov r5, r4 800b27c: 9b21 ldr r3, [sp, #132] @ 0x84 800b27e: 4656 mov r6, sl 800b280: 43db mvns r3, r3 800b282: 9304 str r3, [sp, #16] 800b284: 2700 movs r7, #0 800b286: 4621 mov r1, r4 800b288: 4658 mov r0, fp 800b28a: f000 fef9 bl 800c080 <_Bfree> 800b28e: 2d00 cmp r5, #0 800b290: d0dc beq.n 800b24c <_dtoa_r+0x65c> 800b292: b12f cbz r7, 800b2a0 <_dtoa_r+0x6b0> 800b294: 42af cmp r7, r5 800b296: d003 beq.n 800b2a0 <_dtoa_r+0x6b0> 800b298: 4639 mov r1, r7 800b29a: 4658 mov r0, fp 800b29c: f000 fef0 bl 800c080 <_Bfree> 800b2a0: 4629 mov r1, r5 800b2a2: 4658 mov r0, fp 800b2a4: f000 feec bl 800c080 <_Bfree> 800b2a8: e7d0 b.n 800b24c <_dtoa_r+0x65c> 800b2aa: 9704 str r7, [sp, #16] 800b2ac: 4633 mov r3, r6 800b2ae: 461e mov r6, r3 800b2b0: f813 2d01 ldrb.w r2, [r3, #-1]! 800b2b4: 2a39 cmp r2, #57 @ 0x39 800b2b6: d107 bne.n 800b2c8 <_dtoa_r+0x6d8> 800b2b8: 459a cmp sl, r3 800b2ba: d1f8 bne.n 800b2ae <_dtoa_r+0x6be> 800b2bc: 9a04 ldr r2, [sp, #16] 800b2be: 3201 adds r2, #1 800b2c0: 9204 str r2, [sp, #16] 800b2c2: 2230 movs r2, #48 @ 0x30 800b2c4: f88a 2000 strb.w r2, [sl] 800b2c8: 781a ldrb r2, [r3, #0] 800b2ca: 3201 adds r2, #1 800b2cc: 701a strb r2, [r3, #0] 800b2ce: e7bd b.n 800b24c <_dtoa_r+0x65c> 800b2d0: 2200 movs r2, #0 800b2d2: 4b09 ldr r3, [pc, #36] @ (800b2f8 <_dtoa_r+0x708>) 800b2d4: f7f5 f976 bl 80005c4 <__aeabi_dmul> 800b2d8: 2200 movs r2, #0 800b2da: 2300 movs r3, #0 800b2dc: 4604 mov r4, r0 800b2de: 460d mov r5, r1 800b2e0: f7f5 fbd8 bl 8000a94 <__aeabi_dcmpeq> 800b2e4: 2800 cmp r0, #0 800b2e6: f43f aebc beq.w 800b062 <_dtoa_r+0x472> 800b2ea: e6f1 b.n 800b0d0 <_dtoa_r+0x4e0> 800b2ec: 0800e300 .word 0x0800e300 800b2f0: 3fe00000 .word 0x3fe00000 800b2f4: 3ff00000 .word 0x3ff00000 800b2f8: 40240000 .word 0x40240000 800b2fc: 40140000 .word 0x40140000 800b300: 9a0b ldr r2, [sp, #44] @ 0x2c 800b302: 2a00 cmp r2, #0 800b304: f000 80db beq.w 800b4be <_dtoa_r+0x8ce> 800b308: 9a20 ldr r2, [sp, #128] @ 0x80 800b30a: 2a01 cmp r2, #1 800b30c: f300 80bf bgt.w 800b48e <_dtoa_r+0x89e> 800b310: 9a12 ldr r2, [sp, #72] @ 0x48 800b312: 2a00 cmp r2, #0 800b314: f000 80b7 beq.w 800b486 <_dtoa_r+0x896> 800b318: f203 4333 addw r3, r3, #1075 @ 0x433 800b31c: 4646 mov r6, r8 800b31e: 9c0a ldr r4, [sp, #40] @ 0x28 800b320: 9a09 ldr r2, [sp, #36] @ 0x24 800b322: 2101 movs r1, #1 800b324: 441a add r2, r3 800b326: 4658 mov r0, fp 800b328: 4498 add r8, r3 800b32a: 9209 str r2, [sp, #36] @ 0x24 800b32c: f000 ff5c bl 800c1e8 <__i2b> 800b330: 4605 mov r5, r0 800b332: b15e cbz r6, 800b34c <_dtoa_r+0x75c> 800b334: 9b09 ldr r3, [sp, #36] @ 0x24 800b336: 2b00 cmp r3, #0 800b338: dd08 ble.n 800b34c <_dtoa_r+0x75c> 800b33a: 42b3 cmp r3, r6 800b33c: bfa8 it ge 800b33e: 4633 movge r3, r6 800b340: 9a09 ldr r2, [sp, #36] @ 0x24 800b342: eba8 0803 sub.w r8, r8, r3 800b346: 1af6 subs r6, r6, r3 800b348: 1ad3 subs r3, r2, r3 800b34a: 9309 str r3, [sp, #36] @ 0x24 800b34c: 9b0a ldr r3, [sp, #40] @ 0x28 800b34e: b1f3 cbz r3, 800b38e <_dtoa_r+0x79e> 800b350: 9b0b ldr r3, [sp, #44] @ 0x2c 800b352: 2b00 cmp r3, #0 800b354: f000 80b7 beq.w 800b4c6 <_dtoa_r+0x8d6> 800b358: b18c cbz r4, 800b37e <_dtoa_r+0x78e> 800b35a: 4629 mov r1, r5 800b35c: 4622 mov r2, r4 800b35e: 4658 mov r0, fp 800b360: f001 f800 bl 800c364 <__pow5mult> 800b364: 464a mov r2, r9 800b366: 4601 mov r1, r0 800b368: 4605 mov r5, r0 800b36a: 4658 mov r0, fp 800b36c: f000 ff52 bl 800c214 <__multiply> 800b370: 4649 mov r1, r9 800b372: 9004 str r0, [sp, #16] 800b374: 4658 mov r0, fp 800b376: f000 fe83 bl 800c080 <_Bfree> 800b37a: 9b04 ldr r3, [sp, #16] 800b37c: 4699 mov r9, r3 800b37e: 9b0a ldr r3, [sp, #40] @ 0x28 800b380: 1b1a subs r2, r3, r4 800b382: d004 beq.n 800b38e <_dtoa_r+0x79e> 800b384: 4649 mov r1, r9 800b386: 4658 mov r0, fp 800b388: f000 ffec bl 800c364 <__pow5mult> 800b38c: 4681 mov r9, r0 800b38e: 2101 movs r1, #1 800b390: 4658 mov r0, fp 800b392: f000 ff29 bl 800c1e8 <__i2b> 800b396: 9b0e ldr r3, [sp, #56] @ 0x38 800b398: 4604 mov r4, r0 800b39a: 2b00 cmp r3, #0 800b39c: f000 81c9 beq.w 800b732 <_dtoa_r+0xb42> 800b3a0: 461a mov r2, r3 800b3a2: 4601 mov r1, r0 800b3a4: 4658 mov r0, fp 800b3a6: f000 ffdd bl 800c364 <__pow5mult> 800b3aa: 9b20 ldr r3, [sp, #128] @ 0x80 800b3ac: 4604 mov r4, r0 800b3ae: 2b01 cmp r3, #1 800b3b0: f300 808f bgt.w 800b4d2 <_dtoa_r+0x8e2> 800b3b4: 9b02 ldr r3, [sp, #8] 800b3b6: 2b00 cmp r3, #0 800b3b8: f040 8087 bne.w 800b4ca <_dtoa_r+0x8da> 800b3bc: 9b03 ldr r3, [sp, #12] 800b3be: f3c3 0313 ubfx r3, r3, #0, #20 800b3c2: 2b00 cmp r3, #0 800b3c4: f040 8083 bne.w 800b4ce <_dtoa_r+0x8de> 800b3c8: 9b03 ldr r3, [sp, #12] 800b3ca: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 800b3ce: 0d1b lsrs r3, r3, #20 800b3d0: 051b lsls r3, r3, #20 800b3d2: b12b cbz r3, 800b3e0 <_dtoa_r+0x7f0> 800b3d4: 9b09 ldr r3, [sp, #36] @ 0x24 800b3d6: f108 0801 add.w r8, r8, #1 800b3da: 3301 adds r3, #1 800b3dc: 9309 str r3, [sp, #36] @ 0x24 800b3de: 2301 movs r3, #1 800b3e0: 930a str r3, [sp, #40] @ 0x28 800b3e2: 9b0e ldr r3, [sp, #56] @ 0x38 800b3e4: 2b00 cmp r3, #0 800b3e6: f000 81aa beq.w 800b73e <_dtoa_r+0xb4e> 800b3ea: 6923 ldr r3, [r4, #16] 800b3ec: eb04 0383 add.w r3, r4, r3, lsl #2 800b3f0: 6918 ldr r0, [r3, #16] 800b3f2: f000 fead bl 800c150 <__hi0bits> 800b3f6: f1c0 0020 rsb r0, r0, #32 800b3fa: 9b09 ldr r3, [sp, #36] @ 0x24 800b3fc: 4418 add r0, r3 800b3fe: f010 001f ands.w r0, r0, #31 800b402: d071 beq.n 800b4e8 <_dtoa_r+0x8f8> 800b404: f1c0 0320 rsb r3, r0, #32 800b408: 2b04 cmp r3, #4 800b40a: dd65 ble.n 800b4d8 <_dtoa_r+0x8e8> 800b40c: 9b09 ldr r3, [sp, #36] @ 0x24 800b40e: f1c0 001c rsb r0, r0, #28 800b412: 4403 add r3, r0 800b414: 4480 add r8, r0 800b416: 4406 add r6, r0 800b418: 9309 str r3, [sp, #36] @ 0x24 800b41a: f1b8 0f00 cmp.w r8, #0 800b41e: dd05 ble.n 800b42c <_dtoa_r+0x83c> 800b420: 4649 mov r1, r9 800b422: 4642 mov r2, r8 800b424: 4658 mov r0, fp 800b426: f000 fff7 bl 800c418 <__lshift> 800b42a: 4681 mov r9, r0 800b42c: 9b09 ldr r3, [sp, #36] @ 0x24 800b42e: 2b00 cmp r3, #0 800b430: dd05 ble.n 800b43e <_dtoa_r+0x84e> 800b432: 4621 mov r1, r4 800b434: 461a mov r2, r3 800b436: 4658 mov r0, fp 800b438: f000 ffee bl 800c418 <__lshift> 800b43c: 4604 mov r4, r0 800b43e: 9b0f ldr r3, [sp, #60] @ 0x3c 800b440: 2b00 cmp r3, #0 800b442: d053 beq.n 800b4ec <_dtoa_r+0x8fc> 800b444: 4621 mov r1, r4 800b446: 4648 mov r0, r9 800b448: f001 f852 bl 800c4f0 <__mcmp> 800b44c: 2800 cmp r0, #0 800b44e: da4d bge.n 800b4ec <_dtoa_r+0x8fc> 800b450: 1e7b subs r3, r7, #1 800b452: 4649 mov r1, r9 800b454: 9304 str r3, [sp, #16] 800b456: 220a movs r2, #10 800b458: 2300 movs r3, #0 800b45a: 4658 mov r0, fp 800b45c: f000 fe32 bl 800c0c4 <__multadd> 800b460: 9b0b ldr r3, [sp, #44] @ 0x2c 800b462: 4681 mov r9, r0 800b464: 2b00 cmp r3, #0 800b466: f000 816c beq.w 800b742 <_dtoa_r+0xb52> 800b46a: 2300 movs r3, #0 800b46c: 4629 mov r1, r5 800b46e: 220a movs r2, #10 800b470: 4658 mov r0, fp 800b472: f000 fe27 bl 800c0c4 <__multadd> 800b476: 9b08 ldr r3, [sp, #32] 800b478: 4605 mov r5, r0 800b47a: 2b00 cmp r3, #0 800b47c: dc61 bgt.n 800b542 <_dtoa_r+0x952> 800b47e: 9b20 ldr r3, [sp, #128] @ 0x80 800b480: 2b02 cmp r3, #2 800b482: dc3b bgt.n 800b4fc <_dtoa_r+0x90c> 800b484: e05d b.n 800b542 <_dtoa_r+0x952> 800b486: 9b14 ldr r3, [sp, #80] @ 0x50 800b488: f1c3 0336 rsb r3, r3, #54 @ 0x36 800b48c: e746 b.n 800b31c <_dtoa_r+0x72c> 800b48e: 9b07 ldr r3, [sp, #28] 800b490: 1e5c subs r4, r3, #1 800b492: 9b0a ldr r3, [sp, #40] @ 0x28 800b494: 42a3 cmp r3, r4 800b496: bfbf itttt lt 800b498: 9b0a ldrlt r3, [sp, #40] @ 0x28 800b49a: 9a0e ldrlt r2, [sp, #56] @ 0x38 800b49c: 1ae3 sublt r3, r4, r3 800b49e: 18d2 addlt r2, r2, r3 800b4a0: bfa8 it ge 800b4a2: 1b1c subge r4, r3, r4 800b4a4: 9b07 ldr r3, [sp, #28] 800b4a6: bfbe ittt lt 800b4a8: 940a strlt r4, [sp, #40] @ 0x28 800b4aa: 920e strlt r2, [sp, #56] @ 0x38 800b4ac: 2400 movlt r4, #0 800b4ae: 2b00 cmp r3, #0 800b4b0: bfb5 itete lt 800b4b2: eba8 0603 sublt.w r6, r8, r3 800b4b6: 4646 movge r6, r8 800b4b8: 2300 movlt r3, #0 800b4ba: 9b07 ldrge r3, [sp, #28] 800b4bc: e730 b.n 800b320 <_dtoa_r+0x730> 800b4be: 4646 mov r6, r8 800b4c0: 9c0a ldr r4, [sp, #40] @ 0x28 800b4c2: 9d0b ldr r5, [sp, #44] @ 0x2c 800b4c4: e735 b.n 800b332 <_dtoa_r+0x742> 800b4c6: 9a0a ldr r2, [sp, #40] @ 0x28 800b4c8: e75c b.n 800b384 <_dtoa_r+0x794> 800b4ca: 2300 movs r3, #0 800b4cc: e788 b.n 800b3e0 <_dtoa_r+0x7f0> 800b4ce: 9b02 ldr r3, [sp, #8] 800b4d0: e786 b.n 800b3e0 <_dtoa_r+0x7f0> 800b4d2: 2300 movs r3, #0 800b4d4: 930a str r3, [sp, #40] @ 0x28 800b4d6: e788 b.n 800b3ea <_dtoa_r+0x7fa> 800b4d8: d09f beq.n 800b41a <_dtoa_r+0x82a> 800b4da: 9a09 ldr r2, [sp, #36] @ 0x24 800b4dc: 331c adds r3, #28 800b4de: 441a add r2, r3 800b4e0: 4498 add r8, r3 800b4e2: 441e add r6, r3 800b4e4: 9209 str r2, [sp, #36] @ 0x24 800b4e6: e798 b.n 800b41a <_dtoa_r+0x82a> 800b4e8: 4603 mov r3, r0 800b4ea: e7f6 b.n 800b4da <_dtoa_r+0x8ea> 800b4ec: 9b07 ldr r3, [sp, #28] 800b4ee: 9704 str r7, [sp, #16] 800b4f0: 2b00 cmp r3, #0 800b4f2: dc20 bgt.n 800b536 <_dtoa_r+0x946> 800b4f4: 9308 str r3, [sp, #32] 800b4f6: 9b20 ldr r3, [sp, #128] @ 0x80 800b4f8: 2b02 cmp r3, #2 800b4fa: dd1e ble.n 800b53a <_dtoa_r+0x94a> 800b4fc: 9b08 ldr r3, [sp, #32] 800b4fe: 2b00 cmp r3, #0 800b500: f47f aebc bne.w 800b27c <_dtoa_r+0x68c> 800b504: 4621 mov r1, r4 800b506: 2205 movs r2, #5 800b508: 4658 mov r0, fp 800b50a: f000 fddb bl 800c0c4 <__multadd> 800b50e: 4601 mov r1, r0 800b510: 4604 mov r4, r0 800b512: 4648 mov r0, r9 800b514: f000 ffec bl 800c4f0 <__mcmp> 800b518: 2800 cmp r0, #0 800b51a: f77f aeaf ble.w 800b27c <_dtoa_r+0x68c> 800b51e: 2331 movs r3, #49 @ 0x31 800b520: 4656 mov r6, sl 800b522: f806 3b01 strb.w r3, [r6], #1 800b526: 9b04 ldr r3, [sp, #16] 800b528: 3301 adds r3, #1 800b52a: 9304 str r3, [sp, #16] 800b52c: e6aa b.n 800b284 <_dtoa_r+0x694> 800b52e: 9c07 ldr r4, [sp, #28] 800b530: 9704 str r7, [sp, #16] 800b532: 4625 mov r5, r4 800b534: e7f3 b.n 800b51e <_dtoa_r+0x92e> 800b536: 9b07 ldr r3, [sp, #28] 800b538: 9308 str r3, [sp, #32] 800b53a: 9b0b ldr r3, [sp, #44] @ 0x2c 800b53c: 2b00 cmp r3, #0 800b53e: f000 8104 beq.w 800b74a <_dtoa_r+0xb5a> 800b542: 2e00 cmp r6, #0 800b544: dd05 ble.n 800b552 <_dtoa_r+0x962> 800b546: 4629 mov r1, r5 800b548: 4632 mov r2, r6 800b54a: 4658 mov r0, fp 800b54c: f000 ff64 bl 800c418 <__lshift> 800b550: 4605 mov r5, r0 800b552: 9b0a ldr r3, [sp, #40] @ 0x28 800b554: 2b00 cmp r3, #0 800b556: d05a beq.n 800b60e <_dtoa_r+0xa1e> 800b558: 4658 mov r0, fp 800b55a: 6869 ldr r1, [r5, #4] 800b55c: f000 fd50 bl 800c000 <_Balloc> 800b560: 4606 mov r6, r0 800b562: b928 cbnz r0, 800b570 <_dtoa_r+0x980> 800b564: 4602 mov r2, r0 800b566: f240 21ef movw r1, #751 @ 0x2ef 800b56a: 4b83 ldr r3, [pc, #524] @ (800b778 <_dtoa_r+0xb88>) 800b56c: f7ff bb54 b.w 800ac18 <_dtoa_r+0x28> 800b570: 692a ldr r2, [r5, #16] 800b572: f105 010c add.w r1, r5, #12 800b576: 3202 adds r2, #2 800b578: 0092 lsls r2, r2, #2 800b57a: 300c adds r0, #12 800b57c: f7ff fa7b bl 800aa76 800b580: 2201 movs r2, #1 800b582: 4631 mov r1, r6 800b584: 4658 mov r0, fp 800b586: f000 ff47 bl 800c418 <__lshift> 800b58a: 462f mov r7, r5 800b58c: 4605 mov r5, r0 800b58e: f10a 0301 add.w r3, sl, #1 800b592: 9307 str r3, [sp, #28] 800b594: 9b08 ldr r3, [sp, #32] 800b596: 4453 add r3, sl 800b598: 930b str r3, [sp, #44] @ 0x2c 800b59a: 9b02 ldr r3, [sp, #8] 800b59c: f003 0301 and.w r3, r3, #1 800b5a0: 930a str r3, [sp, #40] @ 0x28 800b5a2: 9b07 ldr r3, [sp, #28] 800b5a4: 4621 mov r1, r4 800b5a6: 3b01 subs r3, #1 800b5a8: 4648 mov r0, r9 800b5aa: 9302 str r3, [sp, #8] 800b5ac: f7ff fa98 bl 800aae0 800b5b0: 4639 mov r1, r7 800b5b2: 9008 str r0, [sp, #32] 800b5b4: f100 0830 add.w r8, r0, #48 @ 0x30 800b5b8: 4648 mov r0, r9 800b5ba: f000 ff99 bl 800c4f0 <__mcmp> 800b5be: 462a mov r2, r5 800b5c0: 9009 str r0, [sp, #36] @ 0x24 800b5c2: 4621 mov r1, r4 800b5c4: 4658 mov r0, fp 800b5c6: f000 ffaf bl 800c528 <__mdiff> 800b5ca: 68c2 ldr r2, [r0, #12] 800b5cc: 4606 mov r6, r0 800b5ce: bb02 cbnz r2, 800b612 <_dtoa_r+0xa22> 800b5d0: 4601 mov r1, r0 800b5d2: 4648 mov r0, r9 800b5d4: f000 ff8c bl 800c4f0 <__mcmp> 800b5d8: 4602 mov r2, r0 800b5da: 4631 mov r1, r6 800b5dc: 4658 mov r0, fp 800b5de: 920c str r2, [sp, #48] @ 0x30 800b5e0: f000 fd4e bl 800c080 <_Bfree> 800b5e4: 9b20 ldr r3, [sp, #128] @ 0x80 800b5e6: 9a0c ldr r2, [sp, #48] @ 0x30 800b5e8: 9e07 ldr r6, [sp, #28] 800b5ea: ea43 0102 orr.w r1, r3, r2 800b5ee: 9b0a ldr r3, [sp, #40] @ 0x28 800b5f0: 4319 orrs r1, r3 800b5f2: d110 bne.n 800b616 <_dtoa_r+0xa26> 800b5f4: f1b8 0f39 cmp.w r8, #57 @ 0x39 800b5f8: d029 beq.n 800b64e <_dtoa_r+0xa5e> 800b5fa: 9b09 ldr r3, [sp, #36] @ 0x24 800b5fc: 2b00 cmp r3, #0 800b5fe: dd02 ble.n 800b606 <_dtoa_r+0xa16> 800b600: 9b08 ldr r3, [sp, #32] 800b602: f103 0831 add.w r8, r3, #49 @ 0x31 800b606: 9b02 ldr r3, [sp, #8] 800b608: f883 8000 strb.w r8, [r3] 800b60c: e63b b.n 800b286 <_dtoa_r+0x696> 800b60e: 4628 mov r0, r5 800b610: e7bb b.n 800b58a <_dtoa_r+0x99a> 800b612: 2201 movs r2, #1 800b614: e7e1 b.n 800b5da <_dtoa_r+0x9ea> 800b616: 9b09 ldr r3, [sp, #36] @ 0x24 800b618: 2b00 cmp r3, #0 800b61a: db04 blt.n 800b626 <_dtoa_r+0xa36> 800b61c: 9920 ldr r1, [sp, #128] @ 0x80 800b61e: 430b orrs r3, r1 800b620: 990a ldr r1, [sp, #40] @ 0x28 800b622: 430b orrs r3, r1 800b624: d120 bne.n 800b668 <_dtoa_r+0xa78> 800b626: 2a00 cmp r2, #0 800b628: dded ble.n 800b606 <_dtoa_r+0xa16> 800b62a: 4649 mov r1, r9 800b62c: 2201 movs r2, #1 800b62e: 4658 mov r0, fp 800b630: f000 fef2 bl 800c418 <__lshift> 800b634: 4621 mov r1, r4 800b636: 4681 mov r9, r0 800b638: f000 ff5a bl 800c4f0 <__mcmp> 800b63c: 2800 cmp r0, #0 800b63e: dc03 bgt.n 800b648 <_dtoa_r+0xa58> 800b640: d1e1 bne.n 800b606 <_dtoa_r+0xa16> 800b642: f018 0f01 tst.w r8, #1 800b646: d0de beq.n 800b606 <_dtoa_r+0xa16> 800b648: f1b8 0f39 cmp.w r8, #57 @ 0x39 800b64c: d1d8 bne.n 800b600 <_dtoa_r+0xa10> 800b64e: 2339 movs r3, #57 @ 0x39 800b650: 9a02 ldr r2, [sp, #8] 800b652: 7013 strb r3, [r2, #0] 800b654: 4633 mov r3, r6 800b656: 461e mov r6, r3 800b658: f816 2c01 ldrb.w r2, [r6, #-1] 800b65c: 3b01 subs r3, #1 800b65e: 2a39 cmp r2, #57 @ 0x39 800b660: d052 beq.n 800b708 <_dtoa_r+0xb18> 800b662: 3201 adds r2, #1 800b664: 701a strb r2, [r3, #0] 800b666: e60e b.n 800b286 <_dtoa_r+0x696> 800b668: 2a00 cmp r2, #0 800b66a: dd07 ble.n 800b67c <_dtoa_r+0xa8c> 800b66c: f1b8 0f39 cmp.w r8, #57 @ 0x39 800b670: d0ed beq.n 800b64e <_dtoa_r+0xa5e> 800b672: 9a02 ldr r2, [sp, #8] 800b674: f108 0301 add.w r3, r8, #1 800b678: 7013 strb r3, [r2, #0] 800b67a: e604 b.n 800b286 <_dtoa_r+0x696> 800b67c: 9b07 ldr r3, [sp, #28] 800b67e: 9a07 ldr r2, [sp, #28] 800b680: f803 8c01 strb.w r8, [r3, #-1] 800b684: 9b0b ldr r3, [sp, #44] @ 0x2c 800b686: 4293 cmp r3, r2 800b688: d028 beq.n 800b6dc <_dtoa_r+0xaec> 800b68a: 4649 mov r1, r9 800b68c: 2300 movs r3, #0 800b68e: 220a movs r2, #10 800b690: 4658 mov r0, fp 800b692: f000 fd17 bl 800c0c4 <__multadd> 800b696: 42af cmp r7, r5 800b698: 4681 mov r9, r0 800b69a: f04f 0300 mov.w r3, #0 800b69e: f04f 020a mov.w r2, #10 800b6a2: 4639 mov r1, r7 800b6a4: 4658 mov r0, fp 800b6a6: d107 bne.n 800b6b8 <_dtoa_r+0xac8> 800b6a8: f000 fd0c bl 800c0c4 <__multadd> 800b6ac: 4607 mov r7, r0 800b6ae: 4605 mov r5, r0 800b6b0: 9b07 ldr r3, [sp, #28] 800b6b2: 3301 adds r3, #1 800b6b4: 9307 str r3, [sp, #28] 800b6b6: e774 b.n 800b5a2 <_dtoa_r+0x9b2> 800b6b8: f000 fd04 bl 800c0c4 <__multadd> 800b6bc: 4629 mov r1, r5 800b6be: 4607 mov r7, r0 800b6c0: 2300 movs r3, #0 800b6c2: 220a movs r2, #10 800b6c4: 4658 mov r0, fp 800b6c6: f000 fcfd bl 800c0c4 <__multadd> 800b6ca: 4605 mov r5, r0 800b6cc: e7f0 b.n 800b6b0 <_dtoa_r+0xac0> 800b6ce: 9b08 ldr r3, [sp, #32] 800b6d0: 2700 movs r7, #0 800b6d2: 2b00 cmp r3, #0 800b6d4: bfcc ite gt 800b6d6: 461e movgt r6, r3 800b6d8: 2601 movle r6, #1 800b6da: 4456 add r6, sl 800b6dc: 4649 mov r1, r9 800b6de: 2201 movs r2, #1 800b6e0: 4658 mov r0, fp 800b6e2: f000 fe99 bl 800c418 <__lshift> 800b6e6: 4621 mov r1, r4 800b6e8: 4681 mov r9, r0 800b6ea: f000 ff01 bl 800c4f0 <__mcmp> 800b6ee: 2800 cmp r0, #0 800b6f0: dcb0 bgt.n 800b654 <_dtoa_r+0xa64> 800b6f2: d102 bne.n 800b6fa <_dtoa_r+0xb0a> 800b6f4: f018 0f01 tst.w r8, #1 800b6f8: d1ac bne.n 800b654 <_dtoa_r+0xa64> 800b6fa: 4633 mov r3, r6 800b6fc: 461e mov r6, r3 800b6fe: f813 2d01 ldrb.w r2, [r3, #-1]! 800b702: 2a30 cmp r2, #48 @ 0x30 800b704: d0fa beq.n 800b6fc <_dtoa_r+0xb0c> 800b706: e5be b.n 800b286 <_dtoa_r+0x696> 800b708: 459a cmp sl, r3 800b70a: d1a4 bne.n 800b656 <_dtoa_r+0xa66> 800b70c: 9b04 ldr r3, [sp, #16] 800b70e: 3301 adds r3, #1 800b710: 9304 str r3, [sp, #16] 800b712: 2331 movs r3, #49 @ 0x31 800b714: f88a 3000 strb.w r3, [sl] 800b718: e5b5 b.n 800b286 <_dtoa_r+0x696> 800b71a: 9b24 ldr r3, [sp, #144] @ 0x90 800b71c: f8df a05c ldr.w sl, [pc, #92] @ 800b77c <_dtoa_r+0xb8c> 800b720: b11b cbz r3, 800b72a <_dtoa_r+0xb3a> 800b722: f10a 0308 add.w r3, sl, #8 800b726: 9a24 ldr r2, [sp, #144] @ 0x90 800b728: 6013 str r3, [r2, #0] 800b72a: 4650 mov r0, sl 800b72c: b017 add sp, #92 @ 0x5c 800b72e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800b732: 9b20 ldr r3, [sp, #128] @ 0x80 800b734: 2b01 cmp r3, #1 800b736: f77f ae3d ble.w 800b3b4 <_dtoa_r+0x7c4> 800b73a: 9b0e ldr r3, [sp, #56] @ 0x38 800b73c: 930a str r3, [sp, #40] @ 0x28 800b73e: 2001 movs r0, #1 800b740: e65b b.n 800b3fa <_dtoa_r+0x80a> 800b742: 9b08 ldr r3, [sp, #32] 800b744: 2b00 cmp r3, #0 800b746: f77f aed6 ble.w 800b4f6 <_dtoa_r+0x906> 800b74a: 4656 mov r6, sl 800b74c: 4621 mov r1, r4 800b74e: 4648 mov r0, r9 800b750: f7ff f9c6 bl 800aae0 800b754: f100 0830 add.w r8, r0, #48 @ 0x30 800b758: 9b08 ldr r3, [sp, #32] 800b75a: f806 8b01 strb.w r8, [r6], #1 800b75e: eba6 020a sub.w r2, r6, sl 800b762: 4293 cmp r3, r2 800b764: ddb3 ble.n 800b6ce <_dtoa_r+0xade> 800b766: 4649 mov r1, r9 800b768: 2300 movs r3, #0 800b76a: 220a movs r2, #10 800b76c: 4658 mov r0, fp 800b76e: f000 fca9 bl 800c0c4 <__multadd> 800b772: 4681 mov r9, r0 800b774: e7ea b.n 800b74c <_dtoa_r+0xb5c> 800b776: bf00 nop 800b778: 0800e24f .word 0x0800e24f 800b77c: 0800e1ea .word 0x0800e1ea 0800b780 <_findenv_r>: 800b780: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800b784: f8df a06c ldr.w sl, [pc, #108] @ 800b7f4 <_findenv_r+0x74> 800b788: 4606 mov r6, r0 800b78a: 4689 mov r9, r1 800b78c: 4617 mov r7, r2 800b78e: f001 fa85 bl 800cc9c <__env_lock> 800b792: f8da 4000 ldr.w r4, [sl] 800b796: b134 cbz r4, 800b7a6 <_findenv_r+0x26> 800b798: 464b mov r3, r9 800b79a: 4698 mov r8, r3 800b79c: f813 2b01 ldrb.w r2, [r3], #1 800b7a0: b13a cbz r2, 800b7b2 <_findenv_r+0x32> 800b7a2: 2a3d cmp r2, #61 @ 0x3d 800b7a4: d1f9 bne.n 800b79a <_findenv_r+0x1a> 800b7a6: 4630 mov r0, r6 800b7a8: f001 fa7e bl 800cca8 <__env_unlock> 800b7ac: 2000 movs r0, #0 800b7ae: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 800b7b2: eba8 0809 sub.w r8, r8, r9 800b7b6: 46a3 mov fp, r4 800b7b8: f854 0b04 ldr.w r0, [r4], #4 800b7bc: 2800 cmp r0, #0 800b7be: d0f2 beq.n 800b7a6 <_findenv_r+0x26> 800b7c0: 4642 mov r2, r8 800b7c2: 4649 mov r1, r9 800b7c4: f7fe fc4a bl 800a05c 800b7c8: 2800 cmp r0, #0 800b7ca: d1f4 bne.n 800b7b6 <_findenv_r+0x36> 800b7cc: f854 3c04 ldr.w r3, [r4, #-4] 800b7d0: eb03 0508 add.w r5, r3, r8 800b7d4: f813 3008 ldrb.w r3, [r3, r8] 800b7d8: 2b3d cmp r3, #61 @ 0x3d 800b7da: d1ec bne.n 800b7b6 <_findenv_r+0x36> 800b7dc: f8da 3000 ldr.w r3, [sl] 800b7e0: 4630 mov r0, r6 800b7e2: ebab 0303 sub.w r3, fp, r3 800b7e6: 109b asrs r3, r3, #2 800b7e8: 603b str r3, [r7, #0] 800b7ea: f001 fa5d bl 800cca8 <__env_unlock> 800b7ee: 1c68 adds r0, r5, #1 800b7f0: e7dd b.n 800b7ae <_findenv_r+0x2e> 800b7f2: bf00 nop 800b7f4: 20000004 .word 0x20000004 0800b7f8 <_getenv_r>: 800b7f8: b507 push {r0, r1, r2, lr} 800b7fa: aa01 add r2, sp, #4 800b7fc: f7ff ffc0 bl 800b780 <_findenv_r> 800b800: b003 add sp, #12 800b802: f85d fb04 ldr.w pc, [sp], #4 0800b806 <__ssputs_r>: 800b806: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800b80a: 461f mov r7, r3 800b80c: 688e ldr r6, [r1, #8] 800b80e: 4682 mov sl, r0 800b810: 42be cmp r6, r7 800b812: 460c mov r4, r1 800b814: 4690 mov r8, r2 800b816: 680b ldr r3, [r1, #0] 800b818: d82d bhi.n 800b876 <__ssputs_r+0x70> 800b81a: f9b1 200c ldrsh.w r2, [r1, #12] 800b81e: f412 6f90 tst.w r2, #1152 @ 0x480 800b822: d026 beq.n 800b872 <__ssputs_r+0x6c> 800b824: 6965 ldr r5, [r4, #20] 800b826: 6909 ldr r1, [r1, #16] 800b828: eb05 0545 add.w r5, r5, r5, lsl #1 800b82c: eba3 0901 sub.w r9, r3, r1 800b830: eb05 75d5 add.w r5, r5, r5, lsr #31 800b834: 1c7b adds r3, r7, #1 800b836: 444b add r3, r9 800b838: 106d asrs r5, r5, #1 800b83a: 429d cmp r5, r3 800b83c: bf38 it cc 800b83e: 461d movcc r5, r3 800b840: 0553 lsls r3, r2, #21 800b842: d527 bpl.n 800b894 <__ssputs_r+0x8e> 800b844: 4629 mov r1, r5 800b846: f000 faa7 bl 800bd98 <_malloc_r> 800b84a: 4606 mov r6, r0 800b84c: b360 cbz r0, 800b8a8 <__ssputs_r+0xa2> 800b84e: 464a mov r2, r9 800b850: 6921 ldr r1, [r4, #16] 800b852: f7ff f910 bl 800aa76 800b856: 89a3 ldrh r3, [r4, #12] 800b858: f423 6390 bic.w r3, r3, #1152 @ 0x480 800b85c: f043 0380 orr.w r3, r3, #128 @ 0x80 800b860: 81a3 strh r3, [r4, #12] 800b862: 6126 str r6, [r4, #16] 800b864: 444e add r6, r9 800b866: 6026 str r6, [r4, #0] 800b868: 463e mov r6, r7 800b86a: 6165 str r5, [r4, #20] 800b86c: eba5 0509 sub.w r5, r5, r9 800b870: 60a5 str r5, [r4, #8] 800b872: 42be cmp r6, r7 800b874: d900 bls.n 800b878 <__ssputs_r+0x72> 800b876: 463e mov r6, r7 800b878: 4632 mov r2, r6 800b87a: 4641 mov r1, r8 800b87c: 6820 ldr r0, [r4, #0] 800b87e: f001 f95e bl 800cb3e 800b882: 2000 movs r0, #0 800b884: 68a3 ldr r3, [r4, #8] 800b886: 1b9b subs r3, r3, r6 800b888: 60a3 str r3, [r4, #8] 800b88a: 6823 ldr r3, [r4, #0] 800b88c: 4433 add r3, r6 800b88e: 6023 str r3, [r4, #0] 800b890: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b894: 462a mov r2, r5 800b896: f000 ffb5 bl 800c804 <_realloc_r> 800b89a: 4606 mov r6, r0 800b89c: 2800 cmp r0, #0 800b89e: d1e0 bne.n 800b862 <__ssputs_r+0x5c> 800b8a0: 4650 mov r0, sl 800b8a2: 6921 ldr r1, [r4, #16] 800b8a4: f001 fa06 bl 800ccb4 <_free_r> 800b8a8: 230c movs r3, #12 800b8aa: f8ca 3000 str.w r3, [sl] 800b8ae: 89a3 ldrh r3, [r4, #12] 800b8b0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800b8b4: f043 0340 orr.w r3, r3, #64 @ 0x40 800b8b8: 81a3 strh r3, [r4, #12] 800b8ba: e7e9 b.n 800b890 <__ssputs_r+0x8a> 0800b8bc <_svfiprintf_r>: 800b8bc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800b8c0: 4698 mov r8, r3 800b8c2: 898b ldrh r3, [r1, #12] 800b8c4: 4607 mov r7, r0 800b8c6: 061b lsls r3, r3, #24 800b8c8: 460d mov r5, r1 800b8ca: 4614 mov r4, r2 800b8cc: b09d sub sp, #116 @ 0x74 800b8ce: d510 bpl.n 800b8f2 <_svfiprintf_r+0x36> 800b8d0: 690b ldr r3, [r1, #16] 800b8d2: b973 cbnz r3, 800b8f2 <_svfiprintf_r+0x36> 800b8d4: 2140 movs r1, #64 @ 0x40 800b8d6: f000 fa5f bl 800bd98 <_malloc_r> 800b8da: 6028 str r0, [r5, #0] 800b8dc: 6128 str r0, [r5, #16] 800b8de: b930 cbnz r0, 800b8ee <_svfiprintf_r+0x32> 800b8e0: 230c movs r3, #12 800b8e2: 603b str r3, [r7, #0] 800b8e4: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800b8e8: b01d add sp, #116 @ 0x74 800b8ea: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800b8ee: 2340 movs r3, #64 @ 0x40 800b8f0: 616b str r3, [r5, #20] 800b8f2: 2300 movs r3, #0 800b8f4: 9309 str r3, [sp, #36] @ 0x24 800b8f6: 2320 movs r3, #32 800b8f8: f88d 3029 strb.w r3, [sp, #41] @ 0x29 800b8fc: 2330 movs r3, #48 @ 0x30 800b8fe: f04f 0901 mov.w r9, #1 800b902: f8cd 800c str.w r8, [sp, #12] 800b906: f8df 8198 ldr.w r8, [pc, #408] @ 800baa0 <_svfiprintf_r+0x1e4> 800b90a: f88d 302a strb.w r3, [sp, #42] @ 0x2a 800b90e: 4623 mov r3, r4 800b910: 469a mov sl, r3 800b912: f813 2b01 ldrb.w r2, [r3], #1 800b916: b10a cbz r2, 800b91c <_svfiprintf_r+0x60> 800b918: 2a25 cmp r2, #37 @ 0x25 800b91a: d1f9 bne.n 800b910 <_svfiprintf_r+0x54> 800b91c: ebba 0b04 subs.w fp, sl, r4 800b920: d00b beq.n 800b93a <_svfiprintf_r+0x7e> 800b922: 465b mov r3, fp 800b924: 4622 mov r2, r4 800b926: 4629 mov r1, r5 800b928: 4638 mov r0, r7 800b92a: f7ff ff6c bl 800b806 <__ssputs_r> 800b92e: 3001 adds r0, #1 800b930: f000 80a7 beq.w 800ba82 <_svfiprintf_r+0x1c6> 800b934: 9a09 ldr r2, [sp, #36] @ 0x24 800b936: 445a add r2, fp 800b938: 9209 str r2, [sp, #36] @ 0x24 800b93a: f89a 3000 ldrb.w r3, [sl] 800b93e: 2b00 cmp r3, #0 800b940: f000 809f beq.w 800ba82 <_svfiprintf_r+0x1c6> 800b944: 2300 movs r3, #0 800b946: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800b94a: e9cd 2305 strd r2, r3, [sp, #20] 800b94e: f10a 0a01 add.w sl, sl, #1 800b952: 9304 str r3, [sp, #16] 800b954: 9307 str r3, [sp, #28] 800b956: f88d 3053 strb.w r3, [sp, #83] @ 0x53 800b95a: 931a str r3, [sp, #104] @ 0x68 800b95c: 4654 mov r4, sl 800b95e: 2205 movs r2, #5 800b960: f814 1b01 ldrb.w r1, [r4], #1 800b964: 484e ldr r0, [pc, #312] @ (800baa0 <_svfiprintf_r+0x1e4>) 800b966: f7ff f878 bl 800aa5a 800b96a: 9a04 ldr r2, [sp, #16] 800b96c: b9d8 cbnz r0, 800b9a6 <_svfiprintf_r+0xea> 800b96e: 06d0 lsls r0, r2, #27 800b970: bf44 itt mi 800b972: 2320 movmi r3, #32 800b974: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800b978: 0711 lsls r1, r2, #28 800b97a: bf44 itt mi 800b97c: 232b movmi r3, #43 @ 0x2b 800b97e: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800b982: f89a 3000 ldrb.w r3, [sl] 800b986: 2b2a cmp r3, #42 @ 0x2a 800b988: d015 beq.n 800b9b6 <_svfiprintf_r+0xfa> 800b98a: 4654 mov r4, sl 800b98c: 2000 movs r0, #0 800b98e: f04f 0c0a mov.w ip, #10 800b992: 9a07 ldr r2, [sp, #28] 800b994: 4621 mov r1, r4 800b996: f811 3b01 ldrb.w r3, [r1], #1 800b99a: 3b30 subs r3, #48 @ 0x30 800b99c: 2b09 cmp r3, #9 800b99e: d94b bls.n 800ba38 <_svfiprintf_r+0x17c> 800b9a0: b1b0 cbz r0, 800b9d0 <_svfiprintf_r+0x114> 800b9a2: 9207 str r2, [sp, #28] 800b9a4: e014 b.n 800b9d0 <_svfiprintf_r+0x114> 800b9a6: eba0 0308 sub.w r3, r0, r8 800b9aa: fa09 f303 lsl.w r3, r9, r3 800b9ae: 4313 orrs r3, r2 800b9b0: 46a2 mov sl, r4 800b9b2: 9304 str r3, [sp, #16] 800b9b4: e7d2 b.n 800b95c <_svfiprintf_r+0xa0> 800b9b6: 9b03 ldr r3, [sp, #12] 800b9b8: 1d19 adds r1, r3, #4 800b9ba: 681b ldr r3, [r3, #0] 800b9bc: 9103 str r1, [sp, #12] 800b9be: 2b00 cmp r3, #0 800b9c0: bfbb ittet lt 800b9c2: 425b neglt r3, r3 800b9c4: f042 0202 orrlt.w r2, r2, #2 800b9c8: 9307 strge r3, [sp, #28] 800b9ca: 9307 strlt r3, [sp, #28] 800b9cc: bfb8 it lt 800b9ce: 9204 strlt r2, [sp, #16] 800b9d0: 7823 ldrb r3, [r4, #0] 800b9d2: 2b2e cmp r3, #46 @ 0x2e 800b9d4: d10a bne.n 800b9ec <_svfiprintf_r+0x130> 800b9d6: 7863 ldrb r3, [r4, #1] 800b9d8: 2b2a cmp r3, #42 @ 0x2a 800b9da: d132 bne.n 800ba42 <_svfiprintf_r+0x186> 800b9dc: 9b03 ldr r3, [sp, #12] 800b9de: 3402 adds r4, #2 800b9e0: 1d1a adds r2, r3, #4 800b9e2: 681b ldr r3, [r3, #0] 800b9e4: 9203 str r2, [sp, #12] 800b9e6: ea43 73e3 orr.w r3, r3, r3, asr #31 800b9ea: 9305 str r3, [sp, #20] 800b9ec: f8df a0b4 ldr.w sl, [pc, #180] @ 800baa4 <_svfiprintf_r+0x1e8> 800b9f0: 2203 movs r2, #3 800b9f2: 4650 mov r0, sl 800b9f4: 7821 ldrb r1, [r4, #0] 800b9f6: f7ff f830 bl 800aa5a 800b9fa: b138 cbz r0, 800ba0c <_svfiprintf_r+0x150> 800b9fc: 2240 movs r2, #64 @ 0x40 800b9fe: 9b04 ldr r3, [sp, #16] 800ba00: eba0 000a sub.w r0, r0, sl 800ba04: 4082 lsls r2, r0 800ba06: 4313 orrs r3, r2 800ba08: 3401 adds r4, #1 800ba0a: 9304 str r3, [sp, #16] 800ba0c: f814 1b01 ldrb.w r1, [r4], #1 800ba10: 2206 movs r2, #6 800ba12: 4825 ldr r0, [pc, #148] @ (800baa8 <_svfiprintf_r+0x1ec>) 800ba14: f88d 1028 strb.w r1, [sp, #40] @ 0x28 800ba18: f7ff f81f bl 800aa5a 800ba1c: 2800 cmp r0, #0 800ba1e: d036 beq.n 800ba8e <_svfiprintf_r+0x1d2> 800ba20: 4b22 ldr r3, [pc, #136] @ (800baac <_svfiprintf_r+0x1f0>) 800ba22: bb1b cbnz r3, 800ba6c <_svfiprintf_r+0x1b0> 800ba24: 9b03 ldr r3, [sp, #12] 800ba26: 3307 adds r3, #7 800ba28: f023 0307 bic.w r3, r3, #7 800ba2c: 3308 adds r3, #8 800ba2e: 9303 str r3, [sp, #12] 800ba30: 9b09 ldr r3, [sp, #36] @ 0x24 800ba32: 4433 add r3, r6 800ba34: 9309 str r3, [sp, #36] @ 0x24 800ba36: e76a b.n 800b90e <_svfiprintf_r+0x52> 800ba38: 460c mov r4, r1 800ba3a: 2001 movs r0, #1 800ba3c: fb0c 3202 mla r2, ip, r2, r3 800ba40: e7a8 b.n 800b994 <_svfiprintf_r+0xd8> 800ba42: 2300 movs r3, #0 800ba44: f04f 0c0a mov.w ip, #10 800ba48: 4619 mov r1, r3 800ba4a: 3401 adds r4, #1 800ba4c: 9305 str r3, [sp, #20] 800ba4e: 4620 mov r0, r4 800ba50: f810 2b01 ldrb.w r2, [r0], #1 800ba54: 3a30 subs r2, #48 @ 0x30 800ba56: 2a09 cmp r2, #9 800ba58: d903 bls.n 800ba62 <_svfiprintf_r+0x1a6> 800ba5a: 2b00 cmp r3, #0 800ba5c: d0c6 beq.n 800b9ec <_svfiprintf_r+0x130> 800ba5e: 9105 str r1, [sp, #20] 800ba60: e7c4 b.n 800b9ec <_svfiprintf_r+0x130> 800ba62: 4604 mov r4, r0 800ba64: 2301 movs r3, #1 800ba66: fb0c 2101 mla r1, ip, r1, r2 800ba6a: e7f0 b.n 800ba4e <_svfiprintf_r+0x192> 800ba6c: ab03 add r3, sp, #12 800ba6e: 9300 str r3, [sp, #0] 800ba70: 462a mov r2, r5 800ba72: 4638 mov r0, r7 800ba74: 4b0e ldr r3, [pc, #56] @ (800bab0 <_svfiprintf_r+0x1f4>) 800ba76: a904 add r1, sp, #16 800ba78: f7fd fd92 bl 80095a0 <_printf_float> 800ba7c: 1c42 adds r2, r0, #1 800ba7e: 4606 mov r6, r0 800ba80: d1d6 bne.n 800ba30 <_svfiprintf_r+0x174> 800ba82: 89ab ldrh r3, [r5, #12] 800ba84: 065b lsls r3, r3, #25 800ba86: f53f af2d bmi.w 800b8e4 <_svfiprintf_r+0x28> 800ba8a: 9809 ldr r0, [sp, #36] @ 0x24 800ba8c: e72c b.n 800b8e8 <_svfiprintf_r+0x2c> 800ba8e: ab03 add r3, sp, #12 800ba90: 9300 str r3, [sp, #0] 800ba92: 462a mov r2, r5 800ba94: 4638 mov r0, r7 800ba96: 4b06 ldr r3, [pc, #24] @ (800bab0 <_svfiprintf_r+0x1f4>) 800ba98: a904 add r1, sp, #16 800ba9a: f7fe f81f bl 8009adc <_printf_i> 800ba9e: e7ed b.n 800ba7c <_svfiprintf_r+0x1c0> 800baa0: 0800e260 .word 0x0800e260 800baa4: 0800e266 .word 0x0800e266 800baa8: 0800e26a .word 0x0800e26a 800baac: 080095a1 .word 0x080095a1 800bab0: 0800b807 .word 0x0800b807 0800bab4 <__sfputc_r>: 800bab4: 6893 ldr r3, [r2, #8] 800bab6: b410 push {r4} 800bab8: 3b01 subs r3, #1 800baba: 2b00 cmp r3, #0 800babc: 6093 str r3, [r2, #8] 800babe: da07 bge.n 800bad0 <__sfputc_r+0x1c> 800bac0: 6994 ldr r4, [r2, #24] 800bac2: 42a3 cmp r3, r4 800bac4: db01 blt.n 800baca <__sfputc_r+0x16> 800bac6: 290a cmp r1, #10 800bac8: d102 bne.n 800bad0 <__sfputc_r+0x1c> 800baca: bc10 pop {r4} 800bacc: f000 bf42 b.w 800c954 <__swbuf_r> 800bad0: 6813 ldr r3, [r2, #0] 800bad2: 1c58 adds r0, r3, #1 800bad4: 6010 str r0, [r2, #0] 800bad6: 7019 strb r1, [r3, #0] 800bad8: 4608 mov r0, r1 800bada: bc10 pop {r4} 800badc: 4770 bx lr 0800bade <__sfputs_r>: 800bade: b5f8 push {r3, r4, r5, r6, r7, lr} 800bae0: 4606 mov r6, r0 800bae2: 460f mov r7, r1 800bae4: 4614 mov r4, r2 800bae6: 18d5 adds r5, r2, r3 800bae8: 42ac cmp r4, r5 800baea: d101 bne.n 800baf0 <__sfputs_r+0x12> 800baec: 2000 movs r0, #0 800baee: e007 b.n 800bb00 <__sfputs_r+0x22> 800baf0: 463a mov r2, r7 800baf2: 4630 mov r0, r6 800baf4: f814 1b01 ldrb.w r1, [r4], #1 800baf8: f7ff ffdc bl 800bab4 <__sfputc_r> 800bafc: 1c43 adds r3, r0, #1 800bafe: d1f3 bne.n 800bae8 <__sfputs_r+0xa> 800bb00: bdf8 pop {r3, r4, r5, r6, r7, pc} ... 0800bb04 <_vfiprintf_r>: 800bb04: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800bb08: 460d mov r5, r1 800bb0a: 4614 mov r4, r2 800bb0c: 4698 mov r8, r3 800bb0e: 4606 mov r6, r0 800bb10: b09d sub sp, #116 @ 0x74 800bb12: b118 cbz r0, 800bb1c <_vfiprintf_r+0x18> 800bb14: 6a03 ldr r3, [r0, #32] 800bb16: b90b cbnz r3, 800bb1c <_vfiprintf_r+0x18> 800bb18: f7fe f9c0 bl 8009e9c <__sinit> 800bb1c: 6e6b ldr r3, [r5, #100] @ 0x64 800bb1e: 07d9 lsls r1, r3, #31 800bb20: d405 bmi.n 800bb2e <_vfiprintf_r+0x2a> 800bb22: 89ab ldrh r3, [r5, #12] 800bb24: 059a lsls r2, r3, #22 800bb26: d402 bmi.n 800bb2e <_vfiprintf_r+0x2a> 800bb28: 6da8 ldr r0, [r5, #88] @ 0x58 800bb2a: f7fe ff93 bl 800aa54 <__retarget_lock_acquire_recursive> 800bb2e: 89ab ldrh r3, [r5, #12] 800bb30: 071b lsls r3, r3, #28 800bb32: d501 bpl.n 800bb38 <_vfiprintf_r+0x34> 800bb34: 692b ldr r3, [r5, #16] 800bb36: b99b cbnz r3, 800bb60 <_vfiprintf_r+0x5c> 800bb38: 4629 mov r1, r5 800bb3a: 4630 mov r0, r6 800bb3c: f000 ff48 bl 800c9d0 <__swsetup_r> 800bb40: b170 cbz r0, 800bb60 <_vfiprintf_r+0x5c> 800bb42: 6e6b ldr r3, [r5, #100] @ 0x64 800bb44: 07dc lsls r4, r3, #31 800bb46: d504 bpl.n 800bb52 <_vfiprintf_r+0x4e> 800bb48: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800bb4c: b01d add sp, #116 @ 0x74 800bb4e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800bb52: 89ab ldrh r3, [r5, #12] 800bb54: 0598 lsls r0, r3, #22 800bb56: d4f7 bmi.n 800bb48 <_vfiprintf_r+0x44> 800bb58: 6da8 ldr r0, [r5, #88] @ 0x58 800bb5a: f7fe ff7d bl 800aa58 <__retarget_lock_release_recursive> 800bb5e: e7f3 b.n 800bb48 <_vfiprintf_r+0x44> 800bb60: 2300 movs r3, #0 800bb62: 9309 str r3, [sp, #36] @ 0x24 800bb64: 2320 movs r3, #32 800bb66: f88d 3029 strb.w r3, [sp, #41] @ 0x29 800bb6a: 2330 movs r3, #48 @ 0x30 800bb6c: f04f 0901 mov.w r9, #1 800bb70: f8cd 800c str.w r8, [sp, #12] 800bb74: f8df 81a8 ldr.w r8, [pc, #424] @ 800bd20 <_vfiprintf_r+0x21c> 800bb78: f88d 302a strb.w r3, [sp, #42] @ 0x2a 800bb7c: 4623 mov r3, r4 800bb7e: 469a mov sl, r3 800bb80: f813 2b01 ldrb.w r2, [r3], #1 800bb84: b10a cbz r2, 800bb8a <_vfiprintf_r+0x86> 800bb86: 2a25 cmp r2, #37 @ 0x25 800bb88: d1f9 bne.n 800bb7e <_vfiprintf_r+0x7a> 800bb8a: ebba 0b04 subs.w fp, sl, r4 800bb8e: d00b beq.n 800bba8 <_vfiprintf_r+0xa4> 800bb90: 465b mov r3, fp 800bb92: 4622 mov r2, r4 800bb94: 4629 mov r1, r5 800bb96: 4630 mov r0, r6 800bb98: f7ff ffa1 bl 800bade <__sfputs_r> 800bb9c: 3001 adds r0, #1 800bb9e: f000 80a7 beq.w 800bcf0 <_vfiprintf_r+0x1ec> 800bba2: 9a09 ldr r2, [sp, #36] @ 0x24 800bba4: 445a add r2, fp 800bba6: 9209 str r2, [sp, #36] @ 0x24 800bba8: f89a 3000 ldrb.w r3, [sl] 800bbac: 2b00 cmp r3, #0 800bbae: f000 809f beq.w 800bcf0 <_vfiprintf_r+0x1ec> 800bbb2: 2300 movs r3, #0 800bbb4: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800bbb8: e9cd 2305 strd r2, r3, [sp, #20] 800bbbc: f10a 0a01 add.w sl, sl, #1 800bbc0: 9304 str r3, [sp, #16] 800bbc2: 9307 str r3, [sp, #28] 800bbc4: f88d 3053 strb.w r3, [sp, #83] @ 0x53 800bbc8: 931a str r3, [sp, #104] @ 0x68 800bbca: 4654 mov r4, sl 800bbcc: 2205 movs r2, #5 800bbce: f814 1b01 ldrb.w r1, [r4], #1 800bbd2: 4853 ldr r0, [pc, #332] @ (800bd20 <_vfiprintf_r+0x21c>) 800bbd4: f7fe ff41 bl 800aa5a 800bbd8: 9a04 ldr r2, [sp, #16] 800bbda: b9d8 cbnz r0, 800bc14 <_vfiprintf_r+0x110> 800bbdc: 06d1 lsls r1, r2, #27 800bbde: bf44 itt mi 800bbe0: 2320 movmi r3, #32 800bbe2: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800bbe6: 0713 lsls r3, r2, #28 800bbe8: bf44 itt mi 800bbea: 232b movmi r3, #43 @ 0x2b 800bbec: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800bbf0: f89a 3000 ldrb.w r3, [sl] 800bbf4: 2b2a cmp r3, #42 @ 0x2a 800bbf6: d015 beq.n 800bc24 <_vfiprintf_r+0x120> 800bbf8: 4654 mov r4, sl 800bbfa: 2000 movs r0, #0 800bbfc: f04f 0c0a mov.w ip, #10 800bc00: 9a07 ldr r2, [sp, #28] 800bc02: 4621 mov r1, r4 800bc04: f811 3b01 ldrb.w r3, [r1], #1 800bc08: 3b30 subs r3, #48 @ 0x30 800bc0a: 2b09 cmp r3, #9 800bc0c: d94b bls.n 800bca6 <_vfiprintf_r+0x1a2> 800bc0e: b1b0 cbz r0, 800bc3e <_vfiprintf_r+0x13a> 800bc10: 9207 str r2, [sp, #28] 800bc12: e014 b.n 800bc3e <_vfiprintf_r+0x13a> 800bc14: eba0 0308 sub.w r3, r0, r8 800bc18: fa09 f303 lsl.w r3, r9, r3 800bc1c: 4313 orrs r3, r2 800bc1e: 46a2 mov sl, r4 800bc20: 9304 str r3, [sp, #16] 800bc22: e7d2 b.n 800bbca <_vfiprintf_r+0xc6> 800bc24: 9b03 ldr r3, [sp, #12] 800bc26: 1d19 adds r1, r3, #4 800bc28: 681b ldr r3, [r3, #0] 800bc2a: 9103 str r1, [sp, #12] 800bc2c: 2b00 cmp r3, #0 800bc2e: bfbb ittet lt 800bc30: 425b neglt r3, r3 800bc32: f042 0202 orrlt.w r2, r2, #2 800bc36: 9307 strge r3, [sp, #28] 800bc38: 9307 strlt r3, [sp, #28] 800bc3a: bfb8 it lt 800bc3c: 9204 strlt r2, [sp, #16] 800bc3e: 7823 ldrb r3, [r4, #0] 800bc40: 2b2e cmp r3, #46 @ 0x2e 800bc42: d10a bne.n 800bc5a <_vfiprintf_r+0x156> 800bc44: 7863 ldrb r3, [r4, #1] 800bc46: 2b2a cmp r3, #42 @ 0x2a 800bc48: d132 bne.n 800bcb0 <_vfiprintf_r+0x1ac> 800bc4a: 9b03 ldr r3, [sp, #12] 800bc4c: 3402 adds r4, #2 800bc4e: 1d1a adds r2, r3, #4 800bc50: 681b ldr r3, [r3, #0] 800bc52: 9203 str r2, [sp, #12] 800bc54: ea43 73e3 orr.w r3, r3, r3, asr #31 800bc58: 9305 str r3, [sp, #20] 800bc5a: f8df a0c8 ldr.w sl, [pc, #200] @ 800bd24 <_vfiprintf_r+0x220> 800bc5e: 2203 movs r2, #3 800bc60: 4650 mov r0, sl 800bc62: 7821 ldrb r1, [r4, #0] 800bc64: f7fe fef9 bl 800aa5a 800bc68: b138 cbz r0, 800bc7a <_vfiprintf_r+0x176> 800bc6a: 2240 movs r2, #64 @ 0x40 800bc6c: 9b04 ldr r3, [sp, #16] 800bc6e: eba0 000a sub.w r0, r0, sl 800bc72: 4082 lsls r2, r0 800bc74: 4313 orrs r3, r2 800bc76: 3401 adds r4, #1 800bc78: 9304 str r3, [sp, #16] 800bc7a: f814 1b01 ldrb.w r1, [r4], #1 800bc7e: 2206 movs r2, #6 800bc80: 4829 ldr r0, [pc, #164] @ (800bd28 <_vfiprintf_r+0x224>) 800bc82: f88d 1028 strb.w r1, [sp, #40] @ 0x28 800bc86: f7fe fee8 bl 800aa5a 800bc8a: 2800 cmp r0, #0 800bc8c: d03f beq.n 800bd0e <_vfiprintf_r+0x20a> 800bc8e: 4b27 ldr r3, [pc, #156] @ (800bd2c <_vfiprintf_r+0x228>) 800bc90: bb1b cbnz r3, 800bcda <_vfiprintf_r+0x1d6> 800bc92: 9b03 ldr r3, [sp, #12] 800bc94: 3307 adds r3, #7 800bc96: f023 0307 bic.w r3, r3, #7 800bc9a: 3308 adds r3, #8 800bc9c: 9303 str r3, [sp, #12] 800bc9e: 9b09 ldr r3, [sp, #36] @ 0x24 800bca0: 443b add r3, r7 800bca2: 9309 str r3, [sp, #36] @ 0x24 800bca4: e76a b.n 800bb7c <_vfiprintf_r+0x78> 800bca6: 460c mov r4, r1 800bca8: 2001 movs r0, #1 800bcaa: fb0c 3202 mla r2, ip, r2, r3 800bcae: e7a8 b.n 800bc02 <_vfiprintf_r+0xfe> 800bcb0: 2300 movs r3, #0 800bcb2: f04f 0c0a mov.w ip, #10 800bcb6: 4619 mov r1, r3 800bcb8: 3401 adds r4, #1 800bcba: 9305 str r3, [sp, #20] 800bcbc: 4620 mov r0, r4 800bcbe: f810 2b01 ldrb.w r2, [r0], #1 800bcc2: 3a30 subs r2, #48 @ 0x30 800bcc4: 2a09 cmp r2, #9 800bcc6: d903 bls.n 800bcd0 <_vfiprintf_r+0x1cc> 800bcc8: 2b00 cmp r3, #0 800bcca: d0c6 beq.n 800bc5a <_vfiprintf_r+0x156> 800bccc: 9105 str r1, [sp, #20] 800bcce: e7c4 b.n 800bc5a <_vfiprintf_r+0x156> 800bcd0: 4604 mov r4, r0 800bcd2: 2301 movs r3, #1 800bcd4: fb0c 2101 mla r1, ip, r1, r2 800bcd8: e7f0 b.n 800bcbc <_vfiprintf_r+0x1b8> 800bcda: ab03 add r3, sp, #12 800bcdc: 9300 str r3, [sp, #0] 800bcde: 462a mov r2, r5 800bce0: 4630 mov r0, r6 800bce2: 4b13 ldr r3, [pc, #76] @ (800bd30 <_vfiprintf_r+0x22c>) 800bce4: a904 add r1, sp, #16 800bce6: f7fd fc5b bl 80095a0 <_printf_float> 800bcea: 4607 mov r7, r0 800bcec: 1c78 adds r0, r7, #1 800bcee: d1d6 bne.n 800bc9e <_vfiprintf_r+0x19a> 800bcf0: 6e6b ldr r3, [r5, #100] @ 0x64 800bcf2: 07d9 lsls r1, r3, #31 800bcf4: d405 bmi.n 800bd02 <_vfiprintf_r+0x1fe> 800bcf6: 89ab ldrh r3, [r5, #12] 800bcf8: 059a lsls r2, r3, #22 800bcfa: d402 bmi.n 800bd02 <_vfiprintf_r+0x1fe> 800bcfc: 6da8 ldr r0, [r5, #88] @ 0x58 800bcfe: f7fe feab bl 800aa58 <__retarget_lock_release_recursive> 800bd02: 89ab ldrh r3, [r5, #12] 800bd04: 065b lsls r3, r3, #25 800bd06: f53f af1f bmi.w 800bb48 <_vfiprintf_r+0x44> 800bd0a: 9809 ldr r0, [sp, #36] @ 0x24 800bd0c: e71e b.n 800bb4c <_vfiprintf_r+0x48> 800bd0e: ab03 add r3, sp, #12 800bd10: 9300 str r3, [sp, #0] 800bd12: 462a mov r2, r5 800bd14: 4630 mov r0, r6 800bd16: 4b06 ldr r3, [pc, #24] @ (800bd30 <_vfiprintf_r+0x22c>) 800bd18: a904 add r1, sp, #16 800bd1a: f7fd fedf bl 8009adc <_printf_i> 800bd1e: e7e4 b.n 800bcea <_vfiprintf_r+0x1e6> 800bd20: 0800e260 .word 0x0800e260 800bd24: 0800e266 .word 0x0800e266 800bd28: 0800e26a .word 0x0800e26a 800bd2c: 080095a1 .word 0x080095a1 800bd30: 0800badf .word 0x0800badf 0800bd34 : 800bd34: 4b02 ldr r3, [pc, #8] @ (800bd40 ) 800bd36: 4601 mov r1, r0 800bd38: 6818 ldr r0, [r3, #0] 800bd3a: f000 b82d b.w 800bd98 <_malloc_r> 800bd3e: bf00 nop 800bd40: 20000028 .word 0x20000028 0800bd44 : 800bd44: 4b02 ldr r3, [pc, #8] @ (800bd50 ) 800bd46: 4601 mov r1, r0 800bd48: 6818 ldr r0, [r3, #0] 800bd4a: f000 bfb3 b.w 800ccb4 <_free_r> 800bd4e: bf00 nop 800bd50: 20000028 .word 0x20000028 0800bd54 : 800bd54: b570 push {r4, r5, r6, lr} 800bd56: 4e0f ldr r6, [pc, #60] @ (800bd94 ) 800bd58: 460c mov r4, r1 800bd5a: 6831 ldr r1, [r6, #0] 800bd5c: 4605 mov r5, r0 800bd5e: b911 cbnz r1, 800bd66 800bd60: f000 ff5e bl 800cc20 <_sbrk_r> 800bd64: 6030 str r0, [r6, #0] 800bd66: 4621 mov r1, r4 800bd68: 4628 mov r0, r5 800bd6a: f000 ff59 bl 800cc20 <_sbrk_r> 800bd6e: 1c43 adds r3, r0, #1 800bd70: d103 bne.n 800bd7a 800bd72: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff 800bd76: 4620 mov r0, r4 800bd78: bd70 pop {r4, r5, r6, pc} 800bd7a: 1cc4 adds r4, r0, #3 800bd7c: f024 0403 bic.w r4, r4, #3 800bd80: 42a0 cmp r0, r4 800bd82: d0f8 beq.n 800bd76 800bd84: 1a21 subs r1, r4, r0 800bd86: 4628 mov r0, r5 800bd88: f000 ff4a bl 800cc20 <_sbrk_r> 800bd8c: 3001 adds r0, #1 800bd8e: d1f2 bne.n 800bd76 800bd90: e7ef b.n 800bd72 800bd92: bf00 nop 800bd94: 20003500 .word 0x20003500 0800bd98 <_malloc_r>: 800bd98: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800bd9c: 1ccd adds r5, r1, #3 800bd9e: f025 0503 bic.w r5, r5, #3 800bda2: 3508 adds r5, #8 800bda4: 2d0c cmp r5, #12 800bda6: bf38 it cc 800bda8: 250c movcc r5, #12 800bdaa: 2d00 cmp r5, #0 800bdac: 4606 mov r6, r0 800bdae: db01 blt.n 800bdb4 <_malloc_r+0x1c> 800bdb0: 42a9 cmp r1, r5 800bdb2: d904 bls.n 800bdbe <_malloc_r+0x26> 800bdb4: 230c movs r3, #12 800bdb6: 6033 str r3, [r6, #0] 800bdb8: 2000 movs r0, #0 800bdba: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800bdbe: f8df 80d4 ldr.w r8, [pc, #212] @ 800be94 <_malloc_r+0xfc> 800bdc2: f000 f911 bl 800bfe8 <__malloc_lock> 800bdc6: f8d8 3000 ldr.w r3, [r8] 800bdca: 461c mov r4, r3 800bdcc: bb44 cbnz r4, 800be20 <_malloc_r+0x88> 800bdce: 4629 mov r1, r5 800bdd0: 4630 mov r0, r6 800bdd2: f7ff ffbf bl 800bd54 800bdd6: 1c43 adds r3, r0, #1 800bdd8: 4604 mov r4, r0 800bdda: d158 bne.n 800be8e <_malloc_r+0xf6> 800bddc: f8d8 4000 ldr.w r4, [r8] 800bde0: 4627 mov r7, r4 800bde2: 2f00 cmp r7, #0 800bde4: d143 bne.n 800be6e <_malloc_r+0xd6> 800bde6: 2c00 cmp r4, #0 800bde8: d04b beq.n 800be82 <_malloc_r+0xea> 800bdea: 6823 ldr r3, [r4, #0] 800bdec: 4639 mov r1, r7 800bdee: 4630 mov r0, r6 800bdf0: eb04 0903 add.w r9, r4, r3 800bdf4: f000 ff14 bl 800cc20 <_sbrk_r> 800bdf8: 4581 cmp r9, r0 800bdfa: d142 bne.n 800be82 <_malloc_r+0xea> 800bdfc: 6821 ldr r1, [r4, #0] 800bdfe: 4630 mov r0, r6 800be00: 1a6d subs r5, r5, r1 800be02: 4629 mov r1, r5 800be04: f7ff ffa6 bl 800bd54 800be08: 3001 adds r0, #1 800be0a: d03a beq.n 800be82 <_malloc_r+0xea> 800be0c: 6823 ldr r3, [r4, #0] 800be0e: 442b add r3, r5 800be10: 6023 str r3, [r4, #0] 800be12: f8d8 3000 ldr.w r3, [r8] 800be16: 685a ldr r2, [r3, #4] 800be18: bb62 cbnz r2, 800be74 <_malloc_r+0xdc> 800be1a: f8c8 7000 str.w r7, [r8] 800be1e: e00f b.n 800be40 <_malloc_r+0xa8> 800be20: 6822 ldr r2, [r4, #0] 800be22: 1b52 subs r2, r2, r5 800be24: d420 bmi.n 800be68 <_malloc_r+0xd0> 800be26: 2a0b cmp r2, #11 800be28: d917 bls.n 800be5a <_malloc_r+0xc2> 800be2a: 1961 adds r1, r4, r5 800be2c: 42a3 cmp r3, r4 800be2e: 6025 str r5, [r4, #0] 800be30: bf18 it ne 800be32: 6059 strne r1, [r3, #4] 800be34: 6863 ldr r3, [r4, #4] 800be36: bf08 it eq 800be38: f8c8 1000 streq.w r1, [r8] 800be3c: 5162 str r2, [r4, r5] 800be3e: 604b str r3, [r1, #4] 800be40: 4630 mov r0, r6 800be42: f000 f8d7 bl 800bff4 <__malloc_unlock> 800be46: f104 000b add.w r0, r4, #11 800be4a: 1d23 adds r3, r4, #4 800be4c: f020 0007 bic.w r0, r0, #7 800be50: 1ac2 subs r2, r0, r3 800be52: bf1c itt ne 800be54: 1a1b subne r3, r3, r0 800be56: 50a3 strne r3, [r4, r2] 800be58: e7af b.n 800bdba <_malloc_r+0x22> 800be5a: 6862 ldr r2, [r4, #4] 800be5c: 42a3 cmp r3, r4 800be5e: bf0c ite eq 800be60: f8c8 2000 streq.w r2, [r8] 800be64: 605a strne r2, [r3, #4] 800be66: e7eb b.n 800be40 <_malloc_r+0xa8> 800be68: 4623 mov r3, r4 800be6a: 6864 ldr r4, [r4, #4] 800be6c: e7ae b.n 800bdcc <_malloc_r+0x34> 800be6e: 463c mov r4, r7 800be70: 687f ldr r7, [r7, #4] 800be72: e7b6 b.n 800bde2 <_malloc_r+0x4a> 800be74: 461a mov r2, r3 800be76: 685b ldr r3, [r3, #4] 800be78: 42a3 cmp r3, r4 800be7a: d1fb bne.n 800be74 <_malloc_r+0xdc> 800be7c: 2300 movs r3, #0 800be7e: 6053 str r3, [r2, #4] 800be80: e7de b.n 800be40 <_malloc_r+0xa8> 800be82: 230c movs r3, #12 800be84: 4630 mov r0, r6 800be86: 6033 str r3, [r6, #0] 800be88: f000 f8b4 bl 800bff4 <__malloc_unlock> 800be8c: e794 b.n 800bdb8 <_malloc_r+0x20> 800be8e: 6005 str r5, [r0, #0] 800be90: e7d6 b.n 800be40 <_malloc_r+0xa8> 800be92: bf00 nop 800be94: 20003504 .word 0x20003504 0800be98 <__sflush_r>: 800be98: f9b1 200c ldrsh.w r2, [r1, #12] 800be9c: b5f8 push {r3, r4, r5, r6, r7, lr} 800be9e: 0716 lsls r6, r2, #28 800bea0: 4605 mov r5, r0 800bea2: 460c mov r4, r1 800bea4: d454 bmi.n 800bf50 <__sflush_r+0xb8> 800bea6: 684b ldr r3, [r1, #4] 800bea8: 2b00 cmp r3, #0 800beaa: dc02 bgt.n 800beb2 <__sflush_r+0x1a> 800beac: 6c0b ldr r3, [r1, #64] @ 0x40 800beae: 2b00 cmp r3, #0 800beb0: dd48 ble.n 800bf44 <__sflush_r+0xac> 800beb2: 6ae6 ldr r6, [r4, #44] @ 0x2c 800beb4: 2e00 cmp r6, #0 800beb6: d045 beq.n 800bf44 <__sflush_r+0xac> 800beb8: 2300 movs r3, #0 800beba: f412 5280 ands.w r2, r2, #4096 @ 0x1000 800bebe: 682f ldr r7, [r5, #0] 800bec0: 6a21 ldr r1, [r4, #32] 800bec2: 602b str r3, [r5, #0] 800bec4: d030 beq.n 800bf28 <__sflush_r+0x90> 800bec6: 6d62 ldr r2, [r4, #84] @ 0x54 800bec8: 89a3 ldrh r3, [r4, #12] 800beca: 0759 lsls r1, r3, #29 800becc: d505 bpl.n 800beda <__sflush_r+0x42> 800bece: 6863 ldr r3, [r4, #4] 800bed0: 1ad2 subs r2, r2, r3 800bed2: 6b63 ldr r3, [r4, #52] @ 0x34 800bed4: b10b cbz r3, 800beda <__sflush_r+0x42> 800bed6: 6c23 ldr r3, [r4, #64] @ 0x40 800bed8: 1ad2 subs r2, r2, r3 800beda: 2300 movs r3, #0 800bedc: 4628 mov r0, r5 800bede: 6ae6 ldr r6, [r4, #44] @ 0x2c 800bee0: 6a21 ldr r1, [r4, #32] 800bee2: 47b0 blx r6 800bee4: 1c43 adds r3, r0, #1 800bee6: 89a3 ldrh r3, [r4, #12] 800bee8: d106 bne.n 800bef8 <__sflush_r+0x60> 800beea: 6829 ldr r1, [r5, #0] 800beec: 291d cmp r1, #29 800beee: d82b bhi.n 800bf48 <__sflush_r+0xb0> 800bef0: 4a28 ldr r2, [pc, #160] @ (800bf94 <__sflush_r+0xfc>) 800bef2: 410a asrs r2, r1 800bef4: 07d6 lsls r6, r2, #31 800bef6: d427 bmi.n 800bf48 <__sflush_r+0xb0> 800bef8: 2200 movs r2, #0 800befa: 6062 str r2, [r4, #4] 800befc: 6922 ldr r2, [r4, #16] 800befe: 04d9 lsls r1, r3, #19 800bf00: 6022 str r2, [r4, #0] 800bf02: d504 bpl.n 800bf0e <__sflush_r+0x76> 800bf04: 1c42 adds r2, r0, #1 800bf06: d101 bne.n 800bf0c <__sflush_r+0x74> 800bf08: 682b ldr r3, [r5, #0] 800bf0a: b903 cbnz r3, 800bf0e <__sflush_r+0x76> 800bf0c: 6560 str r0, [r4, #84] @ 0x54 800bf0e: 6b61 ldr r1, [r4, #52] @ 0x34 800bf10: 602f str r7, [r5, #0] 800bf12: b1b9 cbz r1, 800bf44 <__sflush_r+0xac> 800bf14: f104 0344 add.w r3, r4, #68 @ 0x44 800bf18: 4299 cmp r1, r3 800bf1a: d002 beq.n 800bf22 <__sflush_r+0x8a> 800bf1c: 4628 mov r0, r5 800bf1e: f000 fec9 bl 800ccb4 <_free_r> 800bf22: 2300 movs r3, #0 800bf24: 6363 str r3, [r4, #52] @ 0x34 800bf26: e00d b.n 800bf44 <__sflush_r+0xac> 800bf28: 2301 movs r3, #1 800bf2a: 4628 mov r0, r5 800bf2c: 47b0 blx r6 800bf2e: 4602 mov r2, r0 800bf30: 1c50 adds r0, r2, #1 800bf32: d1c9 bne.n 800bec8 <__sflush_r+0x30> 800bf34: 682b ldr r3, [r5, #0] 800bf36: 2b00 cmp r3, #0 800bf38: d0c6 beq.n 800bec8 <__sflush_r+0x30> 800bf3a: 2b1d cmp r3, #29 800bf3c: d001 beq.n 800bf42 <__sflush_r+0xaa> 800bf3e: 2b16 cmp r3, #22 800bf40: d11d bne.n 800bf7e <__sflush_r+0xe6> 800bf42: 602f str r7, [r5, #0] 800bf44: 2000 movs r0, #0 800bf46: e021 b.n 800bf8c <__sflush_r+0xf4> 800bf48: f043 0340 orr.w r3, r3, #64 @ 0x40 800bf4c: b21b sxth r3, r3 800bf4e: e01a b.n 800bf86 <__sflush_r+0xee> 800bf50: 690f ldr r7, [r1, #16] 800bf52: 2f00 cmp r7, #0 800bf54: d0f6 beq.n 800bf44 <__sflush_r+0xac> 800bf56: 0793 lsls r3, r2, #30 800bf58: bf18 it ne 800bf5a: 2300 movne r3, #0 800bf5c: 680e ldr r6, [r1, #0] 800bf5e: bf08 it eq 800bf60: 694b ldreq r3, [r1, #20] 800bf62: 1bf6 subs r6, r6, r7 800bf64: 600f str r7, [r1, #0] 800bf66: 608b str r3, [r1, #8] 800bf68: 2e00 cmp r6, #0 800bf6a: ddeb ble.n 800bf44 <__sflush_r+0xac> 800bf6c: 4633 mov r3, r6 800bf6e: 463a mov r2, r7 800bf70: 4628 mov r0, r5 800bf72: 6a21 ldr r1, [r4, #32] 800bf74: f8d4 c028 ldr.w ip, [r4, #40] @ 0x28 800bf78: 47e0 blx ip 800bf7a: 2800 cmp r0, #0 800bf7c: dc07 bgt.n 800bf8e <__sflush_r+0xf6> 800bf7e: f9b4 300c ldrsh.w r3, [r4, #12] 800bf82: f043 0340 orr.w r3, r3, #64 @ 0x40 800bf86: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800bf8a: 81a3 strh r3, [r4, #12] 800bf8c: bdf8 pop {r3, r4, r5, r6, r7, pc} 800bf8e: 4407 add r7, r0 800bf90: 1a36 subs r6, r6, r0 800bf92: e7e9 b.n 800bf68 <__sflush_r+0xd0> 800bf94: dfbffffe .word 0xdfbffffe 0800bf98 <_fflush_r>: 800bf98: b538 push {r3, r4, r5, lr} 800bf9a: 690b ldr r3, [r1, #16] 800bf9c: 4605 mov r5, r0 800bf9e: 460c mov r4, r1 800bfa0: b913 cbnz r3, 800bfa8 <_fflush_r+0x10> 800bfa2: 2500 movs r5, #0 800bfa4: 4628 mov r0, r5 800bfa6: bd38 pop {r3, r4, r5, pc} 800bfa8: b118 cbz r0, 800bfb2 <_fflush_r+0x1a> 800bfaa: 6a03 ldr r3, [r0, #32] 800bfac: b90b cbnz r3, 800bfb2 <_fflush_r+0x1a> 800bfae: f7fd ff75 bl 8009e9c <__sinit> 800bfb2: f9b4 300c ldrsh.w r3, [r4, #12] 800bfb6: 2b00 cmp r3, #0 800bfb8: d0f3 beq.n 800bfa2 <_fflush_r+0xa> 800bfba: 6e62 ldr r2, [r4, #100] @ 0x64 800bfbc: 07d0 lsls r0, r2, #31 800bfbe: d404 bmi.n 800bfca <_fflush_r+0x32> 800bfc0: 0599 lsls r1, r3, #22 800bfc2: d402 bmi.n 800bfca <_fflush_r+0x32> 800bfc4: 6da0 ldr r0, [r4, #88] @ 0x58 800bfc6: f7fe fd45 bl 800aa54 <__retarget_lock_acquire_recursive> 800bfca: 4628 mov r0, r5 800bfcc: 4621 mov r1, r4 800bfce: f7ff ff63 bl 800be98 <__sflush_r> 800bfd2: 6e63 ldr r3, [r4, #100] @ 0x64 800bfd4: 4605 mov r5, r0 800bfd6: 07da lsls r2, r3, #31 800bfd8: d4e4 bmi.n 800bfa4 <_fflush_r+0xc> 800bfda: 89a3 ldrh r3, [r4, #12] 800bfdc: 059b lsls r3, r3, #22 800bfde: d4e1 bmi.n 800bfa4 <_fflush_r+0xc> 800bfe0: 6da0 ldr r0, [r4, #88] @ 0x58 800bfe2: f7fe fd39 bl 800aa58 <__retarget_lock_release_recursive> 800bfe6: e7dd b.n 800bfa4 <_fflush_r+0xc> 0800bfe8 <__malloc_lock>: 800bfe8: 4801 ldr r0, [pc, #4] @ (800bff0 <__malloc_lock+0x8>) 800bfea: f7fe bd33 b.w 800aa54 <__retarget_lock_acquire_recursive> 800bfee: bf00 nop 800bff0: 200034fe .word 0x200034fe 0800bff4 <__malloc_unlock>: 800bff4: 4801 ldr r0, [pc, #4] @ (800bffc <__malloc_unlock+0x8>) 800bff6: f7fe bd2f b.w 800aa58 <__retarget_lock_release_recursive> 800bffa: bf00 nop 800bffc: 200034fe .word 0x200034fe 0800c000 <_Balloc>: 800c000: b570 push {r4, r5, r6, lr} 800c002: 69c6 ldr r6, [r0, #28] 800c004: 4604 mov r4, r0 800c006: 460d mov r5, r1 800c008: b976 cbnz r6, 800c028 <_Balloc+0x28> 800c00a: 2010 movs r0, #16 800c00c: f7ff fe92 bl 800bd34 800c010: 4602 mov r2, r0 800c012: 61e0 str r0, [r4, #28] 800c014: b920 cbnz r0, 800c020 <_Balloc+0x20> 800c016: 216b movs r1, #107 @ 0x6b 800c018: 4b17 ldr r3, [pc, #92] @ (800c078 <_Balloc+0x78>) 800c01a: 4818 ldr r0, [pc, #96] @ (800c07c <_Balloc+0x7c>) 800c01c: f7fe fd42 bl 800aaa4 <__assert_func> 800c020: e9c0 6601 strd r6, r6, [r0, #4] 800c024: 6006 str r6, [r0, #0] 800c026: 60c6 str r6, [r0, #12] 800c028: 69e6 ldr r6, [r4, #28] 800c02a: 68f3 ldr r3, [r6, #12] 800c02c: b183 cbz r3, 800c050 <_Balloc+0x50> 800c02e: 69e3 ldr r3, [r4, #28] 800c030: 68db ldr r3, [r3, #12] 800c032: f853 0025 ldr.w r0, [r3, r5, lsl #2] 800c036: b9b8 cbnz r0, 800c068 <_Balloc+0x68> 800c038: 2101 movs r1, #1 800c03a: fa01 f605 lsl.w r6, r1, r5 800c03e: 1d72 adds r2, r6, #5 800c040: 4620 mov r0, r4 800c042: 0092 lsls r2, r2, #2 800c044: f000 fe15 bl 800cc72 <_calloc_r> 800c048: b160 cbz r0, 800c064 <_Balloc+0x64> 800c04a: e9c0 5601 strd r5, r6, [r0, #4] 800c04e: e00e b.n 800c06e <_Balloc+0x6e> 800c050: 2221 movs r2, #33 @ 0x21 800c052: 2104 movs r1, #4 800c054: 4620 mov r0, r4 800c056: f000 fe0c bl 800cc72 <_calloc_r> 800c05a: 69e3 ldr r3, [r4, #28] 800c05c: 60f0 str r0, [r6, #12] 800c05e: 68db ldr r3, [r3, #12] 800c060: 2b00 cmp r3, #0 800c062: d1e4 bne.n 800c02e <_Balloc+0x2e> 800c064: 2000 movs r0, #0 800c066: bd70 pop {r4, r5, r6, pc} 800c068: 6802 ldr r2, [r0, #0] 800c06a: f843 2025 str.w r2, [r3, r5, lsl #2] 800c06e: 2300 movs r3, #0 800c070: e9c0 3303 strd r3, r3, [r0, #12] 800c074: e7f7 b.n 800c066 <_Balloc+0x66> 800c076: bf00 nop 800c078: 0800e036 .word 0x0800e036 800c07c: 0800e271 .word 0x0800e271 0800c080 <_Bfree>: 800c080: b570 push {r4, r5, r6, lr} 800c082: 69c6 ldr r6, [r0, #28] 800c084: 4605 mov r5, r0 800c086: 460c mov r4, r1 800c088: b976 cbnz r6, 800c0a8 <_Bfree+0x28> 800c08a: 2010 movs r0, #16 800c08c: f7ff fe52 bl 800bd34 800c090: 4602 mov r2, r0 800c092: 61e8 str r0, [r5, #28] 800c094: b920 cbnz r0, 800c0a0 <_Bfree+0x20> 800c096: 218f movs r1, #143 @ 0x8f 800c098: 4b08 ldr r3, [pc, #32] @ (800c0bc <_Bfree+0x3c>) 800c09a: 4809 ldr r0, [pc, #36] @ (800c0c0 <_Bfree+0x40>) 800c09c: f7fe fd02 bl 800aaa4 <__assert_func> 800c0a0: e9c0 6601 strd r6, r6, [r0, #4] 800c0a4: 6006 str r6, [r0, #0] 800c0a6: 60c6 str r6, [r0, #12] 800c0a8: b13c cbz r4, 800c0ba <_Bfree+0x3a> 800c0aa: 69eb ldr r3, [r5, #28] 800c0ac: 6862 ldr r2, [r4, #4] 800c0ae: 68db ldr r3, [r3, #12] 800c0b0: f853 1022 ldr.w r1, [r3, r2, lsl #2] 800c0b4: 6021 str r1, [r4, #0] 800c0b6: f843 4022 str.w r4, [r3, r2, lsl #2] 800c0ba: bd70 pop {r4, r5, r6, pc} 800c0bc: 0800e036 .word 0x0800e036 800c0c0: 0800e271 .word 0x0800e271 0800c0c4 <__multadd>: 800c0c4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800c0c8: 4607 mov r7, r0 800c0ca: 460c mov r4, r1 800c0cc: 461e mov r6, r3 800c0ce: 2000 movs r0, #0 800c0d0: 690d ldr r5, [r1, #16] 800c0d2: f101 0c14 add.w ip, r1, #20 800c0d6: f8dc 3000 ldr.w r3, [ip] 800c0da: 3001 adds r0, #1 800c0dc: b299 uxth r1, r3 800c0de: fb02 6101 mla r1, r2, r1, r6 800c0e2: 0c1e lsrs r6, r3, #16 800c0e4: 0c0b lsrs r3, r1, #16 800c0e6: fb02 3306 mla r3, r2, r6, r3 800c0ea: b289 uxth r1, r1 800c0ec: eb01 4103 add.w r1, r1, r3, lsl #16 800c0f0: 4285 cmp r5, r0 800c0f2: ea4f 4613 mov.w r6, r3, lsr #16 800c0f6: f84c 1b04 str.w r1, [ip], #4 800c0fa: dcec bgt.n 800c0d6 <__multadd+0x12> 800c0fc: b30e cbz r6, 800c142 <__multadd+0x7e> 800c0fe: 68a3 ldr r3, [r4, #8] 800c100: 42ab cmp r3, r5 800c102: dc19 bgt.n 800c138 <__multadd+0x74> 800c104: 6861 ldr r1, [r4, #4] 800c106: 4638 mov r0, r7 800c108: 3101 adds r1, #1 800c10a: f7ff ff79 bl 800c000 <_Balloc> 800c10e: 4680 mov r8, r0 800c110: b928 cbnz r0, 800c11e <__multadd+0x5a> 800c112: 4602 mov r2, r0 800c114: 21ba movs r1, #186 @ 0xba 800c116: 4b0c ldr r3, [pc, #48] @ (800c148 <__multadd+0x84>) 800c118: 480c ldr r0, [pc, #48] @ (800c14c <__multadd+0x88>) 800c11a: f7fe fcc3 bl 800aaa4 <__assert_func> 800c11e: 6922 ldr r2, [r4, #16] 800c120: f104 010c add.w r1, r4, #12 800c124: 3202 adds r2, #2 800c126: 0092 lsls r2, r2, #2 800c128: 300c adds r0, #12 800c12a: f7fe fca4 bl 800aa76 800c12e: 4621 mov r1, r4 800c130: 4638 mov r0, r7 800c132: f7ff ffa5 bl 800c080 <_Bfree> 800c136: 4644 mov r4, r8 800c138: eb04 0385 add.w r3, r4, r5, lsl #2 800c13c: 3501 adds r5, #1 800c13e: 615e str r6, [r3, #20] 800c140: 6125 str r5, [r4, #16] 800c142: 4620 mov r0, r4 800c144: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800c148: 0800e24f .word 0x0800e24f 800c14c: 0800e271 .word 0x0800e271 0800c150 <__hi0bits>: 800c150: 4603 mov r3, r0 800c152: f5b0 3f80 cmp.w r0, #65536 @ 0x10000 800c156: bf3a itte cc 800c158: 0403 lslcc r3, r0, #16 800c15a: 2010 movcc r0, #16 800c15c: 2000 movcs r0, #0 800c15e: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 800c162: bf3c itt cc 800c164: 021b lslcc r3, r3, #8 800c166: 3008 addcc r0, #8 800c168: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000 800c16c: bf3c itt cc 800c16e: 011b lslcc r3, r3, #4 800c170: 3004 addcc r0, #4 800c172: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 800c176: bf3c itt cc 800c178: 009b lslcc r3, r3, #2 800c17a: 3002 addcc r0, #2 800c17c: 2b00 cmp r3, #0 800c17e: db05 blt.n 800c18c <__hi0bits+0x3c> 800c180: f013 4f80 tst.w r3, #1073741824 @ 0x40000000 800c184: f100 0001 add.w r0, r0, #1 800c188: bf08 it eq 800c18a: 2020 moveq r0, #32 800c18c: 4770 bx lr 0800c18e <__lo0bits>: 800c18e: 6803 ldr r3, [r0, #0] 800c190: 4602 mov r2, r0 800c192: f013 0007 ands.w r0, r3, #7 800c196: d00b beq.n 800c1b0 <__lo0bits+0x22> 800c198: 07d9 lsls r1, r3, #31 800c19a: d421 bmi.n 800c1e0 <__lo0bits+0x52> 800c19c: 0798 lsls r0, r3, #30 800c19e: bf49 itett mi 800c1a0: 085b lsrmi r3, r3, #1 800c1a2: 089b lsrpl r3, r3, #2 800c1a4: 2001 movmi r0, #1 800c1a6: 6013 strmi r3, [r2, #0] 800c1a8: bf5c itt pl 800c1aa: 2002 movpl r0, #2 800c1ac: 6013 strpl r3, [r2, #0] 800c1ae: 4770 bx lr 800c1b0: b299 uxth r1, r3 800c1b2: b909 cbnz r1, 800c1b8 <__lo0bits+0x2a> 800c1b4: 2010 movs r0, #16 800c1b6: 0c1b lsrs r3, r3, #16 800c1b8: b2d9 uxtb r1, r3 800c1ba: b909 cbnz r1, 800c1c0 <__lo0bits+0x32> 800c1bc: 3008 adds r0, #8 800c1be: 0a1b lsrs r3, r3, #8 800c1c0: 0719 lsls r1, r3, #28 800c1c2: bf04 itt eq 800c1c4: 091b lsreq r3, r3, #4 800c1c6: 3004 addeq r0, #4 800c1c8: 0799 lsls r1, r3, #30 800c1ca: bf04 itt eq 800c1cc: 089b lsreq r3, r3, #2 800c1ce: 3002 addeq r0, #2 800c1d0: 07d9 lsls r1, r3, #31 800c1d2: d403 bmi.n 800c1dc <__lo0bits+0x4e> 800c1d4: 085b lsrs r3, r3, #1 800c1d6: f100 0001 add.w r0, r0, #1 800c1da: d003 beq.n 800c1e4 <__lo0bits+0x56> 800c1dc: 6013 str r3, [r2, #0] 800c1de: 4770 bx lr 800c1e0: 2000 movs r0, #0 800c1e2: 4770 bx lr 800c1e4: 2020 movs r0, #32 800c1e6: 4770 bx lr 0800c1e8 <__i2b>: 800c1e8: b510 push {r4, lr} 800c1ea: 460c mov r4, r1 800c1ec: 2101 movs r1, #1 800c1ee: f7ff ff07 bl 800c000 <_Balloc> 800c1f2: 4602 mov r2, r0 800c1f4: b928 cbnz r0, 800c202 <__i2b+0x1a> 800c1f6: f240 1145 movw r1, #325 @ 0x145 800c1fa: 4b04 ldr r3, [pc, #16] @ (800c20c <__i2b+0x24>) 800c1fc: 4804 ldr r0, [pc, #16] @ (800c210 <__i2b+0x28>) 800c1fe: f7fe fc51 bl 800aaa4 <__assert_func> 800c202: 2301 movs r3, #1 800c204: 6144 str r4, [r0, #20] 800c206: 6103 str r3, [r0, #16] 800c208: bd10 pop {r4, pc} 800c20a: bf00 nop 800c20c: 0800e24f .word 0x0800e24f 800c210: 0800e271 .word 0x0800e271 0800c214 <__multiply>: 800c214: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800c218: 4614 mov r4, r2 800c21a: 690a ldr r2, [r1, #16] 800c21c: 6923 ldr r3, [r4, #16] 800c21e: 460f mov r7, r1 800c220: 429a cmp r2, r3 800c222: bfa2 ittt ge 800c224: 4623 movge r3, r4 800c226: 460c movge r4, r1 800c228: 461f movge r7, r3 800c22a: f8d4 a010 ldr.w sl, [r4, #16] 800c22e: f8d7 9010 ldr.w r9, [r7, #16] 800c232: 68a3 ldr r3, [r4, #8] 800c234: 6861 ldr r1, [r4, #4] 800c236: eb0a 0609 add.w r6, sl, r9 800c23a: 42b3 cmp r3, r6 800c23c: b085 sub sp, #20 800c23e: bfb8 it lt 800c240: 3101 addlt r1, #1 800c242: f7ff fedd bl 800c000 <_Balloc> 800c246: b930 cbnz r0, 800c256 <__multiply+0x42> 800c248: 4602 mov r2, r0 800c24a: f44f 71b1 mov.w r1, #354 @ 0x162 800c24e: 4b43 ldr r3, [pc, #268] @ (800c35c <__multiply+0x148>) 800c250: 4843 ldr r0, [pc, #268] @ (800c360 <__multiply+0x14c>) 800c252: f7fe fc27 bl 800aaa4 <__assert_func> 800c256: f100 0514 add.w r5, r0, #20 800c25a: 462b mov r3, r5 800c25c: 2200 movs r2, #0 800c25e: eb05 0886 add.w r8, r5, r6, lsl #2 800c262: 4543 cmp r3, r8 800c264: d321 bcc.n 800c2aa <__multiply+0x96> 800c266: f107 0114 add.w r1, r7, #20 800c26a: f104 0214 add.w r2, r4, #20 800c26e: eb02 028a add.w r2, r2, sl, lsl #2 800c272: eb01 0389 add.w r3, r1, r9, lsl #2 800c276: 9302 str r3, [sp, #8] 800c278: 1b13 subs r3, r2, r4 800c27a: 3b15 subs r3, #21 800c27c: f023 0303 bic.w r3, r3, #3 800c280: 3304 adds r3, #4 800c282: f104 0715 add.w r7, r4, #21 800c286: 42ba cmp r2, r7 800c288: bf38 it cc 800c28a: 2304 movcc r3, #4 800c28c: 9301 str r3, [sp, #4] 800c28e: 9b02 ldr r3, [sp, #8] 800c290: 9103 str r1, [sp, #12] 800c292: 428b cmp r3, r1 800c294: d80c bhi.n 800c2b0 <__multiply+0x9c> 800c296: 2e00 cmp r6, #0 800c298: dd03 ble.n 800c2a2 <__multiply+0x8e> 800c29a: f858 3d04 ldr.w r3, [r8, #-4]! 800c29e: 2b00 cmp r3, #0 800c2a0: d05a beq.n 800c358 <__multiply+0x144> 800c2a2: 6106 str r6, [r0, #16] 800c2a4: b005 add sp, #20 800c2a6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800c2aa: f843 2b04 str.w r2, [r3], #4 800c2ae: e7d8 b.n 800c262 <__multiply+0x4e> 800c2b0: f8b1 a000 ldrh.w sl, [r1] 800c2b4: f1ba 0f00 cmp.w sl, #0 800c2b8: d023 beq.n 800c302 <__multiply+0xee> 800c2ba: 46a9 mov r9, r5 800c2bc: f04f 0c00 mov.w ip, #0 800c2c0: f104 0e14 add.w lr, r4, #20 800c2c4: f85e 7b04 ldr.w r7, [lr], #4 800c2c8: f8d9 3000 ldr.w r3, [r9] 800c2cc: fa1f fb87 uxth.w fp, r7 800c2d0: b29b uxth r3, r3 800c2d2: fb0a 330b mla r3, sl, fp, r3 800c2d6: 4463 add r3, ip 800c2d8: f8d9 c000 ldr.w ip, [r9] 800c2dc: 0c3f lsrs r7, r7, #16 800c2de: ea4f 4c1c mov.w ip, ip, lsr #16 800c2e2: fb0a c707 mla r7, sl, r7, ip 800c2e6: eb07 4713 add.w r7, r7, r3, lsr #16 800c2ea: b29b uxth r3, r3 800c2ec: ea43 4307 orr.w r3, r3, r7, lsl #16 800c2f0: 4572 cmp r2, lr 800c2f2: ea4f 4c17 mov.w ip, r7, lsr #16 800c2f6: f849 3b04 str.w r3, [r9], #4 800c2fa: d8e3 bhi.n 800c2c4 <__multiply+0xb0> 800c2fc: 9b01 ldr r3, [sp, #4] 800c2fe: f845 c003 str.w ip, [r5, r3] 800c302: 9b03 ldr r3, [sp, #12] 800c304: 3104 adds r1, #4 800c306: f8b3 9002 ldrh.w r9, [r3, #2] 800c30a: f1b9 0f00 cmp.w r9, #0 800c30e: d021 beq.n 800c354 <__multiply+0x140> 800c310: 46ae mov lr, r5 800c312: f04f 0a00 mov.w sl, #0 800c316: 682b ldr r3, [r5, #0] 800c318: f104 0c14 add.w ip, r4, #20 800c31c: f8bc b000 ldrh.w fp, [ip] 800c320: f8be 7002 ldrh.w r7, [lr, #2] 800c324: b29b uxth r3, r3 800c326: fb09 770b mla r7, r9, fp, r7 800c32a: 4457 add r7, sl 800c32c: ea43 4307 orr.w r3, r3, r7, lsl #16 800c330: f84e 3b04 str.w r3, [lr], #4 800c334: f85c 3b04 ldr.w r3, [ip], #4 800c338: ea4f 4a13 mov.w sl, r3, lsr #16 800c33c: f8be 3000 ldrh.w r3, [lr] 800c340: 4562 cmp r2, ip 800c342: fb09 330a mla r3, r9, sl, r3 800c346: eb03 4317 add.w r3, r3, r7, lsr #16 800c34a: ea4f 4a13 mov.w sl, r3, lsr #16 800c34e: d8e5 bhi.n 800c31c <__multiply+0x108> 800c350: 9f01 ldr r7, [sp, #4] 800c352: 51eb str r3, [r5, r7] 800c354: 3504 adds r5, #4 800c356: e79a b.n 800c28e <__multiply+0x7a> 800c358: 3e01 subs r6, #1 800c35a: e79c b.n 800c296 <__multiply+0x82> 800c35c: 0800e24f .word 0x0800e24f 800c360: 0800e271 .word 0x0800e271 0800c364 <__pow5mult>: 800c364: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800c368: 4615 mov r5, r2 800c36a: f012 0203 ands.w r2, r2, #3 800c36e: 4607 mov r7, r0 800c370: 460e mov r6, r1 800c372: d007 beq.n 800c384 <__pow5mult+0x20> 800c374: 4c25 ldr r4, [pc, #148] @ (800c40c <__pow5mult+0xa8>) 800c376: 3a01 subs r2, #1 800c378: 2300 movs r3, #0 800c37a: f854 2022 ldr.w r2, [r4, r2, lsl #2] 800c37e: f7ff fea1 bl 800c0c4 <__multadd> 800c382: 4606 mov r6, r0 800c384: 10ad asrs r5, r5, #2 800c386: d03d beq.n 800c404 <__pow5mult+0xa0> 800c388: 69fc ldr r4, [r7, #28] 800c38a: b97c cbnz r4, 800c3ac <__pow5mult+0x48> 800c38c: 2010 movs r0, #16 800c38e: f7ff fcd1 bl 800bd34 800c392: 4602 mov r2, r0 800c394: 61f8 str r0, [r7, #28] 800c396: b928 cbnz r0, 800c3a4 <__pow5mult+0x40> 800c398: f240 11b3 movw r1, #435 @ 0x1b3 800c39c: 4b1c ldr r3, [pc, #112] @ (800c410 <__pow5mult+0xac>) 800c39e: 481d ldr r0, [pc, #116] @ (800c414 <__pow5mult+0xb0>) 800c3a0: f7fe fb80 bl 800aaa4 <__assert_func> 800c3a4: e9c0 4401 strd r4, r4, [r0, #4] 800c3a8: 6004 str r4, [r0, #0] 800c3aa: 60c4 str r4, [r0, #12] 800c3ac: f8d7 801c ldr.w r8, [r7, #28] 800c3b0: f8d8 4008 ldr.w r4, [r8, #8] 800c3b4: b94c cbnz r4, 800c3ca <__pow5mult+0x66> 800c3b6: f240 2171 movw r1, #625 @ 0x271 800c3ba: 4638 mov r0, r7 800c3bc: f7ff ff14 bl 800c1e8 <__i2b> 800c3c0: 2300 movs r3, #0 800c3c2: 4604 mov r4, r0 800c3c4: f8c8 0008 str.w r0, [r8, #8] 800c3c8: 6003 str r3, [r0, #0] 800c3ca: f04f 0900 mov.w r9, #0 800c3ce: 07eb lsls r3, r5, #31 800c3d0: d50a bpl.n 800c3e8 <__pow5mult+0x84> 800c3d2: 4631 mov r1, r6 800c3d4: 4622 mov r2, r4 800c3d6: 4638 mov r0, r7 800c3d8: f7ff ff1c bl 800c214 <__multiply> 800c3dc: 4680 mov r8, r0 800c3de: 4631 mov r1, r6 800c3e0: 4638 mov r0, r7 800c3e2: f7ff fe4d bl 800c080 <_Bfree> 800c3e6: 4646 mov r6, r8 800c3e8: 106d asrs r5, r5, #1 800c3ea: d00b beq.n 800c404 <__pow5mult+0xa0> 800c3ec: 6820 ldr r0, [r4, #0] 800c3ee: b938 cbnz r0, 800c400 <__pow5mult+0x9c> 800c3f0: 4622 mov r2, r4 800c3f2: 4621 mov r1, r4 800c3f4: 4638 mov r0, r7 800c3f6: f7ff ff0d bl 800c214 <__multiply> 800c3fa: 6020 str r0, [r4, #0] 800c3fc: f8c0 9000 str.w r9, [r0] 800c400: 4604 mov r4, r0 800c402: e7e4 b.n 800c3ce <__pow5mult+0x6a> 800c404: 4630 mov r0, r6 800c406: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800c40a: bf00 nop 800c40c: 0800e2cc .word 0x0800e2cc 800c410: 0800e036 .word 0x0800e036 800c414: 0800e271 .word 0x0800e271 0800c418 <__lshift>: 800c418: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800c41c: 460c mov r4, r1 800c41e: 4607 mov r7, r0 800c420: 4691 mov r9, r2 800c422: 6923 ldr r3, [r4, #16] 800c424: 6849 ldr r1, [r1, #4] 800c426: eb03 1862 add.w r8, r3, r2, asr #5 800c42a: 68a3 ldr r3, [r4, #8] 800c42c: ea4f 1a62 mov.w sl, r2, asr #5 800c430: f108 0601 add.w r6, r8, #1 800c434: 42b3 cmp r3, r6 800c436: db0b blt.n 800c450 <__lshift+0x38> 800c438: 4638 mov r0, r7 800c43a: f7ff fde1 bl 800c000 <_Balloc> 800c43e: 4605 mov r5, r0 800c440: b948 cbnz r0, 800c456 <__lshift+0x3e> 800c442: 4602 mov r2, r0 800c444: f44f 71ef mov.w r1, #478 @ 0x1de 800c448: 4b27 ldr r3, [pc, #156] @ (800c4e8 <__lshift+0xd0>) 800c44a: 4828 ldr r0, [pc, #160] @ (800c4ec <__lshift+0xd4>) 800c44c: f7fe fb2a bl 800aaa4 <__assert_func> 800c450: 3101 adds r1, #1 800c452: 005b lsls r3, r3, #1 800c454: e7ee b.n 800c434 <__lshift+0x1c> 800c456: 2300 movs r3, #0 800c458: f100 0114 add.w r1, r0, #20 800c45c: f100 0210 add.w r2, r0, #16 800c460: 4618 mov r0, r3 800c462: 4553 cmp r3, sl 800c464: db33 blt.n 800c4ce <__lshift+0xb6> 800c466: 6920 ldr r0, [r4, #16] 800c468: ea2a 7aea bic.w sl, sl, sl, asr #31 800c46c: f104 0314 add.w r3, r4, #20 800c470: f019 091f ands.w r9, r9, #31 800c474: eb01 018a add.w r1, r1, sl, lsl #2 800c478: eb03 0c80 add.w ip, r3, r0, lsl #2 800c47c: d02b beq.n 800c4d6 <__lshift+0xbe> 800c47e: 468a mov sl, r1 800c480: 2200 movs r2, #0 800c482: f1c9 0e20 rsb lr, r9, #32 800c486: 6818 ldr r0, [r3, #0] 800c488: fa00 f009 lsl.w r0, r0, r9 800c48c: 4310 orrs r0, r2 800c48e: f84a 0b04 str.w r0, [sl], #4 800c492: f853 2b04 ldr.w r2, [r3], #4 800c496: 459c cmp ip, r3 800c498: fa22 f20e lsr.w r2, r2, lr 800c49c: d8f3 bhi.n 800c486 <__lshift+0x6e> 800c49e: ebac 0304 sub.w r3, ip, r4 800c4a2: 3b15 subs r3, #21 800c4a4: f023 0303 bic.w r3, r3, #3 800c4a8: 3304 adds r3, #4 800c4aa: f104 0015 add.w r0, r4, #21 800c4ae: 4584 cmp ip, r0 800c4b0: bf38 it cc 800c4b2: 2304 movcc r3, #4 800c4b4: 50ca str r2, [r1, r3] 800c4b6: b10a cbz r2, 800c4bc <__lshift+0xa4> 800c4b8: f108 0602 add.w r6, r8, #2 800c4bc: 3e01 subs r6, #1 800c4be: 4638 mov r0, r7 800c4c0: 4621 mov r1, r4 800c4c2: 612e str r6, [r5, #16] 800c4c4: f7ff fddc bl 800c080 <_Bfree> 800c4c8: 4628 mov r0, r5 800c4ca: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800c4ce: f842 0f04 str.w r0, [r2, #4]! 800c4d2: 3301 adds r3, #1 800c4d4: e7c5 b.n 800c462 <__lshift+0x4a> 800c4d6: 3904 subs r1, #4 800c4d8: f853 2b04 ldr.w r2, [r3], #4 800c4dc: 459c cmp ip, r3 800c4de: f841 2f04 str.w r2, [r1, #4]! 800c4e2: d8f9 bhi.n 800c4d8 <__lshift+0xc0> 800c4e4: e7ea b.n 800c4bc <__lshift+0xa4> 800c4e6: bf00 nop 800c4e8: 0800e24f .word 0x0800e24f 800c4ec: 0800e271 .word 0x0800e271 0800c4f0 <__mcmp>: 800c4f0: 4603 mov r3, r0 800c4f2: 690a ldr r2, [r1, #16] 800c4f4: 6900 ldr r0, [r0, #16] 800c4f6: b530 push {r4, r5, lr} 800c4f8: 1a80 subs r0, r0, r2 800c4fa: d10e bne.n 800c51a <__mcmp+0x2a> 800c4fc: 3314 adds r3, #20 800c4fe: 3114 adds r1, #20 800c500: eb03 0482 add.w r4, r3, r2, lsl #2 800c504: eb01 0182 add.w r1, r1, r2, lsl #2 800c508: f854 5d04 ldr.w r5, [r4, #-4]! 800c50c: f851 2d04 ldr.w r2, [r1, #-4]! 800c510: 4295 cmp r5, r2 800c512: d003 beq.n 800c51c <__mcmp+0x2c> 800c514: d205 bcs.n 800c522 <__mcmp+0x32> 800c516: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800c51a: bd30 pop {r4, r5, pc} 800c51c: 42a3 cmp r3, r4 800c51e: d3f3 bcc.n 800c508 <__mcmp+0x18> 800c520: e7fb b.n 800c51a <__mcmp+0x2a> 800c522: 2001 movs r0, #1 800c524: e7f9 b.n 800c51a <__mcmp+0x2a> ... 0800c528 <__mdiff>: 800c528: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800c52c: 4689 mov r9, r1 800c52e: 4606 mov r6, r0 800c530: 4611 mov r1, r2 800c532: 4648 mov r0, r9 800c534: 4614 mov r4, r2 800c536: f7ff ffdb bl 800c4f0 <__mcmp> 800c53a: 1e05 subs r5, r0, #0 800c53c: d112 bne.n 800c564 <__mdiff+0x3c> 800c53e: 4629 mov r1, r5 800c540: 4630 mov r0, r6 800c542: f7ff fd5d bl 800c000 <_Balloc> 800c546: 4602 mov r2, r0 800c548: b928 cbnz r0, 800c556 <__mdiff+0x2e> 800c54a: f240 2137 movw r1, #567 @ 0x237 800c54e: 4b3e ldr r3, [pc, #248] @ (800c648 <__mdiff+0x120>) 800c550: 483e ldr r0, [pc, #248] @ (800c64c <__mdiff+0x124>) 800c552: f7fe faa7 bl 800aaa4 <__assert_func> 800c556: 2301 movs r3, #1 800c558: e9c0 3504 strd r3, r5, [r0, #16] 800c55c: 4610 mov r0, r2 800c55e: b003 add sp, #12 800c560: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800c564: bfbc itt lt 800c566: 464b movlt r3, r9 800c568: 46a1 movlt r9, r4 800c56a: 4630 mov r0, r6 800c56c: f8d9 1004 ldr.w r1, [r9, #4] 800c570: bfba itte lt 800c572: 461c movlt r4, r3 800c574: 2501 movlt r5, #1 800c576: 2500 movge r5, #0 800c578: f7ff fd42 bl 800c000 <_Balloc> 800c57c: 4602 mov r2, r0 800c57e: b918 cbnz r0, 800c588 <__mdiff+0x60> 800c580: f240 2145 movw r1, #581 @ 0x245 800c584: 4b30 ldr r3, [pc, #192] @ (800c648 <__mdiff+0x120>) 800c586: e7e3 b.n 800c550 <__mdiff+0x28> 800c588: f100 0b14 add.w fp, r0, #20 800c58c: f8d9 7010 ldr.w r7, [r9, #16] 800c590: f109 0310 add.w r3, r9, #16 800c594: 60c5 str r5, [r0, #12] 800c596: f04f 0c00 mov.w ip, #0 800c59a: f109 0514 add.w r5, r9, #20 800c59e: 46d9 mov r9, fp 800c5a0: 6926 ldr r6, [r4, #16] 800c5a2: f104 0e14 add.w lr, r4, #20 800c5a6: eb05 0887 add.w r8, r5, r7, lsl #2 800c5aa: eb0e 0686 add.w r6, lr, r6, lsl #2 800c5ae: 9301 str r3, [sp, #4] 800c5b0: 9b01 ldr r3, [sp, #4] 800c5b2: f85e 0b04 ldr.w r0, [lr], #4 800c5b6: f853 af04 ldr.w sl, [r3, #4]! 800c5ba: b281 uxth r1, r0 800c5bc: 9301 str r3, [sp, #4] 800c5be: fa1f f38a uxth.w r3, sl 800c5c2: 1a5b subs r3, r3, r1 800c5c4: 0c00 lsrs r0, r0, #16 800c5c6: 4463 add r3, ip 800c5c8: ebc0 401a rsb r0, r0, sl, lsr #16 800c5cc: eb00 4023 add.w r0, r0, r3, asr #16 800c5d0: b29b uxth r3, r3 800c5d2: ea43 4300 orr.w r3, r3, r0, lsl #16 800c5d6: 4576 cmp r6, lr 800c5d8: ea4f 4c20 mov.w ip, r0, asr #16 800c5dc: f849 3b04 str.w r3, [r9], #4 800c5e0: d8e6 bhi.n 800c5b0 <__mdiff+0x88> 800c5e2: 1b33 subs r3, r6, r4 800c5e4: 3b15 subs r3, #21 800c5e6: f023 0303 bic.w r3, r3, #3 800c5ea: 3415 adds r4, #21 800c5ec: 3304 adds r3, #4 800c5ee: 42a6 cmp r6, r4 800c5f0: bf38 it cc 800c5f2: 2304 movcc r3, #4 800c5f4: 441d add r5, r3 800c5f6: 445b add r3, fp 800c5f8: 461e mov r6, r3 800c5fa: 462c mov r4, r5 800c5fc: 4544 cmp r4, r8 800c5fe: d30e bcc.n 800c61e <__mdiff+0xf6> 800c600: f108 0103 add.w r1, r8, #3 800c604: 1b49 subs r1, r1, r5 800c606: f021 0103 bic.w r1, r1, #3 800c60a: 3d03 subs r5, #3 800c60c: 45a8 cmp r8, r5 800c60e: bf38 it cc 800c610: 2100 movcc r1, #0 800c612: 440b add r3, r1 800c614: f853 1d04 ldr.w r1, [r3, #-4]! 800c618: b199 cbz r1, 800c642 <__mdiff+0x11a> 800c61a: 6117 str r7, [r2, #16] 800c61c: e79e b.n 800c55c <__mdiff+0x34> 800c61e: 46e6 mov lr, ip 800c620: f854 1b04 ldr.w r1, [r4], #4 800c624: fa1f fc81 uxth.w ip, r1 800c628: 44f4 add ip, lr 800c62a: 0c08 lsrs r0, r1, #16 800c62c: 4471 add r1, lr 800c62e: eb00 402c add.w r0, r0, ip, asr #16 800c632: b289 uxth r1, r1 800c634: ea41 4100 orr.w r1, r1, r0, lsl #16 800c638: ea4f 4c20 mov.w ip, r0, asr #16 800c63c: f846 1b04 str.w r1, [r6], #4 800c640: e7dc b.n 800c5fc <__mdiff+0xd4> 800c642: 3f01 subs r7, #1 800c644: e7e6 b.n 800c614 <__mdiff+0xec> 800c646: bf00 nop 800c648: 0800e24f .word 0x0800e24f 800c64c: 0800e271 .word 0x0800e271 0800c650 <__d2b>: 800c650: e92d 4373 stmdb sp!, {r0, r1, r4, r5, r6, r8, r9, lr} 800c654: 2101 movs r1, #1 800c656: 4690 mov r8, r2 800c658: 4699 mov r9, r3 800c65a: 9e08 ldr r6, [sp, #32] 800c65c: f7ff fcd0 bl 800c000 <_Balloc> 800c660: 4604 mov r4, r0 800c662: b930 cbnz r0, 800c672 <__d2b+0x22> 800c664: 4602 mov r2, r0 800c666: f240 310f movw r1, #783 @ 0x30f 800c66a: 4b23 ldr r3, [pc, #140] @ (800c6f8 <__d2b+0xa8>) 800c66c: 4823 ldr r0, [pc, #140] @ (800c6fc <__d2b+0xac>) 800c66e: f7fe fa19 bl 800aaa4 <__assert_func> 800c672: f3c9 550a ubfx r5, r9, #20, #11 800c676: f3c9 0313 ubfx r3, r9, #0, #20 800c67a: b10d cbz r5, 800c680 <__d2b+0x30> 800c67c: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 800c680: 9301 str r3, [sp, #4] 800c682: f1b8 0300 subs.w r3, r8, #0 800c686: d024 beq.n 800c6d2 <__d2b+0x82> 800c688: 4668 mov r0, sp 800c68a: 9300 str r3, [sp, #0] 800c68c: f7ff fd7f bl 800c18e <__lo0bits> 800c690: e9dd 1200 ldrd r1, r2, [sp] 800c694: b1d8 cbz r0, 800c6ce <__d2b+0x7e> 800c696: f1c0 0320 rsb r3, r0, #32 800c69a: fa02 f303 lsl.w r3, r2, r3 800c69e: 430b orrs r3, r1 800c6a0: 40c2 lsrs r2, r0 800c6a2: 6163 str r3, [r4, #20] 800c6a4: 9201 str r2, [sp, #4] 800c6a6: 9b01 ldr r3, [sp, #4] 800c6a8: 2b00 cmp r3, #0 800c6aa: bf0c ite eq 800c6ac: 2201 moveq r2, #1 800c6ae: 2202 movne r2, #2 800c6b0: 61a3 str r3, [r4, #24] 800c6b2: 6122 str r2, [r4, #16] 800c6b4: b1ad cbz r5, 800c6e2 <__d2b+0x92> 800c6b6: f2a5 4533 subw r5, r5, #1075 @ 0x433 800c6ba: 4405 add r5, r0 800c6bc: 6035 str r5, [r6, #0] 800c6be: f1c0 0035 rsb r0, r0, #53 @ 0x35 800c6c2: 9b09 ldr r3, [sp, #36] @ 0x24 800c6c4: 6018 str r0, [r3, #0] 800c6c6: 4620 mov r0, r4 800c6c8: b002 add sp, #8 800c6ca: e8bd 8370 ldmia.w sp!, {r4, r5, r6, r8, r9, pc} 800c6ce: 6161 str r1, [r4, #20] 800c6d0: e7e9 b.n 800c6a6 <__d2b+0x56> 800c6d2: a801 add r0, sp, #4 800c6d4: f7ff fd5b bl 800c18e <__lo0bits> 800c6d8: 9b01 ldr r3, [sp, #4] 800c6da: 2201 movs r2, #1 800c6dc: 6163 str r3, [r4, #20] 800c6de: 3020 adds r0, #32 800c6e0: e7e7 b.n 800c6b2 <__d2b+0x62> 800c6e2: f2a0 4032 subw r0, r0, #1074 @ 0x432 800c6e6: eb04 0382 add.w r3, r4, r2, lsl #2 800c6ea: 6030 str r0, [r6, #0] 800c6ec: 6918 ldr r0, [r3, #16] 800c6ee: f7ff fd2f bl 800c150 <__hi0bits> 800c6f2: ebc0 1042 rsb r0, r0, r2, lsl #5 800c6f6: e7e4 b.n 800c6c2 <__d2b+0x72> 800c6f8: 0800e24f .word 0x0800e24f 800c6fc: 0800e271 .word 0x0800e271 0800c700 : 800c700: b40e push {r1, r2, r3} 800c702: f44f 7201 mov.w r2, #516 @ 0x204 800c706: b530 push {r4, r5, lr} 800c708: b09c sub sp, #112 @ 0x70 800c70a: ac1f add r4, sp, #124 @ 0x7c 800c70c: f854 5b04 ldr.w r5, [r4], #4 800c710: f8ad 2014 strh.w r2, [sp, #20] 800c714: 9002 str r0, [sp, #8] 800c716: 9006 str r0, [sp, #24] 800c718: f7f3 fd86 bl 8000228 800c71c: 4b0b ldr r3, [pc, #44] @ (800c74c ) 800c71e: 9003 str r0, [sp, #12] 800c720: 930b str r3, [sp, #44] @ 0x2c 800c722: 2300 movs r3, #0 800c724: 930f str r3, [sp, #60] @ 0x3c 800c726: 9314 str r3, [sp, #80] @ 0x50 800c728: f64f 73ff movw r3, #65535 @ 0xffff 800c72c: 9007 str r0, [sp, #28] 800c72e: 4808 ldr r0, [pc, #32] @ (800c750 ) 800c730: f8ad 3016 strh.w r3, [sp, #22] 800c734: 462a mov r2, r5 800c736: 4623 mov r3, r4 800c738: a902 add r1, sp, #8 800c73a: 6800 ldr r0, [r0, #0] 800c73c: 9401 str r4, [sp, #4] 800c73e: f000 fb59 bl 800cdf4 <__ssvfiscanf_r> 800c742: b01c add sp, #112 @ 0x70 800c744: e8bd 4030 ldmia.w sp!, {r4, r5, lr} 800c748: b003 add sp, #12 800c74a: 4770 bx lr 800c74c: 0800c777 .word 0x0800c777 800c750: 20000028 .word 0x20000028 0800c754 <__sread>: 800c754: b510 push {r4, lr} 800c756: 460c mov r4, r1 800c758: f9b1 100e ldrsh.w r1, [r1, #14] 800c75c: f000 fa4e bl 800cbfc <_read_r> 800c760: 2800 cmp r0, #0 800c762: bfab itete ge 800c764: 6d63 ldrge r3, [r4, #84] @ 0x54 800c766: 89a3 ldrhlt r3, [r4, #12] 800c768: 181b addge r3, r3, r0 800c76a: f423 5380 biclt.w r3, r3, #4096 @ 0x1000 800c76e: bfac ite ge 800c770: 6563 strge r3, [r4, #84] @ 0x54 800c772: 81a3 strhlt r3, [r4, #12] 800c774: bd10 pop {r4, pc} 0800c776 <__seofread>: 800c776: 2000 movs r0, #0 800c778: 4770 bx lr 0800c77a <__swrite>: 800c77a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800c77e: 461f mov r7, r3 800c780: 898b ldrh r3, [r1, #12] 800c782: 4605 mov r5, r0 800c784: 05db lsls r3, r3, #23 800c786: 460c mov r4, r1 800c788: 4616 mov r6, r2 800c78a: d505 bpl.n 800c798 <__swrite+0x1e> 800c78c: 2302 movs r3, #2 800c78e: 2200 movs r2, #0 800c790: f9b1 100e ldrsh.w r1, [r1, #14] 800c794: f000 fa20 bl 800cbd8 <_lseek_r> 800c798: 89a3 ldrh r3, [r4, #12] 800c79a: 4632 mov r2, r6 800c79c: f423 5380 bic.w r3, r3, #4096 @ 0x1000 800c7a0: 81a3 strh r3, [r4, #12] 800c7a2: 4628 mov r0, r5 800c7a4: 463b mov r3, r7 800c7a6: f9b4 100e ldrsh.w r1, [r4, #14] 800c7aa: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800c7ae: f000 ba47 b.w 800cc40 <_write_r> 0800c7b2 <__sseek>: 800c7b2: b510 push {r4, lr} 800c7b4: 460c mov r4, r1 800c7b6: f9b1 100e ldrsh.w r1, [r1, #14] 800c7ba: f000 fa0d bl 800cbd8 <_lseek_r> 800c7be: 1c43 adds r3, r0, #1 800c7c0: 89a3 ldrh r3, [r4, #12] 800c7c2: bf15 itete ne 800c7c4: 6560 strne r0, [r4, #84] @ 0x54 800c7c6: f423 5380 biceq.w r3, r3, #4096 @ 0x1000 800c7ca: f443 5380 orrne.w r3, r3, #4096 @ 0x1000 800c7ce: 81a3 strheq r3, [r4, #12] 800c7d0: bf18 it ne 800c7d2: 81a3 strhne r3, [r4, #12] 800c7d4: bd10 pop {r4, pc} 0800c7d6 <__sclose>: 800c7d6: f9b1 100e ldrsh.w r1, [r1, #14] 800c7da: f000 b9cb b.w 800cb74 <_close_r> ... 0800c7e0 : 800c7e0: b40e push {r1, r2, r3} 800c7e2: b503 push {r0, r1, lr} 800c7e4: 4601 mov r1, r0 800c7e6: ab03 add r3, sp, #12 800c7e8: 4805 ldr r0, [pc, #20] @ (800c800 ) 800c7ea: f853 2b04 ldr.w r2, [r3], #4 800c7ee: 6800 ldr r0, [r0, #0] 800c7f0: 9301 str r3, [sp, #4] 800c7f2: f7ff f987 bl 800bb04 <_vfiprintf_r> 800c7f6: b002 add sp, #8 800c7f8: f85d eb04 ldr.w lr, [sp], #4 800c7fc: b003 add sp, #12 800c7fe: 4770 bx lr 800c800: 20000028 .word 0x20000028 0800c804 <_realloc_r>: 800c804: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800c808: 4680 mov r8, r0 800c80a: 4615 mov r5, r2 800c80c: 460c mov r4, r1 800c80e: b921 cbnz r1, 800c81a <_realloc_r+0x16> 800c810: 4611 mov r1, r2 800c812: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800c816: f7ff babf b.w 800bd98 <_malloc_r> 800c81a: b92a cbnz r2, 800c828 <_realloc_r+0x24> 800c81c: f000 fa4a bl 800ccb4 <_free_r> 800c820: 2400 movs r4, #0 800c822: 4620 mov r0, r4 800c824: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800c828: f000 fded bl 800d406 <_malloc_usable_size_r> 800c82c: 4285 cmp r5, r0 800c82e: 4606 mov r6, r0 800c830: d802 bhi.n 800c838 <_realloc_r+0x34> 800c832: ebb5 0f50 cmp.w r5, r0, lsr #1 800c836: d8f4 bhi.n 800c822 <_realloc_r+0x1e> 800c838: 4629 mov r1, r5 800c83a: 4640 mov r0, r8 800c83c: f7ff faac bl 800bd98 <_malloc_r> 800c840: 4607 mov r7, r0 800c842: 2800 cmp r0, #0 800c844: d0ec beq.n 800c820 <_realloc_r+0x1c> 800c846: 42b5 cmp r5, r6 800c848: 462a mov r2, r5 800c84a: 4621 mov r1, r4 800c84c: bf28 it cs 800c84e: 4632 movcs r2, r6 800c850: f7fe f911 bl 800aa76 800c854: 4621 mov r1, r4 800c856: 4640 mov r0, r8 800c858: f000 fa2c bl 800ccb4 <_free_r> 800c85c: 463c mov r4, r7 800c85e: e7e0 b.n 800c822 <_realloc_r+0x1e> 0800c860 <_strtoul_l.constprop.0>: 800c860: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 800c864: 4686 mov lr, r0 800c866: 460d mov r5, r1 800c868: 4e33 ldr r6, [pc, #204] @ (800c938 <_strtoul_l.constprop.0+0xd8>) 800c86a: 4628 mov r0, r5 800c86c: f815 4b01 ldrb.w r4, [r5], #1 800c870: 5d37 ldrb r7, [r6, r4] 800c872: f017 0708 ands.w r7, r7, #8 800c876: d1f8 bne.n 800c86a <_strtoul_l.constprop.0+0xa> 800c878: 2c2d cmp r4, #45 @ 0x2d 800c87a: d12f bne.n 800c8dc <_strtoul_l.constprop.0+0x7c> 800c87c: 2701 movs r7, #1 800c87e: 782c ldrb r4, [r5, #0] 800c880: 1c85 adds r5, r0, #2 800c882: f033 0010 bics.w r0, r3, #16 800c886: d109 bne.n 800c89c <_strtoul_l.constprop.0+0x3c> 800c888: 2c30 cmp r4, #48 @ 0x30 800c88a: d12c bne.n 800c8e6 <_strtoul_l.constprop.0+0x86> 800c88c: 7828 ldrb r0, [r5, #0] 800c88e: f000 00df and.w r0, r0, #223 @ 0xdf 800c892: 2858 cmp r0, #88 @ 0x58 800c894: d127 bne.n 800c8e6 <_strtoul_l.constprop.0+0x86> 800c896: 2310 movs r3, #16 800c898: 786c ldrb r4, [r5, #1] 800c89a: 3502 adds r5, #2 800c89c: f04f 38ff mov.w r8, #4294967295 @ 0xffffffff 800c8a0: fbb8 f8f3 udiv r8, r8, r3 800c8a4: 2600 movs r6, #0 800c8a6: fb03 f908 mul.w r9, r3, r8 800c8aa: 4630 mov r0, r6 800c8ac: ea6f 0909 mvn.w r9, r9 800c8b0: f1a4 0c30 sub.w ip, r4, #48 @ 0x30 800c8b4: f1bc 0f09 cmp.w ip, #9 800c8b8: d81c bhi.n 800c8f4 <_strtoul_l.constprop.0+0x94> 800c8ba: 4664 mov r4, ip 800c8bc: 42a3 cmp r3, r4 800c8be: dd2a ble.n 800c916 <_strtoul_l.constprop.0+0xb6> 800c8c0: f1b6 3fff cmp.w r6, #4294967295 @ 0xffffffff 800c8c4: d007 beq.n 800c8d6 <_strtoul_l.constprop.0+0x76> 800c8c6: 4580 cmp r8, r0 800c8c8: d322 bcc.n 800c910 <_strtoul_l.constprop.0+0xb0> 800c8ca: d101 bne.n 800c8d0 <_strtoul_l.constprop.0+0x70> 800c8cc: 45a1 cmp r9, r4 800c8ce: db1f blt.n 800c910 <_strtoul_l.constprop.0+0xb0> 800c8d0: 2601 movs r6, #1 800c8d2: fb00 4003 mla r0, r0, r3, r4 800c8d6: f815 4b01 ldrb.w r4, [r5], #1 800c8da: e7e9 b.n 800c8b0 <_strtoul_l.constprop.0+0x50> 800c8dc: 2c2b cmp r4, #43 @ 0x2b 800c8de: bf04 itt eq 800c8e0: 782c ldrbeq r4, [r5, #0] 800c8e2: 1c85 addeq r5, r0, #2 800c8e4: e7cd b.n 800c882 <_strtoul_l.constprop.0+0x22> 800c8e6: 2b00 cmp r3, #0 800c8e8: d1d8 bne.n 800c89c <_strtoul_l.constprop.0+0x3c> 800c8ea: 2c30 cmp r4, #48 @ 0x30 800c8ec: bf0c ite eq 800c8ee: 2308 moveq r3, #8 800c8f0: 230a movne r3, #10 800c8f2: e7d3 b.n 800c89c <_strtoul_l.constprop.0+0x3c> 800c8f4: f1a4 0c41 sub.w ip, r4, #65 @ 0x41 800c8f8: f1bc 0f19 cmp.w ip, #25 800c8fc: d801 bhi.n 800c902 <_strtoul_l.constprop.0+0xa2> 800c8fe: 3c37 subs r4, #55 @ 0x37 800c900: e7dc b.n 800c8bc <_strtoul_l.constprop.0+0x5c> 800c902: f1a4 0c61 sub.w ip, r4, #97 @ 0x61 800c906: f1bc 0f19 cmp.w ip, #25 800c90a: d804 bhi.n 800c916 <_strtoul_l.constprop.0+0xb6> 800c90c: 3c57 subs r4, #87 @ 0x57 800c90e: e7d5 b.n 800c8bc <_strtoul_l.constprop.0+0x5c> 800c910: f04f 36ff mov.w r6, #4294967295 @ 0xffffffff 800c914: e7df b.n 800c8d6 <_strtoul_l.constprop.0+0x76> 800c916: 1c73 adds r3, r6, #1 800c918: d106 bne.n 800c928 <_strtoul_l.constprop.0+0xc8> 800c91a: 2322 movs r3, #34 @ 0x22 800c91c: 4630 mov r0, r6 800c91e: f8ce 3000 str.w r3, [lr] 800c922: b932 cbnz r2, 800c932 <_strtoul_l.constprop.0+0xd2> 800c924: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 800c928: b107 cbz r7, 800c92c <_strtoul_l.constprop.0+0xcc> 800c92a: 4240 negs r0, r0 800c92c: 2a00 cmp r2, #0 800c92e: d0f9 beq.n 800c924 <_strtoul_l.constprop.0+0xc4> 800c930: b106 cbz r6, 800c934 <_strtoul_l.constprop.0+0xd4> 800c932: 1e69 subs r1, r5, #1 800c934: 6011 str r1, [r2, #0] 800c936: e7f5 b.n 800c924 <_strtoul_l.constprop.0+0xc4> 800c938: 0800e3d3 .word 0x0800e3d3 0800c93c <_strtoul_r>: 800c93c: f7ff bf90 b.w 800c860 <_strtoul_l.constprop.0> 0800c940 : 800c940: 4613 mov r3, r2 800c942: 460a mov r2, r1 800c944: 4601 mov r1, r0 800c946: 4802 ldr r0, [pc, #8] @ (800c950 ) 800c948: 6800 ldr r0, [r0, #0] 800c94a: f7ff bf89 b.w 800c860 <_strtoul_l.constprop.0> 800c94e: bf00 nop 800c950: 20000028 .word 0x20000028 0800c954 <__swbuf_r>: 800c954: b5f8 push {r3, r4, r5, r6, r7, lr} 800c956: 460e mov r6, r1 800c958: 4614 mov r4, r2 800c95a: 4605 mov r5, r0 800c95c: b118 cbz r0, 800c966 <__swbuf_r+0x12> 800c95e: 6a03 ldr r3, [r0, #32] 800c960: b90b cbnz r3, 800c966 <__swbuf_r+0x12> 800c962: f7fd fa9b bl 8009e9c <__sinit> 800c966: 69a3 ldr r3, [r4, #24] 800c968: 60a3 str r3, [r4, #8] 800c96a: 89a3 ldrh r3, [r4, #12] 800c96c: 071a lsls r2, r3, #28 800c96e: d501 bpl.n 800c974 <__swbuf_r+0x20> 800c970: 6923 ldr r3, [r4, #16] 800c972: b943 cbnz r3, 800c986 <__swbuf_r+0x32> 800c974: 4621 mov r1, r4 800c976: 4628 mov r0, r5 800c978: f000 f82a bl 800c9d0 <__swsetup_r> 800c97c: b118 cbz r0, 800c986 <__swbuf_r+0x32> 800c97e: f04f 37ff mov.w r7, #4294967295 @ 0xffffffff 800c982: 4638 mov r0, r7 800c984: bdf8 pop {r3, r4, r5, r6, r7, pc} 800c986: 6823 ldr r3, [r4, #0] 800c988: 6922 ldr r2, [r4, #16] 800c98a: b2f6 uxtb r6, r6 800c98c: 1a98 subs r0, r3, r2 800c98e: 6963 ldr r3, [r4, #20] 800c990: 4637 mov r7, r6 800c992: 4283 cmp r3, r0 800c994: dc05 bgt.n 800c9a2 <__swbuf_r+0x4e> 800c996: 4621 mov r1, r4 800c998: 4628 mov r0, r5 800c99a: f7ff fafd bl 800bf98 <_fflush_r> 800c99e: 2800 cmp r0, #0 800c9a0: d1ed bne.n 800c97e <__swbuf_r+0x2a> 800c9a2: 68a3 ldr r3, [r4, #8] 800c9a4: 3b01 subs r3, #1 800c9a6: 60a3 str r3, [r4, #8] 800c9a8: 6823 ldr r3, [r4, #0] 800c9aa: 1c5a adds r2, r3, #1 800c9ac: 6022 str r2, [r4, #0] 800c9ae: 701e strb r6, [r3, #0] 800c9b0: 6962 ldr r2, [r4, #20] 800c9b2: 1c43 adds r3, r0, #1 800c9b4: 429a cmp r2, r3 800c9b6: d004 beq.n 800c9c2 <__swbuf_r+0x6e> 800c9b8: 89a3 ldrh r3, [r4, #12] 800c9ba: 07db lsls r3, r3, #31 800c9bc: d5e1 bpl.n 800c982 <__swbuf_r+0x2e> 800c9be: 2e0a cmp r6, #10 800c9c0: d1df bne.n 800c982 <__swbuf_r+0x2e> 800c9c2: 4621 mov r1, r4 800c9c4: 4628 mov r0, r5 800c9c6: f7ff fae7 bl 800bf98 <_fflush_r> 800c9ca: 2800 cmp r0, #0 800c9cc: d0d9 beq.n 800c982 <__swbuf_r+0x2e> 800c9ce: e7d6 b.n 800c97e <__swbuf_r+0x2a> 0800c9d0 <__swsetup_r>: 800c9d0: b538 push {r3, r4, r5, lr} 800c9d2: 4b29 ldr r3, [pc, #164] @ (800ca78 <__swsetup_r+0xa8>) 800c9d4: 4605 mov r5, r0 800c9d6: 6818 ldr r0, [r3, #0] 800c9d8: 460c mov r4, r1 800c9da: b118 cbz r0, 800c9e4 <__swsetup_r+0x14> 800c9dc: 6a03 ldr r3, [r0, #32] 800c9de: b90b cbnz r3, 800c9e4 <__swsetup_r+0x14> 800c9e0: f7fd fa5c bl 8009e9c <__sinit> 800c9e4: f9b4 300c ldrsh.w r3, [r4, #12] 800c9e8: 0719 lsls r1, r3, #28 800c9ea: d422 bmi.n 800ca32 <__swsetup_r+0x62> 800c9ec: 06da lsls r2, r3, #27 800c9ee: d407 bmi.n 800ca00 <__swsetup_r+0x30> 800c9f0: 2209 movs r2, #9 800c9f2: 602a str r2, [r5, #0] 800c9f4: f043 0340 orr.w r3, r3, #64 @ 0x40 800c9f8: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800c9fc: 81a3 strh r3, [r4, #12] 800c9fe: e033 b.n 800ca68 <__swsetup_r+0x98> 800ca00: 0758 lsls r0, r3, #29 800ca02: d512 bpl.n 800ca2a <__swsetup_r+0x5a> 800ca04: 6b61 ldr r1, [r4, #52] @ 0x34 800ca06: b141 cbz r1, 800ca1a <__swsetup_r+0x4a> 800ca08: f104 0344 add.w r3, r4, #68 @ 0x44 800ca0c: 4299 cmp r1, r3 800ca0e: d002 beq.n 800ca16 <__swsetup_r+0x46> 800ca10: 4628 mov r0, r5 800ca12: f000 f94f bl 800ccb4 <_free_r> 800ca16: 2300 movs r3, #0 800ca18: 6363 str r3, [r4, #52] @ 0x34 800ca1a: 89a3 ldrh r3, [r4, #12] 800ca1c: f023 0324 bic.w r3, r3, #36 @ 0x24 800ca20: 81a3 strh r3, [r4, #12] 800ca22: 2300 movs r3, #0 800ca24: 6063 str r3, [r4, #4] 800ca26: 6923 ldr r3, [r4, #16] 800ca28: 6023 str r3, [r4, #0] 800ca2a: 89a3 ldrh r3, [r4, #12] 800ca2c: f043 0308 orr.w r3, r3, #8 800ca30: 81a3 strh r3, [r4, #12] 800ca32: 6923 ldr r3, [r4, #16] 800ca34: b94b cbnz r3, 800ca4a <__swsetup_r+0x7a> 800ca36: 89a3 ldrh r3, [r4, #12] 800ca38: f403 7320 and.w r3, r3, #640 @ 0x280 800ca3c: f5b3 7f00 cmp.w r3, #512 @ 0x200 800ca40: d003 beq.n 800ca4a <__swsetup_r+0x7a> 800ca42: 4621 mov r1, r4 800ca44: 4628 mov r0, r5 800ca46: f000 f83e bl 800cac6 <__smakebuf_r> 800ca4a: f9b4 300c ldrsh.w r3, [r4, #12] 800ca4e: f013 0201 ands.w r2, r3, #1 800ca52: d00a beq.n 800ca6a <__swsetup_r+0x9a> 800ca54: 2200 movs r2, #0 800ca56: 60a2 str r2, [r4, #8] 800ca58: 6962 ldr r2, [r4, #20] 800ca5a: 4252 negs r2, r2 800ca5c: 61a2 str r2, [r4, #24] 800ca5e: 6922 ldr r2, [r4, #16] 800ca60: b942 cbnz r2, 800ca74 <__swsetup_r+0xa4> 800ca62: f013 0080 ands.w r0, r3, #128 @ 0x80 800ca66: d1c5 bne.n 800c9f4 <__swsetup_r+0x24> 800ca68: bd38 pop {r3, r4, r5, pc} 800ca6a: 0799 lsls r1, r3, #30 800ca6c: bf58 it pl 800ca6e: 6962 ldrpl r2, [r4, #20] 800ca70: 60a2 str r2, [r4, #8] 800ca72: e7f4 b.n 800ca5e <__swsetup_r+0x8e> 800ca74: 2000 movs r0, #0 800ca76: e7f7 b.n 800ca68 <__swsetup_r+0x98> 800ca78: 20000028 .word 0x20000028 0800ca7c <__swhatbuf_r>: 800ca7c: b570 push {r4, r5, r6, lr} 800ca7e: 460c mov r4, r1 800ca80: f9b1 100e ldrsh.w r1, [r1, #14] 800ca84: 4615 mov r5, r2 800ca86: 2900 cmp r1, #0 800ca88: 461e mov r6, r3 800ca8a: b096 sub sp, #88 @ 0x58 800ca8c: da0c bge.n 800caa8 <__swhatbuf_r+0x2c> 800ca8e: 89a3 ldrh r3, [r4, #12] 800ca90: 2100 movs r1, #0 800ca92: f013 0f80 tst.w r3, #128 @ 0x80 800ca96: bf14 ite ne 800ca98: 2340 movne r3, #64 @ 0x40 800ca9a: f44f 6380 moveq.w r3, #1024 @ 0x400 800ca9e: 2000 movs r0, #0 800caa0: 6031 str r1, [r6, #0] 800caa2: 602b str r3, [r5, #0] 800caa4: b016 add sp, #88 @ 0x58 800caa6: bd70 pop {r4, r5, r6, pc} 800caa8: 466a mov r2, sp 800caaa: f000 f873 bl 800cb94 <_fstat_r> 800caae: 2800 cmp r0, #0 800cab0: dbed blt.n 800ca8e <__swhatbuf_r+0x12> 800cab2: 9901 ldr r1, [sp, #4] 800cab4: f401 4170 and.w r1, r1, #61440 @ 0xf000 800cab8: f5a1 5300 sub.w r3, r1, #8192 @ 0x2000 800cabc: 4259 negs r1, r3 800cabe: 4159 adcs r1, r3 800cac0: f44f 6380 mov.w r3, #1024 @ 0x400 800cac4: e7eb b.n 800ca9e <__swhatbuf_r+0x22> 0800cac6 <__smakebuf_r>: 800cac6: 898b ldrh r3, [r1, #12] 800cac8: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 800caca: 079d lsls r5, r3, #30 800cacc: 4606 mov r6, r0 800cace: 460c mov r4, r1 800cad0: d507 bpl.n 800cae2 <__smakebuf_r+0x1c> 800cad2: f104 0347 add.w r3, r4, #71 @ 0x47 800cad6: 6023 str r3, [r4, #0] 800cad8: 6123 str r3, [r4, #16] 800cada: 2301 movs r3, #1 800cadc: 6163 str r3, [r4, #20] 800cade: b003 add sp, #12 800cae0: bdf0 pop {r4, r5, r6, r7, pc} 800cae2: 466a mov r2, sp 800cae4: ab01 add r3, sp, #4 800cae6: f7ff ffc9 bl 800ca7c <__swhatbuf_r> 800caea: 9f00 ldr r7, [sp, #0] 800caec: 4605 mov r5, r0 800caee: 4639 mov r1, r7 800caf0: 4630 mov r0, r6 800caf2: f7ff f951 bl 800bd98 <_malloc_r> 800caf6: b948 cbnz r0, 800cb0c <__smakebuf_r+0x46> 800caf8: f9b4 300c ldrsh.w r3, [r4, #12] 800cafc: 059a lsls r2, r3, #22 800cafe: d4ee bmi.n 800cade <__smakebuf_r+0x18> 800cb00: f023 0303 bic.w r3, r3, #3 800cb04: f043 0302 orr.w r3, r3, #2 800cb08: 81a3 strh r3, [r4, #12] 800cb0a: e7e2 b.n 800cad2 <__smakebuf_r+0xc> 800cb0c: 89a3 ldrh r3, [r4, #12] 800cb0e: e9c4 0704 strd r0, r7, [r4, #16] 800cb12: f043 0380 orr.w r3, r3, #128 @ 0x80 800cb16: 81a3 strh r3, [r4, #12] 800cb18: 9b01 ldr r3, [sp, #4] 800cb1a: 6020 str r0, [r4, #0] 800cb1c: b15b cbz r3, 800cb36 <__smakebuf_r+0x70> 800cb1e: 4630 mov r0, r6 800cb20: f9b4 100e ldrsh.w r1, [r4, #14] 800cb24: f000 f848 bl 800cbb8 <_isatty_r> 800cb28: b128 cbz r0, 800cb36 <__smakebuf_r+0x70> 800cb2a: 89a3 ldrh r3, [r4, #12] 800cb2c: f023 0303 bic.w r3, r3, #3 800cb30: f043 0301 orr.w r3, r3, #1 800cb34: 81a3 strh r3, [r4, #12] 800cb36: 89a3 ldrh r3, [r4, #12] 800cb38: 431d orrs r5, r3 800cb3a: 81a5 strh r5, [r4, #12] 800cb3c: e7cf b.n 800cade <__smakebuf_r+0x18> 0800cb3e : 800cb3e: 4288 cmp r0, r1 800cb40: b510 push {r4, lr} 800cb42: eb01 0402 add.w r4, r1, r2 800cb46: d902 bls.n 800cb4e 800cb48: 4284 cmp r4, r0 800cb4a: 4623 mov r3, r4 800cb4c: d807 bhi.n 800cb5e 800cb4e: 1e43 subs r3, r0, #1 800cb50: 42a1 cmp r1, r4 800cb52: d008 beq.n 800cb66 800cb54: f811 2b01 ldrb.w r2, [r1], #1 800cb58: f803 2f01 strb.w r2, [r3, #1]! 800cb5c: e7f8 b.n 800cb50 800cb5e: 4601 mov r1, r0 800cb60: 4402 add r2, r0 800cb62: 428a cmp r2, r1 800cb64: d100 bne.n 800cb68 800cb66: bd10 pop {r4, pc} 800cb68: f813 4d01 ldrb.w r4, [r3, #-1]! 800cb6c: f802 4d01 strb.w r4, [r2, #-1]! 800cb70: e7f7 b.n 800cb62 ... 0800cb74 <_close_r>: 800cb74: b538 push {r3, r4, r5, lr} 800cb76: 2300 movs r3, #0 800cb78: 4d05 ldr r5, [pc, #20] @ (800cb90 <_close_r+0x1c>) 800cb7a: 4604 mov r4, r0 800cb7c: 4608 mov r0, r1 800cb7e: 602b str r3, [r5, #0] 800cb80: f7f8 fce1 bl 8005546 <_close> 800cb84: 1c43 adds r3, r0, #1 800cb86: d102 bne.n 800cb8e <_close_r+0x1a> 800cb88: 682b ldr r3, [r5, #0] 800cb8a: b103 cbz r3, 800cb8e <_close_r+0x1a> 800cb8c: 6023 str r3, [r4, #0] 800cb8e: bd38 pop {r3, r4, r5, pc} 800cb90: 20003508 .word 0x20003508 0800cb94 <_fstat_r>: 800cb94: b538 push {r3, r4, r5, lr} 800cb96: 2300 movs r3, #0 800cb98: 4d06 ldr r5, [pc, #24] @ (800cbb4 <_fstat_r+0x20>) 800cb9a: 4604 mov r4, r0 800cb9c: 4608 mov r0, r1 800cb9e: 4611 mov r1, r2 800cba0: 602b str r3, [r5, #0] 800cba2: f7f8 fcdb bl 800555c <_fstat> 800cba6: 1c43 adds r3, r0, #1 800cba8: d102 bne.n 800cbb0 <_fstat_r+0x1c> 800cbaa: 682b ldr r3, [r5, #0] 800cbac: b103 cbz r3, 800cbb0 <_fstat_r+0x1c> 800cbae: 6023 str r3, [r4, #0] 800cbb0: bd38 pop {r3, r4, r5, pc} 800cbb2: bf00 nop 800cbb4: 20003508 .word 0x20003508 0800cbb8 <_isatty_r>: 800cbb8: b538 push {r3, r4, r5, lr} 800cbba: 2300 movs r3, #0 800cbbc: 4d05 ldr r5, [pc, #20] @ (800cbd4 <_isatty_r+0x1c>) 800cbbe: 4604 mov r4, r0 800cbc0: 4608 mov r0, r1 800cbc2: 602b str r3, [r5, #0] 800cbc4: f7f8 fcd9 bl 800557a <_isatty> 800cbc8: 1c43 adds r3, r0, #1 800cbca: d102 bne.n 800cbd2 <_isatty_r+0x1a> 800cbcc: 682b ldr r3, [r5, #0] 800cbce: b103 cbz r3, 800cbd2 <_isatty_r+0x1a> 800cbd0: 6023 str r3, [r4, #0] 800cbd2: bd38 pop {r3, r4, r5, pc} 800cbd4: 20003508 .word 0x20003508 0800cbd8 <_lseek_r>: 800cbd8: b538 push {r3, r4, r5, lr} 800cbda: 4604 mov r4, r0 800cbdc: 4608 mov r0, r1 800cbde: 4611 mov r1, r2 800cbe0: 2200 movs r2, #0 800cbe2: 4d05 ldr r5, [pc, #20] @ (800cbf8 <_lseek_r+0x20>) 800cbe4: 602a str r2, [r5, #0] 800cbe6: 461a mov r2, r3 800cbe8: f7f8 fcd1 bl 800558e <_lseek> 800cbec: 1c43 adds r3, r0, #1 800cbee: d102 bne.n 800cbf6 <_lseek_r+0x1e> 800cbf0: 682b ldr r3, [r5, #0] 800cbf2: b103 cbz r3, 800cbf6 <_lseek_r+0x1e> 800cbf4: 6023 str r3, [r4, #0] 800cbf6: bd38 pop {r3, r4, r5, pc} 800cbf8: 20003508 .word 0x20003508 0800cbfc <_read_r>: 800cbfc: b538 push {r3, r4, r5, lr} 800cbfe: 4604 mov r4, r0 800cc00: 4608 mov r0, r1 800cc02: 4611 mov r1, r2 800cc04: 2200 movs r2, #0 800cc06: 4d05 ldr r5, [pc, #20] @ (800cc1c <_read_r+0x20>) 800cc08: 602a str r2, [r5, #0] 800cc0a: 461a mov r2, r3 800cc0c: f7f8 fc7e bl 800550c <_read> 800cc10: 1c43 adds r3, r0, #1 800cc12: d102 bne.n 800cc1a <_read_r+0x1e> 800cc14: 682b ldr r3, [r5, #0] 800cc16: b103 cbz r3, 800cc1a <_read_r+0x1e> 800cc18: 6023 str r3, [r4, #0] 800cc1a: bd38 pop {r3, r4, r5, pc} 800cc1c: 20003508 .word 0x20003508 0800cc20 <_sbrk_r>: 800cc20: b538 push {r3, r4, r5, lr} 800cc22: 2300 movs r3, #0 800cc24: 4d05 ldr r5, [pc, #20] @ (800cc3c <_sbrk_r+0x1c>) 800cc26: 4604 mov r4, r0 800cc28: 4608 mov r0, r1 800cc2a: 602b str r3, [r5, #0] 800cc2c: f7f8 fcbc bl 80055a8 <_sbrk> 800cc30: 1c43 adds r3, r0, #1 800cc32: d102 bne.n 800cc3a <_sbrk_r+0x1a> 800cc34: 682b ldr r3, [r5, #0] 800cc36: b103 cbz r3, 800cc3a <_sbrk_r+0x1a> 800cc38: 6023 str r3, [r4, #0] 800cc3a: bd38 pop {r3, r4, r5, pc} 800cc3c: 20003508 .word 0x20003508 0800cc40 <_write_r>: 800cc40: b538 push {r3, r4, r5, lr} 800cc42: 4604 mov r4, r0 800cc44: 4608 mov r0, r1 800cc46: 4611 mov r1, r2 800cc48: 2200 movs r2, #0 800cc4a: 4d05 ldr r5, [pc, #20] @ (800cc60 <_write_r+0x20>) 800cc4c: 602a str r2, [r5, #0] 800cc4e: 461a mov r2, r3 800cc50: f7f6 f822 bl 8002c98 <_write> 800cc54: 1c43 adds r3, r0, #1 800cc56: d102 bne.n 800cc5e <_write_r+0x1e> 800cc58: 682b ldr r3, [r5, #0] 800cc5a: b103 cbz r3, 800cc5e <_write_r+0x1e> 800cc5c: 6023 str r3, [r4, #0] 800cc5e: bd38 pop {r3, r4, r5, pc} 800cc60: 20003508 .word 0x20003508 0800cc64 : 800cc64: 2006 movs r0, #6 800cc66: b508 push {r3, lr} 800cc68: f000 fcc0 bl 800d5ec 800cc6c: 2001 movs r0, #1 800cc6e: f7f8 fc42 bl 80054f6 <_exit> 0800cc72 <_calloc_r>: 800cc72: b570 push {r4, r5, r6, lr} 800cc74: fba1 5402 umull r5, r4, r1, r2 800cc78: b93c cbnz r4, 800cc8a <_calloc_r+0x18> 800cc7a: 4629 mov r1, r5 800cc7c: f7ff f88c bl 800bd98 <_malloc_r> 800cc80: 4606 mov r6, r0 800cc82: b928 cbnz r0, 800cc90 <_calloc_r+0x1e> 800cc84: 2600 movs r6, #0 800cc86: 4630 mov r0, r6 800cc88: bd70 pop {r4, r5, r6, pc} 800cc8a: 220c movs r2, #12 800cc8c: 6002 str r2, [r0, #0] 800cc8e: e7f9 b.n 800cc84 <_calloc_r+0x12> 800cc90: 462a mov r2, r5 800cc92: 4621 mov r1, r4 800cc94: f7fd f9f4 bl 800a080 800cc98: e7f5 b.n 800cc86 <_calloc_r+0x14> ... 0800cc9c <__env_lock>: 800cc9c: 4801 ldr r0, [pc, #4] @ (800cca4 <__env_lock+0x8>) 800cc9e: f7fd bed9 b.w 800aa54 <__retarget_lock_acquire_recursive> 800cca2: bf00 nop 800cca4: 200034fd .word 0x200034fd 0800cca8 <__env_unlock>: 800cca8: 4801 ldr r0, [pc, #4] @ (800ccb0 <__env_unlock+0x8>) 800ccaa: f7fd bed5 b.w 800aa58 <__retarget_lock_release_recursive> 800ccae: bf00 nop 800ccb0: 200034fd .word 0x200034fd 0800ccb4 <_free_r>: 800ccb4: b538 push {r3, r4, r5, lr} 800ccb6: 4605 mov r5, r0 800ccb8: 2900 cmp r1, #0 800ccba: d040 beq.n 800cd3e <_free_r+0x8a> 800ccbc: f851 3c04 ldr.w r3, [r1, #-4] 800ccc0: 1f0c subs r4, r1, #4 800ccc2: 2b00 cmp r3, #0 800ccc4: bfb8 it lt 800ccc6: 18e4 addlt r4, r4, r3 800ccc8: f7ff f98e bl 800bfe8 <__malloc_lock> 800cccc: 4a1c ldr r2, [pc, #112] @ (800cd40 <_free_r+0x8c>) 800ccce: 6813 ldr r3, [r2, #0] 800ccd0: b933 cbnz r3, 800cce0 <_free_r+0x2c> 800ccd2: 6063 str r3, [r4, #4] 800ccd4: 6014 str r4, [r2, #0] 800ccd6: 4628 mov r0, r5 800ccd8: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800ccdc: f7ff b98a b.w 800bff4 <__malloc_unlock> 800cce0: 42a3 cmp r3, r4 800cce2: d908 bls.n 800ccf6 <_free_r+0x42> 800cce4: 6820 ldr r0, [r4, #0] 800cce6: 1821 adds r1, r4, r0 800cce8: 428b cmp r3, r1 800ccea: bf01 itttt eq 800ccec: 6819 ldreq r1, [r3, #0] 800ccee: 685b ldreq r3, [r3, #4] 800ccf0: 1809 addeq r1, r1, r0 800ccf2: 6021 streq r1, [r4, #0] 800ccf4: e7ed b.n 800ccd2 <_free_r+0x1e> 800ccf6: 461a mov r2, r3 800ccf8: 685b ldr r3, [r3, #4] 800ccfa: b10b cbz r3, 800cd00 <_free_r+0x4c> 800ccfc: 42a3 cmp r3, r4 800ccfe: d9fa bls.n 800ccf6 <_free_r+0x42> 800cd00: 6811 ldr r1, [r2, #0] 800cd02: 1850 adds r0, r2, r1 800cd04: 42a0 cmp r0, r4 800cd06: d10b bne.n 800cd20 <_free_r+0x6c> 800cd08: 6820 ldr r0, [r4, #0] 800cd0a: 4401 add r1, r0 800cd0c: 1850 adds r0, r2, r1 800cd0e: 4283 cmp r3, r0 800cd10: 6011 str r1, [r2, #0] 800cd12: d1e0 bne.n 800ccd6 <_free_r+0x22> 800cd14: 6818 ldr r0, [r3, #0] 800cd16: 685b ldr r3, [r3, #4] 800cd18: 4408 add r0, r1 800cd1a: 6010 str r0, [r2, #0] 800cd1c: 6053 str r3, [r2, #4] 800cd1e: e7da b.n 800ccd6 <_free_r+0x22> 800cd20: d902 bls.n 800cd28 <_free_r+0x74> 800cd22: 230c movs r3, #12 800cd24: 602b str r3, [r5, #0] 800cd26: e7d6 b.n 800ccd6 <_free_r+0x22> 800cd28: 6820 ldr r0, [r4, #0] 800cd2a: 1821 adds r1, r4, r0 800cd2c: 428b cmp r3, r1 800cd2e: bf01 itttt eq 800cd30: 6819 ldreq r1, [r3, #0] 800cd32: 685b ldreq r3, [r3, #4] 800cd34: 1809 addeq r1, r1, r0 800cd36: 6021 streq r1, [r4, #0] 800cd38: 6063 str r3, [r4, #4] 800cd3a: 6054 str r4, [r2, #4] 800cd3c: e7cb b.n 800ccd6 <_free_r+0x22> 800cd3e: bd38 pop {r3, r4, r5, pc} 800cd40: 20003504 .word 0x20003504 0800cd44 <_sungetc_r>: 800cd44: b538 push {r3, r4, r5, lr} 800cd46: 1c4b adds r3, r1, #1 800cd48: 4614 mov r4, r2 800cd4a: d103 bne.n 800cd54 <_sungetc_r+0x10> 800cd4c: f04f 35ff mov.w r5, #4294967295 @ 0xffffffff 800cd50: 4628 mov r0, r5 800cd52: bd38 pop {r3, r4, r5, pc} 800cd54: 8993 ldrh r3, [r2, #12] 800cd56: b2cd uxtb r5, r1 800cd58: f023 0320 bic.w r3, r3, #32 800cd5c: 8193 strh r3, [r2, #12] 800cd5e: 6853 ldr r3, [r2, #4] 800cd60: 6b52 ldr r2, [r2, #52] @ 0x34 800cd62: b18a cbz r2, 800cd88 <_sungetc_r+0x44> 800cd64: 6ba2 ldr r2, [r4, #56] @ 0x38 800cd66: 429a cmp r2, r3 800cd68: dd08 ble.n 800cd7c <_sungetc_r+0x38> 800cd6a: 6823 ldr r3, [r4, #0] 800cd6c: 1e5a subs r2, r3, #1 800cd6e: 6022 str r2, [r4, #0] 800cd70: f803 5c01 strb.w r5, [r3, #-1] 800cd74: 6863 ldr r3, [r4, #4] 800cd76: 3301 adds r3, #1 800cd78: 6063 str r3, [r4, #4] 800cd7a: e7e9 b.n 800cd50 <_sungetc_r+0xc> 800cd7c: 4621 mov r1, r4 800cd7e: f000 fb4a bl 800d416 <__submore> 800cd82: 2800 cmp r0, #0 800cd84: d0f1 beq.n 800cd6a <_sungetc_r+0x26> 800cd86: e7e1 b.n 800cd4c <_sungetc_r+0x8> 800cd88: 6921 ldr r1, [r4, #16] 800cd8a: 6822 ldr r2, [r4, #0] 800cd8c: b141 cbz r1, 800cda0 <_sungetc_r+0x5c> 800cd8e: 4291 cmp r1, r2 800cd90: d206 bcs.n 800cda0 <_sungetc_r+0x5c> 800cd92: f812 1c01 ldrb.w r1, [r2, #-1] 800cd96: 42a9 cmp r1, r5 800cd98: d102 bne.n 800cda0 <_sungetc_r+0x5c> 800cd9a: 3a01 subs r2, #1 800cd9c: 6022 str r2, [r4, #0] 800cd9e: e7ea b.n 800cd76 <_sungetc_r+0x32> 800cda0: e9c4 230f strd r2, r3, [r4, #60] @ 0x3c 800cda4: f104 0344 add.w r3, r4, #68 @ 0x44 800cda8: 6363 str r3, [r4, #52] @ 0x34 800cdaa: 2303 movs r3, #3 800cdac: 63a3 str r3, [r4, #56] @ 0x38 800cdae: 4623 mov r3, r4 800cdb0: f803 5f46 strb.w r5, [r3, #70]! 800cdb4: 6023 str r3, [r4, #0] 800cdb6: 2301 movs r3, #1 800cdb8: e7de b.n 800cd78 <_sungetc_r+0x34> 0800cdba <__ssrefill_r>: 800cdba: b510 push {r4, lr} 800cdbc: 460c mov r4, r1 800cdbe: 6b49 ldr r1, [r1, #52] @ 0x34 800cdc0: b169 cbz r1, 800cdde <__ssrefill_r+0x24> 800cdc2: f104 0344 add.w r3, r4, #68 @ 0x44 800cdc6: 4299 cmp r1, r3 800cdc8: d001 beq.n 800cdce <__ssrefill_r+0x14> 800cdca: f7ff ff73 bl 800ccb4 <_free_r> 800cdce: 2000 movs r0, #0 800cdd0: 6c23 ldr r3, [r4, #64] @ 0x40 800cdd2: 6360 str r0, [r4, #52] @ 0x34 800cdd4: 6063 str r3, [r4, #4] 800cdd6: b113 cbz r3, 800cdde <__ssrefill_r+0x24> 800cdd8: 6be3 ldr r3, [r4, #60] @ 0x3c 800cdda: 6023 str r3, [r4, #0] 800cddc: bd10 pop {r4, pc} 800cdde: 6923 ldr r3, [r4, #16] 800cde0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800cde4: 6023 str r3, [r4, #0] 800cde6: 2300 movs r3, #0 800cde8: 6063 str r3, [r4, #4] 800cdea: 89a3 ldrh r3, [r4, #12] 800cdec: f043 0320 orr.w r3, r3, #32 800cdf0: 81a3 strh r3, [r4, #12] 800cdf2: e7f3 b.n 800cddc <__ssrefill_r+0x22> 0800cdf4 <__ssvfiscanf_r>: 800cdf4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800cdf8: 460c mov r4, r1 800cdfa: 2100 movs r1, #0 800cdfc: 4606 mov r6, r0 800cdfe: f5ad 7d22 sub.w sp, sp, #648 @ 0x288 800ce02: e9cd 1144 strd r1, r1, [sp, #272] @ 0x110 800ce06: 49aa ldr r1, [pc, #680] @ (800d0b0 <__ssvfiscanf_r+0x2bc>) 800ce08: f10d 0804 add.w r8, sp, #4 800ce0c: 91a0 str r1, [sp, #640] @ 0x280 800ce0e: 49a9 ldr r1, [pc, #676] @ (800d0b4 <__ssvfiscanf_r+0x2c0>) 800ce10: 4fa9 ldr r7, [pc, #676] @ (800d0b8 <__ssvfiscanf_r+0x2c4>) 800ce12: f8cd 8118 str.w r8, [sp, #280] @ 0x118 800ce16: 91a1 str r1, [sp, #644] @ 0x284 800ce18: 9300 str r3, [sp, #0] 800ce1a: 7813 ldrb r3, [r2, #0] 800ce1c: 2b00 cmp r3, #0 800ce1e: f000 8159 beq.w 800d0d4 <__ssvfiscanf_r+0x2e0> 800ce22: 5cf9 ldrb r1, [r7, r3] 800ce24: 1c55 adds r5, r2, #1 800ce26: f011 0108 ands.w r1, r1, #8 800ce2a: d019 beq.n 800ce60 <__ssvfiscanf_r+0x6c> 800ce2c: 6863 ldr r3, [r4, #4] 800ce2e: 2b00 cmp r3, #0 800ce30: dd0f ble.n 800ce52 <__ssvfiscanf_r+0x5e> 800ce32: 6823 ldr r3, [r4, #0] 800ce34: 781a ldrb r2, [r3, #0] 800ce36: 5cba ldrb r2, [r7, r2] 800ce38: 0712 lsls r2, r2, #28 800ce3a: d401 bmi.n 800ce40 <__ssvfiscanf_r+0x4c> 800ce3c: 462a mov r2, r5 800ce3e: e7ec b.n 800ce1a <__ssvfiscanf_r+0x26> 800ce40: 9a45 ldr r2, [sp, #276] @ 0x114 800ce42: 3301 adds r3, #1 800ce44: 3201 adds r2, #1 800ce46: 9245 str r2, [sp, #276] @ 0x114 800ce48: 6862 ldr r2, [r4, #4] 800ce4a: 6023 str r3, [r4, #0] 800ce4c: 3a01 subs r2, #1 800ce4e: 6062 str r2, [r4, #4] 800ce50: e7ec b.n 800ce2c <__ssvfiscanf_r+0x38> 800ce52: 4621 mov r1, r4 800ce54: 4630 mov r0, r6 800ce56: 9ba1 ldr r3, [sp, #644] @ 0x284 800ce58: 4798 blx r3 800ce5a: 2800 cmp r0, #0 800ce5c: d0e9 beq.n 800ce32 <__ssvfiscanf_r+0x3e> 800ce5e: e7ed b.n 800ce3c <__ssvfiscanf_r+0x48> 800ce60: 2b25 cmp r3, #37 @ 0x25 800ce62: d012 beq.n 800ce8a <__ssvfiscanf_r+0x96> 800ce64: 4699 mov r9, r3 800ce66: 6863 ldr r3, [r4, #4] 800ce68: 2b00 cmp r3, #0 800ce6a: f340 8094 ble.w 800cf96 <__ssvfiscanf_r+0x1a2> 800ce6e: 6822 ldr r2, [r4, #0] 800ce70: 7813 ldrb r3, [r2, #0] 800ce72: 454b cmp r3, r9 800ce74: f040 812e bne.w 800d0d4 <__ssvfiscanf_r+0x2e0> 800ce78: 6863 ldr r3, [r4, #4] 800ce7a: 3201 adds r2, #1 800ce7c: 3b01 subs r3, #1 800ce7e: 6063 str r3, [r4, #4] 800ce80: 9b45 ldr r3, [sp, #276] @ 0x114 800ce82: 6022 str r2, [r4, #0] 800ce84: 3301 adds r3, #1 800ce86: 9345 str r3, [sp, #276] @ 0x114 800ce88: e7d8 b.n 800ce3c <__ssvfiscanf_r+0x48> 800ce8a: 9141 str r1, [sp, #260] @ 0x104 800ce8c: 9143 str r1, [sp, #268] @ 0x10c 800ce8e: 7853 ldrb r3, [r2, #1] 800ce90: 2b2a cmp r3, #42 @ 0x2a 800ce92: bf04 itt eq 800ce94: 2310 moveq r3, #16 800ce96: 1c95 addeq r5, r2, #2 800ce98: f04f 020a mov.w r2, #10 800ce9c: bf08 it eq 800ce9e: 9341 streq r3, [sp, #260] @ 0x104 800cea0: 46a9 mov r9, r5 800cea2: f819 1b01 ldrb.w r1, [r9], #1 800cea6: f1a1 0330 sub.w r3, r1, #48 @ 0x30 800ceaa: 2b09 cmp r3, #9 800ceac: d91e bls.n 800ceec <__ssvfiscanf_r+0xf8> 800ceae: f8df a20c ldr.w sl, [pc, #524] @ 800d0bc <__ssvfiscanf_r+0x2c8> 800ceb2: 2203 movs r2, #3 800ceb4: 4650 mov r0, sl 800ceb6: f7fd fdd0 bl 800aa5a 800ceba: b138 cbz r0, 800cecc <__ssvfiscanf_r+0xd8> 800cebc: 2301 movs r3, #1 800cebe: 464d mov r5, r9 800cec0: 9a41 ldr r2, [sp, #260] @ 0x104 800cec2: eba0 000a sub.w r0, r0, sl 800cec6: 4083 lsls r3, r0 800cec8: 4313 orrs r3, r2 800ceca: 9341 str r3, [sp, #260] @ 0x104 800cecc: f815 3b01 ldrb.w r3, [r5], #1 800ced0: 2b78 cmp r3, #120 @ 0x78 800ced2: d806 bhi.n 800cee2 <__ssvfiscanf_r+0xee> 800ced4: 2b57 cmp r3, #87 @ 0x57 800ced6: d810 bhi.n 800cefa <__ssvfiscanf_r+0x106> 800ced8: 2b25 cmp r3, #37 @ 0x25 800ceda: d0c3 beq.n 800ce64 <__ssvfiscanf_r+0x70> 800cedc: d856 bhi.n 800cf8c <__ssvfiscanf_r+0x198> 800cede: 2b00 cmp r3, #0 800cee0: d064 beq.n 800cfac <__ssvfiscanf_r+0x1b8> 800cee2: 2303 movs r3, #3 800cee4: 9347 str r3, [sp, #284] @ 0x11c 800cee6: 230a movs r3, #10 800cee8: 9342 str r3, [sp, #264] @ 0x108 800ceea: e077 b.n 800cfdc <__ssvfiscanf_r+0x1e8> 800ceec: 9b43 ldr r3, [sp, #268] @ 0x10c 800ceee: 464d mov r5, r9 800cef0: fb02 1103 mla r1, r2, r3, r1 800cef4: 3930 subs r1, #48 @ 0x30 800cef6: 9143 str r1, [sp, #268] @ 0x10c 800cef8: e7d2 b.n 800cea0 <__ssvfiscanf_r+0xac> 800cefa: f1a3 0258 sub.w r2, r3, #88 @ 0x58 800cefe: 2a20 cmp r2, #32 800cf00: d8ef bhi.n 800cee2 <__ssvfiscanf_r+0xee> 800cf02: a101 add r1, pc, #4 @ (adr r1, 800cf08 <__ssvfiscanf_r+0x114>) 800cf04: f851 f022 ldr.w pc, [r1, r2, lsl #2] 800cf08: 0800cfbb .word 0x0800cfbb 800cf0c: 0800cee3 .word 0x0800cee3 800cf10: 0800cee3 .word 0x0800cee3 800cf14: 0800d015 .word 0x0800d015 800cf18: 0800cee3 .word 0x0800cee3 800cf1c: 0800cee3 .word 0x0800cee3 800cf20: 0800cee3 .word 0x0800cee3 800cf24: 0800cee3 .word 0x0800cee3 800cf28: 0800cee3 .word 0x0800cee3 800cf2c: 0800cee3 .word 0x0800cee3 800cf30: 0800cee3 .word 0x0800cee3 800cf34: 0800d02b .word 0x0800d02b 800cf38: 0800d011 .word 0x0800d011 800cf3c: 0800cf93 .word 0x0800cf93 800cf40: 0800cf93 .word 0x0800cf93 800cf44: 0800cf93 .word 0x0800cf93 800cf48: 0800cee3 .word 0x0800cee3 800cf4c: 0800cfcd .word 0x0800cfcd 800cf50: 0800cee3 .word 0x0800cee3 800cf54: 0800cee3 .word 0x0800cee3 800cf58: 0800cee3 .word 0x0800cee3 800cf5c: 0800cee3 .word 0x0800cee3 800cf60: 0800d03b .word 0x0800d03b 800cf64: 0800cfd5 .word 0x0800cfd5 800cf68: 0800cfb3 .word 0x0800cfb3 800cf6c: 0800cee3 .word 0x0800cee3 800cf70: 0800cee3 .word 0x0800cee3 800cf74: 0800d037 .word 0x0800d037 800cf78: 0800cee3 .word 0x0800cee3 800cf7c: 0800d011 .word 0x0800d011 800cf80: 0800cee3 .word 0x0800cee3 800cf84: 0800cee3 .word 0x0800cee3 800cf88: 0800cfbb .word 0x0800cfbb 800cf8c: 3b45 subs r3, #69 @ 0x45 800cf8e: 2b02 cmp r3, #2 800cf90: d8a7 bhi.n 800cee2 <__ssvfiscanf_r+0xee> 800cf92: 2305 movs r3, #5 800cf94: e021 b.n 800cfda <__ssvfiscanf_r+0x1e6> 800cf96: 4621 mov r1, r4 800cf98: 4630 mov r0, r6 800cf9a: 9ba1 ldr r3, [sp, #644] @ 0x284 800cf9c: 4798 blx r3 800cf9e: 2800 cmp r0, #0 800cfa0: f43f af65 beq.w 800ce6e <__ssvfiscanf_r+0x7a> 800cfa4: 9844 ldr r0, [sp, #272] @ 0x110 800cfa6: 2800 cmp r0, #0 800cfa8: f040 808c bne.w 800d0c4 <__ssvfiscanf_r+0x2d0> 800cfac: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800cfb0: e08c b.n 800d0cc <__ssvfiscanf_r+0x2d8> 800cfb2: 9a41 ldr r2, [sp, #260] @ 0x104 800cfb4: f042 0220 orr.w r2, r2, #32 800cfb8: 9241 str r2, [sp, #260] @ 0x104 800cfba: 9a41 ldr r2, [sp, #260] @ 0x104 800cfbc: f442 7200 orr.w r2, r2, #512 @ 0x200 800cfc0: 9241 str r2, [sp, #260] @ 0x104 800cfc2: 2210 movs r2, #16 800cfc4: 2b6e cmp r3, #110 @ 0x6e 800cfc6: 9242 str r2, [sp, #264] @ 0x108 800cfc8: d902 bls.n 800cfd0 <__ssvfiscanf_r+0x1dc> 800cfca: e005 b.n 800cfd8 <__ssvfiscanf_r+0x1e4> 800cfcc: 2300 movs r3, #0 800cfce: 9342 str r3, [sp, #264] @ 0x108 800cfd0: 2303 movs r3, #3 800cfd2: e002 b.n 800cfda <__ssvfiscanf_r+0x1e6> 800cfd4: 2308 movs r3, #8 800cfd6: 9342 str r3, [sp, #264] @ 0x108 800cfd8: 2304 movs r3, #4 800cfda: 9347 str r3, [sp, #284] @ 0x11c 800cfdc: 6863 ldr r3, [r4, #4] 800cfde: 2b00 cmp r3, #0 800cfe0: dd39 ble.n 800d056 <__ssvfiscanf_r+0x262> 800cfe2: 9b41 ldr r3, [sp, #260] @ 0x104 800cfe4: 0659 lsls r1, r3, #25 800cfe6: d404 bmi.n 800cff2 <__ssvfiscanf_r+0x1fe> 800cfe8: 6823 ldr r3, [r4, #0] 800cfea: 781a ldrb r2, [r3, #0] 800cfec: 5cba ldrb r2, [r7, r2] 800cfee: 0712 lsls r2, r2, #28 800cff0: d438 bmi.n 800d064 <__ssvfiscanf_r+0x270> 800cff2: 9b47 ldr r3, [sp, #284] @ 0x11c 800cff4: 2b02 cmp r3, #2 800cff6: dc47 bgt.n 800d088 <__ssvfiscanf_r+0x294> 800cff8: 466b mov r3, sp 800cffa: 4622 mov r2, r4 800cffc: 4630 mov r0, r6 800cffe: a941 add r1, sp, #260 @ 0x104 800d000: f000 f87c bl 800d0fc <_scanf_chars> 800d004: 2801 cmp r0, #1 800d006: d065 beq.n 800d0d4 <__ssvfiscanf_r+0x2e0> 800d008: 2802 cmp r0, #2 800d00a: f47f af17 bne.w 800ce3c <__ssvfiscanf_r+0x48> 800d00e: e7c9 b.n 800cfa4 <__ssvfiscanf_r+0x1b0> 800d010: 220a movs r2, #10 800d012: e7d7 b.n 800cfc4 <__ssvfiscanf_r+0x1d0> 800d014: 4629 mov r1, r5 800d016: 4640 mov r0, r8 800d018: f000 f9bc bl 800d394 <__sccl> 800d01c: 9b41 ldr r3, [sp, #260] @ 0x104 800d01e: 4605 mov r5, r0 800d020: f043 0340 orr.w r3, r3, #64 @ 0x40 800d024: 9341 str r3, [sp, #260] @ 0x104 800d026: 2301 movs r3, #1 800d028: e7d7 b.n 800cfda <__ssvfiscanf_r+0x1e6> 800d02a: 9b41 ldr r3, [sp, #260] @ 0x104 800d02c: f043 0340 orr.w r3, r3, #64 @ 0x40 800d030: 9341 str r3, [sp, #260] @ 0x104 800d032: 2300 movs r3, #0 800d034: e7d1 b.n 800cfda <__ssvfiscanf_r+0x1e6> 800d036: 2302 movs r3, #2 800d038: e7cf b.n 800cfda <__ssvfiscanf_r+0x1e6> 800d03a: 9841 ldr r0, [sp, #260] @ 0x104 800d03c: 06c3 lsls r3, r0, #27 800d03e: f53f aefd bmi.w 800ce3c <__ssvfiscanf_r+0x48> 800d042: 9b00 ldr r3, [sp, #0] 800d044: 9a45 ldr r2, [sp, #276] @ 0x114 800d046: 1d19 adds r1, r3, #4 800d048: 9100 str r1, [sp, #0] 800d04a: 681b ldr r3, [r3, #0] 800d04c: 07c0 lsls r0, r0, #31 800d04e: bf4c ite mi 800d050: 801a strhmi r2, [r3, #0] 800d052: 601a strpl r2, [r3, #0] 800d054: e6f2 b.n 800ce3c <__ssvfiscanf_r+0x48> 800d056: 4621 mov r1, r4 800d058: 4630 mov r0, r6 800d05a: 9ba1 ldr r3, [sp, #644] @ 0x284 800d05c: 4798 blx r3 800d05e: 2800 cmp r0, #0 800d060: d0bf beq.n 800cfe2 <__ssvfiscanf_r+0x1ee> 800d062: e79f b.n 800cfa4 <__ssvfiscanf_r+0x1b0> 800d064: 9a45 ldr r2, [sp, #276] @ 0x114 800d066: 3201 adds r2, #1 800d068: 9245 str r2, [sp, #276] @ 0x114 800d06a: 6862 ldr r2, [r4, #4] 800d06c: 3a01 subs r2, #1 800d06e: 2a00 cmp r2, #0 800d070: 6062 str r2, [r4, #4] 800d072: dd02 ble.n 800d07a <__ssvfiscanf_r+0x286> 800d074: 3301 adds r3, #1 800d076: 6023 str r3, [r4, #0] 800d078: e7b6 b.n 800cfe8 <__ssvfiscanf_r+0x1f4> 800d07a: 4621 mov r1, r4 800d07c: 4630 mov r0, r6 800d07e: 9ba1 ldr r3, [sp, #644] @ 0x284 800d080: 4798 blx r3 800d082: 2800 cmp r0, #0 800d084: d0b0 beq.n 800cfe8 <__ssvfiscanf_r+0x1f4> 800d086: e78d b.n 800cfa4 <__ssvfiscanf_r+0x1b0> 800d088: 2b04 cmp r3, #4 800d08a: dc06 bgt.n 800d09a <__ssvfiscanf_r+0x2a6> 800d08c: 466b mov r3, sp 800d08e: 4622 mov r2, r4 800d090: 4630 mov r0, r6 800d092: a941 add r1, sp, #260 @ 0x104 800d094: f000 f88c bl 800d1b0 <_scanf_i> 800d098: e7b4 b.n 800d004 <__ssvfiscanf_r+0x210> 800d09a: 4b09 ldr r3, [pc, #36] @ (800d0c0 <__ssvfiscanf_r+0x2cc>) 800d09c: 2b00 cmp r3, #0 800d09e: f43f aecd beq.w 800ce3c <__ssvfiscanf_r+0x48> 800d0a2: 466b mov r3, sp 800d0a4: 4622 mov r2, r4 800d0a6: 4630 mov r0, r6 800d0a8: a941 add r1, sp, #260 @ 0x104 800d0aa: f3af 8000 nop.w 800d0ae: e7a9 b.n 800d004 <__ssvfiscanf_r+0x210> 800d0b0: 0800cd45 .word 0x0800cd45 800d0b4: 0800cdbb .word 0x0800cdbb 800d0b8: 0800e3d3 .word 0x0800e3d3 800d0bc: 0800e266 .word 0x0800e266 800d0c0: 00000000 .word 0x00000000 800d0c4: 89a3 ldrh r3, [r4, #12] 800d0c6: 065b lsls r3, r3, #25 800d0c8: f53f af70 bmi.w 800cfac <__ssvfiscanf_r+0x1b8> 800d0cc: f50d 7d22 add.w sp, sp, #648 @ 0x288 800d0d0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800d0d4: 9844 ldr r0, [sp, #272] @ 0x110 800d0d6: e7f9 b.n 800d0cc <__ssvfiscanf_r+0x2d8> 0800d0d8 <__ascii_mbtowc>: 800d0d8: b082 sub sp, #8 800d0da: b901 cbnz r1, 800d0de <__ascii_mbtowc+0x6> 800d0dc: a901 add r1, sp, #4 800d0de: b142 cbz r2, 800d0f2 <__ascii_mbtowc+0x1a> 800d0e0: b14b cbz r3, 800d0f6 <__ascii_mbtowc+0x1e> 800d0e2: 7813 ldrb r3, [r2, #0] 800d0e4: 600b str r3, [r1, #0] 800d0e6: 7812 ldrb r2, [r2, #0] 800d0e8: 1e10 subs r0, r2, #0 800d0ea: bf18 it ne 800d0ec: 2001 movne r0, #1 800d0ee: b002 add sp, #8 800d0f0: 4770 bx lr 800d0f2: 4610 mov r0, r2 800d0f4: e7fb b.n 800d0ee <__ascii_mbtowc+0x16> 800d0f6: f06f 0001 mvn.w r0, #1 800d0fa: e7f8 b.n 800d0ee <__ascii_mbtowc+0x16> 0800d0fc <_scanf_chars>: 800d0fc: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800d100: 4615 mov r5, r2 800d102: 688a ldr r2, [r1, #8] 800d104: 4680 mov r8, r0 800d106: 460c mov r4, r1 800d108: b932 cbnz r2, 800d118 <_scanf_chars+0x1c> 800d10a: 698a ldr r2, [r1, #24] 800d10c: 2a00 cmp r2, #0 800d10e: bf14 ite ne 800d110: f04f 32ff movne.w r2, #4294967295 @ 0xffffffff 800d114: 2201 moveq r2, #1 800d116: 608a str r2, [r1, #8] 800d118: 2700 movs r7, #0 800d11a: 6822 ldr r2, [r4, #0] 800d11c: f8df 908c ldr.w r9, [pc, #140] @ 800d1ac <_scanf_chars+0xb0> 800d120: 06d1 lsls r1, r2, #27 800d122: bf5f itttt pl 800d124: 681a ldrpl r2, [r3, #0] 800d126: 1d11 addpl r1, r2, #4 800d128: 6019 strpl r1, [r3, #0] 800d12a: 6816 ldrpl r6, [r2, #0] 800d12c: 69a0 ldr r0, [r4, #24] 800d12e: b188 cbz r0, 800d154 <_scanf_chars+0x58> 800d130: 2801 cmp r0, #1 800d132: d107 bne.n 800d144 <_scanf_chars+0x48> 800d134: 682b ldr r3, [r5, #0] 800d136: 781a ldrb r2, [r3, #0] 800d138: 6963 ldr r3, [r4, #20] 800d13a: 5c9b ldrb r3, [r3, r2] 800d13c: b953 cbnz r3, 800d154 <_scanf_chars+0x58> 800d13e: 2f00 cmp r7, #0 800d140: d031 beq.n 800d1a6 <_scanf_chars+0xaa> 800d142: e022 b.n 800d18a <_scanf_chars+0x8e> 800d144: 2802 cmp r0, #2 800d146: d120 bne.n 800d18a <_scanf_chars+0x8e> 800d148: 682b ldr r3, [r5, #0] 800d14a: 781b ldrb r3, [r3, #0] 800d14c: f819 3003 ldrb.w r3, [r9, r3] 800d150: 071b lsls r3, r3, #28 800d152: d41a bmi.n 800d18a <_scanf_chars+0x8e> 800d154: 6823 ldr r3, [r4, #0] 800d156: 3701 adds r7, #1 800d158: 06da lsls r2, r3, #27 800d15a: bf5e ittt pl 800d15c: 682b ldrpl r3, [r5, #0] 800d15e: 781b ldrbpl r3, [r3, #0] 800d160: f806 3b01 strbpl.w r3, [r6], #1 800d164: 682a ldr r2, [r5, #0] 800d166: 686b ldr r3, [r5, #4] 800d168: 3201 adds r2, #1 800d16a: 602a str r2, [r5, #0] 800d16c: 68a2 ldr r2, [r4, #8] 800d16e: 3b01 subs r3, #1 800d170: 3a01 subs r2, #1 800d172: 606b str r3, [r5, #4] 800d174: 60a2 str r2, [r4, #8] 800d176: b142 cbz r2, 800d18a <_scanf_chars+0x8e> 800d178: 2b00 cmp r3, #0 800d17a: dcd7 bgt.n 800d12c <_scanf_chars+0x30> 800d17c: 4629 mov r1, r5 800d17e: 4640 mov r0, r8 800d180: f8d4 3180 ldr.w r3, [r4, #384] @ 0x180 800d184: 4798 blx r3 800d186: 2800 cmp r0, #0 800d188: d0d0 beq.n 800d12c <_scanf_chars+0x30> 800d18a: 6823 ldr r3, [r4, #0] 800d18c: f013 0310 ands.w r3, r3, #16 800d190: d105 bne.n 800d19e <_scanf_chars+0xa2> 800d192: 68e2 ldr r2, [r4, #12] 800d194: 3201 adds r2, #1 800d196: 60e2 str r2, [r4, #12] 800d198: 69a2 ldr r2, [r4, #24] 800d19a: b102 cbz r2, 800d19e <_scanf_chars+0xa2> 800d19c: 7033 strb r3, [r6, #0] 800d19e: 2000 movs r0, #0 800d1a0: 6923 ldr r3, [r4, #16] 800d1a2: 443b add r3, r7 800d1a4: 6123 str r3, [r4, #16] 800d1a6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800d1aa: bf00 nop 800d1ac: 0800e3d3 .word 0x0800e3d3 0800d1b0 <_scanf_i>: 800d1b0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800d1b4: 460c mov r4, r1 800d1b6: 4698 mov r8, r3 800d1b8: 4b72 ldr r3, [pc, #456] @ (800d384 <_scanf_i+0x1d4>) 800d1ba: b087 sub sp, #28 800d1bc: 4682 mov sl, r0 800d1be: 4616 mov r6, r2 800d1c0: e893 0007 ldmia.w r3, {r0, r1, r2} 800d1c4: ab03 add r3, sp, #12 800d1c6: e883 0007 stmia.w r3, {r0, r1, r2} 800d1ca: 4b6f ldr r3, [pc, #444] @ (800d388 <_scanf_i+0x1d8>) 800d1cc: 69a1 ldr r1, [r4, #24] 800d1ce: 4a6f ldr r2, [pc, #444] @ (800d38c <_scanf_i+0x1dc>) 800d1d0: 4627 mov r7, r4 800d1d2: 2903 cmp r1, #3 800d1d4: bf08 it eq 800d1d6: 461a moveq r2, r3 800d1d8: 68a3 ldr r3, [r4, #8] 800d1da: 9201 str r2, [sp, #4] 800d1dc: 1e5a subs r2, r3, #1 800d1de: f5b2 7fae cmp.w r2, #348 @ 0x15c 800d1e2: bf81 itttt hi 800d1e4: f46f 75ae mvnhi.w r5, #348 @ 0x15c 800d1e8: eb03 0905 addhi.w r9, r3, r5 800d1ec: f240 135d movwhi r3, #349 @ 0x15d 800d1f0: 60a3 strhi r3, [r4, #8] 800d1f2: f857 3b1c ldr.w r3, [r7], #28 800d1f6: bf98 it ls 800d1f8: f04f 0900 movls.w r9, #0 800d1fc: 463d mov r5, r7 800d1fe: f04f 0b00 mov.w fp, #0 800d202: f443 6350 orr.w r3, r3, #3328 @ 0xd00 800d206: 6023 str r3, [r4, #0] 800d208: 6831 ldr r1, [r6, #0] 800d20a: ab03 add r3, sp, #12 800d20c: 2202 movs r2, #2 800d20e: 7809 ldrb r1, [r1, #0] 800d210: f853 002b ldr.w r0, [r3, fp, lsl #2] 800d214: f7fd fc21 bl 800aa5a 800d218: b328 cbz r0, 800d266 <_scanf_i+0xb6> 800d21a: f1bb 0f01 cmp.w fp, #1 800d21e: d159 bne.n 800d2d4 <_scanf_i+0x124> 800d220: 6862 ldr r2, [r4, #4] 800d222: b92a cbnz r2, 800d230 <_scanf_i+0x80> 800d224: 2108 movs r1, #8 800d226: 6822 ldr r2, [r4, #0] 800d228: 6061 str r1, [r4, #4] 800d22a: f442 7200 orr.w r2, r2, #512 @ 0x200 800d22e: 6022 str r2, [r4, #0] 800d230: 6822 ldr r2, [r4, #0] 800d232: f422 62a0 bic.w r2, r2, #1280 @ 0x500 800d236: 6022 str r2, [r4, #0] 800d238: 68a2 ldr r2, [r4, #8] 800d23a: 1e51 subs r1, r2, #1 800d23c: 60a1 str r1, [r4, #8] 800d23e: b192 cbz r2, 800d266 <_scanf_i+0xb6> 800d240: 6832 ldr r2, [r6, #0] 800d242: 1c51 adds r1, r2, #1 800d244: 6031 str r1, [r6, #0] 800d246: 7812 ldrb r2, [r2, #0] 800d248: f805 2b01 strb.w r2, [r5], #1 800d24c: 6872 ldr r2, [r6, #4] 800d24e: 3a01 subs r2, #1 800d250: 2a00 cmp r2, #0 800d252: 6072 str r2, [r6, #4] 800d254: dc07 bgt.n 800d266 <_scanf_i+0xb6> 800d256: 4631 mov r1, r6 800d258: 4650 mov r0, sl 800d25a: f8d4 2180 ldr.w r2, [r4, #384] @ 0x180 800d25e: 4790 blx r2 800d260: 2800 cmp r0, #0 800d262: f040 8085 bne.w 800d370 <_scanf_i+0x1c0> 800d266: f10b 0b01 add.w fp, fp, #1 800d26a: f1bb 0f03 cmp.w fp, #3 800d26e: d1cb bne.n 800d208 <_scanf_i+0x58> 800d270: 6863 ldr r3, [r4, #4] 800d272: b90b cbnz r3, 800d278 <_scanf_i+0xc8> 800d274: 230a movs r3, #10 800d276: 6063 str r3, [r4, #4] 800d278: 6863 ldr r3, [r4, #4] 800d27a: 4945 ldr r1, [pc, #276] @ (800d390 <_scanf_i+0x1e0>) 800d27c: 6960 ldr r0, [r4, #20] 800d27e: 1ac9 subs r1, r1, r3 800d280: f000 f888 bl 800d394 <__sccl> 800d284: f04f 0b00 mov.w fp, #0 800d288: 68a3 ldr r3, [r4, #8] 800d28a: 6822 ldr r2, [r4, #0] 800d28c: 2b00 cmp r3, #0 800d28e: d03d beq.n 800d30c <_scanf_i+0x15c> 800d290: 6831 ldr r1, [r6, #0] 800d292: 6960 ldr r0, [r4, #20] 800d294: f891 c000 ldrb.w ip, [r1] 800d298: f810 000c ldrb.w r0, [r0, ip] 800d29c: 2800 cmp r0, #0 800d29e: d035 beq.n 800d30c <_scanf_i+0x15c> 800d2a0: f1bc 0f30 cmp.w ip, #48 @ 0x30 800d2a4: d124 bne.n 800d2f0 <_scanf_i+0x140> 800d2a6: 0510 lsls r0, r2, #20 800d2a8: d522 bpl.n 800d2f0 <_scanf_i+0x140> 800d2aa: f10b 0b01 add.w fp, fp, #1 800d2ae: f1b9 0f00 cmp.w r9, #0 800d2b2: d003 beq.n 800d2bc <_scanf_i+0x10c> 800d2b4: 3301 adds r3, #1 800d2b6: f109 39ff add.w r9, r9, #4294967295 @ 0xffffffff 800d2ba: 60a3 str r3, [r4, #8] 800d2bc: 6873 ldr r3, [r6, #4] 800d2be: 3b01 subs r3, #1 800d2c0: 2b00 cmp r3, #0 800d2c2: 6073 str r3, [r6, #4] 800d2c4: dd1b ble.n 800d2fe <_scanf_i+0x14e> 800d2c6: 6833 ldr r3, [r6, #0] 800d2c8: 3301 adds r3, #1 800d2ca: 6033 str r3, [r6, #0] 800d2cc: 68a3 ldr r3, [r4, #8] 800d2ce: 3b01 subs r3, #1 800d2d0: 60a3 str r3, [r4, #8] 800d2d2: e7d9 b.n 800d288 <_scanf_i+0xd8> 800d2d4: f1bb 0f02 cmp.w fp, #2 800d2d8: d1ae bne.n 800d238 <_scanf_i+0x88> 800d2da: 6822 ldr r2, [r4, #0] 800d2dc: f402 61c0 and.w r1, r2, #1536 @ 0x600 800d2e0: f5b1 7f00 cmp.w r1, #512 @ 0x200 800d2e4: d1bf bne.n 800d266 <_scanf_i+0xb6> 800d2e6: 2110 movs r1, #16 800d2e8: f442 7280 orr.w r2, r2, #256 @ 0x100 800d2ec: 6061 str r1, [r4, #4] 800d2ee: e7a2 b.n 800d236 <_scanf_i+0x86> 800d2f0: f422 6210 bic.w r2, r2, #2304 @ 0x900 800d2f4: 6022 str r2, [r4, #0] 800d2f6: 780b ldrb r3, [r1, #0] 800d2f8: f805 3b01 strb.w r3, [r5], #1 800d2fc: e7de b.n 800d2bc <_scanf_i+0x10c> 800d2fe: 4631 mov r1, r6 800d300: 4650 mov r0, sl 800d302: f8d4 3180 ldr.w r3, [r4, #384] @ 0x180 800d306: 4798 blx r3 800d308: 2800 cmp r0, #0 800d30a: d0df beq.n 800d2cc <_scanf_i+0x11c> 800d30c: 6823 ldr r3, [r4, #0] 800d30e: 05d9 lsls r1, r3, #23 800d310: d50d bpl.n 800d32e <_scanf_i+0x17e> 800d312: 42bd cmp r5, r7 800d314: d909 bls.n 800d32a <_scanf_i+0x17a> 800d316: f815 1c01 ldrb.w r1, [r5, #-1] 800d31a: 4632 mov r2, r6 800d31c: 4650 mov r0, sl 800d31e: f8d4 317c ldr.w r3, [r4, #380] @ 0x17c 800d322: f105 39ff add.w r9, r5, #4294967295 @ 0xffffffff 800d326: 4798 blx r3 800d328: 464d mov r5, r9 800d32a: 42bd cmp r5, r7 800d32c: d028 beq.n 800d380 <_scanf_i+0x1d0> 800d32e: 6822 ldr r2, [r4, #0] 800d330: f012 0210 ands.w r2, r2, #16 800d334: d113 bne.n 800d35e <_scanf_i+0x1ae> 800d336: 702a strb r2, [r5, #0] 800d338: 4639 mov r1, r7 800d33a: 6863 ldr r3, [r4, #4] 800d33c: 4650 mov r0, sl 800d33e: 9e01 ldr r6, [sp, #4] 800d340: 47b0 blx r6 800d342: f8d8 3000 ldr.w r3, [r8] 800d346: 6821 ldr r1, [r4, #0] 800d348: 1d1a adds r2, r3, #4 800d34a: f8c8 2000 str.w r2, [r8] 800d34e: f011 0f20 tst.w r1, #32 800d352: 681b ldr r3, [r3, #0] 800d354: d00f beq.n 800d376 <_scanf_i+0x1c6> 800d356: 6018 str r0, [r3, #0] 800d358: 68e3 ldr r3, [r4, #12] 800d35a: 3301 adds r3, #1 800d35c: 60e3 str r3, [r4, #12] 800d35e: 2000 movs r0, #0 800d360: 6923 ldr r3, [r4, #16] 800d362: 1bed subs r5, r5, r7 800d364: 445d add r5, fp 800d366: 442b add r3, r5 800d368: 6123 str r3, [r4, #16] 800d36a: b007 add sp, #28 800d36c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800d370: f04f 0b00 mov.w fp, #0 800d374: e7ca b.n 800d30c <_scanf_i+0x15c> 800d376: 07ca lsls r2, r1, #31 800d378: bf4c ite mi 800d37a: 8018 strhmi r0, [r3, #0] 800d37c: 6018 strpl r0, [r3, #0] 800d37e: e7eb b.n 800d358 <_scanf_i+0x1a8> 800d380: 2001 movs r0, #1 800d382: e7f2 b.n 800d36a <_scanf_i+0x1ba> 800d384: 0800dfe0 .word 0x0800dfe0 800d388: 0800d57d .word 0x0800d57d 800d38c: 0800c93d .word 0x0800c93d 800d390: 0800e4e3 .word 0x0800e4e3 0800d394 <__sccl>: 800d394: b570 push {r4, r5, r6, lr} 800d396: 780b ldrb r3, [r1, #0] 800d398: 4604 mov r4, r0 800d39a: 2b5e cmp r3, #94 @ 0x5e 800d39c: bf0b itete eq 800d39e: 784b ldrbeq r3, [r1, #1] 800d3a0: 1c4a addne r2, r1, #1 800d3a2: 1c8a addeq r2, r1, #2 800d3a4: 2100 movne r1, #0 800d3a6: bf08 it eq 800d3a8: 2101 moveq r1, #1 800d3aa: 3801 subs r0, #1 800d3ac: f104 05ff add.w r5, r4, #255 @ 0xff 800d3b0: f800 1f01 strb.w r1, [r0, #1]! 800d3b4: 42a8 cmp r0, r5 800d3b6: d1fb bne.n 800d3b0 <__sccl+0x1c> 800d3b8: b90b cbnz r3, 800d3be <__sccl+0x2a> 800d3ba: 1e50 subs r0, r2, #1 800d3bc: bd70 pop {r4, r5, r6, pc} 800d3be: f081 0101 eor.w r1, r1, #1 800d3c2: 4610 mov r0, r2 800d3c4: 54e1 strb r1, [r4, r3] 800d3c6: 4602 mov r2, r0 800d3c8: f812 5b01 ldrb.w r5, [r2], #1 800d3cc: 2d2d cmp r5, #45 @ 0x2d 800d3ce: d005 beq.n 800d3dc <__sccl+0x48> 800d3d0: 2d5d cmp r5, #93 @ 0x5d 800d3d2: d016 beq.n 800d402 <__sccl+0x6e> 800d3d4: 2d00 cmp r5, #0 800d3d6: d0f1 beq.n 800d3bc <__sccl+0x28> 800d3d8: 462b mov r3, r5 800d3da: e7f2 b.n 800d3c2 <__sccl+0x2e> 800d3dc: 7846 ldrb r6, [r0, #1] 800d3de: 2e5d cmp r6, #93 @ 0x5d 800d3e0: d0fa beq.n 800d3d8 <__sccl+0x44> 800d3e2: 42b3 cmp r3, r6 800d3e4: dcf8 bgt.n 800d3d8 <__sccl+0x44> 800d3e6: 461a mov r2, r3 800d3e8: 3002 adds r0, #2 800d3ea: 3201 adds r2, #1 800d3ec: 4296 cmp r6, r2 800d3ee: 54a1 strb r1, [r4, r2] 800d3f0: dcfb bgt.n 800d3ea <__sccl+0x56> 800d3f2: 1af2 subs r2, r6, r3 800d3f4: 3a01 subs r2, #1 800d3f6: 42b3 cmp r3, r6 800d3f8: bfa8 it ge 800d3fa: 2200 movge r2, #0 800d3fc: 1c5d adds r5, r3, #1 800d3fe: 18ab adds r3, r5, r2 800d400: e7e1 b.n 800d3c6 <__sccl+0x32> 800d402: 4610 mov r0, r2 800d404: e7da b.n 800d3bc <__sccl+0x28> 0800d406 <_malloc_usable_size_r>: 800d406: f851 3c04 ldr.w r3, [r1, #-4] 800d40a: 1f18 subs r0, r3, #4 800d40c: 2b00 cmp r3, #0 800d40e: bfbc itt lt 800d410: 580b ldrlt r3, [r1, r0] 800d412: 18c0 addlt r0, r0, r3 800d414: 4770 bx lr 0800d416 <__submore>: 800d416: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800d41a: 460c mov r4, r1 800d41c: 6b49 ldr r1, [r1, #52] @ 0x34 800d41e: f104 0344 add.w r3, r4, #68 @ 0x44 800d422: 4299 cmp r1, r3 800d424: d11b bne.n 800d45e <__submore+0x48> 800d426: f44f 6180 mov.w r1, #1024 @ 0x400 800d42a: f7fe fcb5 bl 800bd98 <_malloc_r> 800d42e: b918 cbnz r0, 800d438 <__submore+0x22> 800d430: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800d434: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800d438: f44f 6380 mov.w r3, #1024 @ 0x400 800d43c: 63a3 str r3, [r4, #56] @ 0x38 800d43e: f894 3046 ldrb.w r3, [r4, #70] @ 0x46 800d442: 6360 str r0, [r4, #52] @ 0x34 800d444: f880 33ff strb.w r3, [r0, #1023] @ 0x3ff 800d448: f894 3045 ldrb.w r3, [r4, #69] @ 0x45 800d44c: f200 30fd addw r0, r0, #1021 @ 0x3fd 800d450: 7043 strb r3, [r0, #1] 800d452: f894 3044 ldrb.w r3, [r4, #68] @ 0x44 800d456: 7003 strb r3, [r0, #0] 800d458: 6020 str r0, [r4, #0] 800d45a: 2000 movs r0, #0 800d45c: e7ea b.n 800d434 <__submore+0x1e> 800d45e: 6ba6 ldr r6, [r4, #56] @ 0x38 800d460: 0077 lsls r7, r6, #1 800d462: 463a mov r2, r7 800d464: f7ff f9ce bl 800c804 <_realloc_r> 800d468: 4605 mov r5, r0 800d46a: 2800 cmp r0, #0 800d46c: d0e0 beq.n 800d430 <__submore+0x1a> 800d46e: eb00 0806 add.w r8, r0, r6 800d472: 4601 mov r1, r0 800d474: 4632 mov r2, r6 800d476: 4640 mov r0, r8 800d478: f7fd fafd bl 800aa76 800d47c: e9c4 570d strd r5, r7, [r4, #52] @ 0x34 800d480: f8c4 8000 str.w r8, [r4] 800d484: e7e9 b.n 800d45a <__submore+0x44> ... 0800d488 <_strtol_l.constprop.0>: 800d488: 2b24 cmp r3, #36 @ 0x24 800d48a: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800d48e: 4686 mov lr, r0 800d490: 4690 mov r8, r2 800d492: d801 bhi.n 800d498 <_strtol_l.constprop.0+0x10> 800d494: 2b01 cmp r3, #1 800d496: d106 bne.n 800d4a6 <_strtol_l.constprop.0+0x1e> 800d498: f7fd fab0 bl 800a9fc <__errno> 800d49c: 2316 movs r3, #22 800d49e: 6003 str r3, [r0, #0] 800d4a0: 2000 movs r0, #0 800d4a2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800d4a6: 460d mov r5, r1 800d4a8: 4833 ldr r0, [pc, #204] @ (800d578 <_strtol_l.constprop.0+0xf0>) 800d4aa: 462a mov r2, r5 800d4ac: f815 4b01 ldrb.w r4, [r5], #1 800d4b0: 5d06 ldrb r6, [r0, r4] 800d4b2: f016 0608 ands.w r6, r6, #8 800d4b6: d1f8 bne.n 800d4aa <_strtol_l.constprop.0+0x22> 800d4b8: 2c2d cmp r4, #45 @ 0x2d 800d4ba: d12d bne.n 800d518 <_strtol_l.constprop.0+0x90> 800d4bc: 2601 movs r6, #1 800d4be: 782c ldrb r4, [r5, #0] 800d4c0: 1c95 adds r5, r2, #2 800d4c2: f033 0210 bics.w r2, r3, #16 800d4c6: d109 bne.n 800d4dc <_strtol_l.constprop.0+0x54> 800d4c8: 2c30 cmp r4, #48 @ 0x30 800d4ca: d12a bne.n 800d522 <_strtol_l.constprop.0+0x9a> 800d4cc: 782a ldrb r2, [r5, #0] 800d4ce: f002 02df and.w r2, r2, #223 @ 0xdf 800d4d2: 2a58 cmp r2, #88 @ 0x58 800d4d4: d125 bne.n 800d522 <_strtol_l.constprop.0+0x9a> 800d4d6: 2310 movs r3, #16 800d4d8: 786c ldrb r4, [r5, #1] 800d4da: 3502 adds r5, #2 800d4dc: 2200 movs r2, #0 800d4de: f106 4c00 add.w ip, r6, #2147483648 @ 0x80000000 800d4e2: f10c 3cff add.w ip, ip, #4294967295 @ 0xffffffff 800d4e6: fbbc f9f3 udiv r9, ip, r3 800d4ea: 4610 mov r0, r2 800d4ec: fb03 ca19 mls sl, r3, r9, ip 800d4f0: f1a4 0730 sub.w r7, r4, #48 @ 0x30 800d4f4: 2f09 cmp r7, #9 800d4f6: d81b bhi.n 800d530 <_strtol_l.constprop.0+0xa8> 800d4f8: 463c mov r4, r7 800d4fa: 42a3 cmp r3, r4 800d4fc: dd27 ble.n 800d54e <_strtol_l.constprop.0+0xc6> 800d4fe: 1c57 adds r7, r2, #1 800d500: d007 beq.n 800d512 <_strtol_l.constprop.0+0x8a> 800d502: 4581 cmp r9, r0 800d504: d320 bcc.n 800d548 <_strtol_l.constprop.0+0xc0> 800d506: d101 bne.n 800d50c <_strtol_l.constprop.0+0x84> 800d508: 45a2 cmp sl, r4 800d50a: db1d blt.n 800d548 <_strtol_l.constprop.0+0xc0> 800d50c: 2201 movs r2, #1 800d50e: fb00 4003 mla r0, r0, r3, r4 800d512: f815 4b01 ldrb.w r4, [r5], #1 800d516: e7eb b.n 800d4f0 <_strtol_l.constprop.0+0x68> 800d518: 2c2b cmp r4, #43 @ 0x2b 800d51a: bf04 itt eq 800d51c: 782c ldrbeq r4, [r5, #0] 800d51e: 1c95 addeq r5, r2, #2 800d520: e7cf b.n 800d4c2 <_strtol_l.constprop.0+0x3a> 800d522: 2b00 cmp r3, #0 800d524: d1da bne.n 800d4dc <_strtol_l.constprop.0+0x54> 800d526: 2c30 cmp r4, #48 @ 0x30 800d528: bf0c ite eq 800d52a: 2308 moveq r3, #8 800d52c: 230a movne r3, #10 800d52e: e7d5 b.n 800d4dc <_strtol_l.constprop.0+0x54> 800d530: f1a4 0741 sub.w r7, r4, #65 @ 0x41 800d534: 2f19 cmp r7, #25 800d536: d801 bhi.n 800d53c <_strtol_l.constprop.0+0xb4> 800d538: 3c37 subs r4, #55 @ 0x37 800d53a: e7de b.n 800d4fa <_strtol_l.constprop.0+0x72> 800d53c: f1a4 0761 sub.w r7, r4, #97 @ 0x61 800d540: 2f19 cmp r7, #25 800d542: d804 bhi.n 800d54e <_strtol_l.constprop.0+0xc6> 800d544: 3c57 subs r4, #87 @ 0x57 800d546: e7d8 b.n 800d4fa <_strtol_l.constprop.0+0x72> 800d548: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800d54c: e7e1 b.n 800d512 <_strtol_l.constprop.0+0x8a> 800d54e: 1c53 adds r3, r2, #1 800d550: d108 bne.n 800d564 <_strtol_l.constprop.0+0xdc> 800d552: 2322 movs r3, #34 @ 0x22 800d554: 4660 mov r0, ip 800d556: f8ce 3000 str.w r3, [lr] 800d55a: f1b8 0f00 cmp.w r8, #0 800d55e: d0a0 beq.n 800d4a2 <_strtol_l.constprop.0+0x1a> 800d560: 1e69 subs r1, r5, #1 800d562: e006 b.n 800d572 <_strtol_l.constprop.0+0xea> 800d564: b106 cbz r6, 800d568 <_strtol_l.constprop.0+0xe0> 800d566: 4240 negs r0, r0 800d568: f1b8 0f00 cmp.w r8, #0 800d56c: d099 beq.n 800d4a2 <_strtol_l.constprop.0+0x1a> 800d56e: 2a00 cmp r2, #0 800d570: d1f6 bne.n 800d560 <_strtol_l.constprop.0+0xd8> 800d572: f8c8 1000 str.w r1, [r8] 800d576: e794 b.n 800d4a2 <_strtol_l.constprop.0+0x1a> 800d578: 0800e3d3 .word 0x0800e3d3 0800d57c <_strtol_r>: 800d57c: f7ff bf84 b.w 800d488 <_strtol_l.constprop.0> 0800d580 <__ascii_wctomb>: 800d580: 4603 mov r3, r0 800d582: 4608 mov r0, r1 800d584: b141 cbz r1, 800d598 <__ascii_wctomb+0x18> 800d586: 2aff cmp r2, #255 @ 0xff 800d588: d904 bls.n 800d594 <__ascii_wctomb+0x14> 800d58a: 228a movs r2, #138 @ 0x8a 800d58c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800d590: 601a str r2, [r3, #0] 800d592: 4770 bx lr 800d594: 2001 movs r0, #1 800d596: 700a strb r2, [r1, #0] 800d598: 4770 bx lr 0800d59a <_raise_r>: 800d59a: 291f cmp r1, #31 800d59c: b538 push {r3, r4, r5, lr} 800d59e: 4605 mov r5, r0 800d5a0: 460c mov r4, r1 800d5a2: d904 bls.n 800d5ae <_raise_r+0x14> 800d5a4: 2316 movs r3, #22 800d5a6: 6003 str r3, [r0, #0] 800d5a8: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800d5ac: bd38 pop {r3, r4, r5, pc} 800d5ae: 6bc2 ldr r2, [r0, #60] @ 0x3c 800d5b0: b112 cbz r2, 800d5b8 <_raise_r+0x1e> 800d5b2: f852 3021 ldr.w r3, [r2, r1, lsl #2] 800d5b6: b94b cbnz r3, 800d5cc <_raise_r+0x32> 800d5b8: 4628 mov r0, r5 800d5ba: f000 f831 bl 800d620 <_getpid_r> 800d5be: 4622 mov r2, r4 800d5c0: 4601 mov r1, r0 800d5c2: 4628 mov r0, r5 800d5c4: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800d5c8: f000 b818 b.w 800d5fc <_kill_r> 800d5cc: 2b01 cmp r3, #1 800d5ce: d00a beq.n 800d5e6 <_raise_r+0x4c> 800d5d0: 1c59 adds r1, r3, #1 800d5d2: d103 bne.n 800d5dc <_raise_r+0x42> 800d5d4: 2316 movs r3, #22 800d5d6: 6003 str r3, [r0, #0] 800d5d8: 2001 movs r0, #1 800d5da: e7e7 b.n 800d5ac <_raise_r+0x12> 800d5dc: 2100 movs r1, #0 800d5de: 4620 mov r0, r4 800d5e0: f842 1024 str.w r1, [r2, r4, lsl #2] 800d5e4: 4798 blx r3 800d5e6: 2000 movs r0, #0 800d5e8: e7e0 b.n 800d5ac <_raise_r+0x12> ... 0800d5ec : 800d5ec: 4b02 ldr r3, [pc, #8] @ (800d5f8 ) 800d5ee: 4601 mov r1, r0 800d5f0: 6818 ldr r0, [r3, #0] 800d5f2: f7ff bfd2 b.w 800d59a <_raise_r> 800d5f6: bf00 nop 800d5f8: 20000028 .word 0x20000028 0800d5fc <_kill_r>: 800d5fc: b538 push {r3, r4, r5, lr} 800d5fe: 2300 movs r3, #0 800d600: 4d06 ldr r5, [pc, #24] @ (800d61c <_kill_r+0x20>) 800d602: 4604 mov r4, r0 800d604: 4608 mov r0, r1 800d606: 4611 mov r1, r2 800d608: 602b str r3, [r5, #0] 800d60a: f7f7 ff64 bl 80054d6 <_kill> 800d60e: 1c43 adds r3, r0, #1 800d610: d102 bne.n 800d618 <_kill_r+0x1c> 800d612: 682b ldr r3, [r5, #0] 800d614: b103 cbz r3, 800d618 <_kill_r+0x1c> 800d616: 6023 str r3, [r4, #0] 800d618: bd38 pop {r3, r4, r5, pc} 800d61a: bf00 nop 800d61c: 20003508 .word 0x20003508 0800d620 <_getpid_r>: 800d620: f7f7 bf52 b.w 80054c8 <_getpid> 0800d624 <_init>: 800d624: b5f8 push {r3, r4, r5, r6, r7, lr} 800d626: bf00 nop 800d628: bcf8 pop {r3, r4, r5, r6, r7} 800d62a: bc08 pop {r3} 800d62c: 469e mov lr, r3 800d62e: 4770 bx lr 0800d630 <_fini>: 800d630: b5f8 push {r3, r4, r5, r6, r7, lr} 800d632: bf00 nop 800d634: bcf8 pop {r3, r4, r5, r6, r7} 800d636: bc08 pop {r3} 800d638: 469e mov lr, r3 800d63a: 4770 bx lr