Update version to 1.0.3. Everest timeout changed to 2000ms. CP Line improved, added hysteresis, debounce and EMA filtering

This commit is contained in:
raduet
2026-03-25 11:09:55 +03:00
parent 14b4f0595f
commit 317e418111
14 changed files with 20844 additions and 23690 deletions

View File

@@ -31,33 +31,6 @@ C_SRCS += \
../Core/Src/tim.c \
../Core/Src/usart.c
C_DEPS += \
./Core/Src/adc.d \
./Core/Src/board.d \
./Core/Src/can.d \
./Core/Src/charger_control.d \
./Core/Src/cp.d \
./Core/Src/crc.d \
./Core/Src/debug.d \
./Core/Src/gpio.d \
./Core/Src/main.d \
./Core/Src/meter.d \
./Core/Src/psu_control.d \
./Core/Src/rgb_controller.d \
./Core/Src/rtc.d \
./Core/Src/serial.d \
./Core/Src/serial_control.d \
./Core/Src/serial_handler.d \
./Core/Src/sma_filter.d \
./Core/Src/soft_rtc.d \
./Core/Src/stm32f1xx_hal_msp.d \
./Core/Src/stm32f1xx_it.d \
./Core/Src/syscalls.d \
./Core/Src/sysmem.d \
./Core/Src/system_stm32f1xx.d \
./Core/Src/tim.d \
./Core/Src/usart.d
OBJS += \
./Core/Src/adc.o \
./Core/Src/board.o \
@@ -85,6 +58,33 @@ OBJS += \
./Core/Src/tim.o \
./Core/Src/usart.o
C_DEPS += \
./Core/Src/adc.d \
./Core/Src/board.d \
./Core/Src/can.d \
./Core/Src/charger_control.d \
./Core/Src/cp.d \
./Core/Src/crc.d \
./Core/Src/debug.d \
./Core/Src/gpio.d \
./Core/Src/main.d \
./Core/Src/meter.d \
./Core/Src/psu_control.d \
./Core/Src/rgb_controller.d \
./Core/Src/rtc.d \
./Core/Src/serial.d \
./Core/Src/serial_control.d \
./Core/Src/serial_handler.d \
./Core/Src/sma_filter.d \
./Core/Src/soft_rtc.d \
./Core/Src/stm32f1xx_hal_msp.d \
./Core/Src/stm32f1xx_it.d \
./Core/Src/syscalls.d \
./Core/Src/sysmem.d \
./Core/Src/system_stm32f1xx.d \
./Core/Src/tim.d \
./Core/Src/usart.d
# Each subdirectory must supply rules for building sources it contributes
Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk