raduet/CCSModuleSW30Web
1
0
Fork 0
forked from achamaikin/CCSModuleSW30Web
Code Pull Requests Activity

Clock RTC from LSI instead of LSE (v1.0.34).

Browse Source 
Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
raduet
2026-09-22 16:03:29 +02:00
co-authored by Cursor
parent 644fcf1692
commit 1f06c3c363
3 changed files with 11 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files
CCSModuleSW30Web.ioc
+6 -6
View File
@@ -311,10 +311,10 @@ PC12.GPIOParameters=GPIO_Label
PC12.GPIO_Label=HEATER PC12.GPIO_Label=HEATER
PC12.Mode=Asynchronous PC12.Mode=Asynchronous
PC12.Signal=UART5_TX PC12.Signal=UART5_TX
PC14-OSC32_IN.Mode=LSE-External-Oscillator PC14-OSC32_IN.Locked=true
PC14-OSC32_IN.Signal=RCC_OSC32_IN PC14-OSC32_IN.Signal=GPIO_Analog
PC15-OSC32_OUT.Mode=LSE-External-Oscillator PC15-OSC32_OUT.Locked=true
PC15-OSC32_OUT.Signal=RCC_OSC32_OUT PC15-OSC32_OUT.Signal=GPIO_Analog
PC2.GPIOParameters=GPIO_Speed,GPIO_Label PC2.GPIOParameters=GPIO_Speed,GPIO_Label
PC2.GPIO_Label=DBG1 PC2.GPIO_Label=DBG1
PC2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH PC2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
@@ -462,8 +462,8 @@ RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.Prediv1Source=RCC_PREDIV1_SOURCE_PLL2 RCC.Prediv1Source=RCC_PREDIV1_SOURCE_PLL2
RCC.Prediv2=RCC_HSE_PREDIV2_DIV5 RCC.Prediv2=RCC_HSE_PREDIV2_DIV5
RCC.Prediv2FreqValue=5000000 RCC.Prediv2FreqValue=5000000
RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSI
RCC.RTCFreq_Value=32768 RCC.RTCFreq_Value=40000
RCC.SYSCLKFreq_VALUE=72000000 RCC.SYSCLKFreq_VALUE=72000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.TimSysFreq_Value=72000000 RCC.TimSysFreq_Value=72000000
Core/Inc/main.h
+1 -1
View File
@@ -27,7 +27,7 @@ extern "C" {
/* USER CODE BEGIN EC */ /* USER CODE BEGIN EC */
#define FW_VERSION_MAJOR 1 #define FW_VERSION_MAJOR 1
#define FW_VERSION_MINOR 0 #define FW_VERSION_MINOR 0
#define FW_VERSION_PATCH 36 #define FW_VERSION_PATCH 34
/* USER CODE END EC */ /* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
Core/Src/main.c
+4 -3
View File
@@ -261,11 +261,12 @@ void SystemClock_Config(void)
/** Initializes the RCC Oscillators according to the specified parameters /** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure. * in the RCC_OscInitTypeDef structure.
*/ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5; RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5;
RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2; RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
@@ -292,7 +293,7 @@ void SystemClock_Config(void)
Error_Handler(); Error_Handler();
} }
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC; PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC;
PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{ {