latest version

.project

@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <projectDescription>
-	<name>GbTModuleSW</name>
+	<name>GbTModuleEV</name>
 	<comment></comment>
 	<projects>
 	</projects>

Core/Inc/board.h

@@ -11,18 +11,31 @@
 void GBT_Lock(uint8_t state);
 
 typedef enum{
-	RELAY_AUX,
 	RELAY_CC,
+	RELAY_1,
+	RELAY_2,
+	RELAY_3,
+	RELAY_4,
+	RELAY_5,
 
 }relay_t;
 
+typedef enum{
+	IN_ISO,
+	IN_ESTOP,
+	IN_FB1,
+	IN_FB2,
+	IN_SW0,
+	IN_SW1,
+	IN_0,
+	IN_ACOK,
+}inputNum_t;
+
 void RELAY_Write(relay_t num, uint8_t state);
 void Init_Peripheral();
-uint8_t GBT_LockGetState();
-void GBT_Lock(uint8_t state);
-uint8_t SW_GetAddr();
 void ADC_Select_Channel(uint32_t ch);
 int16_t GBT_ReadTemp(uint8_t ch);
 
+uint8_t IN_ReadInput(inputNum_t input_n);
 
 #endif /* SRC_BOARD_H_ */

Core/Inc/charger_gbt.h

@@ -41,34 +41,21 @@ typedef enum{
 
 }gbtCcState_t;
 
-typedef enum __attribute__((packed)){
+/* Стейты GB/T со стороны EV: постоянно шлём свой пакет, ждём ответ → переход, шлём другой пакет */
-	CONN_NO_ERROR = 0,
-	CONN_ERR_INSULATION = 1,
-	CONN_ERR_EMERGENCY = 2,
-	CONN_ERR_DOOR_OPEN = 3,
-	CONN_ERR_LOCK = 4,
-	CONN_ERR_CONN_TEMP = 5,
-
-}CONN_Error_t;
-
 typedef enum{
-	GBT_DISABLED = 0x10,
+	GBT_DISABLED = 0x10,                  // сессия выключена
-//	GBT_S0_UNCONNECTED = 0x10, //СС1 12V/6V СС2 12V
+	GBT_EV_CONNECTING = 0x13,               // ждём CHM (ничего не шлём), получили → шлём BHM, переход
-//	GBT_S1_CONNECTED = 0x11,   //СС1 4V СС2 4V (6V)
+	GBT_EV_SEND_BHM_WAIT_CRM = 0x14,      // шлём BHM, ждём CRM(0x00)
-//	GBT_S2_LOCKED = 0x12,      //
+	GBT_EV_HANDSHAKE = 0x15,           // изотест на EV не делаем → сразу дальше
-	GBT_S3_STARTED = 0x13,     // 12V AUX
+	GBT_EV_RECOGNITION = 0x16,      // шлём BRM, ждём CRM(0xAA)
-	GBT_S31_WAIT_BHM = 0x14,		// testing isolation, send CHM receive BHM
+	GBT_EV_CHARGING_PARAMETERS = 0x17,      // шлём BCP, ждём CML → шлём BRO(0x00), BRO(0xAA)
-	GBT_S4_ISOTEST = 0x15,		// testing isolation, send CHM receive BHM
+	GBT_EV_BMS_INIT = 0x18,      // пауза 1.5 с (инициализация зарядника)
-	GBT_S5_BAT_INFO = 0x16, 	// identifying BMS, send CRM receive BRM (long)
+	GBT_EV_WAIT_CHARGER_READY = 0x19,     // ждём CRO(0xAA) или 500 мс → шлём BCL
-	GBT_S6_BAT_STAT = 0x17,	// send CRM(AA), receive BCP (long)
+	GBT_EV_CHARGING = 0x20,               // шлём BCL (запрос U/I) → зарядка
-	GBT_S7_BMS_WAIT = 0x18,	// wait for BMS, send CTS+CML receive BRO(00), next BRO(AA)
+	GBT_STOP = 0x30,                      // остановка: EV/EVSE запросили стоп
-	GBT_S8_INIT_CHARGER = 0x19,// starting power modules, send CRO(00)
+	GBT_STOP_CSD = 0x31,                  // ожидание CSD от EVSE
-	GBT_S9_WAIT_BCL = 0x20,	// waiting for BCL (requested voltage), send CRO(00)
+	GBT_ERROR = 0x32,                     // ошибка
-	GBT_S10_CHARGING = 0x21,	// charging, contactor ON, send CCS, receiving BCL+BCS+BSM
+	GBT_COMPLETE = 0x33,                  // сессия завершена
-	GBT_STOP = 0x22,			// normal stop
-	GBT_STOP_CSD = 0x23,			// normal stop
-	GBT_ERROR = 0x24,			// Error
-	GBT_COMPLETE = 0x25,
 
 }gbtState_t;
 
@@ -166,31 +153,32 @@ typedef struct {
 }GBT_CSD_t;
 
 
-typedef struct {
+// typedef struct {
-	uint8_t enablePSU;
+// 	uint8_t enablePSU;
-	uint16_t requestedVoltage; 		// 0.1V/bit
+// 	uint16_t requestedVoltage; 		// 0.1V/bit
-	uint16_t requestedCurrent; 		// 0.1A/bit
+// 	uint16_t requestedCurrent; 		// 0.1A/bit
-	uint8_t chargingMode; 			// 0x01 - CV, 0x02 - CC
+// 	uint8_t chargingMode; 			// 0x01 - CV, 0x02 - CC
-	uint8_t chargingPercentage; 			//
+// 	uint8_t chargingPercentage; 			//
-	uint16_t chargingRemainingTimeMin; 			//
+// 	uint16_t chargingRemainingTimeMin; 			//
-	uint16_t chargingElapsedTimeMin; 			//
+// 	uint16_t chargingElapsedTimeMin; 			//
-	uint8_t chargingElapsedTimeSec; 			//
+// 	uint8_t chargingElapsedTimeSec; 			//
 
-	CONN_State_t connectorState;
+// 	CONN_State_t connectorState;
-	CONN_Error_t outputError; // 0 if okay
+// 	CONN_Error_t outputError; // 0 if okay
+// 	uint8_t EvConnected;
 
 
-}GBT_EDCAN_Output_t;
+// }GBT_EDCAN_Output_t;
 
-typedef struct {
+// typedef struct {
-	uint8_t PSU_Status;
+// 	uint8_t PSU_Status;
-	uint16_t measuredVoltage; 		// 0.1V/bit
+// 	uint16_t measuredVoltage; 		// 0.1V/bit
-	uint16_t measuredCurrent; 		// 0.1A/bit
+// 	uint16_t measuredCurrent; 		// 0.1A/bit
 
-	CONN_Control_t chargeControl;
+// 	CONN_Control_t chargeControl;
-	CONN_Error_t chargingError; // 0 if okay
+// 	CONN_Error_t chargingError; // 0 if okay
 
-}GBT_EDCAN_Input_t;
+// }GBT_EDCAN_Input_t;
 
 
 /*	500 - Power Supply
@@ -222,6 +210,7 @@ extern gbtState_t GBT_State;
 
 extern ADC_HandleTypeDef hadc1;
 
+extern GBT_BHM_t GBT_MaxVoltage;
 extern GBT_BRM_t GBT_EVInfo;
 extern GBT_BCP_t GBT_BATStat;
 extern GBT_BCS_t GBT_ChargingStatus;
@@ -239,7 +228,6 @@ extern uint8_t GBT_Charger_Enable;
 extern GBT_StopSource_t GBT_StopSource;
 
 void GBT_Init();
-void GBT_Start();
 void GBT_Reset();
 //void GBT_Stop(uint32_t causecode);
 void GBT_StopEV(uint32_t causecode);
@@ -258,15 +246,15 @@ void GBT_Delay(uint32_t delay);
 uint32_t GBT_StateTick();
 void J_SendPacket(uint32_t PGN, uint8_t pri, uint8_t DLC, uint8_t *data);
 
-void GBT_SendCCS();
+// EV-side GB/T packets (EV->EVSE)
-void GBT_SendCST(uint32_t Cause);
+void GBT_SendBHM(void);
-void GBT_SendCRO(uint8_t state);
+void GBT_SendBRM(void);
-void GBT_SendCML();
+void GBT_SendBCP(void);
-void GBT_SendCTS();
+void GBT_SendBRO(uint8_t state);
-void GBT_SendCHM();
+void GBT_SendBCL(void);
-void GBT_SendCRM(uint8_t state);
+void GBT_SendBCS(void);
-void GBT_SendCSD();
+void GBT_SendBSM(void);
-void GBT_SendCEM(uint32_t ErrorCode);
+void GBT_SendBSD(void);
 
 
 #endif /* INC_CHARGER_GBT_H_ */

Core/Inc/connector.h

@@ -10,37 +10,73 @@
 
 #include "main.h"
 
-
-
-// Статус
-// статус подключения к автомобилю
-
 typedef enum __attribute__((packed)) {
-	CONN_Initializing = 1,
+	Unknown,
-	CONN_Faulted = 2,
+    Unplugged,
-	CONN_Available = 3,
+    Disabled,
-	CONN_Preparing = 4,// to charge
+    Preparing,
-	CONN_Charging = 5,
+    AuthRequired,
-	CONN_Finishing = 6,//, waiting to disconnect
+    WaitingForEnergy,
-	CONN_Suspended_EV = 7,
+    ChargingPausedEV,
-	CONN_Suspended_EVSE = 8,
+    ChargingPausedEVSE,
-	//Reserved
+    Charging,
+    AuthTimeout,
+    Finished,
+    FinishedEVSE,
+    FinishedEV,
+	Replugging
 } CONN_State_t;
 
-// Управление
+typedef enum __attribute__((packed)){
-// Разрешение на зарядку
+	CMD_NONE = 0,
-
+	CMD_STOP = 1,
-typedef enum __attribute__((packed)) {
+	CMD_START = 2,
-	CHARGING_NOT_ALLOWED = 1,
+	CMD_FORCE_UNLOCK = 3,
-	CHARGING_ALLOWED = 2,
+	CMD_REPLUG = 4,
-	FORCE_UNLOCK = 3,
-
 } CONN_Control_t;
-#include "charger_gbt.h"
 
+typedef enum __attribute__((packed)){
+	CONN_NO_ERROR = 0,
+	CONN_ERR_INSULATION = 1,
+	CONN_ERR_EMERGENCY = 2,
+	CONN_ERR_DOOR_OPEN = 3,
+	CONN_ERR_LOCK = 4,
+	CONN_ERR_CONN_TEMP = 5,
+} CONN_Error_t;
 
 extern CONN_State_t connectorState;
 
+// Глобальная структура состояния коннектора и зарядки со стороны тачки (EV),
+// по возможности совместимая по именам полей с ChargingConnector_t на стороне станции.
+typedef struct {
+	CONN_Control_t connControl;   // 0
+	CONN_State_t   connState;     // 1
+
+	uint8_t  SOC;                 // State of charge [%]               // 2
+	uint32_t Power;               // Power [W]                         // 3..6
+	uint32_t Energy;              // Energy [Wh]                       // 7..10
+
+	uint16_t RequestedVoltage;    // 1V/bit
+	uint16_t RequestedCurrent;    // 0.1A/bit
+
+	uint16_t MeasuredVoltage;     // 1V/bit
+	uint16_t MeasuredCurrent;     // 0.1A/bit
+
+	uint16_t MeasuredVoltageSE;     // 1V/bit
+	uint16_t MeasuredCurrentSE;     // 0.1A/bit
+
+	uint8_t  ContactorEnabled;        // 1 - enabled, 0 - disabled (команда на замыкание контактора)
+
+	CONN_Error_t chargingError;   // 0 если ок
+	uint8_t  EvseConnected;
+	uint32_t ChargingTime;        // seconds
+	uint8_t  enableLoad;          // 1 - enabled, 0 - disabled (команда на включение контактора)
+
+	uint8_t  connectorType;       // 0 - NONE, 1 - GBT, 2 - CCS (для EV всегда GBT)
+} CONN_t;
+
+extern CONN_t CONN;
+
 void CONN_Init();
 void CONN_Task();
 void CONN_SetState(CONN_State_t state);

Core/Inc/edcan_config.h

@@ -2,7 +2,9 @@
 #define EDCAN_CONFIG_H
 
 #define DEVICE_ID 0x20
-#define FWVER 1
+#define FWVER_MAJOR 1
+#define FWVER_MINOR 0
+#define FWVER_PATCH 0
 
 //если используется STM32 с одним каном
 //#define ED_CANx
@@ -22,4 +24,6 @@ extern CAN_HandleTypeDef hcan2;
 //можно уменьшать для уменьшения объема потребляемой памяти
 #define BUFFER_SIZE 256
 
+#define EDCAN_BOOTLOADER_MAGIC_ADDR   0x2000FF00u
+
 #endif //EDCAN_CONFIG_H

Core/Inc/lock.h

@@ -1,36 +0,0 @@
-/*
- * lock.h
- *
- *  Created on: Jul 31, 2024
- *      Author: colorbass
- */
-
- #ifndef INC_LOCK_H_
- #define INC_LOCK_H_
- 
- #include "main.h"
- #include "stdbool.h"
- 
- 
- void GBT_Lock(uint8_t state);
- void GBT_ManageLockSolenoid();
- void GBT_ManageLockMotor();
- uint8_t GBT_LockGetState();
- void GBT_ForceLock(uint8_t state);
- void GBT_ResetErrorTimeout();
- 
- typedef struct {
- //    uint8_t state;
-     uint8_t demand;
-     uint8_t error;
-     uint8_t action_requested;  // 0 = unlock, 1 = lock, 255 = no action
-     uint8_t motor_state;        // 0 = idle, 1 = motor_on, 2 = waiting_off
-     uint32_t last_action_time;  // время последнего изменения состояния мотора
-     uint8_t retry_count;        // счетчик попыток
-     uint32_t error_tick;        // время установки ошибки (для таймаута сброса)
- } GBT_LockState_t;
- 
- extern GBT_LockState_t GBT_LockState;
- 
- #endif /* INC_LOCK_H_ */
- 

Core/Inc/main.h

@@ -57,6 +57,10 @@ void Error_Handler(void);
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/
+#define IN_SW0_Pin GPIO_PIN_1
+#define IN_SW0_GPIO_Port GPIOA
+#define IN_SW1_Pin GPIO_PIN_2
+#define IN_SW1_GPIO_Port GPIOA
 #define ADC_CC1_Pin GPIO_PIN_6
 #define ADC_CC1_GPIO_Port GPIOA
 #define LOCK_A_Pin GPIO_PIN_4
@@ -67,18 +71,36 @@ void Error_Handler(void);
 #define ADC_NTC1_GPIO_Port GPIOB
 #define ADC_NTC2_Pin GPIO_PIN_1
 #define ADC_NTC2_GPIO_Port GPIOB
-#define LOCK_FB_Pin GPIO_PIN_9
+#define IN0_Pin GPIO_PIN_7
-#define LOCK_FB_GPIO_Port GPIOE
+#define IN0_GPIO_Port GPIOE
-#define ADDR_0_Pin GPIO_PIN_10
+#define RELAY5_Pin GPIO_PIN_8
-#define ADDR_0_GPIO_Port GPIOE
+#define RELAY5_GPIO_Port GPIOE
-#define ADDR_1_Pin GPIO_PIN_11
+#define RELAY4_Pin GPIO_PIN_9
-#define ADDR_1_GPIO_Port GPIOE
+#define RELAY4_GPIO_Port GPIOE
+#define RELAY3_Pin GPIO_PIN_10
+#define RELAY3_GPIO_Port GPIOE
+#define RELAY2_Pin GPIO_PIN_11
+#define RELAY2_GPIO_Port GPIOE
+#define RELAY1_Pin GPIO_PIN_12
+#define RELAY1_GPIO_Port GPIOE
+#define AC_OK_Pin GPIO_PIN_14
+#define AC_OK_GPIO_Port GPIOE
 #define RELAY_CC_Pin GPIO_PIN_15
-#define RELAY_CC_GPIO_Port GPIOE
+#define RELAY_CC_GPIO_Port GPIOA
+#define RELAY_DC_Pin GPIO_PIN_3
+#define RELAY_DC_GPIO_Port GPIOD
 #define USART2_DIR_Pin GPIO_PIN_4
 #define USART2_DIR_GPIO_Port GPIOD
-#define RELAY_AUX_Pin GPIO_PIN_4
+#define IN_ESTOP_Pin GPIO_PIN_7
-#define RELAY_AUX_GPIO_Port GPIOB
+#define IN_ESTOP_GPIO_Port GPIOD
+#define IN_FB2_Pin GPIO_PIN_3
+#define IN_FB2_GPIO_Port GPIOB
+#define IN_FB1_Pin GPIO_PIN_4
+#define IN_FB1_GPIO_Port GPIOB
+#define EE_WP_Pin GPIO_PIN_7
+#define EE_WP_GPIO_Port GPIOB
+#define ISO_IN_Pin GPIO_PIN_1
+#define ISO_IN_GPIO_Port GPIOE
 
 /* USER CODE BEGIN Private defines */
 

Core/Inc/rgb_controller.h

@@ -0,0 +1,54 @@
+/*
+ * rgb_controller.h
+ *
+ *  Created on: Jul 25, 2024
+ *      Author: colorbass
+ */
+
+#ifndef INC_RGB_CONTROLLER_H_
+#define INC_RGB_CONTROLLER_H_
+
+#include "main.h"
+
+#pragma pack(push, 1)
+
+typedef struct{
+	uint8_t R;
+	uint8_t G;
+	uint8_t B;
+
+}RGB_t;
+
+typedef struct{
+	RGB_t Color1;
+	uint8_t Tr; //20ms/step, 5.1s max
+	uint8_t Th; //20ms/step, 5.1s max
+	uint8_t Tf; //20ms/step, 5.1s max
+	uint8_t Tl; //20ms/step, 5.1s max
+	RGB_t Color2;
+	//uint8_t rsvd[6]; // 6 bytes reserved
+}RGB_Cycle_t;
+
+#pragma pack(pop)
+
+typedef enum{
+	LED_RISING,
+	LED_HIGH,
+	LED_FALLING,
+	LED_LOW,
+}RGB_Phase_t;
+
+typedef struct{
+	uint8_t state; // 0 1 2 3
+	uint16_t tick;
+	RGB_t color;
+	uint8_t phasesync;
+}RGB_State_t;
+
+void LED_Task();
+void LED_Write();
+void LED_Init();
+
+
+#endif /* INC_RGB_CONTROLLER_H_ */
+

Core/Inc/stm32f1xx_hal_conf.h

@@ -64,7 +64,7 @@
 /*#define HAL_SMARTCARD_MODULE_ENABLED   */
 /*#define HAL_SPI_MODULE_ENABLED   */
 /*#define HAL_SRAM_MODULE_ENABLED   */
-/*#define HAL_TIM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
 #define HAL_UART_MODULE_ENABLED
 /*#define HAL_USART_MODULE_ENABLED   */
 /*#define HAL_WWDG_MODULE_ENABLED   */

Core/Inc/stm32f1xx_it.h

@@ -22,7 +22,7 @@
 #define __STM32F1xx_IT_H
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Private includes ----------------------------------------------------------*/

Core/Inc/tim.h

@@ -0,0 +1,54 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    tim.h
+  * @brief   This file contains all the function prototypes for
+  *          the tim.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2026 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TIM_H__
+#define __TIM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern TIM_HandleTypeDef htim4;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_TIM4_Init(void);
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __TIM_H__ */
+

Core/Inc/usart.h

@@ -32,13 +32,22 @@ extern "C" {
 
 /* USER CODE END Includes */
 
+extern UART_HandleTypeDef huart5;
+
+extern UART_HandleTypeDef huart1;
+
 extern UART_HandleTypeDef huart2;
 
+extern UART_HandleTypeDef huart3;
+
 /* USER CODE BEGIN Private defines */
 
 /* USER CODE END Private defines */
 
+void MX_UART5_Init(void);
+void MX_USART1_UART_Init(void);
 void MX_USART2_UART_Init(void);
+void MX_USART3_UART_Init(void);
 
 /* USER CODE BEGIN Prototypes */
 

Core/Src/adc.c

@@ -84,13 +84,14 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
     __HAL_RCC_GPIOA_CLK_ENABLE();
     __HAL_RCC_GPIOB_CLK_ENABLE();
     /**ADC1 GPIO Configuration
+    PA3     ------> ADC1_IN3
     PA6     ------> ADC1_IN6
     PB0     ------> ADC1_IN8
     PB1     ------> ADC1_IN9
     */
-    GPIO_InitStruct.Pin = ADC_CC1_Pin;
+    GPIO_InitStruct.Pin = GPIO_PIN_3|ADC_CC1_Pin;
     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-    HAL_GPIO_Init(ADC_CC1_GPIO_Port, &GPIO_InitStruct);
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
     GPIO_InitStruct.Pin = ADC_NTC1_Pin|ADC_NTC2_Pin;
     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
@@ -114,11 +115,12 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
     __HAL_RCC_ADC1_CLK_DISABLE();
 
     /**ADC1 GPIO Configuration
+    PA3     ------> ADC1_IN3
     PA6     ------> ADC1_IN6
     PB0     ------> ADC1_IN8
     PB1     ------> ADC1_IN9
     */
-    HAL_GPIO_DeInit(ADC_CC1_GPIO_Port, ADC_CC1_Pin);
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3|ADC_CC1_Pin);
 
     HAL_GPIO_DeInit(GPIOB, ADC_NTC1_Pin|ADC_NTC2_Pin);
 

Core/Src/board.c

@@ -14,11 +14,47 @@ extern ADC_HandleTypeDef hadc1;
 //GBT_TEMP_SENSORS
 
 void RELAY_Write(relay_t num, uint8_t state){
-	if(num==RELAY_AUX)HAL_GPIO_WritePin(RELAY_AUX_GPIO_Port, RELAY_AUX_Pin, state);
+	if(num==RELAY_1)HAL_GPIO_WritePin(RELAY1_GPIO_Port, RELAY1_Pin, state);
+	if(num==RELAY_2)HAL_GPIO_WritePin(RELAY2_GPIO_Port, RELAY2_Pin, state);
+	if(num==RELAY_3)HAL_GPIO_WritePin(RELAY3_GPIO_Port, RELAY3_Pin, state);
+	if(num==RELAY_4)HAL_GPIO_WritePin(RELAY4_GPIO_Port, RELAY4_Pin, state);
+	if(num==RELAY_5)HAL_GPIO_WritePin(RELAY5_GPIO_Port, RELAY5_Pin, state);
 	if(num==RELAY_CC)HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, state);
 
 }
 
+uint8_t IN_ReadInput(inputNum_t input_n){
+	switch(input_n){
+		case IN_ISO:
+			return HAL_GPIO_ReadPin(ISO_IN_GPIO_Port, ISO_IN_Pin);
+			break;
+		case IN_ESTOP:
+			return HAL_GPIO_ReadPin(IN_ESTOP_GPIO_Port, IN_ESTOP_Pin);
+			break;
+        case IN_FB1:
+            return HAL_GPIO_ReadPin(IN_FB1_GPIO_Port, IN_FB1_Pin);
+            break;
+        case IN_FB2:
+            return HAL_GPIO_ReadPin(IN_FB2_GPIO_Port, IN_FB2_Pin);
+            break;
+        case IN_SW0:
+            return HAL_GPIO_ReadPin(IN_SW0_GPIO_Port, IN_SW0_Pin);
+            break;
+        case IN_SW1:
+            return HAL_GPIO_ReadPin(IN_SW1_GPIO_Port, IN_SW1_Pin);
+            break;
+        case IN_0:
+            return HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin);
+            break;
+        case IN_ACOK:
+            return HAL_GPIO_ReadPin(AC_OK_GPIO_Port, AC_OK_Pin);
+            break;
+        default:
+            return 0;
+            break;
+	}
+}
+
 uint8_t GetBoardTemp(){
 	//TODO
 //	HAL_ADC_Start(&hadc1); // start the adc
@@ -33,7 +69,11 @@ uint8_t GetBoardTemp(){
 
 void Init_Peripheral(){
     HAL_ADCEx_Calibration_Start(&hadc1);
-    RELAY_Write(RELAY_AUX, 0);
+    RELAY_Write(RELAY_1, 0);
+    RELAY_Write(RELAY_2, 0);
+    RELAY_Write(RELAY_3, 0);
+    RELAY_Write(RELAY_4, 0);
+    RELAY_Write(RELAY_5, 0);
     RELAY_Write(RELAY_CC, 1);
 
 }
@@ -114,21 +154,21 @@ void ADC_Select_Channel(uint32_t ch) {
         Error_Handler();
     }
 }
-
+//
-uint8_t SW_GetAddr(){
+//uint8_t SW_GetAddr(){
-	if(!HAL_GPIO_ReadPin(ADDR_0_GPIO_Port, ADDR_0_Pin)){
+//	if(!HAL_GPIO_ReadPin(ADDR_0_GPIO_Port, ADDR_0_Pin)){
-		if(!HAL_GPIO_ReadPin(ADDR_1_GPIO_Port, ADDR_1_Pin)){
+//		if(!HAL_GPIO_ReadPin(ADDR_1_GPIO_Port, ADDR_1_Pin)){
-			return 0x23;
+//			return 0x23;
-		}else{
+//		}else{
-			return 0x21;
+//			return 0x21;
-		}
+//		}
-
+//
-	}else{
+//	}else{
-		if(!HAL_GPIO_ReadPin(ADDR_1_GPIO_Port, ADDR_1_Pin)){
+//		if(!HAL_GPIO_ReadPin(ADDR_1_GPIO_Port, ADDR_1_Pin)){
-			return 0x22;
+//			return 0x22;
-		}else{
+//		}else{
-			return 0x20;
+//			return 0x20;
-		}
+//		}
-
+//
-	}
+//	}
-}
+//}

Core/Src/can.c

@@ -47,7 +47,7 @@ void MX_CAN1_Init(void)
   hcan1.Init.TimeTriggeredMode = DISABLE;
   hcan1.Init.AutoBusOff = ENABLE;
   hcan1.Init.AutoWakeUp = ENABLE;
-  hcan1.Init.AutoRetransmission = DISABLE;
+  hcan1.Init.AutoRetransmission = ENABLE;
   hcan1.Init.ReceiveFifoLocked = DISABLE;
   hcan1.Init.TransmitFifoPriority = ENABLE;
   if (HAL_CAN_Init(&hcan1) != HAL_OK)

Core/Src/charger_gbt.c

@@ -13,7 +13,6 @@
 #include "j1939.h"
 #include "string.h"
 #include "edcan.h"
-#include "lock.h"
 #include "connector.h"
 #include "soft_rtc.h"
 
@@ -23,14 +22,14 @@ gbtState_t GBT_State;
 uint32_t GBT_state_tick; //Tick after state switch
 uint32_t GBT_delay_start;
 uint32_t GBT_delay;
-uint8_t GBT_BAT_INFO_recv;
+/* Флаги приёма пакетов от EVSE (EV получает) */
-uint8_t GBT_BAT_STAT_recv;
+uint8_t GBT_CHM_recv;   // CHM получен (0x2600) → отвечаем BHM
-uint8_t GBT_BRO_recv;
+uint8_t GBT_CRM_recv;   // CRM получен (0x0100) → отвечаем BRM или BCP
-uint8_t GBT_BHM_recv;
+uint8_t GBT_CML_recv;   // CML получен (0x0800) → отвечаем BRO
-uint8_t GBT_BSD_recv;
+uint8_t GBT_CST_recv;   // CST получен (0x1A00) → EVSE запросил стоп, переходим в STOP
-uint8_t EV_ready;
+uint8_t GBT_CSD_recv;   // CSD получен (0x1D00) → финальный отчёт EVSE, переходим в STOP_CSD
-//uint8_t GBT_Charger_Enable; //FIX
+
-//uint8_t GBT_Charger_Permission;//FIX
+uint8_t GBT_CRO_val;    // последнее значение CRO от EVSE (0x0A00)
 
 GBT_CML_t GBT_MaxLoad;
 GBT_CRM_t GBT_ChargerInfo;
@@ -58,28 +57,10 @@ uint32_t GBT_ErrorCode;
 
 GBT_StopSource_t GBT_StopSource;
 
-extern GBT_EDCAN_Output_t GBT_EDCAN_Output;
-extern GBT_EDCAN_Input_t GBT_EDCAN_Input;
-
-
 void GBT_Init(){
 	GBT_State = GBT_DISABLED;
-	GBT_EDCAN_Input.chargeControl = CHARGING_NOT_ALLOWED;
+	CONN.connControl = CMD_NONE;
 	GBT_Reset();
-
-
-	GBT_MaxLoad.maxOutputVoltage = 1000*10;
-	GBT_MaxLoad.minOutputVoltage = 1500; //150V
-	//GBT_MaxLoad[conn].maxOutputCurrent = 4000 - (GBT_MAX_CURRENT*10);	//250A
-	GBT_MaxLoad.maxOutputCurrent = 4000 - (100*10*2); //200A
-	GBT_MaxLoad.minOutputCurrent = 3990; //400 - 1A
-
-	//TODO Linux registers
-	GBT_ChargerInfo.chargerLocation[0] = 'R';
-	GBT_ChargerInfo.chargerLocation[1] = 'U';
-	GBT_ChargerInfo.chargerLocation[2] = 'S';
-	GBT_ChargerInfo.chargerNumber = 00001;
-
 }
 
 
@@ -88,78 +69,48 @@ void GBT_ChargerTask(){
 	//GBT_LockTask();
 	if(j_rx.state == 2){
 		switch (j_rx.PGN){
-		case 0x2700: //PGN BHM
+		case 0x2600: // CHM EVSE->EV (старт/версия GB/T)
-			GBT_BHM_recv = 1;
+			GBT_CHM_recv = 1;
-			memcpy (&GBT_MaxVoltage, j_rx.data, sizeof(GBT_MaxVoltage));
-
 			break;
 
-		case 0x0200: //PGN BRM LONG
+		case 0x0100: // CRM EVSE->EV (идентификация зарядника, 0x00 или 0xAA)
-			GBT_BAT_INFO_recv = 1;
+			memcpy(&GBT_ChargerInfo, j_rx.data, sizeof(GBT_ChargerInfo));
-			memcpy (&GBT_EVInfo, j_rx.data, sizeof(GBT_EVInfo));
+			GBT_CRM_recv = 1;
-
-		    break;
-
-		case 0x0600: //PGN BCP LONG
-			GBT_BAT_STAT_recv = 1;
-			memcpy (&GBT_BATStat, j_rx.data, sizeof(GBT_BATStat));
 			break;
 
-		case 0x0900: //PGN BRO
+		case 0x0800: // CML EVSE->EV (макс. параметры зарядника)
-			GBT_BRO_recv = 1;
+			memcpy(&GBT_MaxLoad, j_rx.data, sizeof(GBT_MaxLoad));
-			if(j_rx.data[0] == 0xAA) EV_ready = 1;
+			GBT_CML_recv = 1;
-			else EV_ready = 0;
-			GBT_BRO = j_rx.data[0];
 			break;
 
-		case 0x1000: //PGN BCL
+		case 0x0700: // CTS EVSE->EV (time sync)
-			//TODO: power block
+			// Пока не используем, но можем сохранить время при необходимости
-			memcpy (&GBT_ReqPower, j_rx.data, sizeof(GBT_ReqPower));
-			uint16_t volt=GBT_ReqPower.requestedVoltage;
-			GBT_EDCAN_Output.requestedVoltage = volt;
-			uint16_t curr=4000-GBT_ReqPower.requestedCurrent;
-			GBT_EDCAN_Output.requestedCurrent = curr;
 			break;
 
-		case 0x1100: //PGN BCS
+		case 0x0A00: // CRO EVSE->EV (0x00 = инициализация, 0xAA = готов к зарядке)
-			//TODO
+			GBT_CRO_val = (j_rx.data[0] & 0xFF);
-			memcpy (&GBT_ChargingStatus, j_rx.data, sizeof(GBT_ChargingStatus));
-			GBT_EDCAN_Output.chargingRemainingTimeMin = GBT_ChargingStatus.estimatedRemainingChargingTime;
-			GBT_EDCAN_Output.chargingPercentage = GBT_ChargingStatus.currentChargeState;
 			break;
 
-		case 0x1300: //PGN BSM
+		case 0x1200: // CCS EVSE->EV (текущий статус зарядника)
-			//TODO
+			memcpy(&GBT_ChargerCurrentStatus, j_rx.data, sizeof(GBT_ChargerCurrentStatus));
-			memcpy (&GBT_BatteryStatus, j_rx.data, sizeof(GBT_BatteryStatus));
+			CONN.enableLoad = GBT_ChargerCurrentStatus.chargingPermissible;
+			CONN.ChargingTime = GBT_ChargerCurrentStatus.chargingTime;
+			CONN.MeasuredVoltageSE = GBT_ChargerCurrentStatus.outputVoltage / 10;
+			CONN.MeasuredCurrentSE = 4000 - GBT_ChargerCurrentStatus.outputCurrent;
 			break;
 
-		case 0x1500: //PGN BMV
+		case 0x1A00: // CST EVSE->EV (остановка зарядки по инициативе EVSE)
-			//TODO
+			GBT_CST_recv = 1;
 			break;
 
-		case 0x1600: //PGN BMT
+		case 0x1D00: // CSD EVSE->EV (финальный отчёт зарядника)
-			//TODO
+			memcpy(&GBT_ChargerStop, j_rx.data, sizeof(GBT_ChargerStop));
+			GBT_CSD_recv = 1;
 			break;
 
-		case 0x1700: //PGN BSP
+		case 0x1F00: // CEM EVSE->EV (сообщение об ошибке)
-			//TODO
+			memcpy(&GBT_ErrorCode, j_rx.data, sizeof(GBT_ErrorCode));
 			break;
-
-			//this handler in j1939.c
-//		case 0x1900: //PGN BST
-//			break;
-
-		case 0x1C00: //PGN BSD
-			//TODO SOC Voltage Temp
-			GBT_BSD_recv = 1;
-			break;
-
-			//this handler in j1939.c
-//		case 0x1E00: //PGN BEM
-//			break;
-
-			//BSM BMV BMT BSP BST BSD BEM
-
 		}
 		j_rx.state = 0;
 	}
@@ -168,272 +119,180 @@ void GBT_ChargerTask(){
 		//waiting
 	}else switch (GBT_State){
 		case GBT_DISABLED:
-			RELAY_Write(RELAY_AUX, 0);
+			CONN.enableLoad = 0;
-			if(connectorState == CONN_Charging){
+			// if(connectorState == Preparing){
-				GBT_Reset();
+			// 	GBT_Reset();
-				GBT_Start();//TODO IF protections (maybe not needed)
+			// 	GBT_SwitchState(GBT_EV_CONNECTING);
-			}
+			// }
-			break;
-//		case GBT_S0_UNCONNECTED:
-//			if(!GBT_Charger_Enable){
-//				GBT_Stop();
-//				break;
-//			}
-//			if(GBT_CC_GetState()==GBT_CC_4V){
-//
-//				GBT_SwitchState(GBT_S1_CONNECTED);
-//				GBT_Delay(500);
-//			}
-//			break;
-//		case GBT_S1_CONNECTED:
-//			if(!GBT_Charger_Enable){
-//				GBT_Stop();
-//				break;
-//			}
-//			if(GBT_CC_GetState()==GBT_CC_4V){
-//
-//				GBT_Lock(1);
-//				GBT_SwitchState(GBT_S2_LOCKED);
-//				GBT_Delay(500);
-//			}else{
-//				GBT_SwitchState(GBT_S0_UNCONNECTED);
-//			}
-//			break;
-//		case GBT_S2_LOCKED:
-//			if(!GBT_Charger_Enable){
-//				GBT_Stop();
-//				break;
-//			}
-//			if(1){ //TODO: charge permission
-//				RELAY_Write(RELAY_AUX, 1); // 13.8V AUX ON
-//				GBT_SwitchState(GBT_S3_STARTED);
-//				GBT_Delay(500);
-//			}
-//			break;
-
-		case GBT_S3_STARTED:
-			GBT_SwitchState(GBT_S31_WAIT_BHM);
-			GBT_Delay(500);
 			break;
 
-		case GBT_S31_WAIT_BHM:
+		/* --- Строгая последовательность GB/T EV: приём от EVSE → ответ EV --- */
-			if(j_rx.state == 0) GBT_SendCHM();
+
+		case GBT_EV_CONNECTING:
+			// 1) Ждём CHM (0x2600), ничего не шлём. Получили → переход в GBT_EV_HANDSHAKE
 			GBT_Delay(250);
 
-			if(GBT_BHM_recv) {
+			if (GBT_CHM_recv) {
-				GBT_SwitchState(GBT_S4_ISOTEST);
+				GBT_SwitchState(GBT_EV_HANDSHAKE);
+				break;
 			}
-
+			if (GBT_StateTick() > 10000) {
-			//Timeout 10S
-			if((GBT_BHM_recv == 0) && (GBT_StateTick()>10000)) { //BHM Timeout
 				GBT_Error(0xFCF0C0FC);
-				EDCAN_printf(LOG_WARN, "BHM Timeout\n");
+				EDCAN_printf(LOG_WARN, "CHM timeout\n");
 			}
 			break;
 
-		case GBT_S4_ISOTEST:
+		case GBT_EV_HANDSHAKE:
-			if(j_rx.state == 0) GBT_SendCHM();
+			// 2) Постоянно шлём BHM, ждём CRM (0x0100, первый раз 0x00)
+			GBT_MaxVoltage.maxOutputVoltage = 4500; // 450V
+			if (j_rx.state == 0) GBT_SendBHM();
 			GBT_Delay(250);
 
-			GBT_EDCAN_Output.requestedVoltage = GBT_MaxVoltage.maxOutputVoltage;
+			if (GBT_CRM_recv) {
-			GBT_EDCAN_Output.requestedCurrent = 10; // 1A max
+				GBT_SwitchState(GBT_EV_RECOGNITION);
-			GBT_EDCAN_Output.enablePSU = 1;
+				break;
-
-			//TODO: Isolation test trigger
-			if(GBT_EDCAN_Input.chargingError != CONN_NO_ERROR){
-				GBT_StopEVSE(GBT_CST_OTHERFALUT);
 			}
+			break;
 
-			if(GBT_StateTick()>5000){
+
-				GBT_SwitchState(GBT_S5_BAT_INFO);
+		case GBT_EV_RECOGNITION:
-				GBT_EDCAN_Output.requestedVoltage = 50;
+			// 3) Постоянно шлём BRM, ждём CRM (0x0100, 0xAA)
-				GBT_EDCAN_Output.requestedCurrent = 10; // 1A max
+			GBT_EVInfo.version[0] = 2;
-				GBT_EDCAN_Output.enablePSU = 0;
+			GBT_EVInfo.version[1] = 0;
+			GBT_EVInfo.version[2] = 0;
+			GBT_EVInfo.batteryType = 1;
+			GBT_EVInfo.batteryCapacity = 700;
+			GBT_EVInfo.batteryVoltage = 3990;
+			memcpy(GBT_EVInfo.batteryVendor, "TEST", 4);
+			GBT_EVInfo.batterySN = 666666;
+			GBT_EVInfo.batteryManuY = 30;
+			GBT_EVInfo.batteryManuM = 2;
+			GBT_EVInfo.batteryManuD = 20;
+			GBT_EVInfo.batteryCycleCount = 666;
+			GBT_EVInfo.ownAuto = 1;
+			GBT_EVInfo.rsvd0 = 0;
+			memcpy(GBT_EVInfo.EVIN, "EDISON_TEST_EVIN_", 17);
+			memcpy(GBT_EVInfo.EV_SW_VER, "1.0.0", 8);
+
+			if (j_rx.state == 0) GBT_SendBRM(); // TODO CHUNKED SEND
+			GBT_Delay(250);
+
+			if ((GBT_CRM_recv) && (GBT_ChargerInfo.bmsIdentified == 0xAA)) {
+				GBT_SwitchState(GBT_EV_CHARGING_PARAMETERS);
+				break;
+			}
+			if (GBT_StateTick() > 5000) {
+				GBT_Error(0xFCF1C0FC);
+				EDCAN_printf(LOG_WARN, "CRM(0xAA) timeout (wait BCP)\n");
+			}
+			break;
+
+		case GBT_EV_CHARGING_PARAMETERS:
+			// 4) Постоянно шлём BCP, ждём CML (0x0800) → шлём BRO(0xAA)
+			if (j_rx.state == 0) GBT_SendBCP();
+			GBT_Delay(250);
+
+			if (GBT_CML_recv) {
+				GBT_SwitchState(GBT_EV_BMS_INIT);
+				break;
+			}
+			if (GBT_StateTick() > 5000) {
+				GBT_Error(0xFCF4C0FC);
+				EDCAN_printf(LOG_WARN, "CML timeout\n");
+			}
+			break;
+		case GBT_EV_BMS_INIT:
+			// 5) Постоянно шлём BRO(0x00) и ждем инициализацию CRO(0xAA)
+			if (j_rx.state == 0) GBT_SendBRO(0x00);
+			GBT_Delay(250);
+			if (GBT_StateTick() > 1500) {
+				GBT_SwitchState(GBT_EV_WAIT_CHARGER_READY);
+				break;
 			}
 
 			break;
 
-		case GBT_S5_BAT_INFO:
+		case GBT_EV_WAIT_CHARGER_READY:
-			if(j_rx.state == 0) GBT_SendCRM(0x00);
+			// 5) Постоянно шлём BRO(0xAA) и ждем инициализацию CRO(0xAA)
+			if (j_rx.state == 0) GBT_SendBRO(0xAA);
+
 			GBT_Delay(250);
-			if(GBT_BAT_INFO_recv){ //BRM
-				//Got battery info
-				GBT_SwitchState(GBT_S6_BAT_STAT);
-				EDCAN_printf(LOG_INFO, "EV info:\n");
-				EDCAN_printf(LOG_INFO, "GBT_ver V%d.%d%d\n",GBT_EVInfo.version[0],GBT_EVInfo.version[1],GBT_EVInfo.version[2]);
-				EDCAN_printf(LOG_INFO, "Battery type: %d\n",GBT_EVInfo.batteryType);
-				EDCAN_printf(LOG_INFO, "Battery capacity: %d\n", GBT_EVInfo.batteryCapacity);	// 0.1Ah/bit
-				EDCAN_printf(LOG_INFO, "Battery voltage: %d\n", GBT_EVInfo.batteryVoltage);  	// 0.1V/bit
-				EDCAN_printf(LOG_INFO, "Battery vendor: %.4s\n", GBT_EVInfo.batteryVendor); 	// Battery vendor (ASCII string)
-				EDCAN_printf(LOG_INFO, "Battery SN: %lu\n", GBT_EVInfo.batterySN);			// int
-				EDCAN_printf(LOG_INFO, "Battery manufacture date: %02d.%02d.%04d\n", GBT_EVInfo.batteryManuD, GBT_EVInfo.batteryManuM ,GBT_EVInfo.batteryManuY+1985);		// year (offset 1985)
-				EDCAN_printf(LOG_INFO, "Battery cycles: %d\n", GBT_EVInfo.batteryCycleCount); //uint24_t
-				EDCAN_printf(LOG_INFO, "Own auto: %d\n", GBT_EVInfo.ownAuto);			// 0 = lizing, 1 = own auto
-				EDCAN_printf(LOG_INFO, "EVIN: %.17s\n", GBT_EVInfo.EVIN);			//EVIN
-				EDCAN_printf(LOG_INFO, "EV_SW_VER: %.8s\n", GBT_EVInfo.EV_SW_VER);
 
-			}
+			if (GBT_CRO_val == 0xAA) {
-			//Timeout
+				GBT_SwitchState(GBT_EV_CHARGING);
-			if((GBT_StateTick()>5000) && (GBT_BAT_INFO_recv == 0)){
-				GBT_Error(0xFDF0C0FC); //BRM Timeout
-				EDCAN_printf(LOG_WARN, "BRM Timeout\n");
-			}
-			break;
-
-		case GBT_S6_BAT_STAT:
-			if(j_rx.state == 0) GBT_SendCRM(0xAA);
-			GBT_Delay(250);
-			if(GBT_BAT_STAT_recv){
-				//Got battery status
-				GBT_SwitchState(GBT_S7_BMS_WAIT);
-				EDCAN_printf(LOG_INFO, "Battery info:\n");
-				EDCAN_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxCellVoltage/100); 		// 0.01v/bit
-				EDCAN_printf(LOG_INFO, "maxCC %dA\n",GBT_BATStat.maxChargingCurrent/10); 	// 0.1A/bit
-				EDCAN_printf(LOG_INFO, "totE %dkWh\n",GBT_BATStat.totalEnergy/10); 			// 0.1kWh
-				EDCAN_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxChargingVoltage/10); 	// 0.1V/ bit
-				EDCAN_printf(LOG_INFO, "maxT %dC\n",(int16_t)GBT_BATStat.maxTemp-50); 		// 1C/bit, -50C offset
-				EDCAN_printf(LOG_INFO, "SOC %dp\n",GBT_BATStat.SOC/10); 					// 0.1%/bit , 0..100%
-				EDCAN_printf(LOG_INFO, "Volt. %dV\n",GBT_BATStat.measVoltage/10); 			// 0.1V/bit
-
-			}
-			if((GBT_StateTick()>5000) && (GBT_BAT_STAT_recv == 0)){
-				GBT_Error(0xFCF1C0FC); //BCP Timeout
-				EDCAN_printf(LOG_WARN, "BCP Timeout\n");
-			}
-			break;
-
-		case GBT_S7_BMS_WAIT:
-			if(j_rx.state == 0) GBT_SendCTS();
-			HAL_Delay(2);
-			if(j_rx.state == 0) GBT_SendCML();
-			GBT_Delay(250);
-			if((GBT_StateTick()>5000) && (GBT_BRO_recv == 0)){
-				GBT_Error(0xFCF4C0FC); //BRO Timeout
-				EDCAN_printf(LOG_WARN, "BRO Timeout\n");
-			}
-			if(EV_ready){
-				//EV ready (AA)
-				GBT_SwitchState(GBT_S8_INIT_CHARGER);
-			}else{
-				if((GBT_StateTick()>60000) && (GBT_BRO_recv == 1)){
-					GBT_Error(0xFCF4C0FC); //BRO Timeout
-					EDCAN_printf(LOG_WARN, "BRO Timeout\n");
-				}
-			}
-			break;
-
-		case GBT_S8_INIT_CHARGER:
-			if(j_rx.state == 0) GBT_SendCRO(0x00);
-			//TODO
-			GBT_Delay(250);
-			if(GBT_StateTick()>1500){
-				//Power Modules initiated
-				GBT_SwitchState(GBT_S9_WAIT_BCL);
-			}
-			break;
-
-		case GBT_S9_WAIT_BCL:
-			if(j_rx.state == 0) GBT_SendCRO(0xAA);
-			GBT_Delay(250);
-			if(GBT_ReqPower.chargingMode != 0){ //REFACTORING
-				//BCL power requirements received
-
-				GBT_SwitchState(GBT_S10_CHARGING);
-				CONN_SetState(CONN_Charging);
-				uint16_t curr=4000-GBT_ReqPower.requestedCurrent;
-				uint16_t volt=GBT_ReqPower.requestedVoltage;
-				//TODO Limits
-
-				GBT_EDCAN_Output.requestedVoltage = volt;
-				GBT_EDCAN_Output.requestedCurrent = curr;
-				GBT_EDCAN_Output.enablePSU = 1;
 				GBT_TimeChargingStarted = get_Current_Time();
-
+				break;
 			}
+
 			break;
 
-		case GBT_S10_CHARGING:
+		case GBT_EV_CHARGING:
-			//CHARGING
+			// Основной режим зарядки: EV периодически шлёт BCS/BSM.
-			//TODO BCL BCS BSM missing ERRORS
+			GBT_ReqPower.requestedVoltage = CONN.RequestedVoltage * 10;
-			if(GBT_EDCAN_Input.chargeControl == CHARGING_NOT_ALLOWED) 	GBT_StopOCPP(GBT_CST_SUSPENDS_ARTIFICIALLY);
+			GBT_ReqPower.requestedCurrent = 4000 - CONN.RequestedCurrent;
-			if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK) 			GBT_StopOCPP(GBT_CST_SUSPENDS_ARTIFICIALLY); // --> Finished
+			GBT_ReqPower.chargingMode = 1;
-			if(GBT_LockState.error) 									{
+
-				GBT_StopEVSE(GBT_CST_OTHERFALUT);			 // --> Suspend EVSE
+			GBT_BATStat.maxCellVoltage = 320;
-				GBT_EDCAN_Output.outputError = CONN_ERR_LOCK;
+			GBT_BATStat.maxChargingCurrent = 40;
+			GBT_BATStat.totalEnergy = 6;
+			GBT_BATStat.maxChargingVoltage = 500;
+			GBT_BATStat.maxTemp = 70;
+			GBT_BATStat.SOC = CONN.SOC;
+			GBT_BATStat.measVoltage = CONN.MeasuredVoltage;
+			
+			// Стоп по инициативе EVSE (получили CST)
+			if (GBT_CST_recv) {
+				GBT_StopEVSE(GBT_CST_SUDDENSTOP);
+				break;
 			}
-			if((GBT_ReadTemp(0) > 90) || (GBT_ReadTemp(1) > 90)) 		{
+			// Стоп по команде с машины (EDCAN)
-				GBT_StopEVSE(GBT_CST_CONNECTOR_OVER_TEMP);
+			if (CONN.connControl == CMD_STOP) {
-				GBT_EDCAN_Output.outputError = CONN_ERR_CONN_TEMP;
+				GBT_StopEV(GBT_CST_BMS_ACTIVELY_SUSPENDS);
-				EDCAN_printf(LOG_WARN, "Connector overheat %d %d\n", GBT_ReadTemp(0), GBT_ReadTemp(1));
+				break;
 			}
-			if(GBT_EDCAN_Input.chargingError != CONN_NO_ERROR){ // --> Suspend EVSE
+			if (IN_ReadInput(IN_ESTOP)) {
-				GBT_StopEVSE(GBT_CST_OTHERFALUT);
+				GBT_StopEV(GBT_CST_BMS_ACTIVELY_SUSPENDS);
-//				EDCAN_printf(LOG_WARN, "Isolation error\n");
+				break;
 			}
 
-			//GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111100;//NOT PERMITTED
+			GBT_SendBCS();
-			GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111101;
+			GBT_SendBCL();
-			GBT_ChargerCurrentStatus.chargingTime = (get_Current_Time() - GBT_TimeChargingStarted)/60;
+			GBT_SendBSM();
-//			GBT_ChargerCurrentStatus.outputCurrent = 4000 - GBT_EDCAN_Output.requestedCurrent;
+			GBT_Delay(250);
-//			GBT_ChargerCurrentStatus.outputVoltage = GBT_EDCAN_Output.requestedVoltage;
-			GBT_ChargerCurrentStatus.outputCurrent = 4000 - GBT_EDCAN_Input.measuredCurrent;
-			GBT_ChargerCurrentStatus.outputVoltage = GBT_EDCAN_Input.measuredVoltage;
-			GBT_EDCAN_Output.chargingElapsedTimeMin = (get_Current_Time() - GBT_TimeChargingStarted)/60;
-			GBT_EDCAN_Output.chargingElapsedTimeSec = (get_Current_Time() - GBT_TimeChargingStarted)%60;
-
-			if(j_rx.state == 0) GBT_SendCCS();
-
-			if(j_rx.state == 0) {
-				GBT_SendCCS();
-				GBT_Delay(49);
-			}else{
-				GBT_Delay(10); // Resend packet if not sent
-				// log_printf(LOG_WARN, "Resend packet\n");
-			}
-
-			//TODO: снижение тока если перегрев контактов
-
 			break;
 
 		case GBT_STOP:
 			GBT_Delay(10);
-			GBT_EDCAN_Output.enablePSU = 0;
+			CONN.enableLoad = 0;
-			GBT_SendCST(GBT_StopCauseCode);
+			// EV шлёт BSD (Battery Stop Data), не CST (CST шлёт EVSE)
-			//RELAY_Write(RELAY_OUTPUT, 0);
+			GBT_SendBSD();
-			//GBT_SwitchState(GBT_DISABLED);
+			if (GBT_StateTick() > 10000) {
-			if(GBT_StateTick()>10000){
+				EDCAN_printf(LOG_WARN, "CSD Timeout\n");
-				EDCAN_printf(LOG_WARN, "BSD Timeout\n");
+				GBT_Error(0xFCF0C0FD); // CSD timeout
-				GBT_Error(0xFCF0C0FD); //BSD Timeout
-
 			}
-
+			if (GBT_CSD_recv) {
-			if(GBT_BSD_recv != 0){
 				GBT_SwitchState(GBT_STOP_CSD);
 			}
-
 			break;
+
 		case GBT_STOP_CSD:
+			// EV не шлёт CSD (финальный отчёт шлёт EVSE). Ждём 2.5 с и завершаем.
 			GBT_Delay(250);
-			GBT_SendCSD();
+			if (GBT_StateTick() > 2500) {
-			if(GBT_StateTick()>2500){ //2.5S
 				GBT_SwitchState(GBT_COMPLETE);
-//				GBT_Reset();
-				//CONN_SetState(CONN_Occupied_complete);
-				//if(connectorState == CONN_Occupied_charging)
-				//PSU_Mode(0x0100);
 			}
 			break;
 
 
 		case GBT_ERROR:
-			GBT_SendCEM(GBT_ErrorCode); //2.5S
+			//GBT_SendBEM(GBT_ErrorCode); //2.5S TODO
 			GBT_SwitchState(GBT_COMPLETE);
 //			GBT_Reset();
 			//
 			break;
 
 		case GBT_COMPLETE:
-			if(connectorState != CONN_Finishing) {
+			if(connectorState != Finished) {
 				GBT_SwitchState(GBT_DISABLED);
 				GBT_Reset();//CHECK
 			}
@@ -442,46 +301,28 @@ void GBT_ChargerTask(){
 		default:
 			GBT_SwitchState(GBT_DISABLED);
 	}
+	if (CONN_CC_GetState()==GBT_CC_4V) CONN.EvseConnected = 1;
+	else CONN.EvseConnected = 0;
 }
 
 
 
 void GBT_SwitchState(gbtState_t state){
 	GBT_State = state;
-	ED_status = state;
 	GBT_state_tick = HAL_GetTick();
-//	if(GBT_State == GBT_DISABLED) 		printf ("GBT_DISABLED\n");
-//	if(GBT_State == GBT_S0_UNCONNECTED) printf ("GBT_S0_UNCONNECTED\n");
-//	if(GBT_State == GBT_S1_CONNECTED) 	printf ("GBT_S1_CONNECTED\n");
-//	if(GBT_State == GBT_S2_LOCKED) 		printf ("GBT_S2_LOCKED\n");
-//	if(GBT_State == GBT_S3_STARTED) 	printf ("GBT_S3_STARTED\n");
-//	if(GBT_State == GBT_S31_WAIT_BHM) 	printf ("GBT_S31_WAIT_BHM\n");
-//	if(GBT_State == GBT_S4_ISOTEST) 	printf ("GBT_S4_ISOTEST\n");
-//	if(GBT_State == GBT_S5_BAT_INFO) 	printf ("GBT_S5_BAT_INFO\n");
-//	if(GBT_State == GBT_S6_BAT_STAT) 	printf ("GBT_S6_BAT_STAT\n");
-//	if(GBT_State == GBT_S7_BMS_WAIT) 	printf ("GBT_S7_BMS_WAIT\n");
-//	if(GBT_State == GBT_S8_INIT_CHARGER)printf ("GBT_S8_INIT_CHARGER\n");
-//	if(GBT_State == GBT_S9_WAIT_BCL) 	printf ("GBT_S9_WAIT_BCL\n");
-//	if(GBT_State == GBT_S10_CHARGING) 	printf ("GBT_S10_CHARGING\n");
-//	if(GBT_State == GBT_STOP) 			printf ("GBT_STOP\n");
-//	if(GBT_State == GBT_STOP_CSD) 		printf ("GBT_STOP_CSD\n");
-//	if(GBT_State == GBT_ERROR) 			printf ("GBT_ERROR\n");
-//	if(GBT_State == GBT_COMPLETE) 		printf ("GBT_COMPLETE\n");
 
-	if(GBT_State == GBT_DISABLED) 		EDCAN_printf(LOG_INFO, "GBT_DISABLED\n");
+	if(GBT_State == GBT_DISABLED) 				EDCAN_printf(LOG_INFO, "GBT_DISABLED\n");
-	if(GBT_State == GBT_S3_STARTED) 	EDCAN_printf(LOG_INFO, "GBT_S3_STARTED\n");
+	if(GBT_State == GBT_EV_CONNECTING) 			EDCAN_printf(LOG_INFO, "GBT_EV_CONNECTING\n");
-	if(GBT_State == GBT_S31_WAIT_BHM) 	EDCAN_printf(LOG_INFO, "GBT_S31_WAIT_BHM\n");
+	if(GBT_State == GBT_EV_HANDSHAKE) 		EDCAN_printf(LOG_INFO, "GBT_EV_HANDSHAKE\n");
-	if(GBT_State == GBT_S4_ISOTEST) 	EDCAN_printf(LOG_INFO, "GBT_S4_ISOTEST\n");
+	if(GBT_State == GBT_EV_RECOGNITION) 	EDCAN_printf(LOG_INFO, "GBT_EV_RECOGNITION\n");
-	if(GBT_State == GBT_S5_BAT_INFO) 	EDCAN_printf(LOG_INFO, "GBT_S5_BAT_INFO\n");
+	if(GBT_State == GBT_EV_CHARGING_PARAMETERS) 	EDCAN_printf(LOG_INFO, "GBT_EV_CHARGING_PARAMETERS\n");
-	if(GBT_State == GBT_S6_BAT_STAT) 	EDCAN_printf(LOG_INFO, "GBT_S6_BAT_STAT\n");
+	if(GBT_State == GBT_EV_BMS_INIT) 	EDCAN_printf(LOG_INFO, "GBT_EV_BMS_INIT\n");
-	if(GBT_State == GBT_S7_BMS_WAIT) 	EDCAN_printf(LOG_INFO, "GBT_S7_BMS_WAIT\n");
+	if(GBT_State == GBT_EV_WAIT_CHARGER_READY) 	EDCAN_printf(LOG_INFO, "GBT_EV_WAIT_CHARGER_READY\n");
-	if(GBT_State == GBT_S8_INIT_CHARGER)EDCAN_printf(LOG_INFO, "GBT_S8_INIT_CHARGER\n");
+	if(GBT_State == GBT_EV_CHARGING) 			EDCAN_printf(LOG_INFO, "GBT_EV_CHARGING\n");
-	if(GBT_State == GBT_S9_WAIT_BCL) 	EDCAN_printf(LOG_INFO, "GBT_S9_WAIT_BCL\n");
+	if(GBT_State == GBT_STOP) 					EDCAN_printf(LOG_INFO, "GBT_STOP\n");
-	if(GBT_State == GBT_S10_CHARGING) 	EDCAN_printf(LOG_INFO, "GBT_S10_CHARGING\n");
+	if(GBT_State == GBT_STOP_CSD) 				EDCAN_printf(LOG_INFO, "GBT_STOP_CSD\n");
-	if(GBT_State == GBT_STOP) 			EDCAN_printf(LOG_INFO, "GBT_STOP\n");
+	if(GBT_State == GBT_ERROR) 					EDCAN_printf(LOG_WARN, "GBT_ERROR\n");
-	if(GBT_State == GBT_STOP_CSD) 		EDCAN_printf(LOG_INFO, "GBT_STOP_CSD\n");
+	if(GBT_State == GBT_COMPLETE) 				EDCAN_printf(LOG_INFO, "GBT_COMPLETE\n");
-	if(GBT_State == GBT_ERROR) 			EDCAN_printf(LOG_WARN, "GBT_ERROR\n");
-	if(GBT_State == GBT_COMPLETE) 		EDCAN_printf(LOG_INFO, "GBT_COMPLETE\n");
 
 
 }
@@ -496,7 +337,7 @@ void GBT_Delay(uint32_t delay){
 }
 
 void GBT_StopEV(uint32_t causecode){ // --> Suspend EV
-	if (GBT_EDCAN_Input.chargingError || GBT_EDCAN_Output.outputError){
+	if (CONN.chargingError){
 		GBT_StopSource = GBT_STOP_EVSE;
 	}else{
 		GBT_StopSource = GBT_STOP_EV;
@@ -519,10 +360,9 @@ void GBT_StopOCPP(uint32_t causecode){ // --> Finished
 
 void GBT_ForceStop(){ // --> Suspend EV
 	GBT_StopSource = GBT_STOP_EV;
-	GBT_EDCAN_Output.enablePSU = 0;
+	// Отключаем силовой контактор батареи со стороны EV
+	CONN.enableLoad = 0;
 	GBT_SwitchState(GBT_COMPLETE);
-	GBT_Lock(0);
-	RELAY_Write(RELAY_AUX, 0);
 }
 
 void GBT_Error(uint32_t errorcode){ // --> Suspend EV
@@ -534,17 +374,18 @@ void GBT_Error(uint32_t errorcode){ // --> Suspend EV
 
 
 void GBT_Reset(){
-	GBT_BAT_INFO_recv = 0;
+	GBT_SwitchState(GBT_DISABLED);
-	GBT_BAT_STAT_recv = 0;
+	GBT_CHM_recv = 0;
-	GBT_BRO_recv = 0;
+	GBT_CRM_recv = 0;
-	GBT_BHM_recv = 0;
+	GBT_CML_recv = 0;
-	GBT_BSD_recv = 0;
+	GBT_CST_recv = 0;
-	EV_ready = 0;
+	GBT_CSD_recv = 0;
-	GBT_EDCAN_Output.chargingPercentage = 0;
+	GBT_CRO_val = 0x00;
-	GBT_EDCAN_Output.enablePSU = 0;
+	CONN.SOC = 0;
-	GBT_EDCAN_Output.requestedCurrent = 0;
+	CONN.enableLoad = 0;
-	GBT_EDCAN_Output.requestedVoltage = 500;
+	CONN.RequestedCurrent = 1000;
-	GBT_EDCAN_Output.outputError = 0;
+	CONN.RequestedVoltage = 400;
+	CONN.chargingError = 0;
 	memset(&GBT_EVInfo, 0, sizeof (GBT_EVInfo));
 	memset(&GBT_BATStat, 0, sizeof (GBT_BATStat));
 	memset(&GBT_ReqPower, 0, sizeof (GBT_ReqPower));
@@ -559,7 +400,3 @@ void GBT_Reset(){
 	GBT_TimeChargingStarted = 0;
 	GBT_BRO = 0x00;
 }
-void GBT_Start(){
-	RELAY_Write(RELAY_AUX, 1);
-	GBT_SwitchState(GBT_S3_STARTED);
-}

Core/Src/connector.c

@@ -5,139 +5,137 @@
  */
 
 #include "connector.h"
-#include "lock.h"
 #include "board.h"
 #include "edcan.h"
+#include <string.h>
+#include <charger_gbt.h>
 
 
 CONN_State_t connectorState;
-extern GBT_EDCAN_Output_t GBT_EDCAN_Output;
+CONN_t CONN;
-extern GBT_EDCAN_Input_t GBT_EDCAN_Input;
 
 uint8_t CC_STATE_FILTERED;
 
+static void CONN_UpdateEdcanOutput(void);
+
 void CONN_Init(){
-	CONN_SetState(CONN_Initializing);
+	memset(&CONN, 0, sizeof(CONN));
+	CONN.connControl = CMD_NONE;
+	CONN_SetState(Unknown);
 }
 
 void CONN_Task(){
 
 	switch (connectorState){
-	case CONN_Initializing: // unlocked
+	case Unknown:
-		GBT_Lock(0);
+		CONN_SetState(Unplugged);
-		CONN_SetState(CONN_Available);
 		break;
 
-	case CONN_Faulted: //unlocked
+	case Disabled:
-		GBT_Lock(0);
+		if(CONN.chargingError == 0) {
-		if(GBT_EDCAN_Input.chargingError == 0) CONN_SetState(CONN_Available);
+			CONN_SetState(Unplugged);
-		if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK) GBT_ForceLock(0);
-
-		break;
-	case CONN_Available: //unlocked, waiting to connect
-		GBT_Lock(0);
-		if(GBT_EDCAN_Input.chargingError != 0) CONN_SetState(CONN_Faulted);
-		if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK) GBT_ForceLock(0);
-
-		if((CONN_CC_GetState()==GBT_CC_4V) && (GBT_EDCAN_Input.chargeControl != FORCE_UNLOCK)){ // Исправить
-			CONN_SetState(CONN_Preparing);
-			GBT_Lock(1);
 		}
 		break;
-
+	case Unplugged: // Ожидание подключения и начала сессии
-		// Выйти из двух состояний в Finished если force unlock
+	{
-	case CONN_Preparing: //unlocked, waiting to charge
+		// Обновляем признак физического подключения разъёма по уровню CC
-		GBT_Lock(0);
+		if(CONN_CC_GetState() == GBT_CC_4V){
-		if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK) GBT_ForceLock(0);
+			CONN.EvseConnected = 1;
-		if(CONN_CC_GetState()==GBT_CC_4V){
+			CONN_SetState(AuthRequired);
-			if(GBT_EDCAN_Input.chargeControl == CHARGING_ALLOWED){
-//				RELAY_Write(RELAY_AUX, 1);
-//				GBT_Start();
-				CONN_SetState(CONN_Charging);
-			}
-			if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK){
-				CONN_SetState(CONN_Available);//TODO: CONN_Occupied_complete
-			}
-			//if (CHARGING_NOT_ALLOWED) stay here
 		}else{
-			CONN_SetState(CONN_Available);
+			CONN.EvseConnected = 0;
 		}
 		break;
-	case CONN_Charging://charging, locked
+	}
-		GBT_Lock(1);
 
+	case AuthRequired:
+	{
+		// Если уровень CC вернулся к 6/12В – считаем, что коннектор выдернули
+		if(CONN_CC_GetState() != GBT_CC_4V){
+			CONN_SetState(Unplugged);
+			GBT_Reset();
+			break;
+		}
+
+		// Как только появляется 12V AUX от станции – переходим в Preparing (инициализация протокола)
+		if(IN_ReadInput(IN_0) == 1){
+			CONN_SetState(Preparing);
+			GBT_SwitchState(GBT_EV_CONNECTING);
+		}
+		break;
+	}
+
+	case Preparing:
+		// Ожидаем переход стейт-машины GB/T в режим зарядки.
+		// Как только GBT_State уходит в режим CHARGING – считаем, что начался заряд.
+		if(GBT_State == GBT_EV_CHARGING){
+			CONN_SetState(Charging);
+		}
+		if(IN_ReadInput(IN_0) == 0){
+			CONN_SetState(Unplugged);
+			GBT_Reset();
+		}
+		break;
+
+	case Charging: // Активная зарядка
+		// Завершение по окончанию GB/T-сессии или при падении тока/отключении AUX можно
+		// добавить позже. Пока ориентируемся только на завершение GB/T.
 		if(GBT_State == GBT_COMPLETE){
-			if(GBT_StopSource == GBT_STOP_EVSE){
+			CONN_SetState(Finished);
-				CONN_SetState(CONN_Suspended_EVSE);
-			}else if(GBT_StopSource == GBT_STOP_EV){
-				CONN_SetState(CONN_Suspended_EV);
-			}else if(GBT_StopSource == GBT_STOP_OCPP){
-				CONN_SetState(CONN_Finishing);
-			}else{
-				CONN_SetState(CONN_Suspended_EVSE);
-			}
-
-		}//FIXME
-		//
-		break;
-
-	case CONN_Suspended_EV://charging completed by EV, waiting to transaction stop
-		GBT_Lock(0);
-		if(GBT_EDCAN_Input.chargeControl == CHARGING_NOT_ALLOWED) 	CONN_SetState(CONN_Finishing);
-		if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK) 			CONN_SetState(CONN_Finishing); // --> Finished
-		break;
-
-	case CONN_Suspended_EVSE://charging completed by EVSE, waiting to transaction stop
-		GBT_Lock(0);
-		if(GBT_EDCAN_Input.chargeControl == CHARGING_NOT_ALLOWED) 	CONN_SetState(CONN_Finishing);
-		if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK) 			CONN_SetState(CONN_Finishing); // --> Finished
-
-		break;
-
-	case CONN_Finishing://charging completed, waiting to disconnect, unlocked
-		GBT_Lock(0);
-
-		//TODO Force unlock time limit
-		if(GBT_EDCAN_Input.chargeControl == FORCE_UNLOCK) GBT_ForceLock(0);
-
-		if(CONN_CC_GetState()==GBT_CC_6V){
-			GBT_Lock(0);
-			CONN_SetState(CONN_Available);
 		}
+		if(IN_ReadInput(IN_0) == 0){
+			CONN_SetState(Finished);
+		}
+		break;
 
+	case Finished: // Сессия завершена, ждём окончания и возможного переподключения
+		// Когда GB/T стейт-машина полностью вернулась в исходное состояние,
+		// можно считать сессию закрытой и вернуться в Unplugged.
+		if(CONN_CC_GetState() != GBT_CC_4V){
+			CONN_SetState(Unplugged);
+			GBT_Reset();
+		}
+		break;
+
+	case FinishedEV:
+	case FinishedEVSE:
+		CONN_SetState(Finished);
 		break;
 	default:
-		CONN_SetState(CONN_Initializing);
+		CONN_SetState(Unknown);
 
 	}
 
-
 }
-//external
+
-//CONN_SetState(CONN_Error);
-//CONN_SetState(CONN_Occupied_charging);
-//CONN_SetState(CONN_Occupied_Complete);
 
 void CONN_SetState(CONN_State_t state){
 	connectorState = state;
-	if(connectorState == CONN_Initializing) 		EDCAN_printf(LOG_INFO,"CONN_Initializing\n");
+	CONN.connState = state;
-	if(connectorState == CONN_Faulted) 			EDCAN_printf(LOG_INFO,"CONN_Faulted\n");
+
-	if(connectorState == CONN_Available) 		EDCAN_printf(LOG_INFO,"CONN_Available\n");
+	if(connectorState == Unknown) 				EDCAN_printf(LOG_INFO,"Unknown\n");
-	if(connectorState == CONN_Preparing) 		EDCAN_printf(LOG_INFO,"CONN_Preparing\n");
+	if(connectorState == Unplugged) 			EDCAN_printf(LOG_INFO,"Unplugged\n");
-	if(connectorState == CONN_Charging)			EDCAN_printf(LOG_INFO,"CONN_Charging\n");
+	if(connectorState == Disabled) 				EDCAN_printf(LOG_INFO,"Disabled\n");
-	if(connectorState == CONN_Finishing)		EDCAN_printf(LOG_INFO,"CONN_Finishing\n");
+	if(connectorState == Preparing) 			EDCAN_printf(LOG_INFO,"Preparing\n");
-	if(connectorState == CONN_Suspended_EV)		EDCAN_printf(LOG_INFO,"CONN_Suspended_EV\n");
+	if(connectorState == AuthRequired) 			EDCAN_printf(LOG_INFO,"AuthRequired\n");
-	if(connectorState == CONN_Suspended_EVSE)	EDCAN_printf(LOG_INFO,"CONN_Suspended_EVSE\n");
+	if(connectorState == WaitingForEnergy) 		EDCAN_printf(LOG_INFO,"WaitingForEnergy\n");
+	if(connectorState == ChargingPausedEV) 		EDCAN_printf(LOG_INFO,"ChargingPausedEV\n");
+	if(connectorState == ChargingPausedEVSE) 	EDCAN_printf(LOG_INFO,"ChargingPausedEVSE\n");
+	if(connectorState == Charging)				EDCAN_printf(LOG_INFO,"Charging\n");
+	if(connectorState == AuthTimeout) 			EDCAN_printf(LOG_INFO,"AuthTimeout\n");
+	if(connectorState == Finished)				EDCAN_printf(LOG_INFO,"Finished\n");
+	if(connectorState == FinishedEVSE)			EDCAN_printf(LOG_INFO,"FinishedEVSE\n");
+	if(connectorState == FinishedEV)			EDCAN_printf(LOG_INFO,"FinishedEV\n");
+	if(connectorState == Replugging)			EDCAN_printf(LOG_INFO,"Replugging\n");
 
-	GBT_EDCAN_Output.connectorState = state;
 }
 
+
 void CONN_CC_ReadStateFiltered() {
     static uint32_t last_change_time;
     static uint32_t last_check_time;
     static uint8_t prev_state;
 
-//    if((last_check_time+100)>HAL_GetTick()) return;
     if((HAL_GetTick()-last_check_time)<100) return;
 
     last_check_time = HAL_GetTick();
@@ -150,43 +148,6 @@ void CONN_CC_ReadStateFiltered() {
     } else if ((HAL_GetTick() - last_change_time) >= 300) {
         CC_STATE_FILTERED = prev_state;
     }
-
-//	switch(new_state){
-//	case GBT_CC_UNKNOWN:
-//		printf("GBT_CC_UNKNOWN\n");
-//		break;
-//	case GBT_CC_12V:
-//		printf("GBT_CC_12V\n");
-//		break;
-//	case GBT_CC_6V:
-//		printf("GBT_CC_6V\n");
-//		break;
-//	case GBT_CC_4V:
-//		printf("GBT_CC_4V\n");
-//		break;
-//	case GBT_CC_2V:
-//		printf("GBT_CC_2V\n");
-//		break;
-//
-//	}
-//	switch(CONN_CC_GetState()){
-//	case GBT_CC_UNKNOWN:
-//		printf("FGBT_CC_UNKNOWN\n");
-//		break;
-//	case GBT_CC_12V:
-//		printf("FGBT_CC_12V\n");
-//		break;
-//	case GBT_CC_6V:
-//		printf("FGBT_CC_6V\n");
-//		break;
-//	case GBT_CC_4V:
-//		printf("FGBT_CC_4V\n");
-//		break;
-//	case GBT_CC_2V:
-//		printf("FGBT_CC_2V\n");
-//		break;
-//
-//	}
 }
 
 uint8_t CONN_CC_GetState(){
@@ -201,7 +162,7 @@ uint8_t CONN_CC_GetStateRaw(){
 //TODO: Filter 100ms
 	uint32_t adc;
 	float volt;
-	ADC_Select_Channel(ADC_CHANNEL_6);
+	ADC_Select_Channel(ADC_CHANNEL_3);
 	HAL_ADC_Start(&hadc1);
 	HAL_ADC_PollForConversion(&hadc1, 100);
 	adc = HAL_ADC_GetValue(&hadc1);
@@ -229,7 +190,7 @@ float CONN_CC_GetAdc(){
 
 	uint32_t adc;
 	float volt;
-	ADC_Select_Channel(ADC_CHANNEL_6);
+	ADC_Select_Channel(ADC_CHANNEL_3);
 	HAL_ADC_Start(&hadc1);
 	HAL_ADC_PollForConversion(&hadc1, 100);
 	adc = HAL_ADC_GetValue(&hadc1);

Core/Src/debug.c

@@ -75,9 +75,9 @@ void parse_command(uint8_t* buffer, size_t length) {
 
     } else if (strncmp((const char*)buffer, "relayaux", length) == 0) {
         printf("Relaying...\n");
-        RELAY_Write(RELAY_AUX, 1);
+        RELAY_Write(RELAY_1, 1);
         HAL_Delay(200);
-        RELAY_Write(RELAY_AUX, 0);
+        RELAY_Write(RELAY_1, 0);
     } else if (strncmp((const char*)buffer, "relaycc", length) == 0) {
         printf("Relaying...\n");
         RELAY_Write(RELAY_CC, 1);
@@ -92,23 +92,15 @@ void parse_command(uint8_t* buffer, size_t length) {
     } else if (strncmp((const char*)buffer, "adc", length) == 0) {
         printf("CC1=%.2f\n", CONN_CC_GetAdc());
 
-    } else if (strncmp((const char*)buffer, "lock_state", length) == 0) {
+    // } else if (strncmp((const char*)buffer, "lock_state", length) == 0) {
-        printf("Lock state=%d\n", GBT_LockGetState());
+    //     printf("AUX/Lock state=%d\n", GBT_LockGetState());
-
-    } else if (strncmp((const char*)buffer, "lock_lock", length) == 0) {
-        printf("Locked\n");
-        GBT_Lock(1);
-
-    } else if (strncmp((const char*)buffer, "lock_unlock", length) == 0) {
-        printf("Unlocked\n");
-        GBT_Lock(0);
 
     } else if (strncmp((const char*)buffer, "complete", length) == 0) {
-    	CONN_SetState(CONN_Finishing);
+    	CONN_SetState(Finished);
 
     } else if (strncmp((const char*)buffer, "start", length) == 0) {
         printf("Started\n");
-        GBT_Start();
+        GBT_SwitchState(GBT_EV_CONNECTING);
 
     } else if (strncmp((const char*)buffer, "stop", length) == 0) {
         printf("Stopped\n");
@@ -187,8 +179,6 @@ void parse_command(uint8_t* buffer, size_t length) {
         printf("reset\n");
         printf("help\n");
         printf("cc_state\n");
-        printf("lock_lock\n");
-        printf("lock_unlock\n");
         printf("lock_state\n");
         printf("adc\n");
         printf("relay(cc,aux)\n");

Core/Src/edcan_handler_user.c

@@ -52,17 +52,6 @@
 #define EDCAN_REG_BSM  0x380
 
 
-#define EDCAN_REG_OUTPUT 0x500
-
-GBT_EDCAN_Output_t GBT_EDCAN_Output;
-
-
-#define EDCAN_REG_INPUT 0x580
-
-GBT_EDCAN_Input_t GBT_EDCAN_Input;
-
-
-
 /**
   * @brief  Handler for incoming Read packet
   * 		Another device reply value of its registers
@@ -154,10 +143,6 @@ void EDCAN_WriteUserRegister(uint16_t addr, uint8_t value){
 		((uint8_t*)&GBT_ChargerInfo)[addr - EDCAN_REG_CHARGER_INFO] = value;
 		break;
 
-		//0x580
-	case EDCAN_REG_INPUT ... (EDCAN_REG_INPUT+sizeof(GBT_EDCAN_Input_t)):
-		((uint8_t*)&GBT_EDCAN_Input)[addr - EDCAN_REG_INPUT] = value;
-
 	//TODO
 		//GBT_EDCAN_Input.measuredCurrent;
 		break;
@@ -223,15 +208,6 @@ uint8_t EDCAN_GetUserRegisterValue(uint16_t addr){
 				return ((uint8_t*)&GBT_BatteryStatus)[addr - EDCAN_REG_BSM];
 
 
-			//0x500
-		case EDCAN_REG_OUTPUT ... (EDCAN_REG_OUTPUT+sizeof(GBT_EDCAN_Output_t)):
-				return ((uint8_t*)&GBT_EDCAN_Output)[addr - EDCAN_REG_OUTPUT];
-
-			//0x580
-		case EDCAN_REG_INPUT ... (EDCAN_REG_INPUT+sizeof(GBT_EDCAN_Input_t)):
-				return ((uint8_t*)&GBT_EDCAN_Input)[addr - EDCAN_REG_INPUT];
-
-
 		default:
 			return 0x00;
 		}

Core/Src/gbt_packet.c

@@ -6,115 +6,51 @@
  */
 
 
-// GB/T Time Synchronization Packet
+// GB/T Time Synchronization Packet (CTS EVSE->EV)
 #include "main.h"
 #include "soft_rtc.h"
 #include "charger_gbt.h"
 
-void GBT_SendCTS(){
+// --- EV side GB/T packets (EV->EVSE) ---
 
-    uint8_t data[7];
+// BHM: максимальное напряжение батареи/запрос зарядного напряжения
-    unix_to_bcd(get_Current_Time(), data);
+void GBT_SendBHM(void){
-//	data[0] = 0x00; //seconds
+	J_SendPacket(0x2700, 6, sizeof(GBT_MaxVoltage), (uint8_t*)&GBT_MaxVoltage);
-//	data[1] = 0x30; //minutes
-//	data[2] = 0x23; //hours
-//	data[3] = 0x05;  //days
-//	data[4] = 0x05;  //month
-//	data[5] = 0x24; //years
-//	data[6] = 0x20; //centuries
-
-	J_SendPacket(0x000700, 6, 7, data);
 }
 
-//GB/T Max Load Packet
+// BRM: базовая информация о батарее/EV
-void GBT_SendCML(){
+void GBT_SendBRM(void){
-//    uint8_t data[8];
+	J_SendPacket(0x0200, 6, sizeof(GBT_EVInfo), (uint8_t*)&GBT_EVInfo);
-//	data[0] = 0x94; //450V max output voltage
-//	data[1] = 0x11; //
-//	data[2] = 0xB0; //120V min output voltage
-//	data[3] = 0x04; //
-//	data[4] = 0xC4; //-150A maximum output current
-//	data[5] = 0x09; //
-//	data[6] = 0x8C; //-2A minimum output current
-//	data[7] = 0x0F; //
-
-	J_SendPacket(0x000800, 6, 8, (uint8_t*)&GBT_MaxLoad);
-
 }
 
-//GB/T Version packet
+// BCP: ограничения и статусы батареи
-void GBT_SendCHM(){
+void GBT_SendBCP(void){
-    uint8_t data[3];
+	J_SendPacket(0x0600, 6, sizeof(GBT_BATStat), (uint8_t*)&GBT_BATStat);
-    data[0] = 0x01;
-    data[1] = 0x01;
-    data[2] = 0x00;
-	J_SendPacket(0x2600, 6, 3, data);
 }
 
-//GB/T CRM Packet (state=BMS identified)
+// BRO: ответ готовности EV (0x00 / 0xAA)
-void GBT_SendCRM(uint8_t state){
+void GBT_SendBRO(uint8_t state){
-//    uint8_t data[8];
+	uint8_t data[1];
-//    data[0] = state; // 0x00 / 0xAA
+	data[0] = state;
-//    data[1] = 0x40; //TODO: Charger Number 123456
+	J_SendPacket(0x0900, 6, 1, data);
-//    data[2] = 0xE2;
-//    data[3] = 0x01;
-//    data[4] = 0x00;
-//    data[5] = 0x42; //TODO: location BFG
-//    data[6] = 0x46;
-//    data[7] = 0x47;
-	GBT_ChargerInfo.bmsIdentified = state;
-	J_SendPacket(0x100, 6, 8, (uint8_t *)&GBT_ChargerInfo);
 }
 
-//GB/T CRO packet (Charger ready)
+// BCL: запрос по напряжению/току от EV
-void GBT_SendCRO(uint8_t state){
+void GBT_SendBCL(void){
-    uint8_t data[1];
+	J_SendPacket(0x1000, 6, sizeof(GBT_ReqPower), (uint8_t*)&GBT_ReqPower);
-    data[0] = state;
-	J_SendPacket(0xA00, 4, 1, data);
 }
 
-//GB/T CCS packet (Charger current status)
+// BCS: текущий статус заряда с точки зрения EV
-void GBT_SendCCS(){
+void GBT_SendBCS(void){
-//    uint8_t data[8];
+	J_SendPacket(0x1100, 6, sizeof(GBT_ChargingStatus), (uint8_t*)&GBT_ChargingStatus);
-//    data[0] = GBT_CurrPower.requestedVoltage; //
-//    data[1] = GBT_CurrPower.requestedVoltage>>8; //output voltage
-//    data[2] = GBT_CurrPower.requestedCurrent; //смещение 400а, границы
-//    //-400A = 0
-//    //	0A = 4000
-//    // -100A = 3000
-//    data[3] = GBT_CurrPower.requestedCurrent>>8; //TODO: current
-//    data[4] = GBT_StateTick()/60000; //charging time (min)
-//    data[5] = 0; //TODO: 255 min+
-//    data[6] = 0b11111101; //charging not permitted
-//    data[7] = 0xFF;
-	J_SendPacket(0x1200, 6, 8, (uint8_t *)&GBT_ChargerCurrentStatus);
 }
 
-// GB/T Charging Stop packet
+// BSM: дополнительные статусы батареи
-void GBT_SendCST(uint32_t Cause){
+void GBT_SendBSM(void){
-    uint8_t data[8];
+	J_SendPacket(0x1300, 6, sizeof(GBT_BatteryStatus), (uint8_t*)&GBT_BatteryStatus);
-    data[0] = (Cause>>24) & 0xFF; // Error
-    data[1] = (Cause>>16) & 0xFF; //
-    data[2] = (Cause>>8) & 0xFF; //
-    data[3] = Cause & 0xFF; //
-
-	J_SendPacket(0x1A00, 4, 4, data);
 }
 
-void GBT_SendCSD(){
+// BSD: статус батареи при завершении
-	GBT_ChargerStop.chargerNumber = GBT_ChargerInfo.chargerNumber;
+void GBT_SendBSD(void){
-	GBT_ChargerStop.outputEnergy = 0; //TODO Energy meters
+	J_SendPacket(0x1C00, 6, sizeof(GBT_BATStat), (uint8_t*)&GBT_BATStat);
-	GBT_ChargerStop.chargingTime = GBT_ChargerCurrentStatus.chargingTime;
-	J_SendPacket(0x1D00, 6, 7, (uint8_t *)&GBT_ChargerStop);
-
-}
-
-void GBT_SendCEM(uint32_t ErrorCode){
-    uint8_t data[8];
-    data[0] = (ErrorCode>>24) & 0xFF; // Error
-    data[1] = (ErrorCode>>16) & 0xFF; //
-    data[2] = (ErrorCode>>8) & 0xFF; //
-    data[3] = ErrorCode & 0xFF; //
-
-	J_SendPacket(0x1F00, 4, 4, data);
 }

Core/Src/gpio.c

@@ -38,6 +38,8 @@
         * Output
         * EVENT_OUT
         * EXTI
+     PB8   ------> I2C1_SCL
+     PB9   ------> I2C1_SDA
 */
 void MX_GPIO_Init(void)
 {
@@ -54,54 +56,88 @@ void MX_GPIO_Init(void)
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOC, LOCK_A_Pin|LOCK_B_Pin, GPIO_PIN_RESET);
 
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, RELAY5_Pin|RELAY4_Pin|RELAY3_Pin|RELAY2_Pin
+                          |RELAY1_Pin, GPIO_PIN_RESET);
+
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(GPIOD, RELAY_DC_Pin|USART2_DIR_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(RELAY_AUX_GPIO_Port, RELAY_AUX_Pin, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(EE_WP_GPIO_Port, EE_WP_Pin, GPIO_PIN_RESET);
 
-  /*Configure GPIO pins : PCPin PCPin */
+  /*Configure GPIO pins : IN_SW0_Pin IN_SW1_Pin */
+  GPIO_InitStruct.Pin = IN_SW0_Pin|IN_SW1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : LOCK_A_Pin LOCK_B_Pin */
   GPIO_InitStruct.Pin = LOCK_A_Pin|LOCK_B_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 
-  /*Configure GPIO pin : PtPin */
+  /*Configure GPIO pins : IN0_Pin AC_OK_Pin ISO_IN_Pin */
-  GPIO_InitStruct.Pin = LOCK_FB_Pin;
+  GPIO_InitStruct.Pin = IN0_Pin|AC_OK_Pin|ISO_IN_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(LOCK_FB_GPIO_Port, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : PEPin PEPin */
-  GPIO_InitStruct.Pin = ADDR_0_Pin|ADDR_1_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_PULLUP;
   HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 
-  /*Configure GPIO pin : PtPin */
+  /*Configure GPIO pins : RELAY5_Pin RELAY4_Pin RELAY3_Pin RELAY2_Pin
+                           RELAY1_Pin */
+  GPIO_InitStruct.Pin = RELAY5_Pin|RELAY4_Pin|RELAY3_Pin|RELAY2_Pin
+                          |RELAY1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : RELAY_CC_Pin */
   GPIO_InitStruct.Pin = RELAY_CC_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
   HAL_GPIO_Init(RELAY_CC_GPIO_Port, &GPIO_InitStruct);
 
-  /*Configure GPIO pin : PtPin */
+  /*Configure GPIO pins : RELAY_DC_Pin USART2_DIR_Pin */
-  GPIO_InitStruct.Pin = USART2_DIR_Pin;
+  GPIO_InitStruct.Pin = RELAY_DC_Pin|USART2_DIR_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(USART2_DIR_GPIO_Port, &GPIO_InitStruct);
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 
-  /*Configure GPIO pin : PtPin */
+  /*Configure GPIO pin : IN_ESTOP_Pin */
-  GPIO_InitStruct.Pin = RELAY_AUX_Pin;
+  GPIO_InitStruct.Pin = IN_ESTOP_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(IN_ESTOP_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : IN_FB2_Pin IN_FB1_Pin */
+  GPIO_InitStruct.Pin = IN_FB2_Pin|IN_FB1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : EE_WP_Pin */
+  GPIO_InitStruct.Pin = EE_WP_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(RELAY_AUX_GPIO_Port, &GPIO_InitStruct);
+  HAL_GPIO_Init(EE_WP_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PB8 PB9 */
+  GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure peripheral I/O remapping */
+  __HAL_AFIO_REMAP_I2C1_ENABLE();
 
 }
 

Core/Src/j1939.c

@@ -24,7 +24,7 @@ void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan)
 
     if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &RxHeader, RxData) == HAL_OK)
     {
-    	if((RxHeader.ExtId & 0x00FFFF) == ((J_ID_SE << 8) | J_ID_EV)){  // SA, DA match
+    	if((RxHeader.ExtId & 0x00FFFF) == ((J_ID_EV << 8) | J_ID_SE)){  // SA, DA match
     		switch ((RxHeader.ExtId>>8) & 0x00FF00){
 
     		case 0xEC00: //PGN Connection Management Message
@@ -127,7 +127,7 @@ void J_SendPacket(uint32_t PGN, uint8_t pri, uint8_t DLC, uint8_t *data){
         CAN_TxHeaderTypeDef tx_header;
         uint32_t tx_mailbox;
 
-        tx_header.ExtId = (pri << 26) | (PGN << 8) | (J_ID_EV << 8) | J_ID_SE;
+        tx_header.ExtId = (pri << 26) | (PGN << 8) | (J_ID_SE << 8) | J_ID_EV;
         tx_header.RTR = CAN_RTR_DATA;
         tx_header.IDE = CAN_ID_EXT;
         tx_header.DLC = DLC;

Core/Src/lock.c

@@ -1,166 +0,0 @@
-/*
- * lock.c
- *
- *  Created on: Jul 31, 2024
- *      Author: colorbass
- */
-#include "lock.h"
-#include "debug.h"
-#include "edcan.h"
-
-
-uint8_t LOCK_POLARITY = 0; // 1 for v1
-uint8_t LOCK_MOTOR_POLARITY = 1;
-uint16_t LOCK_DELAY = 100;
-
-GBT_LockState_t GBT_LockState = {
-	.demand = 0,
-	.error = 0,
-	.action_requested = 255,  // нет запрошенного действия
-	.motor_state = 0,         // idle
-	.last_action_time = 0,
-	.retry_count = 0,
-	.error_tick = 0
-};
-
-
-void GBT_ForceLock(uint8_t state){
-	// Устанавливаем флаг для выполнения действия
-	GBT_LockState.action_requested = state ? 1 : 0;
-	GBT_LockState.retry_count = 0;
-}
-
-uint8_t GBT_LockGetState(){
-	//1 = locked
-	//0 = unlocked
-	if(LOCK_POLARITY){
-		return HAL_GPIO_ReadPin(LOCK_FB_GPIO_Port, LOCK_FB_Pin);
-	}else{
-		return !HAL_GPIO_ReadPin(LOCK_FB_GPIO_Port, LOCK_FB_Pin);
-
-	}
-}
-
-void GBT_Lock(uint8_t state){
-	GBT_LockState.demand = state;
-}
-
-void GBT_ManageLockSolenoid(){
-	static uint32_t tick;
-
-	if(HAL_GetTick() - tick < 50) return;
-	tick = HAL_GetTick();
-
-	HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, GBT_LockState.demand ? 1 : 0);
-}
-
-void GBT_ManageLockMotor(){
-	static const uint8_t MAX_RETRIES = 5;
-	uint32_t current_tick = HAL_GetTick();
-	
-	// Проверяем таймаут сброса ошибки (до проверки error, чтобы можно было сбросить)
-	GBT_ResetErrorTimeout();
-	
-	if (GBT_LockState.error) {
-		return;
-	}
-
-	// Проверяем, нужно ли выполнить действие
-	bool lock_is_open = GBT_LockGetState() == 0;
-	bool lock_should_be_open = GBT_LockState.demand == 0;
-	
-	// Если есть запрошенное действие или состояние не соответствует требуемому
-	if (GBT_LockState.action_requested != 255 || (lock_is_open != lock_should_be_open)) {
-		// Если действие еще не запрошено, запрашиваем его
-		if (GBT_LockState.action_requested == 255) {
-			GBT_LockState.action_requested = lock_should_be_open ? 0 : 1;
-			GBT_LockState.retry_count = 0;
-		}
-		
-		// Управление мотором через машину состояний
-		switch (GBT_LockState.motor_state) {
-			case 0: // idle - мотор выключен
-				// Определяем, какой пин нужно включить
-				if (LOCK_MOTOR_POLARITY) {
-					if (GBT_LockState.action_requested == 1) { // LOCK
-						HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1);
-					} else { // UNLOCK
-						HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1);
-					}
-				} else {
-					if (GBT_LockState.action_requested == 1) { // LOCK
-						HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1);
-					} else { // UNLOCK
-						HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1);
-					}
-				}
-				GBT_LockState.motor_state = 1; // motor_on
-				GBT_LockState.last_action_time = current_tick;
-				break;
-				
-			case 1: // motor_on - мотор включен, ждем LOCK_DELAY
-				if (current_tick - GBT_LockState.last_action_time >= LOCK_DELAY) {
-					// Выключаем оба пина
-					HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0);
-					HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0);
-					GBT_LockState.motor_state = 2; // waiting_off
-					GBT_LockState.last_action_time = current_tick;
-				}
-				break;
-				
-			case 2: // waiting_off - ждем немного перед проверкой состояния
-				// Небольшая задержка перед проверкой состояния (например, 50мс)
-				if (current_tick - GBT_LockState.last_action_time >= 50) {
-					// Проверяем, достигнуто ли требуемое состояние
-					lock_is_open = GBT_LockGetState() == 0;
-					bool action_success = (lock_is_open == (GBT_LockState.action_requested == 0));
-					
-					if (action_success) {
-						// Действие выполнено успешно
-						GBT_LockState.action_requested = 255; // сбрасываем флаг
-						GBT_LockState.motor_state = 0; // idle
-						GBT_LockState.retry_count = 0;
-					} else {
-						// Действие не выполнено, повторяем попытку
-						GBT_LockState.retry_count++;
-						if (GBT_LockState.retry_count >= MAX_RETRIES) {
-							// Превышено количество попыток
-							GBT_LockState.error = 1;
-							GBT_LockState.error_tick = current_tick; // сохраняем время установки ошибки
-							GBT_LockState.action_requested = 0; // пытаемся разблокировать
-							GBT_LockState.motor_state = 0;
-							GBT_LockState.retry_count = 0;
-							EDCAN_printf(LOG_ERR, "Lock error\n");
-						} else {
-							// Повторяем попытку
-							GBT_LockState.motor_state = 0; // возвращаемся к началу
-						}
-					}
-				}
-				break;
-		}
-	} else {
-		// Состояние соответствует требуемому, сбрасываем флаги
-		if (GBT_LockState.motor_state != 0) {
-			HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0);
-			HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0);
-			GBT_LockState.motor_state = 0;
-		}
-		GBT_LockState.action_requested = 255;
-		GBT_LockState.retry_count = 0;
-	}
-}
-
-void GBT_ResetErrorTimeout(){
-	static const uint32_t ERROR_TIMEOUT_MS = 300000; // 5 минут
-	
-	if (GBT_LockState.error && GBT_LockState.error_tick != 0) {
-		
-		if ((HAL_GetTick()-GBT_LockState.error_tick) >= ERROR_TIMEOUT_MS) {
-			// Прошло 5 минут, сбрасываем ошибку
-			GBT_LockState.error = 0;
-			GBT_LockState.error_tick = 0;
-			EDCAN_printf(LOG_WARN, "Lock error timeout reset\n");
-		}
-	}
-}

Core/Src/main.c

@@ -1,241 +1,254 @@
-/* USER CODE BEGIN Header */
+/* USER CODE BEGIN Header */
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file           : main.c
+  * @file           : main.c
-  * @brief          : Main program body
+  * @brief          : Main program body
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * Copyright (c) 2024 STMicroelectronics.
+  * Copyright (c) 2024 STMicroelectronics.
-  * All rights reserved.
+  * All rights reserved.
-  *
+  *
-  * This software is licensed under terms that can be found in the LICENSE file
+  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
+  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
+  *
-  ******************************************************************************
+  ******************************************************************************
-  */
+  */
-/* USER CODE END Header */
+/* USER CODE END Header */
-/* Includes ------------------------------------------------------------------*/
+/* Includes ------------------------------------------------------------------*/
-#include "main.h"
+#include "main.h"
-#include "adc.h"
+#include "adc.h"
-#include "can.h"
+#include "can.h"
-#include "rtc.h"
+#include "rtc.h"
-#include "usart.h"
+#include "tim.h"
-#include "gpio.h"
+#include "usart.h"
-
+#include "gpio.h"
-/* Private includes ----------------------------------------------------------*/
+
-/* USER CODE BEGIN Includes */
+/* Private includes ----------------------------------------------------------*/
-#include "can.h"
+/* USER CODE BEGIN Includes */
-#include "board.h"
+#include "can.h"
-#include <stdio.h>
+#include "board.h"
-#include "debug.h"
+#include <stdio.h>
-#include "charger_gbt.h"
+#include "debug.h"
-#include "soft_rtc.h"
+#include "charger_gbt.h"
-#include "j1939.h"
+#include "soft_rtc.h"
-#include "lock.h"
+#include "j1939.h"
-#include "connector.h"
+#include "connector.h"
-
+#include "rgb_controller.h"
-/* USER CODE END Includes */
+
-
+/* USER CODE END Includes */
-/* Private typedef -----------------------------------------------------------*/
+
-/* USER CODE BEGIN PTD */
+/* Private typedef -----------------------------------------------------------*/
-
+/* USER CODE BEGIN PTD */
-/* USER CODE END PTD */
+
-
+/* USER CODE END PTD */
-/* Private define ------------------------------------------------------------*/
+
-/* USER CODE BEGIN PD */
+/* Private define ------------------------------------------------------------*/
-
+/* USER CODE BEGIN PD */
-#include "edcan_config.h"
+
-#include "edcan_defines.h"
+#include "edcan_config.h"
-/* USER CODE END PD */
+#include "edcan_defines.h"
-
+#include "edcan.h"
-/* Private macro -------------------------------------------------------------*/
+/* USER CODE END PD */
-/* USER CODE BEGIN PM */
+
-
+/* Private macro -------------------------------------------------------------*/
-/* USER CODE END PM */
+/* USER CODE BEGIN PM */
-
+
-/* Private variables ---------------------------------------------------------*/
+/* USER CODE END PM */
-
+
-/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
-
+
-/* USER CODE END PV */
+/* USER CODE BEGIN PV */
-
+
-/* Private function prototypes -----------------------------------------------*/
+/* USER CODE END PV */
-void SystemClock_Config(void);
+
-/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
-
+void SystemClock_Config(void);
-/* USER CODE END PFP */
+/* USER CODE BEGIN PFP */
-
+
-/* Private user code ---------------------------------------------------------*/
+/* USER CODE END PFP */
-/* USER CODE BEGIN 0 */
+
-
+/* Private user code ---------------------------------------------------------*/
-/* USER CODE END 0 */
+/* USER CODE BEGIN 0 */
-
+
-/**
+/* USER CODE END 0 */
-  * @brief  The application entry point.
+
-  * @retval int
+/**
-  */
+  * @brief  The application entry point.
-int main(void)
+  * @retval int
-{
+  */
-  /* USER CODE BEGIN 1 */
+int main(void)
-	uint32_t lasttick;
+{
-  /* USER CODE END 1 */
+
-
+  /* USER CODE BEGIN 1 */
-  /* MCU Configuration--------------------------------------------------------*/
+	uint32_t lasttick;
-
+
-  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  /* OpenBLT: Configure vector table base address before HAL_Init() */
-  HAL_Init();
+  EDCAN_VectorBaseConfigF1();
-
+  /* USER CODE END 1 */
-  /* USER CODE BEGIN Init */
+
-
+  /* MCU Configuration--------------------------------------------------------*/
-  /* USER CODE END Init */
+
-
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
-  /* Configure the system clock */
+  HAL_Init();
-  SystemClock_Config();
+
-
+  /* USER CODE BEGIN Init */
-  /* USER CODE BEGIN SysInit */
+  /* OpenBLT: Reset RCC configuration (bootloader may have changed it) */
-
+  HAL_RCC_DeInit();
-  /* USER CODE END SysInit */
+  /* USER CODE END Init */
-
+
-  /* Initialize all configured peripherals */
+  /* Configure the system clock */
-  MX_GPIO_Init();
+  SystemClock_Config();
-  MX_ADC1_Init();
+
-  MX_CAN1_Init();
+  /* USER CODE BEGIN SysInit */
-  MX_CAN2_Init();
+
-  MX_USART2_UART_Init();
+  /* USER CODE END SysInit */
-  MX_RTC_Init();
+
-  /* USER CODE BEGIN 2 */
+  /* Initialize all configured peripherals */
-  CAN_ReInit();
+  MX_GPIO_Init();
-  Init_Peripheral();
+  MX_ADC1_Init();
-
+  MX_CAN1_Init();
-  HAL_Delay(300);
+  MX_CAN2_Init();
-  GBT_Init();
+  MX_RTC_Init();
-  set_Time(1721651966);
+  MX_TIM4_Init();
-  printf("Startup (type \'help\' for command list)\n");
+  MX_USART2_UART_Init();
-  debug_init();
+  MX_UART5_Init();
-  EDCAN_Init(SW_GetAddr()); //0x20..0x23
+  MX_USART1_UART_Init();
-  EDCAN_printf(LOG_INFO, "Startup FWVER = %d\n", FWVER);
+  MX_USART3_UART_Init();
-  //EDCAN_Init(0x20); //Адрес EDCAN
+  /* USER CODE BEGIN 2 */
-  GBT_CAN_ReInit();
+  CAN_ReInit();
-  CAN_ReInit();
+  Init_Peripheral();
-
+  LED_Init();
-  CONN_Init();
+
-  /* USER CODE END 2 */
+  HAL_Delay(300);
-
+  GBT_Init();
-  /* Infinite loop */
+  set_Time(1721651966);
-  /* USER CODE BEGIN WHILE */
+  printf("Startup (type \'help\' for command list)\n");
-  while (1)
+  debug_init();
-  {
+  EDCAN_Init(0x00);
-    /* USER CODE END WHILE */
+  EDCAN_printf(LOG_INFO, "Startup FW %d.%d.%d\n", FWVER_MAJOR, FWVER_MINOR, FWVER_PATCH);
-
+  //EDCAN_Init(0x20); //Адрес EDCAN
-    /* USER CODE BEGIN 3 */
+  GBT_CAN_ReInit();
-//	    HAL_Delay(1);
+  CAN_ReInit();
-		EDCAN_Loop();
+
-		//can_task();
+  CONN_Init();
-		debug_task();
+  /* USER CODE END 2 */
-		CONN_CC_ReadStateFiltered();
+
-//		GBT_ManageLock();
+  /* Infinite loop */
-		CONN_Task();
+  /* USER CODE BEGIN WHILE */
-		GBT_ChargerTask();
+  while (1)
-
+  {
-//	  if((HAL_GetTick() - lasttick)>100){
+    /* USER CODE END WHILE */
-//		  lasttick = HAL_GetTick();
+
-//		  EDCAN_printf(LOG_INFO, "Temp %d %d\n", GBT_ReadTemp(0), GBT_ReadTemp(0));
+    /* USER CODE BEGIN 3 */
-//	  }
+//	    HAL_Delay(1);
-
+		EDCAN_Loop();
-  }
+		//can_task();
-  /* USER CODE END 3 */
+		debug_task();
-}
+		CONN_CC_ReadStateFiltered();
-
+//		GBT_ManageLock();
-/**
+		CONN_Task();
-  * @brief System Clock Configuration
+		GBT_ChargerTask();
-  * @retval None
+		LED_Write();
-  */
+		LED_Task();
-void SystemClock_Config(void)
+
-{
+//	  if((HAL_GetTick() - lasttick)>100){
-  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+//		  lasttick = HAL_GetTick();
-  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+//		  EDCAN_printf(LOG_INFO, "Temp %d %d\n", GBT_ReadTemp(0), GBT_ReadTemp(0));
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+//	  }
-
+
-  /** Initializes the RCC Oscillators according to the specified parameters
+  }
-  * in the RCC_OscInitTypeDef structure.
+  /* USER CODE END 3 */
-  */
+}
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
+
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+/**
-  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5;
+  * @brief System Clock Configuration
-  RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+  * @retval None
-  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  */
-  RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2;
+void SystemClock_Config(void)
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+{
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_OscInitStruct.PLL2.PLL2State = RCC_PLL2_ON;
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
-  RCC_OscInitStruct.PLL2.PLL2MUL = RCC_PLL2_MUL8;
+
-  RCC_OscInitStruct.PLL2.HSEPrediv2Value = RCC_HSE_PREDIV2_DIV5;
+  /** Initializes the RCC Oscillators according to the specified parameters
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  * in the RCC_OscInitTypeDef structure.
-  {
+  */
-    Error_Handler();
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
-  }
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-
+  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5;
-  /** Initializes the CPU, AHB and APB buses clocks
+  RCC_OscInitStruct.LSEState = RCC_LSE_ON;
-  */
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+  RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2;
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_OscInitStruct.PLL2.PLL2State = RCC_PLL2_ON;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  RCC_OscInitStruct.PLL2.PLL2MUL = RCC_PLL2_MUL8;
-
+  RCC_OscInitStruct.PLL2.HSEPrediv2Value = RCC_HSE_PREDIV2_DIV5;
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
+  {
-    Error_Handler();
+    Error_Handler();
-  }
+  }
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC;
+
-  PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
+  /** Initializes the CPU, AHB and APB buses clocks
-  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
+  */
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-  {
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-    Error_Handler();
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  }
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
-  /** Configure the Systick interrupt time
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-  */
+
-  __HAL_RCC_PLLI2S_ENABLE();
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
-}
+  {
-
+    Error_Handler();
-/* USER CODE BEGIN 4 */
+  }
-
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC;
-/* USER CODE END 4 */
+  PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
-
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
-/**
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-  * @brief  This function is executed in case of error occurrence.
+  {
-  * @retval None
+    Error_Handler();
-  */
+  }
-void Error_Handler(void)
+
-{
+  /** Configure the Systick interrupt time
-  /* USER CODE BEGIN Error_Handler_Debug */
+  */
-  /* User can add his own implementation to report the HAL error return state */
+  __HAL_RCC_PLLI2S_ENABLE();
-  __disable_irq();
+}
-  while (1)
+
-  {
+/* USER CODE BEGIN 4 */
-  }
+
-  /* USER CODE END Error_Handler_Debug */
+/* USER CODE END 4 */
-}
+
-
+/**
-#ifdef  USE_FULL_ASSERT
+  * @brief  This function is executed in case of error occurrence.
-/**
+  * @retval None
-  * @brief  Reports the name of the source file and the source line number
+  */
-  *         where the assert_param error has occurred.
+void Error_Handler(void)
-  * @param  file: pointer to the source file name
+{
-  * @param  line: assert_param error line source number
+  /* USER CODE BEGIN Error_Handler_Debug */
-  * @retval None
+  /* User can add his own implementation to report the HAL error return state */
-  */
+  __disable_irq();
-void assert_failed(uint8_t *file, uint32_t line)
+  while (1)
-{
+  {
-  /* USER CODE BEGIN 6 */
+  }
-  /* User can add his own implementation to report the file name and line number,
+  /* USER CODE END Error_Handler_Debug */
-     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+}
-  /* USER CODE END 6 */
+#ifdef USE_FULL_ASSERT
-}
+/**
-#endif /* USE_FULL_ASSERT */
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */

Core/Src/rgb_controller.c

@@ -0,0 +1,228 @@
+#include "rgb_controller.h"
+#include "main.h"
+#include "string.h"
+#include "connector.h"
+
+#include "tim.h"
+
+RGB_State_t LED_State;
+RGB_Cycle_t LED_Cycle;
+
+RGB_Cycle_t color_estop = {
+	.Color1 = { .R = 250, .G = 0, .B = 0 },
+	.Color2 = { .R = 250, .G = 0, .B = 0 },
+	.Tr = 50,
+	.Th = 50,
+	.Tf = 50,
+	.Tl = 50,
+ };
+
+RGB_Cycle_t color_unknown = {
+	.Color1 = { .R = 64, .G = 0, .B = 0 },
+	.Color2 = { .R = 64, .G = 0, .B = 0 },
+	.Tr = 50,
+	.Th = 10,
+	.Tf = 50,
+	.Tl = 0,
+};
+
+RGB_Cycle_t color_light = {
+	.Color1 = { .R = 0, .G = 255, .B = 0 },
+	.Color2 = { .R = 0, .G = 255, .B = 0 },
+	.Tr = 50,
+	.Th = 10,
+	.Tf = 50,
+	.Tl = 0,
+};
+
+RGB_Cycle_t color_disabled = {
+	.Color1 = { .R = 250, .G = 0, .B = 0 },
+	.Color2 = { .R = 32, .G = 0, .B = 0 },
+	.Tr = 50,
+	.Th = 10,
+	.Tf = 50,
+	.Tl = 0,
+};
+
+RGB_Cycle_t color_unplugged = {
+	.Color1 = { .R = 0, .G = 128, .B = 0 },
+	.Color2 = { .R = 0, .G = 128, .B = 0 },
+	.Tr = 50,
+	.Th = 10,
+	.Tf = 50,
+	.Tl = 0,
+};
+
+RGB_Cycle_t color_preparing = {
+	.Color1 = { .R = 0, .G = 0, .B = 250 },
+	.Color2 = { .R = 0, .G = 0, .B = 250 },
+	.Tr = 50,
+	.Th = 10,
+	.Tf = 50,
+	.Tl = 0,
+};
+
+RGB_Cycle_t color_charging = {
+	.Color1 = { .R = 0, .G = 255, .B = 0 },
+	.Color2 = { .R = 0, .G = 32, .B = 0 },
+	.Tr = 50,
+	.Th = 10,
+	.Tf = 50,
+	.Tl = 0,
+};
+
+RGB_Cycle_t color_finished = {
+	.Color1 = { .R = 255, .G = 255, .B = 255 },
+	.Color2 = { .R = 255, .G = 255, .B = 255 },
+	.Tr = 50,
+	.Th = 10,
+	.Tf = 50,
+	.Tl = 0,
+};
+
+RGB_Cycle_t color_error = {
+	.Color1 = { .R = 255, .G = 0, .B = 0 },
+	.Color2 = { .R = 32, .G = 0, .B = 0 },
+	.Tr = 50,
+	.Th = 10,
+	.Tf = 50,
+	.Tl = 0,
+};
+
+void LED_Write(){
+    if(CONN.chargingError != CONN_NO_ERROR){
+      LED_SetColor(&color_error);
+      return;
+    }
+    switch(CONN.connState){
+    case Unknown:
+      LED_SetColor(&color_unknown);
+      break;
+    case Unplugged:
+      LED_SetColor(&color_unplugged);
+      break;
+    case Disabled:
+      LED_SetColor(&color_disabled);
+      break;
+    case Preparing:
+      LED_SetColor(&color_preparing);
+      break;
+    case AuthRequired:
+      LED_SetColor(&color_preparing);
+      break;
+    case WaitingForEnergy:
+      LED_SetColor(&color_charging);
+      break;
+    case ChargingPausedEV:
+      LED_SetColor(&color_charging);
+      break;
+    case ChargingPausedEVSE:
+      LED_SetColor(&color_charging);
+      break;
+    case Charging:
+      LED_SetColor(&color_charging);
+      break;
+    case AuthTimeout:
+      LED_SetColor(&color_finished);
+      break;
+    case Finished:
+      LED_SetColor(&color_finished);
+      break;
+    case FinishedEVSE:
+      LED_SetColor(&color_finished);
+      break;
+    case FinishedEV:
+      LED_SetColor(&color_finished);
+      break;
+    case Replugging:
+      LED_SetColor(&color_preparing);
+      break;
+    default:
+      LED_SetColor(&color_unknown);
+      break;
+    }
+  }
+
+void interpolateColors(RGB_t* color1, RGB_t* color2, uint16_t a, uint16_t b, RGB_t *result) {
+
+    // Проверяем, чтобы a не выходила за пределы диапазона
+    if (a > b) a = b;
+
+    if(b==0) b = 1;
+
+    // Вычисляем коэффициент смешивания в виде целого числа
+    uint16_t t = (a * 255) / b; // t будет от 0 до 255
+
+    // Линейная интерполяция с использованием целых чисел
+    result->R = (color1->R * (255 - t) + color2->R * t) / 255;
+    result->G = (color1->G * (255 - t) + color2->G * t) / 255;
+    result->B = (color1->B * (255 - t) + color2->B * t) / 255;
+
+}
+
+
+void RGB_SetColor(RGB_t *color){
+    htim4.Instance->CCR2 = color->R * 100 / 255;
+    htim4.Instance->CCR3 = color->G * 100 / 255;
+    htim4.Instance->CCR4 = color->B * 100 / 255;
+}
+
+void LED_SetColor(RGB_Cycle_t *color){
+    memcpy(&LED_Cycle, color, sizeof(RGB_Cycle_t));
+}
+
+
+void LED_Init(){
+    RGB_t color = {.R=0, .G=0, .B=0};
+    HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_2);
+    HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3);
+    HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_4);
+    RGB_SetColor(&color);
+}
+
+
+void LED_Task(){
+	static uint32_t led_tick;
+	if((HAL_GetTick() - led_tick) > 20){
+		led_tick = HAL_GetTick();
+        LED_State.tick++;
+        switch(LED_State.state){
+        case LED_RISING:
+            interpolateColors(&LED_Cycle.Color2, &LED_Cycle.Color1, LED_State.tick, LED_Cycle.Tr, &LED_State.color);
+
+            if(LED_State.tick>LED_Cycle.Tr){
+                LED_State.state = LED_HIGH;
+                LED_State.tick = 0;
+            }
+            break;
+        case LED_HIGH:
+            memcpy(&LED_State.color, &LED_Cycle.Color1, sizeof(RGB_t));
+
+            if(LED_State.tick>LED_Cycle.Th){
+                LED_State.state = LED_FALLING;
+                LED_State.tick = 0;
+            }
+            break;
+        case LED_FALLING:
+            interpolateColors(&LED_Cycle.Color1, &LED_Cycle.Color2, LED_State.tick, LED_Cycle.Tf, &LED_State.color);
+
+            if(LED_State.tick>LED_Cycle.Tf){
+                LED_State.state = LED_LOW;
+                LED_State.tick = 0;
+            }
+            break;
+        case LED_LOW:
+            memcpy(&LED_State.color, &LED_Cycle.Color2, sizeof(RGB_t));
+
+            if(LED_State.tick>LED_Cycle.Tl){
+                LED_State.state = LED_RISING;
+                LED_State.tick = 0;
+            }
+            break;
+        default:
+            LED_State.state = LED_RISING;
+        }
+        RGB_SetColor(&LED_State.color);
+    }
+}
+

Core/Src/stm32f1xx_hal_msp.c

@@ -62,6 +62,7 @@
   */
 void HAL_MspInit(void)
 {
+
   /* USER CODE BEGIN MspInit 0 */
 
   /* USER CODE END MspInit 0 */

Core/Src/tim.c

@@ -0,0 +1,155 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    tim.c
+  * @brief   This file provides code for the configuration
+  *          of the TIM instances.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2026 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "tim.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+TIM_HandleTypeDef htim4;
+
+/* TIM4 init function */
+void MX_TIM4_Init(void)
+{
+
+  /* USER CODE BEGIN TIM4_Init 0 */
+
+  /* USER CODE END TIM4_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+
+  /* USER CODE BEGIN TIM4_Init 1 */
+
+  /* USER CODE END TIM4_Init 1 */
+  htim4.Instance = TIM4;
+  htim4.Init.Prescaler = 720;
+  htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim4.Init.Period = 100;
+  htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+  sConfigOC.Pulse = 0;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM4_Init 2 */
+
+  /* USER CODE END TIM4_Init 2 */
+  HAL_TIM_MspPostInit(&htim4);
+
+}
+
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+  if(tim_baseHandle->Instance==TIM4)
+  {
+  /* USER CODE BEGIN TIM4_MspInit 0 */
+
+  /* USER CODE END TIM4_MspInit 0 */
+    /* TIM4 clock enable */
+    __HAL_RCC_TIM4_CLK_ENABLE();
+  /* USER CODE BEGIN TIM4_MspInit 1 */
+
+  /* USER CODE END TIM4_MspInit 1 */
+  }
+}
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(timHandle->Instance==TIM4)
+  {
+  /* USER CODE BEGIN TIM4_MspPostInit 0 */
+
+  /* USER CODE END TIM4_MspPostInit 0 */
+
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**TIM4 GPIO Configuration
+    PD13     ------> TIM4_CH2
+    PD14     ------> TIM4_CH3
+    PD15     ------> TIM4_CH4
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    __HAL_AFIO_REMAP_TIM4_ENABLE();
+
+  /* USER CODE BEGIN TIM4_MspPostInit 1 */
+
+  /* USER CODE END TIM4_MspPostInit 1 */
+  }
+
+}
+
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+  if(tim_baseHandle->Instance==TIM4)
+  {
+  /* USER CODE BEGIN TIM4_MspDeInit 0 */
+
+  /* USER CODE END TIM4_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM4_CLK_DISABLE();
+  /* USER CODE BEGIN TIM4_MspDeInit 1 */
+
+  /* USER CODE END TIM4_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Core/Src/usart.c

@@ -24,8 +24,68 @@
 
 /* USER CODE END 0 */
 
+UART_HandleTypeDef huart5;
+UART_HandleTypeDef huart1;
 UART_HandleTypeDef huart2;
+UART_HandleTypeDef huart3;
 
+/* UART5 init function */
+void MX_UART5_Init(void)
+{
+
+  /* USER CODE BEGIN UART5_Init 0 */
+
+  /* USER CODE END UART5_Init 0 */
+
+  /* USER CODE BEGIN UART5_Init 1 */
+
+  /* USER CODE END UART5_Init 1 */
+  huart5.Instance = UART5;
+  huart5.Init.BaudRate = 115200;
+  huart5.Init.WordLength = UART_WORDLENGTH_8B;
+  huart5.Init.StopBits = UART_STOPBITS_1;
+  huart5.Init.Parity = UART_PARITY_NONE;
+  huart5.Init.Mode = UART_MODE_RX;
+  huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart5.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart5) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN UART5_Init 2 */
+
+  /* USER CODE END UART5_Init 2 */
+
+}
+/* USART1 init function */
+
+void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
 /* USART2 init function */
 
 void MX_USART2_UART_Init(void)
@@ -54,13 +114,97 @@ void MX_USART2_UART_Init(void)
 
   /* USER CODE END USART2_Init 2 */
 
+}
+/* USART3 init function */
+
+void MX_USART3_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART3_Init 0 */
+
+  /* USER CODE END USART3_Init 0 */
+
+  /* USER CODE BEGIN USART3_Init 1 */
+
+  /* USER CODE END USART3_Init 1 */
+  huart3.Instance = USART3;
+  huart3.Init.BaudRate = 115200;
+  huart3.Init.WordLength = UART_WORDLENGTH_8B;
+  huart3.Init.StopBits = UART_STOPBITS_1;
+  huart3.Init.Parity = UART_PARITY_NONE;
+  huart3.Init.Mode = UART_MODE_TX_RX;
+  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART3_Init 2 */
+
+  /* USER CODE END USART3_Init 2 */
+
 }
 
 void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
 {
 
   GPIO_InitTypeDef GPIO_InitStruct = {0};
-  if(uartHandle->Instance==USART2)
+  if(uartHandle->Instance==UART5)
+  {
+  /* USER CODE BEGIN UART5_MspInit 0 */
+
+  /* USER CODE END UART5_MspInit 0 */
+    /* UART5 clock enable */
+    __HAL_RCC_UART5_CLK_ENABLE();
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**UART5 GPIO Configuration
+    PC12     ------> UART5_TX
+    PD2     ------> UART5_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_12;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN UART5_MspInit 1 */
+
+  /* USER CODE END UART5_MspInit 1 */
+  }
+  else if(uartHandle->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+    /* USART1 clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN USART1_MspInit 1 */
+
+  /* USER CODE END USART1_MspInit 1 */
+  }
+  else if(uartHandle->Instance==USART2)
   {
   /* USER CODE BEGIN USART2_MspInit 0 */
 
@@ -92,12 +236,79 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
 
   /* USER CODE END USART2_MspInit 1 */
   }
+  else if(uartHandle->Instance==USART3)
+  {
+  /* USER CODE BEGIN USART3_MspInit 0 */
+
+  /* USER CODE END USART3_MspInit 0 */
+    /* USART3 clock enable */
+    __HAL_RCC_USART3_CLK_ENABLE();
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**USART3 GPIO Configuration
+    PC10     ------> USART3_TX
+    PC11     ------> USART3_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    __HAL_AFIO_REMAP_USART3_PARTIAL();
+
+  /* USER CODE BEGIN USART3_MspInit 1 */
+
+  /* USER CODE END USART3_MspInit 1 */
+  }
 }
 
 void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
 {
 
-  if(uartHandle->Instance==USART2)
+  if(uartHandle->Instance==UART5)
+  {
+  /* USER CODE BEGIN UART5_MspDeInit 0 */
+
+  /* USER CODE END UART5_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_UART5_CLK_DISABLE();
+
+    /**UART5 GPIO Configuration
+    PC12     ------> UART5_TX
+    PD2     ------> UART5_RX
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_12);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
+
+  /* USER CODE BEGIN UART5_MspDeInit 1 */
+
+  /* USER CODE END UART5_MspDeInit 1 */
+  }
+  else if(uartHandle->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
+
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+  else if(uartHandle->Instance==USART2)
   {
   /* USER CODE BEGIN USART2_MspDeInit 0 */
 
@@ -117,6 +328,24 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
 
   /* USER CODE END USART2_MspDeInit 1 */
   }
+  else if(uartHandle->Instance==USART3)
+  {
+  /* USER CODE BEGIN USART3_MspDeInit 0 */
+
+  /* USER CODE END USART3_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART3_CLK_DISABLE();
+
+    /**USART3 GPIO Configuration
+    PC10     ------> USART3_TX
+    PC11     ------> USART3_RX
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11);
+
+  /* USER CODE BEGIN USART3_MspDeInit 1 */
+
+  /* USER CODE END USART3_MspDeInit 1 */
+  }
 }
 
 /* USER CODE BEGIN 1 */

Core/Startup/startup_stm32f107vctx.s

@@ -253,6 +253,9 @@ g_pfnVectors:
   .word BootRAM     /* @0x1E0. This is for boot in RAM mode for
                          STM32F10x Connectivity line Devices. */
 
+  /* BOOT_FLASH_VECTOR_TABLE_CS_OFFSET (0x1E4): сюда bootloader запишет checksum */
+  .word 0x66666666
+
 /*******************************************************************************
 *
 * Provide weak aliases for each Exception handler to the Default_Handler.

Debug/Core/Src/adc.cyclo

@@ -1,3 +1,3 @@
 ../Core/Src/adc.c:30:6:MX_ADC1_Init	3
 ../Core/Src/adc.c:72:6:HAL_ADC_MspInit	2
-../Core/Src/adc.c:105:6:HAL_ADC_MspDeInit	2
+../Core/Src/adc.c:106:6:HAL_ADC_MspDeInit	2

Debug/Core/Src/board.cyclo

@@ -1,8 +1,8 @@
-../Core/Src/board.c:16:6:RELAY_Write	3
+../Core/Src/board.c:16:6:RELAY_Write	7
-../Core/Src/board.c:22:9:GetBoardTemp	1
+../Core/Src/board.c:26:9:IN_ReadInput	9
-../Core/Src/board.c:34:6:Init_Peripheral	1
+../Core/Src/board.c:58:9:GetBoardTemp	1
-../Core/Src/board.c:41:7:pt1000_to_temperature	1
+../Core/Src/board.c:70:6:Init_Peripheral	1
-../Core/Src/board.c:57:7:calculate_NTC_resistance	2
+../Core/Src/board.c:81:7:pt1000_to_temperature	1
-../Core/Src/board.c:72:9:GBT_ReadTemp	3
+../Core/Src/board.c:97:7:calculate_NTC_resistance	2
-../Core/Src/board.c:107:6:ADC_Select_Channel	2
+../Core/Src/board.c:112:9:GBT_ReadTemp	3
-../Core/Src/board.c:118:9:SW_GetAddr	4
+../Core/Src/board.c:147:6:ADC_Select_Channel	2

Debug/Core/Src/charger_gbt.cyclo

@@ -1,12 +1,11 @@
-../Core/Src/charger_gbt.c:65:6:GBT_Init	1
+../Core/Src/charger_gbt.c:60:6:GBT_Init	1
-../Core/Src/charger_gbt.c:86:6:GBT_ChargerTask	77
+../Core/Src/charger_gbt.c:67:6:GBT_ChargerTask	53
-../Core/Src/charger_gbt.c:449:6:GBT_SwitchState	15
+../Core/Src/charger_gbt.c:310:6:GBT_SwitchState	13
-../Core/Src/charger_gbt.c:489:10:GBT_StateTick	1
+../Core/Src/charger_gbt.c:330:10:GBT_StateTick	1
-../Core/Src/charger_gbt.c:493:6:GBT_Delay	1
+../Core/Src/charger_gbt.c:334:6:GBT_Delay	1
-../Core/Src/charger_gbt.c:498:6:GBT_StopEV	4
+../Core/Src/charger_gbt.c:339:6:GBT_StopEV	3
-../Core/Src/charger_gbt.c:508:6:GBT_StopEVSE	2
+../Core/Src/charger_gbt.c:349:6:GBT_StopEVSE	2
-../Core/Src/charger_gbt.c:514:6:GBT_StopOCPP	2
+../Core/Src/charger_gbt.c:355:6:GBT_StopOCPP	2
-../Core/Src/charger_gbt.c:520:6:GBT_ForceStop	1
+../Core/Src/charger_gbt.c:361:6:GBT_ForceStop	1
-../Core/Src/charger_gbt.c:528:6:GBT_Error	1
+../Core/Src/charger_gbt.c:368:6:GBT_Error	1
-../Core/Src/charger_gbt.c:536:6:GBT_Reset	1
+../Core/Src/charger_gbt.c:376:6:GBT_Reset	1
-../Core/Src/charger_gbt.c:562:6:GBT_Start	1

Debug/Core/Src/connector.cyclo

@@ -1,7 +1,7 @@
-../Core/Src/connector.c:19:6:CONN_Init	1
+../Core/Src/connector.c:21:6:CONN_Init	1
-../Core/Src/connector.c:23:6:CONN_Task	29
+../Core/Src/connector.c:27:6:CONN_Task	18
-../Core/Src/connector.c:121:6:CONN_SetState	9
+../Core/Src/connector.c:112:6:CONN_SetState	15
-../Core/Src/connector.c:135:6:CONN_CC_ReadStateFiltered	4
+../Core/Src/connector.c:134:6:CONN_CC_ReadStateFiltered	4
-../Core/Src/connector.c:192:9:CONN_CC_GetState	1
+../Core/Src/connector.c:153:9:CONN_CC_GetState	1
-../Core/Src/connector.c:195:9:CONN_CC_GetStateRaw	9
+../Core/Src/connector.c:156:9:CONN_CC_GetStateRaw	9
-../Core/Src/connector.c:222:7:CONN_CC_GetAdc	1
+../Core/Src/connector.c:183:7:CONN_CC_GetAdc	1

Debug/Core/Src/debug.cyclo

@@ -3,5 +3,5 @@
 ../Core/Src/debug.c:35:6:HAL_UARTEx_RxEventCallback	2
 ../Core/Src/debug.c:45:6:debug_rx_interrupt	1
 ../Core/Src/debug.c:51:6:debug_init	1
-../Core/Src/debug.c:61:6:parse_command	28
+../Core/Src/debug.c:61:6:parse_command	25
-../Core/Src/debug.c:230:6:debug_task	2
+../Core/Src/debug.c:220:6:debug_task	2

Debug/Core/Src/edcan_handler_user.cyclo

@@ -1,3 +1,3 @@
-../Core/Src/edcan_handler_user.c:76:6:EDCAN_ReadHandler	2
+../Core/Src/edcan_handler_user.c:65:6:EDCAN_ReadHandler	2
-../Core/Src/edcan_handler_user.c:120:6:EDCAN_WriteUserRegister	10
+../Core/Src/edcan_handler_user.c:109:6:EDCAN_WriteUserRegister	7
-../Core/Src/edcan_handler_user.c:174:9:EDCAN_GetUserRegisterValue	20
+../Core/Src/edcan_handler_user.c:159:9:EDCAN_GetUserRegisterValue	16

Debug/Core/Src/gbt_packet.cyclo

@@ -1,9 +1,8 @@
-../Core/Src/gbt_packet.c:14:6:GBT_SendCTS	1
+../Core/Src/gbt_packet.c:17:6:GBT_SendBHM	1
-../Core/Src/gbt_packet.c:30:6:GBT_SendCML	1
+../Core/Src/gbt_packet.c:22:6:GBT_SendBRM	1
-../Core/Src/gbt_packet.c:46:6:GBT_SendCHM	1
+../Core/Src/gbt_packet.c:27:6:GBT_SendBCP	1
-../Core/Src/gbt_packet.c:55:6:GBT_SendCRM	1
+../Core/Src/gbt_packet.c:32:6:GBT_SendBRO	1
-../Core/Src/gbt_packet.c:70:6:GBT_SendCRO	1
+../Core/Src/gbt_packet.c:39:6:GBT_SendBCL	1
-../Core/Src/gbt_packet.c:77:6:GBT_SendCCS	1
+../Core/Src/gbt_packet.c:44:6:GBT_SendBCS	1
-../Core/Src/gbt_packet.c:94:6:GBT_SendCST	1
+../Core/Src/gbt_packet.c:49:6:GBT_SendBSM	1
-../Core/Src/gbt_packet.c:104:6:GBT_SendCSD	1
+../Core/Src/gbt_packet.c:54:6:GBT_SendBSD	1
-../Core/Src/gbt_packet.c:112:6:GBT_SendCEM	1

Debug/Core/Src/gpio.cyclo

@@ -1 +1 @@
-../Core/Src/gpio.c:42:6:MX_GPIO_Init	1
+../Core/Src/gpio.c:44:6:MX_GPIO_Init	1

Debug/Core/Src/lock.cyclo

@@ -1,6 +0,0 @@
-../Core/Src/lock.c:27:6:GBT_ForceLock	1
-../Core/Src/lock.c:33:9:GBT_LockGetState	2
-../Core/Src/lock.c:44:6:GBT_Lock	1
-../Core/Src/lock.c:48:6:GBT_ManageLockSolenoid	2
-../Core/Src/lock.c:57:6:GBT_ManageLockMotor	17
-../Core/Src/lock.c:154:6:GBT_ResetErrorTimeout	4

Debug/Core/Src/main.cyclo

@@ -1,37 +1,40 @@
 ../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:110:6:HAL_CAN_RxFifo1MsgPendingCallback	7
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:41:16:EDCAN_VectorTableIsPlausible	3
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:137:6:HAL_CAN_TxMailbox0CompleteCallback	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:49:6:EDCAN_VectorBaseConfigF0	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:144:6:HAL_CAN_TxMailbox1CompleteCallback	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:84:6:EDCAN_VectorBaseConfigF1	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:151:6:HAL_CAN_TxMailbox2CompleteCallback	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:171:6:HAL_CAN_RxFifo1MsgPendingCallback	8
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:163:6:EDCAN_Init	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:198:6:HAL_CAN_TxMailbox0CompleteCallback	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:172:6:EDCAN_SetSecondID	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:204:6:HAL_CAN_TxMailbox1CompleteCallback	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:182:6:CAN_ReInit	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:210:6:HAL_CAN_TxMailbox2CompleteCallback	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:222:6:EDCAN_FilterInit	5
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:221:6:EDCAN_Init	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:312:6:EDCAN_SendPacketWrite	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:240:9:EDCAN_GetBoardVersion	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:351:6:EDCAN_SendPacketWriteLong	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:250:6:EDCAN_SetSecondID	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:444:6:EDCAN_SendPacketRead	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:260:6:CAN_ReInit	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:482:6:EDCAN_SendPacketReadRequest	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:300:6:EDCAN_FilterInit	5
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:516:6:EDCAN_Loop	7
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:390:6:EDCAN_SendPacketWrite	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:551:6:EDCAN_SendAlivePacket	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:427:6:EDCAN_SendPacketWriteLong	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:562:6:EDCAN_EnterSilentMode	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:451:6:EDCAN_SendPacketRead	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:576:6:EDCAN_SetSilentMode	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:487:6:EDCAN_SendPacketReadRequest	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:42:6:EDCAN_TxBufferAdd	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:519:6:EDCAN_Loop	5
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:58:10:EDCAN_getTxBufferElementCount	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan.c:540:6:EDCAN_SendAlivePacket	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:63:6:EDCAN_TxBufferPeekFirst	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:41:6:EDCAN_TxBufferAdd	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:76:6:EDCAN_TxBufferRemoveFirst	3
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:57:10:EDCAN_getTxBufferElementCount	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:94:6:EDCAN_ExchangeTxBuffer	7
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:65:6:EDCAN_TxBufferPeekFirst	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:150:6:EDCAN_RxBufferAdd	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:78:6:EDCAN_TxBufferRemoveFirst	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:165:6:EDCAN_RxBufferGet	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:91:6:EDCAN_ExchangeTxBuffer	7
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:183:10:EDCAN_getRxBufferElementCount	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:135:6:EDCAN_RxBufferAdd	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:188:6:EDCAN_ExchangeRxBuffer	5
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:150:6:EDCAN_RxBufferGet	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:43:6:EDCAN_WriteHandler	3
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:168:10:EDCAN_getRxBufferElementCount	1
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:63:6:EDCAN_WriteSystemRegister	5
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_buffer.c:176:6:EDCAN_ExchangeRxBuffer	5
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:90:9:EDCAN_GetSystemRegisterValue	8
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:40:6:EDCAN_WriteHandler	3
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:132:9:EDCAN_GetOwnRegisterValue	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:51:6:EDCAN_EnterBootloader	0
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:151:6:EDCAN_ReadRequestHandler	5
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:56:6:EDCAN_WriteSystemRegister	9
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_log.c:28:6:EDCAN_printf	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:86:9:EDCAN_GetSystemRegisterValue	3
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_log.c:49:6:EDCAN_Log	2
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:106:9:EDCAN_GetOwnRegisterValue	2
-/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_log.c:74:6:EDCAN_SendPacketLog	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_handler.c:125:6:EDCAN_ReadRequestHandler	5
-../Core/Src/main.c:79:5:main	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_log.c:10:6:EDCAN_printf	1
-../Core/Src/main.c:155:6:SystemClock_Config	4
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_log.c:31:6:EDCAN_Log	2
-../Core/Src/main.c:215:6:Error_Handler	1
+/Users/colorbass/STM32CubeIDE/workspace_1.12.0/lib_EDCAN/edcan_log.c:56:6:EDCAN_SendPacketLog	1
+../Core/Src/main.c:81:5:main	1
+../Core/Src/main.c:169:6:SystemClock_Config	4
+../Core/Src/main.c:229:6:Error_Handler	1

Debug/Core/Src/subdir.mk

@@ -15,8 +15,8 @@ C_SRCS += \
 ../Core/Src/gbt_packet.c \
 ../Core/Src/gpio.c \
 ../Core/Src/j1939.c \
-../Core/Src/lock.c \
 ../Core/Src/main.c \
+../Core/Src/rgb_controller.c \
 ../Core/Src/rtc.c \
 ../Core/Src/soft_rtc.c \
 ../Core/Src/stm32f1xx_hal_msp.c \
@@ -24,30 +24,9 @@ C_SRCS += \
 ../Core/Src/syscalls.c \
 ../Core/Src/sysmem.c \
 ../Core/Src/system_stm32f1xx.c \
+../Core/Src/tim.c \
 ../Core/Src/usart.c 
 
-OBJS += \
-./Core/Src/adc.o \
-./Core/Src/board.o \
-./Core/Src/can.o \
-./Core/Src/charger_gbt.o \
-./Core/Src/connector.o \
-./Core/Src/debug.o \
-./Core/Src/edcan_handler_user.o \
-./Core/Src/gbt_packet.o \
-./Core/Src/gpio.o \
-./Core/Src/j1939.o \
-./Core/Src/lock.o \
-./Core/Src/main.o \
-./Core/Src/rtc.o \
-./Core/Src/soft_rtc.o \
-./Core/Src/stm32f1xx_hal_msp.o \
-./Core/Src/stm32f1xx_it.o \
-./Core/Src/syscalls.o \
-./Core/Src/sysmem.o \
-./Core/Src/system_stm32f1xx.o \
-./Core/Src/usart.o 
-
 C_DEPS += \
 ./Core/Src/adc.d \
 ./Core/Src/board.d \
@@ -59,8 +38,8 @@ C_DEPS += \
 ./Core/Src/gbt_packet.d \
 ./Core/Src/gpio.d \
 ./Core/Src/j1939.d \
-./Core/Src/lock.d \
 ./Core/Src/main.d \
+./Core/Src/rgb_controller.d \
 ./Core/Src/rtc.d \
 ./Core/Src/soft_rtc.d \
 ./Core/Src/stm32f1xx_hal_msp.d \
@@ -68,8 +47,32 @@ C_DEPS += \
 ./Core/Src/syscalls.d \
 ./Core/Src/sysmem.d \
 ./Core/Src/system_stm32f1xx.d \
+./Core/Src/tim.d \
 ./Core/Src/usart.d 
 
+OBJS += \
+./Core/Src/adc.o \
+./Core/Src/board.o \
+./Core/Src/can.o \
+./Core/Src/charger_gbt.o \
+./Core/Src/connector.o \
+./Core/Src/debug.o \
+./Core/Src/edcan_handler_user.o \
+./Core/Src/gbt_packet.o \
+./Core/Src/gpio.o \
+./Core/Src/j1939.o \
+./Core/Src/main.o \
+./Core/Src/rgb_controller.o \
+./Core/Src/rtc.o \
+./Core/Src/soft_rtc.o \
+./Core/Src/stm32f1xx_hal_msp.o \
+./Core/Src/stm32f1xx_it.o \
+./Core/Src/syscalls.o \
+./Core/Src/sysmem.o \
+./Core/Src/system_stm32f1xx.o \
+./Core/Src/tim.o \
+./Core/Src/usart.o 
+
 
 # Each subdirectory must supply rules for building sources it contributes
 Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
@@ -78,7 +81,7 @@ Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
 clean: clean-Core-2f-Src
 
 clean-Core-2f-Src:
-	-$(RM) ./Core/Src/adc.cyclo ./Core/Src/adc.d ./Core/Src/adc.o ./Core/Src/adc.su ./Core/Src/board.cyclo ./Core/Src/board.d ./Core/Src/board.o ./Core/Src/board.su ./Core/Src/can.cyclo ./Core/Src/can.d ./Core/Src/can.o ./Core/Src/can.su ./Core/Src/charger_gbt.cyclo ./Core/Src/charger_gbt.d ./Core/Src/charger_gbt.o ./Core/Src/charger_gbt.su ./Core/Src/connector.cyclo ./Core/Src/connector.d ./Core/Src/connector.o ./Core/Src/connector.su ./Core/Src/debug.cyclo ./Core/Src/debug.d ./Core/Src/debug.o ./Core/Src/debug.su ./Core/Src/edcan_handler_user.cyclo ./Core/Src/edcan_handler_user.d ./Core/Src/edcan_handler_user.o ./Core/Src/edcan_handler_user.su ./Core/Src/gbt_packet.cyclo ./Core/Src/gbt_packet.d ./Core/Src/gbt_packet.o ./Core/Src/gbt_packet.su ./Core/Src/gpio.cyclo ./Core/Src/gpio.d ./Core/Src/gpio.o ./Core/Src/gpio.su ./Core/Src/j1939.cyclo ./Core/Src/j1939.d ./Core/Src/j1939.o ./Core/Src/j1939.su ./Core/Src/lock.cyclo ./Core/Src/lock.d ./Core/Src/lock.o ./Core/Src/lock.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/rtc.cyclo ./Core/Src/rtc.d ./Core/Src/rtc.o ./Core/Src/rtc.su ./Core/Src/soft_rtc.cyclo ./Core/Src/soft_rtc.d ./Core/Src/soft_rtc.o ./Core/Src/soft_rtc.su ./Core/Src/stm32f1xx_hal_msp.cyclo ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_hal_msp.su ./Core/Src/stm32f1xx_it.cyclo ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/stm32f1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f1xx.cyclo ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o ./Core/Src/system_stm32f1xx.su ./Core/Src/usart.cyclo ./Core/Src/usart.d ./Core/Src/usart.o ./Core/Src/usart.su
+	-$(RM) ./Core/Src/adc.cyclo ./Core/Src/adc.d ./Core/Src/adc.o ./Core/Src/adc.su ./Core/Src/board.cyclo ./Core/Src/board.d ./Core/Src/board.o ./Core/Src/board.su ./Core/Src/can.cyclo ./Core/Src/can.d ./Core/Src/can.o ./Core/Src/can.su ./Core/Src/charger_gbt.cyclo ./Core/Src/charger_gbt.d ./Core/Src/charger_gbt.o ./Core/Src/charger_gbt.su ./Core/Src/connector.cyclo ./Core/Src/connector.d ./Core/Src/connector.o ./Core/Src/connector.su ./Core/Src/debug.cyclo ./Core/Src/debug.d ./Core/Src/debug.o ./Core/Src/debug.su ./Core/Src/edcan_handler_user.cyclo ./Core/Src/edcan_handler_user.d ./Core/Src/edcan_handler_user.o ./Core/Src/edcan_handler_user.su ./Core/Src/gbt_packet.cyclo ./Core/Src/gbt_packet.d ./Core/Src/gbt_packet.o ./Core/Src/gbt_packet.su ./Core/Src/gpio.cyclo ./Core/Src/gpio.d ./Core/Src/gpio.o ./Core/Src/gpio.su ./Core/Src/j1939.cyclo ./Core/Src/j1939.d ./Core/Src/j1939.o ./Core/Src/j1939.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/rgb_controller.cyclo ./Core/Src/rgb_controller.d ./Core/Src/rgb_controller.o ./Core/Src/rgb_controller.su ./Core/Src/rtc.cyclo ./Core/Src/rtc.d ./Core/Src/rtc.o ./Core/Src/rtc.su ./Core/Src/soft_rtc.cyclo ./Core/Src/soft_rtc.d ./Core/Src/soft_rtc.o ./Core/Src/soft_rtc.su ./Core/Src/stm32f1xx_hal_msp.cyclo ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_hal_msp.su ./Core/Src/stm32f1xx_it.cyclo ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/stm32f1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f1xx.cyclo ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o ./Core/Src/system_stm32f1xx.su ./Core/Src/tim.cyclo ./Core/Src/tim.d ./Core/Src/tim.o ./Core/Src/tim.su ./Core/Src/usart.cyclo ./Core/Src/usart.d ./Core/Src/usart.o ./Core/Src/usart.su
 
 .PHONY: clean-Core-2f-Src
 

Debug/Core/Src/usart.cyclo

@@ -1,3 +1,6 @@
-../Core/Src/usart.c:31:6:MX_USART2_UART_Init	2
+../Core/Src/usart.c:33:6:MX_UART5_Init	2
-../Core/Src/usart.c:59:6:HAL_UART_MspInit	2
+../Core/Src/usart.c:62:6:MX_USART1_UART_Init	2
-../Core/Src/usart.c:97:6:HAL_UART_MspDeInit	2
+../Core/Src/usart.c:91:6:MX_USART2_UART_Init	2
+../Core/Src/usart.c:120:6:MX_USART3_UART_Init	2
+../Core/Src/usart.c:148:6:HAL_UART_MspInit	5
+../Core/Src/usart.c:270:6:HAL_UART_MspDeInit	5

Debug/Core/Startup/subdir.mk

@@ -7,12 +7,12 @@
 S_SRCS += \
 ../Core/Startup/startup_stm32f107vctx.s 
 
-OBJS += \
-./Core/Startup/startup_stm32f107vctx.o 
-
 S_DEPS += \
 ./Core/Startup/startup_stm32f107vctx.d 
 
+OBJS += \
+./Core/Startup/startup_stm32f107vctx.o 
+
 
 # Each subdirectory must supply rules for building sources it contributes
 Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo

@@ -7,19 +7,19 @@
 ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:304:17:HAL_GetTick	1
 ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:313:10:HAL_GetTickPrio	1
 ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:322:19:HAL_SetTickFreq	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:354:21:HAL_GetTickFreq	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:355:21:HAL_GetTickFreq	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:370:13:HAL_Delay	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:371:13:HAL_Delay	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:396:13:HAL_SuspendTick	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:397:13:HAL_SuspendTick	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:412:13:HAL_ResumeTick	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:413:13:HAL_ResumeTick	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:422:10:HAL_GetHalVersion	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:423:10:HAL_GetHalVersion	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:438:10:HAL_GetREVID	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:439:10:HAL_GetREVID	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:454:10:HAL_GetDEVID	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:455:10:HAL_GetDEVID	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:463:10:HAL_GetUIDw0	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:464:10:HAL_GetUIDw0	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:472:10:HAL_GetUIDw1	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:473:10:HAL_GetUIDw1	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:481:10:HAL_GetUIDw2	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:482:10:HAL_GetUIDw2	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:490:6:HAL_DBGMCU_EnableDBGSleepMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:491:6:HAL_DBGMCU_EnableDBGSleepMode	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:506:6:HAL_DBGMCU_DisableDBGSleepMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:507:6:HAL_DBGMCU_DisableDBGSleepMode	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:536:6:HAL_DBGMCU_EnableDBGStopMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:537:6:HAL_DBGMCU_EnableDBGStopMode	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:552:6:HAL_DBGMCU_DisableDBGStopMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:553:6:HAL_DBGMCU_DisableDBGStopMode	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:568:6:HAL_DBGMCU_EnableDBGStandbyMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:569:6:HAL_DBGMCU_EnableDBGStandbyMode	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:584:6:HAL_DBGMCU_DisableDBGStandbyMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:585:6:HAL_DBGMCU_DisableDBGStandbyMode	1

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.cyclo

@@ -1,27 +1,27 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:421:19:HAL_ADC_Init	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:411:19:HAL_ADC_Init	12
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:639:19:HAL_ADC_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:629:19:HAL_ADC_DeInit	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:787:13:HAL_ADC_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:777:13:HAL_ADC_MspInit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:801:13:HAL_ADC_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:791:13:HAL_ADC_MspDeInit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1046:19:HAL_ADC_Start	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1036:19:HAL_ADC_Start	13
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1159:19:HAL_ADC_Stop	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1149:19:HAL_ADC_Stop	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1203:19:HAL_ADC_PollForConversion	25
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1193:19:HAL_ADC_PollForConversion	25
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1342:19:HAL_ADC_PollForEvent	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1332:19:HAL_ADC_PollForEvent	6
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1395:19:HAL_ADC_Start_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1385:19:HAL_ADC_Start_IT	13
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1506:19:HAL_ADC_Stop_IT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1496:19:HAL_ADC_Stop_IT	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1563:19:HAL_ADC_Start_DMA	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1553:19:HAL_ADC_Start_DMA	14
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1704:19:HAL_ADC_Stop_DMA	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1694:19:HAL_ADC_Stop_DMA	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1772:10:HAL_ADC_GetValue	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1762:10:HAL_ADC_GetValue	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1789:6:HAL_ADC_IRQHandler	17
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1779:6:HAL_ADC_IRQHandler	17
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1916:13:HAL_ADC_ConvCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1909:13:HAL_ADC_ConvCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1930:13:HAL_ADC_ConvHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1923:13:HAL_ADC_ConvHalfCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1944:13:HAL_ADC_LevelOutOfWindowCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1937:13:HAL_ADC_LevelOutOfWindowCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1959:13:HAL_ADC_ErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:1952:13:HAL_ADC_ErrorCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2007:19:HAL_ADC_ConfigChannel	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2000:19:HAL_ADC_ConfigChannel	11
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2117:19:HAL_ADC_AnalogWDGConfig	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2110:19:HAL_ADC_AnalogWDGConfig	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2204:10:HAL_ADC_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2197:10:HAL_ADC_GetState	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2215:10:HAL_ADC_GetError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2208:10:HAL_ADC_GetError	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2239:19:ADC_Enable	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2232:19:ADC_Enable	6
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2298:19:ADC_ConversionStop_Disable	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2291:19:ADC_ConversionStop_Disable	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2340:6:ADC_DMAConvCplt	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2333:6:ADC_DMAConvCplt	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2387:6:ADC_DMAHalfConvCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2380:6:ADC_DMAHalfConvCplt	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2405:6:ADC_DMAError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c:2398:6:ADC_DMAError	1

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.cyclo

@@ -1,13 +1,13 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:126:19:HAL_ADCEx_Calibration_Start	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:119:19:HAL_ADCEx_Calibration_Start	10
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:239:19:HAL_ADCEx_InjectedStart	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:229:19:HAL_ADCEx_InjectedStart	10
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:338:19:HAL_ADCEx_InjectedStop	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:328:19:HAL_ADCEx_InjectedStop	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:391:19:HAL_ADCEx_InjectedPollForConversion	25
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:381:19:HAL_ADCEx_InjectedPollForConversion	25
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:517:19:HAL_ADCEx_InjectedStart_IT	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:507:19:HAL_ADCEx_InjectedStart_IT	10
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:616:19:HAL_ADCEx_InjectedStop_IT	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:606:19:HAL_ADCEx_InjectedStop_IT	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:685:19:HAL_ADCEx_MultiModeStart_DMA	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:675:19:HAL_ADCEx_MultiModeStart_DMA	7
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:811:19:HAL_ADCEx_MultiModeStop_DMA	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:801:19:HAL_ADCEx_MultiModeStop_DMA	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:899:10:HAL_ADCEx_InjectedGetValue	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:889:10:HAL_ADCEx_InjectedGetValue	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:936:10:HAL_ADCEx_MultiModeGetValue	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:926:10:HAL_ADCEx_MultiModeGetValue	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:968:13:HAL_ADCEx_InjectedConvCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:958:13:HAL_ADCEx_InjectedConvCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:1010:19:HAL_ADCEx_InjectedConfigChannel	23
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:1000:19:HAL_ADCEx_InjectedConfigChannel	23
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:1271:19:HAL_ADCEx_MultiModeConfigChannel	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c:1261:19:HAL_ADCEx_MultiModeConfigChannel	5

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.cyclo

@@ -1,36 +1,36 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:274:19:HAL_CAN_Init	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:275:19:HAL_CAN_Init	13
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:459:19:HAL_CAN_DeInit	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:460:19:HAL_CAN_DeInit	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:506:13:HAL_CAN_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:507:13:HAL_CAN_MspInit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:522:13:HAL_CAN_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:523:13:HAL_CAN_MspDeInit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:838:19:HAL_CAN_ConfigFilter	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:840:19:HAL_CAN_ConfigFilter	8
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1004:19:HAL_CAN_Start	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1006:19:HAL_CAN_Start	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1056:19:HAL_CAN_Stop	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1058:19:HAL_CAN_Stop	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1111:19:HAL_CAN_RequestSleep	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1113:19:HAL_CAN_RequestSleep	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1142:19:HAL_CAN_WakeUp	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1144:19:HAL_CAN_WakeUp	5
 ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1191:10:HAL_CAN_IsSleepActive	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1222:19:HAL_CAN_AddTxMessage	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1222:19:HAL_CAN_AddTxMessage	8
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1330:19:HAL_CAN_AbortTxRequest	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1322:19:HAL_CAN_AbortTxRequest	6
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1379:10:HAL_CAN_GetTxMailboxesFreeLevel	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1371:10:HAL_CAN_GetTxMailboxesFreeLevel	6
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1422:10:HAL_CAN_IsTxMessagePending	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1414:10:HAL_CAN_IsTxMessagePending	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1454:10:HAL_CAN_GetTxTimestamp	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1446:10:HAL_CAN_GetTxTimestamp	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1488:19:HAL_CAN_GetRxMessage	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1480:19:HAL_CAN_GetRxMessage	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1578:10:HAL_CAN_GetRxFifoFillLevel	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1580:10:HAL_CAN_GetRxFifoFillLevel	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1631:19:HAL_CAN_ActivateNotification	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1633:19:HAL_CAN_ActivateNotification	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1664:19:HAL_CAN_DeactivateNotification	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1666:19:HAL_CAN_DeactivateNotification	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1695:6:HAL_CAN_IRQHandler	51
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:1697:6:HAL_CAN_IRQHandler	51
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2106:13:HAL_CAN_TxMailbox0CompleteCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2108:13:HAL_CAN_TxMailbox0CompleteCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2123:13:HAL_CAN_TxMailbox1CompleteCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2125:13:HAL_CAN_TxMailbox1CompleteCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2140:13:HAL_CAN_TxMailbox2CompleteCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2142:13:HAL_CAN_TxMailbox2CompleteCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2157:13:HAL_CAN_TxMailbox0AbortCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2159:13:HAL_CAN_TxMailbox0AbortCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2174:13:HAL_CAN_TxMailbox1AbortCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2176:13:HAL_CAN_TxMailbox1AbortCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2191:13:HAL_CAN_TxMailbox2AbortCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2193:13:HAL_CAN_TxMailbox2AbortCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2208:13:HAL_CAN_RxFifo0MsgPendingCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2210:13:HAL_CAN_RxFifo0MsgPendingCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2225:13:HAL_CAN_RxFifo0FullCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2227:13:HAL_CAN_RxFifo0FullCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2242:13:HAL_CAN_RxFifo1MsgPendingCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2244:13:HAL_CAN_RxFifo1MsgPendingCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2259:13:HAL_CAN_RxFifo1FullCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2261:13:HAL_CAN_RxFifo1FullCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2276:13:HAL_CAN_SleepCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2278:13:HAL_CAN_SleepCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2292:13:HAL_CAN_WakeUpFromRxMsgCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2294:13:HAL_CAN_WakeUpFromRxMsgCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2309:13:HAL_CAN_ErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2311:13:HAL_CAN_ErrorCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2346:22:HAL_CAN_GetState	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2348:22:HAL_CAN_GetState	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2381:10:HAL_CAN_GetError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2383:10:HAL_CAN_GetError	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2393:19:HAL_CAN_ResetError	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c:2395:19:HAL_CAN_ResetError	3

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo

@@ -12,18 +12,18 @@
 ../Drivers/CMSIS/Include/core_cm3.h:1713:22:NVIC_DecodePriority	2
 ../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset	1
 ../Drivers/CMSIS/Include/core_cm3.h:1834:26:SysTick_Config	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:143:6:HAL_NVIC_SetPriorityGrouping	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:142:6:HAL_NVIC_SetPriorityGrouping	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:165:6:HAL_NVIC_SetPriority	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:164:6:HAL_NVIC_SetPriority	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:187:6:HAL_NVIC_EnableIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:186:6:HAL_NVIC_EnableIRQ	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:203:6:HAL_NVIC_DisableIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:202:6:HAL_NVIC_DisableIRQ	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:216:6:HAL_NVIC_SystemReset	0
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:215:6:HAL_NVIC_SystemReset	0
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:229:10:HAL_SYSTICK_Config	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:228:10:HAL_SYSTICK_Config	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:344:10:HAL_NVIC_GetPriorityGrouping	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:369:10:HAL_NVIC_GetPriorityGrouping	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:371:6:HAL_NVIC_GetPriority	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:396:6:HAL_NVIC_GetPriority	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:386:6:HAL_NVIC_SetPendingIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:411:6:HAL_NVIC_SetPendingIRQ	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:404:10:HAL_NVIC_GetPendingIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:429:10:HAL_NVIC_GetPendingIRQ	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:420:6:HAL_NVIC_ClearPendingIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:445:6:HAL_NVIC_ClearPendingIRQ	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:437:10:HAL_NVIC_GetActive	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:462:10:HAL_NVIC_GetActive	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:454:6:HAL_SYSTICK_CLKSourceConfig	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:479:6:HAL_SYSTICK_CLKSourceConfig	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:472:6:HAL_SYSTICK_IRQHandler	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:497:6:HAL_SYSTICK_IRQHandler	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:481:13:HAL_SYSTICK_Callback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:506:13:HAL_SYSTICK_Callback	1

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo

@@ -1,13 +1,13 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:143:19:HAL_DMA_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:142:19:HAL_DMA_Init	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:220:19:HAL_DMA_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:219:19:HAL_DMA_DeInit	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:319:19:HAL_DMA_Start	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:318:19:HAL_DMA_Start	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:362:19:HAL_DMA_Start_IT	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:361:19:HAL_DMA_Start_IT	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:416:19:HAL_DMA_Abort	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:415:19:HAL_DMA_Abort	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:457:19:HAL_DMA_Abort_IT	26
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:456:19:HAL_DMA_Abort_IT	26
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:502:19:HAL_DMA_PollForTransfer	102
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:501:19:HAL_DMA_PollForTransfer	102
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:603:6:HAL_DMA_IRQHandler	58
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:602:6:HAL_DMA_IRQHandler	58
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:693:19:HAL_DMA_RegisterCallback	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:692:19:HAL_DMA_RegisterCallback	7
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:744:19:HAL_DMA_UnRegisterCallback	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:743:19:HAL_DMA_UnRegisterCallback	8
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:820:22:HAL_DMA_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:819:22:HAL_DMA_GetState	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:832:10:HAL_DMA_GetError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:831:10:HAL_DMA_GetError	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:858:13:DMA_SetConfig	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:857:13:DMA_SetConfig	2

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo

@@ -1,9 +1,9 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:238:19:HAL_EXTI_GetConfigLine	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:317:19:HAL_EXTI_ClearConfigLine	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:370:19:HAL_EXTI_RegisterCallback	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:395:19:HAL_EXTI_GetHandle	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:394:19:HAL_EXTI_GetHandle	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:435:6:HAL_EXTI_IRQHandler	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:467:10:HAL_EXTI_GetPending	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:466:10:HAL_EXTI_GetPending	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:499:6:HAL_EXTI_ClearPending	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:498:6:HAL_EXTI_ClearPending	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:523:6:HAL_EXTI_GenerateSWI	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:522:6:HAL_EXTI_GenerateSWI	1

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo

@@ -1,14 +1,14 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:168:19:HAL_FLASH_Program	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:166:19:HAL_FLASH_Program	7
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:267:19:HAL_FLASH_Program_IT	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:265:19:HAL_FLASH_Program_IT	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:332:6:HAL_FLASH_IRQHandler	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:327:6:HAL_FLASH_IRQHandler	12
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:606:13:HAL_FLASH_EndOfOperationCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:599:13:HAL_FLASH_EndOfOperationCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:624:13:HAL_FLASH_OperationErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:617:13:HAL_FLASH_OperationErrorCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:657:19:HAL_FLASH_Unlock	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:650:19:HAL_FLASH_Unlock	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:695:19:HAL_FLASH_Lock	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:688:19:HAL_FLASH_Lock	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:712:19:HAL_FLASH_OB_Unlock	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:705:19:HAL_FLASH_OB_Unlock	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:732:19:HAL_FLASH_OB_Lock	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:725:19:HAL_FLASH_OB_Lock	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:745:6:HAL_FLASH_OB_Launch	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:738:6:HAL_FLASH_OB_Launch	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:774:10:HAL_FLASH_GetError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:767:10:HAL_FLASH_GetError	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:797:13:FLASH_Program_HalfWord	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:790:13:FLASH_Program_HalfWord	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:826:19:FLASH_WaitForLastOperation	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:819:19:FLASH_WaitForLastOperation	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:914:13:FLASH_SetErrorCode	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:907:13:FLASH_SetErrorCode	5

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo

@@ -1,16 +1,16 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:159:19:HAL_FLASHEx_Erase	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:157:19:HAL_FLASHEx_Erase	7
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:319:19:HAL_FLASHEx_Erase_IT	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:317:19:HAL_FLASHEx_Erase_IT	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:397:19:HAL_FLASHEx_OBErase	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:392:19:HAL_FLASHEx_OBErase	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:446:19:HAL_FLASHEx_OBProgram	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:441:19:HAL_FLASHEx_OBProgram	11
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:527:6:HAL_FLASHEx_OBGetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:522:6:HAL_FLASHEx_OBGetConfig	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:549:10:HAL_FLASHEx_OBGetUserData	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:544:10:HAL_FLASHEx_OBGetUserData	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:595:13:FLASH_MassErase	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:590:13:FLASH_MassErase	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:644:26:FLASH_OB_EnableWRP	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:639:26:FLASH_OB_EnableWRP	10
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:767:26:FLASH_OB_DisableWRP	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:762:26:FLASH_OB_DisableWRP	10
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:886:26:FLASH_OB_RDP_LevelConfig	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:881:26:FLASH_OB_RDP_LevelConfig	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:937:26:FLASH_OB_UserConfig	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:932:26:FLASH_OB_UserConfig	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:988:26:FLASH_OB_ProgramData	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:983:26:FLASH_OB_ProgramData	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1021:17:FLASH_OB_GetWRP	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1016:17:FLASH_OB_GetWRP	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1034:17:FLASH_OB_GetRDP	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1029:17:FLASH_OB_GetRDP	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1060:16:FLASH_OB_GetUser	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1055:16:FLASH_OB_GetUser	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1089:6:FLASH_PageErase	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1084:6:FLASH_PageErase	1

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo

@@ -1,18 +1,18 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:117:13:PWR_OverloadWfe	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:116:13:PWR_OverloadWfe	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:156:6:HAL_PWR_DeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:155:6:HAL_PWR_DeInit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:169:6:HAL_PWR_EnableBkUpAccess	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:168:6:HAL_PWR_EnableBkUpAccess	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:182:6:HAL_PWR_DisableBkUpAccess	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:181:6:HAL_PWR_DisableBkUpAccess	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:316:6:HAL_PWR_ConfigPVD	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:315:6:HAL_PWR_ConfigPVD	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:359:6:HAL_PWR_EnablePVD	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:358:6:HAL_PWR_EnablePVD	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:369:6:HAL_PWR_DisablePVD	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:368:6:HAL_PWR_DisablePVD	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:382:6:HAL_PWR_EnableWakeUpPin	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:381:6:HAL_PWR_EnableWakeUpPin	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:397:6:HAL_PWR_DisableWakeUpPin	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:396:6:HAL_PWR_DisableWakeUpPin	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:417:6:HAL_PWR_EnterSLEEPMode	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:416:6:HAL_PWR_EnterSLEEPMode	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:463:6:HAL_PWR_EnterSTOPMode	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:462:6:HAL_PWR_EnterSTOPMode	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:503:6:HAL_PWR_EnterSTANDBYMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:502:6:HAL_PWR_EnterSTANDBYMode	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:528:6:HAL_PWR_EnableSleepOnExit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:527:6:HAL_PWR_EnableSleepOnExit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:541:6:HAL_PWR_DisableSleepOnExit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:540:6:HAL_PWR_DisableSleepOnExit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:554:6:HAL_PWR_EnableSEVOnPend	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:553:6:HAL_PWR_EnableSEVOnPend	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:567:6:HAL_PWR_DisableSEVOnPend	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:566:6:HAL_PWR_DisableSEVOnPend	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:580:6:HAL_PWR_PVD_IRQHandler	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:579:6:HAL_PWR_PVD_IRQHandler	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:597:13:HAL_PWR_PVDCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:596:13:HAL_PWR_PVDCallback	1

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo

@@ -1,15 +1,15 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:202:19:HAL_RCC_DeInit	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:200:19:HAL_RCC_DeInit	14
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:347:19:HAL_RCC_OscConfig	73
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:345:19:HAL_RCC_OscConfig	73
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:813:19:HAL_RCC_ClockConfig	19
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:811:19:HAL_RCC_ClockConfig	19
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1002:6:HAL_RCC_MCOConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1000:6:HAL_RCC_MCOConfig	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1039:6:HAL_RCC_EnableCSS	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1037:6:HAL_RCC_EnableCSS	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1048:6:HAL_RCC_DisableCSS	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1046:6:HAL_RCC_DisableCSS	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1082:10:HAL_RCC_GetSysClockFreq	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1080:10:HAL_RCC_GetSysClockFreq	6
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1176:10:HAL_RCC_GetHCLKFreq	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1174:10:HAL_RCC_GetHCLKFreq	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1187:10:HAL_RCC_GetPCLK1Freq	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1185:10:HAL_RCC_GetPCLK1Freq	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1199:10:HAL_RCC_GetPCLK2Freq	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1197:10:HAL_RCC_GetPCLK2Freq	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1212:6:HAL_RCC_GetOscConfig	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1210:6:HAL_RCC_GetOscConfig	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1312:6:HAL_RCC_GetClockConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1310:6:HAL_RCC_GetClockConfig	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1347:6:HAL_RCC_NMI_IRQHandler	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1345:6:HAL_RCC_NMI_IRQHandler	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1365:13:RCC_Delay	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1363:13:RCC_Delay	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1379:13:HAL_RCC_CSSCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1377:13:HAL_RCC_CSSCallback	1

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo

@@ -1,7 +1,7 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:100:19:HAL_RCCEx_PeriphCLKConfig	25
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:98:19:HAL_RCCEx_PeriphCLKConfig	25
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:294:6:HAL_RCCEx_GetPeriphCLKConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:292:6:HAL_RCCEx_GetPeriphCLKConfig	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:387:10:HAL_RCCEx_GetPeriphCLKFreq	21
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:385:10:HAL_RCCEx_GetPeriphCLKFreq	21
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:613:19:HAL_RCCEx_EnablePLLI2S	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:611:19:HAL_RCCEx_EnablePLLI2S	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:683:19:HAL_RCCEx_DisablePLLI2S	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:681:19:HAL_RCCEx_DisablePLLI2S	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:739:19:HAL_RCCEx_EnablePLL2	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:737:19:HAL_RCCEx_EnablePLL2	10
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:810:19:HAL_RCCEx_DisablePLL2	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:808:19:HAL_RCCEx_DisablePLL2	6

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.cyclo

@@ -1,28 +1,28 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:275:19:HAL_RTC_Init	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:276:19:HAL_RTC_Init	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:411:19:HAL_RTC_DeInit	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:412:19:HAL_RTC_DeInit	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:650:13:HAL_RTC_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:651:13:HAL_RTC_MspInit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:665:13:HAL_RTC_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:666:13:HAL_RTC_MspDeInit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:703:19:HAL_RTC_SetTime	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:704:19:HAL_RTC_SetTime	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:802:19:HAL_RTC_GetTime	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:803:19:HAL_RTC_GetTime	12
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:913:19:HAL_RTC_SetDate	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:914:19:HAL_RTC_SetDate	10
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1027:19:HAL_RTC_GetDate	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1028:19:HAL_RTC_GetDate	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1092:19:HAL_RTC_SetAlarm	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1093:19:HAL_RTC_SetAlarm	8
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1184:19:HAL_RTC_SetAlarm_IT	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1185:19:HAL_RTC_SetAlarm_IT	8
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1289:19:HAL_RTC_GetAlarm	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1290:19:HAL_RTC_GetAlarm	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1334:19:HAL_RTC_DeactivateAlarm	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1335:19:HAL_RTC_DeactivateAlarm	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1404:6:HAL_RTC_AlarmIRQHandler	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1405:6:HAL_RTC_AlarmIRQHandler	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1436:13:HAL_RTC_AlarmAEventCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1437:13:HAL_RTC_AlarmAEventCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1452:19:HAL_RTC_PollForAlarmAEvent	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1453:19:HAL_RTC_PollForAlarmAEvent	6
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1507:21:HAL_RTC_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1508:21:HAL_RTC_GetState	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1540:19:HAL_RTC_WaitForSynchro	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1541:19:HAL_RTC_WaitForSynchro	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1587:17:RTC_ReadTimeCounter	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1588:17:RTC_ReadTimeCounter	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1619:26:RTC_WriteTimeCounter	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1620:26:RTC_WriteTimeCounter	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1651:17:RTC_ReadAlarmCounter	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1652:17:RTC_ReadAlarmCounter	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1668:26:RTC_WriteAlarmCounter	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1669:26:RTC_WriteAlarmCounter	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1700:26:RTC_EnterInitMode	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1701:26:RTC_EnterInitMode	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1727:26:RTC_ExitInitMode	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1728:26:RTC_ExitInitMode	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1752:16:RTC_ByteToBcd2	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1753:16:RTC_ByteToBcd2	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1770:16:RTC_Bcd2ToByte	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1771:16:RTC_Bcd2ToByte	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1784:13:RTC_DateUpdate	21
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1785:13:RTC_DateUpdate	21
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1879:16:RTC_IsLeapYear	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1880:16:RTC_IsLeapYear	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1916:16:RTC_WeekDayNum	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.c:1917:16:RTC_WeekDayNum	2

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.cyclo

@@ -1,14 +1,14 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:81:19:HAL_RTCEx_SetTamper	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:80:19:HAL_RTCEx_SetTamper	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:127:19:HAL_RTCEx_SetTamper_IT	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:126:19:HAL_RTCEx_SetTamper_IT	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:175:19:HAL_RTCEx_DeactivateTamper	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:174:19:HAL_RTCEx_DeactivateTamper	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:217:6:HAL_RTCEx_TamperIRQHandler	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:216:6:HAL_RTCEx_TamperIRQHandler	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:247:13:HAL_RTCEx_Tamper1EventCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:246:13:HAL_RTCEx_Tamper1EventCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:263:19:HAL_RTCEx_PollForTamper1Event	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:262:19:HAL_RTCEx_PollForTamper1Event	6
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:319:19:HAL_RTCEx_SetSecond_IT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:318:19:HAL_RTCEx_SetSecond_IT	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:349:19:HAL_RTCEx_DeactivateSecond	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:348:19:HAL_RTCEx_DeactivateSecond	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:379:6:HAL_RTCEx_RTCIRQHandler	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:378:6:HAL_RTCEx_RTCIRQHandler	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:419:13:HAL_RTCEx_RTCEventCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:418:13:HAL_RTCEx_RTCEventCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:434:13:HAL_RTCEx_RTCEventErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:433:13:HAL_RTCEx_RTCEventErrorCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:474:6:HAL_RTCEx_BKUPWrite	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:473:6:HAL_RTCEx_BKUPWrite	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:499:10:HAL_RTCEx_BKUPRead	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:498:10:HAL_RTCEx_BKUPRead	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:529:19:HAL_RTCEx_SetSmoothCalib	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.c:528:19:HAL_RTCEx_SetSmoothCalib	3

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cyclo

@@ -0,0 +1,119 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:266:19:HAL_TIM_Base_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:326:19:HAL_TIM_Base_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:369:13:HAL_TIM_Base_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:384:13:HAL_TIM_Base_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:400:19:HAL_TIM_Base_Start	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:439:19:HAL_TIM_Base_Stop	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:459:19:HAL_TIM_Base_Start_IT	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:501:19:HAL_TIM_Base_Stop_IT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:526:19:HAL_TIM_Base_Start_DMA	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:595:19:HAL_TIM_Base_Stop_DMA	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:650:19:HAL_TIM_OC_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:710:19:HAL_TIM_OC_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:753:13:HAL_TIM_OC_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:768:13:HAL_TIM_OC_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:789:19:HAL_TIM_OC_Start	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:843:19:HAL_TIM_OC_Stop	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:878:19:HAL_TIM_OC_Start_IT	20
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:971:19:HAL_TIM_OC_Stop_IT	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1048:19:HAL_TIM_OC_Start_DMA	30
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1212:19:HAL_TIM_OC_Stop_DMA	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1315:19:HAL_TIM_PWM_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1375:19:HAL_TIM_PWM_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1418:13:HAL_TIM_PWM_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1433:13:HAL_TIM_PWM_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1454:19:HAL_TIM_PWM_Start	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1508:19:HAL_TIM_PWM_Stop	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1543:19:HAL_TIM_PWM_Start_IT	20
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1636:19:HAL_TIM_PWM_Stop_IT	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1713:19:HAL_TIM_PWM_Start_DMA	30
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1876:19:HAL_TIM_PWM_Stop_DMA	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1979:19:HAL_TIM_IC_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2039:19:HAL_TIM_IC_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2082:13:HAL_TIM_IC_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2097:13:HAL_TIM_IC_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2118:19:HAL_TIM_IC_Start	21
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2170:19:HAL_TIM_IC_Stop	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2200:19:HAL_TIM_IC_Start_IT	26
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2292:19:HAL_TIM_IC_Stop_IT	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2364:19:HAL_TIM_IC_Start_DMA	33
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2523:19:HAL_TIM_IC_Stop_DMA	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2628:19:HAL_TIM_OnePulse_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2697:19:HAL_TIM_OnePulse_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2742:13:HAL_TIM_OnePulse_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2757:13:HAL_TIM_OnePulse_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2777:19:HAL_TIM_OnePulse_Start	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2834:19:HAL_TIM_OnePulse_Stop	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2877:19:HAL_TIM_OnePulse_Start_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2940:19:HAL_TIM_OnePulse_Stop_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3019:19:HAL_TIM_Encoder_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3133:19:HAL_TIM_Encoder_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3178:13:HAL_TIM_Encoder_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3193:13:HAL_TIM_Encoder_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3213:19:HAL_TIM_Encoder_Start	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3307:19:HAL_TIM_Encoder_Stop	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3367:19:HAL_TIM_Encoder_Start_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3467:19:HAL_TIM_Encoder_Stop_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3532:19:HAL_TIM_Encoder_Start_DMA	32
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3745:19:HAL_TIM_Encoder_Stop_DMA	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3822:6:HAL_TIM_IRQHandler	21
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4040:19:HAL_TIM_OC_ConfigChannel	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4119:19:HAL_TIM_IC_ConfigChannel	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4218:19:HAL_TIM_PWM_ConfigChannel	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4332:19:HAL_TIM_OnePulse_ConfigChannel	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4480:19:HAL_TIM_DMABurst_WriteStart	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4533:19:HAL_TIM_DMABurst_MultiWriteStart	25
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4717:19:HAL_TIM_DMABurst_WriteStop	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4818:19:HAL_TIM_DMABurst_ReadStart	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4869:19:HAL_TIM_DMABurst_MultiReadStart	25
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5053:19:HAL_TIM_DMABurst_ReadStop	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5136:19:HAL_TIM_GenerateEvent	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5173:19:HAL_TIM_ConfigOCrefClear	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5303:19:HAL_TIM_ConfigClockSource	20
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5457:19:HAL_TIM_ConfigTI1Input	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5489:19:HAL_TIM_SlaveConfigSynchro	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5529:19:HAL_TIM_SlaveConfigSynchro_IT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5572:10:HAL_TIM_ReadCapturedValue	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5656:13:HAL_TIM_PeriodElapsedCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5671:13:HAL_TIM_PeriodElapsedHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5686:13:HAL_TIM_OC_DelayElapsedCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5701:13:HAL_TIM_IC_CaptureCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5716:13:HAL_TIM_IC_CaptureHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5731:13:HAL_TIM_PWM_PulseFinishedCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5746:13:HAL_TIM_PWM_PulseFinishedHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5761:13:HAL_TIM_TriggerCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5776:13:HAL_TIM_TriggerHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5791:13:HAL_TIM_ErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6338:22:HAL_TIM_Base_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6348:22:HAL_TIM_OC_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6358:22:HAL_TIM_PWM_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6368:22:HAL_TIM_IC_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6378:22:HAL_TIM_OnePulse_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6388:22:HAL_TIM_Encoder_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6398:23:HAL_TIM_GetActiveChannel	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6416:29:HAL_TIM_GetChannelState	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6433:30:HAL_TIM_DMABurstState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6458:6:TIM_DMAError	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6501:13:TIM_DMADelayPulseCplt	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6560:6:TIM_DMADelayPulseHalfCplt	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6599:6:TIM_DMACaptureCplt	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6662:6:TIM_DMACaptureHalfCplt	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6701:13:TIM_DMAPeriodElapsedCplt	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6722:13:TIM_DMAPeriodElapsedHalfCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6738:13:TIM_DMATriggerCplt	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6759:13:TIM_DMATriggerHalfCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6776:6:TIM_Base_SetConfig	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6831:13:TIM_OC1_SetConfig	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6907:6:TIM_OC2_SetConfig	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6983:13:TIM_OC3_SetConfig	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7058:13:TIM_OC4_SetConfig	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7119:26:TIM_SlaveTimer_SetConfig	16
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7253:6:TIM_TI1_SetConfig	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7300:13:TIM_TI1_ConfigInputStage	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7343:13:TIM_TI2_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7383:13:TIM_TI2_ConfigInputStage	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7425:13:TIM_TI3_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7472:13:TIM_TI4_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7515:13:TIM_ITRx_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7545:6:TIM_ETR_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7575:6:TIM_CCxChannelCmd	1

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cyclo

@@ -0,0 +1,42 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:138:19:HAL_TIMEx_HallSensor_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:240:19:HAL_TIMEx_HallSensor_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:285:13:HAL_TIMEx_HallSensor_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:300:13:HAL_TIMEx_HallSensor_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:315:19:HAL_TIMEx_HallSensor_Start	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:369:19:HAL_TIMEx_HallSensor_Stop	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:397:19:HAL_TIMEx_HallSensor_Start_IT	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:454:19:HAL_TIMEx_HallSensor_Stop_IT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:487:19:HAL_TIMEx_HallSensor_Start_DMA	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:563:19:HAL_TIMEx_HallSensor_Stop_DMA	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:625:19:HAL_TIMEx_OCN_Start	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:676:19:HAL_TIMEx_OCN_Stop	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:708:19:HAL_TIMEx_OCN_Start_IT	19
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:795:19:HAL_TIMEx_OCN_Stop_IT	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:870:19:HAL_TIMEx_OCN_Start_DMA	28
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1008:19:HAL_TIMEx_OCN_Stop_DMA	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1098:19:HAL_TIMEx_PWMN_Start	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1148:19:HAL_TIMEx_PWMN_Stop	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1180:19:HAL_TIMEx_PWMN_Start_IT	19
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1266:19:HAL_TIMEx_PWMN_Stop_IT	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1341:19:HAL_TIMEx_PWMN_Start_DMA	28
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1479:19:HAL_TIMEx_PWMN_Stop_DMA	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1570:19:HAL_TIMEx_OnePulseN_Start	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1619:19:HAL_TIMEx_OnePulseN_Stop	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1658:19:HAL_TIMEx_OnePulseN_Start_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1713:19:HAL_TIMEx_OnePulseN_Stop_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1792:19:HAL_TIMEx_ConfigCommutEvent	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1848:19:HAL_TIMEx_ConfigCommutEvent_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1905:19:HAL_TIMEx_ConfigCommutEvent_DMA	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1954:19:HAL_TIMEx_MasterConfigSynchronization	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2015:19:HAL_TIMEx_ConfigBreakDeadTime	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2062:19:HAL_TIMEx_RemapConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2096:13:HAL_TIMEx_CommutCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2110:13:HAL_TIMEx_CommutHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2125:13:HAL_TIMEx_BreakCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2158:22:HAL_TIMEx_HallSensor_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2173:29:HAL_TIMEx_GetChannelNState	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2202:6:TIMEx_DMACommutationCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2221:6:TIMEx_DMACommutationHalfCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2241:13:TIM_DMADelayPulseNCplt	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2291:13:TIM_DMAErrorCCxN	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2336:13:TIM_CCxNChannelCmd	1

Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.cyclo

@@ -1,61 +1,62 @@
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:352:19:HAL_UART_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:354:19:HAL_UART_Init	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:429:19:HAL_HalfDuplex_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:432:19:HAL_HalfDuplex_Init	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:504:19:HAL_LIN_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:508:19:HAL_LIN_Init	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:587:19:HAL_MultiProcessor_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:592:19:HAL_MultiProcessor_Init	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:666:19:HAL_UART_DeInit	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:672:19:HAL_UART_DeInit	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:711:13:HAL_UART_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:718:13:HAL_UART_MspInit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:726:13:HAL_UART_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:733:13:HAL_UART_MspDeInit	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1136:19:HAL_UART_Transmit	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1138:19:HAL_UART_Transmit	10
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1224:19:HAL_UART_Receive	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1224:19:HAL_UART_Receive	12
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1315:19:HAL_UART_Transmit_IT	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1311:19:HAL_UART_Transmit_IT	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1360:19:HAL_UART_Receive_IT	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1350:19:HAL_UART_Receive_IT	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1395:19:HAL_UART_Transmit_DMA	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1382:19:HAL_UART_Transmit_DMA	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1463:19:HAL_UART_Receive_DMA	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1444:19:HAL_UART_Receive_DMA	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1493:19:HAL_UART_DMAPause	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1471:19:HAL_UART_DMAPause	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1530:19:HAL_UART_DMAResume	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1502:19:HAL_UART_DMAResume	8
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1566:19:HAL_UART_DMAStop	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1536:19:HAL_UART_DMAStop	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1621:19:HAL_UARTEx_ReceiveToIdle	18
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1591:19:HAL_UARTEx_ReceiveToIdle	17
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1747:19:HAL_UARTEx_ReceiveToIdle_IT	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1716:19:HAL_UARTEx_ReceiveToIdle_IT	7
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1808:19:HAL_UARTEx_ReceiveToIdle_DMA	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1776:19:HAL_UARTEx_ReceiveToIdle_DMA	6
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1865:19:HAL_UART_Abort	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1841:29:HAL_UARTEx_GetRxEventType	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1954:19:HAL_UART_AbortTransmit	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1859:19:HAL_UART_Abort	15
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2005:19:HAL_UART_AbortReceive	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1948:19:HAL_UART_AbortTransmit	7
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2066:19:HAL_UART_Abort_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:1999:19:HAL_UART_AbortReceive	10
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2201:19:HAL_UART_AbortTransmit_IT	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2060:19:HAL_UART_Abort_IT	18
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2278:19:HAL_UART_AbortReceive_IT	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2195:19:HAL_UART_AbortTransmit_IT	6
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2356:6:HAL_UART_IRQHandler	37
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2272:19:HAL_UART_AbortReceive_IT	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2586:13:HAL_UART_TxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2350:6:HAL_UART_IRQHandler	45
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2601:13:HAL_UART_TxHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2592:13:HAL_UART_TxCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2616:13:HAL_UART_RxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2607:13:HAL_UART_TxHalfCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2631:13:HAL_UART_RxHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2622:13:HAL_UART_RxCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2646:13:HAL_UART_ErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2637:13:HAL_UART_RxHalfCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2660:13:HAL_UART_AbortCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2652:13:HAL_UART_ErrorCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2675:13:HAL_UART_AbortTransmitCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2666:13:HAL_UART_AbortCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2690:13:HAL_UART_AbortReceiveCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2681:13:HAL_UART_AbortTransmitCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2707:13:HAL_UARTEx_RxEventCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2696:13:HAL_UART_AbortReceiveCpltCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2747:19:HAL_LIN_SendBreak	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2713:13:HAL_UARTEx_RxEventCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2774:19:HAL_MultiProcessor_EnterMuteMode	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2753:19:HAL_LIN_SendBreak	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2801:19:HAL_MultiProcessor_ExitMuteMode	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2780:19:HAL_MultiProcessor_EnterMuteMode	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2828:19:HAL_HalfDuplex_EnableTransmitter	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2808:19:HAL_MultiProcessor_ExitMuteMode	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2863:19:HAL_HalfDuplex_EnableReceiver	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2836:19:HAL_HalfDuplex_EnableTransmitter	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2920:23:HAL_UART_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2871:19:HAL_HalfDuplex_EnableReceiver	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2935:10:HAL_UART_GetError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2928:23:HAL_UART_GetState	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2980:13:UART_DMATransmitCplt	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2943:10:HAL_UART_GetError	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3015:13:UART_DMATxHalfCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:2988:13:UART_DMATransmitCplt	4
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3034:13:UART_DMAReceiveCplt	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3023:13:UART_DMATxHalfCplt	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3091:13:UART_DMARxHalfCplt	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3042:13:UART_DMAReceiveCplt	8
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3126:13:UART_DMAError	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3104:13:UART_DMARxHalfCplt	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3167:26:UART_WaitOnFlagUntilTimeout	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3143:13:UART_DMAError	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3205:19:UART_Start_Receive_IT	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3185:26:UART_WaitOnFlagUntilTimeout	9
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3240:19:UART_Start_Receive_DMA	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3236:19:UART_Start_Receive_IT	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3290:13:UART_EndTxTransfer	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3271:19:UART_Start_Receive_DMA	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3304:13:UART_EndRxTransfer	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3321:13:UART_EndTxTransfer	2
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3328:13:UART_DMAAbortOnError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3335:13:UART_EndRxTransfer	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3352:13:UART_DMATxAbortCallback	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3359:13:UART_DMAAbortOnError	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3398:13:UART_DMARxAbortCallback	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3383:13:UART_DMATxAbortCallback	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3444:13:UART_DMATxOnlyAbortCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3429:13:UART_DMARxAbortCallback	3
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3472:13:UART_DMARxOnlyAbortCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3475:13:UART_DMATxOnlyAbortCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3498:26:UART_Transmit_IT	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3503:13:UART_DMARxOnlyAbortCallback	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3538:26:UART_EndTransmit_IT	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3529:26:UART_Transmit_IT	5
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3563:26:UART_Receive_IT	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3569:26:UART_EndTransmit_IT	1
-../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3661:13:UART_SetConfig	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3594:26:UART_Receive_IT	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c:3695:13:UART_SetConfig	2

Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk

@@ -25,27 +25,6 @@ C_SRCS += \
 ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c \
 ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c 
 
-OBJS += \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o \
-./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o 
-
 C_DEPS += \
 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d \
 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d \
@@ -67,6 +46,27 @@ C_DEPS += \
 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d \
 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d 
 
+OBJS += \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rtc_ex.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o \
+./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o 
+
 
 # Each subdirectory must supply rules for building sources it contributes
 Drivers/STM32F1xx_HAL_Driver/Src/%.o Drivers/STM32F1xx_HAL_Driver/Src/%.su Drivers/STM32F1xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32F1xx_HAL_Driver/Src/%.c Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk

Debug/objects.list

@@ -8,8 +8,8 @@
 "./Core/Src/gbt_packet.o"
 "./Core/Src/gpio.o"
 "./Core/Src/j1939.o"
-"./Core/Src/lock.o"
 "./Core/Src/main.o"
+"./Core/Src/rgb_controller.o"
 "./Core/Src/rtc.o"
 "./Core/Src/soft_rtc.o"
 "./Core/Src/stm32f1xx_hal_msp.o"
@@ -17,6 +17,7 @@
 "./Core/Src/syscalls.o"
 "./Core/Src/sysmem.o"
 "./Core/Src/system_stm32f1xx.o"
+"./Core/Src/tim.o"
 "./Core/Src/usart.o"
 "./Core/Startup/startup_stm32f107vctx.o"
 "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o"

Debug/sources.mk

@@ -10,16 +10,18 @@ C_SRCS :=
 S_UPPER_SRCS := 
 O_SRCS := 
 CYCLO_FILES := 
+OBJDUMP_LIST := 
+S_DEPS := 
+OBJCOPY_SREC := 
+C_DEPS := 
 OBJCOPY_HEX := 
 SIZE_OUTPUT := 
-OBJDUMP_LIST := 
+OBJCOPY_VERILOG := 
 SU_FILES := 
 EXECUTABLES := 
 OBJS := 
 MAP_FILES := 
-S_DEPS := 
 S_UPPER_DEPS := 
-C_DEPS := 
 
 # Every subdirectory with source files must be described here
 SUBDIRS := \

Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h

@@ -1,275 +1,273 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    stm32f1xx.h
+  * @file    stm32f1xx.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   CMSIS STM32F1xx Device Peripheral Access Layer Header File. 
+  * @brief   CMSIS STM32F1xx Device Peripheral Access Layer Header File. 
-  *
+  *
-  *          The file is the unique include file that the application programmer
+  *          The file is the unique include file that the application programmer
-  *          is using in the C source code, usually in main.c. This file contains:
+  *          is using in the C source code, usually in main.c. This file contains:
-  *            - Configuration section that allows to select:
+  *            - Configuration section that allows to select:
-  *              - The STM32F1xx device used in the target application
+  *              - The STM32F1xx device used in the target application
-  *              - To use or not the peripheral’s drivers in application code(i.e. 
+  *              - To use or not the peripheral's drivers in application code(i.e. 
-  *                code will be based on direct access to peripheral’s registers 
+  *                code will be based on direct access to peripheral's registers 
-  *                rather than drivers API), this option is controlled by 
+  *                rather than drivers API), this option is controlled by 
-  *                "#define USE_HAL_DRIVER"
+  *                "#define USE_HAL_DRIVER"
-  *  
+  *  
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+
-
+/** @addtogroup CMSIS
-/** @addtogroup CMSIS
+  * @{
-  * @{
+  */
-  */
+
-
+/** @addtogroup stm32f1xx
-/** @addtogroup stm32f1xx
+  * @{
-  * @{
+  */
-  */
+    
-    
+#ifndef __STM32F1XX_H
-#ifndef __STM32F1XX_H
+#define __STM32F1XX_H
-#define __STM32F1XX_H
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+ extern "C" {
- extern "C" {
+#endif /* __cplusplus */
-#endif /* __cplusplus */
+  
-  
+/** @addtogroup Library_configuration_section
-/** @addtogroup Library_configuration_section
+  * @{
-  * @{
+  */
-  */
+
-
+/**
-/**
+  * @brief STM32 Family
-  * @brief STM32 Family
+  */
-  */
+#if !defined (STM32F1)
-#if !defined (STM32F1)
+#define STM32F1
-#define STM32F1
+#endif /* STM32F1 */
-#endif /* STM32F1 */
+
-
+/* Uncomment the line below according to the target STM32L device used in your 
-/* Uncomment the line below according to the target STM32L device used in your 
+   application 
-   application 
+  */
-  */
+
-
+#if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \
-#if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \
+    !defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \
-    !defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \
+    !defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC)
-    !defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC)
+  /* #define STM32F100xB  */   /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */
-  /* #define STM32F100xB  */   /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */
+  /* #define STM32F100xE */    /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */
-  /* #define STM32F100xE */    /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */
+  /* #define STM32F101x6  */   /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */
-  /* #define STM32F101x6  */   /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */
+  /* #define STM32F101xB  */   /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */
-  /* #define STM32F101xB  */   /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */
+  /* #define STM32F101xE */    /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */ 
-  /* #define STM32F101xE */    /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */ 
+  /* #define STM32F101xG  */   /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */
-  /* #define STM32F101xG  */   /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */
+  /* #define STM32F102x6 */    /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */
-  /* #define STM32F102x6 */    /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */
+  /* #define STM32F102xB  */   /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */
-  /* #define STM32F102xB  */   /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */
+  /* #define STM32F103x6  */   /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */
-  /* #define STM32F103x6  */   /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */
+  /* #define STM32F103xB  */   /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */
-  /* #define STM32F103xB  */   /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */
+  /* #define STM32F103xE */    /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */
-  /* #define STM32F103xE */    /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */
+  /* #define STM32F103xG  */   /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */
-  /* #define STM32F103xG  */   /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */
+  /* #define STM32F105xC */    /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */
-  /* #define STM32F105xC */    /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */
+  /* #define STM32F107xC  */   /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */  
-  /* #define STM32F107xC  */   /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */  
+#endif
-#endif
+
-
+/*  Tip: To avoid modifying this file each time you need to switch between these
-/*  Tip: To avoid modifying this file each time you need to switch between these
+        devices, you can define the device in your toolchain compiler preprocessor.
-        devices, you can define the device in your toolchain compiler preprocessor.
+  */
-  */
+  
-  
+#if !defined  (USE_HAL_DRIVER)
-#if !defined  (USE_HAL_DRIVER)
+/**
-/**
+ * @brief Comment the line below if you will not use the peripherals drivers.
- * @brief Comment the line below if you will not use the peripherals drivers.
+   In this case, these drivers will not be included and the application code will 
-   In this case, these drivers will not be included and the application code will 
+   be based on direct access to peripherals registers 
-   be based on direct access to peripherals registers 
+   */
-   */
+  /*#define USE_HAL_DRIVER */
-  /*#define USE_HAL_DRIVER */
+#endif /* USE_HAL_DRIVER */
-#endif /* USE_HAL_DRIVER */
+
-
+/**
-/**
+  * @brief CMSIS Device version number
-  * @brief CMSIS Device version number V4.3.3
+  */
-  */
+#define __STM32F1_CMSIS_VERSION_MAIN   (0x04) /*!< [31:24] main version */
-#define __STM32F1_CMSIS_VERSION_MAIN   (0x04) /*!< [31:24] main version */
+#define __STM32F1_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
-#define __STM32F1_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
+#define __STM32F1_CMSIS_VERSION_SUB2   (0x05) /*!< [15:8]  sub2 version */
-#define __STM32F1_CMSIS_VERSION_SUB2   (0x03) /*!< [15:8]  sub2 version */
+#define __STM32F1_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
-#define __STM32F1_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
+#define __STM32F1_CMSIS_VERSION        ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
-#define __STM32F1_CMSIS_VERSION        ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
+                                       |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
-                                       |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
+                                       |(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\
-                                       |(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\
+                                       |(__STM32F1_CMSIS_VERSION_RC))
-                                       |(__STM32F1_CMSIS_VERSION_RC))
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup Device_Included
-/** @addtogroup Device_Included
+  * @{
-  * @{
+  */
-  */
+
-
+#if defined(STM32F100xB)
-#if defined(STM32F100xB)
+  #include "stm32f100xb.h"
-  #include "stm32f100xb.h"
+#elif defined(STM32F100xE)
-#elif defined(STM32F100xE)
+  #include "stm32f100xe.h"
-  #include "stm32f100xe.h"
+#elif defined(STM32F101x6)
-#elif defined(STM32F101x6)
+  #include "stm32f101x6.h"
-  #include "stm32f101x6.h"
+#elif defined(STM32F101xB)
-#elif defined(STM32F101xB)
+  #include "stm32f101xb.h"
-  #include "stm32f101xb.h"
+#elif defined(STM32F101xE)
-#elif defined(STM32F101xE)
+  #include "stm32f101xe.h"
-  #include "stm32f101xe.h"
+#elif defined(STM32F101xG)
-#elif defined(STM32F101xG)
+  #include "stm32f101xg.h"
-  #include "stm32f101xg.h"
+#elif defined(STM32F102x6)
-#elif defined(STM32F102x6)
+  #include "stm32f102x6.h"
-  #include "stm32f102x6.h"
+#elif defined(STM32F102xB)
-#elif defined(STM32F102xB)
+  #include "stm32f102xb.h"
-  #include "stm32f102xb.h"
+#elif defined(STM32F103x6)
-#elif defined(STM32F103x6)
+  #include "stm32f103x6.h"
-  #include "stm32f103x6.h"
+#elif defined(STM32F103xB)
-#elif defined(STM32F103xB)
+  #include "stm32f103xb.h"
-  #include "stm32f103xb.h"
+#elif defined(STM32F103xE)
-#elif defined(STM32F103xE)
+  #include "stm32f103xe.h"
-  #include "stm32f103xe.h"
+#elif defined(STM32F103xG)
-#elif defined(STM32F103xG)
+  #include "stm32f103xg.h"
-  #include "stm32f103xg.h"
+#elif defined(STM32F105xC)
-#elif defined(STM32F105xC)
+  #include "stm32f105xc.h"
-  #include "stm32f105xc.h"
+#elif defined(STM32F107xC)
-#elif defined(STM32F107xC)
+  #include "stm32f107xc.h"
-  #include "stm32f107xc.h"
+#else
-#else
+ #error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)"
- #error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)"
+#endif
-#endif
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup Exported_types
-/** @addtogroup Exported_types
+  * @{
-  * @{
+  */  
-  */  
+typedef enum 
-typedef enum 
+{
-{
+  RESET = 0, 
-  RESET = 0, 
+  SET = !RESET
-  SET = !RESET
+} FlagStatus, ITStatus;
-} FlagStatus, ITStatus;
+
-
+typedef enum 
-typedef enum 
+{
-{
+  DISABLE = 0, 
-  DISABLE = 0, 
+  ENABLE = !DISABLE
-  ENABLE = !DISABLE
+} FunctionalState;
-} FunctionalState;
+#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
-#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
+
-
+typedef enum
-typedef enum
+{
-{
+  SUCCESS = 0U,
-  SUCCESS = 0U,
+  ERROR = !SUCCESS
-  ERROR = !SUCCESS
+} ErrorStatus;
-} ErrorStatus;
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+
-
+/** @addtogroup Exported_macros
-/** @addtogroup Exported_macros
+  * @{
-  * @{
+  */
-  */
+#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
-#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
+
-
+#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
-#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
+
-
+#define READ_BIT(REG, BIT)    ((REG) & (BIT))
-#define READ_BIT(REG, BIT)    ((REG) & (BIT))
+
-
+#define CLEAR_REG(REG)        ((REG) = (0x0))
-#define CLEAR_REG(REG)        ((REG) = (0x0))
+
-
+#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
-#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
+
-
+#define READ_REG(REG)         ((REG))
-#define READ_REG(REG)         ((REG))
+
-
+#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
-#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
+
-
+#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL))) 
-#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL))) 
+
-
+/* Use of CMSIS compiler intrinsics for register exclusive access */
-/* Use of CMSIS compiler intrinsics for register exclusive access */
+/* Atomic 32-bit register access macro to set one or several bits */
-/* Atomic 32-bit register access macro to set one or several bits */
+#define ATOMIC_SET_BIT(REG, BIT)                             \
-#define ATOMIC_SET_BIT(REG, BIT)                             \
+  do {                                                       \
-  do {                                                       \
+    uint32_t val;                                            \
-    uint32_t val;                                            \
+    do {                                                     \
-    do {                                                     \
+      val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT);       \
-      val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT);       \
+    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
-    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
+  } while(0)
-  } while(0)
+
-
+/* Atomic 32-bit register access macro to clear one or several bits */
-/* Atomic 32-bit register access macro to clear one or several bits */
+#define ATOMIC_CLEAR_BIT(REG, BIT)                           \
-#define ATOMIC_CLEAR_BIT(REG, BIT)                           \
+  do {                                                       \
-  do {                                                       \
+    uint32_t val;                                            \
-    uint32_t val;                                            \
+    do {                                                     \
-    do {                                                     \
+      val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT);      \
-      val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT);      \
+    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
-    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
+  } while(0)
-  } while(0)
+
-
+/* Atomic 32-bit register access macro to clear and set one or several bits */
-/* Atomic 32-bit register access macro to clear and set one or several bits */
+#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)                          \
-#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)                          \
+  do {                                                                     \
-  do {                                                                     \
+    uint32_t val;                                                          \
-    uint32_t val;                                                          \
+    do {                                                                   \
-    do {                                                                   \
+      val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
-      val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
+    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U);               \
-    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U);               \
+  } while(0)
-  } while(0)
+
-
+/* Atomic 16-bit register access macro to set one or several bits */
-/* Atomic 16-bit register access macro to set one or several bits */
+#define ATOMIC_SETH_BIT(REG, BIT)                            \
-#define ATOMIC_SETH_BIT(REG, BIT)                            \
+  do {                                                       \
-  do {                                                       \
+    uint16_t val;                                            \
-    uint16_t val;                                            \
+    do {                                                     \
-    do {                                                     \
+      val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT);       \
-      val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT);       \
+    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
-    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
+  } while(0)
-  } while(0)
+
-
+/* Atomic 16-bit register access macro to clear one or several bits */
-/* Atomic 16-bit register access macro to clear one or several bits */
+#define ATOMIC_CLEARH_BIT(REG, BIT)                          \
-#define ATOMIC_CLEARH_BIT(REG, BIT)                          \
+  do {                                                       \
-  do {                                                       \
+    uint16_t val;                                            \
-    uint16_t val;                                            \
+    do {                                                     \
-    do {                                                     \
+      val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT);      \
-      val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT);      \
+    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
-    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
+  } while(0)
-  } while(0)
+
-
+/* Atomic 16-bit register access macro to clear and set one or several bits */
-/* Atomic 16-bit register access macro to clear and set one or several bits */
+#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)                         \
-#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)                         \
+  do {                                                                     \
-  do {                                                                     \
+    uint16_t val;                                                          \
-    uint16_t val;                                                          \
+    do {                                                                   \
-    do {                                                                   \
+      val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
-      val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
+    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U);               \
-    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U);               \
+  } while(0)
-  } while(0)
+
-
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#if defined (USE_HAL_DRIVER)
-#if defined (USE_HAL_DRIVER)
+ #include "stm32f1xx_hal.h"
- #include "stm32f1xx_hal.h"
+#endif /* USE_HAL_DRIVER */
-#endif /* USE_HAL_DRIVER */
+
-
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+}
-}
+#endif /* __cplusplus */
-#endif /* __cplusplus */
+
-
+#endif /* __STM32F1xx_H */
-#endif /* __STM32F1xx_H */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+  
-  
+
-
+
-
+
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h

@@ -1,98 +1,96 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    system_stm32f10x.h
+  * @file    system_stm32f1xx.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
+  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+
-
+/** @addtogroup CMSIS
-/** @addtogroup CMSIS
+  * @{
-  * @{
+  */
-  */
+
-
+/** @addtogroup stm32f10x_system
-/** @addtogroup stm32f10x_system
+  * @{
-  * @{
+  */  
-  */  
+  
-  
+/**
-/**
+  * @brief Define to prevent recursive inclusion
-  * @brief Define to prevent recursive inclusion
+  */
-  */
+#ifndef __SYSTEM_STM32F10X_H
-#ifndef __SYSTEM_STM32F10X_H
+#define __SYSTEM_STM32F10X_H
-#define __SYSTEM_STM32F10X_H
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+ extern "C" {
- extern "C" {
+#endif 
-#endif 
+
-
+/** @addtogroup STM32F10x_System_Includes
-/** @addtogroup STM32F10x_System_Includes
+  * @{
-  * @{
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+
-
+/** @addtogroup STM32F10x_System_Exported_types
-/** @addtogroup STM32F10x_System_Exported_types
+  * @{
-  * @{
+  */
-  */
+
-
+extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
-extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
+extern const uint8_t  AHBPrescTable[16U];  /*!< AHB prescalers table values */
-extern const uint8_t  AHBPrescTable[16U];  /*!< AHB prescalers table values */
+extern const uint8_t  APBPrescTable[8U];   /*!< APB prescalers table values */
-extern const uint8_t  APBPrescTable[8U];   /*!< APB prescalers table values */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup STM32F10x_System_Exported_Constants
-/** @addtogroup STM32F10x_System_Exported_Constants
+  * @{
-  * @{
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup STM32F10x_System_Exported_Macros
-/** @addtogroup STM32F10x_System_Exported_Macros
+  * @{
-  * @{
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup STM32F10x_System_Exported_Functions
-/** @addtogroup STM32F10x_System_Exported_Functions
+  * @{
-  * @{
+  */
-  */
+  
-  
+extern void SystemInit(void);
-extern void SystemInit(void);
+extern void SystemCoreClockUpdate(void);
-extern void SystemCoreClockUpdate(void);
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+}
-}
+#endif
-#endif
+
-
+#endif /*__SYSTEM_STM32F10X_H */
-#endif /*__SYSTEM_STM32F10X_H */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+  
-  
+/**
-/**
+  * @}
-  * @}
+  */
-  */  
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h

@@ -1,358 +1,357 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    stm32f1xx_hal.h
+  * @file    stm32f1xx_hal.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   This file contains all the functions prototypes for the HAL
+  * @brief   This file contains all the functions prototypes for the HAL
-  *          module driver.
+  *          module driver.
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+
-
+/* Define to prevent recursive inclusion -------------------------------------*/
-/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_H
-#ifndef __STM32F1xx_HAL_H
+#define __STM32F1xx_HAL_H
-#define __STM32F1xx_HAL_H
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+extern "C" {
-extern "C" {
+#endif
-#endif
+
-
+/* Includes ------------------------------------------------------------------*/
-/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_conf.h"
-#include "stm32f1xx_hal_conf.h"
+
-
+/** @addtogroup STM32F1xx_HAL_Driver
-/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
-  * @{
+  */
-  */
+
-
+/** @addtogroup HAL
-/** @addtogroup HAL
+  * @{
-  * @{
+  */
-  */
+
-
+/* Exported constants --------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
+
-
+/** @defgroup HAL_Exported_Constants HAL Exported Constants
-/** @defgroup HAL_Exported_Constants HAL Exported Constants
+  * @{
-  * @{
+  */
-  */
+
-
+/** @defgroup HAL_TICK_FREQ Tick Frequency
-/** @defgroup HAL_TICK_FREQ Tick Frequency
+  * @{
-  * @{
+  */
-  */
+typedef enum
-typedef enum
+{
-{
+  HAL_TICK_FREQ_10HZ         = 100U,
-  HAL_TICK_FREQ_10HZ         = 100U,
+  HAL_TICK_FREQ_100HZ        = 10U,
-  HAL_TICK_FREQ_100HZ        = 10U,
+  HAL_TICK_FREQ_1KHZ         = 1U,
-  HAL_TICK_FREQ_1KHZ         = 1U,
+  HAL_TICK_FREQ_DEFAULT      = HAL_TICK_FREQ_1KHZ
-  HAL_TICK_FREQ_DEFAULT      = HAL_TICK_FREQ_1KHZ
+} HAL_TickFreqTypeDef;
-} HAL_TickFreqTypeDef;
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+/* Exported types ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
+extern __IO uint32_t uwTick;
-extern __IO uint32_t uwTick;
+extern uint32_t uwTickPrio;
-extern uint32_t uwTickPrio;
+extern HAL_TickFreqTypeDef uwTickFreq;
-extern HAL_TickFreqTypeDef uwTickFreq;
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+/* Exported macro ------------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
+/** @defgroup HAL_Exported_Macros HAL Exported Macros
-/** @defgroup HAL_Exported_Macros HAL Exported Macros
+  * @{
-  * @{
+  */
-  */
+
-
+/** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
-/** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
+  * @brief   Freeze/Unfreeze Peripherals in Debug mode
-  * @brief   Freeze/Unfreeze Peripherals in Debug mode
+  * Note: On devices STM32F10xx8 and STM32F10xxB,
-  * Note: On devices STM32F10xx8 and STM32F10xxB,
+  *                  STM32F101xC/D/E and STM32F103xC/D/E,
-  *                  STM32F101xC/D/E and STM32F103xC/D/E,
+  *                  STM32F101xF/G and STM32F103xF/G
-  *                  STM32F101xF/G and STM32F103xF/G
+  *                  STM32F10xx4 and STM32F10xx6
-  *                  STM32F10xx4 and STM32F10xx6
+  *       Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
-  *       Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
+  *       debug mode (not accessible by the user software in normal mode).
-  *       debug mode (not accessible by the user software in normal mode).
+  *       Refer to errata sheet of these devices for more details.
-  *       Refer to errata sheet of these devices for more details.
+  * @{
-  * @{
+  */
-  */
+
-
+/* Peripherals on APB1 */
-/* Peripherals on APB1 */
+/**
-/**
+  * @brief  TIM2 Peripherals Debug mode
-  * @brief  TIM2 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM2()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM2()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM2()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM2()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
+
-
+/**
-/**
+  * @brief  TIM3 Peripherals Debug mode
-  * @brief  TIM3 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM3()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM3()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM3()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM3()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
+
-
+#if defined (DBGMCU_CR_DBG_TIM4_STOP)
-#if defined (DBGMCU_CR_DBG_TIM4_STOP)
+/**
-/**
+  * @brief  TIM4 Peripherals Debug mode
-  * @brief  TIM4 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM4()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM4()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM4()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM4()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM5_STOP)
-#if defined (DBGMCU_CR_DBG_TIM5_STOP)
+/**
-/**
+  * @brief  TIM5 Peripherals Debug mode
-  * @brief  TIM5 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM5()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM5()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM5()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM5()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM6_STOP)
-#if defined (DBGMCU_CR_DBG_TIM6_STOP)
+/**
-/**
+  * @brief  TIM6 Peripherals Debug mode
-  * @brief  TIM6 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM6()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM6()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM6()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM6()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM7_STOP)
-#if defined (DBGMCU_CR_DBG_TIM7_STOP)
+/**
-/**
+  * @brief  TIM7 Peripherals Debug mode
-  * @brief  TIM7 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM7()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM7()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM7()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM7()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM12_STOP)
-#if defined (DBGMCU_CR_DBG_TIM12_STOP)
+/**
-/**
+  * @brief  TIM12 Peripherals Debug mode
-  * @brief  TIM12 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM12()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM12()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM12()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM12()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM13_STOP)
-#if defined (DBGMCU_CR_DBG_TIM13_STOP)
+/**
-/**
+  * @brief  TIM13 Peripherals Debug mode
-  * @brief  TIM13 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM13()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM13()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM13()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM13()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM14_STOP)
-#if defined (DBGMCU_CR_DBG_TIM14_STOP)
+/**
-/**
+  * @brief  TIM14 Peripherals Debug mode
-  * @brief  TIM14 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM14()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM14()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM14()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM14()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
+#endif
-#endif
+
-
+/**
-/**
+  * @brief  WWDG Peripherals Debug mode
-  * @brief  WWDG Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_WWDG()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
-#define __HAL_DBGMCU_FREEZE_WWDG()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
+#define __HAL_DBGMCU_UNFREEZE_WWDG()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
-#define __HAL_DBGMCU_UNFREEZE_WWDG()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
+
-
+/**
-/**
+  * @brief  IWDG Peripherals Debug mode
-  * @brief  IWDG Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_IWDG()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
-#define __HAL_DBGMCU_FREEZE_IWDG()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
+#define __HAL_DBGMCU_UNFREEZE_IWDG()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
-#define __HAL_DBGMCU_UNFREEZE_IWDG()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
+
-
+/**
-/**
+  * @brief  I2C1 Peripherals Debug mode
-  * @brief  I2C1 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()    SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
-#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()    SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
+#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
-#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
+
-
+#if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
-#if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
+/**
-/**
+  * @brief  I2C2 Peripherals Debug mode
-  * @brief  I2C2 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()    SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
-#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()    SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
+#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
-#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_CAN1_STOP)
-#if defined (DBGMCU_CR_DBG_CAN1_STOP)
+/**
-/**
+  * @brief  CAN1 Peripherals Debug mode
-  * @brief  CAN1 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_CAN1()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
-#define __HAL_DBGMCU_FREEZE_CAN1()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
+#define __HAL_DBGMCU_UNFREEZE_CAN1()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
-#define __HAL_DBGMCU_UNFREEZE_CAN1()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_CAN2_STOP)
-#if defined (DBGMCU_CR_DBG_CAN2_STOP)
+/**
-/**
+  * @brief  CAN2 Peripherals Debug mode
-  * @brief  CAN2 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_CAN2()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
-#define __HAL_DBGMCU_FREEZE_CAN2()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
+#define __HAL_DBGMCU_UNFREEZE_CAN2()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
-#define __HAL_DBGMCU_UNFREEZE_CAN2()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
+#endif
-#endif
+
-
+/* Peripherals on APB2 */
-/* Peripherals on APB2 */
+#if defined (DBGMCU_CR_DBG_TIM1_STOP)
-#if defined (DBGMCU_CR_DBG_TIM1_STOP)
+/**
-/**
+  * @brief  TIM1 Peripherals Debug mode
-  * @brief  TIM1 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM1()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM1()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM1()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM1()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM8_STOP)
-#if defined (DBGMCU_CR_DBG_TIM8_STOP)
+/**
-/**
+  * @brief  TIM8 Peripherals Debug mode
-  * @brief  TIM8 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM8()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM8()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM8()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM8()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM9_STOP)
-#if defined (DBGMCU_CR_DBG_TIM9_STOP)
+/**
-/**
+  * @brief  TIM9 Peripherals Debug mode
-  * @brief  TIM9 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM9()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM9()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM9()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM9()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM10_STOP)
-#if defined (DBGMCU_CR_DBG_TIM10_STOP)
+/**
-/**
+  * @brief  TIM10 Peripherals Debug mode
-  * @brief  TIM10 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM10()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM10()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM10()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM10()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM11_STOP)
-#if defined (DBGMCU_CR_DBG_TIM11_STOP)
+/**
-/**
+  * @brief  TIM11 Peripherals Debug mode
-  * @brief  TIM11 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM11()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM11()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM11()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM11()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
+#endif
-#endif
+
-
+
-
+#if defined (DBGMCU_CR_DBG_TIM15_STOP)
-#if defined (DBGMCU_CR_DBG_TIM15_STOP)
+/**
-/**
+  * @brief  TIM15 Peripherals Debug mode
-  * @brief  TIM15 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM15()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM15()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM15()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM15()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM16_STOP)
-#if defined (DBGMCU_CR_DBG_TIM16_STOP)
+/**
-/**
+  * @brief  TIM16 Peripherals Debug mode
-  * @brief  TIM16 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM16()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM16()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM16()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM16()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
+#endif
-#endif
+
-
+#if defined (DBGMCU_CR_DBG_TIM17_STOP)
-#if defined (DBGMCU_CR_DBG_TIM17_STOP)
+/**
-/**
+  * @brief  TIM17 Peripherals Debug mode
-  * @brief  TIM17 Peripherals Debug mode
+  */
-  */
+#define __HAL_DBGMCU_FREEZE_TIM17()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
-#define __HAL_DBGMCU_FREEZE_TIM17()            SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
+#define __HAL_DBGMCU_UNFREEZE_TIM17()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM17()          CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
+#endif
-#endif
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup HAL_Private_Macros HAL Private Macros
-/** @defgroup HAL_Private_Macros HAL Private Macros
+  * @{
-  * @{
+  */
-  */
+#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ)  || \
-#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ)  || \
+                           ((FREQ) == HAL_TICK_FREQ_100HZ) || \
-                           ((FREQ) == HAL_TICK_FREQ_100HZ) || \
+                           ((FREQ) == HAL_TICK_FREQ_1KHZ))
-                           ((FREQ) == HAL_TICK_FREQ_1KHZ))
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Exported functions --------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
+/** @addtogroup HAL_Exported_Functions
-/** @addtogroup HAL_Exported_Functions
+  * @{
-  * @{
+  */
-  */
+/** @addtogroup HAL_Exported_Functions_Group1
-/** @addtogroup HAL_Exported_Functions_Group1
+  * @{
-  * @{
+  */
-  */
+/* Initialization and de-initialization functions  ******************************/
-/* Initialization and de-initialization functions  ******************************/
+HAL_StatusTypeDef HAL_Init(void);
-HAL_StatusTypeDef HAL_Init(void);
+HAL_StatusTypeDef HAL_DeInit(void);
-HAL_StatusTypeDef HAL_DeInit(void);
+void HAL_MspInit(void);
-void HAL_MspInit(void);
+void HAL_MspDeInit(void);
-void HAL_MspDeInit(void);
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
-HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup HAL_Exported_Functions_Group2
-/** @addtogroup HAL_Exported_Functions_Group2
+  * @{
-  * @{
+  */
-  */
+/* Peripheral Control functions  ************************************************/
-/* Peripheral Control functions  ************************************************/
+void HAL_IncTick(void);
-void HAL_IncTick(void);
+void HAL_Delay(uint32_t Delay);
-void HAL_Delay(uint32_t Delay);
+uint32_t HAL_GetTick(void);
-uint32_t HAL_GetTick(void);
+uint32_t HAL_GetTickPrio(void);
-uint32_t HAL_GetTickPrio(void);
+HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
-HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
+HAL_TickFreqTypeDef HAL_GetTickFreq(void);
-HAL_TickFreqTypeDef HAL_GetTickFreq(void);
+void HAL_SuspendTick(void);
-void HAL_SuspendTick(void);
+void HAL_ResumeTick(void);
-void HAL_ResumeTick(void);
+uint32_t HAL_GetHalVersion(void);
-uint32_t HAL_GetHalVersion(void);
+uint32_t HAL_GetREVID(void);
-uint32_t HAL_GetREVID(void);
+uint32_t HAL_GetDEVID(void);
-uint32_t HAL_GetDEVID(void);
+uint32_t HAL_GetUIDw0(void);
-uint32_t HAL_GetUIDw0(void);
+uint32_t HAL_GetUIDw1(void);
-uint32_t HAL_GetUIDw1(void);
+uint32_t HAL_GetUIDw2(void);
-uint32_t HAL_GetUIDw2(void);
+void HAL_DBGMCU_EnableDBGSleepMode(void);
-void HAL_DBGMCU_EnableDBGSleepMode(void);
+void HAL_DBGMCU_DisableDBGSleepMode(void);
-void HAL_DBGMCU_DisableDBGSleepMode(void);
+void HAL_DBGMCU_EnableDBGStopMode(void);
-void HAL_DBGMCU_EnableDBGStopMode(void);
+void HAL_DBGMCU_DisableDBGStopMode(void);
-void HAL_DBGMCU_DisableDBGStopMode(void);
+void HAL_DBGMCU_EnableDBGStandbyMode(void);
-void HAL_DBGMCU_EnableDBGStandbyMode(void);
+void HAL_DBGMCU_DisableDBGStandbyMode(void);
-void HAL_DBGMCU_DisableDBGStandbyMode(void);
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+/* Private types -------------------------------------------------------------*/
-/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
+/** @defgroup HAL_Private_Variables HAL Private Variables
-/** @defgroup HAL_Private_Variables HAL Private Variables
+  * @{
-  * @{
+  */
-  */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+/* Private constants ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
+/** @defgroup HAL_Private_Constants HAL Private Constants
-/** @defgroup HAL_Private_Constants HAL Private Constants
+  * @{
-  * @{
+  */
-  */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+/* Private macros ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+}
-}
+#endif
-#endif
+
-
+#endif /* __STM32F1xx_HAL_H */
-#endif /* __STM32F1xx_HAL_H */
+
-
+
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h

@@ -1,410 +1,410 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    stm32f1xx_hal_cortex.h
+  * @file    stm32f1xx_hal_cortex.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   Header file of CORTEX HAL module.
+  * @brief   Header file of CORTEX HAL module.
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file in
-  * the "License"; You may not use this file except in compliance with the
+  * the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+
-
+/* Define to prevent recursive inclusion -------------------------------------*/
-/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_CORTEX_H
-#ifndef __STM32F1xx_HAL_CORTEX_H
+#define __STM32F1xx_HAL_CORTEX_H
-#define __STM32F1xx_HAL_CORTEX_H
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+ extern "C" {
- extern "C" {
+#endif
-#endif
+
-
+/* Includes ------------------------------------------------------------------*/
-/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"
-#include "stm32f1xx_hal_def.h"
+
-
+/** @addtogroup STM32F1xx_HAL_Driver
-/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
-  * @{
+  */
-  */
+
-
+/** @addtogroup CORTEX
-/** @addtogroup CORTEX
+  * @{
-  * @{
+  */ 
-  */ 
+/* Exported types ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
+/** @defgroup CORTEX_Exported_Types Cortex Exported Types
-/** @defgroup CORTEX_Exported_Types Cortex Exported Types
+  * @{
-  * @{
+  */
-  */
+
-
+#if (__MPU_PRESENT == 1U)
-#if (__MPU_PRESENT == 1U)
+/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
-/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
+  * @brief  MPU Region initialization structure 
-  * @brief  MPU Region initialization structure 
+  * @{
-  * @{
+  */
-  */
+typedef struct
-typedef struct
+{
-{
+  uint8_t                Enable;                /*!< Specifies the status of the region. 
-  uint8_t                Enable;                /*!< Specifies the status of the region. 
+                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Enable                 */
-                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Enable                 */
+  uint8_t                Number;                /*!< Specifies the number of the region to protect. 
-  uint8_t                Number;                /*!< Specifies the number of the region to protect. 
+                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Number                 */
-                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Number                 */
+  uint32_t               BaseAddress;           /*!< Specifies the base address of the region to protect.                           */
-  uint32_t               BaseAddress;           /*!< Specifies the base address of the region to protect.                           */
+  uint8_t                Size;                  /*!< Specifies the size of the region to protect. 
-  uint8_t                Size;                  /*!< Specifies the size of the region to protect. 
+                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Size                   */
-                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Size                   */
+  uint8_t                SubRegionDisable;      /*!< Specifies the number of the subregion protection to disable. 
-  uint8_t                SubRegionDisable;      /*!< Specifies the number of the subregion protection to disable. 
+                                                     This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF    */         
-                                                     This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF    */         
+  uint8_t                TypeExtField;          /*!< Specifies the TEX field level.
-  uint8_t                TypeExtField;          /*!< Specifies the TEX field level.
+                                                     This parameter can be a value of @ref CORTEX_MPU_TEX_Levels                    */                 
-                                                     This parameter can be a value of @ref CORTEX_MPU_TEX_Levels                    */                 
+  uint8_t                AccessPermission;      /*!< Specifies the region access permission type. 
-  uint8_t                AccessPermission;      /*!< Specifies the region access permission type. 
+                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes  */
-                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes  */
+  uint8_t                DisableExec;           /*!< Specifies the instruction access status. 
-  uint8_t                DisableExec;           /*!< Specifies the instruction access status. 
+                                                     This parameter can be a value of @ref CORTEX_MPU_Instruction_Access            */
-                                                     This parameter can be a value of @ref CORTEX_MPU_Instruction_Access            */
+  uint8_t                IsShareable;           /*!< Specifies the shareability status of the protected region. 
-  uint8_t                IsShareable;           /*!< Specifies the shareability status of the protected region. 
+                                                     This parameter can be a value of @ref CORTEX_MPU_Access_Shareable              */
-                                                     This parameter can be a value of @ref CORTEX_MPU_Access_Shareable              */
+  uint8_t                IsCacheable;           /*!< Specifies the cacheable status of the region protected. 
-  uint8_t                IsCacheable;           /*!< Specifies the cacheable status of the region protected. 
+                                                     This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable              */
-                                                     This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable              */
+  uint8_t                IsBufferable;          /*!< Specifies the bufferable status of the protected region. 
-  uint8_t                IsBufferable;          /*!< Specifies the bufferable status of the protected region. 
+                                                     This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable             */
-                                                     This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable             */
+}MPU_Region_InitTypeDef;
-}MPU_Region_InitTypeDef;
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+#endif /* __MPU_PRESENT */
-#endif /* __MPU_PRESENT */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Exported constants --------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
+
-
+/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
-/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
+  * @{
-  * @{
+  */
-  */
+
-
+/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
-/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
+  * @{
-  * @{
+  */
-  */
+#define NVIC_PRIORITYGROUP_0         0x00000007U /*!< 0 bits for pre-emption priority
-#define NVIC_PRIORITYGROUP_0         0x00000007U /*!< 0 bits for pre-emption priority
+                                                      4 bits for subpriority */
-                                                      4 bits for subpriority */
+#define NVIC_PRIORITYGROUP_1         0x00000006U /*!< 1 bits for pre-emption priority
-#define NVIC_PRIORITYGROUP_1         0x00000006U /*!< 1 bits for pre-emption priority
+                                                      3 bits for subpriority */
-                                                      3 bits for subpriority */
+#define NVIC_PRIORITYGROUP_2         0x00000005U /*!< 2 bits for pre-emption priority
-#define NVIC_PRIORITYGROUP_2         0x00000005U /*!< 2 bits for pre-emption priority
+                                                      2 bits for subpriority */
-                                                      2 bits for subpriority */
+#define NVIC_PRIORITYGROUP_3         0x00000004U /*!< 3 bits for pre-emption priority
-#define NVIC_PRIORITYGROUP_3         0x00000004U /*!< 3 bits for pre-emption priority
+                                                      1 bits for subpriority */
-                                                      1 bits for subpriority */
+#define NVIC_PRIORITYGROUP_4         0x00000003U /*!< 4 bits for pre-emption priority
-#define NVIC_PRIORITYGROUP_4         0x00000003U /*!< 4 bits for pre-emption priority
+                                                      0 bits for subpriority */
-                                                      0 bits for subpriority */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source 
-/** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source 
+  * @{
-  * @{
+  */
-  */
+#define SYSTICK_CLKSOURCE_HCLK_DIV8    0x00000000U
-#define SYSTICK_CLKSOURCE_HCLK_DIV8    0x00000000U
+#define SYSTICK_CLKSOURCE_HCLK         0x00000004U
-#define SYSTICK_CLKSOURCE_HCLK         0x00000004U
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#if (__MPU_PRESENT == 1)
-#if (__MPU_PRESENT == 1)
+/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control
-/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control
+  * @{
-  * @{
+  */
-  */
+#define  MPU_HFNMI_PRIVDEF_NONE           0x00000000U
-#define  MPU_HFNMI_PRIVDEF_NONE           0x00000000U
+#define  MPU_HARDFAULT_NMI                MPU_CTRL_HFNMIENA_Msk
-#define  MPU_HARDFAULT_NMI                MPU_CTRL_HFNMIENA_Msk
+#define  MPU_PRIVILEGED_DEFAULT           MPU_CTRL_PRIVDEFENA_Msk
-#define  MPU_PRIVILEGED_DEFAULT           MPU_CTRL_PRIVDEFENA_Msk
+#define  MPU_HFNMI_PRIVDEF               (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk)
-#define  MPU_HFNMI_PRIVDEF               (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk)
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
-/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
+  * @{
-  * @{
+  */
-  */
+#define  MPU_REGION_ENABLE     ((uint8_t)0x01)
-#define  MPU_REGION_ENABLE     ((uint8_t)0x01)
+#define  MPU_REGION_DISABLE    ((uint8_t)0x00)
-#define  MPU_REGION_DISABLE    ((uint8_t)0x00)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
-/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
+  * @{
-  * @{
+  */
-  */
+#define  MPU_INSTRUCTION_ACCESS_ENABLE      ((uint8_t)0x00)
-#define  MPU_INSTRUCTION_ACCESS_ENABLE      ((uint8_t)0x00)
+#define  MPU_INSTRUCTION_ACCESS_DISABLE     ((uint8_t)0x01)
-#define  MPU_INSTRUCTION_ACCESS_DISABLE     ((uint8_t)0x01)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
-/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
+  * @{
-  * @{
+  */
-  */
+#define  MPU_ACCESS_SHAREABLE        ((uint8_t)0x01)
-#define  MPU_ACCESS_SHAREABLE        ((uint8_t)0x01)
+#define  MPU_ACCESS_NOT_SHAREABLE    ((uint8_t)0x00)
-#define  MPU_ACCESS_NOT_SHAREABLE    ((uint8_t)0x00)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
-/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
+  * @{
-  * @{
+  */
-  */
+#define  MPU_ACCESS_CACHEABLE         ((uint8_t)0x01)
-#define  MPU_ACCESS_CACHEABLE         ((uint8_t)0x01)
+#define  MPU_ACCESS_NOT_CACHEABLE     ((uint8_t)0x00)
-#define  MPU_ACCESS_NOT_CACHEABLE     ((uint8_t)0x00)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
-/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
+  * @{
-  * @{
+  */
-  */
+#define  MPU_ACCESS_BUFFERABLE         ((uint8_t)0x01)
-#define  MPU_ACCESS_BUFFERABLE         ((uint8_t)0x01)
+#define  MPU_ACCESS_NOT_BUFFERABLE     ((uint8_t)0x00)
-#define  MPU_ACCESS_NOT_BUFFERABLE     ((uint8_t)0x00)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels
-/** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels
+  * @{
-  * @{
+  */
-  */
+#define  MPU_TEX_LEVEL0    ((uint8_t)0x00)
-#define  MPU_TEX_LEVEL0    ((uint8_t)0x00)
+#define  MPU_TEX_LEVEL1    ((uint8_t)0x01)
-#define  MPU_TEX_LEVEL1    ((uint8_t)0x01)
+#define  MPU_TEX_LEVEL2    ((uint8_t)0x02)
-#define  MPU_TEX_LEVEL2    ((uint8_t)0x02)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
-/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
+  * @{
-  * @{
+  */
-  */
+#define   MPU_REGION_SIZE_32B      ((uint8_t)0x04)
-#define   MPU_REGION_SIZE_32B      ((uint8_t)0x04)
+#define   MPU_REGION_SIZE_64B      ((uint8_t)0x05)
-#define   MPU_REGION_SIZE_64B      ((uint8_t)0x05)
+#define   MPU_REGION_SIZE_128B     ((uint8_t)0x06)
-#define   MPU_REGION_SIZE_128B     ((uint8_t)0x06)
+#define   MPU_REGION_SIZE_256B     ((uint8_t)0x07)
-#define   MPU_REGION_SIZE_256B     ((uint8_t)0x07)
+#define   MPU_REGION_SIZE_512B     ((uint8_t)0x08)
-#define   MPU_REGION_SIZE_512B     ((uint8_t)0x08)
+#define   MPU_REGION_SIZE_1KB      ((uint8_t)0x09)
-#define   MPU_REGION_SIZE_1KB      ((uint8_t)0x09)
+#define   MPU_REGION_SIZE_2KB      ((uint8_t)0x0A)
-#define   MPU_REGION_SIZE_2KB      ((uint8_t)0x0A)
+#define   MPU_REGION_SIZE_4KB      ((uint8_t)0x0B)
-#define   MPU_REGION_SIZE_4KB      ((uint8_t)0x0B)
+#define   MPU_REGION_SIZE_8KB      ((uint8_t)0x0C)
-#define   MPU_REGION_SIZE_8KB      ((uint8_t)0x0C)
+#define   MPU_REGION_SIZE_16KB     ((uint8_t)0x0D)
-#define   MPU_REGION_SIZE_16KB     ((uint8_t)0x0D)
+#define   MPU_REGION_SIZE_32KB     ((uint8_t)0x0E)
-#define   MPU_REGION_SIZE_32KB     ((uint8_t)0x0E)
+#define   MPU_REGION_SIZE_64KB     ((uint8_t)0x0F)
-#define   MPU_REGION_SIZE_64KB     ((uint8_t)0x0F)
+#define   MPU_REGION_SIZE_128KB    ((uint8_t)0x10)
-#define   MPU_REGION_SIZE_128KB    ((uint8_t)0x10)
+#define   MPU_REGION_SIZE_256KB    ((uint8_t)0x11)
-#define   MPU_REGION_SIZE_256KB    ((uint8_t)0x11)
+#define   MPU_REGION_SIZE_512KB    ((uint8_t)0x12)
-#define   MPU_REGION_SIZE_512KB    ((uint8_t)0x12)
+#define   MPU_REGION_SIZE_1MB      ((uint8_t)0x13)
-#define   MPU_REGION_SIZE_1MB      ((uint8_t)0x13)
+#define   MPU_REGION_SIZE_2MB      ((uint8_t)0x14)
-#define   MPU_REGION_SIZE_2MB      ((uint8_t)0x14)
+#define   MPU_REGION_SIZE_4MB      ((uint8_t)0x15)
-#define   MPU_REGION_SIZE_4MB      ((uint8_t)0x15)
+#define   MPU_REGION_SIZE_8MB      ((uint8_t)0x16)
-#define   MPU_REGION_SIZE_8MB      ((uint8_t)0x16)
+#define   MPU_REGION_SIZE_16MB     ((uint8_t)0x17)
-#define   MPU_REGION_SIZE_16MB     ((uint8_t)0x17)
+#define   MPU_REGION_SIZE_32MB     ((uint8_t)0x18)
-#define   MPU_REGION_SIZE_32MB     ((uint8_t)0x18)
+#define   MPU_REGION_SIZE_64MB     ((uint8_t)0x19)
-#define   MPU_REGION_SIZE_64MB     ((uint8_t)0x19)
+#define   MPU_REGION_SIZE_128MB    ((uint8_t)0x1A)
-#define   MPU_REGION_SIZE_128MB    ((uint8_t)0x1A)
+#define   MPU_REGION_SIZE_256MB    ((uint8_t)0x1B)
-#define   MPU_REGION_SIZE_256MB    ((uint8_t)0x1B)
+#define   MPU_REGION_SIZE_512MB    ((uint8_t)0x1C)
-#define   MPU_REGION_SIZE_512MB    ((uint8_t)0x1C)
+#define   MPU_REGION_SIZE_1GB      ((uint8_t)0x1D)
-#define   MPU_REGION_SIZE_1GB      ((uint8_t)0x1D)
+#define   MPU_REGION_SIZE_2GB      ((uint8_t)0x1E)
-#define   MPU_REGION_SIZE_2GB      ((uint8_t)0x1E)
+#define   MPU_REGION_SIZE_4GB      ((uint8_t)0x1F)
-#define   MPU_REGION_SIZE_4GB      ((uint8_t)0x1F)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+   
-   
+/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes 
-/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes 
+  * @{
-  * @{
+  */
-  */
+#define  MPU_REGION_NO_ACCESS      ((uint8_t)0x00)
-#define  MPU_REGION_NO_ACCESS      ((uint8_t)0x00)
+#define  MPU_REGION_PRIV_RW        ((uint8_t)0x01)
-#define  MPU_REGION_PRIV_RW        ((uint8_t)0x01)
+#define  MPU_REGION_PRIV_RW_URO    ((uint8_t)0x02)
-#define  MPU_REGION_PRIV_RW_URO    ((uint8_t)0x02)
+#define  MPU_REGION_FULL_ACCESS    ((uint8_t)0x03)
-#define  MPU_REGION_FULL_ACCESS    ((uint8_t)0x03)
+#define  MPU_REGION_PRIV_RO        ((uint8_t)0x05)
-#define  MPU_REGION_PRIV_RO        ((uint8_t)0x05)
+#define  MPU_REGION_PRIV_RO_URO    ((uint8_t)0x06)
-#define  MPU_REGION_PRIV_RO_URO    ((uint8_t)0x06)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
-/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
+  * @{
-  * @{
+  */
-  */
+#define  MPU_REGION_NUMBER0    ((uint8_t)0x00)
-#define  MPU_REGION_NUMBER0    ((uint8_t)0x00)
+#define  MPU_REGION_NUMBER1    ((uint8_t)0x01)
-#define  MPU_REGION_NUMBER1    ((uint8_t)0x01)
+#define  MPU_REGION_NUMBER2    ((uint8_t)0x02)
-#define  MPU_REGION_NUMBER2    ((uint8_t)0x02)
+#define  MPU_REGION_NUMBER3    ((uint8_t)0x03)
-#define  MPU_REGION_NUMBER3    ((uint8_t)0x03)
+#define  MPU_REGION_NUMBER4    ((uint8_t)0x04)
-#define  MPU_REGION_NUMBER4    ((uint8_t)0x04)
+#define  MPU_REGION_NUMBER5    ((uint8_t)0x05)
-#define  MPU_REGION_NUMBER5    ((uint8_t)0x05)
+#define  MPU_REGION_NUMBER6    ((uint8_t)0x06)
-#define  MPU_REGION_NUMBER6    ((uint8_t)0x06)
+#define  MPU_REGION_NUMBER7    ((uint8_t)0x07)
-#define  MPU_REGION_NUMBER7    ((uint8_t)0x07)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+#endif /* __MPU_PRESENT */
-#endif /* __MPU_PRESENT */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+
-
+/* Exported Macros -----------------------------------------------------------*/
-/* Exported Macros -----------------------------------------------------------*/
+
-
+/* Exported functions --------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
+/** @addtogroup CORTEX_Exported_Functions
-/** @addtogroup CORTEX_Exported_Functions
+  * @{
-  * @{
+  */
-  */
+  
-  
+/** @addtogroup CORTEX_Exported_Functions_Group1
-/** @addtogroup CORTEX_Exported_Functions_Group1
+  * @{
-  * @{
+  */
-  */
+/* Initialization and de-initialization functions *****************************/
-/* Initialization and de-initialization functions *****************************/
+void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
-void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
+void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
-void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
+void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
-void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
+void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
-void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
+void HAL_NVIC_SystemReset(void);
-void HAL_NVIC_SystemReset(void);
+uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
-uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup CORTEX_Exported_Functions_Group2
-/** @addtogroup CORTEX_Exported_Functions_Group2
+  * @{
-  * @{
+  */
-  */
+/* Peripheral Control functions ***********************************************/
-/* Peripheral Control functions ***********************************************/
+uint32_t HAL_NVIC_GetPriorityGrouping(void);
-uint32_t HAL_NVIC_GetPriorityGrouping(void);
+void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
-void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
+uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
-uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
+void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
-void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
+void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
-void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
+uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
-uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
+void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
-void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
+void HAL_SYSTICK_IRQHandler(void);
-void HAL_SYSTICK_IRQHandler(void);
+void HAL_SYSTICK_Callback(void);
-void HAL_SYSTICK_Callback(void);
+
-
+#if (__MPU_PRESENT == 1U)
-#if (__MPU_PRESENT == 1U)
+void HAL_MPU_Enable(uint32_t MPU_Control);
-void HAL_MPU_Enable(uint32_t MPU_Control);
+void HAL_MPU_Disable(void);
-void HAL_MPU_Disable(void);
+void HAL_MPU_EnableRegion(uint32_t RegionNumber);
-void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
+void HAL_MPU_DisableRegion(uint32_t RegionNumber);
-#endif /* __MPU_PRESENT */
+void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
-/**
+#endif /* __MPU_PRESENT */
-  * @}
+/**
-  */
+  * @}
-
+  */
-/**
+
-  * @}
+/**
-  */
+  * @}
-
+  */
-/* Private types -------------------------------------------------------------*/
+
-/* Private variables ---------------------------------------------------------*/
+/* Private types -------------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
-/** @defgroup CORTEX_Private_Macros CORTEX Private Macros
+/* Private macros ------------------------------------------------------------*/
-  * @{
+/** @defgroup CORTEX_Private_Macros CORTEX Private Macros
-  */
+  * @{
-#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
+  */
-                                       ((GROUP) == NVIC_PRIORITYGROUP_1) || \
+#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
-                                       ((GROUP) == NVIC_PRIORITYGROUP_2) || \
+                                       ((GROUP) == NVIC_PRIORITYGROUP_1) || \
-                                       ((GROUP) == NVIC_PRIORITYGROUP_3) || \
+                                       ((GROUP) == NVIC_PRIORITYGROUP_2) || \
-                                       ((GROUP) == NVIC_PRIORITYGROUP_4))
+                                       ((GROUP) == NVIC_PRIORITYGROUP_3) || \
-
+                                       ((GROUP) == NVIC_PRIORITYGROUP_4))
-#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10U)
+
-
+#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10U)
-#define IS_NVIC_SUB_PRIORITY(PRIORITY)         ((PRIORITY) < 0x10U)
+
-
+#define IS_NVIC_SUB_PRIORITY(PRIORITY)         ((PRIORITY) < 0x10U)
-#define IS_NVIC_DEVICE_IRQ(IRQ)                ((IRQ) >= (IRQn_Type)0x00U)
+
-
+#define IS_NVIC_DEVICE_IRQ(IRQ)                ((IRQ) >= (IRQn_Type)0x00U)
-#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
+
-                                       ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
+#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
-
+                                       ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
-#if (__MPU_PRESENT == 1U)
+
-#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
+#if (__MPU_PRESENT == 1U)
-                                     ((STATE) == MPU_REGION_DISABLE))
+#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
-
+                                     ((STATE) == MPU_REGION_DISABLE))
-#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
+
-                                          ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
+#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
-
+                                          ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
-#define IS_MPU_ACCESS_SHAREABLE(STATE)   (((STATE) == MPU_ACCESS_SHAREABLE) || \
+
-                                          ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
+#define IS_MPU_ACCESS_SHAREABLE(STATE)   (((STATE) == MPU_ACCESS_SHAREABLE) || \
-
+                                          ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
-#define IS_MPU_ACCESS_CACHEABLE(STATE)   (((STATE) == MPU_ACCESS_CACHEABLE) || \
+
-                                          ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
+#define IS_MPU_ACCESS_CACHEABLE(STATE)   (((STATE) == MPU_ACCESS_CACHEABLE) || \
-
+                                          ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
-#define IS_MPU_ACCESS_BUFFERABLE(STATE)   (((STATE) == MPU_ACCESS_BUFFERABLE) || \
+
-                                          ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
+#define IS_MPU_ACCESS_BUFFERABLE(STATE)   (((STATE) == MPU_ACCESS_BUFFERABLE) || \
-
+                                          ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
-#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0)  || \
+
-                                ((TYPE) == MPU_TEX_LEVEL1)  || \
+#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0)  || \
-                                ((TYPE) == MPU_TEX_LEVEL2))
+                                ((TYPE) == MPU_TEX_LEVEL1)  || \
-
+                                ((TYPE) == MPU_TEX_LEVEL2))
-#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS)   || \
+
-                                                  ((TYPE) == MPU_REGION_PRIV_RW)     || \
+#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS)   || \
-                                                  ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
+                                                  ((TYPE) == MPU_REGION_PRIV_RW)     || \
-                                                  ((TYPE) == MPU_REGION_FULL_ACCESS) || \
+                                                  ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
-                                                  ((TYPE) == MPU_REGION_PRIV_RO)     || \
+                                                  ((TYPE) == MPU_REGION_FULL_ACCESS) || \
-                                                  ((TYPE) == MPU_REGION_PRIV_RO_URO))
+                                                  ((TYPE) == MPU_REGION_PRIV_RO)     || \
-
+                                                  ((TYPE) == MPU_REGION_PRIV_RO_URO))
-#define IS_MPU_REGION_NUMBER(NUMBER)    (((NUMBER) == MPU_REGION_NUMBER0) || \
+
-                                         ((NUMBER) == MPU_REGION_NUMBER1) || \
+#define IS_MPU_REGION_NUMBER(NUMBER)    (((NUMBER) == MPU_REGION_NUMBER0) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER2) || \
+                                         ((NUMBER) == MPU_REGION_NUMBER1) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER3) || \
+                                         ((NUMBER) == MPU_REGION_NUMBER2) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER4) || \
+                                         ((NUMBER) == MPU_REGION_NUMBER3) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER5) || \
+                                         ((NUMBER) == MPU_REGION_NUMBER4) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER6) || \
+                                         ((NUMBER) == MPU_REGION_NUMBER5) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER7))
+                                         ((NUMBER) == MPU_REGION_NUMBER6) || \
-
+                                         ((NUMBER) == MPU_REGION_NUMBER7))
-#define IS_MPU_REGION_SIZE(SIZE)    (((SIZE) == MPU_REGION_SIZE_32B)   || \
+
-                                     ((SIZE) == MPU_REGION_SIZE_64B)   || \
+#define IS_MPU_REGION_SIZE(SIZE)    (((SIZE) == MPU_REGION_SIZE_32B)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_128B)  || \
+                                     ((SIZE) == MPU_REGION_SIZE_64B)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_256B)  || \
+                                     ((SIZE) == MPU_REGION_SIZE_128B)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_512B)  || \
+                                     ((SIZE) == MPU_REGION_SIZE_256B)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_1KB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_512B)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_2KB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_1KB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_4KB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_2KB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_8KB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_4KB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_16KB)  || \
+                                     ((SIZE) == MPU_REGION_SIZE_8KB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_32KB)  || \
+                                     ((SIZE) == MPU_REGION_SIZE_16KB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_64KB)  || \
+                                     ((SIZE) == MPU_REGION_SIZE_32KB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_128KB) || \
+                                     ((SIZE) == MPU_REGION_SIZE_64KB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_256KB) || \
+                                     ((SIZE) == MPU_REGION_SIZE_128KB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_512KB) || \
+                                     ((SIZE) == MPU_REGION_SIZE_256KB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_1MB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_512KB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_2MB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_1MB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_4MB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_2MB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_8MB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_4MB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_16MB)  || \
+                                     ((SIZE) == MPU_REGION_SIZE_8MB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_32MB)  || \
+                                     ((SIZE) == MPU_REGION_SIZE_16MB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_64MB)  || \
+                                     ((SIZE) == MPU_REGION_SIZE_32MB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_128MB) || \
+                                     ((SIZE) == MPU_REGION_SIZE_64MB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_256MB) || \
+                                     ((SIZE) == MPU_REGION_SIZE_128MB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_512MB) || \
+                                     ((SIZE) == MPU_REGION_SIZE_256MB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_1GB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_512MB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_2GB)   || \
+                                     ((SIZE) == MPU_REGION_SIZE_1GB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_4GB))
+                                     ((SIZE) == MPU_REGION_SIZE_2GB)   || \
-
+                                     ((SIZE) == MPU_REGION_SIZE_4GB))
-#define IS_MPU_SUB_REGION_DISABLE(SUBREGION)  ((SUBREGION) < (uint16_t)0x00FF)
+
-#endif /* __MPU_PRESENT */
+#define IS_MPU_SUB_REGION_DISABLE(SUBREGION)  ((SUBREGION) < (uint16_t)0x00FF)
-
+#endif /* __MPU_PRESENT */
-/**                                                                          
+
-  * @}                                                                  
+/**                                                                          
-  */
+  * @}                                                                  
-
+  */
-/* Private functions ---------------------------------------------------------*/
+
-
+/* Private functions ---------------------------------------------------------*/
-/**
+
-  * @}
+/**
-  */ 
+  * @}
-
+  */ 
-/**
+
-  * @}
+/**
-  */
+  * @}
-  
+  */
-#ifdef __cplusplus
+  
-}
+#ifdef __cplusplus
-#endif
+}
-
+#endif
-#endif /* __STM32F1xx_HAL_CORTEX_H */
+
- 
+#endif /* __STM32F1xx_HAL_CORTEX_H */
-
+ 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h

@@ -1,210 +1,211 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    stm32f1xx_hal_def.h
+  * @file    stm32f1xx_hal_def.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   This file contains HAL common defines, enumeration, macros and
+  * @brief   This file contains HAL common defines, enumeration, macros and
-  *          structures definitions.
+  *          structures definitions.
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+
-
+/* Define to prevent recursive inclusion -------------------------------------*/
-/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_DEF
-#ifndef __STM32F1xx_HAL_DEF
+#define __STM32F1xx_HAL_DEF
-#define __STM32F1xx_HAL_DEF
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+extern "C" {
-extern "C" {
+#endif
-#endif
+
-
+/* Includes ------------------------------------------------------------------*/
-/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
-#include "stm32f1xx.h"
+#include "Legacy/stm32_hal_legacy.h"
-#include "Legacy/stm32_hal_legacy.h"
+#include <stddef.h>
-#include <stddef.h>
+
-
+/* Exported types ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
+
-
+/**
-/**
+  * @brief  HAL Status structures definition
-  * @brief  HAL Status structures definition
+  */
-  */
+typedef enum
-typedef enum
+{
-{
+  HAL_OK       = 0x00U,
-  HAL_OK       = 0x00U,
+  HAL_ERROR    = 0x01U,
-  HAL_ERROR    = 0x01U,
+  HAL_BUSY     = 0x02U,
-  HAL_BUSY     = 0x02U,
+  HAL_TIMEOUT  = 0x03U
-  HAL_TIMEOUT  = 0x03U
+} HAL_StatusTypeDef;
-} HAL_StatusTypeDef;
+
-
+/**
-/**
+  * @brief  HAL Lock structures definition
-  * @brief  HAL Lock structures definition
+  */
-  */
+typedef enum
-typedef enum
+{
-{
+  HAL_UNLOCKED = 0x00U,
-  HAL_UNLOCKED = 0x00U,
+  HAL_LOCKED   = 0x01U
-  HAL_LOCKED   = 0x01U
+} HAL_LockTypeDef;
-} HAL_LockTypeDef;
+
-
+/* Exported macro ------------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
+#define HAL_MAX_DELAY      0xFFFFFFFFU
-#define HAL_MAX_DELAY      0xFFFFFFFFU
+
-
+#define HAL_IS_BIT_SET(REG, BIT)         (((REG) & (BIT)) != 0U)
-#define HAL_IS_BIT_SET(REG, BIT)         (((REG) & (BIT)) != 0U)
+#define HAL_IS_BIT_CLR(REG, BIT)         (((REG) & (BIT)) == 0U)
-#define HAL_IS_BIT_CLR(REG, BIT)         (((REG) & (BIT)) == 0U)
+
-
+#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__)               \
-#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__)               \
+                        do{                                                      \
-                        do{                                                      \
+                              (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
-                              (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
+                              (__DMA_HANDLE__).Parent = (__HANDLE__);             \
-                              (__DMA_HANDLE__).Parent = (__HANDLE__);             \
+                          } while(0U)
-                          } while(0U)
+
-
+#if !defined(UNUSED)
-#define UNUSED(X) (void)X      /* To avoid gcc/g++ warnings */
+#define UNUSED(X) (void)X      /* To avoid gcc/g++ warnings */
-
+#endif /* UNUSED */
-/** @brief Reset the Handle's State field.
+
-  * @param __HANDLE__ specifies the Peripheral Handle.
+/** @brief Reset the Handle's State field.
-  * @note  This macro can be used for the following purpose:
+  * @param __HANDLE__ specifies the Peripheral Handle.
-  *          - When the Handle is declared as local variable; before passing it as parameter
+  * @note  This macro can be used for the following purpose:
-  *            to HAL_PPP_Init() for the first time, it is mandatory to use this macro
+  *          - When the Handle is declared as local variable; before passing it as parameter
-  *            to set to 0 the Handle's "State" field.
+  *            to HAL_PPP_Init() for the first time, it is mandatory to use this macro
-  *            Otherwise, "State" field may have any random value and the first time the function
+  *            to set to 0 the Handle's "State" field.
-  *            HAL_PPP_Init() is called, the low level hardware initialization will be missed
+  *            Otherwise, "State" field may have any random value and the first time the function
-  *            (i.e. HAL_PPP_MspInit() will not be executed).
+  *            HAL_PPP_Init() is called, the low level hardware initialization will be missed
-  *          - When there is a need to reconfigure the low level hardware: instead of calling
+  *            (i.e. HAL_PPP_MspInit() will not be executed).
-  *            HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
+  *          - When there is a need to reconfigure the low level hardware: instead of calling
-  *            In this later function, when the Handle's "State" field is set to 0, it will execute the function
+  *            HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
-  *            HAL_PPP_MspInit() which will reconfigure the low level hardware.
+  *            In this later function, when the Handle's "State" field is set to 0, it will execute the function
-  * @retval None
+  *            HAL_PPP_MspInit() which will reconfigure the low level hardware.
-  */
+  * @retval None
-#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
+  */
-
+#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
-#if (USE_RTOS == 1U)
+
-/* Reserved for future use */
+#if (USE_RTOS == 1U)
-#error "USE_RTOS should be 0 in the current HAL release"
+/* Reserved for future use */
-#else
+#error "USE_RTOS should be 0 in the current HAL release"
-#define __HAL_LOCK(__HANDLE__)                                           \
+#else
-                                do{                                        \
+#define __HAL_LOCK(__HANDLE__)                                           \
-                                    if((__HANDLE__)->Lock == HAL_LOCKED)   \
+                                do{                                        \
-                                    {                                      \
+                                    if((__HANDLE__)->Lock == HAL_LOCKED)   \
-                                       return HAL_BUSY;                    \
+                                    {                                      \
-                                    }                                      \
+                                       return HAL_BUSY;                    \
-                                    else                                   \
+                                    }                                      \
-                                    {                                      \
+                                    else                                   \
-                                       (__HANDLE__)->Lock = HAL_LOCKED;    \
+                                    {                                      \
-                                    }                                      \
+                                       (__HANDLE__)->Lock = HAL_LOCKED;    \
-                                  }while (0U)
+                                    }                                      \
-
+                                  }while (0U)
-#define __HAL_UNLOCK(__HANDLE__)                                          \
+
-                                  do{                                       \
+#define __HAL_UNLOCK(__HANDLE__)                                          \
-                                      (__HANDLE__)->Lock = HAL_UNLOCKED;    \
+                                  do{                                       \
-                                    }while (0U)
+                                      (__HANDLE__)->Lock = HAL_UNLOCKED;    \
-#endif /* USE_RTOS */
+                                    }while (0U)
-
+#endif /* USE_RTOS */
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
+
-#ifndef __weak
+#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
-#define __weak  __attribute__((weak))
+#ifndef __weak
-#endif
+#define __weak  __attribute__((weak))
-#ifndef __packed
+#endif
-#define __packed  __attribute__((packed))
+#ifndef __packed
-#endif
+#define __packed  __attribute__((packed))
-#elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
+#endif
-#ifndef __weak
+#elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
-#define __weak   __attribute__((weak))
+#ifndef __weak
-#endif /* __weak */
+#define __weak   __attribute__((weak))
-#ifndef __packed
+#endif /* __weak */
-#define __packed __attribute__((__packed__))
+#ifndef __packed
-#endif /* __packed */
+#define __packed __attribute__((__packed__))
-#endif /* __GNUC__ */
+#endif /* __packed */
-
+#endif /* __GNUC__ */
-
+
-/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
+
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
+/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
-#ifndef __ALIGN_BEGIN
+#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
-#define __ALIGN_BEGIN
+#ifndef __ALIGN_BEGIN
-#endif
+#define __ALIGN_BEGIN
-#ifndef __ALIGN_END
+#endif
-#define __ALIGN_END      __attribute__ ((aligned (4)))
+#ifndef __ALIGN_END
-#endif
+#define __ALIGN_END      __attribute__ ((aligned (4)))
-#elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
+#endif
-#ifndef __ALIGN_END
+#elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
-#define __ALIGN_END    __attribute__ ((aligned (4)))
+#ifndef __ALIGN_END
-#endif /* __ALIGN_END */
+#define __ALIGN_END    __attribute__ ((aligned (4)))
-#ifndef __ALIGN_BEGIN
+#endif /* __ALIGN_END */
-#define __ALIGN_BEGIN
+#ifndef __ALIGN_BEGIN
-#endif /* __ALIGN_BEGIN */
+#define __ALIGN_BEGIN
-#else
+#endif /* __ALIGN_BEGIN */
-#ifndef __ALIGN_END
+#else
-#define __ALIGN_END
+#ifndef __ALIGN_END
-#endif /* __ALIGN_END */
+#define __ALIGN_END
-#ifndef __ALIGN_BEGIN
+#endif /* __ALIGN_END */
-#if defined   (__CC_ARM)      /* ARM Compiler V5*/
+#ifndef __ALIGN_BEGIN
-#define __ALIGN_BEGIN    __align(4)
+#if defined   (__CC_ARM)      /* ARM Compiler V5*/
-#elif defined (__ICCARM__)    /* IAR Compiler */
+#define __ALIGN_BEGIN    __align(4)
-#define __ALIGN_BEGIN
+#elif defined (__ICCARM__)    /* IAR Compiler */
-#endif /* __CC_ARM */
+#define __ALIGN_BEGIN
-#endif /* __ALIGN_BEGIN */
+#endif /* __CC_ARM */
-#endif /* __GNUC__ */
+#endif /* __ALIGN_BEGIN */
-
+#endif /* __GNUC__ */
-
+
-/**
+
-  * @brief  __RAM_FUNC definition
+/**
-  */
+  * @brief  __RAM_FUNC definition
-#if defined ( __CC_ARM   ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
+  */
-/* ARM Compiler V4/V5 and V6
+#if defined ( __CC_ARM   ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
-   --------------------------
+/* ARM Compiler V4/V5 and V6
-   RAM functions are defined using the toolchain options.
+   --------------------------
-   Functions that are executed in RAM should reside in a separate source module.
+   RAM functions are defined using the toolchain options.
-   Using the 'Options for File' dialog you can simply change the 'Code / Const'
+   Functions that are executed in RAM should reside in a separate source module.
-   area of a module to a memory space in physical RAM.
+   Using the 'Options for File' dialog you can simply change the 'Code / Const'
-   Available memory areas are declared in the 'Target' tab of the 'Options for Target'
+   area of a module to a memory space in physical RAM.
-   dialog.
+   Available memory areas are declared in the 'Target' tab of the 'Options for Target'
-*/
+   dialog.
-#define __RAM_FUNC
+*/
-
+#define __RAM_FUNC
-#elif defined ( __ICCARM__ )
+
-/* ICCARM Compiler
+#elif defined ( __ICCARM__ )
-   ---------------
+/* ICCARM Compiler
-   RAM functions are defined using a specific toolchain keyword "__ramfunc".
+   ---------------
-*/
+   RAM functions are defined using a specific toolchain keyword "__ramfunc".
-#define __RAM_FUNC __ramfunc
+*/
-
+#define __RAM_FUNC __ramfunc
-#elif defined   (  __GNUC__  )
+
-/* GNU Compiler
+#elif defined   (  __GNUC__  )
-   ------------
+/* GNU Compiler
-  RAM functions are defined using a specific toolchain attribute
+   ------------
-   "__attribute__((section(".RamFunc")))".
+  RAM functions are defined using a specific toolchain attribute
-*/
+   "__attribute__((section(".RamFunc")))".
-#define __RAM_FUNC __attribute__((section(".RamFunc")))
+*/
-
+#define __RAM_FUNC __attribute__((section(".RamFunc")))
-#endif
+
-
+#endif
-/**
+
-  * @brief  __NOINLINE definition
+/**
-  */
+  * @brief  __NOINLINE definition
-#if defined ( __CC_ARM   ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined   (  __GNUC__  )
+  */
-/* ARM V4/V5 and V6 & GNU Compiler
+#if defined ( __CC_ARM   ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined   (  __GNUC__  )
-   -------------------------------
+/* ARM V4/V5 and V6 & GNU Compiler
-*/
+   -------------------------------
-#define __NOINLINE __attribute__ ( (noinline) )
+*/
-
+#define __NOINLINE __attribute__ ( (noinline) )
-#elif defined ( __ICCARM__ )
+
-/* ICCARM Compiler
+#elif defined ( __ICCARM__ )
-   ---------------
+/* ICCARM Compiler
-*/
+   ---------------
-#define __NOINLINE _Pragma("optimize = no_inline")
+*/
-
+#define __NOINLINE _Pragma("optimize = no_inline")
-#endif
+
-
+#endif
-#ifdef __cplusplus
+
-}
+#ifdef __cplusplus
-#endif
+}
-
+#endif
-#endif /* ___STM32F1xx_HAL_DEF */
+
-
+#endif /* ___STM32F1xx_HAL_DEF */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
+

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h

@@ -1,457 +1,455 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    stm32f1xx_hal_dma.h
+  * @file    stm32f1xx_hal_dma.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   Header file of DMA HAL module.
+  * @brief   Header file of DMA HAL module.
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file in
-  * the "License"; You may not use this file except in compliance with the
+  * the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+
-
+/* Define to prevent recursive inclusion -------------------------------------*/
-/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_DMA_H
-#ifndef __STM32F1xx_HAL_DMA_H
+#define __STM32F1xx_HAL_DMA_H
-#define __STM32F1xx_HAL_DMA_H
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+ extern "C" {
- extern "C" {
+#endif
-#endif
+
-
+/* Includes ------------------------------------------------------------------*/
-/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"
-#include "stm32f1xx_hal_def.h"
+
-
+/** @addtogroup STM32F1xx_HAL_Driver
-/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
-  * @{
+  */
-  */
+
-
+/** @addtogroup DMA
-/** @addtogroup DMA
+  * @{
-  * @{
+  */
-  */
+
-
+/* Exported types ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
+
-
+/** @defgroup DMA_Exported_Types DMA Exported Types
-/** @defgroup DMA_Exported_Types DMA Exported Types
+  * @{
-  * @{
+  */
-  */
+
-
+/**
-/**
+  * @brief  DMA Configuration Structure definition
-  * @brief  DMA Configuration Structure definition
+  */
-  */
+typedef struct
-typedef struct
+{
-{
+  uint32_t Direction;                 /*!< Specifies if the data will be transferred from memory to peripheral, 
-  uint32_t Direction;                 /*!< Specifies if the data will be transferred from memory to peripheral, 
+                                           from memory to memory or from peripheral to memory.
-                                           from memory to memory or from peripheral to memory.
+                                           This parameter can be a value of @ref DMA_Data_transfer_direction */
-                                           This parameter can be a value of @ref DMA_Data_transfer_direction */
+
-
+  uint32_t PeriphInc;                 /*!< Specifies whether the Peripheral address register should be incremented or not.
-  uint32_t PeriphInc;                 /*!< Specifies whether the Peripheral address register should be incremented or not.
+                                           This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
-                                           This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
+
-
+  uint32_t MemInc;                    /*!< Specifies whether the memory address register should be incremented or not.
-  uint32_t MemInc;                    /*!< Specifies whether the memory address register should be incremented or not.
+                                           This parameter can be a value of @ref DMA_Memory_incremented_mode */
-                                           This parameter can be a value of @ref DMA_Memory_incremented_mode */
+
-
+  uint32_t PeriphDataAlignment;       /*!< Specifies the Peripheral data width.
-  uint32_t PeriphDataAlignment;       /*!< Specifies the Peripheral data width.
+                                           This parameter can be a value of @ref DMA_Peripheral_data_size */
-                                           This parameter can be a value of @ref DMA_Peripheral_data_size */
+
-
+  uint32_t MemDataAlignment;          /*!< Specifies the Memory data width.
-  uint32_t MemDataAlignment;          /*!< Specifies the Memory data width.
+                                           This parameter can be a value of @ref DMA_Memory_data_size */
-                                           This parameter can be a value of @ref DMA_Memory_data_size */
+
-
+  uint32_t Mode;                      /*!< Specifies the operation mode of the DMAy Channelx.
-  uint32_t Mode;                      /*!< Specifies the operation mode of the DMAy Channelx.
+                                           This parameter can be a value of @ref DMA_mode
-                                           This parameter can be a value of @ref DMA_mode
+                                           @note The circular buffer mode cannot be used if the memory-to-memory
-                                           @note The circular buffer mode cannot be used if the memory-to-memory
+                                                 data transfer is configured on the selected Channel */
-                                                 data transfer is configured on the selected Channel */
+
-
+  uint32_t Priority;                  /*!< Specifies the software priority for the DMAy Channelx.
-  uint32_t Priority;                  /*!< Specifies the software priority for the DMAy Channelx.
+                                           This parameter can be a value of @ref DMA_Priority_level */
-                                           This parameter can be a value of @ref DMA_Priority_level */
+} DMA_InitTypeDef;
-} DMA_InitTypeDef;
+
-
+/**
-/**
+  * @brief  HAL DMA State structures definition
-  * @brief  HAL DMA State structures definition
+  */
-  */
+typedef enum
-typedef enum
+{
-{
+  HAL_DMA_STATE_RESET             = 0x00U,  /*!< DMA not yet initialized or disabled    */
-  HAL_DMA_STATE_RESET             = 0x00U,  /*!< DMA not yet initialized or disabled    */
+  HAL_DMA_STATE_READY             = 0x01U,  /*!< DMA initialized and ready for use      */
-  HAL_DMA_STATE_READY             = 0x01U,  /*!< DMA initialized and ready for use      */
+  HAL_DMA_STATE_BUSY              = 0x02U,  /*!< DMA process is ongoing                 */
-  HAL_DMA_STATE_BUSY              = 0x02U,  /*!< DMA process is ongoing                 */
+  HAL_DMA_STATE_TIMEOUT           = 0x03U   /*!< DMA timeout state                      */
-  HAL_DMA_STATE_TIMEOUT           = 0x03U   /*!< DMA timeout state                      */
+}HAL_DMA_StateTypeDef;
-}HAL_DMA_StateTypeDef;
+
-
+/**
-/**
+  * @brief  HAL DMA Error Code structure definition
-  * @brief  HAL DMA Error Code structure definition
+  */
-  */
+typedef enum
-typedef enum
+{
-{
+  HAL_DMA_FULL_TRANSFER           = 0x00U,    /*!< Full transfer     */
-  HAL_DMA_FULL_TRANSFER           = 0x00U,    /*!< Full transfer     */
+  HAL_DMA_HALF_TRANSFER           = 0x01U     /*!< Half Transfer     */
-  HAL_DMA_HALF_TRANSFER           = 0x01U     /*!< Half Transfer     */
+}HAL_DMA_LevelCompleteTypeDef;
-}HAL_DMA_LevelCompleteTypeDef;
+
-
+/** 
-/** 
+  * @brief  HAL DMA Callback ID structure definition
-  * @brief  HAL DMA Callback ID structure definition
+  */
-  */
+typedef enum
-typedef enum
+{
-{
+  HAL_DMA_XFER_CPLT_CB_ID          = 0x00U,    /*!< Full transfer     */
-  HAL_DMA_XFER_CPLT_CB_ID          = 0x00U,    /*!< Full transfer     */
+  HAL_DMA_XFER_HALFCPLT_CB_ID      = 0x01U,    /*!< Half transfer     */
-  HAL_DMA_XFER_HALFCPLT_CB_ID      = 0x01U,    /*!< Half transfer     */
+  HAL_DMA_XFER_ERROR_CB_ID         = 0x02U,    /*!< Error             */ 
-  HAL_DMA_XFER_ERROR_CB_ID         = 0x02U,    /*!< Error             */ 
+  HAL_DMA_XFER_ABORT_CB_ID         = 0x03U,    /*!< Abort             */ 
-  HAL_DMA_XFER_ABORT_CB_ID         = 0x03U,    /*!< Abort             */ 
+  HAL_DMA_XFER_ALL_CB_ID           = 0x04U     /*!< All               */ 
-  HAL_DMA_XFER_ALL_CB_ID           = 0x04U     /*!< All               */ 
+    
-    
+}HAL_DMA_CallbackIDTypeDef;
-}HAL_DMA_CallbackIDTypeDef;
+
-
+/** 
-/** 
+  * @brief  DMA handle Structure definition
-  * @brief  DMA handle Structure definition
+  */
-  */
+typedef struct __DMA_HandleTypeDef
-typedef struct __DMA_HandleTypeDef
+{
-{
+  DMA_Channel_TypeDef        *Instance;                                                    /*!< Register base address                  */
-  DMA_Channel_TypeDef   *Instance;                       /*!< Register base address                  */
+  
-  
+  DMA_InitTypeDef            Init;                                                         /*!< DMA communication parameters           */
-  DMA_InitTypeDef       Init;                            /*!< DMA communication parameters           */ 
+  
-  
+  HAL_LockTypeDef            Lock;                                                         /*!< DMA locking object                     */
-  HAL_LockTypeDef       Lock;                            /*!< DMA locking object                     */  
+  
-  
+  __IO HAL_DMA_StateTypeDef  State;                                                        /*!< DMA transfer state                     */
-  HAL_DMA_StateTypeDef  State;                           /*!< DMA transfer state                     */
+  
-  
+  void                       *Parent;                                                      /*!< Parent object state                    */
-  void                  *Parent;                                                      /*!< Parent object state                    */  
+  
-  
+  void                       (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma);     /*!< DMA transfer complete callback         */
-  void                  (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma);     /*!< DMA transfer complete callback         */
+  
-  
+  void                       (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback    */
-  void                  (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback    */
+  
-  
+  void                       (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma);    /*!< DMA transfer error callback            */
-  void                  (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma);    /*!< DMA transfer error callback            */
+
-
+  void                       (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma);    /*!< DMA transfer abort callback            */
-  void                  (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma);    /*!< DMA transfer abort callback            */  
+  
-  
+  __IO uint32_t              ErrorCode;                                                    /*!< DMA Error code                         */
-  __IO uint32_t         ErrorCode;                                                    /*!< DMA Error code                         */
+
-
+  DMA_TypeDef                *DmaBaseAddress;                                             /*!< DMA Channel Base Address               */
-  DMA_TypeDef            *DmaBaseAddress;                                             /*!< DMA Channel Base Address               */
+  
-  
+  uint32_t                   ChannelIndex;                                                /*!< DMA Channel Index                      */
-  uint32_t               ChannelIndex;                                                /*!< DMA Channel Index                      */  
+
-
+} DMA_HandleTypeDef;    
-} DMA_HandleTypeDef;    
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Exported constants --------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
+
-
+/** @defgroup DMA_Exported_Constants DMA Exported Constants
-/** @defgroup DMA_Exported_Constants DMA Exported Constants
+  * @{
-  * @{
+  */
-  */
+
-
+/** @defgroup DMA_Error_Code DMA Error Code
-/** @defgroup DMA_Error_Code DMA Error Code
+  * @{
-  * @{
+  */
-  */
+#define HAL_DMA_ERROR_NONE                     0x00000000U    /*!< No error             */
-#define HAL_DMA_ERROR_NONE                     0x00000000U    /*!< No error             */
+#define HAL_DMA_ERROR_TE                       0x00000001U    /*!< Transfer error       */
-#define HAL_DMA_ERROR_TE                       0x00000001U    /*!< Transfer error       */
+#define HAL_DMA_ERROR_NO_XFER                  0x00000004U    /*!< no ongoing transfer  */
-#define HAL_DMA_ERROR_NO_XFER                  0x00000004U    /*!< no ongoing transfer  */
+#define HAL_DMA_ERROR_TIMEOUT                  0x00000020U    /*!< Timeout error        */
-#define HAL_DMA_ERROR_TIMEOUT                  0x00000020U    /*!< Timeout error        */
+#define HAL_DMA_ERROR_NOT_SUPPORTED            0x00000100U    /*!< Not supported mode                    */ 
-#define HAL_DMA_ERROR_NOT_SUPPORTED            0x00000100U    /*!< Not supported mode                    */ 
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
-/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
+  * @{
-  * @{
+  */
-  */
+#define DMA_PERIPH_TO_MEMORY         0x00000000U                 /*!< Peripheral to memory direction */
-#define DMA_PERIPH_TO_MEMORY         0x00000000U                 /*!< Peripheral to memory direction */
+#define DMA_MEMORY_TO_PERIPH         ((uint32_t)DMA_CCR_DIR)     /*!< Memory to peripheral direction */
-#define DMA_MEMORY_TO_PERIPH         ((uint32_t)DMA_CCR_DIR)     /*!< Memory to peripheral direction */
+#define DMA_MEMORY_TO_MEMORY         ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction     */
-#define DMA_MEMORY_TO_MEMORY         ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction     */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
-/** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
+  * @{
-  * @{
+  */
-  */
+#define DMA_PINC_ENABLE        ((uint32_t)DMA_CCR_PINC)  /*!< Peripheral increment mode Enable */
-#define DMA_PINC_ENABLE        ((uint32_t)DMA_CCR_PINC)  /*!< Peripheral increment mode Enable */
+#define DMA_PINC_DISABLE       0x00000000U               /*!< Peripheral increment mode Disable */
-#define DMA_PINC_DISABLE       0x00000000U               /*!< Peripheral increment mode Disable */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
-/** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
+  * @{
-  * @{
+  */
-  */
+#define DMA_MINC_ENABLE         ((uint32_t)DMA_CCR_MINC)  /*!< Memory increment mode Enable  */
-#define DMA_MINC_ENABLE         ((uint32_t)DMA_CCR_MINC)  /*!< Memory increment mode Enable  */
+#define DMA_MINC_DISABLE        0x00000000U               /*!< Memory increment mode Disable */
-#define DMA_MINC_DISABLE        0x00000000U               /*!< Memory increment mode Disable */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
-/** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
+  * @{
-  * @{
+  */
-  */
+#define DMA_PDATAALIGN_BYTE          0x00000000U                  /*!< Peripheral data alignment: Byte     */
-#define DMA_PDATAALIGN_BYTE          0x00000000U                  /*!< Peripheral data alignment: Byte     */
+#define DMA_PDATAALIGN_HALFWORD      ((uint32_t)DMA_CCR_PSIZE_0)  /*!< Peripheral data alignment: HalfWord */
-#define DMA_PDATAALIGN_HALFWORD      ((uint32_t)DMA_CCR_PSIZE_0)  /*!< Peripheral data alignment: HalfWord */
+#define DMA_PDATAALIGN_WORD          ((uint32_t)DMA_CCR_PSIZE_1)  /*!< Peripheral data alignment: Word     */
-#define DMA_PDATAALIGN_WORD          ((uint32_t)DMA_CCR_PSIZE_1)  /*!< Peripheral data alignment: Word     */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup DMA_Memory_data_size DMA Memory data size
-/** @defgroup DMA_Memory_data_size DMA Memory data size
+  * @{
-  * @{
+  */
-  */
+#define DMA_MDATAALIGN_BYTE          0x00000000U                  /*!< Memory data alignment: Byte     */
-#define DMA_MDATAALIGN_BYTE          0x00000000U                  /*!< Memory data alignment: Byte     */
+#define DMA_MDATAALIGN_HALFWORD      ((uint32_t)DMA_CCR_MSIZE_0)  /*!< Memory data alignment: HalfWord */
-#define DMA_MDATAALIGN_HALFWORD      ((uint32_t)DMA_CCR_MSIZE_0)  /*!< Memory data alignment: HalfWord */
+#define DMA_MDATAALIGN_WORD          ((uint32_t)DMA_CCR_MSIZE_1)  /*!< Memory data alignment: Word     */
-#define DMA_MDATAALIGN_WORD          ((uint32_t)DMA_CCR_MSIZE_1)  /*!< Memory data alignment: Word     */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup DMA_mode DMA mode
-/** @defgroup DMA_mode DMA mode
+  * @{
-  * @{
+  */
-  */
+#define DMA_NORMAL         0x00000000U                  /*!< Normal mode                  */
-#define DMA_NORMAL         0x00000000U                  /*!< Normal mode                  */
+#define DMA_CIRCULAR       ((uint32_t)DMA_CCR_CIRC)     /*!< Circular mode                */
-#define DMA_CIRCULAR       ((uint32_t)DMA_CCR_CIRC)     /*!< Circular mode                */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup DMA_Priority_level DMA Priority level
-/** @defgroup DMA_Priority_level DMA Priority level
+  * @{
-  * @{
+  */
-  */
+#define DMA_PRIORITY_LOW             0x00000000U               /*!< Priority level : Low       */
-#define DMA_PRIORITY_LOW             0x00000000U               /*!< Priority level : Low       */
+#define DMA_PRIORITY_MEDIUM          ((uint32_t)DMA_CCR_PL_0)  /*!< Priority level : Medium    */
-#define DMA_PRIORITY_MEDIUM          ((uint32_t)DMA_CCR_PL_0)  /*!< Priority level : Medium    */
+#define DMA_PRIORITY_HIGH            ((uint32_t)DMA_CCR_PL_1)  /*!< Priority level : High      */
-#define DMA_PRIORITY_HIGH            ((uint32_t)DMA_CCR_PL_1)  /*!< Priority level : High      */
+#define DMA_PRIORITY_VERY_HIGH       ((uint32_t)DMA_CCR_PL)    /*!< Priority level : Very_High */
-#define DMA_PRIORITY_VERY_HIGH       ((uint32_t)DMA_CCR_PL)    /*!< Priority level : Very_High */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+
-
+/** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
-/** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
+  * @{
-  * @{
+  */
-  */
+#define DMA_IT_TC                         ((uint32_t)DMA_CCR_TCIE)
-#define DMA_IT_TC                         ((uint32_t)DMA_CCR_TCIE)
+#define DMA_IT_HT                         ((uint32_t)DMA_CCR_HTIE)
-#define DMA_IT_HT                         ((uint32_t)DMA_CCR_HTIE)
+#define DMA_IT_TE                         ((uint32_t)DMA_CCR_TEIE)
-#define DMA_IT_TE                         ((uint32_t)DMA_CCR_TEIE)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup DMA_flag_definitions DMA flag definitions
-/** @defgroup DMA_flag_definitions DMA flag definitions
+  * @{
-  * @{
+  */
-  */
+#define DMA_FLAG_GL1                      0x00000001U
-#define DMA_FLAG_GL1                      0x00000001U
+#define DMA_FLAG_TC1                      0x00000002U
-#define DMA_FLAG_TC1                      0x00000002U
+#define DMA_FLAG_HT1                      0x00000004U
-#define DMA_FLAG_HT1                      0x00000004U
+#define DMA_FLAG_TE1                      0x00000008U
-#define DMA_FLAG_TE1                      0x00000008U
+#define DMA_FLAG_GL2                      0x00000010U
-#define DMA_FLAG_GL2                      0x00000010U
+#define DMA_FLAG_TC2                      0x00000020U
-#define DMA_FLAG_TC2                      0x00000020U
+#define DMA_FLAG_HT2                      0x00000040U
-#define DMA_FLAG_HT2                      0x00000040U
+#define DMA_FLAG_TE2                      0x00000080U
-#define DMA_FLAG_TE2                      0x00000080U
+#define DMA_FLAG_GL3                      0x00000100U
-#define DMA_FLAG_GL3                      0x00000100U
+#define DMA_FLAG_TC3                      0x00000200U
-#define DMA_FLAG_TC3                      0x00000200U
+#define DMA_FLAG_HT3                      0x00000400U
-#define DMA_FLAG_HT3                      0x00000400U
+#define DMA_FLAG_TE3                      0x00000800U
-#define DMA_FLAG_TE3                      0x00000800U
+#define DMA_FLAG_GL4                      0x00001000U
-#define DMA_FLAG_GL4                      0x00001000U
+#define DMA_FLAG_TC4                      0x00002000U
-#define DMA_FLAG_TC4                      0x00002000U
+#define DMA_FLAG_HT4                      0x00004000U
-#define DMA_FLAG_HT4                      0x00004000U
+#define DMA_FLAG_TE4                      0x00008000U
-#define DMA_FLAG_TE4                      0x00008000U
+#define DMA_FLAG_GL5                      0x00010000U
-#define DMA_FLAG_GL5                      0x00010000U
+#define DMA_FLAG_TC5                      0x00020000U
-#define DMA_FLAG_TC5                      0x00020000U
+#define DMA_FLAG_HT5                      0x00040000U
-#define DMA_FLAG_HT5                      0x00040000U
+#define DMA_FLAG_TE5                      0x00080000U
-#define DMA_FLAG_TE5                      0x00080000U
+#define DMA_FLAG_GL6                      0x00100000U
-#define DMA_FLAG_GL6                      0x00100000U
+#define DMA_FLAG_TC6                      0x00200000U
-#define DMA_FLAG_TC6                      0x00200000U
+#define DMA_FLAG_HT6                      0x00400000U
-#define DMA_FLAG_HT6                      0x00400000U
+#define DMA_FLAG_TE6                      0x00800000U
-#define DMA_FLAG_TE6                      0x00800000U
+#define DMA_FLAG_GL7                      0x01000000U
-#define DMA_FLAG_GL7                      0x01000000U
+#define DMA_FLAG_TC7                      0x02000000U
-#define DMA_FLAG_TC7                      0x02000000U
+#define DMA_FLAG_HT7                      0x04000000U
-#define DMA_FLAG_HT7                      0x04000000U
+#define DMA_FLAG_TE7                      0x08000000U
-#define DMA_FLAG_TE7                      0x08000000U
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+
-
+/* Exported macros -----------------------------------------------------------*/
-/* Exported macros -----------------------------------------------------------*/
+/** @defgroup DMA_Exported_Macros DMA Exported Macros
-/** @defgroup DMA_Exported_Macros DMA Exported Macros
+  * @{
-  * @{
+  */
-  */
+
-
+/** @brief  Reset DMA handle state.
-/** @brief  Reset DMA handle state.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval None
-  * @retval None
+  */
-  */
+#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
-#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
+
-
+/**
-/**
+  * @brief  Enable the specified DMA Channel.
-  * @brief  Enable the specified DMA Channel.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval None
-  * @retval None
+  */
-  */
+#define __HAL_DMA_ENABLE(__HANDLE__)        (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
-#define __HAL_DMA_ENABLE(__HANDLE__)        (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
+
-
+/**
-/**
+  * @brief  Disable the specified DMA Channel.
-  * @brief  Disable the specified DMA Channel.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval None
-  * @retval None
+  */
-  */
+#define __HAL_DMA_DISABLE(__HANDLE__)       (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
-#define __HAL_DMA_DISABLE(__HANDLE__)       (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
+
-
+
-
+/* Interrupt & Flag management */
-/* Interrupt & Flag management */
+
-
+/**
-/**
+  * @brief  Enables the specified DMA Channel interrupts.
-  * @brief  Enables the specified DMA Channel interrupts.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
-  * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
+  *          This parameter can be any combination of the following values:
-  *          This parameter can be any combination of the following values:
+  *            @arg DMA_IT_TC:  Transfer complete interrupt mask
-  *            @arg DMA_IT_TC:  Transfer complete interrupt mask
+  *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
-  *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
+  *            @arg DMA_IT_TE:  Transfer error interrupt mask
-  *            @arg DMA_IT_TE:  Transfer error interrupt mask
+  * @retval None
-  * @retval None
+  */
-  */
+#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__)))
-#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__)))
+
-
+/**
-/**
+  * @brief  Disable the specified DMA Channel interrupts.
-  * @brief  Disable the specified DMA Channel interrupts.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @param  __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
-  * @param  __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
+  *          This parameter can be any combination of the following values:
-  *          This parameter can be any combination of the following values:
+  *            @arg DMA_IT_TC:  Transfer complete interrupt mask
-  *            @arg DMA_IT_TC:  Transfer complete interrupt mask
+  *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
-  *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
+  *            @arg DMA_IT_TE:  Transfer error interrupt mask
-  *            @arg DMA_IT_TE:  Transfer error interrupt mask
+  * @retval None
-  * @retval None
+  */
-  */
+#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__)  (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__)))
-#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__)  (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__)))
+
-
+/**
-/**
+  * @brief  Check whether the specified DMA Channel interrupt is enabled or not.
-  * @brief  Check whether the specified DMA Channel interrupt is enabled or not.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @param  __INTERRUPT__: specifies the DMA interrupt source to check.
-  * @param  __INTERRUPT__: specifies the DMA interrupt source to check.
+  *          This parameter can be one of the following values:
-  *          This parameter can be one of the following values:
+  *            @arg DMA_IT_TC:  Transfer complete interrupt mask
-  *            @arg DMA_IT_TC:  Transfer complete interrupt mask
+  *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
-  *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
+  *            @arg DMA_IT_TE:  Transfer error interrupt mask
-  *            @arg DMA_IT_TE:  Transfer error interrupt mask
+  * @retval The state of DMA_IT (SET or RESET).
-  * @retval The state of DMA_IT (SET or RESET).
+  */
-  */
+#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)  ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)  ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
+
-
+/**
-/**
+  * @brief  Return the number of remaining data units in the current DMA Channel transfer.
-  * @brief  Return the number of remaining data units in the current DMA Channel transfer.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval The number of remaining data units in the current DMA Channel transfer.
-  * @retval The number of remaining data units in the current DMA Channel transfer.
+  */
-  */
+#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR)
-#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR)
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Include DMA HAL Extension module */
-/* Include DMA HAL Extension module */
+#include "stm32f1xx_hal_dma_ex.h"   
-#include "stm32f1xx_hal_dma_ex.h"   
+
-
+/* Exported functions --------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
+/** @addtogroup DMA_Exported_Functions
-/** @addtogroup DMA_Exported_Functions
+  * @{
-  * @{
+  */
-  */
+
-
+/** @addtogroup DMA_Exported_Functions_Group1
-/** @addtogroup DMA_Exported_Functions_Group1
+  * @{
-  * @{
+  */
-  */
+/* Initialization and de-initialization functions *****************************/
-/* Initialization and de-initialization functions *****************************/
+HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
+HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup DMA_Exported_Functions_Group2
-/** @addtogroup DMA_Exported_Functions_Group2
+  * @{
-  * @{
+  */
-  */
+/* IO operation functions *****************************************************/
-/* IO operation functions *****************************************************/
+HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
+HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
+HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
+HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
+HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
-HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
+void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
-void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
+HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma));
-HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma));
+HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
-HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup DMA_Exported_Functions_Group3
-/** @addtogroup DMA_Exported_Functions_Group3
+  * @{
-  * @{
+  */
-  */
+/* Peripheral State and Error functions ***************************************/
-/* Peripheral State and Error functions ***************************************/
+HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
-HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
+uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
-uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Private macros ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
+/** @defgroup DMA_Private_Macros DMA Private Macros
-/** @defgroup DMA_Private_Macros DMA Private Macros
+  * @{
-  * @{
+  */
-  */
+
-
+#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
-#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
+                                     ((DIRECTION) == DMA_MEMORY_TO_PERIPH)  || \
-                                     ((DIRECTION) == DMA_MEMORY_TO_PERIPH)  || \
+                                     ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
-                                     ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
+
-
+#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1U) && ((SIZE) < 0x10000U))
-#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1U) && ((SIZE) < 0x10000U))
+
-
+#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
-#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
+                                            ((STATE) == DMA_PINC_DISABLE))
-                                            ((STATE) == DMA_PINC_DISABLE))
+
-
+#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE)  || \
-#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE)  || \
+                                        ((STATE) == DMA_MINC_DISABLE))
-                                        ((STATE) == DMA_MINC_DISABLE))
+
-
+#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE)     || \
-#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE)     || \
+                                           ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
-                                           ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
+                                           ((SIZE) == DMA_PDATAALIGN_WORD))
-                                           ((SIZE) == DMA_PDATAALIGN_WORD))
+
-
+#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE)     || \
-#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE)     || \
+                                       ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
-                                       ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
+                                       ((SIZE) == DMA_MDATAALIGN_WORD ))
-                                       ((SIZE) == DMA_MDATAALIGN_WORD ))
+
-
+#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL )  || \
-#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL )  || \
+                           ((MODE) == DMA_CIRCULAR))
-                           ((MODE) == DMA_CIRCULAR))
+
-
+#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW )   || \
-#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW )   || \
+                                   ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
-                                   ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
+                                   ((PRIORITY) == DMA_PRIORITY_HIGH)   || \
-                                   ((PRIORITY) == DMA_PRIORITY_HIGH)   || \
+                                   ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
-                                   ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
+
-
+/**
-/**
+  * @}
-  * @}
+  */ 
-  */ 
+
-
+/* Private functions ---------------------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+}
-}
+#endif
-#endif
+
-
+#endif /* __STM32F1xx_HAL_DMA_H */
-#endif /* __STM32F1xx_HAL_DMA_H */
+
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h

@@ -1,277 +1,275 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    stm32f1xx_hal_dma_ex.h
+  * @file    stm32f1xx_hal_dma_ex.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   Header file of DMA HAL extension module.
+  * @brief   Header file of DMA HAL extension module.
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file in
-  * the "License"; You may not use this file except in compliance with the
+  * the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+
-
+/* Define to prevent recursive inclusion -------------------------------------*/
-/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_DMA_EX_H
-#ifndef __STM32F1xx_HAL_DMA_EX_H
+#define __STM32F1xx_HAL_DMA_EX_H
-#define __STM32F1xx_HAL_DMA_EX_H
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+ extern "C" {
- extern "C" {
+#endif
-#endif
+
-
+/* Includes ------------------------------------------------------------------*/
-/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"
-#include "stm32f1xx_hal_def.h"
+
-
+/** @addtogroup STM32F1xx_HAL_Driver
-/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
-  * @{
+  */
-  */
+
-
+/** @defgroup DMAEx DMAEx
-/** @defgroup DMAEx DMAEx
+  * @{
-  * @{
+  */
-  */
+
-
+/* Exported types ------------------------------------------------------------*/ 
-/* Exported types ------------------------------------------------------------*/ 
+/* Exported constants --------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
+/** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
-/** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
+  * @{
-  * @{
+  */
-  */
+/* Interrupt & Flag management */
-/* Interrupt & Flag management */
+#if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
-#if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
+    defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
-    defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
+/** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
-/** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
+  * @{
-  * @{
+  */
-  */
+
-
+/**
-/**
+  * @brief  Returns the current DMA Channel transfer complete flag.
-  * @brief  Returns the current DMA Channel transfer complete flag.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval The specified transfer complete flag index.
-  * @retval The specified transfer complete flag index.
+  */
-  */
+#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
-#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
+(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
+   DMA_FLAG_TC5)
-   DMA_FLAG_TC5)
+
-
+/**
-/**
+  * @brief  Returns the current DMA Channel half transfer complete flag.
-  * @brief  Returns the current DMA Channel half transfer complete flag.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval The specified half transfer complete flag index.
-  * @retval The specified half transfer complete flag index.
+  */      
-  */      
+#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
-#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
+(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
+   DMA_FLAG_HT5)
-   DMA_FLAG_HT5)
+
-
+/**
-/**
+  * @brief  Returns the current DMA Channel transfer error flag.
-  * @brief  Returns the current DMA Channel transfer error flag.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval The specified transfer error flag index.
-  * @retval The specified transfer error flag index.
+  */
-  */
+#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
-#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
+(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
+   DMA_FLAG_TE5)
-   DMA_FLAG_TE5)
+
-
+/**
-/**
+  * @brief  Return the current DMA Channel Global interrupt flag.
-  * @brief  Return the current DMA Channel Global interrupt flag.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval The specified transfer error flag index.
-  * @retval The specified transfer error flag index.
+  */
-  */
+#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
-#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
+(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\
+   DMA_FLAG_GL5)
-   DMA_FLAG_GL5)
+   
-   
+/**
-/**
+  * @brief  Get the DMA Channel pending flags.
-  * @brief  Get the DMA Channel pending flags.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @param  __FLAG__: Get the specified flag.
-  * @param  __FLAG__: Get the specified flag.
+  *          This parameter can be any combination of the following values:
-  *          This parameter can be any combination of the following values:
+  *            @arg DMA_FLAG_TCx:  Transfer complete flag
-  *            @arg DMA_FLAG_TCx:  Transfer complete flag
+  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
-  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
+  *            @arg DMA_FLAG_TEx:  Transfer error flag
-  *            @arg DMA_FLAG_TEx:  Transfer error flag
+  *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.   
-  *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.   
+  * @retval The state of FLAG (SET or RESET).
-  * @retval The state of FLAG (SET or RESET).
+  */
-  */
+#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
-#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
+(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
-(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
+  (DMA1->ISR & (__FLAG__)))
-  (DMA1->ISR & (__FLAG__)))
+
-
+/**
-/**
+  * @brief  Clears the DMA Channel pending flags.
-  * @brief  Clears the DMA Channel pending flags.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @param  __FLAG__: specifies the flag to clear.
-  * @param  __FLAG__: specifies the flag to clear.
+  *          This parameter can be any combination of the following values:
-  *          This parameter can be any combination of the following values:
+  *            @arg DMA_FLAG_TCx:  Transfer complete flag
-  *            @arg DMA_FLAG_TCx:  Transfer complete flag
+  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
-  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
+  *            @arg DMA_FLAG_TEx:  Transfer error flag
-  *            @arg DMA_FLAG_TEx:  Transfer error flag
+  *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.   
-  *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.   
+  * @retval None
-  * @retval None
+  */
-  */
+#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
-#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
+(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
-(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
+  (DMA1->IFCR = (__FLAG__)))
-  (DMA1->IFCR = (__FLAG__)))
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#else
-#else
+/** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
-/** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
+  * @{
-  * @{
+  */
-  */
+
-
+/**
-/**
+  * @brief  Returns the current DMA Channel transfer complete flag.
-  * @brief  Returns the current DMA Channel transfer complete flag.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval The specified transfer complete flag index.
-  * @retval The specified transfer complete flag index.
+  */
-  */
+#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
-#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
+(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
+   DMA_FLAG_TC7)
-   DMA_FLAG_TC7)
+
-
+/**
-/**
+  * @brief  Return the current DMA Channel half transfer complete flag.
-  * @brief  Return the current DMA Channel half transfer complete flag.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval The specified half transfer complete flag index.
-  * @retval The specified half transfer complete flag index.
+  */
-  */
+#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
-#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
+(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
+   DMA_FLAG_HT7)
-   DMA_FLAG_HT7)
+
-
+/**
-/**
+  * @brief  Return the current DMA Channel transfer error flag.
-  * @brief  Return the current DMA Channel transfer error flag.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval The specified transfer error flag index.
-  * @retval The specified transfer error flag index.
+  */
-  */
+#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
-#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
+(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
+   DMA_FLAG_TE7)
-   DMA_FLAG_TE7)
+
-
+/**
-/**
+  * @brief  Return the current DMA Channel Global interrupt flag.
-  * @brief  Return the current DMA Channel Global interrupt flag.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @retval The specified transfer error flag index.
-  * @retval The specified transfer error flag index.
+  */
-  */
+#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
-#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
+(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
+ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
+   DMA_FLAG_GL7)
-   DMA_FLAG_GL7)
+
-
+/**
-/**
+  * @brief  Get the DMA Channel pending flags.
-  * @brief  Get the DMA Channel pending flags.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @param  __FLAG__: Get the specified flag.
-  * @param  __FLAG__: Get the specified flag.
+  *          This parameter can be any combination of the following values:
-  *          This parameter can be any combination of the following values:
+  *            @arg DMA_FLAG_TCx:  Transfer complete flag
-  *            @arg DMA_FLAG_TCx:  Transfer complete flag
+  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
-  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
+  *            @arg DMA_FLAG_TEx:  Transfer error flag
-  *            @arg DMA_FLAG_TEx:  Transfer error flag
+  *            @arg DMA_FLAG_GLx:  Global interrupt flag
-  *            @arg DMA_FLAG_GLx:  Global interrupt flag
+  *         Where x can be 1_7 to select the DMA Channel flag.   
-  *         Where x can be 1_7 to select the DMA Channel flag.   
+  * @retval The state of FLAG (SET or RESET).
-  * @retval The state of FLAG (SET or RESET).
+  */
-  */
+
-
+#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)   (DMA1->ISR & (__FLAG__))
-#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)   (DMA1->ISR & (__FLAG__))
+
-
+/**
-/**
+  * @brief  Clear the DMA Channel pending flags.
-  * @brief  Clear the DMA Channel pending flags.
+  * @param  __HANDLE__: DMA handle
-  * @param  __HANDLE__: DMA handle
+  * @param  __FLAG__: specifies the flag to clear.
-  * @param  __FLAG__: specifies the flag to clear.
+  *          This parameter can be any combination of the following values:
-  *          This parameter can be any combination of the following values:
+  *            @arg DMA_FLAG_TCx:  Transfer complete flag
-  *            @arg DMA_FLAG_TCx:  Transfer complete flag
+  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
-  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
+  *            @arg DMA_FLAG_TEx:  Transfer error flag
-  *            @arg DMA_FLAG_TEx:  Transfer error flag
+  *            @arg DMA_FLAG_GLx:  Global interrupt flag
-  *            @arg DMA_FLAG_GLx:  Global interrupt flag
+  *         Where x can be 1_7 to select the DMA Channel flag.   
-  *         Where x can be 1_7 to select the DMA Channel flag.   
+  * @retval None
-  * @retval None
+  */
-  */
+#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
-#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#endif
-#endif
+  
-  
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+}
-}
+#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
-#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
+       /* STM32F103xG || STM32F105xC || STM32F107xC */
-       /* STM32F103xG || STM32F105xC || STM32F107xC */
+
-
+#endif /* __STM32F1xx_HAL_DMA_H */
-#endif /* __STM32F1xx_HAL_DMA_H */
+
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h

@@ -1,320 +1,318 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    stm32f1xx_hal_exti.h
+  * @file    stm32f1xx_hal_exti.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   Header file of EXTI HAL module.
+  * @brief   Header file of EXTI HAL module.
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * Copyright (c) 2019 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+
-
+/* Define to prevent recursive inclusion -------------------------------------*/
-/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32F1xx_HAL_EXTI_H
-#ifndef STM32F1xx_HAL_EXTI_H
+#define STM32F1xx_HAL_EXTI_H
-#define STM32F1xx_HAL_EXTI_H
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+extern "C" {
-extern "C" {
+#endif
-#endif
+
-
+/* Includes ------------------------------------------------------------------*/
-/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"
-#include "stm32f1xx_hal_def.h"
+
-
+/** @addtogroup STM32F1xx_HAL_Driver
-/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
-  * @{
+  */
-  */
+
-
+/** @defgroup EXTI EXTI
-/** @defgroup EXTI EXTI
+  * @brief EXTI HAL module driver
-  * @brief EXTI HAL module driver
+  * @{
-  * @{
+  */
-  */
+
-
+/* Exported types ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
+
-
+/** @defgroup EXTI_Exported_Types EXTI Exported Types
-/** @defgroup EXTI_Exported_Types EXTI Exported Types
+  * @{
-  * @{
+  */
-  */
+
-
+/**
-/**
+  * @brief  HAL EXTI common Callback ID enumeration definition
-  * @brief  HAL EXTI common Callback ID enumeration definition
+  */
-  */
+typedef enum
-typedef enum
+{
-{
+  HAL_EXTI_COMMON_CB_ID          = 0x00U
-  HAL_EXTI_COMMON_CB_ID          = 0x00U
+} EXTI_CallbackIDTypeDef;
-} EXTI_CallbackIDTypeDef;
+
-
+/**
-/**
+  * @brief  EXTI Handle structure definition
-  * @brief  EXTI Handle structure definition
+  */
-  */
+typedef struct
-typedef struct
+{
-{
+  uint32_t Line;                    /*!<  Exti line number */
-  uint32_t Line;                    /*!<  Exti line number */
+  void (* PendingCallback)(void);   /*!<  Exti pending callback */
-  void (* PendingCallback)(void);   /*!<  Exti pending callback */
+} EXTI_HandleTypeDef;
-} EXTI_HandleTypeDef;
+
-
+/**
-/**
+  * @brief  EXTI Configuration structure definition
-  * @brief  EXTI Configuration structure definition
+  */
-  */
+typedef struct
-typedef struct
+{
-{
+  uint32_t Line;      /*!< The Exti line to be configured. This parameter
-  uint32_t Line;      /*!< The Exti line to be configured. This parameter
+                           can be a value of @ref EXTI_Line */
-                           can be a value of @ref EXTI_Line */
+  uint32_t Mode;      /*!< The Exit Mode to be configured for a core.
-  uint32_t Mode;      /*!< The Exit Mode to be configured for a core.
+                           This parameter can be a combination of @ref EXTI_Mode */
-                           This parameter can be a combination of @ref EXTI_Mode */
+  uint32_t Trigger;   /*!< The Exti Trigger to be configured. This parameter
-  uint32_t Trigger;   /*!< The Exti Trigger to be configured. This parameter
+                           can be a value of @ref EXTI_Trigger */
-                           can be a value of @ref EXTI_Trigger */
+  uint32_t GPIOSel;   /*!< The Exti GPIO multiplexer selection to be configured.
-  uint32_t GPIOSel;   /*!< The Exti GPIO multiplexer selection to be configured.
+                           This parameter is only possible for line 0 to 15. It
-                           This parameter is only possible for line 0 to 15. It
+                           can be a value of @ref EXTI_GPIOSel */
-                           can be a value of @ref EXTI_GPIOSel */
+} EXTI_ConfigTypeDef;
-} EXTI_ConfigTypeDef;
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Exported constants --------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
+/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
-/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
+  * @{
-  * @{
+  */
-  */
+
-
+/** @defgroup EXTI_Line  EXTI Line
-/** @defgroup EXTI_Line  EXTI Line
+  * @{
-  * @{
+  */
-  */
+#define EXTI_LINE_0                        (EXTI_GPIO     | 0x00u)    /*!< External interrupt line 0 */
-#define EXTI_LINE_0                        (EXTI_GPIO     | 0x00u)    /*!< External interrupt line 0 */
+#define EXTI_LINE_1                        (EXTI_GPIO     | 0x01u)    /*!< External interrupt line 1 */
-#define EXTI_LINE_1                        (EXTI_GPIO     | 0x01u)    /*!< External interrupt line 1 */
+#define EXTI_LINE_2                        (EXTI_GPIO     | 0x02u)    /*!< External interrupt line 2 */
-#define EXTI_LINE_2                        (EXTI_GPIO     | 0x02u)    /*!< External interrupt line 2 */
+#define EXTI_LINE_3                        (EXTI_GPIO     | 0x03u)    /*!< External interrupt line 3 */
-#define EXTI_LINE_3                        (EXTI_GPIO     | 0x03u)    /*!< External interrupt line 3 */
+#define EXTI_LINE_4                        (EXTI_GPIO     | 0x04u)    /*!< External interrupt line 4 */
-#define EXTI_LINE_4                        (EXTI_GPIO     | 0x04u)    /*!< External interrupt line 4 */
+#define EXTI_LINE_5                        (EXTI_GPIO     | 0x05u)    /*!< External interrupt line 5 */
-#define EXTI_LINE_5                        (EXTI_GPIO     | 0x05u)    /*!< External interrupt line 5 */
+#define EXTI_LINE_6                        (EXTI_GPIO     | 0x06u)    /*!< External interrupt line 6 */
-#define EXTI_LINE_6                        (EXTI_GPIO     | 0x06u)    /*!< External interrupt line 6 */
+#define EXTI_LINE_7                        (EXTI_GPIO     | 0x07u)    /*!< External interrupt line 7 */
-#define EXTI_LINE_7                        (EXTI_GPIO     | 0x07u)    /*!< External interrupt line 7 */
+#define EXTI_LINE_8                        (EXTI_GPIO     | 0x08u)    /*!< External interrupt line 8 */
-#define EXTI_LINE_8                        (EXTI_GPIO     | 0x08u)    /*!< External interrupt line 8 */
+#define EXTI_LINE_9                        (EXTI_GPIO     | 0x09u)    /*!< External interrupt line 9 */
-#define EXTI_LINE_9                        (EXTI_GPIO     | 0x09u)    /*!< External interrupt line 9 */
+#define EXTI_LINE_10                       (EXTI_GPIO     | 0x0Au)    /*!< External interrupt line 10 */
-#define EXTI_LINE_10                       (EXTI_GPIO     | 0x0Au)    /*!< External interrupt line 10 */
+#define EXTI_LINE_11                       (EXTI_GPIO     | 0x0Bu)    /*!< External interrupt line 11 */
-#define EXTI_LINE_11                       (EXTI_GPIO     | 0x0Bu)    /*!< External interrupt line 11 */
+#define EXTI_LINE_12                       (EXTI_GPIO     | 0x0Cu)    /*!< External interrupt line 12 */
-#define EXTI_LINE_12                       (EXTI_GPIO     | 0x0Cu)    /*!< External interrupt line 12 */
+#define EXTI_LINE_13                       (EXTI_GPIO     | 0x0Du)    /*!< External interrupt line 13 */
-#define EXTI_LINE_13                       (EXTI_GPIO     | 0x0Du)    /*!< External interrupt line 13 */
+#define EXTI_LINE_14                       (EXTI_GPIO     | 0x0Eu)    /*!< External interrupt line 14 */
-#define EXTI_LINE_14                       (EXTI_GPIO     | 0x0Eu)    /*!< External interrupt line 14 */
+#define EXTI_LINE_15                       (EXTI_GPIO     | 0x0Fu)    /*!< External interrupt line 15 */
-#define EXTI_LINE_15                       (EXTI_GPIO     | 0x0Fu)    /*!< External interrupt line 15 */
+#define EXTI_LINE_16                       (EXTI_CONFIG   | 0x10u)    /*!< External interrupt line 16 Connected to the PVD Output */
-#define EXTI_LINE_16                       (EXTI_CONFIG   | 0x10u)    /*!< External interrupt line 16 Connected to the PVD Output */
+#define EXTI_LINE_17                       (EXTI_CONFIG   | 0x11u)    /*!< External interrupt line 17 Connected to the RTC Alarm event */
-#define EXTI_LINE_17                       (EXTI_CONFIG   | 0x11u)    /*!< External interrupt line 17 Connected to the RTC Alarm event */
+#if defined(EXTI_IMR_IM18)
-#if defined(EXTI_IMR_IM18)
+#define EXTI_LINE_18                       (EXTI_CONFIG   | 0x12u)    /*!< External interrupt line 18 Connected to the USB Wakeup from suspend event */
-#define EXTI_LINE_18                       (EXTI_CONFIG   | 0x12u)    /*!< External interrupt line 18 Connected to the USB Wakeup from suspend event */
+#endif /* EXTI_IMR_IM18 */
-#endif /* EXTI_IMR_IM18 */
+#if defined(EXTI_IMR_IM19)
-#if defined(EXTI_IMR_IM19)
+#define EXTI_LINE_19                       (EXTI_CONFIG   | 0x13u)    /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
-#define EXTI_LINE_19                       (EXTI_CONFIG   | 0x13u)    /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
+#endif /* EXTI_IMR_IM19 */
-#endif /* EXTI_IMR_IM19 */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup EXTI_Mode  EXTI Mode
-/** @defgroup EXTI_Mode  EXTI Mode
+  * @{
-  * @{
+  */
-  */
+#define EXTI_MODE_NONE                      0x00000000u
-#define EXTI_MODE_NONE                      0x00000000u
+#define EXTI_MODE_INTERRUPT                 0x00000001u
-#define EXTI_MODE_INTERRUPT                 0x00000001u
+#define EXTI_MODE_EVENT                     0x00000002u
-#define EXTI_MODE_EVENT                     0x00000002u
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup EXTI_Trigger  EXTI Trigger
-/** @defgroup EXTI_Trigger  EXTI Trigger
+  * @{
-  * @{
+  */
-  */
+#define EXTI_TRIGGER_NONE                   0x00000000u
-#define EXTI_TRIGGER_NONE                   0x00000000u
+#define EXTI_TRIGGER_RISING                 0x00000001u
-#define EXTI_TRIGGER_RISING                 0x00000001u
+#define EXTI_TRIGGER_FALLING                0x00000002u
-#define EXTI_TRIGGER_FALLING                0x00000002u
+#define EXTI_TRIGGER_RISING_FALLING         (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
-#define EXTI_TRIGGER_RISING_FALLING         (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup EXTI_GPIOSel  EXTI GPIOSel
-/** @defgroup EXTI_GPIOSel  EXTI GPIOSel
+  * @brief
-  * @brief
+  * @{
-  * @{
+  */
-  */
+#define EXTI_GPIOA                          0x00000000u
-#define EXTI_GPIOA                          0x00000000u
+#define EXTI_GPIOB                          0x00000001u
-#define EXTI_GPIOB                          0x00000001u
+#define EXTI_GPIOC                          0x00000002u
-#define EXTI_GPIOC                          0x00000002u
+#define EXTI_GPIOD                          0x00000003u
-#define EXTI_GPIOD                          0x00000003u
+#if defined (GPIOE)
-#if defined (GPIOE)
+#define EXTI_GPIOE                          0x00000004u
-#define EXTI_GPIOE                          0x00000004u
+#endif /* GPIOE */
-#endif /* GPIOE */
+#if defined (GPIOF)
-#if defined (GPIOF)
+#define EXTI_GPIOF                          0x00000005u
-#define EXTI_GPIOF                          0x00000005u
+#endif /* GPIOF */
-#endif /* GPIOF */
+#if defined (GPIOG)
-#if defined (GPIOG)
+#define EXTI_GPIOG                          0x00000006u
-#define EXTI_GPIOG                          0x00000006u
+#endif /* GPIOG */
-#endif /* GPIOG */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Exported macro ------------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
+/** @defgroup EXTI_Exported_Macros EXTI Exported Macros
-/** @defgroup EXTI_Exported_Macros EXTI Exported Macros
+  * @{
-  * @{
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Private constants --------------------------------------------------------*/
-/* Private constants --------------------------------------------------------*/
+/** @defgroup EXTI_Private_Constants EXTI Private Constants
-/** @defgroup EXTI_Private_Constants EXTI Private Constants
+  * @{
-  * @{
+  */
-  */
+/**
-/**
+  * @brief  EXTI Line property definition
-  * @brief  EXTI Line property definition
+  */
-  */
+#define EXTI_PROPERTY_SHIFT                 24u
-#define EXTI_PROPERTY_SHIFT                 24u
+#define EXTI_CONFIG                         (0x02uL << EXTI_PROPERTY_SHIFT)
-#define EXTI_CONFIG                         (0x02uL << EXTI_PROPERTY_SHIFT)
+#define EXTI_GPIO                           ((0x04uL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
-#define EXTI_GPIO                           ((0x04uL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
+#define EXTI_PROPERTY_MASK                  (EXTI_CONFIG | EXTI_GPIO)
-#define EXTI_PROPERTY_MASK                  (EXTI_CONFIG | EXTI_GPIO)
+
-
+/**
-/**
+  * @brief  EXTI bit usage
-  * @brief  EXTI bit usage
+  */
-  */
+#define EXTI_PIN_MASK                       0x0000001Fu
-#define EXTI_PIN_MASK                       0x0000001Fu
+
-
+/**
-/**
+  * @brief  EXTI Mask for interrupt & event mode
-  * @brief  EXTI Mask for interrupt & event mode
+  */
-  */
+#define EXTI_MODE_MASK                      (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
-#define EXTI_MODE_MASK                      (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
+
-
+/**
-/**
+  * @brief  EXTI Mask for trigger possibilities
-  * @brief  EXTI Mask for trigger possibilities
+  */
-  */
+#define EXTI_TRIGGER_MASK                   (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
-#define EXTI_TRIGGER_MASK                   (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
+
-
+/**
-/**
+  * @brief  EXTI Line number
-  * @brief  EXTI Line number
+  */
-  */
+#if defined(EXTI_IMR_IM19)
-#if defined(EXTI_IMR_IM19)
+#define EXTI_LINE_NB                        20UL
-#define EXTI_LINE_NB                        20UL
+#elif defined(EXTI_IMR_IM18)
-#elif defined(EXTI_IMR_IM18)
+#define EXTI_LINE_NB                        19UL
-#define EXTI_LINE_NB                        19UL
+#else /* EXTI_IMR_IM17 */
-#else /* EXTI_IMR_IM17 */
+#define EXTI_LINE_NB                        18UL
-#define EXTI_LINE_NB                        18UL
+#endif /* EXTI_IMR_IM19 */
-#endif /* EXTI_IMR_IM19 */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Private macros ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
+/** @defgroup EXTI_Private_Macros EXTI Private Macros
-/** @defgroup EXTI_Private_Macros EXTI Private Macros
+  * @{
-  * @{
+  */
-  */
+#define IS_EXTI_LINE(__EXTI_LINE__)          ((((__EXTI_LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_PIN_MASK)) == 0x00u) && \
-#define IS_EXTI_LINE(__EXTI_LINE__)          ((((__EXTI_LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_PIN_MASK)) == 0x00u) && \
+                                             ((((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG)   || \
-                                             ((((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG)   || \
+                                              (((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO))    && \
-                                              (((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO))    && \
+                                              (((__EXTI_LINE__) & EXTI_PIN_MASK) < EXTI_LINE_NB))
-                                              (((__EXTI_LINE__) & EXTI_PIN_MASK) < EXTI_LINE_NB))
+
-
+#define IS_EXTI_MODE(__EXTI_LINE__)          ((((__EXTI_LINE__) & EXTI_MODE_MASK) != 0x00u) && \
-#define IS_EXTI_MODE(__EXTI_LINE__)          ((((__EXTI_LINE__) & EXTI_MODE_MASK) != 0x00u) && \
+                                              (((__EXTI_LINE__) & ~EXTI_MODE_MASK) == 0x00u))
-                                              (((__EXTI_LINE__) & ~EXTI_MODE_MASK) == 0x00u))
+
-
+#define IS_EXTI_TRIGGER(__EXTI_LINE__)       (((__EXTI_LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
-#define IS_EXTI_TRIGGER(__EXTI_LINE__)       (((__EXTI_LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
+
-
+#define IS_EXTI_PENDING_EDGE(__EXTI_LINE__)  ((__EXTI_LINE__) == EXTI_TRIGGER_RISING_FALLING)
-#define IS_EXTI_PENDING_EDGE(__EXTI_LINE__)  ((__EXTI_LINE__) == EXTI_TRIGGER_RISING_FALLING)
+
-
+#define IS_EXTI_CONFIG_LINE(__EXTI_LINE__)   (((__EXTI_LINE__) & EXTI_CONFIG) != 0x00u)
-#define IS_EXTI_CONFIG_LINE(__EXTI_LINE__)   (((__EXTI_LINE__) & EXTI_CONFIG) != 0x00u)
+
-
+#if defined (GPIOG)
-#if defined (GPIOG)
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
-#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
-                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
-                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD) || \
-                                         ((__PORT__) == EXTI_GPIOD) || \
+                                         ((__PORT__) == EXTI_GPIOE) || \
-                                         ((__PORT__) == EXTI_GPIOE) || \
+                                         ((__PORT__) == EXTI_GPIOF) || \
-                                         ((__PORT__) == EXTI_GPIOF) || \
+                                         ((__PORT__) == EXTI_GPIOG))
-                                         ((__PORT__) == EXTI_GPIOG))
+#elif defined (GPIOF)
-#elif defined (GPIOF)
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
-#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
-                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
-                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD) || \
-                                         ((__PORT__) == EXTI_GPIOD) || \
+                                         ((__PORT__) == EXTI_GPIOE) || \
-                                         ((__PORT__) == EXTI_GPIOE) || \
+                                         ((__PORT__) == EXTI_GPIOF))
-                                         ((__PORT__) == EXTI_GPIOF))
+#elif defined (GPIOE)
-#elif defined (GPIOE)
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
-#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
-                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
-                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD) || \
-                                         ((__PORT__) == EXTI_GPIOD) || \
+                                         ((__PORT__) == EXTI_GPIOE))
-                                         ((__PORT__) == EXTI_GPIOE))
+#else
-#else
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
-#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
-                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
-                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD))
-                                         ((__PORT__) == EXTI_GPIOD))
+#endif /* GPIOG */
-#endif /* GPIOG */
+
-
+#define IS_EXTI_GPIO_PIN(__PIN__)       ((__PIN__) < 16u)
-#define IS_EXTI_GPIO_PIN(__PIN__)       ((__PIN__) < 16u)
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Exported functions --------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
+/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
-/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
+  * @brief    EXTI Exported Functions
-  * @brief    EXTI Exported Functions
+  * @{
-  * @{
+  */
-  */
+
-
+/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
-/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
+  * @brief    Configuration functions
-  * @brief    Configuration functions
+  * @{
-  * @{
+  */
-  */
+/* Configuration functions ****************************************************/
-/* Configuration functions ****************************************************/
+HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
-HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
-HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
-HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
+HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
-HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
+HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
-HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
-/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
+  * @brief    IO operation functions
-  * @brief    IO operation functions
+  * @{
-  * @{
+  */
-  */
+/* IO operation functions *****************************************************/
-/* IO operation functions *****************************************************/
+void              HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
-void              HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
+uint32_t          HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
-uint32_t          HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
+void              HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
-void              HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
+void              HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
-void              HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+}
-}
+#endif
-#endif
+
-
+#endif /* STM32F1xx_HAL_EXTI_H */
-#endif /* STM32F1xx_HAL_EXTI_H */
+
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h

@@ -1,328 +1,325 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    stm32f1xx_hal_flash.h
+  * @file    stm32f1xx_hal_flash.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   Header file of Flash HAL module.
+  * @brief   Header file of Flash HAL module.
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file in
-  * the "License"; You may not use this file except in compliance with the
+  * the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  ******************************************************************************
-  *
+  */
-  ******************************************************************************
+
-  */
+/* Define to prevent recursive inclusion -------------------------------------*/
-
+#ifndef __STM32F1xx_HAL_FLASH_H
-/* Define to prevent recursive inclusion -------------------------------------*/
+#define __STM32F1xx_HAL_FLASH_H
-#ifndef __STM32F1xx_HAL_FLASH_H
+
-#define __STM32F1xx_HAL_FLASH_H
+#ifdef __cplusplus
-
+ extern "C" {
-#ifdef __cplusplus
+#endif
- extern "C" {
+
-#endif
+/* Includes ------------------------------------------------------------------*/
-
+#include "stm32f1xx_hal_def.h"
-/* Includes ------------------------------------------------------------------*/
+   
-#include "stm32f1xx_hal_def.h"
+/** @addtogroup STM32F1xx_HAL_Driver
-   
+  * @{
-/** @addtogroup STM32F1xx_HAL_Driver
+  */
-  * @{
+
-  */
+/** @addtogroup FLASH
-
+  * @{
-/** @addtogroup FLASH
+  */
-  * @{
+  
-  */
+/** @addtogroup FLASH_Private_Constants
-  
+  * @{
-/** @addtogroup FLASH_Private_Constants
+  */
-  * @{
+#define FLASH_TIMEOUT_VALUE              50000U /* 50 s */
-  */
+/**
-#define FLASH_TIMEOUT_VALUE              50000U /* 50 s */
+  * @}
-/**
+  */
-  * @}
+
-  */
+/** @addtogroup FLASH_Private_Macros
-
+  * @{
-/** @addtogroup FLASH_Private_Macros
+  */
-  * @{
+
-  */
+#define IS_FLASH_TYPEPROGRAM(VALUE)  (((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \
-
+                                      ((VALUE) == FLASH_TYPEPROGRAM_WORD)     || \
-#define IS_FLASH_TYPEPROGRAM(VALUE)  (((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \
+                                      ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD))  
-                                      ((VALUE) == FLASH_TYPEPROGRAM_WORD)     || \
+
-                                      ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD))  
+#if   defined(FLASH_ACR_LATENCY)
-
+#define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \
-#if   defined(FLASH_ACR_LATENCY)
+                                       ((__LATENCY__) == FLASH_LATENCY_1) || \
-#define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \
+                                       ((__LATENCY__) == FLASH_LATENCY_2))
-                                       ((__LATENCY__) == FLASH_LATENCY_1) || \
+
-                                       ((__LATENCY__) == FLASH_LATENCY_2))
+#else
-
+#define IS_FLASH_LATENCY(__LATENCY__)   ((__LATENCY__) == FLASH_LATENCY_0)
-#else
+#endif /* FLASH_ACR_LATENCY */
-#define IS_FLASH_LATENCY(__LATENCY__)   ((__LATENCY__) == FLASH_LATENCY_0)
+/**
-#endif /* FLASH_ACR_LATENCY */
+  * @}
-/**
+  */  
-  * @}
+
-  */  
+/* Exported types ------------------------------------------------------------*/ 
-
+/** @defgroup FLASH_Exported_Types FLASH Exported Types
-/* Exported types ------------------------------------------------------------*/ 
+  * @{
-/** @defgroup FLASH_Exported_Types FLASH Exported Types
+  */  
-  * @{
+
-  */  
+/**
-
+  * @brief  FLASH Procedure structure definition
-/**
+  */
-  * @brief  FLASH Procedure structure definition
+typedef enum 
-  */
+{
-typedef enum 
+  FLASH_PROC_NONE              = 0U, 
-{
+  FLASH_PROC_PAGEERASE         = 1U,
-  FLASH_PROC_NONE              = 0U, 
+  FLASH_PROC_MASSERASE         = 2U,
-  FLASH_PROC_PAGEERASE         = 1U,
+  FLASH_PROC_PROGRAMHALFWORD   = 3U,
-  FLASH_PROC_MASSERASE         = 2U,
+  FLASH_PROC_PROGRAMWORD       = 4U,
-  FLASH_PROC_PROGRAMHALFWORD   = 3U,
+  FLASH_PROC_PROGRAMDOUBLEWORD = 5U
-  FLASH_PROC_PROGRAMWORD       = 4U,
+} FLASH_ProcedureTypeDef;
-  FLASH_PROC_PROGRAMDOUBLEWORD = 5U
+
-} FLASH_ProcedureTypeDef;
+/** 
-
+  * @brief  FLASH handle Structure definition  
-/** 
+  */
-  * @brief  FLASH handle Structure definition  
+typedef struct
-  */
+{
-typedef struct
+  __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */
-{
+  
-  __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */
+  __IO uint32_t               DataRemaining;    /*!< Internal variable to save the remaining pages to erase or half-word to program in IT context */
-  
+
-  __IO uint32_t               DataRemaining;    /*!< Internal variable to save the remaining pages to erase or half-word to program in IT context */
+  __IO uint32_t               Address;          /*!< Internal variable to save address selected for program or erase */
-
+
-  __IO uint32_t               Address;          /*!< Internal variable to save address selected for program or erase */
+  __IO uint64_t               Data;             /*!< Internal variable to save data to be programmed */
-
+
-  __IO uint64_t               Data;             /*!< Internal variable to save data to be programmed */
+  HAL_LockTypeDef             Lock;             /*!< FLASH locking object                */
-
+
-  HAL_LockTypeDef             Lock;             /*!< FLASH locking object                */
+  __IO uint32_t               ErrorCode;        /*!< FLASH error code                    
-
+                                                     This parameter can be a value of @ref FLASH_Error_Codes  */
-  __IO uint32_t               ErrorCode;        /*!< FLASH error code                    
+} FLASH_ProcessTypeDef;
-                                                     This parameter can be a value of @ref FLASH_Error_Codes  */
+
-} FLASH_ProcessTypeDef;
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+/* Exported constants --------------------------------------------------------*/
-
+/** @defgroup FLASH_Exported_Constants FLASH Exported Constants
-/* Exported constants --------------------------------------------------------*/
+  * @{
-/** @defgroup FLASH_Exported_Constants FLASH Exported Constants
+  */  
-  * @{
+
-  */  
+/** @defgroup FLASH_Error_Codes FLASH Error Codes
-
+  * @{
-/** @defgroup FLASH_Error_Codes FLASH Error Codes
+  */
-  * @{
+
-  */
+#define HAL_FLASH_ERROR_NONE      0x00U  /*!< No error */
-
+#define HAL_FLASH_ERROR_PROG      0x01U  /*!< Programming error */
-#define HAL_FLASH_ERROR_NONE      0x00U  /*!< No error */
+#define HAL_FLASH_ERROR_WRP       0x02U  /*!< Write protection error */
-#define HAL_FLASH_ERROR_PROG      0x01U  /*!< Programming error */
+#define HAL_FLASH_ERROR_OPTV      0x04U  /*!< Option validity error */
-#define HAL_FLASH_ERROR_WRP       0x02U  /*!< Write protection error */
+
-#define HAL_FLASH_ERROR_OPTV      0x04U  /*!< Option validity error */
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+/** @defgroup FLASH_Type_Program FLASH Type Program
-
+  * @{
-/** @defgroup FLASH_Type_Program FLASH Type Program
+  */ 
-  * @{
+#define FLASH_TYPEPROGRAM_HALFWORD             0x01U  /*!<Program a half-word (16-bit) at a specified address.*/
-  */ 
+#define FLASH_TYPEPROGRAM_WORD                 0x02U  /*!<Program a word (32-bit) at a specified address.*/
-#define FLASH_TYPEPROGRAM_HALFWORD             0x01U  /*!<Program a half-word (16-bit) at a specified address.*/
+#define FLASH_TYPEPROGRAM_DOUBLEWORD           0x03U  /*!<Program a double word (64-bit) at a specified address*/
-#define FLASH_TYPEPROGRAM_WORD                 0x02U  /*!<Program a word (32-bit) at a specified address.*/
+
-#define FLASH_TYPEPROGRAM_DOUBLEWORD           0x03U  /*!<Program a double word (64-bit) at a specified address*/
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+#if   defined(FLASH_ACR_LATENCY)
-
+/** @defgroup FLASH_Latency FLASH Latency
-#if   defined(FLASH_ACR_LATENCY)
+  * @{
-/** @defgroup FLASH_Latency FLASH Latency
+  */
-  * @{
+#define FLASH_LATENCY_0            0x00000000U               /*!< FLASH Zero Latency cycle */
-  */
+#define FLASH_LATENCY_1            FLASH_ACR_LATENCY_0       /*!< FLASH One Latency cycle */
-#define FLASH_LATENCY_0            0x00000000U               /*!< FLASH Zero Latency cycle */
+#define FLASH_LATENCY_2            FLASH_ACR_LATENCY_1       /*!< FLASH Two Latency cycles */
-#define FLASH_LATENCY_1            FLASH_ACR_LATENCY_0       /*!< FLASH One Latency cycle */
+
-#define FLASH_LATENCY_2            FLASH_ACR_LATENCY_1       /*!< FLASH Two Latency cycles */
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+#else
-
+/** @defgroup FLASH_Latency FLASH Latency
-#else
+  * @{
-/** @defgroup FLASH_Latency FLASH Latency
+  */
-  * @{
+#define FLASH_LATENCY_0            0x00000000U    /*!< FLASH Zero Latency cycle */
-  */
+
-#define FLASH_LATENCY_0            0x00000000U    /*!< FLASH Zero Latency cycle */
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+#endif /* FLASH_ACR_LATENCY */
-
+/**
-#endif /* FLASH_ACR_LATENCY */
+  * @}
-/**
+  */  
-  * @}
+  
-  */  
+/* Exported macro ------------------------------------------------------------*/
-  
+
-/* Exported macro ------------------------------------------------------------*/
+/** @defgroup FLASH_Exported_Macros FLASH Exported Macros
-
+ *  @brief macros to control FLASH features 
-/** @defgroup FLASH_Exported_Macros FLASH Exported Macros
+ *  @{
- *  @brief macros to control FLASH features 
+ */
- *  @{
+ 
- */
+/** @defgroup FLASH_Half_Cycle FLASH Half Cycle
- 
+ *  @brief macros to handle FLASH half cycle
-/** @defgroup FLASH_Half_Cycle FLASH Half Cycle
+ * @{
- *  @brief macros to handle FLASH half cycle
+ */
- * @{
+
- */
+/**
-
+  * @brief  Enable the FLASH half cycle access.
-/**
+  * @note   half cycle access can only be used with a low-frequency clock of less than
-  * @brief  Enable the FLASH half cycle access.
+            8 MHz that can be obtained with the use of HSI or HSE but not of PLL.
-  * @note   half cycle access can only be used with a low-frequency clock of less than
+  * @retval None
-            8 MHz that can be obtained with the use of HSI or HSE but not of PLL.
+  */
-  * @retval None
+#define __HAL_FLASH_HALF_CYCLE_ACCESS_ENABLE()  (FLASH->ACR |= FLASH_ACR_HLFCYA)
-  */
+
-#define __HAL_FLASH_HALF_CYCLE_ACCESS_ENABLE()  (FLASH->ACR |= FLASH_ACR_HLFCYA)
+/**
-
+  * @brief  Disable the FLASH half cycle access.
-/**
+  * @note   half cycle access can only be used with a low-frequency clock of less than
-  * @brief  Disable the FLASH half cycle access.
+            8 MHz that can be obtained with the use of HSI or HSE but not of PLL.
-  * @note   half cycle access can only be used with a low-frequency clock of less than
+  * @retval None
-            8 MHz that can be obtained with the use of HSI or HSE but not of PLL.
+  */
-  * @retval None
+#define __HAL_FLASH_HALF_CYCLE_ACCESS_DISABLE() (FLASH->ACR &= (~FLASH_ACR_HLFCYA))
-  */
+
-#define __HAL_FLASH_HALF_CYCLE_ACCESS_DISABLE() (FLASH->ACR &= (~FLASH_ACR_HLFCYA))
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+#if defined(FLASH_ACR_LATENCY)
-
+/** @defgroup FLASH_EM_Latency FLASH Latency
-#if defined(FLASH_ACR_LATENCY)
+ *  @brief macros to handle FLASH Latency
-/** @defgroup FLASH_EM_Latency FLASH Latency
+ * @{
- *  @brief macros to handle FLASH Latency
+ */ 
- * @{
+  
- */ 
+/**
-  
+  * @brief  Set the FLASH Latency.
-/**
+  * @param  __LATENCY__ FLASH Latency                   
-  * @brief  Set the FLASH Latency.
+  *         The value of this parameter depend on device used within the same series
-  * @param  __LATENCY__ FLASH Latency                   
+  * @retval None
-  *         The value of this parameter depend on device used within the same series
+  */ 
-  * @retval None
+#define __HAL_FLASH_SET_LATENCY(__LATENCY__)    (FLASH->ACR = (FLASH->ACR&(~FLASH_ACR_LATENCY)) | (__LATENCY__))
-  */ 
+
-#define __HAL_FLASH_SET_LATENCY(__LATENCY__)    (FLASH->ACR = (FLASH->ACR&(~FLASH_ACR_LATENCY)) | (__LATENCY__))
+
-
+/**
-
+  * @brief  Get the FLASH Latency.
-/**
+  * @retval FLASH Latency                   
-  * @brief  Get the FLASH Latency.
+  *         The value of this parameter depend on device used within the same series
-  * @retval FLASH Latency                   
+  */ 
-  *         The value of this parameter depend on device used within the same series
+#define __HAL_FLASH_GET_LATENCY()     (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
-  */ 
+
-#define __HAL_FLASH_GET_LATENCY()     (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+#endif /* FLASH_ACR_LATENCY */
-
+/** @defgroup FLASH_Prefetch FLASH Prefetch
-#endif /* FLASH_ACR_LATENCY */
+ *  @brief macros to handle FLASH Prefetch buffer
-/** @defgroup FLASH_Prefetch FLASH Prefetch
+ * @{
- *  @brief macros to handle FLASH Prefetch buffer
+ */   
- * @{
+/**
- */   
+  * @brief  Enable the FLASH prefetch buffer.
-/**
+  * @retval None
-  * @brief  Enable the FLASH prefetch buffer.
+  */ 
-  * @retval None
+#define __HAL_FLASH_PREFETCH_BUFFER_ENABLE()    (FLASH->ACR |= FLASH_ACR_PRFTBE)
-  */ 
+
-#define __HAL_FLASH_PREFETCH_BUFFER_ENABLE()    (FLASH->ACR |= FLASH_ACR_PRFTBE)
+/**
-
+  * @brief  Disable the FLASH prefetch buffer.
-/**
+  * @retval None
-  * @brief  Disable the FLASH prefetch buffer.
+  */
-  * @retval None
+#define __HAL_FLASH_PREFETCH_BUFFER_DISABLE()   (FLASH->ACR &= (~FLASH_ACR_PRFTBE))
-  */
+
-#define __HAL_FLASH_PREFETCH_BUFFER_DISABLE()   (FLASH->ACR &= (~FLASH_ACR_PRFTBE))
+/**
-
+  * @}
-/**
+  */
-  * @}
+  
-  */
+/**
-  
+  * @}
-/**
+  */ 
-  * @}
+
-  */ 
+/* Include FLASH HAL Extended module */
-
+#include "stm32f1xx_hal_flash_ex.h"  
-/* Include FLASH HAL Extended module */
+
-#include "stm32f1xx_hal_flash_ex.h"  
+/* Exported functions --------------------------------------------------------*/
-
+/** @addtogroup FLASH_Exported_Functions
-/* Exported functions --------------------------------------------------------*/
+  * @{
-/** @addtogroup FLASH_Exported_Functions
+  */
-  * @{
+  
-  */
+/** @addtogroup FLASH_Exported_Functions_Group1
-  
+  * @{
-/** @addtogroup FLASH_Exported_Functions_Group1
+  */
-  * @{
+/* IO operation functions *****************************************************/
-  */
+HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
-/* IO operation functions *****************************************************/
+HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
-HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
+
-HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
+/* FLASH IRQ handler function */
-
+void       HAL_FLASH_IRQHandler(void);
-/* FLASH IRQ handler function */
+/* Callbacks in non blocking modes */ 
-void       HAL_FLASH_IRQHandler(void);
+void       HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
-/* Callbacks in non blocking modes */ 
+void       HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
-void       HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
+
-void       HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+/** @addtogroup FLASH_Exported_Functions_Group2
-
+  * @{
-/** @addtogroup FLASH_Exported_Functions_Group2
+  */
-  * @{
+/* Peripheral Control functions ***********************************************/
-  */
+HAL_StatusTypeDef HAL_FLASH_Unlock(void);
-/* Peripheral Control functions ***********************************************/
+HAL_StatusTypeDef HAL_FLASH_Lock(void);
-HAL_StatusTypeDef HAL_FLASH_Unlock(void);
+HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
-HAL_StatusTypeDef HAL_FLASH_Lock(void);
+HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
-HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
+void HAL_FLASH_OB_Launch(void);
-HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
+
-void HAL_FLASH_OB_Launch(void);
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+/** @addtogroup FLASH_Exported_Functions_Group3
-
+  * @{
-/** @addtogroup FLASH_Exported_Functions_Group3
+  */
-  * @{
+/* Peripheral State and Error functions ***************************************/
-  */
+uint32_t HAL_FLASH_GetError(void);
-/* Peripheral State and Error functions ***************************************/
+
-uint32_t HAL_FLASH_GetError(void);
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+/* Private function -------------------------------------------------*/
-
+/** @addtogroup FLASH_Private_Functions
-/* Private function -------------------------------------------------*/
+ * @{
-/** @addtogroup FLASH_Private_Functions
+ */
- * @{
+HAL_StatusTypeDef       FLASH_WaitForLastOperation(uint32_t Timeout);
- */
+#if defined(FLASH_BANK2_END)
-HAL_StatusTypeDef       FLASH_WaitForLastOperation(uint32_t Timeout);
+HAL_StatusTypeDef       FLASH_WaitForLastOperationBank2(uint32_t Timeout);
-#if defined(FLASH_BANK2_END)
+#endif /* FLASH_BANK2_END */
-HAL_StatusTypeDef       FLASH_WaitForLastOperationBank2(uint32_t Timeout);
+
-#endif /* FLASH_BANK2_END */
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+/**
-
+  * @}
-/**
+  */
-  * @}
+
-  */
+#ifdef __cplusplus
-
+}
-#ifdef __cplusplus
+#endif
-}
+
-#endif
+#endif /* __STM32F1xx_HAL_FLASH_H */
-
+
-#endif /* __STM32F1xx_HAL_FLASH_H */
+
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h

@@ -6,13 +6,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
   */
@@ -305,4 +304,3 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
 
 #endif /* STM32F1xx_HAL_GPIO_H */
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h

@@ -6,13 +6,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
   */
@@ -891,4 +890,3 @@ void HAL_GPIOEx_DisableEventout(void);
 
 #endif /* STM32F1xx_HAL_GPIO_EX_H */
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h

@@ -1,388 +1,385 @@
-/**
+/**
-  ******************************************************************************
+  ******************************************************************************
-  * @file    stm32f1xx_hal_pwr.h
+  * @file    stm32f1xx_hal_pwr.h
-  * @author  MCD Application Team
+  * @author  MCD Application Team
-  * @brief   Header file of PWR HAL module.
+  * @brief   Header file of PWR HAL module.
-  ******************************************************************************
+  ******************************************************************************
-  * @attention
+  * @attention
-  *
+  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
-  *
+  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+
-
+/* Define to prevent recursive inclusion -------------------------------------*/
-/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_PWR_H
-#ifndef __STM32F1xx_HAL_PWR_H
+#define __STM32F1xx_HAL_PWR_H
-#define __STM32F1xx_HAL_PWR_H
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+ extern "C" {
- extern "C" {
+#endif
-#endif
+
-
+/* Includes ------------------------------------------------------------------*/
-/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"
-#include "stm32f1xx_hal_def.h"
+
-
+/** @addtogroup STM32F1xx_HAL_Driver
-/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
-  * @{
+  */
-  */
+
-
+/** @addtogroup PWR
-/** @addtogroup PWR
+  * @{
-  * @{
+  */
-  */
+
-
+/* Exported types ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
+
-
+/** @defgroup PWR_Exported_Types PWR Exported Types
-/** @defgroup PWR_Exported_Types PWR Exported Types
+  * @{
-  * @{
+  */ 
-  */ 
+
-
+/**
-/**
+  * @brief  PWR PVD configuration structure definition
-  * @brief  PWR PVD configuration structure definition
+  */
-  */
+typedef struct
-typedef struct
+{
-{
+  uint32_t PVDLevel;   /*!< PVDLevel: Specifies the PVD detection level.
-  uint32_t PVDLevel;   /*!< PVDLevel: Specifies the PVD detection level.
+                            This parameter can be a value of @ref PWR_PVD_detection_level */
-                            This parameter can be a value of @ref PWR_PVD_detection_level */
+
-
+  uint32_t Mode;      /*!< Mode: Specifies the operating mode for the selected pins.
-  uint32_t Mode;      /*!< Mode: Specifies the operating mode for the selected pins.
+                           This parameter can be a value of @ref PWR_PVD_Mode */
-                           This parameter can be a value of @ref PWR_PVD_Mode */
+}PWR_PVDTypeDef;
-}PWR_PVDTypeDef;
+
-
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+
-
+/* Internal constants --------------------------------------------------------*/
-/* Internal constants --------------------------------------------------------*/
+
-
+/** @addtogroup PWR_Private_Constants
-/** @addtogroup PWR_Private_Constants
+  * @{
-  * @{
+  */ 
-  */ 
+
-
+#define PWR_EXTI_LINE_PVD  ((uint32_t)0x00010000)  /*!< External interrupt line 16 Connected to the PVD EXTI Line */
-#define PWR_EXTI_LINE_PVD  ((uint32_t)0x00010000)  /*!< External interrupt line 16 Connected to the PVD EXTI Line */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+ 
- 
+/* Exported constants --------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
+
-
+/** @defgroup PWR_Exported_Constants PWR Exported Constants
-/** @defgroup PWR_Exported_Constants PWR Exported Constants
+  * @{
-  * @{
+  */ 
-  */ 
+
-
+/** @defgroup PWR_PVD_detection_level PWR PVD detection level
-/** @defgroup PWR_PVD_detection_level PWR PVD detection level
+  * @{
-  * @{
+  */
-  */
+#define PWR_PVDLEVEL_0                  PWR_CR_PLS_2V2
-#define PWR_PVDLEVEL_0                  PWR_CR_PLS_2V2
+#define PWR_PVDLEVEL_1                  PWR_CR_PLS_2V3
-#define PWR_PVDLEVEL_1                  PWR_CR_PLS_2V3
+#define PWR_PVDLEVEL_2                  PWR_CR_PLS_2V4
-#define PWR_PVDLEVEL_2                  PWR_CR_PLS_2V4
+#define PWR_PVDLEVEL_3                  PWR_CR_PLS_2V5
-#define PWR_PVDLEVEL_3                  PWR_CR_PLS_2V5
+#define PWR_PVDLEVEL_4                  PWR_CR_PLS_2V6
-#define PWR_PVDLEVEL_4                  PWR_CR_PLS_2V6
+#define PWR_PVDLEVEL_5                  PWR_CR_PLS_2V7
-#define PWR_PVDLEVEL_5                  PWR_CR_PLS_2V7
+#define PWR_PVDLEVEL_6                  PWR_CR_PLS_2V8
-#define PWR_PVDLEVEL_6                  PWR_CR_PLS_2V8
+#define PWR_PVDLEVEL_7                  PWR_CR_PLS_2V9 
-#define PWR_PVDLEVEL_7                  PWR_CR_PLS_2V9 
+                                                          
-                                                          
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup PWR_PVD_Mode PWR PVD Mode
-/** @defgroup PWR_PVD_Mode PWR PVD Mode
+  * @{
-  * @{
+  */
-  */
+#define PWR_PVD_MODE_NORMAL                 0x00000000U   /*!< basic mode is used */
-#define PWR_PVD_MODE_NORMAL                 0x00000000U   /*!< basic mode is used */
+#define PWR_PVD_MODE_IT_RISING              0x00010001U   /*!< External Interrupt Mode with Rising edge trigger detection */
-#define PWR_PVD_MODE_IT_RISING              0x00010001U   /*!< External Interrupt Mode with Rising edge trigger detection */
+#define PWR_PVD_MODE_IT_FALLING             0x00010002U   /*!< External Interrupt Mode with Falling edge trigger detection */
-#define PWR_PVD_MODE_IT_FALLING             0x00010002U   /*!< External Interrupt Mode with Falling edge trigger detection */
+#define PWR_PVD_MODE_IT_RISING_FALLING      0x00010003U   /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
-#define PWR_PVD_MODE_IT_RISING_FALLING      0x00010003U   /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
+#define PWR_PVD_MODE_EVENT_RISING           0x00020001U   /*!< Event Mode with Rising edge trigger detection */
-#define PWR_PVD_MODE_EVENT_RISING           0x00020001U   /*!< Event Mode with Rising edge trigger detection */
+#define PWR_PVD_MODE_EVENT_FALLING          0x00020002U   /*!< Event Mode with Falling edge trigger detection */
-#define PWR_PVD_MODE_EVENT_FALLING          0x00020002U   /*!< Event Mode with Falling edge trigger detection */
+#define PWR_PVD_MODE_EVENT_RISING_FALLING   0x00020003U   /*!< Event Mode with Rising/Falling edge trigger detection */
-#define PWR_PVD_MODE_EVENT_RISING_FALLING   0x00020003U   /*!< Event Mode with Rising/Falling edge trigger detection */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+
-
+/** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
-/** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
+  * @{
-  * @{
+  */
-  */
+
-
+#define PWR_WAKEUP_PIN1                 PWR_CSR_EWUP
-#define PWR_WAKEUP_PIN1                 PWR_CSR_EWUP
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
-/** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
+  * @{
-  * @{
+  */
-  */
+#define PWR_MAINREGULATOR_ON                        0x00000000U
-#define PWR_MAINREGULATOR_ON                        0x00000000U
+#define PWR_LOWPOWERREGULATOR_ON                    PWR_CR_LPDS
-#define PWR_LOWPOWERREGULATOR_ON                    PWR_CR_LPDS
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
-/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
+  * @{
-  * @{
+  */
-  */
+#define PWR_SLEEPENTRY_WFI              ((uint8_t)0x01)
-#define PWR_SLEEPENTRY_WFI              ((uint8_t)0x01)
+#define PWR_SLEEPENTRY_WFE              ((uint8_t)0x02)
-#define PWR_SLEEPENTRY_WFE              ((uint8_t)0x02)
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
-/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
+  * @{
-  * @{
+  */
-  */
+#define PWR_STOPENTRY_WFI               ((uint8_t)0x01)
-#define PWR_STOPENTRY_WFI               ((uint8_t)0x01)
+#define PWR_STOPENTRY_WFE               ((uint8_t)0x02)
-#define PWR_STOPENTRY_WFE               ((uint8_t)0x02)
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @defgroup PWR_Flag PWR Flag
-/** @defgroup PWR_Flag PWR Flag
+  * @{
-  * @{
+  */
-  */
+#define PWR_FLAG_WU                     PWR_CSR_WUF
-#define PWR_FLAG_WU                     PWR_CSR_WUF
+#define PWR_FLAG_SB                     PWR_CSR_SBF
-#define PWR_FLAG_SB                     PWR_CSR_SBF
+#define PWR_FLAG_PVDO                   PWR_CSR_PVDO
-#define PWR_FLAG_PVDO                   PWR_CSR_PVDO
+
-
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Exported macro ------------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
+/** @defgroup PWR_Exported_Macros PWR Exported Macros
-/** @defgroup PWR_Exported_Macros PWR Exported Macros
+  * @{
-  * @{
+  */
-  */
+
-
+/** @brief  Check PWR flag is set or not.
-/** @brief  Check PWR flag is set or not.
+  * @param  __FLAG__: specifies the flag to check.
-  * @param  __FLAG__: specifies the flag to check.
+  *           This parameter can be one of the following values:
-  *           This parameter can be one of the following values:
+  *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
-  *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
+  *                  was received from the WKUP pin or from the RTC alarm
-  *                  was received from the WKUP pin or from the RTC alarm
+  *                  An additional wakeup event is detected if the WKUP pin is enabled
-  *                  An additional wakeup event is detected if the WKUP pin is enabled
+  *                  (by setting the EWUP bit) when the WKUP pin level is already high.
-  *                  (by setting the EWUP bit) when the WKUP pin level is already high.
+  *            @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
-  *            @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
+  *                  resumed from StandBy mode.
-  *                  resumed from StandBy mode.
+  *            @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
-  *            @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
+  *                  by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
-  *                  by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
+  *                  For this reason, this bit is equal to 0 after Standby or reset
-  *                  For this reason, this bit is equal to 0 after Standby or reset
+  *                  until the PVDE bit is set.
-  *                  until the PVDE bit is set.
+  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
+  */
-  */
+#define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
-#define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
+
-
+/** @brief  Clear the PWR's pending flags.
-/** @brief  Clear the PWR's pending flags.
+  * @param  __FLAG__: specifies the flag to clear.
-  * @param  __FLAG__: specifies the flag to clear.
+  *          This parameter can be one of the following values:
-  *          This parameter can be one of the following values:
+  *            @arg PWR_FLAG_WU: Wake Up flag
-  *            @arg PWR_FLAG_WU: Wake Up flag
+  *            @arg PWR_FLAG_SB: StandBy flag
-  *            @arg PWR_FLAG_SB: StandBy flag
+  */
-  */
+#define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2))
-#define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2))
+
-
+/**
-/**
+  * @brief Enable interrupt on PVD Exti Line 16.
-  * @brief Enable interrupt on PVD Exti Line 16.
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_ENABLE_IT()      SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
-#define __HAL_PWR_PVD_EXTI_ENABLE_IT()      SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
+
-
+/**
-/**
+  * @brief Disable interrupt on PVD Exti Line 16. 
-  * @brief Disable interrupt on PVD Exti Line 16. 
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_DISABLE_IT()     CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
-#define __HAL_PWR_PVD_EXTI_DISABLE_IT()     CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
+
-
+/**
-/**
+  * @brief Enable event on PVD Exti Line 16.
-  * @brief Enable event on PVD Exti Line 16.
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT()   SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
-#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT()   SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
+
-
+/**
-/**
+  * @brief Disable event on PVD Exti Line 16.
-  * @brief Disable event on PVD Exti Line 16.
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT()  CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
-#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT()  CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
+
-
+
-
+/**
-/**
+  * @brief  PVD EXTI line configuration: set falling edge trigger.  
-  * @brief  PVD EXTI line configuration: set falling edge trigger.  
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE()  SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
-#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE()  SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
+
-
+
-
+/**
-/**
+  * @brief Disable the PVD Extended Interrupt Falling Trigger.
-  * @brief Disable the PVD Extended Interrupt Falling Trigger.
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()  CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
-#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()  CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
+
-
+
-
+/**
-/**
+  * @brief  PVD EXTI line configuration: set rising edge trigger.
-  * @brief  PVD EXTI line configuration: set rising edge trigger.
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE()   SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
-#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE()   SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
+
-
+/**
-/**
+  * @brief Disable the PVD Extended Interrupt Rising Trigger.
-  * @brief Disable the PVD Extended Interrupt Rising Trigger.
+  * This parameter can be:
-  * This parameter can be:
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE()  CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
-#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE()  CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
+
-
+/**
-/**
+  * @brief  PVD EXTI line configuration: set rising & falling edge trigger.
-  * @brief  PVD EXTI line configuration: set rising & falling edge trigger.
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE()   __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
-#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE()   __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
+
-
+/**
-/**
+  * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
-  * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
+  * This parameter can be:
-  * This parameter can be:
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE()  __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
-#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE()  __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
+
-
+
-
+
-
+/**
-/**
+  * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
-  * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
+  * @retval EXTI PVD Line Status.
-  * @retval EXTI PVD Line Status.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_GET_FLAG()       (EXTI->PR & (PWR_EXTI_LINE_PVD))
-#define __HAL_PWR_PVD_EXTI_GET_FLAG()       (EXTI->PR & (PWR_EXTI_LINE_PVD))
+
-
+/**
-/**
+  * @brief Clear the PVD EXTI flag.
-  * @brief Clear the PVD EXTI flag.
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG()     (EXTI->PR = (PWR_EXTI_LINE_PVD))
-#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG()     (EXTI->PR = (PWR_EXTI_LINE_PVD))
+
-
+/**
-/**
+  * @brief Generate a Software interrupt on selected EXTI line.
-  * @brief Generate a Software interrupt on selected EXTI line.
+  * @retval None.
-  * @retval None.
+  */
-  */
+#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT()  SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
-#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT()  SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/* Private macro -------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
+/** @defgroup PWR_Private_Macros PWR Private Macros
-/** @defgroup PWR_Private_Macros PWR Private Macros
+  * @{
-  * @{
+  */
-  */
+#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
-#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
+                                 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
-                                 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
+                                 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
-                                 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
+                                 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
-                                 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
+
-
+
-
+#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
-#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
+                              ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
-                              ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
+                              ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
-                              ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
+                              ((MODE) == PWR_PVD_MODE_NORMAL)) 
-                              ((MODE) == PWR_PVD_MODE_NORMAL)) 
+
-
+#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1))
-#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1))
+
-
+#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
-#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
+                                     ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
-                                     ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
+
-
+#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
-#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
+
-
+#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
-#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+
-
+
-
+/* Exported functions --------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
+
-
+/** @addtogroup PWR_Exported_Functions PWR Exported Functions
-/** @addtogroup PWR_Exported_Functions PWR Exported Functions
+  * @{
-  * @{
+  */
-  */
+  
-  
+/** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 
-/** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 
+  * @{
-  * @{
+  */
-  */
+
-
+/* Initialization and de-initialization functions *******************************/
-/* Initialization and de-initialization functions *******************************/
+void HAL_PWR_DeInit(void);
-void HAL_PWR_DeInit(void);
+void HAL_PWR_EnableBkUpAccess(void);
-void HAL_PWR_EnableBkUpAccess(void);
+void HAL_PWR_DisableBkUpAccess(void);
-void HAL_PWR_DisableBkUpAccess(void);
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 
-/** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 
+  * @{
-  * @{
+  */
-  */
+
-
+/* Peripheral Control functions  ************************************************/
-/* Peripheral Control functions  ************************************************/
+void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
-void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
+/* #define HAL_PWR_ConfigPVD 12*/
-/* #define HAL_PWR_ConfigPVD 12*/
+void HAL_PWR_EnablePVD(void);
-void HAL_PWR_EnablePVD(void);
+void HAL_PWR_DisablePVD(void);
-void HAL_PWR_DisablePVD(void);
+
-
+/* WakeUp pins configuration functions ****************************************/
-/* WakeUp pins configuration functions ****************************************/
+void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
-void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
+void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
-void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
+
-
+/* Low Power modes configuration functions ************************************/
-/* Low Power modes configuration functions ************************************/
+void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
-void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
+void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
-void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
+void HAL_PWR_EnterSTANDBYMode(void);
-void HAL_PWR_EnterSTANDBYMode(void);
+
-
+void HAL_PWR_EnableSleepOnExit(void);
-void HAL_PWR_EnableSleepOnExit(void);
+void HAL_PWR_DisableSleepOnExit(void);
-void HAL_PWR_DisableSleepOnExit(void);
+void HAL_PWR_EnableSEVOnPend(void);
-void HAL_PWR_EnableSEVOnPend(void);
+void HAL_PWR_DisableSEVOnPend(void);
-void HAL_PWR_DisableSEVOnPend(void);
+
-
+
-
+
-
+void HAL_PWR_PVD_IRQHandler(void);
-void HAL_PWR_PVD_IRQHandler(void);
+void HAL_PWR_PVDCallback(void);
-void HAL_PWR_PVDCallback(void);
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+
-
+#ifdef __cplusplus
-#ifdef __cplusplus
+}
-}
+#endif
-#endif
+
-
+
-
+#endif /* __STM32F1xx_HAL_PWR_H */
-#endif /* __STM32F1xx_HAL_PWR_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/