GbTModuleSW30Web.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e8 08008000 08008000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000e338 080081e8 080081e8 000011e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000bc4 08016520 08016520 0000f520 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 080170e4 080170e4 0001124c 2**0 CONTENTS 4 .ARM 00000008 080170e4 080170e4 000100e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 080170ec 080170ec 0001124c 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 080170ec 080170ec 000100ec 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .fini_array 00000004 080170f0 080170f0 000100f0 2**2 CONTENTS, ALLOC, LOAD, DATA 8 .data 0000024c 20000000 080170f4 00011000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 00000f84 20000250 08017340 00011250 2**3 ALLOC 10 ._user_heap_stack 00000604 200011d4 08017340 000121d4 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 0001124c 2**0 CONTENTS, READONLY 12 .debug_info 0001c165 00000000 00000000 00011275 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 000058b6 00000000 00000000 0002d3da 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00001768 00000000 00000000 00032c90 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 000011ea 00000000 00000000 000343f8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 00026dee 00000000 00000000 000355e2 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 00022467 00000000 00000000 0005c3d0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000c976b 00000000 00000000 0007e837 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 00147fa2 2**0 CONTENTS, READONLY 20 .debug_frame 00006fb0 00000000 00000000 00147fe8 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 0000006e 00000000 00000000 0014ef98 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080081e8 <__do_global_dtors_aux>: 80081e8: b510 push {r4, lr} 80081ea: 4c05 ldr r4, [pc, #20] @ (8008200 <__do_global_dtors_aux+0x18>) 80081ec: 7823 ldrb r3, [r4, #0] 80081ee: b933 cbnz r3, 80081fe <__do_global_dtors_aux+0x16> 80081f0: 4b04 ldr r3, [pc, #16] @ (8008204 <__do_global_dtors_aux+0x1c>) 80081f2: b113 cbz r3, 80081fa <__do_global_dtors_aux+0x12> 80081f4: 4804 ldr r0, [pc, #16] @ (8008208 <__do_global_dtors_aux+0x20>) 80081f6: f3af 8000 nop.w 80081fa: 2301 movs r3, #1 80081fc: 7023 strb r3, [r4, #0] 80081fe: bd10 pop {r4, pc} 8008200: 20000250 .word 0x20000250 8008204: 00000000 .word 0x00000000 8008208: 08016508 .word 0x08016508 0800820c : 800820c: b508 push {r3, lr} 800820e: 4b03 ldr r3, [pc, #12] @ (800821c ) 8008210: b11b cbz r3, 800821a 8008212: 4903 ldr r1, [pc, #12] @ (8008220 ) 8008214: 4803 ldr r0, [pc, #12] @ (8008224 ) 8008216: f3af 8000 nop.w 800821a: bd08 pop {r3, pc} 800821c: 00000000 .word 0x00000000 8008220: 20000254 .word 0x20000254 8008224: 08016508 .word 0x08016508 08008228 : 8008228: 4603 mov r3, r0 800822a: f813 2b01 ldrb.w r2, [r3], #1 800822e: 2a00 cmp r2, #0 8008230: d1fb bne.n 800822a 8008232: 1a18 subs r0, r3, r0 8008234: 3801 subs r0, #1 8008236: 4770 bx lr 08008238 <__aeabi_drsub>: 8008238: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 800823c: e002 b.n 8008244 <__adddf3> 800823e: bf00 nop 08008240 <__aeabi_dsub>: 8008240: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 08008244 <__adddf3>: 8008244: b530 push {r4, r5, lr} 8008246: ea4f 0441 mov.w r4, r1, lsl #1 800824a: ea4f 0543 mov.w r5, r3, lsl #1 800824e: ea94 0f05 teq r4, r5 8008252: bf08 it eq 8008254: ea90 0f02 teqeq r0, r2 8008258: bf1f itttt ne 800825a: ea54 0c00 orrsne.w ip, r4, r0 800825e: ea55 0c02 orrsne.w ip, r5, r2 8008262: ea7f 5c64 mvnsne.w ip, r4, asr #21 8008266: ea7f 5c65 mvnsne.w ip, r5, asr #21 800826a: f000 80e2 beq.w 8008432 <__adddf3+0x1ee> 800826e: ea4f 5454 mov.w r4, r4, lsr #21 8008272: ebd4 5555 rsbs r5, r4, r5, lsr #21 8008276: bfb8 it lt 8008278: 426d neglt r5, r5 800827a: dd0c ble.n 8008296 <__adddf3+0x52> 800827c: 442c add r4, r5 800827e: ea80 0202 eor.w r2, r0, r2 8008282: ea81 0303 eor.w r3, r1, r3 8008286: ea82 0000 eor.w r0, r2, r0 800828a: ea83 0101 eor.w r1, r3, r1 800828e: ea80 0202 eor.w r2, r0, r2 8008292: ea81 0303 eor.w r3, r1, r3 8008296: 2d36 cmp r5, #54 @ 0x36 8008298: bf88 it hi 800829a: bd30 pophi {r4, r5, pc} 800829c: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 80082a0: ea4f 3101 mov.w r1, r1, lsl #12 80082a4: f44f 1c80 mov.w ip, #1048576 @ 0x100000 80082a8: ea4c 3111 orr.w r1, ip, r1, lsr #12 80082ac: d002 beq.n 80082b4 <__adddf3+0x70> 80082ae: 4240 negs r0, r0 80082b0: eb61 0141 sbc.w r1, r1, r1, lsl #1 80082b4: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 80082b8: ea4f 3303 mov.w r3, r3, lsl #12 80082bc: ea4c 3313 orr.w r3, ip, r3, lsr #12 80082c0: d002 beq.n 80082c8 <__adddf3+0x84> 80082c2: 4252 negs r2, r2 80082c4: eb63 0343 sbc.w r3, r3, r3, lsl #1 80082c8: ea94 0f05 teq r4, r5 80082cc: f000 80a7 beq.w 800841e <__adddf3+0x1da> 80082d0: f1a4 0401 sub.w r4, r4, #1 80082d4: f1d5 0e20 rsbs lr, r5, #32 80082d8: db0d blt.n 80082f6 <__adddf3+0xb2> 80082da: fa02 fc0e lsl.w ip, r2, lr 80082de: fa22 f205 lsr.w r2, r2, r5 80082e2: 1880 adds r0, r0, r2 80082e4: f141 0100 adc.w r1, r1, #0 80082e8: fa03 f20e lsl.w r2, r3, lr 80082ec: 1880 adds r0, r0, r2 80082ee: fa43 f305 asr.w r3, r3, r5 80082f2: 4159 adcs r1, r3 80082f4: e00e b.n 8008314 <__adddf3+0xd0> 80082f6: f1a5 0520 sub.w r5, r5, #32 80082fa: f10e 0e20 add.w lr, lr, #32 80082fe: 2a01 cmp r2, #1 8008300: fa03 fc0e lsl.w ip, r3, lr 8008304: bf28 it cs 8008306: f04c 0c02 orrcs.w ip, ip, #2 800830a: fa43 f305 asr.w r3, r3, r5 800830e: 18c0 adds r0, r0, r3 8008310: eb51 71e3 adcs.w r1, r1, r3, asr #31 8008314: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8008318: d507 bpl.n 800832a <__adddf3+0xe6> 800831a: f04f 0e00 mov.w lr, #0 800831e: f1dc 0c00 rsbs ip, ip, #0 8008322: eb7e 0000 sbcs.w r0, lr, r0 8008326: eb6e 0101 sbc.w r1, lr, r1 800832a: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 800832e: d31b bcc.n 8008368 <__adddf3+0x124> 8008330: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 8008334: d30c bcc.n 8008350 <__adddf3+0x10c> 8008336: 0849 lsrs r1, r1, #1 8008338: ea5f 0030 movs.w r0, r0, rrx 800833c: ea4f 0c3c mov.w ip, ip, rrx 8008340: f104 0401 add.w r4, r4, #1 8008344: ea4f 5244 mov.w r2, r4, lsl #21 8008348: f512 0f80 cmn.w r2, #4194304 @ 0x400000 800834c: f080 809a bcs.w 8008484 <__adddf3+0x240> 8008350: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8008354: bf08 it eq 8008356: ea5f 0c50 movseq.w ip, r0, lsr #1 800835a: f150 0000 adcs.w r0, r0, #0 800835e: eb41 5104 adc.w r1, r1, r4, lsl #20 8008362: ea41 0105 orr.w r1, r1, r5 8008366: bd30 pop {r4, r5, pc} 8008368: ea5f 0c4c movs.w ip, ip, lsl #1 800836c: 4140 adcs r0, r0 800836e: eb41 0101 adc.w r1, r1, r1 8008372: 3c01 subs r4, #1 8008374: bf28 it cs 8008376: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 800837a: d2e9 bcs.n 8008350 <__adddf3+0x10c> 800837c: f091 0f00 teq r1, #0 8008380: bf04 itt eq 8008382: 4601 moveq r1, r0 8008384: 2000 moveq r0, #0 8008386: fab1 f381 clz r3, r1 800838a: bf08 it eq 800838c: 3320 addeq r3, #32 800838e: f1a3 030b sub.w r3, r3, #11 8008392: f1b3 0220 subs.w r2, r3, #32 8008396: da0c bge.n 80083b2 <__adddf3+0x16e> 8008398: 320c adds r2, #12 800839a: dd08 ble.n 80083ae <__adddf3+0x16a> 800839c: f102 0c14 add.w ip, r2, #20 80083a0: f1c2 020c rsb r2, r2, #12 80083a4: fa01 f00c lsl.w r0, r1, ip 80083a8: fa21 f102 lsr.w r1, r1, r2 80083ac: e00c b.n 80083c8 <__adddf3+0x184> 80083ae: f102 0214 add.w r2, r2, #20 80083b2: bfd8 it le 80083b4: f1c2 0c20 rsble ip, r2, #32 80083b8: fa01 f102 lsl.w r1, r1, r2 80083bc: fa20 fc0c lsr.w ip, r0, ip 80083c0: bfdc itt le 80083c2: ea41 010c orrle.w r1, r1, ip 80083c6: 4090 lslle r0, r2 80083c8: 1ae4 subs r4, r4, r3 80083ca: bfa2 ittt ge 80083cc: eb01 5104 addge.w r1, r1, r4, lsl #20 80083d0: 4329 orrge r1, r5 80083d2: bd30 popge {r4, r5, pc} 80083d4: ea6f 0404 mvn.w r4, r4 80083d8: 3c1f subs r4, #31 80083da: da1c bge.n 8008416 <__adddf3+0x1d2> 80083dc: 340c adds r4, #12 80083de: dc0e bgt.n 80083fe <__adddf3+0x1ba> 80083e0: f104 0414 add.w r4, r4, #20 80083e4: f1c4 0220 rsb r2, r4, #32 80083e8: fa20 f004 lsr.w r0, r0, r4 80083ec: fa01 f302 lsl.w r3, r1, r2 80083f0: ea40 0003 orr.w r0, r0, r3 80083f4: fa21 f304 lsr.w r3, r1, r4 80083f8: ea45 0103 orr.w r1, r5, r3 80083fc: bd30 pop {r4, r5, pc} 80083fe: f1c4 040c rsb r4, r4, #12 8008402: f1c4 0220 rsb r2, r4, #32 8008406: fa20 f002 lsr.w r0, r0, r2 800840a: fa01 f304 lsl.w r3, r1, r4 800840e: ea40 0003 orr.w r0, r0, r3 8008412: 4629 mov r1, r5 8008414: bd30 pop {r4, r5, pc} 8008416: fa21 f004 lsr.w r0, r1, r4 800841a: 4629 mov r1, r5 800841c: bd30 pop {r4, r5, pc} 800841e: f094 0f00 teq r4, #0 8008422: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 8008426: bf06 itte eq 8008428: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 800842c: 3401 addeq r4, #1 800842e: 3d01 subne r5, #1 8008430: e74e b.n 80082d0 <__adddf3+0x8c> 8008432: ea7f 5c64 mvns.w ip, r4, asr #21 8008436: bf18 it ne 8008438: ea7f 5c65 mvnsne.w ip, r5, asr #21 800843c: d029 beq.n 8008492 <__adddf3+0x24e> 800843e: ea94 0f05 teq r4, r5 8008442: bf08 it eq 8008444: ea90 0f02 teqeq r0, r2 8008448: d005 beq.n 8008456 <__adddf3+0x212> 800844a: ea54 0c00 orrs.w ip, r4, r0 800844e: bf04 itt eq 8008450: 4619 moveq r1, r3 8008452: 4610 moveq r0, r2 8008454: bd30 pop {r4, r5, pc} 8008456: ea91 0f03 teq r1, r3 800845a: bf1e ittt ne 800845c: 2100 movne r1, #0 800845e: 2000 movne r0, #0 8008460: bd30 popne {r4, r5, pc} 8008462: ea5f 5c54 movs.w ip, r4, lsr #21 8008466: d105 bne.n 8008474 <__adddf3+0x230> 8008468: 0040 lsls r0, r0, #1 800846a: 4149 adcs r1, r1 800846c: bf28 it cs 800846e: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 8008472: bd30 pop {r4, r5, pc} 8008474: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 8008478: bf3c itt cc 800847a: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 800847e: bd30 popcc {r4, r5, pc} 8008480: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8008484: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 8008488: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 800848c: f04f 0000 mov.w r0, #0 8008490: bd30 pop {r4, r5, pc} 8008492: ea7f 5c64 mvns.w ip, r4, asr #21 8008496: bf1a itte ne 8008498: 4619 movne r1, r3 800849a: 4610 movne r0, r2 800849c: ea7f 5c65 mvnseq.w ip, r5, asr #21 80084a0: bf1c itt ne 80084a2: 460b movne r3, r1 80084a4: 4602 movne r2, r0 80084a6: ea50 3401 orrs.w r4, r0, r1, lsl #12 80084aa: bf06 itte eq 80084ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80084b0: ea91 0f03 teqeq r1, r3 80084b4: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 80084b8: bd30 pop {r4, r5, pc} 80084ba: bf00 nop 080084bc <__aeabi_ui2d>: 80084bc: f090 0f00 teq r0, #0 80084c0: bf04 itt eq 80084c2: 2100 moveq r1, #0 80084c4: 4770 bxeq lr 80084c6: b530 push {r4, r5, lr} 80084c8: f44f 6480 mov.w r4, #1024 @ 0x400 80084cc: f104 0432 add.w r4, r4, #50 @ 0x32 80084d0: f04f 0500 mov.w r5, #0 80084d4: f04f 0100 mov.w r1, #0 80084d8: e750 b.n 800837c <__adddf3+0x138> 80084da: bf00 nop 080084dc <__aeabi_i2d>: 80084dc: f090 0f00 teq r0, #0 80084e0: bf04 itt eq 80084e2: 2100 moveq r1, #0 80084e4: 4770 bxeq lr 80084e6: b530 push {r4, r5, lr} 80084e8: f44f 6480 mov.w r4, #1024 @ 0x400 80084ec: f104 0432 add.w r4, r4, #50 @ 0x32 80084f0: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 80084f4: bf48 it mi 80084f6: 4240 negmi r0, r0 80084f8: f04f 0100 mov.w r1, #0 80084fc: e73e b.n 800837c <__adddf3+0x138> 80084fe: bf00 nop 08008500 <__aeabi_f2d>: 8008500: 0042 lsls r2, r0, #1 8008502: ea4f 01e2 mov.w r1, r2, asr #3 8008506: ea4f 0131 mov.w r1, r1, rrx 800850a: ea4f 7002 mov.w r0, r2, lsl #28 800850e: bf1f itttt ne 8008510: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 8008514: f093 4f7f teqne r3, #4278190080 @ 0xff000000 8008518: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 800851c: 4770 bxne lr 800851e: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 8008522: bf08 it eq 8008524: 4770 bxeq lr 8008526: f093 4f7f teq r3, #4278190080 @ 0xff000000 800852a: bf04 itt eq 800852c: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 8008530: 4770 bxeq lr 8008532: b530 push {r4, r5, lr} 8008534: f44f 7460 mov.w r4, #896 @ 0x380 8008538: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 800853c: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 8008540: e71c b.n 800837c <__adddf3+0x138> 8008542: bf00 nop 08008544 <__aeabi_ul2d>: 8008544: ea50 0201 orrs.w r2, r0, r1 8008548: bf08 it eq 800854a: 4770 bxeq lr 800854c: b530 push {r4, r5, lr} 800854e: f04f 0500 mov.w r5, #0 8008552: e00a b.n 800856a <__aeabi_l2d+0x16> 08008554 <__aeabi_l2d>: 8008554: ea50 0201 orrs.w r2, r0, r1 8008558: bf08 it eq 800855a: 4770 bxeq lr 800855c: b530 push {r4, r5, lr} 800855e: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 8008562: d502 bpl.n 800856a <__aeabi_l2d+0x16> 8008564: 4240 negs r0, r0 8008566: eb61 0141 sbc.w r1, r1, r1, lsl #1 800856a: f44f 6480 mov.w r4, #1024 @ 0x400 800856e: f104 0432 add.w r4, r4, #50 @ 0x32 8008572: ea5f 5c91 movs.w ip, r1, lsr #22 8008576: f43f aed8 beq.w 800832a <__adddf3+0xe6> 800857a: f04f 0203 mov.w r2, #3 800857e: ea5f 0cdc movs.w ip, ip, lsr #3 8008582: bf18 it ne 8008584: 3203 addne r2, #3 8008586: ea5f 0cdc movs.w ip, ip, lsr #3 800858a: bf18 it ne 800858c: 3203 addne r2, #3 800858e: eb02 02dc add.w r2, r2, ip, lsr #3 8008592: f1c2 0320 rsb r3, r2, #32 8008596: fa00 fc03 lsl.w ip, r0, r3 800859a: fa20 f002 lsr.w r0, r0, r2 800859e: fa01 fe03 lsl.w lr, r1, r3 80085a2: ea40 000e orr.w r0, r0, lr 80085a6: fa21 f102 lsr.w r1, r1, r2 80085aa: 4414 add r4, r2 80085ac: e6bd b.n 800832a <__adddf3+0xe6> 80085ae: bf00 nop 080085b0 <__aeabi_dmul>: 80085b0: b570 push {r4, r5, r6, lr} 80085b2: f04f 0cff mov.w ip, #255 @ 0xff 80085b6: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 80085ba: ea1c 5411 ands.w r4, ip, r1, lsr #20 80085be: bf1d ittte ne 80085c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80085c4: ea94 0f0c teqne r4, ip 80085c8: ea95 0f0c teqne r5, ip 80085cc: f000 f8de bleq 800878c <__aeabi_dmul+0x1dc> 80085d0: 442c add r4, r5 80085d2: ea81 0603 eor.w r6, r1, r3 80085d6: ea21 514c bic.w r1, r1, ip, lsl #21 80085da: ea23 534c bic.w r3, r3, ip, lsl #21 80085de: ea50 3501 orrs.w r5, r0, r1, lsl #12 80085e2: bf18 it ne 80085e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80085e8: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 80085ec: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 80085f0: d038 beq.n 8008664 <__aeabi_dmul+0xb4> 80085f2: fba0 ce02 umull ip, lr, r0, r2 80085f6: f04f 0500 mov.w r5, #0 80085fa: fbe1 e502 umlal lr, r5, r1, r2 80085fe: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 8008602: fbe0 e503 umlal lr, r5, r0, r3 8008606: f04f 0600 mov.w r6, #0 800860a: fbe1 5603 umlal r5, r6, r1, r3 800860e: f09c 0f00 teq ip, #0 8008612: bf18 it ne 8008614: f04e 0e01 orrne.w lr, lr, #1 8008618: f1a4 04ff sub.w r4, r4, #255 @ 0xff 800861c: f5b6 7f00 cmp.w r6, #512 @ 0x200 8008620: f564 7440 sbc.w r4, r4, #768 @ 0x300 8008624: d204 bcs.n 8008630 <__aeabi_dmul+0x80> 8008626: ea5f 0e4e movs.w lr, lr, lsl #1 800862a: 416d adcs r5, r5 800862c: eb46 0606 adc.w r6, r6, r6 8008630: ea42 21c6 orr.w r1, r2, r6, lsl #11 8008634: ea41 5155 orr.w r1, r1, r5, lsr #21 8008638: ea4f 20c5 mov.w r0, r5, lsl #11 800863c: ea40 505e orr.w r0, r0, lr, lsr #21 8008640: ea4f 2ece mov.w lr, lr, lsl #11 8008644: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8008648: bf88 it hi 800864a: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 800864e: d81e bhi.n 800868e <__aeabi_dmul+0xde> 8008650: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 8008654: bf08 it eq 8008656: ea5f 0e50 movseq.w lr, r0, lsr #1 800865a: f150 0000 adcs.w r0, r0, #0 800865e: eb41 5104 adc.w r1, r1, r4, lsl #20 8008662: bd70 pop {r4, r5, r6, pc} 8008664: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 8008668: ea46 0101 orr.w r1, r6, r1 800866c: ea40 0002 orr.w r0, r0, r2 8008670: ea81 0103 eor.w r1, r1, r3 8008674: ebb4 045c subs.w r4, r4, ip, lsr #1 8008678: bfc2 ittt gt 800867a: ebd4 050c rsbsgt r5, r4, ip 800867e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8008682: bd70 popgt {r4, r5, r6, pc} 8008684: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008688: f04f 0e00 mov.w lr, #0 800868c: 3c01 subs r4, #1 800868e: f300 80ab bgt.w 80087e8 <__aeabi_dmul+0x238> 8008692: f114 0f36 cmn.w r4, #54 @ 0x36 8008696: bfde ittt le 8008698: 2000 movle r0, #0 800869a: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 800869e: bd70 pople {r4, r5, r6, pc} 80086a0: f1c4 0400 rsb r4, r4, #0 80086a4: 3c20 subs r4, #32 80086a6: da35 bge.n 8008714 <__aeabi_dmul+0x164> 80086a8: 340c adds r4, #12 80086aa: dc1b bgt.n 80086e4 <__aeabi_dmul+0x134> 80086ac: f104 0414 add.w r4, r4, #20 80086b0: f1c4 0520 rsb r5, r4, #32 80086b4: fa00 f305 lsl.w r3, r0, r5 80086b8: fa20 f004 lsr.w r0, r0, r4 80086bc: fa01 f205 lsl.w r2, r1, r5 80086c0: ea40 0002 orr.w r0, r0, r2 80086c4: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 80086c8: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 80086cc: eb10 70d3 adds.w r0, r0, r3, lsr #31 80086d0: fa21 f604 lsr.w r6, r1, r4 80086d4: eb42 0106 adc.w r1, r2, r6 80086d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80086dc: bf08 it eq 80086de: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80086e2: bd70 pop {r4, r5, r6, pc} 80086e4: f1c4 040c rsb r4, r4, #12 80086e8: f1c4 0520 rsb r5, r4, #32 80086ec: fa00 f304 lsl.w r3, r0, r4 80086f0: fa20 f005 lsr.w r0, r0, r5 80086f4: fa01 f204 lsl.w r2, r1, r4 80086f8: ea40 0002 orr.w r0, r0, r2 80086fc: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8008700: eb10 70d3 adds.w r0, r0, r3, lsr #31 8008704: f141 0100 adc.w r1, r1, #0 8008708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 800870c: bf08 it eq 800870e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8008712: bd70 pop {r4, r5, r6, pc} 8008714: f1c4 0520 rsb r5, r4, #32 8008718: fa00 f205 lsl.w r2, r0, r5 800871c: ea4e 0e02 orr.w lr, lr, r2 8008720: fa20 f304 lsr.w r3, r0, r4 8008724: fa01 f205 lsl.w r2, r1, r5 8008728: ea43 0302 orr.w r3, r3, r2 800872c: fa21 f004 lsr.w r0, r1, r4 8008730: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8008734: fa21 f204 lsr.w r2, r1, r4 8008738: ea20 0002 bic.w r0, r0, r2 800873c: eb00 70d3 add.w r0, r0, r3, lsr #31 8008740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8008744: bf08 it eq 8008746: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800874a: bd70 pop {r4, r5, r6, pc} 800874c: f094 0f00 teq r4, #0 8008750: d10f bne.n 8008772 <__aeabi_dmul+0x1c2> 8008752: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 8008756: 0040 lsls r0, r0, #1 8008758: eb41 0101 adc.w r1, r1, r1 800875c: f411 1f80 tst.w r1, #1048576 @ 0x100000 8008760: bf08 it eq 8008762: 3c01 subeq r4, #1 8008764: d0f7 beq.n 8008756 <__aeabi_dmul+0x1a6> 8008766: ea41 0106 orr.w r1, r1, r6 800876a: f095 0f00 teq r5, #0 800876e: bf18 it ne 8008770: 4770 bxne lr 8008772: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 8008776: 0052 lsls r2, r2, #1 8008778: eb43 0303 adc.w r3, r3, r3 800877c: f413 1f80 tst.w r3, #1048576 @ 0x100000 8008780: bf08 it eq 8008782: 3d01 subeq r5, #1 8008784: d0f7 beq.n 8008776 <__aeabi_dmul+0x1c6> 8008786: ea43 0306 orr.w r3, r3, r6 800878a: 4770 bx lr 800878c: ea94 0f0c teq r4, ip 8008790: ea0c 5513 and.w r5, ip, r3, lsr #20 8008794: bf18 it ne 8008796: ea95 0f0c teqne r5, ip 800879a: d00c beq.n 80087b6 <__aeabi_dmul+0x206> 800879c: ea50 0641 orrs.w r6, r0, r1, lsl #1 80087a0: bf18 it ne 80087a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80087a6: d1d1 bne.n 800874c <__aeabi_dmul+0x19c> 80087a8: ea81 0103 eor.w r1, r1, r3 80087ac: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80087b0: f04f 0000 mov.w r0, #0 80087b4: bd70 pop {r4, r5, r6, pc} 80087b6: ea50 0641 orrs.w r6, r0, r1, lsl #1 80087ba: bf06 itte eq 80087bc: 4610 moveq r0, r2 80087be: 4619 moveq r1, r3 80087c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80087c4: d019 beq.n 80087fa <__aeabi_dmul+0x24a> 80087c6: ea94 0f0c teq r4, ip 80087ca: d102 bne.n 80087d2 <__aeabi_dmul+0x222> 80087cc: ea50 3601 orrs.w r6, r0, r1, lsl #12 80087d0: d113 bne.n 80087fa <__aeabi_dmul+0x24a> 80087d2: ea95 0f0c teq r5, ip 80087d6: d105 bne.n 80087e4 <__aeabi_dmul+0x234> 80087d8: ea52 3603 orrs.w r6, r2, r3, lsl #12 80087dc: bf1c itt ne 80087de: 4610 movne r0, r2 80087e0: 4619 movne r1, r3 80087e2: d10a bne.n 80087fa <__aeabi_dmul+0x24a> 80087e4: ea81 0103 eor.w r1, r1, r3 80087e8: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80087ec: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 80087f0: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 80087f4: f04f 0000 mov.w r0, #0 80087f8: bd70 pop {r4, r5, r6, pc} 80087fa: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 80087fe: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 8008802: bd70 pop {r4, r5, r6, pc} 08008804 <__aeabi_ddiv>: 8008804: b570 push {r4, r5, r6, lr} 8008806: f04f 0cff mov.w ip, #255 @ 0xff 800880a: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 800880e: ea1c 5411 ands.w r4, ip, r1, lsr #20 8008812: bf1d ittte ne 8008814: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8008818: ea94 0f0c teqne r4, ip 800881c: ea95 0f0c teqne r5, ip 8008820: f000 f8a7 bleq 8008972 <__aeabi_ddiv+0x16e> 8008824: eba4 0405 sub.w r4, r4, r5 8008828: ea81 0e03 eor.w lr, r1, r3 800882c: ea52 3503 orrs.w r5, r2, r3, lsl #12 8008830: ea4f 3101 mov.w r1, r1, lsl #12 8008834: f000 8088 beq.w 8008948 <__aeabi_ddiv+0x144> 8008838: ea4f 3303 mov.w r3, r3, lsl #12 800883c: f04f 5580 mov.w r5, #268435456 @ 0x10000000 8008840: ea45 1313 orr.w r3, r5, r3, lsr #4 8008844: ea43 6312 orr.w r3, r3, r2, lsr #24 8008848: ea4f 2202 mov.w r2, r2, lsl #8 800884c: ea45 1511 orr.w r5, r5, r1, lsr #4 8008850: ea45 6510 orr.w r5, r5, r0, lsr #24 8008854: ea4f 2600 mov.w r6, r0, lsl #8 8008858: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000 800885c: 429d cmp r5, r3 800885e: bf08 it eq 8008860: 4296 cmpeq r6, r2 8008862: f144 04fd adc.w r4, r4, #253 @ 0xfd 8008866: f504 7440 add.w r4, r4, #768 @ 0x300 800886a: d202 bcs.n 8008872 <__aeabi_ddiv+0x6e> 800886c: 085b lsrs r3, r3, #1 800886e: ea4f 0232 mov.w r2, r2, rrx 8008872: 1ab6 subs r6, r6, r2 8008874: eb65 0503 sbc.w r5, r5, r3 8008878: 085b lsrs r3, r3, #1 800887a: ea4f 0232 mov.w r2, r2, rrx 800887e: f44f 1080 mov.w r0, #1048576 @ 0x100000 8008882: f44f 2c00 mov.w ip, #524288 @ 0x80000 8008886: ebb6 0e02 subs.w lr, r6, r2 800888a: eb75 0e03 sbcs.w lr, r5, r3 800888e: bf22 ittt cs 8008890: 1ab6 subcs r6, r6, r2 8008892: 4675 movcs r5, lr 8008894: ea40 000c orrcs.w r0, r0, ip 8008898: 085b lsrs r3, r3, #1 800889a: ea4f 0232 mov.w r2, r2, rrx 800889e: ebb6 0e02 subs.w lr, r6, r2 80088a2: eb75 0e03 sbcs.w lr, r5, r3 80088a6: bf22 ittt cs 80088a8: 1ab6 subcs r6, r6, r2 80088aa: 4675 movcs r5, lr 80088ac: ea40 005c orrcs.w r0, r0, ip, lsr #1 80088b0: 085b lsrs r3, r3, #1 80088b2: ea4f 0232 mov.w r2, r2, rrx 80088b6: ebb6 0e02 subs.w lr, r6, r2 80088ba: eb75 0e03 sbcs.w lr, r5, r3 80088be: bf22 ittt cs 80088c0: 1ab6 subcs r6, r6, r2 80088c2: 4675 movcs r5, lr 80088c4: ea40 009c orrcs.w r0, r0, ip, lsr #2 80088c8: 085b lsrs r3, r3, #1 80088ca: ea4f 0232 mov.w r2, r2, rrx 80088ce: ebb6 0e02 subs.w lr, r6, r2 80088d2: eb75 0e03 sbcs.w lr, r5, r3 80088d6: bf22 ittt cs 80088d8: 1ab6 subcs r6, r6, r2 80088da: 4675 movcs r5, lr 80088dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80088e0: ea55 0e06 orrs.w lr, r5, r6 80088e4: d018 beq.n 8008918 <__aeabi_ddiv+0x114> 80088e6: ea4f 1505 mov.w r5, r5, lsl #4 80088ea: ea45 7516 orr.w r5, r5, r6, lsr #28 80088ee: ea4f 1606 mov.w r6, r6, lsl #4 80088f2: ea4f 03c3 mov.w r3, r3, lsl #3 80088f6: ea43 7352 orr.w r3, r3, r2, lsr #29 80088fa: ea4f 02c2 mov.w r2, r2, lsl #3 80088fe: ea5f 1c1c movs.w ip, ip, lsr #4 8008902: d1c0 bne.n 8008886 <__aeabi_ddiv+0x82> 8008904: f411 1f80 tst.w r1, #1048576 @ 0x100000 8008908: d10b bne.n 8008922 <__aeabi_ddiv+0x11e> 800890a: ea41 0100 orr.w r1, r1, r0 800890e: f04f 0000 mov.w r0, #0 8008912: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000 8008916: e7b6 b.n 8008886 <__aeabi_ddiv+0x82> 8008918: f411 1f80 tst.w r1, #1048576 @ 0x100000 800891c: bf04 itt eq 800891e: 4301 orreq r1, r0 8008920: 2000 moveq r0, #0 8008922: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8008926: bf88 it hi 8008928: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 800892c: f63f aeaf bhi.w 800868e <__aeabi_dmul+0xde> 8008930: ebb5 0c03 subs.w ip, r5, r3 8008934: bf04 itt eq 8008936: ebb6 0c02 subseq.w ip, r6, r2 800893a: ea5f 0c50 movseq.w ip, r0, lsr #1 800893e: f150 0000 adcs.w r0, r0, #0 8008942: eb41 5104 adc.w r1, r1, r4, lsl #20 8008946: bd70 pop {r4, r5, r6, pc} 8008948: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000 800894c: ea4e 3111 orr.w r1, lr, r1, lsr #12 8008950: eb14 045c adds.w r4, r4, ip, lsr #1 8008954: bfc2 ittt gt 8008956: ebd4 050c rsbsgt r5, r4, ip 800895a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800895e: bd70 popgt {r4, r5, r6, pc} 8008960: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008964: f04f 0e00 mov.w lr, #0 8008968: 3c01 subs r4, #1 800896a: e690 b.n 800868e <__aeabi_dmul+0xde> 800896c: ea45 0e06 orr.w lr, r5, r6 8008970: e68d b.n 800868e <__aeabi_dmul+0xde> 8008972: ea0c 5513 and.w r5, ip, r3, lsr #20 8008976: ea94 0f0c teq r4, ip 800897a: bf08 it eq 800897c: ea95 0f0c teqeq r5, ip 8008980: f43f af3b beq.w 80087fa <__aeabi_dmul+0x24a> 8008984: ea94 0f0c teq r4, ip 8008988: d10a bne.n 80089a0 <__aeabi_ddiv+0x19c> 800898a: ea50 3401 orrs.w r4, r0, r1, lsl #12 800898e: f47f af34 bne.w 80087fa <__aeabi_dmul+0x24a> 8008992: ea95 0f0c teq r5, ip 8008996: f47f af25 bne.w 80087e4 <__aeabi_dmul+0x234> 800899a: 4610 mov r0, r2 800899c: 4619 mov r1, r3 800899e: e72c b.n 80087fa <__aeabi_dmul+0x24a> 80089a0: ea95 0f0c teq r5, ip 80089a4: d106 bne.n 80089b4 <__aeabi_ddiv+0x1b0> 80089a6: ea52 3503 orrs.w r5, r2, r3, lsl #12 80089aa: f43f aefd beq.w 80087a8 <__aeabi_dmul+0x1f8> 80089ae: 4610 mov r0, r2 80089b0: 4619 mov r1, r3 80089b2: e722 b.n 80087fa <__aeabi_dmul+0x24a> 80089b4: ea50 0641 orrs.w r6, r0, r1, lsl #1 80089b8: bf18 it ne 80089ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80089be: f47f aec5 bne.w 800874c <__aeabi_dmul+0x19c> 80089c2: ea50 0441 orrs.w r4, r0, r1, lsl #1 80089c6: f47f af0d bne.w 80087e4 <__aeabi_dmul+0x234> 80089ca: ea52 0543 orrs.w r5, r2, r3, lsl #1 80089ce: f47f aeeb bne.w 80087a8 <__aeabi_dmul+0x1f8> 80089d2: e712 b.n 80087fa <__aeabi_dmul+0x24a> 080089d4 <__gedf2>: 80089d4: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 80089d8: e006 b.n 80089e8 <__cmpdf2+0x4> 80089da: bf00 nop 080089dc <__ledf2>: 80089dc: f04f 0c01 mov.w ip, #1 80089e0: e002 b.n 80089e8 <__cmpdf2+0x4> 80089e2: bf00 nop 080089e4 <__cmpdf2>: 80089e4: f04f 0c01 mov.w ip, #1 80089e8: f84d cd04 str.w ip, [sp, #-4]! 80089ec: ea4f 0c41 mov.w ip, r1, lsl #1 80089f0: ea7f 5c6c mvns.w ip, ip, asr #21 80089f4: ea4f 0c43 mov.w ip, r3, lsl #1 80089f8: bf18 it ne 80089fa: ea7f 5c6c mvnsne.w ip, ip, asr #21 80089fe: d01b beq.n 8008a38 <__cmpdf2+0x54> 8008a00: b001 add sp, #4 8008a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8008a06: bf0c ite eq 8008a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8008a0c: ea91 0f03 teqne r1, r3 8008a10: bf02 ittt eq 8008a12: ea90 0f02 teqeq r0, r2 8008a16: 2000 moveq r0, #0 8008a18: 4770 bxeq lr 8008a1a: f110 0f00 cmn.w r0, #0 8008a1e: ea91 0f03 teq r1, r3 8008a22: bf58 it pl 8008a24: 4299 cmppl r1, r3 8008a26: bf08 it eq 8008a28: 4290 cmpeq r0, r2 8008a2a: bf2c ite cs 8008a2c: 17d8 asrcs r0, r3, #31 8008a2e: ea6f 70e3 mvncc.w r0, r3, asr #31 8008a32: f040 0001 orr.w r0, r0, #1 8008a36: 4770 bx lr 8008a38: ea4f 0c41 mov.w ip, r1, lsl #1 8008a3c: ea7f 5c6c mvns.w ip, ip, asr #21 8008a40: d102 bne.n 8008a48 <__cmpdf2+0x64> 8008a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8008a46: d107 bne.n 8008a58 <__cmpdf2+0x74> 8008a48: ea4f 0c43 mov.w ip, r3, lsl #1 8008a4c: ea7f 5c6c mvns.w ip, ip, asr #21 8008a50: d1d6 bne.n 8008a00 <__cmpdf2+0x1c> 8008a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8008a56: d0d3 beq.n 8008a00 <__cmpdf2+0x1c> 8008a58: f85d 0b04 ldr.w r0, [sp], #4 8008a5c: 4770 bx lr 8008a5e: bf00 nop 08008a60 <__aeabi_cdrcmple>: 8008a60: 4684 mov ip, r0 8008a62: 4610 mov r0, r2 8008a64: 4662 mov r2, ip 8008a66: 468c mov ip, r1 8008a68: 4619 mov r1, r3 8008a6a: 4663 mov r3, ip 8008a6c: e000 b.n 8008a70 <__aeabi_cdcmpeq> 8008a6e: bf00 nop 08008a70 <__aeabi_cdcmpeq>: 8008a70: b501 push {r0, lr} 8008a72: f7ff ffb7 bl 80089e4 <__cmpdf2> 8008a76: 2800 cmp r0, #0 8008a78: bf48 it mi 8008a7a: f110 0f00 cmnmi.w r0, #0 8008a7e: bd01 pop {r0, pc} 08008a80 <__aeabi_dcmpeq>: 8008a80: f84d ed08 str.w lr, [sp, #-8]! 8008a84: f7ff fff4 bl 8008a70 <__aeabi_cdcmpeq> 8008a88: bf0c ite eq 8008a8a: 2001 moveq r0, #1 8008a8c: 2000 movne r0, #0 8008a8e: f85d fb08 ldr.w pc, [sp], #8 8008a92: bf00 nop 08008a94 <__aeabi_dcmplt>: 8008a94: f84d ed08 str.w lr, [sp, #-8]! 8008a98: f7ff ffea bl 8008a70 <__aeabi_cdcmpeq> 8008a9c: bf34 ite cc 8008a9e: 2001 movcc r0, #1 8008aa0: 2000 movcs r0, #0 8008aa2: f85d fb08 ldr.w pc, [sp], #8 8008aa6: bf00 nop 08008aa8 <__aeabi_dcmple>: 8008aa8: f84d ed08 str.w lr, [sp, #-8]! 8008aac: f7ff ffe0 bl 8008a70 <__aeabi_cdcmpeq> 8008ab0: bf94 ite ls 8008ab2: 2001 movls r0, #1 8008ab4: 2000 movhi r0, #0 8008ab6: f85d fb08 ldr.w pc, [sp], #8 8008aba: bf00 nop 08008abc <__aeabi_dcmpge>: 8008abc: f84d ed08 str.w lr, [sp, #-8]! 8008ac0: f7ff ffce bl 8008a60 <__aeabi_cdrcmple> 8008ac4: bf94 ite ls 8008ac6: 2001 movls r0, #1 8008ac8: 2000 movhi r0, #0 8008aca: f85d fb08 ldr.w pc, [sp], #8 8008ace: bf00 nop 08008ad0 <__aeabi_dcmpgt>: 8008ad0: f84d ed08 str.w lr, [sp, #-8]! 8008ad4: f7ff ffc4 bl 8008a60 <__aeabi_cdrcmple> 8008ad8: bf34 ite cc 8008ada: 2001 movcc r0, #1 8008adc: 2000 movcs r0, #0 8008ade: f85d fb08 ldr.w pc, [sp], #8 8008ae2: bf00 nop 08008ae4 <__aeabi_dcmpun>: 8008ae4: ea4f 0c41 mov.w ip, r1, lsl #1 8008ae8: ea7f 5c6c mvns.w ip, ip, asr #21 8008aec: d102 bne.n 8008af4 <__aeabi_dcmpun+0x10> 8008aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8008af2: d10a bne.n 8008b0a <__aeabi_dcmpun+0x26> 8008af4: ea4f 0c43 mov.w ip, r3, lsl #1 8008af8: ea7f 5c6c mvns.w ip, ip, asr #21 8008afc: d102 bne.n 8008b04 <__aeabi_dcmpun+0x20> 8008afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8008b02: d102 bne.n 8008b0a <__aeabi_dcmpun+0x26> 8008b04: f04f 0000 mov.w r0, #0 8008b08: 4770 bx lr 8008b0a: f04f 0001 mov.w r0, #1 8008b0e: 4770 bx lr 08008b10 <__aeabi_d2iz>: 8008b10: ea4f 0241 mov.w r2, r1, lsl #1 8008b14: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 8008b18: d215 bcs.n 8008b46 <__aeabi_d2iz+0x36> 8008b1a: d511 bpl.n 8008b40 <__aeabi_d2iz+0x30> 8008b1c: f46f 7378 mvn.w r3, #992 @ 0x3e0 8008b20: ebb3 5262 subs.w r2, r3, r2, asr #21 8008b24: d912 bls.n 8008b4c <__aeabi_d2iz+0x3c> 8008b26: ea4f 23c1 mov.w r3, r1, lsl #11 8008b2a: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8008b2e: ea43 5350 orr.w r3, r3, r0, lsr #21 8008b32: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8008b36: fa23 f002 lsr.w r0, r3, r2 8008b3a: bf18 it ne 8008b3c: 4240 negne r0, r0 8008b3e: 4770 bx lr 8008b40: f04f 0000 mov.w r0, #0 8008b44: 4770 bx lr 8008b46: ea50 3001 orrs.w r0, r0, r1, lsl #12 8008b4a: d105 bne.n 8008b58 <__aeabi_d2iz+0x48> 8008b4c: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 8008b50: bf08 it eq 8008b52: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 8008b56: 4770 bx lr 8008b58: f04f 0000 mov.w r0, #0 8008b5c: 4770 bx lr 8008b5e: bf00 nop 08008b60 <__aeabi_d2f>: 8008b60: ea4f 0241 mov.w r2, r1, lsl #1 8008b64: f1b2 43e0 subs.w r3, r2, #1879048192 @ 0x70000000 8008b68: bf24 itt cs 8008b6a: f5b3 1c00 subscs.w ip, r3, #2097152 @ 0x200000 8008b6e: f1dc 5cfe rsbscs ip, ip, #532676608 @ 0x1fc00000 8008b72: d90d bls.n 8008b90 <__aeabi_d2f+0x30> 8008b74: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8008b78: ea4f 02c0 mov.w r2, r0, lsl #3 8008b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29 8008b80: f1b2 4f00 cmp.w r2, #2147483648 @ 0x80000000 8008b84: eb40 0083 adc.w r0, r0, r3, lsl #2 8008b88: bf08 it eq 8008b8a: f020 0001 biceq.w r0, r0, #1 8008b8e: 4770 bx lr 8008b90: f011 4f80 tst.w r1, #1073741824 @ 0x40000000 8008b94: d121 bne.n 8008bda <__aeabi_d2f+0x7a> 8008b96: f113 7238 adds.w r2, r3, #48234496 @ 0x2e00000 8008b9a: bfbc itt lt 8008b9c: f001 4000 andlt.w r0, r1, #2147483648 @ 0x80000000 8008ba0: 4770 bxlt lr 8008ba2: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8008ba6: ea4f 5252 mov.w r2, r2, lsr #21 8008baa: f1c2 0218 rsb r2, r2, #24 8008bae: f1c2 0c20 rsb ip, r2, #32 8008bb2: fa10 f30c lsls.w r3, r0, ip 8008bb6: fa20 f002 lsr.w r0, r0, r2 8008bba: bf18 it ne 8008bbc: f040 0001 orrne.w r0, r0, #1 8008bc0: ea4f 23c1 mov.w r3, r1, lsl #11 8008bc4: ea4f 23d3 mov.w r3, r3, lsr #11 8008bc8: fa03 fc0c lsl.w ip, r3, ip 8008bcc: ea40 000c orr.w r0, r0, ip 8008bd0: fa23 f302 lsr.w r3, r3, r2 8008bd4: ea4f 0343 mov.w r3, r3, lsl #1 8008bd8: e7cc b.n 8008b74 <__aeabi_d2f+0x14> 8008bda: ea7f 5362 mvns.w r3, r2, asr #21 8008bde: d107 bne.n 8008bf0 <__aeabi_d2f+0x90> 8008be0: ea50 3301 orrs.w r3, r0, r1, lsl #12 8008be4: bf1e ittt ne 8008be6: f04f 40fe movne.w r0, #2130706432 @ 0x7f000000 8008bea: f440 0040 orrne.w r0, r0, #12582912 @ 0xc00000 8008bee: 4770 bxne lr 8008bf0: f001 4000 and.w r0, r1, #2147483648 @ 0x80000000 8008bf4: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008bf8: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008bfc: 4770 bx lr 8008bfe: bf00 nop 08008c00 <__aeabi_frsub>: 8008c00: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 8008c04: e002 b.n 8008c0c <__addsf3> 8008c06: bf00 nop 08008c08 <__aeabi_fsub>: 8008c08: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 08008c0c <__addsf3>: 8008c0c: 0042 lsls r2, r0, #1 8008c0e: bf1f itttt ne 8008c10: ea5f 0341 movsne.w r3, r1, lsl #1 8008c14: ea92 0f03 teqne r2, r3 8008c18: ea7f 6c22 mvnsne.w ip, r2, asr #24 8008c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24 8008c20: d06a beq.n 8008cf8 <__addsf3+0xec> 8008c22: ea4f 6212 mov.w r2, r2, lsr #24 8008c26: ebd2 6313 rsbs r3, r2, r3, lsr #24 8008c2a: bfc1 itttt gt 8008c2c: 18d2 addgt r2, r2, r3 8008c2e: 4041 eorgt r1, r0 8008c30: 4048 eorgt r0, r1 8008c32: 4041 eorgt r1, r0 8008c34: bfb8 it lt 8008c36: 425b neglt r3, r3 8008c38: 2b19 cmp r3, #25 8008c3a: bf88 it hi 8008c3c: 4770 bxhi lr 8008c3e: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 8008c42: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008c46: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 8008c4a: bf18 it ne 8008c4c: 4240 negne r0, r0 8008c4e: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8008c52: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 8008c56: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 8008c5a: bf18 it ne 8008c5c: 4249 negne r1, r1 8008c5e: ea92 0f03 teq r2, r3 8008c62: d03f beq.n 8008ce4 <__addsf3+0xd8> 8008c64: f1a2 0201 sub.w r2, r2, #1 8008c68: fa41 fc03 asr.w ip, r1, r3 8008c6c: eb10 000c adds.w r0, r0, ip 8008c70: f1c3 0320 rsb r3, r3, #32 8008c74: fa01 f103 lsl.w r1, r1, r3 8008c78: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8008c7c: d502 bpl.n 8008c84 <__addsf3+0x78> 8008c7e: 4249 negs r1, r1 8008c80: eb60 0040 sbc.w r0, r0, r0, lsl #1 8008c84: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 8008c88: d313 bcc.n 8008cb2 <__addsf3+0xa6> 8008c8a: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 8008c8e: d306 bcc.n 8008c9e <__addsf3+0x92> 8008c90: 0840 lsrs r0, r0, #1 8008c92: ea4f 0131 mov.w r1, r1, rrx 8008c96: f102 0201 add.w r2, r2, #1 8008c9a: 2afe cmp r2, #254 @ 0xfe 8008c9c: d251 bcs.n 8008d42 <__addsf3+0x136> 8008c9e: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 8008ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23 8008ca6: bf08 it eq 8008ca8: f020 0001 biceq.w r0, r0, #1 8008cac: ea40 0003 orr.w r0, r0, r3 8008cb0: 4770 bx lr 8008cb2: 0049 lsls r1, r1, #1 8008cb4: eb40 0000 adc.w r0, r0, r0 8008cb8: 3a01 subs r2, #1 8008cba: bf28 it cs 8008cbc: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 8008cc0: d2ed bcs.n 8008c9e <__addsf3+0x92> 8008cc2: fab0 fc80 clz ip, r0 8008cc6: f1ac 0c08 sub.w ip, ip, #8 8008cca: ebb2 020c subs.w r2, r2, ip 8008cce: fa00 f00c lsl.w r0, r0, ip 8008cd2: bfaa itet ge 8008cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23 8008cd8: 4252 neglt r2, r2 8008cda: 4318 orrge r0, r3 8008cdc: bfbc itt lt 8008cde: 40d0 lsrlt r0, r2 8008ce0: 4318 orrlt r0, r3 8008ce2: 4770 bx lr 8008ce4: f092 0f00 teq r2, #0 8008ce8: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 8008cec: bf06 itte eq 8008cee: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 8008cf2: 3201 addeq r2, #1 8008cf4: 3b01 subne r3, #1 8008cf6: e7b5 b.n 8008c64 <__addsf3+0x58> 8008cf8: ea4f 0341 mov.w r3, r1, lsl #1 8008cfc: ea7f 6c22 mvns.w ip, r2, asr #24 8008d00: bf18 it ne 8008d02: ea7f 6c23 mvnsne.w ip, r3, asr #24 8008d06: d021 beq.n 8008d4c <__addsf3+0x140> 8008d08: ea92 0f03 teq r2, r3 8008d0c: d004 beq.n 8008d18 <__addsf3+0x10c> 8008d0e: f092 0f00 teq r2, #0 8008d12: bf08 it eq 8008d14: 4608 moveq r0, r1 8008d16: 4770 bx lr 8008d18: ea90 0f01 teq r0, r1 8008d1c: bf1c itt ne 8008d1e: 2000 movne r0, #0 8008d20: 4770 bxne lr 8008d22: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 8008d26: d104 bne.n 8008d32 <__addsf3+0x126> 8008d28: 0040 lsls r0, r0, #1 8008d2a: bf28 it cs 8008d2c: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 8008d30: 4770 bx lr 8008d32: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 8008d36: bf3c itt cc 8008d38: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 8008d3c: 4770 bxcc lr 8008d3e: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 8008d42: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 8008d46: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008d4a: 4770 bx lr 8008d4c: ea7f 6222 mvns.w r2, r2, asr #24 8008d50: bf16 itet ne 8008d52: 4608 movne r0, r1 8008d54: ea7f 6323 mvnseq.w r3, r3, asr #24 8008d58: 4601 movne r1, r0 8008d5a: 0242 lsls r2, r0, #9 8008d5c: bf06 itte eq 8008d5e: ea5f 2341 movseq.w r3, r1, lsl #9 8008d62: ea90 0f01 teqeq r0, r1 8008d66: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 8008d6a: 4770 bx lr 08008d6c <__aeabi_ui2f>: 8008d6c: f04f 0300 mov.w r3, #0 8008d70: e004 b.n 8008d7c <__aeabi_i2f+0x8> 8008d72: bf00 nop 08008d74 <__aeabi_i2f>: 8008d74: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 8008d78: bf48 it mi 8008d7a: 4240 negmi r0, r0 8008d7c: ea5f 0c00 movs.w ip, r0 8008d80: bf08 it eq 8008d82: 4770 bxeq lr 8008d84: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 8008d88: 4601 mov r1, r0 8008d8a: f04f 0000 mov.w r0, #0 8008d8e: e01c b.n 8008dca <__aeabi_l2f+0x2a> 08008d90 <__aeabi_ul2f>: 8008d90: ea50 0201 orrs.w r2, r0, r1 8008d94: bf08 it eq 8008d96: 4770 bxeq lr 8008d98: f04f 0300 mov.w r3, #0 8008d9c: e00a b.n 8008db4 <__aeabi_l2f+0x14> 8008d9e: bf00 nop 08008da0 <__aeabi_l2f>: 8008da0: ea50 0201 orrs.w r2, r0, r1 8008da4: bf08 it eq 8008da6: 4770 bxeq lr 8008da8: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 8008dac: d502 bpl.n 8008db4 <__aeabi_l2f+0x14> 8008dae: 4240 negs r0, r0 8008db0: eb61 0141 sbc.w r1, r1, r1, lsl #1 8008db4: ea5f 0c01 movs.w ip, r1 8008db8: bf02 ittt eq 8008dba: 4684 moveq ip, r0 8008dbc: 4601 moveq r1, r0 8008dbe: 2000 moveq r0, #0 8008dc0: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 8008dc4: bf08 it eq 8008dc6: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 8008dca: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 8008dce: fabc f28c clz r2, ip 8008dd2: 3a08 subs r2, #8 8008dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23 8008dd8: db10 blt.n 8008dfc <__aeabi_l2f+0x5c> 8008dda: fa01 fc02 lsl.w ip, r1, r2 8008dde: 4463 add r3, ip 8008de0: fa00 fc02 lsl.w ip, r0, r2 8008de4: f1c2 0220 rsb r2, r2, #32 8008de8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8008dec: fa20 f202 lsr.w r2, r0, r2 8008df0: eb43 0002 adc.w r0, r3, r2 8008df4: bf08 it eq 8008df6: f020 0001 biceq.w r0, r0, #1 8008dfa: 4770 bx lr 8008dfc: f102 0220 add.w r2, r2, #32 8008e00: fa01 fc02 lsl.w ip, r1, r2 8008e04: f1c2 0220 rsb r2, r2, #32 8008e08: ea50 004c orrs.w r0, r0, ip, lsl #1 8008e0c: fa21 f202 lsr.w r2, r1, r2 8008e10: eb43 0002 adc.w r0, r3, r2 8008e14: bf08 it eq 8008e16: ea20 70dc biceq.w r0, r0, ip, lsr #31 8008e1a: 4770 bx lr 08008e1c <__aeabi_fmul>: 8008e1c: f04f 0cff mov.w ip, #255 @ 0xff 8008e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8008e24: bf1e ittt ne 8008e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8008e2a: ea92 0f0c teqne r2, ip 8008e2e: ea93 0f0c teqne r3, ip 8008e32: d06f beq.n 8008f14 <__aeabi_fmul+0xf8> 8008e34: 441a add r2, r3 8008e36: ea80 0c01 eor.w ip, r0, r1 8008e3a: 0240 lsls r0, r0, #9 8008e3c: bf18 it ne 8008e3e: ea5f 2141 movsne.w r1, r1, lsl #9 8008e42: d01e beq.n 8008e82 <__aeabi_fmul+0x66> 8008e44: f04f 6300 mov.w r3, #134217728 @ 0x8000000 8008e48: ea43 1050 orr.w r0, r3, r0, lsr #5 8008e4c: ea43 1151 orr.w r1, r3, r1, lsr #5 8008e50: fba0 3101 umull r3, r1, r0, r1 8008e54: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8008e58: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 8008e5c: bf3e ittt cc 8008e5e: 0049 lslcc r1, r1, #1 8008e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8008e64: 005b lslcc r3, r3, #1 8008e66: ea40 0001 orr.w r0, r0, r1 8008e6a: f162 027f sbc.w r2, r2, #127 @ 0x7f 8008e6e: 2afd cmp r2, #253 @ 0xfd 8008e70: d81d bhi.n 8008eae <__aeabi_fmul+0x92> 8008e72: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8008e76: eb40 50c2 adc.w r0, r0, r2, lsl #23 8008e7a: bf08 it eq 8008e7c: f020 0001 biceq.w r0, r0, #1 8008e80: 4770 bx lr 8008e82: f090 0f00 teq r0, #0 8008e86: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8008e8a: bf08 it eq 8008e8c: 0249 lsleq r1, r1, #9 8008e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9 8008e92: ea40 2051 orr.w r0, r0, r1, lsr #9 8008e96: 3a7f subs r2, #127 @ 0x7f 8008e98: bfc2 ittt gt 8008e9a: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 8008e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8008ea2: 4770 bxgt lr 8008ea4: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008ea8: f04f 0300 mov.w r3, #0 8008eac: 3a01 subs r2, #1 8008eae: dc5d bgt.n 8008f6c <__aeabi_fmul+0x150> 8008eb0: f112 0f19 cmn.w r2, #25 8008eb4: bfdc itt le 8008eb6: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 8008eba: 4770 bxle lr 8008ebc: f1c2 0200 rsb r2, r2, #0 8008ec0: 0041 lsls r1, r0, #1 8008ec2: fa21 f102 lsr.w r1, r1, r2 8008ec6: f1c2 0220 rsb r2, r2, #32 8008eca: fa00 fc02 lsl.w ip, r0, r2 8008ece: ea5f 0031 movs.w r0, r1, rrx 8008ed2: f140 0000 adc.w r0, r0, #0 8008ed6: ea53 034c orrs.w r3, r3, ip, lsl #1 8008eda: bf08 it eq 8008edc: ea20 70dc biceq.w r0, r0, ip, lsr #31 8008ee0: 4770 bx lr 8008ee2: f092 0f00 teq r2, #0 8008ee6: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 8008eea: bf02 ittt eq 8008eec: 0040 lsleq r0, r0, #1 8008eee: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 8008ef2: 3a01 subeq r2, #1 8008ef4: d0f9 beq.n 8008eea <__aeabi_fmul+0xce> 8008ef6: ea40 000c orr.w r0, r0, ip 8008efa: f093 0f00 teq r3, #0 8008efe: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8008f02: bf02 ittt eq 8008f04: 0049 lsleq r1, r1, #1 8008f06: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8008f0a: 3b01 subeq r3, #1 8008f0c: d0f9 beq.n 8008f02 <__aeabi_fmul+0xe6> 8008f0e: ea41 010c orr.w r1, r1, ip 8008f12: e78f b.n 8008e34 <__aeabi_fmul+0x18> 8008f14: ea0c 53d1 and.w r3, ip, r1, lsr #23 8008f18: ea92 0f0c teq r2, ip 8008f1c: bf18 it ne 8008f1e: ea93 0f0c teqne r3, ip 8008f22: d00a beq.n 8008f3a <__aeabi_fmul+0x11e> 8008f24: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 8008f28: bf18 it ne 8008f2a: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 8008f2e: d1d8 bne.n 8008ee2 <__aeabi_fmul+0xc6> 8008f30: ea80 0001 eor.w r0, r0, r1 8008f34: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8008f38: 4770 bx lr 8008f3a: f090 0f00 teq r0, #0 8008f3e: bf17 itett ne 8008f40: f090 4f00 teqne r0, #2147483648 @ 0x80000000 8008f44: 4608 moveq r0, r1 8008f46: f091 0f00 teqne r1, #0 8008f4a: f091 4f00 teqne r1, #2147483648 @ 0x80000000 8008f4e: d014 beq.n 8008f7a <__aeabi_fmul+0x15e> 8008f50: ea92 0f0c teq r2, ip 8008f54: d101 bne.n 8008f5a <__aeabi_fmul+0x13e> 8008f56: 0242 lsls r2, r0, #9 8008f58: d10f bne.n 8008f7a <__aeabi_fmul+0x15e> 8008f5a: ea93 0f0c teq r3, ip 8008f5e: d103 bne.n 8008f68 <__aeabi_fmul+0x14c> 8008f60: 024b lsls r3, r1, #9 8008f62: bf18 it ne 8008f64: 4608 movne r0, r1 8008f66: d108 bne.n 8008f7a <__aeabi_fmul+0x15e> 8008f68: ea80 0001 eor.w r0, r0, r1 8008f6c: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8008f70: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008f74: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8008f78: 4770 bx lr 8008f7a: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8008f7e: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 8008f82: 4770 bx lr 08008f84 <__aeabi_fdiv>: 8008f84: f04f 0cff mov.w ip, #255 @ 0xff 8008f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8008f8c: bf1e ittt ne 8008f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8008f92: ea92 0f0c teqne r2, ip 8008f96: ea93 0f0c teqne r3, ip 8008f9a: d069 beq.n 8009070 <__aeabi_fdiv+0xec> 8008f9c: eba2 0203 sub.w r2, r2, r3 8008fa0: ea80 0c01 eor.w ip, r0, r1 8008fa4: 0249 lsls r1, r1, #9 8008fa6: ea4f 2040 mov.w r0, r0, lsl #9 8008faa: d037 beq.n 800901c <__aeabi_fdiv+0x98> 8008fac: f04f 5380 mov.w r3, #268435456 @ 0x10000000 8008fb0: ea43 1111 orr.w r1, r3, r1, lsr #4 8008fb4: ea43 1310 orr.w r3, r3, r0, lsr #4 8008fb8: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 8008fbc: 428b cmp r3, r1 8008fbe: bf38 it cc 8008fc0: 005b lslcc r3, r3, #1 8008fc2: f142 027d adc.w r2, r2, #125 @ 0x7d 8008fc6: f44f 0c00 mov.w ip, #8388608 @ 0x800000 8008fca: 428b cmp r3, r1 8008fcc: bf24 itt cs 8008fce: 1a5b subcs r3, r3, r1 8008fd0: ea40 000c orrcs.w r0, r0, ip 8008fd4: ebb3 0f51 cmp.w r3, r1, lsr #1 8008fd8: bf24 itt cs 8008fda: eba3 0351 subcs.w r3, r3, r1, lsr #1 8008fde: ea40 005c orrcs.w r0, r0, ip, lsr #1 8008fe2: ebb3 0f91 cmp.w r3, r1, lsr #2 8008fe6: bf24 itt cs 8008fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2 8008fec: ea40 009c orrcs.w r0, r0, ip, lsr #2 8008ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3 8008ff4: bf24 itt cs 8008ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3 8008ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8008ffe: 011b lsls r3, r3, #4 8009000: bf18 it ne 8009002: ea5f 1c1c movsne.w ip, ip, lsr #4 8009006: d1e0 bne.n 8008fca <__aeabi_fdiv+0x46> 8009008: 2afd cmp r2, #253 @ 0xfd 800900a: f63f af50 bhi.w 8008eae <__aeabi_fmul+0x92> 800900e: 428b cmp r3, r1 8009010: eb40 50c2 adc.w r0, r0, r2, lsl #23 8009014: bf08 it eq 8009016: f020 0001 biceq.w r0, r0, #1 800901a: 4770 bx lr 800901c: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 8009020: ea4c 2050 orr.w r0, ip, r0, lsr #9 8009024: 327f adds r2, #127 @ 0x7f 8009026: bfc2 ittt gt 8009028: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 800902c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8009030: 4770 bxgt lr 8009032: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8009036: f04f 0300 mov.w r3, #0 800903a: 3a01 subs r2, #1 800903c: e737 b.n 8008eae <__aeabi_fmul+0x92> 800903e: f092 0f00 teq r2, #0 8009042: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 8009046: bf02 ittt eq 8009048: 0040 lsleq r0, r0, #1 800904a: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 800904e: 3a01 subeq r2, #1 8009050: d0f9 beq.n 8009046 <__aeabi_fdiv+0xc2> 8009052: ea40 000c orr.w r0, r0, ip 8009056: f093 0f00 teq r3, #0 800905a: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 800905e: bf02 ittt eq 8009060: 0049 lsleq r1, r1, #1 8009062: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8009066: 3b01 subeq r3, #1 8009068: d0f9 beq.n 800905e <__aeabi_fdiv+0xda> 800906a: ea41 010c orr.w r1, r1, ip 800906e: e795 b.n 8008f9c <__aeabi_fdiv+0x18> 8009070: ea0c 53d1 and.w r3, ip, r1, lsr #23 8009074: ea92 0f0c teq r2, ip 8009078: d108 bne.n 800908c <__aeabi_fdiv+0x108> 800907a: 0242 lsls r2, r0, #9 800907c: f47f af7d bne.w 8008f7a <__aeabi_fmul+0x15e> 8009080: ea93 0f0c teq r3, ip 8009084: f47f af70 bne.w 8008f68 <__aeabi_fmul+0x14c> 8009088: 4608 mov r0, r1 800908a: e776 b.n 8008f7a <__aeabi_fmul+0x15e> 800908c: ea93 0f0c teq r3, ip 8009090: d104 bne.n 800909c <__aeabi_fdiv+0x118> 8009092: 024b lsls r3, r1, #9 8009094: f43f af4c beq.w 8008f30 <__aeabi_fmul+0x114> 8009098: 4608 mov r0, r1 800909a: e76e b.n 8008f7a <__aeabi_fmul+0x15e> 800909c: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 80090a0: bf18 it ne 80090a2: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 80090a6: d1ca bne.n 800903e <__aeabi_fdiv+0xba> 80090a8: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 80090ac: f47f af5c bne.w 8008f68 <__aeabi_fmul+0x14c> 80090b0: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 80090b4: f47f af3c bne.w 8008f30 <__aeabi_fmul+0x114> 80090b8: e75f b.n 8008f7a <__aeabi_fmul+0x15e> 80090ba: bf00 nop 080090bc <__gesf2>: 80090bc: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 80090c0: e006 b.n 80090d0 <__cmpsf2+0x4> 80090c2: bf00 nop 080090c4 <__lesf2>: 80090c4: f04f 0c01 mov.w ip, #1 80090c8: e002 b.n 80090d0 <__cmpsf2+0x4> 80090ca: bf00 nop 080090cc <__cmpsf2>: 80090cc: f04f 0c01 mov.w ip, #1 80090d0: f84d cd04 str.w ip, [sp, #-4]! 80090d4: ea4f 0240 mov.w r2, r0, lsl #1 80090d8: ea4f 0341 mov.w r3, r1, lsl #1 80090dc: ea7f 6c22 mvns.w ip, r2, asr #24 80090e0: bf18 it ne 80090e2: ea7f 6c23 mvnsne.w ip, r3, asr #24 80090e6: d011 beq.n 800910c <__cmpsf2+0x40> 80090e8: b001 add sp, #4 80090ea: ea52 0c53 orrs.w ip, r2, r3, lsr #1 80090ee: bf18 it ne 80090f0: ea90 0f01 teqne r0, r1 80090f4: bf58 it pl 80090f6: ebb2 0003 subspl.w r0, r2, r3 80090fa: bf88 it hi 80090fc: 17c8 asrhi r0, r1, #31 80090fe: bf38 it cc 8009100: ea6f 70e1 mvncc.w r0, r1, asr #31 8009104: bf18 it ne 8009106: f040 0001 orrne.w r0, r0, #1 800910a: 4770 bx lr 800910c: ea7f 6c22 mvns.w ip, r2, asr #24 8009110: d102 bne.n 8009118 <__cmpsf2+0x4c> 8009112: ea5f 2c40 movs.w ip, r0, lsl #9 8009116: d105 bne.n 8009124 <__cmpsf2+0x58> 8009118: ea7f 6c23 mvns.w ip, r3, asr #24 800911c: d1e4 bne.n 80090e8 <__cmpsf2+0x1c> 800911e: ea5f 2c41 movs.w ip, r1, lsl #9 8009122: d0e1 beq.n 80090e8 <__cmpsf2+0x1c> 8009124: f85d 0b04 ldr.w r0, [sp], #4 8009128: 4770 bx lr 800912a: bf00 nop 0800912c <__aeabi_cfrcmple>: 800912c: 4684 mov ip, r0 800912e: 4608 mov r0, r1 8009130: 4661 mov r1, ip 8009132: e7ff b.n 8009134 <__aeabi_cfcmpeq> 08009134 <__aeabi_cfcmpeq>: 8009134: b50f push {r0, r1, r2, r3, lr} 8009136: f7ff ffc9 bl 80090cc <__cmpsf2> 800913a: 2800 cmp r0, #0 800913c: bf48 it mi 800913e: f110 0f00 cmnmi.w r0, #0 8009142: bd0f pop {r0, r1, r2, r3, pc} 08009144 <__aeabi_fcmpeq>: 8009144: f84d ed08 str.w lr, [sp, #-8]! 8009148: f7ff fff4 bl 8009134 <__aeabi_cfcmpeq> 800914c: bf0c ite eq 800914e: 2001 moveq r0, #1 8009150: 2000 movne r0, #0 8009152: f85d fb08 ldr.w pc, [sp], #8 8009156: bf00 nop 08009158 <__aeabi_fcmplt>: 8009158: f84d ed08 str.w lr, [sp, #-8]! 800915c: f7ff ffea bl 8009134 <__aeabi_cfcmpeq> 8009160: bf34 ite cc 8009162: 2001 movcc r0, #1 8009164: 2000 movcs r0, #0 8009166: f85d fb08 ldr.w pc, [sp], #8 800916a: bf00 nop 0800916c <__aeabi_fcmple>: 800916c: f84d ed08 str.w lr, [sp, #-8]! 8009170: f7ff ffe0 bl 8009134 <__aeabi_cfcmpeq> 8009174: bf94 ite ls 8009176: 2001 movls r0, #1 8009178: 2000 movhi r0, #0 800917a: f85d fb08 ldr.w pc, [sp], #8 800917e: bf00 nop 08009180 <__aeabi_fcmpge>: 8009180: f84d ed08 str.w lr, [sp, #-8]! 8009184: f7ff ffd2 bl 800912c <__aeabi_cfrcmple> 8009188: bf94 ite ls 800918a: 2001 movls r0, #1 800918c: 2000 movhi r0, #0 800918e: f85d fb08 ldr.w pc, [sp], #8 8009192: bf00 nop 08009194 <__aeabi_fcmpgt>: 8009194: f84d ed08 str.w lr, [sp, #-8]! 8009198: f7ff ffc8 bl 800912c <__aeabi_cfrcmple> 800919c: bf34 ite cc 800919e: 2001 movcc r0, #1 80091a0: 2000 movcs r0, #0 80091a2: f85d fb08 ldr.w pc, [sp], #8 80091a6: bf00 nop 080091a8 <__aeabi_f2iz>: 80091a8: ea4f 0240 mov.w r2, r0, lsl #1 80091ac: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 80091b0: d30f bcc.n 80091d2 <__aeabi_f2iz+0x2a> 80091b2: f04f 039e mov.w r3, #158 @ 0x9e 80091b6: ebb3 6212 subs.w r2, r3, r2, lsr #24 80091ba: d90d bls.n 80091d8 <__aeabi_f2iz+0x30> 80091bc: ea4f 2300 mov.w r3, r0, lsl #8 80091c0: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 80091c4: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 80091c8: fa23 f002 lsr.w r0, r3, r2 80091cc: bf18 it ne 80091ce: 4240 negne r0, r0 80091d0: 4770 bx lr 80091d2: f04f 0000 mov.w r0, #0 80091d6: 4770 bx lr 80091d8: f112 0f61 cmn.w r2, #97 @ 0x61 80091dc: d101 bne.n 80091e2 <__aeabi_f2iz+0x3a> 80091de: 0242 lsls r2, r0, #9 80091e0: d105 bne.n 80091ee <__aeabi_f2iz+0x46> 80091e2: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 80091e6: bf08 it eq 80091e8: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 80091ec: 4770 bx lr 80091ee: f04f 0000 mov.w r0, #0 80091f2: 4770 bx lr 080091f4 <__aeabi_ldivmod>: 80091f4: b97b cbnz r3, 8009216 <__aeabi_ldivmod+0x22> 80091f6: b972 cbnz r2, 8009216 <__aeabi_ldivmod+0x22> 80091f8: 2900 cmp r1, #0 80091fa: bfbe ittt lt 80091fc: 2000 movlt r0, #0 80091fe: f04f 4100 movlt.w r1, #2147483648 @ 0x80000000 8009202: e006 blt.n 8009212 <__aeabi_ldivmod+0x1e> 8009204: bf08 it eq 8009206: 2800 cmpeq r0, #0 8009208: bf1c itt ne 800920a: f06f 4100 mvnne.w r1, #2147483648 @ 0x80000000 800920e: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 8009212: f000 b9d7 b.w 80095c4 <__aeabi_idiv0> 8009216: f1ad 0c08 sub.w ip, sp, #8 800921a: e96d ce04 strd ip, lr, [sp, #-16]! 800921e: 2900 cmp r1, #0 8009220: db09 blt.n 8009236 <__aeabi_ldivmod+0x42> 8009222: 2b00 cmp r3, #0 8009224: db1a blt.n 800925c <__aeabi_ldivmod+0x68> 8009226: f000 f84d bl 80092c4 <__udivmoddi4> 800922a: f8dd e004 ldr.w lr, [sp, #4] 800922e: e9dd 2302 ldrd r2, r3, [sp, #8] 8009232: b004 add sp, #16 8009234: 4770 bx lr 8009236: 4240 negs r0, r0 8009238: eb61 0141 sbc.w r1, r1, r1, lsl #1 800923c: 2b00 cmp r3, #0 800923e: db1b blt.n 8009278 <__aeabi_ldivmod+0x84> 8009240: f000 f840 bl 80092c4 <__udivmoddi4> 8009244: f8dd e004 ldr.w lr, [sp, #4] 8009248: e9dd 2302 ldrd r2, r3, [sp, #8] 800924c: b004 add sp, #16 800924e: 4240 negs r0, r0 8009250: eb61 0141 sbc.w r1, r1, r1, lsl #1 8009254: 4252 negs r2, r2 8009256: eb63 0343 sbc.w r3, r3, r3, lsl #1 800925a: 4770 bx lr 800925c: 4252 negs r2, r2 800925e: eb63 0343 sbc.w r3, r3, r3, lsl #1 8009262: f000 f82f bl 80092c4 <__udivmoddi4> 8009266: f8dd e004 ldr.w lr, [sp, #4] 800926a: e9dd 2302 ldrd r2, r3, [sp, #8] 800926e: b004 add sp, #16 8009270: 4240 negs r0, r0 8009272: eb61 0141 sbc.w r1, r1, r1, lsl #1 8009276: 4770 bx lr 8009278: 4252 negs r2, r2 800927a: eb63 0343 sbc.w r3, r3, r3, lsl #1 800927e: f000 f821 bl 80092c4 <__udivmoddi4> 8009282: f8dd e004 ldr.w lr, [sp, #4] 8009286: e9dd 2302 ldrd r2, r3, [sp, #8] 800928a: b004 add sp, #16 800928c: 4252 negs r2, r2 800928e: eb63 0343 sbc.w r3, r3, r3, lsl #1 8009292: 4770 bx lr 08009294 <__aeabi_uldivmod>: 8009294: b953 cbnz r3, 80092ac <__aeabi_uldivmod+0x18> 8009296: b94a cbnz r2, 80092ac <__aeabi_uldivmod+0x18> 8009298: 2900 cmp r1, #0 800929a: bf08 it eq 800929c: 2800 cmpeq r0, #0 800929e: bf1c itt ne 80092a0: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff 80092a4: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 80092a8: f000 b98c b.w 80095c4 <__aeabi_idiv0> 80092ac: f1ad 0c08 sub.w ip, sp, #8 80092b0: e96d ce04 strd ip, lr, [sp, #-16]! 80092b4: f000 f806 bl 80092c4 <__udivmoddi4> 80092b8: f8dd e004 ldr.w lr, [sp, #4] 80092bc: e9dd 2302 ldrd r2, r3, [sp, #8] 80092c0: b004 add sp, #16 80092c2: 4770 bx lr 080092c4 <__udivmoddi4>: 80092c4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80092c8: 9d08 ldr r5, [sp, #32] 80092ca: 468e mov lr, r1 80092cc: 4604 mov r4, r0 80092ce: 4688 mov r8, r1 80092d0: 2b00 cmp r3, #0 80092d2: d14a bne.n 800936a <__udivmoddi4+0xa6> 80092d4: 428a cmp r2, r1 80092d6: 4617 mov r7, r2 80092d8: d962 bls.n 80093a0 <__udivmoddi4+0xdc> 80092da: fab2 f682 clz r6, r2 80092de: b14e cbz r6, 80092f4 <__udivmoddi4+0x30> 80092e0: f1c6 0320 rsb r3, r6, #32 80092e4: fa01 f806 lsl.w r8, r1, r6 80092e8: fa20 f303 lsr.w r3, r0, r3 80092ec: 40b7 lsls r7, r6 80092ee: ea43 0808 orr.w r8, r3, r8 80092f2: 40b4 lsls r4, r6 80092f4: ea4f 4e17 mov.w lr, r7, lsr #16 80092f8: fbb8 f1fe udiv r1, r8, lr 80092fc: fa1f fc87 uxth.w ip, r7 8009300: fb0e 8811 mls r8, lr, r1, r8 8009304: fb01 f20c mul.w r2, r1, ip 8009308: 0c23 lsrs r3, r4, #16 800930a: ea43 4308 orr.w r3, r3, r8, lsl #16 800930e: 429a cmp r2, r3 8009310: d909 bls.n 8009326 <__udivmoddi4+0x62> 8009312: 18fb adds r3, r7, r3 8009314: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff 8009318: f080 80eb bcs.w 80094f2 <__udivmoddi4+0x22e> 800931c: 429a cmp r2, r3 800931e: f240 80e8 bls.w 80094f2 <__udivmoddi4+0x22e> 8009322: 3902 subs r1, #2 8009324: 443b add r3, r7 8009326: 1a9a subs r2, r3, r2 8009328: fbb2 f0fe udiv r0, r2, lr 800932c: fb0e 2210 mls r2, lr, r0, r2 8009330: fb00 fc0c mul.w ip, r0, ip 8009334: b2a3 uxth r3, r4 8009336: ea43 4302 orr.w r3, r3, r2, lsl #16 800933a: 459c cmp ip, r3 800933c: d909 bls.n 8009352 <__udivmoddi4+0x8e> 800933e: 18fb adds r3, r7, r3 8009340: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff 8009344: f080 80d7 bcs.w 80094f6 <__udivmoddi4+0x232> 8009348: 459c cmp ip, r3 800934a: f240 80d4 bls.w 80094f6 <__udivmoddi4+0x232> 800934e: 443b add r3, r7 8009350: 3802 subs r0, #2 8009352: ea40 4001 orr.w r0, r0, r1, lsl #16 8009356: 2100 movs r1, #0 8009358: eba3 030c sub.w r3, r3, ip 800935c: b11d cbz r5, 8009366 <__udivmoddi4+0xa2> 800935e: 2200 movs r2, #0 8009360: 40f3 lsrs r3, r6 8009362: e9c5 3200 strd r3, r2, [r5] 8009366: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800936a: 428b cmp r3, r1 800936c: d905 bls.n 800937a <__udivmoddi4+0xb6> 800936e: b10d cbz r5, 8009374 <__udivmoddi4+0xb0> 8009370: e9c5 0100 strd r0, r1, [r5] 8009374: 2100 movs r1, #0 8009376: 4608 mov r0, r1 8009378: e7f5 b.n 8009366 <__udivmoddi4+0xa2> 800937a: fab3 f183 clz r1, r3 800937e: 2900 cmp r1, #0 8009380: d146 bne.n 8009410 <__udivmoddi4+0x14c> 8009382: 4573 cmp r3, lr 8009384: d302 bcc.n 800938c <__udivmoddi4+0xc8> 8009386: 4282 cmp r2, r0 8009388: f200 8108 bhi.w 800959c <__udivmoddi4+0x2d8> 800938c: 1a84 subs r4, r0, r2 800938e: eb6e 0203 sbc.w r2, lr, r3 8009392: 2001 movs r0, #1 8009394: 4690 mov r8, r2 8009396: 2d00 cmp r5, #0 8009398: d0e5 beq.n 8009366 <__udivmoddi4+0xa2> 800939a: e9c5 4800 strd r4, r8, [r5] 800939e: e7e2 b.n 8009366 <__udivmoddi4+0xa2> 80093a0: 2a00 cmp r2, #0 80093a2: f000 8091 beq.w 80094c8 <__udivmoddi4+0x204> 80093a6: fab2 f682 clz r6, r2 80093aa: 2e00 cmp r6, #0 80093ac: f040 80a5 bne.w 80094fa <__udivmoddi4+0x236> 80093b0: 1a8a subs r2, r1, r2 80093b2: 2101 movs r1, #1 80093b4: 0c03 lsrs r3, r0, #16 80093b6: ea4f 4e17 mov.w lr, r7, lsr #16 80093ba: b280 uxth r0, r0 80093bc: b2bc uxth r4, r7 80093be: fbb2 fcfe udiv ip, r2, lr 80093c2: fb0e 221c mls r2, lr, ip, r2 80093c6: ea43 4302 orr.w r3, r3, r2, lsl #16 80093ca: fb04 f20c mul.w r2, r4, ip 80093ce: 429a cmp r2, r3 80093d0: d907 bls.n 80093e2 <__udivmoddi4+0x11e> 80093d2: 18fb adds r3, r7, r3 80093d4: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff 80093d8: d202 bcs.n 80093e0 <__udivmoddi4+0x11c> 80093da: 429a cmp r2, r3 80093dc: f200 80e3 bhi.w 80095a6 <__udivmoddi4+0x2e2> 80093e0: 46c4 mov ip, r8 80093e2: 1a9b subs r3, r3, r2 80093e4: fbb3 f2fe udiv r2, r3, lr 80093e8: fb0e 3312 mls r3, lr, r2, r3 80093ec: fb02 f404 mul.w r4, r2, r4 80093f0: ea40 4303 orr.w r3, r0, r3, lsl #16 80093f4: 429c cmp r4, r3 80093f6: d907 bls.n 8009408 <__udivmoddi4+0x144> 80093f8: 18fb adds r3, r7, r3 80093fa: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff 80093fe: d202 bcs.n 8009406 <__udivmoddi4+0x142> 8009400: 429c cmp r4, r3 8009402: f200 80cd bhi.w 80095a0 <__udivmoddi4+0x2dc> 8009406: 4602 mov r2, r0 8009408: 1b1b subs r3, r3, r4 800940a: ea42 400c orr.w r0, r2, ip, lsl #16 800940e: e7a5 b.n 800935c <__udivmoddi4+0x98> 8009410: f1c1 0620 rsb r6, r1, #32 8009414: 408b lsls r3, r1 8009416: fa22 f706 lsr.w r7, r2, r6 800941a: 431f orrs r7, r3 800941c: fa2e fa06 lsr.w sl, lr, r6 8009420: ea4f 4917 mov.w r9, r7, lsr #16 8009424: fbba f8f9 udiv r8, sl, r9 8009428: fa0e fe01 lsl.w lr, lr, r1 800942c: fa20 f306 lsr.w r3, r0, r6 8009430: fb09 aa18 mls sl, r9, r8, sl 8009434: fa1f fc87 uxth.w ip, r7 8009438: ea43 030e orr.w r3, r3, lr 800943c: fa00 fe01 lsl.w lr, r0, r1 8009440: fb08 f00c mul.w r0, r8, ip 8009444: 0c1c lsrs r4, r3, #16 8009446: ea44 440a orr.w r4, r4, sl, lsl #16 800944a: 42a0 cmp r0, r4 800944c: fa02 f201 lsl.w r2, r2, r1 8009450: d90a bls.n 8009468 <__udivmoddi4+0x1a4> 8009452: 193c adds r4, r7, r4 8009454: f108 3aff add.w sl, r8, #4294967295 @ 0xffffffff 8009458: f080 809e bcs.w 8009598 <__udivmoddi4+0x2d4> 800945c: 42a0 cmp r0, r4 800945e: f240 809b bls.w 8009598 <__udivmoddi4+0x2d4> 8009462: f1a8 0802 sub.w r8, r8, #2 8009466: 443c add r4, r7 8009468: 1a24 subs r4, r4, r0 800946a: b298 uxth r0, r3 800946c: fbb4 f3f9 udiv r3, r4, r9 8009470: fb09 4413 mls r4, r9, r3, r4 8009474: fb03 fc0c mul.w ip, r3, ip 8009478: ea40 4404 orr.w r4, r0, r4, lsl #16 800947c: 45a4 cmp ip, r4 800947e: d909 bls.n 8009494 <__udivmoddi4+0x1d0> 8009480: 193c adds r4, r7, r4 8009482: f103 30ff add.w r0, r3, #4294967295 @ 0xffffffff 8009486: f080 8085 bcs.w 8009594 <__udivmoddi4+0x2d0> 800948a: 45a4 cmp ip, r4 800948c: f240 8082 bls.w 8009594 <__udivmoddi4+0x2d0> 8009490: 3b02 subs r3, #2 8009492: 443c add r4, r7 8009494: ea43 4008 orr.w r0, r3, r8, lsl #16 8009498: eba4 040c sub.w r4, r4, ip 800949c: fba0 8c02 umull r8, ip, r0, r2 80094a0: 4564 cmp r4, ip 80094a2: 4643 mov r3, r8 80094a4: 46e1 mov r9, ip 80094a6: d364 bcc.n 8009572 <__udivmoddi4+0x2ae> 80094a8: d061 beq.n 800956e <__udivmoddi4+0x2aa> 80094aa: b15d cbz r5, 80094c4 <__udivmoddi4+0x200> 80094ac: ebbe 0203 subs.w r2, lr, r3 80094b0: eb64 0409 sbc.w r4, r4, r9 80094b4: fa04 f606 lsl.w r6, r4, r6 80094b8: fa22 f301 lsr.w r3, r2, r1 80094bc: 431e orrs r6, r3 80094be: 40cc lsrs r4, r1 80094c0: e9c5 6400 strd r6, r4, [r5] 80094c4: 2100 movs r1, #0 80094c6: e74e b.n 8009366 <__udivmoddi4+0xa2> 80094c8: fbb1 fcf2 udiv ip, r1, r2 80094cc: 0c01 lsrs r1, r0, #16 80094ce: ea41 410e orr.w r1, r1, lr, lsl #16 80094d2: b280 uxth r0, r0 80094d4: ea40 4201 orr.w r2, r0, r1, lsl #16 80094d8: 463b mov r3, r7 80094da: fbb1 f1f7 udiv r1, r1, r7 80094de: 4638 mov r0, r7 80094e0: 463c mov r4, r7 80094e2: 46b8 mov r8, r7 80094e4: 46be mov lr, r7 80094e6: 2620 movs r6, #32 80094e8: eba2 0208 sub.w r2, r2, r8 80094ec: ea41 410c orr.w r1, r1, ip, lsl #16 80094f0: e765 b.n 80093be <__udivmoddi4+0xfa> 80094f2: 4601 mov r1, r0 80094f4: e717 b.n 8009326 <__udivmoddi4+0x62> 80094f6: 4610 mov r0, r2 80094f8: e72b b.n 8009352 <__udivmoddi4+0x8e> 80094fa: f1c6 0120 rsb r1, r6, #32 80094fe: fa2e fc01 lsr.w ip, lr, r1 8009502: 40b7 lsls r7, r6 8009504: fa0e fe06 lsl.w lr, lr, r6 8009508: fa20 f101 lsr.w r1, r0, r1 800950c: ea41 010e orr.w r1, r1, lr 8009510: ea4f 4e17 mov.w lr, r7, lsr #16 8009514: fbbc f8fe udiv r8, ip, lr 8009518: b2bc uxth r4, r7 800951a: fb0e cc18 mls ip, lr, r8, ip 800951e: fb08 f904 mul.w r9, r8, r4 8009522: 0c0a lsrs r2, r1, #16 8009524: ea42 420c orr.w r2, r2, ip, lsl #16 8009528: 40b0 lsls r0, r6 800952a: 4591 cmp r9, r2 800952c: ea4f 4310 mov.w r3, r0, lsr #16 8009530: b280 uxth r0, r0 8009532: d93e bls.n 80095b2 <__udivmoddi4+0x2ee> 8009534: 18ba adds r2, r7, r2 8009536: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff 800953a: d201 bcs.n 8009540 <__udivmoddi4+0x27c> 800953c: 4591 cmp r9, r2 800953e: d81f bhi.n 8009580 <__udivmoddi4+0x2bc> 8009540: eba2 0209 sub.w r2, r2, r9 8009544: fbb2 f9fe udiv r9, r2, lr 8009548: fb09 f804 mul.w r8, r9, r4 800954c: fb0e 2a19 mls sl, lr, r9, r2 8009550: b28a uxth r2, r1 8009552: ea42 420a orr.w r2, r2, sl, lsl #16 8009556: 4542 cmp r2, r8 8009558: d229 bcs.n 80095ae <__udivmoddi4+0x2ea> 800955a: 18ba adds r2, r7, r2 800955c: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff 8009560: d2c2 bcs.n 80094e8 <__udivmoddi4+0x224> 8009562: 4542 cmp r2, r8 8009564: d2c0 bcs.n 80094e8 <__udivmoddi4+0x224> 8009566: f1a9 0102 sub.w r1, r9, #2 800956a: 443a add r2, r7 800956c: e7bc b.n 80094e8 <__udivmoddi4+0x224> 800956e: 45c6 cmp lr, r8 8009570: d29b bcs.n 80094aa <__udivmoddi4+0x1e6> 8009572: ebb8 0302 subs.w r3, r8, r2 8009576: eb6c 0c07 sbc.w ip, ip, r7 800957a: 3801 subs r0, #1 800957c: 46e1 mov r9, ip 800957e: e794 b.n 80094aa <__udivmoddi4+0x1e6> 8009580: eba7 0909 sub.w r9, r7, r9 8009584: 444a add r2, r9 8009586: fbb2 f9fe udiv r9, r2, lr 800958a: f1a8 0c02 sub.w ip, r8, #2 800958e: fb09 f804 mul.w r8, r9, r4 8009592: e7db b.n 800954c <__udivmoddi4+0x288> 8009594: 4603 mov r3, r0 8009596: e77d b.n 8009494 <__udivmoddi4+0x1d0> 8009598: 46d0 mov r8, sl 800959a: e765 b.n 8009468 <__udivmoddi4+0x1a4> 800959c: 4608 mov r0, r1 800959e: e6fa b.n 8009396 <__udivmoddi4+0xd2> 80095a0: 443b add r3, r7 80095a2: 3a02 subs r2, #2 80095a4: e730 b.n 8009408 <__udivmoddi4+0x144> 80095a6: f1ac 0c02 sub.w ip, ip, #2 80095aa: 443b add r3, r7 80095ac: e719 b.n 80093e2 <__udivmoddi4+0x11e> 80095ae: 4649 mov r1, r9 80095b0: e79a b.n 80094e8 <__udivmoddi4+0x224> 80095b2: eba2 0209 sub.w r2, r2, r9 80095b6: fbb2 f9fe udiv r9, r2, lr 80095ba: 46c4 mov ip, r8 80095bc: fb09 f804 mul.w r8, r9, r4 80095c0: e7c4 b.n 800954c <__udivmoddi4+0x288> 80095c2: bf00 nop 080095c4 <__aeabi_idiv0>: 80095c4: 4770 bx lr 80095c6: bf00 nop 080095c8 : ADC_HandleTypeDef hadc1; /* ADC1 init function */ void MX_ADC1_Init(void) { 80095c8: b580 push {r7, lr} 80095ca: b084 sub sp, #16 80095cc: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 80095ce: 1d3b adds r3, r7, #4 80095d0: 2200 movs r2, #0 80095d2: 601a str r2, [r3, #0] 80095d4: 605a str r2, [r3, #4] 80095d6: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 80095d8: 4b18 ldr r3, [pc, #96] @ (800963c ) 80095da: 4a19 ldr r2, [pc, #100] @ (8009640 ) 80095dc: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 80095de: 4b17 ldr r3, [pc, #92] @ (800963c ) 80095e0: 2200 movs r2, #0 80095e2: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = DISABLE; 80095e4: 4b15 ldr r3, [pc, #84] @ (800963c ) 80095e6: 2200 movs r2, #0 80095e8: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 80095ea: 4b14 ldr r3, [pc, #80] @ (800963c ) 80095ec: 2200 movs r2, #0 80095ee: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80095f0: 4b12 ldr r3, [pc, #72] @ (800963c ) 80095f2: f44f 2260 mov.w r2, #917504 @ 0xe0000 80095f6: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80095f8: 4b10 ldr r3, [pc, #64] @ (800963c ) 80095fa: 2200 movs r2, #0 80095fc: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 1; 80095fe: 4b0f ldr r3, [pc, #60] @ (800963c ) 8009600: 2201 movs r2, #1 8009602: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 8009604: 480d ldr r0, [pc, #52] @ (800963c ) 8009606: f005 f96b bl 800e8e0 800960a: 4603 mov r3, r0 800960c: 2b00 cmp r3, #0 800960e: d001 beq.n 8009614 { Error_Handler(); 8009610: f002 fec2 bl 800c398 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 8009614: 2308 movs r3, #8 8009616: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 8009618: 2301 movs r3, #1 800961a: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 800961c: 2300 movs r3, #0 800961e: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8009620: 1d3b adds r3, r7, #4 8009622: 4619 mov r1, r3 8009624: 4805 ldr r0, [pc, #20] @ (800963c ) 8009626: f005 fc1f bl 800ee68 800962a: 4603 mov r3, r0 800962c: 2b00 cmp r3, #0 800962e: d001 beq.n 8009634 { Error_Handler(); 8009630: f002 feb2 bl 800c398 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 8009634: bf00 nop 8009636: 3710 adds r7, #16 8009638: 46bd mov sp, r7 800963a: bd80 pop {r7, pc} 800963c: 2000026c .word 0x2000026c 8009640: 40012400 .word 0x40012400 08009644 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { 8009644: b580 push {r7, lr} 8009646: b08a sub sp, #40 @ 0x28 8009648: af00 add r7, sp, #0 800964a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800964c: f107 0318 add.w r3, r7, #24 8009650: 2200 movs r2, #0 8009652: 601a str r2, [r3, #0] 8009654: 605a str r2, [r3, #4] 8009656: 609a str r2, [r3, #8] 8009658: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) 800965a: 687b ldr r3, [r7, #4] 800965c: 681b ldr r3, [r3, #0] 800965e: 4a1f ldr r2, [pc, #124] @ (80096dc ) 8009660: 4293 cmp r3, r2 8009662: d137 bne.n 80096d4 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8009664: 4b1e ldr r3, [pc, #120] @ (80096e0 ) 8009666: 699b ldr r3, [r3, #24] 8009668: 4a1d ldr r2, [pc, #116] @ (80096e0 ) 800966a: f443 7300 orr.w r3, r3, #512 @ 0x200 800966e: 6193 str r3, [r2, #24] 8009670: 4b1b ldr r3, [pc, #108] @ (80096e0 ) 8009672: 699b ldr r3, [r3, #24] 8009674: f403 7300 and.w r3, r3, #512 @ 0x200 8009678: 617b str r3, [r7, #20] 800967a: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 800967c: 4b18 ldr r3, [pc, #96] @ (80096e0 ) 800967e: 699b ldr r3, [r3, #24] 8009680: 4a17 ldr r2, [pc, #92] @ (80096e0 ) 8009682: f043 0304 orr.w r3, r3, #4 8009686: 6193 str r3, [r2, #24] 8009688: 4b15 ldr r3, [pc, #84] @ (80096e0 ) 800968a: 699b ldr r3, [r3, #24] 800968c: f003 0304 and.w r3, r3, #4 8009690: 613b str r3, [r7, #16] 8009692: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8009694: 4b12 ldr r3, [pc, #72] @ (80096e0 ) 8009696: 699b ldr r3, [r3, #24] 8009698: 4a11 ldr r2, [pc, #68] @ (80096e0 ) 800969a: f043 0308 orr.w r3, r3, #8 800969e: 6193 str r3, [r2, #24] 80096a0: 4b0f ldr r3, [pc, #60] @ (80096e0 ) 80096a2: 699b ldr r3, [r3, #24] 80096a4: f003 0308 and.w r3, r3, #8 80096a8: 60fb str r3, [r7, #12] 80096aa: 68fb ldr r3, [r7, #12] /**ADC1 GPIO Configuration PA3 ------> ADC1_IN3 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = GPIO_PIN_3; 80096ac: 2308 movs r3, #8 80096ae: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80096b0: 2303 movs r3, #3 80096b2: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80096b4: f107 0318 add.w r3, r7, #24 80096b8: 4619 mov r1, r3 80096ba: 480a ldr r0, [pc, #40] @ (80096e4 ) 80096bc: f006 ff4e bl 801055c GPIO_InitStruct.Pin = ADC_NTC1_Pin|ADC_NTC2_Pin; 80096c0: 2303 movs r3, #3 80096c2: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80096c4: 2303 movs r3, #3 80096c6: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80096c8: f107 0318 add.w r3, r7, #24 80096cc: 4619 mov r1, r3 80096ce: 4806 ldr r0, [pc, #24] @ (80096e8 ) 80096d0: f006 ff44 bl 801055c /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 80096d4: bf00 nop 80096d6: 3728 adds r7, #40 @ 0x28 80096d8: 46bd mov sp, r7 80096da: bd80 pop {r7, pc} 80096dc: 40012400 .word 0x40012400 80096e0: 40021000 .word 0x40021000 80096e4: 40010800 .word 0x40010800 80096e8: 40010c00 .word 0x40010c00 080096ec : InfoBlock_t *InfoBlock = (InfoBlock_t *)(VERSION_OFFSET); uint8_t RELAY_State[RELAY_COUNT]; void RELAY_Write(relay_t num, uint8_t state){ 80096ec: b580 push {r7, lr} 80096ee: b082 sub sp, #8 80096f0: af00 add r7, sp, #0 80096f2: 4603 mov r3, r0 80096f4: 460a mov r2, r1 80096f6: 71fb strb r3, [r7, #7] 80096f8: 4613 mov r3, r2 80096fa: 71bb strb r3, [r7, #6] switch (num) { 80096fc: 79fb ldrb r3, [r7, #7] 80096fe: 2b06 cmp r3, #6 8009700: d847 bhi.n 8009792 8009702: a201 add r2, pc, #4 @ (adr r2, 8009708 ) 8009704: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8009708: 08009725 .word 0x08009725 800970c: 08009735 .word 0x08009735 8009710: 08009745 .word 0x08009745 8009714: 08009755 .word 0x08009755 8009718: 08009765 .word 0x08009765 800971c: 08009775 .word 0x08009775 8009720: 08009785 .word 0x08009785 case RELAY_AUX0: HAL_GPIO_WritePin(RELAY1_GPIO_Port, RELAY1_Pin, state); 8009724: 79bb ldrb r3, [r7, #6] 8009726: 461a mov r2, r3 8009728: f44f 7180 mov.w r1, #256 @ 0x100 800972c: 481d ldr r0, [pc, #116] @ (80097a4 ) 800972e: f007 f8b0 bl 8010892 break; 8009732: e02f b.n 8009794 case RELAY_AUX1: HAL_GPIO_WritePin(RELAY2_GPIO_Port, RELAY2_Pin, state); 8009734: 79bb ldrb r3, [r7, #6] 8009736: 461a mov r2, r3 8009738: f44f 7100 mov.w r1, #512 @ 0x200 800973c: 4819 ldr r0, [pc, #100] @ (80097a4 ) 800973e: f007 f8a8 bl 8010892 break; 8009742: e027 b.n 8009794 case RELAY3: HAL_GPIO_WritePin(RELAY3_GPIO_Port, RELAY3_Pin, state); 8009744: 79bb ldrb r3, [r7, #6] 8009746: 461a mov r2, r3 8009748: f44f 6180 mov.w r1, #1024 @ 0x400 800974c: 4815 ldr r0, [pc, #84] @ (80097a4 ) 800974e: f007 f8a0 bl 8010892 break; 8009752: e01f b.n 8009794 case RELAY_DC: HAL_GPIO_WritePin(RELAY4_GPIO_Port, RELAY4_Pin, state); 8009754: 79bb ldrb r3, [r7, #6] 8009756: 461a mov r2, r3 8009758: f44f 6100 mov.w r1, #2048 @ 0x800 800975c: 4811 ldr r0, [pc, #68] @ (80097a4 ) 800975e: f007 f898 bl 8010892 break; 8009762: e017 b.n 8009794 case RELAY_AC: HAL_GPIO_WritePin(RELAY5_GPIO_Port, RELAY5_Pin, state); 8009764: 79bb ldrb r3, [r7, #6] 8009766: 461a mov r2, r3 8009768: f44f 5180 mov.w r1, #4096 @ 0x1000 800976c: 480d ldr r0, [pc, #52] @ (80097a4 ) 800976e: f007 f890 bl 8010892 break; 8009772: e00f b.n 8009794 case RELAY_CC: HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, state); 8009774: 79bb ldrb r3, [r7, #6] 8009776: 461a mov r2, r3 8009778: f44f 4100 mov.w r1, #32768 @ 0x8000 800977c: 480a ldr r0, [pc, #40] @ (80097a8 ) 800977e: f007 f888 bl 8010892 break; 8009782: e007 b.n 8009794 case RELAY_DC1: HAL_GPIO_WritePin(RELAY_DC_GPIO_Port, RELAY_DC_Pin, state); 8009784: 79bb ldrb r3, [r7, #6] 8009786: 461a mov r2, r3 8009788: 2108 movs r1, #8 800978a: 4808 ldr r0, [pc, #32] @ (80097ac ) 800978c: f007 f881 bl 8010892 break; 8009790: e000 b.n 8009794 default: break; 8009792: bf00 nop } RELAY_State[num] = state; 8009794: 79fb ldrb r3, [r7, #7] 8009796: 4906 ldr r1, [pc, #24] @ (80097b0 ) 8009798: 79ba ldrb r2, [r7, #6] 800979a: 54ca strb r2, [r1, r3] } 800979c: bf00 nop 800979e: 3708 adds r7, #8 80097a0: 46bd mov sp, r7 80097a2: bd80 pop {r7, pc} 80097a4: 40011800 .word 0x40011800 80097a8: 40010800 .word 0x40010800 80097ac: 40011400 .word 0x40011400 80097b0: 2000029c .word 0x2000029c 080097b4 : uint8_t RELAY_Read(relay_t num){ 80097b4: b480 push {r7} 80097b6: b083 sub sp, #12 80097b8: af00 add r7, sp, #0 80097ba: 4603 mov r3, r0 80097bc: 71fb strb r3, [r7, #7] return RELAY_State[num]; 80097be: 79fb ldrb r3, [r7, #7] 80097c0: 4a03 ldr r2, [pc, #12] @ (80097d0 ) 80097c2: 5cd3 ldrb r3, [r2, r3] } 80097c4: 4618 mov r0, r3 80097c6: 370c adds r7, #12 80097c8: 46bd mov sp, r7 80097ca: bc80 pop {r7} 80097cc: 4770 bx lr 80097ce: bf00 nop 80097d0: 2000029c .word 0x2000029c 080097d4 : uint8_t IN_ReadInput(inputNum_t input_n){ 80097d4: b580 push {r7, lr} 80097d6: b082 sub sp, #8 80097d8: af00 add r7, sp, #0 80097da: 4603 mov r3, r0 80097dc: 71fb strb r3, [r7, #7] switch(input_n){ 80097de: 79fb ldrb r3, [r7, #7] 80097e0: 2b06 cmp r3, #6 80097e2: d83b bhi.n 800985c 80097e4: a201 add r2, pc, #4 @ (adr r2, 80097ec ) 80097e6: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80097ea: bf00 nop 80097ec: 08009809 .word 0x08009809 80097f0: 08009815 .word 0x08009815 80097f4: 08009821 .word 0x08009821 80097f8: 0800982d .word 0x0800982d 80097fc: 08009839 .word 0x08009839 8009800: 08009845 .word 0x08009845 8009804: 08009851 .word 0x08009851 case IN_SW0: return HAL_GPIO_ReadPin(IN_SW0_GPIO_Port, IN_SW0_Pin); 8009808: 2102 movs r1, #2 800980a: 4817 ldr r0, [pc, #92] @ (8009868 ) 800980c: f007 f82a bl 8010864 8009810: 4603 mov r3, r0 8009812: e024 b.n 800985e case IN_SW1: return HAL_GPIO_ReadPin(IN_SW1_GPIO_Port, IN_SW1_Pin); 8009814: 2104 movs r1, #4 8009816: 4814 ldr r0, [pc, #80] @ (8009868 ) 8009818: f007 f824 bl 8010864 800981c: 4603 mov r3, r0 800981e: e01e b.n 800985e case IN0: return HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 8009820: 2180 movs r1, #128 @ 0x80 8009822: 4812 ldr r0, [pc, #72] @ (800986c ) 8009824: f007 f81e bl 8010864 8009828: 4603 mov r3, r0 800982a: e018 b.n 800985e case IN_ESTOP: return HAL_GPIO_ReadPin(IN_ESTOP_GPIO_Port, IN_ESTOP_Pin); 800982c: 2180 movs r1, #128 @ 0x80 800982e: 4810 ldr r0, [pc, #64] @ (8009870 ) 8009830: f007 f818 bl 8010864 8009834: 4603 mov r3, r0 8009836: e012 b.n 800985e case IN_FB1: return HAL_GPIO_ReadPin(IN_FB1_GPIO_Port, IN_FB1_Pin); 8009838: 2110 movs r1, #16 800983a: 480e ldr r0, [pc, #56] @ (8009874 ) 800983c: f007 f812 bl 8010864 8009840: 4603 mov r3, r0 8009842: e00c b.n 800985e case IN_CONT_FB_DC: return HAL_GPIO_ReadPin(IN_FB2_GPIO_Port, IN_FB2_Pin); 8009844: 2108 movs r1, #8 8009846: 480b ldr r0, [pc, #44] @ (8009874 ) 8009848: f007 f80c bl 8010864 800984c: 4603 mov r3, r0 800984e: e006 b.n 800985e case ISO_IN: return HAL_GPIO_ReadPin(ISO_IN_GPIO_Port, ISO_IN_Pin); 8009850: 2102 movs r1, #2 8009852: 4806 ldr r0, [pc, #24] @ (800986c ) 8009854: f007 f806 bl 8010864 8009858: 4603 mov r3, r0 800985a: e000 b.n 800985e default: return 0; 800985c: 2300 movs r3, #0 } } 800985e: 4618 mov r0, r3 8009860: 3708 adds r7, #8 8009862: 46bd mov sp, r7 8009864: bd80 pop {r7, pc} 8009866: bf00 nop 8009868: 40010800 .word 0x40010800 800986c: 40011800 .word 0x40011800 8009870: 40011400 .word 0x40011400 8009874: 40010c00 .word 0x40010c00 08009878 : // // HAL_ADC_Stop(&hadc1); // stop adc return 0; } void Init_Peripheral(){ 8009878: b580 push {r7, lr} 800987a: af00 add r7, sp, #0 HAL_ADCEx_Calibration_Start(&hadc1); 800987c: 4810 ldr r0, [pc, #64] @ (80098c0 ) 800987e: f005 fc87 bl 800f190 RELAY_Write(RELAY_AUX0, 0); 8009882: 2100 movs r1, #0 8009884: 2000 movs r0, #0 8009886: f7ff ff31 bl 80096ec RELAY_Write(RELAY_AUX1, 0); 800988a: 2100 movs r1, #0 800988c: 2001 movs r0, #1 800988e: f7ff ff2d bl 80096ec RELAY_Write(RELAY3, 0); 8009892: 2100 movs r1, #0 8009894: 2002 movs r0, #2 8009896: f7ff ff29 bl 80096ec RELAY_Write(RELAY_DC, 0); 800989a: 2100 movs r1, #0 800989c: 2003 movs r0, #3 800989e: f7ff ff25 bl 80096ec RELAY_Write(RELAY_AC, 0); 80098a2: 2100 movs r1, #0 80098a4: 2004 movs r0, #4 80098a6: f7ff ff21 bl 80096ec RELAY_Write(RELAY_CC, 1); 80098aa: 2101 movs r1, #1 80098ac: 2005 movs r0, #5 80098ae: f7ff ff1d bl 80096ec RELAY_Write(RELAY_DC1, 0); 80098b2: 2100 movs r1, #0 80098b4: 2006 movs r0, #6 80098b6: f7ff ff19 bl 80096ec } 80098ba: bf00 nop 80098bc: bd80 pop {r7, pc} 80098be: bf00 nop 80098c0: 2000026c .word 0x2000026c 080098c4 : float pt1000_to_temperature(float resistance) { 80098c4: b590 push {r4, r7, lr} 80098c6: b087 sub sp, #28 80098c8: af00 add r7, sp, #0 80098ca: 6078 str r0, [r7, #4] // Константы для PT1000 const float R0 = 1000.0; // Сопротивление при 0 °C 80098cc: 4b0c ldr r3, [pc, #48] @ (8009900 ) 80098ce: 617b str r3, [r7, #20] const float C_A = 3.9083E-3f; 80098d0: 4b0c ldr r3, [pc, #48] @ (8009904 ) 80098d2: 613b str r3, [r7, #16] float temperature = (resistance-R0) / ( R0 * C_A); 80098d4: 6979 ldr r1, [r7, #20] 80098d6: 6878 ldr r0, [r7, #4] 80098d8: f7ff f996 bl 8008c08 <__aeabi_fsub> 80098dc: 4603 mov r3, r0 80098de: 461c mov r4, r3 80098e0: 6939 ldr r1, [r7, #16] 80098e2: 6978 ldr r0, [r7, #20] 80098e4: f7ff fa9a bl 8008e1c <__aeabi_fmul> 80098e8: 4603 mov r3, r0 80098ea: 4619 mov r1, r3 80098ec: 4620 mov r0, r4 80098ee: f7ff fb49 bl 8008f84 <__aeabi_fdiv> 80098f2: 4603 mov r3, r0 80098f4: 60fb str r3, [r7, #12] return temperature; 80098f6: 68fb ldr r3, [r7, #12] } 80098f8: 4618 mov r0, r3 80098fa: 371c adds r7, #28 80098fc: 46bd mov sp, r7 80098fe: bd90 pop {r4, r7, pc} 8009900: 447a0000 .word 0x447a0000 8009904: 3b801132 .word 0x3b801132 08009908 : float calculate_NTC_resistance(int adc_value, float Vref, float Vin, float R) { 8009908: b5b0 push {r4, r5, r7, lr} 800990a: b086 sub sp, #24 800990c: af00 add r7, sp, #0 800990e: 60f8 str r0, [r7, #12] 8009910: 60b9 str r1, [r7, #8] 8009912: 607a str r2, [r7, #4] 8009914: 603b str r3, [r7, #0] // Преобразуем значение АЦП в выходное напряжение float Vout = (adc_value / 4095.0) * Vref; 8009916: 68f8 ldr r0, [r7, #12] 8009918: f7fe fde0 bl 80084dc <__aeabi_i2d> 800991c: a31c add r3, pc, #112 @ (adr r3, 8009990 ) 800991e: e9d3 2300 ldrd r2, r3, [r3] 8009922: f7fe ff6f bl 8008804 <__aeabi_ddiv> 8009926: 4602 mov r2, r0 8009928: 460b mov r3, r1 800992a: 4614 mov r4, r2 800992c: 461d mov r5, r3 800992e: 68b8 ldr r0, [r7, #8] 8009930: f7fe fde6 bl 8008500 <__aeabi_f2d> 8009934: 4602 mov r2, r0 8009936: 460b mov r3, r1 8009938: 4620 mov r0, r4 800993a: 4629 mov r1, r5 800993c: f7fe fe38 bl 80085b0 <__aeabi_dmul> 8009940: 4602 mov r2, r0 8009942: 460b mov r3, r1 8009944: 4610 mov r0, r2 8009946: 4619 mov r1, r3 8009948: f7ff f90a bl 8008b60 <__aeabi_d2f> 800994c: 4603 mov r3, r0 800994e: 617b str r3, [r7, #20] // Проверяем, чтобы Vout не было равно Vin if (Vout >= Vin) { 8009950: 6879 ldr r1, [r7, #4] 8009952: 6978 ldr r0, [r7, #20] 8009954: f7ff fc14 bl 8009180 <__aeabi_fcmpge> 8009958: 4603 mov r3, r0 800995a: 2b00 cmp r3, #0 800995c: d001 beq.n 8009962 return -1; // Ошибка: Vout не может быть больше или равно Vin 800995e: 4b0e ldr r3, [pc, #56] @ (8009998 ) 8009960: e010 b.n 8009984 } // Вычисляем сопротивление термистора float R_NTC = R * (Vout / (Vin - Vout)); 8009962: 6979 ldr r1, [r7, #20] 8009964: 6878 ldr r0, [r7, #4] 8009966: f7ff f94f bl 8008c08 <__aeabi_fsub> 800996a: 4603 mov r3, r0 800996c: 4619 mov r1, r3 800996e: 6978 ldr r0, [r7, #20] 8009970: f7ff fb08 bl 8008f84 <__aeabi_fdiv> 8009974: 4603 mov r3, r0 8009976: 4619 mov r1, r3 8009978: 6838 ldr r0, [r7, #0] 800997a: f7ff fa4f bl 8008e1c <__aeabi_fmul> 800997e: 4603 mov r3, r0 8009980: 613b str r3, [r7, #16] return R_NTC; 8009982: 693b ldr r3, [r7, #16] } 8009984: 4618 mov r0, r3 8009986: 3718 adds r7, #24 8009988: 46bd mov sp, r7 800998a: bdb0 pop {r4, r5, r7, pc} 800998c: f3af 8000 nop.w 8009990: 00000000 .word 0x00000000 8009994: 40affe00 .word 0x40affe00 8009998: bf800000 .word 0xbf800000 0800999c : int16_t GBT_ReadTemp(uint8_t ch){ 800999c: b580 push {r7, lr} 800999e: b088 sub sp, #32 80099a0: af00 add r7, sp, #0 80099a2: 4603 mov r3, r0 80099a4: 71fb strb r3, [r7, #7] //TODO if(ch)ADC_Select_Channel(ADC_CHANNEL_8); 80099a6: 79fb ldrb r3, [r7, #7] 80099a8: 2b00 cmp r3, #0 80099aa: d003 beq.n 80099b4 80099ac: 2008 movs r0, #8 80099ae: f000 f83b bl 8009a28 80099b2: e002 b.n 80099ba else ADC_Select_Channel(ADC_CHANNEL_9); 80099b4: 2009 movs r0, #9 80099b6: f000 f837 bl 8009a28 // Начало конверсии HAL_ADC_Start(&hadc1); 80099ba: 4817 ldr r0, [pc, #92] @ (8009a18 ) 80099bc: f005 f868 bl 800ea90 // Ожидание окончания конверсии HAL_ADC_PollForConversion(&hadc1, HAL_MAX_DELAY); 80099c0: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 80099c4: 4814 ldr r0, [pc, #80] @ (8009a18 ) 80099c6: f005 f93d bl 800ec44 // Получение значения uint32_t adcValue = HAL_ADC_GetValue(&hadc1); 80099ca: 4813 ldr r0, [pc, #76] @ (8009a18 ) 80099cc: f005 fa40 bl 800ee50 80099d0: 61f8 str r0, [r7, #28] // Остановка АЦП (по желанию) HAL_ADC_Stop(&hadc1); 80099d2: 4811 ldr r0, [pc, #68] @ (8009a18 ) 80099d4: f005 f90a bl 800ebec if(adcValue>4000) return 20; //Термодатчик не подключен 80099d8: 69fb ldr r3, [r7, #28] 80099da: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 80099de: d901 bls.n 80099e4 80099e0: 2314 movs r3, #20 80099e2: e015 b.n 8009a10 // int adc_value = 2048; // Пример значения АЦП float Vref = 3.3; // Напряжение опорное 80099e4: 4b0d ldr r3, [pc, #52] @ (8009a1c ) 80099e6: 61bb str r3, [r7, #24] float Vin = 5.0; // Входное напряжение 80099e8: 4b0d ldr r3, [pc, #52] @ (8009a20 ) 80099ea: 617b str r3, [r7, #20] float R = 1000; // Сопротивление резистора в Омах 80099ec: 4b0d ldr r3, [pc, #52] @ (8009a24 ) 80099ee: 613b str r3, [r7, #16] float temp = pt1000_to_temperature(calculate_NTC_resistance(adcValue, Vref, Vin, R)); 80099f0: 69f8 ldr r0, [r7, #28] 80099f2: 693b ldr r3, [r7, #16] 80099f4: 697a ldr r2, [r7, #20] 80099f6: 69b9 ldr r1, [r7, #24] 80099f8: f7ff ff86 bl 8009908 80099fc: 4603 mov r3, r0 80099fe: 4618 mov r0, r3 8009a00: f7ff ff60 bl 80098c4 8009a04: 60f8 str r0, [r7, #12] return (int16_t)temp; 8009a06: 68f8 ldr r0, [r7, #12] 8009a08: f7ff fbce bl 80091a8 <__aeabi_f2iz> 8009a0c: 4603 mov r3, r0 8009a0e: b21b sxth r3, r3 } 8009a10: 4618 mov r0, r3 8009a12: 3720 adds r7, #32 8009a14: 46bd mov sp, r7 8009a16: bd80 pop {r7, pc} 8009a18: 2000026c .word 0x2000026c 8009a1c: 40533333 .word 0x40533333 8009a20: 40a00000 .word 0x40a00000 8009a24: 447a0000 .word 0x447a0000 08009a28 : void ADC_Select_Channel(uint32_t ch) { 8009a28: b580 push {r7, lr} 8009a2a: b086 sub sp, #24 8009a2c: af00 add r7, sp, #0 8009a2e: 6078 str r0, [r7, #4] ADC_ChannelConfTypeDef conf = { 8009a30: 687b ldr r3, [r7, #4] 8009a32: 60fb str r3, [r7, #12] 8009a34: 2301 movs r3, #1 8009a36: 613b str r3, [r7, #16] 8009a38: 2303 movs r3, #3 8009a3a: 617b str r3, [r7, #20] .Channel = ch, .Rank = 1, .SamplingTime = ADC_SAMPLETIME_28CYCLES_5, }; if (HAL_ADC_ConfigChannel(&hadc1, &conf) != HAL_OK) { 8009a3c: f107 030c add.w r3, r7, #12 8009a40: 4619 mov r1, r3 8009a42: 4806 ldr r0, [pc, #24] @ (8009a5c ) 8009a44: f005 fa10 bl 800ee68 8009a48: 4603 mov r3, r0 8009a4a: 2b00 cmp r3, #0 8009a4c: d001 beq.n 8009a52 Error_Handler(); 8009a4e: f002 fca3 bl 800c398 } } 8009a52: bf00 nop 8009a54: 3718 adds r7, #24 8009a56: 46bd mov sp, r7 8009a58: bd80 pop {r7, pc} 8009a5a: bf00 nop 8009a5c: 2000026c .word 0x2000026c 08009a60 : CAN_HandleTypeDef hcan1; CAN_HandleTypeDef hcan2; /* CAN1 init function */ void MX_CAN1_Init(void) { 8009a60: b580 push {r7, lr} 8009a62: af00 add r7, sp, #0 /* USER CODE END CAN1_Init 0 */ /* USER CODE BEGIN CAN1_Init 1 */ /* USER CODE END CAN1_Init 1 */ hcan1.Instance = CAN1; 8009a64: 4b17 ldr r3, [pc, #92] @ (8009ac4 ) 8009a66: 4a18 ldr r2, [pc, #96] @ (8009ac8 ) 8009a68: 601a str r2, [r3, #0] hcan1.Init.Prescaler = 8; 8009a6a: 4b16 ldr r3, [pc, #88] @ (8009ac4 ) 8009a6c: 2208 movs r2, #8 8009a6e: 605a str r2, [r3, #4] hcan1.Init.Mode = CAN_MODE_NORMAL; 8009a70: 4b14 ldr r3, [pc, #80] @ (8009ac4 ) 8009a72: 2200 movs r2, #0 8009a74: 609a str r2, [r3, #8] hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ; 8009a76: 4b13 ldr r3, [pc, #76] @ (8009ac4 ) 8009a78: 2200 movs r2, #0 8009a7a: 60da str r2, [r3, #12] hcan1.Init.TimeSeg1 = CAN_BS1_15TQ; 8009a7c: 4b11 ldr r3, [pc, #68] @ (8009ac4 ) 8009a7e: f44f 2260 mov.w r2, #917504 @ 0xe0000 8009a82: 611a str r2, [r3, #16] hcan1.Init.TimeSeg2 = CAN_BS2_2TQ; 8009a84: 4b0f ldr r3, [pc, #60] @ (8009ac4 ) 8009a86: f44f 1280 mov.w r2, #1048576 @ 0x100000 8009a8a: 615a str r2, [r3, #20] hcan1.Init.TimeTriggeredMode = DISABLE; 8009a8c: 4b0d ldr r3, [pc, #52] @ (8009ac4 ) 8009a8e: 2200 movs r2, #0 8009a90: 761a strb r2, [r3, #24] hcan1.Init.AutoBusOff = ENABLE; 8009a92: 4b0c ldr r3, [pc, #48] @ (8009ac4 ) 8009a94: 2201 movs r2, #1 8009a96: 765a strb r2, [r3, #25] hcan1.Init.AutoWakeUp = ENABLE; 8009a98: 4b0a ldr r3, [pc, #40] @ (8009ac4 ) 8009a9a: 2201 movs r2, #1 8009a9c: 769a strb r2, [r3, #26] hcan1.Init.AutoRetransmission = ENABLE; 8009a9e: 4b09 ldr r3, [pc, #36] @ (8009ac4 ) 8009aa0: 2201 movs r2, #1 8009aa2: 76da strb r2, [r3, #27] hcan1.Init.ReceiveFifoLocked = DISABLE; 8009aa4: 4b07 ldr r3, [pc, #28] @ (8009ac4 ) 8009aa6: 2200 movs r2, #0 8009aa8: 771a strb r2, [r3, #28] hcan1.Init.TransmitFifoPriority = ENABLE; 8009aaa: 4b06 ldr r3, [pc, #24] @ (8009ac4 ) 8009aac: 2201 movs r2, #1 8009aae: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan1) != HAL_OK) 8009ab0: 4804 ldr r0, [pc, #16] @ (8009ac4 ) 8009ab2: f005 fc1b bl 800f2ec 8009ab6: 4603 mov r3, r0 8009ab8: 2b00 cmp r3, #0 8009aba: d001 beq.n 8009ac0 { Error_Handler(); 8009abc: f002 fc6c bl 800c398 } /* USER CODE BEGIN CAN1_Init 2 */ /* USER CODE END CAN1_Init 2 */ } 8009ac0: bf00 nop 8009ac2: bd80 pop {r7, pc} 8009ac4: 200002a4 .word 0x200002a4 8009ac8: 40006400 .word 0x40006400 08009acc : /* CAN2 init function */ void MX_CAN2_Init(void) { 8009acc: b580 push {r7, lr} 8009ace: af00 add r7, sp, #0 /* USER CODE END CAN2_Init 0 */ /* USER CODE BEGIN CAN2_Init 1 */ /* USER CODE END CAN2_Init 1 */ hcan2.Instance = CAN2; 8009ad0: 4b17 ldr r3, [pc, #92] @ (8009b30 ) 8009ad2: 4a18 ldr r2, [pc, #96] @ (8009b34 ) 8009ad4: 601a str r2, [r3, #0] hcan2.Init.Prescaler = 16; 8009ad6: 4b16 ldr r3, [pc, #88] @ (8009b30 ) 8009ad8: 2210 movs r2, #16 8009ada: 605a str r2, [r3, #4] hcan2.Init.Mode = CAN_MODE_NORMAL; 8009adc: 4b14 ldr r3, [pc, #80] @ (8009b30 ) 8009ade: 2200 movs r2, #0 8009ae0: 609a str r2, [r3, #8] hcan2.Init.SyncJumpWidth = CAN_SJW_1TQ; 8009ae2: 4b13 ldr r3, [pc, #76] @ (8009b30 ) 8009ae4: 2200 movs r2, #0 8009ae6: 60da str r2, [r3, #12] hcan2.Init.TimeSeg1 = CAN_BS1_15TQ; 8009ae8: 4b11 ldr r3, [pc, #68] @ (8009b30 ) 8009aea: f44f 2260 mov.w r2, #917504 @ 0xe0000 8009aee: 611a str r2, [r3, #16] hcan2.Init.TimeSeg2 = CAN_BS2_2TQ; 8009af0: 4b0f ldr r3, [pc, #60] @ (8009b30 ) 8009af2: f44f 1280 mov.w r2, #1048576 @ 0x100000 8009af6: 615a str r2, [r3, #20] hcan2.Init.TimeTriggeredMode = DISABLE; 8009af8: 4b0d ldr r3, [pc, #52] @ (8009b30 ) 8009afa: 2200 movs r2, #0 8009afc: 761a strb r2, [r3, #24] hcan2.Init.AutoBusOff = ENABLE; 8009afe: 4b0c ldr r3, [pc, #48] @ (8009b30 ) 8009b00: 2201 movs r2, #1 8009b02: 765a strb r2, [r3, #25] hcan2.Init.AutoWakeUp = ENABLE; 8009b04: 4b0a ldr r3, [pc, #40] @ (8009b30 ) 8009b06: 2201 movs r2, #1 8009b08: 769a strb r2, [r3, #26] hcan2.Init.AutoRetransmission = ENABLE; 8009b0a: 4b09 ldr r3, [pc, #36] @ (8009b30 ) 8009b0c: 2201 movs r2, #1 8009b0e: 76da strb r2, [r3, #27] hcan2.Init.ReceiveFifoLocked = DISABLE; 8009b10: 4b07 ldr r3, [pc, #28] @ (8009b30 ) 8009b12: 2200 movs r2, #0 8009b14: 771a strb r2, [r3, #28] hcan2.Init.TransmitFifoPriority = ENABLE; 8009b16: 4b06 ldr r3, [pc, #24] @ (8009b30 ) 8009b18: 2201 movs r2, #1 8009b1a: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan2) != HAL_OK) 8009b1c: 4804 ldr r0, [pc, #16] @ (8009b30 ) 8009b1e: f005 fbe5 bl 800f2ec 8009b22: 4603 mov r3, r0 8009b24: 2b00 cmp r3, #0 8009b26: d001 beq.n 8009b2c { Error_Handler(); 8009b28: f002 fc36 bl 800c398 } /* USER CODE BEGIN CAN2_Init 2 */ /* USER CODE END CAN2_Init 2 */ } 8009b2c: bf00 nop 8009b2e: bd80 pop {r7, pc} 8009b30: 200002cc .word 0x200002cc 8009b34: 40006800 .word 0x40006800 08009b38 : static uint32_t HAL_RCC_CAN1_CLK_ENABLED=0; void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle) { 8009b38: b580 push {r7, lr} 8009b3a: b08e sub sp, #56 @ 0x38 8009b3c: af00 add r7, sp, #0 8009b3e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8009b40: f107 0320 add.w r3, r7, #32 8009b44: 2200 movs r2, #0 8009b46: 601a str r2, [r3, #0] 8009b48: 605a str r2, [r3, #4] 8009b4a: 609a str r2, [r3, #8] 8009b4c: 60da str r2, [r3, #12] if(canHandle->Instance==CAN1) 8009b4e: 687b ldr r3, [r7, #4] 8009b50: 681b ldr r3, [r3, #0] 8009b52: 4a61 ldr r2, [pc, #388] @ (8009cd8 ) 8009b54: 4293 cmp r3, r2 8009b56: d153 bne.n 8009c00 { /* USER CODE BEGIN CAN1_MspInit 0 */ /* USER CODE END CAN1_MspInit 0 */ /* CAN1 clock enable */ HAL_RCC_CAN1_CLK_ENABLED++; 8009b58: 4b60 ldr r3, [pc, #384] @ (8009cdc ) 8009b5a: 681b ldr r3, [r3, #0] 8009b5c: 3301 adds r3, #1 8009b5e: 4a5f ldr r2, [pc, #380] @ (8009cdc ) 8009b60: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8009b62: 4b5e ldr r3, [pc, #376] @ (8009cdc ) 8009b64: 681b ldr r3, [r3, #0] 8009b66: 2b01 cmp r3, #1 8009b68: d10b bne.n 8009b82 __HAL_RCC_CAN1_CLK_ENABLE(); 8009b6a: 4b5d ldr r3, [pc, #372] @ (8009ce0 ) 8009b6c: 69db ldr r3, [r3, #28] 8009b6e: 4a5c ldr r2, [pc, #368] @ (8009ce0 ) 8009b70: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8009b74: 61d3 str r3, [r2, #28] 8009b76: 4b5a ldr r3, [pc, #360] @ (8009ce0 ) 8009b78: 69db ldr r3, [r3, #28] 8009b7a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8009b7e: 61fb str r3, [r7, #28] 8009b80: 69fb ldr r3, [r7, #28] } __HAL_RCC_GPIOD_CLK_ENABLE(); 8009b82: 4b57 ldr r3, [pc, #348] @ (8009ce0 ) 8009b84: 699b ldr r3, [r3, #24] 8009b86: 4a56 ldr r2, [pc, #344] @ (8009ce0 ) 8009b88: f043 0320 orr.w r3, r3, #32 8009b8c: 6193 str r3, [r2, #24] 8009b8e: 4b54 ldr r3, [pc, #336] @ (8009ce0 ) 8009b90: 699b ldr r3, [r3, #24] 8009b92: f003 0320 and.w r3, r3, #32 8009b96: 61bb str r3, [r7, #24] 8009b98: 69bb ldr r3, [r7, #24] /**CAN1 GPIO Configuration PD0 ------> CAN1_RX PD1 ------> CAN1_TX */ GPIO_InitStruct.Pin = GPIO_PIN_0; 8009b9a: 2301 movs r3, #1 8009b9c: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8009b9e: 2300 movs r3, #0 8009ba0: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8009ba2: 2300 movs r3, #0 8009ba4: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8009ba6: f107 0320 add.w r3, r7, #32 8009baa: 4619 mov r1, r3 8009bac: 484d ldr r0, [pc, #308] @ (8009ce4 ) 8009bae: f006 fcd5 bl 801055c GPIO_InitStruct.Pin = GPIO_PIN_1; 8009bb2: 2302 movs r3, #2 8009bb4: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8009bb6: 2302 movs r3, #2 8009bb8: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8009bba: 2303 movs r3, #3 8009bbc: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8009bbe: f107 0320 add.w r3, r7, #32 8009bc2: 4619 mov r1, r3 8009bc4: 4847 ldr r0, [pc, #284] @ (8009ce4 ) 8009bc6: f006 fcc9 bl 801055c __HAL_AFIO_REMAP_CAN1_3(); 8009bca: 4b47 ldr r3, [pc, #284] @ (8009ce8 ) 8009bcc: 685b ldr r3, [r3, #4] 8009bce: 633b str r3, [r7, #48] @ 0x30 8009bd0: 6b3b ldr r3, [r7, #48] @ 0x30 8009bd2: f423 43c0 bic.w r3, r3, #24576 @ 0x6000 8009bd6: 633b str r3, [r7, #48] @ 0x30 8009bd8: 6b3b ldr r3, [r7, #48] @ 0x30 8009bda: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8009bde: 633b str r3, [r7, #48] @ 0x30 8009be0: 6b3b ldr r3, [r7, #48] @ 0x30 8009be2: f443 43c0 orr.w r3, r3, #24576 @ 0x6000 8009be6: 633b str r3, [r7, #48] @ 0x30 8009be8: 4a3f ldr r2, [pc, #252] @ (8009ce8 ) 8009bea: 6b3b ldr r3, [r7, #48] @ 0x30 8009bec: 6053 str r3, [r2, #4] /* CAN1 interrupt Init */ HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 0, 0); 8009bee: 2200 movs r2, #0 8009bf0: 2100 movs r1, #0 8009bf2: 2014 movs r0, #20 8009bf4: f006 fb1d bl 8010232 HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn); 8009bf8: 2014 movs r0, #20 8009bfa: f006 fb36 bl 801026a HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); /* USER CODE BEGIN CAN2_MspInit 1 */ /* USER CODE END CAN2_MspInit 1 */ } } 8009bfe: e067 b.n 8009cd0 else if(canHandle->Instance==CAN2) 8009c00: 687b ldr r3, [r7, #4] 8009c02: 681b ldr r3, [r3, #0] 8009c04: 4a39 ldr r2, [pc, #228] @ (8009cec ) 8009c06: 4293 cmp r3, r2 8009c08: d162 bne.n 8009cd0 __HAL_RCC_CAN2_CLK_ENABLE(); 8009c0a: 4b35 ldr r3, [pc, #212] @ (8009ce0 ) 8009c0c: 69db ldr r3, [r3, #28] 8009c0e: 4a34 ldr r2, [pc, #208] @ (8009ce0 ) 8009c10: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000 8009c14: 61d3 str r3, [r2, #28] 8009c16: 4b32 ldr r3, [pc, #200] @ (8009ce0 ) 8009c18: 69db ldr r3, [r3, #28] 8009c1a: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8009c1e: 617b str r3, [r7, #20] 8009c20: 697b ldr r3, [r7, #20] HAL_RCC_CAN1_CLK_ENABLED++; 8009c22: 4b2e ldr r3, [pc, #184] @ (8009cdc ) 8009c24: 681b ldr r3, [r3, #0] 8009c26: 3301 adds r3, #1 8009c28: 4a2c ldr r2, [pc, #176] @ (8009cdc ) 8009c2a: 6013 str r3, [r2, #0] if(HAL_RCC_CAN1_CLK_ENABLED==1){ 8009c2c: 4b2b ldr r3, [pc, #172] @ (8009cdc ) 8009c2e: 681b ldr r3, [r3, #0] 8009c30: 2b01 cmp r3, #1 8009c32: d10b bne.n 8009c4c __HAL_RCC_CAN1_CLK_ENABLE(); 8009c34: 4b2a ldr r3, [pc, #168] @ (8009ce0 ) 8009c36: 69db ldr r3, [r3, #28] 8009c38: 4a29 ldr r2, [pc, #164] @ (8009ce0 ) 8009c3a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8009c3e: 61d3 str r3, [r2, #28] 8009c40: 4b27 ldr r3, [pc, #156] @ (8009ce0 ) 8009c42: 69db ldr r3, [r3, #28] 8009c44: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8009c48: 613b str r3, [r7, #16] 8009c4a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8009c4c: 4b24 ldr r3, [pc, #144] @ (8009ce0 ) 8009c4e: 699b ldr r3, [r3, #24] 8009c50: 4a23 ldr r2, [pc, #140] @ (8009ce0 ) 8009c52: f043 0308 orr.w r3, r3, #8 8009c56: 6193 str r3, [r2, #24] 8009c58: 4b21 ldr r3, [pc, #132] @ (8009ce0 ) 8009c5a: 699b ldr r3, [r3, #24] 8009c5c: f003 0308 and.w r3, r3, #8 8009c60: 60fb str r3, [r7, #12] 8009c62: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_5; 8009c64: 2320 movs r3, #32 8009c66: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8009c68: 2300 movs r3, #0 8009c6a: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8009c6c: 2300 movs r3, #0 8009c6e: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8009c70: f107 0320 add.w r3, r7, #32 8009c74: 4619 mov r1, r3 8009c76: 481e ldr r0, [pc, #120] @ (8009cf0 ) 8009c78: f006 fc70 bl 801055c GPIO_InitStruct.Pin = GPIO_PIN_6; 8009c7c: 2340 movs r3, #64 @ 0x40 8009c7e: 623b str r3, [r7, #32] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8009c80: 2302 movs r3, #2 8009c82: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8009c84: 2303 movs r3, #3 8009c86: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8009c88: f107 0320 add.w r3, r7, #32 8009c8c: 4619 mov r1, r3 8009c8e: 4818 ldr r0, [pc, #96] @ (8009cf0 ) 8009c90: f006 fc64 bl 801055c __HAL_AFIO_REMAP_CAN2_ENABLE(); 8009c94: 4b14 ldr r3, [pc, #80] @ (8009ce8 ) 8009c96: 685b ldr r3, [r3, #4] 8009c98: 637b str r3, [r7, #52] @ 0x34 8009c9a: 6b7b ldr r3, [r7, #52] @ 0x34 8009c9c: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 8009ca0: 637b str r3, [r7, #52] @ 0x34 8009ca2: 6b7b ldr r3, [r7, #52] @ 0x34 8009ca4: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 8009ca8: 637b str r3, [r7, #52] @ 0x34 8009caa: 4a0f ldr r2, [pc, #60] @ (8009ce8 ) 8009cac: 6b7b ldr r3, [r7, #52] @ 0x34 8009cae: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(CAN2_TX_IRQn, 0, 0); 8009cb0: 2200 movs r2, #0 8009cb2: 2100 movs r1, #0 8009cb4: 203f movs r0, #63 @ 0x3f 8009cb6: f006 fabc bl 8010232 HAL_NVIC_EnableIRQ(CAN2_TX_IRQn); 8009cba: 203f movs r0, #63 @ 0x3f 8009cbc: f006 fad5 bl 801026a HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 0, 0); 8009cc0: 2200 movs r2, #0 8009cc2: 2100 movs r1, #0 8009cc4: 2041 movs r0, #65 @ 0x41 8009cc6: f006 fab4 bl 8010232 HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); 8009cca: 2041 movs r0, #65 @ 0x41 8009ccc: f006 facd bl 801026a } 8009cd0: bf00 nop 8009cd2: 3738 adds r7, #56 @ 0x38 8009cd4: 46bd mov sp, r7 8009cd6: bd80 pop {r7, pc} 8009cd8: 40006400 .word 0x40006400 8009cdc: 200002f4 .word 0x200002f4 8009ce0: 40021000 .word 0x40021000 8009ce4: 40011400 .word 0x40011400 8009ce8: 40010000 .word 0x40010000 8009cec: 40006800 .word 0x40006800 8009cf0: 40010c00 .word 0x40010c00 08009cf4 : #include "lock.h" #include "psu_control.h" ChargingConnector_t CONN; void CONN_Init(){ 8009cf4: b480 push {r7} 8009cf6: af00 add r7, sp, #0 CONN.connControl = CMD_NONE; 8009cf8: 4b08 ldr r3, [pc, #32] @ (8009d1c ) 8009cfa: 2200 movs r2, #0 8009cfc: 701a strb r2, [r3, #0] CONN.connState = Unknown; 8009cfe: 4b07 ldr r3, [pc, #28] @ (8009d1c ) 8009d00: 2200 movs r2, #0 8009d02: 705a strb r2, [r3, #1] CONN.RequestedVoltage = PSU_MIN_VOLTAGE; 8009d04: 4b05 ldr r3, [pc, #20] @ (8009d1c ) 8009d06: 2200 movs r2, #0 8009d08: f062 0269 orn r2, r2, #105 @ 0x69 8009d0c: 73da strb r2, [r3, #15] 8009d0e: 2200 movs r2, #0 8009d10: 741a strb r2, [r3, #16] } 8009d12: bf00 nop 8009d14: 46bd mov sp, r7 8009d16: bc80 pop {r7} 8009d18: 4770 bx lr 8009d1a: bf00 nop 8009d1c: 200002f8 .word 0x200002f8 08009d20 : void CONN_Loop(){ 8009d20: b580 push {r7, lr} 8009d22: af00 add r7, sp, #0 static CONN_State_t last_connState = Unknown; if(last_connState != CONN.connState){ 8009d24: 4b1e ldr r3, [pc, #120] @ (8009da0 ) 8009d26: 785a ldrb r2, [r3, #1] 8009d28: 4b1e ldr r3, [pc, #120] @ (8009da4 ) 8009d2a: 781b ldrb r3, [r3, #0] 8009d2c: 429a cmp r2, r3 8009d2e: d006 beq.n 8009d3e last_connState = CONN.connState; 8009d30: 4b1b ldr r3, [pc, #108] @ (8009da0 ) 8009d32: 785a ldrb r2, [r3, #1] 8009d34: 4b1b ldr r3, [pc, #108] @ (8009da4 ) 8009d36: 701a strb r2, [r3, #0] CONN.connControl = CMD_NONE; 8009d38: 4b19 ldr r3, [pc, #100] @ (8009da0 ) 8009d3a: 2200 movs r2, #0 8009d3c: 701a strb r2, [r3, #0] } if(GBT_LockState.error){ 8009d3e: 4b1a ldr r3, [pc, #104] @ (8009da8 ) 8009d40: 785b ldrb r3, [r3, #1] 8009d42: 2b00 cmp r3, #0 8009d44: d003 beq.n 8009d4e CONN.chargingError = CONN_ERR_LOCK; 8009d46: 4b16 ldr r3, [pc, #88] @ (8009da0 ) 8009d48: 2204 movs r2, #4 8009d4a: 775a strb r2, [r3, #29] 8009d4c: e016 b.n 8009d7c } else if(PSU0.cont_fault){ 8009d4e: 4b17 ldr r3, [pc, #92] @ (8009dac ) 8009d50: 7b1b ldrb r3, [r3, #12] 8009d52: 2b00 cmp r3, #0 8009d54: d003 beq.n 8009d5e CONN.chargingError = CONN_ERR_CONTACTOR; 8009d56: 4b12 ldr r3, [pc, #72] @ (8009da0 ) 8009d58: 2207 movs r2, #7 8009d5a: 775a strb r2, [r3, #29] 8009d5c: e00e b.n 8009d7c } else if(PSU0.psu_fault){ 8009d5e: 4b13 ldr r3, [pc, #76] @ (8009dac ) 8009d60: 7b5b ldrb r3, [r3, #13] 8009d62: 2b00 cmp r3, #0 8009d64: d003 beq.n 8009d6e CONN.chargingError = CONN_ERR_PSU_FAULT; 8009d66: 4b0e ldr r3, [pc, #56] @ (8009da0 ) 8009d68: 220a movs r2, #10 8009d6a: 775a strb r2, [r3, #29] 8009d6c: e006 b.n 8009d7c // } else if(!CTRL.ac_ok) { // CONN.chargingError = CONN_ERR_AC_FAULT; // } else }else if (CONN.EvConnected == 0){ 8009d6e: 4b0c ldr r3, [pc, #48] @ (8009da0 ) 8009d70: 7f9b ldrb r3, [r3, #30] 8009d72: 2b00 cmp r3, #0 8009d74: d102 bne.n 8009d7c CONN.chargingError = CONN_NO_ERROR; 8009d76: 4b0a ldr r3, [pc, #40] @ (8009da0 ) 8009d78: 2200 movs r2, #0 8009d7a: 775a strb r2, [r3, #29] } if(ED_TraceWarning(CONN.chargingError, 0)) printf("CONN%d Error: %d\n", 0, CONN.chargingError); 8009d7c: 4b08 ldr r3, [pc, #32] @ (8009da0 ) 8009d7e: 7f5b ldrb r3, [r3, #29] 8009d80: 2100 movs r1, #0 8009d82: 4618 mov r0, r3 8009d84: f002 f9b6 bl 800c0f4 8009d88: 4603 mov r3, r0 8009d8a: 2b00 cmp r3, #0 8009d8c: d006 beq.n 8009d9c 8009d8e: 4b04 ldr r3, [pc, #16] @ (8009da0 ) 8009d90: 7f5b ldrb r3, [r3, #29] 8009d92: 461a mov r2, r3 8009d94: 2100 movs r1, #0 8009d96: 4806 ldr r0, [pc, #24] @ (8009db0 ) 8009d98: f00a f9c2 bl 8014120 } 8009d9c: bf00 nop 8009d9e: bd80 pop {r7, pc} 8009da0: 200002f8 .word 0x200002f8 8009da4: 20000317 .word 0x20000317 8009da8: 20000008 .word 0x20000008 8009dac: 20000a0c .word 0x20000a0c 8009db0: 08016520 .word 0x08016520 08009db4 : GBT_StopSource_t GBT_StopSource; extern ConfigBlock_t config; void GBT_Init(){ 8009db4: b580 push {r7, lr} 8009db6: af00 add r7, sp, #0 GBT_State = GBT_DISABLED; 8009db8: 4b0b ldr r3, [pc, #44] @ (8009de8 ) 8009dba: 2210 movs r2, #16 8009dbc: 701a strb r2, [r3, #0] GBT_Reset(); 8009dbe: f000 ff77 bl 800acb0 GBT_MaxLoad.maxOutputVoltage = PSU_MAX_VOLTAGE*10; // 1000V 8009dc2: 4b0a ldr r3, [pc, #40] @ (8009dec ) 8009dc4: f242 7210 movw r2, #10000 @ 0x2710 8009dc8: 801a strh r2, [r3, #0] GBT_MaxLoad.minOutputVoltage = PSU_MIN_VOLTAGE*10; //150V 8009dca: 4b08 ldr r3, [pc, #32] @ (8009dec ) 8009dcc: f240 52dc movw r2, #1500 @ 0x5dc 8009dd0: 805a strh r2, [r3, #2] GBT_MaxLoad.maxOutputCurrent = 4000 - (PSU_MAX_CURRENT*10); //100A 8009dd2: 4b06 ldr r3, [pc, #24] @ (8009dec ) 8009dd4: f640 32b8 movw r2, #3000 @ 0xbb8 8009dd8: 809a strh r2, [r3, #4] GBT_MaxLoad.minOutputCurrent = 4000 - (PSU_MIN_CURRENT*10); //1A 8009dda: 4b04 ldr r3, [pc, #16] @ (8009dec ) 8009ddc: f640 7296 movw r2, #3990 @ 0xf96 8009de0: 80da strh r2, [r3, #6] } 8009de2: bf00 nop 8009de4: bd80 pop {r7, pc} 8009de6: bf00 nop 8009de8: 20000318 .word 0x20000318 8009dec: 20000330 .word 0x20000330 08009df0 : void GBT_SetConfig(){ 8009df0: b580 push {r7, lr} 8009df2: af00 add r7, sp, #0 set_Time(config.unixTime); 8009df4: 4b0c ldr r3, [pc, #48] @ (8009e28 ) 8009df6: f8d3 3007 ldr.w r3, [r3, #7] 8009dfa: 4618 mov r0, r3 8009dfc: f003 ff48 bl 800dc90 GBT_ChargerInfo.chargerLocation[0] = config.location[0]; 8009e00: 4b09 ldr r3, [pc, #36] @ (8009e28 ) 8009e02: 781a ldrb r2, [r3, #0] 8009e04: 4b09 ldr r3, [pc, #36] @ (8009e2c ) 8009e06: 715a strb r2, [r3, #5] GBT_ChargerInfo.chargerLocation[1] = config.location[1]; 8009e08: 4b07 ldr r3, [pc, #28] @ (8009e28 ) 8009e0a: 785a ldrb r2, [r3, #1] 8009e0c: 4b07 ldr r3, [pc, #28] @ (8009e2c ) 8009e0e: 719a strb r2, [r3, #6] GBT_ChargerInfo.chargerLocation[2] = config.location[2]; 8009e10: 4b05 ldr r3, [pc, #20] @ (8009e28 ) 8009e12: 789a ldrb r2, [r3, #2] 8009e14: 4b05 ldr r3, [pc, #20] @ (8009e2c ) 8009e16: 71da strb r2, [r3, #7] GBT_ChargerInfo.chargerNumber = config.chargerNumber; 8009e18: 4b03 ldr r3, [pc, #12] @ (8009e28 ) 8009e1a: f8d3 3003 ldr.w r3, [r3, #3] 8009e1e: 4a03 ldr r2, [pc, #12] @ (8009e2c ) 8009e20: f8c2 3001 str.w r3, [r2, #1] } 8009e24: bf00 nop 8009e26: bd80 pop {r7, pc} 8009e28: 2000006c .word 0x2000006c 8009e2c: 20000338 .word 0x20000338 08009e30 : void GBT_ChargerTask(){ 8009e30: b5b0 push {r4, r5, r7, lr} 8009e32: b084 sub sp, #16 8009e34: af02 add r7, sp, #8 //GBT_LockTask(); if(j_rx.state == 2){ 8009e36: 4bab ldr r3, [pc, #684] @ (800a0e4 ) 8009e38: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 8009e3c: 2b02 cmp r3, #2 8009e3e: f040 80d1 bne.w 8009fe4 switch (j_rx.PGN){ 8009e42: 4ba8 ldr r3, [pc, #672] @ (800a0e4 ) 8009e44: f8d3 3100 ldr.w r3, [r3, #256] @ 0x100 8009e48: f5b3 5f1c cmp.w r3, #9984 @ 0x2700 8009e4c: d047 beq.n 8009ede 8009e4e: f5b3 5f1c cmp.w r3, #9984 @ 0x2700 8009e52: f200 80c3 bhi.w 8009fdc 8009e56: f5b3 5fe0 cmp.w r3, #7168 @ 0x1c00 8009e5a: f000 80b6 beq.w 8009fca 8009e5e: f5b3 5fe0 cmp.w r3, #7168 @ 0x1c00 8009e62: f200 80bb bhi.w 8009fdc 8009e66: f5b3 5fb8 cmp.w r3, #5888 @ 0x1700 8009e6a: f000 80b2 beq.w 8009fd2 8009e6e: f5b3 5fb8 cmp.w r3, #5888 @ 0x1700 8009e72: f200 80b3 bhi.w 8009fdc 8009e76: f5b3 5fb0 cmp.w r3, #5632 @ 0x1600 8009e7a: f000 80ac beq.w 8009fd6 8009e7e: f5b3 5fb0 cmp.w r3, #5632 @ 0x1600 8009e82: f200 80ab bhi.w 8009fdc 8009e86: f5b3 5fa8 cmp.w r3, #5376 @ 0x1500 8009e8a: f000 80a6 beq.w 8009fda 8009e8e: f5b3 5fa8 cmp.w r3, #5376 @ 0x1500 8009e92: f200 80a3 bhi.w 8009fdc 8009e96: f5b3 5f98 cmp.w r3, #4864 @ 0x1300 8009e9a: f000 8086 beq.w 8009faa 8009e9e: f5b3 5f98 cmp.w r3, #4864 @ 0x1300 8009ea2: f200 809b bhi.w 8009fdc 8009ea6: f5b3 5f88 cmp.w r3, #4352 @ 0x1100 8009eaa: d06f beq.n 8009f8c 8009eac: f5b3 5f88 cmp.w r3, #4352 @ 0x1100 8009eb0: f200 8094 bhi.w 8009fdc 8009eb4: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009eb8: d046 beq.n 8009f48 8009eba: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009ebe: f200 808d bhi.w 8009fdc 8009ec2: f5b3 6f10 cmp.w r3, #2304 @ 0x900 8009ec6: d02c beq.n 8009f22 8009ec8: f5b3 6f10 cmp.w r3, #2304 @ 0x900 8009ecc: f200 8086 bhi.w 8009fdc 8009ed0: f5b3 7f00 cmp.w r3, #512 @ 0x200 8009ed4: d00b beq.n 8009eee 8009ed6: f5b3 6fc0 cmp.w r3, #1536 @ 0x600 8009eda: d018 beq.n 8009f0e 8009edc: e07e b.n 8009fdc case 0x2700: //PGN BHM GBT_BHM_recv = 1; 8009ede: 4b82 ldr r3, [pc, #520] @ (800a0e8 ) 8009ee0: 2201 movs r2, #1 8009ee2: 701a strb r2, [r3, #0] memcpy (&GBT_MaxVoltage, j_rx.data, sizeof(GBT_MaxVoltage)); 8009ee4: 4b7f ldr r3, [pc, #508] @ (800a0e4 ) 8009ee6: 881a ldrh r2, [r3, #0] 8009ee8: 4b80 ldr r3, [pc, #512] @ (800a0ec ) 8009eea: 801a strh r2, [r3, #0] break; 8009eec: e076 b.n 8009fdc case 0x0200: //PGN BRM LONG GBT_BAT_INFO_recv = 1; 8009eee: 4b80 ldr r3, [pc, #512] @ (800a0f0 ) 8009ef0: 2201 movs r2, #1 8009ef2: 701a strb r2, [r3, #0] memcpy (&GBT_EVInfo, j_rx.data, sizeof(GBT_EVInfo)); 8009ef4: 4a7f ldr r2, [pc, #508] @ (800a0f4 ) 8009ef6: 4b7b ldr r3, [pc, #492] @ (800a0e4 ) 8009ef8: 4614 mov r4, r2 8009efa: 461d mov r5, r3 8009efc: cd0f ldmia r5!, {r0, r1, r2, r3} 8009efe: c40f stmia r4!, {r0, r1, r2, r3} 8009f00: cd0f ldmia r5!, {r0, r1, r2, r3} 8009f02: c40f stmia r4!, {r0, r1, r2, r3} 8009f04: cd0f ldmia r5!, {r0, r1, r2, r3} 8009f06: c40f stmia r4!, {r0, r1, r2, r3} 8009f08: 682b ldr r3, [r5, #0] 8009f0a: 7023 strb r3, [r4, #0] break; 8009f0c: e066 b.n 8009fdc case 0x0600: //PGN BCP LONG GBT_BAT_STAT_recv = 1; 8009f0e: 4b7a ldr r3, [pc, #488] @ (800a0f8 ) 8009f10: 2201 movs r2, #1 8009f12: 701a strb r2, [r3, #0] memcpy (&GBT_BATStat, j_rx.data, sizeof(GBT_BATStat)); 8009f14: 4a79 ldr r2, [pc, #484] @ (800a0fc ) 8009f16: 4b73 ldr r3, [pc, #460] @ (800a0e4 ) 8009f18: 4614 mov r4, r2 8009f1a: cb0f ldmia r3, {r0, r1, r2, r3} 8009f1c: c407 stmia r4!, {r0, r1, r2} 8009f1e: 7023 strb r3, [r4, #0] break; 8009f20: e05c b.n 8009fdc case 0x0900: //PGN BRO GBT_BRO_recv = 1; 8009f22: 4b77 ldr r3, [pc, #476] @ (800a100 ) 8009f24: 2201 movs r2, #1 8009f26: 701a strb r2, [r3, #0] if(j_rx.data[0] == 0xAA) EV_ready = 1; 8009f28: 4b6e ldr r3, [pc, #440] @ (800a0e4 ) 8009f2a: 781b ldrb r3, [r3, #0] 8009f2c: 2baa cmp r3, #170 @ 0xaa 8009f2e: d103 bne.n 8009f38 8009f30: 4b74 ldr r3, [pc, #464] @ (800a104 ) 8009f32: 2201 movs r2, #1 8009f34: 701a strb r2, [r3, #0] 8009f36: e002 b.n 8009f3e else EV_ready = 0; 8009f38: 4b72 ldr r3, [pc, #456] @ (800a104 ) 8009f3a: 2200 movs r2, #0 8009f3c: 701a strb r2, [r3, #0] GBT_BRO = j_rx.data[0]; 8009f3e: 4b69 ldr r3, [pc, #420] @ (800a0e4 ) 8009f40: 781a ldrb r2, [r3, #0] 8009f42: 4b71 ldr r3, [pc, #452] @ (800a108 ) 8009f44: 701a strb r2, [r3, #0] break; 8009f46: e049 b.n 8009fdc case 0x1000: //PGN BCL GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 8009f48: f004 fc9c bl 800e884 8009f4c: 4603 mov r3, r0 8009f4e: 4a6f ldr r2, [pc, #444] @ (800a10c ) 8009f50: 6013 str r3, [r2, #0] //TODO: power block memcpy (&GBT_ReqPower, j_rx.data, sizeof(GBT_ReqPower)); 8009f52: 4b6f ldr r3, [pc, #444] @ (800a110 ) 8009f54: 4a63 ldr r2, [pc, #396] @ (800a0e4 ) 8009f56: e892 0003 ldmia.w r2, {r0, r1} 8009f5a: 6018 str r0, [r3, #0] 8009f5c: 3304 adds r3, #4 8009f5e: 7019 strb r1, [r3, #0] uint16_t volt = GBT_ReqPower.requestedVoltage; // 0.1V/bit 8009f60: 4b6b ldr r3, [pc, #428] @ (800a110 ) 8009f62: 881b ldrh r3, [r3, #0] 8009f64: 80fb strh r3, [r7, #6] uint16_t curr = 4000 - GBT_ReqPower.requestedCurrent; // 0.1A/bit 8009f66: 4b6a ldr r3, [pc, #424] @ (800a110 ) 8009f68: 885b ldrh r3, [r3, #2] 8009f6a: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 8009f6e: 80bb strh r3, [r7, #4] CONN.RequestedVoltage = volt / 10; // В 8009f70: 88fb ldrh r3, [r7, #6] 8009f72: 4a68 ldr r2, [pc, #416] @ (800a114 ) 8009f74: fba2 2303 umull r2, r3, r2, r3 8009f78: 08db lsrs r3, r3, #3 8009f7a: b29a uxth r2, r3 8009f7c: 4b66 ldr r3, [pc, #408] @ (800a118 ) 8009f7e: f8a3 200f strh.w r2, [r3, #15] CONN.WantedCurrent = curr; // 0.1A 8009f82: 4b65 ldr r3, [pc, #404] @ (800a118 ) 8009f84: 88ba ldrh r2, [r7, #4] 8009f86: f8a3 201b strh.w r2, [r3, #27] break; 8009f8a: e027 b.n 8009fdc case 0x1100: //PGN BCS GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 8009f8c: f004 fc7a bl 800e884 8009f90: 4603 mov r3, r0 8009f92: 4a5e ldr r2, [pc, #376] @ (800a10c ) 8009f94: 6013 str r3, [r2, #0] //TODO memcpy (&GBT_ChargingStatus, j_rx.data, sizeof(GBT_ChargingStatus)); 8009f96: 4b61 ldr r3, [pc, #388] @ (800a11c ) 8009f98: 4a52 ldr r2, [pc, #328] @ (800a0e4 ) 8009f9a: ca07 ldmia r2, {r0, r1, r2} 8009f9c: c303 stmia r3!, {r0, r1} 8009f9e: 701a strb r2, [r3, #0] CONN.SOC = GBT_ChargingStatus.currentChargeState; 8009fa0: 4b5e ldr r3, [pc, #376] @ (800a11c ) 8009fa2: 799a ldrb r2, [r3, #6] 8009fa4: 4b5c ldr r3, [pc, #368] @ (800a118 ) 8009fa6: 709a strb r2, [r3, #2] break; 8009fa8: e018 b.n 8009fdc case 0x1300: //PGN BSM GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 8009faa: f004 fc6b bl 800e884 8009fae: 4603 mov r3, r0 8009fb0: 4a56 ldr r2, [pc, #344] @ (800a10c ) 8009fb2: 6013 str r3, [r2, #0] //TODO memcpy (&GBT_BatteryStatus, j_rx.data, sizeof(GBT_BatteryStatus)); 8009fb4: 4b5a ldr r3, [pc, #360] @ (800a120 ) 8009fb6: 4a4b ldr r2, [pc, #300] @ (800a0e4 ) 8009fb8: e892 0003 ldmia.w r2, {r0, r1} 8009fbc: 6018 str r0, [r3, #0] 8009fbe: 3304 adds r3, #4 8009fc0: 8019 strh r1, [r3, #0] 8009fc2: 3302 adds r3, #2 8009fc4: 0c0a lsrs r2, r1, #16 8009fc6: 701a strb r2, [r3, #0] break; 8009fc8: e008 b.n 8009fdc // case 0x1900: //PGN BST // break; case 0x1C00: //PGN BSD //TODO SOC Voltage Temp GBT_BSD_recv = 1; 8009fca: 4b56 ldr r3, [pc, #344] @ (800a124 ) 8009fcc: 2201 movs r2, #1 8009fce: 701a strb r2, [r3, #0] break; 8009fd0: e004 b.n 8009fdc break; 8009fd2: bf00 nop 8009fd4: e002 b.n 8009fdc break; 8009fd6: bf00 nop 8009fd8: e000 b.n 8009fdc break; 8009fda: bf00 nop // break; //BSM BMV BMT BSP BST BSD BEM } j_rx.state = 0; 8009fdc: 4b41 ldr r3, [pc, #260] @ (800a0e4 ) 8009fde: 2200 movs r2, #0 8009fe0: f883 210a strb.w r2, [r3, #266] @ 0x10a } if((HAL_GetTick() - GBT_delay_start) < GBT_delay){ 8009fe4: f004 fc4e bl 800e884 8009fe8: 4602 mov r2, r0 8009fea: 4b4f ldr r3, [pc, #316] @ (800a128 ) 8009fec: 681b ldr r3, [r3, #0] 8009fee: 1ad2 subs r2, r2, r3 8009ff0: 4b4e ldr r3, [pc, #312] @ (800a12c ) 8009ff2: 681b ldr r3, [r3, #0] 8009ff4: 429a cmp r2, r3 8009ff6: f0c0 84c7 bcc.w 800a988 //waiting }else switch (GBT_State){ 8009ffa: 4b4d ldr r3, [pc, #308] @ (800a130 ) 8009ffc: 781b ldrb r3, [r3, #0] 8009ffe: 3b10 subs r3, #16 800a000: 2b12 cmp r3, #18 800a002: f200 84a2 bhi.w 800a94a 800a006: a201 add r2, pc, #4 @ (adr r2, 800a00c ) 800a008: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a00c: 0800a059 .word 0x0800a059 800a010: 0800a94b .word 0x0800a94b 800a014: 0800a94b .word 0x0800a94b 800a018: 0800a07f .word 0x0800a07f 800a01c: 0800a091 .word 0x0800a091 800a020: 0800a141 .word 0x0800a141 800a024: 0800a18b .word 0x0800a18b 800a028: 0800a1fd .word 0x0800a1fd 800a02c: 0800a29f .word 0x0800a29f 800a030: 0800a2f1 .word 0x0800a2f1 800a034: 0800a47d .word 0x0800a47d 800a038: 0800a581 .word 0x0800a581 800a03c: 0800a613 .word 0x0800a613 800a040: 0800a669 .word 0x0800a669 800a044: 0800a6db .word 0x0800a6db 800a048: 0800a8c3 .word 0x0800a8c3 800a04c: 0800a905 .word 0x0800a905 800a050: 0800a925 .word 0x0800a925 800a054: 0800a937 .word 0x0800a937 case GBT_DISABLED: RELAY_Write(RELAY_AUX0, 0); 800a058: 2100 movs r1, #0 800a05a: 2000 movs r0, #0 800a05c: f7ff fb46 bl 80096ec RELAY_Write(RELAY_AUX1, 0); 800a060: 2100 movs r1, #0 800a062: 2001 movs r0, #1 800a064: f7ff fb42 bl 80096ec if(connectorState == Preparing){ 800a068: 4b32 ldr r3, [pc, #200] @ (800a134 ) 800a06a: 781b ldrb r3, [r3, #0] 800a06c: 2b03 cmp r3, #3 800a06e: f040 8470 bne.w 800a952 GBT_Reset(); 800a072: f000 fe1d bl 800acb0 GBT_Start();//TODO IF protections (maybe not needed) 800a076: f000 fea9 bl 800adcc } break; 800a07a: f000 bc6a b.w 800a952 case GBT_S3_STARTED: GBT_SwitchState(GBT_S31_WAIT_BHM); 800a07e: 2014 movs r0, #20 800a080: f000 fcb4 bl 800a9ec GBT_Delay(500); 800a084: f44f 70fa mov.w r0, #500 @ 0x1f4 800a088: f000 fd68 bl 800ab5c break; 800a08c: f000 bc7c b.w 800a988 case GBT_S31_WAIT_BHM: if(j_rx.state == 0) GBT_SendCHM(); 800a090: 4b14 ldr r3, [pc, #80] @ (800a0e4 ) 800a092: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a096: 2b00 cmp r3, #0 800a098: d101 bne.n 800a09e 800a09a: f001 fa95 bl 800b5c8 GBT_Delay(250); 800a09e: 20fa movs r0, #250 @ 0xfa 800a0a0: f000 fd5c bl 800ab5c if(GBT_BHM_recv) { 800a0a4: 4b10 ldr r3, [pc, #64] @ (800a0e8 ) 800a0a6: 781b ldrb r3, [r3, #0] 800a0a8: 2b00 cmp r3, #0 800a0aa: d002 beq.n 800a0b2 GBT_SwitchState(GBT_S4_WAIT_PSU_READY); 800a0ac: 2015 movs r0, #21 800a0ae: f000 fc9d bl 800a9ec } //Timeout 10S if((GBT_BHM_recv == 0) && (GBT_StateTick()>10000)) { //BHM Timeout 800a0b2: 4b0d ldr r3, [pc, #52] @ (800a0e8 ) 800a0b4: 781b ldrb r3, [r3, #0] 800a0b6: 2b00 cmp r3, #0 800a0b8: f040 844d bne.w 800a956 800a0bc: f000 fd42 bl 800ab44 800a0c0: 4603 mov r3, r0 800a0c2: f242 7210 movw r2, #10000 @ 0x2710 800a0c6: 4293 cmp r3, r2 800a0c8: f240 8445 bls.w 800a956 GBT_Error(0xFCF0C0FC); 800a0cc: 481a ldr r0, [pc, #104] @ (800a138 ) 800a0ce: f000 fdd3 bl 800ac78 CONN.chargingError = CONN_ERR_EV_COMM; 800a0d2: 4b11 ldr r3, [pc, #68] @ (800a118 ) 800a0d4: 2209 movs r2, #9 800a0d6: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "BHM Timeout\n"); 800a0d8: 4918 ldr r1, [pc, #96] @ (800a13c ) 800a0da: 2004 movs r0, #4 800a0dc: f001 fa1a bl 800b514 } break; 800a0e0: f000 bc39 b.w 800a956 800a0e4: 20000870 .word 0x20000870 800a0e8: 2000032b .word 0x2000032b 800a0ec: 20000340 .word 0x20000340 800a0f0: 20000328 .word 0x20000328 800a0f4: 20000344 .word 0x20000344 800a0f8: 20000329 .word 0x20000329 800a0fc: 20000378 .word 0x20000378 800a100: 2000032a .word 0x2000032a 800a104: 2000032d .word 0x2000032d 800a108: 200003bc .word 0x200003bc 800a10c: 200003c4 .word 0x200003c4 800a110: 20000388 .word 0x20000388 800a114: cccccccd .word 0xcccccccd 800a118: 200002f8 .word 0x200002f8 800a11c: 20000398 .word 0x20000398 800a120: 200003a4 .word 0x200003a4 800a124: 2000032c .word 0x2000032c 800a128: 20000320 .word 0x20000320 800a12c: 20000324 .word 0x20000324 800a130: 20000318 .word 0x20000318 800a134: 200003d1 .word 0x200003d1 800a138: fcf0c0fc .word 0xfcf0c0fc 800a13c: 08016568 .word 0x08016568 case GBT_S4_WAIT_PSU_READY: if(j_rx.state == 0) GBT_SendCHM(); 800a140: 4baf ldr r3, [pc, #700] @ (800a400 ) 800a142: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a146: 2b00 cmp r3, #0 800a148: d101 bne.n 800a14e 800a14a: f001 fa3d bl 800b5c8 GBT_Delay(250); 800a14e: 20fa movs r0, #250 @ 0xfa 800a150: f000 fd04 bl 800ab5c if(PSU0.ready){ 800a154: 4bab ldr r3, [pc, #684] @ (800a404 ) 800a156: 7a5b ldrb r3, [r3, #9] 800a158: 2b00 cmp r3, #0 800a15a: d002 beq.n 800a162 GBT_SwitchState(GBT_S4_WAIT_PSU_ON); 800a15c: 2016 movs r0, #22 800a15e: f000 fc45 bl 800a9ec } if(GBT_StateTick()>10000){ 800a162: f000 fcef bl 800ab44 800a166: 4603 mov r3, r0 800a168: f242 7210 movw r2, #10000 @ 0x2710 800a16c: 4293 cmp r3, r2 800a16e: f240 83f4 bls.w 800a95a GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a172: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a176: f000 fd2b bl 800abd0 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a17a: 4ba3 ldr r3, [pc, #652] @ (800a408 ) 800a17c: 220a movs r2, #10 800a17e: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU ready timeout, stopping...\n"); 800a180: 49a2 ldr r1, [pc, #648] @ (800a40c ) 800a182: 2004 movs r0, #4 800a184: f001 f9c6 bl 800b514 break; 800a188: e3fe b.n 800a988 } break; case GBT_S4_WAIT_PSU_ON: if(j_rx.state == 0) GBT_SendCHM(); 800a18a: 4b9d ldr r3, [pc, #628] @ (800a400 ) 800a18c: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a190: 2b00 cmp r3, #0 800a192: d101 bne.n 800a198 800a194: f001 fa18 bl 800b5c8 GBT_Delay(250); 800a198: 20fa movs r0, #250 @ 0xfa 800a19a: f000 fcdf bl 800ab5c CONN.RequestedVoltage = GBT_MaxVoltage.maxOutputVoltage / 10; // 0.1V -> V 800a19e: 4b9c ldr r3, [pc, #624] @ (800a410 ) 800a1a0: 881b ldrh r3, [r3, #0] 800a1a2: 4a9c ldr r2, [pc, #624] @ (800a414 ) 800a1a4: fba2 2303 umull r2, r3, r2, r3 800a1a8: 08db lsrs r3, r3, #3 800a1aa: b29a uxth r2, r3 800a1ac: 4b96 ldr r3, [pc, #600] @ (800a408 ) 800a1ae: f8a3 200f strh.w r2, [r3, #15] CONN.WantedCurrent = 10; // 1A max (0.1A units) 800a1b2: 4b95 ldr r3, [pc, #596] @ (800a408 ) 800a1b4: 2200 movs r2, #0 800a1b6: f042 020a orr.w r2, r2, #10 800a1ba: 76da strb r2, [r3, #27] 800a1bc: 2200 movs r2, #0 800a1be: 771a strb r2, [r3, #28] CONN.EnableOutput = 1; 800a1c0: 4b91 ldr r3, [pc, #580] @ (800a408 ) 800a1c2: 2201 movs r2, #1 800a1c4: 75da strb r2, [r3, #23] if(PSU0.state == PSU_CONNECTED){ 800a1c6: 4b8f ldr r3, [pc, #572] @ (800a404 ) 800a1c8: 79db ldrb r3, [r3, #7] 800a1ca: 2b05 cmp r3, #5 800a1cc: d102 bne.n 800a1d4 GBT_SwitchState(GBT_S4_ISOTEST); 800a1ce: 2017 movs r0, #23 800a1d0: f000 fc0c bl 800a9ec } if(GBT_StateTick()>10000){ 800a1d4: f000 fcb6 bl 800ab44 800a1d8: 4603 mov r3, r0 800a1da: f242 7210 movw r2, #10000 @ 0x2710 800a1de: 4293 cmp r3, r2 800a1e0: f240 83bd bls.w 800a95e GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a1e4: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a1e8: f000 fcf2 bl 800abd0 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a1ec: 4b86 ldr r3, [pc, #536] @ (800a408 ) 800a1ee: 220a movs r2, #10 800a1f0: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU on timeout, stopping...\n"); 800a1f2: 4989 ldr r1, [pc, #548] @ (800a418 ) 800a1f4: 2004 movs r0, #4 800a1f6: f001 f98d bl 800b514 break; 800a1fa: e3c5 b.n 800a988 } break; case GBT_S4_ISOTEST: if(j_rx.state == 0) GBT_SendCHM(); 800a1fc: 4b80 ldr r3, [pc, #512] @ (800a400 ) 800a1fe: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a202: 2b00 cmp r3, #0 800a204: d101 bne.n 800a20a 800a206: f001 f9df bl 800b5c8 GBT_Delay(250); 800a20a: 20fa movs r0, #250 @ 0xfa 800a20c: f000 fca6 bl 800ab5c //TODO: Isolation test trigger if(CONN.chargingError != CONN_NO_ERROR){ 800a210: 4b7d ldr r3, [pc, #500] @ (800a408 ) 800a212: 7f5b ldrb r3, [r3, #29] 800a214: 2b00 cmp r3, #0 800a216: d003 beq.n 800a220 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a218: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a21c: f000 fcd8 bl 800abd0 } if(GBT_StateTick()>5000){ 800a220: f000 fc90 bl 800ab44 800a224: 4603 mov r3, r0 800a226: f241 3288 movw r2, #5000 @ 0x1388 800a22a: 4293 cmp r3, r2 800a22c: d902 bls.n 800a234 GBT_SwitchState(GBT_S4_WAIT_PSU_OFF); 800a22e: 2018 movs r0, #24 800a230: f000 fbdc bl 800a9ec } if(ISO.isolationResistance < (ISO.voltageComm/2)){ // *100/1000 800a234: 4b79 ldr r3, [pc, #484] @ (800a41c ) 800a236: f8b3 3001 ldrh.w r3, [r3, #1] 800a23a: b29b uxth r3, r3 800a23c: 4619 mov r1, r3 800a23e: 4b77 ldr r3, [pc, #476] @ (800a41c ) 800a240: f9b3 3007 ldrsh.w r3, [r3, #7] 800a244: b21b sxth r3, r3 800a246: 0fda lsrs r2, r3, #31 800a248: 4413 add r3, r2 800a24a: 105b asrs r3, r3, #1 800a24c: b21b sxth r3, r3 800a24e: 4299 cmp r1, r3 800a250: da06 bge.n 800a260 CONN.chargingError = CONN_ERR_INSULATION; 800a252: 4b6d ldr r3, [pc, #436] @ (800a408 ) 800a254: 2201 movs r2, #1 800a256: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Isolation warning\n"); 800a258: 4971 ldr r1, [pc, #452] @ (800a420 ) 800a25a: 2005 movs r0, #5 800a25c: f001 f95a bl 800b514 } // 500 Ohm/V if(ISO.isolationResistance < (ISO.voltageComm/10)){ // *100/1000 800a260: 4b6e ldr r3, [pc, #440] @ (800a41c ) 800a262: f8b3 3001 ldrh.w r3, [r3, #1] 800a266: b29b uxth r3, r3 800a268: 4619 mov r1, r3 800a26a: 4b6c ldr r3, [pc, #432] @ (800a41c ) 800a26c: f9b3 3007 ldrsh.w r3, [r3, #7] 800a270: b21b sxth r3, r3 800a272: 4a6c ldr r2, [pc, #432] @ (800a424 ) 800a274: fb82 0203 smull r0, r2, r2, r3 800a278: 1092 asrs r2, r2, #2 800a27a: 17db asrs r3, r3, #31 800a27c: 1ad3 subs r3, r2, r3 800a27e: b21b sxth r3, r3 800a280: 4299 cmp r1, r3 800a282: f280 836e bge.w 800a962 CONN.chargingError = CONN_ERR_INSULATION; 800a286: 4b60 ldr r3, [pc, #384] @ (800a408 ) 800a288: 2201 movs r2, #1 800a28a: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Current leakage, insulation error, stopping...\n"); 800a28c: 4966 ldr r1, [pc, #408] @ (800a428 ) 800a28e: 2005 movs r0, #5 800a290: f001 f940 bl 800b514 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a294: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a298: f000 fc9a bl 800abd0 } // 100 Ohm/V break; 800a29c: e361 b.n 800a962 case GBT_S4_WAIT_PSU_OFF: CONN.RequestedVoltage = 0; 800a29e: 4b5a ldr r3, [pc, #360] @ (800a408 ) 800a2a0: 2200 movs r2, #0 800a2a2: 73da strb r2, [r3, #15] 800a2a4: 2200 movs r2, #0 800a2a6: 741a strb r2, [r3, #16] CONN.WantedCurrent = 0; 800a2a8: 4b57 ldr r3, [pc, #348] @ (800a408 ) 800a2aa: 2200 movs r2, #0 800a2ac: 76da strb r2, [r3, #27] 800a2ae: 2200 movs r2, #0 800a2b0: 771a strb r2, [r3, #28] CONN.EnableOutput = 0; 800a2b2: 4b55 ldr r3, [pc, #340] @ (800a408 ) 800a2b4: 2200 movs r2, #0 800a2b6: 75da strb r2, [r3, #23] if(GBT_StateTick()>5000){ 800a2b8: f000 fc44 bl 800ab44 800a2bc: 4603 mov r3, r0 800a2be: f241 3288 movw r2, #5000 @ 0x1388 800a2c2: 4293 cmp r3, r2 800a2c4: d90b bls.n 800a2de GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a2c6: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a2ca: f000 fc81 bl 800abd0 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a2ce: 4b4e ldr r3, [pc, #312] @ (800a408 ) 800a2d0: 220a movs r2, #10 800a2d2: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU off timeout, stopping...\n"); 800a2d4: 4955 ldr r1, [pc, #340] @ (800a42c ) 800a2d6: 2004 movs r0, #4 800a2d8: f001 f91c bl 800b514 break; 800a2dc: e354 b.n 800a988 } if(PSU0.PSU_enabled == 0){ 800a2de: 4b49 ldr r3, [pc, #292] @ (800a404 ) 800a2e0: 7a9b ldrb r3, [r3, #10] 800a2e2: 2b00 cmp r3, #0 800a2e4: f040 833f bne.w 800a966 GBT_SwitchState(GBT_S5_BAT_INFO); 800a2e8: 2019 movs r0, #25 800a2ea: f000 fb7f bl 800a9ec } break; 800a2ee: e33a b.n 800a966 case GBT_S5_BAT_INFO: if(j_rx.state == 0) GBT_SendCRM(0x00); 800a2f0: 4b43 ldr r3, [pc, #268] @ (800a400 ) 800a2f2: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a2f6: 2b00 cmp r3, #0 800a2f8: d102 bne.n 800a300 800a2fa: 2000 movs r0, #0 800a2fc: f001 f978 bl 800b5f0 GBT_Delay(250); 800a300: 20fa movs r0, #250 @ 0xfa 800a302: f000 fc2b bl 800ab5c if(GBT_BAT_INFO_recv){ //BRM 800a306: 4b4a ldr r3, [pc, #296] @ (800a430 ) 800a308: 781b ldrb r3, [r3, #0] 800a30a: 2b00 cmp r3, #0 800a30c: d060 beq.n 800a3d0 //Got battery info GBT_SwitchState(GBT_S6_BAT_STAT); 800a30e: 201a movs r0, #26 800a310: f000 fb6c bl 800a9ec log_printf(LOG_INFO, "EV info:\n"); 800a314: 4947 ldr r1, [pc, #284] @ (800a434 ) 800a316: 2007 movs r0, #7 800a318: f001 f8fc bl 800b514 log_printf(LOG_INFO, "GBT_ver V%d.%d%d\n",GBT_EVInfo.version[0],GBT_EVInfo.version[1],GBT_EVInfo.version[2]); 800a31c: 4b46 ldr r3, [pc, #280] @ (800a438 ) 800a31e: 781b ldrb r3, [r3, #0] 800a320: 461a mov r2, r3 800a322: 4b45 ldr r3, [pc, #276] @ (800a438 ) 800a324: 785b ldrb r3, [r3, #1] 800a326: 4619 mov r1, r3 800a328: 4b43 ldr r3, [pc, #268] @ (800a438 ) 800a32a: 789b ldrb r3, [r3, #2] 800a32c: 9300 str r3, [sp, #0] 800a32e: 460b mov r3, r1 800a330: 4942 ldr r1, [pc, #264] @ (800a43c ) 800a332: 2007 movs r0, #7 800a334: f001 f8ee bl 800b514 log_printf(LOG_INFO, "Battery type: %d\n",GBT_EVInfo.batteryType); 800a338: 4b3f ldr r3, [pc, #252] @ (800a438 ) 800a33a: 78db ldrb r3, [r3, #3] 800a33c: 461a mov r2, r3 800a33e: 4940 ldr r1, [pc, #256] @ (800a440 ) 800a340: 2007 movs r0, #7 800a342: f001 f8e7 bl 800b514 log_printf(LOG_INFO, "Battery capacity: %d\n", GBT_EVInfo.batteryCapacity); // 0.1Ah/bit 800a346: 4b3c ldr r3, [pc, #240] @ (800a438 ) 800a348: 889b ldrh r3, [r3, #4] 800a34a: 461a mov r2, r3 800a34c: 493d ldr r1, [pc, #244] @ (800a444 ) 800a34e: 2007 movs r0, #7 800a350: f001 f8e0 bl 800b514 log_printf(LOG_INFO, "Battery voltage: %d\n", GBT_EVInfo.batteryVoltage); // 0.1V/bit 800a354: 4b38 ldr r3, [pc, #224] @ (800a438 ) 800a356: 88db ldrh r3, [r3, #6] 800a358: 461a mov r2, r3 800a35a: 493b ldr r1, [pc, #236] @ (800a448 ) 800a35c: 2007 movs r0, #7 800a35e: f001 f8d9 bl 800b514 log_printf(LOG_INFO, "Battery vendor: %.4s\n", GBT_EVInfo.batteryVendor); // Battery vendor (ASCII string) 800a362: 4a3a ldr r2, [pc, #232] @ (800a44c ) 800a364: 493a ldr r1, [pc, #232] @ (800a450 ) 800a366: 2007 movs r0, #7 800a368: f001 f8d4 bl 800b514 log_printf(LOG_INFO, "Battery SN: %lu\n", GBT_EVInfo.batterySN); // int 800a36c: 4b32 ldr r3, [pc, #200] @ (800a438 ) 800a36e: 68db ldr r3, [r3, #12] 800a370: 461a mov r2, r3 800a372: 4938 ldr r1, [pc, #224] @ (800a454 ) 800a374: 2007 movs r0, #7 800a376: f001 f8cd bl 800b514 log_printf(LOG_INFO, "Battery manufacture date: %02d.%02d.%04d\n", GBT_EVInfo.batteryManuD, GBT_EVInfo.batteryManuM ,GBT_EVInfo.batteryManuY+1985); // year (offset 1985) 800a37a: 4b2f ldr r3, [pc, #188] @ (800a438 ) 800a37c: 7c9b ldrb r3, [r3, #18] 800a37e: 461a mov r2, r3 800a380: 4b2d ldr r3, [pc, #180] @ (800a438 ) 800a382: 7c5b ldrb r3, [r3, #17] 800a384: 4619 mov r1, r3 800a386: 4b2c ldr r3, [pc, #176] @ (800a438 ) 800a388: 7c1b ldrb r3, [r3, #16] 800a38a: f203 73c1 addw r3, r3, #1985 @ 0x7c1 800a38e: 9300 str r3, [sp, #0] 800a390: 460b mov r3, r1 800a392: 4931 ldr r1, [pc, #196] @ (800a458 ) 800a394: 2007 movs r0, #7 800a396: f001 f8bd bl 800b514 log_printf(LOG_INFO, "Battery cycles: %d\n", GBT_EVInfo.batteryCycleCount); //uint24_t 800a39a: 4b27 ldr r3, [pc, #156] @ (800a438 ) 800a39c: 7cda ldrb r2, [r3, #19] 800a39e: 8a9b ldrh r3, [r3, #20] 800a3a0: 021b lsls r3, r3, #8 800a3a2: 4313 orrs r3, r2 800a3a4: 461a mov r2, r3 800a3a6: 492d ldr r1, [pc, #180] @ (800a45c ) 800a3a8: 2007 movs r0, #7 800a3aa: f001 f8b3 bl 800b514 log_printf(LOG_INFO, "Own auto: %d\n", GBT_EVInfo.ownAuto); // 0 = lizing, 1 = own auto 800a3ae: 4b22 ldr r3, [pc, #136] @ (800a438 ) 800a3b0: 7d9b ldrb r3, [r3, #22] 800a3b2: 461a mov r2, r3 800a3b4: 492a ldr r1, [pc, #168] @ (800a460 ) 800a3b6: 2007 movs r0, #7 800a3b8: f001 f8ac bl 800b514 log_printf(LOG_INFO, "EVIN: %.17s\n", GBT_EVInfo.EVIN); //EVIN 800a3bc: 4a29 ldr r2, [pc, #164] @ (800a464 ) 800a3be: 492a ldr r1, [pc, #168] @ (800a468 ) 800a3c0: 2007 movs r0, #7 800a3c2: f001 f8a7 bl 800b514 log_printf(LOG_INFO, "EV_SW_VER: %.8s\n", GBT_EVInfo.EV_SW_VER); 800a3c6: 4a29 ldr r2, [pc, #164] @ (800a46c ) 800a3c8: 4929 ldr r1, [pc, #164] @ (800a470 ) 800a3ca: 2007 movs r0, #7 800a3cc: f001 f8a2 bl 800b514 } //Timeout if((GBT_StateTick()>5000) && (GBT_BAT_INFO_recv == 0)){ 800a3d0: f000 fbb8 bl 800ab44 800a3d4: 4603 mov r3, r0 800a3d6: f241 3288 movw r2, #5000 @ 0x1388 800a3da: 4293 cmp r3, r2 800a3dc: f240 82c5 bls.w 800a96a 800a3e0: 4b13 ldr r3, [pc, #76] @ (800a430 ) 800a3e2: 781b ldrb r3, [r3, #0] 800a3e4: 2b00 cmp r3, #0 800a3e6: f040 82c0 bne.w 800a96a CONN.chargingError = CONN_ERR_EV_COMM; 800a3ea: 4b07 ldr r3, [pc, #28] @ (800a408 ) 800a3ec: 2209 movs r2, #9 800a3ee: 775a strb r2, [r3, #29] GBT_Error(0xFDF0C0FC); //BRM Timeout 800a3f0: 4820 ldr r0, [pc, #128] @ (800a474 ) 800a3f2: f000 fc41 bl 800ac78 log_printf(LOG_ERR, "BRM Timeout\n"); 800a3f6: 4920 ldr r1, [pc, #128] @ (800a478 ) 800a3f8: 2004 movs r0, #4 800a3fa: f001 f88b bl 800b514 } break; 800a3fe: e2b4 b.n 800a96a 800a400: 20000870 .word 0x20000870 800a404: 20000a0c .word 0x20000a0c 800a408: 200002f8 .word 0x200002f8 800a40c: 08016578 .word 0x08016578 800a410: 20000340 .word 0x20000340 800a414: cccccccd .word 0xcccccccd 800a418: 08016598 .word 0x08016598 800a41c: 20000060 .word 0x20000060 800a420: 080165b8 .word 0x080165b8 800a424: 66666667 .word 0x66666667 800a428: 080165cc .word 0x080165cc 800a42c: 080165fc .word 0x080165fc 800a430: 20000328 .word 0x20000328 800a434: 0801661c .word 0x0801661c 800a438: 20000344 .word 0x20000344 800a43c: 08016628 .word 0x08016628 800a440: 0801663c .word 0x0801663c 800a444: 08016650 .word 0x08016650 800a448: 08016668 .word 0x08016668 800a44c: 2000034c .word 0x2000034c 800a450: 08016680 .word 0x08016680 800a454: 08016698 .word 0x08016698 800a458: 080166ac .word 0x080166ac 800a45c: 080166d8 .word 0x080166d8 800a460: 080166ec .word 0x080166ec 800a464: 2000035c .word 0x2000035c 800a468: 080166fc .word 0x080166fc 800a46c: 2000036d .word 0x2000036d 800a470: 0801670c .word 0x0801670c 800a474: fdf0c0fc .word 0xfdf0c0fc 800a478: 08016720 .word 0x08016720 case GBT_S6_BAT_STAT: if(j_rx.state == 0) GBT_SendCRM(0xAA); 800a47c: 4bb0 ldr r3, [pc, #704] @ (800a740 ) 800a47e: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a482: 2b00 cmp r3, #0 800a484: d102 bne.n 800a48c 800a486: 20aa movs r0, #170 @ 0xaa 800a488: f001 f8b2 bl 800b5f0 GBT_Delay(250); 800a48c: 20fa movs r0, #250 @ 0xfa 800a48e: f000 fb65 bl 800ab5c if(GBT_BAT_STAT_recv){ 800a492: 4bac ldr r3, [pc, #688] @ (800a744 ) 800a494: 781b ldrb r3, [r3, #0] 800a496: 2b00 cmp r3, #0 800a498: d05a beq.n 800a550 //Got battery status GBT_SwitchState(GBT_S7_BMS_WAIT); 800a49a: 201b movs r0, #27 800a49c: f000 faa6 bl 800a9ec log_printf(LOG_INFO, "Battery info:\n"); 800a4a0: 49a9 ldr r1, [pc, #676] @ (800a748 ) 800a4a2: 2007 movs r0, #7 800a4a4: f001 f836 bl 800b514 log_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxCellVoltage/100); // 0.01v/bit 800a4a8: 4ba8 ldr r3, [pc, #672] @ (800a74c ) 800a4aa: 881b ldrh r3, [r3, #0] 800a4ac: 4aa8 ldr r2, [pc, #672] @ (800a750 ) 800a4ae: fba2 2303 umull r2, r3, r2, r3 800a4b2: 095b lsrs r3, r3, #5 800a4b4: b29b uxth r3, r3 800a4b6: 461a mov r2, r3 800a4b8: 49a6 ldr r1, [pc, #664] @ (800a754 ) 800a4ba: 2007 movs r0, #7 800a4bc: f001 f82a bl 800b514 log_printf(LOG_INFO, "maxCC %dA\n",GBT_BATStat.maxChargingCurrent/10); // 0.1A/bit 800a4c0: 4ba2 ldr r3, [pc, #648] @ (800a74c ) 800a4c2: 885b ldrh r3, [r3, #2] 800a4c4: 4aa4 ldr r2, [pc, #656] @ (800a758 ) 800a4c6: fba2 2303 umull r2, r3, r2, r3 800a4ca: 08db lsrs r3, r3, #3 800a4cc: b29b uxth r3, r3 800a4ce: 461a mov r2, r3 800a4d0: 49a2 ldr r1, [pc, #648] @ (800a75c ) 800a4d2: 2007 movs r0, #7 800a4d4: f001 f81e bl 800b514 log_printf(LOG_INFO, "totE %dkWh\n",GBT_BATStat.totalEnergy/10); // 0.1kWh 800a4d8: 4b9c ldr r3, [pc, #624] @ (800a74c ) 800a4da: 889b ldrh r3, [r3, #4] 800a4dc: 4a9e ldr r2, [pc, #632] @ (800a758 ) 800a4de: fba2 2303 umull r2, r3, r2, r3 800a4e2: 08db lsrs r3, r3, #3 800a4e4: b29b uxth r3, r3 800a4e6: 461a mov r2, r3 800a4e8: 499d ldr r1, [pc, #628] @ (800a760 ) 800a4ea: 2007 movs r0, #7 800a4ec: f001 f812 bl 800b514 log_printf(LOG_INFO, "maxCV %dV\n",GBT_BATStat.maxChargingVoltage/10); // 0.1V/ bit 800a4f0: 4b96 ldr r3, [pc, #600] @ (800a74c ) 800a4f2: 88db ldrh r3, [r3, #6] 800a4f4: 4a98 ldr r2, [pc, #608] @ (800a758 ) 800a4f6: fba2 2303 umull r2, r3, r2, r3 800a4fa: 08db lsrs r3, r3, #3 800a4fc: b29b uxth r3, r3 800a4fe: 461a mov r2, r3 800a500: 4994 ldr r1, [pc, #592] @ (800a754 ) 800a502: 2007 movs r0, #7 800a504: f001 f806 bl 800b514 log_printf(LOG_INFO, "maxT %dC\n",(int16_t)GBT_BATStat.maxTemp-50); // 1C/bit, -50C offset 800a508: 4b90 ldr r3, [pc, #576] @ (800a74c ) 800a50a: 7a1b ldrb r3, [r3, #8] 800a50c: 3b32 subs r3, #50 @ 0x32 800a50e: 461a mov r2, r3 800a510: 4994 ldr r1, [pc, #592] @ (800a764 ) 800a512: 2007 movs r0, #7 800a514: f000 fffe bl 800b514 log_printf(LOG_INFO, "SOC %dp\n",GBT_BATStat.SOC/10); // 0.1%/bit , 0..100% 800a518: 4b8c ldr r3, [pc, #560] @ (800a74c ) 800a51a: f8b3 3009 ldrh.w r3, [r3, #9] 800a51e: b29b uxth r3, r3 800a520: 4a8d ldr r2, [pc, #564] @ (800a758 ) 800a522: fba2 2303 umull r2, r3, r2, r3 800a526: 08db lsrs r3, r3, #3 800a528: b29b uxth r3, r3 800a52a: 461a mov r2, r3 800a52c: 498e ldr r1, [pc, #568] @ (800a768 ) 800a52e: 2007 movs r0, #7 800a530: f000 fff0 bl 800b514 log_printf(LOG_INFO, "Volt. %dV\n",GBT_BATStat.measVoltage/10); // 0.1V/bit 800a534: 4b85 ldr r3, [pc, #532] @ (800a74c ) 800a536: f8b3 300b ldrh.w r3, [r3, #11] 800a53a: b29b uxth r3, r3 800a53c: 4a86 ldr r2, [pc, #536] @ (800a758 ) 800a53e: fba2 2303 umull r2, r3, r2, r3 800a542: 08db lsrs r3, r3, #3 800a544: b29b uxth r3, r3 800a546: 461a mov r2, r3 800a548: 4988 ldr r1, [pc, #544] @ (800a76c ) 800a54a: 2007 movs r0, #7 800a54c: f000 ffe2 bl 800b514 } if((GBT_StateTick()>5000) && (GBT_BAT_STAT_recv == 0)){ 800a550: f000 faf8 bl 800ab44 800a554: 4603 mov r3, r0 800a556: f241 3288 movw r2, #5000 @ 0x1388 800a55a: 4293 cmp r3, r2 800a55c: f240 8207 bls.w 800a96e 800a560: 4b78 ldr r3, [pc, #480] @ (800a744 ) 800a562: 781b ldrb r3, [r3, #0] 800a564: 2b00 cmp r3, #0 800a566: f040 8202 bne.w 800a96e CONN.chargingError = CONN_ERR_EV_COMM; 800a56a: 4b81 ldr r3, [pc, #516] @ (800a770 ) 800a56c: 2209 movs r2, #9 800a56e: 775a strb r2, [r3, #29] GBT_Error(0xFCF1C0FC); //BCP Timeout 800a570: 4880 ldr r0, [pc, #512] @ (800a774 ) 800a572: f000 fb81 bl 800ac78 log_printf(LOG_ERR, "BCP Timeout\n"); 800a576: 4980 ldr r1, [pc, #512] @ (800a778 ) 800a578: 2004 movs r0, #4 800a57a: f000 ffcb bl 800b514 } break; 800a57e: e1f6 b.n 800a96e case GBT_S7_BMS_WAIT: if(j_rx.state == 0) GBT_SendCTS(); 800a580: 4b6f ldr r3, [pc, #444] @ (800a740 ) 800a582: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a586: 2b00 cmp r3, #0 800a588: d101 bne.n 800a58e 800a58a: f000 fff9 bl 800b580 HAL_Delay(2); 800a58e: 2002 movs r0, #2 800a590: f004 f982 bl 800e898 if(j_rx.state == 0) GBT_SendCML(); 800a594: 4b6a ldr r3, [pc, #424] @ (800a740 ) 800a596: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a59a: 2b00 cmp r3, #0 800a59c: d101 bne.n 800a5a2 800a59e: f001 f805 bl 800b5ac GBT_Delay(250); 800a5a2: 20fa movs r0, #250 @ 0xfa 800a5a4: f000 fada bl 800ab5c if((GBT_StateTick()>5000) && (GBT_BRO_recv == 0)){ 800a5a8: f000 facc bl 800ab44 800a5ac: 4603 mov r3, r0 800a5ae: f241 3288 movw r2, #5000 @ 0x1388 800a5b2: 4293 cmp r3, r2 800a5b4: d90d bls.n 800a5d2 800a5b6: 4b71 ldr r3, [pc, #452] @ (800a77c ) 800a5b8: 781b ldrb r3, [r3, #0] 800a5ba: 2b00 cmp r3, #0 800a5bc: d109 bne.n 800a5d2 CONN.chargingError = CONN_ERR_EV_COMM; 800a5be: 4b6c ldr r3, [pc, #432] @ (800a770 ) 800a5c0: 2209 movs r2, #9 800a5c2: 775a strb r2, [r3, #29] GBT_Error(0xFCF4C0FC); //BRO Timeout 800a5c4: 486e ldr r0, [pc, #440] @ (800a780 ) 800a5c6: f000 fb57 bl 800ac78 log_printf(LOG_ERR, "BRO Timeout\n"); 800a5ca: 496e ldr r1, [pc, #440] @ (800a784 ) 800a5cc: 2004 movs r0, #4 800a5ce: f000 ffa1 bl 800b514 } if(EV_ready){ 800a5d2: 4b6d ldr r3, [pc, #436] @ (800a788 ) 800a5d4: 781b ldrb r3, [r3, #0] 800a5d6: 2b00 cmp r3, #0 800a5d8: d003 beq.n 800a5e2 //EV ready (AA) GBT_SwitchState(GBT_S8_INIT_CHARGER); 800a5da: 201c movs r0, #28 800a5dc: f000 fa06 bl 800a9ec CONN.chargingError = CONN_ERR_EV_COMM; GBT_Error(0xFCF4C0FC); //BRO Timeout log_printf(LOG_ERR, "EV not ready for a 60s\n"); } } break; 800a5e0: e1c7 b.n 800a972 if((GBT_StateTick()>60000) && (GBT_BRO_recv == 1)){ 800a5e2: f000 faaf bl 800ab44 800a5e6: 4603 mov r3, r0 800a5e8: f64e 2260 movw r2, #60000 @ 0xea60 800a5ec: 4293 cmp r3, r2 800a5ee: f240 81c0 bls.w 800a972 800a5f2: 4b62 ldr r3, [pc, #392] @ (800a77c ) 800a5f4: 781b ldrb r3, [r3, #0] 800a5f6: 2b01 cmp r3, #1 800a5f8: f040 81bb bne.w 800a972 CONN.chargingError = CONN_ERR_EV_COMM; 800a5fc: 4b5c ldr r3, [pc, #368] @ (800a770 ) 800a5fe: 2209 movs r2, #9 800a600: 775a strb r2, [r3, #29] GBT_Error(0xFCF4C0FC); //BRO Timeout 800a602: 485f ldr r0, [pc, #380] @ (800a780 ) 800a604: f000 fb38 bl 800ac78 log_printf(LOG_ERR, "EV not ready for a 60s\n"); 800a608: 4960 ldr r1, [pc, #384] @ (800a78c ) 800a60a: 2004 movs r0, #4 800a60c: f000 ff82 bl 800b514 break; 800a610: e1af b.n 800a972 case GBT_S8_INIT_CHARGER: if(j_rx.state == 0) GBT_SendCRO(0x00); 800a612: 4b4b ldr r3, [pc, #300] @ (800a740 ) 800a614: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a618: 2b00 cmp r3, #0 800a61a: d102 bne.n 800a622 800a61c: 2000 movs r0, #0 800a61e: f000 fffd bl 800b61c //TODO GBT_Delay(250); 800a622: 20fa movs r0, #250 @ 0xfa 800a624: f000 fa9a bl 800ab5c // if(GBT_StateTick()>1500){ if(PSU0.ready){ 800a628: 4b59 ldr r3, [pc, #356] @ (800a790 ) 800a62a: 7a5b ldrb r3, [r3, #9] 800a62c: 2b00 cmp r3, #0 800a62e: d002 beq.n 800a636 //Power Modules initiated GBT_SwitchState(GBT_S9_WAIT_BCL); 800a630: 201d movs r0, #29 800a632: f000 f9db bl 800a9ec } if((GBT_StateTick()>6000) && (PSU0.ready == 0)){ 800a636: f000 fa85 bl 800ab44 800a63a: 4603 mov r3, r0 800a63c: f241 7270 movw r2, #6000 @ 0x1770 800a640: 4293 cmp r3, r2 800a642: f240 8198 bls.w 800a976 800a646: 4b52 ldr r3, [pc, #328] @ (800a790 ) 800a648: 7a5b ldrb r3, [r3, #9] 800a64a: 2b00 cmp r3, #0 800a64c: f040 8193 bne.w 800a976 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a650: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a654: f000 fabc bl 800abd0 CONN.chargingError = CONN_ERR_PSU_FAULT; 800a658: 4b45 ldr r3, [pc, #276] @ (800a770 ) 800a65a: 220a movs r2, #10 800a65c: 775a strb r2, [r3, #29] log_printf(LOG_ERR, "PSU not ready, stopping...\n"); 800a65e: 494d ldr r1, [pc, #308] @ (800a794 ) 800a660: 2004 movs r0, #4 800a662: f000 ff57 bl 800b514 } break; 800a666: e186 b.n 800a976 case GBT_S9_WAIT_BCL: if(j_rx.state == 0) GBT_SendCRO(0xAA); 800a668: 4b35 ldr r3, [pc, #212] @ (800a740 ) 800a66a: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a66e: 2b00 cmp r3, #0 800a670: d102 bne.n 800a678 800a672: 20aa movs r0, #170 @ 0xaa 800a674: f000 ffd2 bl 800b61c GBT_Delay(250); 800a678: 20fa movs r0, #250 @ 0xfa 800a67a: f000 fa6f bl 800ab5c if(GBT_ReqPower.chargingMode != 0){ //REFACTORING 800a67e: 4b46 ldr r3, [pc, #280] @ (800a798 ) 800a680: 791b ldrb r3, [r3, #4] 800a682: 2b00 cmp r3, #0 800a684: f000 8179 beq.w 800a97a //BCL power requirements received GBT_SwitchState(GBT_S10_CHARGING); 800a688: 201e movs r0, #30 800a68a: f000 f9af bl 800a9ec GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 800a68e: f004 f8f9 bl 800e884 800a692: 4603 mov r3, r0 800a694: 4a41 ldr r2, [pc, #260] @ (800a79c ) 800a696: 6013 str r3, [r2, #0] CONN_SetState(Charging); 800a698: 2008 movs r0, #8 800a69a: f000 fcbf bl 800b01c uint16_t curr = 4000 - GBT_ReqPower.requestedCurrent; 800a69e: 4b3e ldr r3, [pc, #248] @ (800a798 ) 800a6a0: 885b ldrh r3, [r3, #2] 800a6a2: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 800a6a6: 807b strh r3, [r7, #2] uint16_t volt = GBT_ReqPower.requestedVoltage; 800a6a8: 4b3b ldr r3, [pc, #236] @ (800a798 ) 800a6aa: 881b ldrh r3, [r3, #0] 800a6ac: 803b strh r3, [r7, #0] //TODO Limits CONN.RequestedVoltage = volt / 10; // В 800a6ae: 883b ldrh r3, [r7, #0] 800a6b0: 4a29 ldr r2, [pc, #164] @ (800a758 ) 800a6b2: fba2 2303 umull r2, r3, r2, r3 800a6b6: 08db lsrs r3, r3, #3 800a6b8: b29a uxth r2, r3 800a6ba: 4b2d ldr r3, [pc, #180] @ (800a770 ) 800a6bc: f8a3 200f strh.w r2, [r3, #15] CONN.WantedCurrent = curr; // 0.1A 800a6c0: 4b2b ldr r3, [pc, #172] @ (800a770 ) 800a6c2: 887a ldrh r2, [r7, #2] 800a6c4: f8a3 201b strh.w r2, [r3, #27] CONN.EnableOutput = 1; 800a6c8: 4b29 ldr r3, [pc, #164] @ (800a770 ) 800a6ca: 2201 movs r2, #1 800a6cc: 75da strb r2, [r3, #23] GBT_TimeChargingStarted = get_Current_Time(); 800a6ce: f003 fad5 bl 800dc7c 800a6d2: 4603 mov r3, r0 800a6d4: 4a32 ldr r2, [pc, #200] @ (800a7a0 ) 800a6d6: 6013 str r3, [r2, #0] } break; 800a6d8: e14f b.n 800a97a case GBT_S10_CHARGING: //CHARGING if((HAL_GetTick() - GBT_last_BCL_BCS_BSM_tick) > GBT_BCL_BCS_BSM_TIMEOUT_MS){ 800a6da: f004 f8d3 bl 800e884 800a6de: 4602 mov r2, r0 800a6e0: 4b2e ldr r3, [pc, #184] @ (800a79c ) 800a6e2: 681b ldr r3, [r3, #0] 800a6e4: 1ad3 subs r3, r2, r3 800a6e6: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800a6ea: d90b bls.n 800a704 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a6ec: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a6f0: f000 fa6e bl 800abd0 CONN.chargingError = CONN_ERR_EV_COMM; 800a6f4: 4b1e ldr r3, [pc, #120] @ (800a770 ) 800a6f6: 2209 movs r2, #9 800a6f8: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "BCL/BCS/BSM timeout, stopping...\n"); 800a6fa: 492a ldr r1, [pc, #168] @ (800a7a4 ) 800a6fc: 2005 movs r0, #5 800a6fe: f000 ff09 bl 800b514 break; 800a702: e141 b.n 800a988 } if(CONN.connControl == CMD_STOP) GBT_StopOCPP(GBT_CST_SUSPENDS_ARTIFICIALLY); 800a704: 4b1a ldr r3, [pc, #104] @ (800a770 ) 800a706: 781b ldrb r3, [r3, #0] 800a708: 2b01 cmp r3, #1 800a70a: d102 bne.n 800a712 800a70c: 4826 ldr r0, [pc, #152] @ (800a7a8 ) 800a70e: f000 fa7b bl 800ac08 if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_StopOCPP(GBT_CST_SUSPENDS_ARTIFICIALLY); // --> Finished 800a712: 4b17 ldr r3, [pc, #92] @ (800a770 ) 800a714: 781b ldrb r3, [r3, #0] 800a716: 2b03 cmp r3, #3 800a718: d102 bne.n 800a720 800a71a: 4823 ldr r0, [pc, #140] @ (800a7a8 ) 800a71c: f000 fa74 bl 800ac08 if(GBT_LockState.error) { 800a720: 4b22 ldr r3, [pc, #136] @ (800a7ac ) 800a722: 785b ldrb r3, [r3, #1] 800a724: 2b00 cmp r3, #0 800a726: d045 beq.n 800a7b4 GBT_StopEVSE(GBT_CST_OTHERFALUT); // --> Suspend EVSE 800a728: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a72c: f000 fa50 bl 800abd0 CONN.chargingError = CONN_ERR_LOCK; 800a730: 4b0f ldr r3, [pc, #60] @ (800a770 ) 800a732: 2204 movs r2, #4 800a734: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Lock error, stopping...\n"); 800a736: 491e ldr r1, [pc, #120] @ (800a7b0 ) 800a738: 2005 movs r0, #5 800a73a: f000 feeb bl 800b514 break; 800a73e: e123 b.n 800a988 800a740: 20000870 .word 0x20000870 800a744: 20000329 .word 0x20000329 800a748: 08016730 .word 0x08016730 800a74c: 20000378 .word 0x20000378 800a750: 51eb851f .word 0x51eb851f 800a754: 08016740 .word 0x08016740 800a758: cccccccd .word 0xcccccccd 800a75c: 0801674c .word 0x0801674c 800a760: 08016758 .word 0x08016758 800a764: 08016764 .word 0x08016764 800a768: 08016770 .word 0x08016770 800a76c: 0801677c .word 0x0801677c 800a770: 200002f8 .word 0x200002f8 800a774: fcf1c0fc .word 0xfcf1c0fc 800a778: 08016788 .word 0x08016788 800a77c: 2000032a .word 0x2000032a 800a780: fcf4c0fc .word 0xfcf4c0fc 800a784: 08016798 .word 0x08016798 800a788: 2000032d .word 0x2000032d 800a78c: 080167a8 .word 0x080167a8 800a790: 20000a0c .word 0x20000a0c 800a794: 080167c0 .word 0x080167c0 800a798: 20000388 .word 0x20000388 800a79c: 200003c4 .word 0x200003c4 800a7a0: 200003c0 .word 0x200003c0 800a7a4: 080167dc .word 0x080167dc 800a7a8: 0400f0f0 .word 0x0400f0f0 800a7ac: 20000008 .word 0x20000008 800a7b0: 08016800 .word 0x08016800 } if(CONN_CC_GetState()!=GBT_CC_4V){ 800a7b4: f000 fd0e bl 800b1d4 800a7b8: 4603 mov r3, r0 800a7ba: 2b03 cmp r3, #3 800a7bc: d00b beq.n 800a7d6 GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a7be: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a7c2: f000 fa05 bl 800abd0 CONN.chargingError = CONN_ERR_HOTPLUG; 800a7c6: 4b78 ldr r3, [pc, #480] @ (800a9a8 ) 800a7c8: 2208 movs r2, #8 800a7ca: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Hotplug detected, stopping...\n"); 800a7cc: 4977 ldr r1, [pc, #476] @ (800a9ac ) 800a7ce: 2005 movs r0, #5 800a7d0: f000 fea0 bl 800b514 break; 800a7d4: e0d8 b.n 800a988 } if((GBT_ReadTemp(0) > 90) || (GBT_ReadTemp(1) > 90)) { 800a7d6: 2000 movs r0, #0 800a7d8: f7ff f8e0 bl 800999c 800a7dc: 4603 mov r3, r0 800a7de: 2b5a cmp r3, #90 @ 0x5a 800a7e0: dc05 bgt.n 800a7ee 800a7e2: 2001 movs r0, #1 800a7e4: f7ff f8da bl 800999c 800a7e8: 4603 mov r3, r0 800a7ea: 2b5a cmp r3, #90 @ 0x5a 800a7ec: dd14 ble.n 800a818 GBT_StopEVSE(GBT_CST_CONNECTOR_OVER_TEMP); 800a7ee: 4870 ldr r0, [pc, #448] @ (800a9b0 ) 800a7f0: f000 f9ee bl 800abd0 CONN.chargingError = CONN_ERR_CONN_TEMP; 800a7f4: 4b6c ldr r3, [pc, #432] @ (800a9a8 ) 800a7f6: 2205 movs r2, #5 800a7f8: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Connector overheat %d %d, stopping...\n", GBT_ReadTemp(0), GBT_ReadTemp(1)); 800a7fa: 2000 movs r0, #0 800a7fc: f7ff f8ce bl 800999c 800a800: 4603 mov r3, r0 800a802: 461c mov r4, r3 800a804: 2001 movs r0, #1 800a806: f7ff f8c9 bl 800999c 800a80a: 4603 mov r3, r0 800a80c: 4622 mov r2, r4 800a80e: 4969 ldr r1, [pc, #420] @ (800a9b4 ) 800a810: 2005 movs r0, #5 800a812: f000 fe7f bl 800b514 break; 800a816: e0b7 b.n 800a988 } if(ISO.isolationResistance < (ISO.voltageComm/10)){ // *100/1000 800a818: 4b67 ldr r3, [pc, #412] @ (800a9b8 ) 800a81a: f8b3 3001 ldrh.w r3, [r3, #1] 800a81e: b29b uxth r3, r3 800a820: 4619 mov r1, r3 800a822: 4b65 ldr r3, [pc, #404] @ (800a9b8 ) 800a824: f9b3 3007 ldrsh.w r3, [r3, #7] 800a828: b21b sxth r3, r3 800a82a: 4a64 ldr r2, [pc, #400] @ (800a9bc ) 800a82c: fb82 0203 smull r0, r2, r2, r3 800a830: 1092 asrs r2, r2, #2 800a832: 17db asrs r3, r3, #31 800a834: 1ad3 subs r3, r2, r3 800a836: b21b sxth r3, r3 800a838: 4299 cmp r1, r3 800a83a: da06 bge.n 800a84a CONN.chargingError = CONN_ERR_INSULATION; 800a83c: 4b5a ldr r3, [pc, #360] @ (800a9a8 ) 800a83e: 2201 movs r2, #1 800a840: 775a strb r2, [r3, #29] log_printf(LOG_WARN, "Current leakage, insulation error, stopping...\n"); 800a842: 495f ldr r1, [pc, #380] @ (800a9c0 ) 800a844: 2005 movs r0, #5 800a846: f000 fe65 bl 800b514 } // 100 Ohm/V if(CONN.chargingError != CONN_NO_ERROR){ // --> Suspend EVSE 800a84a: 4b57 ldr r3, [pc, #348] @ (800a9a8 ) 800a84c: 7f5b ldrb r3, [r3, #29] 800a84e: 2b00 cmp r3, #0 800a850: d003 beq.n 800a85a GBT_StopEVSE(GBT_CST_OTHERFALUT); 800a852: f24f 40f0 movw r0, #62704 @ 0xf4f0 800a856: f000 f9bb bl 800abd0 } //GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111100;//NOT PERMITTED GBT_ChargerCurrentStatus.chargingPermissible = 0b1111111111111101; 800a85a: 4b5a ldr r3, [pc, #360] @ (800a9c4 ) 800a85c: f64f 72fd movw r2, #65533 @ 0xfffd 800a860: 80da strh r2, [r3, #6] GBT_ChargerCurrentStatus.chargingTime = (get_Current_Time() - GBT_TimeChargingStarted)/60; 800a862: f003 fa0b bl 800dc7c 800a866: 4602 mov r2, r0 800a868: 4b57 ldr r3, [pc, #348] @ (800a9c8 ) 800a86a: 681b ldr r3, [r3, #0] 800a86c: 1ad3 subs r3, r2, r3 800a86e: 4a57 ldr r2, [pc, #348] @ (800a9cc ) 800a870: fba2 2303 umull r2, r3, r2, r3 800a874: 095b lsrs r3, r3, #5 800a876: b29a uxth r2, r3 800a878: 4b52 ldr r3, [pc, #328] @ (800a9c4 ) 800a87a: 809a strh r2, [r3, #4] GBT_ChargerCurrentStatus.outputCurrent = 4000 - CONN.MeasuredCurrent; // 0.1A 800a87c: 4b4a ldr r3, [pc, #296] @ (800a9a8 ) 800a87e: f8b3 3015 ldrh.w r3, [r3, #21] 800a882: b29b uxth r3, r3 800a884: f5c3 637a rsb r3, r3, #4000 @ 0xfa0 800a888: b29a uxth r2, r3 800a88a: 4b4e ldr r3, [pc, #312] @ (800a9c4 ) 800a88c: 805a strh r2, [r3, #2] GBT_ChargerCurrentStatus.outputVoltage = CONN.MeasuredVoltage * 10; // V -> 0.1V 800a88e: 4b46 ldr r3, [pc, #280] @ (800a9a8 ) 800a890: f8b3 3013 ldrh.w r3, [r3, #19] 800a894: b29b uxth r3, r3 800a896: 461a mov r2, r3 800a898: 0092 lsls r2, r2, #2 800a89a: 4413 add r3, r2 800a89c: 005b lsls r3, r3, #1 800a89e: b29a uxth r2, r3 800a8a0: 4b48 ldr r3, [pc, #288] @ (800a9c4 ) 800a8a2: 801a strh r2, [r3, #0] if(j_rx.state == 0) { 800a8a4: 4b4a ldr r3, [pc, #296] @ (800a9d0 ) 800a8a6: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800a8aa: 2b00 cmp r3, #0 800a8ac: d105 bne.n 800a8ba GBT_SendCCS(); 800a8ae: f000 fec9 bl 800b644 GBT_Delay(49); 800a8b2: 2031 movs r0, #49 @ 0x31 800a8b4: f000 f952 bl 800ab5c } //TODO: снижение тока если перегрев контактов break; 800a8b8: e066 b.n 800a988 GBT_Delay(10); // Resend packet if not sent 800a8ba: 200a movs r0, #10 800a8bc: f000 f94e bl 800ab5c break; 800a8c0: e062 b.n 800a988 case GBT_STOP: GBT_Delay(10); 800a8c2: 200a movs r0, #10 800a8c4: f000 f94a bl 800ab5c CONN.EnableOutput = 0; 800a8c8: 4b37 ldr r3, [pc, #220] @ (800a9a8 ) 800a8ca: 2200 movs r2, #0 800a8cc: 75da strb r2, [r3, #23] GBT_SendCST(GBT_StopCauseCode); 800a8ce: 4b41 ldr r3, [pc, #260] @ (800a9d4 ) 800a8d0: 681b ldr r3, [r3, #0] 800a8d2: 4618 mov r0, r3 800a8d4: f000 fec4 bl 800b660 //RELAY_Write(RELAY_OUTPUT, 0); //GBT_SwitchState(GBT_DISABLED); if(GBT_StateTick()>10000){ 800a8d8: f000 f934 bl 800ab44 800a8dc: 4603 mov r3, r0 800a8de: f242 7210 movw r2, #10000 @ 0x2710 800a8e2: 4293 cmp r3, r2 800a8e4: d906 bls.n 800a8f4 log_printf(LOG_ERR, "BSD Timeout\n"); 800a8e6: 493c ldr r1, [pc, #240] @ (800a9d8 ) 800a8e8: 2004 movs r0, #4 800a8ea: f000 fe13 bl 800b514 GBT_Error(0xFCF0C0FD); //BSD Timeout 800a8ee: 483b ldr r0, [pc, #236] @ (800a9dc ) 800a8f0: f000 f9c2 bl 800ac78 } if(GBT_BSD_recv != 0){ 800a8f4: 4b3a ldr r3, [pc, #232] @ (800a9e0 ) 800a8f6: 781b ldrb r3, [r3, #0] 800a8f8: 2b00 cmp r3, #0 800a8fa: d040 beq.n 800a97e GBT_SwitchState(GBT_STOP_CSD); 800a8fc: 2020 movs r0, #32 800a8fe: f000 f875 bl 800a9ec } break; 800a902: e03c b.n 800a97e case GBT_STOP_CSD: GBT_Delay(250); 800a904: 20fa movs r0, #250 @ 0xfa 800a906: f000 f929 bl 800ab5c GBT_SendCSD(); 800a90a: f000 fec9 bl 800b6a0 if(GBT_StateTick()>2500){ //2.5S 800a90e: f000 f919 bl 800ab44 800a912: 4603 mov r3, r0 800a914: f640 12c4 movw r2, #2500 @ 0x9c4 800a918: 4293 cmp r3, r2 800a91a: d932 bls.n 800a982 GBT_SwitchState(GBT_COMPLETE); 800a91c: 2022 movs r0, #34 @ 0x22 800a91e: f000 f865 bl 800a9ec } break; 800a922: e02e b.n 800a982 case GBT_ERROR: GBT_SendCEM(GBT_ErrorCode); //2.5S 800a924: 4b2f ldr r3, [pc, #188] @ (800a9e4 ) 800a926: 681b ldr r3, [r3, #0] 800a928: 4618 mov r0, r3 800a92a: f000 fed9 bl 800b6e0 GBT_SwitchState(GBT_COMPLETE); 800a92e: 2022 movs r0, #34 @ 0x22 800a930: f000 f85c bl 800a9ec break; 800a934: e028 b.n 800a988 case GBT_COMPLETE: if(connectorState != Finished) { 800a936: 4b2c ldr r3, [pc, #176] @ (800a9e8 ) 800a938: 781b ldrb r3, [r3, #0] 800a93a: 2b0a cmp r3, #10 800a93c: d023 beq.n 800a986 GBT_SwitchState(GBT_DISABLED); 800a93e: 2010 movs r0, #16 800a940: f000 f854 bl 800a9ec GBT_Reset();//CHECK 800a944: f000 f9b4 bl 800acb0 } break; 800a948: e01d b.n 800a986 default: GBT_SwitchState(GBT_DISABLED); 800a94a: 2010 movs r0, #16 800a94c: f000 f84e bl 800a9ec 800a950: e01a b.n 800a988 break; 800a952: bf00 nop 800a954: e018 b.n 800a988 break; 800a956: bf00 nop 800a958: e016 b.n 800a988 break; 800a95a: bf00 nop 800a95c: e014 b.n 800a988 break; 800a95e: bf00 nop 800a960: e012 b.n 800a988 break; 800a962: bf00 nop 800a964: e010 b.n 800a988 break; 800a966: bf00 nop 800a968: e00e b.n 800a988 break; 800a96a: bf00 nop 800a96c: e00c b.n 800a988 break; 800a96e: bf00 nop 800a970: e00a b.n 800a988 break; 800a972: bf00 nop 800a974: e008 b.n 800a988 break; 800a976: bf00 nop 800a978: e006 b.n 800a988 break; 800a97a: bf00 nop 800a97c: e004 b.n 800a988 break; 800a97e: bf00 nop 800a980: e002 b.n 800a988 break; 800a982: bf00 nop 800a984: e000 b.n 800a988 break; 800a986: bf00 nop } if (CONN_CC_GetState()==GBT_CC_4V) CONN.EvConnected = 1; 800a988: f000 fc24 bl 800b1d4 800a98c: 4603 mov r3, r0 800a98e: 2b03 cmp r3, #3 800a990: d103 bne.n 800a99a 800a992: 4b05 ldr r3, [pc, #20] @ (800a9a8 ) 800a994: 2201 movs r2, #1 800a996: 779a strb r2, [r3, #30] else CONN.EvConnected = 0; } 800a998: e002 b.n 800a9a0 else CONN.EvConnected = 0; 800a99a: 4b03 ldr r3, [pc, #12] @ (800a9a8 ) 800a99c: 2200 movs r2, #0 800a99e: 779a strb r2, [r3, #30] } 800a9a0: bf00 nop 800a9a2: 3708 adds r7, #8 800a9a4: 46bd mov sp, r7 800a9a6: bdb0 pop {r4, r5, r7, pc} 800a9a8: 200002f8 .word 0x200002f8 800a9ac: 0801681c .word 0x0801681c 800a9b0: 0001f0f0 .word 0x0001f0f0 800a9b4: 0801683c .word 0x0801683c 800a9b8: 20000060 .word 0x20000060 800a9bc: 66666667 .word 0x66666667 800a9c0: 080165cc .word 0x080165cc 800a9c4: 200003ac .word 0x200003ac 800a9c8: 200003c0 .word 0x200003c0 800a9cc: 88888889 .word 0x88888889 800a9d0: 20000870 .word 0x20000870 800a9d4: 200003c8 .word 0x200003c8 800a9d8: 08016864 .word 0x08016864 800a9dc: fcf0c0fd .word 0xfcf0c0fd 800a9e0: 2000032c .word 0x2000032c 800a9e4: 200003cc .word 0x200003cc 800a9e8: 200003d1 .word 0x200003d1 0800a9ec : void GBT_SwitchState(gbtState_t state){ 800a9ec: b580 push {r7, lr} 800a9ee: b082 sub sp, #8 800a9f0: af00 add r7, sp, #0 800a9f2: 4603 mov r3, r0 800a9f4: 71fb strb r3, [r7, #7] GBT_State = state; 800a9f6: 4a42 ldr r2, [pc, #264] @ (800ab00 ) 800a9f8: 79fb ldrb r3, [r7, #7] 800a9fa: 7013 strb r3, [r2, #0] GBT_state_tick = HAL_GetTick(); 800a9fc: f003 ff42 bl 800e884 800aa00: 4603 mov r3, r0 800aa02: 4a40 ldr r2, [pc, #256] @ (800ab04 ) 800aa04: 6013 str r3, [r2, #0] if(GBT_State == GBT_DISABLED) log_printf(LOG_INFO, "Disabled\n"); 800aa06: 4b3e ldr r3, [pc, #248] @ (800ab00 ) 800aa08: 781b ldrb r3, [r3, #0] 800aa0a: 2b10 cmp r3, #16 800aa0c: d103 bne.n 800aa16 800aa0e: 493e ldr r1, [pc, #248] @ (800ab08 ) 800aa10: 2007 movs r0, #7 800aa12: f000 fd7f bl 800b514 if(GBT_State == GBT_S3_STARTED) log_printf(LOG_INFO, "Charging started\n"); 800aa16: 4b3a ldr r3, [pc, #232] @ (800ab00 ) 800aa18: 781b ldrb r3, [r3, #0] 800aa1a: 2b13 cmp r3, #19 800aa1c: d103 bne.n 800aa26 800aa1e: 493b ldr r1, [pc, #236] @ (800ab0c ) 800aa20: 2007 movs r0, #7 800aa22: f000 fd77 bl 800b514 if(GBT_State == GBT_S31_WAIT_BHM) log_printf(LOG_INFO, "Waiting for BHM\n"); 800aa26: 4b36 ldr r3, [pc, #216] @ (800ab00 ) 800aa28: 781b ldrb r3, [r3, #0] 800aa2a: 2b14 cmp r3, #20 800aa2c: d103 bne.n 800aa36 800aa2e: 4938 ldr r1, [pc, #224] @ (800ab10 ) 800aa30: 2007 movs r0, #7 800aa32: f000 fd6f bl 800b514 if(GBT_State == GBT_S4_WAIT_PSU_READY) log_printf(LOG_INFO, "Waiting for PSU ready\n"); 800aa36: 4b32 ldr r3, [pc, #200] @ (800ab00 ) 800aa38: 781b ldrb r3, [r3, #0] 800aa3a: 2b15 cmp r3, #21 800aa3c: d103 bne.n 800aa46 800aa3e: 4935 ldr r1, [pc, #212] @ (800ab14 ) 800aa40: 2007 movs r0, #7 800aa42: f000 fd67 bl 800b514 if(GBT_State == GBT_S4_ISOTEST) log_printf(LOG_INFO, "Isolation test\n"); 800aa46: 4b2e ldr r3, [pc, #184] @ (800ab00 ) 800aa48: 781b ldrb r3, [r3, #0] 800aa4a: 2b17 cmp r3, #23 800aa4c: d103 bne.n 800aa56 800aa4e: 4932 ldr r1, [pc, #200] @ (800ab18 ) 800aa50: 2007 movs r0, #7 800aa52: f000 fd5f bl 800b514 if(GBT_State == GBT_S5_BAT_INFO) log_printf(LOG_INFO, "Waiting for battery info\n"); 800aa56: 4b2a ldr r3, [pc, #168] @ (800ab00 ) 800aa58: 781b ldrb r3, [r3, #0] 800aa5a: 2b19 cmp r3, #25 800aa5c: d103 bne.n 800aa66 800aa5e: 492f ldr r1, [pc, #188] @ (800ab1c ) 800aa60: 2007 movs r0, #7 800aa62: f000 fd57 bl 800b514 if(GBT_State == GBT_S6_BAT_STAT) log_printf(LOG_INFO, "Waiting for battery status\n"); 800aa66: 4b26 ldr r3, [pc, #152] @ (800ab00 ) 800aa68: 781b ldrb r3, [r3, #0] 800aa6a: 2b1a cmp r3, #26 800aa6c: d103 bne.n 800aa76 800aa6e: 492c ldr r1, [pc, #176] @ (800ab20 ) 800aa70: 2007 movs r0, #7 800aa72: f000 fd4f bl 800b514 if(GBT_State == GBT_S7_BMS_WAIT) log_printf(LOG_INFO, "Waiting for BMS\n"); 800aa76: 4b22 ldr r3, [pc, #136] @ (800ab00 ) 800aa78: 781b ldrb r3, [r3, #0] 800aa7a: 2b1b cmp r3, #27 800aa7c: d103 bne.n 800aa86 800aa7e: 4929 ldr r1, [pc, #164] @ (800ab24 ) 800aa80: 2007 movs r0, #7 800aa82: f000 fd47 bl 800b514 if(GBT_State == GBT_S8_INIT_CHARGER)log_printf(LOG_INFO, "Initializing charger\n"); 800aa86: 4b1e ldr r3, [pc, #120] @ (800ab00 ) 800aa88: 781b ldrb r3, [r3, #0] 800aa8a: 2b1c cmp r3, #28 800aa8c: d103 bne.n 800aa96 800aa8e: 4926 ldr r1, [pc, #152] @ (800ab28 ) 800aa90: 2007 movs r0, #7 800aa92: f000 fd3f bl 800b514 if(GBT_State == GBT_S9_WAIT_BCL) log_printf(LOG_INFO, "Waiting for BCL\n"); 800aa96: 4b1a ldr r3, [pc, #104] @ (800ab00 ) 800aa98: 781b ldrb r3, [r3, #0] 800aa9a: 2b1d cmp r3, #29 800aa9c: d103 bne.n 800aaa6 800aa9e: 4923 ldr r1, [pc, #140] @ (800ab2c ) 800aaa0: 2007 movs r0, #7 800aaa2: f000 fd37 bl 800b514 if(GBT_State == GBT_S10_CHARGING) log_printf(LOG_INFO, "Charging in progress\n"); 800aaa6: 4b16 ldr r3, [pc, #88] @ (800ab00 ) 800aaa8: 781b ldrb r3, [r3, #0] 800aaaa: 2b1e cmp r3, #30 800aaac: d103 bne.n 800aab6 800aaae: 4920 ldr r1, [pc, #128] @ (800ab30 ) 800aab0: 2007 movs r0, #7 800aab2: f000 fd2f bl 800b514 if(GBT_State == GBT_STOP) log_printf(LOG_INFO, "Charging Stopped\n"); 800aab6: 4b12 ldr r3, [pc, #72] @ (800ab00 ) 800aab8: 781b ldrb r3, [r3, #0] 800aaba: 2b1f cmp r3, #31 800aabc: d103 bne.n 800aac6 800aabe: 491d ldr r1, [pc, #116] @ (800ab34 ) 800aac0: 2007 movs r0, #7 800aac2: f000 fd27 bl 800b514 if(GBT_State == GBT_STOP_CSD) log_printf(LOG_INFO, "Charging Stopped with CSD\n"); 800aac6: 4b0e ldr r3, [pc, #56] @ (800ab00 ) 800aac8: 781b ldrb r3, [r3, #0] 800aaca: 2b20 cmp r3, #32 800aacc: d103 bne.n 800aad6 800aace: 491a ldr r1, [pc, #104] @ (800ab38 ) 800aad0: 2007 movs r0, #7 800aad2: f000 fd1f bl 800b514 if(GBT_State == GBT_ERROR) log_printf(LOG_INFO, "Charging Error\n"); 800aad6: 4b0a ldr r3, [pc, #40] @ (800ab00 ) 800aad8: 781b ldrb r3, [r3, #0] 800aada: 2b21 cmp r3, #33 @ 0x21 800aadc: d103 bne.n 800aae6 800aade: 4917 ldr r1, [pc, #92] @ (800ab3c ) 800aae0: 2007 movs r0, #7 800aae2: f000 fd17 bl 800b514 if(GBT_State == GBT_COMPLETE) log_printf(LOG_INFO, "Charging Finished\n"); 800aae6: 4b06 ldr r3, [pc, #24] @ (800ab00 ) 800aae8: 781b ldrb r3, [r3, #0] 800aaea: 2b22 cmp r3, #34 @ 0x22 800aaec: d103 bne.n 800aaf6 800aaee: 4914 ldr r1, [pc, #80] @ (800ab40 ) 800aaf0: 2007 movs r0, #7 800aaf2: f000 fd0f bl 800b514 } 800aaf6: bf00 nop 800aaf8: 3708 adds r7, #8 800aafa: 46bd mov sp, r7 800aafc: bd80 pop {r7, pc} 800aafe: bf00 nop 800ab00: 20000318 .word 0x20000318 800ab04: 2000031c .word 0x2000031c 800ab08: 08016874 .word 0x08016874 800ab0c: 08016880 .word 0x08016880 800ab10: 08016894 .word 0x08016894 800ab14: 080168a8 .word 0x080168a8 800ab18: 080168c0 .word 0x080168c0 800ab1c: 080168d0 .word 0x080168d0 800ab20: 080168ec .word 0x080168ec 800ab24: 08016908 .word 0x08016908 800ab28: 0801691c .word 0x0801691c 800ab2c: 08016934 .word 0x08016934 800ab30: 08016948 .word 0x08016948 800ab34: 08016960 .word 0x08016960 800ab38: 08016974 .word 0x08016974 800ab3c: 08016990 .word 0x08016990 800ab40: 080169a0 .word 0x080169a0 0800ab44 : uint32_t GBT_StateTick(){ 800ab44: b580 push {r7, lr} 800ab46: af00 add r7, sp, #0 return HAL_GetTick() - GBT_state_tick; 800ab48: f003 fe9c bl 800e884 800ab4c: 4602 mov r2, r0 800ab4e: 4b02 ldr r3, [pc, #8] @ (800ab58 ) 800ab50: 681b ldr r3, [r3, #0] 800ab52: 1ad3 subs r3, r2, r3 } 800ab54: 4618 mov r0, r3 800ab56: bd80 pop {r7, pc} 800ab58: 2000031c .word 0x2000031c 0800ab5c : void GBT_Delay(uint32_t delay){ 800ab5c: b580 push {r7, lr} 800ab5e: b082 sub sp, #8 800ab60: af00 add r7, sp, #0 800ab62: 6078 str r0, [r7, #4] GBT_delay_start = HAL_GetTick(); 800ab64: f003 fe8e bl 800e884 800ab68: 4603 mov r3, r0 800ab6a: 4a04 ldr r2, [pc, #16] @ (800ab7c ) 800ab6c: 6013 str r3, [r2, #0] GBT_delay = delay; 800ab6e: 4a04 ldr r2, [pc, #16] @ (800ab80 ) 800ab70: 687b ldr r3, [r7, #4] 800ab72: 6013 str r3, [r2, #0] } 800ab74: bf00 nop 800ab76: 3708 adds r7, #8 800ab78: 46bd mov sp, r7 800ab7a: bd80 pop {r7, pc} 800ab7c: 20000320 .word 0x20000320 800ab80: 20000324 .word 0x20000324 0800ab84 : void GBT_StopEV(uint32_t causecode){ // --> Suspend EV 800ab84: b580 push {r7, lr} 800ab86: b082 sub sp, #8 800ab88: af00 add r7, sp, #0 800ab8a: 6078 str r0, [r7, #4] if (CONN.chargingError){ 800ab8c: 4b0c ldr r3, [pc, #48] @ (800abc0 ) 800ab8e: 7f5b ldrb r3, [r3, #29] 800ab90: 2b00 cmp r3, #0 800ab92: d003 beq.n 800ab9c GBT_StopSource = GBT_STOP_EVSE; 800ab94: 4b0b ldr r3, [pc, #44] @ (800abc4 ) 800ab96: 2200 movs r2, #0 800ab98: 701a strb r2, [r3, #0] 800ab9a: e002 b.n 800aba2 }else{ GBT_StopSource = GBT_STOP_EV; 800ab9c: 4b09 ldr r3, [pc, #36] @ (800abc4 ) 800ab9e: 2201 movs r2, #1 800aba0: 701a strb r2, [r3, #0] } GBT_StopCauseCode = causecode; 800aba2: 4a09 ldr r2, [pc, #36] @ (800abc8 ) 800aba4: 687b ldr r3, [r7, #4] 800aba6: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 800aba8: 4b08 ldr r3, [pc, #32] @ (800abcc ) 800abaa: 781b ldrb r3, [r3, #0] 800abac: 2b1f cmp r3, #31 800abae: d002 beq.n 800abb6 800abb0: 201f movs r0, #31 800abb2: f7ff ff1b bl 800a9ec } 800abb6: bf00 nop 800abb8: 3708 adds r7, #8 800abba: 46bd mov sp, r7 800abbc: bd80 pop {r7, pc} 800abbe: bf00 nop 800abc0: 200002f8 .word 0x200002f8 800abc4: 200003d0 .word 0x200003d0 800abc8: 200003c8 .word 0x200003c8 800abcc: 20000318 .word 0x20000318 0800abd0 : void GBT_StopEVSE(uint32_t causecode){ // --> Suspend EVSE 800abd0: b580 push {r7, lr} 800abd2: b082 sub sp, #8 800abd4: af00 add r7, sp, #0 800abd6: 6078 str r0, [r7, #4] GBT_StopSource = GBT_STOP_EVSE; 800abd8: 4b08 ldr r3, [pc, #32] @ (800abfc ) 800abda: 2200 movs r2, #0 800abdc: 701a strb r2, [r3, #0] GBT_StopCauseCode = causecode; 800abde: 4a08 ldr r2, [pc, #32] @ (800ac00 ) 800abe0: 687b ldr r3, [r7, #4] 800abe2: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 800abe4: 4b07 ldr r3, [pc, #28] @ (800ac04 ) 800abe6: 781b ldrb r3, [r3, #0] 800abe8: 2b1f cmp r3, #31 800abea: d002 beq.n 800abf2 800abec: 201f movs r0, #31 800abee: f7ff fefd bl 800a9ec } 800abf2: bf00 nop 800abf4: 3708 adds r7, #8 800abf6: 46bd mov sp, r7 800abf8: bd80 pop {r7, pc} 800abfa: bf00 nop 800abfc: 200003d0 .word 0x200003d0 800ac00: 200003c8 .word 0x200003c8 800ac04: 20000318 .word 0x20000318 0800ac08 : void GBT_StopOCPP(uint32_t causecode){ // --> Finished 800ac08: b580 push {r7, lr} 800ac0a: b082 sub sp, #8 800ac0c: af00 add r7, sp, #0 800ac0e: 6078 str r0, [r7, #4] GBT_StopSource = GBT_STOP_OCPP; 800ac10: 4b08 ldr r3, [pc, #32] @ (800ac34 ) 800ac12: 2202 movs r2, #2 800ac14: 701a strb r2, [r3, #0] GBT_StopCauseCode = causecode; 800ac16: 4a08 ldr r2, [pc, #32] @ (800ac38 ) 800ac18: 687b ldr r3, [r7, #4] 800ac1a: 6013 str r3, [r2, #0] if(GBT_State != GBT_STOP) GBT_SwitchState(GBT_STOP); 800ac1c: 4b07 ldr r3, [pc, #28] @ (800ac3c ) 800ac1e: 781b ldrb r3, [r3, #0] 800ac20: 2b1f cmp r3, #31 800ac22: d002 beq.n 800ac2a 800ac24: 201f movs r0, #31 800ac26: f7ff fee1 bl 800a9ec } 800ac2a: bf00 nop 800ac2c: 3708 adds r7, #8 800ac2e: 46bd mov sp, r7 800ac30: bd80 pop {r7, pc} 800ac32: bf00 nop 800ac34: 200003d0 .word 0x200003d0 800ac38: 200003c8 .word 0x200003c8 800ac3c: 20000318 .word 0x20000318 0800ac40 : void GBT_ForceStop(){ // --> Suspend EV 800ac40: b580 push {r7, lr} 800ac42: af00 add r7, sp, #0 GBT_StopSource = GBT_STOP_EV; 800ac44: 4b0a ldr r3, [pc, #40] @ (800ac70 ) 800ac46: 2201 movs r2, #1 800ac48: 701a strb r2, [r3, #0] CONN.EnableOutput = 0; 800ac4a: 4b0a ldr r3, [pc, #40] @ (800ac74 ) 800ac4c: 2200 movs r2, #0 800ac4e: 75da strb r2, [r3, #23] GBT_SwitchState(GBT_COMPLETE); 800ac50: 2022 movs r0, #34 @ 0x22 800ac52: f7ff fecb bl 800a9ec GBT_Lock(0); 800ac56: 2000 movs r0, #0 800ac58: f001 f906 bl 800be68 RELAY_Write(RELAY_AUX0, 0); 800ac5c: 2100 movs r1, #0 800ac5e: 2000 movs r0, #0 800ac60: f7fe fd44 bl 80096ec RELAY_Write(RELAY_AUX1, 0); 800ac64: 2100 movs r1, #0 800ac66: 2001 movs r0, #1 800ac68: f7fe fd40 bl 80096ec } 800ac6c: bf00 nop 800ac6e: bd80 pop {r7, pc} 800ac70: 200003d0 .word 0x200003d0 800ac74: 200002f8 .word 0x200002f8 0800ac78 : void GBT_Error(uint32_t errorcode){ // --> Suspend EV 800ac78: b580 push {r7, lr} 800ac7a: b082 sub sp, #8 800ac7c: af00 add r7, sp, #0 800ac7e: 6078 str r0, [r7, #4] GBT_StopSource = GBT_STOP_EV; 800ac80: 4b08 ldr r3, [pc, #32] @ (800aca4 ) 800ac82: 2201 movs r2, #1 800ac84: 701a strb r2, [r3, #0] log_printf(LOG_ERR, "GBT Error code: 0x%X\n", errorcode); 800ac86: 687a ldr r2, [r7, #4] 800ac88: 4907 ldr r1, [pc, #28] @ (800aca8 ) 800ac8a: 2004 movs r0, #4 800ac8c: f000 fc42 bl 800b514 GBT_ErrorCode = errorcode; 800ac90: 4a06 ldr r2, [pc, #24] @ (800acac ) 800ac92: 687b ldr r3, [r7, #4] 800ac94: 6013 str r3, [r2, #0] GBT_SwitchState(GBT_ERROR); 800ac96: 2021 movs r0, #33 @ 0x21 800ac98: f7ff fea8 bl 800a9ec } 800ac9c: bf00 nop 800ac9e: 3708 adds r7, #8 800aca0: 46bd mov sp, r7 800aca2: bd80 pop {r7, pc} 800aca4: 200003d0 .word 0x200003d0 800aca8: 080169b4 .word 0x080169b4 800acac: 200003cc .word 0x200003cc 0800acb0 : void GBT_Reset(){ 800acb0: b580 push {r7, lr} 800acb2: af00 add r7, sp, #0 GBT_last_BCL_BCS_BSM_tick = HAL_GetTick(); 800acb4: f003 fde6 bl 800e884 800acb8: 4603 mov r3, r0 800acba: 4a31 ldr r2, [pc, #196] @ (800ad80 ) 800acbc: 6013 str r3, [r2, #0] GBT_BAT_INFO_recv = 0; 800acbe: 4b31 ldr r3, [pc, #196] @ (800ad84 ) 800acc0: 2200 movs r2, #0 800acc2: 701a strb r2, [r3, #0] GBT_BAT_STAT_recv = 0; 800acc4: 4b30 ldr r3, [pc, #192] @ (800ad88 ) 800acc6: 2200 movs r2, #0 800acc8: 701a strb r2, [r3, #0] GBT_BRO_recv = 0; 800acca: 4b30 ldr r3, [pc, #192] @ (800ad8c ) 800accc: 2200 movs r2, #0 800acce: 701a strb r2, [r3, #0] GBT_BHM_recv = 0; 800acd0: 4b2f ldr r3, [pc, #188] @ (800ad90 ) 800acd2: 2200 movs r2, #0 800acd4: 701a strb r2, [r3, #0] GBT_BSD_recv = 0; 800acd6: 4b2f ldr r3, [pc, #188] @ (800ad94 ) 800acd8: 2200 movs r2, #0 800acda: 701a strb r2, [r3, #0] EV_ready = 0; 800acdc: 4b2e ldr r3, [pc, #184] @ (800ad98 ) 800acde: 2200 movs r2, #0 800ace0: 701a strb r2, [r3, #0] CONN.SOC = 0; 800ace2: 4b2e ldr r3, [pc, #184] @ (800ad9c ) 800ace4: 2200 movs r2, #0 800ace6: 709a strb r2, [r3, #2] CONN.EnableOutput = 0; 800ace8: 4b2c ldr r3, [pc, #176] @ (800ad9c ) 800acea: 2200 movs r2, #0 800acec: 75da strb r2, [r3, #23] CONN.WantedCurrent = 0; 800acee: 4b2b ldr r3, [pc, #172] @ (800ad9c ) 800acf0: 2200 movs r2, #0 800acf2: 76da strb r2, [r3, #27] 800acf4: 2200 movs r2, #0 800acf6: 771a strb r2, [r3, #28] CONN.RequestedVoltage = 0; 800acf8: 4b28 ldr r3, [pc, #160] @ (800ad9c ) 800acfa: 2200 movs r2, #0 800acfc: 73da strb r2, [r3, #15] 800acfe: 2200 movs r2, #0 800ad00: 741a strb r2, [r3, #16] memset(&GBT_EVInfo, 0, sizeof (GBT_EVInfo)); 800ad02: 2231 movs r2, #49 @ 0x31 800ad04: 2100 movs r1, #0 800ad06: 4826 ldr r0, [pc, #152] @ (800ada0 ) 800ad08: f009 fa1c bl 8014144 memset(&GBT_BATStat, 0, sizeof (GBT_BATStat)); 800ad0c: 220d movs r2, #13 800ad0e: 2100 movs r1, #0 800ad10: 4824 ldr r0, [pc, #144] @ (800ada4 ) 800ad12: f009 fa17 bl 8014144 memset(&GBT_ReqPower, 0, sizeof (GBT_ReqPower)); 800ad16: 2205 movs r2, #5 800ad18: 2100 movs r1, #0 800ad1a: 4823 ldr r0, [pc, #140] @ (800ada8 ) 800ad1c: f009 fa12 bl 8014144 memset(&GBT_CurrPower, 0, sizeof (GBT_CurrPower)); 800ad20: 2205 movs r2, #5 800ad22: 2100 movs r1, #0 800ad24: 4821 ldr r0, [pc, #132] @ (800adac ) 800ad26: f009 fa0d bl 8014144 memset(&GBT_MaxVoltage, 0, sizeof (GBT_MaxVoltage)); 800ad2a: 2202 movs r2, #2 800ad2c: 2100 movs r1, #0 800ad2e: 4820 ldr r0, [pc, #128] @ (800adb0 ) 800ad30: f009 fa08 bl 8014144 memset(&GBT_ChargingStatus, 0, sizeof (GBT_ChargingStatus)); 800ad34: 2209 movs r2, #9 800ad36: 2100 movs r1, #0 800ad38: 481e ldr r0, [pc, #120] @ (800adb4 ) 800ad3a: f009 fa03 bl 8014144 memset(&GBT_BatteryStatus, 0, sizeof (GBT_BatteryStatus)); 800ad3e: 2207 movs r2, #7 800ad40: 2100 movs r1, #0 800ad42: 481d ldr r0, [pc, #116] @ (800adb8 ) 800ad44: f009 f9fe bl 8014144 memset(&GBT_ChargerCurrentStatus, 0, sizeof (GBT_ChargerCurrentStatus)); 800ad48: 2208 movs r2, #8 800ad4a: 2100 movs r1, #0 800ad4c: 481b ldr r0, [pc, #108] @ (800adbc ) 800ad4e: f009 f9f9 bl 8014144 memset(&GBT_ChargerStop, 0, sizeof (GBT_ChargerStop)); 800ad52: 2208 movs r2, #8 800ad54: 2100 movs r1, #0 800ad56: 481a ldr r0, [pc, #104] @ (800adc0 ) 800ad58: f009 f9f4 bl 8014144 GBT_CurrPower.requestedCurrent = 4000; //0A 800ad5c: 4b13 ldr r3, [pc, #76] @ (800adac ) 800ad5e: f44f 627a mov.w r2, #4000 @ 0xfa0 800ad62: 805a strh r2, [r3, #2] GBT_CurrPower.requestedVoltage = 500; //50V 800ad64: 4b11 ldr r3, [pc, #68] @ (800adac ) 800ad66: f44f 72fa mov.w r2, #500 @ 0x1f4 800ad6a: 801a strh r2, [r3, #0] GBT_TimeChargingStarted = 0; 800ad6c: 4b15 ldr r3, [pc, #84] @ (800adc4 ) 800ad6e: 2200 movs r2, #0 800ad70: 601a str r2, [r3, #0] GBT_BRO = 0x00; 800ad72: 4b15 ldr r3, [pc, #84] @ (800adc8 ) 800ad74: 2200 movs r2, #0 800ad76: 701a strb r2, [r3, #0] GBT_LockResetError(); 800ad78: f001 f980 bl 800c07c } 800ad7c: bf00 nop 800ad7e: bd80 pop {r7, pc} 800ad80: 200003c4 .word 0x200003c4 800ad84: 20000328 .word 0x20000328 800ad88: 20000329 .word 0x20000329 800ad8c: 2000032a .word 0x2000032a 800ad90: 2000032b .word 0x2000032b 800ad94: 2000032c .word 0x2000032c 800ad98: 2000032d .word 0x2000032d 800ad9c: 200002f8 .word 0x200002f8 800ada0: 20000344 .word 0x20000344 800ada4: 20000378 .word 0x20000378 800ada8: 20000388 .word 0x20000388 800adac: 20000390 .word 0x20000390 800adb0: 20000340 .word 0x20000340 800adb4: 20000398 .word 0x20000398 800adb8: 200003a4 .word 0x200003a4 800adbc: 200003ac .word 0x200003ac 800adc0: 200003b4 .word 0x200003b4 800adc4: 200003c0 .word 0x200003c0 800adc8: 200003bc .word 0x200003bc 0800adcc : void GBT_Start(){ 800adcc: b580 push {r7, lr} 800adce: af00 add r7, sp, #0 RELAY_Write(RELAY_AUX0, 1); 800add0: 2101 movs r1, #1 800add2: 2000 movs r0, #0 800add4: f7fe fc8a bl 80096ec RELAY_Write(RELAY_AUX1, 1); 800add8: 2101 movs r1, #1 800adda: 2001 movs r0, #1 800addc: f7fe fc86 bl 80096ec GBT_SwitchState(GBT_S3_STARTED); 800ade0: 2013 movs r0, #19 800ade2: f7ff fe03 bl 800a9ec } 800ade6: bf00 nop 800ade8: bd80 pop {r7, pc} ... 0800adec : extern uint8_t config_initialized; gbtCcState_t CC_STATE_FILTERED; void CONN_Task(){ 800adec: b580 push {r7, lr} 800adee: af00 add r7, sp, #0 switch (connectorState){ 800adf0: 4b85 ldr r3, [pc, #532] @ (800b008 ) 800adf2: 781b ldrb r3, [r3, #0] 800adf4: 2b0c cmp r3, #12 800adf6: f200 80f3 bhi.w 800afe0 800adfa: a201 add r2, pc, #4 @ (adr r2, 800ae00 ) 800adfc: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800ae00: 0800ae35 .word 0x0800ae35 800ae04: 0800ae73 .word 0x0800ae73 800ae08: 0800ae4d .word 0x0800ae4d 800ae0c: 0800aeff .word 0x0800aeff 800ae10: 0800aeb9 .word 0x0800aeb9 800ae14: 0800afe1 .word 0x0800afe1 800ae18: 0800afe1 .word 0x0800afe1 800ae1c: 0800afe1 .word 0x0800afe1 800ae20: 0800af53 .word 0x0800af53 800ae24: 0800afe1 .word 0x0800afe1 800ae28: 0800afb5 .word 0x0800afb5 800ae2c: 0800afa7 .word 0x0800afa7 800ae30: 0800af99 .word 0x0800af99 case Unknown: // unlocked, waiting for config GBT_Lock(0); 800ae34: 2000 movs r0, #0 800ae36: f001 f817 bl 800be68 if (config_initialized) { 800ae3a: 4b74 ldr r3, [pc, #464] @ (800b00c ) 800ae3c: 781b ldrb r3, [r3, #0] 800ae3e: 2b00 cmp r3, #0 800ae40: f000 80d2 beq.w 800afe8 CONN_SetState(Unplugged); 800ae44: 2001 movs r0, #1 800ae46: f000 f8e9 bl 800b01c } break; 800ae4a: e0cd b.n 800afe8 case Disabled: // faulted, unlocked GBT_Lock(0); 800ae4c: 2000 movs r0, #0 800ae4e: f001 f80b bl 800be68 if(CONN.chargingError == 0) CONN_SetState(Unplugged); 800ae52: 4b6f ldr r3, [pc, #444] @ (800b010 ) 800ae54: 7f5b ldrb r3, [r3, #29] 800ae56: 2b00 cmp r3, #0 800ae58: d102 bne.n 800ae60 800ae5a: 2001 movs r0, #1 800ae5c: f000 f8de bl 800b01c if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800ae60: 4b6b ldr r3, [pc, #428] @ (800b010 ) 800ae62: 781b ldrb r3, [r3, #0] 800ae64: 2b03 cmp r3, #3 800ae66: f040 80c1 bne.w 800afec 800ae6a: 2000 movs r0, #0 800ae6c: f000 ffc8 bl 800be00 break; 800ae70: e0bc b.n 800afec case Unplugged: // unlocked, waiting to connect GBT_Lock(0); 800ae72: 2000 movs r0, #0 800ae74: f000 fff8 bl 800be68 if(CONN.chargingError != 0) CONN_SetState(Disabled); 800ae78: 4b65 ldr r3, [pc, #404] @ (800b010 ) 800ae7a: 7f5b ldrb r3, [r3, #29] 800ae7c: 2b00 cmp r3, #0 800ae7e: d002 beq.n 800ae86 800ae80: 2002 movs r0, #2 800ae82: f000 f8cb bl 800b01c if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800ae86: 4b62 ldr r3, [pc, #392] @ (800b010 ) 800ae88: 781b ldrb r3, [r3, #0] 800ae8a: 2b03 cmp r3, #3 800ae8c: d102 bne.n 800ae94 800ae8e: 2000 movs r0, #0 800ae90: f000 ffb6 bl 800be00 if((CONN_CC_GetState()==GBT_CC_4V) && (CONN.connControl != CMD_FORCE_UNLOCK)){ 800ae94: f000 f99e bl 800b1d4 800ae98: 4603 mov r3, r0 800ae9a: 2b03 cmp r3, #3 800ae9c: f040 80a8 bne.w 800aff0 800aea0: 4b5b ldr r3, [pc, #364] @ (800b010 ) 800aea2: 781b ldrb r3, [r3, #0] 800aea4: 2b03 cmp r3, #3 800aea6: f000 80a3 beq.w 800aff0 CONN_SetState(AuthRequired); 800aeaa: 2004 movs r0, #4 800aeac: f000 f8b6 bl 800b01c GBT_Lock(0); 800aeb0: 2000 movs r0, #0 800aeb2: f000 ffd9 bl 800be68 } break; 800aeb6: e09b b.n 800aff0 case AuthRequired: // plugged, waiting to start charge GBT_Lock(0); 800aeb8: 2000 movs r0, #0 800aeba: f000 ffd5 bl 800be68 if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800aebe: 4b54 ldr r3, [pc, #336] @ (800b010 ) 800aec0: 781b ldrb r3, [r3, #0] 800aec2: 2b03 cmp r3, #3 800aec4: d102 bne.n 800aecc 800aec6: 2000 movs r0, #0 800aec8: f000 ff9a bl 800be00 if(CONN_CC_GetState()==GBT_CC_4V){ 800aecc: f000 f982 bl 800b1d4 800aed0: 4603 mov r3, r0 800aed2: 2b03 cmp r3, #3 800aed4: d10f bne.n 800aef6 if(CONN.connControl == CMD_START){ 800aed6: 4b4e ldr r3, [pc, #312] @ (800b010 ) 800aed8: 781b ldrb r3, [r3, #0] 800aeda: 2b02 cmp r3, #2 800aedc: d102 bne.n 800aee4 CONN_SetState(Preparing); 800aede: 2003 movs r0, #3 800aee0: f000 f89c bl 800b01c } if(CONN.connControl == CMD_FORCE_UNLOCK){ 800aee4: 4b4a ldr r3, [pc, #296] @ (800b010 ) 800aee6: 781b ldrb r3, [r3, #0] 800aee8: 2b03 cmp r3, #3 800aeea: f040 8083 bne.w 800aff4 CONN_SetState(Unplugged); 800aeee: 2001 movs r0, #1 800aef0: f000 f894 bl 800b01c } // if CHARGING_NOT_ALLOWED — stay here }else{ CONN_SetState(Unplugged); } break; 800aef4: e07e b.n 800aff4 CONN_SetState(Unplugged); 800aef6: 2001 movs r0, #1 800aef8: f000 f890 bl 800b01c break; 800aefc: e07a b.n 800aff4 case Preparing: // charging, locked GBT_Lock(1); 800aefe: 2001 movs r0, #1 800af00: f000 ffb2 bl 800be68 if(GBT_State == GBT_COMPLETE){ 800af04: 4b43 ldr r3, [pc, #268] @ (800b014 ) 800af06: 781b ldrb r3, [r3, #0] 800af08: 2b22 cmp r3, #34 @ 0x22 800af0a: d11a bne.n 800af42 if(GBT_StopSource == GBT_STOP_EVSE){ 800af0c: 4b42 ldr r3, [pc, #264] @ (800b018 ) 800af0e: 781b ldrb r3, [r3, #0] 800af10: 2b00 cmp r3, #0 800af12: d103 bne.n 800af1c CONN_SetState(FinishedEVSE); 800af14: 200b movs r0, #11 800af16: f000 f881 bl 800b01c 800af1a: e012 b.n 800af42 }else if(GBT_StopSource == GBT_STOP_EV){ 800af1c: 4b3e ldr r3, [pc, #248] @ (800b018 ) 800af1e: 781b ldrb r3, [r3, #0] 800af20: 2b01 cmp r3, #1 800af22: d103 bne.n 800af2c CONN_SetState(FinishedEV); 800af24: 200c movs r0, #12 800af26: f000 f879 bl 800b01c 800af2a: e00a b.n 800af42 }else if(GBT_StopSource == GBT_STOP_OCPP){ 800af2c: 4b3a ldr r3, [pc, #232] @ (800b018 ) 800af2e: 781b ldrb r3, [r3, #0] 800af30: 2b02 cmp r3, #2 800af32: d103 bne.n 800af3c CONN_SetState(Finished); 800af34: 200a movs r0, #10 800af36: f000 f871 bl 800b01c 800af3a: e002 b.n 800af42 }else{ CONN_SetState(FinishedEVSE); 800af3c: 200b movs r0, #11 800af3e: f000 f86d bl 800b01c } } if(GBT_State == GBT_S10_CHARGING){ 800af42: 4b34 ldr r3, [pc, #208] @ (800b014 ) 800af44: 781b ldrb r3, [r3, #0] 800af46: 2b1e cmp r3, #30 800af48: d156 bne.n 800aff8 CONN_SetState(Charging); 800af4a: 2008 movs r0, #8 800af4c: f000 f866 bl 800b01c } break; 800af50: e052 b.n 800aff8 case Charging: // charging, locked GBT_Lock(1); 800af52: 2001 movs r0, #1 800af54: f000 ff88 bl 800be68 if(GBT_State == GBT_COMPLETE){ 800af58: 4b2e ldr r3, [pc, #184] @ (800b014 ) 800af5a: 781b ldrb r3, [r3, #0] 800af5c: 2b22 cmp r3, #34 @ 0x22 800af5e: d14d bne.n 800affc if(GBT_StopSource == GBT_STOP_EVSE){ 800af60: 4b2d ldr r3, [pc, #180] @ (800b018 ) 800af62: 781b ldrb r3, [r3, #0] 800af64: 2b00 cmp r3, #0 800af66: d103 bne.n 800af70 CONN_SetState(FinishedEVSE); 800af68: 200b movs r0, #11 800af6a: f000 f857 bl 800b01c CONN_SetState(Finished); }else{ CONN_SetState(FinishedEVSE); } } break; 800af6e: e045 b.n 800affc }else if(GBT_StopSource == GBT_STOP_EV){ 800af70: 4b29 ldr r3, [pc, #164] @ (800b018 ) 800af72: 781b ldrb r3, [r3, #0] 800af74: 2b01 cmp r3, #1 800af76: d103 bne.n 800af80 CONN_SetState(FinishedEV); 800af78: 200c movs r0, #12 800af7a: f000 f84f bl 800b01c break; 800af7e: e03d b.n 800affc }else if(GBT_StopSource == GBT_STOP_OCPP){ 800af80: 4b25 ldr r3, [pc, #148] @ (800b018 ) 800af82: 781b ldrb r3, [r3, #0] 800af84: 2b02 cmp r3, #2 800af86: d103 bne.n 800af90 CONN_SetState(Finished); 800af88: 200a movs r0, #10 800af8a: f000 f847 bl 800b01c break; 800af8e: e035 b.n 800affc CONN_SetState(FinishedEVSE); 800af90: 200b movs r0, #11 800af92: f000 f843 bl 800b01c break; 800af96: e031 b.n 800affc case FinishedEV: // charging completed by EV, waiting to transaction stop GBT_Lock(0); 800af98: 2000 movs r0, #0 800af9a: f000 ff65 bl 800be68 CONN_SetState(Finished); 800af9e: 200a movs r0, #10 800afa0: f000 f83c bl 800b01c break; 800afa4: e02d b.n 800b002 case FinishedEVSE: // charging completed by EVSE, waiting to transaction stop GBT_Lock(0); 800afa6: 2000 movs r0, #0 800afa8: f000 ff5e bl 800be68 CONN_SetState(Finished); 800afac: 200a movs r0, #10 800afae: f000 f835 bl 800b01c break; 800afb2: e026 b.n 800b002 case Finished: // charging completed, waiting to disconnect, unlocked GBT_Lock(0); 800afb4: 2000 movs r0, #0 800afb6: f000 ff57 bl 800be68 //TODO Force unlock time limit if(CONN.connControl == CMD_FORCE_UNLOCK) GBT_ForceLock(0); 800afba: 4b15 ldr r3, [pc, #84] @ (800b010 ) 800afbc: 781b ldrb r3, [r3, #0] 800afbe: 2b03 cmp r3, #3 800afc0: d102 bne.n 800afc8 800afc2: 2000 movs r0, #0 800afc4: f000 ff1c bl 800be00 if(CONN_CC_GetState()==GBT_CC_6V){ 800afc8: f000 f904 bl 800b1d4 800afcc: 4603 mov r3, r0 800afce: 2b02 cmp r3, #2 800afd0: d116 bne.n 800b000 GBT_Lock(0); 800afd2: 2000 movs r0, #0 800afd4: f000 ff48 bl 800be68 CONN_SetState(Unplugged); 800afd8: 2001 movs r0, #1 800afda: f000 f81f bl 800b01c } break; 800afde: e00f b.n 800b000 default: CONN_SetState(Unknown); 800afe0: 2000 movs r0, #0 800afe2: f000 f81b bl 800b01c } } 800afe6: e00c b.n 800b002 break; 800afe8: bf00 nop 800afea: e00a b.n 800b002 break; 800afec: bf00 nop 800afee: e008 b.n 800b002 break; 800aff0: bf00 nop 800aff2: e006 b.n 800b002 break; 800aff4: bf00 nop 800aff6: e004 b.n 800b002 break; 800aff8: bf00 nop 800affa: e002 b.n 800b002 break; 800affc: bf00 nop 800affe: e000 b.n 800b002 break; 800b000: bf00 nop } 800b002: bf00 nop 800b004: bd80 pop {r7, pc} 800b006: bf00 nop 800b008: 200003d1 .word 0x200003d1 800b00c: 20000f16 .word 0x20000f16 800b010: 200002f8 .word 0x200002f8 800b014: 20000318 .word 0x20000318 800b018: 200003d0 .word 0x200003d0 0800b01c : //external //CONN_SetState(Disabled); void CONN_SetState(CONN_State_t state){ 800b01c: b580 push {r7, lr} 800b01e: b082 sub sp, #8 800b020: af00 add r7, sp, #0 800b022: 4603 mov r3, r0 800b024: 71fb strb r3, [r7, #7] connectorState = state; 800b026: 4a3d ldr r2, [pc, #244] @ (800b11c ) 800b028: 79fb ldrb r3, [r7, #7] 800b02a: 7013 strb r3, [r2, #0] if(connectorState == Unknown) log_printf(LOG_INFO, "Connector: Unknown\n"); 800b02c: 4b3b ldr r3, [pc, #236] @ (800b11c ) 800b02e: 781b ldrb r3, [r3, #0] 800b030: 2b00 cmp r3, #0 800b032: d103 bne.n 800b03c 800b034: 493a ldr r1, [pc, #232] @ (800b120 ) 800b036: 2007 movs r0, #7 800b038: f000 fa6c bl 800b514 if(connectorState == Unplugged) log_printf(LOG_INFO, "Connector: Unplugged\n"); 800b03c: 4b37 ldr r3, [pc, #220] @ (800b11c ) 800b03e: 781b ldrb r3, [r3, #0] 800b040: 2b01 cmp r3, #1 800b042: d103 bne.n 800b04c 800b044: 4937 ldr r1, [pc, #220] @ (800b124 ) 800b046: 2007 movs r0, #7 800b048: f000 fa64 bl 800b514 if(connectorState == Disabled) log_printf(LOG_INFO, "Connector: Disabled\n"); 800b04c: 4b33 ldr r3, [pc, #204] @ (800b11c ) 800b04e: 781b ldrb r3, [r3, #0] 800b050: 2b02 cmp r3, #2 800b052: d103 bne.n 800b05c 800b054: 4934 ldr r1, [pc, #208] @ (800b128 ) 800b056: 2007 movs r0, #7 800b058: f000 fa5c bl 800b514 if(connectorState == Preparing) log_printf(LOG_INFO, "Connector: Preparing\n"); 800b05c: 4b2f ldr r3, [pc, #188] @ (800b11c ) 800b05e: 781b ldrb r3, [r3, #0] 800b060: 2b03 cmp r3, #3 800b062: d103 bne.n 800b06c 800b064: 4931 ldr r1, [pc, #196] @ (800b12c ) 800b066: 2007 movs r0, #7 800b068: f000 fa54 bl 800b514 if(connectorState == AuthRequired) log_printf(LOG_INFO, "Connector: AuthRequired\n"); 800b06c: 4b2b ldr r3, [pc, #172] @ (800b11c ) 800b06e: 781b ldrb r3, [r3, #0] 800b070: 2b04 cmp r3, #4 800b072: d103 bne.n 800b07c 800b074: 492e ldr r1, [pc, #184] @ (800b130 ) 800b076: 2007 movs r0, #7 800b078: f000 fa4c bl 800b514 if(connectorState == WaitingForEnergy) log_printf(LOG_INFO, "Connector: WaitingForEnergy\n"); 800b07c: 4b27 ldr r3, [pc, #156] @ (800b11c ) 800b07e: 781b ldrb r3, [r3, #0] 800b080: 2b05 cmp r3, #5 800b082: d103 bne.n 800b08c 800b084: 492b ldr r1, [pc, #172] @ (800b134 ) 800b086: 2007 movs r0, #7 800b088: f000 fa44 bl 800b514 if(connectorState == ChargingPausedEV) log_printf(LOG_INFO, "Connector: ChargingPausedEV\n"); 800b08c: 4b23 ldr r3, [pc, #140] @ (800b11c ) 800b08e: 781b ldrb r3, [r3, #0] 800b090: 2b06 cmp r3, #6 800b092: d103 bne.n 800b09c 800b094: 4928 ldr r1, [pc, #160] @ (800b138 ) 800b096: 2007 movs r0, #7 800b098: f000 fa3c bl 800b514 if(connectorState == ChargingPausedEVSE) log_printf(LOG_INFO, "Connector: ChargingPausedEVSE\n"); 800b09c: 4b1f ldr r3, [pc, #124] @ (800b11c ) 800b09e: 781b ldrb r3, [r3, #0] 800b0a0: 2b07 cmp r3, #7 800b0a2: d103 bne.n 800b0ac 800b0a4: 4925 ldr r1, [pc, #148] @ (800b13c ) 800b0a6: 2007 movs r0, #7 800b0a8: f000 fa34 bl 800b514 if(connectorState == Charging) log_printf(LOG_INFO, "Connector: Charging\n"); 800b0ac: 4b1b ldr r3, [pc, #108] @ (800b11c ) 800b0ae: 781b ldrb r3, [r3, #0] 800b0b0: 2b08 cmp r3, #8 800b0b2: d103 bne.n 800b0bc 800b0b4: 4922 ldr r1, [pc, #136] @ (800b140 ) 800b0b6: 2007 movs r0, #7 800b0b8: f000 fa2c bl 800b514 if(connectorState == AuthTimeout) log_printf(LOG_INFO, "Connector: AuthTimeout\n"); 800b0bc: 4b17 ldr r3, [pc, #92] @ (800b11c ) 800b0be: 781b ldrb r3, [r3, #0] 800b0c0: 2b09 cmp r3, #9 800b0c2: d103 bne.n 800b0cc 800b0c4: 491f ldr r1, [pc, #124] @ (800b144 ) 800b0c6: 2007 movs r0, #7 800b0c8: f000 fa24 bl 800b514 if(connectorState == Finished) log_printf(LOG_INFO, "Connector: Finished\n"); 800b0cc: 4b13 ldr r3, [pc, #76] @ (800b11c ) 800b0ce: 781b ldrb r3, [r3, #0] 800b0d0: 2b0a cmp r3, #10 800b0d2: d103 bne.n 800b0dc 800b0d4: 491c ldr r1, [pc, #112] @ (800b148 ) 800b0d6: 2007 movs r0, #7 800b0d8: f000 fa1c bl 800b514 if(connectorState == FinishedEVSE) log_printf(LOG_INFO, "Connector: FinishedEVSE\n"); 800b0dc: 4b0f ldr r3, [pc, #60] @ (800b11c ) 800b0de: 781b ldrb r3, [r3, #0] 800b0e0: 2b0b cmp r3, #11 800b0e2: d103 bne.n 800b0ec 800b0e4: 4919 ldr r1, [pc, #100] @ (800b14c ) 800b0e6: 2007 movs r0, #7 800b0e8: f000 fa14 bl 800b514 if(connectorState == FinishedEV) log_printf(LOG_INFO, "Connector: FinishedEV\n"); 800b0ec: 4b0b ldr r3, [pc, #44] @ (800b11c ) 800b0ee: 781b ldrb r3, [r3, #0] 800b0f0: 2b0c cmp r3, #12 800b0f2: d103 bne.n 800b0fc 800b0f4: 4916 ldr r1, [pc, #88] @ (800b150 ) 800b0f6: 2007 movs r0, #7 800b0f8: f000 fa0c bl 800b514 if(connectorState == Replugging) log_printf(LOG_INFO, "Connector: Replugging\n"); 800b0fc: 4b07 ldr r3, [pc, #28] @ (800b11c ) 800b0fe: 781b ldrb r3, [r3, #0] 800b100: 2b0d cmp r3, #13 800b102: d103 bne.n 800b10c 800b104: 4913 ldr r1, [pc, #76] @ (800b154 ) 800b106: 2007 movs r0, #7 800b108: f000 fa04 bl 800b514 CONN.connState = state; 800b10c: 4a12 ldr r2, [pc, #72] @ (800b158 ) 800b10e: 79fb ldrb r3, [r7, #7] 800b110: 7053 strb r3, [r2, #1] } 800b112: bf00 nop 800b114: 3708 adds r7, #8 800b116: 46bd mov sp, r7 800b118: bd80 pop {r7, pc} 800b11a: bf00 nop 800b11c: 200003d1 .word 0x200003d1 800b120: 080169cc .word 0x080169cc 800b124: 080169e0 .word 0x080169e0 800b128: 080169f8 .word 0x080169f8 800b12c: 08016a10 .word 0x08016a10 800b130: 08016a28 .word 0x08016a28 800b134: 08016a44 .word 0x08016a44 800b138: 08016a64 .word 0x08016a64 800b13c: 08016a84 .word 0x08016a84 800b140: 08016aa4 .word 0x08016aa4 800b144: 08016abc .word 0x08016abc 800b148: 08016ad4 .word 0x08016ad4 800b14c: 08016aec .word 0x08016aec 800b150: 08016b08 .word 0x08016b08 800b154: 08016b20 .word 0x08016b20 800b158: 200002f8 .word 0x200002f8 0800b15c : void CONN_CC_ReadStateFiltered() { 800b15c: b580 push {r7, lr} 800b15e: b082 sub sp, #8 800b160: af00 add r7, sp, #0 static uint32_t last_change_time = 0; static uint32_t last_check_time = 0; static uint8_t prev_state = 0; if((HAL_GetTick()-last_check_time)<100) return; 800b162: f003 fb8f bl 800e884 800b166: 4602 mov r2, r0 800b168: 4b16 ldr r3, [pc, #88] @ (800b1c4 ) 800b16a: 681b ldr r3, [r3, #0] 800b16c: 1ad3 subs r3, r2, r3 800b16e: 2b63 cmp r3, #99 @ 0x63 800b170: d924 bls.n 800b1bc last_check_time = HAL_GetTick(); 800b172: f003 fb87 bl 800e884 800b176: 4603 mov r3, r0 800b178: 4a12 ldr r2, [pc, #72] @ (800b1c4 ) 800b17a: 6013 str r3, [r2, #0] uint8_t new_state = CONN_CC_GetStateRaw(); 800b17c: f000 f834 bl 800b1e8 800b180: 4603 mov r3, r0 800b182: 71fb strb r3, [r7, #7] if (new_state != prev_state) { 800b184: 4b10 ldr r3, [pc, #64] @ (800b1c8 ) 800b186: 781b ldrb r3, [r3, #0] 800b188: 79fa ldrb r2, [r7, #7] 800b18a: 429a cmp r2, r3 800b18c: d008 beq.n 800b1a0 last_change_time = HAL_GetTick(); 800b18e: f003 fb79 bl 800e884 800b192: 4603 mov r3, r0 800b194: 4a0d ldr r2, [pc, #52] @ (800b1cc ) 800b196: 6013 str r3, [r2, #0] prev_state = new_state; 800b198: 4a0b ldr r2, [pc, #44] @ (800b1c8 ) 800b19a: 79fb ldrb r3, [r7, #7] 800b19c: 7013 strb r3, [r2, #0] 800b19e: e00e b.n 800b1be } else if ((HAL_GetTick() - last_change_time) >= 300) { 800b1a0: f003 fb70 bl 800e884 800b1a4: 4602 mov r2, r0 800b1a6: 4b09 ldr r3, [pc, #36] @ (800b1cc ) 800b1a8: 681b ldr r3, [r3, #0] 800b1aa: 1ad3 subs r3, r2, r3 800b1ac: f5b3 7f96 cmp.w r3, #300 @ 0x12c 800b1b0: d305 bcc.n 800b1be CC_STATE_FILTERED = prev_state; 800b1b2: 4b05 ldr r3, [pc, #20] @ (800b1c8 ) 800b1b4: 781a ldrb r2, [r3, #0] 800b1b6: 4b06 ldr r3, [pc, #24] @ (800b1d0 ) 800b1b8: 701a strb r2, [r3, #0] 800b1ba: e000 b.n 800b1be if((HAL_GetTick()-last_check_time)<100) return; 800b1bc: bf00 nop } } 800b1be: 3708 adds r7, #8 800b1c0: 46bd mov sp, r7 800b1c2: bd80 pop {r7, pc} 800b1c4: 200003d4 .word 0x200003d4 800b1c8: 200003d8 .word 0x200003d8 800b1cc: 200003dc .word 0x200003dc 800b1d0: 200003d2 .word 0x200003d2 0800b1d4 : uint8_t CONN_CC_GetState(){ 800b1d4: b480 push {r7} 800b1d6: af00 add r7, sp, #0 return CC_STATE_FILTERED; 800b1d8: 4b02 ldr r3, [pc, #8] @ (800b1e4 ) 800b1da: 781b ldrb r3, [r3, #0] } 800b1dc: 4618 mov r0, r3 800b1de: 46bd mov sp, r7 800b1e0: bc80 pop {r7} 800b1e2: 4770 bx lr 800b1e4: 200003d2 .word 0x200003d2 0800b1e8 : uint8_t CONN_CC_GetStateRaw(){ 800b1e8: b580 push {r7, lr} 800b1ea: b082 sub sp, #8 800b1ec: af00 add r7, sp, #0 float volt = CONN_CC_GetAdc(); 800b1ee: f000 f851 bl 800b294 800b1f2: 6078 str r0, [r7, #4] // if((volt<12.6f) && (volt>11.4f)) return GBT_CC_12V; // if((volt<6.8f) && (volt>5.2f)) return GBT_CC_6V; // if((volt<4.8f) && (volt>3.2f)) return GBT_CC_4V; // if((volt<2.8f) && (volt>1.2f)) return GBT_CC_2V; if((volt<13.0f) && (volt>11.0f)) return GBT_CC_12V; 800b1f4: 4922 ldr r1, [pc, #136] @ (800b280 ) 800b1f6: 6878 ldr r0, [r7, #4] 800b1f8: f7fd ffae bl 8009158 <__aeabi_fcmplt> 800b1fc: 4603 mov r3, r0 800b1fe: 2b00 cmp r3, #0 800b200: d008 beq.n 800b214 800b202: 4920 ldr r1, [pc, #128] @ (800b284 ) 800b204: 6878 ldr r0, [r7, #4] 800b206: f7fd ffc5 bl 8009194 <__aeabi_fcmpgt> 800b20a: 4603 mov r3, r0 800b20c: 2b00 cmp r3, #0 800b20e: d001 beq.n 800b214 800b210: 2301 movs r3, #1 800b212: e031 b.n 800b278 if((volt<7.2f) && (volt>4.8f)) return GBT_CC_6V; 800b214: 491c ldr r1, [pc, #112] @ (800b288 ) 800b216: 6878 ldr r0, [r7, #4] 800b218: f7fd ff9e bl 8009158 <__aeabi_fcmplt> 800b21c: 4603 mov r3, r0 800b21e: 2b00 cmp r3, #0 800b220: d008 beq.n 800b234 800b222: 491a ldr r1, [pc, #104] @ (800b28c ) 800b224: 6878 ldr r0, [r7, #4] 800b226: f7fd ffb5 bl 8009194 <__aeabi_fcmpgt> 800b22a: 4603 mov r3, r0 800b22c: 2b00 cmp r3, #0 800b22e: d001 beq.n 800b234 800b230: 2302 movs r3, #2 800b232: e021 b.n 800b278 if((volt<4.8f) && (volt>3.0f)) return GBT_CC_4V; 800b234: 4915 ldr r1, [pc, #84] @ (800b28c ) 800b236: 6878 ldr r0, [r7, #4] 800b238: f7fd ff8e bl 8009158 <__aeabi_fcmplt> 800b23c: 4603 mov r3, r0 800b23e: 2b00 cmp r3, #0 800b240: d008 beq.n 800b254 800b242: 4913 ldr r1, [pc, #76] @ (800b290 ) 800b244: 6878 ldr r0, [r7, #4] 800b246: f7fd ffa5 bl 8009194 <__aeabi_fcmpgt> 800b24a: 4603 mov r3, r0 800b24c: 2b00 cmp r3, #0 800b24e: d001 beq.n 800b254 800b250: 2303 movs r3, #3 800b252: e011 b.n 800b278 if((volt<3.0f) && (volt>1.0f)) return GBT_CC_2V; 800b254: 490e ldr r1, [pc, #56] @ (800b290 ) 800b256: 6878 ldr r0, [r7, #4] 800b258: f7fd ff7e bl 8009158 <__aeabi_fcmplt> 800b25c: 4603 mov r3, r0 800b25e: 2b00 cmp r3, #0 800b260: d009 beq.n 800b276 800b262: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 800b266: 6878 ldr r0, [r7, #4] 800b268: f7fd ff94 bl 8009194 <__aeabi_fcmpgt> 800b26c: 4603 mov r3, r0 800b26e: 2b00 cmp r3, #0 800b270: d001 beq.n 800b276 800b272: 2304 movs r3, #4 800b274: e000 b.n 800b278 return GBT_CC_UNKNOWN; 800b276: 2300 movs r3, #0 } 800b278: 4618 mov r0, r3 800b27a: 3708 adds r7, #8 800b27c: 46bd mov sp, r7 800b27e: bd80 pop {r7, pc} 800b280: 41500000 .word 0x41500000 800b284: 41300000 .word 0x41300000 800b288: 40e66666 .word 0x40e66666 800b28c: 4099999a .word 0x4099999a 800b290: 40400000 .word 0x40400000 0800b294 : float CONN_CC_GetAdc(){ 800b294: b580 push {r7, lr} 800b296: b082 sub sp, #8 800b298: af00 add r7, sp, #0 //Vin*k= 1.09v //12vin = 1353 ADC uint32_t adc; float volt; ADC_Select_Channel(ADC_CHANNEL_3); 800b29a: 2003 movs r0, #3 800b29c: f7fe fbc4 bl 8009a28 HAL_ADC_Start(&hadc1); 800b2a0: 480e ldr r0, [pc, #56] @ (800b2dc ) 800b2a2: f003 fbf5 bl 800ea90 HAL_ADC_PollForConversion(&hadc1, 100); 800b2a6: 2164 movs r1, #100 @ 0x64 800b2a8: 480c ldr r0, [pc, #48] @ (800b2dc ) 800b2aa: f003 fccb bl 800ec44 adc = HAL_ADC_GetValue(&hadc1); 800b2ae: 480b ldr r0, [pc, #44] @ (800b2dc ) 800b2b0: f003 fdce bl 800ee50 800b2b4: 6078 str r0, [r7, #4] HAL_ADC_Stop(&hadc1); 800b2b6: 4809 ldr r0, [pc, #36] @ (800b2dc ) 800b2b8: f003 fc98 bl 800ebec volt = (float)adc/113.4f; 800b2bc: 6878 ldr r0, [r7, #4] 800b2be: f7fd fd55 bl 8008d6c <__aeabi_ui2f> 800b2c2: 4603 mov r3, r0 800b2c4: 4906 ldr r1, [pc, #24] @ (800b2e0 ) 800b2c6: 4618 mov r0, r3 800b2c8: f7fd fe5c bl 8008f84 <__aeabi_fdiv> 800b2cc: 4603 mov r3, r0 800b2ce: 603b str r3, [r7, #0] return volt; 800b2d0: 683b ldr r3, [r7, #0] } 800b2d2: 4618 mov r0, r3 800b2d4: 3708 adds r7, #8 800b2d6: 46bd mov sp, r7 800b2d8: bd80 pop {r7, pc} 800b2da: bf00 nop 800b2dc: 2000026c .word 0x2000026c 800b2e0: 42e2cccd .word 0x42e2cccd 0800b2e4 : CRC_HandleTypeDef hcrc; /* CRC init function */ void MX_CRC_Init(void) { 800b2e4: b580 push {r7, lr} 800b2e6: af00 add r7, sp, #0 /* USER CODE END CRC_Init 0 */ /* USER CODE BEGIN CRC_Init 1 */ /* USER CODE END CRC_Init 1 */ hcrc.Instance = CRC; 800b2e8: 4b06 ldr r3, [pc, #24] @ (800b304 ) 800b2ea: 4a07 ldr r2, [pc, #28] @ (800b308 ) 800b2ec: 601a str r2, [r3, #0] if (HAL_CRC_Init(&hcrc) != HAL_OK) 800b2ee: 4805 ldr r0, [pc, #20] @ (800b304 ) 800b2f0: f004 ffd5 bl 801029e 800b2f4: 4603 mov r3, r0 800b2f6: 2b00 cmp r3, #0 800b2f8: d001 beq.n 800b2fe { Error_Handler(); 800b2fa: f001 f84d bl 800c398 } /* USER CODE BEGIN CRC_Init 2 */ /* USER CODE END CRC_Init 2 */ } 800b2fe: bf00 nop 800b300: bd80 pop {r7, pc} 800b302: bf00 nop 800b304: 200003e0 .word 0x200003e0 800b308: 40023000 .word 0x40023000 0800b30c : void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle) { 800b30c: b480 push {r7} 800b30e: b085 sub sp, #20 800b310: af00 add r7, sp, #0 800b312: 6078 str r0, [r7, #4] if(crcHandle->Instance==CRC) 800b314: 687b ldr r3, [r7, #4] 800b316: 681b ldr r3, [r3, #0] 800b318: 4a09 ldr r2, [pc, #36] @ (800b340 ) 800b31a: 4293 cmp r3, r2 800b31c: d10b bne.n 800b336 { /* USER CODE BEGIN CRC_MspInit 0 */ /* USER CODE END CRC_MspInit 0 */ /* CRC clock enable */ __HAL_RCC_CRC_CLK_ENABLE(); 800b31e: 4b09 ldr r3, [pc, #36] @ (800b344 ) 800b320: 695b ldr r3, [r3, #20] 800b322: 4a08 ldr r2, [pc, #32] @ (800b344 ) 800b324: f043 0340 orr.w r3, r3, #64 @ 0x40 800b328: 6153 str r3, [r2, #20] 800b32a: 4b06 ldr r3, [pc, #24] @ (800b344 ) 800b32c: 695b ldr r3, [r3, #20] 800b32e: f003 0340 and.w r3, r3, #64 @ 0x40 800b332: 60fb str r3, [r7, #12] 800b334: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN CRC_MspInit 1 */ /* USER CODE END CRC_MspInit 1 */ } } 800b336: bf00 nop 800b338: 3714 adds r7, #20 800b33a: 46bd mov sp, r7 800b33c: bc80 pop {r7} 800b33e: 4770 bx lr 800b340: 40023000 .word 0x40023000 800b344: 40021000 .word 0x40021000 0800b348 <_write>: #if defined(__GNUC__) int _write(int fd, char * ptr, int len) { 800b348: b580 push {r7, lr} 800b34a: b084 sub sp, #16 800b34c: af00 add r7, sp, #0 800b34e: 60f8 str r0, [r7, #12] 800b350: 60b9 str r1, [r7, #8] 800b352: 607a str r2, [r7, #4] debug_buffer_add((const uint8_t*)ptr, len); 800b354: 687b ldr r3, [r7, #4] 800b356: b29b uxth r3, r3 800b358: 4619 mov r1, r3 800b35a: 68b8 ldr r0, [r7, #8] 800b35c: f000 f806 bl 800b36c return len; 800b360: 687b ldr r3, [r7, #4] } 800b362: 4618 mov r0, r3 800b364: 3710 adds r7, #16 800b366: 46bd mov sp, r7 800b368: bd80 pop {r7, pc} ... 0800b36c : #endif // Добавляет данные в кольцевой буфер void debug_buffer_add(const uint8_t* data, uint16_t len) { 800b36c: b480 push {r7} 800b36e: b085 sub sp, #20 800b370: af00 add r7, sp, #0 800b372: 6078 str r0, [r7, #4] 800b374: 460b mov r3, r1 800b376: 807b strh r3, [r7, #2] \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800b378: b672 cpsid i } 800b37a: bf00 nop __disable_irq(); for (uint16_t i = 0; i < len; i++) { 800b37c: 2300 movs r3, #0 800b37e: 81fb strh r3, [r7, #14] 800b380: e045 b.n 800b40e // Если буфер полон, перезаписываем старые данные if (debug_buffer.count >= DEBUG_BUFFER_SIZE) { 800b382: 4b28 ldr r3, [pc, #160] @ (800b424 ) 800b384: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b388: b29b uxth r3, r3 800b38a: f5b3 6f80 cmp.w r3, #1024 @ 0x400 800b38e: d318 bcc.n 800b3c2 debug_buffer.read_index = (debug_buffer.read_index + 1) % DEBUG_BUFFER_SIZE; 800b390: 4b24 ldr r3, [pc, #144] @ (800b424 ) 800b392: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b396: b29b uxth r3, r3 800b398: 3301 adds r3, #1 800b39a: 425a negs r2, r3 800b39c: f3c3 0309 ubfx r3, r3, #0, #10 800b3a0: f3c2 0209 ubfx r2, r2, #0, #10 800b3a4: bf58 it pl 800b3a6: 4253 negpl r3, r2 800b3a8: b29a uxth r2, r3 800b3aa: 4b1e ldr r3, [pc, #120] @ (800b424 ) 800b3ac: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402 debug_buffer.count--; 800b3b0: 4b1c ldr r3, [pc, #112] @ (800b424 ) 800b3b2: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b3b6: b29b uxth r3, r3 800b3b8: 3b01 subs r3, #1 800b3ba: b29a uxth r2, r3 800b3bc: 4b19 ldr r3, [pc, #100] @ (800b424 ) 800b3be: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 } debug_buffer.buffer[debug_buffer.write_index] = data[i]; 800b3c2: 89fb ldrh r3, [r7, #14] 800b3c4: 687a ldr r2, [r7, #4] 800b3c6: 4413 add r3, r2 800b3c8: 4a16 ldr r2, [pc, #88] @ (800b424 ) 800b3ca: f8b2 2400 ldrh.w r2, [r2, #1024] @ 0x400 800b3ce: b292 uxth r2, r2 800b3d0: 7819 ldrb r1, [r3, #0] 800b3d2: 4b14 ldr r3, [pc, #80] @ (800b424 ) 800b3d4: 5499 strb r1, [r3, r2] debug_buffer.write_index = (debug_buffer.write_index + 1) % DEBUG_BUFFER_SIZE; 800b3d6: 4b13 ldr r3, [pc, #76] @ (800b424 ) 800b3d8: f8b3 3400 ldrh.w r3, [r3, #1024] @ 0x400 800b3dc: b29b uxth r3, r3 800b3de: 3301 adds r3, #1 800b3e0: 425a negs r2, r3 800b3e2: f3c3 0309 ubfx r3, r3, #0, #10 800b3e6: f3c2 0209 ubfx r2, r2, #0, #10 800b3ea: bf58 it pl 800b3ec: 4253 negpl r3, r2 800b3ee: b29a uxth r2, r3 800b3f0: 4b0c ldr r3, [pc, #48] @ (800b424 ) 800b3f2: f8a3 2400 strh.w r2, [r3, #1024] @ 0x400 debug_buffer.count++; 800b3f6: 4b0b ldr r3, [pc, #44] @ (800b424 ) 800b3f8: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b3fc: b29b uxth r3, r3 800b3fe: 3301 adds r3, #1 800b400: b29a uxth r2, r3 800b402: 4b08 ldr r3, [pc, #32] @ (800b424 ) 800b404: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 for (uint16_t i = 0; i < len; i++) { 800b408: 89fb ldrh r3, [r7, #14] 800b40a: 3301 adds r3, #1 800b40c: 81fb strh r3, [r7, #14] 800b40e: 89fa ldrh r2, [r7, #14] 800b410: 887b ldrh r3, [r7, #2] 800b412: 429a cmp r2, r3 800b414: d3b5 bcc.n 800b382 __ASM volatile ("cpsie i" : : : "memory"); 800b416: b662 cpsie i } 800b418: bf00 nop } __enable_irq(); } 800b41a: bf00 nop 800b41c: 3714 adds r7, #20 800b41e: 46bd mov sp, r7 800b420: bc80 pop {r7} 800b422: 4770 bx lr 800b424: 200003e8 .word 0x200003e8 0800b428 : // Возвращает количество доступных данных в буфере uint16_t debug_buffer_available(void) { 800b428: b480 push {r7} 800b42a: b083 sub sp, #12 800b42c: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800b42e: b672 cpsid i } 800b430: bf00 nop __disable_irq(); uint16_t count = debug_buffer.count; 800b432: 4b06 ldr r3, [pc, #24] @ (800b44c ) 800b434: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b438: 80fb strh r3, [r7, #6] __ASM volatile ("cpsie i" : : : "memory"); 800b43a: b662 cpsie i } 800b43c: bf00 nop __enable_irq(); return count; 800b43e: 88fb ldrh r3, [r7, #6] } 800b440: 4618 mov r0, r3 800b442: 370c adds r7, #12 800b444: 46bd mov sp, r7 800b446: bc80 pop {r7} 800b448: 4770 bx lr 800b44a: bf00 nop 800b44c: 200003e8 .word 0x200003e8 0800b450 : // Отправляет один пакет данных из буфера через SC_SendPacket (не более 250 байт) void debug_buffer_send(void) { 800b450: b580 push {r7, lr} 800b452: b082 sub sp, #8 800b454: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800b456: b672 cpsid i } 800b458: bf00 nop __disable_irq(); // Если буфер пуст, ничего не делаем if (debug_buffer.count == 0) { 800b45a: 4b2d ldr r3, [pc, #180] @ (800b510 ) 800b45c: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b460: b29b uxth r3, r3 800b462: 2b00 cmp r3, #0 800b464: d102 bne.n 800b46c __ASM volatile ("cpsie i" : : : "memory"); 800b466: b662 cpsie i } 800b468: bf00 nop __enable_irq(); return; 800b46a: e04e b.n 800b50a } // Определяем сколько байт можно отправить (не более 250) uint16_t bytes_to_send = debug_buffer.count; 800b46c: 4b28 ldr r3, [pc, #160] @ (800b510 ) 800b46e: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b472: 80fb strh r3, [r7, #6] if (bytes_to_send > DEBUG_BUFFER_MAX_COUNT) { 800b474: 88fb ldrh r3, [r7, #6] 800b476: 2b80 cmp r3, #128 @ 0x80 800b478: d901 bls.n 800b47e bytes_to_send = DEBUG_BUFFER_MAX_COUNT; 800b47a: 2380 movs r3, #128 @ 0x80 800b47c: 80fb strh r3, [r7, #6] } // Вычисляем сколько байт до конца буфера uint16_t bytes_to_end = DEBUG_BUFFER_SIZE - debug_buffer.read_index; 800b47e: 4b24 ldr r3, [pc, #144] @ (800b510 ) 800b480: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b484: b29b uxth r3, r3 800b486: f5c3 6380 rsb r3, r3, #1024 @ 0x400 800b48a: 80bb strh r3, [r7, #4] // Отправляем только непрерывный блок (до конца буфера или до bytes_to_send) if (bytes_to_send > bytes_to_end) { 800b48c: 88fa ldrh r2, [r7, #6] 800b48e: 88bb ldrh r3, [r7, #4] 800b490: 429a cmp r2, r3 800b492: d901 bls.n 800b498 bytes_to_send = bytes_to_end; 800b494: 88bb ldrh r3, [r7, #4] 800b496: 80fb strh r3, [r7, #6] } // Отправляем данные напрямую из буфера if(bytes_to_send == debug_buffer.count){ 800b498: 4b1d ldr r3, [pc, #116] @ (800b510 ) 800b49a: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b49e: b29b uxth r3, r3 800b4a0: 88fa ldrh r2, [r7, #6] 800b4a2: 429a cmp r2, r3 800b4a4: d10c bne.n 800b4c0 SC_SendPacket(&debug_buffer.buffer[debug_buffer.read_index], bytes_to_send, CMD_GET_LOG); 800b4a6: 4b1a ldr r3, [pc, #104] @ (800b510 ) 800b4a8: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b4ac: b29b uxth r3, r3 800b4ae: 461a mov r2, r3 800b4b0: 4b17 ldr r3, [pc, #92] @ (800b510 ) 800b4b2: 4413 add r3, r2 800b4b4: 88f9 ldrh r1, [r7, #6] 800b4b6: 2250 movs r2, #80 @ 0x50 800b4b8: 4618 mov r0, r3 800b4ba: f002 f8d3 bl 800d664 800b4be: e00b b.n 800b4d8 }else{ SC_SendPacket(&debug_buffer.buffer[debug_buffer.read_index], bytes_to_send, CMD_GET_LOG_CONTINUE); 800b4c0: 4b13 ldr r3, [pc, #76] @ (800b510 ) 800b4c2: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b4c6: b29b uxth r3, r3 800b4c8: 461a mov r2, r3 800b4ca: 4b11 ldr r3, [pc, #68] @ (800b510 ) 800b4cc: 4413 add r3, r2 800b4ce: 88f9 ldrh r1, [r7, #6] 800b4d0: 2251 movs r2, #81 @ 0x51 800b4d2: 4618 mov r0, r3 800b4d4: f002 f8c6 bl 800d664 } debug_buffer.read_index = (debug_buffer.read_index + bytes_to_send) % DEBUG_BUFFER_SIZE; 800b4d8: 4b0d ldr r3, [pc, #52] @ (800b510 ) 800b4da: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402 800b4de: b29a uxth r2, r3 800b4e0: 88fb ldrh r3, [r7, #6] 800b4e2: 4413 add r3, r2 800b4e4: b29b uxth r3, r3 800b4e6: f3c3 0309 ubfx r3, r3, #0, #10 800b4ea: b29a uxth r2, r3 800b4ec: 4b08 ldr r3, [pc, #32] @ (800b510 ) 800b4ee: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402 debug_buffer.count -= bytes_to_send; 800b4f2: 4b07 ldr r3, [pc, #28] @ (800b510 ) 800b4f4: f8b3 3404 ldrh.w r3, [r3, #1028] @ 0x404 800b4f8: b29a uxth r2, r3 800b4fa: 88fb ldrh r3, [r7, #6] 800b4fc: 1ad3 subs r3, r2, r3 800b4fe: b29a uxth r2, r3 800b500: 4b03 ldr r3, [pc, #12] @ (800b510 ) 800b502: f8a3 2404 strh.w r2, [r3, #1028] @ 0x404 __ASM volatile ("cpsie i" : : : "memory"); 800b506: b662 cpsie i } 800b508: bf00 nop __enable_irq(); } 800b50a: 3708 adds r7, #8 800b50c: 46bd mov sp, r7 800b50e: bd80 pop {r7, pc} 800b510: 200003e8 .word 0x200003e8 0800b514 : #define LOG_BUFFER_SIZE 128 uint8_t log_buffer[LOG_BUFFER_SIZE]; // Кастомный printf с приоритетом лога int log_printf(LogLevel_t level, const char *format, ...) { 800b514: b40e push {r1, r2, r3} 800b516: b580 push {r7, lr} 800b518: b085 sub sp, #20 800b51a: af00 add r7, sp, #0 800b51c: 4603 mov r3, r0 800b51e: 71fb strb r3, [r7, #7] va_list args; int result; // Добавляем приоритет первым байтом log_buffer[0] = (uint8_t)level; 800b520: 4a15 ldr r2, [pc, #84] @ (800b578 ) 800b522: 79fb ldrb r3, [r7, #7] 800b524: 7013 strb r3, [r2, #0] // Форматируем строку начиная со второго байта va_start(args, format); 800b526: f107 0320 add.w r3, r7, #32 800b52a: 60bb str r3, [r7, #8] result = vsnprintf((char*)&log_buffer[1], LOG_BUFFER_SIZE - 2, format, args); 800b52c: 68bb ldr r3, [r7, #8] 800b52e: 69fa ldr r2, [r7, #28] 800b530: 217e movs r1, #126 @ 0x7e 800b532: 4812 ldr r0, [pc, #72] @ (800b57c ) 800b534: f008 fdc8 bl 80140c8 800b538: 60f8 str r0, [r7, #12] va_end(args); // Проверяем, не переполнился ли буфер if (result < 0) { 800b53a: 68fb ldr r3, [r7, #12] 800b53c: 2b00 cmp r3, #0 800b53e: da01 bge.n 800b544 return result; 800b540: 68fb ldr r3, [r7, #12] 800b542: e012 b.n 800b56a } // Ограничиваем размер, чтобы оставить место для нуль-терминатора if (result >= (LOG_BUFFER_SIZE - 2)) { 800b544: 68fb ldr r3, [r7, #12] 800b546: 2b7d cmp r3, #125 @ 0x7d 800b548: dd01 ble.n 800b54e result = LOG_BUFFER_SIZE - 2; 800b54a: 237e movs r3, #126 @ 0x7e 800b54c: 60fb str r3, [r7, #12] } // Добавляем нуль-терминатор в конец log_buffer[result + 1] = '\0'; 800b54e: 68fb ldr r3, [r7, #12] 800b550: 3301 adds r3, #1 800b552: 4a09 ldr r2, [pc, #36] @ (800b578 ) 800b554: 2100 movs r1, #0 800b556: 54d1 strb r1, [r2, r3] // Отправляем в буфер (приоритет + строка + нуль-терминатор) debug_buffer_add(log_buffer, result + 2); 800b558: 68fb ldr r3, [r7, #12] 800b55a: b29b uxth r3, r3 800b55c: 3302 adds r3, #2 800b55e: b29b uxth r3, r3 800b560: 4619 mov r1, r3 800b562: 4805 ldr r0, [pc, #20] @ (800b578 ) 800b564: f7ff ff02 bl 800b36c return result; 800b568: 68fb ldr r3, [r7, #12] } 800b56a: 4618 mov r0, r3 800b56c: 3714 adds r7, #20 800b56e: 46bd mov sp, r7 800b570: e8bd 4080 ldmia.w sp!, {r7, lr} 800b574: b003 add sp, #12 800b576: 4770 bx lr 800b578: 200007f0 .word 0x200007f0 800b57c: 200007f1 .word 0x200007f1 0800b580 : // GB/T Time Synchronization Packet #include "main.h" #include "soft_rtc.h" #include "charger_gbt.h" void GBT_SendCTS(){ 800b580: b580 push {r7, lr} 800b582: b082 sub sp, #8 800b584: af00 add r7, sp, #0 uint8_t data[7]; unix_to_bcd(get_Current_Time(), data); 800b586: f002 fb79 bl 800dc7c 800b58a: 4602 mov r2, r0 800b58c: 463b mov r3, r7 800b58e: 4619 mov r1, r3 800b590: 4610 mov r0, r2 800b592: f002 fbb1 bl 800dcf8 // data[3] = 0x05; //days // data[4] = 0x05; //month // data[5] = 0x24; //years // data[6] = 0x20; //centuries J_SendPacket(0x000700, 6, 7, data); 800b596: 463b mov r3, r7 800b598: 2207 movs r2, #7 800b59a: 2106 movs r1, #6 800b59c: f44f 60e0 mov.w r0, #1792 @ 0x700 800b5a0: f000 fb60 bl 800bc64 } 800b5a4: bf00 nop 800b5a6: 3708 adds r7, #8 800b5a8: 46bd mov sp, r7 800b5aa: bd80 pop {r7, pc} 0800b5ac : //GB/T Max Load Packet void GBT_SendCML(){ 800b5ac: b580 push {r7, lr} 800b5ae: af00 add r7, sp, #0 // data[4] = 0xC4; //-150A maximum output current // data[5] = 0x09; // // data[6] = 0x8C; //-2A minimum output current // data[7] = 0x0F; // J_SendPacket(0x000800, 6, 8, (uint8_t*)&GBT_MaxLoad); 800b5b0: 4b04 ldr r3, [pc, #16] @ (800b5c4 ) 800b5b2: 2208 movs r2, #8 800b5b4: 2106 movs r1, #6 800b5b6: f44f 6000 mov.w r0, #2048 @ 0x800 800b5ba: f000 fb53 bl 800bc64 } 800b5be: bf00 nop 800b5c0: bd80 pop {r7, pc} 800b5c2: bf00 nop 800b5c4: 20000330 .word 0x20000330 0800b5c8 : //GB/T Version packet void GBT_SendCHM(){ 800b5c8: b580 push {r7, lr} 800b5ca: b082 sub sp, #8 800b5cc: af00 add r7, sp, #0 uint8_t data[3]; data[0] = 0x01; 800b5ce: 2301 movs r3, #1 800b5d0: 713b strb r3, [r7, #4] data[1] = 0x01; 800b5d2: 2301 movs r3, #1 800b5d4: 717b strb r3, [r7, #5] data[2] = 0x00; 800b5d6: 2300 movs r3, #0 800b5d8: 71bb strb r3, [r7, #6] J_SendPacket(0x2600, 6, 3, data); 800b5da: 1d3b adds r3, r7, #4 800b5dc: 2203 movs r2, #3 800b5de: 2106 movs r1, #6 800b5e0: f44f 5018 mov.w r0, #9728 @ 0x2600 800b5e4: f000 fb3e bl 800bc64 } 800b5e8: bf00 nop 800b5ea: 3708 adds r7, #8 800b5ec: 46bd mov sp, r7 800b5ee: bd80 pop {r7, pc} 0800b5f0 : //GB/T CRM Packet (state=BMS identified) void GBT_SendCRM(uint8_t state){ 800b5f0: b580 push {r7, lr} 800b5f2: b082 sub sp, #8 800b5f4: af00 add r7, sp, #0 800b5f6: 4603 mov r3, r0 800b5f8: 71fb strb r3, [r7, #7] // data[3] = 0x01; // data[4] = 0x00; // data[5] = 0x42; //TODO: location BFG // data[6] = 0x46; // data[7] = 0x47; GBT_ChargerInfo.bmsIdentified = state; 800b5fa: 4a07 ldr r2, [pc, #28] @ (800b618 ) 800b5fc: 79fb ldrb r3, [r7, #7] 800b5fe: 7013 strb r3, [r2, #0] J_SendPacket(0x100, 6, 8, (uint8_t *)&GBT_ChargerInfo); 800b600: 4b05 ldr r3, [pc, #20] @ (800b618 ) 800b602: 2208 movs r2, #8 800b604: 2106 movs r1, #6 800b606: f44f 7080 mov.w r0, #256 @ 0x100 800b60a: f000 fb2b bl 800bc64 } 800b60e: bf00 nop 800b610: 3708 adds r7, #8 800b612: 46bd mov sp, r7 800b614: bd80 pop {r7, pc} 800b616: bf00 nop 800b618: 20000338 .word 0x20000338 0800b61c : //GB/T CRO packet (Charger ready) void GBT_SendCRO(uint8_t state){ 800b61c: b580 push {r7, lr} 800b61e: b084 sub sp, #16 800b620: af00 add r7, sp, #0 800b622: 4603 mov r3, r0 800b624: 71fb strb r3, [r7, #7] uint8_t data[1]; data[0] = state; 800b626: 79fb ldrb r3, [r7, #7] 800b628: 733b strb r3, [r7, #12] J_SendPacket(0xA00, 4, 1, data); 800b62a: f107 030c add.w r3, r7, #12 800b62e: 2201 movs r2, #1 800b630: 2104 movs r1, #4 800b632: f44f 6020 mov.w r0, #2560 @ 0xa00 800b636: f000 fb15 bl 800bc64 } 800b63a: bf00 nop 800b63c: 3710 adds r7, #16 800b63e: 46bd mov sp, r7 800b640: bd80 pop {r7, pc} ... 0800b644 : //GB/T CCS packet (Charger current status) void GBT_SendCCS(){ 800b644: b580 push {r7, lr} 800b646: af00 add r7, sp, #0 // data[3] = GBT_CurrPower.requestedCurrent>>8; //TODO: current // data[4] = GBT_StateTick()/60000; //charging time (min) // data[5] = 0; //TODO: 255 min+ // data[6] = 0b11111101; //charging not permitted // data[7] = 0xFF; J_SendPacket(0x1200, 6, 8, (uint8_t *)&GBT_ChargerCurrentStatus); 800b648: 4b04 ldr r3, [pc, #16] @ (800b65c ) 800b64a: 2208 movs r2, #8 800b64c: 2106 movs r1, #6 800b64e: f44f 5090 mov.w r0, #4608 @ 0x1200 800b652: f000 fb07 bl 800bc64 } 800b656: bf00 nop 800b658: bd80 pop {r7, pc} 800b65a: bf00 nop 800b65c: 200003ac .word 0x200003ac 0800b660 : // GB/T Charging Stop packet void GBT_SendCST(uint32_t Cause){ 800b660: b580 push {r7, lr} 800b662: b084 sub sp, #16 800b664: af00 add r7, sp, #0 800b666: 6078 str r0, [r7, #4] uint8_t data[8]; data[0] = (Cause>>24) & 0xFF; // Error 800b668: 687b ldr r3, [r7, #4] 800b66a: 0e1b lsrs r3, r3, #24 800b66c: b2db uxtb r3, r3 800b66e: 723b strb r3, [r7, #8] data[1] = (Cause>>16) & 0xFF; // 800b670: 687b ldr r3, [r7, #4] 800b672: 0c1b lsrs r3, r3, #16 800b674: b2db uxtb r3, r3 800b676: 727b strb r3, [r7, #9] data[2] = (Cause>>8) & 0xFF; // 800b678: 687b ldr r3, [r7, #4] 800b67a: 0a1b lsrs r3, r3, #8 800b67c: b2db uxtb r3, r3 800b67e: 72bb strb r3, [r7, #10] data[3] = Cause & 0xFF; // 800b680: 687b ldr r3, [r7, #4] 800b682: b2db uxtb r3, r3 800b684: 72fb strb r3, [r7, #11] J_SendPacket(0x1A00, 4, 4, data); 800b686: f107 0308 add.w r3, r7, #8 800b68a: 2204 movs r2, #4 800b68c: 2104 movs r1, #4 800b68e: f44f 50d0 mov.w r0, #6656 @ 0x1a00 800b692: f000 fae7 bl 800bc64 } 800b696: bf00 nop 800b698: 3710 adds r7, #16 800b69a: 46bd mov sp, r7 800b69c: bd80 pop {r7, pc} ... 0800b6a0 : void GBT_SendCSD(){ 800b6a0: b580 push {r7, lr} 800b6a2: af00 add r7, sp, #0 GBT_ChargerStop.chargerNumber = GBT_ChargerInfo.chargerNumber; 800b6a4: 4b0b ldr r3, [pc, #44] @ (800b6d4 ) 800b6a6: f8d3 3001 ldr.w r3, [r3, #1] 800b6aa: 4a0b ldr r2, [pc, #44] @ (800b6d8 ) 800b6ac: 6053 str r3, [r2, #4] GBT_ChargerStop.outputEnergy = 0; //TODO Energy meters 800b6ae: 4b0a ldr r3, [pc, #40] @ (800b6d8 ) 800b6b0: 2200 movs r2, #0 800b6b2: 709a strb r2, [r3, #2] 800b6b4: 2200 movs r2, #0 800b6b6: 70da strb r2, [r3, #3] GBT_ChargerStop.chargingTime = GBT_ChargerCurrentStatus.chargingTime; 800b6b8: 4b08 ldr r3, [pc, #32] @ (800b6dc ) 800b6ba: 889b ldrh r3, [r3, #4] 800b6bc: b29a uxth r2, r3 800b6be: 4b06 ldr r3, [pc, #24] @ (800b6d8 ) 800b6c0: 801a strh r2, [r3, #0] J_SendPacket(0x1D00, 6, 7, (uint8_t *)&GBT_ChargerStop); 800b6c2: 4b05 ldr r3, [pc, #20] @ (800b6d8 ) 800b6c4: 2207 movs r2, #7 800b6c6: 2106 movs r1, #6 800b6c8: f44f 50e8 mov.w r0, #7424 @ 0x1d00 800b6cc: f000 faca bl 800bc64 } 800b6d0: bf00 nop 800b6d2: bd80 pop {r7, pc} 800b6d4: 20000338 .word 0x20000338 800b6d8: 200003b4 .word 0x200003b4 800b6dc: 200003ac .word 0x200003ac 0800b6e0 : void GBT_SendCEM(uint32_t ErrorCode){ 800b6e0: b580 push {r7, lr} 800b6e2: b084 sub sp, #16 800b6e4: af00 add r7, sp, #0 800b6e6: 6078 str r0, [r7, #4] uint8_t data[8]; data[0] = (ErrorCode>>24) & 0xFF; // Error 800b6e8: 687b ldr r3, [r7, #4] 800b6ea: 0e1b lsrs r3, r3, #24 800b6ec: b2db uxtb r3, r3 800b6ee: 723b strb r3, [r7, #8] data[1] = (ErrorCode>>16) & 0xFF; // 800b6f0: 687b ldr r3, [r7, #4] 800b6f2: 0c1b lsrs r3, r3, #16 800b6f4: b2db uxtb r3, r3 800b6f6: 727b strb r3, [r7, #9] data[2] = (ErrorCode>>8) & 0xFF; // 800b6f8: 687b ldr r3, [r7, #4] 800b6fa: 0a1b lsrs r3, r3, #8 800b6fc: b2db uxtb r3, r3 800b6fe: 72bb strb r3, [r7, #10] data[3] = ErrorCode & 0xFF; // 800b700: 687b ldr r3, [r7, #4] 800b702: b2db uxtb r3, r3 800b704: 72fb strb r3, [r7, #11] J_SendPacket(0x1F00, 4, 4, data); 800b706: f107 0308 add.w r3, r7, #8 800b70a: 2204 movs r2, #4 800b70c: 2104 movs r1, #4 800b70e: f44f 50f8 mov.w r0, #7936 @ 0x1f00 800b712: f000 faa7 bl 800bc64 } 800b716: bf00 nop 800b718: 3710 adds r7, #16 800b71a: 46bd mov sp, r7 800b71c: bd80 pop {r7, pc} ... 0800b720 : * EXTI PB8 ------> I2C1_SCL PB9 ------> I2C1_SDA */ void MX_GPIO_Init(void) { 800b720: b580 push {r7, lr} 800b722: b08a sub sp, #40 @ 0x28 800b724: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800b726: f107 0314 add.w r3, r7, #20 800b72a: 2200 movs r2, #0 800b72c: 601a str r2, [r3, #0] 800b72e: 605a str r2, [r3, #4] 800b730: 609a str r2, [r3, #8] 800b732: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 800b734: 4b7d ldr r3, [pc, #500] @ (800b92c ) 800b736: 699b ldr r3, [r3, #24] 800b738: 4a7c ldr r2, [pc, #496] @ (800b92c ) 800b73a: f043 0310 orr.w r3, r3, #16 800b73e: 6193 str r3, [r2, #24] 800b740: 4b7a ldr r3, [pc, #488] @ (800b92c ) 800b742: 699b ldr r3, [r3, #24] 800b744: f003 0310 and.w r3, r3, #16 800b748: 613b str r3, [r7, #16] 800b74a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 800b74c: 4b77 ldr r3, [pc, #476] @ (800b92c ) 800b74e: 699b ldr r3, [r3, #24] 800b750: 4a76 ldr r2, [pc, #472] @ (800b92c ) 800b752: f043 0304 orr.w r3, r3, #4 800b756: 6193 str r3, [r2, #24] 800b758: 4b74 ldr r3, [pc, #464] @ (800b92c ) 800b75a: 699b ldr r3, [r3, #24] 800b75c: f003 0304 and.w r3, r3, #4 800b760: 60fb str r3, [r7, #12] 800b762: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOB_CLK_ENABLE(); 800b764: 4b71 ldr r3, [pc, #452] @ (800b92c ) 800b766: 699b ldr r3, [r3, #24] 800b768: 4a70 ldr r2, [pc, #448] @ (800b92c ) 800b76a: f043 0308 orr.w r3, r3, #8 800b76e: 6193 str r3, [r2, #24] 800b770: 4b6e ldr r3, [pc, #440] @ (800b92c ) 800b772: 699b ldr r3, [r3, #24] 800b774: f003 0308 and.w r3, r3, #8 800b778: 60bb str r3, [r7, #8] 800b77a: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOE_CLK_ENABLE(); 800b77c: 4b6b ldr r3, [pc, #428] @ (800b92c ) 800b77e: 699b ldr r3, [r3, #24] 800b780: 4a6a ldr r2, [pc, #424] @ (800b92c ) 800b782: f043 0340 orr.w r3, r3, #64 @ 0x40 800b786: 6193 str r3, [r2, #24] 800b788: 4b68 ldr r3, [pc, #416] @ (800b92c ) 800b78a: 699b ldr r3, [r3, #24] 800b78c: f003 0340 and.w r3, r3, #64 @ 0x40 800b790: 607b str r3, [r7, #4] 800b792: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 800b794: 4b65 ldr r3, [pc, #404] @ (800b92c ) 800b796: 699b ldr r3, [r3, #24] 800b798: 4a64 ldr r2, [pc, #400] @ (800b92c ) 800b79a: f043 0320 orr.w r3, r3, #32 800b79e: 6193 str r3, [r2, #24] 800b7a0: 4b62 ldr r3, [pc, #392] @ (800b92c ) 800b7a2: 699b ldr r3, [r3, #24] 800b7a4: f003 0320 and.w r3, r3, #32 800b7a8: 603b str r3, [r7, #0] 800b7aa: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, LOCK_A_Pin|LOCK_B_Pin, GPIO_PIN_RESET); 800b7ac: 2200 movs r2, #0 800b7ae: 2130 movs r1, #48 @ 0x30 800b7b0: 485f ldr r0, [pc, #380] @ (800b930 ) 800b7b2: f005 f86e bl 8010892 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, RELAY1_Pin|RELAY2_Pin|RELAY3_Pin|RELAY4_Pin 800b7b6: 2200 movs r2, #0 800b7b8: f44f 51f8 mov.w r1, #7936 @ 0x1f00 800b7bc: 485d ldr r0, [pc, #372] @ (800b934 ) 800b7be: f005 f868 bl 8010892 |RELAY5_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RELAY_CC_GPIO_Port, RELAY_CC_Pin, GPIO_PIN_RESET); 800b7c2: 2200 movs r2, #0 800b7c4: f44f 4100 mov.w r1, #32768 @ 0x8000 800b7c8: 485b ldr r0, [pc, #364] @ (800b938 ) 800b7ca: f005 f862 bl 8010892 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, RELAY_DC_Pin|USART2_DIR_Pin, GPIO_PIN_RESET); 800b7ce: 2200 movs r2, #0 800b7d0: 2118 movs r1, #24 800b7d2: 485a ldr r0, [pc, #360] @ (800b93c ) 800b7d4: f005 f85d bl 8010892 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(EE_WP_GPIO_Port, EE_WP_Pin, GPIO_PIN_RESET); 800b7d8: 2200 movs r2, #0 800b7da: 2180 movs r1, #128 @ 0x80 800b7dc: 4858 ldr r0, [pc, #352] @ (800b940 ) 800b7de: f005 f858 bl 8010892 /*Configure GPIO pin : IN_SW0_Pin */ GPIO_InitStruct.Pin = IN_SW0_Pin; 800b7e2: 2302 movs r3, #2 800b7e4: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b7e6: 2300 movs r3, #0 800b7e8: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b7ea: 2300 movs r3, #0 800b7ec: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_SW0_GPIO_Port, &GPIO_InitStruct); 800b7ee: f107 0314 add.w r3, r7, #20 800b7f2: 4619 mov r1, r3 800b7f4: 4850 ldr r0, [pc, #320] @ (800b938 ) 800b7f6: f004 feb1 bl 801055c /*Configure GPIO pin : IN_SW1_Pin */ GPIO_InitStruct.Pin = IN_SW1_Pin; 800b7fa: 2304 movs r3, #4 800b7fc: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b7fe: 2300 movs r3, #0 800b800: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 800b802: 2302 movs r3, #2 800b804: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_SW1_GPIO_Port, &GPIO_InitStruct); 800b806: f107 0314 add.w r3, r7, #20 800b80a: 4619 mov r1, r3 800b80c: 484a ldr r0, [pc, #296] @ (800b938 ) 800b80e: f004 fea5 bl 801055c /*Configure GPIO pins : LOCK_A_Pin LOCK_B_Pin */ GPIO_InitStruct.Pin = LOCK_A_Pin|LOCK_B_Pin; 800b812: 2330 movs r3, #48 @ 0x30 800b814: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b816: 2301 movs r3, #1 800b818: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b81a: 2300 movs r3, #0 800b81c: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b81e: 2302 movs r3, #2 800b820: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800b822: f107 0314 add.w r3, r7, #20 800b826: 4619 mov r1, r3 800b828: 4841 ldr r0, [pc, #260] @ (800b930 ) 800b82a: f004 fe97 bl 801055c /*Configure GPIO pins : IN0_Pin AC_OK_Pin ISO_IN_Pin */ GPIO_InitStruct.Pin = IN0_Pin|AC_OK_Pin|ISO_IN_Pin; 800b82e: f244 0382 movw r3, #16514 @ 0x4082 800b832: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b834: 2300 movs r3, #0 800b836: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b838: 2300 movs r3, #0 800b83a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800b83c: f107 0314 add.w r3, r7, #20 800b840: 4619 mov r1, r3 800b842: 483c ldr r0, [pc, #240] @ (800b934 ) 800b844: f004 fe8a bl 801055c /*Configure GPIO pins : RELAY1_Pin RELAY2_Pin RELAY3_Pin RELAY4_Pin RELAY5_Pin */ GPIO_InitStruct.Pin = RELAY1_Pin|RELAY2_Pin|RELAY3_Pin|RELAY4_Pin 800b848: f44f 53f8 mov.w r3, #7936 @ 0x1f00 800b84c: 617b str r3, [r7, #20] |RELAY5_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b84e: 2301 movs r3, #1 800b850: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b852: 2300 movs r3, #0 800b854: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b856: 2302 movs r3, #2 800b858: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800b85a: f107 0314 add.w r3, r7, #20 800b85e: 4619 mov r1, r3 800b860: 4834 ldr r0, [pc, #208] @ (800b934 ) 800b862: f004 fe7b bl 801055c /*Configure GPIO pin : RELAY_CC_Pin */ GPIO_InitStruct.Pin = RELAY_CC_Pin; 800b866: f44f 4300 mov.w r3, #32768 @ 0x8000 800b86a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b86c: 2301 movs r3, #1 800b86e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b870: 2300 movs r3, #0 800b872: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b874: 2302 movs r3, #2 800b876: 623b str r3, [r7, #32] HAL_GPIO_Init(RELAY_CC_GPIO_Port, &GPIO_InitStruct); 800b878: f107 0314 add.w r3, r7, #20 800b87c: 4619 mov r1, r3 800b87e: 482e ldr r0, [pc, #184] @ (800b938 ) 800b880: f004 fe6c bl 801055c /*Configure GPIO pins : RELAY_DC_Pin USART2_DIR_Pin */ GPIO_InitStruct.Pin = RELAY_DC_Pin|USART2_DIR_Pin; 800b884: 2318 movs r3, #24 800b886: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b888: 2301 movs r3, #1 800b88a: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b88c: 2300 movs r3, #0 800b88e: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b890: 2302 movs r3, #2 800b892: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800b894: f107 0314 add.w r3, r7, #20 800b898: 4619 mov r1, r3 800b89a: 4828 ldr r0, [pc, #160] @ (800b93c ) 800b89c: f004 fe5e bl 801055c /*Configure GPIO pin : IN_ESTOP_Pin */ GPIO_InitStruct.Pin = IN_ESTOP_Pin; 800b8a0: 2380 movs r3, #128 @ 0x80 800b8a2: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b8a4: 2300 movs r3, #0 800b8a6: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b8a8: 2300 movs r3, #0 800b8aa: 61fb str r3, [r7, #28] HAL_GPIO_Init(IN_ESTOP_GPIO_Port, &GPIO_InitStruct); 800b8ac: f107 0314 add.w r3, r7, #20 800b8b0: 4619 mov r1, r3 800b8b2: 4822 ldr r0, [pc, #136] @ (800b93c ) 800b8b4: f004 fe52 bl 801055c /*Configure GPIO pins : IN_FB2_Pin IN_FB1_Pin */ GPIO_InitStruct.Pin = IN_FB2_Pin|IN_FB1_Pin; 800b8b8: 2318 movs r3, #24 800b8ba: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800b8bc: 2300 movs r3, #0 800b8be: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b8c0: 2300 movs r3, #0 800b8c2: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800b8c4: f107 0314 add.w r3, r7, #20 800b8c8: 4619 mov r1, r3 800b8ca: 481d ldr r0, [pc, #116] @ (800b940 ) 800b8cc: f004 fe46 bl 801055c /*Configure GPIO pin : EE_WP_Pin */ GPIO_InitStruct.Pin = EE_WP_Pin; 800b8d0: 2380 movs r3, #128 @ 0x80 800b8d2: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800b8d4: 2301 movs r3, #1 800b8d6: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800b8d8: 2300 movs r3, #0 800b8da: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800b8dc: 2302 movs r3, #2 800b8de: 623b str r3, [r7, #32] HAL_GPIO_Init(EE_WP_GPIO_Port, &GPIO_InitStruct); 800b8e0: f107 0314 add.w r3, r7, #20 800b8e4: 4619 mov r1, r3 800b8e6: 4816 ldr r0, [pc, #88] @ (800b940 ) 800b8e8: f004 fe38 bl 801055c /*Configure GPIO pins : PB8 PB9 */ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; 800b8ec: f44f 7340 mov.w r3, #768 @ 0x300 800b8f0: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 800b8f2: 2312 movs r3, #18 800b8f4: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800b8f6: 2303 movs r3, #3 800b8f8: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800b8fa: f107 0314 add.w r3, r7, #20 800b8fe: 4619 mov r1, r3 800b900: 480f ldr r0, [pc, #60] @ (800b940 ) 800b902: f004 fe2b bl 801055c /*Configure peripheral I/O remapping */ __HAL_AFIO_REMAP_I2C1_ENABLE(); 800b906: 4b0f ldr r3, [pc, #60] @ (800b944 ) 800b908: 685b ldr r3, [r3, #4] 800b90a: 627b str r3, [r7, #36] @ 0x24 800b90c: 6a7b ldr r3, [r7, #36] @ 0x24 800b90e: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800b912: 627b str r3, [r7, #36] @ 0x24 800b914: 6a7b ldr r3, [r7, #36] @ 0x24 800b916: f043 0302 orr.w r3, r3, #2 800b91a: 627b str r3, [r7, #36] @ 0x24 800b91c: 4a09 ldr r2, [pc, #36] @ (800b944 ) 800b91e: 6a7b ldr r3, [r7, #36] @ 0x24 800b920: 6053 str r3, [r2, #4] } 800b922: bf00 nop 800b924: 3728 adds r7, #40 @ 0x28 800b926: 46bd mov sp, r7 800b928: bd80 pop {r7, pc} 800b92a: bf00 nop 800b92c: 40021000 .word 0x40021000 800b930: 40011000 .word 0x40011000 800b934: 40011800 .word 0x40011800 800b938: 40010800 .word 0x40010800 800b93c: 40011400 .word 0x40011400 800b940: 40010c00 .word 0x40010c00 800b944: 40010000 .word 0x40010000 0800b948 : extern GBT_BCL_t GBT_CurrPower; j_receive_t j_rx; void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) { 800b948: b590 push {r4, r7, lr} 800b94a: b0cd sub sp, #308 @ 0x134 800b94c: af40 add r7, sp, #256 @ 0x100 800b94e: 6078 str r0, [r7, #4] CAN_RxHeaderTypeDef RxHeader; uint8_t RxData[8] = {0,}; 800b950: f107 030c add.w r3, r7, #12 800b954: 2200 movs r2, #0 800b956: 601a str r2, [r3, #0] 800b958: 605a str r2, [r3, #4] if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &RxHeader, RxData) == HAL_OK) 800b95a: f107 030c add.w r3, r7, #12 800b95e: f107 0214 add.w r2, r7, #20 800b962: 2100 movs r1, #0 800b964: 6878 ldr r0, [r7, #4] 800b966: f004 f82d bl 800f9c4 800b96a: 4603 mov r3, r0 800b96c: 2b00 cmp r3, #0 800b96e: f040 8153 bne.w 800bc18 { if((RxHeader.ExtId & 0x00FFFF) == ((J_ID_SE << 8) | J_ID_EV)){ // SA, DA match 800b972: 69bb ldr r3, [r7, #24] 800b974: b29b uxth r3, r3 800b976: f245 62f4 movw r2, #22260 @ 0x56f4 800b97a: 4293 cmp r3, r2 800b97c: f040 814c bne.w 800bc18 switch ((RxHeader.ExtId>>8) & 0x00FF00){ 800b980: 69bb ldr r3, [r7, #24] 800b982: 0a1b lsrs r3, r3, #8 800b984: f403 437f and.w r3, r3, #65280 @ 0xff00 800b988: f5b3 4f6c cmp.w r3, #60416 @ 0xec00 800b98c: d013 beq.n 800b9b6 800b98e: f5b3 4f6c cmp.w r3, #60416 @ 0xec00 800b992: f200 810c bhi.w 800bbae 800b996: f5b3 4f6b cmp.w r3, #60160 @ 0xeb00 800b99a: d057 beq.n 800ba4c 800b99c: f5b3 4f6b cmp.w r3, #60160 @ 0xeb00 800b9a0: f200 8105 bhi.w 800bbae 800b9a4: f5b3 5fc8 cmp.w r3, #6400 @ 0x1900 800b9a8: f000 80dd beq.w 800bb66 800b9ac: f5b3 5ff0 cmp.w r3, #7680 @ 0x1e00 800b9b0: f000 80b6 beq.w 800bb20 800b9b4: e0fb b.n 800bbae case 0xEC00: //PGN Connection Management Message if(RxData[0] == 16){ //Request to Send 800b9b6: 7b3b ldrb r3, [r7, #12] 800b9b8: 2b10 cmp r3, #16 800b9ba: d13e bne.n 800ba3a /* Set the RTS values */ j_rx.size = RxData[1] | (RxData[2]<<8); 800b9bc: 7b7b ldrb r3, [r7, #13] 800b9be: b21a sxth r2, r3 800b9c0: 7bbb ldrb r3, [r7, #14] 800b9c2: b21b sxth r3, r3 800b9c4: 021b lsls r3, r3, #8 800b9c6: b21b sxth r3, r3 800b9c8: 4313 orrs r3, r2 800b9ca: b21b sxth r3, r3 800b9cc: b29a uxth r2, r3 800b9ce: 4b94 ldr r3, [pc, #592] @ (800bc20 ) 800b9d0: f8a3 2104 strh.w r2, [r3, #260] @ 0x104 j_rx.packet = 1; 800b9d4: 4b92 ldr r3, [pc, #584] @ (800bc20 ) 800b9d6: 2201 movs r2, #1 800b9d8: f883 2107 strb.w r2, [r3, #263] @ 0x107 j_rx.packets = RxData[3]; 800b9dc: 7bfa ldrb r2, [r7, #15] 800b9de: 4b90 ldr r3, [pc, #576] @ (800bc20 ) 800b9e0: f883 2106 strb.w r2, [r3, #262] @ 0x106 j_rx.step = 2; //TODO 800b9e4: 4b8e ldr r3, [pc, #568] @ (800bc20 ) 800b9e6: 2202 movs r2, #2 800b9e8: f883 2108 strb.w r2, [r3, #264] @ 0x108 j_rx.step_cts_remain = j_rx.step; 800b9ec: 4b8c ldr r3, [pc, #560] @ (800bc20 ) 800b9ee: f893 2108 ldrb.w r2, [r3, #264] @ 0x108 800b9f2: 4b8b ldr r3, [pc, #556] @ (800bc20 ) 800b9f4: f883 2109 strb.w r2, [r3, #265] @ 0x109 j_rx.PGN = (RxData[7] << 16) | (RxData[6] << 8) | RxData[5]; 800b9f8: 7cfb ldrb r3, [r7, #19] 800b9fa: 041a lsls r2, r3, #16 800b9fc: 7cbb ldrb r3, [r7, #18] 800b9fe: 021b lsls r3, r3, #8 800ba00: 4313 orrs r3, r2 800ba02: 7c7a ldrb r2, [r7, #17] 800ba04: 4313 orrs r3, r2 800ba06: 461a mov r2, r3 800ba08: 4b85 ldr r3, [pc, #532] @ (800bc20 ) 800ba0a: f8c3 2100 str.w r2, [r3, #256] @ 0x100 if(j_rx.size<256) { //TODO: valid check 800ba0e: 4b84 ldr r3, [pc, #528] @ (800bc20 ) 800ba10: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800ba14: 2bff cmp r3, #255 @ 0xff 800ba16: d810 bhi.n 800ba3a J_SendCTS(j_rx); 800ba18: 4c81 ldr r4, [pc, #516] @ (800bc20 ) 800ba1a: 4668 mov r0, sp 800ba1c: f104 0310 add.w r3, r4, #16 800ba20: f44f 7280 mov.w r2, #256 @ 0x100 800ba24: 4619 mov r1, r3 800ba26: f008 fc9b bl 8014360 800ba2a: e894 000f ldmia.w r4, {r0, r1, r2, r3} 800ba2e: f000 f941 bl 800bcb4 j_rx.state = 1; 800ba32: 4b7b ldr r3, [pc, #492] @ (800bc20 ) 800ba34: 2201 movs r2, #1 800ba36: f883 210a strb.w r2, [r3, #266] @ 0x10a } } if(RxData[0] == 255){ //Connection Abort 800ba3a: 7b3b ldrb r3, [r7, #12] 800ba3c: 2bff cmp r3, #255 @ 0xff 800ba3e: f040 80e6 bne.w 800bc0e j_rx.state = 0; 800ba42: 4b77 ldr r3, [pc, #476] @ (800bc20 ) 800ba44: 2200 movs r2, #0 800ba46: f883 210a strb.w r2, [r3, #266] @ 0x10a * 1CECF456 11 02 01 FF FF 00 02 00 * 1CEB56F4 01 01 01 00 03 46 05 40 * 1CEC56F4 FF FF FF FF FF 00 00 00 */ break; 800ba4a: e0e0 b.n 800bc0e case 0xEB00: //PGN Data Message if(j_rx.state != 1) break; 800ba4c: 4b74 ldr r3, [pc, #464] @ (800bc20 ) 800ba4e: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800ba52: 2b01 cmp r3, #1 800ba54: f040 80dd bne.w 800bc12 if((RxData[0]>0) && (RxData[0]<35)){ //Array limit check 800ba58: 7b3b ldrb r3, [r7, #12] 800ba5a: 2b00 cmp r3, #0 800ba5c: f000 80db beq.w 800bc16 800ba60: 7b3b ldrb r3, [r7, #12] 800ba62: 2b22 cmp r3, #34 @ 0x22 800ba64: f200 80d7 bhi.w 800bc16 if(j_rx.packet == RxData[0]){ //step check 800ba68: 4b6d ldr r3, [pc, #436] @ (800bc20 ) 800ba6a: f893 2107 ldrb.w r2, [r3, #263] @ 0x107 800ba6e: 7b3b ldrb r3, [r7, #12] 800ba70: 429a cmp r2, r3 800ba72: f040 80d0 bne.w 800bc16 memcpy (&j_rx.data[(RxData[0]-1)*7], &RxData[1],7); 800ba76: 7b3b ldrb r3, [r7, #12] 800ba78: 1e5a subs r2, r3, #1 800ba7a: 4613 mov r3, r2 800ba7c: 00db lsls r3, r3, #3 800ba7e: 1a9b subs r3, r3, r2 800ba80: 4a67 ldr r2, [pc, #412] @ (800bc20 ) 800ba82: 1898 adds r0, r3, r2 800ba84: f107 030c add.w r3, r7, #12 800ba88: 3301 adds r3, #1 800ba8a: 2207 movs r2, #7 800ba8c: 4619 mov r1, r3 800ba8e: f008 fc67 bl 8014360 j_rx.packet++; 800ba92: 4b63 ldr r3, [pc, #396] @ (800bc20 ) 800ba94: f893 3107 ldrb.w r3, [r3, #263] @ 0x107 800ba98: 3301 adds r3, #1 800ba9a: b2da uxtb r2, r3 800ba9c: 4b60 ldr r3, [pc, #384] @ (800bc20 ) 800ba9e: f883 2107 strb.w r2, [r3, #263] @ 0x107 if(j_rx.packet > j_rx.packets){ 800baa2: 4b5f ldr r3, [pc, #380] @ (800bc20 ) 800baa4: f893 2107 ldrb.w r2, [r3, #263] @ 0x107 800baa8: 4b5d ldr r3, [pc, #372] @ (800bc20 ) 800baaa: f893 3106 ldrb.w r3, [r3, #262] @ 0x106 800baae: 429a cmp r2, r3 800bab0: d911 bls.n 800bad6 //End of transmission J_SendACK(j_rx); 800bab2: 4c5b ldr r4, [pc, #364] @ (800bc20 ) 800bab4: 4668 mov r0, sp 800bab6: f104 0310 add.w r3, r4, #16 800baba: f44f 7280 mov.w r2, #256 @ 0x100 800babe: 4619 mov r1, r3 800bac0: f008 fc4e bl 8014360 800bac4: e894 000f ldmia.w r4, {r0, r1, r2, r3} 800bac8: f000 f93a bl 800bd40 j_rx.state = 2; 800bacc: 4b54 ldr r3, [pc, #336] @ (800bc20 ) 800bace: 2202 movs r2, #2 800bad0: f883 210a strb.w r2, [r3, #266] @ 0x10a j_rx.step_cts_remain = 2; } } } } break; 800bad4: e09f b.n 800bc16 if(j_rx.step_cts_remain > 0) j_rx.step_cts_remain--; 800bad6: 4b52 ldr r3, [pc, #328] @ (800bc20 ) 800bad8: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 800badc: 2b00 cmp r3, #0 800bade: d007 beq.n 800baf0 800bae0: 4b4f ldr r3, [pc, #316] @ (800bc20 ) 800bae2: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 800bae6: 3b01 subs r3, #1 800bae8: b2da uxtb r2, r3 800baea: 4b4d ldr r3, [pc, #308] @ (800bc20 ) 800baec: f883 2109 strb.w r2, [r3, #265] @ 0x109 if(j_rx.step_cts_remain == 0){ 800baf0: 4b4b ldr r3, [pc, #300] @ (800bc20 ) 800baf2: f893 3109 ldrb.w r3, [r3, #265] @ 0x109 800baf6: 2b00 cmp r3, #0 800baf8: f040 808d bne.w 800bc16 J_SendCTS(j_rx); 800bafc: 4c48 ldr r4, [pc, #288] @ (800bc20 ) 800bafe: 4668 mov r0, sp 800bb00: f104 0310 add.w r3, r4, #16 800bb04: f44f 7280 mov.w r2, #256 @ 0x100 800bb08: 4619 mov r1, r3 800bb0a: f008 fc29 bl 8014360 800bb0e: e894 000f ldmia.w r4, {r0, r1, r2, r3} 800bb12: f000 f8cf bl 800bcb4 j_rx.step_cts_remain = 2; 800bb16: 4b42 ldr r3, [pc, #264] @ (800bc20 ) 800bb18: 2202 movs r2, #2 800bb1a: f883 2109 strb.w r2, [r3, #265] @ 0x109 break; 800bb1e: e07a b.n 800bc16 case 0x1E00: //PGN BEM (ERROR) //Error force stop // --> Suspend EV log_printf(LOG_ERR, "BEM Received, force stopping...\n"); 800bb20: 4940 ldr r1, [pc, #256] @ (800bc24 ) 800bb22: 2004 movs r0, #4 800bb24: f7ff fcf6 bl 800b514 log_printf(LOG_ERR, "BEM: %02X %02X %02X %02X", RxData[0], RxData[1], RxData[2], RxData[3]); 800bb28: 7b3b ldrb r3, [r7, #12] 800bb2a: 4619 mov r1, r3 800bb2c: 7b7b ldrb r3, [r7, #13] 800bb2e: 4618 mov r0, r3 800bb30: 7bbb ldrb r3, [r7, #14] 800bb32: 7bfa ldrb r2, [r7, #15] 800bb34: 9201 str r2, [sp, #4] 800bb36: 9300 str r3, [sp, #0] 800bb38: 4603 mov r3, r0 800bb3a: 460a mov r2, r1 800bb3c: 493a ldr r1, [pc, #232] @ (800bc28 ) 800bb3e: 2004 movs r0, #4 800bb40: f7ff fce8 bl 800b514 log_printf(LOG_ERR, " %02X %02X %02X %02X\n", RxData[4], RxData[5], RxData[6], RxData[7]); 800bb44: 7c3b ldrb r3, [r7, #16] 800bb46: 4619 mov r1, r3 800bb48: 7c7b ldrb r3, [r7, #17] 800bb4a: 4618 mov r0, r3 800bb4c: 7cbb ldrb r3, [r7, #18] 800bb4e: 7cfa ldrb r2, [r7, #19] 800bb50: 9201 str r2, [sp, #4] 800bb52: 9300 str r3, [sp, #0] 800bb54: 4603 mov r3, r0 800bb56: 460a mov r2, r1 800bb58: 4934 ldr r1, [pc, #208] @ (800bc2c ) 800bb5a: 2004 movs r0, #4 800bb5c: f7ff fcda bl 800b514 GBT_ForceStop(); 800bb60: f7ff f86e bl 800ac40 break; 800bb64: e058 b.n 800bc18 case 0x1900: //PGN BST (STOP) //Normal stop // --> Suspend EV log_printf(LOG_INFO, "BST Received, stopping...\n"); 800bb66: 4932 ldr r1, [pc, #200] @ (800bc30 ) 800bb68: 2007 movs r0, #7 800bb6a: f7ff fcd3 bl 800b514 log_printf(LOG_INFO, "BST: %02X %02X %02X %02X", RxData[0], RxData[1], RxData[2], RxData[3]); 800bb6e: 7b3b ldrb r3, [r7, #12] 800bb70: 4619 mov r1, r3 800bb72: 7b7b ldrb r3, [r7, #13] 800bb74: 4618 mov r0, r3 800bb76: 7bbb ldrb r3, [r7, #14] 800bb78: 7bfa ldrb r2, [r7, #15] 800bb7a: 9201 str r2, [sp, #4] 800bb7c: 9300 str r3, [sp, #0] 800bb7e: 4603 mov r3, r0 800bb80: 460a mov r2, r1 800bb82: 492c ldr r1, [pc, #176] @ (800bc34 ) 800bb84: 2007 movs r0, #7 800bb86: f7ff fcc5 bl 800b514 log_printf(LOG_INFO, " %02X %02X %02X %02X\n", RxData[4], RxData[5], RxData[6], RxData[7]); 800bb8a: 7c3b ldrb r3, [r7, #16] 800bb8c: 4619 mov r1, r3 800bb8e: 7c7b ldrb r3, [r7, #17] 800bb90: 4618 mov r0, r3 800bb92: 7cbb ldrb r3, [r7, #18] 800bb94: 7cfa ldrb r2, [r7, #19] 800bb96: 9201 str r2, [sp, #4] 800bb98: 9300 str r3, [sp, #0] 800bb9a: 4603 mov r3, r0 800bb9c: 460a mov r2, r1 800bb9e: 4923 ldr r1, [pc, #140] @ (800bc2c ) 800bba0: 2007 movs r0, #7 800bba2: f7ff fcb7 bl 800b514 GBT_StopEV(GBT_CST_BMS_ACTIVELY_SUSPENDS); 800bba6: 4824 ldr r0, [pc, #144] @ (800bc38 ) 800bba8: f7fe ffec bl 800ab84 break; 800bbac: e034 b.n 800bc18 default: if(j_rx.state == 0){//TODO protections 800bbae: 4b1c ldr r3, [pc, #112] @ (800bc20 ) 800bbb0: f893 310a ldrb.w r3, [r3, #266] @ 0x10a 800bbb4: 2b00 cmp r3, #0 800bbb6: d12f bne.n 800bc18 //Short packet j_rx.size = RxHeader.DLC; 800bbb8: 6a7b ldr r3, [r7, #36] @ 0x24 800bbba: b29a uxth r2, r3 800bbbc: 4b18 ldr r3, [pc, #96] @ (800bc20 ) 800bbbe: f8a3 2104 strh.w r2, [r3, #260] @ 0x104 j_rx.packet = 1; 800bbc2: 4b17 ldr r3, [pc, #92] @ (800bc20 ) 800bbc4: 2201 movs r2, #1 800bbc6: f883 2107 strb.w r2, [r3, #263] @ 0x107 j_rx.packets = 1; 800bbca: 4b15 ldr r3, [pc, #84] @ (800bc20 ) 800bbcc: 2201 movs r2, #1 800bbce: f883 2106 strb.w r2, [r3, #262] @ 0x106 j_rx.step = 1; 800bbd2: 4b13 ldr r3, [pc, #76] @ (800bc20 ) 800bbd4: 2201 movs r2, #1 800bbd6: f883 2108 strb.w r2, [r3, #264] @ 0x108 j_rx.step_cts_remain = 0; 800bbda: 4b11 ldr r3, [pc, #68] @ (800bc20 ) 800bbdc: 2200 movs r2, #0 800bbde: f883 2109 strb.w r2, [r3, #265] @ 0x109 j_rx.PGN = (RxHeader.ExtId>>8) & 0x00FF00; 800bbe2: 69bb ldr r3, [r7, #24] 800bbe4: 0a1b lsrs r3, r3, #8 800bbe6: f403 437f and.w r3, r3, #65280 @ 0xff00 800bbea: 4a0d ldr r2, [pc, #52] @ (800bc20 ) 800bbec: f8c2 3100 str.w r3, [r2, #256] @ 0x100 j_rx.state = 2; 800bbf0: 4b0b ldr r3, [pc, #44] @ (800bc20 ) 800bbf2: 2202 movs r2, #2 800bbf4: f883 210a strb.w r2, [r3, #266] @ 0x10a memcpy (j_rx.data, RxData, j_rx.size); 800bbf8: 4b09 ldr r3, [pc, #36] @ (800bc20 ) 800bbfa: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800bbfe: 461a mov r2, r3 800bc00: f107 030c add.w r3, r7, #12 800bc04: 4619 mov r1, r3 800bc06: 4806 ldr r0, [pc, #24] @ (800bc20 ) 800bc08: f008 fbaa bl 8014360 } } } } } 800bc0c: e004 b.n 800bc18 break; 800bc0e: bf00 nop 800bc10: e002 b.n 800bc18 if(j_rx.state != 1) break; 800bc12: bf00 nop 800bc14: e000 b.n 800bc18 break; 800bc16: bf00 nop } 800bc18: bf00 nop 800bc1a: 3734 adds r7, #52 @ 0x34 800bc1c: 46bd mov sp, r7 800bc1e: bd90 pop {r4, r7, pc} 800bc20: 20000870 .word 0x20000870 800bc24: 08016b38 .word 0x08016b38 800bc28: 08016b5c .word 0x08016b5c 800bc2c: 08016b78 .word 0x08016b78 800bc30: 08016b90 .word 0x08016b90 800bc34: 08016bac .word 0x08016bac 800bc38: 4000f0f0 .word 0x4000f0f0 0800bc3c : void GBT_CAN_ReInit(){ 800bc3c: b580 push {r7, lr} 800bc3e: af00 add r7, sp, #0 HAL_CAN_Stop(&hcan1); 800bc40: 4807 ldr r0, [pc, #28] @ (800bc60 ) 800bc42: f003 fd73 bl 800f72c MX_CAN1_Init(); 800bc46: f7fd ff0b bl 8009a60 GBT_CAN_FilterInit(); 800bc4a: f000 f8b3 bl 800bdb4 HAL_CAN_Start(&hcan1); 800bc4e: 4804 ldr r0, [pc, #16] @ (800bc60 ) 800bc50: f003 fd28 bl 800f6a4 HAL_CAN_ActivateNotification(&hcan1, CAN_IT_RX_FIFO0_MSG_PENDING); 800bc54: 2102 movs r1, #2 800bc56: 4802 ldr r0, [pc, #8] @ (800bc60 ) 800bc58: f003 ffd5 bl 800fc06 } 800bc5c: bf00 nop 800bc5e: bd80 pop {r7, pc} 800bc60: 200002a4 .word 0x200002a4 0800bc64 : void J_SendPacket(uint32_t PGN, uint8_t pri, uint8_t DLC, uint8_t *data){ 800bc64: b580 push {r7, lr} 800bc66: b08c sub sp, #48 @ 0x30 800bc68: af00 add r7, sp, #0 800bc6a: 60f8 str r0, [r7, #12] 800bc6c: 607b str r3, [r7, #4] 800bc6e: 460b mov r3, r1 800bc70: 72fb strb r3, [r7, #11] 800bc72: 4613 mov r3, r2 800bc74: 72bb strb r3, [r7, #10] CAN_TxHeaderTypeDef tx_header; uint32_t tx_mailbox; tx_header.ExtId = (pri << 26) | (PGN << 8) | (J_ID_EV << 8) | J_ID_SE; 800bc76: 7afb ldrb r3, [r7, #11] 800bc78: 069a lsls r2, r3, #26 800bc7a: 68fb ldr r3, [r7, #12] 800bc7c: 021b lsls r3, r3, #8 800bc7e: 4313 orrs r3, r2 800bc80: f443 4374 orr.w r3, r3, #62464 @ 0xf400 800bc84: f043 0356 orr.w r3, r3, #86 @ 0x56 800bc88: 61fb str r3, [r7, #28] tx_header.RTR = CAN_RTR_DATA; 800bc8a: 2300 movs r3, #0 800bc8c: 627b str r3, [r7, #36] @ 0x24 tx_header.IDE = CAN_ID_EXT; 800bc8e: 2304 movs r3, #4 800bc90: 623b str r3, [r7, #32] tx_header.DLC = DLC; 800bc92: 7abb ldrb r3, [r7, #10] 800bc94: 62bb str r3, [r7, #40] @ 0x28 //TODO buffer wait HAL_CAN_AddTxMessage(&hcan1, &tx_header, data, &tx_mailbox); 800bc96: f107 0314 add.w r3, r7, #20 800bc9a: f107 0118 add.w r1, r7, #24 800bc9e: 687a ldr r2, [r7, #4] 800bca0: 4803 ldr r0, [pc, #12] @ (800bcb0 ) 800bca2: f003 fd8c bl 800f7be //HAL_Delay(2); } 800bca6: bf00 nop 800bca8: 3730 adds r7, #48 @ 0x30 800bcaa: 46bd mov sp, r7 800bcac: bd80 pop {r7, pc} 800bcae: bf00 nop 800bcb0: 200002a4 .word 0x200002a4 0800bcb4 : //void J_SendPacketLong(){ // //TODO (no need) //} // J1939 sequence Clear To Send packet void J_SendCTS(j_receive_t rx){ 800bcb4: b084 sub sp, #16 800bcb6: b580 push {r7, lr} 800bcb8: b082 sub sp, #8 800bcba: af00 add r7, sp, #0 800bcbc: f107 0c10 add.w ip, r7, #16 800bcc0: e88c 000f stmia.w ip, {r0, r1, r2, r3} //if(rx.packets <= rx.packet) return; TODO uint8_t data[8]; data[0] = 17; //CONTROL_BYTE_TP_CM_CTS 800bcc4: 2311 movs r3, #17 800bcc6: 703b strb r3, [r7, #0] data[1] = rx.step;//total_number_of_packages_transmitted 800bcc8: f897 3118 ldrb.w r3, [r7, #280] @ 0x118 800bccc: 707b strb r3, [r7, #1] if (rx.step > (rx.packets - rx.packet+1)) data[1] = rx.packets - rx.packet+1; 800bcce: f897 3118 ldrb.w r3, [r7, #280] @ 0x118 800bcd2: 461a mov r2, r3 800bcd4: f897 3116 ldrb.w r3, [r7, #278] @ 0x116 800bcd8: 4619 mov r1, r3 800bcda: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 800bcde: 1acb subs r3, r1, r3 800bce0: 3301 adds r3, #1 800bce2: 429a cmp r2, r3 800bce4: dd08 ble.n 800bcf8 800bce6: f897 2116 ldrb.w r2, [r7, #278] @ 0x116 800bcea: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 800bcee: 1ad3 subs r3, r2, r3 800bcf0: b2db uxtb r3, r3 800bcf2: 3301 adds r3, #1 800bcf4: b2db uxtb r3, r3 800bcf6: 707b strb r3, [r7, #1] data[2] = rx.packet;//next_packet_number_transmitted 800bcf8: f897 3117 ldrb.w r3, [r7, #279] @ 0x117 800bcfc: 70bb strb r3, [r7, #2] data[3] = 0xFF; /* Reserved */ 800bcfe: 23ff movs r3, #255 @ 0xff 800bd00: 70fb strb r3, [r7, #3] data[4] = 0xFF; 800bd02: 23ff movs r3, #255 @ 0xff 800bd04: 713b strb r3, [r7, #4] data[5] = rx.PGN; 800bd06: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bd0a: b2db uxtb r3, r3 800bd0c: 717b strb r3, [r7, #5] data[6] = rx.PGN >> 8; 800bd0e: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bd12: 0a1b lsrs r3, r3, #8 800bd14: b2db uxtb r3, r3 800bd16: 71bb strb r3, [r7, #6] data[7] = rx.PGN >> 16; 800bd18: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bd1c: 0c1b lsrs r3, r3, #16 800bd1e: b2db uxtb r3, r3 800bd20: 71fb strb r3, [r7, #7] J_SendPacket(0x00EC00, 7, 8, data); 800bd22: 463b mov r3, r7 800bd24: 2208 movs r2, #8 800bd26: 2107 movs r1, #7 800bd28: f44f 406c mov.w r0, #60416 @ 0xec00 800bd2c: f7ff ff9a bl 800bc64 } 800bd30: bf00 nop 800bd32: 3708 adds r7, #8 800bd34: 46bd mov sp, r7 800bd36: e8bd 4080 ldmia.w sp!, {r7, lr} 800bd3a: b004 add sp, #16 800bd3c: 4770 bx lr ... 0800bd40 : // J1939 sequence ACK packet void J_SendACK(j_receive_t rx){//uint32_t PGN, uint8_t step, uint8_t packet){ 800bd40: b084 sub sp, #16 800bd42: b580 push {r7, lr} 800bd44: b082 sub sp, #8 800bd46: af00 add r7, sp, #0 800bd48: f107 0c10 add.w ip, r7, #16 800bd4c: e88c 000f stmia.w ip, {r0, r1, r2, r3} uint8_t data[8]; data[0] = 19; //CONTROL_BYTE_TP_CM_ACK 800bd50: 2313 movs r3, #19 800bd52: 703b strb r3, [r7, #0] data[1] = j_rx.size; 800bd54: 4b16 ldr r3, [pc, #88] @ (800bdb0 ) 800bd56: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800bd5a: b2db uxtb r3, r3 800bd5c: 707b strb r3, [r7, #1] data[2] = j_rx.size>>8; 800bd5e: 4b14 ldr r3, [pc, #80] @ (800bdb0 ) 800bd60: f8b3 3104 ldrh.w r3, [r3, #260] @ 0x104 800bd64: 0a1b lsrs r3, r3, #8 800bd66: b29b uxth r3, r3 800bd68: b2db uxtb r3, r3 800bd6a: 70bb strb r3, [r7, #2] data[3] = j_rx.packets; 800bd6c: 4b10 ldr r3, [pc, #64] @ (800bdb0 ) 800bd6e: f893 3106 ldrb.w r3, [r3, #262] @ 0x106 800bd72: 70fb strb r3, [r7, #3] data[4] = 0xFF;//TODO 800bd74: 23ff movs r3, #255 @ 0xff 800bd76: 713b strb r3, [r7, #4] data[5] = rx.PGN; 800bd78: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bd7c: b2db uxtb r3, r3 800bd7e: 717b strb r3, [r7, #5] data[6] = rx.PGN >> 8; 800bd80: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bd84: 0a1b lsrs r3, r3, #8 800bd86: b2db uxtb r3, r3 800bd88: 71bb strb r3, [r7, #6] data[7] = rx.PGN >> 16; 800bd8a: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 800bd8e: 0c1b lsrs r3, r3, #16 800bd90: b2db uxtb r3, r3 800bd92: 71fb strb r3, [r7, #7] J_SendPacket(0x00EC00, 7, 8, data); 800bd94: 463b mov r3, r7 800bd96: 2208 movs r2, #8 800bd98: 2107 movs r1, #7 800bd9a: f44f 406c mov.w r0, #60416 @ 0xec00 800bd9e: f7ff ff61 bl 800bc64 } 800bda2: bf00 nop 800bda4: 3708 adds r7, #8 800bda6: 46bd mov sp, r7 800bda8: e8bd 4080 ldmia.w sp!, {r7, lr} 800bdac: b004 add sp, #16 800bdae: 4770 bx lr 800bdb0: 20000870 .word 0x20000870 0800bdb4 : void GBT_CAN_FilterInit(){ 800bdb4: b580 push {r7, lr} 800bdb6: b08a sub sp, #40 @ 0x28 800bdb8: af00 add r7, sp, #0 CAN_FilterTypeDef sFilterConfig; sFilterConfig.FilterBank = 0; 800bdba: 2300 movs r3, #0 800bdbc: 617b str r3, [r7, #20] sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; 800bdbe: 2300 movs r3, #0 800bdc0: 61bb str r3, [r7, #24] sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; 800bdc2: 2301 movs r3, #1 800bdc4: 61fb str r3, [r7, #28] sFilterConfig.FilterIdHigh = 0x0000; 800bdc6: 2300 movs r3, #0 800bdc8: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = 0x0000; 800bdca: 2300 movs r3, #0 800bdcc: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 800bdce: 2300 movs r3, #0 800bdd0: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = 0x0000; 800bdd2: 2300 movs r3, #0 800bdd4: 60fb str r3, [r7, #12] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0; 800bdd6: 2300 movs r3, #0 800bdd8: 613b str r3, [r7, #16] sFilterConfig.FilterActivation = ENABLE; 800bdda: 2301 movs r3, #1 800bddc: 623b str r3, [r7, #32] //sFilterConfig.SlaveStartFilterBank = 14; if(HAL_CAN_ConfigFilter(&hcan1, &sFilterConfig) != HAL_OK) 800bdde: 463b mov r3, r7 800bde0: 4619 mov r1, r3 800bde2: 4806 ldr r0, [pc, #24] @ (800bdfc ) 800bde4: f003 fb7e bl 800f4e4 800bde8: 4603 mov r3, r0 800bdea: 2b00 cmp r3, #0 800bdec: d001 beq.n 800bdf2 { Error_Handler(); 800bdee: f000 fad3 bl 800c398 } } 800bdf2: bf00 nop 800bdf4: 3728 adds r7, #40 @ 0x28 800bdf6: 46bd mov sp, r7 800bdf8: bd80 pop {r7, pc} 800bdfa: bf00 nop 800bdfc: 200002a4 .word 0x200002a4 0800be00 : .retry_count = 0, .error_tick = 0 }; void GBT_ForceLock(uint8_t state){ 800be00: b480 push {r7} 800be02: b083 sub sp, #12 800be04: af00 add r7, sp, #0 800be06: 4603 mov r3, r0 800be08: 71fb strb r3, [r7, #7] // Устанавливаем флаг для выполнения действия GBT_LockState.action_requested = state ? 1 : 0; 800be0a: 79fb ldrb r3, [r7, #7] 800be0c: 2b00 cmp r3, #0 800be0e: bf14 ite ne 800be10: 2301 movne r3, #1 800be12: 2300 moveq r3, #0 800be14: b2db uxtb r3, r3 800be16: 461a mov r2, r3 800be18: 4b04 ldr r3, [pc, #16] @ (800be2c ) 800be1a: 709a strb r2, [r3, #2] GBT_LockState.retry_count = 0; 800be1c: 4b03 ldr r3, [pc, #12] @ (800be2c ) 800be1e: 2200 movs r2, #0 800be20: 721a strb r2, [r3, #8] } 800be22: bf00 nop 800be24: 370c adds r7, #12 800be26: 46bd mov sp, r7 800be28: bc80 pop {r7} 800be2a: 4770 bx lr 800be2c: 20000008 .word 0x20000008 0800be30 : uint8_t GBT_LockGetState(){ 800be30: b580 push {r7, lr} 800be32: af00 add r7, sp, #0 //1 = locked //0 = unlocked if(LOCK_POLARITY){ 800be34: 4b0a ldr r3, [pc, #40] @ (800be60 ) 800be36: 781b ldrb r3, [r3, #0] 800be38: 2b00 cmp r3, #0 800be3a: d005 beq.n 800be48 return HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 800be3c: 2180 movs r1, #128 @ 0x80 800be3e: 4809 ldr r0, [pc, #36] @ (800be64 ) 800be40: f004 fd10 bl 8010864 800be44: 4603 mov r3, r0 800be46: e009 b.n 800be5c }else{ return !HAL_GPIO_ReadPin(IN0_GPIO_Port, IN0_Pin); 800be48: 2180 movs r1, #128 @ 0x80 800be4a: 4806 ldr r0, [pc, #24] @ (800be64 ) 800be4c: f004 fd0a bl 8010864 800be50: 4603 mov r3, r0 800be52: 2b00 cmp r3, #0 800be54: bf0c ite eq 800be56: 2301 moveq r3, #1 800be58: 2300 movne r3, #0 800be5a: b2db uxtb r3, r3 } } 800be5c: 4618 mov r0, r3 800be5e: bd80 pop {r7, pc} 800be60: 20000004 .word 0x20000004 800be64: 40011800 .word 0x40011800 0800be68 : void GBT_Lock(uint8_t state){ 800be68: b480 push {r7} 800be6a: b083 sub sp, #12 800be6c: af00 add r7, sp, #0 800be6e: 4603 mov r3, r0 800be70: 71fb strb r3, [r7, #7] GBT_LockState.demand = state; 800be72: 4a04 ldr r2, [pc, #16] @ (800be84 ) 800be74: 79fb ldrb r3, [r7, #7] 800be76: 7013 strb r3, [r2, #0] } 800be78: bf00 nop 800be7a: 370c adds r7, #12 800be7c: 46bd mov sp, r7 800be7e: bc80 pop {r7} 800be80: 4770 bx lr 800be82: bf00 nop 800be84: 20000008 .word 0x20000008 0800be88 : tick = HAL_GetTick(); HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, GBT_LockState.demand ? 1 : 0); } void GBT_ManageLockMotor(){ 800be88: b580 push {r7, lr} 800be8a: b082 sub sp, #8 800be8c: af00 add r7, sp, #0 static const uint8_t MAX_RETRIES = 5; uint32_t current_tick = HAL_GetTick(); 800be8e: f002 fcf9 bl 800e884 800be92: 6078 str r0, [r7, #4] // Проверяем таймаут сброса ошибки (до проверки error, чтобы можно было сбросить) GBT_ResetErrorTimeout(); 800be94: f000 f904 bl 800c0a0 if (GBT_LockState.error) { 800be98: 4b72 ldr r3, [pc, #456] @ (800c064 ) 800be9a: 785b ldrb r3, [r3, #1] 800be9c: 2b00 cmp r3, #0 800be9e: f040 80dd bne.w 800c05c return; } // Проверяем, нужно ли выполнить действие bool lock_is_open = GBT_LockGetState() == 0; 800bea2: f7ff ffc5 bl 800be30 800bea6: 4603 mov r3, r0 800bea8: 2b00 cmp r3, #0 800beaa: bf0c ite eq 800beac: 2301 moveq r3, #1 800beae: 2300 movne r3, #0 800beb0: 70fb strb r3, [r7, #3] bool lock_should_be_open = GBT_LockState.demand == 0; 800beb2: 4b6c ldr r3, [pc, #432] @ (800c064 ) 800beb4: 781b ldrb r3, [r3, #0] 800beb6: 2b00 cmp r3, #0 800beb8: bf0c ite eq 800beba: 2301 moveq r3, #1 800bebc: 2300 movne r3, #0 800bebe: 70bb strb r3, [r7, #2] // Если есть запрошенное действие или состояние не соответствует требуемому if (GBT_LockState.action_requested != 255 || (lock_is_open != lock_should_be_open)) { 800bec0: 4b68 ldr r3, [pc, #416] @ (800c064 ) 800bec2: 789b ldrb r3, [r3, #2] 800bec4: 2bff cmp r3, #255 @ 0xff 800bec6: d104 bne.n 800bed2 800bec8: 78fa ldrb r2, [r7, #3] 800beca: 78bb ldrb r3, [r7, #2] 800becc: 429a cmp r2, r3 800bece: f000 80ad beq.w 800c02c // Если действие еще не запрошено, запрашиваем его if (GBT_LockState.action_requested == 255) { 800bed2: 4b64 ldr r3, [pc, #400] @ (800c064 ) 800bed4: 789b ldrb r3, [r3, #2] 800bed6: 2bff cmp r3, #255 @ 0xff 800bed8: d109 bne.n 800beee GBT_LockState.action_requested = lock_should_be_open ? 0 : 1; 800beda: 78bb ldrb r3, [r7, #2] 800bedc: f083 0301 eor.w r3, r3, #1 800bee0: b2db uxtb r3, r3 800bee2: 461a mov r2, r3 800bee4: 4b5f ldr r3, [pc, #380] @ (800c064 ) 800bee6: 709a strb r2, [r3, #2] GBT_LockState.retry_count = 0; 800bee8: 4b5e ldr r3, [pc, #376] @ (800c064 ) 800beea: 2200 movs r2, #0 800beec: 721a strb r2, [r3, #8] } // Управление мотором через машину состояний switch (GBT_LockState.motor_state) { 800beee: 4b5d ldr r3, [pc, #372] @ (800c064 ) 800bef0: 78db ldrb r3, [r3, #3] 800bef2: 2b02 cmp r3, #2 800bef4: d04a beq.n 800bf8c 800bef6: 2b02 cmp r3, #2 800bef8: f300 80b1 bgt.w 800c05e 800befc: 2b00 cmp r3, #0 800befe: d002 beq.n 800bf06 800bf00: 2b01 cmp r3, #1 800bf02: d02a beq.n 800bf5a 800bf04: e0ab b.n 800c05e case 0: // idle - мотор выключен // Определяем, какой пин нужно включить if (LOCK_MOTOR_POLARITY) { 800bf06: 4b58 ldr r3, [pc, #352] @ (800c068 ) 800bf08: 781b ldrb r3, [r3, #0] 800bf0a: 2b00 cmp r3, #0 800bf0c: d00f beq.n 800bf2e if (GBT_LockState.action_requested == 1) { // LOCK 800bf0e: 4b55 ldr r3, [pc, #340] @ (800c064 ) 800bf10: 789b ldrb r3, [r3, #2] 800bf12: 2b01 cmp r3, #1 800bf14: d105 bne.n 800bf22 HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1); 800bf16: 2201 movs r2, #1 800bf18: 2120 movs r1, #32 800bf1a: 4854 ldr r0, [pc, #336] @ (800c06c ) 800bf1c: f004 fcb9 bl 8010892 800bf20: e014 b.n 800bf4c } else { // UNLOCK HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1); 800bf22: 2201 movs r2, #1 800bf24: 2110 movs r1, #16 800bf26: 4851 ldr r0, [pc, #324] @ (800c06c ) 800bf28: f004 fcb3 bl 8010892 800bf2c: e00e b.n 800bf4c } } else { if (GBT_LockState.action_requested == 1) { // LOCK 800bf2e: 4b4d ldr r3, [pc, #308] @ (800c064 ) 800bf30: 789b ldrb r3, [r3, #2] 800bf32: 2b01 cmp r3, #1 800bf34: d105 bne.n 800bf42 HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 1); 800bf36: 2201 movs r2, #1 800bf38: 2110 movs r1, #16 800bf3a: 484c ldr r0, [pc, #304] @ (800c06c ) 800bf3c: f004 fca9 bl 8010892 800bf40: e004 b.n 800bf4c } else { // UNLOCK HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 1); 800bf42: 2201 movs r2, #1 800bf44: 2120 movs r1, #32 800bf46: 4849 ldr r0, [pc, #292] @ (800c06c ) 800bf48: f004 fca3 bl 8010892 } } GBT_LockState.motor_state = 1; // motor_on 800bf4c: 4b45 ldr r3, [pc, #276] @ (800c064 ) 800bf4e: 2201 movs r2, #1 800bf50: 70da strb r2, [r3, #3] GBT_LockState.last_action_time = current_tick; 800bf52: 4a44 ldr r2, [pc, #272] @ (800c064 ) 800bf54: 687b ldr r3, [r7, #4] 800bf56: 6053 str r3, [r2, #4] break; 800bf58: e067 b.n 800c02a case 1: // motor_on - мотор включен, ждем LOCK_DELAY if (current_tick - GBT_LockState.last_action_time >= LOCK_DELAY) { 800bf5a: 4b42 ldr r3, [pc, #264] @ (800c064 ) 800bf5c: 685b ldr r3, [r3, #4] 800bf5e: 687a ldr r2, [r7, #4] 800bf60: 1ad3 subs r3, r2, r3 800bf62: 4a43 ldr r2, [pc, #268] @ (800c070 ) 800bf64: 8812 ldrh r2, [r2, #0] 800bf66: 4293 cmp r3, r2 800bf68: d35c bcc.n 800c024 // Выключаем оба пина HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0); 800bf6a: 2200 movs r2, #0 800bf6c: 2110 movs r1, #16 800bf6e: 483f ldr r0, [pc, #252] @ (800c06c ) 800bf70: f004 fc8f bl 8010892 HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0); 800bf74: 2200 movs r2, #0 800bf76: 2120 movs r1, #32 800bf78: 483c ldr r0, [pc, #240] @ (800c06c ) 800bf7a: f004 fc8a bl 8010892 GBT_LockState.motor_state = 2; // waiting_off 800bf7e: 4b39 ldr r3, [pc, #228] @ (800c064 ) 800bf80: 2202 movs r2, #2 800bf82: 70da strb r2, [r3, #3] GBT_LockState.last_action_time = current_tick; 800bf84: 4a37 ldr r2, [pc, #220] @ (800c064 ) 800bf86: 687b ldr r3, [r7, #4] 800bf88: 6053 str r3, [r2, #4] } break; 800bf8a: e04b b.n 800c024 case 2: // waiting_off - ждем немного перед проверкой состояния // Небольшая задержка перед проверкой состояния (например, 50мс) if (current_tick - GBT_LockState.last_action_time >= 50) { 800bf8c: 4b35 ldr r3, [pc, #212] @ (800c064 ) 800bf8e: 685b ldr r3, [r3, #4] 800bf90: 687a ldr r2, [r7, #4] 800bf92: 1ad3 subs r3, r2, r3 800bf94: 2b31 cmp r3, #49 @ 0x31 800bf96: d947 bls.n 800c028 // Проверяем, достигнуто ли требуемое состояние lock_is_open = GBT_LockGetState() == 0; 800bf98: f7ff ff4a bl 800be30 800bf9c: 4603 mov r3, r0 800bf9e: 2b00 cmp r3, #0 800bfa0: bf0c ite eq 800bfa2: 2301 moveq r3, #1 800bfa4: 2300 movne r3, #0 800bfa6: 70fb strb r3, [r7, #3] bool action_success = (lock_is_open == (GBT_LockState.action_requested == 0)); 800bfa8: 78fb ldrb r3, [r7, #3] 800bfaa: 4a2e ldr r2, [pc, #184] @ (800c064 ) 800bfac: 7892 ldrb r2, [r2, #2] 800bfae: 2a00 cmp r2, #0 800bfb0: bf0c ite eq 800bfb2: 2201 moveq r2, #1 800bfb4: 2200 movne r2, #0 800bfb6: b2d2 uxtb r2, r2 800bfb8: 4293 cmp r3, r2 800bfba: bf0c ite eq 800bfbc: 2301 moveq r3, #1 800bfbe: 2300 movne r3, #0 800bfc0: 707b strb r3, [r7, #1] if (action_success) { 800bfc2: 787b ldrb r3, [r7, #1] 800bfc4: 2b00 cmp r3, #0 800bfc6: d009 beq.n 800bfdc // Действие выполнено успешно GBT_LockState.action_requested = 255; // сбрасываем флаг 800bfc8: 4b26 ldr r3, [pc, #152] @ (800c064 ) 800bfca: 22ff movs r2, #255 @ 0xff 800bfcc: 709a strb r2, [r3, #2] GBT_LockState.motor_state = 0; // idle 800bfce: 4b25 ldr r3, [pc, #148] @ (800c064 ) 800bfd0: 2200 movs r2, #0 800bfd2: 70da strb r2, [r3, #3] GBT_LockState.retry_count = 0; 800bfd4: 4b23 ldr r3, [pc, #140] @ (800c064 ) 800bfd6: 2200 movs r2, #0 800bfd8: 721a strb r2, [r3, #8] // Повторяем попытку GBT_LockState.motor_state = 0; // возвращаемся к началу } } } break; 800bfda: e025 b.n 800c028 GBT_LockState.retry_count++; 800bfdc: 4b21 ldr r3, [pc, #132] @ (800c064 ) 800bfde: 7a1b ldrb r3, [r3, #8] 800bfe0: 3301 adds r3, #1 800bfe2: b2da uxtb r2, r3 800bfe4: 4b1f ldr r3, [pc, #124] @ (800c064 ) 800bfe6: 721a strb r2, [r3, #8] if (GBT_LockState.retry_count >= MAX_RETRIES) { 800bfe8: 4b1e ldr r3, [pc, #120] @ (800c064 ) 800bfea: 7a1a ldrb r2, [r3, #8] 800bfec: 4b21 ldr r3, [pc, #132] @ (800c074 ) 800bfee: 781b ldrb r3, [r3, #0] 800bff0: 429a cmp r2, r3 800bff2: d313 bcc.n 800c01c GBT_LockState.error = 1; 800bff4: 4b1b ldr r3, [pc, #108] @ (800c064 ) 800bff6: 2201 movs r2, #1 800bff8: 705a strb r2, [r3, #1] GBT_LockState.error_tick = current_tick; // сохраняем время установки ошибки 800bffa: 4a1a ldr r2, [pc, #104] @ (800c064 ) 800bffc: 687b ldr r3, [r7, #4] 800bffe: 60d3 str r3, [r2, #12] GBT_LockState.action_requested = 0; // пытаемся разблокировать 800c000: 4b18 ldr r3, [pc, #96] @ (800c064 ) 800c002: 2200 movs r2, #0 800c004: 709a strb r2, [r3, #2] GBT_LockState.motor_state = 0; 800c006: 4b17 ldr r3, [pc, #92] @ (800c064 ) 800c008: 2200 movs r2, #0 800c00a: 70da strb r2, [r3, #3] GBT_LockState.retry_count = 0; 800c00c: 4b15 ldr r3, [pc, #84] @ (800c064 ) 800c00e: 2200 movs r2, #0 800c010: 721a strb r2, [r3, #8] log_printf(LOG_ERR, "Lock error\n"); 800c012: 4919 ldr r1, [pc, #100] @ (800c078 ) 800c014: 2004 movs r0, #4 800c016: f7ff fa7d bl 800b514 break; 800c01a: e005 b.n 800c028 GBT_LockState.motor_state = 0; // возвращаемся к началу 800c01c: 4b11 ldr r3, [pc, #68] @ (800c064 ) 800c01e: 2200 movs r2, #0 800c020: 70da strb r2, [r3, #3] break; 800c022: e001 b.n 800c028 break; 800c024: bf00 nop 800c026: e01a b.n 800c05e break; 800c028: bf00 nop switch (GBT_LockState.motor_state) { 800c02a: e018 b.n 800c05e } } else { // Состояние соответствует требуемому, сбрасываем флаги if (GBT_LockState.motor_state != 0) { 800c02c: 4b0d ldr r3, [pc, #52] @ (800c064 ) 800c02e: 78db ldrb r3, [r3, #3] 800c030: 2b00 cmp r3, #0 800c032: d00c beq.n 800c04e HAL_GPIO_WritePin(LOCK_A_GPIO_Port, LOCK_A_Pin, 0); 800c034: 2200 movs r2, #0 800c036: 2110 movs r1, #16 800c038: 480c ldr r0, [pc, #48] @ (800c06c ) 800c03a: f004 fc2a bl 8010892 HAL_GPIO_WritePin(LOCK_B_GPIO_Port, LOCK_B_Pin, 0); 800c03e: 2200 movs r2, #0 800c040: 2120 movs r1, #32 800c042: 480a ldr r0, [pc, #40] @ (800c06c ) 800c044: f004 fc25 bl 8010892 GBT_LockState.motor_state = 0; 800c048: 4b06 ldr r3, [pc, #24] @ (800c064 ) 800c04a: 2200 movs r2, #0 800c04c: 70da strb r2, [r3, #3] } GBT_LockState.action_requested = 255; 800c04e: 4b05 ldr r3, [pc, #20] @ (800c064 ) 800c050: 22ff movs r2, #255 @ 0xff 800c052: 709a strb r2, [r3, #2] GBT_LockState.retry_count = 0; 800c054: 4b03 ldr r3, [pc, #12] @ (800c064 ) 800c056: 2200 movs r2, #0 800c058: 721a strb r2, [r3, #8] 800c05a: e000 b.n 800c05e return; 800c05c: bf00 nop } } 800c05e: 3708 adds r7, #8 800c060: 46bd mov sp, r7 800c062: bd80 pop {r7, pc} 800c064: 20000008 .word 0x20000008 800c068: 20000005 .word 0x20000005 800c06c: 40011000 .word 0x40011000 800c070: 20000006 .word 0x20000006 800c074: 08016cbb .word 0x08016cbb 800c078: 08016bc8 .word 0x08016bc8 0800c07c : void GBT_LockResetError(){ 800c07c: b580 push {r7, lr} 800c07e: af00 add r7, sp, #0 GBT_LockState.error = 0; 800c080: 4b05 ldr r3, [pc, #20] @ (800c098 ) 800c082: 2200 movs r2, #0 800c084: 705a strb r2, [r3, #1] GBT_LockState.error_tick = 0; 800c086: 4b04 ldr r3, [pc, #16] @ (800c098 ) 800c088: 2200 movs r2, #0 800c08a: 60da str r2, [r3, #12] log_printf(LOG_INFO, "Lock error reset\n"); 800c08c: 4903 ldr r1, [pc, #12] @ (800c09c ) 800c08e: 2007 movs r0, #7 800c090: f7ff fa40 bl 800b514 } 800c094: bf00 nop 800c096: bd80 pop {r7, pc} 800c098: 20000008 .word 0x20000008 800c09c: 08016bd4 .word 0x08016bd4 0800c0a0 : void GBT_ResetErrorTimeout(){ 800c0a0: b580 push {r7, lr} 800c0a2: af00 add r7, sp, #0 static const uint32_t ERROR_TIMEOUT_MS = 300000; // 5 минут if (GBT_LockState.error && GBT_LockState.error_tick != 0) { 800c0a4: 4b0a ldr r3, [pc, #40] @ (800c0d0 ) 800c0a6: 785b ldrb r3, [r3, #1] 800c0a8: 2b00 cmp r3, #0 800c0aa: d00f beq.n 800c0cc 800c0ac: 4b08 ldr r3, [pc, #32] @ (800c0d0 ) 800c0ae: 68db ldr r3, [r3, #12] 800c0b0: 2b00 cmp r3, #0 800c0b2: d00b beq.n 800c0cc if ((HAL_GetTick()-GBT_LockState.error_tick) >= ERROR_TIMEOUT_MS) { 800c0b4: f002 fbe6 bl 800e884 800c0b8: 4602 mov r2, r0 800c0ba: 4b05 ldr r3, [pc, #20] @ (800c0d0 ) 800c0bc: 68db ldr r3, [r3, #12] 800c0be: 1ad2 subs r2, r2, r3 800c0c0: 4b04 ldr r3, [pc, #16] @ (800c0d4 ) 800c0c2: 681b ldr r3, [r3, #0] 800c0c4: 429a cmp r2, r3 800c0c6: d301 bcc.n 800c0cc // Прошло 5 минут, сбрасываем ошибку GBT_LockResetError(); 800c0c8: f7ff ffd8 bl 800c07c } } } 800c0cc: bf00 nop 800c0ce: bd80 pop {r7, pc} 800c0d0: 20000008 .word 0x20000008 800c0d4: 08016cbc .word 0x08016cbc 0800c0d8 : * bootloader before starting this program. Unfortunately, function * SystemInit() overwrites this change again. * @return none. */ static void VectorBase_Config(void) { 800c0d8: b480 push {r7} 800c0da: af00 add r7, sp, #0 * c-startup code. */ extern const unsigned long g_pfnVectors[]; /* Remap the vector table to where the vector table is located for this program. */ SCB->VTOR = (unsigned long)&g_pfnVectors[0]; 800c0dc: 4b03 ldr r3, [pc, #12] @ (800c0ec ) 800c0de: 4a04 ldr r2, [pc, #16] @ (800c0f0 ) 800c0e0: 609a str r2, [r3, #8] } 800c0e2: bf00 nop 800c0e4: 46bd mov sp, r7 800c0e6: bc80 pop {r7} 800c0e8: 4770 bx lr 800c0ea: bf00 nop 800c0ec: e000ed00 .word 0xe000ed00 800c0f0: 08008000 .word 0x08008000 0800c0f4 : uint8_t ED_TraceWarning(uint8_t flag, uint8_t id){ 800c0f4: b480 push {r7} 800c0f6: b085 sub sp, #20 800c0f8: af00 add r7, sp, #0 800c0fa: 4603 mov r3, r0 800c0fc: 460a mov r2, r1 800c0fe: 71fb strb r3, [r7, #7] 800c100: 4613 mov r3, r2 800c102: 71bb strb r3, [r7, #6] static uint8_t memory[32]; if(id > 31) return 0; 800c104: 79bb ldrb r3, [r7, #6] 800c106: 2b1f cmp r3, #31 800c108: d901 bls.n 800c10e 800c10a: 2300 movs r3, #0 800c10c: e00e b.n 800c12c uint8_t result = 0; 800c10e: 2300 movs r3, #0 800c110: 73fb strb r3, [r7, #15] if(memory[id] != flag){ 800c112: 79bb ldrb r3, [r7, #6] 800c114: 4a08 ldr r2, [pc, #32] @ (800c138 ) 800c116: 5cd3 ldrb r3, [r2, r3] 800c118: 79fa ldrb r2, [r7, #7] 800c11a: 429a cmp r2, r3 800c11c: d001 beq.n 800c122 result = 1; 800c11e: 2301 movs r3, #1 800c120: 73fb strb r3, [r7, #15] } memory[id] = flag; 800c122: 79bb ldrb r3, [r7, #6] 800c124: 4904 ldr r1, [pc, #16] @ (800c138 ) 800c126: 79fa ldrb r2, [r7, #7] 800c128: 54ca strb r2, [r1, r3] return result; 800c12a: 7bfb ldrb r3, [r7, #15] } 800c12c: 4618 mov r0, r3 800c12e: 3714 adds r7, #20 800c130: 46bd mov sp, r7 800c132: bc80 pop {r7} 800c134: 4770 bx lr 800c136: bf00 nop 800c138: 20000980 .word 0x20000980 0800c13c : void ED_Delay(uint32_t Delay) { 800c13c: b580 push {r7, lr} 800c13e: b084 sub sp, #16 800c140: af00 add r7, sp, #0 800c142: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 800c144: f002 fb9e bl 800e884 800c148: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800c14a: 687b ldr r3, [r7, #4] 800c14c: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800c14e: 68fb ldr r3, [r7, #12] 800c150: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800c154: d012 beq.n 800c17c { wait += (uint32_t)(uwTickFreq); 800c156: 4b10 ldr r3, [pc, #64] @ (800c198 ) 800c158: 781b ldrb r3, [r3, #0] 800c15a: 461a mov r2, r3 800c15c: 68fb ldr r3, [r7, #12] 800c15e: 4413 add r3, r2 800c160: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait){ 800c162: e00b b.n 800c17c CONN_CC_ReadStateFiltered(); 800c164: f7fe fffa bl 800b15c GBT_ManageLockMotor(); 800c168: f7ff fe8e bl 800be88 CONN_Task(); 800c16c: f7fe fe3e bl 800adec GBT_ChargerTask(); 800c170: f7fd fe5e bl 8009e30 LED_Task(); 800c174: f000 fff4 bl 800d160 SC_Task(); 800c178: f001 f908 bl 800d38c while ((HAL_GetTick() - tickstart) < wait){ 800c17c: f002 fb82 bl 800e884 800c180: 4602 mov r2, r0 800c182: 68bb ldr r3, [r7, #8] 800c184: 1ad3 subs r3, r2, r3 800c186: 68fa ldr r2, [r7, #12] 800c188: 429a cmp r2, r3 800c18a: d8eb bhi.n 800c164 // if(huart2.gState != HAL_UART_STATE_BUSY_TX) debug_buffer_send(); // TEST } } 800c18c: bf00 nop 800c18e: bf00 nop 800c190: 3710 adds r7, #16 800c192: 46bd mov sp, r7 800c194: bd80 pop {r7, pc} 800c196: bf00 nop 800c198: 20000080 .word 0x20000080 0800c19c : void StopButtonControl(){ 800c19c: b580 push {r7, lr} 800c19e: af00 add r7, sp, #0 //Charging do nothing if(!IN_ReadInput(IN_ESTOP)){ 800c1a0: 2003 movs r0, #3 800c1a2: f7fd fb17 bl 80097d4 800c1a6: 4603 mov r3, r0 800c1a8: 2b00 cmp r3, #0 800c1aa: d102 bne.n 800c1b2 CONN.connControl = CMD_STOP; 800c1ac: 4b02 ldr r3, [pc, #8] @ (800c1b8 ) 800c1ae: 2201 movs r2, #1 800c1b0: 701a strb r2, [r3, #0] } } 800c1b2: bf00 nop 800c1b4: bd80 pop {r7, pc} 800c1b6: bf00 nop 800c1b8: 200002f8 .word 0x200002f8 0800c1bc
: /** * @brief The application entry point. * @retval int */ int main(void) { 800c1bc: b580 push {r7, lr} 800c1be: b082 sub sp, #8 800c1c0: af02 add r7, sp, #8 /* USER CODE BEGIN 1 */ VectorBase_Config(); 800c1c2: f7ff ff89 bl 800c0d8 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 800c1c6: f002 fb05 bl 800e7d4 /* USER CODE BEGIN Init */ HAL_RCC_DeInit(); 800c1ca: f004 fb87 bl 80108dc /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 800c1ce: f000 f873 bl 800c2b8 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 800c1d2: f7ff faa5 bl 800b720 MX_ADC1_Init(); 800c1d6: f7fd f9f7 bl 80095c8 MX_CAN1_Init(); 800c1da: f7fd fc41 bl 8009a60 MX_CAN2_Init(); 800c1de: f7fd fc75 bl 8009acc MX_RTC_Init(); 800c1e2: f001 f85b bl 800d29c MX_TIM4_Init(); 800c1e6: f001 ffeb bl 800e1c0 MX_USART2_UART_Init(); 800c1ea: f002 f92b bl 800e444 MX_CRC_Init(); 800c1ee: f7ff f879 bl 800b2e4 MX_UART5_Init(); 800c1f2: f002 f8d3 bl 800e39c MX_USART1_UART_Init(); 800c1f6: f002 f8fb bl 800e3f0 MX_USART3_UART_Init(); 800c1fa: f002 f94d bl 800e498 /* USER CODE BEGIN 2 */ Init_Peripheral(); 800c1fe: f7fd fb3b bl 8009878 LED_Init(); 800c202: f000 ff8d bl 800d120 HAL_Delay(300); 800c206: f44f 7096 mov.w r0, #300 @ 0x12c 800c20a: f002 fb45 bl 800e898 GBT_Init(); 800c20e: f7fd fdd1 bl 8009db4 SC_Init(); 800c212: f001 f8a7 bl 800d364 log_printf(LOG_INFO, "GBT Charger v%d.%d\n", GBT_CH_VER_MAJOR, GBT_CH_VER_MINOR); 800c216: 2300 movs r3, #0 800c218: 2201 movs r2, #1 800c21a: 4922 ldr r1, [pc, #136] @ (800c2a4 ) 800c21c: 2007 movs r0, #7 800c21e: f7ff f979 bl 800b514 ReadVersion(); 800c222: f001 f87b bl 800d31c log_printf(LOG_INFO, "Serial number: %d\n", infoPacket.serialNumber); 800c226: 4b20 ldr r3, [pc, #128] @ (800c2a8 ) 800c228: 881b ldrh r3, [r3, #0] 800c22a: b29b uxth r3, r3 800c22c: 461a mov r2, r3 800c22e: 491f ldr r1, [pc, #124] @ (800c2ac ) 800c230: 2007 movs r0, #7 800c232: f7ff f96f bl 800b514 log_printf(LOG_INFO, "Board revision: %d\n", infoPacket.boardVersion); 800c236: 4b1c ldr r3, [pc, #112] @ (800c2a8 ) 800c238: 789b ldrb r3, [r3, #2] 800c23a: 461a mov r2, r3 800c23c: 491c ldr r1, [pc, #112] @ (800c2b0 ) 800c23e: 2007 movs r0, #7 800c240: f7ff f968 bl 800b514 log_printf(LOG_INFO, "FW version: %d.%d.%d\n", infoPacket.fw_version_major, infoPacket.fw_version_minor, infoPacket.fw_version_patch); 800c244: 4b18 ldr r3, [pc, #96] @ (800c2a8 ) 800c246: 889b ldrh r3, [r3, #4] 800c248: b29b uxth r3, r3 800c24a: 461a mov r2, r3 800c24c: 4b16 ldr r3, [pc, #88] @ (800c2a8 ) 800c24e: 88db ldrh r3, [r3, #6] 800c250: b29b uxth r3, r3 800c252: 4619 mov r1, r3 800c254: 4b14 ldr r3, [pc, #80] @ (800c2a8 ) 800c256: 891b ldrh r3, [r3, #8] 800c258: b29b uxth r3, r3 800c25a: 9300 str r3, [sp, #0] 800c25c: 460b mov r3, r1 800c25e: 4915 ldr r1, [pc, #84] @ (800c2b4 ) 800c260: 2007 movs r0, #7 800c262: f7ff f957 bl 800b514 GBT_SetConfig(); 800c266: f7fd fdc3 bl 8009df0 GBT_CAN_ReInit(); 800c26a: f7ff fce7 bl 800bc3c PSU_Init(); 800c26e: f000 fa7d bl 800c76c CONN_Init(); 800c272: f7fd fd3f bl 8009cf4 /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ PSU_ReadWrite(); 800c276: f000 fb87 bl 800c988 PSU_Task(); 800c27a: f000 fc23 bl 800cac4 ED_Delay(10); 800c27e: 200a movs r0, #10 800c280: f7ff ff5c bl 800c13c METER_CalculateEnergy(); 800c284: f000 f88e bl 800c3a4 CONN_Loop(); 800c288: f7fd fd4a bl 8009d20 LED_Write(); 800c28c: f000 fe0e bl 800ceac ED_Delay(10); 800c290: 200a movs r0, #10 800c292: f7ff ff53 bl 800c13c StopButtonControl(); 800c296: f7ff ff81 bl 800c19c ED_Delay(50); 800c29a: 2032 movs r0, #50 @ 0x32 800c29c: f7ff ff4e bl 800c13c { 800c2a0: bf00 nop 800c2a2: e7e8 b.n 800c276 800c2a4: 08016be8 .word 0x08016be8 800c2a8: 20000f0c .word 0x20000f0c 800c2ac: 08016bfc .word 0x08016bfc 800c2b0: 08016c10 .word 0x08016c10 800c2b4: 08016c24 .word 0x08016c24 0800c2b8 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 800c2b8: b580 push {r7, lr} 800c2ba: b09c sub sp, #112 @ 0x70 800c2bc: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 800c2be: f107 0338 add.w r3, r7, #56 @ 0x38 800c2c2: 2238 movs r2, #56 @ 0x38 800c2c4: 2100 movs r1, #0 800c2c6: 4618 mov r0, r3 800c2c8: f007 ff3c bl 8014144 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800c2cc: f107 0324 add.w r3, r7, #36 @ 0x24 800c2d0: 2200 movs r2, #0 800c2d2: 601a str r2, [r3, #0] 800c2d4: 605a str r2, [r3, #4] 800c2d6: 609a str r2, [r3, #8] 800c2d8: 60da str r2, [r3, #12] 800c2da: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 800c2dc: 1d3b adds r3, r7, #4 800c2de: 2220 movs r2, #32 800c2e0: 2100 movs r1, #0 800c2e2: 4618 mov r0, r3 800c2e4: f007 ff2e bl 8014144 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; 800c2e8: 2305 movs r3, #5 800c2ea: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 800c2ec: f44f 3380 mov.w r3, #65536 @ 0x10000 800c2f0: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV5; 800c2f2: 2304 movs r3, #4 800c2f4: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.LSEState = RCC_LSE_ON; 800c2f6: 2301 movs r3, #1 800c2f8: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 800c2fa: 2301 movs r3, #1 800c2fc: 64fb str r3, [r7, #76] @ 0x4c RCC_OscInitStruct.Prediv1Source = RCC_PREDIV1_SOURCE_PLL2; 800c2fe: f44f 3380 mov.w r3, #65536 @ 0x10000 800c302: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 800c304: 2302 movs r3, #2 800c306: 65bb str r3, [r7, #88] @ 0x58 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 800c308: f44f 3380 mov.w r3, #65536 @ 0x10000 800c30c: 65fb str r3, [r7, #92] @ 0x5c RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 800c30e: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000 800c312: 663b str r3, [r7, #96] @ 0x60 RCC_OscInitStruct.PLL2.PLL2State = RCC_PLL2_ON; 800c314: 2302 movs r3, #2 800c316: 667b str r3, [r7, #100] @ 0x64 RCC_OscInitStruct.PLL2.PLL2MUL = RCC_PLL2_MUL8; 800c318: f44f 63c0 mov.w r3, #1536 @ 0x600 800c31c: 66bb str r3, [r7, #104] @ 0x68 RCC_OscInitStruct.PLL2.HSEPrediv2Value = RCC_HSE_PREDIV2_DIV5; 800c31e: 2340 movs r3, #64 @ 0x40 800c320: 66fb str r3, [r7, #108] @ 0x6c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800c322: f107 0338 add.w r3, r7, #56 @ 0x38 800c326: 4618 mov r0, r3 800c328: f004 fba8 bl 8010a7c 800c32c: 4603 mov r3, r0 800c32e: 2b00 cmp r3, #0 800c330: d001 beq.n 800c336 { Error_Handler(); 800c332: f000 f831 bl 800c398 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800c336: 230f movs r3, #15 800c338: 627b str r3, [r7, #36] @ 0x24 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 800c33a: 2302 movs r3, #2 800c33c: 62bb str r3, [r7, #40] @ 0x28 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800c33e: 2300 movs r3, #0 800c340: 62fb str r3, [r7, #44] @ 0x2c RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 800c342: f44f 6380 mov.w r3, #1024 @ 0x400 800c346: 633b str r3, [r7, #48] @ 0x30 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800c348: 2300 movs r3, #0 800c34a: 637b str r3, [r7, #52] @ 0x34 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 800c34c: f107 0324 add.w r3, r7, #36 @ 0x24 800c350: 2102 movs r1, #2 800c352: 4618 mov r0, r3 800c354: f004 fea8 bl 80110a8 800c358: 4603 mov r3, r0 800c35a: 2b00 cmp r3, #0 800c35c: d001 beq.n 800c362 { Error_Handler(); 800c35e: f000 f81b bl 800c398 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC; 800c362: 2303 movs r3, #3 800c364: 607b str r3, [r7, #4] PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 800c366: f44f 7380 mov.w r3, #256 @ 0x100 800c36a: 60bb str r3, [r7, #8] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 800c36c: f44f 4300 mov.w r3, #32768 @ 0x8000 800c370: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 800c372: 1d3b adds r3, r7, #4 800c374: 4618 mov r0, r3 800c376: f005 f88d bl 8011494 800c37a: 4603 mov r3, r0 800c37c: 2b00 cmp r3, #0 800c37e: d001 beq.n 800c384 { Error_Handler(); 800c380: f000 f80a bl 800c398 } /** Configure the Systick interrupt time */ __HAL_RCC_PLLI2S_ENABLE(); 800c384: 4b03 ldr r3, [pc, #12] @ (800c394 ) 800c386: 2201 movs r2, #1 800c388: 601a str r2, [r3, #0] } 800c38a: bf00 nop 800c38c: 3770 adds r7, #112 @ 0x70 800c38e: 46bd mov sp, r7 800c390: bd80 pop {r7, pc} 800c392: bf00 nop 800c394: 42420070 .word 0x42420070 0800c398 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 800c398: b480 push {r7} 800c39a: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 800c39c: b672 cpsid i } 800c39e: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 800c3a0: bf00 nop 800c3a2: e7fd b.n 800c3a0 0800c3a4 : METER_t METER; // Функция для расчета и накопления энергии c дробной частью без счетчиков void METER_CalculateEnergy() { 800c3a4: e92d 43b0 stmdb sp!, {r4, r5, r7, r8, r9, lr} 800c3a8: b084 sub sp, #16 800c3aa: af00 add r7, sp, #0 // Проверяем, что индекс находится в пределах массива METER.online = 0; 800c3ac: 4b2e ldr r3, [pc, #184] @ (800c468 ) 800c3ae: 2200 movs r2, #0 800c3b0: 711a strb r2, [r3, #4] if(CONN.connState == Charging){ 800c3b2: 4b2e ldr r3, [pc, #184] @ (800c46c ) 800c3b4: 785b ldrb r3, [r3, #1] 800c3b6: 2b08 cmp r3, #8 800c3b8: d104 bne.n 800c3c4 METER.enable = 1; 800c3ba: 4b2b ldr r3, [pc, #172] @ (800c468 ) 800c3bc: 2201 movs r2, #1 800c3be: f883 2024 strb.w r2, [r3, #36] @ 0x24 800c3c2: e003 b.n 800c3cc }else{ METER.enable = 0; 800c3c4: 4b28 ldr r3, [pc, #160] @ (800c468 ) 800c3c6: 2200 movs r2, #0 800c3c8: f883 2024 strb.w r2, [r3, #36] @ 0x24 } uint32_t currentTick = HAL_GetTick(); // Получаем текущее время в миллисекундах 800c3cc: f002 fa5a bl 800e884 800c3d0: 60f8 str r0, [r7, #12] uint32_t elapsedTimeMs = currentTick - METER.lastTick; // Вычисляем время, прошедшее с последнего вызова в секундах 800c3d2: 4b25 ldr r3, [pc, #148] @ (800c468 ) 800c3d4: 689b ldr r3, [r3, #8] 800c3d6: 68fa ldr r2, [r7, #12] 800c3d8: 1ad3 subs r3, r2, r3 800c3da: 60bb str r3, [r7, #8] METER.lastTick = currentTick; // Обновляем время последнего вызова для текущего коннектора 800c3dc: 4a22 ldr r2, [pc, #136] @ (800c468 ) 800c3de: 68fb ldr r3, [r7, #12] 800c3e0: 6093 str r3, [r2, #8] uint32_t energyWs = CONN.Power * elapsedTimeMs / 1000; // Рассчитываем энергию в ватт-секундах за прошедший промежуток времени 800c3e2: 4b22 ldr r3, [pc, #136] @ (800c46c ) 800c3e4: f8d3 3003 ldr.w r3, [r3, #3] 800c3e8: 68ba ldr r2, [r7, #8] 800c3ea: fb02 f303 mul.w r3, r2, r3 800c3ee: 4a20 ldr r2, [pc, #128] @ (800c470 ) 800c3f0: fba2 2303 umull r2, r3, r2, r3 800c3f4: 099b lsrs r3, r3, #6 800c3f6: 607b str r3, [r7, #4] //Расчет энергии теперь идет всегда, смещение берем суммарное METER.EnergyPSU_Ws += energyWs; 800c3f8: 4b1b ldr r3, [pc, #108] @ (800c468 ) 800c3fa: e9d3 2304 ldrd r2, r3, [r3, #16] 800c3fe: 6879 ldr r1, [r7, #4] 800c400: 2000 movs r0, #0 800c402: 460c mov r4, r1 800c404: 4605 mov r5, r0 800c406: eb12 0804 adds.w r8, r2, r4 800c40a: eb43 0905 adc.w r9, r3, r5 800c40e: 4b16 ldr r3, [pc, #88] @ (800c468 ) 800c410: e9c3 8904 strd r8, r9, [r3, #16] // Абсолютное значение энергии разъема складывается из накопленной дробной части и значения со счетчиков METER.AbsoluteEnergy = (uint32_t)METER.EnergyPSU_Ws/3600; //переводим в Вт*час 800c414: 4b14 ldr r3, [pc, #80] @ (800c468 ) 800c416: e9d3 2304 ldrd r2, r3, [r3, #16] 800c41a: 4b16 ldr r3, [pc, #88] @ (800c474 ) 800c41c: fba3 2302 umull r2, r3, r3, r2 800c420: 0adb lsrs r3, r3, #11 800c422: 4a11 ldr r2, [pc, #68] @ (800c468 ) 800c424: 6193 str r3, [r2, #24] if(METER.enable) { 800c426: 4b10 ldr r3, [pc, #64] @ (800c468 ) 800c428: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800c42c: 2b00 cmp r3, #0 800c42e: d008 beq.n 800c442 //enabled state CONN.Energy = METER.AbsoluteEnergy - METER.EnergyOffset;//переводим в Вт*час 800c430: 4b0d ldr r3, [pc, #52] @ (800c468 ) 800c432: 699a ldr r2, [r3, #24] 800c434: 4b0c ldr r3, [pc, #48] @ (800c468 ) 800c436: 69db ldr r3, [r3, #28] 800c438: 1ad3 subs r3, r2, r3 800c43a: 4a0c ldr r2, [pc, #48] @ (800c46c ) 800c43c: f8c2 3007 str.w r3, [r2, #7] METER.EnergyOffset = METER.AbsoluteEnergy; } } 800c440: e00c b.n 800c45c CONN.Energy = 0; 800c442: 4b0a ldr r3, [pc, #40] @ (800c46c ) 800c444: 2200 movs r2, #0 800c446: 71da strb r2, [r3, #7] 800c448: 2200 movs r2, #0 800c44a: 721a strb r2, [r3, #8] 800c44c: 2200 movs r2, #0 800c44e: 725a strb r2, [r3, #9] 800c450: 2200 movs r2, #0 800c452: 729a strb r2, [r3, #10] METER.EnergyOffset = METER.AbsoluteEnergy; 800c454: 4b04 ldr r3, [pc, #16] @ (800c468 ) 800c456: 699b ldr r3, [r3, #24] 800c458: 4a03 ldr r2, [pc, #12] @ (800c468 ) 800c45a: 61d3 str r3, [r2, #28] } 800c45c: bf00 nop 800c45e: 3710 adds r7, #16 800c460: 46bd mov sp, r7 800c462: e8bd 83b0 ldmia.w sp!, {r4, r5, r7, r8, r9, pc} 800c466: bf00 nop 800c468: 200009a0 .word 0x200009a0 800c46c: 200002f8 .word 0x200002f8 800c470: 10624dd3 .word 0x10624dd3 800c474: 91a2b3c5 .word 0x91a2b3c5 0800c478 : uint32_t can_lastpacket; extern CAN_HandleTypeDef hcan2; static void PSU_SwitchState(PSU_State_t state){ 800c478: b580 push {r7, lr} 800c47a: b082 sub sp, #8 800c47c: af00 add r7, sp, #0 800c47e: 4603 mov r3, r0 800c480: 71fb strb r3, [r7, #7] PSU0.state = state; 800c482: 4a06 ldr r2, [pc, #24] @ (800c49c ) 800c484: 79fb ldrb r3, [r7, #7] 800c486: 71d3 strb r3, [r2, #7] PSU0.statetick = HAL_GetTick(); 800c488: f002 f9fc bl 800e884 800c48c: 4603 mov r3, r0 800c48e: 4a03 ldr r2, [pc, #12] @ (800c49c ) 800c490: 6113 str r3, [r2, #16] } 800c492: bf00 nop 800c494: 3708 adds r7, #8 800c496: 46bd mov sp, r7 800c498: bd80 pop {r7, pc} 800c49a: bf00 nop 800c49c: 20000a0c .word 0x20000a0c 0800c4a0 : static uint32_t PSU_StateTime(void){ 800c4a0: b580 push {r7, lr} 800c4a2: af00 add r7, sp, #0 return HAL_GetTick() - PSU0.statetick; 800c4a4: f002 f9ee bl 800e884 800c4a8: 4602 mov r2, r0 800c4aa: 4b02 ldr r3, [pc, #8] @ (800c4b4 ) 800c4ac: 691b ldr r3, [r3, #16] 800c4ae: 1ad3 subs r3, r2, r3 } 800c4b0: 4618 mov r0, r3 800c4b2: bd80 pop {r7, pc} 800c4b4: 20000a0c .word 0x20000a0c 0800c4b8 : void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan){ 800c4b8: b580 push {r7, lr} 800c4ba: b084 sub sp, #16 800c4bc: af00 add r7, sp, #0 800c4be: 6078 str r0, [r7, #4] static CAN_RxHeaderTypeDef RxHeader; static uint8_t RxData[8] = {0,}; CanId_t CanId; if(HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO1, &RxHeader, RxData) == HAL_OK) 800c4c0: 4b88 ldr r3, [pc, #544] @ (800c6e4 ) 800c4c2: 4a89 ldr r2, [pc, #548] @ (800c6e8 ) 800c4c4: 2101 movs r1, #1 800c4c6: 6878 ldr r0, [r7, #4] 800c4c8: f003 fa7c bl 800f9c4 800c4cc: 4603 mov r3, r0 800c4ce: 2b00 cmp r3, #0 800c4d0: f040 8104 bne.w 800c6dc { memcpy(&CanId, &RxHeader.ExtId, sizeof(CanId_t)); 800c4d4: 4b84 ldr r3, [pc, #528] @ (800c6e8 ) 800c4d6: 685b ldr r3, [r3, #4] 800c4d8: 60bb str r3, [r7, #8] /* Для DC30 поддерживается только один силовой модуль (source == 0) */ if(CanId.source != 0) return; 800c4da: 7a3b ldrb r3, [r7, #8] 800c4dc: 2b00 cmp r3, #0 800c4de: f040 80fc bne.w 800c6da can_lastpacket = HAL_GetTick(); 800c4e2: f002 f9cf bl 800e884 800c4e6: 4603 mov r3, r0 800c4e8: 4a80 ldr r2, [pc, #512] @ (800c6ec ) 800c4ea: 6013 str r3, [r2, #0] if(CanId.command==0x02){ 800c4ec: 7abb ldrb r3, [r7, #10] 800c4ee: f003 033f and.w r3, r3, #63 @ 0x3f 800c4f2: b2db uxtb r3, r3 800c4f4: 2b02 cmp r3, #2 800c4f6: d105 bne.n 800c504 memcpy(&PSU_02, RxData, 8); 800c4f8: 4b7d ldr r3, [pc, #500] @ (800c6f0 ) 800c4fa: 4a7a ldr r2, [pc, #488] @ (800c6e4 ) 800c4fc: e892 0003 ldmia.w r2, {r0, r1} 800c500: e883 0003 stmia.w r3, {r0, r1} } if(CanId.command==0x04){ 800c504: 7abb ldrb r3, [r7, #10] 800c506: f003 033f and.w r3, r3, #63 @ 0x3f 800c50a: b2db uxtb r3, r3 800c50c: 2b04 cmp r3, #4 800c50e: d119 bne.n 800c544 memcpy(&PSU_04, RxData, 8); 800c510: 4b78 ldr r3, [pc, #480] @ (800c6f4 ) 800c512: 4a74 ldr r2, [pc, #464] @ (800c6e4 ) 800c514: e892 0003 ldmia.w r2, {r0, r1} 800c518: e883 0003 stmia.w r3, {r0, r1} PSU0.tempAmbient = PSU_04.moduleTemperature; 800c51c: 4b75 ldr r3, [pc, #468] @ (800c6f4 ) 800c51e: 791b ldrb r3, [r3, #4] 800c520: 461a mov r2, r3 800c522: 4b75 ldr r3, [pc, #468] @ (800c6f8 ) 800c524: 61da str r2, [r3, #28] PSU0.status0.raw = PSU_04.modularForm0; 800c526: 4b73 ldr r3, [pc, #460] @ (800c6f4 ) 800c528: 7a1a ldrb r2, [r3, #8] 800c52a: 4b73 ldr r3, [pc, #460] @ (800c6f8 ) 800c52c: f883 2020 strb.w r2, [r3, #32] PSU0.status1.raw = PSU_04.modularForm1; 800c530: 4b70 ldr r3, [pc, #448] @ (800c6f4 ) 800c532: 79da ldrb r2, [r3, #7] 800c534: 4b70 ldr r3, [pc, #448] @ (800c6f8 ) 800c536: f883 2021 strb.w r2, [r3, #33] @ 0x21 PSU0.status2.raw = PSU_04.modularForm2; 800c53a: 4b6e ldr r3, [pc, #440] @ (800c6f4 ) 800c53c: 799a ldrb r2, [r3, #6] 800c53e: 4b6e ldr r3, [pc, #440] @ (800c6f8 ) 800c540: f883 2022 strb.w r2, [r3, #34] @ 0x22 } if(CanId.command==0x06){ 800c544: 7abb ldrb r3, [r7, #10] 800c546: f003 033f and.w r3, r3, #63 @ 0x3f 800c54a: b2db uxtb r3, r3 800c54c: 2b06 cmp r3, #6 800c54e: d123 bne.n 800c598 memcpy(&PSU_06, RxData, 8); 800c550: 4b6a ldr r3, [pc, #424] @ (800c6fc ) 800c552: 4a64 ldr r2, [pc, #400] @ (800c6e4 ) 800c554: e892 0003 ldmia.w r2, {r0, r1} 800c558: e883 0003 stmia.w r3, {r0, r1} PSU_06.VAB = PSU_06.VABLo+(PSU_06.VABHi<<8); 800c55c: 4b67 ldr r3, [pc, #412] @ (800c6fc ) 800c55e: 785b ldrb r3, [r3, #1] 800c560: 461a mov r2, r3 800c562: 4b66 ldr r3, [pc, #408] @ (800c6fc ) 800c564: 781b ldrb r3, [r3, #0] 800c566: 021b lsls r3, r3, #8 800c568: 4413 add r3, r2 800c56a: 461a mov r2, r3 800c56c: 4b63 ldr r3, [pc, #396] @ (800c6fc ) 800c56e: 609a str r2, [r3, #8] PSU_06.VBC = PSU_06.VBCLo+(PSU_06.VBCHi<<8); 800c570: 4b62 ldr r3, [pc, #392] @ (800c6fc ) 800c572: 78db ldrb r3, [r3, #3] 800c574: 461a mov r2, r3 800c576: 4b61 ldr r3, [pc, #388] @ (800c6fc ) 800c578: 789b ldrb r3, [r3, #2] 800c57a: 021b lsls r3, r3, #8 800c57c: 4413 add r3, r2 800c57e: 461a mov r2, r3 800c580: 4b5e ldr r3, [pc, #376] @ (800c6fc ) 800c582: 60da str r2, [r3, #12] PSU_06.VCA = PSU_06.VCALo+(PSU_06.VCAHi<<8); 800c584: 4b5d ldr r3, [pc, #372] @ (800c6fc ) 800c586: 795b ldrb r3, [r3, #5] 800c588: 461a mov r2, r3 800c58a: 4b5c ldr r3, [pc, #368] @ (800c6fc ) 800c58c: 791b ldrb r3, [r3, #4] 800c58e: 021b lsls r3, r3, #8 800c590: 4413 add r3, r2 800c592: 461a mov r2, r3 800c594: 4b59 ldr r3, [pc, #356] @ (800c6fc ) 800c596: 611a str r2, [r3, #16] } if(CanId.command==0x08){ 800c598: 7abb ldrb r3, [r7, #10] 800c59a: f003 033f and.w r3, r3, #63 @ 0x3f 800c59e: b2db uxtb r3, r3 800c5a0: 2b08 cmp r3, #8 800c5a2: d105 bne.n 800c5b0 memcpy(&PSU_08, RxData, 8); 800c5a4: 4b56 ldr r3, [pc, #344] @ (800c700 ) 800c5a6: 4a4f ldr r2, [pc, #316] @ (800c6e4 ) 800c5a8: e892 0003 ldmia.w r2, {r0, r1} 800c5ac: e883 0003 stmia.w r3, {r0, r1} } if(CanId.command==0x09){ 800c5b0: 7abb ldrb r3, [r7, #10] 800c5b2: f003 033f and.w r3, r3, #63 @ 0x3f 800c5b6: b2db uxtb r3, r3 800c5b8: 2b09 cmp r3, #9 800c5ba: f040 808f bne.w 800c6dc memcpy(&PSU_09, RxData, 8); 800c5be: 4b51 ldr r3, [pc, #324] @ (800c704 ) 800c5c0: 4a48 ldr r2, [pc, #288] @ (800c6e4 ) 800c5c2: e892 0003 ldmia.w r2, {r0, r1} 800c5c6: e883 0003 stmia.w r3, {r0, r1} PSU_09.moduleNCurrent = PSU_09.moduleNCurrent_[3]; 800c5ca: 4b4e ldr r3, [pc, #312] @ (800c704 ) 800c5cc: 79db ldrb r3, [r3, #7] 800c5ce: 461a mov r2, r3 800c5d0: 4b4c ldr r3, [pc, #304] @ (800c704 ) 800c5d2: 60da str r2, [r3, #12] PSU_09.moduleNCurrent |= PSU_09.moduleNCurrent_[2]<<8; 800c5d4: 4b4b ldr r3, [pc, #300] @ (800c704 ) 800c5d6: 68da ldr r2, [r3, #12] 800c5d8: 4b4a ldr r3, [pc, #296] @ (800c704 ) 800c5da: 799b ldrb r3, [r3, #6] 800c5dc: 021b lsls r3, r3, #8 800c5de: 4313 orrs r3, r2 800c5e0: 4a48 ldr r2, [pc, #288] @ (800c704 ) 800c5e2: 60d3 str r3, [r2, #12] PSU_09.moduleNCurrent |= PSU_09.moduleNCurrent_[1]<<16; 800c5e4: 4b47 ldr r3, [pc, #284] @ (800c704 ) 800c5e6: 68da ldr r2, [r3, #12] 800c5e8: 4b46 ldr r3, [pc, #280] @ (800c704 ) 800c5ea: 795b ldrb r3, [r3, #5] 800c5ec: 041b lsls r3, r3, #16 800c5ee: 4313 orrs r3, r2 800c5f0: 4a44 ldr r2, [pc, #272] @ (800c704 ) 800c5f2: 60d3 str r3, [r2, #12] PSU_09.moduleNCurrent |= PSU_09.moduleNCurrent_[0]<<24; 800c5f4: 4b43 ldr r3, [pc, #268] @ (800c704 ) 800c5f6: 68da ldr r2, [r3, #12] 800c5f8: 4b42 ldr r3, [pc, #264] @ (800c704 ) 800c5fa: 791b ldrb r3, [r3, #4] 800c5fc: 061b lsls r3, r3, #24 800c5fe: 4313 orrs r3, r2 800c600: 4a40 ldr r2, [pc, #256] @ (800c704 ) 800c602: 60d3 str r3, [r2, #12] PSU_09.moduleNVoltage = PSU_09.moduleNVoltage_[3]; 800c604: 4b3f ldr r3, [pc, #252] @ (800c704 ) 800c606: 78db ldrb r3, [r3, #3] 800c608: 461a mov r2, r3 800c60a: 4b3e ldr r3, [pc, #248] @ (800c704 ) 800c60c: 609a str r2, [r3, #8] PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[2]<<8; 800c60e: 4b3d ldr r3, [pc, #244] @ (800c704 ) 800c610: 689a ldr r2, [r3, #8] 800c612: 4b3c ldr r3, [pc, #240] @ (800c704 ) 800c614: 789b ldrb r3, [r3, #2] 800c616: 021b lsls r3, r3, #8 800c618: 4313 orrs r3, r2 800c61a: 4a3a ldr r2, [pc, #232] @ (800c704 ) 800c61c: 6093 str r3, [r2, #8] PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[1]<<16; 800c61e: 4b39 ldr r3, [pc, #228] @ (800c704 ) 800c620: 689a ldr r2, [r3, #8] 800c622: 4b38 ldr r3, [pc, #224] @ (800c704 ) 800c624: 785b ldrb r3, [r3, #1] 800c626: 041b lsls r3, r3, #16 800c628: 4313 orrs r3, r2 800c62a: 4a36 ldr r2, [pc, #216] @ (800c704 ) 800c62c: 6093 str r3, [r2, #8] PSU_09.moduleNVoltage |= PSU_09.moduleNVoltage_[0]<<24; 800c62e: 4b35 ldr r3, [pc, #212] @ (800c704 ) 800c630: 689a ldr r2, [r3, #8] 800c632: 4b34 ldr r3, [pc, #208] @ (800c704 ) 800c634: 781b ldrb r3, [r3, #0] 800c636: 061b lsls r3, r3, #24 800c638: 4313 orrs r3, r2 800c63a: 4a32 ldr r2, [pc, #200] @ (800c704 ) 800c63c: 6093 str r3, [r2, #8] // PSU_09 -> PSU -> CONN (один модуль) { uint16_t v = PSU_09.moduleNVoltage / 1000; 800c63e: 4b31 ldr r3, [pc, #196] @ (800c704 ) 800c640: 689b ldr r3, [r3, #8] 800c642: 4a31 ldr r2, [pc, #196] @ (800c708 ) 800c644: fba2 2303 umull r2, r3, r2, r3 800c648: 099b lsrs r3, r3, #6 800c64a: 81fb strh r3, [r7, #14] int16_t i = PSU_09.moduleNCurrent / 100; 800c64c: 4b2d ldr r3, [pc, #180] @ (800c704 ) 800c64e: 68db ldr r3, [r3, #12] 800c650: 4a2e ldr r2, [pc, #184] @ (800c70c ) 800c652: fba2 2303 umull r2, r3, r2, r3 800c656: 095b lsrs r3, r3, #5 800c658: 81bb strh r3, [r7, #12] // Обновляем модель PSU0 по телеметрии PSU0.outputVoltage = v; 800c65a: 4a27 ldr r2, [pc, #156] @ (800c6f8 ) 800c65c: 89fb ldrh r3, [r7, #14] 800c65e: 8053 strh r3, [r2, #2] PSU0.outputCurrent = i; 800c660: 4a25 ldr r2, [pc, #148] @ (800c6f8 ) 800c662: 89bb ldrh r3, [r7, #12] 800c664: 8093 strh r3, [r2, #4] PSU0.PSU_enabled = (v >= PSU_VOLTAGE_THRESHOLD); 800c666: 89fb ldrh r3, [r7, #14] 800c668: 2b13 cmp r3, #19 800c66a: bf8c ite hi 800c66c: 2301 movhi r3, #1 800c66e: 2300 movls r3, #0 800c670: b2db uxtb r3, r3 800c672: 461a mov r2, r3 800c674: 4b20 ldr r3, [pc, #128] @ (800c6f8 ) 800c676: 729a strb r2, [r3, #10] PSU0.online = 1; 800c678: 4b1f ldr r3, [pc, #124] @ (800c6f8 ) 800c67a: 2201 movs r2, #1 800c67c: 721a strb r2, [r3, #8] PSU0.temperature = PSU_04.moduleTemperature; 800c67e: 4b1d ldr r3, [pc, #116] @ (800c6f4 ) 800c680: 791a ldrb r2, [r3, #4] 800c682: 4b1d ldr r3, [pc, #116] @ (800c6f8 ) 800c684: 719a strb r2, [r3, #6] // Экспортируем значения из PSU0 в CONN только, // когда модуль хотя бы в состоянии READY и выше if(PSU0.state >= PSU_READY){ 800c686: 4b1c ldr r3, [pc, #112] @ (800c6f8 ) 800c688: 79db ldrb r3, [r3, #7] 800c68a: 2b01 cmp r3, #1 800c68c: d926 bls.n 800c6dc CONN.MeasuredVoltage = PSU0.outputVoltage; 800c68e: 4b1a ldr r3, [pc, #104] @ (800c6f8 ) 800c690: 885a ldrh r2, [r3, #2] 800c692: 4b1f ldr r3, [pc, #124] @ (800c710 ) 800c694: f8a3 2013 strh.w r2, [r3, #19] CONN.MeasuredCurrent = PSU0.outputCurrent; 800c698: 4b17 ldr r3, [pc, #92] @ (800c6f8 ) 800c69a: f9b3 3004 ldrsh.w r3, [r3, #4] 800c69e: b29a uxth r2, r3 800c6a0: 4b1b ldr r3, [pc, #108] @ (800c710 ) 800c6a2: f8a3 2015 strh.w r2, [r3, #21] CONN.Power = CONN.MeasuredCurrent * CONN.MeasuredVoltage / 10; 800c6a6: 4b1a ldr r3, [pc, #104] @ (800c710 ) 800c6a8: f8b3 3015 ldrh.w r3, [r3, #21] 800c6ac: b29b uxth r3, r3 800c6ae: 461a mov r2, r3 800c6b0: 4b17 ldr r3, [pc, #92] @ (800c710 ) 800c6b2: f8b3 3013 ldrh.w r3, [r3, #19] 800c6b6: b29b uxth r3, r3 800c6b8: fb02 f303 mul.w r3, r2, r3 800c6bc: 4a15 ldr r2, [pc, #84] @ (800c714 ) 800c6be: fb82 1203 smull r1, r2, r2, r3 800c6c2: 1092 asrs r2, r2, #2 800c6c4: 17db asrs r3, r3, #31 800c6c6: 1ad3 subs r3, r2, r3 800c6c8: 461a mov r2, r3 800c6ca: 4b11 ldr r3, [pc, #68] @ (800c710 ) 800c6cc: f8c3 2003 str.w r2, [r3, #3] CONN.outputEnabled = PSU0.PSU_enabled; 800c6d0: 4b09 ldr r3, [pc, #36] @ (800c6f8 ) 800c6d2: 7a9a ldrb r2, [r3, #10] 800c6d4: 4b0e ldr r3, [pc, #56] @ (800c710 ) 800c6d6: 761a strb r2, [r3, #24] 800c6d8: e000 b.n 800c6dc if(CanId.source != 0) return; 800c6da: bf00 nop } } } } } 800c6dc: 3710 adds r7, #16 800c6de: 46bd mov sp, r7 800c6e0: bd80 pop {r7, pc} 800c6e2: bf00 nop 800c6e4: 20000a50 .word 0x20000a50 800c6e8: 20000a34 .word 0x20000a34 800c6ec: 20000a30 .word 0x20000a30 800c6f0: 200009c8 .word 0x200009c8 800c6f4: 200009d4 .word 0x200009d4 800c6f8: 20000a0c .word 0x20000a0c 800c6fc: 200009e0 .word 0x200009e0 800c700: 200009f4 .word 0x200009f4 800c704: 200009fc .word 0x200009fc 800c708: 10624dd3 .word 0x10624dd3 800c70c: 51eb851f .word 0x51eb851f 800c710: 200002f8 .word 0x200002f8 800c714: 66666667 .word 0x66666667 0800c718 : void PSU_CAN_FilterInit(){ 800c718: b580 push {r7, lr} 800c71a: b08a sub sp, #40 @ 0x28 800c71c: af00 add r7, sp, #0 CAN_FilterTypeDef sFilterConfig; sFilterConfig.FilterBank = 14; 800c71e: 230e movs r3, #14 800c720: 617b str r3, [r7, #20] sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; 800c722: 2300 movs r3, #0 800c724: 61bb str r3, [r7, #24] sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; 800c726: 2301 movs r3, #1 800c728: 61fb str r3, [r7, #28] sFilterConfig.FilterIdHigh = 0x0000; 800c72a: 2300 movs r3, #0 800c72c: 603b str r3, [r7, #0] sFilterConfig.FilterIdLow = 0x0000; 800c72e: 2300 movs r3, #0 800c730: 607b str r3, [r7, #4] sFilterConfig.FilterMaskIdHigh = 0x0000; 800c732: 2300 movs r3, #0 800c734: 60bb str r3, [r7, #8] sFilterConfig.FilterMaskIdLow = 0x0000; 800c736: 2300 movs r3, #0 800c738: 60fb str r3, [r7, #12] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0; 800c73a: 2300 movs r3, #0 800c73c: 613b str r3, [r7, #16] sFilterConfig.FilterActivation = ENABLE; 800c73e: 2301 movs r3, #1 800c740: 623b str r3, [r7, #32] sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO1; 800c742: 2301 movs r3, #1 800c744: 613b str r3, [r7, #16] sFilterConfig.SlaveStartFilterBank = 14; 800c746: 230e movs r3, #14 800c748: 627b str r3, [r7, #36] @ 0x24 if(HAL_CAN_ConfigFilter(&hcan2, &sFilterConfig) != HAL_OK) 800c74a: 463b mov r3, r7 800c74c: 4619 mov r1, r3 800c74e: 4806 ldr r0, [pc, #24] @ (800c768 ) 800c750: f002 fec8 bl 800f4e4 800c754: 4603 mov r3, r0 800c756: 2b00 cmp r3, #0 800c758: d001 beq.n 800c75e { Error_Handler(); 800c75a: f7ff fe1d bl 800c398 } } 800c75e: bf00 nop 800c760: 3728 adds r7, #40 @ 0x28 800c762: 46bd mov sp, r7 800c764: bd80 pop {r7, pc} 800c766: bf00 nop 800c768: 200002cc .word 0x200002cc 0800c76c : void PSU_Init(){ 800c76c: b580 push {r7, lr} 800c76e: af00 add r7, sp, #0 HAL_CAN_Stop(&hcan2); 800c770: 4813 ldr r0, [pc, #76] @ (800c7c0 ) 800c772: f002 ffdb bl 800f72c MX_CAN2_Init(); 800c776: f7fd f9a9 bl 8009acc PSU_CAN_FilterInit(); 800c77a: f7ff ffcd bl 800c718 HAL_CAN_Start(&hcan2); 800c77e: 4810 ldr r0, [pc, #64] @ (800c7c0 ) 800c780: f002 ff90 bl 800f6a4 HAL_CAN_ActivateNotification(&hcan2, CAN_IT_RX_FIFO1_MSG_PENDING /* | CAN_IT_ERROR | CAN_IT_BUSOFF | CAN_IT_LAST_ERROR_CODE | CAN_IT_TX_MAILBOX_EMPTY*/); 800c784: 2110 movs r1, #16 800c786: 480e ldr r0, [pc, #56] @ (800c7c0 ) 800c788: f003 fa3d bl 800fc06 memset(&PSU0, 0, sizeof(PSU0)); 800c78c: 2224 movs r2, #36 @ 0x24 800c78e: 2100 movs r1, #0 800c790: 480c ldr r0, [pc, #48] @ (800c7c4 ) 800c792: f007 fcd7 bl 8014144 PSU0.state = PSU_UNREADY; 800c796: 4b0b ldr r3, [pc, #44] @ (800c7c4 ) 800c798: 2200 movs r2, #0 800c79a: 71da strb r2, [r3, #7] PSU0.statetick = HAL_GetTick(); 800c79c: f002 f872 bl 800e884 800c7a0: 4603 mov r3, r0 800c7a2: 4a08 ldr r2, [pc, #32] @ (800c7c4 ) 800c7a4: 6113 str r3, [r2, #16] PSU0.power_limit = PSU_MAX_POWER; // kW 800c7a6: 4b07 ldr r3, [pc, #28] @ (800c7c4 ) 800c7a8: f247 5230 movw r2, #30000 @ 0x7530 800c7ac: 615a str r2, [r3, #20] PSU0.hv_mode = 0; 800c7ae: 4b05 ldr r3, [pc, #20] @ (800c7c4 ) 800c7b0: 2200 movs r2, #0 800c7b2: 761a strb r2, [r3, #24] PSU_Enable(0, 0); 800c7b4: 2100 movs r1, #0 800c7b6: 2000 movs r0, #0 800c7b8: f000 f806 bl 800c7c8 } 800c7bc: bf00 nop 800c7be: bd80 pop {r7, pc} 800c7c0: 200002cc .word 0x200002cc 800c7c4: 20000a0c .word 0x20000a0c 0800c7c8 : void PSU_Enable(uint8_t addr, uint8_t enable){ 800c7c8: b580 push {r7, lr} 800c7ca: b084 sub sp, #16 800c7cc: af00 add r7, sp, #0 800c7ce: 4603 mov r3, r0 800c7d0: 460a mov r2, r1 800c7d2: 71fb strb r3, [r7, #7] 800c7d4: 4613 mov r3, r2 800c7d6: 71bb strb r3, [r7, #6] PSU_1A_t data; memset(&data, 0, sizeof(data)); 800c7d8: f107 0308 add.w r3, r7, #8 800c7dc: 2208 movs r2, #8 800c7de: 2100 movs r1, #0 800c7e0: 4618 mov r0, r3 800c7e2: f007 fcaf bl 8014144 /* Для DC30 поддерживается только один модуль с адресом 0 */ if(addr != 0) return; 800c7e6: 79fb ldrb r3, [r7, #7] 800c7e8: 2b00 cmp r3, #0 800c7ea: d115 bne.n 800c818 if(PSU0.online == 0) return; 800c7ec: 4b0d ldr r3, [pc, #52] @ (800c824 ) 800c7ee: 7a1b ldrb r3, [r3, #8] 800c7f0: 2b00 cmp r3, #0 800c7f2: d013 beq.n 800c81c data.enable = !enable; 800c7f4: 79bb ldrb r3, [r7, #6] 800c7f6: 2b00 cmp r3, #0 800c7f8: bf0c ite eq 800c7fa: 2301 moveq r3, #1 800c7fc: 2300 movne r3, #0 800c7fe: b2db uxtb r3, r3 800c800: 723b strb r3, [r7, #8] PSU_SendCmd(0xF0, addr, 0x1A, &data); 800c802: 79f9 ldrb r1, [r7, #7] 800c804: f107 0308 add.w r3, r7, #8 800c808: 221a movs r2, #26 800c80a: 20f0 movs r0, #240 @ 0xf0 800c80c: f000 f866 bl 800c8dc ED_Delay(CAN_DELAY); 800c810: 2014 movs r0, #20 800c812: f7ff fc93 bl 800c13c 800c816: e002 b.n 800c81e if(addr != 0) return; 800c818: bf00 nop 800c81a: e000 b.n 800c81e if(PSU0.online == 0) return; 800c81c: bf00 nop } 800c81e: 3710 adds r7, #16 800c820: 46bd mov sp, r7 800c822: bd80 pop {r7, pc} 800c824: 20000a0c .word 0x20000a0c 0800c828 : memset(&data, 0, sizeof(data)); data.enable = !enable; if(addr != 0) return; PSU_SendCmd(0xF0, addr, 0x1D, &data); } void PSU_SetVoltageCurrent(uint8_t addr, uint16_t voltage, uint16_t current){ 800c828: b580 push {r7, lr} 800c82a: b086 sub sp, #24 800c82c: af00 add r7, sp, #0 800c82e: 4603 mov r3, r0 800c830: 71fb strb r3, [r7, #7] 800c832: 460b mov r3, r1 800c834: 80bb strh r3, [r7, #4] 800c836: 4613 mov r3, r2 800c838: 807b strh r3, [r7, #2] PSU_1C_t data; memset(&data, 0, sizeof(data)); 800c83a: f107 0308 add.w r3, r7, #8 800c83e: 2208 movs r2, #8 800c840: 2100 movs r1, #0 800c842: 4618 mov r0, r3 800c844: f007 fc7e bl 8014144 if(addr != 0) return; 800c848: 79fb ldrb r3, [r7, #7] 800c84a: 2b00 cmp r3, #0 800c84c: d140 bne.n 800c8d0 if(voltage 800c854: 2396 movs r3, #150 @ 0x96 800c856: 80bb strh r3, [r7, #4] if((PSU0.hv_mode==0) && voltage>499) voltage = 499; 800c858: 4b1f ldr r3, [pc, #124] @ (800c8d8 ) 800c85a: 7e1b ldrb r3, [r3, #24] 800c85c: 2b00 cmp r3, #0 800c85e: d106 bne.n 800c86e 800c860: 88bb ldrh r3, [r7, #4] 800c862: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800c866: d302 bcc.n 800c86e 800c868: f240 13f3 movw r3, #499 @ 0x1f3 800c86c: 80bb strh r3, [r7, #4] uint32_t current_ma = current * 100; 800c86e: 887b ldrh r3, [r7, #2] 800c870: 2264 movs r2, #100 @ 0x64 800c872: fb02 f303 mul.w r3, r2, r3 800c876: 617b str r3, [r7, #20] uint32_t voltage_mv = voltage * 1000; 800c878: 88bb ldrh r3, [r7, #4] 800c87a: f44f 727a mov.w r2, #1000 @ 0x3e8 800c87e: fb02 f303 mul.w r3, r2, r3 800c882: 613b str r3, [r7, #16] data.moduleCurrentTotal[0] = (current_ma >> 24) & 0xFF; 800c884: 697b ldr r3, [r7, #20] 800c886: 0e1b lsrs r3, r3, #24 800c888: b2db uxtb r3, r3 800c88a: 733b strb r3, [r7, #12] data.moduleCurrentTotal[1] = (current_ma >> 16) & 0xFF; 800c88c: 697b ldr r3, [r7, #20] 800c88e: 0c1b lsrs r3, r3, #16 800c890: b2db uxtb r3, r3 800c892: 737b strb r3, [r7, #13] data.moduleCurrentTotal[2] = (current_ma >> 8) & 0xFF; 800c894: 697b ldr r3, [r7, #20] 800c896: 0a1b lsrs r3, r3, #8 800c898: b2db uxtb r3, r3 800c89a: 73bb strb r3, [r7, #14] data.moduleCurrentTotal[3] = (current_ma >> 0) & 0xFF; 800c89c: 697b ldr r3, [r7, #20] 800c89e: b2db uxtb r3, r3 800c8a0: 73fb strb r3, [r7, #15] data.moduleVoltage[0] = (voltage_mv >> 24) & 0xFF; 800c8a2: 693b ldr r3, [r7, #16] 800c8a4: 0e1b lsrs r3, r3, #24 800c8a6: b2db uxtb r3, r3 800c8a8: 723b strb r3, [r7, #8] data.moduleVoltage[1] = (voltage_mv >> 16) & 0xFF; 800c8aa: 693b ldr r3, [r7, #16] 800c8ac: 0c1b lsrs r3, r3, #16 800c8ae: b2db uxtb r3, r3 800c8b0: 727b strb r3, [r7, #9] data.moduleVoltage[2] = (voltage_mv >> 8) & 0xFF; 800c8b2: 693b ldr r3, [r7, #16] 800c8b4: 0a1b lsrs r3, r3, #8 800c8b6: b2db uxtb r3, r3 800c8b8: 72bb strb r3, [r7, #10] data.moduleVoltage[3] = (voltage_mv >> 0) & 0xFF; 800c8ba: 693b ldr r3, [r7, #16] 800c8bc: b2db uxtb r3, r3 800c8be: 72fb strb r3, [r7, #11] PSU_SendCmd(0xF0, addr, 0x1C, &data); 800c8c0: 79f9 ldrb r1, [r7, #7] 800c8c2: f107 0308 add.w r3, r7, #8 800c8c6: 221c movs r2, #28 800c8c8: 20f0 movs r0, #240 @ 0xf0 800c8ca: f000 f807 bl 800c8dc 800c8ce: e000 b.n 800c8d2 if(addr != 0) return; 800c8d0: bf00 nop } 800c8d2: 3718 adds r7, #24 800c8d4: 46bd mov sp, r7 800c8d6: bd80 pop {r7, pc} 800c8d8: 20000a0c .word 0x20000a0c 0800c8dc : void PSU_SendCmd(uint8_t source, uint8_t destination, uint8_t cmd, void *data){ 800c8dc: b580 push {r7, lr} 800c8de: b08c sub sp, #48 @ 0x30 800c8e0: af00 add r7, sp, #0 800c8e2: 603b str r3, [r7, #0] 800c8e4: 4603 mov r3, r0 800c8e6: 71fb strb r3, [r7, #7] 800c8e8: 460b mov r3, r1 800c8ea: 71bb strb r3, [r7, #6] 800c8ec: 4613 mov r3, r2 800c8ee: 717b strb r3, [r7, #5] CanId_t CanId; CanId.source = source; 800c8f0: 79fb ldrb r3, [r7, #7] 800c8f2: f887 3028 strb.w r3, [r7, #40] @ 0x28 CanId.destination = destination; 800c8f6: 79bb ldrb r3, [r7, #6] 800c8f8: f887 3029 strb.w r3, [r7, #41] @ 0x29 CanId.command = cmd; 800c8fc: 797b ldrb r3, [r7, #5] 800c8fe: f003 033f and.w r3, r3, #63 @ 0x3f 800c902: b2da uxtb r2, r3 800c904: f897 302a ldrb.w r3, [r7, #42] @ 0x2a 800c908: f362 0305 bfi r3, r2, #0, #6 800c90c: f887 302a strb.w r3, [r7, #42] @ 0x2a CanId.device = 0x0A; 800c910: 8d7b ldrh r3, [r7, #42] @ 0x2a 800c912: 220a movs r2, #10 800c914: f362 1389 bfi r3, r2, #6, #4 800c918: 857b strh r3, [r7, #42] @ 0x2a int8_t retry_counter = 10; 800c91a: 230a movs r3, #10 800c91c: f887 302f strb.w r3, [r7, #47] @ 0x2f CAN_TxHeaderTypeDef tx_header; uint32_t tx_mailbox; HAL_StatusTypeDef CAN_result; memcpy(&tx_header.ExtId, &CanId, sizeof(CanId_t)); 800c920: 6abb ldr r3, [r7, #40] @ 0x28 800c922: 617b str r3, [r7, #20] tx_header.RTR = CAN_RTR_DATA; 800c924: 2300 movs r3, #0 800c926: 61fb str r3, [r7, #28] tx_header.IDE = CAN_ID_EXT; 800c928: 2304 movs r3, #4 800c92a: 61bb str r3, [r7, #24] tx_header.DLC = 8; 800c92c: 2308 movs r3, #8 800c92e: 623b str r3, [r7, #32] while(retry_counter>0){ //если буфер полон, ждем пока он освободится 800c930: e01e b.n 800c970 if (HAL_CAN_GetTxMailboxesFreeLevel(&hcan2) > 0){ 800c932: 4814 ldr r0, [pc, #80] @ (800c984 ) 800c934: f003 f812 bl 800f95c 800c938: 4603 mov r3, r0 800c93a: 2b00 cmp r3, #0 800c93c: d00e beq.n 800c95c /* отправка сообщения */ CAN_result = HAL_CAN_AddTxMessage(&hcan2, &tx_header, (uint8_t*)data, &tx_mailbox); 800c93e: f107 030c add.w r3, r7, #12 800c942: f107 0110 add.w r1, r7, #16 800c946: 683a ldr r2, [r7, #0] 800c948: 480e ldr r0, [pc, #56] @ (800c984 ) 800c94a: f002 ff38 bl 800f7be 800c94e: 4603 mov r3, r0 800c950: f887 302e strb.w r3, [r7, #46] @ 0x2e /* если отправка удалась, выход */ if(CAN_result == HAL_OK) { 800c954: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 800c958: 2b00 cmp r3, #0 800c95a: d00e beq.n 800c97a return; retry_counter = 0; } } ED_Delay(1); 800c95c: 2001 movs r0, #1 800c95e: f7ff fbed bl 800c13c retry_counter--; 800c962: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f 800c966: b2db uxtb r3, r3 800c968: 3b01 subs r3, #1 800c96a: b2db uxtb r3, r3 800c96c: f887 302f strb.w r3, [r7, #47] @ 0x2f while(retry_counter>0){ //если буфер полон, ждем пока он освободится 800c970: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f 800c974: 2b00 cmp r3, #0 800c976: dcdc bgt.n 800c932 800c978: e000 b.n 800c97c return; 800c97a: bf00 nop } } 800c97c: 3730 adds r7, #48 @ 0x30 800c97e: 46bd mov sp, r7 800c980: bd80 pop {r7, pc} 800c982: bf00 nop 800c984: 200002cc .word 0x200002cc 0800c988 : uint32_t max(uint32_t a, uint32_t b){ if(a>b) return a; else return b; } void PSU_ReadWrite(){ 800c988: b580 push {r7, lr} 800c98a: b082 sub sp, #8 800c98c: af00 add r7, sp, #0 uint8_t zero_data[8] = {0,0,0,0,0,0,0,0}; 800c98e: 463b mov r3, r7 800c990: 2200 movs r2, #0 800c992: 601a str r2, [r3, #0] 800c994: 605a str r2, [r3, #4] PSU_SendCmd(0xF0, 0, 0x04, zero_data);ED_Delay(CAN_DELAY); 800c996: 463b mov r3, r7 800c998: 2204 movs r2, #4 800c99a: 2100 movs r1, #0 800c99c: 20f0 movs r0, #240 @ 0xf0 800c99e: f7ff ff9d bl 800c8dc 800c9a2: 2014 movs r0, #20 800c9a4: f7ff fbca bl 800c13c PSU_SendCmd(0xF0, 0, 0x06, zero_data);ED_Delay(CAN_DELAY); 800c9a8: 463b mov r3, r7 800c9aa: 2206 movs r2, #6 800c9ac: 2100 movs r1, #0 800c9ae: 20f0 movs r0, #240 @ 0xf0 800c9b0: f7ff ff94 bl 800c8dc 800c9b4: 2014 movs r0, #20 800c9b6: f7ff fbc1 bl 800c13c // PSU_SendCmd(0xF0, 0, 0x08, zero_data);ED_Delay(CAN_DELAY); PSU_SendCmd(0xF0, 0, 0x09, zero_data);ED_Delay(CAN_DELAY); 800c9ba: 463b mov r3, r7 800c9bc: 2209 movs r2, #9 800c9be: 2100 movs r1, #0 800c9c0: 20f0 movs r0, #240 @ 0xf0 800c9c2: f7ff ff8b bl 800c8dc 800c9c6: 2014 movs r0, #20 800c9c8: f7ff fbb8 bl 800c13c // Power Limit if ((CONN.WantedCurrent/10) * CONN.MeasuredVoltage > PSU0.power_limit){ 800c9cc: 4b39 ldr r3, [pc, #228] @ (800cab4 ) 800c9ce: f8b3 301b ldrh.w r3, [r3, #27] 800c9d2: b29b uxth r3, r3 800c9d4: 4a38 ldr r2, [pc, #224] @ (800cab8 ) 800c9d6: fba2 2303 umull r2, r3, r2, r3 800c9da: 08db lsrs r3, r3, #3 800c9dc: b29b uxth r3, r3 800c9de: 461a mov r2, r3 800c9e0: 4b34 ldr r3, [pc, #208] @ (800cab4 ) 800c9e2: f8b3 3013 ldrh.w r3, [r3, #19] 800c9e6: b29b uxth r3, r3 800c9e8: fb02 f303 mul.w r3, r2, r3 800c9ec: 461a mov r2, r3 800c9ee: 4b33 ldr r3, [pc, #204] @ (800cabc ) 800c9f0: 695b ldr r3, [r3, #20] 800c9f2: 429a cmp r2, r3 800c9f4: d911 bls.n 800ca1a CONN.RequestedCurrent = PSU0.power_limit * 10 / CONN.MeasuredVoltage; 800c9f6: 4b31 ldr r3, [pc, #196] @ (800cabc ) 800c9f8: 695a ldr r2, [r3, #20] 800c9fa: 4613 mov r3, r2 800c9fc: 009b lsls r3, r3, #2 800c9fe: 4413 add r3, r2 800ca00: 005b lsls r3, r3, #1 800ca02: 461a mov r2, r3 800ca04: 4b2b ldr r3, [pc, #172] @ (800cab4 ) 800ca06: f8b3 3013 ldrh.w r3, [r3, #19] 800ca0a: b29b uxth r3, r3 800ca0c: fbb2 f3f3 udiv r3, r2, r3 800ca10: b29a uxth r2, r3 800ca12: 4b28 ldr r3, [pc, #160] @ (800cab4 ) 800ca14: f8a3 2011 strh.w r2, [r3, #17] 800ca18: e006 b.n 800ca28 }else{ CONN.RequestedCurrent = CONN.WantedCurrent; 800ca1a: 4b26 ldr r3, [pc, #152] @ (800cab4 ) 800ca1c: f8b3 301b ldrh.w r3, [r3, #27] 800ca20: b29a uxth r2, r3 800ca22: 4b24 ldr r3, [pc, #144] @ (800cab4 ) 800ca24: f8a3 2011 strh.w r2, [r3, #17] } if(CONN.RequestedCurrent > (PSU_MAX_CURRENT*10)){ 800ca28: 4b22 ldr r3, [pc, #136] @ (800cab4 ) 800ca2a: f8b3 3011 ldrh.w r3, [r3, #17] 800ca2e: b29b uxth r3, r3 800ca30: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800ca34: d908 bls.n 800ca48 CONN.RequestedCurrent = PSU_MAX_CURRENT*10; 800ca36: 4b1f ldr r3, [pc, #124] @ (800cab4 ) 800ca38: 2200 movs r2, #0 800ca3a: f062 0217 orn r2, r2, #23 800ca3e: 745a strb r2, [r3, #17] 800ca40: 2200 movs r2, #0 800ca42: f042 0203 orr.w r2, r2, #3 800ca46: 749a strb r2, [r3, #18] } CONN.RequestedPower = CONN.RequestedCurrent * CONN.RequestedVoltage / 10; 800ca48: 4b1a ldr r3, [pc, #104] @ (800cab4 ) 800ca4a: f8b3 3011 ldrh.w r3, [r3, #17] 800ca4e: b29b uxth r3, r3 800ca50: 461a mov r2, r3 800ca52: 4b18 ldr r3, [pc, #96] @ (800cab4 ) 800ca54: f8b3 300f ldrh.w r3, [r3, #15] 800ca58: b29b uxth r3, r3 800ca5a: fb02 f303 mul.w r3, r2, r3 800ca5e: 4a18 ldr r2, [pc, #96] @ (800cac0 ) 800ca60: fb82 1203 smull r1, r2, r2, r3 800ca64: 1092 asrs r2, r2, #2 800ca66: 17db asrs r3, r3, #31 800ca68: 1ad3 subs r3, r2, r3 800ca6a: 461a mov r2, r3 800ca6c: 4b11 ldr r3, [pc, #68] @ (800cab4 ) 800ca6e: f8c3 200b str.w r2, [r3, #11] if(PSU0.ready){ 800ca72: 4b12 ldr r3, [pc, #72] @ (800cabc ) 800ca74: 7a5b ldrb r3, [r3, #9] 800ca76: 2b00 cmp r3, #0 800ca78: d018 beq.n 800caac PSU_SetVoltageCurrent(0, CONN.RequestedVoltage, CONN.RequestedCurrent); // Normal mode 800ca7a: 4b0e ldr r3, [pc, #56] @ (800cab4 ) 800ca7c: f8b3 300f ldrh.w r3, [r3, #15] 800ca80: b29b uxth r3, r3 800ca82: 4a0c ldr r2, [pc, #48] @ (800cab4 ) 800ca84: f8b2 2011 ldrh.w r2, [r2, #17] 800ca88: b292 uxth r2, r2 800ca8a: 4619 mov r1, r3 800ca8c: 2000 movs r0, #0 800ca8e: f7ff fecb bl 800c828 ED_Delay(CAN_DELAY); 800ca92: 2014 movs r0, #20 800ca94: f7ff fb52 bl 800c13c if(CONN.MeasuredVoltage>490) PSU0.hv_mode = 1; 800ca98: 4b06 ldr r3, [pc, #24] @ (800cab4 ) 800ca9a: f8b3 3013 ldrh.w r3, [r3, #19] 800ca9e: b29b uxth r3, r3 800caa0: f5b3 7ff5 cmp.w r3, #490 @ 0x1ea 800caa4: d902 bls.n 800caac 800caa6: 4b05 ldr r3, [pc, #20] @ (800cabc ) 800caa8: 2201 movs r2, #1 800caaa: 761a strb r2, [r3, #24] } // PSU_SetHVMode(0, PSU0.hv_mode); // auto set, no need // ED_Delay(CAN_DELAY); } 800caac: bf00 nop 800caae: 3708 adds r7, #8 800cab0: 46bd mov sp, r7 800cab2: bd80 pop {r7, pc} 800cab4: 200002f8 .word 0x200002f8 800cab8: cccccccd .word 0xcccccccd 800cabc: 20000a0c .word 0x20000a0c 800cac0: 66666667 .word 0x66666667 0800cac4 : void PSU_Task(void){ 800cac4: b598 push {r3, r4, r7, lr} 800cac6: af00 add r7, sp, #0 static uint32_t psu_on_tick = 0; static uint32_t dc_on_tick = 0; static uint32_t cont_ok_tick = 0; // Обновляем ONLINE/READY по таймауту if((HAL_GetTick() - can_lastpacket) > PSU_ONLINE_TIMEOUT){ 800cac8: f001 fedc bl 800e884 800cacc: 4602 mov r2, r0 800cace: 4bb4 ldr r3, [pc, #720] @ (800cda0 ) 800cad0: 681b ldr r3, [r3, #0] 800cad2: 1ad3 subs r3, r2, r3 800cad4: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800cad8: d920 bls.n 800cb1c PSU0.online = 0; 800cada: 4bb2 ldr r3, [pc, #712] @ (800cda4 ) 800cadc: 2200 movs r2, #0 800cade: 721a strb r2, [r3, #8] PSU0.PSU_enabled = 0; 800cae0: 4bb0 ldr r3, [pc, #704] @ (800cda4 ) 800cae2: 2200 movs r2, #0 800cae4: 729a strb r2, [r3, #10] PSU_04.moduleTemperature = 0; 800cae6: 4bb0 ldr r3, [pc, #704] @ (800cda8 ) 800cae8: 2200 movs r2, #0 800caea: 711a strb r2, [r3, #4] PSU_04.modularForm0 = 0; 800caec: 4bae ldr r3, [pc, #696] @ (800cda8 ) 800caee: 2200 movs r2, #0 800caf0: 721a strb r2, [r3, #8] PSU_04.modularForm1 = 0; 800caf2: 4bad ldr r3, [pc, #692] @ (800cda8 ) 800caf4: 2200 movs r2, #0 800caf6: 71da strb r2, [r3, #7] PSU_04.modularForm2 = 0; 800caf8: 4bab ldr r3, [pc, #684] @ (800cda8 ) 800cafa: 2200 movs r2, #0 800cafc: 719a strb r2, [r3, #6] PSU_06.VAB = 0; 800cafe: 4bab ldr r3, [pc, #684] @ (800cdac ) 800cb00: 2200 movs r2, #0 800cb02: 609a str r2, [r3, #8] PSU_06.VBC = 0; 800cb04: 4ba9 ldr r3, [pc, #676] @ (800cdac ) 800cb06: 2200 movs r2, #0 800cb08: 60da str r2, [r3, #12] PSU_06.VCA = 0; 800cb0a: 4ba8 ldr r3, [pc, #672] @ (800cdac ) 800cb0c: 2200 movs r2, #0 800cb0e: 611a str r2, [r3, #16] PSU_09.moduleNCurrent = 0; 800cb10: 4ba7 ldr r3, [pc, #668] @ (800cdb0 ) 800cb12: 2200 movs r2, #0 800cb14: 60da str r2, [r3, #12] PSU_09.moduleNVoltage = 0; 800cb16: 4ba6 ldr r3, [pc, #664] @ (800cdb0 ) 800cb18: 2200 movs r2, #0 800cb1a: 609a str r2, [r3, #8] } if(!PSU0.online || !PSU0.enableAC){ 800cb1c: 4ba1 ldr r3, [pc, #644] @ (800cda4 ) 800cb1e: 7a1b ldrb r3, [r3, #8] 800cb20: 2b00 cmp r3, #0 800cb22: d003 beq.n 800cb2c 800cb24: 4b9f ldr r3, [pc, #636] @ (800cda4 ) 800cb26: 781b ldrb r3, [r3, #0] 800cb28: 2b00 cmp r3, #0 800cb2a: d10c bne.n 800cb46 CONN.MeasuredVoltage = 0; 800cb2c: 4ba1 ldr r3, [pc, #644] @ (800cdb4 ) 800cb2e: 2200 movs r2, #0 800cb30: 74da strb r2, [r3, #19] 800cb32: 2200 movs r2, #0 800cb34: 751a strb r2, [r3, #20] CONN.MeasuredCurrent = 0; 800cb36: 4b9f ldr r3, [pc, #636] @ (800cdb4 ) 800cb38: 2200 movs r2, #0 800cb3a: 755a strb r2, [r3, #21] 800cb3c: 2200 movs r2, #0 800cb3e: 759a strb r2, [r3, #22] CONN.outputEnabled = 0; 800cb40: 4b9c ldr r3, [pc, #624] @ (800cdb4 ) 800cb42: 2200 movs r2, #0 800cb44: 761a strb r2, [r3, #24] } // Управление AC-контактором с задержкой отключения 1 минута if(CONN.EvConnected){ 800cb46: 4b9b ldr r3, [pc, #620] @ (800cdb4 ) 800cb48: 7f9b ldrb r3, [r3, #30] 800cb4a: 2b00 cmp r3, #0 800cb4c: d00c beq.n 800cb68 RELAY_Write(RELAY_AC, 1); 800cb4e: 2101 movs r1, #1 800cb50: 2004 movs r0, #4 800cb52: f7fc fdcb bl 80096ec psu_on_tick = HAL_GetTick(); 800cb56: f001 fe95 bl 800e884 800cb5a: 4603 mov r3, r0 800cb5c: 4a96 ldr r2, [pc, #600] @ (800cdb8 ) 800cb5e: 6013 str r3, [r2, #0] PSU0.enableAC = 1; 800cb60: 4b90 ldr r3, [pc, #576] @ (800cda4 ) 800cb62: 2201 movs r2, #1 800cb64: 701a strb r2, [r3, #0] 800cb66: e010 b.n 800cb8a }else{ if((HAL_GetTick() - psu_on_tick) > 1 * 60000){ 800cb68: f001 fe8c bl 800e884 800cb6c: 4602 mov r2, r0 800cb6e: 4b92 ldr r3, [pc, #584] @ (800cdb8 ) 800cb70: 681b ldr r3, [r3, #0] 800cb72: 1ad3 subs r3, r2, r3 800cb74: f64e 2260 movw r2, #60000 @ 0xea60 800cb78: 4293 cmp r3, r2 800cb7a: d906 bls.n 800cb8a RELAY_Write(RELAY_AC, 0); 800cb7c: 2100 movs r1, #0 800cb7e: 2004 movs r0, #4 800cb80: f7fc fdb4 bl 80096ec PSU0.enableAC = 0; 800cb84: 4b87 ldr r3, [pc, #540] @ (800cda4 ) 800cb86: 2200 movs r2, #0 800cb88: 701a strb r2, [r3, #0] } } // Текущее состояние DC-контактора по обратной связи PSU0.CONT_enabled = IN_ReadInput(IN_CONT_FB_DC); 800cb8a: 2005 movs r0, #5 800cb8c: f7fc fe22 bl 80097d4 800cb90: 4603 mov r3, r0 800cb92: 461a mov r2, r3 800cb94: 4b83 ldr r3, [pc, #524] @ (800cda4 ) 800cb96: 72da strb r2, [r3, #11] // Обновляем ready с учётом ошибок if(PSU0.online && !PSU0.cont_fault && PSU0.enableAC){ 800cb98: 4b82 ldr r3, [pc, #520] @ (800cda4 ) 800cb9a: 7a1b ldrb r3, [r3, #8] 800cb9c: 2b00 cmp r3, #0 800cb9e: d007 beq.n 800cbb0 800cba0: 4b80 ldr r3, [pc, #512] @ (800cda4 ) 800cba2: 7b1b ldrb r3, [r3, #12] 800cba4: 2b00 cmp r3, #0 800cba6: d103 bne.n 800cbb0 800cba8: 4b7e ldr r3, [pc, #504] @ (800cda4 ) 800cbaa: 781b ldrb r3, [r3, #0] 800cbac: 2b00 cmp r3, #0 800cbae: d102 bne.n 800cbb6 // PSU0.ready = 1; }else{ PSU0.ready = 0; 800cbb0: 4b7c ldr r3, [pc, #496] @ (800cda4 ) 800cbb2: 2200 movs r2, #0 800cbb4: 725a strb r2, [r3, #9] } switch(PSU0.state){ 800cbb6: 4b7b ldr r3, [pc, #492] @ (800cda4 ) 800cbb8: 79db ldrb r3, [r3, #7] 800cbba: 2b09 cmp r3, #9 800cbbc: f200 8155 bhi.w 800ce6a 800cbc0: a201 add r2, pc, #4 @ (adr r2, 800cbc8 ) 800cbc2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800cbc6: bf00 nop 800cbc8: 0800cbf1 .word 0x0800cbf1 800cbcc: 0800cc25 .word 0x0800cc25 800cbd0: 0800cc41 .word 0x0800cc41 800cbd4: 0800cc79 .word 0x0800cc79 800cbd8: 0800ccc7 .word 0x0800ccc7 800cbdc: 0800cd09 .word 0x0800cd09 800cbe0: 0800cd73 .word 0x0800cd73 800cbe4: 0800ce1d .word 0x0800ce1d 800cbe8: 0800cdcd .word 0x0800cdcd 800cbec: 0800ce57 .word 0x0800ce57 case PSU_UNREADY: PSU0.enableOutput = 0; 800cbf0: 4b6c ldr r3, [pc, #432] @ (800cda4 ) 800cbf2: 2200 movs r2, #0 800cbf4: 705a strb r2, [r3, #1] RELAY_Write(RELAY_DC, 0); 800cbf6: 2100 movs r1, #0 800cbf8: 2003 movs r0, #3 800cbfa: f7fc fd77 bl 80096ec if(PSU0.online && PSU0.enableAC && !PSU0.cont_fault){ 800cbfe: 4b69 ldr r3, [pc, #420] @ (800cda4 ) 800cc00: 7a1b ldrb r3, [r3, #8] 800cc02: 2b00 cmp r3, #0 800cc04: f000 8135 beq.w 800ce72 800cc08: 4b66 ldr r3, [pc, #408] @ (800cda4 ) 800cc0a: 781b ldrb r3, [r3, #0] 800cc0c: 2b00 cmp r3, #0 800cc0e: f000 8130 beq.w 800ce72 800cc12: 4b64 ldr r3, [pc, #400] @ (800cda4 ) 800cc14: 7b1b ldrb r3, [r3, #12] 800cc16: 2b00 cmp r3, #0 800cc18: f040 812b bne.w 800ce72 PSU_SwitchState(PSU_INITIALIZING); 800cc1c: 2001 movs r0, #1 800cc1e: f7ff fc2b bl 800c478 } break; 800cc22: e126 b.n 800ce72 case PSU_INITIALIZING: if(PSU_StateTime() > 4000){ // Wait 4s for PSU to initialize 800cc24: f7ff fc3c bl 800c4a0 800cc28: 4603 mov r3, r0 800cc2a: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800cc2e: f240 8122 bls.w 800ce76 PSU0.ready = 1; 800cc32: 4b5c ldr r3, [pc, #368] @ (800cda4 ) 800cc34: 2201 movs r2, #1 800cc36: 725a strb r2, [r3, #9] PSU_SwitchState(PSU_READY); 800cc38: 2002 movs r0, #2 800cc3a: f7ff fc1d bl 800c478 } break; 800cc3e: e11a b.n 800ce76 case PSU_READY: // модуль готов, но выключен PSU0.hv_mode = 0; 800cc40: 4b58 ldr r3, [pc, #352] @ (800cda4 ) 800cc42: 2200 movs r2, #0 800cc44: 761a strb r2, [r3, #24] RELAY_Write(RELAY_DC, 0); 800cc46: 2100 movs r1, #0 800cc48: 2003 movs r0, #3 800cc4a: f7fc fd4f bl 80096ec if(!PSU0.ready){ 800cc4e: 4b55 ldr r3, [pc, #340] @ (800cda4 ) 800cc50: 7a5b ldrb r3, [r3, #9] 800cc52: 2b00 cmp r3, #0 800cc54: d103 bne.n 800cc5e PSU_SwitchState(PSU_UNREADY); 800cc56: 2000 movs r0, #0 800cc58: f7ff fc0e bl 800c478 break; 800cc5c: e11c b.n 800ce98 } if(CONN.EnableOutput){ 800cc5e: 4b55 ldr r3, [pc, #340] @ (800cdb4 ) 800cc60: 7ddb ldrb r3, [r3, #23] 800cc62: 2b00 cmp r3, #0 800cc64: f000 8109 beq.w 800ce7a PSU_Enable(0, 1); 800cc68: 2101 movs r1, #1 800cc6a: 2000 movs r0, #0 800cc6c: f7ff fdac bl 800c7c8 PSU_SwitchState(PSU_WAIT_ACK_ON); 800cc70: 2003 movs r0, #3 800cc72: f7ff fc01 bl 800c478 } break; 800cc76: e100 b.n 800ce7a case PSU_WAIT_ACK_ON: if(PSU0.PSU_enabled && PSU0.ready){ 800cc78: 4b4a ldr r3, [pc, #296] @ (800cda4 ) 800cc7a: 7a9b ldrb r3, [r3, #10] 800cc7c: 2b00 cmp r3, #0 800cc7e: d00c beq.n 800cc9a 800cc80: 4b48 ldr r3, [pc, #288] @ (800cda4 ) 800cc82: 7a5b ldrb r3, [r3, #9] 800cc84: 2b00 cmp r3, #0 800cc86: d008 beq.n 800cc9a dc_on_tick = HAL_GetTick(); 800cc88: f001 fdfc bl 800e884 800cc8c: 4603 mov r3, r0 800cc8e: 4a4b ldr r2, [pc, #300] @ (800cdbc ) 800cc90: 6013 str r3, [r2, #0] PSU_SwitchState(PSU_CONT_WAIT_ACK_ON); 800cc92: 2004 movs r0, #4 800cc94: f7ff fbf0 bl 800c478 PSU0.psu_fault = 1; CONN.chargingError = CONN_ERR_PSU_FAULT; PSU_SwitchState(PSU_UNREADY); log_printf(LOG_ERR, "PSU on timeout\n"); } break; 800cc98: e0f1 b.n 800ce7e }else if(PSU_StateTime() > 10000){ 800cc9a: f7ff fc01 bl 800c4a0 800cc9e: 4603 mov r3, r0 800cca0: f242 7210 movw r2, #10000 @ 0x2710 800cca4: 4293 cmp r3, r2 800cca6: f240 80ea bls.w 800ce7e PSU0.psu_fault = 1; 800ccaa: 4b3e ldr r3, [pc, #248] @ (800cda4 ) 800ccac: 2201 movs r2, #1 800ccae: 735a strb r2, [r3, #13] CONN.chargingError = CONN_ERR_PSU_FAULT; 800ccb0: 4b40 ldr r3, [pc, #256] @ (800cdb4 ) 800ccb2: 220a movs r2, #10 800ccb4: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_UNREADY); 800ccb6: 2000 movs r0, #0 800ccb8: f7ff fbde bl 800c478 log_printf(LOG_ERR, "PSU on timeout\n"); 800ccbc: 4940 ldr r1, [pc, #256] @ (800cdc0 ) 800ccbe: 2004 movs r0, #4 800ccc0: f7fe fc28 bl 800b514 break; 800ccc4: e0db b.n 800ce7e case PSU_CONT_WAIT_ACK_ON: // замыкаем DC-контактор и ждём подтверждение RELAY_Write(RELAY_DC, 1); 800ccc6: 2101 movs r1, #1 800ccc8: 2003 movs r0, #3 800ccca: f7fc fd0f bl 80096ec if(PSU0.CONT_enabled){ 800ccce: 4b35 ldr r3, [pc, #212] @ (800cda4 ) 800ccd0: 7adb ldrb r3, [r3, #11] 800ccd2: 2b00 cmp r3, #0 800ccd4: d003 beq.n 800ccde PSU_SwitchState(PSU_CONNECTED); 800ccd6: 2005 movs r0, #5 800ccd8: f7ff fbce bl 800c478 PSU0.cont_fault = 1; CONN.chargingError = CONN_ERR_CONTACTOR; PSU_SwitchState(PSU_CURRENT_DROP); log_printf(LOG_ERR, "Contactor error, stopping...\n"); } break; 800ccdc: e0d1 b.n 800ce82 }else if(PSU_StateTime() > 1000){ 800ccde: f7ff fbdf bl 800c4a0 800cce2: 4603 mov r3, r0 800cce4: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800cce8: f240 80cb bls.w 800ce82 PSU0.cont_fault = 1; 800ccec: 4b2d ldr r3, [pc, #180] @ (800cda4 ) 800ccee: 2201 movs r2, #1 800ccf0: 731a strb r2, [r3, #12] CONN.chargingError = CONN_ERR_CONTACTOR; 800ccf2: 4b30 ldr r3, [pc, #192] @ (800cdb4 ) 800ccf4: 2207 movs r2, #7 800ccf6: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_CURRENT_DROP); 800ccf8: 2006 movs r0, #6 800ccfa: f7ff fbbd bl 800c478 log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800ccfe: 4931 ldr r1, [pc, #196] @ (800cdc4 ) 800cd00: 2004 movs r0, #4 800cd02: f7fe fc07 bl 800b514 break; 800cd06: e0bc b.n 800ce82 case PSU_CONNECTED: // Основное рабочее состояние if(!CONN.EnableOutput || !PSU0.ready){ 800cd08: 4b2a ldr r3, [pc, #168] @ (800cdb4 ) 800cd0a: 7ddb ldrb r3, [r3, #23] 800cd0c: 2b00 cmp r3, #0 800cd0e: d003 beq.n 800cd18 800cd10: 4b24 ldr r3, [pc, #144] @ (800cda4 ) 800cd12: 7a5b ldrb r3, [r3, #9] 800cd14: 2b00 cmp r3, #0 800cd16: d103 bne.n 800cd20 PSU_SwitchState(PSU_CURRENT_DROP); 800cd18: 2006 movs r0, #6 800cd1a: f7ff fbad bl 800c478 break; 800cd1e: e0bb b.n 800ce98 } // контроль контактора: 1 c таймаут if (IN_ReadInput(IN_CONT_FB_DC) != RELAY_Read(RELAY_DC)){ 800cd20: 2005 movs r0, #5 800cd22: f7fc fd57 bl 80097d4 800cd26: 4603 mov r3, r0 800cd28: 461c mov r4, r3 800cd2a: 2003 movs r0, #3 800cd2c: f7fc fd42 bl 80097b4 800cd30: 4603 mov r3, r0 800cd32: 429c cmp r4, r3 800cd34: d017 beq.n 800cd66 if((HAL_GetTick() - cont_ok_tick) > 1000){ 800cd36: f001 fda5 bl 800e884 800cd3a: 4602 mov r2, r0 800cd3c: 4b22 ldr r3, [pc, #136] @ (800cdc8 ) 800cd3e: 681b ldr r3, [r3, #0] 800cd40: 1ad3 subs r3, r2, r3 800cd42: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800cd46: f240 809e bls.w 800ce86 CONN.chargingError = CONN_ERR_CONTACTOR; 800cd4a: 4b1a ldr r3, [pc, #104] @ (800cdb4 ) 800cd4c: 2207 movs r2, #7 800cd4e: 775a strb r2, [r3, #29] PSU0.cont_fault = 1; 800cd50: 4b14 ldr r3, [pc, #80] @ (800cda4 ) 800cd52: 2201 movs r2, #1 800cd54: 731a strb r2, [r3, #12] PSU_SwitchState(PSU_CURRENT_DROP); 800cd56: 2006 movs r0, #6 800cd58: f7ff fb8e bl 800c478 log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800cd5c: 4919 ldr r1, [pc, #100] @ (800cdc4 ) 800cd5e: 2004 movs r0, #4 800cd60: f7fe fbd8 bl 800b514 } }else{ cont_ok_tick = HAL_GetTick(); } break; 800cd64: e08f b.n 800ce86 cont_ok_tick = HAL_GetTick(); 800cd66: f001 fd8d bl 800e884 800cd6a: 4603 mov r3, r0 800cd6c: 4a16 ldr r2, [pc, #88] @ (800cdc8 ) 800cd6e: 6013 str r3, [r2, #0] break; 800cd70: e089 b.n 800ce86 case PSU_CURRENT_DROP: // снижаем ток до нуля перед отключением DC CONN.RequestedCurrent = 0; 800cd72: 4b10 ldr r3, [pc, #64] @ (800cdb4 ) 800cd74: 2200 movs r2, #0 800cd76: 745a strb r2, [r3, #17] 800cd78: 2200 movs r2, #0 800cd7a: 749a strb r2, [r3, #18] // если ток действительно упал или вышло время, отключаем DC if((CONN.MeasuredCurrent < 30) || (PSU_StateTime() > 5000)){ 800cd7c: 4b0d ldr r3, [pc, #52] @ (800cdb4 ) 800cd7e: f8b3 3015 ldrh.w r3, [r3, #21] 800cd82: b29b uxth r3, r3 800cd84: 2b1d cmp r3, #29 800cd86: d906 bls.n 800cd96 800cd88: f7ff fb8a bl 800c4a0 800cd8c: 4603 mov r3, r0 800cd8e: f241 3288 movw r2, #5000 @ 0x1388 800cd92: 4293 cmp r3, r2 800cd94: d979 bls.n 800ce8a PSU_SwitchState(PSU_CONT_WAIT_ACK_OFF); 800cd96: 2008 movs r0, #8 800cd98: f7ff fb6e bl 800c478 } break; 800cd9c: e075 b.n 800ce8a 800cd9e: bf00 nop 800cda0: 20000a30 .word 0x20000a30 800cda4: 20000a0c .word 0x20000a0c 800cda8: 200009d4 .word 0x200009d4 800cdac: 200009e0 .word 0x200009e0 800cdb0: 200009fc .word 0x200009fc 800cdb4: 200002f8 .word 0x200002f8 800cdb8: 20000a58 .word 0x20000a58 800cdbc: 20000a5c .word 0x20000a5c 800cdc0: 08016c3c .word 0x08016c3c 800cdc4: 08016c4c .word 0x08016c4c 800cdc8: 20000a60 .word 0x20000a60 case PSU_CONT_WAIT_ACK_OFF: RELAY_Write(RELAY_DC, 0); 800cdcc: 2100 movs r1, #0 800cdce: 2003 movs r0, #3 800cdd0: f7fc fc8c bl 80096ec if(!PSU0.CONT_enabled){ 800cdd4: 4b31 ldr r3, [pc, #196] @ (800ce9c ) 800cdd6: 7adb ldrb r3, [r3, #11] 800cdd8: 2b00 cmp r3, #0 800cdda: d107 bne.n 800cdec PSU_Enable(0, 0); 800cddc: 2100 movs r1, #0 800cdde: 2000 movs r0, #0 800cde0: f7ff fcf2 bl 800c7c8 PSU_SwitchState(PSU_WAIT_ACK_OFF); 800cde4: 2007 movs r0, #7 800cde6: f7ff fb47 bl 800c478 CONN.chargingError = CONN_ERR_CONTACTOR; PSU_Enable(0, 0); PSU_SwitchState(PSU_WAIT_ACK_OFF); log_printf(LOG_ERR, "Contactor error, stopping...\n"); } break; 800cdea: e050 b.n 800ce8e }else if(PSU_StateTime() > 1000){ 800cdec: f7ff fb58 bl 800c4a0 800cdf0: 4603 mov r3, r0 800cdf2: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800cdf6: d94a bls.n 800ce8e PSU0.cont_fault = 1; 800cdf8: 4b28 ldr r3, [pc, #160] @ (800ce9c ) 800cdfa: 2201 movs r2, #1 800cdfc: 731a strb r2, [r3, #12] CONN.chargingError = CONN_ERR_CONTACTOR; 800cdfe: 4b28 ldr r3, [pc, #160] @ (800cea0 ) 800ce00: 2207 movs r2, #7 800ce02: 775a strb r2, [r3, #29] PSU_Enable(0, 0); 800ce04: 2100 movs r1, #0 800ce06: 2000 movs r0, #0 800ce08: f7ff fcde bl 800c7c8 PSU_SwitchState(PSU_WAIT_ACK_OFF); 800ce0c: 2007 movs r0, #7 800ce0e: f7ff fb33 bl 800c478 log_printf(LOG_ERR, "Contactor error, stopping...\n"); 800ce12: 4924 ldr r1, [pc, #144] @ (800cea4 ) 800ce14: 2004 movs r0, #4 800ce16: f7fe fb7d bl 800b514 break; 800ce1a: e038 b.n 800ce8e case PSU_WAIT_ACK_OFF: if(!PSU0.PSU_enabled){ 800ce1c: 4b1f ldr r3, [pc, #124] @ (800ce9c ) 800ce1e: 7a9b ldrb r3, [r3, #10] 800ce20: 2b00 cmp r3, #0 800ce22: d103 bne.n 800ce2c PSU_SwitchState(PSU_OFF_PAUSE); 800ce24: 2009 movs r0, #9 800ce26: f7ff fb27 bl 800c478 PSU0.psu_fault = 1; CONN.chargingError = CONN_ERR_PSU_FAULT; PSU_SwitchState(PSU_UNREADY); log_printf(LOG_ERR, "PSU off timeout\n"); } break; 800ce2a: e032 b.n 800ce92 }else if(PSU_StateTime() > 10000){ 800ce2c: f7ff fb38 bl 800c4a0 800ce30: 4603 mov r3, r0 800ce32: f242 7210 movw r2, #10000 @ 0x2710 800ce36: 4293 cmp r3, r2 800ce38: d92b bls.n 800ce92 PSU0.psu_fault = 1; 800ce3a: 4b18 ldr r3, [pc, #96] @ (800ce9c ) 800ce3c: 2201 movs r2, #1 800ce3e: 735a strb r2, [r3, #13] CONN.chargingError = CONN_ERR_PSU_FAULT; 800ce40: 4b17 ldr r3, [pc, #92] @ (800cea0 ) 800ce42: 220a movs r2, #10 800ce44: 775a strb r2, [r3, #29] PSU_SwitchState(PSU_UNREADY); 800ce46: 2000 movs r0, #0 800ce48: f7ff fb16 bl 800c478 log_printf(LOG_ERR, "PSU off timeout\n"); 800ce4c: 4916 ldr r1, [pc, #88] @ (800cea8 ) 800ce4e: 2004 movs r0, #4 800ce50: f7fe fb60 bl 800b514 break; 800ce54: e01d b.n 800ce92 case PSU_OFF_PAUSE: if(PSU_StateTime() > 4000){ 800ce56: f7ff fb23 bl 800c4a0 800ce5a: 4603 mov r3, r0 800ce5c: f5b3 6f7a cmp.w r3, #4000 @ 0xfa0 800ce60: d919 bls.n 800ce96 PSU_SwitchState(PSU_READY); 800ce62: 2002 movs r0, #2 800ce64: f7ff fb08 bl 800c478 } break; 800ce68: e015 b.n 800ce96 default: PSU_SwitchState(PSU_UNREADY); 800ce6a: 2000 movs r0, #0 800ce6c: f7ff fb04 bl 800c478 break; 800ce70: e012 b.n 800ce98 break; 800ce72: bf00 nop 800ce74: e010 b.n 800ce98 break; 800ce76: bf00 nop 800ce78: e00e b.n 800ce98 break; 800ce7a: bf00 nop 800ce7c: e00c b.n 800ce98 break; 800ce7e: bf00 nop 800ce80: e00a b.n 800ce98 break; 800ce82: bf00 nop 800ce84: e008 b.n 800ce98 break; 800ce86: bf00 nop 800ce88: e006 b.n 800ce98 break; 800ce8a: bf00 nop 800ce8c: e004 b.n 800ce98 break; 800ce8e: bf00 nop 800ce90: e002 b.n 800ce98 break; 800ce92: bf00 nop 800ce94: e000 b.n 800ce98 break; 800ce96: bf00 nop } } 800ce98: bf00 nop 800ce9a: bd98 pop {r3, r4, r7, pc} 800ce9c: 20000a0c .word 0x20000a0c 800cea0: 200002f8 .word 0x200002f8 800cea4: 08016c4c .word 0x08016c4c 800cea8: 08016c6c .word 0x08016c6c 0800ceac : .Th = 10, .Tf = 50, .Tl = 0, }; void LED_Write(){ 800ceac: b580 push {r7, lr} 800ceae: af00 add r7, sp, #0 if(CONN.chargingError != CONN_NO_ERROR){ 800ceb0: 4b34 ldr r3, [pc, #208] @ (800cf84 ) 800ceb2: 7f5b ldrb r3, [r3, #29] 800ceb4: 2b00 cmp r3, #0 800ceb6: d003 beq.n 800cec0 LED_SetColor(&color_error); 800ceb8: 4833 ldr r0, [pc, #204] @ (800cf88 ) 800ceba: f000 f91f bl 800d0fc return; 800cebe: e05f b.n 800cf80 } switch(CONN.connState){ 800cec0: 4b30 ldr r3, [pc, #192] @ (800cf84 ) 800cec2: 785b ldrb r3, [r3, #1] 800cec4: 2b0d cmp r3, #13 800cec6: d857 bhi.n 800cf78 800cec8: a201 add r2, pc, #4 @ (adr r2, 800ced0 ) 800ceca: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800cece: bf00 nop 800ced0: 0800cf09 .word 0x0800cf09 800ced4: 0800cf11 .word 0x0800cf11 800ced8: 0800cf19 .word 0x0800cf19 800cedc: 0800cf21 .word 0x0800cf21 800cee0: 0800cf29 .word 0x0800cf29 800cee4: 0800cf31 .word 0x0800cf31 800cee8: 0800cf39 .word 0x0800cf39 800ceec: 0800cf41 .word 0x0800cf41 800cef0: 0800cf49 .word 0x0800cf49 800cef4: 0800cf51 .word 0x0800cf51 800cef8: 0800cf59 .word 0x0800cf59 800cefc: 0800cf61 .word 0x0800cf61 800cf00: 0800cf69 .word 0x0800cf69 800cf04: 0800cf71 .word 0x0800cf71 case Unknown: LED_SetColor(&color_unknown); 800cf08: 4820 ldr r0, [pc, #128] @ (800cf8c ) 800cf0a: f000 f8f7 bl 800d0fc break; 800cf0e: e037 b.n 800cf80 case Unplugged: LED_SetColor(&color_unplugged); 800cf10: 481f ldr r0, [pc, #124] @ (800cf90 ) 800cf12: f000 f8f3 bl 800d0fc break; 800cf16: e033 b.n 800cf80 case Disabled: LED_SetColor(&color_error); 800cf18: 481b ldr r0, [pc, #108] @ (800cf88 ) 800cf1a: f000 f8ef bl 800d0fc break; 800cf1e: e02f b.n 800cf80 case Preparing: LED_SetColor(&color_preparing); 800cf20: 481c ldr r0, [pc, #112] @ (800cf94 ) 800cf22: f000 f8eb bl 800d0fc break; 800cf26: e02b b.n 800cf80 case AuthRequired: LED_SetColor(&color_preparing); 800cf28: 481a ldr r0, [pc, #104] @ (800cf94 ) 800cf2a: f000 f8e7 bl 800d0fc break; 800cf2e: e027 b.n 800cf80 case WaitingForEnergy: LED_SetColor(&color_charging); 800cf30: 4819 ldr r0, [pc, #100] @ (800cf98 ) 800cf32: f000 f8e3 bl 800d0fc break; 800cf36: e023 b.n 800cf80 case ChargingPausedEV: LED_SetColor(&color_charging); 800cf38: 4817 ldr r0, [pc, #92] @ (800cf98 ) 800cf3a: f000 f8df bl 800d0fc break; 800cf3e: e01f b.n 800cf80 case ChargingPausedEVSE: LED_SetColor(&color_charging); 800cf40: 4815 ldr r0, [pc, #84] @ (800cf98 ) 800cf42: f000 f8db bl 800d0fc break; 800cf46: e01b b.n 800cf80 case Charging: LED_SetColor(&color_charging); 800cf48: 4813 ldr r0, [pc, #76] @ (800cf98 ) 800cf4a: f000 f8d7 bl 800d0fc break; 800cf4e: e017 b.n 800cf80 case AuthTimeout: LED_SetColor(&color_finished); 800cf50: 4812 ldr r0, [pc, #72] @ (800cf9c ) 800cf52: f000 f8d3 bl 800d0fc break; 800cf56: e013 b.n 800cf80 case Finished: LED_SetColor(&color_finished); 800cf58: 4810 ldr r0, [pc, #64] @ (800cf9c ) 800cf5a: f000 f8cf bl 800d0fc break; 800cf5e: e00f b.n 800cf80 case FinishedEVSE: LED_SetColor(&color_finished); 800cf60: 480e ldr r0, [pc, #56] @ (800cf9c ) 800cf62: f000 f8cb bl 800d0fc break; 800cf66: e00b b.n 800cf80 case FinishedEV: LED_SetColor(&color_finished); 800cf68: 480c ldr r0, [pc, #48] @ (800cf9c ) 800cf6a: f000 f8c7 bl 800d0fc break; 800cf6e: e007 b.n 800cf80 case Replugging: LED_SetColor(&color_preparing); 800cf70: 4808 ldr r0, [pc, #32] @ (800cf94 ) 800cf72: f000 f8c3 bl 800d0fc break; 800cf76: e003 b.n 800cf80 default: LED_SetColor(&color_unknown); 800cf78: 4804 ldr r0, [pc, #16] @ (800cf8c ) 800cf7a: f000 f8bf bl 800d0fc break; 800cf7e: bf00 nop } } 800cf80: bd80 pop {r7, pc} 800cf82: bf00 nop 800cf84: 200002f8 .word 0x200002f8 800cf88: 20000054 .word 0x20000054 800cf8c: 20000018 .word 0x20000018 800cf90: 20000024 .word 0x20000024 800cf94: 20000030 .word 0x20000030 800cf98: 2000003c .word 0x2000003c 800cf9c: 20000048 .word 0x20000048 0800cfa0 : void interpolateColors(RGB_t* color1, RGB_t* color2, uint16_t a, uint16_t b, RGB_t *result) { 800cfa0: b480 push {r7} 800cfa2: b087 sub sp, #28 800cfa4: af00 add r7, sp, #0 800cfa6: 60f8 str r0, [r7, #12] 800cfa8: 60b9 str r1, [r7, #8] 800cfaa: 4611 mov r1, r2 800cfac: 461a mov r2, r3 800cfae: 460b mov r3, r1 800cfb0: 80fb strh r3, [r7, #6] 800cfb2: 4613 mov r3, r2 800cfb4: 80bb strh r3, [r7, #4] // Проверяем, чтобы a не выходила за пределы диапазона if (a > b) a = b; 800cfb6: 88fa ldrh r2, [r7, #6] 800cfb8: 88bb ldrh r3, [r7, #4] 800cfba: 429a cmp r2, r3 800cfbc: d901 bls.n 800cfc2 800cfbe: 88bb ldrh r3, [r7, #4] 800cfc0: 80fb strh r3, [r7, #6] if(b==0) b = 1; 800cfc2: 88bb ldrh r3, [r7, #4] 800cfc4: 2b00 cmp r3, #0 800cfc6: d101 bne.n 800cfcc 800cfc8: 2301 movs r3, #1 800cfca: 80bb strh r3, [r7, #4] // Вычисляем коэффициент смешивания в виде целого числа uint16_t t = (a * 255) / b; // t будет от 0 до 255 800cfcc: 88fa ldrh r2, [r7, #6] 800cfce: 4613 mov r3, r2 800cfd0: 021b lsls r3, r3, #8 800cfd2: 1a9a subs r2, r3, r2 800cfd4: 88bb ldrh r3, [r7, #4] 800cfd6: fb92 f3f3 sdiv r3, r2, r3 800cfda: 82fb strh r3, [r7, #22] // Линейная интерполяция с использованием целых чисел result->R = (color1->R * (255 - t) + color2->R * t) / 255; 800cfdc: 68fb ldr r3, [r7, #12] 800cfde: 781b ldrb r3, [r3, #0] 800cfe0: 461a mov r2, r3 800cfe2: 8afb ldrh r3, [r7, #22] 800cfe4: f1c3 03ff rsb r3, r3, #255 @ 0xff 800cfe8: fb03 f202 mul.w r2, r3, r2 800cfec: 68bb ldr r3, [r7, #8] 800cfee: 781b ldrb r3, [r3, #0] 800cff0: 4619 mov r1, r3 800cff2: 8afb ldrh r3, [r7, #22] 800cff4: fb01 f303 mul.w r3, r1, r3 800cff8: 4413 add r3, r2 800cffa: 4a20 ldr r2, [pc, #128] @ (800d07c ) 800cffc: fb82 1203 smull r1, r2, r2, r3 800d000: 441a add r2, r3 800d002: 11d2 asrs r2, r2, #7 800d004: 17db asrs r3, r3, #31 800d006: 1ad3 subs r3, r2, r3 800d008: b2da uxtb r2, r3 800d00a: 6a3b ldr r3, [r7, #32] 800d00c: 701a strb r2, [r3, #0] result->G = (color1->G * (255 - t) + color2->G * t) / 255; 800d00e: 68fb ldr r3, [r7, #12] 800d010: 785b ldrb r3, [r3, #1] 800d012: 461a mov r2, r3 800d014: 8afb ldrh r3, [r7, #22] 800d016: f1c3 03ff rsb r3, r3, #255 @ 0xff 800d01a: fb03 f202 mul.w r2, r3, r2 800d01e: 68bb ldr r3, [r7, #8] 800d020: 785b ldrb r3, [r3, #1] 800d022: 4619 mov r1, r3 800d024: 8afb ldrh r3, [r7, #22] 800d026: fb01 f303 mul.w r3, r1, r3 800d02a: 4413 add r3, r2 800d02c: 4a13 ldr r2, [pc, #76] @ (800d07c ) 800d02e: fb82 1203 smull r1, r2, r2, r3 800d032: 441a add r2, r3 800d034: 11d2 asrs r2, r2, #7 800d036: 17db asrs r3, r3, #31 800d038: 1ad3 subs r3, r2, r3 800d03a: b2da uxtb r2, r3 800d03c: 6a3b ldr r3, [r7, #32] 800d03e: 705a strb r2, [r3, #1] result->B = (color1->B * (255 - t) + color2->B * t) / 255; 800d040: 68fb ldr r3, [r7, #12] 800d042: 789b ldrb r3, [r3, #2] 800d044: 461a mov r2, r3 800d046: 8afb ldrh r3, [r7, #22] 800d048: f1c3 03ff rsb r3, r3, #255 @ 0xff 800d04c: fb03 f202 mul.w r2, r3, r2 800d050: 68bb ldr r3, [r7, #8] 800d052: 789b ldrb r3, [r3, #2] 800d054: 4619 mov r1, r3 800d056: 8afb ldrh r3, [r7, #22] 800d058: fb01 f303 mul.w r3, r1, r3 800d05c: 4413 add r3, r2 800d05e: 4a07 ldr r2, [pc, #28] @ (800d07c ) 800d060: fb82 1203 smull r1, r2, r2, r3 800d064: 441a add r2, r3 800d066: 11d2 asrs r2, r2, #7 800d068: 17db asrs r3, r3, #31 800d06a: 1ad3 subs r3, r2, r3 800d06c: b2da uxtb r2, r3 800d06e: 6a3b ldr r3, [r7, #32] 800d070: 709a strb r2, [r3, #2] } 800d072: bf00 nop 800d074: 371c adds r7, #28 800d076: 46bd mov sp, r7 800d078: bc80 pop {r7} 800d07a: 4770 bx lr 800d07c: 80808081 .word 0x80808081 0800d080 : void RGB_SetColor(RGB_t *color){ 800d080: b480 push {r7} 800d082: b083 sub sp, #12 800d084: af00 add r7, sp, #0 800d086: 6078 str r0, [r7, #4] htim4.Instance->CCR2 = color->R * 100 / 255; 800d088: 687b ldr r3, [r7, #4] 800d08a: 781b ldrb r3, [r3, #0] 800d08c: 461a mov r2, r3 800d08e: 2364 movs r3, #100 @ 0x64 800d090: fb02 f303 mul.w r3, r2, r3 800d094: 4a17 ldr r2, [pc, #92] @ (800d0f4 ) 800d096: fb82 1203 smull r1, r2, r2, r3 800d09a: 441a add r2, r3 800d09c: 11d2 asrs r2, r2, #7 800d09e: 17db asrs r3, r3, #31 800d0a0: 1ad2 subs r2, r2, r3 800d0a2: 4b15 ldr r3, [pc, #84] @ (800d0f8 ) 800d0a4: 681b ldr r3, [r3, #0] 800d0a6: 639a str r2, [r3, #56] @ 0x38 htim4.Instance->CCR3 = color->G * 100 / 255; 800d0a8: 687b ldr r3, [r7, #4] 800d0aa: 785b ldrb r3, [r3, #1] 800d0ac: 461a mov r2, r3 800d0ae: 2364 movs r3, #100 @ 0x64 800d0b0: fb02 f303 mul.w r3, r2, r3 800d0b4: 4a0f ldr r2, [pc, #60] @ (800d0f4 ) 800d0b6: fb82 1203 smull r1, r2, r2, r3 800d0ba: 441a add r2, r3 800d0bc: 11d2 asrs r2, r2, #7 800d0be: 17db asrs r3, r3, #31 800d0c0: 1ad2 subs r2, r2, r3 800d0c2: 4b0d ldr r3, [pc, #52] @ (800d0f8 ) 800d0c4: 681b ldr r3, [r3, #0] 800d0c6: 63da str r2, [r3, #60] @ 0x3c htim4.Instance->CCR4 = color->B * 100 / 255; 800d0c8: 687b ldr r3, [r7, #4] 800d0ca: 789b ldrb r3, [r3, #2] 800d0cc: 461a mov r2, r3 800d0ce: 2364 movs r3, #100 @ 0x64 800d0d0: fb02 f303 mul.w r3, r2, r3 800d0d4: 4a07 ldr r2, [pc, #28] @ (800d0f4 ) 800d0d6: fb82 1203 smull r1, r2, r2, r3 800d0da: 441a add r2, r3 800d0dc: 11d2 asrs r2, r2, #7 800d0de: 17db asrs r3, r3, #31 800d0e0: 1ad2 subs r2, r2, r3 800d0e2: 4b05 ldr r3, [pc, #20] @ (800d0f8 ) 800d0e4: 681b ldr r3, [r3, #0] 800d0e6: 641a str r2, [r3, #64] @ 0x40 } 800d0e8: bf00 nop 800d0ea: 370c adds r7, #12 800d0ec: 46bd mov sp, r7 800d0ee: bc80 pop {r7} 800d0f0: 4770 bx lr 800d0f2: bf00 nop 800d0f4: 80808081 .word 0x80808081 800d0f8: 20000f1c .word 0x20000f1c 0800d0fc : void LED_SetColor(RGB_Cycle_t *color){ 800d0fc: b480 push {r7} 800d0fe: b083 sub sp, #12 800d100: af00 add r7, sp, #0 800d102: 6078 str r0, [r7, #4] memcpy(&LED_Cycle, color, sizeof(RGB_Cycle_t)); 800d104: 4b05 ldr r3, [pc, #20] @ (800d11c ) 800d106: 687a ldr r2, [r7, #4] 800d108: 6810 ldr r0, [r2, #0] 800d10a: 6851 ldr r1, [r2, #4] 800d10c: c303 stmia r3!, {r0, r1} 800d10e: 8912 ldrh r2, [r2, #8] 800d110: 801a strh r2, [r3, #0] } 800d112: bf00 nop 800d114: 370c adds r7, #12 800d116: 46bd mov sp, r7 800d118: bc80 pop {r7} 800d11a: 4770 bx lr 800d11c: 20000a6c .word 0x20000a6c 0800d120 : void LED_Init(){ 800d120: b580 push {r7, lr} 800d122: b082 sub sp, #8 800d124: af00 add r7, sp, #0 RGB_t color = {.R=0, .G=0, .B=0}; 800d126: 2300 movs r3, #0 800d128: 713b strb r3, [r7, #4] 800d12a: 2300 movs r3, #0 800d12c: 717b strb r3, [r7, #5] 800d12e: 2300 movs r3, #0 800d130: 71bb strb r3, [r7, #6] HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_2); 800d132: 2104 movs r1, #4 800d134: 4809 ldr r0, [pc, #36] @ (800d15c ) 800d136: f004 fde1 bl 8011cfc HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); 800d13a: 2108 movs r1, #8 800d13c: 4807 ldr r0, [pc, #28] @ (800d15c ) 800d13e: f004 fddd bl 8011cfc HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_4); 800d142: 210c movs r1, #12 800d144: 4805 ldr r0, [pc, #20] @ (800d15c ) 800d146: f004 fdd9 bl 8011cfc RGB_SetColor(&color); 800d14a: 1d3b adds r3, r7, #4 800d14c: 4618 mov r0, r3 800d14e: f7ff ff97 bl 800d080 } 800d152: bf00 nop 800d154: 3708 adds r7, #8 800d156: 46bd mov sp, r7 800d158: bd80 pop {r7, pc} 800d15a: bf00 nop 800d15c: 20000f1c .word 0x20000f1c 0800d160 : // } // } // } // } void LED_Task(){ 800d160: b580 push {r7, lr} 800d162: b082 sub sp, #8 800d164: af02 add r7, sp, #8 static uint32_t led_tick; if((HAL_GetTick() - led_tick) > 20){ 800d166: f001 fb8d bl 800e884 800d16a: 4602 mov r2, r0 800d16c: 4b46 ldr r3, [pc, #280] @ (800d288 ) 800d16e: 681b ldr r3, [r3, #0] 800d170: 1ad3 subs r3, r2, r3 800d172: 2b14 cmp r3, #20 800d174: f240 8085 bls.w 800d282 led_tick = HAL_GetTick(); 800d178: f001 fb84 bl 800e884 800d17c: 4603 mov r3, r0 800d17e: 4a42 ldr r2, [pc, #264] @ (800d288 ) 800d180: 6013 str r3, [r2, #0] LED_State.tick++; 800d182: 4b42 ldr r3, [pc, #264] @ (800d28c ) 800d184: 885b ldrh r3, [r3, #2] 800d186: 3301 adds r3, #1 800d188: b29a uxth r2, r3 800d18a: 4b40 ldr r3, [pc, #256] @ (800d28c ) 800d18c: 805a strh r2, [r3, #2] // LED_PhaseSync(led_n); switch(LED_State.state){ 800d18e: 4b3f ldr r3, [pc, #252] @ (800d28c ) 800d190: 781b ldrb r3, [r3, #0] 800d192: 2b03 cmp r3, #3 800d194: d867 bhi.n 800d266 800d196: a201 add r2, pc, #4 @ (adr r2, 800d19c ) 800d198: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d19c: 0800d1ad .word 0x0800d1ad 800d1a0: 0800d1df .word 0x0800d1df 800d1a4: 0800d20b .word 0x0800d20b 800d1a8: 0800d23d .word 0x0800d23d case LED_RISING: interpolateColors(&LED_Cycle.Color2, &LED_Cycle.Color1, LED_State.tick, LED_Cycle.Tr, &LED_State.color); 800d1ac: 4b37 ldr r3, [pc, #220] @ (800d28c ) 800d1ae: 885a ldrh r2, [r3, #2] 800d1b0: 4b37 ldr r3, [pc, #220] @ (800d290 ) 800d1b2: 78db ldrb r3, [r3, #3] 800d1b4: 4619 mov r1, r3 800d1b6: 4b37 ldr r3, [pc, #220] @ (800d294 ) 800d1b8: 9300 str r3, [sp, #0] 800d1ba: 460b mov r3, r1 800d1bc: 4934 ldr r1, [pc, #208] @ (800d290 ) 800d1be: 4836 ldr r0, [pc, #216] @ (800d298 ) 800d1c0: f7ff feee bl 800cfa0 if(LED_State.tick>LED_Cycle.Tr){ 800d1c4: 4b31 ldr r3, [pc, #196] @ (800d28c ) 800d1c6: 885b ldrh r3, [r3, #2] 800d1c8: 4a31 ldr r2, [pc, #196] @ (800d290 ) 800d1ca: 78d2 ldrb r2, [r2, #3] 800d1cc: 4293 cmp r3, r2 800d1ce: d94e bls.n 800d26e LED_State.state = LED_HIGH; 800d1d0: 4b2e ldr r3, [pc, #184] @ (800d28c ) 800d1d2: 2201 movs r2, #1 800d1d4: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d1d6: 4b2d ldr r3, [pc, #180] @ (800d28c ) 800d1d8: 2200 movs r2, #0 800d1da: 805a strh r2, [r3, #2] } break; 800d1dc: e047 b.n 800d26e case LED_HIGH: memcpy(&LED_State.color, &LED_Cycle.Color1, sizeof(RGB_t)); 800d1de: 4b2b ldr r3, [pc, #172] @ (800d28c ) 800d1e0: 4a2b ldr r2, [pc, #172] @ (800d290 ) 800d1e2: 3304 adds r3, #4 800d1e4: 6812 ldr r2, [r2, #0] 800d1e6: 4611 mov r1, r2 800d1e8: 8019 strh r1, [r3, #0] 800d1ea: 3302 adds r3, #2 800d1ec: 0c12 lsrs r2, r2, #16 800d1ee: 701a strb r2, [r3, #0] if(LED_State.tick>LED_Cycle.Th){ 800d1f0: 4b26 ldr r3, [pc, #152] @ (800d28c ) 800d1f2: 885b ldrh r3, [r3, #2] 800d1f4: 4a26 ldr r2, [pc, #152] @ (800d290 ) 800d1f6: 7912 ldrb r2, [r2, #4] 800d1f8: 4293 cmp r3, r2 800d1fa: d93a bls.n 800d272 LED_State.state = LED_FALLING; 800d1fc: 4b23 ldr r3, [pc, #140] @ (800d28c ) 800d1fe: 2202 movs r2, #2 800d200: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d202: 4b22 ldr r3, [pc, #136] @ (800d28c ) 800d204: 2200 movs r2, #0 800d206: 805a strh r2, [r3, #2] } break; 800d208: e033 b.n 800d272 case LED_FALLING: interpolateColors(&LED_Cycle.Color1, &LED_Cycle.Color2, LED_State.tick, LED_Cycle.Tf, &LED_State.color); 800d20a: 4b20 ldr r3, [pc, #128] @ (800d28c ) 800d20c: 885a ldrh r2, [r3, #2] 800d20e: 4b20 ldr r3, [pc, #128] @ (800d290 ) 800d210: 795b ldrb r3, [r3, #5] 800d212: 4619 mov r1, r3 800d214: 4b1f ldr r3, [pc, #124] @ (800d294 ) 800d216: 9300 str r3, [sp, #0] 800d218: 460b mov r3, r1 800d21a: 491f ldr r1, [pc, #124] @ (800d298 ) 800d21c: 481c ldr r0, [pc, #112] @ (800d290 ) 800d21e: f7ff febf bl 800cfa0 if(LED_State.tick>LED_Cycle.Tf){ 800d222: 4b1a ldr r3, [pc, #104] @ (800d28c ) 800d224: 885b ldrh r3, [r3, #2] 800d226: 4a1a ldr r2, [pc, #104] @ (800d290 ) 800d228: 7952 ldrb r2, [r2, #5] 800d22a: 4293 cmp r3, r2 800d22c: d923 bls.n 800d276 LED_State.state = LED_LOW; 800d22e: 4b17 ldr r3, [pc, #92] @ (800d28c ) 800d230: 2203 movs r2, #3 800d232: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d234: 4b15 ldr r3, [pc, #84] @ (800d28c ) 800d236: 2200 movs r2, #0 800d238: 805a strh r2, [r3, #2] } break; 800d23a: e01c b.n 800d276 case LED_LOW: memcpy(&LED_State.color, &LED_Cycle.Color2, sizeof(RGB_t)); 800d23c: 4b13 ldr r3, [pc, #76] @ (800d28c ) 800d23e: 4a14 ldr r2, [pc, #80] @ (800d290 ) 800d240: 3304 adds r3, #4 800d242: 3207 adds r2, #7 800d244: 8811 ldrh r1, [r2, #0] 800d246: 7892 ldrb r2, [r2, #2] 800d248: 8019 strh r1, [r3, #0] 800d24a: 709a strb r2, [r3, #2] if(LED_State.tick>LED_Cycle.Tl){ 800d24c: 4b0f ldr r3, [pc, #60] @ (800d28c ) 800d24e: 885b ldrh r3, [r3, #2] 800d250: 4a0f ldr r2, [pc, #60] @ (800d290 ) 800d252: 7992 ldrb r2, [r2, #6] 800d254: 4293 cmp r3, r2 800d256: d910 bls.n 800d27a LED_State.state = LED_RISING; 800d258: 4b0c ldr r3, [pc, #48] @ (800d28c ) 800d25a: 2200 movs r2, #0 800d25c: 701a strb r2, [r3, #0] LED_State.tick = 0; 800d25e: 4b0b ldr r3, [pc, #44] @ (800d28c ) 800d260: 2200 movs r2, #0 800d262: 805a strh r2, [r3, #2] } break; 800d264: e009 b.n 800d27a default: LED_State.state = LED_RISING; 800d266: 4b09 ldr r3, [pc, #36] @ (800d28c ) 800d268: 2200 movs r2, #0 800d26a: 701a strb r2, [r3, #0] 800d26c: e006 b.n 800d27c break; 800d26e: bf00 nop 800d270: e004 b.n 800d27c break; 800d272: bf00 nop 800d274: e002 b.n 800d27c break; 800d276: bf00 nop 800d278: e000 b.n 800d27c break; 800d27a: bf00 nop } RGB_SetColor(&LED_State.color); 800d27c: 4805 ldr r0, [pc, #20] @ (800d294 ) 800d27e: f7ff feff bl 800d080 } } 800d282: bf00 nop 800d284: 46bd mov sp, r7 800d286: bd80 pop {r7, pc} 800d288: 20000a78 .word 0x20000a78 800d28c: 20000a64 .word 0x20000a64 800d290: 20000a6c .word 0x20000a6c 800d294: 20000a68 .word 0x20000a68 800d298: 20000a73 .word 0x20000a73 0800d29c : RTC_HandleTypeDef hrtc; /* RTC init function */ void MX_RTC_Init(void) { 800d29c: b580 push {r7, lr} 800d29e: af00 add r7, sp, #0 /* USER CODE END RTC_Init 1 */ /** Initialize RTC Only */ hrtc.Instance = RTC; 800d2a0: 4b0a ldr r3, [pc, #40] @ (800d2cc ) 800d2a2: 4a0b ldr r2, [pc, #44] @ (800d2d0 ) 800d2a4: 601a str r2, [r3, #0] hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND; 800d2a6: 4b09 ldr r3, [pc, #36] @ (800d2cc ) 800d2a8: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800d2ac: 605a str r2, [r3, #4] hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM; 800d2ae: 4b07 ldr r3, [pc, #28] @ (800d2cc ) 800d2b0: f44f 7280 mov.w r2, #256 @ 0x100 800d2b4: 609a str r2, [r3, #8] if (HAL_RTC_Init(&hrtc) != HAL_OK) 800d2b6: 4805 ldr r0, [pc, #20] @ (800d2cc ) 800d2b8: f004 fb70 bl 801199c 800d2bc: 4603 mov r3, r0 800d2be: 2b00 cmp r3, #0 800d2c0: d001 beq.n 800d2c6 { Error_Handler(); 800d2c2: f7ff f869 bl 800c398 } /* USER CODE BEGIN RTC_Init 2 */ /* USER CODE END RTC_Init 2 */ } 800d2c6: bf00 nop 800d2c8: bd80 pop {r7, pc} 800d2ca: bf00 nop 800d2cc: 20000a7c .word 0x20000a7c 800d2d0: 40002800 .word 0x40002800 0800d2d4 : void HAL_RTC_MspInit(RTC_HandleTypeDef* rtcHandle) { 800d2d4: b580 push {r7, lr} 800d2d6: b084 sub sp, #16 800d2d8: af00 add r7, sp, #0 800d2da: 6078 str r0, [r7, #4] if(rtcHandle->Instance==RTC) 800d2dc: 687b ldr r3, [r7, #4] 800d2de: 681b ldr r3, [r3, #0] 800d2e0: 4a0b ldr r2, [pc, #44] @ (800d310 ) 800d2e2: 4293 cmp r3, r2 800d2e4: d110 bne.n 800d308 { /* USER CODE BEGIN RTC_MspInit 0 */ /* USER CODE END RTC_MspInit 0 */ HAL_PWR_EnableBkUpAccess(); 800d2e6: f003 faed bl 80108c4 /* Enable BKP CLK enable for backup registers */ __HAL_RCC_BKP_CLK_ENABLE(); 800d2ea: 4b0a ldr r3, [pc, #40] @ (800d314 ) 800d2ec: 69db ldr r3, [r3, #28] 800d2ee: 4a09 ldr r2, [pc, #36] @ (800d314 ) 800d2f0: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 800d2f4: 61d3 str r3, [r2, #28] 800d2f6: 4b07 ldr r3, [pc, #28] @ (800d314 ) 800d2f8: 69db ldr r3, [r3, #28] 800d2fa: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 800d2fe: 60fb str r3, [r7, #12] 800d300: 68fb ldr r3, [r7, #12] /* RTC clock enable */ __HAL_RCC_RTC_ENABLE(); 800d302: 4b05 ldr r3, [pc, #20] @ (800d318 ) 800d304: 2201 movs r2, #1 800d306: 601a str r2, [r3, #0] /* USER CODE BEGIN RTC_MspInit 1 */ /* USER CODE END RTC_MspInit 1 */ } } 800d308: bf00 nop 800d30a: 3710 adds r7, #16 800d30c: 46bd mov sp, r7 800d30e: bd80 pop {r7, pc} 800d310: 40002800 .word 0x40002800 800d314: 40021000 .word 0x40021000 800d318: 4242043c .word 0x4242043c 0800d31c : .fw_version_major = 0, .fw_version_minor = 0, .fw_version_patch = 0, }; void ReadVersion(){ 800d31c: b480 push {r7} 800d31e: af00 add r7, sp, #0 infoPacket.serialNumber = InfoBlock->serialNumber; 800d320: 4b0e ldr r3, [pc, #56] @ (800d35c ) 800d322: 681b ldr r3, [r3, #0] 800d324: 681b ldr r3, [r3, #0] 800d326: b29a uxth r2, r3 800d328: 4b0d ldr r3, [pc, #52] @ (800d360 ) 800d32a: 801a strh r2, [r3, #0] infoPacket.boardVersion = InfoBlock->boardVersion; 800d32c: 4b0b ldr r3, [pc, #44] @ (800d35c ) 800d32e: 681b ldr r3, [r3, #0] 800d330: 795a ldrb r2, [r3, #5] 800d332: 4b0b ldr r3, [pc, #44] @ (800d360 ) 800d334: 709a strb r2, [r3, #2] infoPacket.stationType = InfoBlock->stationType; 800d336: 4b09 ldr r3, [pc, #36] @ (800d35c ) 800d338: 681b ldr r3, [r3, #0] 800d33a: 791a ldrb r2, [r3, #4] 800d33c: 4b08 ldr r3, [pc, #32] @ (800d360 ) 800d33e: 70da strb r2, [r3, #3] infoPacket.fw_version_major = FW_VERSION_MAJOR; 800d340: 4b07 ldr r3, [pc, #28] @ (800d360 ) 800d342: 2201 movs r2, #1 800d344: 809a strh r2, [r3, #4] infoPacket.fw_version_minor = FW_VERSION_MINOR; 800d346: 4b06 ldr r3, [pc, #24] @ (800d360 ) 800d348: 2200 movs r2, #0 800d34a: 80da strh r2, [r3, #6] infoPacket.fw_version_patch = FW_VERSION_PATCH; 800d34c: 4b04 ldr r3, [pc, #16] @ (800d360 ) 800d34e: 2201 movs r2, #1 800d350: 811a strh r2, [r3, #8] } 800d352: bf00 nop 800d354: 46bd mov sp, r7 800d356: bc80 pop {r7} 800d358: 4770 bx lr 800d35a: bf00 nop 800d35c: 20000000 .word 0x20000000 800d360: 20000f0c .word 0x20000f0c 0800d364 : // Внешняя функция обработки команд (определена в serial_handler.c) extern void SC_CommandHandler(ReceivedCommand_t* cmd); void SC_Init() { 800d364: b580 push {r7, lr} 800d366: af00 add r7, sp, #0 // Обнуляем структуру memset(&serial_control, 0, sizeof(SerialControl_t)); 800d368: f44f 7204 mov.w r2, #528 @ 0x210 800d36c: 2100 movs r1, #0 800d36e: 4805 ldr r0, [pc, #20] @ (800d384 ) 800d370: f006 fee8 bl 8014144 memset(&serial_iso, 0, sizeof(serial_iso)); 800d374: f44f 7204 mov.w r2, #528 @ 0x210 800d378: 2100 movs r1, #0 800d37a: 4803 ldr r0, [pc, #12] @ (800d388 ) 800d37c: f006 fee2 bl 8014144 } 800d380: bf00 nop 800d382: bd80 pop {r7, pc} 800d384: 20000a90 .word 0x20000a90 800d388: 20000ca0 .word 0x20000ca0 0800d38c : void SC_Task() { 800d38c: b580 push {r7, lr} 800d38e: af00 add r7, sp, #0 // Запуск приема в режиме прерывания с ожиданием idle if((huart2.RxState == HAL_UART_STATE_READY) && (serial_control.command_ready == 0)) HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d390: 4b2a ldr r3, [pc, #168] @ (800d43c ) 800d392: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800d396: b2db uxtb r3, r3 800d398: 2b20 cmp r3, #32 800d39a: d10a bne.n 800d3b2 800d39c: 4b28 ldr r3, [pc, #160] @ (800d440 ) 800d39e: f893 3208 ldrb.w r3, [r3, #520] @ 0x208 800d3a2: b2db uxtb r3, r3 800d3a4: 2b00 cmp r3, #0 800d3a6: d104 bne.n 800d3b2 800d3a8: 22ff movs r2, #255 @ 0xff 800d3aa: 4926 ldr r1, [pc, #152] @ (800d444 ) 800d3ac: 4823 ldr r0, [pc, #140] @ (800d43c ) 800d3ae: f005 fa7e bl 80128ae if((huart5.RxState == HAL_UART_STATE_READY)) HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d3b2: 4b25 ldr r3, [pc, #148] @ (800d448 ) 800d3b4: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800d3b8: b2db uxtb r3, r3 800d3ba: 2b20 cmp r3, #32 800d3bc: d104 bne.n 800d3c8 800d3be: 22ff movs r2, #255 @ 0xff 800d3c0: 4922 ldr r1, [pc, #136] @ (800d44c ) 800d3c2: 4821 ldr r0, [pc, #132] @ (800d448 ) 800d3c4: f005 fa73 bl 80128ae // Проверка таймаута отправки пакета (больше 100 мс) if (huart2.gState == HAL_UART_STATE_BUSY_TX && serial_control.tx_tick != 0) { 800d3c8: 4b1c ldr r3, [pc, #112] @ (800d43c ) 800d3ca: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d3ce: b2db uxtb r3, r3 800d3d0: 2b21 cmp r3, #33 @ 0x21 800d3d2: d119 bne.n 800d408 800d3d4: 4b1a ldr r3, [pc, #104] @ (800d440 ) 800d3d6: f8d3 320c ldr.w r3, [r3, #524] @ 0x20c 800d3da: 2b00 cmp r3, #0 800d3dc: d014 beq.n 800d408 if ((HAL_GetTick() - serial_control.tx_tick) > 100) { 800d3de: f001 fa51 bl 800e884 800d3e2: 4602 mov r2, r0 800d3e4: 4b16 ldr r3, [pc, #88] @ (800d440 ) 800d3e6: f8d3 320c ldr.w r3, [r3, #524] @ 0x20c 800d3ea: 1ad3 subs r3, r2, r3 800d3ec: 2b64 cmp r3, #100 @ 0x64 800d3ee: d90b bls.n 800d408 // Таймаут: принудительно сбрасываем передачу HAL_UART_Abort_IT(&huart2); 800d3f0: 4812 ldr r0, [pc, #72] @ (800d43c ) 800d3f2: f005 fab9 bl 8012968 // Выключаем DIR при сбросе передачи HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 800d3f6: 2200 movs r2, #0 800d3f8: 2110 movs r1, #16 800d3fa: 4815 ldr r0, [pc, #84] @ (800d450 ) 800d3fc: f003 fa49 bl 8010892 serial_control.tx_tick = 0; // Сбрасываем tick 800d400: 4b0f ldr r3, [pc, #60] @ (800d440 ) 800d402: 2200 movs r2, #0 800d404: f8c3 220c str.w r2, [r3, #524] @ 0x20c } } // Проверка наличия принятой команды для обработки if (serial_control.command_ready && (huart2.gState != HAL_UART_STATE_BUSY_TX)) { 800d408: 4b0d ldr r3, [pc, #52] @ (800d440 ) 800d40a: f893 3208 ldrb.w r3, [r3, #520] @ 0x208 800d40e: b2db uxtb r3, r3 800d410: 2b00 cmp r3, #0 800d412: d011 beq.n 800d438 800d414: 4b09 ldr r3, [pc, #36] @ (800d43c ) 800d416: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d41a: b2db uxtb r3, r3 800d41c: 2b21 cmp r3, #33 @ 0x21 800d41e: d00b beq.n 800d438 // HAL_Delay(2); SC_CommandHandler(&serial_control.received_command); 800d420: 480c ldr r0, [pc, #48] @ (800d454 ) 800d422: f000 f9df bl 800d7e4 HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d426: 22ff movs r2, #255 @ 0xff 800d428: 4906 ldr r1, [pc, #24] @ (800d444 ) 800d42a: 4804 ldr r0, [pc, #16] @ (800d43c ) 800d42c: f005 fa3f bl 80128ae serial_control.command_ready = 0; // Сбрасываем флаг 800d430: 4b03 ldr r3, [pc, #12] @ (800d440 ) 800d432: 2200 movs r2, #0 800d434: f883 2208 strb.w r2, [r3, #520] @ 0x208 } } 800d438: bf00 nop 800d43a: bd80 pop {r7, pc} 800d43c: 20000ff4 .word 0x20000ff4 800d440: 20000a90 .word 0x20000a90 800d444: 20000b90 .word 0x20000b90 800d448: 20000f64 .word 0x20000f64 800d44c: 20000da0 .word 0x20000da0 800d450: 40011400 .word 0x40011400 800d454: 20000c90 .word 0x20000c90 0800d458 : void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { 800d458: b580 push {r7, lr} 800d45a: b082 sub sp, #8 800d45c: af00 add r7, sp, #0 800d45e: 6078 str r0, [r7, #4] 800d460: 460b mov r3, r1 800d462: 807b strh r3, [r7, #2] if (huart->Instance == huart2.Instance) { 800d464: 687b ldr r3, [r7, #4] 800d466: 681a ldr r2, [r3, #0] 800d468: 4b1c ldr r3, [pc, #112] @ (800d4dc ) 800d46a: 681b ldr r3, [r3, #0] 800d46c: 429a cmp r2, r3 800d46e: d116 bne.n 800d49e if(!process_received_packet(&serial_control, serial_control.rx_buffer, Size)){ 800d470: 887b ldrh r3, [r7, #2] 800d472: 461a mov r2, r3 800d474: 491a ldr r1, [pc, #104] @ (800d4e0 ) 800d476: 481b ldr r0, [pc, #108] @ (800d4e4 ) 800d478: f000 f980 bl 800d77c 800d47c: 4603 mov r3, r0 800d47e: 2b00 cmp r3, #0 800d480: d104 bne.n 800d48c SC_SendPacket(NULL, 0, RESP_INVALID); 800d482: 2214 movs r2, #20 800d484: 2100 movs r1, #0 800d486: 2000 movs r0, #0 800d488: f000 f8ec bl 800d664 } g_sc_command_source = SC_SOURCE_UART2; 800d48c: 4b16 ldr r3, [pc, #88] @ (800d4e8 ) 800d48e: 2200 movs r2, #0 800d490: 701a strb r2, [r3, #0] HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d492: 22ff movs r2, #255 @ 0xff 800d494: 4912 ldr r1, [pc, #72] @ (800d4e0 ) 800d496: 4811 ldr r0, [pc, #68] @ (800d4dc ) 800d498: f005 fa09 bl 80128ae g_sc_command_source = SC_SOURCE_UART5; SC_CommandHandler((ReceivedCommand_t*)&serial_iso.received_command); } HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1); } } 800d49c: e019 b.n 800d4d2 } else if (huart->Instance == huart5.Instance) { 800d49e: 687b ldr r3, [r7, #4] 800d4a0: 681a ldr r2, [r3, #0] 800d4a2: 4b12 ldr r3, [pc, #72] @ (800d4ec ) 800d4a4: 681b ldr r3, [r3, #0] 800d4a6: 429a cmp r2, r3 800d4a8: d113 bne.n 800d4d2 if (process_received_packet(&serial_iso, serial_iso.rx_buffer, Size)) { 800d4aa: 887b ldrh r3, [r7, #2] 800d4ac: 461a mov r2, r3 800d4ae: 4910 ldr r1, [pc, #64] @ (800d4f0 ) 800d4b0: 4810 ldr r0, [pc, #64] @ (800d4f4 ) 800d4b2: f000 f963 bl 800d77c 800d4b6: 4603 mov r3, r0 800d4b8: 2b00 cmp r3, #0 800d4ba: d005 beq.n 800d4c8 g_sc_command_source = SC_SOURCE_UART5; 800d4bc: 4b0a ldr r3, [pc, #40] @ (800d4e8 ) 800d4be: 2201 movs r2, #1 800d4c0: 701a strb r2, [r3, #0] SC_CommandHandler((ReceivedCommand_t*)&serial_iso.received_command); 800d4c2: 480d ldr r0, [pc, #52] @ (800d4f8 ) 800d4c4: f000 f98e bl 800d7e4 HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1); 800d4c8: 22ff movs r2, #255 @ 0xff 800d4ca: 4909 ldr r1, [pc, #36] @ (800d4f0 ) 800d4cc: 4807 ldr r0, [pc, #28] @ (800d4ec ) 800d4ce: f005 f9ee bl 80128ae } 800d4d2: bf00 nop 800d4d4: 3708 adds r7, #8 800d4d6: 46bd mov sp, r7 800d4d8: bd80 pop {r7, pc} 800d4da: bf00 nop 800d4dc: 20000ff4 .word 0x20000ff4 800d4e0: 20000b90 .word 0x20000b90 800d4e4: 20000a90 .word 0x20000a90 800d4e8: 20000eb0 .word 0x20000eb0 800d4ec: 20000f64 .word 0x20000f64 800d4f0: 20000da0 .word 0x20000da0 800d4f4: 20000ca0 .word 0x20000ca0 800d4f8: 20000ea0 .word 0x20000ea0 0800d4fc : void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { 800d4fc: b580 push {r7, lr} 800d4fe: b082 sub sp, #8 800d500: af00 add r7, sp, #0 800d502: 6078 str r0, [r7, #4] if (huart->Instance == huart2.Instance) { 800d504: 687b ldr r3, [r7, #4] 800d506: 681a ldr r2, [r3, #0] 800d508: 4b08 ldr r3, [pc, #32] @ (800d52c ) 800d50a: 681b ldr r3, [r3, #0] 800d50c: 429a cmp r2, r3 800d50e: d108 bne.n 800d522 HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 800d510: 2200 movs r2, #0 800d512: 2110 movs r1, #16 800d514: 4806 ldr r0, [pc, #24] @ (800d530 ) 800d516: f003 f9bc bl 8010892 serial_control.tx_tick = 0; 800d51a: 4b06 ldr r3, [pc, #24] @ (800d534 ) 800d51c: 2200 movs r2, #0 800d51e: f8c3 220c str.w r2, [r3, #524] @ 0x20c } } 800d522: bf00 nop 800d524: 3708 adds r7, #8 800d526: 46bd mov sp, r7 800d528: bd80 pop {r7, pc} 800d52a: bf00 nop 800d52c: 20000ff4 .word 0x20000ff4 800d530: 40011400 .word 0x40011400 800d534: 20000a90 .word 0x20000a90 0800d538 : // Приватные функции реализации // Полностью программная реализация CRC-32 (полином CRC32_POLYNOMIAL, порядок little-endian) static uint32_t calculate_crc32(const uint8_t* data, uint16_t length) { 800d538: b480 push {r7} 800d53a: b085 sub sp, #20 800d53c: af00 add r7, sp, #0 800d53e: 6078 str r0, [r7, #4] 800d540: 460b mov r3, r1 800d542: 807b strh r3, [r7, #2] uint32_t crc = 0xFFFFFFFFu; 800d544: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800d548: 60fb str r3, [r7, #12] for (uint16_t i = 0; i < length; i++) { 800d54a: 2300 movs r3, #0 800d54c: 817b strh r3, [r7, #10] 800d54e: e021 b.n 800d594 crc ^= data[i]; 800d550: 897b ldrh r3, [r7, #10] 800d552: 687a ldr r2, [r7, #4] 800d554: 4413 add r3, r2 800d556: 781b ldrb r3, [r3, #0] 800d558: 461a mov r2, r3 800d55a: 68fb ldr r3, [r7, #12] 800d55c: 4053 eors r3, r2 800d55e: 60fb str r3, [r7, #12] for (uint8_t bit = 0; bit < 8; bit++) { 800d560: 2300 movs r3, #0 800d562: 727b strb r3, [r7, #9] 800d564: e010 b.n 800d588 if (crc & 0x1u) { 800d566: 68fb ldr r3, [r7, #12] 800d568: f003 0301 and.w r3, r3, #1 800d56c: 2b00 cmp r3, #0 800d56e: d005 beq.n 800d57c crc = (crc >> 1) ^ CRC32_POLYNOMIAL; 800d570: 68fb ldr r3, [r7, #12] 800d572: 085a lsrs r2, r3, #1 800d574: 4b0d ldr r3, [pc, #52] @ (800d5ac ) 800d576: 4053 eors r3, r2 800d578: 60fb str r3, [r7, #12] 800d57a: e002 b.n 800d582 } else { crc >>= 1; 800d57c: 68fb ldr r3, [r7, #12] 800d57e: 085b lsrs r3, r3, #1 800d580: 60fb str r3, [r7, #12] for (uint8_t bit = 0; bit < 8; bit++) { 800d582: 7a7b ldrb r3, [r7, #9] 800d584: 3301 adds r3, #1 800d586: 727b strb r3, [r7, #9] 800d588: 7a7b ldrb r3, [r7, #9] 800d58a: 2b07 cmp r3, #7 800d58c: d9eb bls.n 800d566 for (uint16_t i = 0; i < length; i++) { 800d58e: 897b ldrh r3, [r7, #10] 800d590: 3301 adds r3, #1 800d592: 817b strh r3, [r7, #10] 800d594: 897a ldrh r2, [r7, #10] 800d596: 887b ldrh r3, [r7, #2] 800d598: 429a cmp r2, r3 800d59a: d3d9 bcc.n 800d550 } } } return crc ^ 0xFFFFFFFFu; 800d59c: 68fb ldr r3, [r7, #12] 800d59e: 43db mvns r3, r3 } 800d5a0: 4618 mov r0, r3 800d5a2: 3714 adds r7, #20 800d5a4: 46bd mov sp, r7 800d5a6: bc80 pop {r7} 800d5a8: 4770 bx lr 800d5aa: bf00 nop 800d5ac: edb88320 .word 0xedb88320 0800d5b0 : static uint16_t encode_packet(const uint8_t* payload, uint16_t payload_len, uint8_t* output, uint8_t response_code) { 800d5b0: b580 push {r7, lr} 800d5b2: b088 sub sp, #32 800d5b4: af00 add r7, sp, #0 800d5b6: 60f8 str r0, [r7, #12] 800d5b8: 607a str r2, [r7, #4] 800d5ba: 461a mov r2, r3 800d5bc: 460b mov r3, r1 800d5be: 817b strh r3, [r7, #10] 800d5c0: 4613 mov r3, r2 800d5c2: 727b strb r3, [r7, #9] uint16_t out_index = 0; 800d5c4: 2300 movs r3, #0 800d5c6: 83fb strh r3, [r7, #30] output[out_index++] = response_code; 800d5c8: 8bfb ldrh r3, [r7, #30] 800d5ca: 1c5a adds r2, r3, #1 800d5cc: 83fa strh r2, [r7, #30] 800d5ce: 461a mov r2, r3 800d5d0: 687b ldr r3, [r7, #4] 800d5d2: 4413 add r3, r2 800d5d4: 7a7a ldrb r2, [r7, #9] 800d5d6: 701a strb r2, [r3, #0] if (payload != NULL) { 800d5d8: 68fb ldr r3, [r7, #12] 800d5da: 2b00 cmp r3, #0 800d5dc: d019 beq.n 800d612 // Просто копируем полезную нагрузку без какого‑либо экранирования for (uint16_t i = 0; i < payload_len; i++) { 800d5de: 2300 movs r3, #0 800d5e0: 83bb strh r3, [r7, #28] 800d5e2: e012 b.n 800d60a output[out_index++] = payload[i]; 800d5e4: 8bbb ldrh r3, [r7, #28] 800d5e6: 68fa ldr r2, [r7, #12] 800d5e8: 441a add r2, r3 800d5ea: 8bfb ldrh r3, [r7, #30] 800d5ec: 1c59 adds r1, r3, #1 800d5ee: 83f9 strh r1, [r7, #30] 800d5f0: 4619 mov r1, r3 800d5f2: 687b ldr r3, [r7, #4] 800d5f4: 440b add r3, r1 800d5f6: 7812 ldrb r2, [r2, #0] 800d5f8: 701a strb r2, [r3, #0] // Проверка переполнения if (out_index >= MAX_TX_BUFFER_SIZE - 5) { // 4 байта CRC + END_BYTE 800d5fa: 8bfb ldrh r3, [r7, #30] 800d5fc: 2bfa cmp r3, #250 @ 0xfa 800d5fe: d901 bls.n 800d604 return 0; 800d600: 2300 movs r3, #0 800d602: e02a b.n 800d65a for (uint16_t i = 0; i < payload_len; i++) { 800d604: 8bbb ldrh r3, [r7, #28] 800d606: 3301 adds r3, #1 800d608: 83bb strh r3, [r7, #28] 800d60a: 8bba ldrh r2, [r7, #28] 800d60c: 897b ldrh r3, [r7, #10] 800d60e: 429a cmp r2, r3 800d610: d3e8 bcc.n 800d5e4 } } } // Вычисляем CRC для всего содержимого (код ответа + полезная нагрузка) uint32_t crc = calculate_crc32(output, out_index); 800d612: 8bfb ldrh r3, [r7, #30] 800d614: 4619 mov r1, r3 800d616: 6878 ldr r0, [r7, #4] 800d618: f7ff ff8e bl 800d538 800d61c: 4603 mov r3, r0 800d61e: 613b str r3, [r7, #16] uint8_t* crc_bytes = (uint8_t*)&crc; 800d620: f107 0310 add.w r3, r7, #16 800d624: 617b str r3, [r7, #20] // Добавляем CRC без экранирования for (int i = 0; i < 4; i++) { 800d626: 2300 movs r3, #0 800d628: 61bb str r3, [r7, #24] 800d62a: e012 b.n 800d652 output[out_index++] = crc_bytes[i]; 800d62c: 69bb ldr r3, [r7, #24] 800d62e: 697a ldr r2, [r7, #20] 800d630: 441a add r2, r3 800d632: 8bfb ldrh r3, [r7, #30] 800d634: 1c59 adds r1, r3, #1 800d636: 83f9 strh r1, [r7, #30] 800d638: 4619 mov r1, r3 800d63a: 687b ldr r3, [r7, #4] 800d63c: 440b add r3, r1 800d63e: 7812 ldrb r2, [r2, #0] 800d640: 701a strb r2, [r3, #0] if (out_index >= MAX_TX_BUFFER_SIZE - 1) { // место для END_BYTE 800d642: 8bfb ldrh r3, [r7, #30] 800d644: 2bfe cmp r3, #254 @ 0xfe 800d646: d901 bls.n 800d64c return 0; 800d648: 2300 movs r3, #0 800d64a: e006 b.n 800d65a for (int i = 0; i < 4; i++) { 800d64c: 69bb ldr r3, [r7, #24] 800d64e: 3301 adds r3, #1 800d650: 61bb str r3, [r7, #24] 800d652: 69bb ldr r3, [r7, #24] 800d654: 2b03 cmp r3, #3 800d656: dde9 ble.n 800d62c } } return out_index; 800d658: 8bfb ldrh r3, [r7, #30] } 800d65a: 4618 mov r0, r3 800d65c: 3720 adds r7, #32 800d65e: 46bd mov sp, r7 800d660: bd80 pop {r7, pc} ... 0800d664 : void SC_SendPacket(const uint8_t* payload, uint16_t payload_len, uint8_t response_code) { 800d664: b580 push {r7, lr} 800d666: b084 sub sp, #16 800d668: af00 add r7, sp, #0 800d66a: 6078 str r0, [r7, #4] 800d66c: 460b mov r3, r1 800d66e: 807b strh r3, [r7, #2] 800d670: 4613 mov r3, r2 800d672: 707b strb r3, [r7, #1] uint16_t packet_len = encode_packet(payload, payload_len, serial_control.tx_buffer, response_code); 800d674: 787b ldrb r3, [r7, #1] 800d676: 8879 ldrh r1, [r7, #2] 800d678: 4a15 ldr r2, [pc, #84] @ (800d6d0 ) 800d67a: 6878 ldr r0, [r7, #4] 800d67c: f7ff ff98 bl 800d5b0 800d680: 4603 mov r3, r0 800d682: 81fb strh r3, [r7, #14] if (packet_len > 0) { 800d684: 89fb ldrh r3, [r7, #14] 800d686: 2b00 cmp r3, #0 800d688: d01e beq.n 800d6c8 if (huart2.gState == HAL_UART_STATE_BUSY_TX) { 800d68a: 4b12 ldr r3, [pc, #72] @ (800d6d4 ) 800d68c: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d690: b2db uxtb r3, r3 800d692: 2b21 cmp r3, #33 @ 0x21 800d694: d107 bne.n 800d6a6 HAL_UART_Abort_IT(&huart2); 800d696: 480f ldr r0, [pc, #60] @ (800d6d4 ) 800d698: f005 f966 bl 8012968 HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET); 800d69c: 2200 movs r2, #0 800d69e: 2110 movs r1, #16 800d6a0: 480d ldr r0, [pc, #52] @ (800d6d8 ) 800d6a2: f003 f8f6 bl 8010892 } HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_SET); 800d6a6: 2201 movs r2, #1 800d6a8: 2110 movs r1, #16 800d6aa: 480b ldr r0, [pc, #44] @ (800d6d8 ) 800d6ac: f003 f8f1 bl 8010892 HAL_UART_Transmit_IT(&huart2, serial_control.tx_buffer, packet_len); 800d6b0: 89fb ldrh r3, [r7, #14] 800d6b2: 461a mov r2, r3 800d6b4: 4906 ldr r1, [pc, #24] @ (800d6d0 ) 800d6b6: 4807 ldr r0, [pc, #28] @ (800d6d4 ) 800d6b8: f005 f8c4 bl 8012844 serial_control.tx_tick = HAL_GetTick(); 800d6bc: f001 f8e2 bl 800e884 800d6c0: 4603 mov r3, r0 800d6c2: 4a03 ldr r2, [pc, #12] @ (800d6d0 ) 800d6c4: f8c2 320c str.w r3, [r2, #524] @ 0x20c } } 800d6c8: bf00 nop 800d6ca: 3710 adds r7, #16 800d6cc: 46bd mov sp, r7 800d6ce: bd80 pop {r7, pc} 800d6d0: 20000a90 .word 0x20000a90 800d6d4: 20000ff4 .word 0x20000ff4 800d6d8: 40011400 .word 0x40011400 0800d6dc : static uint8_t parse_packet(const uint8_t* packet_data, uint16_t packet_len, ReceivedCommand_t* out_cmd) { 800d6dc: b580 push {r7, lr} 800d6de: b088 sub sp, #32 800d6e0: af00 add r7, sp, #0 800d6e2: 60f8 str r0, [r7, #12] 800d6e4: 460b mov r3, r1 800d6e6: 607a str r2, [r7, #4] 800d6e8: 817b strh r3, [r7, #10] // }else{ // test_crc_invalid = 5; // } // Минимальный размер: 1 байт команды + 4 байта CRC if (packet_len < 5) return 0; 800d6ea: 897b ldrh r3, [r7, #10] 800d6ec: 2b04 cmp r3, #4 800d6ee: d801 bhi.n 800d6f4 800d6f0: 2300 movs r3, #0 800d6f2: e03f b.n 800d774 if (packet_len > MAX_RX_BUFFER_SIZE) return 0; 800d6f4: 897b ldrh r3, [r7, #10] 800d6f6: f5b3 7f80 cmp.w r3, #256 @ 0x100 800d6fa: d901 bls.n 800d700 800d6fc: 2300 movs r3, #0 800d6fe: e039 b.n 800d774 uint16_t payload_length = packet_len - 4; 800d700: 897b ldrh r3, [r7, #10] 800d702: 3b04 subs r3, #4 800d704: 83fb strh r3, [r7, #30] // Извлекаем принятую CRC (последние 4 байта, little-endian) uint32_t received_checksum = ((uint32_t)packet_data[payload_length] << 0) | 800d706: 8bfb ldrh r3, [r7, #30] 800d708: 68fa ldr r2, [r7, #12] 800d70a: 4413 add r3, r2 800d70c: 781b ldrb r3, [r3, #0] 800d70e: 4619 mov r1, r3 ((uint32_t)packet_data[payload_length + 1] << 8) | 800d710: 8bfb ldrh r3, [r7, #30] 800d712: 3301 adds r3, #1 800d714: 68fa ldr r2, [r7, #12] 800d716: 4413 add r3, r2 800d718: 781b ldrb r3, [r3, #0] 800d71a: 021b lsls r3, r3, #8 ((uint32_t)packet_data[payload_length] << 0) | 800d71c: ea41 0203 orr.w r2, r1, r3 ((uint32_t)packet_data[payload_length + 2] << 16) | 800d720: 8bfb ldrh r3, [r7, #30] 800d722: 3302 adds r3, #2 800d724: 68f9 ldr r1, [r7, #12] 800d726: 440b add r3, r1 800d728: 781b ldrb r3, [r3, #0] 800d72a: 041b lsls r3, r3, #16 ((uint32_t)packet_data[payload_length + 1] << 8) | 800d72c: 431a orrs r2, r3 ((uint32_t)packet_data[payload_length + 3] << 24); 800d72e: 8bfb ldrh r3, [r7, #30] 800d730: 3303 adds r3, #3 800d732: 68f9 ldr r1, [r7, #12] 800d734: 440b add r3, r1 800d736: 781b ldrb r3, [r3, #0] 800d738: 061b lsls r3, r3, #24 uint32_t received_checksum = 800d73a: 4313 orrs r3, r2 800d73c: 61bb str r3, [r7, #24] // Вычисляем CRC для полезной нагрузки uint32_t calculated_checksum = calculate_crc32(packet_data, payload_length); 800d73e: 8bfb ldrh r3, [r7, #30] 800d740: 4619 mov r1, r3 800d742: 68f8 ldr r0, [r7, #12] 800d744: f7ff fef8 bl 800d538 800d748: 6178 str r0, [r7, #20] if (received_checksum != calculated_checksum) return 0; // CRC не совпадает 800d74a: 69ba ldr r2, [r7, #24] 800d74c: 697b ldr r3, [r7, #20] 800d74e: 429a cmp r2, r3 800d750: d001 beq.n 800d756 800d752: 2300 movs r3, #0 800d754: e00e b.n 800d774 out_cmd->argument = (void *)&packet_data[1]; 800d756: 68fb ldr r3, [r7, #12] 800d758: 1c5a adds r2, r3, #1 800d75a: 687b ldr r3, [r7, #4] 800d75c: 605a str r2, [r3, #4] out_cmd->command = packet_data[0]; 800d75e: 68fb ldr r3, [r7, #12] 800d760: 781a ldrb r2, [r3, #0] 800d762: 687b ldr r3, [r7, #4] 800d764: 701a strb r2, [r3, #0] out_cmd->argument_length = (uint8_t)(payload_length - 1); 800d766: 8bfb ldrh r3, [r7, #30] 800d768: b2db uxtb r3, r3 800d76a: 3b01 subs r3, #1 800d76c: b2da uxtb r2, r3 800d76e: 687b ldr r3, [r7, #4] 800d770: 705a strb r2, [r3, #1] return 1; 800d772: 2301 movs r3, #1 } 800d774: 4618 mov r0, r3 800d776: 3720 adds r7, #32 800d778: 46bd mov sp, r7 800d77a: bd80 pop {r7, pc} 0800d77c : static uint8_t process_received_packet(SerialControl_t *ctx, const uint8_t* packet_data, uint16_t packet_len) { 800d77c: b580 push {r7, lr} 800d77e: b084 sub sp, #16 800d780: af00 add r7, sp, #0 800d782: 60f8 str r0, [r7, #12] 800d784: 60b9 str r1, [r7, #8] 800d786: 4613 mov r3, r2 800d788: 80fb strh r3, [r7, #6] if (!parse_packet(packet_data, packet_len, (ReceivedCommand_t *)&ctx->received_command)) { 800d78a: 68fb ldr r3, [r7, #12] 800d78c: f503 7200 add.w r2, r3, #512 @ 0x200 800d790: 88fb ldrh r3, [r7, #6] 800d792: 4619 mov r1, r3 800d794: 68b8 ldr r0, [r7, #8] 800d796: f7ff ffa1 bl 800d6dc 800d79a: 4603 mov r3, r0 800d79c: 2b00 cmp r3, #0 800d79e: d101 bne.n 800d7a4 return 0; 800d7a0: 2300 movs r3, #0 800d7a2: e004 b.n 800d7ae } ctx->command_ready = 1; 800d7a4: 68fb ldr r3, [r7, #12] 800d7a6: 2201 movs r2, #1 800d7a8: f883 2208 strb.w r2, [r3, #520] @ 0x208 return 1; 800d7ac: 2301 movs r3, #1 } 800d7ae: 4618 mov r0, r3 800d7b0: 3710 adds r7, #16 800d7b2: 46bd mov sp, r7 800d7b4: bd80 pop {r7, pc} ... 0800d7b8 <__NVIC_SystemReset>: /** \brief System Reset \details Initiates a system reset request to reset the MCU. */ __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) { 800d7b8: b480 push {r7} 800d7ba: af00 add r7, sp, #0 \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __STATIC_FORCEINLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 800d7bc: f3bf 8f4f dsb sy } 800d7c0: bf00 nop __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 800d7c2: 4b06 ldr r3, [pc, #24] @ (800d7dc <__NVIC_SystemReset+0x24>) 800d7c4: 68db ldr r3, [r3, #12] 800d7c6: f403 62e0 and.w r2, r3, #1792 @ 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800d7ca: 4904 ldr r1, [pc, #16] @ (800d7dc <__NVIC_SystemReset+0x24>) 800d7cc: 4b04 ldr r3, [pc, #16] @ (800d7e0 <__NVIC_SystemReset+0x28>) 800d7ce: 4313 orrs r3, r2 800d7d0: 60cb str r3, [r1, #12] __ASM volatile ("dsb 0xF":::"memory"); 800d7d2: f3bf 8f4f dsb sy } 800d7d6: bf00 nop SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ __DSB(); /* Ensure completion of memory access */ for(;;) /* wait until reset */ { __NOP(); 800d7d8: bf00 nop 800d7da: e7fd b.n 800d7d8 <__NVIC_SystemReset+0x20> 800d7dc: e000ed00 .word 0xe000ed00 800d7e0: 05fa0004 .word 0x05fa0004 0800d7e4 : .chargerNumber = 00001, .unixTime = 1721651966, }; // Единая функция-обработчик всех команд со switch-case void SC_CommandHandler(ReceivedCommand_t* cmd) { 800d7e4: b580 push {r7, lr} 800d7e6: b084 sub sp, #16 800d7e8: af00 add r7, sp, #0 800d7ea: 6078 str r0, [r7, #4] uint8_t response_code = RESP_FAILED; 800d7ec: 2313 movs r3, #19 800d7ee: 73fb strb r3, [r7, #15] switch (cmd->command) { 800d7f0: 687b ldr r3, [r7, #4] 800d7f2: 781b ldrb r3, [r3, #0] 800d7f4: 2bc2 cmp r3, #194 @ 0xc2 800d7f6: f300 80cd bgt.w 800d994 800d7fa: 2bb0 cmp r3, #176 @ 0xb0 800d7fc: da0f bge.n 800d81e 800d7fe: 2b60 cmp r3, #96 @ 0x60 800d800: d042 beq.n 800d888 800d802: 2b60 cmp r3, #96 @ 0x60 800d804: f300 80c6 bgt.w 800d994 800d808: 2b50 cmp r3, #80 @ 0x50 800d80a: d043 beq.n 800d894 800d80c: 2b50 cmp r3, #80 @ 0x50 800d80e: f300 80c1 bgt.w 800d994 800d812: 2b01 cmp r3, #1 800d814: f000 80a7 beq.w 800d966 800d818: 2b40 cmp r3, #64 @ 0x40 800d81a: d02d beq.n 800d878 800d81c: e0ba b.n 800d994 800d81e: 3bb0 subs r3, #176 @ 0xb0 800d820: 2b12 cmp r3, #18 800d822: f200 80b7 bhi.w 800d994 800d826: a201 add r2, pc, #4 @ (adr r2, 800d82c ) 800d828: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d82c: 0800d89b .word 0x0800d89b 800d830: 0800d995 .word 0x0800d995 800d834: 0800d995 .word 0x0800d995 800d838: 0800d995 .word 0x0800d995 800d83c: 0800d995 .word 0x0800d995 800d840: 0800d94b .word 0x0800d94b 800d844: 0800d995 .word 0x0800d995 800d848: 0800d995 .word 0x0800d995 800d84c: 0800d995 .word 0x0800d995 800d850: 0800d995 .word 0x0800d995 800d854: 0800d995 .word 0x0800d995 800d858: 0800d995 .word 0x0800d995 800d85c: 0800d995 .word 0x0800d995 800d860: 0800d995 .word 0x0800d995 800d864: 0800d995 .word 0x0800d995 800d868: 0800d995 .word 0x0800d995 800d86c: 0800d8e1 .word 0x0800d8e1 800d870: 0800d945 .word 0x0800d945 800d874: 0800d919 .word 0x0800d919 // Команды БЕЗ аргументов case CMD_GET_STATUS: // Логика получения информации monitoring_data_callback(); 800d878: f000 f8b2 bl 800d9e0 // Отправляем с нормальным приоритетом SC_SendPacket((uint8_t*)&statusPacket, sizeof(statusPacket), CMD_GET_STATUS); 800d87c: 2240 movs r2, #64 @ 0x40 800d87e: 2158 movs r1, #88 @ 0x58 800d880: 484b ldr r0, [pc, #300] @ (800d9b0 ) 800d882: f7ff feef bl 800d664 return; // Специальный ответ уже отправлен 800d886: e090 b.n 800d9aa case CMD_GET_INFO: SC_SendPacket((uint8_t*)&infoPacket, sizeof(infoPacket), CMD_GET_INFO); 800d888: 2260 movs r2, #96 @ 0x60 800d88a: 210a movs r1, #10 800d88c: 4849 ldr r0, [pc, #292] @ (800d9b4 ) 800d88e: f7ff fee9 bl 800d664 return; 800d892: e08a b.n 800d9aa case CMD_GET_LOG: debug_buffer_send(); 800d894: f7fd fddc bl 800b450 return; // Ответ формируется внутри debug_buffer_send 800d898: e087 b.n 800d9aa // Команды С аргументами case CMD_SET_CONFIG: if (cmd->argument_length == sizeof(ConfigBlock_t)) { 800d89a: 687b ldr r3, [r7, #4] 800d89c: 785b ldrb r3, [r3, #1] 800d89e: 2b0b cmp r3, #11 800d8a0: d11b bne.n 800d8da memcpy(&config, cmd->argument, sizeof(ConfigBlock_t)); 800d8a2: 687b ldr r3, [r7, #4] 800d8a4: 685a ldr r2, [r3, #4] 800d8a6: 4b44 ldr r3, [pc, #272] @ (800d9b8 ) 800d8a8: 6810 ldr r0, [r2, #0] 800d8aa: 6851 ldr r1, [r2, #4] 800d8ac: c303 stmia r3!, {r0, r1} 800d8ae: 8911 ldrh r1, [r2, #8] 800d8b0: 7a92 ldrb r2, [r2, #10] 800d8b2: 8019 strh r1, [r3, #0] 800d8b4: 709a strb r2, [r3, #2] GBT_SetConfig(); 800d8b6: f7fc fa9b bl 8009df0 config_initialized = 1; 800d8ba: 4b40 ldr r3, [pc, #256] @ (800d9bc ) 800d8bc: 2201 movs r2, #1 800d8be: 701a strb r2, [r3, #0] GBT_SetConfig(); 800d8c0: f7fc fa96 bl 8009df0 // CONN.connState = CONN_Available; // log_printf(LOG_INFO, "Set Config: %s %d\n", config.location, config.chargerNumber); 800d8c4: 4b3c ldr r3, [pc, #240] @ (800d9b8 ) 800d8c6: f8d3 3003 ldr.w r3, [r3, #3] 800d8ca: 4a3b ldr r2, [pc, #236] @ (800d9b8 ) 800d8cc: 493c ldr r1, [pc, #240] @ (800d9c0 ) 800d8ce: 2007 movs r0, #7 800d8d0: f7fd fe20 bl 800b514 response_code = RESP_SUCCESS; 800d8d4: 2312 movs r3, #18 800d8d6: 73fb strb r3, [r7, #15] break; 800d8d8: e05f b.n 800d99a } response_code = RESP_FAILED; 800d8da: 2313 movs r3, #19 800d8dc: 73fb strb r3, [r7, #15] break; 800d8de: e05c b.n 800d99a case CMD_SET_POWER_LIMIT: if (cmd->argument_length == 1) { 800d8e0: 687b ldr r3, [r7, #4] 800d8e2: 785b ldrb r3, [r3, #1] 800d8e4: 2b01 cmp r3, #1 800d8e6: d114 bne.n 800d912 PSU0.power_limit = ((uint8_t*)cmd->argument)[0] * 1000; 800d8e8: 687b ldr r3, [r7, #4] 800d8ea: 685b ldr r3, [r3, #4] 800d8ec: 781b ldrb r3, [r3, #0] 800d8ee: 461a mov r2, r3 800d8f0: f44f 737a mov.w r3, #1000 @ 0x3e8 800d8f4: fb02 f303 mul.w r3, r2, r3 800d8f8: 461a mov r2, r3 800d8fa: 4b32 ldr r3, [pc, #200] @ (800d9c4 ) 800d8fc: 615a str r2, [r3, #20] log_printf(LOG_INFO, "Power limit: %d\n", PSU0.power_limit); 800d8fe: 4b31 ldr r3, [pc, #196] @ (800d9c4 ) 800d900: 695b ldr r3, [r3, #20] 800d902: 461a mov r2, r3 800d904: 4930 ldr r1, [pc, #192] @ (800d9c8 ) 800d906: 2007 movs r0, #7 800d908: f7fd fe04 bl 800b514 //CONN.connState = (((uint8_t*)cmd->argument)[0])/4; response_code = RESP_SUCCESS; 800d90c: 2312 movs r3, #18 800d90e: 73fb strb r3, [r7, #15] break; 800d910: e043 b.n 800d99a } response_code = RESP_FAILED; 800d912: 2313 movs r3, #19 800d914: 73fb strb r3, [r7, #15] break; 800d916: e040 b.n 800d99a case CMD_CHARGE_PERMIT: if (cmd->argument_length == 1) { 800d918: 687b ldr r3, [r7, #4] 800d91a: 785b ldrb r3, [r3, #1] 800d91c: 2b01 cmp r3, #1 800d91e: d10e bne.n 800d93e CONN.connControl = ((uint8_t*)cmd->argument)[0]; 800d920: 687b ldr r3, [r7, #4] 800d922: 685b ldr r3, [r3, #4] 800d924: 781a ldrb r2, [r3, #0] 800d926: 4b29 ldr r3, [pc, #164] @ (800d9cc ) 800d928: 701a strb r2, [r3, #0] log_printf(LOG_INFO, "Charge permit: %d\n", CONN.connControl); 800d92a: 4b28 ldr r3, [pc, #160] @ (800d9cc ) 800d92c: 781b ldrb r3, [r3, #0] 800d92e: 461a mov r2, r3 800d930: 4927 ldr r1, [pc, #156] @ (800d9d0 ) 800d932: 2007 movs r0, #7 800d934: f7fd fdee bl 800b514 response_code = RESP_SUCCESS; 800d938: 2312 movs r3, #18 800d93a: 73fb strb r3, [r7, #15] break; 800d93c: e02d b.n 800d99a } response_code = RESP_FAILED; 800d93e: 2313 movs r3, #19 800d940: 73fb strb r3, [r7, #15] break; 800d942: e02a b.n 800d99a // memcpy(&PSU_TestMode, cmd->argument, sizeof(PSU_TestMode_t)); // log_printf(LOG_INFO, "Test PSU: %d %d %d\n", PSU_TestMode.enable, PSU_TestMode.voltage, PSU_TestMode.current); // response_code = RESP_SUCCESS; // break; // } response_code = RESP_FAILED; 800d944: 2313 movs r3, #19 800d946: 73fb strb r3, [r7, #15] break; 800d948: e027 b.n 800d99a case CMD_DEVICE_RESET: // 2. Отправляем SUCCESS (хост может успеть получить его перед ребутом) SC_SendPacket(NULL, 0, RESP_SUCCESS); 800d94a: 2212 movs r2, #18 800d94c: 2100 movs r1, #0 800d94e: 2000 movs r0, #0 800d950: f7ff fe88 bl 800d664 while(huart2.gState == HAL_UART_STATE_BUSY_TX); // Ожидание завершения передачи 800d954: bf00 nop 800d956: 4b1f ldr r3, [pc, #124] @ (800d9d4 ) 800d958: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800d95c: b2db uxtb r3, r3 800d95e: 2b21 cmp r3, #33 @ 0x21 800d960: d0f9 beq.n 800d956 // 3. Выполняем программный сброс NVIC_SystemReset(); 800d962: f7ff ff29 bl 800d7b8 <__NVIC_SystemReset> return; // Сюда код уже не дойдет, но для компилятора нужно case CMD_ISOLATION_STATUS: if (cmd->argument_length == sizeof(IsolationStatusPacket_t)) { 800d966: 687b ldr r3, [r7, #4] 800d968: 785b ldrb r3, [r3, #1] 800d96a: 2b09 cmp r3, #9 800d96c: d10f bne.n 800d98e memcpy(&ISO, cmd->argument, sizeof(IsolationStatusPacket_t)); 800d96e: 687b ldr r3, [r7, #4] 800d970: 685a ldr r2, [r3, #4] 800d972: 4b19 ldr r3, [pc, #100] @ (800d9d8 ) 800d974: 6810 ldr r0, [r2, #0] 800d976: 6851 ldr r1, [r2, #4] 800d978: c303 stmia r3!, {r0, r1} 800d97a: 7a12 ldrb r2, [r2, #8] 800d97c: 701a strb r2, [r3, #0] // Для однонаправленного UART5 ответ не нужен if (g_sc_command_source == SC_SOURCE_UART5) { 800d97e: 4b17 ldr r3, [pc, #92] @ (800d9dc ) 800d980: 781b ldrb r3, [r3, #0] 800d982: b2db uxtb r3, r3 800d984: 2b01 cmp r3, #1 800d986: d00f beq.n 800d9a8 return; } response_code = RESP_SUCCESS; 800d988: 2312 movs r3, #18 800d98a: 73fb strb r3, [r7, #15] break; 800d98c: e005 b.n 800d99a } response_code = RESP_FAILED; 800d98e: 2313 movs r3, #19 800d990: 73fb strb r3, [r7, #15] break; 800d992: e002 b.n 800d99a default: // Неизвестная команда response_code = RESP_FAILED; 800d994: 2313 movs r3, #19 800d996: 73fb strb r3, [r7, #15] break; 800d998: bf00 nop } // Отправляем финальный ответ (для команд без собственного ответа) SC_SendPacket(NULL, 0, response_code); 800d99a: 7bfb ldrb r3, [r7, #15] 800d99c: 461a mov r2, r3 800d99e: 2100 movs r1, #0 800d9a0: 2000 movs r0, #0 800d9a2: f7ff fe5f bl 800d664 800d9a6: e000 b.n 800d9aa return; 800d9a8: bf00 nop } 800d9aa: 3710 adds r7, #16 800d9ac: 46bd mov sp, r7 800d9ae: bd80 pop {r7, pc} 800d9b0: 20000eb4 .word 0x20000eb4 800d9b4: 20000f0c .word 0x20000f0c 800d9b8: 2000006c .word 0x2000006c 800d9bc: 20000f16 .word 0x20000f16 800d9c0: 08016c80 .word 0x08016c80 800d9c4: 20000a0c .word 0x20000a0c 800d9c8: 08016c94 .word 0x08016c94 800d9cc: 200002f8 .word 0x200002f8 800d9d0: 08016ca8 .word 0x08016ca8 800d9d4: 20000ff4 .word 0x20000ff4 800d9d8: 20000060 .word 0x20000060 800d9dc: 20000eb0 .word 0x20000eb0 0800d9e0 : // Колбэк для заполнения данных мониторинга void monitoring_data_callback() { 800d9e0: b5b0 push {r4, r5, r7, lr} 800d9e2: af00 add r7, sp, #0 // Информация о зарядной сессии statusPacket.SOC = CONN.SOC; 800d9e4: 4b9d ldr r3, [pc, #628] @ (800dc5c ) 800d9e6: 789a ldrb r2, [r3, #2] 800d9e8: 4b9d ldr r3, [pc, #628] @ (800dc60 ) 800d9ea: 709a strb r2, [r3, #2] statusPacket.Energy = CONN.Energy; 800d9ec: 4b9b ldr r3, [pc, #620] @ (800dc5c ) 800d9ee: f8d3 3007 ldr.w r3, [r3, #7] 800d9f2: 4a9b ldr r2, [pc, #620] @ (800dc60 ) 800d9f4: f8c2 3003 str.w r3, [r2, #3] statusPacket.RequestedVoltage = CONN.RequestedVoltage; 800d9f8: 4b98 ldr r3, [pc, #608] @ (800dc5c ) 800d9fa: f8b3 300f ldrh.w r3, [r3, #15] 800d9fe: b29a uxth r2, r3 800da00: 4b97 ldr r3, [pc, #604] @ (800dc60 ) 800da02: f8a3 2007 strh.w r2, [r3, #7] statusPacket.RequestedCurrent = CONN.WantedCurrent; 800da06: 4b95 ldr r3, [pc, #596] @ (800dc5c ) 800da08: f8b3 301b ldrh.w r3, [r3, #27] 800da0c: b29a uxth r2, r3 800da0e: 4b94 ldr r3, [pc, #592] @ (800dc60 ) 800da10: f8a3 2009 strh.w r2, [r3, #9] statusPacket.MeasuredVoltage = CONN.MeasuredVoltage; 800da14: 4b91 ldr r3, [pc, #580] @ (800dc5c ) 800da16: f8b3 3013 ldrh.w r3, [r3, #19] 800da1a: b29a uxth r2, r3 800da1c: 4b90 ldr r3, [pc, #576] @ (800dc60 ) 800da1e: f8a3 200b strh.w r2, [r3, #11] statusPacket.MeasuredCurrent = CONN.MeasuredCurrent; 800da22: 4b8e ldr r3, [pc, #568] @ (800dc5c ) 800da24: f8b3 3015 ldrh.w r3, [r3, #21] 800da28: b29a uxth r2, r3 800da2a: 4b8d ldr r3, [pc, #564] @ (800dc60 ) 800da2c: f8a3 200d strh.w r2, [r3, #13] statusPacket.outputEnabled = CONN.outputEnabled; 800da30: 4b8a ldr r3, [pc, #552] @ (800dc5c ) 800da32: 7e1a ldrb r2, [r3, #24] 800da34: 4b8a ldr r3, [pc, #552] @ (800dc60 ) 800da36: 73da strb r2, [r3, #15] statusPacket.chargingError = CONN.chargingError; 800da38: 4b88 ldr r3, [pc, #544] @ (800dc5c ) 800da3a: 7f5a ldrb r2, [r3, #29] 800da3c: 4b88 ldr r3, [pc, #544] @ (800dc60 ) 800da3e: 705a strb r2, [r3, #1] statusPacket.connState = CONN.connState; 800da40: 4b86 ldr r3, [pc, #536] @ (800dc5c ) 800da42: 785a ldrb r2, [r3, #1] 800da44: 4b86 ldr r3, [pc, #536] @ (800dc60 ) 800da46: 701a strb r2, [r3, #0] statusPacket.chargingElapsedTimeMin = 0; 800da48: 4b85 ldr r3, [pc, #532] @ (800dc60 ) 800da4a: 2200 movs r2, #0 800da4c: 741a strb r2, [r3, #16] 800da4e: 2200 movs r2, #0 800da50: 745a strb r2, [r3, #17] statusPacket.chargingElapsedTimeSec = 0; 800da52: 4b83 ldr r3, [pc, #524] @ (800dc60 ) 800da54: 2200 movs r2, #0 800da56: 749a strb r2, [r3, #18] statusPacket.estimatedRemainingChargingTime = 0; 800da58: 4b81 ldr r3, [pc, #516] @ (800dc60 ) 800da5a: 2200 movs r2, #0 800da5c: 74da strb r2, [r3, #19] 800da5e: 2200 movs r2, #0 800da60: 751a strb r2, [r3, #20] // состояние зарядной станции statusPacket.relayAC = RELAY_Read(RELAY_AC); 800da62: 2004 movs r0, #4 800da64: f7fb fea6 bl 80097b4 800da68: 4603 mov r3, r0 800da6a: f003 0301 and.w r3, r3, #1 800da6e: b2d9 uxtb r1, r3 800da70: 4a7b ldr r2, [pc, #492] @ (800dc60 ) 800da72: 7d53 ldrb r3, [r2, #21] 800da74: f361 0300 bfi r3, r1, #0, #1 800da78: 7553 strb r3, [r2, #21] statusPacket.relayDC = RELAY_Read(RELAY_DC); 800da7a: 2003 movs r0, #3 800da7c: f7fb fe9a bl 80097b4 800da80: 4603 mov r3, r0 800da82: f003 0301 and.w r3, r3, #1 800da86: b2d9 uxtb r1, r3 800da88: 4a75 ldr r2, [pc, #468] @ (800dc60 ) 800da8a: 7d53 ldrb r3, [r2, #21] 800da8c: f361 0341 bfi r3, r1, #1, #1 800da90: 7553 strb r3, [r2, #21] statusPacket.relayAUX = RELAY_Read(RELAY_AUX0); 800da92: 2000 movs r0, #0 800da94: f7fb fe8e bl 80097b4 800da98: 4603 mov r3, r0 800da9a: f003 0301 and.w r3, r3, #1 800da9e: b2d9 uxtb r1, r3 800daa0: 4a6f ldr r2, [pc, #444] @ (800dc60 ) 800daa2: 7d53 ldrb r3, [r2, #21] 800daa4: f361 0382 bfi r3, r1, #2, #1 800daa8: 7553 strb r3, [r2, #21] statusPacket.lockState = GBT_LockGetState(); 800daaa: f7fe f9c1 bl 800be30 800daae: 4603 mov r3, r0 800dab0: f003 0301 and.w r3, r3, #1 800dab4: b2d9 uxtb r1, r3 800dab6: 4a6a ldr r2, [pc, #424] @ (800dc60 ) 800dab8: 7d53 ldrb r3, [r2, #21] 800daba: f361 03c3 bfi r3, r1, #3, #1 800dabe: 7553 strb r3, [r2, #21] statusPacket.stopButton = !IN_ReadInput(IN_ESTOP); 800dac0: 2003 movs r0, #3 800dac2: f7fb fe87 bl 80097d4 800dac6: 4603 mov r3, r0 800dac8: 2b00 cmp r3, #0 800daca: bf0c ite eq 800dacc: 2301 moveq r3, #1 800dace: 2300 movne r3, #0 800dad0: b2d9 uxtb r1, r3 800dad2: 4a63 ldr r2, [pc, #396] @ (800dc60 ) 800dad4: 7d53 ldrb r3, [r2, #21] 800dad6: f361 1304 bfi r3, r1, #4, #1 800dada: 7553 strb r3, [r2, #21] statusPacket.logAvailable = (debug_buffer_available()>0)?1:0; 800dadc: f7fd fca4 bl 800b428 800dae0: 4603 mov r3, r0 800dae2: 2b00 cmp r3, #0 800dae4: bf14 ite ne 800dae6: 2301 movne r3, #1 800dae8: 2300 moveq r3, #0 800daea: b2d9 uxtb r1, r3 800daec: 4a5c ldr r2, [pc, #368] @ (800dc60 ) 800daee: 7d53 ldrb r3, [r2, #21] 800daf0: f361 1345 bfi r3, r1, #5, #1 800daf4: 7553 strb r3, [r2, #21] statusPacket.evInfoAvailable = GBT_BAT_STAT_recv; 800daf6: 4b5b ldr r3, [pc, #364] @ (800dc64 ) 800daf8: 781b ldrb r3, [r3, #0] 800dafa: f003 0301 and.w r3, r3, #1 800dafe: b2d9 uxtb r1, r3 800db00: 4a57 ldr r2, [pc, #348] @ (800dc60 ) 800db02: 7d53 ldrb r3, [r2, #21] 800db04: f361 1386 bfi r3, r1, #6, #1 800db08: 7553 strb r3, [r2, #21] statusPacket.psuOnline = PSU0.online; 800db0a: 4b57 ldr r3, [pc, #348] @ (800dc68 ) 800db0c: 7a1b ldrb r3, [r3, #8] 800db0e: f003 0301 and.w r3, r3, #1 800db12: b2d9 uxtb r1, r3 800db14: 4a52 ldr r2, [pc, #328] @ (800dc60 ) 800db16: 7d53 ldrb r3, [r2, #21] 800db18: f361 13c7 bfi r3, r1, #7, #1 800db1c: 7553 strb r3, [r2, #21] statusPacket.tempConnector0 = GBT_ReadTemp(0); // температура коннектора 800db1e: 2000 movs r0, #0 800db20: f7fb ff3c bl 800999c 800db24: 4603 mov r3, r0 800db26: b25a sxtb r2, r3 800db28: 4b4d ldr r3, [pc, #308] @ (800dc60 ) 800db2a: 765a strb r2, [r3, #25] statusPacket.tempConnector1 = GBT_ReadTemp(1); 800db2c: 2001 movs r0, #1 800db2e: f7fb ff35 bl 800999c 800db32: 4603 mov r3, r0 800db34: b25a sxtb r2, r3 800db36: 4b4a ldr r3, [pc, #296] @ (800dc60 ) 800db38: 769a strb r2, [r3, #26] statusPacket.tempAmbient = PSU0.tempAmbient; // температура окружающего воздуха 800db3a: 4b4b ldr r3, [pc, #300] @ (800dc68 ) 800db3c: 69db ldr r3, [r3, #28] 800db3e: b25a sxtb r2, r3 800db40: 4b47 ldr r3, [pc, #284] @ (800dc60 ) 800db42: 76da strb r2, [r3, #27] statusPacket.tempBatteryMax = GBT_BatteryStatus.batteryHighestTemp; // максимальная температура батареи 800db44: 4b49 ldr r3, [pc, #292] @ (800dc6c ) 800db46: 785b ldrb r3, [r3, #1] 800db48: b25a sxtb r2, r3 800db4a: 4b45 ldr r3, [pc, #276] @ (800dc60 ) 800db4c: 771a strb r2, [r3, #28] statusPacket.tempBatteryMin = GBT_BatteryStatus.batteryLowestTemp; // минимальная температура батареи 800db4e: 4b47 ldr r3, [pc, #284] @ (800dc6c ) 800db50: 78db ldrb r3, [r3, #3] 800db52: b25a sxtb r2, r3 800db54: 4b42 ldr r3, [pc, #264] @ (800dc60 ) 800db56: 775a strb r2, [r3, #29] statusPacket.highestVoltageOfBatteryCell = GBT_ChargingStatus.highestVoltageOfBatteryCell; 800db58: 4b45 ldr r3, [pc, #276] @ (800dc70 ) 800db5a: 889b ldrh r3, [r3, #4] 800db5c: b29a uxth r2, r3 800db5e: 4b40 ldr r3, [pc, #256] @ (800dc60 ) 800db60: 83da strh r2, [r3, #30] statusPacket.batteryStatus = GBT_BatteryStatus.batteryStatus; 800db62: 4b42 ldr r3, [pc, #264] @ (800dc6c ) 800db64: 799a ldrb r2, [r3, #6] 800db66: 4b3e ldr r3, [pc, #248] @ (800dc60 ) 800db68: f883 2020 strb.w r2, [r3, #32] statusPacket.phaseVoltageAB = PSU_06.VAB; 800db6c: 4b41 ldr r3, [pc, #260] @ (800dc74 ) 800db6e: 689b ldr r3, [r3, #8] 800db70: b29a uxth r2, r3 800db72: 4b3b ldr r3, [pc, #236] @ (800dc60 ) 800db74: f8a3 2021 strh.w r2, [r3, #33] @ 0x21 statusPacket.phaseVoltageBC = PSU_06.VBC; 800db78: 4b3e ldr r3, [pc, #248] @ (800dc74 ) 800db7a: 68db ldr r3, [r3, #12] 800db7c: b29a uxth r2, r3 800db7e: 4b38 ldr r3, [pc, #224] @ (800dc60 ) 800db80: f8a3 2023 strh.w r2, [r3, #35] @ 0x23 statusPacket.phaseVoltageCA = PSU_06.VCA; 800db84: 4b3b ldr r3, [pc, #236] @ (800dc74 ) 800db86: 691b ldr r3, [r3, #16] 800db88: b29a uxth r2, r3 800db8a: 4b35 ldr r3, [pc, #212] @ (800dc60 ) 800db8c: f8a3 2025 strh.w r2, [r3, #37] @ 0x25 memcpy(statusPacket.VIN, GBT_EVInfo.EVIN, sizeof(GBT_EVInfo.EVIN)); 800db90: 4b33 ldr r3, [pc, #204] @ (800dc60 ) 800db92: 4a39 ldr r2, [pc, #228] @ (800dc78 ) 800db94: 3327 adds r3, #39 @ 0x27 800db96: 3218 adds r2, #24 800db98: 6815 ldr r5, [r2, #0] 800db9a: 6854 ldr r4, [r2, #4] 800db9c: 6890 ldr r0, [r2, #8] 800db9e: 68d1 ldr r1, [r2, #12] 800dba0: 601d str r5, [r3, #0] 800dba2: 605c str r4, [r3, #4] 800dba4: 6098 str r0, [r3, #8] 800dba6: 60d9 str r1, [r3, #12] 800dba8: 7c12 ldrb r2, [r2, #16] 800dbaa: 741a strb r2, [r3, #16] statusPacket.batteryType = GBT_EVInfo.batteryType; 800dbac: 4b32 ldr r3, [pc, #200] @ (800dc78 ) 800dbae: 78da ldrb r2, [r3, #3] 800dbb0: 4b2b ldr r3, [pc, #172] @ (800dc60 ) 800dbb2: f883 2038 strb.w r2, [r3, #56] @ 0x38 statusPacket.batteryCapacity = GBT_EVInfo.batteryCapacity; 800dbb6: 4b30 ldr r3, [pc, #192] @ (800dc78 ) 800dbb8: 889b ldrh r3, [r3, #4] 800dbba: b29a uxth r2, r3 800dbbc: 4b28 ldr r3, [pc, #160] @ (800dc60 ) 800dbbe: f8a3 2039 strh.w r2, [r3, #57] @ 0x39 statusPacket.batteryVoltage = GBT_EVInfo.batteryVoltage; 800dbc2: 4b2d ldr r3, [pc, #180] @ (800dc78 ) 800dbc4: 88db ldrh r3, [r3, #6] 800dbc6: b29a uxth r2, r3 800dbc8: 4b25 ldr r3, [pc, #148] @ (800dc60 ) 800dbca: f8a3 203b strh.w r2, [r3, #59] @ 0x3b memcpy(statusPacket.batteryVendor, GBT_EVInfo.batteryVendor, sizeof(statusPacket.batteryVendor)); 800dbce: 4b2a ldr r3, [pc, #168] @ (800dc78 ) 800dbd0: 689b ldr r3, [r3, #8] 800dbd2: 461a mov r2, r3 800dbd4: 4b22 ldr r3, [pc, #136] @ (800dc60 ) 800dbd6: f8c3 203d str.w r2, [r3, #61] @ 0x3d statusPacket.batterySN = GBT_EVInfo.batterySN; 800dbda: 4b27 ldr r3, [pc, #156] @ (800dc78 ) 800dbdc: 68db ldr r3, [r3, #12] 800dbde: 4a20 ldr r2, [pc, #128] @ (800dc60 ) 800dbe0: f8c2 3041 str.w r3, [r2, #65] @ 0x41 statusPacket.batteryManuD = GBT_EVInfo.batteryManuD; 800dbe4: 4b24 ldr r3, [pc, #144] @ (800dc78 ) 800dbe6: 7c9a ldrb r2, [r3, #18] 800dbe8: 4b1d ldr r3, [pc, #116] @ (800dc60 ) 800dbea: f883 2047 strb.w r2, [r3, #71] @ 0x47 statusPacket.batteryManuM = GBT_EVInfo.batteryManuM; 800dbee: 4b22 ldr r3, [pc, #136] @ (800dc78 ) 800dbf0: 7c5a ldrb r2, [r3, #17] 800dbf2: 4b1b ldr r3, [pc, #108] @ (800dc60 ) 800dbf4: f883 2046 strb.w r2, [r3, #70] @ 0x46 statusPacket.batteryManuY = GBT_EVInfo.batteryManuY; 800dbf8: 4b1f ldr r3, [pc, #124] @ (800dc78 ) 800dbfa: 7c1a ldrb r2, [r3, #16] 800dbfc: 4b18 ldr r3, [pc, #96] @ (800dc60 ) 800dbfe: f883 2045 strb.w r2, [r3, #69] @ 0x45 statusPacket.batteryCycleCount = GBT_EVInfo.batteryCycleCount; 800dc02: 4b1d ldr r3, [pc, #116] @ (800dc78 ) 800dc04: 7cda ldrb r2, [r3, #19] 800dc06: 7d19 ldrb r1, [r3, #20] 800dc08: 0209 lsls r1, r1, #8 800dc0a: 430a orrs r2, r1 800dc0c: 7d5b ldrb r3, [r3, #21] 800dc0e: 041b lsls r3, r3, #16 800dc10: 4313 orrs r3, r2 800dc12: b29a uxth r2, r3 800dc14: 4b12 ldr r3, [pc, #72] @ (800dc60 ) 800dc16: f8a3 2048 strh.w r2, [r3, #72] @ 0x48 statusPacket.ownAuto = GBT_EVInfo.ownAuto; 800dc1a: 4b17 ldr r3, [pc, #92] @ (800dc78 ) 800dc1c: 7d9a ldrb r2, [r3, #22] 800dc1e: 4b10 ldr r3, [pc, #64] @ (800dc60 ) 800dc20: f883 204a strb.w r2, [r3, #74] @ 0x4a memcpy(statusPacket.EV_SW_VER, GBT_EVInfo.EV_SW_VER, sizeof(statusPacket.EV_SW_VER)); 800dc24: 4b0e ldr r3, [pc, #56] @ (800dc60 ) 800dc26: 4a14 ldr r2, [pc, #80] @ (800dc78 ) 800dc28: 334b adds r3, #75 @ 0x4b 800dc2a: 3229 adds r2, #41 @ 0x29 800dc2c: 6811 ldr r1, [r2, #0] 800dc2e: 6852 ldr r2, [r2, #4] 800dc30: 6019 str r1, [r3, #0] 800dc32: 605a str r2, [r3, #4] statusPacket.testMode = 0; 800dc34: 4b0a ldr r3, [pc, #40] @ (800dc60 ) 800dc36: 2200 movs r2, #0 800dc38: f883 2053 strb.w r2, [r3, #83] @ 0x53 statusPacket.testVoltage = 0; 800dc3c: 4b08 ldr r3, [pc, #32] @ (800dc60 ) 800dc3e: 2200 movs r2, #0 800dc40: f883 2054 strb.w r2, [r3, #84] @ 0x54 800dc44: 2200 movs r2, #0 800dc46: f883 2055 strb.w r2, [r3, #85] @ 0x55 statusPacket.testCurrent = 0; 800dc4a: 4b05 ldr r3, [pc, #20] @ (800dc60 ) 800dc4c: 2200 movs r2, #0 800dc4e: f883 2056 strb.w r2, [r3, #86] @ 0x56 800dc52: 2200 movs r2, #0 800dc54: f883 2057 strb.w r2, [r3, #87] @ 0x57 // В debug.c есть CONN_SetState, предполагаем наличие CONN_GetState() // Если такой функции нет, закомментируйте следующую строку: // statusPacket.connState = CONN_GetState(); } 800dc58: bf00 nop 800dc5a: bdb0 pop {r4, r5, r7, pc} 800dc5c: 200002f8 .word 0x200002f8 800dc60: 20000eb4 .word 0x20000eb4 800dc64: 20000329 .word 0x20000329 800dc68: 20000a0c .word 0x20000a0c 800dc6c: 200003a4 .word 0x200003a4 800dc70: 20000398 .word 0x20000398 800dc74: 200009e0 .word 0x200009e0 800dc78: 20000344 .word 0x20000344 0800dc7c : static uint32_t RTC1_ReadTimeCounter(RTC_HandleTypeDef *hrtc); static HAL_StatusTypeDef RTC1_ExitInitMode(RTC_HandleTypeDef *hrtc); static HAL_StatusTypeDef RTC1_EnterInitMode(RTC_HandleTypeDef *hrtc); uint32_t get_Current_Time(){ 800dc7c: b580 push {r7, lr} 800dc7e: af00 add r7, sp, #0 return RTC1_ReadTimeCounter(&hrtc); 800dc80: 4802 ldr r0, [pc, #8] @ (800dc8c ) 800dc82: f000 f8a5 bl 800ddd0 800dc86: 4603 mov r3, r0 } 800dc88: 4618 mov r0, r3 800dc8a: bd80 pop {r7, pc} 800dc8c: 20000a7c .word 0x20000a7c 0800dc90 : void set_Time(uint32_t unix_time){ 800dc90: b580 push {r7, lr} 800dc92: b082 sub sp, #8 800dc94: af00 add r7, sp, #0 800dc96: 6078 str r0, [r7, #4] RTC1_WriteTimeCounter(&hrtc, unix_time); 800dc98: 6879 ldr r1, [r7, #4] 800dc9a: 4803 ldr r0, [pc, #12] @ (800dca8 ) 800dc9c: f000 f8c8 bl 800de30 } 800dca0: bf00 nop 800dca2: 3708 adds r7, #8 800dca4: 46bd mov sp, r7 800dca6: bd80 pop {r7, pc} 800dca8: 20000a7c .word 0x20000a7c 0800dcac : uint8_t to_bcd(int value) { 800dcac: b480 push {r7} 800dcae: b083 sub sp, #12 800dcb0: af00 add r7, sp, #0 800dcb2: 6078 str r0, [r7, #4] return ((value / 10) << 4) | (value % 10); 800dcb4: 687b ldr r3, [r7, #4] 800dcb6: 4a0f ldr r2, [pc, #60] @ (800dcf4 ) 800dcb8: fb82 1203 smull r1, r2, r2, r3 800dcbc: 1092 asrs r2, r2, #2 800dcbe: 17db asrs r3, r3, #31 800dcc0: 1ad3 subs r3, r2, r3 800dcc2: b25b sxtb r3, r3 800dcc4: 011b lsls r3, r3, #4 800dcc6: b258 sxtb r0, r3 800dcc8: 687a ldr r2, [r7, #4] 800dcca: 4b0a ldr r3, [pc, #40] @ (800dcf4 ) 800dccc: fb83 1302 smull r1, r3, r3, r2 800dcd0: 1099 asrs r1, r3, #2 800dcd2: 17d3 asrs r3, r2, #31 800dcd4: 1ac9 subs r1, r1, r3 800dcd6: 460b mov r3, r1 800dcd8: 009b lsls r3, r3, #2 800dcda: 440b add r3, r1 800dcdc: 005b lsls r3, r3, #1 800dcde: 1ad1 subs r1, r2, r3 800dce0: b24b sxtb r3, r1 800dce2: 4303 orrs r3, r0 800dce4: b25b sxtb r3, r3 800dce6: b2db uxtb r3, r3 } 800dce8: 4618 mov r0, r3 800dcea: 370c adds r7, #12 800dcec: 46bd mov sp, r7 800dcee: bc80 pop {r7} 800dcf0: 4770 bx lr 800dcf2: bf00 nop 800dcf4: 66666667 .word 0x66666667 0800dcf8 : void unix_to_bcd(uint32_t unix_time, uint8_t *time) { 800dcf8: b590 push {r4, r7, lr} 800dcfa: b087 sub sp, #28 800dcfc: af00 add r7, sp, #0 800dcfe: 6078 str r0, [r7, #4] 800dd00: 6039 str r1, [r7, #0] struct tm *tm_info; time_t raw_time = (time_t)unix_time; 800dd02: 6879 ldr r1, [r7, #4] 800dd04: 2000 movs r0, #0 800dd06: 460a mov r2, r1 800dd08: 4603 mov r3, r0 800dd0a: e9c7 2302 strd r2, r3, [r7, #8] tm_info = gmtime(&raw_time); 800dd0e: f107 0308 add.w r3, r7, #8 800dd12: 4618 mov r0, r3 800dd14: f006 fa1e bl 8014154 800dd18: 6178 str r0, [r7, #20] time[0] = to_bcd(tm_info->tm_sec); 800dd1a: 697b ldr r3, [r7, #20] 800dd1c: 681b ldr r3, [r3, #0] 800dd1e: 4618 mov r0, r3 800dd20: f7ff ffc4 bl 800dcac 800dd24: 4603 mov r3, r0 800dd26: 461a mov r2, r3 800dd28: 683b ldr r3, [r7, #0] 800dd2a: 701a strb r2, [r3, #0] time[1] = to_bcd(tm_info->tm_min); 800dd2c: 697b ldr r3, [r7, #20] 800dd2e: 685a ldr r2, [r3, #4] 800dd30: 683b ldr r3, [r7, #0] 800dd32: 1c5c adds r4, r3, #1 800dd34: 4610 mov r0, r2 800dd36: f7ff ffb9 bl 800dcac 800dd3a: 4603 mov r3, r0 800dd3c: 7023 strb r3, [r4, #0] time[2] = to_bcd(tm_info->tm_hour); 800dd3e: 697b ldr r3, [r7, #20] 800dd40: 689a ldr r2, [r3, #8] 800dd42: 683b ldr r3, [r7, #0] 800dd44: 1c9c adds r4, r3, #2 800dd46: 4610 mov r0, r2 800dd48: f7ff ffb0 bl 800dcac 800dd4c: 4603 mov r3, r0 800dd4e: 7023 strb r3, [r4, #0] time[3] = to_bcd(tm_info->tm_mday); 800dd50: 697b ldr r3, [r7, #20] 800dd52: 68da ldr r2, [r3, #12] 800dd54: 683b ldr r3, [r7, #0] 800dd56: 1cdc adds r4, r3, #3 800dd58: 4610 mov r0, r2 800dd5a: f7ff ffa7 bl 800dcac 800dd5e: 4603 mov r3, r0 800dd60: 7023 strb r3, [r4, #0] time[4] = to_bcd(tm_info->tm_mon + 1); // tm_mon is 0-11 800dd62: 697b ldr r3, [r7, #20] 800dd64: 691b ldr r3, [r3, #16] 800dd66: 1c5a adds r2, r3, #1 800dd68: 683b ldr r3, [r7, #0] 800dd6a: 1d1c adds r4, r3, #4 800dd6c: 4610 mov r0, r2 800dd6e: f7ff ff9d bl 800dcac 800dd72: 4603 mov r3, r0 800dd74: 7023 strb r3, [r4, #0] time[5] = to_bcd((tm_info->tm_year + 1900) % 100); // Year in 2 digits 800dd76: 697b ldr r3, [r7, #20] 800dd78: 695b ldr r3, [r3, #20] 800dd7a: f203 736c addw r3, r3, #1900 @ 0x76c 800dd7e: 4a13 ldr r2, [pc, #76] @ (800ddcc ) 800dd80: fb82 1203 smull r1, r2, r2, r3 800dd84: 1151 asrs r1, r2, #5 800dd86: 17da asrs r2, r3, #31 800dd88: 1a8a subs r2, r1, r2 800dd8a: 2164 movs r1, #100 @ 0x64 800dd8c: fb01 f202 mul.w r2, r1, r2 800dd90: 1a9a subs r2, r3, r2 800dd92: 683b ldr r3, [r7, #0] 800dd94: 1d5c adds r4, r3, #5 800dd96: 4610 mov r0, r2 800dd98: f7ff ff88 bl 800dcac 800dd9c: 4603 mov r3, r0 800dd9e: 7023 strb r3, [r4, #0] time[6] = to_bcd((tm_info->tm_year + 1900) / 100); // Century in 2 digits 800dda0: 697b ldr r3, [r7, #20] 800dda2: 695b ldr r3, [r3, #20] 800dda4: f203 736c addw r3, r3, #1900 @ 0x76c 800dda8: 4a08 ldr r2, [pc, #32] @ (800ddcc ) 800ddaa: fb82 1203 smull r1, r2, r2, r3 800ddae: 1152 asrs r2, r2, #5 800ddb0: 17db asrs r3, r3, #31 800ddb2: 1ad2 subs r2, r2, r3 800ddb4: 683b ldr r3, [r7, #0] 800ddb6: 1d9c adds r4, r3, #6 800ddb8: 4610 mov r0, r2 800ddba: f7ff ff77 bl 800dcac 800ddbe: 4603 mov r3, r0 800ddc0: 7023 strb r3, [r4, #0] } 800ddc2: bf00 nop 800ddc4: 371c adds r7, #28 800ddc6: 46bd mov sp, r7 800ddc8: bd90 pop {r4, r7, pc} 800ddca: bf00 nop 800ddcc: 51eb851f .word 0x51eb851f 0800ddd0 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval Time counter */ static uint32_t RTC1_ReadTimeCounter(RTC_HandleTypeDef *hrtc) { 800ddd0: b480 push {r7} 800ddd2: b087 sub sp, #28 800ddd4: af00 add r7, sp, #0 800ddd6: 6078 str r0, [r7, #4] uint16_t high1 = 0U, high2 = 0U, low = 0U; 800ddd8: 2300 movs r3, #0 800ddda: 827b strh r3, [r7, #18] 800dddc: 2300 movs r3, #0 800ddde: 823b strh r3, [r7, #16] 800dde0: 2300 movs r3, #0 800dde2: 81fb strh r3, [r7, #14] uint32_t timecounter = 0U; 800dde4: 2300 movs r3, #0 800dde6: 617b str r3, [r7, #20] high1 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT); 800dde8: 687b ldr r3, [r7, #4] 800ddea: 681b ldr r3, [r3, #0] 800ddec: 699b ldr r3, [r3, #24] 800ddee: 827b strh r3, [r7, #18] low = READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT); 800ddf0: 687b ldr r3, [r7, #4] 800ddf2: 681b ldr r3, [r3, #0] 800ddf4: 69db ldr r3, [r3, #28] 800ddf6: 81fb strh r3, [r7, #14] high2 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT); 800ddf8: 687b ldr r3, [r7, #4] 800ddfa: 681b ldr r3, [r3, #0] 800ddfc: 699b ldr r3, [r3, #24] 800ddfe: 823b strh r3, [r7, #16] if (high1 != high2) 800de00: 8a7a ldrh r2, [r7, #18] 800de02: 8a3b ldrh r3, [r7, #16] 800de04: 429a cmp r2, r3 800de06: d008 beq.n 800de1a { /* In this case the counter roll over during reading of CNTL and CNTH registers, read again CNTL register then return the counter value */ timecounter = (((uint32_t) high2 << 16U) | READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT)); 800de08: 8a3b ldrh r3, [r7, #16] 800de0a: 041a lsls r2, r3, #16 800de0c: 687b ldr r3, [r7, #4] 800de0e: 681b ldr r3, [r3, #0] 800de10: 69db ldr r3, [r3, #28] 800de12: b29b uxth r3, r3 800de14: 4313 orrs r3, r2 800de16: 617b str r3, [r7, #20] 800de18: e004 b.n 800de24 } else { /* No counter roll over during reading of CNTL and CNTH registers, counter value is equal to first value of CNTL and CNTH */ timecounter = (((uint32_t) high1 << 16U) | low); 800de1a: 8a7b ldrh r3, [r7, #18] 800de1c: 041a lsls r2, r3, #16 800de1e: 89fb ldrh r3, [r7, #14] 800de20: 4313 orrs r3, r2 800de22: 617b str r3, [r7, #20] } return timecounter; 800de24: 697b ldr r3, [r7, #20] } 800de26: 4618 mov r0, r3 800de28: 371c adds r7, #28 800de2a: 46bd mov sp, r7 800de2c: bc80 pop {r7} 800de2e: 4770 bx lr 0800de30 : * the configuration information for RTC. * @param TimeCounter: Counter to write in RTC_CNT registers * @retval HAL status */ static HAL_StatusTypeDef RTC1_WriteTimeCounter(RTC_HandleTypeDef *hrtc, uint32_t TimeCounter) { 800de30: b580 push {r7, lr} 800de32: b084 sub sp, #16 800de34: af00 add r7, sp, #0 800de36: 6078 str r0, [r7, #4] 800de38: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 800de3a: 2300 movs r3, #0 800de3c: 73fb strb r3, [r7, #15] /* Set Initialization mode */ if (RTC1_EnterInitMode(hrtc) != HAL_OK) 800de3e: 6878 ldr r0, [r7, #4] 800de40: f000 f81d bl 800de7e 800de44: 4603 mov r3, r0 800de46: 2b00 cmp r3, #0 800de48: d002 beq.n 800de50 { status = HAL_ERROR; 800de4a: 2301 movs r3, #1 800de4c: 73fb strb r3, [r7, #15] 800de4e: e011 b.n 800de74 } else { /* Set RTC COUNTER MSB word */ WRITE_REG(hrtc->Instance->CNTH, (TimeCounter >> 16U)); 800de50: 687b ldr r3, [r7, #4] 800de52: 681b ldr r3, [r3, #0] 800de54: 683a ldr r2, [r7, #0] 800de56: 0c12 lsrs r2, r2, #16 800de58: 619a str r2, [r3, #24] /* Set RTC COUNTER LSB word */ WRITE_REG(hrtc->Instance->CNTL, (TimeCounter & RTC_CNTL_RTC_CNT)); 800de5a: 687b ldr r3, [r7, #4] 800de5c: 681b ldr r3, [r3, #0] 800de5e: 683a ldr r2, [r7, #0] 800de60: b292 uxth r2, r2 800de62: 61da str r2, [r3, #28] /* Wait for synchro */ if (RTC1_ExitInitMode(hrtc) != HAL_OK) 800de64: 6878 ldr r0, [r7, #4] 800de66: f000 f832 bl 800dece 800de6a: 4603 mov r3, r0 800de6c: 2b00 cmp r3, #0 800de6e: d001 beq.n 800de74 { status = HAL_ERROR; 800de70: 2301 movs r3, #1 800de72: 73fb strb r3, [r7, #15] } } return status; 800de74: 7bfb ldrb r3, [r7, #15] } 800de76: 4618 mov r0, r3 800de78: 3710 adds r7, #16 800de7a: 46bd mov sp, r7 800de7c: bd80 pop {r7, pc} 0800de7e : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC1_EnterInitMode(RTC_HandleTypeDef *hrtc) { 800de7e: b580 push {r7, lr} 800de80: b084 sub sp, #16 800de82: af00 add r7, sp, #0 800de84: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800de86: 2300 movs r3, #0 800de88: 60fb str r3, [r7, #12] tickstart = HAL_GetTick(); 800de8a: f000 fcfb bl 800e884 800de8e: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800de90: e009 b.n 800dea6 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800de92: f000 fcf7 bl 800e884 800de96: 4602 mov r2, r0 800de98: 68fb ldr r3, [r7, #12] 800de9a: 1ad3 subs r3, r2, r3 800de9c: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800dea0: d901 bls.n 800dea6 { return HAL_TIMEOUT; 800dea2: 2303 movs r3, #3 800dea4: e00f b.n 800dec6 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800dea6: 687b ldr r3, [r7, #4] 800dea8: 681b ldr r3, [r3, #0] 800deaa: 685b ldr r3, [r3, #4] 800deac: f003 0320 and.w r3, r3, #32 800deb0: 2b00 cmp r3, #0 800deb2: d0ee beq.n 800de92 } } /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); 800deb4: 687b ldr r3, [r7, #4] 800deb6: 681b ldr r3, [r3, #0] 800deb8: 685a ldr r2, [r3, #4] 800deba: 687b ldr r3, [r7, #4] 800debc: 681b ldr r3, [r3, #0] 800debe: f042 0210 orr.w r2, r2, #16 800dec2: 605a str r2, [r3, #4] return HAL_OK; 800dec4: 2300 movs r3, #0 } 800dec6: 4618 mov r0, r3 800dec8: 3710 adds r7, #16 800deca: 46bd mov sp, r7 800decc: bd80 pop {r7, pc} 0800dece : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC1_ExitInitMode(RTC_HandleTypeDef *hrtc) { 800dece: b580 push {r7, lr} 800ded0: b084 sub sp, #16 800ded2: af00 add r7, sp, #0 800ded4: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800ded6: 2300 movs r3, #0 800ded8: 60fb str r3, [r7, #12] /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 800deda: 687b ldr r3, [r7, #4] 800dedc: 681b ldr r3, [r3, #0] 800dede: 685a ldr r2, [r3, #4] 800dee0: 687b ldr r3, [r7, #4] 800dee2: 681b ldr r3, [r3, #0] 800dee4: f022 0210 bic.w r2, r2, #16 800dee8: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 800deea: f000 fccb bl 800e884 800deee: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800def0: e009 b.n 800df06 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 800def2: f000 fcc7 bl 800e884 800def6: 4602 mov r2, r0 800def8: 68fb ldr r3, [r7, #12] 800defa: 1ad3 subs r3, r2, r3 800defc: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800df00: d901 bls.n 800df06 { return HAL_TIMEOUT; 800df02: 2303 movs r3, #3 800df04: e007 b.n 800df16 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 800df06: 687b ldr r3, [r7, #4] 800df08: 681b ldr r3, [r3, #0] 800df0a: 685b ldr r3, [r3, #4] 800df0c: f003 0320 and.w r3, r3, #32 800df10: 2b00 cmp r3, #0 800df12: d0ee beq.n 800def2 } } return HAL_OK; 800df14: 2300 movs r3, #0 } 800df16: 4618 mov r0, r3 800df18: 3710 adds r7, #16 800df1a: 46bd mov sp, r7 800df1c: bd80 pop {r7, pc} ... 0800df20 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 800df20: b480 push {r7} 800df22: b085 sub sp, #20 800df24: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800df26: 4b15 ldr r3, [pc, #84] @ (800df7c ) 800df28: 699b ldr r3, [r3, #24] 800df2a: 4a14 ldr r2, [pc, #80] @ (800df7c ) 800df2c: f043 0301 orr.w r3, r3, #1 800df30: 6193 str r3, [r2, #24] 800df32: 4b12 ldr r3, [pc, #72] @ (800df7c ) 800df34: 699b ldr r3, [r3, #24] 800df36: f003 0301 and.w r3, r3, #1 800df3a: 60bb str r3, [r7, #8] 800df3c: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 800df3e: 4b0f ldr r3, [pc, #60] @ (800df7c ) 800df40: 69db ldr r3, [r3, #28] 800df42: 4a0e ldr r2, [pc, #56] @ (800df7c ) 800df44: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 800df48: 61d3 str r3, [r2, #28] 800df4a: 4b0c ldr r3, [pc, #48] @ (800df7c ) 800df4c: 69db ldr r3, [r3, #28] 800df4e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800df52: 607b str r3, [r7, #4] 800df54: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800df56: 4b0a ldr r3, [pc, #40] @ (800df80 ) 800df58: 685b ldr r3, [r3, #4] 800df5a: 60fb str r3, [r7, #12] 800df5c: 68fb ldr r3, [r7, #12] 800df5e: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 800df62: 60fb str r3, [r7, #12] 800df64: 68fb ldr r3, [r7, #12] 800df66: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 800df6a: 60fb str r3, [r7, #12] 800df6c: 4a04 ldr r2, [pc, #16] @ (800df80 ) 800df6e: 68fb ldr r3, [r7, #12] 800df70: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800df72: bf00 nop 800df74: 3714 adds r7, #20 800df76: 46bd mov sp, r7 800df78: bc80 pop {r7} 800df7a: 4770 bx lr 800df7c: 40021000 .word 0x40021000 800df80: 40010000 .word 0x40010000 0800df84 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 800df84: b480 push {r7} 800df86: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 800df88: bf00 nop 800df8a: e7fd b.n 800df88 0800df8c : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 800df8c: b480 push {r7} 800df8e: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 800df90: bf00 nop 800df92: e7fd b.n 800df90 0800df94 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 800df94: b480 push {r7} 800df96: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 800df98: bf00 nop 800df9a: e7fd b.n 800df98 0800df9c : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800df9c: b480 push {r7} 800df9e: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 800dfa0: bf00 nop 800dfa2: e7fd b.n 800dfa0 0800dfa4 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 800dfa4: b480 push {r7} 800dfa6: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 800dfa8: bf00 nop 800dfaa: e7fd b.n 800dfa8 0800dfac : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 800dfac: b480 push {r7} 800dfae: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 800dfb0: bf00 nop 800dfb2: 46bd mov sp, r7 800dfb4: bc80 pop {r7} 800dfb6: 4770 bx lr 0800dfb8 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 800dfb8: b480 push {r7} 800dfba: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 800dfbc: bf00 nop 800dfbe: 46bd mov sp, r7 800dfc0: bc80 pop {r7} 800dfc2: 4770 bx lr 0800dfc4 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 800dfc4: b480 push {r7} 800dfc6: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 800dfc8: bf00 nop 800dfca: 46bd mov sp, r7 800dfcc: bc80 pop {r7} 800dfce: 4770 bx lr 0800dfd0 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 800dfd0: b580 push {r7, lr} 800dfd2: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 800dfd4: f000 fc44 bl 800e860 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 800dfd8: bf00 nop 800dfda: bd80 pop {r7, pc} 0800dfdc : /** * @brief This function handles CAN1 RX0 interrupt. */ void CAN1_RX0_IRQHandler(void) { 800dfdc: b580 push {r7, lr} 800dfde: af00 add r7, sp, #0 /* USER CODE BEGIN CAN1_RX0_IRQn 0 */ /* USER CODE END CAN1_RX0_IRQn 0 */ HAL_CAN_IRQHandler(&hcan1); 800dfe0: 4802 ldr r0, [pc, #8] @ (800dfec ) 800dfe2: f001 fe35 bl 800fc50 /* USER CODE BEGIN CAN1_RX0_IRQn 1 */ /* USER CODE END CAN1_RX0_IRQn 1 */ } 800dfe6: bf00 nop 800dfe8: bd80 pop {r7, pc} 800dfea: bf00 nop 800dfec: 200002a4 .word 0x200002a4 0800dff0 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { 800dff0: b580 push {r7, lr} 800dff2: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 800dff4: 4802 ldr r0, [pc, #8] @ (800e000 ) 800dff6: f004 fdcb bl 8012b90 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } 800dffa: bf00 nop 800dffc: bd80 pop {r7, pc} 800dffe: bf00 nop 800e000: 20000fac .word 0x20000fac 0800e004 : /** * @brief This function handles USART2 global interrupt. */ void USART2_IRQHandler(void) { 800e004: b580 push {r7, lr} 800e006: af00 add r7, sp, #0 /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 800e008: 4802 ldr r0, [pc, #8] @ (800e014 ) 800e00a: f004 fdc1 bl 8012b90 /* USER CODE BEGIN USART2_IRQn 1 */ /* USER CODE END USART2_IRQn 1 */ } 800e00e: bf00 nop 800e010: bd80 pop {r7, pc} 800e012: bf00 nop 800e014: 20000ff4 .word 0x20000ff4 0800e018 : /** * @brief This function handles USART3 global interrupt. */ void USART3_IRQHandler(void) { 800e018: b580 push {r7, lr} 800e01a: af00 add r7, sp, #0 /* USER CODE BEGIN USART3_IRQn 0 */ /* USER CODE END USART3_IRQn 0 */ HAL_UART_IRQHandler(&huart3); 800e01c: 4802 ldr r0, [pc, #8] @ (800e028 ) 800e01e: f004 fdb7 bl 8012b90 /* USER CODE BEGIN USART3_IRQn 1 */ /* USER CODE END USART3_IRQn 1 */ } 800e022: bf00 nop 800e024: bd80 pop {r7, pc} 800e026: bf00 nop 800e028: 2000103c .word 0x2000103c 0800e02c : /** * @brief This function handles UART5 global interrupt. */ void UART5_IRQHandler(void) { 800e02c: b580 push {r7, lr} 800e02e: af00 add r7, sp, #0 /* USER CODE BEGIN UART5_IRQn 0 */ /* USER CODE END UART5_IRQn 0 */ HAL_UART_IRQHandler(&huart5); 800e030: 4802 ldr r0, [pc, #8] @ (800e03c ) 800e032: f004 fdad bl 8012b90 /* USER CODE BEGIN UART5_IRQn 1 */ /* USER CODE END UART5_IRQn 1 */ } 800e036: bf00 nop 800e038: bd80 pop {r7, pc} 800e03a: bf00 nop 800e03c: 20000f64 .word 0x20000f64 0800e040 : /** * @brief This function handles CAN2 TX interrupt. */ void CAN2_TX_IRQHandler(void) { 800e040: b580 push {r7, lr} 800e042: af00 add r7, sp, #0 /* USER CODE BEGIN CAN2_TX_IRQn 0 */ /* USER CODE END CAN2_TX_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 800e044: 4802 ldr r0, [pc, #8] @ (800e050 ) 800e046: f001 fe03 bl 800fc50 /* USER CODE BEGIN CAN2_TX_IRQn 1 */ /* USER CODE END CAN2_TX_IRQn 1 */ } 800e04a: bf00 nop 800e04c: bd80 pop {r7, pc} 800e04e: bf00 nop 800e050: 200002cc .word 0x200002cc 0800e054 : /** * @brief This function handles CAN2 RX1 interrupt. */ void CAN2_RX1_IRQHandler(void) { 800e054: b580 push {r7, lr} 800e056: af00 add r7, sp, #0 /* USER CODE BEGIN CAN2_RX1_IRQn 0 */ /* USER CODE END CAN2_RX1_IRQn 0 */ HAL_CAN_IRQHandler(&hcan2); 800e058: 4802 ldr r0, [pc, #8] @ (800e064 ) 800e05a: f001 fdf9 bl 800fc50 /* USER CODE BEGIN CAN2_RX1_IRQn 1 */ /* USER CODE END CAN2_RX1_IRQn 1 */ } 800e05e: bf00 nop 800e060: bd80 pop {r7, pc} 800e062: bf00 nop 800e064: 200002cc .word 0x200002cc 0800e068 <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 800e068: b480 push {r7} 800e06a: af00 add r7, sp, #0 return 1; 800e06c: 2301 movs r3, #1 } 800e06e: 4618 mov r0, r3 800e070: 46bd mov sp, r7 800e072: bc80 pop {r7} 800e074: 4770 bx lr 0800e076 <_kill>: int _kill(int pid, int sig) { 800e076: b580 push {r7, lr} 800e078: b082 sub sp, #8 800e07a: af00 add r7, sp, #0 800e07c: 6078 str r0, [r7, #4] 800e07e: 6039 str r1, [r7, #0] (void)pid; (void)sig; errno = EINVAL; 800e080: f006 f92e bl 80142e0 <__errno> 800e084: 4603 mov r3, r0 800e086: 2216 movs r2, #22 800e088: 601a str r2, [r3, #0] return -1; 800e08a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 800e08e: 4618 mov r0, r3 800e090: 3708 adds r7, #8 800e092: 46bd mov sp, r7 800e094: bd80 pop {r7, pc} 0800e096 <_exit>: void _exit (int status) { 800e096: b580 push {r7, lr} 800e098: b082 sub sp, #8 800e09a: af00 add r7, sp, #0 800e09c: 6078 str r0, [r7, #4] _kill(status, -1); 800e09e: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 800e0a2: 6878 ldr r0, [r7, #4] 800e0a4: f7ff ffe7 bl 800e076 <_kill> while (1) {} /* Make sure we hang here */ 800e0a8: bf00 nop 800e0aa: e7fd b.n 800e0a8 <_exit+0x12> 0800e0ac <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 800e0ac: b580 push {r7, lr} 800e0ae: b086 sub sp, #24 800e0b0: af00 add r7, sp, #0 800e0b2: 60f8 str r0, [r7, #12] 800e0b4: 60b9 str r1, [r7, #8] 800e0b6: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800e0b8: 2300 movs r3, #0 800e0ba: 617b str r3, [r7, #20] 800e0bc: e00a b.n 800e0d4 <_read+0x28> { *ptr++ = __io_getchar(); 800e0be: f3af 8000 nop.w 800e0c2: 4601 mov r1, r0 800e0c4: 68bb ldr r3, [r7, #8] 800e0c6: 1c5a adds r2, r3, #1 800e0c8: 60ba str r2, [r7, #8] 800e0ca: b2ca uxtb r2, r1 800e0cc: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 800e0ce: 697b ldr r3, [r7, #20] 800e0d0: 3301 adds r3, #1 800e0d2: 617b str r3, [r7, #20] 800e0d4: 697a ldr r2, [r7, #20] 800e0d6: 687b ldr r3, [r7, #4] 800e0d8: 429a cmp r2, r3 800e0da: dbf0 blt.n 800e0be <_read+0x12> } return len; 800e0dc: 687b ldr r3, [r7, #4] } 800e0de: 4618 mov r0, r3 800e0e0: 3718 adds r7, #24 800e0e2: 46bd mov sp, r7 800e0e4: bd80 pop {r7, pc} 0800e0e6 <_close>: } return len; } int _close(int file) { 800e0e6: b480 push {r7} 800e0e8: b083 sub sp, #12 800e0ea: af00 add r7, sp, #0 800e0ec: 6078 str r0, [r7, #4] (void)file; return -1; 800e0ee: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 800e0f2: 4618 mov r0, r3 800e0f4: 370c adds r7, #12 800e0f6: 46bd mov sp, r7 800e0f8: bc80 pop {r7} 800e0fa: 4770 bx lr 0800e0fc <_fstat>: int _fstat(int file, struct stat *st) { 800e0fc: b480 push {r7} 800e0fe: b083 sub sp, #12 800e100: af00 add r7, sp, #0 800e102: 6078 str r0, [r7, #4] 800e104: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; 800e106: 683b ldr r3, [r7, #0] 800e108: f44f 5200 mov.w r2, #8192 @ 0x2000 800e10c: 605a str r2, [r3, #4] return 0; 800e10e: 2300 movs r3, #0 } 800e110: 4618 mov r0, r3 800e112: 370c adds r7, #12 800e114: 46bd mov sp, r7 800e116: bc80 pop {r7} 800e118: 4770 bx lr 0800e11a <_isatty>: int _isatty(int file) { 800e11a: b480 push {r7} 800e11c: b083 sub sp, #12 800e11e: af00 add r7, sp, #0 800e120: 6078 str r0, [r7, #4] (void)file; return 1; 800e122: 2301 movs r3, #1 } 800e124: 4618 mov r0, r3 800e126: 370c adds r7, #12 800e128: 46bd mov sp, r7 800e12a: bc80 pop {r7} 800e12c: 4770 bx lr 0800e12e <_lseek>: int _lseek(int file, int ptr, int dir) { 800e12e: b480 push {r7} 800e130: b085 sub sp, #20 800e132: af00 add r7, sp, #0 800e134: 60f8 str r0, [r7, #12] 800e136: 60b9 str r1, [r7, #8] 800e138: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; 800e13a: 2300 movs r3, #0 } 800e13c: 4618 mov r0, r3 800e13e: 3714 adds r7, #20 800e140: 46bd mov sp, r7 800e142: bc80 pop {r7} 800e144: 4770 bx lr ... 0800e148 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 800e148: b580 push {r7, lr} 800e14a: b086 sub sp, #24 800e14c: af00 add r7, sp, #0 800e14e: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 800e150: 4a14 ldr r2, [pc, #80] @ (800e1a4 <_sbrk+0x5c>) 800e152: 4b15 ldr r3, [pc, #84] @ (800e1a8 <_sbrk+0x60>) 800e154: 1ad3 subs r3, r2, r3 800e156: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 800e158: 697b ldr r3, [r7, #20] 800e15a: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 800e15c: 4b13 ldr r3, [pc, #76] @ (800e1ac <_sbrk+0x64>) 800e15e: 681b ldr r3, [r3, #0] 800e160: 2b00 cmp r3, #0 800e162: d102 bne.n 800e16a <_sbrk+0x22> { __sbrk_heap_end = &_end; 800e164: 4b11 ldr r3, [pc, #68] @ (800e1ac <_sbrk+0x64>) 800e166: 4a12 ldr r2, [pc, #72] @ (800e1b0 <_sbrk+0x68>) 800e168: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 800e16a: 4b10 ldr r3, [pc, #64] @ (800e1ac <_sbrk+0x64>) 800e16c: 681a ldr r2, [r3, #0] 800e16e: 687b ldr r3, [r7, #4] 800e170: 4413 add r3, r2 800e172: 693a ldr r2, [r7, #16] 800e174: 429a cmp r2, r3 800e176: d207 bcs.n 800e188 <_sbrk+0x40> { errno = ENOMEM; 800e178: f006 f8b2 bl 80142e0 <__errno> 800e17c: 4603 mov r3, r0 800e17e: 220c movs r2, #12 800e180: 601a str r2, [r3, #0] return (void *)-1; 800e182: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800e186: e009 b.n 800e19c <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 800e188: 4b08 ldr r3, [pc, #32] @ (800e1ac <_sbrk+0x64>) 800e18a: 681b ldr r3, [r3, #0] 800e18c: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 800e18e: 4b07 ldr r3, [pc, #28] @ (800e1ac <_sbrk+0x64>) 800e190: 681a ldr r2, [r3, #0] 800e192: 687b ldr r3, [r7, #4] 800e194: 4413 add r3, r2 800e196: 4a05 ldr r2, [pc, #20] @ (800e1ac <_sbrk+0x64>) 800e198: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 800e19a: 68fb ldr r3, [r7, #12] } 800e19c: 4618 mov r0, r3 800e19e: 3718 adds r7, #24 800e1a0: 46bd mov sp, r7 800e1a2: bd80 pop {r7, pc} 800e1a4: 20010000 .word 0x20010000 800e1a8: 00000400 .word 0x00000400 800e1ac: 20000f18 .word 0x20000f18 800e1b0: 200011d8 .word 0x200011d8 0800e1b4 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 800e1b4: b480 push {r7} 800e1b6: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 800e1b8: bf00 nop 800e1ba: 46bd mov sp, r7 800e1bc: bc80 pop {r7} 800e1be: 4770 bx lr 0800e1c0 : TIM_HandleTypeDef htim4; /* TIM4 init function */ void MX_TIM4_Init(void) { 800e1c0: b580 push {r7, lr} 800e1c2: b08e sub sp, #56 @ 0x38 800e1c4: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 800e1c6: f107 0328 add.w r3, r7, #40 @ 0x28 800e1ca: 2200 movs r2, #0 800e1cc: 601a str r2, [r3, #0] 800e1ce: 605a str r2, [r3, #4] 800e1d0: 609a str r2, [r3, #8] 800e1d2: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 800e1d4: f107 0320 add.w r3, r7, #32 800e1d8: 2200 movs r2, #0 800e1da: 601a str r2, [r3, #0] 800e1dc: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 800e1de: 1d3b adds r3, r7, #4 800e1e0: 2200 movs r2, #0 800e1e2: 601a str r2, [r3, #0] 800e1e4: 605a str r2, [r3, #4] 800e1e6: 609a str r2, [r3, #8] 800e1e8: 60da str r2, [r3, #12] 800e1ea: 611a str r2, [r3, #16] 800e1ec: 615a str r2, [r3, #20] 800e1ee: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 800e1f0: 4b37 ldr r3, [pc, #220] @ (800e2d0 ) 800e1f2: 4a38 ldr r2, [pc, #224] @ (800e2d4 ) 800e1f4: 601a str r2, [r3, #0] htim4.Init.Prescaler = 720; 800e1f6: 4b36 ldr r3, [pc, #216] @ (800e2d0 ) 800e1f8: f44f 7234 mov.w r2, #720 @ 0x2d0 800e1fc: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 800e1fe: 4b34 ldr r3, [pc, #208] @ (800e2d0 ) 800e200: 2200 movs r2, #0 800e202: 609a str r2, [r3, #8] htim4.Init.Period = 100; 800e204: 4b32 ldr r3, [pc, #200] @ (800e2d0 ) 800e206: 2264 movs r2, #100 @ 0x64 800e208: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 800e20a: 4b31 ldr r3, [pc, #196] @ (800e2d0 ) 800e20c: 2200 movs r2, #0 800e20e: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 800e210: 4b2f ldr r3, [pc, #188] @ (800e2d0 ) 800e212: 2200 movs r2, #0 800e214: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 800e216: 482e ldr r0, [pc, #184] @ (800e2d0 ) 800e218: f003 fcc9 bl 8011bae 800e21c: 4603 mov r3, r0 800e21e: 2b00 cmp r3, #0 800e220: d001 beq.n 800e226 { Error_Handler(); 800e222: f7fe f8b9 bl 800c398 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 800e226: f44f 5380 mov.w r3, #4096 @ 0x1000 800e22a: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 800e22c: f107 0328 add.w r3, r7, #40 @ 0x28 800e230: 4619 mov r1, r3 800e232: 4827 ldr r0, [pc, #156] @ (800e2d0 ) 800e234: f003 fece bl 8011fd4 800e238: 4603 mov r3, r0 800e23a: 2b00 cmp r3, #0 800e23c: d001 beq.n 800e242 { Error_Handler(); 800e23e: f7fe f8ab bl 800c398 } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 800e242: 4823 ldr r0, [pc, #140] @ (800e2d0 ) 800e244: f003 fd02 bl 8011c4c 800e248: 4603 mov r3, r0 800e24a: 2b00 cmp r3, #0 800e24c: d001 beq.n 800e252 { Error_Handler(); 800e24e: f7fe f8a3 bl 800c398 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800e252: 2300 movs r3, #0 800e254: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800e256: 2300 movs r3, #0 800e258: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 800e25a: f107 0320 add.w r3, r7, #32 800e25e: 4619 mov r1, r3 800e260: 481b ldr r0, [pc, #108] @ (800e2d0 ) 800e262: f004 fa39 bl 80126d8 800e266: 4603 mov r3, r0 800e268: 2b00 cmp r3, #0 800e26a: d001 beq.n 800e270 { Error_Handler(); 800e26c: f7fe f894 bl 800c398 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 800e270: 2360 movs r3, #96 @ 0x60 800e272: 607b str r3, [r7, #4] sConfigOC.Pulse = 0; 800e274: 2300 movs r3, #0 800e276: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800e278: 2300 movs r3, #0 800e27a: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 800e27c: 2300 movs r3, #0 800e27e: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 800e280: 1d3b adds r3, r7, #4 800e282: 2204 movs r2, #4 800e284: 4619 mov r1, r3 800e286: 4812 ldr r0, [pc, #72] @ (800e2d0 ) 800e288: f003 fde2 bl 8011e50 800e28c: 4603 mov r3, r0 800e28e: 2b00 cmp r3, #0 800e290: d001 beq.n 800e296 { Error_Handler(); 800e292: f7fe f881 bl 800c398 } if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 800e296: 1d3b adds r3, r7, #4 800e298: 2208 movs r2, #8 800e29a: 4619 mov r1, r3 800e29c: 480c ldr r0, [pc, #48] @ (800e2d0 ) 800e29e: f003 fdd7 bl 8011e50 800e2a2: 4603 mov r3, r0 800e2a4: 2b00 cmp r3, #0 800e2a6: d001 beq.n 800e2ac { Error_Handler(); 800e2a8: f7fe f876 bl 800c398 } if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 800e2ac: 1d3b adds r3, r7, #4 800e2ae: 220c movs r2, #12 800e2b0: 4619 mov r1, r3 800e2b2: 4807 ldr r0, [pc, #28] @ (800e2d0 ) 800e2b4: f003 fdcc bl 8011e50 800e2b8: 4603 mov r3, r0 800e2ba: 2b00 cmp r3, #0 800e2bc: d001 beq.n 800e2c2 { Error_Handler(); 800e2be: f7fe f86b bl 800c398 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 800e2c2: 4803 ldr r0, [pc, #12] @ (800e2d0 ) 800e2c4: f000 f826 bl 800e314 } 800e2c8: bf00 nop 800e2ca: 3738 adds r7, #56 @ 0x38 800e2cc: 46bd mov sp, r7 800e2ce: bd80 pop {r7, pc} 800e2d0: 20000f1c .word 0x20000f1c 800e2d4: 40000800 .word 0x40000800 0800e2d8 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { 800e2d8: b480 push {r7} 800e2da: b085 sub sp, #20 800e2dc: af00 add r7, sp, #0 800e2de: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM4) 800e2e0: 687b ldr r3, [r7, #4] 800e2e2: 681b ldr r3, [r3, #0] 800e2e4: 4a09 ldr r2, [pc, #36] @ (800e30c ) 800e2e6: 4293 cmp r3, r2 800e2e8: d10b bne.n 800e302 { /* USER CODE BEGIN TIM4_MspInit 0 */ /* USER CODE END TIM4_MspInit 0 */ /* TIM4 clock enable */ __HAL_RCC_TIM4_CLK_ENABLE(); 800e2ea: 4b09 ldr r3, [pc, #36] @ (800e310 ) 800e2ec: 69db ldr r3, [r3, #28] 800e2ee: 4a08 ldr r2, [pc, #32] @ (800e310 ) 800e2f0: f043 0304 orr.w r3, r3, #4 800e2f4: 61d3 str r3, [r2, #28] 800e2f6: 4b06 ldr r3, [pc, #24] @ (800e310 ) 800e2f8: 69db ldr r3, [r3, #28] 800e2fa: f003 0304 and.w r3, r3, #4 800e2fe: 60fb str r3, [r7, #12] 800e300: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 800e302: bf00 nop 800e304: 3714 adds r7, #20 800e306: 46bd mov sp, r7 800e308: bc80 pop {r7} 800e30a: 4770 bx lr 800e30c: 40000800 .word 0x40000800 800e310: 40021000 .word 0x40021000 0800e314 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) { 800e314: b580 push {r7, lr} 800e316: b088 sub sp, #32 800e318: af00 add r7, sp, #0 800e31a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800e31c: f107 030c add.w r3, r7, #12 800e320: 2200 movs r2, #0 800e322: 601a str r2, [r3, #0] 800e324: 605a str r2, [r3, #4] 800e326: 609a str r2, [r3, #8] 800e328: 60da str r2, [r3, #12] if(timHandle->Instance==TIM4) 800e32a: 687b ldr r3, [r7, #4] 800e32c: 681b ldr r3, [r3, #0] 800e32e: 4a17 ldr r2, [pc, #92] @ (800e38c ) 800e330: 4293 cmp r3, r2 800e332: d126 bne.n 800e382 { /* USER CODE BEGIN TIM4_MspPostInit 0 */ /* USER CODE END TIM4_MspPostInit 0 */ __HAL_RCC_GPIOD_CLK_ENABLE(); 800e334: 4b16 ldr r3, [pc, #88] @ (800e390 ) 800e336: 699b ldr r3, [r3, #24] 800e338: 4a15 ldr r2, [pc, #84] @ (800e390 ) 800e33a: f043 0320 orr.w r3, r3, #32 800e33e: 6193 str r3, [r2, #24] 800e340: 4b13 ldr r3, [pc, #76] @ (800e390 ) 800e342: 699b ldr r3, [r3, #24] 800e344: f003 0320 and.w r3, r3, #32 800e348: 60bb str r3, [r7, #8] 800e34a: 68bb ldr r3, [r7, #8] /**TIM4 GPIO Configuration PD13 ------> TIM4_CH2 PD14 ------> TIM4_CH3 PD15 ------> TIM4_CH4 */ GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; 800e34c: f44f 4360 mov.w r3, #57344 @ 0xe000 800e350: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e352: 2302 movs r3, #2 800e354: 613b str r3, [r7, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800e356: 2302 movs r3, #2 800e358: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e35a: f107 030c add.w r3, r7, #12 800e35e: 4619 mov r1, r3 800e360: 480c ldr r0, [pc, #48] @ (800e394 ) 800e362: f002 f8fb bl 801055c __HAL_AFIO_REMAP_TIM4_ENABLE(); 800e366: 4b0c ldr r3, [pc, #48] @ (800e398 ) 800e368: 685b ldr r3, [r3, #4] 800e36a: 61fb str r3, [r7, #28] 800e36c: 69fb ldr r3, [r7, #28] 800e36e: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800e372: 61fb str r3, [r7, #28] 800e374: 69fb ldr r3, [r7, #28] 800e376: f443 5380 orr.w r3, r3, #4096 @ 0x1000 800e37a: 61fb str r3, [r7, #28] 800e37c: 4a06 ldr r2, [pc, #24] @ (800e398 ) 800e37e: 69fb ldr r3, [r7, #28] 800e380: 6053 str r3, [r2, #4] /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 800e382: bf00 nop 800e384: 3720 adds r7, #32 800e386: 46bd mov sp, r7 800e388: bd80 pop {r7, pc} 800e38a: bf00 nop 800e38c: 40000800 .word 0x40000800 800e390: 40021000 .word 0x40021000 800e394: 40011400 .word 0x40011400 800e398: 40010000 .word 0x40010000 0800e39c : UART_HandleTypeDef huart2; UART_HandleTypeDef huart3; /* UART5 init function */ void MX_UART5_Init(void) { 800e39c: b580 push {r7, lr} 800e39e: af00 add r7, sp, #0 /* USER CODE END UART5_Init 0 */ /* USER CODE BEGIN UART5_Init 1 */ /* USER CODE END UART5_Init 1 */ huart5.Instance = UART5; 800e3a0: 4b11 ldr r3, [pc, #68] @ (800e3e8 ) 800e3a2: 4a12 ldr r2, [pc, #72] @ (800e3ec ) 800e3a4: 601a str r2, [r3, #0] huart5.Init.BaudRate = 9600; 800e3a6: 4b10 ldr r3, [pc, #64] @ (800e3e8 ) 800e3a8: f44f 5216 mov.w r2, #9600 @ 0x2580 800e3ac: 605a str r2, [r3, #4] huart5.Init.WordLength = UART_WORDLENGTH_8B; 800e3ae: 4b0e ldr r3, [pc, #56] @ (800e3e8 ) 800e3b0: 2200 movs r2, #0 800e3b2: 609a str r2, [r3, #8] huart5.Init.StopBits = UART_STOPBITS_1; 800e3b4: 4b0c ldr r3, [pc, #48] @ (800e3e8 ) 800e3b6: 2200 movs r2, #0 800e3b8: 60da str r2, [r3, #12] huart5.Init.Parity = UART_PARITY_NONE; 800e3ba: 4b0b ldr r3, [pc, #44] @ (800e3e8 ) 800e3bc: 2200 movs r2, #0 800e3be: 611a str r2, [r3, #16] huart5.Init.Mode = UART_MODE_TX_RX; 800e3c0: 4b09 ldr r3, [pc, #36] @ (800e3e8 ) 800e3c2: 220c movs r2, #12 800e3c4: 615a str r2, [r3, #20] huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e3c6: 4b08 ldr r3, [pc, #32] @ (800e3e8 ) 800e3c8: 2200 movs r2, #0 800e3ca: 619a str r2, [r3, #24] huart5.Init.OverSampling = UART_OVERSAMPLING_16; 800e3cc: 4b06 ldr r3, [pc, #24] @ (800e3e8 ) 800e3ce: 2200 movs r2, #0 800e3d0: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart5) != HAL_OK) 800e3d2: 4805 ldr r0, [pc, #20] @ (800e3e8 ) 800e3d4: f004 f9e6 bl 80127a4 800e3d8: 4603 mov r3, r0 800e3da: 2b00 cmp r3, #0 800e3dc: d001 beq.n 800e3e2 { Error_Handler(); 800e3de: f7fd ffdb bl 800c398 } /* USER CODE BEGIN UART5_Init 2 */ /* USER CODE END UART5_Init 2 */ } 800e3e2: bf00 nop 800e3e4: bd80 pop {r7, pc} 800e3e6: bf00 nop 800e3e8: 20000f64 .word 0x20000f64 800e3ec: 40005000 .word 0x40005000 0800e3f0 : /* USART1 init function */ void MX_USART1_UART_Init(void) { 800e3f0: b580 push {r7, lr} 800e3f2: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 800e3f4: 4b11 ldr r3, [pc, #68] @ (800e43c ) 800e3f6: 4a12 ldr r2, [pc, #72] @ (800e440 ) 800e3f8: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 800e3fa: 4b10 ldr r3, [pc, #64] @ (800e43c ) 800e3fc: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e400: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 800e402: 4b0e ldr r3, [pc, #56] @ (800e43c ) 800e404: 2200 movs r2, #0 800e406: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 800e408: 4b0c ldr r3, [pc, #48] @ (800e43c ) 800e40a: 2200 movs r2, #0 800e40c: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 800e40e: 4b0b ldr r3, [pc, #44] @ (800e43c ) 800e410: 2200 movs r2, #0 800e412: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 800e414: 4b09 ldr r3, [pc, #36] @ (800e43c ) 800e416: 220c movs r2, #12 800e418: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e41a: 4b08 ldr r3, [pc, #32] @ (800e43c ) 800e41c: 2200 movs r2, #0 800e41e: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 800e420: 4b06 ldr r3, [pc, #24] @ (800e43c ) 800e422: 2200 movs r2, #0 800e424: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 800e426: 4805 ldr r0, [pc, #20] @ (800e43c ) 800e428: f004 f9bc bl 80127a4 800e42c: 4603 mov r3, r0 800e42e: 2b00 cmp r3, #0 800e430: d001 beq.n 800e436 { Error_Handler(); 800e432: f7fd ffb1 bl 800c398 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 800e436: bf00 nop 800e438: bd80 pop {r7, pc} 800e43a: bf00 nop 800e43c: 20000fac .word 0x20000fac 800e440: 40013800 .word 0x40013800 0800e444 : /* USART2 init function */ void MX_USART2_UART_Init(void) { 800e444: b580 push {r7, lr} 800e446: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 800e448: 4b11 ldr r3, [pc, #68] @ (800e490 ) 800e44a: 4a12 ldr r2, [pc, #72] @ (800e494 ) 800e44c: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 800e44e: 4b10 ldr r3, [pc, #64] @ (800e490 ) 800e450: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e454: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 800e456: 4b0e ldr r3, [pc, #56] @ (800e490 ) 800e458: 2200 movs r2, #0 800e45a: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 800e45c: 4b0c ldr r3, [pc, #48] @ (800e490 ) 800e45e: 2200 movs r2, #0 800e460: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 800e462: 4b0b ldr r3, [pc, #44] @ (800e490 ) 800e464: 2200 movs r2, #0 800e466: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 800e468: 4b09 ldr r3, [pc, #36] @ (800e490 ) 800e46a: 220c movs r2, #12 800e46c: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e46e: 4b08 ldr r3, [pc, #32] @ (800e490 ) 800e470: 2200 movs r2, #0 800e472: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 800e474: 4b06 ldr r3, [pc, #24] @ (800e490 ) 800e476: 2200 movs r2, #0 800e478: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 800e47a: 4805 ldr r0, [pc, #20] @ (800e490 ) 800e47c: f004 f992 bl 80127a4 800e480: 4603 mov r3, r0 800e482: 2b00 cmp r3, #0 800e484: d001 beq.n 800e48a { Error_Handler(); 800e486: f7fd ff87 bl 800c398 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } 800e48a: bf00 nop 800e48c: bd80 pop {r7, pc} 800e48e: bf00 nop 800e490: 20000ff4 .word 0x20000ff4 800e494: 40004400 .word 0x40004400 0800e498 : /* USART3 init function */ void MX_USART3_UART_Init(void) { 800e498: b580 push {r7, lr} 800e49a: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; 800e49c: 4b11 ldr r3, [pc, #68] @ (800e4e4 ) 800e49e: 4a12 ldr r2, [pc, #72] @ (800e4e8 ) 800e4a0: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; 800e4a2: 4b10 ldr r3, [pc, #64] @ (800e4e4 ) 800e4a4: f44f 32e1 mov.w r2, #115200 @ 0x1c200 800e4a8: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; 800e4aa: 4b0e ldr r3, [pc, #56] @ (800e4e4 ) 800e4ac: 2200 movs r2, #0 800e4ae: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; 800e4b0: 4b0c ldr r3, [pc, #48] @ (800e4e4 ) 800e4b2: 2200 movs r2, #0 800e4b4: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; 800e4b6: 4b0b ldr r3, [pc, #44] @ (800e4e4 ) 800e4b8: 2200 movs r2, #0 800e4ba: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; 800e4bc: 4b09 ldr r3, [pc, #36] @ (800e4e4 ) 800e4be: 220c movs r2, #12 800e4c0: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800e4c2: 4b08 ldr r3, [pc, #32] @ (800e4e4 ) 800e4c4: 2200 movs r2, #0 800e4c6: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; 800e4c8: 4b06 ldr r3, [pc, #24] @ (800e4e4 ) 800e4ca: 2200 movs r2, #0 800e4cc: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart3) != HAL_OK) 800e4ce: 4805 ldr r0, [pc, #20] @ (800e4e4 ) 800e4d0: f004 f968 bl 80127a4 800e4d4: 4603 mov r3, r0 800e4d6: 2b00 cmp r3, #0 800e4d8: d001 beq.n 800e4de { Error_Handler(); 800e4da: f7fd ff5d bl 800c398 } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } 800e4de: bf00 nop 800e4e0: bd80 pop {r7, pc} 800e4e2: bf00 nop 800e4e4: 2000103c .word 0x2000103c 800e4e8: 40004800 .word 0x40004800 0800e4ec : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { 800e4ec: b580 push {r7, lr} 800e4ee: b092 sub sp, #72 @ 0x48 800e4f0: af00 add r7, sp, #0 800e4f2: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800e4f4: f107 0330 add.w r3, r7, #48 @ 0x30 800e4f8: 2200 movs r2, #0 800e4fa: 601a str r2, [r3, #0] 800e4fc: 605a str r2, [r3, #4] 800e4fe: 609a str r2, [r3, #8] 800e500: 60da str r2, [r3, #12] if(uartHandle->Instance==UART5) 800e502: 687b ldr r3, [r7, #4] 800e504: 681b ldr r3, [r3, #0] 800e506: 4a95 ldr r2, [pc, #596] @ (800e75c ) 800e508: 4293 cmp r3, r2 800e50a: d145 bne.n 800e598 { /* USER CODE BEGIN UART5_MspInit 0 */ /* USER CODE END UART5_MspInit 0 */ /* UART5 clock enable */ __HAL_RCC_UART5_CLK_ENABLE(); 800e50c: 4b94 ldr r3, [pc, #592] @ (800e760 ) 800e50e: 69db ldr r3, [r3, #28] 800e510: 4a93 ldr r2, [pc, #588] @ (800e760 ) 800e512: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 800e516: 61d3 str r3, [r2, #28] 800e518: 4b91 ldr r3, [pc, #580] @ (800e760 ) 800e51a: 69db ldr r3, [r3, #28] 800e51c: f403 1380 and.w r3, r3, #1048576 @ 0x100000 800e520: 62fb str r3, [r7, #44] @ 0x2c 800e522: 6afb ldr r3, [r7, #44] @ 0x2c __HAL_RCC_GPIOC_CLK_ENABLE(); 800e524: 4b8e ldr r3, [pc, #568] @ (800e760 ) 800e526: 699b ldr r3, [r3, #24] 800e528: 4a8d ldr r2, [pc, #564] @ (800e760 ) 800e52a: f043 0310 orr.w r3, r3, #16 800e52e: 6193 str r3, [r2, #24] 800e530: 4b8b ldr r3, [pc, #556] @ (800e760 ) 800e532: 699b ldr r3, [r3, #24] 800e534: f003 0310 and.w r3, r3, #16 800e538: 62bb str r3, [r7, #40] @ 0x28 800e53a: 6abb ldr r3, [r7, #40] @ 0x28 __HAL_RCC_GPIOD_CLK_ENABLE(); 800e53c: 4b88 ldr r3, [pc, #544] @ (800e760 ) 800e53e: 699b ldr r3, [r3, #24] 800e540: 4a87 ldr r2, [pc, #540] @ (800e760 ) 800e542: f043 0320 orr.w r3, r3, #32 800e546: 6193 str r3, [r2, #24] 800e548: 4b85 ldr r3, [pc, #532] @ (800e760 ) 800e54a: 699b ldr r3, [r3, #24] 800e54c: f003 0320 and.w r3, r3, #32 800e550: 627b str r3, [r7, #36] @ 0x24 800e552: 6a7b ldr r3, [r7, #36] @ 0x24 /**UART5 GPIO Configuration PC12 ------> UART5_TX PD2 ------> UART5_RX */ GPIO_InitStruct.Pin = GPIO_PIN_12; 800e554: f44f 5380 mov.w r3, #4096 @ 0x1000 800e558: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e55a: 2302 movs r3, #2 800e55c: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e55e: 2303 movs r3, #3 800e560: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800e562: f107 0330 add.w r3, r7, #48 @ 0x30 800e566: 4619 mov r1, r3 800e568: 487e ldr r0, [pc, #504] @ (800e764 ) 800e56a: f001 fff7 bl 801055c GPIO_InitStruct.Pin = GPIO_PIN_2; 800e56e: 2304 movs r3, #4 800e570: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e572: 2300 movs r3, #0 800e574: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e576: 2300 movs r3, #0 800e578: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e57a: f107 0330 add.w r3, r7, #48 @ 0x30 800e57e: 4619 mov r1, r3 800e580: 4879 ldr r0, [pc, #484] @ (800e768 ) 800e582: f001 ffeb bl 801055c /* UART5 interrupt Init */ HAL_NVIC_SetPriority(UART5_IRQn, 0, 0); 800e586: 2200 movs r2, #0 800e588: 2100 movs r1, #0 800e58a: 2035 movs r0, #53 @ 0x35 800e58c: f001 fe51 bl 8010232 HAL_NVIC_EnableIRQ(UART5_IRQn); 800e590: 2035 movs r0, #53 @ 0x35 800e592: f001 fe6a bl 801026a HAL_NVIC_EnableIRQ(USART3_IRQn); /* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */ } } 800e596: e0dc b.n 800e752 else if(uartHandle->Instance==USART1) 800e598: 687b ldr r3, [r7, #4] 800e59a: 681b ldr r3, [r3, #0] 800e59c: 4a73 ldr r2, [pc, #460] @ (800e76c ) 800e59e: 4293 cmp r3, r2 800e5a0: d13a bne.n 800e618 __HAL_RCC_USART1_CLK_ENABLE(); 800e5a2: 4b6f ldr r3, [pc, #444] @ (800e760 ) 800e5a4: 699b ldr r3, [r3, #24] 800e5a6: 4a6e ldr r2, [pc, #440] @ (800e760 ) 800e5a8: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800e5ac: 6193 str r3, [r2, #24] 800e5ae: 4b6c ldr r3, [pc, #432] @ (800e760 ) 800e5b0: 699b ldr r3, [r3, #24] 800e5b2: f403 4380 and.w r3, r3, #16384 @ 0x4000 800e5b6: 623b str r3, [r7, #32] 800e5b8: 6a3b ldr r3, [r7, #32] __HAL_RCC_GPIOA_CLK_ENABLE(); 800e5ba: 4b69 ldr r3, [pc, #420] @ (800e760 ) 800e5bc: 699b ldr r3, [r3, #24] 800e5be: 4a68 ldr r2, [pc, #416] @ (800e760 ) 800e5c0: f043 0304 orr.w r3, r3, #4 800e5c4: 6193 str r3, [r2, #24] 800e5c6: 4b66 ldr r3, [pc, #408] @ (800e760 ) 800e5c8: 699b ldr r3, [r3, #24] 800e5ca: f003 0304 and.w r3, r3, #4 800e5ce: 61fb str r3, [r7, #28] 800e5d0: 69fb ldr r3, [r7, #28] GPIO_InitStruct.Pin = GPIO_PIN_9; 800e5d2: f44f 7300 mov.w r3, #512 @ 0x200 800e5d6: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e5d8: 2302 movs r3, #2 800e5da: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e5dc: 2303 movs r3, #3 800e5de: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800e5e0: f107 0330 add.w r3, r7, #48 @ 0x30 800e5e4: 4619 mov r1, r3 800e5e6: 4862 ldr r0, [pc, #392] @ (800e770 ) 800e5e8: f001 ffb8 bl 801055c GPIO_InitStruct.Pin = GPIO_PIN_10; 800e5ec: f44f 6380 mov.w r3, #1024 @ 0x400 800e5f0: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e5f2: 2300 movs r3, #0 800e5f4: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e5f6: 2300 movs r3, #0 800e5f8: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800e5fa: f107 0330 add.w r3, r7, #48 @ 0x30 800e5fe: 4619 mov r1, r3 800e600: 485b ldr r0, [pc, #364] @ (800e770 ) 800e602: f001 ffab bl 801055c HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 800e606: 2200 movs r2, #0 800e608: 2100 movs r1, #0 800e60a: 2025 movs r0, #37 @ 0x25 800e60c: f001 fe11 bl 8010232 HAL_NVIC_EnableIRQ(USART1_IRQn); 800e610: 2025 movs r0, #37 @ 0x25 800e612: f001 fe2a bl 801026a } 800e616: e09c b.n 800e752 else if(uartHandle->Instance==USART2) 800e618: 687b ldr r3, [r7, #4] 800e61a: 681b ldr r3, [r3, #0] 800e61c: 4a55 ldr r2, [pc, #340] @ (800e774 ) 800e61e: 4293 cmp r3, r2 800e620: d146 bne.n 800e6b0 __HAL_RCC_USART2_CLK_ENABLE(); 800e622: 4b4f ldr r3, [pc, #316] @ (800e760 ) 800e624: 69db ldr r3, [r3, #28] 800e626: 4a4e ldr r2, [pc, #312] @ (800e760 ) 800e628: f443 3300 orr.w r3, r3, #131072 @ 0x20000 800e62c: 61d3 str r3, [r2, #28] 800e62e: 4b4c ldr r3, [pc, #304] @ (800e760 ) 800e630: 69db ldr r3, [r3, #28] 800e632: f403 3300 and.w r3, r3, #131072 @ 0x20000 800e636: 61bb str r3, [r7, #24] 800e638: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); 800e63a: 4b49 ldr r3, [pc, #292] @ (800e760 ) 800e63c: 699b ldr r3, [r3, #24] 800e63e: 4a48 ldr r2, [pc, #288] @ (800e760 ) 800e640: f043 0320 orr.w r3, r3, #32 800e644: 6193 str r3, [r2, #24] 800e646: 4b46 ldr r3, [pc, #280] @ (800e760 ) 800e648: 699b ldr r3, [r3, #24] 800e64a: f003 0320 and.w r3, r3, #32 800e64e: 617b str r3, [r7, #20] 800e650: 697b ldr r3, [r7, #20] GPIO_InitStruct.Pin = GPIO_PIN_5; 800e652: 2320 movs r3, #32 800e654: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e656: 2302 movs r3, #2 800e658: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e65a: 2303 movs r3, #3 800e65c: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e65e: f107 0330 add.w r3, r7, #48 @ 0x30 800e662: 4619 mov r1, r3 800e664: 4840 ldr r0, [pc, #256] @ (800e768 ) 800e666: f001 ff79 bl 801055c GPIO_InitStruct.Pin = GPIO_PIN_6; 800e66a: 2340 movs r3, #64 @ 0x40 800e66c: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e66e: 2300 movs r3, #0 800e670: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e672: 2300 movs r3, #0 800e674: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800e676: f107 0330 add.w r3, r7, #48 @ 0x30 800e67a: 4619 mov r1, r3 800e67c: 483a ldr r0, [pc, #232] @ (800e768 ) 800e67e: f001 ff6d bl 801055c __HAL_AFIO_REMAP_USART2_ENABLE(); 800e682: 4b3d ldr r3, [pc, #244] @ (800e778 ) 800e684: 685b ldr r3, [r3, #4] 800e686: 643b str r3, [r7, #64] @ 0x40 800e688: 6c3b ldr r3, [r7, #64] @ 0x40 800e68a: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800e68e: 643b str r3, [r7, #64] @ 0x40 800e690: 6c3b ldr r3, [r7, #64] @ 0x40 800e692: f043 0308 orr.w r3, r3, #8 800e696: 643b str r3, [r7, #64] @ 0x40 800e698: 4a37 ldr r2, [pc, #220] @ (800e778 ) 800e69a: 6c3b ldr r3, [r7, #64] @ 0x40 800e69c: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 800e69e: 2200 movs r2, #0 800e6a0: 2100 movs r1, #0 800e6a2: 2026 movs r0, #38 @ 0x26 800e6a4: f001 fdc5 bl 8010232 HAL_NVIC_EnableIRQ(USART2_IRQn); 800e6a8: 2026 movs r0, #38 @ 0x26 800e6aa: f001 fdde bl 801026a } 800e6ae: e050 b.n 800e752 else if(uartHandle->Instance==USART3) 800e6b0: 687b ldr r3, [r7, #4] 800e6b2: 681b ldr r3, [r3, #0] 800e6b4: 4a31 ldr r2, [pc, #196] @ (800e77c ) 800e6b6: 4293 cmp r3, r2 800e6b8: d14b bne.n 800e752 __HAL_RCC_USART3_CLK_ENABLE(); 800e6ba: 4b29 ldr r3, [pc, #164] @ (800e760 ) 800e6bc: 69db ldr r3, [r3, #28] 800e6be: 4a28 ldr r2, [pc, #160] @ (800e760 ) 800e6c0: f443 2380 orr.w r3, r3, #262144 @ 0x40000 800e6c4: 61d3 str r3, [r2, #28] 800e6c6: 4b26 ldr r3, [pc, #152] @ (800e760 ) 800e6c8: 69db ldr r3, [r3, #28] 800e6ca: f403 2380 and.w r3, r3, #262144 @ 0x40000 800e6ce: 613b str r3, [r7, #16] 800e6d0: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOC_CLK_ENABLE(); 800e6d2: 4b23 ldr r3, [pc, #140] @ (800e760 ) 800e6d4: 699b ldr r3, [r3, #24] 800e6d6: 4a22 ldr r2, [pc, #136] @ (800e760 ) 800e6d8: f043 0310 orr.w r3, r3, #16 800e6dc: 6193 str r3, [r2, #24] 800e6de: 4b20 ldr r3, [pc, #128] @ (800e760 ) 800e6e0: 699b ldr r3, [r3, #24] 800e6e2: f003 0310 and.w r3, r3, #16 800e6e6: 60fb str r3, [r7, #12] 800e6e8: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_10; 800e6ea: f44f 6380 mov.w r3, #1024 @ 0x400 800e6ee: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800e6f0: 2302 movs r3, #2 800e6f2: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800e6f4: 2303 movs r3, #3 800e6f6: 63fb str r3, [r7, #60] @ 0x3c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800e6f8: f107 0330 add.w r3, r7, #48 @ 0x30 800e6fc: 4619 mov r1, r3 800e6fe: 4819 ldr r0, [pc, #100] @ (800e764 ) 800e700: f001 ff2c bl 801055c GPIO_InitStruct.Pin = GPIO_PIN_11; 800e704: f44f 6300 mov.w r3, #2048 @ 0x800 800e708: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800e70a: 2300 movs r3, #0 800e70c: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; 800e70e: 2300 movs r3, #0 800e710: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800e712: f107 0330 add.w r3, r7, #48 @ 0x30 800e716: 4619 mov r1, r3 800e718: 4812 ldr r0, [pc, #72] @ (800e764 ) 800e71a: f001 ff1f bl 801055c __HAL_AFIO_REMAP_USART3_PARTIAL(); 800e71e: 4b16 ldr r3, [pc, #88] @ (800e778 ) 800e720: 685b ldr r3, [r3, #4] 800e722: 647b str r3, [r7, #68] @ 0x44 800e724: 6c7b ldr r3, [r7, #68] @ 0x44 800e726: f023 0330 bic.w r3, r3, #48 @ 0x30 800e72a: 647b str r3, [r7, #68] @ 0x44 800e72c: 6c7b ldr r3, [r7, #68] @ 0x44 800e72e: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000 800e732: 647b str r3, [r7, #68] @ 0x44 800e734: 6c7b ldr r3, [r7, #68] @ 0x44 800e736: f043 0310 orr.w r3, r3, #16 800e73a: 647b str r3, [r7, #68] @ 0x44 800e73c: 4a0e ldr r2, [pc, #56] @ (800e778 ) 800e73e: 6c7b ldr r3, [r7, #68] @ 0x44 800e740: 6053 str r3, [r2, #4] HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); 800e742: 2200 movs r2, #0 800e744: 2100 movs r1, #0 800e746: 2027 movs r0, #39 @ 0x27 800e748: f001 fd73 bl 8010232 HAL_NVIC_EnableIRQ(USART3_IRQn); 800e74c: 2027 movs r0, #39 @ 0x27 800e74e: f001 fd8c bl 801026a } 800e752: bf00 nop 800e754: 3748 adds r7, #72 @ 0x48 800e756: 46bd mov sp, r7 800e758: bd80 pop {r7, pc} 800e75a: bf00 nop 800e75c: 40005000 .word 0x40005000 800e760: 40021000 .word 0x40021000 800e764: 40011000 .word 0x40011000 800e768: 40011400 .word 0x40011400 800e76c: 40013800 .word 0x40013800 800e770: 40010800 .word 0x40010800 800e774: 40004400 .word 0x40004400 800e778: 40010000 .word 0x40010000 800e77c: 40004800 .word 0x40004800 0800e780 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ 800e780: f8df d034 ldr.w sp, [pc, #52] @ 800e7b8 /* Call the clock system initialization function.*/ bl SystemInit 800e784: f7ff fd16 bl 800e1b4 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 800e788: 480c ldr r0, [pc, #48] @ (800e7bc ) ldr r1, =_edata 800e78a: 490d ldr r1, [pc, #52] @ (800e7c0 ) ldr r2, =_sidata 800e78c: 4a0d ldr r2, [pc, #52] @ (800e7c4 ) movs r3, #0 800e78e: 2300 movs r3, #0 b LoopCopyDataInit 800e790: e002 b.n 800e798 0800e792 : CopyDataInit: ldr r4, [r2, r3] 800e792: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800e794: 50c4 str r4, [r0, r3] adds r3, r3, #4 800e796: 3304 adds r3, #4 0800e798 : LoopCopyDataInit: adds r4, r0, r3 800e798: 18c4 adds r4, r0, r3 cmp r4, r1 800e79a: 428c cmp r4, r1 bcc CopyDataInit 800e79c: d3f9 bcc.n 800e792 /* Zero fill the bss segment. */ ldr r2, =_sbss 800e79e: 4a0a ldr r2, [pc, #40] @ (800e7c8 ) ldr r4, =_ebss 800e7a0: 4c0a ldr r4, [pc, #40] @ (800e7cc ) movs r3, #0 800e7a2: 2300 movs r3, #0 b LoopFillZerobss 800e7a4: e001 b.n 800e7aa 0800e7a6 : FillZerobss: str r3, [r2] 800e7a6: 6013 str r3, [r2, #0] adds r2, r2, #4 800e7a8: 3204 adds r2, #4 0800e7aa : LoopFillZerobss: cmp r2, r4 800e7aa: 42a2 cmp r2, r4 bcc FillZerobss 800e7ac: d3fb bcc.n 800e7a6 /* Call static constructors */ bl __libc_init_array 800e7ae: f005 fd9d bl 80142ec <__libc_init_array> /* Call the application's entry point.*/ bl main 800e7b2: f7fd fd03 bl 800c1bc
bx lr 800e7b6: 4770 bx lr ldr sp, =_estack /* set stack pointer */ 800e7b8: 20010000 .word 0x20010000 ldr r0, =_sdata 800e7bc: 20000000 .word 0x20000000 ldr r1, =_edata 800e7c0: 2000024c .word 0x2000024c ldr r2, =_sidata 800e7c4: 080170f4 .word 0x080170f4 ldr r2, =_sbss 800e7c8: 20000250 .word 0x20000250 ldr r4, =_ebss 800e7cc: 200011d4 .word 0x200011d4 0800e7d0 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800e7d0: e7fe b.n 800e7d0 ... 0800e7d4 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 800e7d4: b580 push {r7, lr} 800e7d6: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800e7d8: 4b08 ldr r3, [pc, #32] @ (800e7fc ) 800e7da: 681b ldr r3, [r3, #0] 800e7dc: 4a07 ldr r2, [pc, #28] @ (800e7fc ) 800e7de: f043 0310 orr.w r3, r3, #16 800e7e2: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800e7e4: 2003 movs r0, #3 800e7e6: f001 fd19 bl 801021c /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 800e7ea: 200f movs r0, #15 800e7ec: f000 f808 bl 800e800 /* Init the low level hardware */ HAL_MspInit(); 800e7f0: f7ff fb96 bl 800df20 /* Return function status */ return HAL_OK; 800e7f4: 2300 movs r3, #0 } 800e7f6: 4618 mov r0, r3 800e7f8: bd80 pop {r7, pc} 800e7fa: bf00 nop 800e7fc: 40022000 .word 0x40022000 0800e800 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800e800: b580 push {r7, lr} 800e802: b082 sub sp, #8 800e804: af00 add r7, sp, #0 800e806: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800e808: 4b12 ldr r3, [pc, #72] @ (800e854 ) 800e80a: 681a ldr r2, [r3, #0] 800e80c: 4b12 ldr r3, [pc, #72] @ (800e858 ) 800e80e: 781b ldrb r3, [r3, #0] 800e810: 4619 mov r1, r3 800e812: f44f 737a mov.w r3, #1000 @ 0x3e8 800e816: fbb3 f3f1 udiv r3, r3, r1 800e81a: fbb2 f3f3 udiv r3, r2, r3 800e81e: 4618 mov r0, r3 800e820: f001 fd31 bl 8010286 800e824: 4603 mov r3, r0 800e826: 2b00 cmp r3, #0 800e828: d001 beq.n 800e82e { return HAL_ERROR; 800e82a: 2301 movs r3, #1 800e82c: e00e b.n 800e84c } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800e82e: 687b ldr r3, [r7, #4] 800e830: 2b0f cmp r3, #15 800e832: d80a bhi.n 800e84a { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 800e834: 2200 movs r2, #0 800e836: 6879 ldr r1, [r7, #4] 800e838: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800e83c: f001 fcf9 bl 8010232 uwTickPrio = TickPriority; 800e840: 4a06 ldr r2, [pc, #24] @ (800e85c ) 800e842: 687b ldr r3, [r7, #4] 800e844: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 800e846: 2300 movs r3, #0 800e848: e000 b.n 800e84c return HAL_ERROR; 800e84a: 2301 movs r3, #1 } 800e84c: 4618 mov r0, r3 800e84e: 3708 adds r7, #8 800e850: 46bd mov sp, r7 800e852: bd80 pop {r7, pc} 800e854: 20000078 .word 0x20000078 800e858: 20000080 .word 0x20000080 800e85c: 2000007c .word 0x2000007c 0800e860 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 800e860: b480 push {r7} 800e862: af00 add r7, sp, #0 uwTick += uwTickFreq; 800e864: 4b05 ldr r3, [pc, #20] @ (800e87c ) 800e866: 781b ldrb r3, [r3, #0] 800e868: 461a mov r2, r3 800e86a: 4b05 ldr r3, [pc, #20] @ (800e880 ) 800e86c: 681b ldr r3, [r3, #0] 800e86e: 4413 add r3, r2 800e870: 4a03 ldr r2, [pc, #12] @ (800e880 ) 800e872: 6013 str r3, [r2, #0] } 800e874: bf00 nop 800e876: 46bd mov sp, r7 800e878: bc80 pop {r7} 800e87a: 4770 bx lr 800e87c: 20000080 .word 0x20000080 800e880: 20001084 .word 0x20001084 0800e884 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 800e884: b480 push {r7} 800e886: af00 add r7, sp, #0 return uwTick; 800e888: 4b02 ldr r3, [pc, #8] @ (800e894 ) 800e88a: 681b ldr r3, [r3, #0] } 800e88c: 4618 mov r0, r3 800e88e: 46bd mov sp, r7 800e890: bc80 pop {r7} 800e892: 4770 bx lr 800e894: 20001084 .word 0x20001084 0800e898 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 800e898: b580 push {r7, lr} 800e89a: b084 sub sp, #16 800e89c: af00 add r7, sp, #0 800e89e: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 800e8a0: f7ff fff0 bl 800e884 800e8a4: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800e8a6: 687b ldr r3, [r7, #4] 800e8a8: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800e8aa: 68fb ldr r3, [r7, #12] 800e8ac: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800e8b0: d005 beq.n 800e8be { wait += (uint32_t)(uwTickFreq); 800e8b2: 4b0a ldr r3, [pc, #40] @ (800e8dc ) 800e8b4: 781b ldrb r3, [r3, #0] 800e8b6: 461a mov r2, r3 800e8b8: 68fb ldr r3, [r7, #12] 800e8ba: 4413 add r3, r2 800e8bc: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 800e8be: bf00 nop 800e8c0: f7ff ffe0 bl 800e884 800e8c4: 4602 mov r2, r0 800e8c6: 68bb ldr r3, [r7, #8] 800e8c8: 1ad3 subs r3, r2, r3 800e8ca: 68fa ldr r2, [r7, #12] 800e8cc: 429a cmp r2, r3 800e8ce: d8f7 bhi.n 800e8c0 { } } 800e8d0: bf00 nop 800e8d2: bf00 nop 800e8d4: 3710 adds r7, #16 800e8d6: 46bd mov sp, r7 800e8d8: bd80 pop {r7, pc} 800e8da: bf00 nop 800e8dc: 20000080 .word 0x20000080 0800e8e0 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 800e8e0: b580 push {r7, lr} 800e8e2: b086 sub sp, #24 800e8e4: af00 add r7, sp, #0 800e8e6: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800e8e8: 2300 movs r3, #0 800e8ea: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 800e8ec: 2300 movs r3, #0 800e8ee: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 800e8f0: 2300 movs r3, #0 800e8f2: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 800e8f4: 2300 movs r3, #0 800e8f6: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 800e8f8: 687b ldr r3, [r7, #4] 800e8fa: 2b00 cmp r3, #0 800e8fc: d101 bne.n 800e902 { return HAL_ERROR; 800e8fe: 2301 movs r3, #1 800e900: e0be b.n 800ea80 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 800e902: 687b ldr r3, [r7, #4] 800e904: 689b ldr r3, [r3, #8] 800e906: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 800e908: 687b ldr r3, [r7, #4] 800e90a: 6a9b ldr r3, [r3, #40] @ 0x28 800e90c: 2b00 cmp r3, #0 800e90e: d109 bne.n 800e924 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 800e910: 687b ldr r3, [r7, #4] 800e912: 2200 movs r2, #0 800e914: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 800e916: 687b ldr r3, [r7, #4] 800e918: 2200 movs r2, #0 800e91a: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 800e91e: 6878 ldr r0, [r7, #4] 800e920: f7fa fe90 bl 8009644 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800e924: 6878 ldr r0, [r7, #4] 800e926: f000 fbf1 bl 800f10c 800e92a: 4603 mov r3, r0 800e92c: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 800e92e: 687b ldr r3, [r7, #4] 800e930: 6a9b ldr r3, [r3, #40] @ 0x28 800e932: f003 0310 and.w r3, r3, #16 800e936: 2b00 cmp r3, #0 800e938: f040 8099 bne.w 800ea6e 800e93c: 7dfb ldrb r3, [r7, #23] 800e93e: 2b00 cmp r3, #0 800e940: f040 8095 bne.w 800ea6e (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800e944: 687b ldr r3, [r7, #4] 800e946: 6a9b ldr r3, [r3, #40] @ 0x28 800e948: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800e94c: f023 0302 bic.w r3, r3, #2 800e950: f043 0202 orr.w r2, r3, #2 800e954: 687b ldr r3, [r7, #4] 800e956: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 800e958: 687b ldr r3, [r7, #4] 800e95a: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800e95c: 687b ldr r3, [r7, #4] 800e95e: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 800e960: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 800e962: 687b ldr r3, [r7, #4] 800e964: 7b1b ldrb r3, [r3, #12] 800e966: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800e968: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 800e96a: 68ba ldr r2, [r7, #8] 800e96c: 4313 orrs r3, r2 800e96e: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 800e970: 687b ldr r3, [r7, #4] 800e972: 689b ldr r3, [r3, #8] 800e974: f5b3 7f80 cmp.w r3, #256 @ 0x100 800e978: d003 beq.n 800e982 800e97a: 687b ldr r3, [r7, #4] 800e97c: 689b ldr r3, [r3, #8] 800e97e: 2b01 cmp r3, #1 800e980: d102 bne.n 800e988 800e982: f44f 7380 mov.w r3, #256 @ 0x100 800e986: e000 b.n 800e98a 800e988: 2300 movs r3, #0 800e98a: 693a ldr r2, [r7, #16] 800e98c: 4313 orrs r3, r2 800e98e: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 800e990: 687b ldr r3, [r7, #4] 800e992: 7d1b ldrb r3, [r3, #20] 800e994: 2b01 cmp r3, #1 800e996: d119 bne.n 800e9cc { if (hadc->Init.ContinuousConvMode == DISABLE) 800e998: 687b ldr r3, [r7, #4] 800e99a: 7b1b ldrb r3, [r3, #12] 800e99c: 2b00 cmp r3, #0 800e99e: d109 bne.n 800e9b4 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 800e9a0: 687b ldr r3, [r7, #4] 800e9a2: 699b ldr r3, [r3, #24] 800e9a4: 3b01 subs r3, #1 800e9a6: 035a lsls r2, r3, #13 800e9a8: 693b ldr r3, [r7, #16] 800e9aa: 4313 orrs r3, r2 800e9ac: f443 6300 orr.w r3, r3, #2048 @ 0x800 800e9b0: 613b str r3, [r7, #16] 800e9b2: e00b b.n 800e9cc { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800e9b4: 687b ldr r3, [r7, #4] 800e9b6: 6a9b ldr r3, [r3, #40] @ 0x28 800e9b8: f043 0220 orr.w r2, r3, #32 800e9bc: 687b ldr r3, [r7, #4] 800e9be: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800e9c0: 687b ldr r3, [r7, #4] 800e9c2: 6adb ldr r3, [r3, #44] @ 0x2c 800e9c4: f043 0201 orr.w r2, r3, #1 800e9c8: 687b ldr r3, [r7, #4] 800e9ca: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 800e9cc: 687b ldr r3, [r7, #4] 800e9ce: 681b ldr r3, [r3, #0] 800e9d0: 685b ldr r3, [r3, #4] 800e9d2: f423 4169 bic.w r1, r3, #59648 @ 0xe900 800e9d6: 687b ldr r3, [r7, #4] 800e9d8: 681b ldr r3, [r3, #0] 800e9da: 693a ldr r2, [r7, #16] 800e9dc: 430a orrs r2, r1 800e9de: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 800e9e0: 687b ldr r3, [r7, #4] 800e9e2: 681b ldr r3, [r3, #0] 800e9e4: 689a ldr r2, [r3, #8] 800e9e6: 4b28 ldr r3, [pc, #160] @ (800ea88 ) 800e9e8: 4013 ands r3, r2 800e9ea: 687a ldr r2, [r7, #4] 800e9ec: 6812 ldr r2, [r2, #0] 800e9ee: 68b9 ldr r1, [r7, #8] 800e9f0: 430b orrs r3, r1 800e9f2: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 800e9f4: 687b ldr r3, [r7, #4] 800e9f6: 689b ldr r3, [r3, #8] 800e9f8: f5b3 7f80 cmp.w r3, #256 @ 0x100 800e9fc: d003 beq.n 800ea06 800e9fe: 687b ldr r3, [r7, #4] 800ea00: 689b ldr r3, [r3, #8] 800ea02: 2b01 cmp r3, #1 800ea04: d104 bne.n 800ea10 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 800ea06: 687b ldr r3, [r7, #4] 800ea08: 691b ldr r3, [r3, #16] 800ea0a: 3b01 subs r3, #1 800ea0c: 051b lsls r3, r3, #20 800ea0e: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 800ea10: 687b ldr r3, [r7, #4] 800ea12: 681b ldr r3, [r3, #0] 800ea14: 6adb ldr r3, [r3, #44] @ 0x2c 800ea16: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 800ea1a: 687b ldr r3, [r7, #4] 800ea1c: 681b ldr r3, [r3, #0] 800ea1e: 68fa ldr r2, [r7, #12] 800ea20: 430a orrs r2, r1 800ea22: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800ea24: 687b ldr r3, [r7, #4] 800ea26: 681b ldr r3, [r3, #0] 800ea28: 689a ldr r2, [r3, #8] 800ea2a: 4b18 ldr r3, [pc, #96] @ (800ea8c ) 800ea2c: 4013 ands r3, r2 800ea2e: 68ba ldr r2, [r7, #8] 800ea30: 429a cmp r2, r3 800ea32: d10b bne.n 800ea4c ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 800ea34: 687b ldr r3, [r7, #4] 800ea36: 2200 movs r2, #0 800ea38: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 800ea3a: 687b ldr r3, [r7, #4] 800ea3c: 6a9b ldr r3, [r3, #40] @ 0x28 800ea3e: f023 0303 bic.w r3, r3, #3 800ea42: f043 0201 orr.w r2, r3, #1 800ea46: 687b ldr r3, [r7, #4] 800ea48: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800ea4a: e018 b.n 800ea7e HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800ea4c: 687b ldr r3, [r7, #4] 800ea4e: 6a9b ldr r3, [r3, #40] @ 0x28 800ea50: f023 0312 bic.w r3, r3, #18 800ea54: f043 0210 orr.w r2, r3, #16 800ea58: 687b ldr r3, [r7, #4] 800ea5a: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800ea5c: 687b ldr r3, [r7, #4] 800ea5e: 6adb ldr r3, [r3, #44] @ 0x2c 800ea60: f043 0201 orr.w r2, r3, #1 800ea64: 687b ldr r3, [r7, #4] 800ea66: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 800ea68: 2301 movs r3, #1 800ea6a: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800ea6c: e007 b.n 800ea7e } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800ea6e: 687b ldr r3, [r7, #4] 800ea70: 6a9b ldr r3, [r3, #40] @ 0x28 800ea72: f043 0210 orr.w r2, r3, #16 800ea76: 687b ldr r3, [r7, #4] 800ea78: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 800ea7a: 2301 movs r3, #1 800ea7c: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 800ea7e: 7dfb ldrb r3, [r7, #23] } 800ea80: 4618 mov r0, r3 800ea82: 3718 adds r7, #24 800ea84: 46bd mov sp, r7 800ea86: bd80 pop {r7, pc} 800ea88: ffe1f7fd .word 0xffe1f7fd 800ea8c: ff1f0efe .word 0xff1f0efe 0800ea90 : * Interruptions enabled in this function: None. * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) { 800ea90: b580 push {r7, lr} 800ea92: b084 sub sp, #16 800ea94: af00 add r7, sp, #0 800ea96: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800ea98: 2300 movs r3, #0 800ea9a: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800ea9c: 687b ldr r3, [r7, #4] 800ea9e: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800eaa2: 2b01 cmp r3, #1 800eaa4: d101 bne.n 800eaaa 800eaa6: 2302 movs r3, #2 800eaa8: e098 b.n 800ebdc 800eaaa: 687b ldr r3, [r7, #4] 800eaac: 2201 movs r2, #1 800eaae: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 800eab2: 6878 ldr r0, [r7, #4] 800eab4: f000 fad0 bl 800f058 800eab8: 4603 mov r3, r0 800eaba: 73fb strb r3, [r7, #15] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 800eabc: 7bfb ldrb r3, [r7, #15] 800eabe: 2b00 cmp r3, #0 800eac0: f040 8087 bne.w 800ebd2 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 800eac4: 687b ldr r3, [r7, #4] 800eac6: 6a9b ldr r3, [r3, #40] @ 0x28 800eac8: f423 7340 bic.w r3, r3, #768 @ 0x300 800eacc: f023 0301 bic.w r3, r3, #1 800ead0: f443 7280 orr.w r2, r3, #256 @ 0x100 800ead4: 687b ldr r3, [r7, #4] 800ead6: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 800ead8: 687b ldr r3, [r7, #4] 800eada: 681b ldr r3, [r3, #0] 800eadc: 4a41 ldr r2, [pc, #260] @ (800ebe4 ) 800eade: 4293 cmp r3, r2 800eae0: d105 bne.n 800eaee 800eae2: 4b41 ldr r3, [pc, #260] @ (800ebe8 ) 800eae4: 685b ldr r3, [r3, #4] 800eae6: f403 2370 and.w r3, r3, #983040 @ 0xf0000 800eaea: 2b00 cmp r3, #0 800eaec: d115 bne.n 800eb1a { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800eaee: 687b ldr r3, [r7, #4] 800eaf0: 6a9b ldr r3, [r3, #40] @ 0x28 800eaf2: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 800eaf6: 687b ldr r3, [r7, #4] 800eaf8: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800eafa: 687b ldr r3, [r7, #4] 800eafc: 681b ldr r3, [r3, #0] 800eafe: 685b ldr r3, [r3, #4] 800eb00: f403 6380 and.w r3, r3, #1024 @ 0x400 800eb04: 2b00 cmp r3, #0 800eb06: d026 beq.n 800eb56 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800eb08: 687b ldr r3, [r7, #4] 800eb0a: 6a9b ldr r3, [r3, #40] @ 0x28 800eb0c: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800eb10: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800eb14: 687b ldr r3, [r7, #4] 800eb16: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800eb18: e01d b.n 800eb56 } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800eb1a: 687b ldr r3, [r7, #4] 800eb1c: 6a9b ldr r3, [r3, #40] @ 0x28 800eb1e: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800eb22: 687b ldr r3, [r7, #4] 800eb24: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 800eb26: 687b ldr r3, [r7, #4] 800eb28: 681b ldr r3, [r3, #0] 800eb2a: 4a2f ldr r2, [pc, #188] @ (800ebe8 ) 800eb2c: 4293 cmp r3, r2 800eb2e: d004 beq.n 800eb3a 800eb30: 687b ldr r3, [r7, #4] 800eb32: 681b ldr r3, [r3, #0] 800eb34: 4a2b ldr r2, [pc, #172] @ (800ebe4 ) 800eb36: 4293 cmp r3, r2 800eb38: d10d bne.n 800eb56 800eb3a: 4b2b ldr r3, [pc, #172] @ (800ebe8 ) 800eb3c: 685b ldr r3, [r3, #4] 800eb3e: f403 6380 and.w r3, r3, #1024 @ 0x400 800eb42: 2b00 cmp r3, #0 800eb44: d007 beq.n 800eb56 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800eb46: 687b ldr r3, [r7, #4] 800eb48: 6a9b ldr r3, [r3, #40] @ 0x28 800eb4a: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800eb4e: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800eb52: 687b ldr r3, [r7, #4] 800eb54: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800eb56: 687b ldr r3, [r7, #4] 800eb58: 6a9b ldr r3, [r3, #40] @ 0x28 800eb5a: f403 5380 and.w r3, r3, #4096 @ 0x1000 800eb5e: 2b00 cmp r3, #0 800eb60: d006 beq.n 800eb70 { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 800eb62: 687b ldr r3, [r7, #4] 800eb64: 6adb ldr r3, [r3, #44] @ 0x2c 800eb66: f023 0206 bic.w r2, r3, #6 800eb6a: 687b ldr r3, [r7, #4] 800eb6c: 62da str r2, [r3, #44] @ 0x2c 800eb6e: e002 b.n 800eb76 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 800eb70: 687b ldr r3, [r7, #4] 800eb72: 2200 movs r2, #0 800eb74: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 800eb76: 687b ldr r3, [r7, #4] 800eb78: 2200 movs r2, #0 800eb7a: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Clear regular group conversion flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 800eb7e: 687b ldr r3, [r7, #4] 800eb80: 681b ldr r3, [r3, #0] 800eb82: f06f 0202 mvn.w r2, #2 800eb86: 601a str r2, [r3, #0] /* - if ADC is slave, ADC is enabled only (conversion is not started). */ /* - if ADC is master, ADC is enabled and conversion is started. */ /* If ADC is master, ADC is enabled and conversion is started. */ /* Note: Alternate trigger for single conversion could be to force an */ /* additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/ if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800eb88: 687b ldr r3, [r7, #4] 800eb8a: 681b ldr r3, [r3, #0] 800eb8c: 689b ldr r3, [r3, #8] 800eb8e: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800eb92: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800eb96: d113 bne.n 800ebc0 ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) ) 800eb98: 687b ldr r3, [r7, #4] 800eb9a: 681b ldr r3, [r3, #0] if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800eb9c: 4a11 ldr r2, [pc, #68] @ (800ebe4 ) 800eb9e: 4293 cmp r3, r2 800eba0: d105 bne.n 800ebae ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) ) 800eba2: 4b11 ldr r3, [pc, #68] @ (800ebe8 ) 800eba4: 685b ldr r3, [r3, #4] 800eba6: f403 2370 and.w r3, r3, #983040 @ 0xf0000 if (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ebaa: 2b00 cmp r3, #0 800ebac: d108 bne.n 800ebc0 { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 800ebae: 687b ldr r3, [r7, #4] 800ebb0: 681b ldr r3, [r3, #0] 800ebb2: 689a ldr r2, [r3, #8] 800ebb4: 687b ldr r3, [r7, #4] 800ebb6: 681b ldr r3, [r3, #0] 800ebb8: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 800ebbc: 609a str r2, [r3, #8] 800ebbe: e00c b.n 800ebda } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 800ebc0: 687b ldr r3, [r7, #4] 800ebc2: 681b ldr r3, [r3, #0] 800ebc4: 689a ldr r2, [r3, #8] 800ebc6: 687b ldr r3, [r7, #4] 800ebc8: 681b ldr r3, [r3, #0] 800ebca: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 800ebce: 609a str r2, [r3, #8] 800ebd0: e003 b.n 800ebda } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 800ebd2: 687b ldr r3, [r7, #4] 800ebd4: 2200 movs r2, #0 800ebd6: f883 2024 strb.w r2, [r3, #36] @ 0x24 } /* Return function status */ return tmp_hal_status; 800ebda: 7bfb ldrb r3, [r7, #15] } 800ebdc: 4618 mov r0, r3 800ebde: 3710 adds r7, #16 800ebe0: 46bd mov sp, r7 800ebe2: bd80 pop {r7, pc} 800ebe4: 40012800 .word 0x40012800 800ebe8: 40012400 .word 0x40012400 0800ebec : * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) { 800ebec: b580 push {r7, lr} 800ebee: b084 sub sp, #16 800ebf0: af00 add r7, sp, #0 800ebf2: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800ebf4: 2300 movs r3, #0 800ebf6: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800ebf8: 687b ldr r3, [r7, #4] 800ebfa: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800ebfe: 2b01 cmp r3, #1 800ec00: d101 bne.n 800ec06 800ec02: 2302 movs r3, #2 800ec04: e01a b.n 800ec3c 800ec06: 687b ldr r3, [r7, #4] 800ec08: 2201 movs r2, #1 800ec0a: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800ec0e: 6878 ldr r0, [r7, #4] 800ec10: f000 fa7c bl 800f10c 800ec14: 4603 mov r3, r0 800ec16: 73fb strb r3, [r7, #15] /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) 800ec18: 7bfb ldrb r3, [r7, #15] 800ec1a: 2b00 cmp r3, #0 800ec1c: d109 bne.n 800ec32 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800ec1e: 687b ldr r3, [r7, #4] 800ec20: 6a9b ldr r3, [r3, #40] @ 0x28 800ec22: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800ec26: f023 0301 bic.w r3, r3, #1 800ec2a: f043 0201 orr.w r2, r3, #1 800ec2e: 687b ldr r3, [r7, #4] 800ec30: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 800ec32: 687b ldr r3, [r7, #4] 800ec34: 2200 movs r2, #0 800ec36: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800ec3a: 7bfb ldrb r3, [r7, #15] } 800ec3c: 4618 mov r0, r3 800ec3e: 3710 adds r7, #16 800ec40: 46bd mov sp, r7 800ec42: bd80 pop {r7, pc} 0800ec44 : * @param hadc: ADC handle * @param Timeout: Timeout value in millisecond. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) { 800ec44: b590 push {r4, r7, lr} 800ec46: b087 sub sp, #28 800ec48: af00 add r7, sp, #0 800ec4a: 6078 str r0, [r7, #4] 800ec4c: 6039 str r1, [r7, #0] uint32_t tickstart = 0U; 800ec4e: 2300 movs r3, #0 800ec50: 617b str r3, [r7, #20] /* Variables for polling in case of scan mode enabled and polling for each */ /* conversion. */ __IO uint32_t Conversion_Timeout_CPU_cycles = 0U; 800ec52: 2300 movs r3, #0 800ec54: 60fb str r3, [r7, #12] uint32_t Conversion_Timeout_CPU_cycles_max = 0U; 800ec56: 2300 movs r3, #0 800ec58: 613b str r3, [r7, #16] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Get tick count */ tickstart = HAL_GetTick(); 800ec5a: f7ff fe13 bl 800e884 800ec5e: 6178 str r0, [r7, #20] /* Verification that ADC configuration is compliant with polling for */ /* each conversion: */ /* Particular case is ADC configured in DMA mode */ if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA)) 800ec60: 687b ldr r3, [r7, #4] 800ec62: 681b ldr r3, [r3, #0] 800ec64: 689b ldr r3, [r3, #8] 800ec66: f403 7380 and.w r3, r3, #256 @ 0x100 800ec6a: 2b00 cmp r3, #0 800ec6c: d00b beq.n 800ec86 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800ec6e: 687b ldr r3, [r7, #4] 800ec70: 6a9b ldr r3, [r3, #40] @ 0x28 800ec72: f043 0220 orr.w r2, r3, #32 800ec76: 687b ldr r3, [r7, #4] 800ec78: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 800ec7a: 687b ldr r3, [r7, #4] 800ec7c: 2200 movs r2, #0 800ec7e: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800ec82: 2301 movs r3, #1 800ec84: e0d3 b.n 800ee2e /* from ADC conversion time (selected sampling time + conversion time of */ /* 12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on */ /* settings, conversion time range can be from 28 to 32256 CPU cycles). */ /* As flag EOC is not set after each conversion, no timeout status can */ /* be set. */ if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 800ec86: 687b ldr r3, [r7, #4] 800ec88: 681b ldr r3, [r3, #0] 800ec8a: 685b ldr r3, [r3, #4] 800ec8c: f403 7380 and.w r3, r3, #256 @ 0x100 800ec90: 2b00 cmp r3, #0 800ec92: d131 bne.n 800ecf8 HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ) 800ec94: 687b ldr r3, [r7, #4] 800ec96: 681b ldr r3, [r3, #0] 800ec98: 6adb ldr r3, [r3, #44] @ 0x2c 800ec9a: f403 0370 and.w r3, r3, #15728640 @ 0xf00000 if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 800ec9e: 2b00 cmp r3, #0 800eca0: d12a bne.n 800ecf8 { /* Wait until End of Conversion flag is raised */ while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 800eca2: e021 b.n 800ece8 { /* Check if timeout is disabled (set to infinite wait) */ if(Timeout != HAL_MAX_DELAY) 800eca4: 683b ldr r3, [r7, #0] 800eca6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800ecaa: d01d beq.n 800ece8 { if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout)) 800ecac: 683b ldr r3, [r7, #0] 800ecae: 2b00 cmp r3, #0 800ecb0: d007 beq.n 800ecc2 800ecb2: f7ff fde7 bl 800e884 800ecb6: 4602 mov r2, r0 800ecb8: 697b ldr r3, [r7, #20] 800ecba: 1ad3 subs r3, r2, r3 800ecbc: 683a ldr r2, [r7, #0] 800ecbe: 429a cmp r2, r3 800ecc0: d212 bcs.n 800ece8 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 800ecc2: 687b ldr r3, [r7, #4] 800ecc4: 681b ldr r3, [r3, #0] 800ecc6: 681b ldr r3, [r3, #0] 800ecc8: f003 0302 and.w r3, r3, #2 800eccc: 2b00 cmp r3, #0 800ecce: d10b bne.n 800ece8 { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 800ecd0: 687b ldr r3, [r7, #4] 800ecd2: 6a9b ldr r3, [r3, #40] @ 0x28 800ecd4: f043 0204 orr.w r2, r3, #4 800ecd8: 687b ldr r3, [r7, #4] 800ecda: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 800ecdc: 687b ldr r3, [r7, #4] 800ecde: 2200 movs r2, #0 800ece0: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_TIMEOUT; 800ece4: 2303 movs r3, #3 800ece6: e0a2 b.n 800ee2e while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) 800ece8: 687b ldr r3, [r7, #4] 800ecea: 681b ldr r3, [r3, #0] 800ecec: 681b ldr r3, [r3, #0] 800ecee: f003 0302 and.w r3, r3, #2 800ecf2: 2b00 cmp r3, #0 800ecf4: d0d6 beq.n 800eca4 if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) && 800ecf6: e070 b.n 800edda /* Replace polling by wait for maximum conversion time */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles */ /* and ADC maximum conversion cycles on all channels. */ /* - Wait for the expected ADC clock cycles delay */ Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 800ecf8: 4b4f ldr r3, [pc, #316] @ (800ee38 ) 800ecfa: 681c ldr r4, [r3, #0] 800ecfc: 2002 movs r0, #2 800ecfe: f002 fcfb bl 80116f8 800ed02: 4603 mov r3, r0 800ed04: fbb4 f2f3 udiv r2, r4, r3 * ADC_CONVCYCLES_MAX_RANGE(hadc) ); 800ed08: 687b ldr r3, [r7, #4] 800ed0a: 681b ldr r3, [r3, #0] 800ed0c: 6919 ldr r1, [r3, #16] 800ed0e: 4b4b ldr r3, [pc, #300] @ (800ee3c ) 800ed10: 400b ands r3, r1 800ed12: 2b00 cmp r3, #0 800ed14: d118 bne.n 800ed48 800ed16: 687b ldr r3, [r7, #4] 800ed18: 681b ldr r3, [r3, #0] 800ed1a: 68d9 ldr r1, [r3, #12] 800ed1c: 4b48 ldr r3, [pc, #288] @ (800ee40 ) 800ed1e: 400b ands r3, r1 800ed20: 2b00 cmp r3, #0 800ed22: d111 bne.n 800ed48 800ed24: 687b ldr r3, [r7, #4] 800ed26: 681b ldr r3, [r3, #0] 800ed28: 6919 ldr r1, [r3, #16] 800ed2a: 4b46 ldr r3, [pc, #280] @ (800ee44 ) 800ed2c: 400b ands r3, r1 800ed2e: 2b00 cmp r3, #0 800ed30: d108 bne.n 800ed44 800ed32: 687b ldr r3, [r7, #4] 800ed34: 681b ldr r3, [r3, #0] 800ed36: 68d9 ldr r1, [r3, #12] 800ed38: 4b43 ldr r3, [pc, #268] @ (800ee48 ) 800ed3a: 400b ands r3, r1 800ed3c: 2b00 cmp r3, #0 800ed3e: d101 bne.n 800ed44 800ed40: 2314 movs r3, #20 800ed42: e020 b.n 800ed86 800ed44: 2329 movs r3, #41 @ 0x29 800ed46: e01e b.n 800ed86 800ed48: 687b ldr r3, [r7, #4] 800ed4a: 681b ldr r3, [r3, #0] 800ed4c: 6919 ldr r1, [r3, #16] 800ed4e: 4b3d ldr r3, [pc, #244] @ (800ee44 ) 800ed50: 400b ands r3, r1 800ed52: 2b00 cmp r3, #0 800ed54: d106 bne.n 800ed64 800ed56: 687b ldr r3, [r7, #4] 800ed58: 681b ldr r3, [r3, #0] 800ed5a: 68d9 ldr r1, [r3, #12] 800ed5c: 4b3a ldr r3, [pc, #232] @ (800ee48 ) 800ed5e: 400b ands r3, r1 800ed60: 2b00 cmp r3, #0 800ed62: d00d beq.n 800ed80 800ed64: 687b ldr r3, [r7, #4] 800ed66: 681b ldr r3, [r3, #0] 800ed68: 6919 ldr r1, [r3, #16] 800ed6a: 4b38 ldr r3, [pc, #224] @ (800ee4c ) 800ed6c: 400b ands r3, r1 800ed6e: 2b00 cmp r3, #0 800ed70: d108 bne.n 800ed84 800ed72: 687b ldr r3, [r7, #4] 800ed74: 681b ldr r3, [r3, #0] 800ed76: 68d9 ldr r1, [r3, #12] 800ed78: 4b34 ldr r3, [pc, #208] @ (800ee4c ) 800ed7a: 400b ands r3, r1 800ed7c: 2b00 cmp r3, #0 800ed7e: d101 bne.n 800ed84 800ed80: 2354 movs r3, #84 @ 0x54 800ed82: e000 b.n 800ed86 800ed84: 23fc movs r3, #252 @ 0xfc Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock 800ed86: fb02 f303 mul.w r3, r2, r3 800ed8a: 613b str r3, [r7, #16] while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 800ed8c: e021 b.n 800edd2 { /* Check if timeout is disabled (set to infinite wait) */ if(Timeout != HAL_MAX_DELAY) 800ed8e: 683b ldr r3, [r7, #0] 800ed90: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800ed94: d01a beq.n 800edcc { if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) 800ed96: 683b ldr r3, [r7, #0] 800ed98: 2b00 cmp r3, #0 800ed9a: d007 beq.n 800edac 800ed9c: f7ff fd72 bl 800e884 800eda0: 4602 mov r2, r0 800eda2: 697b ldr r3, [r7, #20] 800eda4: 1ad3 subs r3, r2, r3 800eda6: 683a ldr r2, [r7, #0] 800eda8: 429a cmp r2, r3 800edaa: d20f bcs.n 800edcc { /* New check to avoid false timeout detection in case of preemption */ if(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 800edac: 68fb ldr r3, [r7, #12] 800edae: 693a ldr r2, [r7, #16] 800edb0: 429a cmp r2, r3 800edb2: d90b bls.n 800edcc { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 800edb4: 687b ldr r3, [r7, #4] 800edb6: 6a9b ldr r3, [r3, #40] @ 0x28 800edb8: f043 0204 orr.w r2, r3, #4 800edbc: 687b ldr r3, [r7, #4] 800edbe: 629a str r2, [r3, #40] @ 0x28 /* Process unlocked */ __HAL_UNLOCK(hadc); 800edc0: 687b ldr r3, [r7, #4] 800edc2: 2200 movs r2, #0 800edc4: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_TIMEOUT; 800edc8: 2303 movs r3, #3 800edca: e030 b.n 800ee2e } } } Conversion_Timeout_CPU_cycles ++; 800edcc: 68fb ldr r3, [r7, #12] 800edce: 3301 adds r3, #1 800edd0: 60fb str r3, [r7, #12] while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max) 800edd2: 68fb ldr r3, [r7, #12] 800edd4: 693a ldr r2, [r7, #16] 800edd6: 429a cmp r2, r3 800edd8: d8d9 bhi.n 800ed8e } } /* Clear regular group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC); 800edda: 687b ldr r3, [r7, #4] 800eddc: 681b ldr r3, [r3, #0] 800edde: f06f 0212 mvn.w r2, #18 800ede2: 601a str r2, [r3, #0] /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 800ede4: 687b ldr r3, [r7, #4] 800ede6: 6a9b ldr r3, [r3, #40] @ 0x28 800ede8: f443 7200 orr.w r2, r3, #512 @ 0x200 800edec: 687b ldr r3, [r7, #4] 800edee: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800edf0: 687b ldr r3, [r7, #4] 800edf2: 681b ldr r3, [r3, #0] 800edf4: 689b ldr r3, [r3, #8] 800edf6: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800edfa: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800edfe: d115 bne.n 800ee2c (hadc->Init.ContinuousConvMode == DISABLE) ) 800ee00: 687b ldr r3, [r7, #4] 800ee02: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800ee04: 2b00 cmp r3, #0 800ee06: d111 bne.n 800ee2c { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 800ee08: 687b ldr r3, [r7, #4] 800ee0a: 6a9b ldr r3, [r3, #40] @ 0x28 800ee0c: f423 7280 bic.w r2, r3, #256 @ 0x100 800ee10: 687b ldr r3, [r7, #4] 800ee12: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800ee14: 687b ldr r3, [r7, #4] 800ee16: 6a9b ldr r3, [r3, #40] @ 0x28 800ee18: f403 5380 and.w r3, r3, #4096 @ 0x1000 800ee1c: 2b00 cmp r3, #0 800ee1e: d105 bne.n 800ee2c { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 800ee20: 687b ldr r3, [r7, #4] 800ee22: 6a9b ldr r3, [r3, #40] @ 0x28 800ee24: f043 0201 orr.w r2, r3, #1 800ee28: 687b ldr r3, [r7, #4] 800ee2a: 629a str r2, [r3, #40] @ 0x28 } } /* Return ADC state */ return HAL_OK; 800ee2c: 2300 movs r3, #0 } 800ee2e: 4618 mov r0, r3 800ee30: 371c adds r7, #28 800ee32: 46bd mov sp, r7 800ee34: bd90 pop {r4, r7, pc} 800ee36: bf00 nop 800ee38: 20000078 .word 0x20000078 800ee3c: 24924924 .word 0x24924924 800ee40: 00924924 .word 0x00924924 800ee44: 12492492 .word 0x12492492 800ee48: 00492492 .word 0x00492492 800ee4c: 00249249 .word 0x00249249 0800ee50 : * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). * @param hadc: ADC handle * @retval ADC group regular conversion data */ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) { 800ee50: b480 push {r7} 800ee52: b083 sub sp, #12 800ee54: af00 add r7, sp, #0 800ee56: 6078 str r0, [r7, #4] /* Note: EOC flag is not cleared here by software because automatically */ /* cleared by hardware when reading register DR. */ /* Return ADC converted value */ return hadc->Instance->DR; 800ee58: 687b ldr r3, [r7, #4] 800ee5a: 681b ldr r3, [r3, #0] 800ee5c: 6cdb ldr r3, [r3, #76] @ 0x4c } 800ee5e: 4618 mov r0, r3 800ee60: 370c adds r7, #12 800ee62: 46bd mov sp, r7 800ee64: bc80 pop {r7} 800ee66: 4770 bx lr 0800ee68 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 800ee68: b480 push {r7} 800ee6a: b085 sub sp, #20 800ee6c: af00 add r7, sp, #0 800ee6e: 6078 str r0, [r7, #4] 800ee70: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800ee72: 2300 movs r3, #0 800ee74: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 800ee76: 2300 movs r3, #0 800ee78: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 800ee7a: 687b ldr r3, [r7, #4] 800ee7c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800ee80: 2b01 cmp r3, #1 800ee82: d101 bne.n 800ee88 800ee84: 2302 movs r3, #2 800ee86: e0dc b.n 800f042 800ee88: 687b ldr r3, [r7, #4] 800ee8a: 2201 movs r2, #1 800ee8c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 800ee90: 683b ldr r3, [r7, #0] 800ee92: 685b ldr r3, [r3, #4] 800ee94: 2b06 cmp r3, #6 800ee96: d81c bhi.n 800eed2 { MODIFY_REG(hadc->Instance->SQR3 , 800ee98: 687b ldr r3, [r7, #4] 800ee9a: 681b ldr r3, [r3, #0] 800ee9c: 6b59 ldr r1, [r3, #52] @ 0x34 800ee9e: 683b ldr r3, [r7, #0] 800eea0: 685a ldr r2, [r3, #4] 800eea2: 4613 mov r3, r2 800eea4: 009b lsls r3, r3, #2 800eea6: 4413 add r3, r2 800eea8: 3b05 subs r3, #5 800eeaa: 221f movs r2, #31 800eeac: fa02 f303 lsl.w r3, r2, r3 800eeb0: 43db mvns r3, r3 800eeb2: 4019 ands r1, r3 800eeb4: 683b ldr r3, [r7, #0] 800eeb6: 6818 ldr r0, [r3, #0] 800eeb8: 683b ldr r3, [r7, #0] 800eeba: 685a ldr r2, [r3, #4] 800eebc: 4613 mov r3, r2 800eebe: 009b lsls r3, r3, #2 800eec0: 4413 add r3, r2 800eec2: 3b05 subs r3, #5 800eec4: fa00 f203 lsl.w r2, r0, r3 800eec8: 687b ldr r3, [r7, #4] 800eeca: 681b ldr r3, [r3, #0] 800eecc: 430a orrs r2, r1 800eece: 635a str r2, [r3, #52] @ 0x34 800eed0: e03c b.n 800ef4c ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 800eed2: 683b ldr r3, [r7, #0] 800eed4: 685b ldr r3, [r3, #4] 800eed6: 2b0c cmp r3, #12 800eed8: d81c bhi.n 800ef14 { MODIFY_REG(hadc->Instance->SQR2 , 800eeda: 687b ldr r3, [r7, #4] 800eedc: 681b ldr r3, [r3, #0] 800eede: 6b19 ldr r1, [r3, #48] @ 0x30 800eee0: 683b ldr r3, [r7, #0] 800eee2: 685a ldr r2, [r3, #4] 800eee4: 4613 mov r3, r2 800eee6: 009b lsls r3, r3, #2 800eee8: 4413 add r3, r2 800eeea: 3b23 subs r3, #35 @ 0x23 800eeec: 221f movs r2, #31 800eeee: fa02 f303 lsl.w r3, r2, r3 800eef2: 43db mvns r3, r3 800eef4: 4019 ands r1, r3 800eef6: 683b ldr r3, [r7, #0] 800eef8: 6818 ldr r0, [r3, #0] 800eefa: 683b ldr r3, [r7, #0] 800eefc: 685a ldr r2, [r3, #4] 800eefe: 4613 mov r3, r2 800ef00: 009b lsls r3, r3, #2 800ef02: 4413 add r3, r2 800ef04: 3b23 subs r3, #35 @ 0x23 800ef06: fa00 f203 lsl.w r2, r0, r3 800ef0a: 687b ldr r3, [r7, #4] 800ef0c: 681b ldr r3, [r3, #0] 800ef0e: 430a orrs r2, r1 800ef10: 631a str r2, [r3, #48] @ 0x30 800ef12: e01b b.n 800ef4c ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 800ef14: 687b ldr r3, [r7, #4] 800ef16: 681b ldr r3, [r3, #0] 800ef18: 6ad9 ldr r1, [r3, #44] @ 0x2c 800ef1a: 683b ldr r3, [r7, #0] 800ef1c: 685a ldr r2, [r3, #4] 800ef1e: 4613 mov r3, r2 800ef20: 009b lsls r3, r3, #2 800ef22: 4413 add r3, r2 800ef24: 3b41 subs r3, #65 @ 0x41 800ef26: 221f movs r2, #31 800ef28: fa02 f303 lsl.w r3, r2, r3 800ef2c: 43db mvns r3, r3 800ef2e: 4019 ands r1, r3 800ef30: 683b ldr r3, [r7, #0] 800ef32: 6818 ldr r0, [r3, #0] 800ef34: 683b ldr r3, [r7, #0] 800ef36: 685a ldr r2, [r3, #4] 800ef38: 4613 mov r3, r2 800ef3a: 009b lsls r3, r3, #2 800ef3c: 4413 add r3, r2 800ef3e: 3b41 subs r3, #65 @ 0x41 800ef40: fa00 f203 lsl.w r2, r0, r3 800ef44: 687b ldr r3, [r7, #4] 800ef46: 681b ldr r3, [r3, #0] 800ef48: 430a orrs r2, r1 800ef4a: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 800ef4c: 683b ldr r3, [r7, #0] 800ef4e: 681b ldr r3, [r3, #0] 800ef50: 2b09 cmp r3, #9 800ef52: d91c bls.n 800ef8e { MODIFY_REG(hadc->Instance->SMPR1 , 800ef54: 687b ldr r3, [r7, #4] 800ef56: 681b ldr r3, [r3, #0] 800ef58: 68d9 ldr r1, [r3, #12] 800ef5a: 683b ldr r3, [r7, #0] 800ef5c: 681a ldr r2, [r3, #0] 800ef5e: 4613 mov r3, r2 800ef60: 005b lsls r3, r3, #1 800ef62: 4413 add r3, r2 800ef64: 3b1e subs r3, #30 800ef66: 2207 movs r2, #7 800ef68: fa02 f303 lsl.w r3, r2, r3 800ef6c: 43db mvns r3, r3 800ef6e: 4019 ands r1, r3 800ef70: 683b ldr r3, [r7, #0] 800ef72: 6898 ldr r0, [r3, #8] 800ef74: 683b ldr r3, [r7, #0] 800ef76: 681a ldr r2, [r3, #0] 800ef78: 4613 mov r3, r2 800ef7a: 005b lsls r3, r3, #1 800ef7c: 4413 add r3, r2 800ef7e: 3b1e subs r3, #30 800ef80: fa00 f203 lsl.w r2, r0, r3 800ef84: 687b ldr r3, [r7, #4] 800ef86: 681b ldr r3, [r3, #0] 800ef88: 430a orrs r2, r1 800ef8a: 60da str r2, [r3, #12] 800ef8c: e019 b.n 800efc2 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 800ef8e: 687b ldr r3, [r7, #4] 800ef90: 681b ldr r3, [r3, #0] 800ef92: 6919 ldr r1, [r3, #16] 800ef94: 683b ldr r3, [r7, #0] 800ef96: 681a ldr r2, [r3, #0] 800ef98: 4613 mov r3, r2 800ef9a: 005b lsls r3, r3, #1 800ef9c: 4413 add r3, r2 800ef9e: 2207 movs r2, #7 800efa0: fa02 f303 lsl.w r3, r2, r3 800efa4: 43db mvns r3, r3 800efa6: 4019 ands r1, r3 800efa8: 683b ldr r3, [r7, #0] 800efaa: 6898 ldr r0, [r3, #8] 800efac: 683b ldr r3, [r7, #0] 800efae: 681a ldr r2, [r3, #0] 800efb0: 4613 mov r3, r2 800efb2: 005b lsls r3, r3, #1 800efb4: 4413 add r3, r2 800efb6: fa00 f203 lsl.w r2, r0, r3 800efba: 687b ldr r3, [r7, #4] 800efbc: 681b ldr r3, [r3, #0] 800efbe: 430a orrs r2, r1 800efc0: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800efc2: 683b ldr r3, [r7, #0] 800efc4: 681b ldr r3, [r3, #0] 800efc6: 2b10 cmp r3, #16 800efc8: d003 beq.n 800efd2 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 800efca: 683b ldr r3, [r7, #0] 800efcc: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800efce: 2b11 cmp r3, #17 800efd0: d132 bne.n 800f038 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 800efd2: 687b ldr r3, [r7, #4] 800efd4: 681b ldr r3, [r3, #0] 800efd6: 4a1d ldr r2, [pc, #116] @ (800f04c ) 800efd8: 4293 cmp r3, r2 800efda: d125 bne.n 800f028 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 800efdc: 687b ldr r3, [r7, #4] 800efde: 681b ldr r3, [r3, #0] 800efe0: 689b ldr r3, [r3, #8] 800efe2: f403 0300 and.w r3, r3, #8388608 @ 0x800000 800efe6: 2b00 cmp r3, #0 800efe8: d126 bne.n 800f038 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 800efea: 687b ldr r3, [r7, #4] 800efec: 681b ldr r3, [r3, #0] 800efee: 689a ldr r2, [r3, #8] 800eff0: 687b ldr r3, [r7, #4] 800eff2: 681b ldr r3, [r3, #0] 800eff4: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 800eff8: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 800effa: 683b ldr r3, [r7, #0] 800effc: 681b ldr r3, [r3, #0] 800effe: 2b10 cmp r3, #16 800f000: d11a bne.n 800f038 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 800f002: 4b13 ldr r3, [pc, #76] @ (800f050 ) 800f004: 681b ldr r3, [r3, #0] 800f006: 4a13 ldr r2, [pc, #76] @ (800f054 ) 800f008: fba2 2303 umull r2, r3, r2, r3 800f00c: 0c9a lsrs r2, r3, #18 800f00e: 4613 mov r3, r2 800f010: 009b lsls r3, r3, #2 800f012: 4413 add r3, r2 800f014: 005b lsls r3, r3, #1 800f016: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800f018: e002 b.n 800f020 { wait_loop_index--; 800f01a: 68bb ldr r3, [r7, #8] 800f01c: 3b01 subs r3, #1 800f01e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800f020: 68bb ldr r3, [r7, #8] 800f022: 2b00 cmp r3, #0 800f024: d1f9 bne.n 800f01a 800f026: e007 b.n 800f038 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800f028: 687b ldr r3, [r7, #4] 800f02a: 6a9b ldr r3, [r3, #40] @ 0x28 800f02c: f043 0220 orr.w r2, r3, #32 800f030: 687b ldr r3, [r7, #4] 800f032: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 800f034: 2301 movs r3, #1 800f036: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 800f038: 687b ldr r3, [r7, #4] 800f03a: 2200 movs r2, #0 800f03c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800f040: 7bfb ldrb r3, [r7, #15] } 800f042: 4618 mov r0, r3 800f044: 3714 adds r7, #20 800f046: 46bd mov sp, r7 800f048: bc80 pop {r7} 800f04a: 4770 bx lr 800f04c: 40012400 .word 0x40012400 800f050: 20000078 .word 0x20000078 800f054: 431bde83 .word 0x431bde83 0800f058 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 800f058: b580 push {r7, lr} 800f05a: b084 sub sp, #16 800f05c: af00 add r7, sp, #0 800f05e: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800f060: 2300 movs r3, #0 800f062: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 800f064: 2300 movs r3, #0 800f066: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 800f068: 687b ldr r3, [r7, #4] 800f06a: 681b ldr r3, [r3, #0] 800f06c: 689b ldr r3, [r3, #8] 800f06e: f003 0301 and.w r3, r3, #1 800f072: 2b01 cmp r3, #1 800f074: d040 beq.n 800f0f8 { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 800f076: 687b ldr r3, [r7, #4] 800f078: 681b ldr r3, [r3, #0] 800f07a: 689a ldr r2, [r3, #8] 800f07c: 687b ldr r3, [r7, #4] 800f07e: 681b ldr r3, [r3, #0] 800f080: f042 0201 orr.w r2, r2, #1 800f084: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 800f086: 4b1f ldr r3, [pc, #124] @ (800f104 ) 800f088: 681b ldr r3, [r3, #0] 800f08a: 4a1f ldr r2, [pc, #124] @ (800f108 ) 800f08c: fba2 2303 umull r2, r3, r2, r3 800f090: 0c9b lsrs r3, r3, #18 800f092: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800f094: e002 b.n 800f09c { wait_loop_index--; 800f096: 68bb ldr r3, [r7, #8] 800f098: 3b01 subs r3, #1 800f09a: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800f09c: 68bb ldr r3, [r7, #8] 800f09e: 2b00 cmp r3, #0 800f0a0: d1f9 bne.n 800f096 } /* Get tick count */ tickstart = HAL_GetTick(); 800f0a2: f7ff fbef bl 800e884 800f0a6: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 800f0a8: e01f b.n 800f0ea { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 800f0aa: f7ff fbeb bl 800e884 800f0ae: 4602 mov r2, r0 800f0b0: 68fb ldr r3, [r7, #12] 800f0b2: 1ad3 subs r3, r2, r3 800f0b4: 2b02 cmp r3, #2 800f0b6: d918 bls.n 800f0ea { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 800f0b8: 687b ldr r3, [r7, #4] 800f0ba: 681b ldr r3, [r3, #0] 800f0bc: 689b ldr r3, [r3, #8] 800f0be: f003 0301 and.w r3, r3, #1 800f0c2: 2b01 cmp r3, #1 800f0c4: d011 beq.n 800f0ea { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800f0c6: 687b ldr r3, [r7, #4] 800f0c8: 6a9b ldr r3, [r3, #40] @ 0x28 800f0ca: f043 0210 orr.w r2, r3, #16 800f0ce: 687b ldr r3, [r7, #4] 800f0d0: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800f0d2: 687b ldr r3, [r7, #4] 800f0d4: 6adb ldr r3, [r3, #44] @ 0x2c 800f0d6: f043 0201 orr.w r2, r3, #1 800f0da: 687b ldr r3, [r7, #4] 800f0dc: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 800f0de: 687b ldr r3, [r7, #4] 800f0e0: 2200 movs r2, #0 800f0e2: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f0e6: 2301 movs r3, #1 800f0e8: e007 b.n 800f0fa while(ADC_IS_ENABLE(hadc) == RESET) 800f0ea: 687b ldr r3, [r7, #4] 800f0ec: 681b ldr r3, [r3, #0] 800f0ee: 689b ldr r3, [r3, #8] 800f0f0: f003 0301 and.w r3, r3, #1 800f0f4: 2b01 cmp r3, #1 800f0f6: d1d8 bne.n 800f0aa } } } /* Return HAL status */ return HAL_OK; 800f0f8: 2300 movs r3, #0 } 800f0fa: 4618 mov r0, r3 800f0fc: 3710 adds r7, #16 800f0fe: 46bd mov sp, r7 800f100: bd80 pop {r7, pc} 800f102: bf00 nop 800f104: 20000078 .word 0x20000078 800f108: 431bde83 .word 0x431bde83 0800f10c : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 800f10c: b580 push {r7, lr} 800f10e: b084 sub sp, #16 800f110: af00 add r7, sp, #0 800f112: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 800f114: 2300 movs r3, #0 800f116: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 800f118: 687b ldr r3, [r7, #4] 800f11a: 681b ldr r3, [r3, #0] 800f11c: 689b ldr r3, [r3, #8] 800f11e: f003 0301 and.w r3, r3, #1 800f122: 2b01 cmp r3, #1 800f124: d12e bne.n 800f184 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 800f126: 687b ldr r3, [r7, #4] 800f128: 681b ldr r3, [r3, #0] 800f12a: 689a ldr r2, [r3, #8] 800f12c: 687b ldr r3, [r7, #4] 800f12e: 681b ldr r3, [r3, #0] 800f130: f022 0201 bic.w r2, r2, #1 800f134: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 800f136: f7ff fba5 bl 800e884 800f13a: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 800f13c: e01b b.n 800f176 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 800f13e: f7ff fba1 bl 800e884 800f142: 4602 mov r2, r0 800f144: 68fb ldr r3, [r7, #12] 800f146: 1ad3 subs r3, r2, r3 800f148: 2b02 cmp r3, #2 800f14a: d914 bls.n 800f176 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 800f14c: 687b ldr r3, [r7, #4] 800f14e: 681b ldr r3, [r3, #0] 800f150: 689b ldr r3, [r3, #8] 800f152: f003 0301 and.w r3, r3, #1 800f156: 2b01 cmp r3, #1 800f158: d10d bne.n 800f176 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800f15a: 687b ldr r3, [r7, #4] 800f15c: 6a9b ldr r3, [r3, #40] @ 0x28 800f15e: f043 0210 orr.w r2, r3, #16 800f162: 687b ldr r3, [r7, #4] 800f164: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800f166: 687b ldr r3, [r7, #4] 800f168: 6adb ldr r3, [r3, #44] @ 0x2c 800f16a: f043 0201 orr.w r2, r3, #1 800f16e: 687b ldr r3, [r7, #4] 800f170: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 800f172: 2301 movs r3, #1 800f174: e007 b.n 800f186 while(ADC_IS_ENABLE(hadc) != RESET) 800f176: 687b ldr r3, [r7, #4] 800f178: 681b ldr r3, [r3, #0] 800f17a: 689b ldr r3, [r3, #8] 800f17c: f003 0301 and.w r3, r3, #1 800f180: 2b01 cmp r3, #1 800f182: d0dc beq.n 800f13e } } } /* Return HAL status */ return HAL_OK; 800f184: 2300 movs r3, #0 } 800f186: 4618 mov r0, r3 800f188: 3710 adds r7, #16 800f18a: 46bd mov sp, r7 800f18c: bd80 pop {r7, pc} ... 0800f190 : * the completion of this function. * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) { 800f190: b590 push {r4, r7, lr} 800f192: b087 sub sp, #28 800f194: af00 add r7, sp, #0 800f196: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800f198: 2300 movs r3, #0 800f19a: 75fb strb r3, [r7, #23] uint32_t tickstart; __IO uint32_t wait_loop_index = 0U; 800f19c: 2300 movs r3, #0 800f19e: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800f1a0: 687b ldr r3, [r7, #4] 800f1a2: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800f1a6: 2b01 cmp r3, #1 800f1a8: d101 bne.n 800f1ae 800f1aa: 2302 movs r3, #2 800f1ac: e097 b.n 800f2de 800f1ae: 687b ldr r3, [r7, #4] 800f1b0: 2201 movs r2, #1 800f1b2: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* 1. Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800f1b6: 6878 ldr r0, [r7, #4] 800f1b8: f7ff ffa8 bl 800f10c 800f1bc: 4603 mov r3, r0 800f1be: 75fb strb r3, [r7, #23] /* 2. Calibration prerequisite delay before starting the calibration. */ /* - ADC must be enabled for at least two ADC clock cycles */ tmp_hal_status = ADC_Enable(hadc); 800f1c0: 6878 ldr r0, [r7, #4] 800f1c2: f7ff ff49 bl 800f058 800f1c6: 4603 mov r3, r0 800f1c8: 75fb strb r3, [r7, #23] /* Check if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 800f1ca: 7dfb ldrb r3, [r7, #23] 800f1cc: 2b00 cmp r3, #0 800f1ce: f040 8081 bne.w 800f2d4 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800f1d2: 687b ldr r3, [r7, #4] 800f1d4: 6a9b ldr r3, [r3, #40] @ 0x28 800f1d6: f423 5388 bic.w r3, r3, #4352 @ 0x1100 800f1da: f023 0302 bic.w r3, r3, #2 800f1de: f043 0202 orr.w r2, r3, #2 800f1e2: 687b ldr r3, [r7, #4] 800f1e4: 629a str r2, [r3, #40] @ 0x28 /* Hardware prerequisite: delay before starting the calibration. */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles. */ /* - Wait for the expected ADC clock cycles delay */ wait_loop_index = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 800f1e6: 4b40 ldr r3, [pc, #256] @ (800f2e8 ) 800f1e8: 681c ldr r4, [r3, #0] 800f1ea: 2002 movs r0, #2 800f1ec: f002 fa84 bl 80116f8 800f1f0: 4603 mov r3, r0 800f1f2: fbb4 f3f3 udiv r3, r4, r3 * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES ); 800f1f6: 005b lsls r3, r3, #1 wait_loop_index = ((SystemCoreClock 800f1f8: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 800f1fa: e002 b.n 800f202 { wait_loop_index--; 800f1fc: 68fb ldr r3, [r7, #12] 800f1fe: 3b01 subs r3, #1 800f200: 60fb str r3, [r7, #12] while(wait_loop_index != 0U) 800f202: 68fb ldr r3, [r7, #12] 800f204: 2b00 cmp r3, #0 800f206: d1f9 bne.n 800f1fc } /* 3. Resets ADC calibration registers */ SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL); 800f208: 687b ldr r3, [r7, #4] 800f20a: 681b ldr r3, [r3, #0] 800f20c: 689a ldr r2, [r3, #8] 800f20e: 687b ldr r3, [r7, #4] 800f210: 681b ldr r3, [r3, #0] 800f212: f042 0208 orr.w r2, r2, #8 800f216: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 800f218: f7ff fb34 bl 800e884 800f21c: 6138 str r0, [r7, #16] /* Wait for calibration reset completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 800f21e: e01b b.n 800f258 { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 800f220: f7ff fb30 bl 800e884 800f224: 4602 mov r2, r0 800f226: 693b ldr r3, [r7, #16] 800f228: 1ad3 subs r3, r2, r3 800f22a: 2b0a cmp r3, #10 800f22c: d914 bls.n 800f258 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 800f22e: 687b ldr r3, [r7, #4] 800f230: 681b ldr r3, [r3, #0] 800f232: 689b ldr r3, [r3, #8] 800f234: f003 0308 and.w r3, r3, #8 800f238: 2b00 cmp r3, #0 800f23a: d00d beq.n 800f258 { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800f23c: 687b ldr r3, [r7, #4] 800f23e: 6a9b ldr r3, [r3, #40] @ 0x28 800f240: f023 0312 bic.w r3, r3, #18 800f244: f043 0210 orr.w r2, r3, #16 800f248: 687b ldr r3, [r7, #4] 800f24a: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 800f24c: 687b ldr r3, [r7, #4] 800f24e: 2200 movs r2, #0 800f250: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f254: 2301 movs r3, #1 800f256: e042 b.n 800f2de while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 800f258: 687b ldr r3, [r7, #4] 800f25a: 681b ldr r3, [r3, #0] 800f25c: 689b ldr r3, [r3, #8] 800f25e: f003 0308 and.w r3, r3, #8 800f262: 2b00 cmp r3, #0 800f264: d1dc bne.n 800f220 } } } /* 4. Start ADC calibration */ SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL); 800f266: 687b ldr r3, [r7, #4] 800f268: 681b ldr r3, [r3, #0] 800f26a: 689a ldr r2, [r3, #8] 800f26c: 687b ldr r3, [r7, #4] 800f26e: 681b ldr r3, [r3, #0] 800f270: f042 0204 orr.w r2, r2, #4 800f274: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 800f276: f7ff fb05 bl 800e884 800f27a: 6138 str r0, [r7, #16] /* Wait for calibration completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 800f27c: e01b b.n 800f2b6 { if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 800f27e: f7ff fb01 bl 800e884 800f282: 4602 mov r2, r0 800f284: 693b ldr r3, [r7, #16] 800f286: 1ad3 subs r3, r2, r3 800f288: 2b0a cmp r3, #10 800f28a: d914 bls.n 800f2b6 { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 800f28c: 687b ldr r3, [r7, #4] 800f28e: 681b ldr r3, [r3, #0] 800f290: 689b ldr r3, [r3, #8] 800f292: f003 0304 and.w r3, r3, #4 800f296: 2b00 cmp r3, #0 800f298: d00d beq.n 800f2b6 { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 800f29a: 687b ldr r3, [r7, #4] 800f29c: 6a9b ldr r3, [r3, #40] @ 0x28 800f29e: f023 0312 bic.w r3, r3, #18 800f2a2: f043 0210 orr.w r2, r3, #16 800f2a6: 687b ldr r3, [r7, #4] 800f2a8: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Process unlocked */ __HAL_UNLOCK(hadc); 800f2aa: 687b ldr r3, [r7, #4] 800f2ac: 2200 movs r2, #0 800f2ae: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f2b2: 2301 movs r3, #1 800f2b4: e013 b.n 800f2de while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 800f2b6: 687b ldr r3, [r7, #4] 800f2b8: 681b ldr r3, [r3, #0] 800f2ba: 689b ldr r3, [r3, #8] 800f2bc: f003 0304 and.w r3, r3, #4 800f2c0: 2b00 cmp r3, #0 800f2c2: d1dc bne.n 800f27e } } } /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800f2c4: 687b ldr r3, [r7, #4] 800f2c6: 6a9b ldr r3, [r3, #40] @ 0x28 800f2c8: f023 0303 bic.w r3, r3, #3 800f2cc: f043 0201 orr.w r2, r3, #1 800f2d0: 687b ldr r3, [r7, #4] 800f2d2: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 800f2d4: 687b ldr r3, [r7, #4] 800f2d6: 2200 movs r2, #0 800f2d8: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 800f2dc: 7dfb ldrb r3, [r7, #23] } 800f2de: 4618 mov r0, r3 800f2e0: 371c adds r7, #28 800f2e2: 46bd mov sp, r7 800f2e4: bd90 pop {r4, r7, pc} 800f2e6: bf00 nop 800f2e8: 20000078 .word 0x20000078 0800f2ec : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) { 800f2ec: b580 push {r7, lr} 800f2ee: b084 sub sp, #16 800f2f0: af00 add r7, sp, #0 800f2f2: 6078 str r0, [r7, #4] uint32_t tickstart; /* Check CAN handle */ if (hcan == NULL) 800f2f4: 687b ldr r3, [r7, #4] 800f2f6: 2b00 cmp r3, #0 800f2f8: d101 bne.n 800f2fe { return HAL_ERROR; 800f2fa: 2301 movs r3, #1 800f2fc: e0ed b.n 800f4da /* Init the low level hardware: CLOCK, NVIC */ hcan->MspInitCallback(hcan); } #else if (hcan->State == HAL_CAN_STATE_RESET) 800f2fe: 687b ldr r3, [r7, #4] 800f300: f893 3020 ldrb.w r3, [r3, #32] 800f304: b2db uxtb r3, r3 800f306: 2b00 cmp r3, #0 800f308: d102 bne.n 800f310 { /* Init the low level hardware: CLOCK, NVIC */ HAL_CAN_MspInit(hcan); 800f30a: 6878 ldr r0, [r7, #4] 800f30c: f7fa fc14 bl 8009b38 } #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800f310: 687b ldr r3, [r7, #4] 800f312: 681b ldr r3, [r3, #0] 800f314: 681a ldr r2, [r3, #0] 800f316: 687b ldr r3, [r7, #4] 800f318: 681b ldr r3, [r3, #0] 800f31a: f042 0201 orr.w r2, r2, #1 800f31e: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f320: f7ff fab0 bl 800e884 800f324: 60f8 str r0, [r7, #12] /* Wait initialisation acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f326: e012 b.n 800f34e { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f328: f7ff faac bl 800e884 800f32c: 4602 mov r2, r0 800f32e: 68fb ldr r3, [r7, #12] 800f330: 1ad3 subs r3, r2, r3 800f332: 2b0a cmp r3, #10 800f334: d90b bls.n 800f34e { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f336: 687b ldr r3, [r7, #4] 800f338: 6a5b ldr r3, [r3, #36] @ 0x24 800f33a: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f33e: 687b ldr r3, [r7, #4] 800f340: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f342: 687b ldr r3, [r7, #4] 800f344: 2205 movs r2, #5 800f346: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f34a: 2301 movs r3, #1 800f34c: e0c5 b.n 800f4da while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f34e: 687b ldr r3, [r7, #4] 800f350: 681b ldr r3, [r3, #0] 800f352: 685b ldr r3, [r3, #4] 800f354: f003 0301 and.w r3, r3, #1 800f358: 2b00 cmp r3, #0 800f35a: d0e5 beq.n 800f328 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 800f35c: 687b ldr r3, [r7, #4] 800f35e: 681b ldr r3, [r3, #0] 800f360: 681a ldr r2, [r3, #0] 800f362: 687b ldr r3, [r7, #4] 800f364: 681b ldr r3, [r3, #0] 800f366: f022 0202 bic.w r2, r2, #2 800f36a: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f36c: f7ff fa8a bl 800e884 800f370: 60f8 str r0, [r7, #12] /* Check Sleep mode leave acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 800f372: e012 b.n 800f39a { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f374: f7ff fa86 bl 800e884 800f378: 4602 mov r2, r0 800f37a: 68fb ldr r3, [r7, #12] 800f37c: 1ad3 subs r3, r2, r3 800f37e: 2b0a cmp r3, #10 800f380: d90b bls.n 800f39a { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f382: 687b ldr r3, [r7, #4] 800f384: 6a5b ldr r3, [r3, #36] @ 0x24 800f386: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f38a: 687b ldr r3, [r7, #4] 800f38c: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f38e: 687b ldr r3, [r7, #4] 800f390: 2205 movs r2, #5 800f392: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f396: 2301 movs r3, #1 800f398: e09f b.n 800f4da while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 800f39a: 687b ldr r3, [r7, #4] 800f39c: 681b ldr r3, [r3, #0] 800f39e: 685b ldr r3, [r3, #4] 800f3a0: f003 0302 and.w r3, r3, #2 800f3a4: 2b00 cmp r3, #0 800f3a6: d1e5 bne.n 800f374 } } /* Set the time triggered communication mode */ if (hcan->Init.TimeTriggeredMode == ENABLE) 800f3a8: 687b ldr r3, [r7, #4] 800f3aa: 7e1b ldrb r3, [r3, #24] 800f3ac: 2b01 cmp r3, #1 800f3ae: d108 bne.n 800f3c2 { SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 800f3b0: 687b ldr r3, [r7, #4] 800f3b2: 681b ldr r3, [r3, #0] 800f3b4: 681a ldr r2, [r3, #0] 800f3b6: 687b ldr r3, [r7, #4] 800f3b8: 681b ldr r3, [r3, #0] 800f3ba: f042 0280 orr.w r2, r2, #128 @ 0x80 800f3be: 601a str r2, [r3, #0] 800f3c0: e007 b.n 800f3d2 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 800f3c2: 687b ldr r3, [r7, #4] 800f3c4: 681b ldr r3, [r3, #0] 800f3c6: 681a ldr r2, [r3, #0] 800f3c8: 687b ldr r3, [r7, #4] 800f3ca: 681b ldr r3, [r3, #0] 800f3cc: f022 0280 bic.w r2, r2, #128 @ 0x80 800f3d0: 601a str r2, [r3, #0] } /* Set the automatic bus-off management */ if (hcan->Init.AutoBusOff == ENABLE) 800f3d2: 687b ldr r3, [r7, #4] 800f3d4: 7e5b ldrb r3, [r3, #25] 800f3d6: 2b01 cmp r3, #1 800f3d8: d108 bne.n 800f3ec { SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 800f3da: 687b ldr r3, [r7, #4] 800f3dc: 681b ldr r3, [r3, #0] 800f3de: 681a ldr r2, [r3, #0] 800f3e0: 687b ldr r3, [r7, #4] 800f3e2: 681b ldr r3, [r3, #0] 800f3e4: f042 0240 orr.w r2, r2, #64 @ 0x40 800f3e8: 601a str r2, [r3, #0] 800f3ea: e007 b.n 800f3fc } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 800f3ec: 687b ldr r3, [r7, #4] 800f3ee: 681b ldr r3, [r3, #0] 800f3f0: 681a ldr r2, [r3, #0] 800f3f2: 687b ldr r3, [r7, #4] 800f3f4: 681b ldr r3, [r3, #0] 800f3f6: f022 0240 bic.w r2, r2, #64 @ 0x40 800f3fa: 601a str r2, [r3, #0] } /* Set the automatic wake-up mode */ if (hcan->Init.AutoWakeUp == ENABLE) 800f3fc: 687b ldr r3, [r7, #4] 800f3fe: 7e9b ldrb r3, [r3, #26] 800f400: 2b01 cmp r3, #1 800f402: d108 bne.n 800f416 { SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 800f404: 687b ldr r3, [r7, #4] 800f406: 681b ldr r3, [r3, #0] 800f408: 681a ldr r2, [r3, #0] 800f40a: 687b ldr r3, [r7, #4] 800f40c: 681b ldr r3, [r3, #0] 800f40e: f042 0220 orr.w r2, r2, #32 800f412: 601a str r2, [r3, #0] 800f414: e007 b.n 800f426 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 800f416: 687b ldr r3, [r7, #4] 800f418: 681b ldr r3, [r3, #0] 800f41a: 681a ldr r2, [r3, #0] 800f41c: 687b ldr r3, [r7, #4] 800f41e: 681b ldr r3, [r3, #0] 800f420: f022 0220 bic.w r2, r2, #32 800f424: 601a str r2, [r3, #0] } /* Set the automatic retransmission */ if (hcan->Init.AutoRetransmission == ENABLE) 800f426: 687b ldr r3, [r7, #4] 800f428: 7edb ldrb r3, [r3, #27] 800f42a: 2b01 cmp r3, #1 800f42c: d108 bne.n 800f440 { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); 800f42e: 687b ldr r3, [r7, #4] 800f430: 681b ldr r3, [r3, #0] 800f432: 681a ldr r2, [r3, #0] 800f434: 687b ldr r3, [r7, #4] 800f436: 681b ldr r3, [r3, #0] 800f438: f022 0210 bic.w r2, r2, #16 800f43c: 601a str r2, [r3, #0] 800f43e: e007 b.n 800f450 } else { SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); 800f440: 687b ldr r3, [r7, #4] 800f442: 681b ldr r3, [r3, #0] 800f444: 681a ldr r2, [r3, #0] 800f446: 687b ldr r3, [r7, #4] 800f448: 681b ldr r3, [r3, #0] 800f44a: f042 0210 orr.w r2, r2, #16 800f44e: 601a str r2, [r3, #0] } /* Set the receive FIFO locked mode */ if (hcan->Init.ReceiveFifoLocked == ENABLE) 800f450: 687b ldr r3, [r7, #4] 800f452: 7f1b ldrb r3, [r3, #28] 800f454: 2b01 cmp r3, #1 800f456: d108 bne.n 800f46a { SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 800f458: 687b ldr r3, [r7, #4] 800f45a: 681b ldr r3, [r3, #0] 800f45c: 681a ldr r2, [r3, #0] 800f45e: 687b ldr r3, [r7, #4] 800f460: 681b ldr r3, [r3, #0] 800f462: f042 0208 orr.w r2, r2, #8 800f466: 601a str r2, [r3, #0] 800f468: e007 b.n 800f47a } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 800f46a: 687b ldr r3, [r7, #4] 800f46c: 681b ldr r3, [r3, #0] 800f46e: 681a ldr r2, [r3, #0] 800f470: 687b ldr r3, [r7, #4] 800f472: 681b ldr r3, [r3, #0] 800f474: f022 0208 bic.w r2, r2, #8 800f478: 601a str r2, [r3, #0] } /* Set the transmit FIFO priority */ if (hcan->Init.TransmitFifoPriority == ENABLE) 800f47a: 687b ldr r3, [r7, #4] 800f47c: 7f5b ldrb r3, [r3, #29] 800f47e: 2b01 cmp r3, #1 800f480: d108 bne.n 800f494 { SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 800f482: 687b ldr r3, [r7, #4] 800f484: 681b ldr r3, [r3, #0] 800f486: 681a ldr r2, [r3, #0] 800f488: 687b ldr r3, [r7, #4] 800f48a: 681b ldr r3, [r3, #0] 800f48c: f042 0204 orr.w r2, r2, #4 800f490: 601a str r2, [r3, #0] 800f492: e007 b.n 800f4a4 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 800f494: 687b ldr r3, [r7, #4] 800f496: 681b ldr r3, [r3, #0] 800f498: 681a ldr r2, [r3, #0] 800f49a: 687b ldr r3, [r7, #4] 800f49c: 681b ldr r3, [r3, #0] 800f49e: f022 0204 bic.w r2, r2, #4 800f4a2: 601a str r2, [r3, #0] } /* Set the bit timing register */ WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | 800f4a4: 687b ldr r3, [r7, #4] 800f4a6: 689a ldr r2, [r3, #8] 800f4a8: 687b ldr r3, [r7, #4] 800f4aa: 68db ldr r3, [r3, #12] 800f4ac: 431a orrs r2, r3 800f4ae: 687b ldr r3, [r7, #4] 800f4b0: 691b ldr r3, [r3, #16] 800f4b2: 431a orrs r2, r3 800f4b4: 687b ldr r3, [r7, #4] 800f4b6: 695b ldr r3, [r3, #20] 800f4b8: ea42 0103 orr.w r1, r2, r3 800f4bc: 687b ldr r3, [r7, #4] 800f4be: 685b ldr r3, [r3, #4] 800f4c0: 1e5a subs r2, r3, #1 800f4c2: 687b ldr r3, [r7, #4] 800f4c4: 681b ldr r3, [r3, #0] 800f4c6: 430a orrs r2, r1 800f4c8: 61da str r2, [r3, #28] hcan->Init.TimeSeg1 | hcan->Init.TimeSeg2 | (hcan->Init.Prescaler - 1U))); /* Initialize the error code */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 800f4ca: 687b ldr r3, [r7, #4] 800f4cc: 2200 movs r2, #0 800f4ce: 625a str r2, [r3, #36] @ 0x24 /* Initialize the CAN state */ hcan->State = HAL_CAN_STATE_READY; 800f4d0: 687b ldr r3, [r7, #4] 800f4d2: 2201 movs r2, #1 800f4d4: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 800f4d8: 2300 movs r3, #0 } 800f4da: 4618 mov r0, r3 800f4dc: 3710 adds r7, #16 800f4de: 46bd mov sp, r7 800f4e0: bd80 pop {r7, pc} ... 0800f4e4 : * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that * contains the filter configuration information. * @retval None */ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig) { 800f4e4: b480 push {r7} 800f4e6: b087 sub sp, #28 800f4e8: af00 add r7, sp, #0 800f4ea: 6078 str r0, [r7, #4] 800f4ec: 6039 str r1, [r7, #0] uint32_t filternbrbitpos; CAN_TypeDef *can_ip = hcan->Instance; 800f4ee: 687b ldr r3, [r7, #4] 800f4f0: 681b ldr r3, [r3, #0] 800f4f2: 617b str r3, [r7, #20] HAL_CAN_StateTypeDef state = hcan->State; 800f4f4: 687b ldr r3, [r7, #4] 800f4f6: f893 3020 ldrb.w r3, [r3, #32] 800f4fa: 74fb strb r3, [r7, #19] if ((state == HAL_CAN_STATE_READY) || 800f4fc: 7cfb ldrb r3, [r7, #19] 800f4fe: 2b01 cmp r3, #1 800f500: d003 beq.n 800f50a 800f502: 7cfb ldrb r3, [r7, #19] 800f504: 2b02 cmp r3, #2 800f506: f040 80be bne.w 800f686 assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); #if defined(CAN2) /* CAN1 and CAN2 are dual instances with 28 common filters banks */ /* Select master instance to access the filter banks */ can_ip = CAN1; 800f50a: 4b65 ldr r3, [pc, #404] @ (800f6a0 ) 800f50c: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); #endif /* CAN3 */ /* Initialisation mode for the filter */ SET_BIT(can_ip->FMR, CAN_FMR_FINIT); 800f50e: 697b ldr r3, [r7, #20] 800f510: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 800f514: f043 0201 orr.w r2, r3, #1 800f518: 697b ldr r3, [r7, #20] 800f51a: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #if defined(CAN2) /* Select the start filter number of CAN2 slave instance */ CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); 800f51e: 697b ldr r3, [r7, #20] 800f520: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 800f524: f423 527c bic.w r2, r3, #16128 @ 0x3f00 800f528: 697b ldr r3, [r7, #20] 800f52a: f8c3 2200 str.w r2, [r3, #512] @ 0x200 SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); 800f52e: 697b ldr r3, [r7, #20] 800f530: f8d3 2200 ldr.w r2, [r3, #512] @ 0x200 800f534: 683b ldr r3, [r7, #0] 800f536: 6a5b ldr r3, [r3, #36] @ 0x24 800f538: 021b lsls r3, r3, #8 800f53a: 431a orrs r2, r3 800f53c: 697b ldr r3, [r7, #20] 800f53e: f8c3 2200 str.w r2, [r3, #512] @ 0x200 #endif /* CAN3 */ /* Convert filter number into bit position */ filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); 800f542: 683b ldr r3, [r7, #0] 800f544: 695b ldr r3, [r3, #20] 800f546: f003 031f and.w r3, r3, #31 800f54a: 2201 movs r2, #1 800f54c: fa02 f303 lsl.w r3, r2, r3 800f550: 60fb str r3, [r7, #12] /* Filter Deactivation */ CLEAR_BIT(can_ip->FA1R, filternbrbitpos); 800f552: 697b ldr r3, [r7, #20] 800f554: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 800f558: 68fb ldr r3, [r7, #12] 800f55a: 43db mvns r3, r3 800f55c: 401a ands r2, r3 800f55e: 697b ldr r3, [r7, #20] 800f560: f8c3 221c str.w r2, [r3, #540] @ 0x21c /* Filter Scale */ if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) 800f564: 683b ldr r3, [r7, #0] 800f566: 69db ldr r3, [r3, #28] 800f568: 2b00 cmp r3, #0 800f56a: d123 bne.n 800f5b4 { /* 16-bit scale for the filter */ CLEAR_BIT(can_ip->FS1R, filternbrbitpos); 800f56c: 697b ldr r3, [r7, #20] 800f56e: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 800f572: 68fb ldr r3, [r7, #12] 800f574: 43db mvns r3, r3 800f576: 401a ands r2, r3 800f578: 697b ldr r3, [r7, #20] 800f57a: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* First 16-bit identifier and First 16-bit mask */ /* Or First 16-bit identifier and Second 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 800f57e: 683b ldr r3, [r7, #0] 800f580: 68db ldr r3, [r3, #12] 800f582: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 800f584: 683b ldr r3, [r7, #0] 800f586: 685b ldr r3, [r3, #4] 800f588: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f58a: 683a ldr r2, [r7, #0] 800f58c: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | 800f58e: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f590: 697b ldr r3, [r7, #20] 800f592: 3248 adds r2, #72 @ 0x48 800f594: f843 1032 str.w r1, [r3, r2, lsl #3] /* Second 16-bit identifier and Second 16-bit mask */ /* Or Third 16-bit identifier and Fourth 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f598: 683b ldr r3, [r7, #0] 800f59a: 689b ldr r3, [r3, #8] 800f59c: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); 800f59e: 683b ldr r3, [r7, #0] 800f5a0: 681b ldr r3, [r3, #0] 800f5a2: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f5a4: 683b ldr r3, [r7, #0] 800f5a6: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f5a8: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f5aa: 6979 ldr r1, [r7, #20] 800f5ac: 3348 adds r3, #72 @ 0x48 800f5ae: 00db lsls r3, r3, #3 800f5b0: 440b add r3, r1 800f5b2: 605a str r2, [r3, #4] } if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) 800f5b4: 683b ldr r3, [r7, #0] 800f5b6: 69db ldr r3, [r3, #28] 800f5b8: 2b01 cmp r3, #1 800f5ba: d122 bne.n 800f602 { /* 32-bit scale for the filter */ SET_BIT(can_ip->FS1R, filternbrbitpos); 800f5bc: 697b ldr r3, [r7, #20] 800f5be: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c 800f5c2: 68fb ldr r3, [r7, #12] 800f5c4: 431a orrs r2, r3 800f5c6: 697b ldr r3, [r7, #20] 800f5c8: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* 32-bit identifier or First 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 800f5cc: 683b ldr r3, [r7, #0] 800f5ce: 681b ldr r3, [r3, #0] 800f5d0: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); 800f5d2: 683b ldr r3, [r7, #0] 800f5d4: 685b ldr r3, [r3, #4] 800f5d6: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f5d8: 683a ldr r2, [r7, #0] 800f5da: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | 800f5dc: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = 800f5de: 697b ldr r3, [r7, #20] 800f5e0: 3248 adds r2, #72 @ 0x48 800f5e2: f843 1032 str.w r1, [r3, r2, lsl #3] /* 32-bit mask or Second 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f5e6: 683b ldr r3, [r7, #0] 800f5e8: 689b ldr r3, [r3, #8] 800f5ea: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); 800f5ec: 683b ldr r3, [r7, #0] 800f5ee: 68db ldr r3, [r3, #12] 800f5f0: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f5f2: 683b ldr r3, [r7, #0] 800f5f4: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | 800f5f6: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = 800f5f8: 6979 ldr r1, [r7, #20] 800f5fa: 3348 adds r3, #72 @ 0x48 800f5fc: 00db lsls r3, r3, #3 800f5fe: 440b add r3, r1 800f600: 605a str r2, [r3, #4] } /* Filter Mode */ if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) 800f602: 683b ldr r3, [r7, #0] 800f604: 699b ldr r3, [r3, #24] 800f606: 2b00 cmp r3, #0 800f608: d109 bne.n 800f61e { /* Id/Mask mode for the filter*/ CLEAR_BIT(can_ip->FM1R, filternbrbitpos); 800f60a: 697b ldr r3, [r7, #20] 800f60c: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800f610: 68fb ldr r3, [r7, #12] 800f612: 43db mvns r3, r3 800f614: 401a ands r2, r3 800f616: 697b ldr r3, [r7, #20] 800f618: f8c3 2204 str.w r2, [r3, #516] @ 0x204 800f61c: e007 b.n 800f62e } else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ { /* Identifier list mode for the filter*/ SET_BIT(can_ip->FM1R, filternbrbitpos); 800f61e: 697b ldr r3, [r7, #20] 800f620: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800f624: 68fb ldr r3, [r7, #12] 800f626: 431a orrs r2, r3 800f628: 697b ldr r3, [r7, #20] 800f62a: f8c3 2204 str.w r2, [r3, #516] @ 0x204 } /* Filter FIFO assignment */ if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) 800f62e: 683b ldr r3, [r7, #0] 800f630: 691b ldr r3, [r3, #16] 800f632: 2b00 cmp r3, #0 800f634: d109 bne.n 800f64a { /* FIFO 0 assignation for the filter */ CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); 800f636: 697b ldr r3, [r7, #20] 800f638: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 800f63c: 68fb ldr r3, [r7, #12] 800f63e: 43db mvns r3, r3 800f640: 401a ands r2, r3 800f642: 697b ldr r3, [r7, #20] 800f644: f8c3 2214 str.w r2, [r3, #532] @ 0x214 800f648: e007 b.n 800f65a } else { /* FIFO 1 assignation for the filter */ SET_BIT(can_ip->FFA1R, filternbrbitpos); 800f64a: 697b ldr r3, [r7, #20] 800f64c: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 800f650: 68fb ldr r3, [r7, #12] 800f652: 431a orrs r2, r3 800f654: 697b ldr r3, [r7, #20] 800f656: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } /* Filter activation */ if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) 800f65a: 683b ldr r3, [r7, #0] 800f65c: 6a1b ldr r3, [r3, #32] 800f65e: 2b01 cmp r3, #1 800f660: d107 bne.n 800f672 { SET_BIT(can_ip->FA1R, filternbrbitpos); 800f662: 697b ldr r3, [r7, #20] 800f664: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c 800f668: 68fb ldr r3, [r7, #12] 800f66a: 431a orrs r2, r3 800f66c: 697b ldr r3, [r7, #20] 800f66e: f8c3 221c str.w r2, [r3, #540] @ 0x21c } /* Leave the initialisation mode for the filter */ CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); 800f672: 697b ldr r3, [r7, #20] 800f674: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 800f678: f023 0201 bic.w r2, r3, #1 800f67c: 697b ldr r3, [r7, #20] 800f67e: f8c3 2200 str.w r2, [r3, #512] @ 0x200 /* Return function status */ return HAL_OK; 800f682: 2300 movs r3, #0 800f684: e006 b.n 800f694 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800f686: 687b ldr r3, [r7, #4] 800f688: 6a5b ldr r3, [r3, #36] @ 0x24 800f68a: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800f68e: 687b ldr r3, [r7, #4] 800f690: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f692: 2301 movs r3, #1 } } 800f694: 4618 mov r0, r3 800f696: 371c adds r7, #28 800f698: 46bd mov sp, r7 800f69a: bc80 pop {r7} 800f69c: 4770 bx lr 800f69e: bf00 nop 800f6a0: 40006400 .word 0x40006400 0800f6a4 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) { 800f6a4: b580 push {r7, lr} 800f6a6: b084 sub sp, #16 800f6a8: af00 add r7, sp, #0 800f6aa: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_READY) 800f6ac: 687b ldr r3, [r7, #4] 800f6ae: f893 3020 ldrb.w r3, [r3, #32] 800f6b2: b2db uxtb r3, r3 800f6b4: 2b01 cmp r3, #1 800f6b6: d12e bne.n 800f716 { /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_LISTENING; 800f6b8: 687b ldr r3, [r7, #4] 800f6ba: 2202 movs r2, #2 800f6bc: f883 2020 strb.w r2, [r3, #32] /* Request leave initialisation */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800f6c0: 687b ldr r3, [r7, #4] 800f6c2: 681b ldr r3, [r3, #0] 800f6c4: 681a ldr r2, [r3, #0] 800f6c6: 687b ldr r3, [r7, #4] 800f6c8: 681b ldr r3, [r3, #0] 800f6ca: f022 0201 bic.w r2, r2, #1 800f6ce: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f6d0: f7ff f8d8 bl 800e884 800f6d4: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 800f6d6: e012 b.n 800f6fe { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f6d8: f7ff f8d4 bl 800e884 800f6dc: 4602 mov r2, r0 800f6de: 68fb ldr r3, [r7, #12] 800f6e0: 1ad3 subs r3, r2, r3 800f6e2: 2b0a cmp r3, #10 800f6e4: d90b bls.n 800f6fe { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f6e6: 687b ldr r3, [r7, #4] 800f6e8: 6a5b ldr r3, [r3, #36] @ 0x24 800f6ea: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f6ee: 687b ldr r3, [r7, #4] 800f6f0: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f6f2: 687b ldr r3, [r7, #4] 800f6f4: 2205 movs r2, #5 800f6f6: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f6fa: 2301 movs r3, #1 800f6fc: e012 b.n 800f724 while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 800f6fe: 687b ldr r3, [r7, #4] 800f700: 681b ldr r3, [r3, #0] 800f702: 685b ldr r3, [r3, #4] 800f704: f003 0301 and.w r3, r3, #1 800f708: 2b00 cmp r3, #0 800f70a: d1e5 bne.n 800f6d8 } } /* Reset the CAN ErrorCode */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 800f70c: 687b ldr r3, [r7, #4] 800f70e: 2200 movs r2, #0 800f710: 625a str r2, [r3, #36] @ 0x24 /* Return function status */ return HAL_OK; 800f712: 2300 movs r3, #0 800f714: e006 b.n 800f724 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; 800f716: 687b ldr r3, [r7, #4] 800f718: 6a5b ldr r3, [r3, #36] @ 0x24 800f71a: f443 2200 orr.w r2, r3, #524288 @ 0x80000 800f71e: 687b ldr r3, [r7, #4] 800f720: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f722: 2301 movs r3, #1 } } 800f724: 4618 mov r0, r3 800f726: 3710 adds r7, #16 800f728: 46bd mov sp, r7 800f72a: bd80 pop {r7, pc} 0800f72c : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) { 800f72c: b580 push {r7, lr} 800f72e: b084 sub sp, #16 800f730: af00 add r7, sp, #0 800f732: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_LISTENING) 800f734: 687b ldr r3, [r7, #4] 800f736: f893 3020 ldrb.w r3, [r3, #32] 800f73a: b2db uxtb r3, r3 800f73c: 2b02 cmp r3, #2 800f73e: d133 bne.n 800f7a8 { /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 800f740: 687b ldr r3, [r7, #4] 800f742: 681b ldr r3, [r3, #0] 800f744: 681a ldr r2, [r3, #0] 800f746: 687b ldr r3, [r7, #4] 800f748: 681b ldr r3, [r3, #0] 800f74a: f042 0201 orr.w r2, r2, #1 800f74e: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 800f750: f7ff f898 bl 800e884 800f754: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f756: e012 b.n 800f77e { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800f758: f7ff f894 bl 800e884 800f75c: 4602 mov r2, r0 800f75e: 68fb ldr r3, [r7, #12] 800f760: 1ad3 subs r3, r2, r3 800f762: 2b0a cmp r3, #10 800f764: d90b bls.n 800f77e { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800f766: 687b ldr r3, [r7, #4] 800f768: 6a5b ldr r3, [r3, #36] @ 0x24 800f76a: f443 3200 orr.w r2, r3, #131072 @ 0x20000 800f76e: 687b ldr r3, [r7, #4] 800f770: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 800f772: 687b ldr r3, [r7, #4] 800f774: 2205 movs r2, #5 800f776: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800f77a: 2301 movs r3, #1 800f77c: e01b b.n 800f7b6 while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800f77e: 687b ldr r3, [r7, #4] 800f780: 681b ldr r3, [r3, #0] 800f782: 685b ldr r3, [r3, #4] 800f784: f003 0301 and.w r3, r3, #1 800f788: 2b00 cmp r3, #0 800f78a: d0e5 beq.n 800f758 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 800f78c: 687b ldr r3, [r7, #4] 800f78e: 681b ldr r3, [r3, #0] 800f790: 681a ldr r2, [r3, #0] 800f792: 687b ldr r3, [r7, #4] 800f794: 681b ldr r3, [r3, #0] 800f796: f022 0202 bic.w r2, r2, #2 800f79a: 601a str r2, [r3, #0] /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_READY; 800f79c: 687b ldr r3, [r7, #4] 800f79e: 2201 movs r2, #1 800f7a0: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; 800f7a4: 2300 movs r3, #0 800f7a6: e006 b.n 800f7b6 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; 800f7a8: 687b ldr r3, [r7, #4] 800f7aa: 6a5b ldr r3, [r3, #36] @ 0x24 800f7ac: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800f7b0: 687b ldr r3, [r7, #4] 800f7b2: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f7b4: 2301 movs r3, #1 } } 800f7b6: 4618 mov r0, r3 800f7b8: 3710 adds r7, #16 800f7ba: 46bd mov sp, r7 800f7bc: bd80 pop {r7, pc} 0800f7be : * This parameter can be a value of @arg CAN_Tx_Mailboxes. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, const uint8_t aData[], uint32_t *pTxMailbox) { 800f7be: b480 push {r7} 800f7c0: b089 sub sp, #36 @ 0x24 800f7c2: af00 add r7, sp, #0 800f7c4: 60f8 str r0, [r7, #12] 800f7c6: 60b9 str r1, [r7, #8] 800f7c8: 607a str r2, [r7, #4] 800f7ca: 603b str r3, [r7, #0] uint32_t transmitmailbox; HAL_CAN_StateTypeDef state = hcan->State; 800f7cc: 68fb ldr r3, [r7, #12] 800f7ce: f893 3020 ldrb.w r3, [r3, #32] 800f7d2: 77fb strb r3, [r7, #31] uint32_t tsr = READ_REG(hcan->Instance->TSR); 800f7d4: 68fb ldr r3, [r7, #12] 800f7d6: 681b ldr r3, [r3, #0] 800f7d8: 689b ldr r3, [r3, #8] 800f7da: 61bb str r3, [r7, #24] { assert_param(IS_CAN_EXTID(pHeader->ExtId)); } assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); if ((state == HAL_CAN_STATE_READY) || 800f7dc: 7ffb ldrb r3, [r7, #31] 800f7de: 2b01 cmp r3, #1 800f7e0: d003 beq.n 800f7ea 800f7e2: 7ffb ldrb r3, [r7, #31] 800f7e4: 2b02 cmp r3, #2 800f7e6: f040 80ad bne.w 800f944 (state == HAL_CAN_STATE_LISTENING)) { /* Check that all the Tx mailboxes are not full */ if (((tsr & CAN_TSR_TME0) != 0U) || 800f7ea: 69bb ldr r3, [r7, #24] 800f7ec: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 800f7f0: 2b00 cmp r3, #0 800f7f2: d10a bne.n 800f80a ((tsr & CAN_TSR_TME1) != 0U) || 800f7f4: 69bb ldr r3, [r7, #24] 800f7f6: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 if (((tsr & CAN_TSR_TME0) != 0U) || 800f7fa: 2b00 cmp r3, #0 800f7fc: d105 bne.n 800f80a ((tsr & CAN_TSR_TME2) != 0U)) 800f7fe: 69bb ldr r3, [r7, #24] 800f800: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 ((tsr & CAN_TSR_TME1) != 0U) || 800f804: 2b00 cmp r3, #0 800f806: f000 8095 beq.w 800f934 { /* Select an empty transmit mailbox */ transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; 800f80a: 69bb ldr r3, [r7, #24] 800f80c: 0e1b lsrs r3, r3, #24 800f80e: f003 0303 and.w r3, r3, #3 800f812: 617b str r3, [r7, #20] /* Store the Tx mailbox */ *pTxMailbox = (uint32_t)1 << transmitmailbox; 800f814: 2201 movs r2, #1 800f816: 697b ldr r3, [r7, #20] 800f818: 409a lsls r2, r3 800f81a: 683b ldr r3, [r7, #0] 800f81c: 601a str r2, [r3, #0] /* Set up the Id */ if (pHeader->IDE == CAN_ID_STD) 800f81e: 68bb ldr r3, [r7, #8] 800f820: 689b ldr r3, [r3, #8] 800f822: 2b00 cmp r3, #0 800f824: d10d bne.n 800f842 { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 800f826: 68bb ldr r3, [r7, #8] 800f828: 681b ldr r3, [r3, #0] 800f82a: 055a lsls r2, r3, #21 pHeader->RTR); 800f82c: 68bb ldr r3, [r7, #8] 800f82e: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 800f830: 68f9 ldr r1, [r7, #12] 800f832: 6809 ldr r1, [r1, #0] 800f834: 431a orrs r2, r3 800f836: 697b ldr r3, [r7, #20] 800f838: 3318 adds r3, #24 800f83a: 011b lsls r3, r3, #4 800f83c: 440b add r3, r1 800f83e: 601a str r2, [r3, #0] 800f840: e00f b.n 800f862 } else { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f842: 68bb ldr r3, [r7, #8] 800f844: 685b ldr r3, [r3, #4] 800f846: 00da lsls r2, r3, #3 pHeader->IDE | 800f848: 68bb ldr r3, [r7, #8] 800f84a: 689b ldr r3, [r3, #8] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f84c: 431a orrs r2, r3 pHeader->RTR); 800f84e: 68bb ldr r3, [r7, #8] 800f850: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f852: 68f9 ldr r1, [r7, #12] 800f854: 6809 ldr r1, [r1, #0] pHeader->IDE | 800f856: 431a orrs r2, r3 hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 800f858: 697b ldr r3, [r7, #20] 800f85a: 3318 adds r3, #24 800f85c: 011b lsls r3, r3, #4 800f85e: 440b add r3, r1 800f860: 601a str r2, [r3, #0] } /* Set up the DLC */ hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); 800f862: 68fb ldr r3, [r7, #12] 800f864: 6819 ldr r1, [r3, #0] 800f866: 68bb ldr r3, [r7, #8] 800f868: 691a ldr r2, [r3, #16] 800f86a: 697b ldr r3, [r7, #20] 800f86c: 3318 adds r3, #24 800f86e: 011b lsls r3, r3, #4 800f870: 440b add r3, r1 800f872: 3304 adds r3, #4 800f874: 601a str r2, [r3, #0] /* Set up the Transmit Global Time mode */ if (pHeader->TransmitGlobalTime == ENABLE) 800f876: 68bb ldr r3, [r7, #8] 800f878: 7d1b ldrb r3, [r3, #20] 800f87a: 2b01 cmp r3, #1 800f87c: d111 bne.n 800f8a2 { SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); 800f87e: 68fb ldr r3, [r7, #12] 800f880: 681a ldr r2, [r3, #0] 800f882: 697b ldr r3, [r7, #20] 800f884: 3318 adds r3, #24 800f886: 011b lsls r3, r3, #4 800f888: 4413 add r3, r2 800f88a: 3304 adds r3, #4 800f88c: 681b ldr r3, [r3, #0] 800f88e: 68fa ldr r2, [r7, #12] 800f890: 6811 ldr r1, [r2, #0] 800f892: f443 7280 orr.w r2, r3, #256 @ 0x100 800f896: 697b ldr r3, [r7, #20] 800f898: 3318 adds r3, #24 800f89a: 011b lsls r3, r3, #4 800f89c: 440b add r3, r1 800f89e: 3304 adds r3, #4 800f8a0: 601a str r2, [r3, #0] } /* Set up the data field */ WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, 800f8a2: 687b ldr r3, [r7, #4] 800f8a4: 3307 adds r3, #7 800f8a6: 781b ldrb r3, [r3, #0] 800f8a8: 061a lsls r2, r3, #24 800f8aa: 687b ldr r3, [r7, #4] 800f8ac: 3306 adds r3, #6 800f8ae: 781b ldrb r3, [r3, #0] 800f8b0: 041b lsls r3, r3, #16 800f8b2: 431a orrs r2, r3 800f8b4: 687b ldr r3, [r7, #4] 800f8b6: 3305 adds r3, #5 800f8b8: 781b ldrb r3, [r3, #0] 800f8ba: 021b lsls r3, r3, #8 800f8bc: 4313 orrs r3, r2 800f8be: 687a ldr r2, [r7, #4] 800f8c0: 3204 adds r2, #4 800f8c2: 7812 ldrb r2, [r2, #0] 800f8c4: 4610 mov r0, r2 800f8c6: 68fa ldr r2, [r7, #12] 800f8c8: 6811 ldr r1, [r2, #0] 800f8ca: ea43 0200 orr.w r2, r3, r0 800f8ce: 697b ldr r3, [r7, #20] 800f8d0: 011b lsls r3, r3, #4 800f8d2: 440b add r3, r1 800f8d4: f503 73c6 add.w r3, r3, #396 @ 0x18c 800f8d8: 601a str r2, [r3, #0] ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, 800f8da: 687b ldr r3, [r7, #4] 800f8dc: 3303 adds r3, #3 800f8de: 781b ldrb r3, [r3, #0] 800f8e0: 061a lsls r2, r3, #24 800f8e2: 687b ldr r3, [r7, #4] 800f8e4: 3302 adds r3, #2 800f8e6: 781b ldrb r3, [r3, #0] 800f8e8: 041b lsls r3, r3, #16 800f8ea: 431a orrs r2, r3 800f8ec: 687b ldr r3, [r7, #4] 800f8ee: 3301 adds r3, #1 800f8f0: 781b ldrb r3, [r3, #0] 800f8f2: 021b lsls r3, r3, #8 800f8f4: 4313 orrs r3, r2 800f8f6: 687a ldr r2, [r7, #4] 800f8f8: 7812 ldrb r2, [r2, #0] 800f8fa: 4610 mov r0, r2 800f8fc: 68fa ldr r2, [r7, #12] 800f8fe: 6811 ldr r1, [r2, #0] 800f900: ea43 0200 orr.w r2, r3, r0 800f904: 697b ldr r3, [r7, #20] 800f906: 011b lsls r3, r3, #4 800f908: 440b add r3, r1 800f90a: f503 73c4 add.w r3, r3, #392 @ 0x188 800f90e: 601a str r2, [r3, #0] ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); /* Request transmission */ SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); 800f910: 68fb ldr r3, [r7, #12] 800f912: 681a ldr r2, [r3, #0] 800f914: 697b ldr r3, [r7, #20] 800f916: 3318 adds r3, #24 800f918: 011b lsls r3, r3, #4 800f91a: 4413 add r3, r2 800f91c: 681b ldr r3, [r3, #0] 800f91e: 68fa ldr r2, [r7, #12] 800f920: 6811 ldr r1, [r2, #0] 800f922: f043 0201 orr.w r2, r3, #1 800f926: 697b ldr r3, [r7, #20] 800f928: 3318 adds r3, #24 800f92a: 011b lsls r3, r3, #4 800f92c: 440b add r3, r1 800f92e: 601a str r2, [r3, #0] /* Return function status */ return HAL_OK; 800f930: 2300 movs r3, #0 800f932: e00e b.n 800f952 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 800f934: 68fb ldr r3, [r7, #12] 800f936: 6a5b ldr r3, [r3, #36] @ 0x24 800f938: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800f93c: 68fb ldr r3, [r7, #12] 800f93e: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f940: 2301 movs r3, #1 800f942: e006 b.n 800f952 } } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800f944: 68fb ldr r3, [r7, #12] 800f946: 6a5b ldr r3, [r3, #36] @ 0x24 800f948: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800f94c: 68fb ldr r3, [r7, #12] 800f94e: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800f950: 2301 movs r3, #1 } } 800f952: 4618 mov r0, r3 800f954: 3724 adds r7, #36 @ 0x24 800f956: 46bd mov sp, r7 800f958: bc80 pop {r7} 800f95a: 4770 bx lr 0800f95c : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval Number of free Tx Mailboxes. */ uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan) { 800f95c: b480 push {r7} 800f95e: b085 sub sp, #20 800f960: af00 add r7, sp, #0 800f962: 6078 str r0, [r7, #4] uint32_t freelevel = 0U; 800f964: 2300 movs r3, #0 800f966: 60fb str r3, [r7, #12] HAL_CAN_StateTypeDef state = hcan->State; 800f968: 687b ldr r3, [r7, #4] 800f96a: f893 3020 ldrb.w r3, [r3, #32] 800f96e: 72fb strb r3, [r7, #11] if ((state == HAL_CAN_STATE_READY) || 800f970: 7afb ldrb r3, [r7, #11] 800f972: 2b01 cmp r3, #1 800f974: d002 beq.n 800f97c 800f976: 7afb ldrb r3, [r7, #11] 800f978: 2b02 cmp r3, #2 800f97a: d11d bne.n 800f9b8 (state == HAL_CAN_STATE_LISTENING)) { /* Check Tx Mailbox 0 status */ if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) 800f97c: 687b ldr r3, [r7, #4] 800f97e: 681b ldr r3, [r3, #0] 800f980: 689b ldr r3, [r3, #8] 800f982: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 800f986: 2b00 cmp r3, #0 800f988: d002 beq.n 800f990 { freelevel++; 800f98a: 68fb ldr r3, [r7, #12] 800f98c: 3301 adds r3, #1 800f98e: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 1 status */ if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) 800f990: 687b ldr r3, [r7, #4] 800f992: 681b ldr r3, [r3, #0] 800f994: 689b ldr r3, [r3, #8] 800f996: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 800f99a: 2b00 cmp r3, #0 800f99c: d002 beq.n 800f9a4 { freelevel++; 800f99e: 68fb ldr r3, [r7, #12] 800f9a0: 3301 adds r3, #1 800f9a2: 60fb str r3, [r7, #12] } /* Check Tx Mailbox 2 status */ if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) 800f9a4: 687b ldr r3, [r7, #4] 800f9a6: 681b ldr r3, [r3, #0] 800f9a8: 689b ldr r3, [r3, #8] 800f9aa: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800f9ae: 2b00 cmp r3, #0 800f9b0: d002 beq.n 800f9b8 { freelevel++; 800f9b2: 68fb ldr r3, [r7, #12] 800f9b4: 3301 adds r3, #1 800f9b6: 60fb str r3, [r7, #12] } } /* Return Tx Mailboxes free level */ return freelevel; 800f9b8: 68fb ldr r3, [r7, #12] } 800f9ba: 4618 mov r0, r3 800f9bc: 3714 adds r7, #20 800f9be: 46bd mov sp, r7 800f9c0: bc80 pop {r7} 800f9c2: 4770 bx lr 0800f9c4 : * @param aData array where the payload of the Rx frame will be stored. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) { 800f9c4: b480 push {r7} 800f9c6: b087 sub sp, #28 800f9c8: af00 add r7, sp, #0 800f9ca: 60f8 str r0, [r7, #12] 800f9cc: 60b9 str r1, [r7, #8] 800f9ce: 607a str r2, [r7, #4] 800f9d0: 603b str r3, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 800f9d2: 68fb ldr r3, [r7, #12] 800f9d4: f893 3020 ldrb.w r3, [r3, #32] 800f9d8: 75fb strb r3, [r7, #23] assert_param(IS_CAN_RX_FIFO(RxFifo)); if ((state == HAL_CAN_STATE_READY) || 800f9da: 7dfb ldrb r3, [r7, #23] 800f9dc: 2b01 cmp r3, #1 800f9de: d003 beq.n 800f9e8 800f9e0: 7dfb ldrb r3, [r7, #23] 800f9e2: 2b02 cmp r3, #2 800f9e4: f040 8103 bne.w 800fbee (state == HAL_CAN_STATE_LISTENING)) { /* Check the Rx FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 800f9e8: 68bb ldr r3, [r7, #8] 800f9ea: 2b00 cmp r3, #0 800f9ec: d10e bne.n 800fa0c { /* Check that the Rx FIFO 0 is not empty */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) 800f9ee: 68fb ldr r3, [r7, #12] 800f9f0: 681b ldr r3, [r3, #0] 800f9f2: 68db ldr r3, [r3, #12] 800f9f4: f003 0303 and.w r3, r3, #3 800f9f8: 2b00 cmp r3, #0 800f9fa: d116 bne.n 800fa2a { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 800f9fc: 68fb ldr r3, [r7, #12] 800f9fe: 6a5b ldr r3, [r3, #36] @ 0x24 800fa00: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800fa04: 68fb ldr r3, [r7, #12] 800fa06: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fa08: 2301 movs r3, #1 800fa0a: e0f7 b.n 800fbfc } } else /* Rx element is assigned to Rx FIFO 1 */ { /* Check that the Rx FIFO 1 is not empty */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) 800fa0c: 68fb ldr r3, [r7, #12] 800fa0e: 681b ldr r3, [r3, #0] 800fa10: 691b ldr r3, [r3, #16] 800fa12: f003 0303 and.w r3, r3, #3 800fa16: 2b00 cmp r3, #0 800fa18: d107 bne.n 800fa2a { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 800fa1a: 68fb ldr r3, [r7, #12] 800fa1c: 6a5b ldr r3, [r3, #36] @ 0x24 800fa1e: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800fa22: 68fb ldr r3, [r7, #12] 800fa24: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fa26: 2301 movs r3, #1 800fa28: e0e8 b.n 800fbfc } } /* Get the header */ pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; 800fa2a: 68fb ldr r3, [r7, #12] 800fa2c: 681a ldr r2, [r3, #0] 800fa2e: 68bb ldr r3, [r7, #8] 800fa30: 331b adds r3, #27 800fa32: 011b lsls r3, r3, #4 800fa34: 4413 add r3, r2 800fa36: 681b ldr r3, [r3, #0] 800fa38: f003 0204 and.w r2, r3, #4 800fa3c: 687b ldr r3, [r7, #4] 800fa3e: 609a str r2, [r3, #8] if (pHeader->IDE == CAN_ID_STD) 800fa40: 687b ldr r3, [r7, #4] 800fa42: 689b ldr r3, [r3, #8] 800fa44: 2b00 cmp r3, #0 800fa46: d10c bne.n 800fa62 { pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; 800fa48: 68fb ldr r3, [r7, #12] 800fa4a: 681a ldr r2, [r3, #0] 800fa4c: 68bb ldr r3, [r7, #8] 800fa4e: 331b adds r3, #27 800fa50: 011b lsls r3, r3, #4 800fa52: 4413 add r3, r2 800fa54: 681b ldr r3, [r3, #0] 800fa56: 0d5b lsrs r3, r3, #21 800fa58: f3c3 020a ubfx r2, r3, #0, #11 800fa5c: 687b ldr r3, [r7, #4] 800fa5e: 601a str r2, [r3, #0] 800fa60: e00b b.n 800fa7a } else { pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; 800fa62: 68fb ldr r3, [r7, #12] 800fa64: 681a ldr r2, [r3, #0] 800fa66: 68bb ldr r3, [r7, #8] 800fa68: 331b adds r3, #27 800fa6a: 011b lsls r3, r3, #4 800fa6c: 4413 add r3, r2 800fa6e: 681b ldr r3, [r3, #0] 800fa70: 08db lsrs r3, r3, #3 800fa72: f023 4260 bic.w r2, r3, #3758096384 @ 0xe0000000 pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & 800fa76: 687b ldr r3, [r7, #4] 800fa78: 605a str r2, [r3, #4] } pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); 800fa7a: 68fb ldr r3, [r7, #12] 800fa7c: 681a ldr r2, [r3, #0] 800fa7e: 68bb ldr r3, [r7, #8] 800fa80: 331b adds r3, #27 800fa82: 011b lsls r3, r3, #4 800fa84: 4413 add r3, r2 800fa86: 681b ldr r3, [r3, #0] 800fa88: f003 0202 and.w r2, r3, #2 800fa8c: 687b ldr r3, [r7, #4] 800fa8e: 60da str r2, [r3, #12] if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) 800fa90: 68fb ldr r3, [r7, #12] 800fa92: 681a ldr r2, [r3, #0] 800fa94: 68bb ldr r3, [r7, #8] 800fa96: 331b adds r3, #27 800fa98: 011b lsls r3, r3, #4 800fa9a: 4413 add r3, r2 800fa9c: 3304 adds r3, #4 800fa9e: 681b ldr r3, [r3, #0] 800faa0: f003 0308 and.w r3, r3, #8 800faa4: 2b00 cmp r3, #0 800faa6: d003 beq.n 800fab0 { /* Truncate DLC to 8 if received field is over range */ pHeader->DLC = 8U; 800faa8: 687b ldr r3, [r7, #4] 800faaa: 2208 movs r2, #8 800faac: 611a str r2, [r3, #16] 800faae: e00b b.n 800fac8 } else { pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; 800fab0: 68fb ldr r3, [r7, #12] 800fab2: 681a ldr r2, [r3, #0] 800fab4: 68bb ldr r3, [r7, #8] 800fab6: 331b adds r3, #27 800fab8: 011b lsls r3, r3, #4 800faba: 4413 add r3, r2 800fabc: 3304 adds r3, #4 800fabe: 681b ldr r3, [r3, #0] 800fac0: f003 020f and.w r2, r3, #15 800fac4: 687b ldr r3, [r7, #4] 800fac6: 611a str r2, [r3, #16] } pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; 800fac8: 68fb ldr r3, [r7, #12] 800faca: 681a ldr r2, [r3, #0] 800facc: 68bb ldr r3, [r7, #8] 800face: 331b adds r3, #27 800fad0: 011b lsls r3, r3, #4 800fad2: 4413 add r3, r2 800fad4: 3304 adds r3, #4 800fad6: 681b ldr r3, [r3, #0] 800fad8: 0a1b lsrs r3, r3, #8 800fada: b2da uxtb r2, r3 800fadc: 687b ldr r3, [r7, #4] 800fade: 619a str r2, [r3, #24] pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; 800fae0: 68fb ldr r3, [r7, #12] 800fae2: 681a ldr r2, [r3, #0] 800fae4: 68bb ldr r3, [r7, #8] 800fae6: 331b adds r3, #27 800fae8: 011b lsls r3, r3, #4 800faea: 4413 add r3, r2 800faec: 3304 adds r3, #4 800faee: 681b ldr r3, [r3, #0] 800faf0: 0c1b lsrs r3, r3, #16 800faf2: b29a uxth r2, r3 800faf4: 687b ldr r3, [r7, #4] 800faf6: 615a str r2, [r3, #20] /* Get the data */ aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos); 800faf8: 68fb ldr r3, [r7, #12] 800fafa: 681a ldr r2, [r3, #0] 800fafc: 68bb ldr r3, [r7, #8] 800fafe: 011b lsls r3, r3, #4 800fb00: 4413 add r3, r2 800fb02: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fb06: 681b ldr r3, [r3, #0] 800fb08: b2da uxtb r2, r3 800fb0a: 683b ldr r3, [r7, #0] 800fb0c: 701a strb r2, [r3, #0] aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos); 800fb0e: 68fb ldr r3, [r7, #12] 800fb10: 681a ldr r2, [r3, #0] 800fb12: 68bb ldr r3, [r7, #8] 800fb14: 011b lsls r3, r3, #4 800fb16: 4413 add r3, r2 800fb18: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fb1c: 681b ldr r3, [r3, #0] 800fb1e: 0a1a lsrs r2, r3, #8 800fb20: 683b ldr r3, [r7, #0] 800fb22: 3301 adds r3, #1 800fb24: b2d2 uxtb r2, r2 800fb26: 701a strb r2, [r3, #0] aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos); 800fb28: 68fb ldr r3, [r7, #12] 800fb2a: 681a ldr r2, [r3, #0] 800fb2c: 68bb ldr r3, [r7, #8] 800fb2e: 011b lsls r3, r3, #4 800fb30: 4413 add r3, r2 800fb32: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fb36: 681b ldr r3, [r3, #0] 800fb38: 0c1a lsrs r2, r3, #16 800fb3a: 683b ldr r3, [r7, #0] 800fb3c: 3302 adds r3, #2 800fb3e: b2d2 uxtb r2, r2 800fb40: 701a strb r2, [r3, #0] aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos); 800fb42: 68fb ldr r3, [r7, #12] 800fb44: 681a ldr r2, [r3, #0] 800fb46: 68bb ldr r3, [r7, #8] 800fb48: 011b lsls r3, r3, #4 800fb4a: 4413 add r3, r2 800fb4c: f503 73dc add.w r3, r3, #440 @ 0x1b8 800fb50: 681b ldr r3, [r3, #0] 800fb52: 0e1a lsrs r2, r3, #24 800fb54: 683b ldr r3, [r7, #0] 800fb56: 3303 adds r3, #3 800fb58: b2d2 uxtb r2, r2 800fb5a: 701a strb r2, [r3, #0] aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos); 800fb5c: 68fb ldr r3, [r7, #12] 800fb5e: 681a ldr r2, [r3, #0] 800fb60: 68bb ldr r3, [r7, #8] 800fb62: 011b lsls r3, r3, #4 800fb64: 4413 add r3, r2 800fb66: f503 73de add.w r3, r3, #444 @ 0x1bc 800fb6a: 681a ldr r2, [r3, #0] 800fb6c: 683b ldr r3, [r7, #0] 800fb6e: 3304 adds r3, #4 800fb70: b2d2 uxtb r2, r2 800fb72: 701a strb r2, [r3, #0] aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos); 800fb74: 68fb ldr r3, [r7, #12] 800fb76: 681a ldr r2, [r3, #0] 800fb78: 68bb ldr r3, [r7, #8] 800fb7a: 011b lsls r3, r3, #4 800fb7c: 4413 add r3, r2 800fb7e: f503 73de add.w r3, r3, #444 @ 0x1bc 800fb82: 681b ldr r3, [r3, #0] 800fb84: 0a1a lsrs r2, r3, #8 800fb86: 683b ldr r3, [r7, #0] 800fb88: 3305 adds r3, #5 800fb8a: b2d2 uxtb r2, r2 800fb8c: 701a strb r2, [r3, #0] aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos); 800fb8e: 68fb ldr r3, [r7, #12] 800fb90: 681a ldr r2, [r3, #0] 800fb92: 68bb ldr r3, [r7, #8] 800fb94: 011b lsls r3, r3, #4 800fb96: 4413 add r3, r2 800fb98: f503 73de add.w r3, r3, #444 @ 0x1bc 800fb9c: 681b ldr r3, [r3, #0] 800fb9e: 0c1a lsrs r2, r3, #16 800fba0: 683b ldr r3, [r7, #0] 800fba2: 3306 adds r3, #6 800fba4: b2d2 uxtb r2, r2 800fba6: 701a strb r2, [r3, #0] aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos); 800fba8: 68fb ldr r3, [r7, #12] 800fbaa: 681a ldr r2, [r3, #0] 800fbac: 68bb ldr r3, [r7, #8] 800fbae: 011b lsls r3, r3, #4 800fbb0: 4413 add r3, r2 800fbb2: f503 73de add.w r3, r3, #444 @ 0x1bc 800fbb6: 681b ldr r3, [r3, #0] 800fbb8: 0e1a lsrs r2, r3, #24 800fbba: 683b ldr r3, [r7, #0] 800fbbc: 3307 adds r3, #7 800fbbe: b2d2 uxtb r2, r2 800fbc0: 701a strb r2, [r3, #0] /* Release the FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ 800fbc2: 68bb ldr r3, [r7, #8] 800fbc4: 2b00 cmp r3, #0 800fbc6: d108 bne.n 800fbda { /* Release RX FIFO 0 */ SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); 800fbc8: 68fb ldr r3, [r7, #12] 800fbca: 681b ldr r3, [r3, #0] 800fbcc: 68da ldr r2, [r3, #12] 800fbce: 68fb ldr r3, [r7, #12] 800fbd0: 681b ldr r3, [r3, #0] 800fbd2: f042 0220 orr.w r2, r2, #32 800fbd6: 60da str r2, [r3, #12] 800fbd8: e007 b.n 800fbea } else /* Rx element is assigned to Rx FIFO 1 */ { /* Release RX FIFO 1 */ SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); 800fbda: 68fb ldr r3, [r7, #12] 800fbdc: 681b ldr r3, [r3, #0] 800fbde: 691a ldr r2, [r3, #16] 800fbe0: 68fb ldr r3, [r7, #12] 800fbe2: 681b ldr r3, [r3, #0] 800fbe4: f042 0220 orr.w r2, r2, #32 800fbe8: 611a str r2, [r3, #16] } /* Return function status */ return HAL_OK; 800fbea: 2300 movs r3, #0 800fbec: e006 b.n 800fbfc } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800fbee: 68fb ldr r3, [r7, #12] 800fbf0: 6a5b ldr r3, [r3, #36] @ 0x24 800fbf2: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800fbf6: 68fb ldr r3, [r7, #12] 800fbf8: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fbfa: 2301 movs r3, #1 } } 800fbfc: 4618 mov r0, r3 800fbfe: 371c adds r7, #28 800fc00: 46bd mov sp, r7 800fc02: bc80 pop {r7} 800fc04: 4770 bx lr 0800fc06 : * @param ActiveITs indicates which interrupts will be enabled. * This parameter can be any combination of @arg CAN_Interrupts. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) { 800fc06: b480 push {r7} 800fc08: b085 sub sp, #20 800fc0a: af00 add r7, sp, #0 800fc0c: 6078 str r0, [r7, #4] 800fc0e: 6039 str r1, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 800fc10: 687b ldr r3, [r7, #4] 800fc12: f893 3020 ldrb.w r3, [r3, #32] 800fc16: 73fb strb r3, [r7, #15] /* Check function parameters */ assert_param(IS_CAN_IT(ActiveITs)); if ((state == HAL_CAN_STATE_READY) || 800fc18: 7bfb ldrb r3, [r7, #15] 800fc1a: 2b01 cmp r3, #1 800fc1c: d002 beq.n 800fc24 800fc1e: 7bfb ldrb r3, [r7, #15] 800fc20: 2b02 cmp r3, #2 800fc22: d109 bne.n 800fc38 (state == HAL_CAN_STATE_LISTENING)) { /* Enable the selected interrupts */ __HAL_CAN_ENABLE_IT(hcan, ActiveITs); 800fc24: 687b ldr r3, [r7, #4] 800fc26: 681b ldr r3, [r3, #0] 800fc28: 6959 ldr r1, [r3, #20] 800fc2a: 687b ldr r3, [r7, #4] 800fc2c: 681b ldr r3, [r3, #0] 800fc2e: 683a ldr r2, [r7, #0] 800fc30: 430a orrs r2, r1 800fc32: 615a str r2, [r3, #20] /* Return function status */ return HAL_OK; 800fc34: 2300 movs r3, #0 800fc36: e006 b.n 800fc46 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 800fc38: 687b ldr r3, [r7, #4] 800fc3a: 6a5b ldr r3, [r3, #36] @ 0x24 800fc3c: f443 2280 orr.w r2, r3, #262144 @ 0x40000 800fc40: 687b ldr r3, [r7, #4] 800fc42: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 800fc44: 2301 movs r3, #1 } } 800fc46: 4618 mov r0, r3 800fc48: 3714 adds r7, #20 800fc4a: 46bd mov sp, r7 800fc4c: bc80 pop {r7} 800fc4e: 4770 bx lr 0800fc50 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) { 800fc50: b580 push {r7, lr} 800fc52: b08a sub sp, #40 @ 0x28 800fc54: af00 add r7, sp, #0 800fc56: 6078 str r0, [r7, #4] uint32_t errorcode = HAL_CAN_ERROR_NONE; 800fc58: 2300 movs r3, #0 800fc5a: 627b str r3, [r7, #36] @ 0x24 uint32_t interrupts = READ_REG(hcan->Instance->IER); 800fc5c: 687b ldr r3, [r7, #4] 800fc5e: 681b ldr r3, [r3, #0] 800fc60: 695b ldr r3, [r3, #20] 800fc62: 623b str r3, [r7, #32] uint32_t msrflags = READ_REG(hcan->Instance->MSR); 800fc64: 687b ldr r3, [r7, #4] 800fc66: 681b ldr r3, [r3, #0] 800fc68: 685b ldr r3, [r3, #4] 800fc6a: 61fb str r3, [r7, #28] uint32_t tsrflags = READ_REG(hcan->Instance->TSR); 800fc6c: 687b ldr r3, [r7, #4] 800fc6e: 681b ldr r3, [r3, #0] 800fc70: 689b ldr r3, [r3, #8] 800fc72: 61bb str r3, [r7, #24] uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); 800fc74: 687b ldr r3, [r7, #4] 800fc76: 681b ldr r3, [r3, #0] 800fc78: 68db ldr r3, [r3, #12] 800fc7a: 617b str r3, [r7, #20] uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); 800fc7c: 687b ldr r3, [r7, #4] 800fc7e: 681b ldr r3, [r3, #0] 800fc80: 691b ldr r3, [r3, #16] 800fc82: 613b str r3, [r7, #16] uint32_t esrflags = READ_REG(hcan->Instance->ESR); 800fc84: 687b ldr r3, [r7, #4] 800fc86: 681b ldr r3, [r3, #0] 800fc88: 699b ldr r3, [r3, #24] 800fc8a: 60fb str r3, [r7, #12] /* Transmit Mailbox empty interrupt management *****************************/ if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) 800fc8c: 6a3b ldr r3, [r7, #32] 800fc8e: f003 0301 and.w r3, r3, #1 800fc92: 2b00 cmp r3, #0 800fc94: d07c beq.n 800fd90 { /* Transmit Mailbox 0 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP0) != 0U) 800fc96: 69bb ldr r3, [r7, #24] 800fc98: f003 0301 and.w r3, r3, #1 800fc9c: 2b00 cmp r3, #0 800fc9e: d023 beq.n 800fce8 { /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); 800fca0: 687b ldr r3, [r7, #4] 800fca2: 681b ldr r3, [r3, #0] 800fca4: 2201 movs r2, #1 800fca6: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK0) != 0U) 800fca8: 69bb ldr r3, [r7, #24] 800fcaa: f003 0302 and.w r3, r3, #2 800fcae: 2b00 cmp r3, #0 800fcb0: d003 beq.n 800fcba #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0CompleteCallback(hcan); 800fcb2: 6878 ldr r0, [r7, #4] 800fcb4: f000 f983 bl 800ffbe 800fcb8: e016 b.n 800fce8 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST0) != 0U) 800fcba: 69bb ldr r3, [r7, #24] 800fcbc: f003 0304 and.w r3, r3, #4 800fcc0: 2b00 cmp r3, #0 800fcc2: d004 beq.n 800fcce { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST0; 800fcc4: 6a7b ldr r3, [r7, #36] @ 0x24 800fcc6: f443 6300 orr.w r3, r3, #2048 @ 0x800 800fcca: 627b str r3, [r7, #36] @ 0x24 800fccc: e00c b.n 800fce8 } else if ((tsrflags & CAN_TSR_TERR0) != 0U) 800fcce: 69bb ldr r3, [r7, #24] 800fcd0: f003 0308 and.w r3, r3, #8 800fcd4: 2b00 cmp r3, #0 800fcd6: d004 beq.n 800fce2 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR0; 800fcd8: 6a7b ldr r3, [r7, #36] @ 0x24 800fcda: f443 5380 orr.w r3, r3, #4096 @ 0x1000 800fcde: 627b str r3, [r7, #36] @ 0x24 800fce0: e002 b.n 800fce8 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox0AbortCallback(hcan); 800fce2: 6878 ldr r0, [r7, #4] 800fce4: f000 f986 bl 800fff4 } } } /* Transmit Mailbox 1 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP1) != 0U) 800fce8: 69bb ldr r3, [r7, #24] 800fcea: f403 7380 and.w r3, r3, #256 @ 0x100 800fcee: 2b00 cmp r3, #0 800fcf0: d024 beq.n 800fd3c { /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); 800fcf2: 687b ldr r3, [r7, #4] 800fcf4: 681b ldr r3, [r3, #0] 800fcf6: f44f 7280 mov.w r2, #256 @ 0x100 800fcfa: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK1) != 0U) 800fcfc: 69bb ldr r3, [r7, #24] 800fcfe: f403 7300 and.w r3, r3, #512 @ 0x200 800fd02: 2b00 cmp r3, #0 800fd04: d003 beq.n 800fd0e #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1CompleteCallback(hcan); 800fd06: 6878 ldr r0, [r7, #4] 800fd08: f000 f962 bl 800ffd0 800fd0c: e016 b.n 800fd3c #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST1) != 0U) 800fd0e: 69bb ldr r3, [r7, #24] 800fd10: f403 6380 and.w r3, r3, #1024 @ 0x400 800fd14: 2b00 cmp r3, #0 800fd16: d004 beq.n 800fd22 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST1; 800fd18: 6a7b ldr r3, [r7, #36] @ 0x24 800fd1a: f443 5300 orr.w r3, r3, #8192 @ 0x2000 800fd1e: 627b str r3, [r7, #36] @ 0x24 800fd20: e00c b.n 800fd3c } else if ((tsrflags & CAN_TSR_TERR1) != 0U) 800fd22: 69bb ldr r3, [r7, #24] 800fd24: f403 6300 and.w r3, r3, #2048 @ 0x800 800fd28: 2b00 cmp r3, #0 800fd2a: d004 beq.n 800fd36 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR1; 800fd2c: 6a7b ldr r3, [r7, #36] @ 0x24 800fd2e: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800fd32: 627b str r3, [r7, #36] @ 0x24 800fd34: e002 b.n 800fd3c #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox1AbortCallback(hcan); 800fd36: 6878 ldr r0, [r7, #4] 800fd38: f000 f965 bl 8010006 } } } /* Transmit Mailbox 2 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP2) != 0U) 800fd3c: 69bb ldr r3, [r7, #24] 800fd3e: f403 3380 and.w r3, r3, #65536 @ 0x10000 800fd42: 2b00 cmp r3, #0 800fd44: d024 beq.n 800fd90 { /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); 800fd46: 687b ldr r3, [r7, #4] 800fd48: 681b ldr r3, [r3, #0] 800fd4a: f44f 3280 mov.w r2, #65536 @ 0x10000 800fd4e: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK2) != 0U) 800fd50: 69bb ldr r3, [r7, #24] 800fd52: f403 3300 and.w r3, r3, #131072 @ 0x20000 800fd56: 2b00 cmp r3, #0 800fd58: d003 beq.n 800fd62 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2CompleteCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2CompleteCallback(hcan); 800fd5a: 6878 ldr r0, [r7, #4] 800fd5c: f000 f941 bl 800ffe2 800fd60: e016 b.n 800fd90 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST2) != 0U) 800fd62: 69bb ldr r3, [r7, #24] 800fd64: f403 2380 and.w r3, r3, #262144 @ 0x40000 800fd68: 2b00 cmp r3, #0 800fd6a: d004 beq.n 800fd76 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST2; 800fd6c: 6a7b ldr r3, [r7, #36] @ 0x24 800fd6e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800fd72: 627b str r3, [r7, #36] @ 0x24 800fd74: e00c b.n 800fd90 } else if ((tsrflags & CAN_TSR_TERR2) != 0U) 800fd76: 69bb ldr r3, [r7, #24] 800fd78: f403 2300 and.w r3, r3, #524288 @ 0x80000 800fd7c: 2b00 cmp r3, #0 800fd7e: d004 beq.n 800fd8a { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR2; 800fd80: 6a7b ldr r3, [r7, #36] @ 0x24 800fd82: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800fd86: 627b str r3, [r7, #36] @ 0x24 800fd88: e002 b.n 800fd90 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2AbortCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_TxMailbox2AbortCallback(hcan); 800fd8a: 6878 ldr r0, [r7, #4] 800fd8c: f000 f944 bl 8010018 } } } /* Receive FIFO 0 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) 800fd90: 6a3b ldr r3, [r7, #32] 800fd92: f003 0308 and.w r3, r3, #8 800fd96: 2b00 cmp r3, #0 800fd98: d00c beq.n 800fdb4 { if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) 800fd9a: 697b ldr r3, [r7, #20] 800fd9c: f003 0310 and.w r3, r3, #16 800fda0: 2b00 cmp r3, #0 800fda2: d007 beq.n 800fdb4 { /* Set CAN error code to Rx Fifo 0 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV0; 800fda4: 6a7b ldr r3, [r7, #36] @ 0x24 800fda6: f443 7300 orr.w r3, r3, #512 @ 0x200 800fdaa: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO0 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); 800fdac: 687b ldr r3, [r7, #4] 800fdae: 681b ldr r3, [r3, #0] 800fdb0: 2210 movs r2, #16 800fdb2: 60da str r2, [r3, #12] } } /* Receive FIFO 0 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) 800fdb4: 6a3b ldr r3, [r7, #32] 800fdb6: f003 0304 and.w r3, r3, #4 800fdba: 2b00 cmp r3, #0 800fdbc: d00b beq.n 800fdd6 { if ((rf0rflags & CAN_RF0R_FULL0) != 0U) 800fdbe: 697b ldr r3, [r7, #20] 800fdc0: f003 0308 and.w r3, r3, #8 800fdc4: 2b00 cmp r3, #0 800fdc6: d006 beq.n 800fdd6 { /* Clear FIFO 0 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); 800fdc8: 687b ldr r3, [r7, #4] 800fdca: 681b ldr r3, [r3, #0] 800fdcc: 2208 movs r2, #8 800fdce: 60da str r2, [r3, #12] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0FullCallback(hcan); 800fdd0: 6878 ldr r0, [r7, #4] 800fdd2: f000 f92a bl 801002a #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 0 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) 800fdd6: 6a3b ldr r3, [r7, #32] 800fdd8: f003 0302 and.w r3, r3, #2 800fddc: 2b00 cmp r3, #0 800fdde: d009 beq.n 800fdf4 { /* Check if message is still pending */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) 800fde0: 687b ldr r3, [r7, #4] 800fde2: 681b ldr r3, [r3, #0] 800fde4: 68db ldr r3, [r3, #12] 800fde6: f003 0303 and.w r3, r3, #3 800fdea: 2b00 cmp r3, #0 800fdec: d002 beq.n 800fdf4 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo0MsgPendingCallback(hcan); 800fdee: 6878 ldr r0, [r7, #4] 800fdf0: f7fb fdaa bl 800b948 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) 800fdf4: 6a3b ldr r3, [r7, #32] 800fdf6: f003 0340 and.w r3, r3, #64 @ 0x40 800fdfa: 2b00 cmp r3, #0 800fdfc: d00c beq.n 800fe18 { if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) 800fdfe: 693b ldr r3, [r7, #16] 800fe00: f003 0310 and.w r3, r3, #16 800fe04: 2b00 cmp r3, #0 800fe06: d007 beq.n 800fe18 { /* Set CAN error code to Rx Fifo 1 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV1; 800fe08: 6a7b ldr r3, [r7, #36] @ 0x24 800fe0a: f443 6380 orr.w r3, r3, #1024 @ 0x400 800fe0e: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO1 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); 800fe10: 687b ldr r3, [r7, #4] 800fe12: 681b ldr r3, [r3, #0] 800fe14: 2210 movs r2, #16 800fe16: 611a str r2, [r3, #16] } } /* Receive FIFO 1 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) 800fe18: 6a3b ldr r3, [r7, #32] 800fe1a: f003 0320 and.w r3, r3, #32 800fe1e: 2b00 cmp r3, #0 800fe20: d00b beq.n 800fe3a { if ((rf1rflags & CAN_RF1R_FULL1) != 0U) 800fe22: 693b ldr r3, [r7, #16] 800fe24: f003 0308 and.w r3, r3, #8 800fe28: 2b00 cmp r3, #0 800fe2a: d006 beq.n 800fe3a { /* Clear FIFO 1 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); 800fe2c: 687b ldr r3, [r7, #4] 800fe2e: 681b ldr r3, [r3, #0] 800fe30: 2208 movs r2, #8 800fe32: 611a str r2, [r3, #16] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1FullCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1FullCallback(hcan); 800fe34: 6878 ldr r0, [r7, #4] 800fe36: f000 f901 bl 801003c #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) 800fe3a: 6a3b ldr r3, [r7, #32] 800fe3c: f003 0310 and.w r3, r3, #16 800fe40: 2b00 cmp r3, #0 800fe42: d009 beq.n 800fe58 { /* Check if message is still pending */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) 800fe44: 687b ldr r3, [r7, #4] 800fe46: 681b ldr r3, [r3, #0] 800fe48: 691b ldr r3, [r3, #16] 800fe4a: f003 0303 and.w r3, r3, #3 800fe4e: 2b00 cmp r3, #0 800fe50: d002 beq.n 800fe58 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1MsgPendingCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_RxFifo1MsgPendingCallback(hcan); 800fe52: 6878 ldr r0, [r7, #4] 800fe54: f7fc fb30 bl 800c4b8 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Sleep interrupt management *********************************************/ if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) 800fe58: 6a3b ldr r3, [r7, #32] 800fe5a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800fe5e: 2b00 cmp r3, #0 800fe60: d00b beq.n 800fe7a { if ((msrflags & CAN_MSR_SLAKI) != 0U) 800fe62: 69fb ldr r3, [r7, #28] 800fe64: f003 0310 and.w r3, r3, #16 800fe68: 2b00 cmp r3, #0 800fe6a: d006 beq.n 800fe7a { /* Clear Sleep interrupt Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); 800fe6c: 687b ldr r3, [r7, #4] 800fe6e: 681b ldr r3, [r3, #0] 800fe70: 2210 movs r2, #16 800fe72: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->SleepCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_SleepCallback(hcan); 800fe74: 6878 ldr r0, [r7, #4] 800fe76: f000 f8ea bl 801004e #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* WakeUp interrupt management *********************************************/ if ((interrupts & CAN_IT_WAKEUP) != 0U) 800fe7a: 6a3b ldr r3, [r7, #32] 800fe7c: f403 3380 and.w r3, r3, #65536 @ 0x10000 800fe80: 2b00 cmp r3, #0 800fe82: d00b beq.n 800fe9c { if ((msrflags & CAN_MSR_WKUI) != 0U) 800fe84: 69fb ldr r3, [r7, #28] 800fe86: f003 0308 and.w r3, r3, #8 800fe8a: 2b00 cmp r3, #0 800fe8c: d006 beq.n 800fe9c { /* Clear WakeUp Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); 800fe8e: 687b ldr r3, [r7, #4] 800fe90: 681b ldr r3, [r3, #0] 800fe92: 2208 movs r2, #8 800fe94: 605a str r2, [r3, #4] #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->WakeUpFromRxMsgCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_WakeUpFromRxMsgCallback(hcan); 800fe96: 6878 ldr r0, [r7, #4] 800fe98: f000 f8e2 bl 8010060 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Error interrupts management *********************************************/ if ((interrupts & CAN_IT_ERROR) != 0U) 800fe9c: 6a3b ldr r3, [r7, #32] 800fe9e: f403 4300 and.w r3, r3, #32768 @ 0x8000 800fea2: 2b00 cmp r3, #0 800fea4: d07b beq.n 800ff9e { if ((msrflags & CAN_MSR_ERRI) != 0U) 800fea6: 69fb ldr r3, [r7, #28] 800fea8: f003 0304 and.w r3, r3, #4 800feac: 2b00 cmp r3, #0 800feae: d072 beq.n 800ff96 { /* Check Error Warning Flag */ if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 800feb0: 6a3b ldr r3, [r7, #32] 800feb2: f403 7380 and.w r3, r3, #256 @ 0x100 800feb6: 2b00 cmp r3, #0 800feb8: d008 beq.n 800fecc ((esrflags & CAN_ESR_EWGF) != 0U)) 800feba: 68fb ldr r3, [r7, #12] 800febc: f003 0301 and.w r3, r3, #1 if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && 800fec0: 2b00 cmp r3, #0 800fec2: d003 beq.n 800fecc { /* Set CAN error code to Error Warning */ errorcode |= HAL_CAN_ERROR_EWG; 800fec4: 6a7b ldr r3, [r7, #36] @ 0x24 800fec6: f043 0301 orr.w r3, r3, #1 800feca: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Warning Flag as read-only */ } /* Check Error Passive Flag */ if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 800fecc: 6a3b ldr r3, [r7, #32] 800fece: f403 7300 and.w r3, r3, #512 @ 0x200 800fed2: 2b00 cmp r3, #0 800fed4: d008 beq.n 800fee8 ((esrflags & CAN_ESR_EPVF) != 0U)) 800fed6: 68fb ldr r3, [r7, #12] 800fed8: f003 0302 and.w r3, r3, #2 if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && 800fedc: 2b00 cmp r3, #0 800fede: d003 beq.n 800fee8 { /* Set CAN error code to Error Passive */ errorcode |= HAL_CAN_ERROR_EPV; 800fee0: 6a7b ldr r3, [r7, #36] @ 0x24 800fee2: f043 0302 orr.w r3, r3, #2 800fee6: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Passive Flag as read-only */ } /* Check Bus-off Flag */ if (((interrupts & CAN_IT_BUSOFF) != 0U) && 800fee8: 6a3b ldr r3, [r7, #32] 800feea: f403 6380 and.w r3, r3, #1024 @ 0x400 800feee: 2b00 cmp r3, #0 800fef0: d008 beq.n 800ff04 ((esrflags & CAN_ESR_BOFF) != 0U)) 800fef2: 68fb ldr r3, [r7, #12] 800fef4: f003 0304 and.w r3, r3, #4 if (((interrupts & CAN_IT_BUSOFF) != 0U) && 800fef8: 2b00 cmp r3, #0 800fefa: d003 beq.n 800ff04 { /* Set CAN error code to Bus-Off */ errorcode |= HAL_CAN_ERROR_BOF; 800fefc: 6a7b ldr r3, [r7, #36] @ 0x24 800fefe: f043 0304 orr.w r3, r3, #4 800ff02: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Bus-Off as read-only */ } /* Check Last Error Code Flag */ if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 800ff04: 6a3b ldr r3, [r7, #32] 800ff06: f403 6300 and.w r3, r3, #2048 @ 0x800 800ff0a: 2b00 cmp r3, #0 800ff0c: d043 beq.n 800ff96 ((esrflags & CAN_ESR_LEC) != 0U)) 800ff0e: 68fb ldr r3, [r7, #12] 800ff10: f003 0370 and.w r3, r3, #112 @ 0x70 if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && 800ff14: 2b00 cmp r3, #0 800ff16: d03e beq.n 800ff96 { switch (esrflags & CAN_ESR_LEC) 800ff18: 68fb ldr r3, [r7, #12] 800ff1a: f003 0370 and.w r3, r3, #112 @ 0x70 800ff1e: 2b60 cmp r3, #96 @ 0x60 800ff20: d02b beq.n 800ff7a 800ff22: 2b60 cmp r3, #96 @ 0x60 800ff24: d82e bhi.n 800ff84 800ff26: 2b50 cmp r3, #80 @ 0x50 800ff28: d022 beq.n 800ff70 800ff2a: 2b50 cmp r3, #80 @ 0x50 800ff2c: d82a bhi.n 800ff84 800ff2e: 2b40 cmp r3, #64 @ 0x40 800ff30: d019 beq.n 800ff66 800ff32: 2b40 cmp r3, #64 @ 0x40 800ff34: d826 bhi.n 800ff84 800ff36: 2b30 cmp r3, #48 @ 0x30 800ff38: d010 beq.n 800ff5c 800ff3a: 2b30 cmp r3, #48 @ 0x30 800ff3c: d822 bhi.n 800ff84 800ff3e: 2b10 cmp r3, #16 800ff40: d002 beq.n 800ff48 800ff42: 2b20 cmp r3, #32 800ff44: d005 beq.n 800ff52 case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): /* Set CAN error code to CRC error */ errorcode |= HAL_CAN_ERROR_CRC; break; default: break; 800ff46: e01d b.n 800ff84 errorcode |= HAL_CAN_ERROR_STF; 800ff48: 6a7b ldr r3, [r7, #36] @ 0x24 800ff4a: f043 0308 orr.w r3, r3, #8 800ff4e: 627b str r3, [r7, #36] @ 0x24 break; 800ff50: e019 b.n 800ff86 errorcode |= HAL_CAN_ERROR_FOR; 800ff52: 6a7b ldr r3, [r7, #36] @ 0x24 800ff54: f043 0310 orr.w r3, r3, #16 800ff58: 627b str r3, [r7, #36] @ 0x24 break; 800ff5a: e014 b.n 800ff86 errorcode |= HAL_CAN_ERROR_ACK; 800ff5c: 6a7b ldr r3, [r7, #36] @ 0x24 800ff5e: f043 0320 orr.w r3, r3, #32 800ff62: 627b str r3, [r7, #36] @ 0x24 break; 800ff64: e00f b.n 800ff86 errorcode |= HAL_CAN_ERROR_BR; 800ff66: 6a7b ldr r3, [r7, #36] @ 0x24 800ff68: f043 0340 orr.w r3, r3, #64 @ 0x40 800ff6c: 627b str r3, [r7, #36] @ 0x24 break; 800ff6e: e00a b.n 800ff86 errorcode |= HAL_CAN_ERROR_BD; 800ff70: 6a7b ldr r3, [r7, #36] @ 0x24 800ff72: f043 0380 orr.w r3, r3, #128 @ 0x80 800ff76: 627b str r3, [r7, #36] @ 0x24 break; 800ff78: e005 b.n 800ff86 errorcode |= HAL_CAN_ERROR_CRC; 800ff7a: 6a7b ldr r3, [r7, #36] @ 0x24 800ff7c: f443 7380 orr.w r3, r3, #256 @ 0x100 800ff80: 627b str r3, [r7, #36] @ 0x24 break; 800ff82: e000 b.n 800ff86 break; 800ff84: bf00 nop } /* Clear Last error code Flag */ CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); 800ff86: 687b ldr r3, [r7, #4] 800ff88: 681b ldr r3, [r3, #0] 800ff8a: 699a ldr r2, [r3, #24] 800ff8c: 687b ldr r3, [r7, #4] 800ff8e: 681b ldr r3, [r3, #0] 800ff90: f022 0270 bic.w r2, r2, #112 @ 0x70 800ff94: 619a str r2, [r3, #24] } } /* Clear ERRI Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); 800ff96: 687b ldr r3, [r7, #4] 800ff98: 681b ldr r3, [r3, #0] 800ff9a: 2204 movs r2, #4 800ff9c: 605a str r2, [r3, #4] } /* Call the Error call Back in case of Errors */ if (errorcode != HAL_CAN_ERROR_NONE) 800ff9e: 6a7b ldr r3, [r7, #36] @ 0x24 800ffa0: 2b00 cmp r3, #0 800ffa2: d008 beq.n 800ffb6 { /* Update error code in handle */ hcan->ErrorCode |= errorcode; 800ffa4: 687b ldr r3, [r7, #4] 800ffa6: 6a5a ldr r2, [r3, #36] @ 0x24 800ffa8: 6a7b ldr r3, [r7, #36] @ 0x24 800ffaa: 431a orrs r2, r3 800ffac: 687b ldr r3, [r7, #4] 800ffae: 625a str r2, [r3, #36] @ 0x24 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->ErrorCallback(hcan); #else /* Call weak (surcharged) callback */ HAL_CAN_ErrorCallback(hcan); 800ffb0: 6878 ldr r0, [r7, #4] 800ffb2: f000 f85e bl 8010072 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } 800ffb6: bf00 nop 800ffb8: 3728 adds r7, #40 @ 0x28 800ffba: 46bd mov sp, r7 800ffbc: bd80 pop {r7, pc} 0800ffbe : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) { 800ffbe: b480 push {r7} 800ffc0: b083 sub sp, #12 800ffc2: af00 add r7, sp, #0 800ffc4: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the user file */ } 800ffc6: bf00 nop 800ffc8: 370c adds r7, #12 800ffca: 46bd mov sp, r7 800ffcc: bc80 pop {r7} 800ffce: 4770 bx lr 0800ffd0 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) { 800ffd0: b480 push {r7} 800ffd2: b083 sub sp, #12 800ffd4: af00 add r7, sp, #0 800ffd6: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the user file */ } 800ffd8: bf00 nop 800ffda: 370c adds r7, #12 800ffdc: 46bd mov sp, r7 800ffde: bc80 pop {r7} 800ffe0: 4770 bx lr 0800ffe2 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) { 800ffe2: b480 push {r7} 800ffe4: b083 sub sp, #12 800ffe6: af00 add r7, sp, #0 800ffe8: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the user file */ } 800ffea: bf00 nop 800ffec: 370c adds r7, #12 800ffee: 46bd mov sp, r7 800fff0: bc80 pop {r7} 800fff2: 4770 bx lr 0800fff4 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) { 800fff4: b480 push {r7} 800fff6: b083 sub sp, #12 800fff8: af00 add r7, sp, #0 800fffa: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0AbortCallback could be implemented in the user file */ } 800fffc: bf00 nop 800fffe: 370c adds r7, #12 8010000: 46bd mov sp, r7 8010002: bc80 pop {r7} 8010004: 4770 bx lr 08010006 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) { 8010006: b480 push {r7} 8010008: b083 sub sp, #12 801000a: af00 add r7, sp, #0 801000c: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1AbortCallback could be implemented in the user file */ } 801000e: bf00 nop 8010010: 370c adds r7, #12 8010012: 46bd mov sp, r7 8010014: bc80 pop {r7} 8010016: 4770 bx lr 08010018 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) { 8010018: b480 push {r7} 801001a: b083 sub sp, #12 801001c: af00 add r7, sp, #0 801001e: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2AbortCallback could be implemented in the user file */ } 8010020: bf00 nop 8010022: 370c adds r7, #12 8010024: 46bd mov sp, r7 8010026: bc80 pop {r7} 8010028: 4770 bx lr 0801002a : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) { 801002a: b480 push {r7} 801002c: b083 sub sp, #12 801002e: af00 add r7, sp, #0 8010030: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo0FullCallback could be implemented in the user file */ } 8010032: bf00 nop 8010034: 370c adds r7, #12 8010036: 46bd mov sp, r7 8010038: bc80 pop {r7} 801003a: 4770 bx lr 0801003c : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) { 801003c: b480 push {r7} 801003e: b083 sub sp, #12 8010040: af00 add r7, sp, #0 8010042: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo1FullCallback could be implemented in the user file */ } 8010044: bf00 nop 8010046: 370c adds r7, #12 8010048: 46bd mov sp, r7 801004a: bc80 pop {r7} 801004c: 4770 bx lr 0801004e : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) { 801004e: b480 push {r7} 8010050: b083 sub sp, #12 8010052: af00 add r7, sp, #0 8010054: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_SleepCallback could be implemented in the user file */ } 8010056: bf00 nop 8010058: 370c adds r7, #12 801005a: 46bd mov sp, r7 801005c: bc80 pop {r7} 801005e: 4770 bx lr 08010060 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) { 8010060: b480 push {r7} 8010062: b083 sub sp, #12 8010064: af00 add r7, sp, #0 8010066: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the user file */ } 8010068: bf00 nop 801006a: 370c adds r7, #12 801006c: 46bd mov sp, r7 801006e: bc80 pop {r7} 8010070: 4770 bx lr 08010072 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) { 8010072: b480 push {r7} 8010074: b083 sub sp, #12 8010076: af00 add r7, sp, #0 8010078: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_ErrorCallback could be implemented in the user file */ } 801007a: bf00 nop 801007c: 370c adds r7, #12 801007e: 46bd mov sp, r7 8010080: bc80 pop {r7} 8010082: 4770 bx lr 08010084 <__NVIC_SetPriorityGrouping>: { 8010084: b480 push {r7} 8010086: b085 sub sp, #20 8010088: af00 add r7, sp, #0 801008a: 6078 str r0, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 801008c: 687b ldr r3, [r7, #4] 801008e: f003 0307 and.w r3, r3, #7 8010092: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8010094: 4b0c ldr r3, [pc, #48] @ (80100c8 <__NVIC_SetPriorityGrouping+0x44>) 8010096: 68db ldr r3, [r3, #12] 8010098: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 801009a: 68ba ldr r2, [r7, #8] 801009c: f64f 03ff movw r3, #63743 @ 0xf8ff 80100a0: 4013 ands r3, r2 80100a2: 60bb str r3, [r7, #8] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80100a4: 68fb ldr r3, [r7, #12] 80100a6: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80100a8: 68bb ldr r3, [r7, #8] 80100aa: 4313 orrs r3, r2 reg_value = (reg_value | 80100ac: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 80100b0: f443 3300 orr.w r3, r3, #131072 @ 0x20000 80100b4: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 80100b6: 4a04 ldr r2, [pc, #16] @ (80100c8 <__NVIC_SetPriorityGrouping+0x44>) 80100b8: 68bb ldr r3, [r7, #8] 80100ba: 60d3 str r3, [r2, #12] } 80100bc: bf00 nop 80100be: 3714 adds r7, #20 80100c0: 46bd mov sp, r7 80100c2: bc80 pop {r7} 80100c4: 4770 bx lr 80100c6: bf00 nop 80100c8: e000ed00 .word 0xe000ed00 080100cc <__NVIC_GetPriorityGrouping>: { 80100cc: b480 push {r7} 80100ce: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80100d0: 4b04 ldr r3, [pc, #16] @ (80100e4 <__NVIC_GetPriorityGrouping+0x18>) 80100d2: 68db ldr r3, [r3, #12] 80100d4: 0a1b lsrs r3, r3, #8 80100d6: f003 0307 and.w r3, r3, #7 } 80100da: 4618 mov r0, r3 80100dc: 46bd mov sp, r7 80100de: bc80 pop {r7} 80100e0: 4770 bx lr 80100e2: bf00 nop 80100e4: e000ed00 .word 0xe000ed00 080100e8 <__NVIC_EnableIRQ>: { 80100e8: b480 push {r7} 80100ea: b083 sub sp, #12 80100ec: af00 add r7, sp, #0 80100ee: 4603 mov r3, r0 80100f0: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 80100f2: f997 3007 ldrsb.w r3, [r7, #7] 80100f6: 2b00 cmp r3, #0 80100f8: db0b blt.n 8010112 <__NVIC_EnableIRQ+0x2a> NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 80100fa: 79fb ldrb r3, [r7, #7] 80100fc: f003 021f and.w r2, r3, #31 8010100: 4906 ldr r1, [pc, #24] @ (801011c <__NVIC_EnableIRQ+0x34>) 8010102: f997 3007 ldrsb.w r3, [r7, #7] 8010106: 095b lsrs r3, r3, #5 8010108: 2001 movs r0, #1 801010a: fa00 f202 lsl.w r2, r0, r2 801010e: f841 2023 str.w r2, [r1, r3, lsl #2] } 8010112: bf00 nop 8010114: 370c adds r7, #12 8010116: 46bd mov sp, r7 8010118: bc80 pop {r7} 801011a: 4770 bx lr 801011c: e000e100 .word 0xe000e100 08010120 <__NVIC_SetPriority>: { 8010120: b480 push {r7} 8010122: b083 sub sp, #12 8010124: af00 add r7, sp, #0 8010126: 4603 mov r3, r0 8010128: 6039 str r1, [r7, #0] 801012a: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 801012c: f997 3007 ldrsb.w r3, [r7, #7] 8010130: 2b00 cmp r3, #0 8010132: db0a blt.n 801014a <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8010134: 683b ldr r3, [r7, #0] 8010136: b2da uxtb r2, r3 8010138: 490c ldr r1, [pc, #48] @ (801016c <__NVIC_SetPriority+0x4c>) 801013a: f997 3007 ldrsb.w r3, [r7, #7] 801013e: 0112 lsls r2, r2, #4 8010140: b2d2 uxtb r2, r2 8010142: 440b add r3, r1 8010144: f883 2300 strb.w r2, [r3, #768] @ 0x300 } 8010148: e00a b.n 8010160 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 801014a: 683b ldr r3, [r7, #0] 801014c: b2da uxtb r2, r3 801014e: 4908 ldr r1, [pc, #32] @ (8010170 <__NVIC_SetPriority+0x50>) 8010150: 79fb ldrb r3, [r7, #7] 8010152: f003 030f and.w r3, r3, #15 8010156: 3b04 subs r3, #4 8010158: 0112 lsls r2, r2, #4 801015a: b2d2 uxtb r2, r2 801015c: 440b add r3, r1 801015e: 761a strb r2, [r3, #24] } 8010160: bf00 nop 8010162: 370c adds r7, #12 8010164: 46bd mov sp, r7 8010166: bc80 pop {r7} 8010168: 4770 bx lr 801016a: bf00 nop 801016c: e000e100 .word 0xe000e100 8010170: e000ed00 .word 0xe000ed00 08010174 : { 8010174: b480 push {r7} 8010176: b089 sub sp, #36 @ 0x24 8010178: af00 add r7, sp, #0 801017a: 60f8 str r0, [r7, #12] 801017c: 60b9 str r1, [r7, #8] 801017e: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8010180: 68fb ldr r3, [r7, #12] 8010182: f003 0307 and.w r3, r3, #7 8010186: 61fb str r3, [r7, #28] PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8010188: 69fb ldr r3, [r7, #28] 801018a: f1c3 0307 rsb r3, r3, #7 801018e: 2b04 cmp r3, #4 8010190: bf28 it cs 8010192: 2304 movcs r3, #4 8010194: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8010196: 69fb ldr r3, [r7, #28] 8010198: 3304 adds r3, #4 801019a: 2b06 cmp r3, #6 801019c: d902 bls.n 80101a4 801019e: 69fb ldr r3, [r7, #28] 80101a0: 3b03 subs r3, #3 80101a2: e000 b.n 80101a6 80101a4: 2300 movs r3, #0 80101a6: 617b str r3, [r7, #20] ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80101a8: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80101ac: 69bb ldr r3, [r7, #24] 80101ae: fa02 f303 lsl.w r3, r2, r3 80101b2: 43da mvns r2, r3 80101b4: 68bb ldr r3, [r7, #8] 80101b6: 401a ands r2, r3 80101b8: 697b ldr r3, [r7, #20] 80101ba: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 80101bc: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 80101c0: 697b ldr r3, [r7, #20] 80101c2: fa01 f303 lsl.w r3, r1, r3 80101c6: 43d9 mvns r1, r3 80101c8: 687b ldr r3, [r7, #4] 80101ca: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80101cc: 4313 orrs r3, r2 } 80101ce: 4618 mov r0, r3 80101d0: 3724 adds r7, #36 @ 0x24 80101d2: 46bd mov sp, r7 80101d4: bc80 pop {r7} 80101d6: 4770 bx lr 080101d8 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 80101d8: b580 push {r7, lr} 80101da: b082 sub sp, #8 80101dc: af00 add r7, sp, #0 80101de: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 80101e0: 687b ldr r3, [r7, #4] 80101e2: 3b01 subs r3, #1 80101e4: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 80101e8: d301 bcc.n 80101ee { return (1UL); /* Reload value impossible */ 80101ea: 2301 movs r3, #1 80101ec: e00f b.n 801020e } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80101ee: 4a0a ldr r2, [pc, #40] @ (8010218 ) 80101f0: 687b ldr r3, [r7, #4] 80101f2: 3b01 subs r3, #1 80101f4: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 80101f6: 210f movs r1, #15 80101f8: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80101fc: f7ff ff90 bl 8010120 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8010200: 4b05 ldr r3, [pc, #20] @ (8010218 ) 8010202: 2200 movs r2, #0 8010204: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8010206: 4b04 ldr r3, [pc, #16] @ (8010218 ) 8010208: 2207 movs r2, #7 801020a: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 801020c: 2300 movs r3, #0 } 801020e: 4618 mov r0, r3 8010210: 3708 adds r7, #8 8010212: 46bd mov sp, r7 8010214: bd80 pop {r7, pc} 8010216: bf00 nop 8010218: e000e010 .word 0xe000e010 0801021c : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 801021c: b580 push {r7, lr} 801021e: b082 sub sp, #8 8010220: af00 add r7, sp, #0 8010222: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8010224: 6878 ldr r0, [r7, #4] 8010226: f7ff ff2d bl 8010084 <__NVIC_SetPriorityGrouping> } 801022a: bf00 nop 801022c: 3708 adds r7, #8 801022e: 46bd mov sp, r7 8010230: bd80 pop {r7, pc} 08010232 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8010232: b580 push {r7, lr} 8010234: b086 sub sp, #24 8010236: af00 add r7, sp, #0 8010238: 4603 mov r3, r0 801023a: 60b9 str r1, [r7, #8] 801023c: 607a str r2, [r7, #4] 801023e: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8010240: 2300 movs r3, #0 8010242: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8010244: f7ff ff42 bl 80100cc <__NVIC_GetPriorityGrouping> 8010248: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 801024a: 687a ldr r2, [r7, #4] 801024c: 68b9 ldr r1, [r7, #8] 801024e: 6978 ldr r0, [r7, #20] 8010250: f7ff ff90 bl 8010174 8010254: 4602 mov r2, r0 8010256: f997 300f ldrsb.w r3, [r7, #15] 801025a: 4611 mov r1, r2 801025c: 4618 mov r0, r3 801025e: f7ff ff5f bl 8010120 <__NVIC_SetPriority> } 8010262: bf00 nop 8010264: 3718 adds r7, #24 8010266: 46bd mov sp, r7 8010268: bd80 pop {r7, pc} 0801026a : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 801026a: b580 push {r7, lr} 801026c: b082 sub sp, #8 801026e: af00 add r7, sp, #0 8010270: 4603 mov r3, r0 8010272: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8010274: f997 3007 ldrsb.w r3, [r7, #7] 8010278: 4618 mov r0, r3 801027a: f7ff ff35 bl 80100e8 <__NVIC_EnableIRQ> } 801027e: bf00 nop 8010280: 3708 adds r7, #8 8010282: 46bd mov sp, r7 8010284: bd80 pop {r7, pc} 08010286 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8010286: b580 push {r7, lr} 8010288: b082 sub sp, #8 801028a: af00 add r7, sp, #0 801028c: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 801028e: 6878 ldr r0, [r7, #4] 8010290: f7ff ffa2 bl 80101d8 8010294: 4603 mov r3, r0 } 8010296: 4618 mov r0, r3 8010298: 3708 adds r7, #8 801029a: 46bd mov sp, r7 801029c: bd80 pop {r7, pc} 0801029e : * parameters in the CRC_InitTypeDef and create the associated handle. * @param hcrc CRC handle * @retval HAL status */ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) { 801029e: b580 push {r7, lr} 80102a0: b082 sub sp, #8 80102a2: af00 add r7, sp, #0 80102a4: 6078 str r0, [r7, #4] /* Check the CRC handle allocation */ if (hcrc == NULL) 80102a6: 687b ldr r3, [r7, #4] 80102a8: 2b00 cmp r3, #0 80102aa: d101 bne.n 80102b0 { return HAL_ERROR; 80102ac: 2301 movs r3, #1 80102ae: e00e b.n 80102ce } /* Check the parameters */ assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); if (hcrc->State == HAL_CRC_STATE_RESET) 80102b0: 687b ldr r3, [r7, #4] 80102b2: 795b ldrb r3, [r3, #5] 80102b4: b2db uxtb r3, r3 80102b6: 2b00 cmp r3, #0 80102b8: d105 bne.n 80102c6 { /* Allocate lock resource and initialize it */ hcrc->Lock = HAL_UNLOCKED; 80102ba: 687b ldr r3, [r7, #4] 80102bc: 2200 movs r2, #0 80102be: 711a strb r2, [r3, #4] /* Init the low level hardware */ HAL_CRC_MspInit(hcrc); 80102c0: 6878 ldr r0, [r7, #4] 80102c2: f7fb f823 bl 800b30c } /* Change CRC peripheral state */ hcrc->State = HAL_CRC_STATE_READY; 80102c6: 687b ldr r3, [r7, #4] 80102c8: 2201 movs r2, #1 80102ca: 715a strb r2, [r3, #5] /* Return function status */ return HAL_OK; 80102cc: 2300 movs r3, #0 } 80102ce: 4618 mov r0, r3 80102d0: 3708 adds r7, #8 80102d2: 46bd mov sp, r7 80102d4: bd80 pop {r7, pc} 080102d6 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 80102d6: b480 push {r7} 80102d8: b085 sub sp, #20 80102da: af00 add r7, sp, #0 80102dc: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80102de: 2300 movs r3, #0 80102e0: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) 80102e2: 687b ldr r3, [r7, #4] 80102e4: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 80102e8: b2db uxtb r3, r3 80102ea: 2b02 cmp r3, #2 80102ec: d008 beq.n 8010300 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80102ee: 687b ldr r3, [r7, #4] 80102f0: 2204 movs r2, #4 80102f2: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); 80102f4: 687b ldr r3, [r7, #4] 80102f6: 2200 movs r2, #0 80102f8: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 80102fc: 2301 movs r3, #1 80102fe: e020 b.n 8010342 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8010300: 687b ldr r3, [r7, #4] 8010302: 681b ldr r3, [r3, #0] 8010304: 681a ldr r2, [r3, #0] 8010306: 687b ldr r3, [r7, #4] 8010308: 681b ldr r3, [r3, #0] 801030a: f022 020e bic.w r2, r2, #14 801030e: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8010310: 687b ldr r3, [r7, #4] 8010312: 681b ldr r3, [r3, #0] 8010314: 681a ldr r2, [r3, #0] 8010316: 687b ldr r3, [r7, #4] 8010318: 681b ldr r3, [r3, #0] 801031a: f022 0201 bic.w r2, r2, #1 801031e: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8010320: 687b ldr r3, [r7, #4] 8010322: 6c1a ldr r2, [r3, #64] @ 0x40 8010324: 687b ldr r3, [r7, #4] 8010326: 6bdb ldr r3, [r3, #60] @ 0x3c 8010328: 2101 movs r1, #1 801032a: fa01 f202 lsl.w r2, r1, r2 801032e: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8010330: 687b ldr r3, [r7, #4] 8010332: 2201 movs r2, #1 8010334: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8010338: 687b ldr r3, [r7, #4] 801033a: 2200 movs r2, #0 801033c: f883 2020 strb.w r2, [r3, #32] return status; 8010340: 7bfb ldrb r3, [r7, #15] } 8010342: 4618 mov r0, r3 8010344: 3714 adds r7, #20 8010346: 46bd mov sp, r7 8010348: bc80 pop {r7} 801034a: 4770 bx lr 0801034c : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 801034c: b580 push {r7, lr} 801034e: b084 sub sp, #16 8010350: af00 add r7, sp, #0 8010352: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8010354: 2300 movs r3, #0 8010356: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) 8010358: 687b ldr r3, [r7, #4] 801035a: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 801035e: b2db uxtb r3, r3 8010360: 2b02 cmp r3, #2 8010362: d005 beq.n 8010370 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8010364: 687b ldr r3, [r7, #4] 8010366: 2204 movs r2, #4 8010368: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; 801036a: 2301 movs r3, #1 801036c: 73fb strb r3, [r7, #15] 801036e: e0d6 b.n 801051e } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8010370: 687b ldr r3, [r7, #4] 8010372: 681b ldr r3, [r3, #0] 8010374: 681a ldr r2, [r3, #0] 8010376: 687b ldr r3, [r7, #4] 8010378: 681b ldr r3, [r3, #0] 801037a: f022 020e bic.w r2, r2, #14 801037e: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8010380: 687b ldr r3, [r7, #4] 8010382: 681b ldr r3, [r3, #0] 8010384: 681a ldr r2, [r3, #0] 8010386: 687b ldr r3, [r7, #4] 8010388: 681b ldr r3, [r3, #0] 801038a: f022 0201 bic.w r2, r2, #1 801038e: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8010390: 687b ldr r3, [r7, #4] 8010392: 681b ldr r3, [r3, #0] 8010394: 461a mov r2, r3 8010396: 4b64 ldr r3, [pc, #400] @ (8010528 ) 8010398: 429a cmp r2, r3 801039a: d958 bls.n 801044e 801039c: 687b ldr r3, [r7, #4] 801039e: 681b ldr r3, [r3, #0] 80103a0: 4a62 ldr r2, [pc, #392] @ (801052c ) 80103a2: 4293 cmp r3, r2 80103a4: d04f beq.n 8010446 80103a6: 687b ldr r3, [r7, #4] 80103a8: 681b ldr r3, [r3, #0] 80103aa: 4a61 ldr r2, [pc, #388] @ (8010530 ) 80103ac: 4293 cmp r3, r2 80103ae: d048 beq.n 8010442 80103b0: 687b ldr r3, [r7, #4] 80103b2: 681b ldr r3, [r3, #0] 80103b4: 4a5f ldr r2, [pc, #380] @ (8010534 ) 80103b6: 4293 cmp r3, r2 80103b8: d040 beq.n 801043c 80103ba: 687b ldr r3, [r7, #4] 80103bc: 681b ldr r3, [r3, #0] 80103be: 4a5e ldr r2, [pc, #376] @ (8010538 ) 80103c0: 4293 cmp r3, r2 80103c2: d038 beq.n 8010436 80103c4: 687b ldr r3, [r7, #4] 80103c6: 681b ldr r3, [r3, #0] 80103c8: 4a5c ldr r2, [pc, #368] @ (801053c ) 80103ca: 4293 cmp r3, r2 80103cc: d030 beq.n 8010430 80103ce: 687b ldr r3, [r7, #4] 80103d0: 681b ldr r3, [r3, #0] 80103d2: 4a5b ldr r2, [pc, #364] @ (8010540 ) 80103d4: 4293 cmp r3, r2 80103d6: d028 beq.n 801042a 80103d8: 687b ldr r3, [r7, #4] 80103da: 681b ldr r3, [r3, #0] 80103dc: 4a52 ldr r2, [pc, #328] @ (8010528 ) 80103de: 4293 cmp r3, r2 80103e0: d020 beq.n 8010424 80103e2: 687b ldr r3, [r7, #4] 80103e4: 681b ldr r3, [r3, #0] 80103e6: 4a57 ldr r2, [pc, #348] @ (8010544 ) 80103e8: 4293 cmp r3, r2 80103ea: d019 beq.n 8010420 80103ec: 687b ldr r3, [r7, #4] 80103ee: 681b ldr r3, [r3, #0] 80103f0: 4a55 ldr r2, [pc, #340] @ (8010548 ) 80103f2: 4293 cmp r3, r2 80103f4: d012 beq.n 801041c 80103f6: 687b ldr r3, [r7, #4] 80103f8: 681b ldr r3, [r3, #0] 80103fa: 4a54 ldr r2, [pc, #336] @ (801054c ) 80103fc: 4293 cmp r3, r2 80103fe: d00a beq.n 8010416 8010400: 687b ldr r3, [r7, #4] 8010402: 681b ldr r3, [r3, #0] 8010404: 4a52 ldr r2, [pc, #328] @ (8010550 ) 8010406: 4293 cmp r3, r2 8010408: d102 bne.n 8010410 801040a: f44f 5380 mov.w r3, #4096 @ 0x1000 801040e: e01b b.n 8010448 8010410: f44f 3380 mov.w r3, #65536 @ 0x10000 8010414: e018 b.n 8010448 8010416: f44f 7380 mov.w r3, #256 @ 0x100 801041a: e015 b.n 8010448 801041c: 2310 movs r3, #16 801041e: e013 b.n 8010448 8010420: 2301 movs r3, #1 8010422: e011 b.n 8010448 8010424: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8010428: e00e b.n 8010448 801042a: f44f 1380 mov.w r3, #1048576 @ 0x100000 801042e: e00b b.n 8010448 8010430: f44f 3380 mov.w r3, #65536 @ 0x10000 8010434: e008 b.n 8010448 8010436: f44f 5380 mov.w r3, #4096 @ 0x1000 801043a: e005 b.n 8010448 801043c: f44f 7380 mov.w r3, #256 @ 0x100 8010440: e002 b.n 8010448 8010442: 2310 movs r3, #16 8010444: e000 b.n 8010448 8010446: 2301 movs r3, #1 8010448: 4a42 ldr r2, [pc, #264] @ (8010554 ) 801044a: 6053 str r3, [r2, #4] 801044c: e057 b.n 80104fe 801044e: 687b ldr r3, [r7, #4] 8010450: 681b ldr r3, [r3, #0] 8010452: 4a36 ldr r2, [pc, #216] @ (801052c ) 8010454: 4293 cmp r3, r2 8010456: d04f beq.n 80104f8 8010458: 687b ldr r3, [r7, #4] 801045a: 681b ldr r3, [r3, #0] 801045c: 4a34 ldr r2, [pc, #208] @ (8010530 ) 801045e: 4293 cmp r3, r2 8010460: d048 beq.n 80104f4 8010462: 687b ldr r3, [r7, #4] 8010464: 681b ldr r3, [r3, #0] 8010466: 4a33 ldr r2, [pc, #204] @ (8010534 ) 8010468: 4293 cmp r3, r2 801046a: d040 beq.n 80104ee 801046c: 687b ldr r3, [r7, #4] 801046e: 681b ldr r3, [r3, #0] 8010470: 4a31 ldr r2, [pc, #196] @ (8010538 ) 8010472: 4293 cmp r3, r2 8010474: d038 beq.n 80104e8 8010476: 687b ldr r3, [r7, #4] 8010478: 681b ldr r3, [r3, #0] 801047a: 4a30 ldr r2, [pc, #192] @ (801053c ) 801047c: 4293 cmp r3, r2 801047e: d030 beq.n 80104e2 8010480: 687b ldr r3, [r7, #4] 8010482: 681b ldr r3, [r3, #0] 8010484: 4a2e ldr r2, [pc, #184] @ (8010540 ) 8010486: 4293 cmp r3, r2 8010488: d028 beq.n 80104dc 801048a: 687b ldr r3, [r7, #4] 801048c: 681b ldr r3, [r3, #0] 801048e: 4a26 ldr r2, [pc, #152] @ (8010528 ) 8010490: 4293 cmp r3, r2 8010492: d020 beq.n 80104d6 8010494: 687b ldr r3, [r7, #4] 8010496: 681b ldr r3, [r3, #0] 8010498: 4a2a ldr r2, [pc, #168] @ (8010544 ) 801049a: 4293 cmp r3, r2 801049c: d019 beq.n 80104d2 801049e: 687b ldr r3, [r7, #4] 80104a0: 681b ldr r3, [r3, #0] 80104a2: 4a29 ldr r2, [pc, #164] @ (8010548 ) 80104a4: 4293 cmp r3, r2 80104a6: d012 beq.n 80104ce 80104a8: 687b ldr r3, [r7, #4] 80104aa: 681b ldr r3, [r3, #0] 80104ac: 4a27 ldr r2, [pc, #156] @ (801054c ) 80104ae: 4293 cmp r3, r2 80104b0: d00a beq.n 80104c8 80104b2: 687b ldr r3, [r7, #4] 80104b4: 681b ldr r3, [r3, #0] 80104b6: 4a26 ldr r2, [pc, #152] @ (8010550 ) 80104b8: 4293 cmp r3, r2 80104ba: d102 bne.n 80104c2 80104bc: f44f 5380 mov.w r3, #4096 @ 0x1000 80104c0: e01b b.n 80104fa 80104c2: f44f 3380 mov.w r3, #65536 @ 0x10000 80104c6: e018 b.n 80104fa 80104c8: f44f 7380 mov.w r3, #256 @ 0x100 80104cc: e015 b.n 80104fa 80104ce: 2310 movs r3, #16 80104d0: e013 b.n 80104fa 80104d2: 2301 movs r3, #1 80104d4: e011 b.n 80104fa 80104d6: f04f 7380 mov.w r3, #16777216 @ 0x1000000 80104da: e00e b.n 80104fa 80104dc: f44f 1380 mov.w r3, #1048576 @ 0x100000 80104e0: e00b b.n 80104fa 80104e2: f44f 3380 mov.w r3, #65536 @ 0x10000 80104e6: e008 b.n 80104fa 80104e8: f44f 5380 mov.w r3, #4096 @ 0x1000 80104ec: e005 b.n 80104fa 80104ee: f44f 7380 mov.w r3, #256 @ 0x100 80104f2: e002 b.n 80104fa 80104f4: 2310 movs r3, #16 80104f6: e000 b.n 80104fa 80104f8: 2301 movs r3, #1 80104fa: 4a17 ldr r2, [pc, #92] @ (8010558 ) 80104fc: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 80104fe: 687b ldr r3, [r7, #4] 8010500: 2201 movs r2, #1 8010502: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8010506: 687b ldr r3, [r7, #4] 8010508: 2200 movs r2, #0 801050a: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 801050e: 687b ldr r3, [r7, #4] 8010510: 6b5b ldr r3, [r3, #52] @ 0x34 8010512: 2b00 cmp r3, #0 8010514: d003 beq.n 801051e { hdma->XferAbortCallback(hdma); 8010516: 687b ldr r3, [r7, #4] 8010518: 6b5b ldr r3, [r3, #52] @ 0x34 801051a: 6878 ldr r0, [r7, #4] 801051c: 4798 blx r3 } } return status; 801051e: 7bfb ldrb r3, [r7, #15] } 8010520: 4618 mov r0, r3 8010522: 3710 adds r7, #16 8010524: 46bd mov sp, r7 8010526: bd80 pop {r7, pc} 8010528: 40020080 .word 0x40020080 801052c: 40020008 .word 0x40020008 8010530: 4002001c .word 0x4002001c 8010534: 40020030 .word 0x40020030 8010538: 40020044 .word 0x40020044 801053c: 40020058 .word 0x40020058 8010540: 4002006c .word 0x4002006c 8010544: 40020408 .word 0x40020408 8010548: 4002041c .word 0x4002041c 801054c: 40020430 .word 0x40020430 8010550: 40020444 .word 0x40020444 8010554: 40020400 .word 0x40020400 8010558: 40020000 .word 0x40020000 0801055c : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 801055c: b480 push {r7} 801055e: b08b sub sp, #44 @ 0x2c 8010560: af00 add r7, sp, #0 8010562: 6078 str r0, [r7, #4] 8010564: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 8010566: 2300 movs r3, #0 8010568: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 801056a: 2300 movs r3, #0 801056c: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 801056e: e169 b.n 8010844 { /* Get the IO position */ ioposition = (0x01uL << position); 8010570: 2201 movs r2, #1 8010572: 6a7b ldr r3, [r7, #36] @ 0x24 8010574: fa02 f303 lsl.w r3, r2, r3 8010578: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 801057a: 683b ldr r3, [r7, #0] 801057c: 681b ldr r3, [r3, #0] 801057e: 69fa ldr r2, [r7, #28] 8010580: 4013 ands r3, r2 8010582: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 8010584: 69ba ldr r2, [r7, #24] 8010586: 69fb ldr r3, [r7, #28] 8010588: 429a cmp r2, r3 801058a: f040 8158 bne.w 801083e { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 801058e: 683b ldr r3, [r7, #0] 8010590: 685b ldr r3, [r3, #4] 8010592: 4a9a ldr r2, [pc, #616] @ (80107fc ) 8010594: 4293 cmp r3, r2 8010596: d05e beq.n 8010656 8010598: 4a98 ldr r2, [pc, #608] @ (80107fc ) 801059a: 4293 cmp r3, r2 801059c: d875 bhi.n 801068a 801059e: 4a98 ldr r2, [pc, #608] @ (8010800 ) 80105a0: 4293 cmp r3, r2 80105a2: d058 beq.n 8010656 80105a4: 4a96 ldr r2, [pc, #600] @ (8010800 ) 80105a6: 4293 cmp r3, r2 80105a8: d86f bhi.n 801068a 80105aa: 4a96 ldr r2, [pc, #600] @ (8010804 ) 80105ac: 4293 cmp r3, r2 80105ae: d052 beq.n 8010656 80105b0: 4a94 ldr r2, [pc, #592] @ (8010804 ) 80105b2: 4293 cmp r3, r2 80105b4: d869 bhi.n 801068a 80105b6: 4a94 ldr r2, [pc, #592] @ (8010808 ) 80105b8: 4293 cmp r3, r2 80105ba: d04c beq.n 8010656 80105bc: 4a92 ldr r2, [pc, #584] @ (8010808 ) 80105be: 4293 cmp r3, r2 80105c0: d863 bhi.n 801068a 80105c2: 4a92 ldr r2, [pc, #584] @ (801080c ) 80105c4: 4293 cmp r3, r2 80105c6: d046 beq.n 8010656 80105c8: 4a90 ldr r2, [pc, #576] @ (801080c ) 80105ca: 4293 cmp r3, r2 80105cc: d85d bhi.n 801068a 80105ce: 2b12 cmp r3, #18 80105d0: d82a bhi.n 8010628 80105d2: 2b12 cmp r3, #18 80105d4: d859 bhi.n 801068a 80105d6: a201 add r2, pc, #4 @ (adr r2, 80105dc ) 80105d8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80105dc: 08010657 .word 0x08010657 80105e0: 08010631 .word 0x08010631 80105e4: 08010643 .word 0x08010643 80105e8: 08010685 .word 0x08010685 80105ec: 0801068b .word 0x0801068b 80105f0: 0801068b .word 0x0801068b 80105f4: 0801068b .word 0x0801068b 80105f8: 0801068b .word 0x0801068b 80105fc: 0801068b .word 0x0801068b 8010600: 0801068b .word 0x0801068b 8010604: 0801068b .word 0x0801068b 8010608: 0801068b .word 0x0801068b 801060c: 0801068b .word 0x0801068b 8010610: 0801068b .word 0x0801068b 8010614: 0801068b .word 0x0801068b 8010618: 0801068b .word 0x0801068b 801061c: 0801068b .word 0x0801068b 8010620: 08010639 .word 0x08010639 8010624: 0801064d .word 0x0801064d 8010628: 4a79 ldr r2, [pc, #484] @ (8010810 ) 801062a: 4293 cmp r3, r2 801062c: d013 beq.n 8010656 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 801062e: e02c b.n 801068a config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8010630: 683b ldr r3, [r7, #0] 8010632: 68db ldr r3, [r3, #12] 8010634: 623b str r3, [r7, #32] break; 8010636: e029 b.n 801068c config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8010638: 683b ldr r3, [r7, #0] 801063a: 68db ldr r3, [r3, #12] 801063c: 3304 adds r3, #4 801063e: 623b str r3, [r7, #32] break; 8010640: e024 b.n 801068c config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8010642: 683b ldr r3, [r7, #0] 8010644: 68db ldr r3, [r3, #12] 8010646: 3308 adds r3, #8 8010648: 623b str r3, [r7, #32] break; 801064a: e01f b.n 801068c config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 801064c: 683b ldr r3, [r7, #0] 801064e: 68db ldr r3, [r3, #12] 8010650: 330c adds r3, #12 8010652: 623b str r3, [r7, #32] break; 8010654: e01a b.n 801068c if (GPIO_Init->Pull == GPIO_NOPULL) 8010656: 683b ldr r3, [r7, #0] 8010658: 689b ldr r3, [r3, #8] 801065a: 2b00 cmp r3, #0 801065c: d102 bne.n 8010664 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 801065e: 2304 movs r3, #4 8010660: 623b str r3, [r7, #32] break; 8010662: e013 b.n 801068c else if (GPIO_Init->Pull == GPIO_PULLUP) 8010664: 683b ldr r3, [r7, #0] 8010666: 689b ldr r3, [r3, #8] 8010668: 2b01 cmp r3, #1 801066a: d105 bne.n 8010678 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 801066c: 2308 movs r3, #8 801066e: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 8010670: 687b ldr r3, [r7, #4] 8010672: 69fa ldr r2, [r7, #28] 8010674: 611a str r2, [r3, #16] break; 8010676: e009 b.n 801068c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8010678: 2308 movs r3, #8 801067a: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 801067c: 687b ldr r3, [r7, #4] 801067e: 69fa ldr r2, [r7, #28] 8010680: 615a str r2, [r3, #20] break; 8010682: e003 b.n 801068c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8010684: 2300 movs r3, #0 8010686: 623b str r3, [r7, #32] break; 8010688: e000 b.n 801068c break; 801068a: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 801068c: 69bb ldr r3, [r7, #24] 801068e: 2bff cmp r3, #255 @ 0xff 8010690: d801 bhi.n 8010696 8010692: 687b ldr r3, [r7, #4] 8010694: e001 b.n 801069a 8010696: 687b ldr r3, [r7, #4] 8010698: 3304 adds r3, #4 801069a: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 801069c: 69bb ldr r3, [r7, #24] 801069e: 2bff cmp r3, #255 @ 0xff 80106a0: d802 bhi.n 80106a8 80106a2: 6a7b ldr r3, [r7, #36] @ 0x24 80106a4: 009b lsls r3, r3, #2 80106a6: e002 b.n 80106ae 80106a8: 6a7b ldr r3, [r7, #36] @ 0x24 80106aa: 3b08 subs r3, #8 80106ac: 009b lsls r3, r3, #2 80106ae: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80106b0: 697b ldr r3, [r7, #20] 80106b2: 681a ldr r2, [r3, #0] 80106b4: 210f movs r1, #15 80106b6: 693b ldr r3, [r7, #16] 80106b8: fa01 f303 lsl.w r3, r1, r3 80106bc: 43db mvns r3, r3 80106be: 401a ands r2, r3 80106c0: 6a39 ldr r1, [r7, #32] 80106c2: 693b ldr r3, [r7, #16] 80106c4: fa01 f303 lsl.w r3, r1, r3 80106c8: 431a orrs r2, r3 80106ca: 697b ldr r3, [r7, #20] 80106cc: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 80106ce: 683b ldr r3, [r7, #0] 80106d0: 685b ldr r3, [r3, #4] 80106d2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80106d6: 2b00 cmp r3, #0 80106d8: f000 80b1 beq.w 801083e { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 80106dc: 4b4d ldr r3, [pc, #308] @ (8010814 ) 80106de: 699b ldr r3, [r3, #24] 80106e0: 4a4c ldr r2, [pc, #304] @ (8010814 ) 80106e2: f043 0301 orr.w r3, r3, #1 80106e6: 6193 str r3, [r2, #24] 80106e8: 4b4a ldr r3, [pc, #296] @ (8010814 ) 80106ea: 699b ldr r3, [r3, #24] 80106ec: f003 0301 and.w r3, r3, #1 80106f0: 60bb str r3, [r7, #8] 80106f2: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 80106f4: 4a48 ldr r2, [pc, #288] @ (8010818 ) 80106f6: 6a7b ldr r3, [r7, #36] @ 0x24 80106f8: 089b lsrs r3, r3, #2 80106fa: 3302 adds r3, #2 80106fc: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8010700: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8010702: 6a7b ldr r3, [r7, #36] @ 0x24 8010704: f003 0303 and.w r3, r3, #3 8010708: 009b lsls r3, r3, #2 801070a: 220f movs r2, #15 801070c: fa02 f303 lsl.w r3, r2, r3 8010710: 43db mvns r3, r3 8010712: 68fa ldr r2, [r7, #12] 8010714: 4013 ands r3, r2 8010716: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8010718: 687b ldr r3, [r7, #4] 801071a: 4a40 ldr r2, [pc, #256] @ (801081c ) 801071c: 4293 cmp r3, r2 801071e: d013 beq.n 8010748 8010720: 687b ldr r3, [r7, #4] 8010722: 4a3f ldr r2, [pc, #252] @ (8010820 ) 8010724: 4293 cmp r3, r2 8010726: d00d beq.n 8010744 8010728: 687b ldr r3, [r7, #4] 801072a: 4a3e ldr r2, [pc, #248] @ (8010824 ) 801072c: 4293 cmp r3, r2 801072e: d007 beq.n 8010740 8010730: 687b ldr r3, [r7, #4] 8010732: 4a3d ldr r2, [pc, #244] @ (8010828 ) 8010734: 4293 cmp r3, r2 8010736: d101 bne.n 801073c 8010738: 2303 movs r3, #3 801073a: e006 b.n 801074a 801073c: 2304 movs r3, #4 801073e: e004 b.n 801074a 8010740: 2302 movs r3, #2 8010742: e002 b.n 801074a 8010744: 2301 movs r3, #1 8010746: e000 b.n 801074a 8010748: 2300 movs r3, #0 801074a: 6a7a ldr r2, [r7, #36] @ 0x24 801074c: f002 0203 and.w r2, r2, #3 8010750: 0092 lsls r2, r2, #2 8010752: 4093 lsls r3, r2 8010754: 68fa ldr r2, [r7, #12] 8010756: 4313 orrs r3, r2 8010758: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 801075a: 492f ldr r1, [pc, #188] @ (8010818 ) 801075c: 6a7b ldr r3, [r7, #36] @ 0x24 801075e: 089b lsrs r3, r3, #2 8010760: 3302 adds r3, #2 8010762: 68fa ldr r2, [r7, #12] 8010764: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8010768: 683b ldr r3, [r7, #0] 801076a: 685b ldr r3, [r3, #4] 801076c: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8010770: 2b00 cmp r3, #0 8010772: d006 beq.n 8010782 { SET_BIT(EXTI->RTSR, iocurrent); 8010774: 4b2d ldr r3, [pc, #180] @ (801082c ) 8010776: 689a ldr r2, [r3, #8] 8010778: 492c ldr r1, [pc, #176] @ (801082c ) 801077a: 69bb ldr r3, [r7, #24] 801077c: 4313 orrs r3, r2 801077e: 608b str r3, [r1, #8] 8010780: e006 b.n 8010790 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8010782: 4b2a ldr r3, [pc, #168] @ (801082c ) 8010784: 689a ldr r2, [r3, #8] 8010786: 69bb ldr r3, [r7, #24] 8010788: 43db mvns r3, r3 801078a: 4928 ldr r1, [pc, #160] @ (801082c ) 801078c: 4013 ands r3, r2 801078e: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8010790: 683b ldr r3, [r7, #0] 8010792: 685b ldr r3, [r3, #4] 8010794: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8010798: 2b00 cmp r3, #0 801079a: d006 beq.n 80107aa { SET_BIT(EXTI->FTSR, iocurrent); 801079c: 4b23 ldr r3, [pc, #140] @ (801082c ) 801079e: 68da ldr r2, [r3, #12] 80107a0: 4922 ldr r1, [pc, #136] @ (801082c ) 80107a2: 69bb ldr r3, [r7, #24] 80107a4: 4313 orrs r3, r2 80107a6: 60cb str r3, [r1, #12] 80107a8: e006 b.n 80107b8 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 80107aa: 4b20 ldr r3, [pc, #128] @ (801082c ) 80107ac: 68da ldr r2, [r3, #12] 80107ae: 69bb ldr r3, [r7, #24] 80107b0: 43db mvns r3, r3 80107b2: 491e ldr r1, [pc, #120] @ (801082c ) 80107b4: 4013 ands r3, r2 80107b6: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 80107b8: 683b ldr r3, [r7, #0] 80107ba: 685b ldr r3, [r3, #4] 80107bc: f403 3300 and.w r3, r3, #131072 @ 0x20000 80107c0: 2b00 cmp r3, #0 80107c2: d006 beq.n 80107d2 { SET_BIT(EXTI->EMR, iocurrent); 80107c4: 4b19 ldr r3, [pc, #100] @ (801082c ) 80107c6: 685a ldr r2, [r3, #4] 80107c8: 4918 ldr r1, [pc, #96] @ (801082c ) 80107ca: 69bb ldr r3, [r7, #24] 80107cc: 4313 orrs r3, r2 80107ce: 604b str r3, [r1, #4] 80107d0: e006 b.n 80107e0 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 80107d2: 4b16 ldr r3, [pc, #88] @ (801082c ) 80107d4: 685a ldr r2, [r3, #4] 80107d6: 69bb ldr r3, [r7, #24] 80107d8: 43db mvns r3, r3 80107da: 4914 ldr r1, [pc, #80] @ (801082c ) 80107dc: 4013 ands r3, r2 80107de: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 80107e0: 683b ldr r3, [r7, #0] 80107e2: 685b ldr r3, [r3, #4] 80107e4: f403 3380 and.w r3, r3, #65536 @ 0x10000 80107e8: 2b00 cmp r3, #0 80107ea: d021 beq.n 8010830 { SET_BIT(EXTI->IMR, iocurrent); 80107ec: 4b0f ldr r3, [pc, #60] @ (801082c ) 80107ee: 681a ldr r2, [r3, #0] 80107f0: 490e ldr r1, [pc, #56] @ (801082c ) 80107f2: 69bb ldr r3, [r7, #24] 80107f4: 4313 orrs r3, r2 80107f6: 600b str r3, [r1, #0] 80107f8: e021 b.n 801083e 80107fa: bf00 nop 80107fc: 10320000 .word 0x10320000 8010800: 10310000 .word 0x10310000 8010804: 10220000 .word 0x10220000 8010808: 10210000 .word 0x10210000 801080c: 10120000 .word 0x10120000 8010810: 10110000 .word 0x10110000 8010814: 40021000 .word 0x40021000 8010818: 40010000 .word 0x40010000 801081c: 40010800 .word 0x40010800 8010820: 40010c00 .word 0x40010c00 8010824: 40011000 .word 0x40011000 8010828: 40011400 .word 0x40011400 801082c: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8010830: 4b0b ldr r3, [pc, #44] @ (8010860 ) 8010832: 681a ldr r2, [r3, #0] 8010834: 69bb ldr r3, [r7, #24] 8010836: 43db mvns r3, r3 8010838: 4909 ldr r1, [pc, #36] @ (8010860 ) 801083a: 4013 ands r3, r2 801083c: 600b str r3, [r1, #0] } } } position++; 801083e: 6a7b ldr r3, [r7, #36] @ 0x24 8010840: 3301 adds r3, #1 8010842: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 8010844: 683b ldr r3, [r7, #0] 8010846: 681a ldr r2, [r3, #0] 8010848: 6a7b ldr r3, [r7, #36] @ 0x24 801084a: fa22 f303 lsr.w r3, r2, r3 801084e: 2b00 cmp r3, #0 8010850: f47f ae8e bne.w 8010570 } } 8010854: bf00 nop 8010856: bf00 nop 8010858: 372c adds r7, #44 @ 0x2c 801085a: 46bd mov sp, r7 801085c: bc80 pop {r7} 801085e: 4770 bx lr 8010860: 40010400 .word 0x40010400 08010864 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8010864: b480 push {r7} 8010866: b085 sub sp, #20 8010868: af00 add r7, sp, #0 801086a: 6078 str r0, [r7, #4] 801086c: 460b mov r3, r1 801086e: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8010870: 687b ldr r3, [r7, #4] 8010872: 689a ldr r2, [r3, #8] 8010874: 887b ldrh r3, [r7, #2] 8010876: 4013 ands r3, r2 8010878: 2b00 cmp r3, #0 801087a: d002 beq.n 8010882 { bitstatus = GPIO_PIN_SET; 801087c: 2301 movs r3, #1 801087e: 73fb strb r3, [r7, #15] 8010880: e001 b.n 8010886 } else { bitstatus = GPIO_PIN_RESET; 8010882: 2300 movs r3, #0 8010884: 73fb strb r3, [r7, #15] } return bitstatus; 8010886: 7bfb ldrb r3, [r7, #15] } 8010888: 4618 mov r0, r3 801088a: 3714 adds r7, #20 801088c: 46bd mov sp, r7 801088e: bc80 pop {r7} 8010890: 4770 bx lr 08010892 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8010892: b480 push {r7} 8010894: b083 sub sp, #12 8010896: af00 add r7, sp, #0 8010898: 6078 str r0, [r7, #4] 801089a: 460b mov r3, r1 801089c: 807b strh r3, [r7, #2] 801089e: 4613 mov r3, r2 80108a0: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80108a2: 787b ldrb r3, [r7, #1] 80108a4: 2b00 cmp r3, #0 80108a6: d003 beq.n 80108b0 { GPIOx->BSRR = GPIO_Pin; 80108a8: 887a ldrh r2, [r7, #2] 80108aa: 687b ldr r3, [r7, #4] 80108ac: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 80108ae: e003 b.n 80108b8 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 80108b0: 887b ldrh r3, [r7, #2] 80108b2: 041a lsls r2, r3, #16 80108b4: 687b ldr r3, [r7, #4] 80108b6: 611a str r2, [r3, #16] } 80108b8: bf00 nop 80108ba: 370c adds r7, #12 80108bc: 46bd mov sp, r7 80108be: bc80 pop {r7} 80108c0: 4770 bx lr ... 080108c4 : * @note If the HSE divided by 128 is used as the RTC clock, the * Backup Domain Access should be kept enabled. * @retval None */ void HAL_PWR_EnableBkUpAccess(void) { 80108c4: b480 push {r7} 80108c6: af00 add r7, sp, #0 /* Enable access to RTC and backup registers */ *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; 80108c8: 4b03 ldr r3, [pc, #12] @ (80108d8 ) 80108ca: 2201 movs r2, #1 80108cc: 601a str r2, [r3, #0] } 80108ce: bf00 nop 80108d0: 46bd mov sp, r7 80108d2: bc80 pop {r7} 80108d4: 4770 bx lr 80108d6: bf00 nop 80108d8: 420e0020 .word 0x420e0020 080108dc : * - Peripheral clocks * - LSI, LSE and RTC clocks * @retval HAL_StatusTypeDef */ HAL_StatusTypeDef HAL_RCC_DeInit(void) { 80108dc: b580 push {r7, lr} 80108de: b082 sub sp, #8 80108e0: af00 add r7, sp, #0 uint32_t tickstart; /* Get Start Tick */ tickstart = HAL_GetTick(); 80108e2: f7fd ffcf bl 800e884 80108e6: 6078 str r0, [r7, #4] /* Set HSION bit */ SET_BIT(RCC->CR, RCC_CR_HSION); 80108e8: 4b60 ldr r3, [pc, #384] @ (8010a6c ) 80108ea: 681b ldr r3, [r3, #0] 80108ec: 4a5f ldr r2, [pc, #380] @ (8010a6c ) 80108ee: f043 0301 orr.w r3, r3, #1 80108f2: 6013 str r3, [r2, #0] /* Wait till HSI is ready */ while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 80108f4: e008 b.n 8010908 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80108f6: f7fd ffc5 bl 800e884 80108fa: 4602 mov r2, r0 80108fc: 687b ldr r3, [r7, #4] 80108fe: 1ad3 subs r3, r2, r3 8010900: 2b02 cmp r3, #2 8010902: d901 bls.n 8010908 { return HAL_TIMEOUT; 8010904: 2303 movs r3, #3 8010906: e0ac b.n 8010a62 while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 8010908: 4b58 ldr r3, [pc, #352] @ (8010a6c ) 801090a: 681b ldr r3, [r3, #0] 801090c: f003 0302 and.w r3, r3, #2 8010910: 2b00 cmp r3, #0 8010912: d0f0 beq.n 80108f6 } } /* Set HSITRIM bits to the reset value */ MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, (0x10U << RCC_CR_HSITRIM_Pos)); 8010914: 4b55 ldr r3, [pc, #340] @ (8010a6c ) 8010916: 681b ldr r3, [r3, #0] 8010918: f023 03f8 bic.w r3, r3, #248 @ 0xf8 801091c: 4a53 ldr r2, [pc, #332] @ (8010a6c ) 801091e: f043 0380 orr.w r3, r3, #128 @ 0x80 8010922: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010924: f7fd ffae bl 800e884 8010928: 6078 str r0, [r7, #4] /* Reset CFGR register */ CLEAR_REG(RCC->CFGR); 801092a: 4b50 ldr r3, [pc, #320] @ (8010a6c ) 801092c: 2200 movs r2, #0 801092e: 605a str r2, [r3, #4] /* Wait till clock switch is ready */ while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) 8010930: e00a b.n 8010948 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8010932: f7fd ffa7 bl 800e884 8010936: 4602 mov r2, r0 8010938: 687b ldr r3, [r7, #4] 801093a: 1ad3 subs r3, r2, r3 801093c: f241 3288 movw r2, #5000 @ 0x1388 8010940: 4293 cmp r3, r2 8010942: d901 bls.n 8010948 { return HAL_TIMEOUT; 8010944: 2303 movs r3, #3 8010946: e08c b.n 8010a62 while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) 8010948: 4b48 ldr r3, [pc, #288] @ (8010a6c ) 801094a: 685b ldr r3, [r3, #4] 801094c: f003 030c and.w r3, r3, #12 8010950: 2b00 cmp r3, #0 8010952: d1ee bne.n 8010932 } } /* Update the SystemCoreClock global variable */ SystemCoreClock = HSI_VALUE; 8010954: 4b46 ldr r3, [pc, #280] @ (8010a70 ) 8010956: 4a47 ldr r2, [pc, #284] @ (8010a74 ) 8010958: 601a str r2, [r3, #0] /* Adapt Systick interrupt period */ if (HAL_InitTick(uwTickPrio) != HAL_OK) 801095a: 4b47 ldr r3, [pc, #284] @ (8010a78 ) 801095c: 681b ldr r3, [r3, #0] 801095e: 4618 mov r0, r3 8010960: f7fd ff4e bl 800e800 8010964: 4603 mov r3, r0 8010966: 2b00 cmp r3, #0 8010968: d001 beq.n 801096e { return HAL_ERROR; 801096a: 2301 movs r3, #1 801096c: e079 b.n 8010a62 } /* Get Start Tick */ tickstart = HAL_GetTick(); 801096e: f7fd ff89 bl 800e884 8010972: 6078 str r0, [r7, #4] /* Second step is to clear PLLON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLLON); 8010974: 4b3d ldr r3, [pc, #244] @ (8010a6c ) 8010976: 681b ldr r3, [r3, #0] 8010978: 4a3c ldr r2, [pc, #240] @ (8010a6c ) 801097a: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000 801097e: 6013 str r3, [r2, #0] /* Wait till PLL is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) 8010980: e008 b.n 8010994 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8010982: f7fd ff7f bl 800e884 8010986: 4602 mov r2, r0 8010988: 687b ldr r3, [r7, #4] 801098a: 1ad3 subs r3, r2, r3 801098c: 2b02 cmp r3, #2 801098e: d901 bls.n 8010994 { return HAL_TIMEOUT; 8010990: 2303 movs r3, #3 8010992: e066 b.n 8010a62 while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) 8010994: 4b35 ldr r3, [pc, #212] @ (8010a6c ) 8010996: 681b ldr r3, [r3, #0] 8010998: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 801099c: 2b00 cmp r3, #0 801099e: d1f0 bne.n 8010982 } } /* Ensure to reset PLLSRC and PLLMUL bits */ CLEAR_REG(RCC->CFGR); 80109a0: 4b32 ldr r3, [pc, #200] @ (8010a6c ) 80109a2: 2200 movs r2, #0 80109a4: 605a str r2, [r3, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 80109a6: f7fd ff6d bl 800e884 80109aa: 6078 str r0, [r7, #4] /* Reset HSEON & CSSON bits */ CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_CSSON); 80109ac: 4b2f ldr r3, [pc, #188] @ (8010a6c ) 80109ae: 681b ldr r3, [r3, #0] 80109b0: 4a2e ldr r2, [pc, #184] @ (8010a6c ) 80109b2: f423 2310 bic.w r3, r3, #589824 @ 0x90000 80109b6: 6013 str r3, [r2, #0] /* Wait till HSE is disabled */ while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) 80109b8: e008 b.n 80109cc { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 80109ba: f7fd ff63 bl 800e884 80109be: 4602 mov r2, r0 80109c0: 687b ldr r3, [r7, #4] 80109c2: 1ad3 subs r3, r2, r3 80109c4: 2b64 cmp r3, #100 @ 0x64 80109c6: d901 bls.n 80109cc { return HAL_TIMEOUT; 80109c8: 2303 movs r3, #3 80109ca: e04a b.n 8010a62 while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) 80109cc: 4b27 ldr r3, [pc, #156] @ (8010a6c ) 80109ce: 681b ldr r3, [r3, #0] 80109d0: f403 3300 and.w r3, r3, #131072 @ 0x20000 80109d4: 2b00 cmp r3, #0 80109d6: d1f0 bne.n 80109ba } } /* Reset HSEBYP bit */ CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); 80109d8: 4b24 ldr r3, [pc, #144] @ (8010a6c ) 80109da: 681b ldr r3, [r3, #0] 80109dc: 4a23 ldr r2, [pc, #140] @ (8010a6c ) 80109de: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80109e2: 6013 str r3, [r2, #0] #if defined(RCC_PLL2_SUPPORT) /* Get Start Tick */ tickstart = HAL_GetTick(); 80109e4: f7fd ff4e bl 800e884 80109e8: 6078 str r0, [r7, #4] /* Clear PLL2ON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLL2ON); 80109ea: 4b20 ldr r3, [pc, #128] @ (8010a6c ) 80109ec: 681b ldr r3, [r3, #0] 80109ee: 4a1f ldr r2, [pc, #124] @ (8010a6c ) 80109f0: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000 80109f4: 6013 str r3, [r2, #0] /* Wait till PLL2 is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) != RESET) 80109f6: e008 b.n 8010a0a { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 80109f8: f7fd ff44 bl 800e884 80109fc: 4602 mov r2, r0 80109fe: 687b ldr r3, [r7, #4] 8010a00: 1ad3 subs r3, r2, r3 8010a02: 2b64 cmp r3, #100 @ 0x64 8010a04: d901 bls.n 8010a0a { return HAL_TIMEOUT; 8010a06: 2303 movs r3, #3 8010a08: e02b b.n 8010a62 while (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) != RESET) 8010a0a: 4b18 ldr r3, [pc, #96] @ (8010a6c ) 8010a0c: 681b ldr r3, [r3, #0] 8010a0e: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010a12: 2b00 cmp r3, #0 8010a14: d1f0 bne.n 80109f8 } #endif /* RCC_PLL2_SUPPORT */ #if defined(RCC_PLLI2S_SUPPORT) /* Get Start Tick */ tickstart = HAL_GetTick(); 8010a16: f7fd ff35 bl 800e884 8010a1a: 6078 str r0, [r7, #4] /* Clear PLL3ON bit */ CLEAR_BIT(RCC->CR, RCC_CR_PLL3ON); 8010a1c: 4b13 ldr r3, [pc, #76] @ (8010a6c ) 8010a1e: 681b ldr r3, [r3, #0] 8010a20: 4a12 ldr r2, [pc, #72] @ (8010a6c ) 8010a22: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8010a26: 6013 str r3, [r2, #0] /* Wait till PLL3 is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) != RESET) 8010a28: e008 b.n 8010a3c { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 8010a2a: f7fd ff2b bl 800e884 8010a2e: 4602 mov r2, r0 8010a30: 687b ldr r3, [r7, #4] 8010a32: 1ad3 subs r3, r2, r3 8010a34: 2b64 cmp r3, #100 @ 0x64 8010a36: d901 bls.n 8010a3c { return HAL_TIMEOUT; 8010a38: 2303 movs r3, #3 8010a3a: e012 b.n 8010a62 while (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) != RESET) 8010a3c: 4b0b ldr r3, [pc, #44] @ (8010a6c ) 8010a3e: 681b ldr r3, [r3, #0] 8010a40: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8010a44: 2b00 cmp r3, #0 8010a46: d1f0 bne.n 8010a2a } #endif /* RCC_PLLI2S_SUPPORT */ #if defined(RCC_CFGR2_PREDIV1) /* Reset CFGR2 register */ CLEAR_REG(RCC->CFGR2); 8010a48: 4b08 ldr r3, [pc, #32] @ (8010a6c ) 8010a4a: 2200 movs r2, #0 8010a4c: 62da str r2, [r3, #44] @ 0x2c #endif /* RCC_CFGR2_PREDIV1 */ /* Reset all CSR flags */ SET_BIT(RCC->CSR, RCC_CSR_RMVF); 8010a4e: 4b07 ldr r3, [pc, #28] @ (8010a6c ) 8010a50: 6a5b ldr r3, [r3, #36] @ 0x24 8010a52: 4a06 ldr r2, [pc, #24] @ (8010a6c ) 8010a54: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8010a58: 6253 str r3, [r2, #36] @ 0x24 /* Disable all interrupts */ CLEAR_REG(RCC->CIR); 8010a5a: 4b04 ldr r3, [pc, #16] @ (8010a6c ) 8010a5c: 2200 movs r2, #0 8010a5e: 609a str r2, [r3, #8] return HAL_OK; 8010a60: 2300 movs r3, #0 } 8010a62: 4618 mov r0, r3 8010a64: 3708 adds r7, #8 8010a66: 46bd mov sp, r7 8010a68: bd80 pop {r7, pc} 8010a6a: bf00 nop 8010a6c: 40021000 .word 0x40021000 8010a70: 20000078 .word 0x20000078 8010a74: 007a1200 .word 0x007a1200 8010a78: 2000007c .word 0x2000007c 08010a7c : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8010a7c: b580 push {r7, lr} 8010a7e: b086 sub sp, #24 8010a80: af00 add r7, sp, #0 8010a82: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8010a84: 687b ldr r3, [r7, #4] 8010a86: 2b00 cmp r3, #0 8010a88: d101 bne.n 8010a8e { return HAL_ERROR; 8010a8a: 2301 movs r3, #1 8010a8c: e304 b.n 8011098 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8010a8e: 687b ldr r3, [r7, #4] 8010a90: 681b ldr r3, [r3, #0] 8010a92: f003 0301 and.w r3, r3, #1 8010a96: 2b00 cmp r3, #0 8010a98: f000 8087 beq.w 8010baa { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8010a9c: 4b92 ldr r3, [pc, #584] @ (8010ce8 ) 8010a9e: 685b ldr r3, [r3, #4] 8010aa0: f003 030c and.w r3, r3, #12 8010aa4: 2b04 cmp r3, #4 8010aa6: d00c beq.n 8010ac2 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8010aa8: 4b8f ldr r3, [pc, #572] @ (8010ce8 ) 8010aaa: 685b ldr r3, [r3, #4] 8010aac: f003 030c and.w r3, r3, #12 8010ab0: 2b08 cmp r3, #8 8010ab2: d112 bne.n 8010ada 8010ab4: 4b8c ldr r3, [pc, #560] @ (8010ce8 ) 8010ab6: 685b ldr r3, [r3, #4] 8010ab8: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010abc: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010ac0: d10b bne.n 8010ada { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8010ac2: 4b89 ldr r3, [pc, #548] @ (8010ce8 ) 8010ac4: 681b ldr r3, [r3, #0] 8010ac6: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010aca: 2b00 cmp r3, #0 8010acc: d06c beq.n 8010ba8 8010ace: 687b ldr r3, [r7, #4] 8010ad0: 689b ldr r3, [r3, #8] 8010ad2: 2b00 cmp r3, #0 8010ad4: d168 bne.n 8010ba8 { return HAL_ERROR; 8010ad6: 2301 movs r3, #1 8010ad8: e2de b.n 8011098 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8010ada: 687b ldr r3, [r7, #4] 8010adc: 689b ldr r3, [r3, #8] 8010ade: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010ae2: d106 bne.n 8010af2 8010ae4: 4b80 ldr r3, [pc, #512] @ (8010ce8 ) 8010ae6: 681b ldr r3, [r3, #0] 8010ae8: 4a7f ldr r2, [pc, #508] @ (8010ce8 ) 8010aea: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8010aee: 6013 str r3, [r2, #0] 8010af0: e02e b.n 8010b50 8010af2: 687b ldr r3, [r7, #4] 8010af4: 689b ldr r3, [r3, #8] 8010af6: 2b00 cmp r3, #0 8010af8: d10c bne.n 8010b14 8010afa: 4b7b ldr r3, [pc, #492] @ (8010ce8 ) 8010afc: 681b ldr r3, [r3, #0] 8010afe: 4a7a ldr r2, [pc, #488] @ (8010ce8 ) 8010b00: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8010b04: 6013 str r3, [r2, #0] 8010b06: 4b78 ldr r3, [pc, #480] @ (8010ce8 ) 8010b08: 681b ldr r3, [r3, #0] 8010b0a: 4a77 ldr r2, [pc, #476] @ (8010ce8 ) 8010b0c: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8010b10: 6013 str r3, [r2, #0] 8010b12: e01d b.n 8010b50 8010b14: 687b ldr r3, [r7, #4] 8010b16: 689b ldr r3, [r3, #8] 8010b18: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 8010b1c: d10c bne.n 8010b38 8010b1e: 4b72 ldr r3, [pc, #456] @ (8010ce8 ) 8010b20: 681b ldr r3, [r3, #0] 8010b22: 4a71 ldr r2, [pc, #452] @ (8010ce8 ) 8010b24: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8010b28: 6013 str r3, [r2, #0] 8010b2a: 4b6f ldr r3, [pc, #444] @ (8010ce8 ) 8010b2c: 681b ldr r3, [r3, #0] 8010b2e: 4a6e ldr r2, [pc, #440] @ (8010ce8 ) 8010b30: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8010b34: 6013 str r3, [r2, #0] 8010b36: e00b b.n 8010b50 8010b38: 4b6b ldr r3, [pc, #428] @ (8010ce8 ) 8010b3a: 681b ldr r3, [r3, #0] 8010b3c: 4a6a ldr r2, [pc, #424] @ (8010ce8 ) 8010b3e: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8010b42: 6013 str r3, [r2, #0] 8010b44: 4b68 ldr r3, [pc, #416] @ (8010ce8 ) 8010b46: 681b ldr r3, [r3, #0] 8010b48: 4a67 ldr r2, [pc, #412] @ (8010ce8 ) 8010b4a: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8010b4e: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 8010b50: 687b ldr r3, [r7, #4] 8010b52: 689b ldr r3, [r3, #8] 8010b54: 2b00 cmp r3, #0 8010b56: d013 beq.n 8010b80 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010b58: f7fd fe94 bl 800e884 8010b5c: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8010b5e: e008 b.n 8010b72 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8010b60: f7fd fe90 bl 800e884 8010b64: 4602 mov r2, r0 8010b66: 693b ldr r3, [r7, #16] 8010b68: 1ad3 subs r3, r2, r3 8010b6a: 2b64 cmp r3, #100 @ 0x64 8010b6c: d901 bls.n 8010b72 { return HAL_TIMEOUT; 8010b6e: 2303 movs r3, #3 8010b70: e292 b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8010b72: 4b5d ldr r3, [pc, #372] @ (8010ce8 ) 8010b74: 681b ldr r3, [r3, #0] 8010b76: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010b7a: 2b00 cmp r3, #0 8010b7c: d0f0 beq.n 8010b60 8010b7e: e014 b.n 8010baa } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010b80: f7fd fe80 bl 800e884 8010b84: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8010b86: e008 b.n 8010b9a { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8010b88: f7fd fe7c bl 800e884 8010b8c: 4602 mov r2, r0 8010b8e: 693b ldr r3, [r7, #16] 8010b90: 1ad3 subs r3, r2, r3 8010b92: 2b64 cmp r3, #100 @ 0x64 8010b94: d901 bls.n 8010b9a { return HAL_TIMEOUT; 8010b96: 2303 movs r3, #3 8010b98: e27e b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8010b9a: 4b53 ldr r3, [pc, #332] @ (8010ce8 ) 8010b9c: 681b ldr r3, [r3, #0] 8010b9e: f403 3300 and.w r3, r3, #131072 @ 0x20000 8010ba2: 2b00 cmp r3, #0 8010ba4: d1f0 bne.n 8010b88 8010ba6: e000 b.n 8010baa if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8010ba8: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8010baa: 687b ldr r3, [r7, #4] 8010bac: 681b ldr r3, [r3, #0] 8010bae: f003 0302 and.w r3, r3, #2 8010bb2: 2b00 cmp r3, #0 8010bb4: d063 beq.n 8010c7e /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8010bb6: 4b4c ldr r3, [pc, #304] @ (8010ce8 ) 8010bb8: 685b ldr r3, [r3, #4] 8010bba: f003 030c and.w r3, r3, #12 8010bbe: 2b00 cmp r3, #0 8010bc0: d00b beq.n 8010bda || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8010bc2: 4b49 ldr r3, [pc, #292] @ (8010ce8 ) 8010bc4: 685b ldr r3, [r3, #4] 8010bc6: f003 030c and.w r3, r3, #12 8010bca: 2b08 cmp r3, #8 8010bcc: d11c bne.n 8010c08 8010bce: 4b46 ldr r3, [pc, #280] @ (8010ce8 ) 8010bd0: 685b ldr r3, [r3, #4] 8010bd2: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010bd6: 2b00 cmp r3, #0 8010bd8: d116 bne.n 8010c08 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8010bda: 4b43 ldr r3, [pc, #268] @ (8010ce8 ) 8010bdc: 681b ldr r3, [r3, #0] 8010bde: f003 0302 and.w r3, r3, #2 8010be2: 2b00 cmp r3, #0 8010be4: d005 beq.n 8010bf2 8010be6: 687b ldr r3, [r7, #4] 8010be8: 695b ldr r3, [r3, #20] 8010bea: 2b01 cmp r3, #1 8010bec: d001 beq.n 8010bf2 { return HAL_ERROR; 8010bee: 2301 movs r3, #1 8010bf0: e252 b.n 8011098 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8010bf2: 4b3d ldr r3, [pc, #244] @ (8010ce8 ) 8010bf4: 681b ldr r3, [r3, #0] 8010bf6: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8010bfa: 687b ldr r3, [r7, #4] 8010bfc: 699b ldr r3, [r3, #24] 8010bfe: 00db lsls r3, r3, #3 8010c00: 4939 ldr r1, [pc, #228] @ (8010ce8 ) 8010c02: 4313 orrs r3, r2 8010c04: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8010c06: e03a b.n 8010c7e } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8010c08: 687b ldr r3, [r7, #4] 8010c0a: 695b ldr r3, [r3, #20] 8010c0c: 2b00 cmp r3, #0 8010c0e: d020 beq.n 8010c52 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 8010c10: 4b36 ldr r3, [pc, #216] @ (8010cec ) 8010c12: 2201 movs r2, #1 8010c14: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010c16: f7fd fe35 bl 800e884 8010c1a: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8010c1c: e008 b.n 8010c30 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8010c1e: f7fd fe31 bl 800e884 8010c22: 4602 mov r2, r0 8010c24: 693b ldr r3, [r7, #16] 8010c26: 1ad3 subs r3, r2, r3 8010c28: 2b02 cmp r3, #2 8010c2a: d901 bls.n 8010c30 { return HAL_TIMEOUT; 8010c2c: 2303 movs r3, #3 8010c2e: e233 b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8010c30: 4b2d ldr r3, [pc, #180] @ (8010ce8 ) 8010c32: 681b ldr r3, [r3, #0] 8010c34: f003 0302 and.w r3, r3, #2 8010c38: 2b00 cmp r3, #0 8010c3a: d0f0 beq.n 8010c1e } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8010c3c: 4b2a ldr r3, [pc, #168] @ (8010ce8 ) 8010c3e: 681b ldr r3, [r3, #0] 8010c40: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8010c44: 687b ldr r3, [r7, #4] 8010c46: 699b ldr r3, [r3, #24] 8010c48: 00db lsls r3, r3, #3 8010c4a: 4927 ldr r1, [pc, #156] @ (8010ce8 ) 8010c4c: 4313 orrs r3, r2 8010c4e: 600b str r3, [r1, #0] 8010c50: e015 b.n 8010c7e } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 8010c52: 4b26 ldr r3, [pc, #152] @ (8010cec ) 8010c54: 2200 movs r2, #0 8010c56: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010c58: f7fd fe14 bl 800e884 8010c5c: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8010c5e: e008 b.n 8010c72 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8010c60: f7fd fe10 bl 800e884 8010c64: 4602 mov r2, r0 8010c66: 693b ldr r3, [r7, #16] 8010c68: 1ad3 subs r3, r2, r3 8010c6a: 2b02 cmp r3, #2 8010c6c: d901 bls.n 8010c72 { return HAL_TIMEOUT; 8010c6e: 2303 movs r3, #3 8010c70: e212 b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8010c72: 4b1d ldr r3, [pc, #116] @ (8010ce8 ) 8010c74: 681b ldr r3, [r3, #0] 8010c76: f003 0302 and.w r3, r3, #2 8010c7a: 2b00 cmp r3, #0 8010c7c: d1f0 bne.n 8010c60 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8010c7e: 687b ldr r3, [r7, #4] 8010c80: 681b ldr r3, [r3, #0] 8010c82: f003 0308 and.w r3, r3, #8 8010c86: 2b00 cmp r3, #0 8010c88: d03a beq.n 8010d00 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8010c8a: 687b ldr r3, [r7, #4] 8010c8c: 69db ldr r3, [r3, #28] 8010c8e: 2b00 cmp r3, #0 8010c90: d019 beq.n 8010cc6 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8010c92: 4b17 ldr r3, [pc, #92] @ (8010cf0 ) 8010c94: 2201 movs r2, #1 8010c96: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010c98: f7fd fdf4 bl 800e884 8010c9c: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8010c9e: e008 b.n 8010cb2 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8010ca0: f7fd fdf0 bl 800e884 8010ca4: 4602 mov r2, r0 8010ca6: 693b ldr r3, [r7, #16] 8010ca8: 1ad3 subs r3, r2, r3 8010caa: 2b02 cmp r3, #2 8010cac: d901 bls.n 8010cb2 { return HAL_TIMEOUT; 8010cae: 2303 movs r3, #3 8010cb0: e1f2 b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8010cb2: 4b0d ldr r3, [pc, #52] @ (8010ce8 ) 8010cb4: 6a5b ldr r3, [r3, #36] @ 0x24 8010cb6: f003 0302 and.w r3, r3, #2 8010cba: 2b00 cmp r3, #0 8010cbc: d0f0 beq.n 8010ca0 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 8010cbe: 2001 movs r0, #1 8010cc0: f000 fbca bl 8011458 8010cc4: e01c b.n 8010d00 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8010cc6: 4b0a ldr r3, [pc, #40] @ (8010cf0 ) 8010cc8: 2200 movs r2, #0 8010cca: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010ccc: f7fd fdda bl 800e884 8010cd0: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8010cd2: e00f b.n 8010cf4 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8010cd4: f7fd fdd6 bl 800e884 8010cd8: 4602 mov r2, r0 8010cda: 693b ldr r3, [r7, #16] 8010cdc: 1ad3 subs r3, r2, r3 8010cde: 2b02 cmp r3, #2 8010ce0: d908 bls.n 8010cf4 { return HAL_TIMEOUT; 8010ce2: 2303 movs r3, #3 8010ce4: e1d8 b.n 8011098 8010ce6: bf00 nop 8010ce8: 40021000 .word 0x40021000 8010cec: 42420000 .word 0x42420000 8010cf0: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8010cf4: 4b9b ldr r3, [pc, #620] @ (8010f64 ) 8010cf6: 6a5b ldr r3, [r3, #36] @ 0x24 8010cf8: f003 0302 and.w r3, r3, #2 8010cfc: 2b00 cmp r3, #0 8010cfe: d1e9 bne.n 8010cd4 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8010d00: 687b ldr r3, [r7, #4] 8010d02: 681b ldr r3, [r3, #0] 8010d04: f003 0304 and.w r3, r3, #4 8010d08: 2b00 cmp r3, #0 8010d0a: f000 80a6 beq.w 8010e5a { FlagStatus pwrclkchanged = RESET; 8010d0e: 2300 movs r3, #0 8010d10: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8010d12: 4b94 ldr r3, [pc, #592] @ (8010f64 ) 8010d14: 69db ldr r3, [r3, #28] 8010d16: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010d1a: 2b00 cmp r3, #0 8010d1c: d10d bne.n 8010d3a { __HAL_RCC_PWR_CLK_ENABLE(); 8010d1e: 4b91 ldr r3, [pc, #580] @ (8010f64 ) 8010d20: 69db ldr r3, [r3, #28] 8010d22: 4a90 ldr r2, [pc, #576] @ (8010f64 ) 8010d24: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8010d28: 61d3 str r3, [r2, #28] 8010d2a: 4b8e ldr r3, [pc, #568] @ (8010f64 ) 8010d2c: 69db ldr r3, [r3, #28] 8010d2e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010d32: 60bb str r3, [r7, #8] 8010d34: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8010d36: 2301 movs r3, #1 8010d38: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8010d3a: 4b8b ldr r3, [pc, #556] @ (8010f68 ) 8010d3c: 681b ldr r3, [r3, #0] 8010d3e: f403 7380 and.w r3, r3, #256 @ 0x100 8010d42: 2b00 cmp r3, #0 8010d44: d118 bne.n 8010d78 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8010d46: 4b88 ldr r3, [pc, #544] @ (8010f68 ) 8010d48: 681b ldr r3, [r3, #0] 8010d4a: 4a87 ldr r2, [pc, #540] @ (8010f68 ) 8010d4c: f443 7380 orr.w r3, r3, #256 @ 0x100 8010d50: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8010d52: f7fd fd97 bl 800e884 8010d56: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8010d58: e008 b.n 8010d6c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8010d5a: f7fd fd93 bl 800e884 8010d5e: 4602 mov r2, r0 8010d60: 693b ldr r3, [r7, #16] 8010d62: 1ad3 subs r3, r2, r3 8010d64: 2b64 cmp r3, #100 @ 0x64 8010d66: d901 bls.n 8010d6c { return HAL_TIMEOUT; 8010d68: 2303 movs r3, #3 8010d6a: e195 b.n 8011098 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8010d6c: 4b7e ldr r3, [pc, #504] @ (8010f68 ) 8010d6e: 681b ldr r3, [r3, #0] 8010d70: f403 7380 and.w r3, r3, #256 @ 0x100 8010d74: 2b00 cmp r3, #0 8010d76: d0f0 beq.n 8010d5a } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8010d78: 687b ldr r3, [r7, #4] 8010d7a: 691b ldr r3, [r3, #16] 8010d7c: 2b01 cmp r3, #1 8010d7e: d106 bne.n 8010d8e 8010d80: 4b78 ldr r3, [pc, #480] @ (8010f64 ) 8010d82: 6a1b ldr r3, [r3, #32] 8010d84: 4a77 ldr r2, [pc, #476] @ (8010f64 ) 8010d86: f043 0301 orr.w r3, r3, #1 8010d8a: 6213 str r3, [r2, #32] 8010d8c: e02d b.n 8010dea 8010d8e: 687b ldr r3, [r7, #4] 8010d90: 691b ldr r3, [r3, #16] 8010d92: 2b00 cmp r3, #0 8010d94: d10c bne.n 8010db0 8010d96: 4b73 ldr r3, [pc, #460] @ (8010f64 ) 8010d98: 6a1b ldr r3, [r3, #32] 8010d9a: 4a72 ldr r2, [pc, #456] @ (8010f64 ) 8010d9c: f023 0301 bic.w r3, r3, #1 8010da0: 6213 str r3, [r2, #32] 8010da2: 4b70 ldr r3, [pc, #448] @ (8010f64 ) 8010da4: 6a1b ldr r3, [r3, #32] 8010da6: 4a6f ldr r2, [pc, #444] @ (8010f64 ) 8010da8: f023 0304 bic.w r3, r3, #4 8010dac: 6213 str r3, [r2, #32] 8010dae: e01c b.n 8010dea 8010db0: 687b ldr r3, [r7, #4] 8010db2: 691b ldr r3, [r3, #16] 8010db4: 2b05 cmp r3, #5 8010db6: d10c bne.n 8010dd2 8010db8: 4b6a ldr r3, [pc, #424] @ (8010f64 ) 8010dba: 6a1b ldr r3, [r3, #32] 8010dbc: 4a69 ldr r2, [pc, #420] @ (8010f64 ) 8010dbe: f043 0304 orr.w r3, r3, #4 8010dc2: 6213 str r3, [r2, #32] 8010dc4: 4b67 ldr r3, [pc, #412] @ (8010f64 ) 8010dc6: 6a1b ldr r3, [r3, #32] 8010dc8: 4a66 ldr r2, [pc, #408] @ (8010f64 ) 8010dca: f043 0301 orr.w r3, r3, #1 8010dce: 6213 str r3, [r2, #32] 8010dd0: e00b b.n 8010dea 8010dd2: 4b64 ldr r3, [pc, #400] @ (8010f64 ) 8010dd4: 6a1b ldr r3, [r3, #32] 8010dd6: 4a63 ldr r2, [pc, #396] @ (8010f64 ) 8010dd8: f023 0301 bic.w r3, r3, #1 8010ddc: 6213 str r3, [r2, #32] 8010dde: 4b61 ldr r3, [pc, #388] @ (8010f64 ) 8010de0: 6a1b ldr r3, [r3, #32] 8010de2: 4a60 ldr r2, [pc, #384] @ (8010f64 ) 8010de4: f023 0304 bic.w r3, r3, #4 8010de8: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 8010dea: 687b ldr r3, [r7, #4] 8010dec: 691b ldr r3, [r3, #16] 8010dee: 2b00 cmp r3, #0 8010df0: d015 beq.n 8010e1e { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010df2: f7fd fd47 bl 800e884 8010df6: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8010df8: e00a b.n 8010e10 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8010dfa: f7fd fd43 bl 800e884 8010dfe: 4602 mov r2, r0 8010e00: 693b ldr r3, [r7, #16] 8010e02: 1ad3 subs r3, r2, r3 8010e04: f241 3288 movw r2, #5000 @ 0x1388 8010e08: 4293 cmp r3, r2 8010e0a: d901 bls.n 8010e10 { return HAL_TIMEOUT; 8010e0c: 2303 movs r3, #3 8010e0e: e143 b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8010e10: 4b54 ldr r3, [pc, #336] @ (8010f64 ) 8010e12: 6a1b ldr r3, [r3, #32] 8010e14: f003 0302 and.w r3, r3, #2 8010e18: 2b00 cmp r3, #0 8010e1a: d0ee beq.n 8010dfa 8010e1c: e014 b.n 8010e48 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8010e1e: f7fd fd31 bl 800e884 8010e22: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8010e24: e00a b.n 8010e3c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8010e26: f7fd fd2d bl 800e884 8010e2a: 4602 mov r2, r0 8010e2c: 693b ldr r3, [r7, #16] 8010e2e: 1ad3 subs r3, r2, r3 8010e30: f241 3288 movw r2, #5000 @ 0x1388 8010e34: 4293 cmp r3, r2 8010e36: d901 bls.n 8010e3c { return HAL_TIMEOUT; 8010e38: 2303 movs r3, #3 8010e3a: e12d b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8010e3c: 4b49 ldr r3, [pc, #292] @ (8010f64 ) 8010e3e: 6a1b ldr r3, [r3, #32] 8010e40: f003 0302 and.w r3, r3, #2 8010e44: 2b00 cmp r3, #0 8010e46: d1ee bne.n 8010e26 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8010e48: 7dfb ldrb r3, [r7, #23] 8010e4a: 2b01 cmp r3, #1 8010e4c: d105 bne.n 8010e5a { __HAL_RCC_PWR_CLK_DISABLE(); 8010e4e: 4b45 ldr r3, [pc, #276] @ (8010f64 ) 8010e50: 69db ldr r3, [r3, #28] 8010e52: 4a44 ldr r2, [pc, #272] @ (8010f64 ) 8010e54: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8010e58: 61d3 str r3, [r2, #28] #if defined(RCC_CR_PLL2ON) /*-------------------------------- PLL2 Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL2(RCC_OscInitStruct->PLL2.PLL2State)); if ((RCC_OscInitStruct->PLL2.PLL2State) != RCC_PLL2_NONE) 8010e5a: 687b ldr r3, [r7, #4] 8010e5c: 6adb ldr r3, [r3, #44] @ 0x2c 8010e5e: 2b00 cmp r3, #0 8010e60: f000 808c beq.w 8010f7c { /* This bit can not be cleared if the PLL2 clock is used indirectly as system clock (i.e. it is used as PLL clock entry that is used as system clock). */ if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8010e64: 4b3f ldr r3, [pc, #252] @ (8010f64 ) 8010e66: 685b ldr r3, [r3, #4] 8010e68: f403 3380 and.w r3, r3, #65536 @ 0x10000 8010e6c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010e70: d10e bne.n 8010e90 (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 8010e72: 4b3c ldr r3, [pc, #240] @ (8010f64 ) 8010e74: 685b ldr r3, [r3, #4] 8010e76: f003 030c and.w r3, r3, #12 if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \ 8010e7a: 2b08 cmp r3, #8 8010e7c: d108 bne.n 8010e90 ((READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) == RCC_CFGR2_PREDIV1SRC_PLL2)) 8010e7e: 4b39 ldr r3, [pc, #228] @ (8010f64 ) 8010e80: 6adb ldr r3, [r3, #44] @ 0x2c 8010e82: f403 3380 and.w r3, r3, #65536 @ 0x10000 (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \ 8010e86: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010e8a: d101 bne.n 8010e90 { return HAL_ERROR; 8010e8c: 2301 movs r3, #1 8010e8e: e103 b.n 8011098 } else { if ((RCC_OscInitStruct->PLL2.PLL2State) == RCC_PLL2_ON) 8010e90: 687b ldr r3, [r7, #4] 8010e92: 6adb ldr r3, [r3, #44] @ 0x2c 8010e94: 2b02 cmp r3, #2 8010e96: d14e bne.n 8010f36 assert_param(IS_RCC_PLL2_MUL(RCC_OscInitStruct->PLL2.PLL2MUL)); assert_param(IS_RCC_HSE_PREDIV2(RCC_OscInitStruct->PLL2.HSEPrediv2Value)); /* Prediv2 can be written only when the PLLI2S is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 8010e98: 4b32 ldr r3, [pc, #200] @ (8010f64 ) 8010e9a: 681b ldr r3, [r3, #0] 8010e9c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8010ea0: 2b00 cmp r3, #0 8010ea2: d009 beq.n 8010eb8 (__HAL_RCC_HSE_GET_PREDIV2() != RCC_OscInitStruct->PLL2.HSEPrediv2Value)) 8010ea4: 4b2f ldr r3, [pc, #188] @ (8010f64 ) 8010ea6: 6adb ldr r3, [r3, #44] @ 0x2c 8010ea8: f003 02f0 and.w r2, r3, #240 @ 0xf0 8010eac: 687b ldr r3, [r7, #4] 8010eae: 6b5b ldr r3, [r3, #52] @ 0x34 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \ 8010eb0: 429a cmp r2, r3 8010eb2: d001 beq.n 8010eb8 { return HAL_ERROR; 8010eb4: 2301 movs r3, #1 8010eb6: e0ef b.n 8011098 } /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 8010eb8: 4b2c ldr r3, [pc, #176] @ (8010f6c ) 8010eba: 2200 movs r2, #0 8010ebc: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010ebe: f7fd fce1 bl 800e884 8010ec2: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010ec4: e008 b.n 8010ed8 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010ec6: f7fd fcdd bl 800e884 8010eca: 4602 mov r2, r0 8010ecc: 693b ldr r3, [r7, #16] 8010ece: 1ad3 subs r3, r2, r3 8010ed0: 2b64 cmp r3, #100 @ 0x64 8010ed2: d901 bls.n 8010ed8 { return HAL_TIMEOUT; 8010ed4: 2303 movs r3, #3 8010ed6: e0df b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010ed8: 4b22 ldr r3, [pc, #136] @ (8010f64 ) 8010eda: 681b ldr r3, [r3, #0] 8010edc: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010ee0: 2b00 cmp r3, #0 8010ee2: d1f0 bne.n 8010ec6 } } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(RCC_OscInitStruct->PLL2.HSEPrediv2Value); 8010ee4: 4b1f ldr r3, [pc, #124] @ (8010f64 ) 8010ee6: 6adb ldr r3, [r3, #44] @ 0x2c 8010ee8: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8010eec: 687b ldr r3, [r7, #4] 8010eee: 6b5b ldr r3, [r3, #52] @ 0x34 8010ef0: 491c ldr r1, [pc, #112] @ (8010f64 ) 8010ef2: 4313 orrs r3, r2 8010ef4: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLL2 multiplication factors. */ __HAL_RCC_PLL2_CONFIG(RCC_OscInitStruct->PLL2.PLL2MUL); 8010ef6: 4b1b ldr r3, [pc, #108] @ (8010f64 ) 8010ef8: 6adb ldr r3, [r3, #44] @ 0x2c 8010efa: f423 6270 bic.w r2, r3, #3840 @ 0xf00 8010efe: 687b ldr r3, [r7, #4] 8010f00: 6b1b ldr r3, [r3, #48] @ 0x30 8010f02: 4918 ldr r1, [pc, #96] @ (8010f64 ) 8010f04: 4313 orrs r3, r2 8010f06: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLL2. */ __HAL_RCC_PLL2_ENABLE(); 8010f08: 4b18 ldr r3, [pc, #96] @ (8010f6c ) 8010f0a: 2201 movs r2, #1 8010f0c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010f0e: f7fd fcb9 bl 800e884 8010f12: 6138 str r0, [r7, #16] /* Wait till PLL2 is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 8010f14: e008 b.n 8010f28 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010f16: f7fd fcb5 bl 800e884 8010f1a: 4602 mov r2, r0 8010f1c: 693b ldr r3, [r7, #16] 8010f1e: 1ad3 subs r3, r2, r3 8010f20: 2b64 cmp r3, #100 @ 0x64 8010f22: d901 bls.n 8010f28 { return HAL_TIMEOUT; 8010f24: 2303 movs r3, #3 8010f26: e0b7 b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == RESET) 8010f28: 4b0e ldr r3, [pc, #56] @ (8010f64 ) 8010f2a: 681b ldr r3, [r3, #0] 8010f2c: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010f30: 2b00 cmp r3, #0 8010f32: d0f0 beq.n 8010f16 8010f34: e022 b.n 8010f7c } } else { /* Set PREDIV1 source to HSE */ CLEAR_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC); 8010f36: 4b0b ldr r3, [pc, #44] @ (8010f64 ) 8010f38: 6adb ldr r3, [r3, #44] @ 0x2c 8010f3a: 4a0a ldr r2, [pc, #40] @ (8010f64 ) 8010f3c: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8010f40: 62d3 str r3, [r2, #44] @ 0x2c /* Disable the main PLL2. */ __HAL_RCC_PLL2_DISABLE(); 8010f42: 4b0a ldr r3, [pc, #40] @ (8010f6c ) 8010f44: 2200 movs r2, #0 8010f46: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010f48: f7fd fc9c bl 800e884 8010f4c: 6138 str r0, [r7, #16] /* Wait till PLL2 is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010f4e: e00f b.n 8010f70 { if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE) 8010f50: f7fd fc98 bl 800e884 8010f54: 4602 mov r2, r0 8010f56: 693b ldr r3, [r7, #16] 8010f58: 1ad3 subs r3, r2, r3 8010f5a: 2b64 cmp r3, #100 @ 0x64 8010f5c: d908 bls.n 8010f70 { return HAL_TIMEOUT; 8010f5e: 2303 movs r3, #3 8010f60: e09a b.n 8011098 8010f62: bf00 nop 8010f64: 40021000 .word 0x40021000 8010f68: 40007000 .word 0x40007000 8010f6c: 42420068 .word 0x42420068 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET) 8010f70: 4b4b ldr r3, [pc, #300] @ (80110a0 ) 8010f72: 681b ldr r3, [r3, #0] 8010f74: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8010f78: 2b00 cmp r3, #0 8010f7a: d1e9 bne.n 8010f50 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8010f7c: 687b ldr r3, [r7, #4] 8010f7e: 6a1b ldr r3, [r3, #32] 8010f80: 2b00 cmp r3, #0 8010f82: f000 8088 beq.w 8011096 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8010f86: 4b46 ldr r3, [pc, #280] @ (80110a0 ) 8010f88: 685b ldr r3, [r3, #4] 8010f8a: f003 030c and.w r3, r3, #12 8010f8e: 2b08 cmp r3, #8 8010f90: d068 beq.n 8011064 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8010f92: 687b ldr r3, [r7, #4] 8010f94: 6a1b ldr r3, [r3, #32] 8010f96: 2b02 cmp r3, #2 8010f98: d14d bne.n 8011036 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8010f9a: 4b42 ldr r3, [pc, #264] @ (80110a4 ) 8010f9c: 2200 movs r2, #0 8010f9e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8010fa0: f7fd fc70 bl 800e884 8010fa4: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8010fa6: e008 b.n 8010fba { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8010fa8: f7fd fc6c bl 800e884 8010fac: 4602 mov r2, r0 8010fae: 693b ldr r3, [r7, #16] 8010fb0: 1ad3 subs r3, r2, r3 8010fb2: 2b02 cmp r3, #2 8010fb4: d901 bls.n 8010fba { return HAL_TIMEOUT; 8010fb6: 2303 movs r3, #3 8010fb8: e06e b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8010fba: 4b39 ldr r3, [pc, #228] @ (80110a0 ) 8010fbc: 681b ldr r3, [r3, #0] 8010fbe: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8010fc2: 2b00 cmp r3, #0 8010fc4: d1f0 bne.n 8010fa8 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8010fc6: 687b ldr r3, [r7, #4] 8010fc8: 6a5b ldr r3, [r3, #36] @ 0x24 8010fca: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8010fce: d10f bne.n 8010ff0 assert_param(IS_RCC_HSE_PREDIV(RCC_OscInitStruct->HSEPredivValue)); #if defined(RCC_CFGR2_PREDIV1SRC) assert_param(IS_RCC_PREDIV1_SOURCE(RCC_OscInitStruct->Prediv1Source)); /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); 8010fd0: 4b33 ldr r3, [pc, #204] @ (80110a0 ) 8010fd2: 6ada ldr r2, [r3, #44] @ 0x2c 8010fd4: 687b ldr r3, [r7, #4] 8010fd6: 685b ldr r3, [r3, #4] 8010fd8: 4931 ldr r1, [pc, #196] @ (80110a0 ) 8010fda: 4313 orrs r3, r2 8010fdc: 62cb str r3, [r1, #44] @ 0x2c #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8010fde: 4b30 ldr r3, [pc, #192] @ (80110a0 ) 8010fe0: 6adb ldr r3, [r3, #44] @ 0x2c 8010fe2: f023 020f bic.w r2, r3, #15 8010fe6: 687b ldr r3, [r7, #4] 8010fe8: 68db ldr r3, [r3, #12] 8010fea: 492d ldr r1, [pc, #180] @ (80110a0 ) 8010fec: 4313 orrs r3, r2 8010fee: 62cb str r3, [r1, #44] @ 0x2c } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8010ff0: 4b2b ldr r3, [pc, #172] @ (80110a0 ) 8010ff2: 685b ldr r3, [r3, #4] 8010ff4: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 8010ff8: 687b ldr r3, [r7, #4] 8010ffa: 6a59 ldr r1, [r3, #36] @ 0x24 8010ffc: 687b ldr r3, [r7, #4] 8010ffe: 6a9b ldr r3, [r3, #40] @ 0x28 8011000: 430b orrs r3, r1 8011002: 4927 ldr r1, [pc, #156] @ (80110a0 ) 8011004: 4313 orrs r3, r2 8011006: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8011008: 4b26 ldr r3, [pc, #152] @ (80110a4 ) 801100a: 2201 movs r2, #1 801100c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 801100e: f7fd fc39 bl 800e884 8011012: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8011014: e008 b.n 8011028 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8011016: f7fd fc35 bl 800e884 801101a: 4602 mov r2, r0 801101c: 693b ldr r3, [r7, #16] 801101e: 1ad3 subs r3, r2, r3 8011020: 2b02 cmp r3, #2 8011022: d901 bls.n 8011028 { return HAL_TIMEOUT; 8011024: 2303 movs r3, #3 8011026: e037 b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8011028: 4b1d ldr r3, [pc, #116] @ (80110a0 ) 801102a: 681b ldr r3, [r3, #0] 801102c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8011030: 2b00 cmp r3, #0 8011032: d0f0 beq.n 8011016 8011034: e02f b.n 8011096 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8011036: 4b1b ldr r3, [pc, #108] @ (80110a4 ) 8011038: 2200 movs r2, #0 801103a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 801103c: f7fd fc22 bl 800e884 8011040: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8011042: e008 b.n 8011056 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8011044: f7fd fc1e bl 800e884 8011048: 4602 mov r2, r0 801104a: 693b ldr r3, [r7, #16] 801104c: 1ad3 subs r3, r2, r3 801104e: 2b02 cmp r3, #2 8011050: d901 bls.n 8011056 { return HAL_TIMEOUT; 8011052: 2303 movs r3, #3 8011054: e020 b.n 8011098 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8011056: 4b12 ldr r3, [pc, #72] @ (80110a0 ) 8011058: 681b ldr r3, [r3, #0] 801105a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 801105e: 2b00 cmp r3, #0 8011060: d1f0 bne.n 8011044 8011062: e018 b.n 8011096 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8011064: 687b ldr r3, [r7, #4] 8011066: 6a1b ldr r3, [r3, #32] 8011068: 2b01 cmp r3, #1 801106a: d101 bne.n 8011070 { return HAL_ERROR; 801106c: 2301 movs r3, #1 801106e: e013 b.n 8011098 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 8011070: 4b0b ldr r3, [pc, #44] @ (80110a0 ) 8011072: 685b ldr r3, [r3, #4] 8011074: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8011076: 68fb ldr r3, [r7, #12] 8011078: f403 3280 and.w r2, r3, #65536 @ 0x10000 801107c: 687b ldr r3, [r7, #4] 801107e: 6a5b ldr r3, [r3, #36] @ 0x24 8011080: 429a cmp r2, r3 8011082: d106 bne.n 8011092 (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8011084: 68fb ldr r3, [r7, #12] 8011086: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 801108a: 687b ldr r3, [r7, #4] 801108c: 6a9b ldr r3, [r3, #40] @ 0x28 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 801108e: 429a cmp r2, r3 8011090: d001 beq.n 8011096 { return HAL_ERROR; 8011092: 2301 movs r3, #1 8011094: e000 b.n 8011098 } } } } return HAL_OK; 8011096: 2300 movs r3, #0 } 8011098: 4618 mov r0, r3 801109a: 3718 adds r7, #24 801109c: 46bd mov sp, r7 801109e: bd80 pop {r7, pc} 80110a0: 40021000 .word 0x40021000 80110a4: 42420060 .word 0x42420060 080110a8 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 80110a8: b580 push {r7, lr} 80110aa: b084 sub sp, #16 80110ac: af00 add r7, sp, #0 80110ae: 6078 str r0, [r7, #4] 80110b0: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 80110b2: 687b ldr r3, [r7, #4] 80110b4: 2b00 cmp r3, #0 80110b6: d101 bne.n 80110bc { return HAL_ERROR; 80110b8: 2301 movs r3, #1 80110ba: e0d0 b.n 801125e must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 80110bc: 4b6a ldr r3, [pc, #424] @ (8011268 ) 80110be: 681b ldr r3, [r3, #0] 80110c0: f003 0307 and.w r3, r3, #7 80110c4: 683a ldr r2, [r7, #0] 80110c6: 429a cmp r2, r3 80110c8: d910 bls.n 80110ec { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80110ca: 4b67 ldr r3, [pc, #412] @ (8011268 ) 80110cc: 681b ldr r3, [r3, #0] 80110ce: f023 0207 bic.w r2, r3, #7 80110d2: 4965 ldr r1, [pc, #404] @ (8011268 ) 80110d4: 683b ldr r3, [r7, #0] 80110d6: 4313 orrs r3, r2 80110d8: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80110da: 4b63 ldr r3, [pc, #396] @ (8011268 ) 80110dc: 681b ldr r3, [r3, #0] 80110de: f003 0307 and.w r3, r3, #7 80110e2: 683a ldr r2, [r7, #0] 80110e4: 429a cmp r2, r3 80110e6: d001 beq.n 80110ec { return HAL_ERROR; 80110e8: 2301 movs r3, #1 80110ea: e0b8 b.n 801125e } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 80110ec: 687b ldr r3, [r7, #4] 80110ee: 681b ldr r3, [r3, #0] 80110f0: f003 0302 and.w r3, r3, #2 80110f4: 2b00 cmp r3, #0 80110f6: d020 beq.n 801113a { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80110f8: 687b ldr r3, [r7, #4] 80110fa: 681b ldr r3, [r3, #0] 80110fc: f003 0304 and.w r3, r3, #4 8011100: 2b00 cmp r3, #0 8011102: d005 beq.n 8011110 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8011104: 4b59 ldr r3, [pc, #356] @ (801126c ) 8011106: 685b ldr r3, [r3, #4] 8011108: 4a58 ldr r2, [pc, #352] @ (801126c ) 801110a: f443 63e0 orr.w r3, r3, #1792 @ 0x700 801110e: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8011110: 687b ldr r3, [r7, #4] 8011112: 681b ldr r3, [r3, #0] 8011114: f003 0308 and.w r3, r3, #8 8011118: 2b00 cmp r3, #0 801111a: d005 beq.n 8011128 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 801111c: 4b53 ldr r3, [pc, #332] @ (801126c ) 801111e: 685b ldr r3, [r3, #4] 8011120: 4a52 ldr r2, [pc, #328] @ (801126c ) 8011122: f443 5360 orr.w r3, r3, #14336 @ 0x3800 8011126: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8011128: 4b50 ldr r3, [pc, #320] @ (801126c ) 801112a: 685b ldr r3, [r3, #4] 801112c: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8011130: 687b ldr r3, [r7, #4] 8011132: 689b ldr r3, [r3, #8] 8011134: 494d ldr r1, [pc, #308] @ (801126c ) 8011136: 4313 orrs r3, r2 8011138: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 801113a: 687b ldr r3, [r7, #4] 801113c: 681b ldr r3, [r3, #0] 801113e: f003 0301 and.w r3, r3, #1 8011142: 2b00 cmp r3, #0 8011144: d040 beq.n 80111c8 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8011146: 687b ldr r3, [r7, #4] 8011148: 685b ldr r3, [r3, #4] 801114a: 2b01 cmp r3, #1 801114c: d107 bne.n 801115e { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 801114e: 4b47 ldr r3, [pc, #284] @ (801126c ) 8011150: 681b ldr r3, [r3, #0] 8011152: f403 3300 and.w r3, r3, #131072 @ 0x20000 8011156: 2b00 cmp r3, #0 8011158: d115 bne.n 8011186 { return HAL_ERROR; 801115a: 2301 movs r3, #1 801115c: e07f b.n 801125e } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 801115e: 687b ldr r3, [r7, #4] 8011160: 685b ldr r3, [r3, #4] 8011162: 2b02 cmp r3, #2 8011164: d107 bne.n 8011176 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8011166: 4b41 ldr r3, [pc, #260] @ (801126c ) 8011168: 681b ldr r3, [r3, #0] 801116a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 801116e: 2b00 cmp r3, #0 8011170: d109 bne.n 8011186 { return HAL_ERROR; 8011172: 2301 movs r3, #1 8011174: e073 b.n 801125e } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8011176: 4b3d ldr r3, [pc, #244] @ (801126c ) 8011178: 681b ldr r3, [r3, #0] 801117a: f003 0302 and.w r3, r3, #2 801117e: 2b00 cmp r3, #0 8011180: d101 bne.n 8011186 { return HAL_ERROR; 8011182: 2301 movs r3, #1 8011184: e06b b.n 801125e } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8011186: 4b39 ldr r3, [pc, #228] @ (801126c ) 8011188: 685b ldr r3, [r3, #4] 801118a: f023 0203 bic.w r2, r3, #3 801118e: 687b ldr r3, [r7, #4] 8011190: 685b ldr r3, [r3, #4] 8011192: 4936 ldr r1, [pc, #216] @ (801126c ) 8011194: 4313 orrs r3, r2 8011196: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 8011198: f7fd fb74 bl 800e884 801119c: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 801119e: e00a b.n 80111b6 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 80111a0: f7fd fb70 bl 800e884 80111a4: 4602 mov r2, r0 80111a6: 68fb ldr r3, [r7, #12] 80111a8: 1ad3 subs r3, r2, r3 80111aa: f241 3288 movw r2, #5000 @ 0x1388 80111ae: 4293 cmp r3, r2 80111b0: d901 bls.n 80111b6 { return HAL_TIMEOUT; 80111b2: 2303 movs r3, #3 80111b4: e053 b.n 801125e while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80111b6: 4b2d ldr r3, [pc, #180] @ (801126c ) 80111b8: 685b ldr r3, [r3, #4] 80111ba: f003 020c and.w r2, r3, #12 80111be: 687b ldr r3, [r7, #4] 80111c0: 685b ldr r3, [r3, #4] 80111c2: 009b lsls r3, r3, #2 80111c4: 429a cmp r2, r3 80111c6: d1eb bne.n 80111a0 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 80111c8: 4b27 ldr r3, [pc, #156] @ (8011268 ) 80111ca: 681b ldr r3, [r3, #0] 80111cc: f003 0307 and.w r3, r3, #7 80111d0: 683a ldr r2, [r7, #0] 80111d2: 429a cmp r2, r3 80111d4: d210 bcs.n 80111f8 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80111d6: 4b24 ldr r3, [pc, #144] @ (8011268 ) 80111d8: 681b ldr r3, [r3, #0] 80111da: f023 0207 bic.w r2, r3, #7 80111de: 4922 ldr r1, [pc, #136] @ (8011268 ) 80111e0: 683b ldr r3, [r7, #0] 80111e2: 4313 orrs r3, r2 80111e4: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80111e6: 4b20 ldr r3, [pc, #128] @ (8011268 ) 80111e8: 681b ldr r3, [r3, #0] 80111ea: f003 0307 and.w r3, r3, #7 80111ee: 683a ldr r2, [r7, #0] 80111f0: 429a cmp r2, r3 80111f2: d001 beq.n 80111f8 { return HAL_ERROR; 80111f4: 2301 movs r3, #1 80111f6: e032 b.n 801125e } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80111f8: 687b ldr r3, [r7, #4] 80111fa: 681b ldr r3, [r3, #0] 80111fc: f003 0304 and.w r3, r3, #4 8011200: 2b00 cmp r3, #0 8011202: d008 beq.n 8011216 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8011204: 4b19 ldr r3, [pc, #100] @ (801126c ) 8011206: 685b ldr r3, [r3, #4] 8011208: f423 62e0 bic.w r2, r3, #1792 @ 0x700 801120c: 687b ldr r3, [r7, #4] 801120e: 68db ldr r3, [r3, #12] 8011210: 4916 ldr r1, [pc, #88] @ (801126c ) 8011212: 4313 orrs r3, r2 8011214: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8011216: 687b ldr r3, [r7, #4] 8011218: 681b ldr r3, [r3, #0] 801121a: f003 0308 and.w r3, r3, #8 801121e: 2b00 cmp r3, #0 8011220: d009 beq.n 8011236 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8011222: 4b12 ldr r3, [pc, #72] @ (801126c ) 8011224: 685b ldr r3, [r3, #4] 8011226: f423 5260 bic.w r2, r3, #14336 @ 0x3800 801122a: 687b ldr r3, [r7, #4] 801122c: 691b ldr r3, [r3, #16] 801122e: 00db lsls r3, r3, #3 8011230: 490e ldr r1, [pc, #56] @ (801126c ) 8011232: 4313 orrs r3, r2 8011234: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 8011236: f000 f821 bl 801127c 801123a: 4602 mov r2, r0 801123c: 4b0b ldr r3, [pc, #44] @ (801126c ) 801123e: 685b ldr r3, [r3, #4] 8011240: 091b lsrs r3, r3, #4 8011242: f003 030f and.w r3, r3, #15 8011246: 490a ldr r1, [pc, #40] @ (8011270 ) 8011248: 5ccb ldrb r3, [r1, r3] 801124a: fa22 f303 lsr.w r3, r2, r3 801124e: 4a09 ldr r2, [pc, #36] @ (8011274 ) 8011250: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 8011252: 4b09 ldr r3, [pc, #36] @ (8011278 ) 8011254: 681b ldr r3, [r3, #0] 8011256: 4618 mov r0, r3 8011258: f7fd fad2 bl 800e800 return HAL_OK; 801125c: 2300 movs r3, #0 } 801125e: 4618 mov r0, r3 8011260: 3710 adds r7, #16 8011262: 46bd mov sp, r7 8011264: bd80 pop {r7, pc} 8011266: bf00 nop 8011268: 40022000 .word 0x40022000 801126c: 40021000 .word 0x40021000 8011270: 08016cc0 .word 0x08016cc0 8011274: 20000078 .word 0x20000078 8011278: 2000007c .word 0x2000007c 0801127c : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 801127c: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 8011280: b08e sub sp, #56 @ 0x38 8011282: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 8011284: 2300 movs r3, #0 8011286: 62fb str r3, [r7, #44] @ 0x2c 8011288: 2300 movs r3, #0 801128a: 62bb str r3, [r7, #40] @ 0x28 801128c: 2300 movs r3, #0 801128e: 637b str r3, [r7, #52] @ 0x34 8011290: 2300 movs r3, #0 8011292: 627b str r3, [r7, #36] @ 0x24 uint32_t sysclockfreq = 0U; 8011294: 2300 movs r3, #0 8011296: 633b str r3, [r7, #48] @ 0x30 #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; 8011298: 2300 movs r3, #0 801129a: 623b str r3, [r7, #32] 801129c: 2300 movs r3, #0 801129e: 61fb str r3, [r7, #28] #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 80112a0: 4b4e ldr r3, [pc, #312] @ (80113dc ) 80112a2: 685b ldr r3, [r3, #4] 80112a4: 62fb str r3, [r7, #44] @ 0x2c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 80112a6: 6afb ldr r3, [r7, #44] @ 0x2c 80112a8: f003 030c and.w r3, r3, #12 80112ac: 2b04 cmp r3, #4 80112ae: d002 beq.n 80112b6 80112b0: 2b08 cmp r3, #8 80112b2: d003 beq.n 80112bc 80112b4: e089 b.n 80113ca { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 80112b6: 4b4a ldr r3, [pc, #296] @ (80113e0 ) 80112b8: 633b str r3, [r7, #48] @ 0x30 break; 80112ba: e089 b.n 80113d0 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80112bc: 6afb ldr r3, [r7, #44] @ 0x2c 80112be: 0c9b lsrs r3, r3, #18 80112c0: f003 020f and.w r2, r3, #15 80112c4: 4b47 ldr r3, [pc, #284] @ (80113e4 ) 80112c6: 5c9b ldrb r3, [r3, r2] 80112c8: 627b str r3, [r7, #36] @ 0x24 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80112ca: 6afb ldr r3, [r7, #44] @ 0x2c 80112cc: f403 3380 and.w r3, r3, #65536 @ 0x10000 80112d0: 2b00 cmp r3, #0 80112d2: d072 beq.n 80113ba { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 80112d4: 4b41 ldr r3, [pc, #260] @ (80113dc ) 80112d6: 6adb ldr r3, [r3, #44] @ 0x2c 80112d8: f003 020f and.w r2, r3, #15 80112dc: 4b42 ldr r3, [pc, #264] @ (80113e8 ) 80112de: 5c9b ldrb r3, [r3, r2] 80112e0: 62bb str r3, [r7, #40] @ 0x28 #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /*RCC_CFGR2_PREDIV1*/ #if defined(RCC_CFGR2_PREDIV1SRC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 80112e2: 4b3e ldr r3, [pc, #248] @ (80113dc ) 80112e4: 6adb ldr r3, [r3, #44] @ 0x2c 80112e6: f403 3380 and.w r3, r3, #65536 @ 0x10000 80112ea: 2b00 cmp r3, #0 80112ec: d053 beq.n 8011396 { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 80112ee: 4b3b ldr r3, [pc, #236] @ (80113dc ) 80112f0: 6adb ldr r3, [r3, #44] @ 0x2c 80112f2: 091b lsrs r3, r3, #4 80112f4: f003 030f and.w r3, r3, #15 80112f8: 3301 adds r3, #1 80112fa: 623b str r3, [r7, #32] pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 80112fc: 4b37 ldr r3, [pc, #220] @ (80113dc ) 80112fe: 6adb ldr r3, [r3, #44] @ 0x2c 8011300: 0a1b lsrs r3, r3, #8 8011302: f003 030f and.w r3, r3, #15 8011306: 3302 adds r3, #2 8011308: 61fb str r3, [r7, #28] pllclk = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pll2mul * (uint64_t)pllmul) / ((uint64_t)prediv2 * (uint64_t)prediv)); 801130a: 69fb ldr r3, [r7, #28] 801130c: 2200 movs r2, #0 801130e: 469a mov sl, r3 8011310: 4693 mov fp, r2 8011312: 6a7b ldr r3, [r7, #36] @ 0x24 8011314: 2200 movs r2, #0 8011316: 613b str r3, [r7, #16] 8011318: 617a str r2, [r7, #20] 801131a: 693b ldr r3, [r7, #16] 801131c: fb03 f20b mul.w r2, r3, fp 8011320: 697b ldr r3, [r7, #20] 8011322: fb0a f303 mul.w r3, sl, r3 8011326: 4413 add r3, r2 8011328: 693a ldr r2, [r7, #16] 801132a: fbaa 0102 umull r0, r1, sl, r2 801132e: 440b add r3, r1 8011330: 4619 mov r1, r3 8011332: 4b2b ldr r3, [pc, #172] @ (80113e0 ) 8011334: fb03 f201 mul.w r2, r3, r1 8011338: 2300 movs r3, #0 801133a: fb00 f303 mul.w r3, r0, r3 801133e: 4413 add r3, r2 8011340: 4a27 ldr r2, [pc, #156] @ (80113e0 ) 8011342: fba0 4502 umull r4, r5, r0, r2 8011346: 442b add r3, r5 8011348: 461d mov r5, r3 801134a: 6a3b ldr r3, [r7, #32] 801134c: 2200 movs r2, #0 801134e: 60bb str r3, [r7, #8] 8011350: 60fa str r2, [r7, #12] 8011352: 6abb ldr r3, [r7, #40] @ 0x28 8011354: 2200 movs r2, #0 8011356: 603b str r3, [r7, #0] 8011358: 607a str r2, [r7, #4] 801135a: e9d7 0102 ldrd r0, r1, [r7, #8] 801135e: 460b mov r3, r1 8011360: e9d7 ab00 ldrd sl, fp, [r7] 8011364: 4652 mov r2, sl 8011366: fb02 f203 mul.w r2, r2, r3 801136a: 465b mov r3, fp 801136c: 4684 mov ip, r0 801136e: fb0c f303 mul.w r3, ip, r3 8011372: 4413 add r3, r2 8011374: 4602 mov r2, r0 8011376: 4651 mov r1, sl 8011378: fba2 8901 umull r8, r9, r2, r1 801137c: 444b add r3, r9 801137e: 4699 mov r9, r3 8011380: 4642 mov r2, r8 8011382: 464b mov r3, r9 8011384: 4620 mov r0, r4 8011386: 4629 mov r1, r5 8011388: f7f7 ff84 bl 8009294 <__aeabi_uldivmod> 801138c: 4602 mov r2, r0 801138e: 460b mov r3, r1 8011390: 4613 mov r3, r2 8011392: 637b str r3, [r7, #52] @ 0x34 8011394: e007 b.n 80113a6 } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8011396: 6a7b ldr r3, [r7, #36] @ 0x24 8011398: 4a11 ldr r2, [pc, #68] @ (80113e0 ) 801139a: fb03 f202 mul.w r2, r3, r2 801139e: 6abb ldr r3, [r7, #40] @ 0x28 80113a0: fbb2 f3f3 udiv r3, r2, r3 80113a4: 637b str r3, [r7, #52] @ 0x34 } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 80113a6: 4b0f ldr r3, [pc, #60] @ (80113e4 ) 80113a8: 7b5b ldrb r3, [r3, #13] 80113aa: 461a mov r2, r3 80113ac: 6a7b ldr r3, [r7, #36] @ 0x24 80113ae: 4293 cmp r3, r2 80113b0: d108 bne.n 80113c4 { pllclk = pllclk / 2; 80113b2: 6b7b ldr r3, [r7, #52] @ 0x34 80113b4: 085b lsrs r3, r3, #1 80113b6: 637b str r3, [r7, #52] @ 0x34 80113b8: e004 b.n 80113c4 #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 80113ba: 6a7b ldr r3, [r7, #36] @ 0x24 80113bc: 4a0b ldr r2, [pc, #44] @ (80113ec ) 80113be: fb02 f303 mul.w r3, r2, r3 80113c2: 637b str r3, [r7, #52] @ 0x34 } sysclockfreq = pllclk; 80113c4: 6b7b ldr r3, [r7, #52] @ 0x34 80113c6: 633b str r3, [r7, #48] @ 0x30 break; 80113c8: e002 b.n 80113d0 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 80113ca: 4b09 ldr r3, [pc, #36] @ (80113f0 ) 80113cc: 633b str r3, [r7, #48] @ 0x30 break; 80113ce: bf00 nop } } return sysclockfreq; 80113d0: 6b3b ldr r3, [r7, #48] @ 0x30 } 80113d2: 4618 mov r0, r3 80113d4: 3738 adds r7, #56 @ 0x38 80113d6: 46bd mov sp, r7 80113d8: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 80113dc: 40021000 .word 0x40021000 80113e0: 017d7840 .word 0x017d7840 80113e4: 08016cd8 .word 0x08016cd8 80113e8: 08016ce8 .word 0x08016ce8 80113ec: 003d0900 .word 0x003d0900 80113f0: 007a1200 .word 0x007a1200 080113f4 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 80113f4: b480 push {r7} 80113f6: af00 add r7, sp, #0 return SystemCoreClock; 80113f8: 4b02 ldr r3, [pc, #8] @ (8011404 ) 80113fa: 681b ldr r3, [r3, #0] } 80113fc: 4618 mov r0, r3 80113fe: 46bd mov sp, r7 8011400: bc80 pop {r7} 8011402: 4770 bx lr 8011404: 20000078 .word 0x20000078 08011408 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 8011408: b580 push {r7, lr} 801140a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 801140c: f7ff fff2 bl 80113f4 8011410: 4602 mov r2, r0 8011412: 4b05 ldr r3, [pc, #20] @ (8011428 ) 8011414: 685b ldr r3, [r3, #4] 8011416: 0a1b lsrs r3, r3, #8 8011418: f003 0307 and.w r3, r3, #7 801141c: 4903 ldr r1, [pc, #12] @ (801142c ) 801141e: 5ccb ldrb r3, [r1, r3] 8011420: fa22 f303 lsr.w r3, r2, r3 } 8011424: 4618 mov r0, r3 8011426: bd80 pop {r7, pc} 8011428: 40021000 .word 0x40021000 801142c: 08016cd0 .word 0x08016cd0 08011430 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 8011430: b580 push {r7, lr} 8011432: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8011434: f7ff ffde bl 80113f4 8011438: 4602 mov r2, r0 801143a: 4b05 ldr r3, [pc, #20] @ (8011450 ) 801143c: 685b ldr r3, [r3, #4] 801143e: 0adb lsrs r3, r3, #11 8011440: f003 0307 and.w r3, r3, #7 8011444: 4903 ldr r1, [pc, #12] @ (8011454 ) 8011446: 5ccb ldrb r3, [r1, r3] 8011448: fa22 f303 lsr.w r3, r2, r3 } 801144c: 4618 mov r0, r3 801144e: bd80 pop {r7, pc} 8011450: 40021000 .word 0x40021000 8011454: 08016cd0 .word 0x08016cd0 08011458 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 8011458: b480 push {r7} 801145a: b085 sub sp, #20 801145c: af00 add r7, sp, #0 801145e: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8011460: 4b0a ldr r3, [pc, #40] @ (801148c ) 8011462: 681b ldr r3, [r3, #0] 8011464: 4a0a ldr r2, [pc, #40] @ (8011490 ) 8011466: fba2 2303 umull r2, r3, r2, r3 801146a: 0a5b lsrs r3, r3, #9 801146c: 687a ldr r2, [r7, #4] 801146e: fb02 f303 mul.w r3, r2, r3 8011472: 60fb str r3, [r7, #12] do { __NOP(); 8011474: bf00 nop } while (Delay --); 8011476: 68fb ldr r3, [r7, #12] 8011478: 1e5a subs r2, r3, #1 801147a: 60fa str r2, [r7, #12] 801147c: 2b00 cmp r3, #0 801147e: d1f9 bne.n 8011474 } 8011480: bf00 nop 8011482: bf00 nop 8011484: 3714 adds r7, #20 8011486: 46bd mov sp, r7 8011488: bc80 pop {r7} 801148a: 4770 bx lr 801148c: 20000078 .word 0x20000078 8011490: 10624dd3 .word 0x10624dd3 08011494 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 8011494: b580 push {r7, lr} 8011496: b088 sub sp, #32 8011498: af00 add r7, sp, #0 801149a: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 801149c: 2300 movs r3, #0 801149e: 617b str r3, [r7, #20] 80114a0: 2300 movs r3, #0 80114a2: 613b str r3, [r7, #16] #if defined(STM32F105xC) || defined(STM32F107xC) uint32_t pllactive = 0U; 80114a4: 2300 movs r3, #0 80114a6: 61fb str r3, [r7, #28] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 80114a8: 687b ldr r3, [r7, #4] 80114aa: 681b ldr r3, [r3, #0] 80114ac: f003 0301 and.w r3, r3, #1 80114b0: 2b00 cmp r3, #0 80114b2: d07d beq.n 80115b0 { FlagStatus pwrclkchanged = RESET; 80114b4: 2300 movs r3, #0 80114b6: 76fb strb r3, [r7, #27] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 80114b8: 4b8b ldr r3, [pc, #556] @ (80116e8 ) 80114ba: 69db ldr r3, [r3, #28] 80114bc: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80114c0: 2b00 cmp r3, #0 80114c2: d10d bne.n 80114e0 { __HAL_RCC_PWR_CLK_ENABLE(); 80114c4: 4b88 ldr r3, [pc, #544] @ (80116e8 ) 80114c6: 69db ldr r3, [r3, #28] 80114c8: 4a87 ldr r2, [pc, #540] @ (80116e8 ) 80114ca: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80114ce: 61d3 str r3, [r2, #28] 80114d0: 4b85 ldr r3, [pc, #532] @ (80116e8 ) 80114d2: 69db ldr r3, [r3, #28] 80114d4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80114d8: 60fb str r3, [r7, #12] 80114da: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; 80114dc: 2301 movs r3, #1 80114de: 76fb strb r3, [r7, #27] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80114e0: 4b82 ldr r3, [pc, #520] @ (80116ec ) 80114e2: 681b ldr r3, [r3, #0] 80114e4: f403 7380 and.w r3, r3, #256 @ 0x100 80114e8: 2b00 cmp r3, #0 80114ea: d118 bne.n 801151e { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80114ec: 4b7f ldr r3, [pc, #508] @ (80116ec ) 80114ee: 681b ldr r3, [r3, #0] 80114f0: 4a7e ldr r2, [pc, #504] @ (80116ec ) 80114f2: f443 7380 orr.w r3, r3, #256 @ 0x100 80114f6: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80114f8: f7fd f9c4 bl 800e884 80114fc: 6178 str r0, [r7, #20] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80114fe: e008 b.n 8011512 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8011500: f7fd f9c0 bl 800e884 8011504: 4602 mov r2, r0 8011506: 697b ldr r3, [r7, #20] 8011508: 1ad3 subs r3, r2, r3 801150a: 2b64 cmp r3, #100 @ 0x64 801150c: d901 bls.n 8011512 { return HAL_TIMEOUT; 801150e: 2303 movs r3, #3 8011510: e0e5 b.n 80116de while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8011512: 4b76 ldr r3, [pc, #472] @ (80116ec ) 8011514: 681b ldr r3, [r3, #0] 8011516: f403 7380 and.w r3, r3, #256 @ 0x100 801151a: 2b00 cmp r3, #0 801151c: d0f0 beq.n 8011500 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 801151e: 4b72 ldr r3, [pc, #456] @ (80116e8 ) 8011520: 6a1b ldr r3, [r3, #32] 8011522: f403 7340 and.w r3, r3, #768 @ 0x300 8011526: 613b str r3, [r7, #16] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8011528: 693b ldr r3, [r7, #16] 801152a: 2b00 cmp r3, #0 801152c: d02e beq.n 801158c 801152e: 687b ldr r3, [r7, #4] 8011530: 685b ldr r3, [r3, #4] 8011532: f403 7340 and.w r3, r3, #768 @ 0x300 8011536: 693a ldr r2, [r7, #16] 8011538: 429a cmp r2, r3 801153a: d027 beq.n 801158c { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 801153c: 4b6a ldr r3, [pc, #424] @ (80116e8 ) 801153e: 6a1b ldr r3, [r3, #32] 8011540: f423 7340 bic.w r3, r3, #768 @ 0x300 8011544: 613b str r3, [r7, #16] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8011546: 4b6a ldr r3, [pc, #424] @ (80116f0 ) 8011548: 2201 movs r2, #1 801154a: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 801154c: 4b68 ldr r3, [pc, #416] @ (80116f0 ) 801154e: 2200 movs r2, #0 8011550: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 8011552: 4a65 ldr r2, [pc, #404] @ (80116e8 ) 8011554: 693b ldr r3, [r7, #16] 8011556: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 8011558: 693b ldr r3, [r7, #16] 801155a: f003 0301 and.w r3, r3, #1 801155e: 2b00 cmp r3, #0 8011560: d014 beq.n 801158c { /* Get Start Tick */ tickstart = HAL_GetTick(); 8011562: f7fd f98f bl 800e884 8011566: 6178 str r0, [r7, #20] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8011568: e00a b.n 8011580 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 801156a: f7fd f98b bl 800e884 801156e: 4602 mov r2, r0 8011570: 697b ldr r3, [r7, #20] 8011572: 1ad3 subs r3, r2, r3 8011574: f241 3288 movw r2, #5000 @ 0x1388 8011578: 4293 cmp r3, r2 801157a: d901 bls.n 8011580 { return HAL_TIMEOUT; 801157c: 2303 movs r3, #3 801157e: e0ae b.n 80116de while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8011580: 4b59 ldr r3, [pc, #356] @ (80116e8 ) 8011582: 6a1b ldr r3, [r3, #32] 8011584: f003 0302 and.w r3, r3, #2 8011588: 2b00 cmp r3, #0 801158a: d0ee beq.n 801156a } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 801158c: 4b56 ldr r3, [pc, #344] @ (80116e8 ) 801158e: 6a1b ldr r3, [r3, #32] 8011590: f423 7240 bic.w r2, r3, #768 @ 0x300 8011594: 687b ldr r3, [r7, #4] 8011596: 685b ldr r3, [r3, #4] 8011598: 4953 ldr r1, [pc, #332] @ (80116e8 ) 801159a: 4313 orrs r3, r2 801159c: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 801159e: 7efb ldrb r3, [r7, #27] 80115a0: 2b01 cmp r3, #1 80115a2: d105 bne.n 80115b0 { __HAL_RCC_PWR_CLK_DISABLE(); 80115a4: 4b50 ldr r3, [pc, #320] @ (80116e8 ) 80115a6: 69db ldr r3, [r3, #28] 80115a8: 4a4f ldr r2, [pc, #316] @ (80116e8 ) 80115aa: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 80115ae: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 80115b0: 687b ldr r3, [r7, #4] 80115b2: 681b ldr r3, [r3, #0] 80115b4: f003 0302 and.w r3, r3, #2 80115b8: 2b00 cmp r3, #0 80115ba: d008 beq.n 80115ce { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 80115bc: 4b4a ldr r3, [pc, #296] @ (80116e8 ) 80115be: 685b ldr r3, [r3, #4] 80115c0: f423 4240 bic.w r2, r3, #49152 @ 0xc000 80115c4: 687b ldr r3, [r7, #4] 80115c6: 689b ldr r3, [r3, #8] 80115c8: 4947 ldr r1, [pc, #284] @ (80116e8 ) 80115ca: 4313 orrs r3, r2 80115cc: 604b str r3, [r1, #4] } #if defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ I2S2 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S2) == RCC_PERIPHCLK_I2S2) 80115ce: 687b ldr r3, [r7, #4] 80115d0: 681b ldr r3, [r3, #0] 80115d2: f003 0304 and.w r3, r3, #4 80115d6: 2b00 cmp r3, #0 80115d8: d008 beq.n 80115ec { /* Check the parameters */ assert_param(IS_RCC_I2S2CLKSOURCE(PeriphClkInit->I2s2ClockSelection)); /* Configure the I2S2 clock source */ __HAL_RCC_I2S2_CONFIG(PeriphClkInit->I2s2ClockSelection); 80115da: 4b43 ldr r3, [pc, #268] @ (80116e8 ) 80115dc: 6adb ldr r3, [r3, #44] @ 0x2c 80115de: f423 3200 bic.w r2, r3, #131072 @ 0x20000 80115e2: 687b ldr r3, [r7, #4] 80115e4: 68db ldr r3, [r3, #12] 80115e6: 4940 ldr r1, [pc, #256] @ (80116e8 ) 80115e8: 4313 orrs r3, r2 80115ea: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ I2S3 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S3) == RCC_PERIPHCLK_I2S3) 80115ec: 687b ldr r3, [r7, #4] 80115ee: 681b ldr r3, [r3, #0] 80115f0: f003 0308 and.w r3, r3, #8 80115f4: 2b00 cmp r3, #0 80115f6: d008 beq.n 801160a { /* Check the parameters */ assert_param(IS_RCC_I2S3CLKSOURCE(PeriphClkInit->I2s3ClockSelection)); /* Configure the I2S3 clock source */ __HAL_RCC_I2S3_CONFIG(PeriphClkInit->I2s3ClockSelection); 80115f8: 4b3b ldr r3, [pc, #236] @ (80116e8 ) 80115fa: 6adb ldr r3, [r3, #44] @ 0x2c 80115fc: f423 2280 bic.w r2, r3, #262144 @ 0x40000 8011600: 687b ldr r3, [r7, #4] 8011602: 691b ldr r3, [r3, #16] 8011604: 4938 ldr r1, [pc, #224] @ (80116e8 ) 8011606: 4313 orrs r3, r2 8011608: 62cb str r3, [r1, #44] @ 0x2c } /*------------------------------ PLL I2S Configuration ----------------------*/ /* Check that PLLI2S need to be enabled */ if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S2SRC) || HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S3SRC)) 801160a: 4b37 ldr r3, [pc, #220] @ (80116e8 ) 801160c: 6adb ldr r3, [r3, #44] @ 0x2c 801160e: f403 3300 and.w r3, r3, #131072 @ 0x20000 8011612: 2b00 cmp r3, #0 8011614: d105 bne.n 8011622 8011616: 4b34 ldr r3, [pc, #208] @ (80116e8 ) 8011618: 6adb ldr r3, [r3, #44] @ 0x2c 801161a: f403 2380 and.w r3, r3, #262144 @ 0x40000 801161e: 2b00 cmp r3, #0 8011620: d001 beq.n 8011626 { /* Update flag to indicate that PLL I2S should be active */ pllactive = 1; 8011622: 2301 movs r3, #1 8011624: 61fb str r3, [r7, #28] } /* Check if PLL I2S need to be enabled */ if (pllactive == 1) 8011626: 69fb ldr r3, [r7, #28] 8011628: 2b01 cmp r3, #1 801162a: d148 bne.n 80116be { /* Enable PLL I2S only if not active */ if (HAL_IS_BIT_CLR(RCC->CR, RCC_CR_PLL3ON)) 801162c: 4b2e ldr r3, [pc, #184] @ (80116e8 ) 801162e: 681b ldr r3, [r3, #0] 8011630: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8011634: 2b00 cmp r3, #0 8011636: d138 bne.n 80116aa assert_param(IS_RCC_PLLI2S_MUL(PeriphClkInit->PLLI2S.PLLI2SMUL)); assert_param(IS_RCC_HSE_PREDIV2(PeriphClkInit->PLLI2S.HSEPrediv2Value)); /* Prediv2 can be written only when the PLL2 is disabled. */ /* Return an error only if new value is different from the programmed value */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 8011638: 4b2b ldr r3, [pc, #172] @ (80116e8 ) 801163a: 681b ldr r3, [r3, #0] 801163c: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8011640: 2b00 cmp r3, #0 8011642: d009 beq.n 8011658 (__HAL_RCC_HSE_GET_PREDIV2() != PeriphClkInit->PLLI2S.HSEPrediv2Value)) 8011644: 4b28 ldr r3, [pc, #160] @ (80116e8 ) 8011646: 6adb ldr r3, [r3, #44] @ 0x2c 8011648: f003 02f0 and.w r2, r3, #240 @ 0xf0 801164c: 687b ldr r3, [r7, #4] 801164e: 699b ldr r3, [r3, #24] if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 8011650: 429a cmp r2, r3 8011652: d001 beq.n 8011658 { return HAL_ERROR; 8011654: 2301 movs r3, #1 8011656: e042 b.n 80116de } /* Configure the HSE prediv2 factor --------------------------------*/ __HAL_RCC_HSE_PREDIV2_CONFIG(PeriphClkInit->PLLI2S.HSEPrediv2Value); 8011658: 4b23 ldr r3, [pc, #140] @ (80116e8 ) 801165a: 6adb ldr r3, [r3, #44] @ 0x2c 801165c: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8011660: 687b ldr r3, [r7, #4] 8011662: 699b ldr r3, [r3, #24] 8011664: 4920 ldr r1, [pc, #128] @ (80116e8 ) 8011666: 4313 orrs r3, r2 8011668: 62cb str r3, [r1, #44] @ 0x2c /* Configure the main PLLI2S multiplication factors. */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SMUL); 801166a: 4b1f ldr r3, [pc, #124] @ (80116e8 ) 801166c: 6adb ldr r3, [r3, #44] @ 0x2c 801166e: f423 4270 bic.w r2, r3, #61440 @ 0xf000 8011672: 687b ldr r3, [r7, #4] 8011674: 695b ldr r3, [r3, #20] 8011676: 491c ldr r1, [pc, #112] @ (80116e8 ) 8011678: 4313 orrs r3, r2 801167a: 62cb str r3, [r1, #44] @ 0x2c /* Enable the main PLLI2S. */ __HAL_RCC_PLLI2S_ENABLE(); 801167c: 4b1d ldr r3, [pc, #116] @ (80116f4 ) 801167e: 2201 movs r2, #1 8011680: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8011682: f7fd f8ff bl 800e884 8011686: 6178 str r0, [r7, #20] /* Wait till PLLI2S is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 8011688: e008 b.n 801169c { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 801168a: f7fd f8fb bl 800e884 801168e: 4602 mov r2, r0 8011690: 697b ldr r3, [r7, #20] 8011692: 1ad3 subs r3, r2, r3 8011694: 2b64 cmp r3, #100 @ 0x64 8011696: d901 bls.n 801169c { return HAL_TIMEOUT; 8011698: 2303 movs r3, #3 801169a: e020 b.n 80116de while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 801169c: 4b12 ldr r3, [pc, #72] @ (80116e8 ) 801169e: 681b ldr r3, [r3, #0] 80116a0: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 80116a4: 2b00 cmp r3, #0 80116a6: d0f0 beq.n 801168a 80116a8: e009 b.n 80116be } } else { /* Return an error only if user wants to change the PLLI2SMUL whereas PLLI2S is active */ if (READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL3MUL) != PeriphClkInit->PLLI2S.PLLI2SMUL) 80116aa: 4b0f ldr r3, [pc, #60] @ (80116e8 ) 80116ac: 6adb ldr r3, [r3, #44] @ 0x2c 80116ae: f403 4270 and.w r2, r3, #61440 @ 0xf000 80116b2: 687b ldr r3, [r7, #4] 80116b4: 695b ldr r3, [r3, #20] 80116b6: 429a cmp r2, r3 80116b8: d001 beq.n 80116be { return HAL_ERROR; 80116ba: 2301 movs r3, #1 80116bc: e00f b.n 80116de #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 80116be: 687b ldr r3, [r7, #4] 80116c0: 681b ldr r3, [r3, #0] 80116c2: f003 0310 and.w r3, r3, #16 80116c6: 2b00 cmp r3, #0 80116c8: d008 beq.n 80116dc { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 80116ca: 4b07 ldr r3, [pc, #28] @ (80116e8 ) 80116cc: 685b ldr r3, [r3, #4] 80116ce: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 80116d2: 687b ldr r3, [r7, #4] 80116d4: 69db ldr r3, [r3, #28] 80116d6: 4904 ldr r1, [pc, #16] @ (80116e8 ) 80116d8: 4313 orrs r3, r2 80116da: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 80116dc: 2300 movs r3, #0 } 80116de: 4618 mov r0, r3 80116e0: 3720 adds r7, #32 80116e2: 46bd mov sp, r7 80116e4: bd80 pop {r7, pc} 80116e6: bf00 nop 80116e8: 40021000 .word 0x40021000 80116ec: 40007000 .word 0x40007000 80116f0: 42420440 .word 0x42420440 80116f4: 42420070 .word 0x42420070 080116f8 : * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock @endif * @retval Frequency in Hz (0: means that no available frequency for the peripheral) */ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) { 80116f8: b580 push {r7, lr} 80116fa: b08a sub sp, #40 @ 0x28 80116fc: af00 add r7, sp, #0 80116fe: 6078 str r0, [r7, #4] #if defined(STM32F105xC) || defined(STM32F107xC) static const uint8_t aPLLMULFactorTable[14U] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; static const uint8_t aPredivFactorTable[16U] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; 8011700: 2300 movs r3, #0 8011702: 61fb str r3, [r7, #28] 8011704: 2300 movs r3, #0 8011706: 627b str r3, [r7, #36] @ 0x24 8011708: 2300 movs r3, #0 801170a: 61bb str r3, [r7, #24] uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U; 801170c: 2300 movs r3, #0 801170e: 617b str r3, [r7, #20] 8011710: 2300 movs r3, #0 8011712: 613b str r3, [r7, #16] 8011714: 2300 movs r3, #0 8011716: 60fb str r3, [r7, #12] static const uint8_t aPLLMULFactorTable[16U] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; static const uint8_t aPredivFactorTable[2U] = {1, 2}; uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG */ uint32_t temp_reg = 0U, frequency = 0U; 8011718: 2300 movs r3, #0 801171a: 60bb str r3, [r7, #8] 801171c: 2300 movs r3, #0 801171e: 623b str r3, [r7, #32] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); switch (PeriphClk) 8011720: 687b ldr r3, [r7, #4] 8011722: 3b01 subs r3, #1 8011724: 2b0f cmp r3, #15 8011726: f200 811d bhi.w 8011964 801172a: a201 add r2, pc, #4 @ (adr r2, 8011730 ) 801172c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8011730: 080118e5 .word 0x080118e5 8011734: 08011949 .word 0x08011949 8011738: 08011965 .word 0x08011965 801173c: 08011843 .word 0x08011843 8011740: 08011965 .word 0x08011965 8011744: 08011965 .word 0x08011965 8011748: 08011965 .word 0x08011965 801174c: 08011895 .word 0x08011895 8011750: 08011965 .word 0x08011965 8011754: 08011965 .word 0x08011965 8011758: 08011965 .word 0x08011965 801175c: 08011965 .word 0x08011965 8011760: 08011965 .word 0x08011965 8011764: 08011965 .word 0x08011965 8011768: 08011965 .word 0x08011965 801176c: 08011771 .word 0x08011771 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) case RCC_PERIPHCLK_USB: { /* Get RCC configuration ------------------------------------------------------*/ temp_reg = RCC->CFGR; 8011770: 4b83 ldr r3, [pc, #524] @ (8011980 ) 8011772: 685b ldr r3, [r3, #4] 8011774: 60bb str r3, [r7, #8] /* Check if PLL is enabled */ if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLON)) 8011776: 4b82 ldr r3, [pc, #520] @ (8011980 ) 8011778: 681b ldr r3, [r3, #0] 801177a: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 801177e: 2b00 cmp r3, #0 8011780: f000 80f2 beq.w 8011968 { pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8011784: 68bb ldr r3, [r7, #8] 8011786: 0c9b lsrs r3, r3, #18 8011788: f003 030f and.w r3, r3, #15 801178c: 4a7d ldr r2, [pc, #500] @ (8011984 ) 801178e: 5cd3 ldrb r3, [r2, r3] 8011790: 61bb str r3, [r7, #24] if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8011792: 68bb ldr r3, [r7, #8] 8011794: f403 3380 and.w r3, r3, #65536 @ 0x10000 8011798: 2b00 cmp r3, #0 801179a: d03b beq.n 8011814 { #if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\ || defined(STM32F100xE) prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 801179c: 4b78 ldr r3, [pc, #480] @ (8011980 ) 801179e: 6adb ldr r3, [r3, #44] @ 0x2c 80117a0: f003 030f and.w r3, r3, #15 80117a4: 4a78 ldr r2, [pc, #480] @ (8011988 ) 80117a6: 5cd3 ldrb r3, [r2, r3] 80117a8: 61fb str r3, [r7, #28] #else prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ #if defined(STM32F105xC) || defined(STM32F107xC) if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 80117aa: 4b75 ldr r3, [pc, #468] @ (8011980 ) 80117ac: 6adb ldr r3, [r3, #44] @ 0x2c 80117ae: f403 3380 and.w r3, r3, #65536 @ 0x10000 80117b2: 2b00 cmp r3, #0 80117b4: d01c beq.n 80117f0 { /* PLL2 selected as Prediv1 source */ /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 80117b6: 4b72 ldr r3, [pc, #456] @ (8011980 ) 80117b8: 6adb ldr r3, [r3, #44] @ 0x2c 80117ba: 091b lsrs r3, r3, #4 80117bc: f003 030f and.w r3, r3, #15 80117c0: 3301 adds r3, #1 80117c2: 60fb str r3, [r7, #12] pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 80117c4: 4b6e ldr r3, [pc, #440] @ (8011980 ) 80117c6: 6adb ldr r3, [r3, #44] @ 0x2c 80117c8: 0a1b lsrs r3, r3, #8 80117ca: f003 030f and.w r3, r3, #15 80117ce: 3302 adds r3, #2 80117d0: 617b str r3, [r7, #20] pllclk = (uint32_t)((((HSE_VALUE / prediv2) * pll2mul) / prediv1) * pllmul); 80117d2: 4a6e ldr r2, [pc, #440] @ (801198c ) 80117d4: 68fb ldr r3, [r7, #12] 80117d6: fbb2 f3f3 udiv r3, r2, r3 80117da: 697a ldr r2, [r7, #20] 80117dc: fb03 f202 mul.w r2, r3, r2 80117e0: 69fb ldr r3, [r7, #28] 80117e2: fbb2 f2f3 udiv r2, r2, r3 80117e6: 69bb ldr r3, [r7, #24] 80117e8: fb02 f303 mul.w r3, r2, r3 80117ec: 627b str r3, [r7, #36] @ 0x24 80117ee: e007 b.n 8011800 } else { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 80117f0: 4a66 ldr r2, [pc, #408] @ (801198c ) 80117f2: 69fb ldr r3, [r7, #28] 80117f4: fbb2 f2f3 udiv r2, r2, r3 80117f8: 69bb ldr r3, [r7, #24] 80117fa: fb02 f303 mul.w r3, r2, r3 80117fe: 627b str r3, [r7, #36] @ 0x24 } /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using float) */ /* In this case need to divide pllclk by 2 */ if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos]) 8011800: 4b60 ldr r3, [pc, #384] @ (8011984 ) 8011802: 7b5b ldrb r3, [r3, #13] 8011804: 461a mov r2, r3 8011806: 69bb ldr r3, [r7, #24] 8011808: 4293 cmp r3, r2 801180a: d108 bne.n 801181e { pllclk = pllclk / 2; 801180c: 6a7b ldr r3, [r7, #36] @ 0x24 801180e: 085b lsrs r3, r3, #1 8011810: 627b str r3, [r7, #36] @ 0x24 8011812: e004 b.n 801181e #endif /* STM32F105xC || STM32F107xC */ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8011814: 69bb ldr r3, [r7, #24] 8011816: 4a5e ldr r2, [pc, #376] @ (8011990 ) 8011818: fb02 f303 mul.w r3, r2, r3 801181c: 627b str r3, [r7, #36] @ 0x24 } /* Calcul of the USB frequency*/ #if defined(STM32F105xC) || defined(STM32F107xC) /* USBCLK = PLLVCO = (2 x PLLCLK) / USB prescaler */ if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL_DIV2) 801181e: 4b58 ldr r3, [pc, #352] @ (8011980 ) 8011820: 685b ldr r3, [r3, #4] 8011822: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8011826: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 801182a: d102 bne.n 8011832 { /* Prescaler of 2 selected for USB */ frequency = pllclk; 801182c: 6a7b ldr r3, [r7, #36] @ 0x24 801182e: 623b str r3, [r7, #32] /* Prescaler of 1.5 selected for USB */ frequency = (pllclk * 2) / 3; } #endif } break; 8011830: e09a b.n 8011968 frequency = (2 * pllclk) / 3; 8011832: 6a7b ldr r3, [r7, #36] @ 0x24 8011834: 005b lsls r3, r3, #1 8011836: 4a57 ldr r2, [pc, #348] @ (8011994 ) 8011838: fba2 2303 umull r2, r3, r2, r3 801183c: 085b lsrs r3, r3, #1 801183e: 623b str r3, [r7, #32] break; 8011840: e092 b.n 8011968 { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S2_SOURCE() == RCC_I2S2CLKSOURCE_SYSCLK) 8011842: 4b4f ldr r3, [pc, #316] @ (8011980 ) 8011844: 6adb ldr r3, [r3, #44] @ 0x2c 8011846: f403 3300 and.w r3, r3, #131072 @ 0x20000 801184a: 2b00 cmp r3, #0 801184c: d103 bne.n 8011856 { /* SYSCLK used as source clock for I2S2 */ frequency = HAL_RCC_GetSysClockFreq(); 801184e: f7ff fd15 bl 801127c 8011852: 6238 str r0, [r7, #32] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 8011854: e08a b.n 801196c if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 8011856: 4b4a ldr r3, [pc, #296] @ (8011980 ) 8011858: 681b ldr r3, [r3, #0] 801185a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 801185e: 2b00 cmp r3, #0 8011860: f000 8084 beq.w 801196c prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 8011864: 4b46 ldr r3, [pc, #280] @ (8011980 ) 8011866: 6adb ldr r3, [r3, #44] @ 0x2c 8011868: 091b lsrs r3, r3, #4 801186a: f003 030f and.w r3, r3, #15 801186e: 3301 adds r3, #1 8011870: 60fb str r3, [r7, #12] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 8011872: 4b43 ldr r3, [pc, #268] @ (8011980 ) 8011874: 6adb ldr r3, [r3, #44] @ 0x2c 8011876: 0b1b lsrs r3, r3, #12 8011878: f003 030f and.w r3, r3, #15 801187c: 3302 adds r3, #2 801187e: 613b str r3, [r7, #16] frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 8011880: 4a42 ldr r2, [pc, #264] @ (801198c ) 8011882: 68fb ldr r3, [r7, #12] 8011884: fbb2 f3f3 udiv r3, r2, r3 8011888: 693a ldr r2, [r7, #16] 801188a: fb02 f303 mul.w r3, r2, r3 801188e: 005b lsls r3, r3, #1 8011890: 623b str r3, [r7, #32] break; 8011892: e06b b.n 801196c { #if defined(STM32F103xE) || defined(STM32F103xG) /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); #else if (__HAL_RCC_GET_I2S3_SOURCE() == RCC_I2S3CLKSOURCE_SYSCLK) 8011894: 4b3a ldr r3, [pc, #232] @ (8011980 ) 8011896: 6adb ldr r3, [r3, #44] @ 0x2c 8011898: f403 2380 and.w r3, r3, #262144 @ 0x40000 801189c: 2b00 cmp r3, #0 801189e: d103 bne.n 80118a8 { /* SYSCLK used as source clock for I2S3 */ frequency = HAL_RCC_GetSysClockFreq(); 80118a0: f7ff fcec bl 801127c 80118a4: 6238 str r0, [r7, #32] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); } } #endif /* STM32F103xE || STM32F103xG */ break; 80118a6: e063 b.n 8011970 if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 80118a8: 4b35 ldr r3, [pc, #212] @ (8011980 ) 80118aa: 681b ldr r3, [r3, #0] 80118ac: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80118b0: 2b00 cmp r3, #0 80118b2: d05d beq.n 8011970 prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 80118b4: 4b32 ldr r3, [pc, #200] @ (8011980 ) 80118b6: 6adb ldr r3, [r3, #44] @ 0x2c 80118b8: 091b lsrs r3, r3, #4 80118ba: f003 030f and.w r3, r3, #15 80118be: 3301 adds r3, #1 80118c0: 60fb str r3, [r7, #12] pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 80118c2: 4b2f ldr r3, [pc, #188] @ (8011980 ) 80118c4: 6adb ldr r3, [r3, #44] @ 0x2c 80118c6: 0b1b lsrs r3, r3, #12 80118c8: f003 030f and.w r3, r3, #15 80118cc: 3302 adds r3, #2 80118ce: 613b str r3, [r7, #16] frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 80118d0: 4a2e ldr r2, [pc, #184] @ (801198c ) 80118d2: 68fb ldr r3, [r7, #12] 80118d4: fbb2 f3f3 udiv r3, r2, r3 80118d8: 693a ldr r2, [r7, #16] 80118da: fb02 f303 mul.w r3, r2, r3 80118de: 005b lsls r3, r3, #1 80118e0: 623b str r3, [r7, #32] break; 80118e2: e045 b.n 8011970 } #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ case RCC_PERIPHCLK_RTC: { /* Get RCC BDCR configuration ------------------------------------------------------*/ temp_reg = RCC->BDCR; 80118e4: 4b26 ldr r3, [pc, #152] @ (8011980 ) 80118e6: 6a1b ldr r3, [r3, #32] 80118e8: 60bb str r3, [r7, #8] /* Check if LSE is ready if RTC clock selection is LSE */ if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) 80118ea: 68bb ldr r3, [r7, #8] 80118ec: f403 7340 and.w r3, r3, #768 @ 0x300 80118f0: f5b3 7f80 cmp.w r3, #256 @ 0x100 80118f4: d108 bne.n 8011908 80118f6: 68bb ldr r3, [r7, #8] 80118f8: f003 0302 and.w r3, r3, #2 80118fc: 2b00 cmp r3, #0 80118fe: d003 beq.n 8011908 { frequency = LSE_VALUE; 8011900: f44f 4300 mov.w r3, #32768 @ 0x8000 8011904: 623b str r3, [r7, #32] 8011906: e01e b.n 8011946 } /* Check if LSI is ready if RTC clock selection is LSI */ else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) 8011908: 68bb ldr r3, [r7, #8] 801190a: f403 7340 and.w r3, r3, #768 @ 0x300 801190e: f5b3 7f00 cmp.w r3, #512 @ 0x200 8011912: d109 bne.n 8011928 8011914: 4b1a ldr r3, [pc, #104] @ (8011980 ) 8011916: 6a5b ldr r3, [r3, #36] @ 0x24 8011918: f003 0302 and.w r3, r3, #2 801191c: 2b00 cmp r3, #0 801191e: d003 beq.n 8011928 { frequency = LSI_VALUE; 8011920: f649 4340 movw r3, #40000 @ 0x9c40 8011924: 623b str r3, [r7, #32] 8011926: e00e b.n 8011946 } else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) 8011928: 68bb ldr r3, [r7, #8] 801192a: f403 7340 and.w r3, r3, #768 @ 0x300 801192e: f5b3 7f40 cmp.w r3, #768 @ 0x300 8011932: d11f bne.n 8011974 8011934: 4b12 ldr r3, [pc, #72] @ (8011980 ) 8011936: 681b ldr r3, [r3, #0] 8011938: f403 3300 and.w r3, r3, #131072 @ 0x20000 801193c: 2b00 cmp r3, #0 801193e: d019 beq.n 8011974 { frequency = HSE_VALUE / 128U; 8011940: 4b15 ldr r3, [pc, #84] @ (8011998 ) 8011942: 623b str r3, [r7, #32] /* Clock not enabled for RTC*/ else { /* nothing to do: frequency already initialized to 0U */ } break; 8011944: e016 b.n 8011974 8011946: e015 b.n 8011974 } case RCC_PERIPHCLK_ADC: { frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); 8011948: f7ff fd72 bl 8011430 801194c: 4602 mov r2, r0 801194e: 4b0c ldr r3, [pc, #48] @ (8011980 ) 8011950: 685b ldr r3, [r3, #4] 8011952: 0b9b lsrs r3, r3, #14 8011954: f003 0303 and.w r3, r3, #3 8011958: 3301 adds r3, #1 801195a: 005b lsls r3, r3, #1 801195c: fbb2 f3f3 udiv r3, r2, r3 8011960: 623b str r3, [r7, #32] break; 8011962: e008 b.n 8011976 } default: { break; 8011964: bf00 nop 8011966: e006 b.n 8011976 break; 8011968: bf00 nop 801196a: e004 b.n 8011976 break; 801196c: bf00 nop 801196e: e002 b.n 8011976 break; 8011970: bf00 nop 8011972: e000 b.n 8011976 break; 8011974: bf00 nop } } return (frequency); 8011976: 6a3b ldr r3, [r7, #32] } 8011978: 4618 mov r0, r3 801197a: 3728 adds r7, #40 @ 0x28 801197c: 46bd mov sp, r7 801197e: bd80 pop {r7, pc} 8011980: 40021000 .word 0x40021000 8011984: 08016cf8 .word 0x08016cf8 8011988: 08016d08 .word 0x08016d08 801198c: 017d7840 .word 0x017d7840 8011990: 003d0900 .word 0x003d0900 8011994: aaaaaaab .word 0xaaaaaaab 8011998: 0002faf0 .word 0x0002faf0 0801199c : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { 801199c: b580 push {r7, lr} 801199e: b084 sub sp, #16 80119a0: af00 add r7, sp, #0 80119a2: 6078 str r0, [r7, #4] uint32_t prescaler = 0U; 80119a4: 2300 movs r3, #0 80119a6: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 80119a8: 687b ldr r3, [r7, #4] 80119aa: 2b00 cmp r3, #0 80119ac: d101 bne.n 80119b2 { return HAL_ERROR; 80119ae: 2301 movs r3, #1 80119b0: e07a b.n 8011aa8 { hrtc->MspDeInitCallback = HAL_RTC_MspDeInit; } } #else if (hrtc->State == HAL_RTC_STATE_RESET) 80119b2: 687b ldr r3, [r7, #4] 80119b4: 7c5b ldrb r3, [r3, #17] 80119b6: b2db uxtb r3, r3 80119b8: 2b00 cmp r3, #0 80119ba: d105 bne.n 80119c8 { /* Allocate lock resource and initialize it */ hrtc->Lock = HAL_UNLOCKED; 80119bc: 687b ldr r3, [r7, #4] 80119be: 2200 movs r2, #0 80119c0: 741a strb r2, [r3, #16] /* Initialize RTC MSP */ HAL_RTC_MspInit(hrtc); 80119c2: 6878 ldr r0, [r7, #4] 80119c4: f7fb fc86 bl 800d2d4 } #endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */ /* Set RTC state */ hrtc->State = HAL_RTC_STATE_BUSY; 80119c8: 687b ldr r3, [r7, #4] 80119ca: 2202 movs r2, #2 80119cc: 745a strb r2, [r3, #17] /* Waiting for synchro */ if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) 80119ce: 6878 ldr r0, [r7, #4] 80119d0: f000 f870 bl 8011ab4 80119d4: 4603 mov r3, r0 80119d6: 2b00 cmp r3, #0 80119d8: d004 beq.n 80119e4 { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 80119da: 687b ldr r3, [r7, #4] 80119dc: 2204 movs r2, #4 80119de: 745a strb r2, [r3, #17] return HAL_ERROR; 80119e0: 2301 movs r3, #1 80119e2: e061 b.n 8011aa8 } /* Set Initialization mode */ if (RTC_EnterInitMode(hrtc) != HAL_OK) 80119e4: 6878 ldr r0, [r7, #4] 80119e6: f000 f892 bl 8011b0e 80119ea: 4603 mov r3, r0 80119ec: 2b00 cmp r3, #0 80119ee: d004 beq.n 80119fa { /* Set RTC state */ hrtc->State = HAL_RTC_STATE_ERROR; 80119f0: 687b ldr r3, [r7, #4] 80119f2: 2204 movs r2, #4 80119f4: 745a strb r2, [r3, #17] return HAL_ERROR; 80119f6: 2301 movs r3, #1 80119f8: e056 b.n 8011aa8 } else { /* Clear Flags Bits */ CLEAR_BIT(hrtc->Instance->CRL, (RTC_FLAG_OW | RTC_FLAG_ALRAF | RTC_FLAG_SEC)); 80119fa: 687b ldr r3, [r7, #4] 80119fc: 681b ldr r3, [r3, #0] 80119fe: 685a ldr r2, [r3, #4] 8011a00: 687b ldr r3, [r7, #4] 8011a02: 681b ldr r3, [r3, #0] 8011a04: f022 0207 bic.w r2, r2, #7 8011a08: 605a str r2, [r3, #4] if (hrtc->Init.OutPut != RTC_OUTPUTSOURCE_NONE) 8011a0a: 687b ldr r3, [r7, #4] 8011a0c: 689b ldr r3, [r3, #8] 8011a0e: 2b00 cmp r3, #0 8011a10: d005 beq.n 8011a1e { /* Disable the selected Tamper pin */ CLEAR_BIT(BKP->CR, BKP_CR_TPE); 8011a12: 4b27 ldr r3, [pc, #156] @ (8011ab0 ) 8011a14: 6b1b ldr r3, [r3, #48] @ 0x30 8011a16: 4a26 ldr r2, [pc, #152] @ (8011ab0 ) 8011a18: f023 0301 bic.w r3, r3, #1 8011a1c: 6313 str r3, [r2, #48] @ 0x30 } /* Set the signal which will be routed to RTC Tamper pin*/ MODIFY_REG(BKP->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), hrtc->Init.OutPut); 8011a1e: 4b24 ldr r3, [pc, #144] @ (8011ab0 ) 8011a20: 6adb ldr r3, [r3, #44] @ 0x2c 8011a22: f423 7260 bic.w r2, r3, #896 @ 0x380 8011a26: 687b ldr r3, [r7, #4] 8011a28: 689b ldr r3, [r3, #8] 8011a2a: 4921 ldr r1, [pc, #132] @ (8011ab0 ) 8011a2c: 4313 orrs r3, r2 8011a2e: 62cb str r3, [r1, #44] @ 0x2c if (hrtc->Init.AsynchPrediv != RTC_AUTO_1_SECOND) 8011a30: 687b ldr r3, [r7, #4] 8011a32: 685b ldr r3, [r3, #4] 8011a34: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8011a38: d003 beq.n 8011a42 { /* RTC Prescaler provided directly by end-user*/ prescaler = hrtc->Init.AsynchPrediv; 8011a3a: 687b ldr r3, [r7, #4] 8011a3c: 685b ldr r3, [r3, #4] 8011a3e: 60fb str r3, [r7, #12] 8011a40: e00e b.n 8011a60 } else { /* RTC Prescaler will be automatically calculated to get 1 second timebase */ /* Get the RTCCLK frequency */ prescaler = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_RTC); 8011a42: 2001 movs r0, #1 8011a44: f7ff fe58 bl 80116f8 8011a48: 60f8 str r0, [r7, #12] /* Check that RTC clock is enabled*/ if (prescaler == 0U) 8011a4a: 68fb ldr r3, [r7, #12] 8011a4c: 2b00 cmp r3, #0 8011a4e: d104 bne.n 8011a5a { /* Should not happen. Frequency is not available*/ hrtc->State = HAL_RTC_STATE_ERROR; 8011a50: 687b ldr r3, [r7, #4] 8011a52: 2204 movs r2, #4 8011a54: 745a strb r2, [r3, #17] return HAL_ERROR; 8011a56: 2301 movs r3, #1 8011a58: e026 b.n 8011aa8 } else { /* RTC period = RTCCLK/(RTC_PR + 1) */ prescaler = prescaler - 1U; 8011a5a: 68fb ldr r3, [r7, #12] 8011a5c: 3b01 subs r3, #1 8011a5e: 60fb str r3, [r7, #12] } } /* Configure the RTC_PRLH / RTC_PRLL */ WRITE_REG(hrtc->Instance->PRLH, ((prescaler >> 16U) & RTC_PRLH_PRL)); 8011a60: 68fb ldr r3, [r7, #12] 8011a62: 0c1a lsrs r2, r3, #16 8011a64: 687b ldr r3, [r7, #4] 8011a66: 681b ldr r3, [r3, #0] 8011a68: f002 020f and.w r2, r2, #15 8011a6c: 609a str r2, [r3, #8] WRITE_REG(hrtc->Instance->PRLL, (prescaler & RTC_PRLL_PRL)); 8011a6e: 687b ldr r3, [r7, #4] 8011a70: 681b ldr r3, [r3, #0] 8011a72: 68fa ldr r2, [r7, #12] 8011a74: b292 uxth r2, r2 8011a76: 60da str r2, [r3, #12] /* Wait for synchro */ if (RTC_ExitInitMode(hrtc) != HAL_OK) 8011a78: 6878 ldr r0, [r7, #4] 8011a7a: f000 f870 bl 8011b5e 8011a7e: 4603 mov r3, r0 8011a80: 2b00 cmp r3, #0 8011a82: d004 beq.n 8011a8e { hrtc->State = HAL_RTC_STATE_ERROR; 8011a84: 687b ldr r3, [r7, #4] 8011a86: 2204 movs r2, #4 8011a88: 745a strb r2, [r3, #17] return HAL_ERROR; 8011a8a: 2301 movs r3, #1 8011a8c: e00c b.n 8011aa8 } /* Initialize date to 1st of January 2000 */ hrtc->DateToUpdate.Year = 0x00U; 8011a8e: 687b ldr r3, [r7, #4] 8011a90: 2200 movs r2, #0 8011a92: 73da strb r2, [r3, #15] hrtc->DateToUpdate.Month = RTC_MONTH_JANUARY; 8011a94: 687b ldr r3, [r7, #4] 8011a96: 2201 movs r2, #1 8011a98: 735a strb r2, [r3, #13] hrtc->DateToUpdate.Date = 0x01U; 8011a9a: 687b ldr r3, [r7, #4] 8011a9c: 2201 movs r2, #1 8011a9e: 739a strb r2, [r3, #14] /* Set RTC state */ hrtc->State = HAL_RTC_STATE_READY; 8011aa0: 687b ldr r3, [r7, #4] 8011aa2: 2201 movs r2, #1 8011aa4: 745a strb r2, [r3, #17] return HAL_OK; 8011aa6: 2300 movs r3, #0 } } 8011aa8: 4618 mov r0, r3 8011aaa: 3710 adds r7, #16 8011aac: 46bd mov sp, r7 8011aae: bd80 pop {r7, pc} 8011ab0: 40006c00 .word 0x40006c00 08011ab4 : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc) { 8011ab4: b580 push {r7, lr} 8011ab6: b084 sub sp, #16 8011ab8: af00 add r7, sp, #0 8011aba: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8011abc: 2300 movs r3, #0 8011abe: 60fb str r3, [r7, #12] /* Check input parameters */ if (hrtc == NULL) 8011ac0: 687b ldr r3, [r7, #4] 8011ac2: 2b00 cmp r3, #0 8011ac4: d101 bne.n 8011aca { return HAL_ERROR; 8011ac6: 2301 movs r3, #1 8011ac8: e01d b.n 8011b06 } /* Clear RSF flag */ CLEAR_BIT(hrtc->Instance->CRL, RTC_FLAG_RSF); 8011aca: 687b ldr r3, [r7, #4] 8011acc: 681b ldr r3, [r3, #0] 8011ace: 685a ldr r2, [r3, #4] 8011ad0: 687b ldr r3, [r7, #4] 8011ad2: 681b ldr r3, [r3, #0] 8011ad4: f022 0208 bic.w r2, r2, #8 8011ad8: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8011ada: f7fc fed3 bl 800e884 8011ade: 60f8 str r0, [r7, #12] /* Wait the registers to be synchronised */ while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 8011ae0: e009 b.n 8011af6 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8011ae2: f7fc fecf bl 800e884 8011ae6: 4602 mov r2, r0 8011ae8: 68fb ldr r3, [r7, #12] 8011aea: 1ad3 subs r3, r2, r3 8011aec: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8011af0: d901 bls.n 8011af6 { return HAL_TIMEOUT; 8011af2: 2303 movs r3, #3 8011af4: e007 b.n 8011b06 while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET) 8011af6: 687b ldr r3, [r7, #4] 8011af8: 681b ldr r3, [r3, #0] 8011afa: 685b ldr r3, [r3, #4] 8011afc: f003 0308 and.w r3, r3, #8 8011b00: 2b00 cmp r3, #0 8011b02: d0ee beq.n 8011ae2 } } return HAL_OK; 8011b04: 2300 movs r3, #0 } 8011b06: 4618 mov r0, r3 8011b08: 3710 adds r7, #16 8011b0a: 46bd mov sp, r7 8011b0c: bd80 pop {r7, pc} 08011b0e : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc) { 8011b0e: b580 push {r7, lr} 8011b10: b084 sub sp, #16 8011b12: af00 add r7, sp, #0 8011b14: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8011b16: 2300 movs r3, #0 8011b18: 60fb str r3, [r7, #12] tickstart = HAL_GetTick(); 8011b1a: f7fc feb3 bl 800e884 8011b1e: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011b20: e009 b.n 8011b36 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8011b22: f7fc feaf bl 800e884 8011b26: 4602 mov r2, r0 8011b28: 68fb ldr r3, [r7, #12] 8011b2a: 1ad3 subs r3, r2, r3 8011b2c: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8011b30: d901 bls.n 8011b36 { return HAL_TIMEOUT; 8011b32: 2303 movs r3, #3 8011b34: e00f b.n 8011b56 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011b36: 687b ldr r3, [r7, #4] 8011b38: 681b ldr r3, [r3, #0] 8011b3a: 685b ldr r3, [r3, #4] 8011b3c: f003 0320 and.w r3, r3, #32 8011b40: 2b00 cmp r3, #0 8011b42: d0ee beq.n 8011b22 } } /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); 8011b44: 687b ldr r3, [r7, #4] 8011b46: 681b ldr r3, [r3, #0] 8011b48: 685a ldr r2, [r3, #4] 8011b4a: 687b ldr r3, [r7, #4] 8011b4c: 681b ldr r3, [r3, #0] 8011b4e: f042 0210 orr.w r2, r2, #16 8011b52: 605a str r2, [r3, #4] return HAL_OK; 8011b54: 2300 movs r3, #0 } 8011b56: 4618 mov r0, r3 8011b58: 3710 adds r7, #16 8011b5a: 46bd mov sp, r7 8011b5c: bd80 pop {r7, pc} 08011b5e : * @param hrtc pointer to a RTC_HandleTypeDef structure that contains * the configuration information for RTC. * @retval HAL status */ static HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc) { 8011b5e: b580 push {r7, lr} 8011b60: b084 sub sp, #16 8011b62: af00 add r7, sp, #0 8011b64: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8011b66: 2300 movs r3, #0 8011b68: 60fb str r3, [r7, #12] /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 8011b6a: 687b ldr r3, [r7, #4] 8011b6c: 681b ldr r3, [r3, #0] 8011b6e: 685a ldr r2, [r3, #4] 8011b70: 687b ldr r3, [r7, #4] 8011b72: 681b ldr r3, [r3, #0] 8011b74: f022 0210 bic.w r2, r2, #16 8011b78: 605a str r2, [r3, #4] tickstart = HAL_GetTick(); 8011b7a: f7fc fe83 bl 800e884 8011b7e: 60f8 str r0, [r7, #12] /* Wait till RTC is in INIT state and if Time out is reached exit */ while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011b80: e009 b.n 8011b96 { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) 8011b82: f7fc fe7f bl 800e884 8011b86: 4602 mov r2, r0 8011b88: 68fb ldr r3, [r7, #12] 8011b8a: 1ad3 subs r3, r2, r3 8011b8c: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8011b90: d901 bls.n 8011b96 { return HAL_TIMEOUT; 8011b92: 2303 movs r3, #3 8011b94: e007 b.n 8011ba6 while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET) 8011b96: 687b ldr r3, [r7, #4] 8011b98: 681b ldr r3, [r3, #0] 8011b9a: 685b ldr r3, [r3, #4] 8011b9c: f003 0320 and.w r3, r3, #32 8011ba0: 2b00 cmp r3, #0 8011ba2: d0ee beq.n 8011b82 } } return HAL_OK; 8011ba4: 2300 movs r3, #0 } 8011ba6: 4618 mov r0, r3 8011ba8: 3710 adds r7, #16 8011baa: 46bd mov sp, r7 8011bac: bd80 pop {r7, pc} 08011bae : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8011bae: b580 push {r7, lr} 8011bb0: b082 sub sp, #8 8011bb2: af00 add r7, sp, #0 8011bb4: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8011bb6: 687b ldr r3, [r7, #4] 8011bb8: 2b00 cmp r3, #0 8011bba: d101 bne.n 8011bc0 { return HAL_ERROR; 8011bbc: 2301 movs r3, #1 8011bbe: e041 b.n 8011c44 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8011bc0: 687b ldr r3, [r7, #4] 8011bc2: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8011bc6: b2db uxtb r3, r3 8011bc8: 2b00 cmp r3, #0 8011bca: d106 bne.n 8011bda { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8011bcc: 687b ldr r3, [r7, #4] 8011bce: 2200 movs r2, #0 8011bd0: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8011bd4: 6878 ldr r0, [r7, #4] 8011bd6: f7fc fb7f bl 800e2d8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8011bda: 687b ldr r3, [r7, #4] 8011bdc: 2202 movs r2, #2 8011bde: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8011be2: 687b ldr r3, [r7, #4] 8011be4: 681a ldr r2, [r3, #0] 8011be6: 687b ldr r3, [r7, #4] 8011be8: 3304 adds r3, #4 8011bea: 4619 mov r1, r3 8011bec: 4610 mov r0, r2 8011bee: f000 fab9 bl 8012164 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8011bf2: 687b ldr r3, [r7, #4] 8011bf4: 2201 movs r2, #1 8011bf6: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011bfa: 687b ldr r3, [r7, #4] 8011bfc: 2201 movs r2, #1 8011bfe: f883 203e strb.w r2, [r3, #62] @ 0x3e 8011c02: 687b ldr r3, [r7, #4] 8011c04: 2201 movs r2, #1 8011c06: f883 203f strb.w r2, [r3, #63] @ 0x3f 8011c0a: 687b ldr r3, [r7, #4] 8011c0c: 2201 movs r2, #1 8011c0e: f883 2040 strb.w r2, [r3, #64] @ 0x40 8011c12: 687b ldr r3, [r7, #4] 8011c14: 2201 movs r2, #1 8011c16: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011c1a: 687b ldr r3, [r7, #4] 8011c1c: 2201 movs r2, #1 8011c1e: f883 2042 strb.w r2, [r3, #66] @ 0x42 8011c22: 687b ldr r3, [r7, #4] 8011c24: 2201 movs r2, #1 8011c26: f883 2043 strb.w r2, [r3, #67] @ 0x43 8011c2a: 687b ldr r3, [r7, #4] 8011c2c: 2201 movs r2, #1 8011c2e: f883 2044 strb.w r2, [r3, #68] @ 0x44 8011c32: 687b ldr r3, [r7, #4] 8011c34: 2201 movs r2, #1 8011c36: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8011c3a: 687b ldr r3, [r7, #4] 8011c3c: 2201 movs r2, #1 8011c3e: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8011c42: 2300 movs r3, #0 } 8011c44: 4618 mov r0, r3 8011c46: 3708 adds r7, #8 8011c48: 46bd mov sp, r7 8011c4a: bd80 pop {r7, pc} 08011c4c : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 8011c4c: b580 push {r7, lr} 8011c4e: b082 sub sp, #8 8011c50: af00 add r7, sp, #0 8011c52: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8011c54: 687b ldr r3, [r7, #4] 8011c56: 2b00 cmp r3, #0 8011c58: d101 bne.n 8011c5e { return HAL_ERROR; 8011c5a: 2301 movs r3, #1 8011c5c: e041 b.n 8011ce2 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8011c5e: 687b ldr r3, [r7, #4] 8011c60: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8011c64: b2db uxtb r3, r3 8011c66: 2b00 cmp r3, #0 8011c68: d106 bne.n 8011c78 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8011c6a: 687b ldr r3, [r7, #4] 8011c6c: 2200 movs r2, #0 8011c6e: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8011c72: 6878 ldr r0, [r7, #4] 8011c74: f000 f839 bl 8011cea #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8011c78: 687b ldr r3, [r7, #4] 8011c7a: 2202 movs r2, #2 8011c7c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8011c80: 687b ldr r3, [r7, #4] 8011c82: 681a ldr r2, [r3, #0] 8011c84: 687b ldr r3, [r7, #4] 8011c86: 3304 adds r3, #4 8011c88: 4619 mov r1, r3 8011c8a: 4610 mov r0, r2 8011c8c: f000 fa6a bl 8012164 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8011c90: 687b ldr r3, [r7, #4] 8011c92: 2201 movs r2, #1 8011c94: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011c98: 687b ldr r3, [r7, #4] 8011c9a: 2201 movs r2, #1 8011c9c: f883 203e strb.w r2, [r3, #62] @ 0x3e 8011ca0: 687b ldr r3, [r7, #4] 8011ca2: 2201 movs r2, #1 8011ca4: f883 203f strb.w r2, [r3, #63] @ 0x3f 8011ca8: 687b ldr r3, [r7, #4] 8011caa: 2201 movs r2, #1 8011cac: f883 2040 strb.w r2, [r3, #64] @ 0x40 8011cb0: 687b ldr r3, [r7, #4] 8011cb2: 2201 movs r2, #1 8011cb4: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8011cb8: 687b ldr r3, [r7, #4] 8011cba: 2201 movs r2, #1 8011cbc: f883 2042 strb.w r2, [r3, #66] @ 0x42 8011cc0: 687b ldr r3, [r7, #4] 8011cc2: 2201 movs r2, #1 8011cc4: f883 2043 strb.w r2, [r3, #67] @ 0x43 8011cc8: 687b ldr r3, [r7, #4] 8011cca: 2201 movs r2, #1 8011ccc: f883 2044 strb.w r2, [r3, #68] @ 0x44 8011cd0: 687b ldr r3, [r7, #4] 8011cd2: 2201 movs r2, #1 8011cd4: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8011cd8: 687b ldr r3, [r7, #4] 8011cda: 2201 movs r2, #1 8011cdc: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8011ce0: 2300 movs r3, #0 } 8011ce2: 4618 mov r0, r3 8011ce4: 3708 adds r7, #8 8011ce6: 46bd mov sp, r7 8011ce8: bd80 pop {r7, pc} 08011cea : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 8011cea: b480 push {r7} 8011cec: b083 sub sp, #12 8011cee: af00 add r7, sp, #0 8011cf0: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 8011cf2: bf00 nop 8011cf4: 370c adds r7, #12 8011cf6: 46bd mov sp, r7 8011cf8: bc80 pop {r7} 8011cfa: 4770 bx lr 08011cfc : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8011cfc: b580 push {r7, lr} 8011cfe: b084 sub sp, #16 8011d00: af00 add r7, sp, #0 8011d02: 6078 str r0, [r7, #4] 8011d04: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 8011d06: 683b ldr r3, [r7, #0] 8011d08: 2b00 cmp r3, #0 8011d0a: d109 bne.n 8011d20 8011d0c: 687b ldr r3, [r7, #4] 8011d0e: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8011d12: b2db uxtb r3, r3 8011d14: 2b01 cmp r3, #1 8011d16: bf14 ite ne 8011d18: 2301 movne r3, #1 8011d1a: 2300 moveq r3, #0 8011d1c: b2db uxtb r3, r3 8011d1e: e022 b.n 8011d66 8011d20: 683b ldr r3, [r7, #0] 8011d22: 2b04 cmp r3, #4 8011d24: d109 bne.n 8011d3a 8011d26: 687b ldr r3, [r7, #4] 8011d28: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8011d2c: b2db uxtb r3, r3 8011d2e: 2b01 cmp r3, #1 8011d30: bf14 ite ne 8011d32: 2301 movne r3, #1 8011d34: 2300 moveq r3, #0 8011d36: b2db uxtb r3, r3 8011d38: e015 b.n 8011d66 8011d3a: 683b ldr r3, [r7, #0] 8011d3c: 2b08 cmp r3, #8 8011d3e: d109 bne.n 8011d54 8011d40: 687b ldr r3, [r7, #4] 8011d42: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8011d46: b2db uxtb r3, r3 8011d48: 2b01 cmp r3, #1 8011d4a: bf14 ite ne 8011d4c: 2301 movne r3, #1 8011d4e: 2300 moveq r3, #0 8011d50: b2db uxtb r3, r3 8011d52: e008 b.n 8011d66 8011d54: 687b ldr r3, [r7, #4] 8011d56: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8011d5a: b2db uxtb r3, r3 8011d5c: 2b01 cmp r3, #1 8011d5e: bf14 ite ne 8011d60: 2301 movne r3, #1 8011d62: 2300 moveq r3, #0 8011d64: b2db uxtb r3, r3 8011d66: 2b00 cmp r3, #0 8011d68: d001 beq.n 8011d6e { return HAL_ERROR; 8011d6a: 2301 movs r3, #1 8011d6c: e063 b.n 8011e36 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8011d6e: 683b ldr r3, [r7, #0] 8011d70: 2b00 cmp r3, #0 8011d72: d104 bne.n 8011d7e 8011d74: 687b ldr r3, [r7, #4] 8011d76: 2202 movs r2, #2 8011d78: f883 203e strb.w r2, [r3, #62] @ 0x3e 8011d7c: e013 b.n 8011da6 8011d7e: 683b ldr r3, [r7, #0] 8011d80: 2b04 cmp r3, #4 8011d82: d104 bne.n 8011d8e 8011d84: 687b ldr r3, [r7, #4] 8011d86: 2202 movs r2, #2 8011d88: f883 203f strb.w r2, [r3, #63] @ 0x3f 8011d8c: e00b b.n 8011da6 8011d8e: 683b ldr r3, [r7, #0] 8011d90: 2b08 cmp r3, #8 8011d92: d104 bne.n 8011d9e 8011d94: 687b ldr r3, [r7, #4] 8011d96: 2202 movs r2, #2 8011d98: f883 2040 strb.w r2, [r3, #64] @ 0x40 8011d9c: e003 b.n 8011da6 8011d9e: 687b ldr r3, [r7, #4] 8011da0: 2202 movs r2, #2 8011da2: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8011da6: 687b ldr r3, [r7, #4] 8011da8: 681b ldr r3, [r3, #0] 8011daa: 2201 movs r2, #1 8011dac: 6839 ldr r1, [r7, #0] 8011dae: 4618 mov r0, r3 8011db0: f000 fc6e bl 8012690 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8011db4: 687b ldr r3, [r7, #4] 8011db6: 681b ldr r3, [r3, #0] 8011db8: 4a21 ldr r2, [pc, #132] @ (8011e40 ) 8011dba: 4293 cmp r3, r2 8011dbc: d107 bne.n 8011dce { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 8011dbe: 687b ldr r3, [r7, #4] 8011dc0: 681b ldr r3, [r3, #0] 8011dc2: 6c5a ldr r2, [r3, #68] @ 0x44 8011dc4: 687b ldr r3, [r7, #4] 8011dc6: 681b ldr r3, [r3, #0] 8011dc8: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8011dcc: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8011dce: 687b ldr r3, [r7, #4] 8011dd0: 681b ldr r3, [r3, #0] 8011dd2: 4a1b ldr r2, [pc, #108] @ (8011e40 ) 8011dd4: 4293 cmp r3, r2 8011dd6: d013 beq.n 8011e00 8011dd8: 687b ldr r3, [r7, #4] 8011dda: 681b ldr r3, [r3, #0] 8011ddc: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8011de0: d00e beq.n 8011e00 8011de2: 687b ldr r3, [r7, #4] 8011de4: 681b ldr r3, [r3, #0] 8011de6: 4a17 ldr r2, [pc, #92] @ (8011e44 ) 8011de8: 4293 cmp r3, r2 8011dea: d009 beq.n 8011e00 8011dec: 687b ldr r3, [r7, #4] 8011dee: 681b ldr r3, [r3, #0] 8011df0: 4a15 ldr r2, [pc, #84] @ (8011e48 ) 8011df2: 4293 cmp r3, r2 8011df4: d004 beq.n 8011e00 8011df6: 687b ldr r3, [r7, #4] 8011df8: 681b ldr r3, [r3, #0] 8011dfa: 4a14 ldr r2, [pc, #80] @ (8011e4c ) 8011dfc: 4293 cmp r3, r2 8011dfe: d111 bne.n 8011e24 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8011e00: 687b ldr r3, [r7, #4] 8011e02: 681b ldr r3, [r3, #0] 8011e04: 689b ldr r3, [r3, #8] 8011e06: f003 0307 and.w r3, r3, #7 8011e0a: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8011e0c: 68fb ldr r3, [r7, #12] 8011e0e: 2b06 cmp r3, #6 8011e10: d010 beq.n 8011e34 { __HAL_TIM_ENABLE(htim); 8011e12: 687b ldr r3, [r7, #4] 8011e14: 681b ldr r3, [r3, #0] 8011e16: 681a ldr r2, [r3, #0] 8011e18: 687b ldr r3, [r7, #4] 8011e1a: 681b ldr r3, [r3, #0] 8011e1c: f042 0201 orr.w r2, r2, #1 8011e20: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8011e22: e007 b.n 8011e34 } } else { __HAL_TIM_ENABLE(htim); 8011e24: 687b ldr r3, [r7, #4] 8011e26: 681b ldr r3, [r3, #0] 8011e28: 681a ldr r2, [r3, #0] 8011e2a: 687b ldr r3, [r7, #4] 8011e2c: 681b ldr r3, [r3, #0] 8011e2e: f042 0201 orr.w r2, r2, #1 8011e32: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 8011e34: 2300 movs r3, #0 } 8011e36: 4618 mov r0, r3 8011e38: 3710 adds r7, #16 8011e3a: 46bd mov sp, r7 8011e3c: bd80 pop {r7, pc} 8011e3e: bf00 nop 8011e40: 40012c00 .word 0x40012c00 8011e44: 40000400 .word 0x40000400 8011e48: 40000800 .word 0x40000800 8011e4c: 40000c00 .word 0x40000c00 08011e50 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8011e50: b580 push {r7, lr} 8011e52: b086 sub sp, #24 8011e54: af00 add r7, sp, #0 8011e56: 60f8 str r0, [r7, #12] 8011e58: 60b9 str r1, [r7, #8] 8011e5a: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8011e5c: 2300 movs r3, #0 8011e5e: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 8011e60: 68fb ldr r3, [r7, #12] 8011e62: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8011e66: 2b01 cmp r3, #1 8011e68: d101 bne.n 8011e6e 8011e6a: 2302 movs r3, #2 8011e6c: e0ae b.n 8011fcc 8011e6e: 68fb ldr r3, [r7, #12] 8011e70: 2201 movs r2, #1 8011e72: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 8011e76: 687b ldr r3, [r7, #4] 8011e78: 2b0c cmp r3, #12 8011e7a: f200 809f bhi.w 8011fbc 8011e7e: a201 add r2, pc, #4 @ (adr r2, 8011e84 ) 8011e80: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8011e84: 08011eb9 .word 0x08011eb9 8011e88: 08011fbd .word 0x08011fbd 8011e8c: 08011fbd .word 0x08011fbd 8011e90: 08011fbd .word 0x08011fbd 8011e94: 08011ef9 .word 0x08011ef9 8011e98: 08011fbd .word 0x08011fbd 8011e9c: 08011fbd .word 0x08011fbd 8011ea0: 08011fbd .word 0x08011fbd 8011ea4: 08011f3b .word 0x08011f3b 8011ea8: 08011fbd .word 0x08011fbd 8011eac: 08011fbd .word 0x08011fbd 8011eb0: 08011fbd .word 0x08011fbd 8011eb4: 08011f7b .word 0x08011f7b { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8011eb8: 68fb ldr r3, [r7, #12] 8011eba: 681b ldr r3, [r3, #0] 8011ebc: 68b9 ldr r1, [r7, #8] 8011ebe: 4618 mov r0, r3 8011ec0: f000 f9c8 bl 8012254 /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 8011ec4: 68fb ldr r3, [r7, #12] 8011ec6: 681b ldr r3, [r3, #0] 8011ec8: 699a ldr r2, [r3, #24] 8011eca: 68fb ldr r3, [r7, #12] 8011ecc: 681b ldr r3, [r3, #0] 8011ece: f042 0208 orr.w r2, r2, #8 8011ed2: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 8011ed4: 68fb ldr r3, [r7, #12] 8011ed6: 681b ldr r3, [r3, #0] 8011ed8: 699a ldr r2, [r3, #24] 8011eda: 68fb ldr r3, [r7, #12] 8011edc: 681b ldr r3, [r3, #0] 8011ede: f022 0204 bic.w r2, r2, #4 8011ee2: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 8011ee4: 68fb ldr r3, [r7, #12] 8011ee6: 681b ldr r3, [r3, #0] 8011ee8: 6999 ldr r1, [r3, #24] 8011eea: 68bb ldr r3, [r7, #8] 8011eec: 691a ldr r2, [r3, #16] 8011eee: 68fb ldr r3, [r7, #12] 8011ef0: 681b ldr r3, [r3, #0] 8011ef2: 430a orrs r2, r1 8011ef4: 619a str r2, [r3, #24] break; 8011ef6: e064 b.n 8011fc2 { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 8011ef8: 68fb ldr r3, [r7, #12] 8011efa: 681b ldr r3, [r3, #0] 8011efc: 68b9 ldr r1, [r7, #8] 8011efe: 4618 mov r0, r3 8011f00: f000 fa0e bl 8012320 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 8011f04: 68fb ldr r3, [r7, #12] 8011f06: 681b ldr r3, [r3, #0] 8011f08: 699a ldr r2, [r3, #24] 8011f0a: 68fb ldr r3, [r7, #12] 8011f0c: 681b ldr r3, [r3, #0] 8011f0e: f442 6200 orr.w r2, r2, #2048 @ 0x800 8011f12: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 8011f14: 68fb ldr r3, [r7, #12] 8011f16: 681b ldr r3, [r3, #0] 8011f18: 699a ldr r2, [r3, #24] 8011f1a: 68fb ldr r3, [r7, #12] 8011f1c: 681b ldr r3, [r3, #0] 8011f1e: f422 6280 bic.w r2, r2, #1024 @ 0x400 8011f22: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 8011f24: 68fb ldr r3, [r7, #12] 8011f26: 681b ldr r3, [r3, #0] 8011f28: 6999 ldr r1, [r3, #24] 8011f2a: 68bb ldr r3, [r7, #8] 8011f2c: 691b ldr r3, [r3, #16] 8011f2e: 021a lsls r2, r3, #8 8011f30: 68fb ldr r3, [r7, #12] 8011f32: 681b ldr r3, [r3, #0] 8011f34: 430a orrs r2, r1 8011f36: 619a str r2, [r3, #24] break; 8011f38: e043 b.n 8011fc2 { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 8011f3a: 68fb ldr r3, [r7, #12] 8011f3c: 681b ldr r3, [r3, #0] 8011f3e: 68b9 ldr r1, [r7, #8] 8011f40: 4618 mov r0, r3 8011f42: f000 fa57 bl 80123f4 /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 8011f46: 68fb ldr r3, [r7, #12] 8011f48: 681b ldr r3, [r3, #0] 8011f4a: 69da ldr r2, [r3, #28] 8011f4c: 68fb ldr r3, [r7, #12] 8011f4e: 681b ldr r3, [r3, #0] 8011f50: f042 0208 orr.w r2, r2, #8 8011f54: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 8011f56: 68fb ldr r3, [r7, #12] 8011f58: 681b ldr r3, [r3, #0] 8011f5a: 69da ldr r2, [r3, #28] 8011f5c: 68fb ldr r3, [r7, #12] 8011f5e: 681b ldr r3, [r3, #0] 8011f60: f022 0204 bic.w r2, r2, #4 8011f64: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 8011f66: 68fb ldr r3, [r7, #12] 8011f68: 681b ldr r3, [r3, #0] 8011f6a: 69d9 ldr r1, [r3, #28] 8011f6c: 68bb ldr r3, [r7, #8] 8011f6e: 691a ldr r2, [r3, #16] 8011f70: 68fb ldr r3, [r7, #12] 8011f72: 681b ldr r3, [r3, #0] 8011f74: 430a orrs r2, r1 8011f76: 61da str r2, [r3, #28] break; 8011f78: e023 b.n 8011fc2 { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 8011f7a: 68fb ldr r3, [r7, #12] 8011f7c: 681b ldr r3, [r3, #0] 8011f7e: 68b9 ldr r1, [r7, #8] 8011f80: 4618 mov r0, r3 8011f82: f000 faa1 bl 80124c8 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 8011f86: 68fb ldr r3, [r7, #12] 8011f88: 681b ldr r3, [r3, #0] 8011f8a: 69da ldr r2, [r3, #28] 8011f8c: 68fb ldr r3, [r7, #12] 8011f8e: 681b ldr r3, [r3, #0] 8011f90: f442 6200 orr.w r2, r2, #2048 @ 0x800 8011f94: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 8011f96: 68fb ldr r3, [r7, #12] 8011f98: 681b ldr r3, [r3, #0] 8011f9a: 69da ldr r2, [r3, #28] 8011f9c: 68fb ldr r3, [r7, #12] 8011f9e: 681b ldr r3, [r3, #0] 8011fa0: f422 6280 bic.w r2, r2, #1024 @ 0x400 8011fa4: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 8011fa6: 68fb ldr r3, [r7, #12] 8011fa8: 681b ldr r3, [r3, #0] 8011faa: 69d9 ldr r1, [r3, #28] 8011fac: 68bb ldr r3, [r7, #8] 8011fae: 691b ldr r3, [r3, #16] 8011fb0: 021a lsls r2, r3, #8 8011fb2: 68fb ldr r3, [r7, #12] 8011fb4: 681b ldr r3, [r3, #0] 8011fb6: 430a orrs r2, r1 8011fb8: 61da str r2, [r3, #28] break; 8011fba: e002 b.n 8011fc2 } default: status = HAL_ERROR; 8011fbc: 2301 movs r3, #1 8011fbe: 75fb strb r3, [r7, #23] break; 8011fc0: bf00 nop } __HAL_UNLOCK(htim); 8011fc2: 68fb ldr r3, [r7, #12] 8011fc4: 2200 movs r2, #0 8011fc6: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8011fca: 7dfb ldrb r3, [r7, #23] } 8011fcc: 4618 mov r0, r3 8011fce: 3718 adds r7, #24 8011fd0: 46bd mov sp, r7 8011fd2: bd80 pop {r7, pc} 08011fd4 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { 8011fd4: b580 push {r7, lr} 8011fd6: b084 sub sp, #16 8011fd8: af00 add r7, sp, #0 8011fda: 6078 str r0, [r7, #4] 8011fdc: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8011fde: 2300 movs r3, #0 8011fe0: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 8011fe2: 687b ldr r3, [r7, #4] 8011fe4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8011fe8: 2b01 cmp r3, #1 8011fea: d101 bne.n 8011ff0 8011fec: 2302 movs r3, #2 8011fee: e0b4 b.n 801215a 8011ff0: 687b ldr r3, [r7, #4] 8011ff2: 2201 movs r2, #1 8011ff4: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 8011ff8: 687b ldr r3, [r7, #4] 8011ffa: 2202 movs r2, #2 8011ffc: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 8012000: 687b ldr r3, [r7, #4] 8012002: 681b ldr r3, [r3, #0] 8012004: 689b ldr r3, [r3, #8] 8012006: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 8012008: 68bb ldr r3, [r7, #8] 801200a: f023 0377 bic.w r3, r3, #119 @ 0x77 801200e: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8012010: 68bb ldr r3, [r7, #8] 8012012: f423 437f bic.w r3, r3, #65280 @ 0xff00 8012016: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 8012018: 687b ldr r3, [r7, #4] 801201a: 681b ldr r3, [r3, #0] 801201c: 68ba ldr r2, [r7, #8] 801201e: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 8012020: 683b ldr r3, [r7, #0] 8012022: 681b ldr r3, [r3, #0] 8012024: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8012028: d03e beq.n 80120a8 801202a: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 801202e: f200 8087 bhi.w 8012140 8012032: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8012036: f000 8086 beq.w 8012146 801203a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 801203e: d87f bhi.n 8012140 8012040: 2b70 cmp r3, #112 @ 0x70 8012042: d01a beq.n 801207a 8012044: 2b70 cmp r3, #112 @ 0x70 8012046: d87b bhi.n 8012140 8012048: 2b60 cmp r3, #96 @ 0x60 801204a: d050 beq.n 80120ee 801204c: 2b60 cmp r3, #96 @ 0x60 801204e: d877 bhi.n 8012140 8012050: 2b50 cmp r3, #80 @ 0x50 8012052: d03c beq.n 80120ce 8012054: 2b50 cmp r3, #80 @ 0x50 8012056: d873 bhi.n 8012140 8012058: 2b40 cmp r3, #64 @ 0x40 801205a: d058 beq.n 801210e 801205c: 2b40 cmp r3, #64 @ 0x40 801205e: d86f bhi.n 8012140 8012060: 2b30 cmp r3, #48 @ 0x30 8012062: d064 beq.n 801212e 8012064: 2b30 cmp r3, #48 @ 0x30 8012066: d86b bhi.n 8012140 8012068: 2b20 cmp r3, #32 801206a: d060 beq.n 801212e 801206c: 2b20 cmp r3, #32 801206e: d867 bhi.n 8012140 8012070: 2b00 cmp r3, #0 8012072: d05c beq.n 801212e 8012074: 2b10 cmp r3, #16 8012076: d05a beq.n 801212e 8012078: e062 b.n 8012140 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 801207a: 687b ldr r3, [r7, #4] 801207c: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 801207e: 683b ldr r3, [r7, #0] 8012080: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8012082: 683b ldr r3, [r7, #0] 8012084: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8012086: 683b ldr r3, [r7, #0] 8012088: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 801208a: f000 fae2 bl 8012652 /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 801208e: 687b ldr r3, [r7, #4] 8012090: 681b ldr r3, [r3, #0] 8012092: 689b ldr r3, [r3, #8] 8012094: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 8012096: 68bb ldr r3, [r7, #8] 8012098: f043 0377 orr.w r3, r3, #119 @ 0x77 801209c: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 801209e: 687b ldr r3, [r7, #4] 80120a0: 681b ldr r3, [r3, #0] 80120a2: 68ba ldr r2, [r7, #8] 80120a4: 609a str r2, [r3, #8] break; 80120a6: e04f b.n 8012148 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 80120a8: 687b ldr r3, [r7, #4] 80120aa: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 80120ac: 683b ldr r3, [r7, #0] 80120ae: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 80120b0: 683b ldr r3, [r7, #0] 80120b2: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 80120b4: 683b ldr r3, [r7, #0] 80120b6: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 80120b8: f000 facb bl 8012652 /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 80120bc: 687b ldr r3, [r7, #4] 80120be: 681b ldr r3, [r3, #0] 80120c0: 689a ldr r2, [r3, #8] 80120c2: 687b ldr r3, [r7, #4] 80120c4: 681b ldr r3, [r3, #0] 80120c6: f442 4280 orr.w r2, r2, #16384 @ 0x4000 80120ca: 609a str r2, [r3, #8] break; 80120cc: e03c b.n 8012148 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 80120ce: 687b ldr r3, [r7, #4] 80120d0: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 80120d2: 683b ldr r3, [r7, #0] 80120d4: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 80120d6: 683b ldr r3, [r7, #0] 80120d8: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 80120da: 461a mov r2, r3 80120dc: f000 fa42 bl 8012564 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 80120e0: 687b ldr r3, [r7, #4] 80120e2: 681b ldr r3, [r3, #0] 80120e4: 2150 movs r1, #80 @ 0x50 80120e6: 4618 mov r0, r3 80120e8: f000 fa99 bl 801261e break; 80120ec: e02c b.n 8012148 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 80120ee: 687b ldr r3, [r7, #4] 80120f0: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 80120f2: 683b ldr r3, [r7, #0] 80120f4: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 80120f6: 683b ldr r3, [r7, #0] 80120f8: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, 80120fa: 461a mov r2, r3 80120fc: f000 fa60 bl 80125c0 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 8012100: 687b ldr r3, [r7, #4] 8012102: 681b ldr r3, [r3, #0] 8012104: 2160 movs r1, #96 @ 0x60 8012106: 4618 mov r0, r3 8012108: f000 fa89 bl 801261e break; 801210c: e01c b.n 8012148 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 801210e: 687b ldr r3, [r7, #4] 8012110: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8012112: 683b ldr r3, [r7, #0] 8012114: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8012116: 683b ldr r3, [r7, #0] 8012118: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 801211a: 461a mov r2, r3 801211c: f000 fa22 bl 8012564 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 8012120: 687b ldr r3, [r7, #4] 8012122: 681b ldr r3, [r3, #0] 8012124: 2140 movs r1, #64 @ 0x40 8012126: 4618 mov r0, r3 8012128: f000 fa79 bl 801261e break; 801212c: e00c b.n 8012148 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 801212e: 687b ldr r3, [r7, #4] 8012130: 681a ldr r2, [r3, #0] 8012132: 683b ldr r3, [r7, #0] 8012134: 681b ldr r3, [r3, #0] 8012136: 4619 mov r1, r3 8012138: 4610 mov r0, r2 801213a: f000 fa70 bl 801261e break; 801213e: e003 b.n 8012148 } default: status = HAL_ERROR; 8012140: 2301 movs r3, #1 8012142: 73fb strb r3, [r7, #15] break; 8012144: e000 b.n 8012148 break; 8012146: bf00 nop } htim->State = HAL_TIM_STATE_READY; 8012148: 687b ldr r3, [r7, #4] 801214a: 2201 movs r2, #1 801214c: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8012150: 687b ldr r3, [r7, #4] 8012152: 2200 movs r2, #0 8012154: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8012158: 7bfb ldrb r3, [r7, #15] } 801215a: 4618 mov r0, r3 801215c: 3710 adds r7, #16 801215e: 46bd mov sp, r7 8012160: bd80 pop {r7, pc} ... 08012164 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 8012164: b480 push {r7} 8012166: b085 sub sp, #20 8012168: af00 add r7, sp, #0 801216a: 6078 str r0, [r7, #4] 801216c: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 801216e: 687b ldr r3, [r7, #4] 8012170: 681b ldr r3, [r3, #0] 8012172: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8012174: 687b ldr r3, [r7, #4] 8012176: 4a33 ldr r2, [pc, #204] @ (8012244 ) 8012178: 4293 cmp r3, r2 801217a: d00f beq.n 801219c 801217c: 687b ldr r3, [r7, #4] 801217e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8012182: d00b beq.n 801219c 8012184: 687b ldr r3, [r7, #4] 8012186: 4a30 ldr r2, [pc, #192] @ (8012248 ) 8012188: 4293 cmp r3, r2 801218a: d007 beq.n 801219c 801218c: 687b ldr r3, [r7, #4] 801218e: 4a2f ldr r2, [pc, #188] @ (801224c ) 8012190: 4293 cmp r3, r2 8012192: d003 beq.n 801219c 8012194: 687b ldr r3, [r7, #4] 8012196: 4a2e ldr r2, [pc, #184] @ (8012250 ) 8012198: 4293 cmp r3, r2 801219a: d108 bne.n 80121ae { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 801219c: 68fb ldr r3, [r7, #12] 801219e: f023 0370 bic.w r3, r3, #112 @ 0x70 80121a2: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 80121a4: 683b ldr r3, [r7, #0] 80121a6: 685b ldr r3, [r3, #4] 80121a8: 68fa ldr r2, [r7, #12] 80121aa: 4313 orrs r3, r2 80121ac: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 80121ae: 687b ldr r3, [r7, #4] 80121b0: 4a24 ldr r2, [pc, #144] @ (8012244 ) 80121b2: 4293 cmp r3, r2 80121b4: d00f beq.n 80121d6 80121b6: 687b ldr r3, [r7, #4] 80121b8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80121bc: d00b beq.n 80121d6 80121be: 687b ldr r3, [r7, #4] 80121c0: 4a21 ldr r2, [pc, #132] @ (8012248 ) 80121c2: 4293 cmp r3, r2 80121c4: d007 beq.n 80121d6 80121c6: 687b ldr r3, [r7, #4] 80121c8: 4a20 ldr r2, [pc, #128] @ (801224c ) 80121ca: 4293 cmp r3, r2 80121cc: d003 beq.n 80121d6 80121ce: 687b ldr r3, [r7, #4] 80121d0: 4a1f ldr r2, [pc, #124] @ (8012250 ) 80121d2: 4293 cmp r3, r2 80121d4: d108 bne.n 80121e8 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 80121d6: 68fb ldr r3, [r7, #12] 80121d8: f423 7340 bic.w r3, r3, #768 @ 0x300 80121dc: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 80121de: 683b ldr r3, [r7, #0] 80121e0: 68db ldr r3, [r3, #12] 80121e2: 68fa ldr r2, [r7, #12] 80121e4: 4313 orrs r3, r2 80121e6: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 80121e8: 68fb ldr r3, [r7, #12] 80121ea: f023 0280 bic.w r2, r3, #128 @ 0x80 80121ee: 683b ldr r3, [r7, #0] 80121f0: 695b ldr r3, [r3, #20] 80121f2: 4313 orrs r3, r2 80121f4: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 80121f6: 687b ldr r3, [r7, #4] 80121f8: 68fa ldr r2, [r7, #12] 80121fa: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 80121fc: 683b ldr r3, [r7, #0] 80121fe: 689a ldr r2, [r3, #8] 8012200: 687b ldr r3, [r7, #4] 8012202: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 8012204: 683b ldr r3, [r7, #0] 8012206: 681a ldr r2, [r3, #0] 8012208: 687b ldr r3, [r7, #4] 801220a: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 801220c: 687b ldr r3, [r7, #4] 801220e: 4a0d ldr r2, [pc, #52] @ (8012244 ) 8012210: 4293 cmp r3, r2 8012212: d103 bne.n 801221c { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8012214: 683b ldr r3, [r7, #0] 8012216: 691a ldr r2, [r3, #16] 8012218: 687b ldr r3, [r7, #4] 801221a: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 801221c: 687b ldr r3, [r7, #4] 801221e: 2201 movs r2, #1 8012220: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 8012222: 687b ldr r3, [r7, #4] 8012224: 691b ldr r3, [r3, #16] 8012226: f003 0301 and.w r3, r3, #1 801222a: 2b00 cmp r3, #0 801222c: d005 beq.n 801223a { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 801222e: 687b ldr r3, [r7, #4] 8012230: 691b ldr r3, [r3, #16] 8012232: f023 0201 bic.w r2, r3, #1 8012236: 687b ldr r3, [r7, #4] 8012238: 611a str r2, [r3, #16] } } 801223a: bf00 nop 801223c: 3714 adds r7, #20 801223e: 46bd mov sp, r7 8012240: bc80 pop {r7} 8012242: 4770 bx lr 8012244: 40012c00 .word 0x40012c00 8012248: 40000400 .word 0x40000400 801224c: 40000800 .word 0x40000800 8012250: 40000c00 .word 0x40000c00 08012254 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8012254: b480 push {r7} 8012256: b087 sub sp, #28 8012258: af00 add r7, sp, #0 801225a: 6078 str r0, [r7, #4] 801225c: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 801225e: 687b ldr r3, [r7, #4] 8012260: 6a1b ldr r3, [r3, #32] 8012262: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 8012264: 687b ldr r3, [r7, #4] 8012266: 6a1b ldr r3, [r3, #32] 8012268: f023 0201 bic.w r2, r3, #1 801226c: 687b ldr r3, [r7, #4] 801226e: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8012270: 687b ldr r3, [r7, #4] 8012272: 685b ldr r3, [r3, #4] 8012274: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8012276: 687b ldr r3, [r7, #4] 8012278: 699b ldr r3, [r3, #24] 801227a: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 801227c: 68fb ldr r3, [r7, #12] 801227e: f023 0370 bic.w r3, r3, #112 @ 0x70 8012282: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 8012284: 68fb ldr r3, [r7, #12] 8012286: f023 0303 bic.w r3, r3, #3 801228a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 801228c: 683b ldr r3, [r7, #0] 801228e: 681b ldr r3, [r3, #0] 8012290: 68fa ldr r2, [r7, #12] 8012292: 4313 orrs r3, r2 8012294: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 8012296: 697b ldr r3, [r7, #20] 8012298: f023 0302 bic.w r3, r3, #2 801229c: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 801229e: 683b ldr r3, [r7, #0] 80122a0: 689b ldr r3, [r3, #8] 80122a2: 697a ldr r2, [r7, #20] 80122a4: 4313 orrs r3, r2 80122a6: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 80122a8: 687b ldr r3, [r7, #4] 80122aa: 4a1c ldr r2, [pc, #112] @ (801231c ) 80122ac: 4293 cmp r3, r2 80122ae: d10c bne.n 80122ca { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 80122b0: 697b ldr r3, [r7, #20] 80122b2: f023 0308 bic.w r3, r3, #8 80122b6: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 80122b8: 683b ldr r3, [r7, #0] 80122ba: 68db ldr r3, [r3, #12] 80122bc: 697a ldr r2, [r7, #20] 80122be: 4313 orrs r3, r2 80122c0: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 80122c2: 697b ldr r3, [r7, #20] 80122c4: f023 0304 bic.w r3, r3, #4 80122c8: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80122ca: 687b ldr r3, [r7, #4] 80122cc: 4a13 ldr r2, [pc, #76] @ (801231c ) 80122ce: 4293 cmp r3, r2 80122d0: d111 bne.n 80122f6 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 80122d2: 693b ldr r3, [r7, #16] 80122d4: f423 7380 bic.w r3, r3, #256 @ 0x100 80122d8: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 80122da: 693b ldr r3, [r7, #16] 80122dc: f423 7300 bic.w r3, r3, #512 @ 0x200 80122e0: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 80122e2: 683b ldr r3, [r7, #0] 80122e4: 695b ldr r3, [r3, #20] 80122e6: 693a ldr r2, [r7, #16] 80122e8: 4313 orrs r3, r2 80122ea: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 80122ec: 683b ldr r3, [r7, #0] 80122ee: 699b ldr r3, [r3, #24] 80122f0: 693a ldr r2, [r7, #16] 80122f2: 4313 orrs r3, r2 80122f4: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80122f6: 687b ldr r3, [r7, #4] 80122f8: 693a ldr r2, [r7, #16] 80122fa: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80122fc: 687b ldr r3, [r7, #4] 80122fe: 68fa ldr r2, [r7, #12] 8012300: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 8012302: 683b ldr r3, [r7, #0] 8012304: 685a ldr r2, [r3, #4] 8012306: 687b ldr r3, [r7, #4] 8012308: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 801230a: 687b ldr r3, [r7, #4] 801230c: 697a ldr r2, [r7, #20] 801230e: 621a str r2, [r3, #32] } 8012310: bf00 nop 8012312: 371c adds r7, #28 8012314: 46bd mov sp, r7 8012316: bc80 pop {r7} 8012318: 4770 bx lr 801231a: bf00 nop 801231c: 40012c00 .word 0x40012c00 08012320 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8012320: b480 push {r7} 8012322: b087 sub sp, #28 8012324: af00 add r7, sp, #0 8012326: 6078 str r0, [r7, #4] 8012328: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 801232a: 687b ldr r3, [r7, #4] 801232c: 6a1b ldr r3, [r3, #32] 801232e: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8012330: 687b ldr r3, [r7, #4] 8012332: 6a1b ldr r3, [r3, #32] 8012334: f023 0210 bic.w r2, r3, #16 8012338: 687b ldr r3, [r7, #4] 801233a: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 801233c: 687b ldr r3, [r7, #4] 801233e: 685b ldr r3, [r3, #4] 8012340: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8012342: 687b ldr r3, [r7, #4] 8012344: 699b ldr r3, [r3, #24] 8012346: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8012348: 68fb ldr r3, [r7, #12] 801234a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 801234e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 8012350: 68fb ldr r3, [r7, #12] 8012352: f423 7340 bic.w r3, r3, #768 @ 0x300 8012356: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8012358: 683b ldr r3, [r7, #0] 801235a: 681b ldr r3, [r3, #0] 801235c: 021b lsls r3, r3, #8 801235e: 68fa ldr r2, [r7, #12] 8012360: 4313 orrs r3, r2 8012362: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 8012364: 697b ldr r3, [r7, #20] 8012366: f023 0320 bic.w r3, r3, #32 801236a: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 801236c: 683b ldr r3, [r7, #0] 801236e: 689b ldr r3, [r3, #8] 8012370: 011b lsls r3, r3, #4 8012372: 697a ldr r2, [r7, #20] 8012374: 4313 orrs r3, r2 8012376: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 8012378: 687b ldr r3, [r7, #4] 801237a: 4a1d ldr r2, [pc, #116] @ (80123f0 ) 801237c: 4293 cmp r3, r2 801237e: d10d bne.n 801239c { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 8012380: 697b ldr r3, [r7, #20] 8012382: f023 0380 bic.w r3, r3, #128 @ 0x80 8012386: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 8012388: 683b ldr r3, [r7, #0] 801238a: 68db ldr r3, [r3, #12] 801238c: 011b lsls r3, r3, #4 801238e: 697a ldr r2, [r7, #20] 8012390: 4313 orrs r3, r2 8012392: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 8012394: 697b ldr r3, [r7, #20] 8012396: f023 0340 bic.w r3, r3, #64 @ 0x40 801239a: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 801239c: 687b ldr r3, [r7, #4] 801239e: 4a14 ldr r2, [pc, #80] @ (80123f0 ) 80123a0: 4293 cmp r3, r2 80123a2: d113 bne.n 80123cc /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 80123a4: 693b ldr r3, [r7, #16] 80123a6: f423 6380 bic.w r3, r3, #1024 @ 0x400 80123aa: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 80123ac: 693b ldr r3, [r7, #16] 80123ae: f423 6300 bic.w r3, r3, #2048 @ 0x800 80123b2: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 80123b4: 683b ldr r3, [r7, #0] 80123b6: 695b ldr r3, [r3, #20] 80123b8: 009b lsls r3, r3, #2 80123ba: 693a ldr r2, [r7, #16] 80123bc: 4313 orrs r3, r2 80123be: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 80123c0: 683b ldr r3, [r7, #0] 80123c2: 699b ldr r3, [r3, #24] 80123c4: 009b lsls r3, r3, #2 80123c6: 693a ldr r2, [r7, #16] 80123c8: 4313 orrs r3, r2 80123ca: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80123cc: 687b ldr r3, [r7, #4] 80123ce: 693a ldr r2, [r7, #16] 80123d0: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80123d2: 687b ldr r3, [r7, #4] 80123d4: 68fa ldr r2, [r7, #12] 80123d6: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 80123d8: 683b ldr r3, [r7, #0] 80123da: 685a ldr r2, [r3, #4] 80123dc: 687b ldr r3, [r7, #4] 80123de: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80123e0: 687b ldr r3, [r7, #4] 80123e2: 697a ldr r2, [r7, #20] 80123e4: 621a str r2, [r3, #32] } 80123e6: bf00 nop 80123e8: 371c adds r7, #28 80123ea: 46bd mov sp, r7 80123ec: bc80 pop {r7} 80123ee: 4770 bx lr 80123f0: 40012c00 .word 0x40012c00 080123f4 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80123f4: b480 push {r7} 80123f6: b087 sub sp, #28 80123f8: af00 add r7, sp, #0 80123fa: 6078 str r0, [r7, #4] 80123fc: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80123fe: 687b ldr r3, [r7, #4] 8012400: 6a1b ldr r3, [r3, #32] 8012402: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 8012404: 687b ldr r3, [r7, #4] 8012406: 6a1b ldr r3, [r3, #32] 8012408: f423 7280 bic.w r2, r3, #256 @ 0x100 801240c: 687b ldr r3, [r7, #4] 801240e: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8012410: 687b ldr r3, [r7, #4] 8012412: 685b ldr r3, [r3, #4] 8012414: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8012416: 687b ldr r3, [r7, #4] 8012418: 69db ldr r3, [r3, #28] 801241a: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 801241c: 68fb ldr r3, [r7, #12] 801241e: f023 0370 bic.w r3, r3, #112 @ 0x70 8012422: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 8012424: 68fb ldr r3, [r7, #12] 8012426: f023 0303 bic.w r3, r3, #3 801242a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 801242c: 683b ldr r3, [r7, #0] 801242e: 681b ldr r3, [r3, #0] 8012430: 68fa ldr r2, [r7, #12] 8012432: 4313 orrs r3, r2 8012434: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 8012436: 697b ldr r3, [r7, #20] 8012438: f423 7300 bic.w r3, r3, #512 @ 0x200 801243c: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 801243e: 683b ldr r3, [r7, #0] 8012440: 689b ldr r3, [r3, #8] 8012442: 021b lsls r3, r3, #8 8012444: 697a ldr r2, [r7, #20] 8012446: 4313 orrs r3, r2 8012448: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 801244a: 687b ldr r3, [r7, #4] 801244c: 4a1d ldr r2, [pc, #116] @ (80124c4 ) 801244e: 4293 cmp r3, r2 8012450: d10d bne.n 801246e { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 8012452: 697b ldr r3, [r7, #20] 8012454: f423 6300 bic.w r3, r3, #2048 @ 0x800 8012458: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 801245a: 683b ldr r3, [r7, #0] 801245c: 68db ldr r3, [r3, #12] 801245e: 021b lsls r3, r3, #8 8012460: 697a ldr r2, [r7, #20] 8012462: 4313 orrs r3, r2 8012464: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 8012466: 697b ldr r3, [r7, #20] 8012468: f423 6380 bic.w r3, r3, #1024 @ 0x400 801246c: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 801246e: 687b ldr r3, [r7, #4] 8012470: 4a14 ldr r2, [pc, #80] @ (80124c4 ) 8012472: 4293 cmp r3, r2 8012474: d113 bne.n 801249e /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 8012476: 693b ldr r3, [r7, #16] 8012478: f423 5380 bic.w r3, r3, #4096 @ 0x1000 801247c: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 801247e: 693b ldr r3, [r7, #16] 8012480: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8012484: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 8012486: 683b ldr r3, [r7, #0] 8012488: 695b ldr r3, [r3, #20] 801248a: 011b lsls r3, r3, #4 801248c: 693a ldr r2, [r7, #16] 801248e: 4313 orrs r3, r2 8012490: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 8012492: 683b ldr r3, [r7, #0] 8012494: 699b ldr r3, [r3, #24] 8012496: 011b lsls r3, r3, #4 8012498: 693a ldr r2, [r7, #16] 801249a: 4313 orrs r3, r2 801249c: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 801249e: 687b ldr r3, [r7, #4] 80124a0: 693a ldr r2, [r7, #16] 80124a2: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 80124a4: 687b ldr r3, [r7, #4] 80124a6: 68fa ldr r2, [r7, #12] 80124a8: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 80124aa: 683b ldr r3, [r7, #0] 80124ac: 685a ldr r2, [r3, #4] 80124ae: 687b ldr r3, [r7, #4] 80124b0: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80124b2: 687b ldr r3, [r7, #4] 80124b4: 697a ldr r2, [r7, #20] 80124b6: 621a str r2, [r3, #32] } 80124b8: bf00 nop 80124ba: 371c adds r7, #28 80124bc: 46bd mov sp, r7 80124be: bc80 pop {r7} 80124c0: 4770 bx lr 80124c2: bf00 nop 80124c4: 40012c00 .word 0x40012c00 080124c8 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80124c8: b480 push {r7} 80124ca: b087 sub sp, #28 80124cc: af00 add r7, sp, #0 80124ce: 6078 str r0, [r7, #4] 80124d0: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80124d2: 687b ldr r3, [r7, #4] 80124d4: 6a1b ldr r3, [r3, #32] 80124d6: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 80124d8: 687b ldr r3, [r7, #4] 80124da: 6a1b ldr r3, [r3, #32] 80124dc: f423 5280 bic.w r2, r3, #4096 @ 0x1000 80124e0: 687b ldr r3, [r7, #4] 80124e2: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80124e4: 687b ldr r3, [r7, #4] 80124e6: 685b ldr r3, [r3, #4] 80124e8: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 80124ea: 687b ldr r3, [r7, #4] 80124ec: 69db ldr r3, [r3, #28] 80124ee: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 80124f0: 68fb ldr r3, [r7, #12] 80124f2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80124f6: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 80124f8: 68fb ldr r3, [r7, #12] 80124fa: f423 7340 bic.w r3, r3, #768 @ 0x300 80124fe: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8012500: 683b ldr r3, [r7, #0] 8012502: 681b ldr r3, [r3, #0] 8012504: 021b lsls r3, r3, #8 8012506: 68fa ldr r2, [r7, #12] 8012508: 4313 orrs r3, r2 801250a: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 801250c: 693b ldr r3, [r7, #16] 801250e: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8012512: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 8012514: 683b ldr r3, [r7, #0] 8012516: 689b ldr r3, [r3, #8] 8012518: 031b lsls r3, r3, #12 801251a: 693a ldr r2, [r7, #16] 801251c: 4313 orrs r3, r2 801251e: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 8012520: 687b ldr r3, [r7, #4] 8012522: 4a0f ldr r2, [pc, #60] @ (8012560 ) 8012524: 4293 cmp r3, r2 8012526: d109 bne.n 801253c { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8012528: 697b ldr r3, [r7, #20] 801252a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 801252e: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8012530: 683b ldr r3, [r7, #0] 8012532: 695b ldr r3, [r3, #20] 8012534: 019b lsls r3, r3, #6 8012536: 697a ldr r2, [r7, #20] 8012538: 4313 orrs r3, r2 801253a: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 801253c: 687b ldr r3, [r7, #4] 801253e: 697a ldr r2, [r7, #20] 8012540: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8012542: 687b ldr r3, [r7, #4] 8012544: 68fa ldr r2, [r7, #12] 8012546: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8012548: 683b ldr r3, [r7, #0] 801254a: 685a ldr r2, [r3, #4] 801254c: 687b ldr r3, [r7, #4] 801254e: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8012550: 687b ldr r3, [r7, #4] 8012552: 693a ldr r2, [r7, #16] 8012554: 621a str r2, [r3, #32] } 8012556: bf00 nop 8012558: 371c adds r7, #28 801255a: 46bd mov sp, r7 801255c: bc80 pop {r7} 801255e: 4770 bx lr 8012560: 40012c00 .word 0x40012c00 08012564 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8012564: b480 push {r7} 8012566: b087 sub sp, #28 8012568: af00 add r7, sp, #0 801256a: 60f8 str r0, [r7, #12] 801256c: 60b9 str r1, [r7, #8] 801256e: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 8012570: 68fb ldr r3, [r7, #12] 8012572: 6a1b ldr r3, [r3, #32] 8012574: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 8012576: 68fb ldr r3, [r7, #12] 8012578: 6a1b ldr r3, [r3, #32] 801257a: f023 0201 bic.w r2, r3, #1 801257e: 68fb ldr r3, [r7, #12] 8012580: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8012582: 68fb ldr r3, [r7, #12] 8012584: 699b ldr r3, [r3, #24] 8012586: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 8012588: 693b ldr r3, [r7, #16] 801258a: f023 03f0 bic.w r3, r3, #240 @ 0xf0 801258e: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 8012590: 687b ldr r3, [r7, #4] 8012592: 011b lsls r3, r3, #4 8012594: 693a ldr r2, [r7, #16] 8012596: 4313 orrs r3, r2 8012598: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 801259a: 697b ldr r3, [r7, #20] 801259c: f023 030a bic.w r3, r3, #10 80125a0: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 80125a2: 697a ldr r2, [r7, #20] 80125a4: 68bb ldr r3, [r7, #8] 80125a6: 4313 orrs r3, r2 80125a8: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 80125aa: 68fb ldr r3, [r7, #12] 80125ac: 693a ldr r2, [r7, #16] 80125ae: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 80125b0: 68fb ldr r3, [r7, #12] 80125b2: 697a ldr r2, [r7, #20] 80125b4: 621a str r2, [r3, #32] } 80125b6: bf00 nop 80125b8: 371c adds r7, #28 80125ba: 46bd mov sp, r7 80125bc: bc80 pop {r7} 80125be: 4770 bx lr 080125c0 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 80125c0: b480 push {r7} 80125c2: b087 sub sp, #28 80125c4: af00 add r7, sp, #0 80125c6: 60f8 str r0, [r7, #12] 80125c8: 60b9 str r1, [r7, #8] 80125ca: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; 80125cc: 68fb ldr r3, [r7, #12] 80125ce: 6a1b ldr r3, [r3, #32] 80125d0: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; 80125d2: 68fb ldr r3, [r7, #12] 80125d4: 6a1b ldr r3, [r3, #32] 80125d6: f023 0210 bic.w r2, r3, #16 80125da: 68fb ldr r3, [r7, #12] 80125dc: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 80125de: 68fb ldr r3, [r7, #12] 80125e0: 699b ldr r3, [r3, #24] 80125e2: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 80125e4: 693b ldr r3, [r7, #16] 80125e6: f423 4370 bic.w r3, r3, #61440 @ 0xf000 80125ea: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); 80125ec: 687b ldr r3, [r7, #4] 80125ee: 031b lsls r3, r3, #12 80125f0: 693a ldr r2, [r7, #16] 80125f2: 4313 orrs r3, r2 80125f4: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 80125f6: 697b ldr r3, [r7, #20] 80125f8: f023 03a0 bic.w r3, r3, #160 @ 0xa0 80125fc: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); 80125fe: 68bb ldr r3, [r7, #8] 8012600: 011b lsls r3, r3, #4 8012602: 697a ldr r2, [r7, #20] 8012604: 4313 orrs r3, r2 8012606: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 8012608: 68fb ldr r3, [r7, #12] 801260a: 693a ldr r2, [r7, #16] 801260c: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 801260e: 68fb ldr r3, [r7, #12] 8012610: 697a ldr r2, [r7, #20] 8012612: 621a str r2, [r3, #32] } 8012614: bf00 nop 8012616: 371c adds r7, #28 8012618: 46bd mov sp, r7 801261a: bc80 pop {r7} 801261c: 4770 bx lr 0801261e : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 801261e: b480 push {r7} 8012620: b085 sub sp, #20 8012622: af00 add r7, sp, #0 8012624: 6078 str r0, [r7, #4] 8012626: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 8012628: 687b ldr r3, [r7, #4] 801262a: 689b ldr r3, [r3, #8] 801262c: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 801262e: 68fb ldr r3, [r7, #12] 8012630: f023 0370 bic.w r3, r3, #112 @ 0x70 8012634: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 8012636: 683a ldr r2, [r7, #0] 8012638: 68fb ldr r3, [r7, #12] 801263a: 4313 orrs r3, r2 801263c: f043 0307 orr.w r3, r3, #7 8012640: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8012642: 687b ldr r3, [r7, #4] 8012644: 68fa ldr r2, [r7, #12] 8012646: 609a str r2, [r3, #8] } 8012648: bf00 nop 801264a: 3714 adds r7, #20 801264c: 46bd mov sp, r7 801264e: bc80 pop {r7} 8012650: 4770 bx lr 08012652 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 8012652: b480 push {r7} 8012654: b087 sub sp, #28 8012656: af00 add r7, sp, #0 8012658: 60f8 str r0, [r7, #12] 801265a: 60b9 str r1, [r7, #8] 801265c: 607a str r2, [r7, #4] 801265e: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 8012660: 68fb ldr r3, [r7, #12] 8012662: 689b ldr r3, [r3, #8] 8012664: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8012666: 697b ldr r3, [r7, #20] 8012668: f423 437f bic.w r3, r3, #65280 @ 0xff00 801266c: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 801266e: 683b ldr r3, [r7, #0] 8012670: 021a lsls r2, r3, #8 8012672: 687b ldr r3, [r7, #4] 8012674: 431a orrs r2, r3 8012676: 68bb ldr r3, [r7, #8] 8012678: 4313 orrs r3, r2 801267a: 697a ldr r2, [r7, #20] 801267c: 4313 orrs r3, r2 801267e: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8012680: 68fb ldr r3, [r7, #12] 8012682: 697a ldr r2, [r7, #20] 8012684: 609a str r2, [r3, #8] } 8012686: bf00 nop 8012688: 371c adds r7, #28 801268a: 46bd mov sp, r7 801268c: bc80 pop {r7} 801268e: 4770 bx lr 08012690 : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 8012690: b480 push {r7} 8012692: b087 sub sp, #28 8012694: af00 add r7, sp, #0 8012696: 60f8 str r0, [r7, #12] 8012698: 60b9 str r1, [r7, #8] 801269a: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 801269c: 68bb ldr r3, [r7, #8] 801269e: f003 031f and.w r3, r3, #31 80126a2: 2201 movs r2, #1 80126a4: fa02 f303 lsl.w r3, r2, r3 80126a8: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 80126aa: 68fb ldr r3, [r7, #12] 80126ac: 6a1a ldr r2, [r3, #32] 80126ae: 697b ldr r3, [r7, #20] 80126b0: 43db mvns r3, r3 80126b2: 401a ands r2, r3 80126b4: 68fb ldr r3, [r7, #12] 80126b6: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 80126b8: 68fb ldr r3, [r7, #12] 80126ba: 6a1a ldr r2, [r3, #32] 80126bc: 68bb ldr r3, [r7, #8] 80126be: f003 031f and.w r3, r3, #31 80126c2: 6879 ldr r1, [r7, #4] 80126c4: fa01 f303 lsl.w r3, r1, r3 80126c8: 431a orrs r2, r3 80126ca: 68fb ldr r3, [r7, #12] 80126cc: 621a str r2, [r3, #32] } 80126ce: bf00 nop 80126d0: 371c adds r7, #28 80126d2: 46bd mov sp, r7 80126d4: bc80 pop {r7} 80126d6: 4770 bx lr 080126d8 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 80126d8: b480 push {r7} 80126da: b085 sub sp, #20 80126dc: af00 add r7, sp, #0 80126de: 6078 str r0, [r7, #4] 80126e0: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 80126e2: 687b ldr r3, [r7, #4] 80126e4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80126e8: 2b01 cmp r3, #1 80126ea: d101 bne.n 80126f0 80126ec: 2302 movs r3, #2 80126ee: e04b b.n 8012788 80126f0: 687b ldr r3, [r7, #4] 80126f2: 2201 movs r2, #1 80126f4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 80126f8: 687b ldr r3, [r7, #4] 80126fa: 2202 movs r2, #2 80126fc: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8012700: 687b ldr r3, [r7, #4] 8012702: 681b ldr r3, [r3, #0] 8012704: 685b ldr r3, [r3, #4] 8012706: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8012708: 687b ldr r3, [r7, #4] 801270a: 681b ldr r3, [r3, #0] 801270c: 689b ldr r3, [r3, #8] 801270e: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8012710: 68fb ldr r3, [r7, #12] 8012712: f023 0370 bic.w r3, r3, #112 @ 0x70 8012716: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 8012718: 683b ldr r3, [r7, #0] 801271a: 681b ldr r3, [r3, #0] 801271c: 68fa ldr r2, [r7, #12] 801271e: 4313 orrs r3, r2 8012720: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 8012722: 687b ldr r3, [r7, #4] 8012724: 681b ldr r3, [r3, #0] 8012726: 68fa ldr r2, [r7, #12] 8012728: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 801272a: 687b ldr r3, [r7, #4] 801272c: 681b ldr r3, [r3, #0] 801272e: 4a19 ldr r2, [pc, #100] @ (8012794 ) 8012730: 4293 cmp r3, r2 8012732: d013 beq.n 801275c 8012734: 687b ldr r3, [r7, #4] 8012736: 681b ldr r3, [r3, #0] 8012738: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 801273c: d00e beq.n 801275c 801273e: 687b ldr r3, [r7, #4] 8012740: 681b ldr r3, [r3, #0] 8012742: 4a15 ldr r2, [pc, #84] @ (8012798 ) 8012744: 4293 cmp r3, r2 8012746: d009 beq.n 801275c 8012748: 687b ldr r3, [r7, #4] 801274a: 681b ldr r3, [r3, #0] 801274c: 4a13 ldr r2, [pc, #76] @ (801279c ) 801274e: 4293 cmp r3, r2 8012750: d004 beq.n 801275c 8012752: 687b ldr r3, [r7, #4] 8012754: 681b ldr r3, [r3, #0] 8012756: 4a12 ldr r2, [pc, #72] @ (80127a0 ) 8012758: 4293 cmp r3, r2 801275a: d10c bne.n 8012776 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 801275c: 68bb ldr r3, [r7, #8] 801275e: f023 0380 bic.w r3, r3, #128 @ 0x80 8012762: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 8012764: 683b ldr r3, [r7, #0] 8012766: 685b ldr r3, [r3, #4] 8012768: 68ba ldr r2, [r7, #8] 801276a: 4313 orrs r3, r2 801276c: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 801276e: 687b ldr r3, [r7, #4] 8012770: 681b ldr r3, [r3, #0] 8012772: 68ba ldr r2, [r7, #8] 8012774: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 8012776: 687b ldr r3, [r7, #4] 8012778: 2201 movs r2, #1 801277a: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 801277e: 687b ldr r3, [r7, #4] 8012780: 2200 movs r2, #0 8012782: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 8012786: 2300 movs r3, #0 } 8012788: 4618 mov r0, r3 801278a: 3714 adds r7, #20 801278c: 46bd mov sp, r7 801278e: bc80 pop {r7} 8012790: 4770 bx lr 8012792: bf00 nop 8012794: 40012c00 .word 0x40012c00 8012798: 40000400 .word 0x40000400 801279c: 40000800 .word 0x40000800 80127a0: 40000c00 .word 0x40000c00 080127a4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 80127a4: b580 push {r7, lr} 80127a6: b082 sub sp, #8 80127a8: af00 add r7, sp, #0 80127aa: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 80127ac: 687b ldr r3, [r7, #4] 80127ae: 2b00 cmp r3, #0 80127b0: d101 bne.n 80127b6 { return HAL_ERROR; 80127b2: 2301 movs r3, #1 80127b4: e042 b.n 801283c assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 80127b6: 687b ldr r3, [r7, #4] 80127b8: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 80127bc: b2db uxtb r3, r3 80127be: 2b00 cmp r3, #0 80127c0: d106 bne.n 80127d0 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 80127c2: 687b ldr r3, [r7, #4] 80127c4: 2200 movs r2, #0 80127c6: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 80127ca: 6878 ldr r0, [r7, #4] 80127cc: f7fb fe8e bl 800e4ec #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 80127d0: 687b ldr r3, [r7, #4] 80127d2: 2224 movs r2, #36 @ 0x24 80127d4: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 80127d8: 687b ldr r3, [r7, #4] 80127da: 681b ldr r3, [r3, #0] 80127dc: 68da ldr r2, [r3, #12] 80127de: 687b ldr r3, [r7, #4] 80127e0: 681b ldr r3, [r3, #0] 80127e2: f422 5200 bic.w r2, r2, #8192 @ 0x2000 80127e6: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 80127e8: 6878 ldr r0, [r7, #4] 80127ea: f000 feb3 bl 8013554 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80127ee: 687b ldr r3, [r7, #4] 80127f0: 681b ldr r3, [r3, #0] 80127f2: 691a ldr r2, [r3, #16] 80127f4: 687b ldr r3, [r7, #4] 80127f6: 681b ldr r3, [r3, #0] 80127f8: f422 4290 bic.w r2, r2, #18432 @ 0x4800 80127fc: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80127fe: 687b ldr r3, [r7, #4] 8012800: 681b ldr r3, [r3, #0] 8012802: 695a ldr r2, [r3, #20] 8012804: 687b ldr r3, [r7, #4] 8012806: 681b ldr r3, [r3, #0] 8012808: f022 022a bic.w r2, r2, #42 @ 0x2a 801280c: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 801280e: 687b ldr r3, [r7, #4] 8012810: 681b ldr r3, [r3, #0] 8012812: 68da ldr r2, [r3, #12] 8012814: 687b ldr r3, [r7, #4] 8012816: 681b ldr r3, [r3, #0] 8012818: f442 5200 orr.w r2, r2, #8192 @ 0x2000 801281c: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 801281e: 687b ldr r3, [r7, #4] 8012820: 2200 movs r2, #0 8012822: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 8012824: 687b ldr r3, [r7, #4] 8012826: 2220 movs r2, #32 8012828: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 801282c: 687b ldr r3, [r7, #4] 801282e: 2220 movs r2, #32 8012830: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 8012834: 687b ldr r3, [r7, #4] 8012836: 2200 movs r2, #0 8012838: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 801283a: 2300 movs r3, #0 } 801283c: 4618 mov r0, r3 801283e: 3708 adds r7, #8 8012840: 46bd mov sp, r7 8012842: bd80 pop {r7, pc} 08012844 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { 8012844: b480 push {r7} 8012846: b085 sub sp, #20 8012848: af00 add r7, sp, #0 801284a: 60f8 str r0, [r7, #12] 801284c: 60b9 str r1, [r7, #8] 801284e: 4613 mov r3, r2 8012850: 80fb strh r3, [r7, #6] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 8012852: 68fb ldr r3, [r7, #12] 8012854: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8012858: b2db uxtb r3, r3 801285a: 2b20 cmp r3, #32 801285c: d121 bne.n 80128a2 { if ((pData == NULL) || (Size == 0U)) 801285e: 68bb ldr r3, [r7, #8] 8012860: 2b00 cmp r3, #0 8012862: d002 beq.n 801286a 8012864: 88fb ldrh r3, [r7, #6] 8012866: 2b00 cmp r3, #0 8012868: d101 bne.n 801286e { return HAL_ERROR; 801286a: 2301 movs r3, #1 801286c: e01a b.n 80128a4 } huart->pTxBuffPtr = pData; 801286e: 68fb ldr r3, [r7, #12] 8012870: 68ba ldr r2, [r7, #8] 8012872: 621a str r2, [r3, #32] huart->TxXferSize = Size; 8012874: 68fb ldr r3, [r7, #12] 8012876: 88fa ldrh r2, [r7, #6] 8012878: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 801287a: 68fb ldr r3, [r7, #12] 801287c: 88fa ldrh r2, [r7, #6] 801287e: 84da strh r2, [r3, #38] @ 0x26 huart->ErrorCode = HAL_UART_ERROR_NONE; 8012880: 68fb ldr r3, [r7, #12] 8012882: 2200 movs r2, #0 8012884: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; 8012886: 68fb ldr r3, [r7, #12] 8012888: 2221 movs r2, #33 @ 0x21 801288a: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the UART Transmit data register empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TXE); 801288e: 68fb ldr r3, [r7, #12] 8012890: 681b ldr r3, [r3, #0] 8012892: 68da ldr r2, [r3, #12] 8012894: 68fb ldr r3, [r7, #12] 8012896: 681b ldr r3, [r3, #0] 8012898: f042 0280 orr.w r2, r2, #128 @ 0x80 801289c: 60da str r2, [r3, #12] return HAL_OK; 801289e: 2300 movs r3, #0 80128a0: e000 b.n 80128a4 } else { return HAL_BUSY; 80128a2: 2302 movs r3, #2 } } 80128a4: 4618 mov r0, r3 80128a6: 3714 adds r7, #20 80128a8: 46bd mov sp, r7 80128aa: bc80 pop {r7} 80128ac: 4770 bx lr 080128ae : * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). * @param Size Amount of data elements (uint8_t or uint16_t) to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 80128ae: b580 push {r7, lr} 80128b0: b08c sub sp, #48 @ 0x30 80128b2: af00 add r7, sp, #0 80128b4: 60f8 str r0, [r7, #12] 80128b6: 60b9 str r1, [r7, #8] 80128b8: 4613 mov r3, r2 80128ba: 80fb strh r3, [r7, #6] HAL_StatusTypeDef status; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) 80128bc: 68fb ldr r3, [r7, #12] 80128be: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 80128c2: b2db uxtb r3, r3 80128c4: 2b20 cmp r3, #32 80128c6: d14a bne.n 801295e { if ((pData == NULL) || (Size == 0U)) 80128c8: 68bb ldr r3, [r7, #8] 80128ca: 2b00 cmp r3, #0 80128cc: d002 beq.n 80128d4 80128ce: 88fb ldrh r3, [r7, #6] 80128d0: 2b00 cmp r3, #0 80128d2: d101 bne.n 80128d8 { return HAL_ERROR; 80128d4: 2301 movs r3, #1 80128d6: e043 b.n 8012960 } /* Set Reception type to reception till IDLE Event*/ huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; 80128d8: 68fb ldr r3, [r7, #12] 80128da: 2201 movs r2, #1 80128dc: 631a str r2, [r3, #48] @ 0x30 huart->RxEventType = HAL_UART_RXEVENT_TC; 80128de: 68fb ldr r3, [r7, #12] 80128e0: 2200 movs r2, #0 80128e2: 635a str r2, [r3, #52] @ 0x34 status = UART_Start_Receive_IT(huart, pData, Size); 80128e4: 88fb ldrh r3, [r7, #6] 80128e6: 461a mov r2, r3 80128e8: 68b9 ldr r1, [r7, #8] 80128ea: 68f8 ldr r0, [r7, #12] 80128ec: f000 fbfd bl 80130ea 80128f0: 4603 mov r3, r0 80128f2: f887 302f strb.w r3, [r7, #47] @ 0x2f /* Check Rx process has been successfully started */ if (status == HAL_OK) 80128f6: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 80128fa: 2b00 cmp r3, #0 80128fc: d12c bne.n 8012958 { if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 80128fe: 68fb ldr r3, [r7, #12] 8012900: 6b1b ldr r3, [r3, #48] @ 0x30 8012902: 2b01 cmp r3, #1 8012904: d125 bne.n 8012952 { __HAL_UART_CLEAR_IDLEFLAG(huart); 8012906: 2300 movs r3, #0 8012908: 613b str r3, [r7, #16] 801290a: 68fb ldr r3, [r7, #12] 801290c: 681b ldr r3, [r3, #0] 801290e: 681b ldr r3, [r3, #0] 8012910: 613b str r3, [r7, #16] 8012912: 68fb ldr r3, [r7, #12] 8012914: 681b ldr r3, [r3, #0] 8012916: 685b ldr r3, [r3, #4] 8012918: 613b str r3, [r7, #16] 801291a: 693b ldr r3, [r7, #16] ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 801291c: 68fb ldr r3, [r7, #12] 801291e: 681b ldr r3, [r3, #0] 8012920: 330c adds r3, #12 8012922: 61bb str r3, [r7, #24] */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012924: 69bb ldr r3, [r7, #24] 8012926: e853 3f00 ldrex r3, [r3] 801292a: 617b str r3, [r7, #20] return(result); 801292c: 697b ldr r3, [r7, #20] 801292e: f043 0310 orr.w r3, r3, #16 8012932: 62bb str r3, [r7, #40] @ 0x28 8012934: 68fb ldr r3, [r7, #12] 8012936: 681b ldr r3, [r3, #0] 8012938: 330c adds r3, #12 801293a: 6aba ldr r2, [r7, #40] @ 0x28 801293c: 627a str r2, [r7, #36] @ 0x24 801293e: 623b str r3, [r7, #32] */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012940: 6a39 ldr r1, [r7, #32] 8012942: 6a7a ldr r2, [r7, #36] @ 0x24 8012944: e841 2300 strex r3, r2, [r1] 8012948: 61fb str r3, [r7, #28] return(result); 801294a: 69fb ldr r3, [r7, #28] 801294c: 2b00 cmp r3, #0 801294e: d1e5 bne.n 801291c 8012950: e002 b.n 8012958 { /* In case of errors already pending when reception is started, Interrupts may have already been raised and lead to reception abortion. (Overrun error for instance). In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ status = HAL_ERROR; 8012952: 2301 movs r3, #1 8012954: f887 302f strb.w r3, [r7, #47] @ 0x2f } } return status; 8012958: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 801295c: e000 b.n 8012960 } else { return HAL_BUSY; 801295e: 2302 movs r3, #2 } } 8012960: 4618 mov r0, r3 8012962: 3730 adds r7, #48 @ 0x30 8012964: 46bd mov sp, r7 8012966: bd80 pop {r7, pc} 08012968 : * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be * considered as completed only when user abort complete callback is executed (not when exiting function). * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) { 8012968: b580 push {r7, lr} 801296a: b0a2 sub sp, #136 @ 0x88 801296c: af00 add r7, sp, #0 801296e: 6078 str r0, [r7, #4] uint32_t AbortCplt = 0x01U; 8012970: 2301 movs r3, #1 8012972: f8c7 3084 str.w r3, [r7, #132] @ 0x84 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); 8012976: 687b ldr r3, [r7, #4] 8012978: 681b ldr r3, [r3, #0] 801297a: 330c adds r3, #12 801297c: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 801297e: 6e3b ldr r3, [r7, #96] @ 0x60 8012980: e853 3f00 ldrex r3, [r3] 8012984: 65fb str r3, [r7, #92] @ 0x5c return(result); 8012986: 6dfb ldr r3, [r7, #92] @ 0x5c 8012988: f423 73f0 bic.w r3, r3, #480 @ 0x1e0 801298c: f8c7 3080 str.w r3, [r7, #128] @ 0x80 8012990: 687b ldr r3, [r7, #4] 8012992: 681b ldr r3, [r3, #0] 8012994: 330c adds r3, #12 8012996: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 801299a: 66fa str r2, [r7, #108] @ 0x6c 801299c: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 801299e: 6eb9 ldr r1, [r7, #104] @ 0x68 80129a0: 6efa ldr r2, [r7, #108] @ 0x6c 80129a2: e841 2300 strex r3, r2, [r1] 80129a6: 667b str r3, [r7, #100] @ 0x64 return(result); 80129a8: 6e7b ldr r3, [r7, #100] @ 0x64 80129aa: 2b00 cmp r3, #0 80129ac: d1e3 bne.n 8012976 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80129ae: 687b ldr r3, [r7, #4] 80129b0: 681b ldr r3, [r3, #0] 80129b2: 3314 adds r3, #20 80129b4: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80129b6: 6cfb ldr r3, [r7, #76] @ 0x4c 80129b8: e853 3f00 ldrex r3, [r3] 80129bc: 64bb str r3, [r7, #72] @ 0x48 return(result); 80129be: 6cbb ldr r3, [r7, #72] @ 0x48 80129c0: f023 0301 bic.w r3, r3, #1 80129c4: 67fb str r3, [r7, #124] @ 0x7c 80129c6: 687b ldr r3, [r7, #4] 80129c8: 681b ldr r3, [r3, #0] 80129ca: 3314 adds r3, #20 80129cc: 6ffa ldr r2, [r7, #124] @ 0x7c 80129ce: 65ba str r2, [r7, #88] @ 0x58 80129d0: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80129d2: 6d79 ldr r1, [r7, #84] @ 0x54 80129d4: 6dba ldr r2, [r7, #88] @ 0x58 80129d6: e841 2300 strex r3, r2, [r1] 80129da: 653b str r3, [r7, #80] @ 0x50 return(result); 80129dc: 6d3b ldr r3, [r7, #80] @ 0x50 80129de: 2b00 cmp r3, #0 80129e0: d1e5 bne.n 80129ae /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 80129e2: 687b ldr r3, [r7, #4] 80129e4: 6b1b ldr r3, [r3, #48] @ 0x30 80129e6: 2b01 cmp r3, #1 80129e8: d119 bne.n 8012a1e { ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); 80129ea: 687b ldr r3, [r7, #4] 80129ec: 681b ldr r3, [r3, #0] 80129ee: 330c adds r3, #12 80129f0: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80129f2: 6bbb ldr r3, [r7, #56] @ 0x38 80129f4: e853 3f00 ldrex r3, [r3] 80129f8: 637b str r3, [r7, #52] @ 0x34 return(result); 80129fa: 6b7b ldr r3, [r7, #52] @ 0x34 80129fc: f023 0310 bic.w r3, r3, #16 8012a00: 67bb str r3, [r7, #120] @ 0x78 8012a02: 687b ldr r3, [r7, #4] 8012a04: 681b ldr r3, [r3, #0] 8012a06: 330c adds r3, #12 8012a08: 6fba ldr r2, [r7, #120] @ 0x78 8012a0a: 647a str r2, [r7, #68] @ 0x44 8012a0c: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012a0e: 6c39 ldr r1, [r7, #64] @ 0x40 8012a10: 6c7a ldr r2, [r7, #68] @ 0x44 8012a12: e841 2300 strex r3, r2, [r1] 8012a16: 63fb str r3, [r7, #60] @ 0x3c return(result); 8012a18: 6bfb ldr r3, [r7, #60] @ 0x3c 8012a1a: 2b00 cmp r3, #0 8012a1c: d1e5 bne.n 80129ea } /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised before any call to DMA Abort functions */ /* DMA Tx Handle is valid */ if (huart->hdmatx != NULL) 8012a1e: 687b ldr r3, [r7, #4] 8012a20: 6b9b ldr r3, [r3, #56] @ 0x38 8012a22: 2b00 cmp r3, #0 8012a24: d00f beq.n 8012a46 { /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. Otherwise, set it to NULL */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 8012a26: 687b ldr r3, [r7, #4] 8012a28: 681b ldr r3, [r3, #0] 8012a2a: 695b ldr r3, [r3, #20] 8012a2c: f003 0380 and.w r3, r3, #128 @ 0x80 8012a30: 2b00 cmp r3, #0 8012a32: d004 beq.n 8012a3e { huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback; 8012a34: 687b ldr r3, [r7, #4] 8012a36: 6b9b ldr r3, [r3, #56] @ 0x38 8012a38: 4a53 ldr r2, [pc, #332] @ (8012b88 ) 8012a3a: 635a str r2, [r3, #52] @ 0x34 8012a3c: e003 b.n 8012a46 } else { huart->hdmatx->XferAbortCallback = NULL; 8012a3e: 687b ldr r3, [r7, #4] 8012a40: 6b9b ldr r3, [r3, #56] @ 0x38 8012a42: 2200 movs r2, #0 8012a44: 635a str r2, [r3, #52] @ 0x34 } } /* DMA Rx Handle is valid */ if (huart->hdmarx != NULL) 8012a46: 687b ldr r3, [r7, #4] 8012a48: 6bdb ldr r3, [r3, #60] @ 0x3c 8012a4a: 2b00 cmp r3, #0 8012a4c: d00f beq.n 8012a6e { /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. Otherwise, set it to NULL */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012a4e: 687b ldr r3, [r7, #4] 8012a50: 681b ldr r3, [r3, #0] 8012a52: 695b ldr r3, [r3, #20] 8012a54: f003 0340 and.w r3, r3, #64 @ 0x40 8012a58: 2b00 cmp r3, #0 8012a5a: d004 beq.n 8012a66 { huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback; 8012a5c: 687b ldr r3, [r7, #4] 8012a5e: 6bdb ldr r3, [r3, #60] @ 0x3c 8012a60: 4a4a ldr r2, [pc, #296] @ (8012b8c ) 8012a62: 635a str r2, [r3, #52] @ 0x34 8012a64: e003 b.n 8012a6e } else { huart->hdmarx->XferAbortCallback = NULL; 8012a66: 687b ldr r3, [r7, #4] 8012a68: 6bdb ldr r3, [r3, #60] @ 0x3c 8012a6a: 2200 movs r2, #0 8012a6c: 635a str r2, [r3, #52] @ 0x34 } } /* Disable the UART DMA Tx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 8012a6e: 687b ldr r3, [r7, #4] 8012a70: 681b ldr r3, [r3, #0] 8012a72: 695b ldr r3, [r3, #20] 8012a74: f003 0380 and.w r3, r3, #128 @ 0x80 8012a78: 2b00 cmp r3, #0 8012a7a: d02d beq.n 8012ad8 { /* Disable DMA Tx at UART level */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8012a7c: 687b ldr r3, [r7, #4] 8012a7e: 681b ldr r3, [r3, #0] 8012a80: 3314 adds r3, #20 8012a82: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012a84: 6a7b ldr r3, [r7, #36] @ 0x24 8012a86: e853 3f00 ldrex r3, [r3] 8012a8a: 623b str r3, [r7, #32] return(result); 8012a8c: 6a3b ldr r3, [r7, #32] 8012a8e: f023 0380 bic.w r3, r3, #128 @ 0x80 8012a92: 677b str r3, [r7, #116] @ 0x74 8012a94: 687b ldr r3, [r7, #4] 8012a96: 681b ldr r3, [r3, #0] 8012a98: 3314 adds r3, #20 8012a9a: 6f7a ldr r2, [r7, #116] @ 0x74 8012a9c: 633a str r2, [r7, #48] @ 0x30 8012a9e: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012aa0: 6af9 ldr r1, [r7, #44] @ 0x2c 8012aa2: 6b3a ldr r2, [r7, #48] @ 0x30 8012aa4: e841 2300 strex r3, r2, [r1] 8012aa8: 62bb str r3, [r7, #40] @ 0x28 return(result); 8012aaa: 6abb ldr r3, [r7, #40] @ 0x28 8012aac: 2b00 cmp r3, #0 8012aae: d1e5 bne.n 8012a7c /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmatx != NULL) 8012ab0: 687b ldr r3, [r7, #4] 8012ab2: 6b9b ldr r3, [r3, #56] @ 0x38 8012ab4: 2b00 cmp r3, #0 8012ab6: d00f beq.n 8012ad8 { /* UART Tx DMA Abort callback has already been initialised : will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ /* Abort DMA TX */ if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) 8012ab8: 687b ldr r3, [r7, #4] 8012aba: 6b9b ldr r3, [r3, #56] @ 0x38 8012abc: 4618 mov r0, r3 8012abe: f7fd fc45 bl 801034c 8012ac2: 4603 mov r3, r0 8012ac4: 2b00 cmp r3, #0 8012ac6: d004 beq.n 8012ad2 { huart->hdmatx->XferAbortCallback = NULL; 8012ac8: 687b ldr r3, [r7, #4] 8012aca: 6b9b ldr r3, [r3, #56] @ 0x38 8012acc: 2200 movs r2, #0 8012ace: 635a str r2, [r3, #52] @ 0x34 8012ad0: e002 b.n 8012ad8 } else { AbortCplt = 0x00U; 8012ad2: 2300 movs r3, #0 8012ad4: f8c7 3084 str.w r3, [r7, #132] @ 0x84 } } } /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012ad8: 687b ldr r3, [r7, #4] 8012ada: 681b ldr r3, [r3, #0] 8012adc: 695b ldr r3, [r3, #20] 8012ade: f003 0340 and.w r3, r3, #64 @ 0x40 8012ae2: 2b00 cmp r3, #0 8012ae4: d030 beq.n 8012b48 { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8012ae6: 687b ldr r3, [r7, #4] 8012ae8: 681b ldr r3, [r3, #0] 8012aea: 3314 adds r3, #20 8012aec: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012aee: 693b ldr r3, [r7, #16] 8012af0: e853 3f00 ldrex r3, [r3] 8012af4: 60fb str r3, [r7, #12] return(result); 8012af6: 68fb ldr r3, [r7, #12] 8012af8: f023 0340 bic.w r3, r3, #64 @ 0x40 8012afc: 673b str r3, [r7, #112] @ 0x70 8012afe: 687b ldr r3, [r7, #4] 8012b00: 681b ldr r3, [r3, #0] 8012b02: 3314 adds r3, #20 8012b04: 6f3a ldr r2, [r7, #112] @ 0x70 8012b06: 61fa str r2, [r7, #28] 8012b08: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012b0a: 69b9 ldr r1, [r7, #24] 8012b0c: 69fa ldr r2, [r7, #28] 8012b0e: e841 2300 strex r3, r2, [r1] 8012b12: 617b str r3, [r7, #20] return(result); 8012b14: 697b ldr r3, [r7, #20] 8012b16: 2b00 cmp r3, #0 8012b18: d1e5 bne.n 8012ae6 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmarx != NULL) 8012b1a: 687b ldr r3, [r7, #4] 8012b1c: 6bdb ldr r3, [r3, #60] @ 0x3c 8012b1e: 2b00 cmp r3, #0 8012b20: d012 beq.n 8012b48 { /* UART Rx DMA Abort callback has already been initialised : will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ /* Abort DMA RX */ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8012b22: 687b ldr r3, [r7, #4] 8012b24: 6bdb ldr r3, [r3, #60] @ 0x3c 8012b26: 4618 mov r0, r3 8012b28: f7fd fc10 bl 801034c 8012b2c: 4603 mov r3, r0 8012b2e: 2b00 cmp r3, #0 8012b30: d007 beq.n 8012b42 { huart->hdmarx->XferAbortCallback = NULL; 8012b32: 687b ldr r3, [r7, #4] 8012b34: 6bdb ldr r3, [r3, #60] @ 0x3c 8012b36: 2200 movs r2, #0 8012b38: 635a str r2, [r3, #52] @ 0x34 AbortCplt = 0x01U; 8012b3a: 2301 movs r3, #1 8012b3c: f8c7 3084 str.w r3, [r7, #132] @ 0x84 8012b40: e002 b.n 8012b48 } else { AbortCplt = 0x00U; 8012b42: 2300 movs r3, #0 8012b44: f8c7 3084 str.w r3, [r7, #132] @ 0x84 } } } /* if no DMA abort complete callback execution is required => call user Abort Complete callback */ if (AbortCplt == 0x01U) 8012b48: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8012b4c: 2b01 cmp r3, #1 8012b4e: d116 bne.n 8012b7e { /* Reset Tx and Rx transfer counters */ huart->TxXferCount = 0x00U; 8012b50: 687b ldr r3, [r7, #4] 8012b52: 2200 movs r2, #0 8012b54: 84da strh r2, [r3, #38] @ 0x26 huart->RxXferCount = 0x00U; 8012b56: 687b ldr r3, [r7, #4] 8012b58: 2200 movs r2, #0 8012b5a: 85da strh r2, [r3, #46] @ 0x2e /* Reset ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8012b5c: 687b ldr r3, [r7, #4] 8012b5e: 2200 movs r2, #0 8012b60: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState and huart->RxState to Ready */ huart->gState = HAL_UART_STATE_READY; 8012b62: 687b ldr r3, [r7, #4] 8012b64: 2220 movs r2, #32 8012b66: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8012b6a: 687b ldr r3, [r7, #4] 8012b6c: 2220 movs r2, #32 8012b6e: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8012b72: 687b ldr r3, [r7, #4] 8012b74: 2200 movs r2, #0 8012b76: 631a str r2, [r3, #48] @ 0x30 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Abort complete callback */ huart->AbortCpltCallback(huart); #else /* Call legacy weak Abort complete callback */ HAL_UART_AbortCpltCallback(huart); 8012b78: 6878 ldr r0, [r7, #4] 8012b7a: f000 faad bl 80130d8 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; 8012b7e: 2300 movs r3, #0 } 8012b80: 4618 mov r0, r3 8012b82: 3788 adds r7, #136 @ 0x88 8012b84: 46bd mov sp, r7 8012b86: bd80 pop {r7, pc} 8012b88: 08013249 .word 0x08013249 8012b8c: 080132a9 .word 0x080132a9 08012b90 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { 8012b90: b580 push {r7, lr} 8012b92: b0ba sub sp, #232 @ 0xe8 8012b94: af00 add r7, sp, #0 8012b96: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); 8012b98: 687b ldr r3, [r7, #4] 8012b9a: 681b ldr r3, [r3, #0] 8012b9c: 681b ldr r3, [r3, #0] 8012b9e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8012ba2: 687b ldr r3, [r7, #4] 8012ba4: 681b ldr r3, [r3, #0] 8012ba6: 68db ldr r3, [r3, #12] 8012ba8: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); 8012bac: 687b ldr r3, [r7, #4] 8012bae: 681b ldr r3, [r3, #0] 8012bb0: 695b ldr r3, [r3, #20] 8012bb2: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; 8012bb6: 2300 movs r3, #0 8012bb8: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; 8012bbc: 2300 movs r3, #0 8012bbe: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); 8012bc2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012bc6: f003 030f and.w r3, r3, #15 8012bca: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) 8012bce: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8012bd2: 2b00 cmp r3, #0 8012bd4: d10f bne.n 8012bf6 { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8012bd6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012bda: f003 0320 and.w r3, r3, #32 8012bde: 2b00 cmp r3, #0 8012be0: d009 beq.n 8012bf6 8012be2: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012be6: f003 0320 and.w r3, r3, #32 8012bea: 2b00 cmp r3, #0 8012bec: d003 beq.n 8012bf6 { UART_Receive_IT(huart); 8012bee: 6878 ldr r0, [r7, #4] 8012bf0: f000 fbf1 bl 80133d6 return; 8012bf4: e25b b.n 80130ae } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) 8012bf6: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8012bfa: 2b00 cmp r3, #0 8012bfc: f000 80de beq.w 8012dbc 8012c00: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012c04: f003 0301 and.w r3, r3, #1 8012c08: 2b00 cmp r3, #0 8012c0a: d106 bne.n 8012c1a || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8012c0c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012c10: f403 7390 and.w r3, r3, #288 @ 0x120 8012c14: 2b00 cmp r3, #0 8012c16: f000 80d1 beq.w 8012dbc { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8012c1a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012c1e: f003 0301 and.w r3, r3, #1 8012c22: 2b00 cmp r3, #0 8012c24: d00b beq.n 8012c3e 8012c26: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012c2a: f403 7380 and.w r3, r3, #256 @ 0x100 8012c2e: 2b00 cmp r3, #0 8012c30: d005 beq.n 8012c3e { huart->ErrorCode |= HAL_UART_ERROR_PE; 8012c32: 687b ldr r3, [r7, #4] 8012c34: 6c5b ldr r3, [r3, #68] @ 0x44 8012c36: f043 0201 orr.w r2, r3, #1 8012c3a: 687b ldr r3, [r7, #4] 8012c3c: 645a str r2, [r3, #68] @ 0x44 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8012c3e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012c42: f003 0304 and.w r3, r3, #4 8012c46: 2b00 cmp r3, #0 8012c48: d00b beq.n 8012c62 8012c4a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012c4e: f003 0301 and.w r3, r3, #1 8012c52: 2b00 cmp r3, #0 8012c54: d005 beq.n 8012c62 { huart->ErrorCode |= HAL_UART_ERROR_NE; 8012c56: 687b ldr r3, [r7, #4] 8012c58: 6c5b ldr r3, [r3, #68] @ 0x44 8012c5a: f043 0202 orr.w r2, r3, #2 8012c5e: 687b ldr r3, [r7, #4] 8012c60: 645a str r2, [r3, #68] @ 0x44 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8012c62: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012c66: f003 0302 and.w r3, r3, #2 8012c6a: 2b00 cmp r3, #0 8012c6c: d00b beq.n 8012c86 8012c6e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012c72: f003 0301 and.w r3, r3, #1 8012c76: 2b00 cmp r3, #0 8012c78: d005 beq.n 8012c86 { huart->ErrorCode |= HAL_UART_ERROR_FE; 8012c7a: 687b ldr r3, [r7, #4] 8012c7c: 6c5b ldr r3, [r3, #68] @ 0x44 8012c7e: f043 0204 orr.w r2, r3, #4 8012c82: 687b ldr r3, [r7, #4] 8012c84: 645a str r2, [r3, #68] @ 0x44 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) 8012c86: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012c8a: f003 0308 and.w r3, r3, #8 8012c8e: 2b00 cmp r3, #0 8012c90: d011 beq.n 8012cb6 8012c92: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012c96: f003 0320 and.w r3, r3, #32 8012c9a: 2b00 cmp r3, #0 8012c9c: d105 bne.n 8012caa || ((cr3its & USART_CR3_EIE) != RESET))) 8012c9e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8012ca2: f003 0301 and.w r3, r3, #1 8012ca6: 2b00 cmp r3, #0 8012ca8: d005 beq.n 8012cb6 { huart->ErrorCode |= HAL_UART_ERROR_ORE; 8012caa: 687b ldr r3, [r7, #4] 8012cac: 6c5b ldr r3, [r3, #68] @ 0x44 8012cae: f043 0208 orr.w r2, r3, #8 8012cb2: 687b ldr r3, [r7, #4] 8012cb4: 645a str r2, [r3, #68] @ 0x44 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) 8012cb6: 687b ldr r3, [r7, #4] 8012cb8: 6c5b ldr r3, [r3, #68] @ 0x44 8012cba: 2b00 cmp r3, #0 8012cbc: f000 81f2 beq.w 80130a4 { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8012cc0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012cc4: f003 0320 and.w r3, r3, #32 8012cc8: 2b00 cmp r3, #0 8012cca: d008 beq.n 8012cde 8012ccc: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012cd0: f003 0320 and.w r3, r3, #32 8012cd4: 2b00 cmp r3, #0 8012cd6: d002 beq.n 8012cde { UART_Receive_IT(huart); 8012cd8: 6878 ldr r0, [r7, #4] 8012cda: f000 fb7c bl 80133d6 } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8012cde: 687b ldr r3, [r7, #4] 8012ce0: 681b ldr r3, [r3, #0] 8012ce2: 695b ldr r3, [r3, #20] 8012ce4: f003 0340 and.w r3, r3, #64 @ 0x40 8012ce8: 2b00 cmp r3, #0 8012cea: bf14 ite ne 8012cec: 2301 movne r3, #1 8012cee: 2300 moveq r3, #0 8012cf0: b2db uxtb r3, r3 8012cf2: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8012cf6: 687b ldr r3, [r7, #4] 8012cf8: 6c5b ldr r3, [r3, #68] @ 0x44 8012cfa: f003 0308 and.w r3, r3, #8 8012cfe: 2b00 cmp r3, #0 8012d00: d103 bne.n 8012d0a 8012d02: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 8012d06: 2b00 cmp r3, #0 8012d08: d04f beq.n 8012daa { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); 8012d0a: 6878 ldr r0, [r7, #4] 8012d0c: f000 fa26 bl 801315c /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012d10: 687b ldr r3, [r7, #4] 8012d12: 681b ldr r3, [r3, #0] 8012d14: 695b ldr r3, [r3, #20] 8012d16: f003 0340 and.w r3, r3, #64 @ 0x40 8012d1a: 2b00 cmp r3, #0 8012d1c: d041 beq.n 8012da2 { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8012d1e: 687b ldr r3, [r7, #4] 8012d20: 681b ldr r3, [r3, #0] 8012d22: 3314 adds r3, #20 8012d24: f8c7 309c str.w r3, [r7, #156] @ 0x9c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012d28: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 8012d2c: e853 3f00 ldrex r3, [r3] 8012d30: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); 8012d34: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8012d38: f023 0340 bic.w r3, r3, #64 @ 0x40 8012d3c: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 8012d40: 687b ldr r3, [r7, #4] 8012d42: 681b ldr r3, [r3, #0] 8012d44: 3314 adds r3, #20 8012d46: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 8012d4a: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 8012d4e: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012d52: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 8012d56: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 8012d5a: e841 2300 strex r3, r2, [r1] 8012d5e: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); 8012d62: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 8012d66: 2b00 cmp r3, #0 8012d68: d1d9 bne.n 8012d1e /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) 8012d6a: 687b ldr r3, [r7, #4] 8012d6c: 6bdb ldr r3, [r3, #60] @ 0x3c 8012d6e: 2b00 cmp r3, #0 8012d70: d013 beq.n 8012d9a { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8012d72: 687b ldr r3, [r7, #4] 8012d74: 6bdb ldr r3, [r3, #60] @ 0x3c 8012d76: 4a7e ldr r2, [pc, #504] @ (8012f70 ) 8012d78: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8012d7a: 687b ldr r3, [r7, #4] 8012d7c: 6bdb ldr r3, [r3, #60] @ 0x3c 8012d7e: 4618 mov r0, r3 8012d80: f7fd fae4 bl 801034c 8012d84: 4603 mov r3, r0 8012d86: 2b00 cmp r3, #0 8012d88: d016 beq.n 8012db8 { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); 8012d8a: 687b ldr r3, [r7, #4] 8012d8c: 6bdb ldr r3, [r3, #60] @ 0x3c 8012d8e: 6b5b ldr r3, [r3, #52] @ 0x34 8012d90: 687a ldr r2, [r7, #4] 8012d92: 6bd2 ldr r2, [r2, #60] @ 0x3c 8012d94: 4610 mov r0, r2 8012d96: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012d98: e00e b.n 8012db8 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8012d9a: 6878 ldr r0, [r7, #4] 8012d9c: f000 f993 bl 80130c6 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012da0: e00a b.n 8012db8 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8012da2: 6878 ldr r0, [r7, #4] 8012da4: f000 f98f bl 80130c6 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012da8: e006 b.n 8012db8 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8012daa: 6878 ldr r0, [r7, #4] 8012dac: f000 f98b bl 80130c6 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8012db0: 687b ldr r3, [r7, #4] 8012db2: 2200 movs r2, #0 8012db4: 645a str r2, [r3, #68] @ 0x44 } } return; 8012db6: e175 b.n 80130a4 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012db8: bf00 nop return; 8012dba: e173 b.n 80130a4 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8012dbc: 687b ldr r3, [r7, #4] 8012dbe: 6b1b ldr r3, [r3, #48] @ 0x30 8012dc0: 2b01 cmp r3, #1 8012dc2: f040 814f bne.w 8013064 && ((isrflags & USART_SR_IDLE) != 0U) 8012dc6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8012dca: f003 0310 and.w r3, r3, #16 8012dce: 2b00 cmp r3, #0 8012dd0: f000 8148 beq.w 8013064 && ((cr1its & USART_SR_IDLE) != 0U)) 8012dd4: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8012dd8: f003 0310 and.w r3, r3, #16 8012ddc: 2b00 cmp r3, #0 8012dde: f000 8141 beq.w 8013064 { __HAL_UART_CLEAR_IDLEFLAG(huart); 8012de2: 2300 movs r3, #0 8012de4: 60bb str r3, [r7, #8] 8012de6: 687b ldr r3, [r7, #4] 8012de8: 681b ldr r3, [r3, #0] 8012dea: 681b ldr r3, [r3, #0] 8012dec: 60bb str r3, [r7, #8] 8012dee: 687b ldr r3, [r7, #4] 8012df0: 681b ldr r3, [r3, #0] 8012df2: 685b ldr r3, [r3, #4] 8012df4: 60bb str r3, [r7, #8] 8012df6: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8012df8: 687b ldr r3, [r7, #4] 8012dfa: 681b ldr r3, [r3, #0] 8012dfc: 695b ldr r3, [r3, #20] 8012dfe: f003 0340 and.w r3, r3, #64 @ 0x40 8012e02: 2b00 cmp r3, #0 8012e04: f000 80b6 beq.w 8012f74 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); 8012e08: 687b ldr r3, [r7, #4] 8012e0a: 6bdb ldr r3, [r3, #60] @ 0x3c 8012e0c: 681b ldr r3, [r3, #0] 8012e0e: 685b ldr r3, [r3, #4] 8012e10: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) 8012e14: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe 8012e18: 2b00 cmp r3, #0 8012e1a: f000 8145 beq.w 80130a8 && (nb_remaining_rx_data < huart->RxXferSize)) 8012e1e: 687b ldr r3, [r7, #4] 8012e20: 8d9b ldrh r3, [r3, #44] @ 0x2c 8012e22: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 8012e26: 429a cmp r2, r3 8012e28: f080 813e bcs.w 80130a8 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; 8012e2c: 687b ldr r3, [r7, #4] 8012e2e: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 8012e32: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) 8012e34: 687b ldr r3, [r7, #4] 8012e36: 6bdb ldr r3, [r3, #60] @ 0x3c 8012e38: 699b ldr r3, [r3, #24] 8012e3a: 2b20 cmp r3, #32 8012e3c: f000 8088 beq.w 8012f50 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8012e40: 687b ldr r3, [r7, #4] 8012e42: 681b ldr r3, [r3, #0] 8012e44: 330c adds r3, #12 8012e46: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012e4a: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 8012e4e: e853 3f00 ldrex r3, [r3] 8012e52: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); 8012e56: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8012e5a: f423 7380 bic.w r3, r3, #256 @ 0x100 8012e5e: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 8012e62: 687b ldr r3, [r7, #4] 8012e64: 681b ldr r3, [r3, #0] 8012e66: 330c adds r3, #12 8012e68: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 8012e6c: f8c7 2094 str.w r2, [r7, #148] @ 0x94 8012e70: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012e74: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 8012e78: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 8012e7c: e841 2300 strex r3, r2, [r1] 8012e80: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); 8012e84: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8012e88: 2b00 cmp r3, #0 8012e8a: d1d9 bne.n 8012e40 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8012e8c: 687b ldr r3, [r7, #4] 8012e8e: 681b ldr r3, [r3, #0] 8012e90: 3314 adds r3, #20 8012e92: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012e94: 6f7b ldr r3, [r7, #116] @ 0x74 8012e96: e853 3f00 ldrex r3, [r3] 8012e9a: 673b str r3, [r7, #112] @ 0x70 return(result); 8012e9c: 6f3b ldr r3, [r7, #112] @ 0x70 8012e9e: f023 0301 bic.w r3, r3, #1 8012ea2: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8012ea6: 687b ldr r3, [r7, #4] 8012ea8: 681b ldr r3, [r3, #0] 8012eaa: 3314 adds r3, #20 8012eac: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 8012eb0: f8c7 2080 str.w r2, [r7, #128] @ 0x80 8012eb4: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012eb6: 6ff9 ldr r1, [r7, #124] @ 0x7c 8012eb8: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 8012ebc: e841 2300 strex r3, r2, [r1] 8012ec0: 67bb str r3, [r7, #120] @ 0x78 return(result); 8012ec2: 6fbb ldr r3, [r7, #120] @ 0x78 8012ec4: 2b00 cmp r3, #0 8012ec6: d1e1 bne.n 8012e8c /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8012ec8: 687b ldr r3, [r7, #4] 8012eca: 681b ldr r3, [r3, #0] 8012ecc: 3314 adds r3, #20 8012ece: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012ed0: 6e3b ldr r3, [r7, #96] @ 0x60 8012ed2: e853 3f00 ldrex r3, [r3] 8012ed6: 65fb str r3, [r7, #92] @ 0x5c return(result); 8012ed8: 6dfb ldr r3, [r7, #92] @ 0x5c 8012eda: f023 0340 bic.w r3, r3, #64 @ 0x40 8012ede: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 8012ee2: 687b ldr r3, [r7, #4] 8012ee4: 681b ldr r3, [r3, #0] 8012ee6: 3314 adds r3, #20 8012ee8: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 8012eec: 66fa str r2, [r7, #108] @ 0x6c 8012eee: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012ef0: 6eb9 ldr r1, [r7, #104] @ 0x68 8012ef2: 6efa ldr r2, [r7, #108] @ 0x6c 8012ef4: e841 2300 strex r3, r2, [r1] 8012ef8: 667b str r3, [r7, #100] @ 0x64 return(result); 8012efa: 6e7b ldr r3, [r7, #100] @ 0x64 8012efc: 2b00 cmp r3, #0 8012efe: d1e3 bne.n 8012ec8 /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8012f00: 687b ldr r3, [r7, #4] 8012f02: 2220 movs r2, #32 8012f04: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8012f08: 687b ldr r3, [r7, #4] 8012f0a: 2200 movs r2, #0 8012f0c: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8012f0e: 687b ldr r3, [r7, #4] 8012f10: 681b ldr r3, [r3, #0] 8012f12: 330c adds r3, #12 8012f14: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012f16: 6cfb ldr r3, [r7, #76] @ 0x4c 8012f18: e853 3f00 ldrex r3, [r3] 8012f1c: 64bb str r3, [r7, #72] @ 0x48 return(result); 8012f1e: 6cbb ldr r3, [r7, #72] @ 0x48 8012f20: f023 0310 bic.w r3, r3, #16 8012f24: f8c7 30ac str.w r3, [r7, #172] @ 0xac 8012f28: 687b ldr r3, [r7, #4] 8012f2a: 681b ldr r3, [r3, #0] 8012f2c: 330c adds r3, #12 8012f2e: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac 8012f32: 65ba str r2, [r7, #88] @ 0x58 8012f34: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012f36: 6d79 ldr r1, [r7, #84] @ 0x54 8012f38: 6dba ldr r2, [r7, #88] @ 0x58 8012f3a: e841 2300 strex r3, r2, [r1] 8012f3e: 653b str r3, [r7, #80] @ 0x50 return(result); 8012f40: 6d3b ldr r3, [r7, #80] @ 0x50 8012f42: 2b00 cmp r3, #0 8012f44: d1e3 bne.n 8012f0e /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); 8012f46: 687b ldr r3, [r7, #4] 8012f48: 6bdb ldr r3, [r3, #60] @ 0x3c 8012f4a: 4618 mov r0, r3 8012f4c: f7fd f9c3 bl 80102d6 } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 8012f50: 687b ldr r3, [r7, #4] 8012f52: 2202 movs r2, #2 8012f54: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); 8012f56: 687b ldr r3, [r7, #4] 8012f58: 8d9a ldrh r2, [r3, #44] @ 0x2c 8012f5a: 687b ldr r3, [r7, #4] 8012f5c: 8ddb ldrh r3, [r3, #46] @ 0x2e 8012f5e: b29b uxth r3, r3 8012f60: 1ad3 subs r3, r2, r3 8012f62: b29b uxth r3, r3 8012f64: 4619 mov r1, r3 8012f66: 6878 ldr r0, [r7, #4] 8012f68: f7fa fa76 bl 800d458 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 8012f6c: e09c b.n 80130a8 8012f6e: bf00 nop 8012f70: 08013221 .word 0x08013221 else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8012f74: 687b ldr r3, [r7, #4] 8012f76: 8d9a ldrh r2, [r3, #44] @ 0x2c 8012f78: 687b ldr r3, [r7, #4] 8012f7a: 8ddb ldrh r3, [r3, #46] @ 0x2e 8012f7c: b29b uxth r3, r3 8012f7e: 1ad3 subs r3, r2, r3 8012f80: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) 8012f84: 687b ldr r3, [r7, #4] 8012f86: 8ddb ldrh r3, [r3, #46] @ 0x2e 8012f88: b29b uxth r3, r3 8012f8a: 2b00 cmp r3, #0 8012f8c: f000 808e beq.w 80130ac && (nb_rx_data > 0U)) 8012f90: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 8012f94: 2b00 cmp r3, #0 8012f96: f000 8089 beq.w 80130ac { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8012f9a: 687b ldr r3, [r7, #4] 8012f9c: 681b ldr r3, [r3, #0] 8012f9e: 330c adds r3, #12 8012fa0: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012fa2: 6bbb ldr r3, [r7, #56] @ 0x38 8012fa4: e853 3f00 ldrex r3, [r3] 8012fa8: 637b str r3, [r7, #52] @ 0x34 return(result); 8012faa: 6b7b ldr r3, [r7, #52] @ 0x34 8012fac: f423 7390 bic.w r3, r3, #288 @ 0x120 8012fb0: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 8012fb4: 687b ldr r3, [r7, #4] 8012fb6: 681b ldr r3, [r3, #0] 8012fb8: 330c adds r3, #12 8012fba: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 8012fbe: 647a str r2, [r7, #68] @ 0x44 8012fc0: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012fc2: 6c39 ldr r1, [r7, #64] @ 0x40 8012fc4: 6c7a ldr r2, [r7, #68] @ 0x44 8012fc6: e841 2300 strex r3, r2, [r1] 8012fca: 63fb str r3, [r7, #60] @ 0x3c return(result); 8012fcc: 6bfb ldr r3, [r7, #60] @ 0x3c 8012fce: 2b00 cmp r3, #0 8012fd0: d1e3 bne.n 8012f9a /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8012fd2: 687b ldr r3, [r7, #4] 8012fd4: 681b ldr r3, [r3, #0] 8012fd6: 3314 adds r3, #20 8012fd8: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8012fda: 6a7b ldr r3, [r7, #36] @ 0x24 8012fdc: e853 3f00 ldrex r3, [r3] 8012fe0: 623b str r3, [r7, #32] return(result); 8012fe2: 6a3b ldr r3, [r7, #32] 8012fe4: f023 0301 bic.w r3, r3, #1 8012fe8: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 8012fec: 687b ldr r3, [r7, #4] 8012fee: 681b ldr r3, [r3, #0] 8012ff0: 3314 adds r3, #20 8012ff2: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 8012ff6: 633a str r2, [r7, #48] @ 0x30 8012ff8: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8012ffa: 6af9 ldr r1, [r7, #44] @ 0x2c 8012ffc: 6b3a ldr r2, [r7, #48] @ 0x30 8012ffe: e841 2300 strex r3, r2, [r1] 8013002: 62bb str r3, [r7, #40] @ 0x28 return(result); 8013004: 6abb ldr r3, [r7, #40] @ 0x28 8013006: 2b00 cmp r3, #0 8013008: d1e3 bne.n 8012fd2 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 801300a: 687b ldr r3, [r7, #4] 801300c: 2220 movs r2, #32 801300e: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8013012: 687b ldr r3, [r7, #4] 8013014: 2200 movs r2, #0 8013016: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8013018: 687b ldr r3, [r7, #4] 801301a: 681b ldr r3, [r3, #0] 801301c: 330c adds r3, #12 801301e: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8013020: 693b ldr r3, [r7, #16] 8013022: e853 3f00 ldrex r3, [r3] 8013026: 60fb str r3, [r7, #12] return(result); 8013028: 68fb ldr r3, [r7, #12] 801302a: f023 0310 bic.w r3, r3, #16 801302e: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 8013032: 687b ldr r3, [r7, #4] 8013034: 681b ldr r3, [r3, #0] 8013036: 330c adds r3, #12 8013038: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 801303c: 61fa str r2, [r7, #28] 801303e: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013040: 69b9 ldr r1, [r7, #24] 8013042: 69fa ldr r2, [r7, #28] 8013044: e841 2300 strex r3, r2, [r1] 8013048: 617b str r3, [r7, #20] return(result); 801304a: 697b ldr r3, [r7, #20] 801304c: 2b00 cmp r3, #0 801304e: d1e3 bne.n 8013018 /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 8013050: 687b ldr r3, [r7, #4] 8013052: 2202 movs r2, #2 8013054: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); 8013056: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 801305a: 4619 mov r1, r3 801305c: 6878 ldr r0, [r7, #4] 801305e: f7fa f9fb bl 800d458 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 8013062: e023 b.n 80130ac } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8013064: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8013068: f003 0380 and.w r3, r3, #128 @ 0x80 801306c: 2b00 cmp r3, #0 801306e: d009 beq.n 8013084 8013070: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8013074: f003 0380 and.w r3, r3, #128 @ 0x80 8013078: 2b00 cmp r3, #0 801307a: d003 beq.n 8013084 { UART_Transmit_IT(huart); 801307c: 6878 ldr r0, [r7, #4] 801307e: f000 f943 bl 8013308 return; 8013082: e014 b.n 80130ae } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8013084: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8013088: f003 0340 and.w r3, r3, #64 @ 0x40 801308c: 2b00 cmp r3, #0 801308e: d00e beq.n 80130ae 8013090: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8013094: f003 0340 and.w r3, r3, #64 @ 0x40 8013098: 2b00 cmp r3, #0 801309a: d008 beq.n 80130ae { UART_EndTransmit_IT(huart); 801309c: 6878 ldr r0, [r7, #4] 801309e: f000 f982 bl 80133a6 return; 80130a2: e004 b.n 80130ae return; 80130a4: bf00 nop 80130a6: e002 b.n 80130ae return; 80130a8: bf00 nop 80130aa: e000 b.n 80130ae return; 80130ac: bf00 nop } } 80130ae: 37e8 adds r7, #232 @ 0xe8 80130b0: 46bd mov sp, r7 80130b2: bd80 pop {r7, pc} 080130b4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { 80130b4: b480 push {r7} 80130b6: b083 sub sp, #12 80130b8: af00 add r7, sp, #0 80130ba: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } 80130bc: bf00 nop 80130be: 370c adds r7, #12 80130c0: 46bd mov sp, r7 80130c2: bc80 pop {r7} 80130c4: 4770 bx lr 080130c6 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { 80130c6: b480 push {r7} 80130c8: b083 sub sp, #12 80130ca: af00 add r7, sp, #0 80130cc: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } 80130ce: bf00 nop 80130d0: 370c adds r7, #12 80130d2: 46bd mov sp, r7 80130d4: bc80 pop {r7} 80130d6: 4770 bx lr 080130d8 : * @brief UART Abort Complete callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart) { 80130d8: b480 push {r7} 80130da: b083 sub sp, #12 80130dc: af00 add r7, sp, #0 80130de: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_AbortCpltCallback can be implemented in the user file. */ } 80130e0: bf00 nop 80130e2: 370c adds r7, #12 80130e4: 46bd mov sp, r7 80130e6: bc80 pop {r7} 80130e8: 4770 bx lr 080130ea : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 80130ea: b480 push {r7} 80130ec: b085 sub sp, #20 80130ee: af00 add r7, sp, #0 80130f0: 60f8 str r0, [r7, #12] 80130f2: 60b9 str r1, [r7, #8] 80130f4: 4613 mov r3, r2 80130f6: 80fb strh r3, [r7, #6] huart->pRxBuffPtr = pData; 80130f8: 68fb ldr r3, [r7, #12] 80130fa: 68ba ldr r2, [r7, #8] 80130fc: 629a str r2, [r3, #40] @ 0x28 huart->RxXferSize = Size; 80130fe: 68fb ldr r3, [r7, #12] 8013100: 88fa ldrh r2, [r7, #6] 8013102: 859a strh r2, [r3, #44] @ 0x2c huart->RxXferCount = Size; 8013104: 68fb ldr r3, [r7, #12] 8013106: 88fa ldrh r2, [r7, #6] 8013108: 85da strh r2, [r3, #46] @ 0x2e huart->ErrorCode = HAL_UART_ERROR_NONE; 801310a: 68fb ldr r3, [r7, #12] 801310c: 2200 movs r2, #0 801310e: 645a str r2, [r3, #68] @ 0x44 huart->RxState = HAL_UART_STATE_BUSY_RX; 8013110: 68fb ldr r3, [r7, #12] 8013112: 2222 movs r2, #34 @ 0x22 8013114: f883 2042 strb.w r2, [r3, #66] @ 0x42 if (huart->Init.Parity != UART_PARITY_NONE) 8013118: 68fb ldr r3, [r7, #12] 801311a: 691b ldr r3, [r3, #16] 801311c: 2b00 cmp r3, #0 801311e: d007 beq.n 8013130 { /* Enable the UART Parity Error Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8013120: 68fb ldr r3, [r7, #12] 8013122: 681b ldr r3, [r3, #0] 8013124: 68da ldr r2, [r3, #12] 8013126: 68fb ldr r3, [r7, #12] 8013128: 681b ldr r3, [r3, #0] 801312a: f442 7280 orr.w r2, r2, #256 @ 0x100 801312e: 60da str r2, [r3, #12] } /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8013130: 68fb ldr r3, [r7, #12] 8013132: 681b ldr r3, [r3, #0] 8013134: 695a ldr r2, [r3, #20] 8013136: 68fb ldr r3, [r7, #12] 8013138: 681b ldr r3, [r3, #0] 801313a: f042 0201 orr.w r2, r2, #1 801313e: 615a str r2, [r3, #20] /* Enable the UART Data Register not empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 8013140: 68fb ldr r3, [r7, #12] 8013142: 681b ldr r3, [r3, #0] 8013144: 68da ldr r2, [r3, #12] 8013146: 68fb ldr r3, [r7, #12] 8013148: 681b ldr r3, [r3, #0] 801314a: f042 0220 orr.w r2, r2, #32 801314e: 60da str r2, [r3, #12] return HAL_OK; 8013150: 2300 movs r3, #0 } 8013152: 4618 mov r0, r3 8013154: 3714 adds r7, #20 8013156: 46bd mov sp, r7 8013158: bc80 pop {r7} 801315a: 4770 bx lr 0801315c : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 801315c: b480 push {r7} 801315e: b095 sub sp, #84 @ 0x54 8013160: af00 add r7, sp, #0 8013162: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8013164: 687b ldr r3, [r7, #4] 8013166: 681b ldr r3, [r3, #0] 8013168: 330c adds r3, #12 801316a: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 801316c: 6b7b ldr r3, [r7, #52] @ 0x34 801316e: e853 3f00 ldrex r3, [r3] 8013172: 633b str r3, [r7, #48] @ 0x30 return(result); 8013174: 6b3b ldr r3, [r7, #48] @ 0x30 8013176: f423 7390 bic.w r3, r3, #288 @ 0x120 801317a: 64fb str r3, [r7, #76] @ 0x4c 801317c: 687b ldr r3, [r7, #4] 801317e: 681b ldr r3, [r3, #0] 8013180: 330c adds r3, #12 8013182: 6cfa ldr r2, [r7, #76] @ 0x4c 8013184: 643a str r2, [r7, #64] @ 0x40 8013186: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8013188: 6bf9 ldr r1, [r7, #60] @ 0x3c 801318a: 6c3a ldr r2, [r7, #64] @ 0x40 801318c: e841 2300 strex r3, r2, [r1] 8013190: 63bb str r3, [r7, #56] @ 0x38 return(result); 8013192: 6bbb ldr r3, [r7, #56] @ 0x38 8013194: 2b00 cmp r3, #0 8013196: d1e5 bne.n 8013164 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8013198: 687b ldr r3, [r7, #4] 801319a: 681b ldr r3, [r3, #0] 801319c: 3314 adds r3, #20 801319e: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80131a0: 6a3b ldr r3, [r7, #32] 80131a2: e853 3f00 ldrex r3, [r3] 80131a6: 61fb str r3, [r7, #28] return(result); 80131a8: 69fb ldr r3, [r7, #28] 80131aa: f023 0301 bic.w r3, r3, #1 80131ae: 64bb str r3, [r7, #72] @ 0x48 80131b0: 687b ldr r3, [r7, #4] 80131b2: 681b ldr r3, [r3, #0] 80131b4: 3314 adds r3, #20 80131b6: 6cba ldr r2, [r7, #72] @ 0x48 80131b8: 62fa str r2, [r7, #44] @ 0x2c 80131ba: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80131bc: 6ab9 ldr r1, [r7, #40] @ 0x28 80131be: 6afa ldr r2, [r7, #44] @ 0x2c 80131c0: e841 2300 strex r3, r2, [r1] 80131c4: 627b str r3, [r7, #36] @ 0x24 return(result); 80131c6: 6a7b ldr r3, [r7, #36] @ 0x24 80131c8: 2b00 cmp r3, #0 80131ca: d1e5 bne.n 8013198 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 80131cc: 687b ldr r3, [r7, #4] 80131ce: 6b1b ldr r3, [r3, #48] @ 0x30 80131d0: 2b01 cmp r3, #1 80131d2: d119 bne.n 8013208 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 80131d4: 687b ldr r3, [r7, #4] 80131d6: 681b ldr r3, [r3, #0] 80131d8: 330c adds r3, #12 80131da: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80131dc: 68fb ldr r3, [r7, #12] 80131de: e853 3f00 ldrex r3, [r3] 80131e2: 60bb str r3, [r7, #8] return(result); 80131e4: 68bb ldr r3, [r7, #8] 80131e6: f023 0310 bic.w r3, r3, #16 80131ea: 647b str r3, [r7, #68] @ 0x44 80131ec: 687b ldr r3, [r7, #4] 80131ee: 681b ldr r3, [r3, #0] 80131f0: 330c adds r3, #12 80131f2: 6c7a ldr r2, [r7, #68] @ 0x44 80131f4: 61ba str r2, [r7, #24] 80131f6: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80131f8: 6979 ldr r1, [r7, #20] 80131fa: 69ba ldr r2, [r7, #24] 80131fc: e841 2300 strex r3, r2, [r1] 8013200: 613b str r3, [r7, #16] return(result); 8013202: 693b ldr r3, [r7, #16] 8013204: 2b00 cmp r3, #0 8013206: d1e5 bne.n 80131d4 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8013208: 687b ldr r3, [r7, #4] 801320a: 2220 movs r2, #32 801320c: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8013210: 687b ldr r3, [r7, #4] 8013212: 2200 movs r2, #0 8013214: 631a str r2, [r3, #48] @ 0x30 } 8013216: bf00 nop 8013218: 3754 adds r7, #84 @ 0x54 801321a: 46bd mov sp, r7 801321c: bc80 pop {r7} 801321e: 4770 bx lr 08013220 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { 8013220: b580 push {r7, lr} 8013222: b084 sub sp, #16 8013224: af00 add r7, sp, #0 8013226: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8013228: 687b ldr r3, [r7, #4] 801322a: 6a5b ldr r3, [r3, #36] @ 0x24 801322c: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; 801322e: 68fb ldr r3, [r7, #12] 8013230: 2200 movs r2, #0 8013232: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; 8013234: 68fb ldr r3, [r7, #12] 8013236: 2200 movs r2, #0 8013238: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 801323a: 68f8 ldr r0, [r7, #12] 801323c: f7ff ff43 bl 80130c6 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8013240: bf00 nop 8013242: 3710 adds r7, #16 8013244: 46bd mov sp, r7 8013246: bd80 pop {r7, pc} 08013248 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) { 8013248: b580 push {r7, lr} 801324a: b084 sub sp, #16 801324c: af00 add r7, sp, #0 801324e: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8013250: 687b ldr r3, [r7, #4] 8013252: 6a5b ldr r3, [r3, #36] @ 0x24 8013254: 60fb str r3, [r7, #12] huart->hdmatx->XferAbortCallback = NULL; 8013256: 68fb ldr r3, [r7, #12] 8013258: 6b9b ldr r3, [r3, #56] @ 0x38 801325a: 2200 movs r2, #0 801325c: 635a str r2, [r3, #52] @ 0x34 /* Check if an Abort process is still ongoing */ if (huart->hdmarx != NULL) 801325e: 68fb ldr r3, [r7, #12] 8013260: 6bdb ldr r3, [r3, #60] @ 0x3c 8013262: 2b00 cmp r3, #0 8013264: d004 beq.n 8013270 { if (huart->hdmarx->XferAbortCallback != NULL) 8013266: 68fb ldr r3, [r7, #12] 8013268: 6bdb ldr r3, [r3, #60] @ 0x3c 801326a: 6b5b ldr r3, [r3, #52] @ 0x34 801326c: 2b00 cmp r3, #0 801326e: d117 bne.n 80132a0 return; } } /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ huart->TxXferCount = 0x00U; 8013270: 68fb ldr r3, [r7, #12] 8013272: 2200 movs r2, #0 8013274: 84da strh r2, [r3, #38] @ 0x26 huart->RxXferCount = 0x00U; 8013276: 68fb ldr r3, [r7, #12] 8013278: 2200 movs r2, #0 801327a: 85da strh r2, [r3, #46] @ 0x2e /* Reset ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 801327c: 68fb ldr r3, [r7, #12] 801327e: 2200 movs r2, #0 8013280: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState and huart->RxState to Ready */ huart->gState = HAL_UART_STATE_READY; 8013282: 68fb ldr r3, [r7, #12] 8013284: 2220 movs r2, #32 8013286: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 801328a: 68fb ldr r3, [r7, #12] 801328c: 2220 movs r2, #32 801328e: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8013292: 68fb ldr r3, [r7, #12] 8013294: 2200 movs r2, #0 8013296: 631a str r2, [r3, #48] @ 0x30 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Abort complete callback */ huart->AbortCpltCallback(huart); #else /* Call legacy weak Abort complete callback */ HAL_UART_AbortCpltCallback(huart); 8013298: 68f8 ldr r0, [r7, #12] 801329a: f7ff ff1d bl 80130d8 801329e: e000 b.n 80132a2 return; 80132a0: bf00 nop #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 80132a2: 3710 adds r7, #16 80132a4: 46bd mov sp, r7 80132a6: bd80 pop {r7, pc} 080132a8 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) { 80132a8: b580 push {r7, lr} 80132aa: b084 sub sp, #16 80132ac: af00 add r7, sp, #0 80132ae: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 80132b0: 687b ldr r3, [r7, #4] 80132b2: 6a5b ldr r3, [r3, #36] @ 0x24 80132b4: 60fb str r3, [r7, #12] huart->hdmarx->XferAbortCallback = NULL; 80132b6: 68fb ldr r3, [r7, #12] 80132b8: 6bdb ldr r3, [r3, #60] @ 0x3c 80132ba: 2200 movs r2, #0 80132bc: 635a str r2, [r3, #52] @ 0x34 /* Check if an Abort process is still ongoing */ if (huart->hdmatx != NULL) 80132be: 68fb ldr r3, [r7, #12] 80132c0: 6b9b ldr r3, [r3, #56] @ 0x38 80132c2: 2b00 cmp r3, #0 80132c4: d004 beq.n 80132d0 { if (huart->hdmatx->XferAbortCallback != NULL) 80132c6: 68fb ldr r3, [r7, #12] 80132c8: 6b9b ldr r3, [r3, #56] @ 0x38 80132ca: 6b5b ldr r3, [r3, #52] @ 0x34 80132cc: 2b00 cmp r3, #0 80132ce: d117 bne.n 8013300 return; } } /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ huart->TxXferCount = 0x00U; 80132d0: 68fb ldr r3, [r7, #12] 80132d2: 2200 movs r2, #0 80132d4: 84da strh r2, [r3, #38] @ 0x26 huart->RxXferCount = 0x00U; 80132d6: 68fb ldr r3, [r7, #12] 80132d8: 2200 movs r2, #0 80132da: 85da strh r2, [r3, #46] @ 0x2e /* Reset ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 80132dc: 68fb ldr r3, [r7, #12] 80132de: 2200 movs r2, #0 80132e0: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState and huart->RxState to Ready */ huart->gState = HAL_UART_STATE_READY; 80132e2: 68fb ldr r3, [r7, #12] 80132e4: 2220 movs r2, #32 80132e6: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 80132ea: 68fb ldr r3, [r7, #12] 80132ec: 2220 movs r2, #32 80132ee: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80132f2: 68fb ldr r3, [r7, #12] 80132f4: 2200 movs r2, #0 80132f6: 631a str r2, [r3, #48] @ 0x30 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Abort complete callback */ huart->AbortCpltCallback(huart); #else /* Call legacy weak Abort complete callback */ HAL_UART_AbortCpltCallback(huart); 80132f8: 68f8 ldr r0, [r7, #12] 80132fa: f7ff feed bl 80130d8 80132fe: e000 b.n 8013302 return; 8013300: bf00 nop #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8013302: 3710 adds r7, #16 8013304: 46bd mov sp, r7 8013306: bd80 pop {r7, pc} 08013308 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { 8013308: b480 push {r7} 801330a: b085 sub sp, #20 801330c: af00 add r7, sp, #0 801330e: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) 8013310: 687b ldr r3, [r7, #4] 8013312: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8013316: b2db uxtb r3, r3 8013318: 2b21 cmp r3, #33 @ 0x21 801331a: d13e bne.n 801339a { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 801331c: 687b ldr r3, [r7, #4] 801331e: 689b ldr r3, [r3, #8] 8013320: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8013324: d114 bne.n 8013350 8013326: 687b ldr r3, [r7, #4] 8013328: 691b ldr r3, [r3, #16] 801332a: 2b00 cmp r3, #0 801332c: d110 bne.n 8013350 { tmp = (const uint16_t *) huart->pTxBuffPtr; 801332e: 687b ldr r3, [r7, #4] 8013330: 6a1b ldr r3, [r3, #32] 8013332: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8013334: 68fb ldr r3, [r7, #12] 8013336: 881b ldrh r3, [r3, #0] 8013338: 461a mov r2, r3 801333a: 687b ldr r3, [r7, #4] 801333c: 681b ldr r3, [r3, #0] 801333e: f3c2 0208 ubfx r2, r2, #0, #9 8013342: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; 8013344: 687b ldr r3, [r7, #4] 8013346: 6a1b ldr r3, [r3, #32] 8013348: 1c9a adds r2, r3, #2 801334a: 687b ldr r3, [r7, #4] 801334c: 621a str r2, [r3, #32] 801334e: e008 b.n 8013362 } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8013350: 687b ldr r3, [r7, #4] 8013352: 6a1b ldr r3, [r3, #32] 8013354: 1c59 adds r1, r3, #1 8013356: 687a ldr r2, [r7, #4] 8013358: 6211 str r1, [r2, #32] 801335a: 781a ldrb r2, [r3, #0] 801335c: 687b ldr r3, [r7, #4] 801335e: 681b ldr r3, [r3, #0] 8013360: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) 8013362: 687b ldr r3, [r7, #4] 8013364: 8cdb ldrh r3, [r3, #38] @ 0x26 8013366: b29b uxth r3, r3 8013368: 3b01 subs r3, #1 801336a: b29b uxth r3, r3 801336c: 687a ldr r2, [r7, #4] 801336e: 4619 mov r1, r3 8013370: 84d1 strh r1, [r2, #38] @ 0x26 8013372: 2b00 cmp r3, #0 8013374: d10f bne.n 8013396 { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8013376: 687b ldr r3, [r7, #4] 8013378: 681b ldr r3, [r3, #0] 801337a: 68da ldr r2, [r3, #12] 801337c: 687b ldr r3, [r7, #4] 801337e: 681b ldr r3, [r3, #0] 8013380: f022 0280 bic.w r2, r2, #128 @ 0x80 8013384: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8013386: 687b ldr r3, [r7, #4] 8013388: 681b ldr r3, [r3, #0] 801338a: 68da ldr r2, [r3, #12] 801338c: 687b ldr r3, [r7, #4] 801338e: 681b ldr r3, [r3, #0] 8013390: f042 0240 orr.w r2, r2, #64 @ 0x40 8013394: 60da str r2, [r3, #12] } return HAL_OK; 8013396: 2300 movs r3, #0 8013398: e000 b.n 801339c } else { return HAL_BUSY; 801339a: 2302 movs r3, #2 } } 801339c: 4618 mov r0, r3 801339e: 3714 adds r7, #20 80133a0: 46bd mov sp, r7 80133a2: bc80 pop {r7} 80133a4: 4770 bx lr 080133a6 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { 80133a6: b580 push {r7, lr} 80133a8: b082 sub sp, #8 80133aa: af00 add r7, sp, #0 80133ac: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80133ae: 687b ldr r3, [r7, #4] 80133b0: 681b ldr r3, [r3, #0] 80133b2: 68da ldr r2, [r3, #12] 80133b4: 687b ldr r3, [r7, #4] 80133b6: 681b ldr r3, [r3, #0] 80133b8: f022 0240 bic.w r2, r2, #64 @ 0x40 80133bc: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 80133be: 687b ldr r3, [r7, #4] 80133c0: 2220 movs r2, #32 80133c2: f883 2041 strb.w r2, [r3, #65] @ 0x41 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); 80133c6: 6878 ldr r0, [r7, #4] 80133c8: f7fa f898 bl 800d4fc #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; 80133cc: 2300 movs r3, #0 } 80133ce: 4618 mov r0, r3 80133d0: 3708 adds r7, #8 80133d2: 46bd mov sp, r7 80133d4: bd80 pop {r7, pc} 080133d6 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { 80133d6: b580 push {r7, lr} 80133d8: b08c sub sp, #48 @ 0x30 80133da: af00 add r7, sp, #0 80133dc: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) 80133de: 687b ldr r3, [r7, #4] 80133e0: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 80133e4: b2db uxtb r3, r3 80133e6: 2b22 cmp r3, #34 @ 0x22 80133e8: f040 80ae bne.w 8013548 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 80133ec: 687b ldr r3, [r7, #4] 80133ee: 689b ldr r3, [r3, #8] 80133f0: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80133f4: d117 bne.n 8013426 80133f6: 687b ldr r3, [r7, #4] 80133f8: 691b ldr r3, [r3, #16] 80133fa: 2b00 cmp r3, #0 80133fc: d113 bne.n 8013426 { pdata8bits = NULL; 80133fe: 2300 movs r3, #0 8013400: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = (uint16_t *) huart->pRxBuffPtr; 8013402: 687b ldr r3, [r7, #4] 8013404: 6a9b ldr r3, [r3, #40] @ 0x28 8013406: 62bb str r3, [r7, #40] @ 0x28 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8013408: 687b ldr r3, [r7, #4] 801340a: 681b ldr r3, [r3, #0] 801340c: 685b ldr r3, [r3, #4] 801340e: b29b uxth r3, r3 8013410: f3c3 0308 ubfx r3, r3, #0, #9 8013414: b29a uxth r2, r3 8013416: 6abb ldr r3, [r7, #40] @ 0x28 8013418: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; 801341a: 687b ldr r3, [r7, #4] 801341c: 6a9b ldr r3, [r3, #40] @ 0x28 801341e: 1c9a adds r2, r3, #2 8013420: 687b ldr r3, [r7, #4] 8013422: 629a str r2, [r3, #40] @ 0x28 8013424: e026 b.n 8013474 } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; 8013426: 687b ldr r3, [r7, #4] 8013428: 6a9b ldr r3, [r3, #40] @ 0x28 801342a: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = NULL; 801342c: 2300 movs r3, #0 801342e: 62bb str r3, [r7, #40] @ 0x28 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) 8013430: 687b ldr r3, [r7, #4] 8013432: 689b ldr r3, [r3, #8] 8013434: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8013438: d007 beq.n 801344a 801343a: 687b ldr r3, [r7, #4] 801343c: 689b ldr r3, [r3, #8] 801343e: 2b00 cmp r3, #0 8013440: d10a bne.n 8013458 8013442: 687b ldr r3, [r7, #4] 8013444: 691b ldr r3, [r3, #16] 8013446: 2b00 cmp r3, #0 8013448: d106 bne.n 8013458 { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 801344a: 687b ldr r3, [r7, #4] 801344c: 681b ldr r3, [r3, #0] 801344e: 685b ldr r3, [r3, #4] 8013450: b2da uxtb r2, r3 8013452: 6afb ldr r3, [r7, #44] @ 0x2c 8013454: 701a strb r2, [r3, #0] 8013456: e008 b.n 801346a } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 8013458: 687b ldr r3, [r7, #4] 801345a: 681b ldr r3, [r3, #0] 801345c: 685b ldr r3, [r3, #4] 801345e: b2db uxtb r3, r3 8013460: f003 037f and.w r3, r3, #127 @ 0x7f 8013464: b2da uxtb r2, r3 8013466: 6afb ldr r3, [r7, #44] @ 0x2c 8013468: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; 801346a: 687b ldr r3, [r7, #4] 801346c: 6a9b ldr r3, [r3, #40] @ 0x28 801346e: 1c5a adds r2, r3, #1 8013470: 687b ldr r3, [r7, #4] 8013472: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) 8013474: 687b ldr r3, [r7, #4] 8013476: 8ddb ldrh r3, [r3, #46] @ 0x2e 8013478: b29b uxth r3, r3 801347a: 3b01 subs r3, #1 801347c: b29b uxth r3, r3 801347e: 687a ldr r2, [r7, #4] 8013480: 4619 mov r1, r3 8013482: 85d1 strh r1, [r2, #46] @ 0x2e 8013484: 2b00 cmp r3, #0 8013486: d15d bne.n 8013544 { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 8013488: 687b ldr r3, [r7, #4] 801348a: 681b ldr r3, [r3, #0] 801348c: 68da ldr r2, [r3, #12] 801348e: 687b ldr r3, [r7, #4] 8013490: 681b ldr r3, [r3, #0] 8013492: f022 0220 bic.w r2, r2, #32 8013496: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 8013498: 687b ldr r3, [r7, #4] 801349a: 681b ldr r3, [r3, #0] 801349c: 68da ldr r2, [r3, #12] 801349e: 687b ldr r3, [r7, #4] 80134a0: 681b ldr r3, [r3, #0] 80134a2: f422 7280 bic.w r2, r2, #256 @ 0x100 80134a6: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80134a8: 687b ldr r3, [r7, #4] 80134aa: 681b ldr r3, [r3, #0] 80134ac: 695a ldr r2, [r3, #20] 80134ae: 687b ldr r3, [r7, #4] 80134b0: 681b ldr r3, [r3, #0] 80134b2: f022 0201 bic.w r2, r2, #1 80134b6: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 80134b8: 687b ldr r3, [r7, #4] 80134ba: 2220 movs r2, #32 80134bc: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Initialize type of RxEvent to Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; 80134c0: 687b ldr r3, [r7, #4] 80134c2: 2200 movs r2, #0 80134c4: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 80134c6: 687b ldr r3, [r7, #4] 80134c8: 6b1b ldr r3, [r3, #48] @ 0x30 80134ca: 2b01 cmp r3, #1 80134cc: d135 bne.n 801353a { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80134ce: 687b ldr r3, [r7, #4] 80134d0: 2200 movs r2, #0 80134d2: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 80134d4: 687b ldr r3, [r7, #4] 80134d6: 681b ldr r3, [r3, #0] 80134d8: 330c adds r3, #12 80134da: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80134dc: 697b ldr r3, [r7, #20] 80134de: e853 3f00 ldrex r3, [r3] 80134e2: 613b str r3, [r7, #16] return(result); 80134e4: 693b ldr r3, [r7, #16] 80134e6: f023 0310 bic.w r3, r3, #16 80134ea: 627b str r3, [r7, #36] @ 0x24 80134ec: 687b ldr r3, [r7, #4] 80134ee: 681b ldr r3, [r3, #0] 80134f0: 330c adds r3, #12 80134f2: 6a7a ldr r2, [r7, #36] @ 0x24 80134f4: 623a str r2, [r7, #32] 80134f6: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80134f8: 69f9 ldr r1, [r7, #28] 80134fa: 6a3a ldr r2, [r7, #32] 80134fc: e841 2300 strex r3, r2, [r1] 8013500: 61bb str r3, [r7, #24] return(result); 8013502: 69bb ldr r3, [r7, #24] 8013504: 2b00 cmp r3, #0 8013506: d1e5 bne.n 80134d4 /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) 8013508: 687b ldr r3, [r7, #4] 801350a: 681b ldr r3, [r3, #0] 801350c: 681b ldr r3, [r3, #0] 801350e: f003 0310 and.w r3, r3, #16 8013512: 2b10 cmp r3, #16 8013514: d10a bne.n 801352c { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); 8013516: 2300 movs r3, #0 8013518: 60fb str r3, [r7, #12] 801351a: 687b ldr r3, [r7, #4] 801351c: 681b ldr r3, [r3, #0] 801351e: 681b ldr r3, [r3, #0] 8013520: 60fb str r3, [r7, #12] 8013522: 687b ldr r3, [r7, #4] 8013524: 681b ldr r3, [r3, #0] 8013526: 685b ldr r3, [r3, #4] 8013528: 60fb str r3, [r7, #12] 801352a: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); 801352c: 687b ldr r3, [r7, #4] 801352e: 8d9b ldrh r3, [r3, #44] @ 0x2c 8013530: 4619 mov r1, r3 8013532: 6878 ldr r0, [r7, #4] 8013534: f7f9 ff90 bl 800d458 8013538: e002 b.n 8013540 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); 801353a: 6878 ldr r0, [r7, #4] 801353c: f7ff fdba bl 80130b4 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; 8013540: 2300 movs r3, #0 8013542: e002 b.n 801354a } return HAL_OK; 8013544: 2300 movs r3, #0 8013546: e000 b.n 801354a } else { return HAL_BUSY; 8013548: 2302 movs r3, #2 } } 801354a: 4618 mov r0, r3 801354c: 3730 adds r7, #48 @ 0x30 801354e: 46bd mov sp, r7 8013550: bd80 pop {r7, pc} ... 08013554 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8013554: b580 push {r7, lr} 8013556: b084 sub sp, #16 8013558: af00 add r7, sp, #0 801355a: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 801355c: 687b ldr r3, [r7, #4] 801355e: 681b ldr r3, [r3, #0] 8013560: 691b ldr r3, [r3, #16] 8013562: f423 5140 bic.w r1, r3, #12288 @ 0x3000 8013566: 687b ldr r3, [r7, #4] 8013568: 68da ldr r2, [r3, #12] 801356a: 687b ldr r3, [r7, #4] 801356c: 681b ldr r3, [r3, #0] 801356e: 430a orrs r2, r1 8013570: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8013572: 687b ldr r3, [r7, #4] 8013574: 689a ldr r2, [r3, #8] 8013576: 687b ldr r3, [r7, #4] 8013578: 691b ldr r3, [r3, #16] 801357a: 431a orrs r2, r3 801357c: 687b ldr r3, [r7, #4] 801357e: 695b ldr r3, [r3, #20] 8013580: 4313 orrs r3, r2 8013582: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 8013584: 687b ldr r3, [r7, #4] 8013586: 681b ldr r3, [r3, #0] 8013588: 68db ldr r3, [r3, #12] 801358a: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 801358e: f023 030c bic.w r3, r3, #12 8013592: 687a ldr r2, [r7, #4] 8013594: 6812 ldr r2, [r2, #0] 8013596: 68b9 ldr r1, [r7, #8] 8013598: 430b orrs r3, r1 801359a: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 801359c: 687b ldr r3, [r7, #4] 801359e: 681b ldr r3, [r3, #0] 80135a0: 695b ldr r3, [r3, #20] 80135a2: f423 7140 bic.w r1, r3, #768 @ 0x300 80135a6: 687b ldr r3, [r7, #4] 80135a8: 699a ldr r2, [r3, #24] 80135aa: 687b ldr r3, [r7, #4] 80135ac: 681b ldr r3, [r3, #0] 80135ae: 430a orrs r2, r1 80135b0: 615a str r2, [r3, #20] if(huart->Instance == USART1) 80135b2: 687b ldr r3, [r7, #4] 80135b4: 681b ldr r3, [r3, #0] 80135b6: 4a2c ldr r2, [pc, #176] @ (8013668 ) 80135b8: 4293 cmp r3, r2 80135ba: d103 bne.n 80135c4 { pclk = HAL_RCC_GetPCLK2Freq(); 80135bc: f7fd ff38 bl 8011430 80135c0: 60f8 str r0, [r7, #12] 80135c2: e002 b.n 80135ca } else { pclk = HAL_RCC_GetPCLK1Freq(); 80135c4: f7fd ff20 bl 8011408 80135c8: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 80135ca: 68fa ldr r2, [r7, #12] 80135cc: 4613 mov r3, r2 80135ce: 009b lsls r3, r3, #2 80135d0: 4413 add r3, r2 80135d2: 009a lsls r2, r3, #2 80135d4: 441a add r2, r3 80135d6: 687b ldr r3, [r7, #4] 80135d8: 685b ldr r3, [r3, #4] 80135da: 009b lsls r3, r3, #2 80135dc: fbb2 f3f3 udiv r3, r2, r3 80135e0: 4a22 ldr r2, [pc, #136] @ (801366c ) 80135e2: fba2 2303 umull r2, r3, r2, r3 80135e6: 095b lsrs r3, r3, #5 80135e8: 0119 lsls r1, r3, #4 80135ea: 68fa ldr r2, [r7, #12] 80135ec: 4613 mov r3, r2 80135ee: 009b lsls r3, r3, #2 80135f0: 4413 add r3, r2 80135f2: 009a lsls r2, r3, #2 80135f4: 441a add r2, r3 80135f6: 687b ldr r3, [r7, #4] 80135f8: 685b ldr r3, [r3, #4] 80135fa: 009b lsls r3, r3, #2 80135fc: fbb2 f2f3 udiv r2, r2, r3 8013600: 4b1a ldr r3, [pc, #104] @ (801366c ) 8013602: fba3 0302 umull r0, r3, r3, r2 8013606: 095b lsrs r3, r3, #5 8013608: 2064 movs r0, #100 @ 0x64 801360a: fb00 f303 mul.w r3, r0, r3 801360e: 1ad3 subs r3, r2, r3 8013610: 011b lsls r3, r3, #4 8013612: 3332 adds r3, #50 @ 0x32 8013614: 4a15 ldr r2, [pc, #84] @ (801366c ) 8013616: fba2 2303 umull r2, r3, r2, r3 801361a: 095b lsrs r3, r3, #5 801361c: f003 03f0 and.w r3, r3, #240 @ 0xf0 8013620: 4419 add r1, r3 8013622: 68fa ldr r2, [r7, #12] 8013624: 4613 mov r3, r2 8013626: 009b lsls r3, r3, #2 8013628: 4413 add r3, r2 801362a: 009a lsls r2, r3, #2 801362c: 441a add r2, r3 801362e: 687b ldr r3, [r7, #4] 8013630: 685b ldr r3, [r3, #4] 8013632: 009b lsls r3, r3, #2 8013634: fbb2 f2f3 udiv r2, r2, r3 8013638: 4b0c ldr r3, [pc, #48] @ (801366c ) 801363a: fba3 0302 umull r0, r3, r3, r2 801363e: 095b lsrs r3, r3, #5 8013640: 2064 movs r0, #100 @ 0x64 8013642: fb00 f303 mul.w r3, r0, r3 8013646: 1ad3 subs r3, r2, r3 8013648: 011b lsls r3, r3, #4 801364a: 3332 adds r3, #50 @ 0x32 801364c: 4a07 ldr r2, [pc, #28] @ (801366c ) 801364e: fba2 2303 umull r2, r3, r2, r3 8013652: 095b lsrs r3, r3, #5 8013654: f003 020f and.w r2, r3, #15 8013658: 687b ldr r3, [r7, #4] 801365a: 681b ldr r3, [r3, #0] 801365c: 440a add r2, r1 801365e: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 8013660: bf00 nop 8013662: 3710 adds r7, #16 8013664: 46bd mov sp, r7 8013666: bd80 pop {r7, pc} 8013668: 40013800 .word 0x40013800 801366c: 51eb851f .word 0x51eb851f 08013670 <__cvt>: 8013670: 2b00 cmp r3, #0 8013672: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8013676: 461d mov r5, r3 8013678: bfbb ittet lt 801367a: f103 4300 addlt.w r3, r3, #2147483648 @ 0x80000000 801367e: 461d movlt r5, r3 8013680: 2300 movge r3, #0 8013682: 232d movlt r3, #45 @ 0x2d 8013684: b088 sub sp, #32 8013686: 4614 mov r4, r2 8013688: bfb8 it lt 801368a: 4614 movlt r4, r2 801368c: 9a12 ldr r2, [sp, #72] @ 0x48 801368e: 9e10 ldr r6, [sp, #64] @ 0x40 8013690: 7013 strb r3, [r2, #0] 8013692: 9b14 ldr r3, [sp, #80] @ 0x50 8013694: f8dd a04c ldr.w sl, [sp, #76] @ 0x4c 8013698: f023 0820 bic.w r8, r3, #32 801369c: f1b8 0f46 cmp.w r8, #70 @ 0x46 80136a0: d005 beq.n 80136ae <__cvt+0x3e> 80136a2: f1b8 0f45 cmp.w r8, #69 @ 0x45 80136a6: d100 bne.n 80136aa <__cvt+0x3a> 80136a8: 3601 adds r6, #1 80136aa: 2302 movs r3, #2 80136ac: e000 b.n 80136b0 <__cvt+0x40> 80136ae: 2303 movs r3, #3 80136b0: aa07 add r2, sp, #28 80136b2: 9204 str r2, [sp, #16] 80136b4: aa06 add r2, sp, #24 80136b6: e9cd a202 strd sl, r2, [sp, #8] 80136ba: e9cd 3600 strd r3, r6, [sp] 80136be: 4622 mov r2, r4 80136c0: 462b mov r3, r5 80136c2: f000 ff01 bl 80144c8 <_dtoa_r> 80136c6: f1b8 0f47 cmp.w r8, #71 @ 0x47 80136ca: 4607 mov r7, r0 80136cc: d119 bne.n 8013702 <__cvt+0x92> 80136ce: 9b11 ldr r3, [sp, #68] @ 0x44 80136d0: 07db lsls r3, r3, #31 80136d2: d50e bpl.n 80136f2 <__cvt+0x82> 80136d4: eb00 0906 add.w r9, r0, r6 80136d8: 2200 movs r2, #0 80136da: 2300 movs r3, #0 80136dc: 4620 mov r0, r4 80136de: 4629 mov r1, r5 80136e0: f7f5 f9ce bl 8008a80 <__aeabi_dcmpeq> 80136e4: b108 cbz r0, 80136ea <__cvt+0x7a> 80136e6: f8cd 901c str.w r9, [sp, #28] 80136ea: 2230 movs r2, #48 @ 0x30 80136ec: 9b07 ldr r3, [sp, #28] 80136ee: 454b cmp r3, r9 80136f0: d31e bcc.n 8013730 <__cvt+0xc0> 80136f2: 4638 mov r0, r7 80136f4: 9b07 ldr r3, [sp, #28] 80136f6: 9a15 ldr r2, [sp, #84] @ 0x54 80136f8: 1bdb subs r3, r3, r7 80136fa: 6013 str r3, [r2, #0] 80136fc: b008 add sp, #32 80136fe: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8013702: f1b8 0f46 cmp.w r8, #70 @ 0x46 8013706: eb00 0906 add.w r9, r0, r6 801370a: d1e5 bne.n 80136d8 <__cvt+0x68> 801370c: 7803 ldrb r3, [r0, #0] 801370e: 2b30 cmp r3, #48 @ 0x30 8013710: d10a bne.n 8013728 <__cvt+0xb8> 8013712: 2200 movs r2, #0 8013714: 2300 movs r3, #0 8013716: 4620 mov r0, r4 8013718: 4629 mov r1, r5 801371a: f7f5 f9b1 bl 8008a80 <__aeabi_dcmpeq> 801371e: b918 cbnz r0, 8013728 <__cvt+0xb8> 8013720: f1c6 0601 rsb r6, r6, #1 8013724: f8ca 6000 str.w r6, [sl] 8013728: f8da 3000 ldr.w r3, [sl] 801372c: 4499 add r9, r3 801372e: e7d3 b.n 80136d8 <__cvt+0x68> 8013730: 1c59 adds r1, r3, #1 8013732: 9107 str r1, [sp, #28] 8013734: 701a strb r2, [r3, #0] 8013736: e7d9 b.n 80136ec <__cvt+0x7c> 08013738 <__exponent>: 8013738: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 801373a: 2900 cmp r1, #0 801373c: bfb6 itet lt 801373e: 232d movlt r3, #45 @ 0x2d 8013740: 232b movge r3, #43 @ 0x2b 8013742: 4249 neglt r1, r1 8013744: 2909 cmp r1, #9 8013746: 7002 strb r2, [r0, #0] 8013748: 7043 strb r3, [r0, #1] 801374a: dd29 ble.n 80137a0 <__exponent+0x68> 801374c: f10d 0307 add.w r3, sp, #7 8013750: 461d mov r5, r3 8013752: 270a movs r7, #10 8013754: fbb1 f6f7 udiv r6, r1, r7 8013758: 461a mov r2, r3 801375a: fb07 1416 mls r4, r7, r6, r1 801375e: 3430 adds r4, #48 @ 0x30 8013760: f802 4c01 strb.w r4, [r2, #-1] 8013764: 460c mov r4, r1 8013766: 2c63 cmp r4, #99 @ 0x63 8013768: 4631 mov r1, r6 801376a: f103 33ff add.w r3, r3, #4294967295 @ 0xffffffff 801376e: dcf1 bgt.n 8013754 <__exponent+0x1c> 8013770: 3130 adds r1, #48 @ 0x30 8013772: 1e94 subs r4, r2, #2 8013774: f803 1c01 strb.w r1, [r3, #-1] 8013778: 4623 mov r3, r4 801377a: 1c41 adds r1, r0, #1 801377c: 42ab cmp r3, r5 801377e: d30a bcc.n 8013796 <__exponent+0x5e> 8013780: f10d 0309 add.w r3, sp, #9 8013784: 1a9b subs r3, r3, r2 8013786: 42ac cmp r4, r5 8013788: bf88 it hi 801378a: 2300 movhi r3, #0 801378c: 3302 adds r3, #2 801378e: 4403 add r3, r0 8013790: 1a18 subs r0, r3, r0 8013792: b003 add sp, #12 8013794: bdf0 pop {r4, r5, r6, r7, pc} 8013796: f813 6b01 ldrb.w r6, [r3], #1 801379a: f801 6f01 strb.w r6, [r1, #1]! 801379e: e7ed b.n 801377c <__exponent+0x44> 80137a0: 2330 movs r3, #48 @ 0x30 80137a2: 3130 adds r1, #48 @ 0x30 80137a4: 7083 strb r3, [r0, #2] 80137a6: 70c1 strb r1, [r0, #3] 80137a8: 1d03 adds r3, r0, #4 80137aa: e7f1 b.n 8013790 <__exponent+0x58> 080137ac <_printf_float>: 80137ac: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80137b0: b091 sub sp, #68 @ 0x44 80137b2: 460c mov r4, r1 80137b4: f8dd 8068 ldr.w r8, [sp, #104] @ 0x68 80137b8: 4616 mov r6, r2 80137ba: 461f mov r7, r3 80137bc: 4605 mov r5, r0 80137be: f000 fdbd bl 801433c <_localeconv_r> 80137c2: 6803 ldr r3, [r0, #0] 80137c4: 4618 mov r0, r3 80137c6: 9308 str r3, [sp, #32] 80137c8: f7f4 fd2e bl 8008228 80137cc: 2300 movs r3, #0 80137ce: 930e str r3, [sp, #56] @ 0x38 80137d0: f8d8 3000 ldr.w r3, [r8] 80137d4: 9009 str r0, [sp, #36] @ 0x24 80137d6: 3307 adds r3, #7 80137d8: f023 0307 bic.w r3, r3, #7 80137dc: f103 0208 add.w r2, r3, #8 80137e0: f894 a018 ldrb.w sl, [r4, #24] 80137e4: f8d4 b000 ldr.w fp, [r4] 80137e8: f8c8 2000 str.w r2, [r8] 80137ec: e9d3 8900 ldrd r8, r9, [r3] 80137f0: f029 4300 bic.w r3, r9, #2147483648 @ 0x80000000 80137f4: 930b str r3, [sp, #44] @ 0x2c 80137f6: f8cd 8028 str.w r8, [sp, #40] @ 0x28 80137fa: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80137fe: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 8013802: e9c4 8912 strd r8, r9, [r4, #72] @ 0x48 8013806: 4b9c ldr r3, [pc, #624] @ (8013a78 <_printf_float+0x2cc>) 8013808: f7f5 f96c bl 8008ae4 <__aeabi_dcmpun> 801380c: bb70 cbnz r0, 801386c <_printf_float+0xc0> 801380e: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 8013812: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8013816: 4b98 ldr r3, [pc, #608] @ (8013a78 <_printf_float+0x2cc>) 8013818: f7f5 f946 bl 8008aa8 <__aeabi_dcmple> 801381c: bb30 cbnz r0, 801386c <_printf_float+0xc0> 801381e: 2200 movs r2, #0 8013820: 2300 movs r3, #0 8013822: 4640 mov r0, r8 8013824: 4649 mov r1, r9 8013826: f7f5 f935 bl 8008a94 <__aeabi_dcmplt> 801382a: b110 cbz r0, 8013832 <_printf_float+0x86> 801382c: 232d movs r3, #45 @ 0x2d 801382e: f884 3043 strb.w r3, [r4, #67] @ 0x43 8013832: 4a92 ldr r2, [pc, #584] @ (8013a7c <_printf_float+0x2d0>) 8013834: 4b92 ldr r3, [pc, #584] @ (8013a80 <_printf_float+0x2d4>) 8013836: f1ba 0f47 cmp.w sl, #71 @ 0x47 801383a: bf8c ite hi 801383c: 4690 movhi r8, r2 801383e: 4698 movls r8, r3 8013840: 2303 movs r3, #3 8013842: f04f 0900 mov.w r9, #0 8013846: 6123 str r3, [r4, #16] 8013848: f02b 0304 bic.w r3, fp, #4 801384c: 6023 str r3, [r4, #0] 801384e: 4633 mov r3, r6 8013850: 4621 mov r1, r4 8013852: 4628 mov r0, r5 8013854: 9700 str r7, [sp, #0] 8013856: aa0f add r2, sp, #60 @ 0x3c 8013858: f000 f9d4 bl 8013c04 <_printf_common> 801385c: 3001 adds r0, #1 801385e: f040 8090 bne.w 8013982 <_printf_float+0x1d6> 8013862: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013866: b011 add sp, #68 @ 0x44 8013868: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 801386c: 4642 mov r2, r8 801386e: 464b mov r3, r9 8013870: 4640 mov r0, r8 8013872: 4649 mov r1, r9 8013874: f7f5 f936 bl 8008ae4 <__aeabi_dcmpun> 8013878: b148 cbz r0, 801388e <_printf_float+0xe2> 801387a: 464b mov r3, r9 801387c: 2b00 cmp r3, #0 801387e: bfb8 it lt 8013880: 232d movlt r3, #45 @ 0x2d 8013882: 4a80 ldr r2, [pc, #512] @ (8013a84 <_printf_float+0x2d8>) 8013884: bfb8 it lt 8013886: f884 3043 strblt.w r3, [r4, #67] @ 0x43 801388a: 4b7f ldr r3, [pc, #508] @ (8013a88 <_printf_float+0x2dc>) 801388c: e7d3 b.n 8013836 <_printf_float+0x8a> 801388e: 6863 ldr r3, [r4, #4] 8013890: f00a 01df and.w r1, sl, #223 @ 0xdf 8013894: 1c5a adds r2, r3, #1 8013896: d13f bne.n 8013918 <_printf_float+0x16c> 8013898: 2306 movs r3, #6 801389a: 6063 str r3, [r4, #4] 801389c: 2200 movs r2, #0 801389e: f44b 6380 orr.w r3, fp, #1024 @ 0x400 80138a2: 6023 str r3, [r4, #0] 80138a4: 9206 str r2, [sp, #24] 80138a6: aa0e add r2, sp, #56 @ 0x38 80138a8: e9cd a204 strd sl, r2, [sp, #16] 80138ac: aa0d add r2, sp, #52 @ 0x34 80138ae: 9203 str r2, [sp, #12] 80138b0: f10d 0233 add.w r2, sp, #51 @ 0x33 80138b4: e9cd 3201 strd r3, r2, [sp, #4] 80138b8: 6863 ldr r3, [r4, #4] 80138ba: 4642 mov r2, r8 80138bc: 9300 str r3, [sp, #0] 80138be: 4628 mov r0, r5 80138c0: 464b mov r3, r9 80138c2: 910a str r1, [sp, #40] @ 0x28 80138c4: f7ff fed4 bl 8013670 <__cvt> 80138c8: 990a ldr r1, [sp, #40] @ 0x28 80138ca: 4680 mov r8, r0 80138cc: 2947 cmp r1, #71 @ 0x47 80138ce: 990d ldr r1, [sp, #52] @ 0x34 80138d0: d128 bne.n 8013924 <_printf_float+0x178> 80138d2: 1cc8 adds r0, r1, #3 80138d4: db02 blt.n 80138dc <_printf_float+0x130> 80138d6: 6863 ldr r3, [r4, #4] 80138d8: 4299 cmp r1, r3 80138da: dd40 ble.n 801395e <_printf_float+0x1b2> 80138dc: f1aa 0a02 sub.w sl, sl, #2 80138e0: fa5f fa8a uxtb.w sl, sl 80138e4: 4652 mov r2, sl 80138e6: 3901 subs r1, #1 80138e8: f104 0050 add.w r0, r4, #80 @ 0x50 80138ec: 910d str r1, [sp, #52] @ 0x34 80138ee: f7ff ff23 bl 8013738 <__exponent> 80138f2: 9a0e ldr r2, [sp, #56] @ 0x38 80138f4: 4681 mov r9, r0 80138f6: 1813 adds r3, r2, r0 80138f8: 2a01 cmp r2, #1 80138fa: 6123 str r3, [r4, #16] 80138fc: dc02 bgt.n 8013904 <_printf_float+0x158> 80138fe: 6822 ldr r2, [r4, #0] 8013900: 07d2 lsls r2, r2, #31 8013902: d501 bpl.n 8013908 <_printf_float+0x15c> 8013904: 3301 adds r3, #1 8013906: 6123 str r3, [r4, #16] 8013908: f89d 3033 ldrb.w r3, [sp, #51] @ 0x33 801390c: 2b00 cmp r3, #0 801390e: d09e beq.n 801384e <_printf_float+0xa2> 8013910: 232d movs r3, #45 @ 0x2d 8013912: f884 3043 strb.w r3, [r4, #67] @ 0x43 8013916: e79a b.n 801384e <_printf_float+0xa2> 8013918: 2947 cmp r1, #71 @ 0x47 801391a: d1bf bne.n 801389c <_printf_float+0xf0> 801391c: 2b00 cmp r3, #0 801391e: d1bd bne.n 801389c <_printf_float+0xf0> 8013920: 2301 movs r3, #1 8013922: e7ba b.n 801389a <_printf_float+0xee> 8013924: f1ba 0f65 cmp.w sl, #101 @ 0x65 8013928: d9dc bls.n 80138e4 <_printf_float+0x138> 801392a: f1ba 0f66 cmp.w sl, #102 @ 0x66 801392e: d118 bne.n 8013962 <_printf_float+0x1b6> 8013930: 2900 cmp r1, #0 8013932: 6863 ldr r3, [r4, #4] 8013934: dd0b ble.n 801394e <_printf_float+0x1a2> 8013936: 6121 str r1, [r4, #16] 8013938: b913 cbnz r3, 8013940 <_printf_float+0x194> 801393a: 6822 ldr r2, [r4, #0] 801393c: 07d0 lsls r0, r2, #31 801393e: d502 bpl.n 8013946 <_printf_float+0x19a> 8013940: 3301 adds r3, #1 8013942: 440b add r3, r1 8013944: 6123 str r3, [r4, #16] 8013946: f04f 0900 mov.w r9, #0 801394a: 65a1 str r1, [r4, #88] @ 0x58 801394c: e7dc b.n 8013908 <_printf_float+0x15c> 801394e: b913 cbnz r3, 8013956 <_printf_float+0x1aa> 8013950: 6822 ldr r2, [r4, #0] 8013952: 07d2 lsls r2, r2, #31 8013954: d501 bpl.n 801395a <_printf_float+0x1ae> 8013956: 3302 adds r3, #2 8013958: e7f4 b.n 8013944 <_printf_float+0x198> 801395a: 2301 movs r3, #1 801395c: e7f2 b.n 8013944 <_printf_float+0x198> 801395e: f04f 0a67 mov.w sl, #103 @ 0x67 8013962: 9b0e ldr r3, [sp, #56] @ 0x38 8013964: 4299 cmp r1, r3 8013966: db05 blt.n 8013974 <_printf_float+0x1c8> 8013968: 6823 ldr r3, [r4, #0] 801396a: 6121 str r1, [r4, #16] 801396c: 07d8 lsls r0, r3, #31 801396e: d5ea bpl.n 8013946 <_printf_float+0x19a> 8013970: 1c4b adds r3, r1, #1 8013972: e7e7 b.n 8013944 <_printf_float+0x198> 8013974: 2900 cmp r1, #0 8013976: bfcc ite gt 8013978: 2201 movgt r2, #1 801397a: f1c1 0202 rsble r2, r1, #2 801397e: 4413 add r3, r2 8013980: e7e0 b.n 8013944 <_printf_float+0x198> 8013982: 6823 ldr r3, [r4, #0] 8013984: 055a lsls r2, r3, #21 8013986: d407 bmi.n 8013998 <_printf_float+0x1ec> 8013988: 6923 ldr r3, [r4, #16] 801398a: 4642 mov r2, r8 801398c: 4631 mov r1, r6 801398e: 4628 mov r0, r5 8013990: 47b8 blx r7 8013992: 3001 adds r0, #1 8013994: d12b bne.n 80139ee <_printf_float+0x242> 8013996: e764 b.n 8013862 <_printf_float+0xb6> 8013998: f1ba 0f65 cmp.w sl, #101 @ 0x65 801399c: f240 80dc bls.w 8013b58 <_printf_float+0x3ac> 80139a0: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 80139a4: 2200 movs r2, #0 80139a6: 2300 movs r3, #0 80139a8: f7f5 f86a bl 8008a80 <__aeabi_dcmpeq> 80139ac: 2800 cmp r0, #0 80139ae: d033 beq.n 8013a18 <_printf_float+0x26c> 80139b0: 2301 movs r3, #1 80139b2: 4631 mov r1, r6 80139b4: 4628 mov r0, r5 80139b6: 4a35 ldr r2, [pc, #212] @ (8013a8c <_printf_float+0x2e0>) 80139b8: 47b8 blx r7 80139ba: 3001 adds r0, #1 80139bc: f43f af51 beq.w 8013862 <_printf_float+0xb6> 80139c0: e9dd 380d ldrd r3, r8, [sp, #52] @ 0x34 80139c4: 4543 cmp r3, r8 80139c6: db02 blt.n 80139ce <_printf_float+0x222> 80139c8: 6823 ldr r3, [r4, #0] 80139ca: 07d8 lsls r0, r3, #31 80139cc: d50f bpl.n 80139ee <_printf_float+0x242> 80139ce: e9dd 2308 ldrd r2, r3, [sp, #32] 80139d2: 4631 mov r1, r6 80139d4: 4628 mov r0, r5 80139d6: 47b8 blx r7 80139d8: 3001 adds r0, #1 80139da: f43f af42 beq.w 8013862 <_printf_float+0xb6> 80139de: f04f 0900 mov.w r9, #0 80139e2: f108 38ff add.w r8, r8, #4294967295 @ 0xffffffff 80139e6: f104 0a1a add.w sl, r4, #26 80139ea: 45c8 cmp r8, r9 80139ec: dc09 bgt.n 8013a02 <_printf_float+0x256> 80139ee: 6823 ldr r3, [r4, #0] 80139f0: 079b lsls r3, r3, #30 80139f2: f100 8102 bmi.w 8013bfa <_printf_float+0x44e> 80139f6: 68e0 ldr r0, [r4, #12] 80139f8: 9b0f ldr r3, [sp, #60] @ 0x3c 80139fa: 4298 cmp r0, r3 80139fc: bfb8 it lt 80139fe: 4618 movlt r0, r3 8013a00: e731 b.n 8013866 <_printf_float+0xba> 8013a02: 2301 movs r3, #1 8013a04: 4652 mov r2, sl 8013a06: 4631 mov r1, r6 8013a08: 4628 mov r0, r5 8013a0a: 47b8 blx r7 8013a0c: 3001 adds r0, #1 8013a0e: f43f af28 beq.w 8013862 <_printf_float+0xb6> 8013a12: f109 0901 add.w r9, r9, #1 8013a16: e7e8 b.n 80139ea <_printf_float+0x23e> 8013a18: 9b0d ldr r3, [sp, #52] @ 0x34 8013a1a: 2b00 cmp r3, #0 8013a1c: dc38 bgt.n 8013a90 <_printf_float+0x2e4> 8013a1e: 2301 movs r3, #1 8013a20: 4631 mov r1, r6 8013a22: 4628 mov r0, r5 8013a24: 4a19 ldr r2, [pc, #100] @ (8013a8c <_printf_float+0x2e0>) 8013a26: 47b8 blx r7 8013a28: 3001 adds r0, #1 8013a2a: f43f af1a beq.w 8013862 <_printf_float+0xb6> 8013a2e: e9dd 390d ldrd r3, r9, [sp, #52] @ 0x34 8013a32: ea59 0303 orrs.w r3, r9, r3 8013a36: d102 bne.n 8013a3e <_printf_float+0x292> 8013a38: 6823 ldr r3, [r4, #0] 8013a3a: 07d9 lsls r1, r3, #31 8013a3c: d5d7 bpl.n 80139ee <_printf_float+0x242> 8013a3e: e9dd 2308 ldrd r2, r3, [sp, #32] 8013a42: 4631 mov r1, r6 8013a44: 4628 mov r0, r5 8013a46: 47b8 blx r7 8013a48: 3001 adds r0, #1 8013a4a: f43f af0a beq.w 8013862 <_printf_float+0xb6> 8013a4e: f04f 0a00 mov.w sl, #0 8013a52: f104 0b1a add.w fp, r4, #26 8013a56: 9b0d ldr r3, [sp, #52] @ 0x34 8013a58: 425b negs r3, r3 8013a5a: 4553 cmp r3, sl 8013a5c: dc01 bgt.n 8013a62 <_printf_float+0x2b6> 8013a5e: 464b mov r3, r9 8013a60: e793 b.n 801398a <_printf_float+0x1de> 8013a62: 2301 movs r3, #1 8013a64: 465a mov r2, fp 8013a66: 4631 mov r1, r6 8013a68: 4628 mov r0, r5 8013a6a: 47b8 blx r7 8013a6c: 3001 adds r0, #1 8013a6e: f43f aef8 beq.w 8013862 <_printf_float+0xb6> 8013a72: f10a 0a01 add.w sl, sl, #1 8013a76: e7ee b.n 8013a56 <_printf_float+0x2aa> 8013a78: 7fefffff .word 0x7fefffff 8013a7c: 08016d1c .word 0x08016d1c 8013a80: 08016d18 .word 0x08016d18 8013a84: 08016d24 .word 0x08016d24 8013a88: 08016d20 .word 0x08016d20 8013a8c: 08016d28 .word 0x08016d28 8013a90: 6da3 ldr r3, [r4, #88] @ 0x58 8013a92: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 8013a96: 4553 cmp r3, sl 8013a98: bfa8 it ge 8013a9a: 4653 movge r3, sl 8013a9c: 2b00 cmp r3, #0 8013a9e: 4699 mov r9, r3 8013aa0: dc36 bgt.n 8013b10 <_printf_float+0x364> 8013aa2: f04f 0b00 mov.w fp, #0 8013aa6: ea29 79e9 bic.w r9, r9, r9, asr #31 8013aaa: f104 021a add.w r2, r4, #26 8013aae: 6da3 ldr r3, [r4, #88] @ 0x58 8013ab0: 930a str r3, [sp, #40] @ 0x28 8013ab2: eba3 0309 sub.w r3, r3, r9 8013ab6: 455b cmp r3, fp 8013ab8: dc31 bgt.n 8013b1e <_printf_float+0x372> 8013aba: 9b0d ldr r3, [sp, #52] @ 0x34 8013abc: 459a cmp sl, r3 8013abe: dc3a bgt.n 8013b36 <_printf_float+0x38a> 8013ac0: 6823 ldr r3, [r4, #0] 8013ac2: 07da lsls r2, r3, #31 8013ac4: d437 bmi.n 8013b36 <_printf_float+0x38a> 8013ac6: 9b0d ldr r3, [sp, #52] @ 0x34 8013ac8: ebaa 0903 sub.w r9, sl, r3 8013acc: 9b0a ldr r3, [sp, #40] @ 0x28 8013ace: ebaa 0303 sub.w r3, sl, r3 8013ad2: 4599 cmp r9, r3 8013ad4: bfa8 it ge 8013ad6: 4699 movge r9, r3 8013ad8: f1b9 0f00 cmp.w r9, #0 8013adc: dc33 bgt.n 8013b46 <_printf_float+0x39a> 8013ade: f04f 0800 mov.w r8, #0 8013ae2: ea29 79e9 bic.w r9, r9, r9, asr #31 8013ae6: f104 0b1a add.w fp, r4, #26 8013aea: 9b0d ldr r3, [sp, #52] @ 0x34 8013aec: ebaa 0303 sub.w r3, sl, r3 8013af0: eba3 0309 sub.w r3, r3, r9 8013af4: 4543 cmp r3, r8 8013af6: f77f af7a ble.w 80139ee <_printf_float+0x242> 8013afa: 2301 movs r3, #1 8013afc: 465a mov r2, fp 8013afe: 4631 mov r1, r6 8013b00: 4628 mov r0, r5 8013b02: 47b8 blx r7 8013b04: 3001 adds r0, #1 8013b06: f43f aeac beq.w 8013862 <_printf_float+0xb6> 8013b0a: f108 0801 add.w r8, r8, #1 8013b0e: e7ec b.n 8013aea <_printf_float+0x33e> 8013b10: 4642 mov r2, r8 8013b12: 4631 mov r1, r6 8013b14: 4628 mov r0, r5 8013b16: 47b8 blx r7 8013b18: 3001 adds r0, #1 8013b1a: d1c2 bne.n 8013aa2 <_printf_float+0x2f6> 8013b1c: e6a1 b.n 8013862 <_printf_float+0xb6> 8013b1e: 2301 movs r3, #1 8013b20: 4631 mov r1, r6 8013b22: 4628 mov r0, r5 8013b24: 920a str r2, [sp, #40] @ 0x28 8013b26: 47b8 blx r7 8013b28: 3001 adds r0, #1 8013b2a: f43f ae9a beq.w 8013862 <_printf_float+0xb6> 8013b2e: 9a0a ldr r2, [sp, #40] @ 0x28 8013b30: f10b 0b01 add.w fp, fp, #1 8013b34: e7bb b.n 8013aae <_printf_float+0x302> 8013b36: 4631 mov r1, r6 8013b38: e9dd 2308 ldrd r2, r3, [sp, #32] 8013b3c: 4628 mov r0, r5 8013b3e: 47b8 blx r7 8013b40: 3001 adds r0, #1 8013b42: d1c0 bne.n 8013ac6 <_printf_float+0x31a> 8013b44: e68d b.n 8013862 <_printf_float+0xb6> 8013b46: 9a0a ldr r2, [sp, #40] @ 0x28 8013b48: 464b mov r3, r9 8013b4a: 4631 mov r1, r6 8013b4c: 4628 mov r0, r5 8013b4e: 4442 add r2, r8 8013b50: 47b8 blx r7 8013b52: 3001 adds r0, #1 8013b54: d1c3 bne.n 8013ade <_printf_float+0x332> 8013b56: e684 b.n 8013862 <_printf_float+0xb6> 8013b58: f8dd a038 ldr.w sl, [sp, #56] @ 0x38 8013b5c: f1ba 0f01 cmp.w sl, #1 8013b60: dc01 bgt.n 8013b66 <_printf_float+0x3ba> 8013b62: 07db lsls r3, r3, #31 8013b64: d536 bpl.n 8013bd4 <_printf_float+0x428> 8013b66: 2301 movs r3, #1 8013b68: 4642 mov r2, r8 8013b6a: 4631 mov r1, r6 8013b6c: 4628 mov r0, r5 8013b6e: 47b8 blx r7 8013b70: 3001 adds r0, #1 8013b72: f43f ae76 beq.w 8013862 <_printf_float+0xb6> 8013b76: e9dd 2308 ldrd r2, r3, [sp, #32] 8013b7a: 4631 mov r1, r6 8013b7c: 4628 mov r0, r5 8013b7e: 47b8 blx r7 8013b80: 3001 adds r0, #1 8013b82: f43f ae6e beq.w 8013862 <_printf_float+0xb6> 8013b86: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 8013b8a: 2200 movs r2, #0 8013b8c: 2300 movs r3, #0 8013b8e: f10a 3aff add.w sl, sl, #4294967295 @ 0xffffffff 8013b92: f7f4 ff75 bl 8008a80 <__aeabi_dcmpeq> 8013b96: b9c0 cbnz r0, 8013bca <_printf_float+0x41e> 8013b98: 4653 mov r3, sl 8013b9a: f108 0201 add.w r2, r8, #1 8013b9e: 4631 mov r1, r6 8013ba0: 4628 mov r0, r5 8013ba2: 47b8 blx r7 8013ba4: 3001 adds r0, #1 8013ba6: d10c bne.n 8013bc2 <_printf_float+0x416> 8013ba8: e65b b.n 8013862 <_printf_float+0xb6> 8013baa: 2301 movs r3, #1 8013bac: 465a mov r2, fp 8013bae: 4631 mov r1, r6 8013bb0: 4628 mov r0, r5 8013bb2: 47b8 blx r7 8013bb4: 3001 adds r0, #1 8013bb6: f43f ae54 beq.w 8013862 <_printf_float+0xb6> 8013bba: f108 0801 add.w r8, r8, #1 8013bbe: 45d0 cmp r8, sl 8013bc0: dbf3 blt.n 8013baa <_printf_float+0x3fe> 8013bc2: 464b mov r3, r9 8013bc4: f104 0250 add.w r2, r4, #80 @ 0x50 8013bc8: e6e0 b.n 801398c <_printf_float+0x1e0> 8013bca: f04f 0800 mov.w r8, #0 8013bce: f104 0b1a add.w fp, r4, #26 8013bd2: e7f4 b.n 8013bbe <_printf_float+0x412> 8013bd4: 2301 movs r3, #1 8013bd6: 4642 mov r2, r8 8013bd8: e7e1 b.n 8013b9e <_printf_float+0x3f2> 8013bda: 2301 movs r3, #1 8013bdc: 464a mov r2, r9 8013bde: 4631 mov r1, r6 8013be0: 4628 mov r0, r5 8013be2: 47b8 blx r7 8013be4: 3001 adds r0, #1 8013be6: f43f ae3c beq.w 8013862 <_printf_float+0xb6> 8013bea: f108 0801 add.w r8, r8, #1 8013bee: 68e3 ldr r3, [r4, #12] 8013bf0: 990f ldr r1, [sp, #60] @ 0x3c 8013bf2: 1a5b subs r3, r3, r1 8013bf4: 4543 cmp r3, r8 8013bf6: dcf0 bgt.n 8013bda <_printf_float+0x42e> 8013bf8: e6fd b.n 80139f6 <_printf_float+0x24a> 8013bfa: f04f 0800 mov.w r8, #0 8013bfe: f104 0919 add.w r9, r4, #25 8013c02: e7f4 b.n 8013bee <_printf_float+0x442> 08013c04 <_printf_common>: 8013c04: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8013c08: 4616 mov r6, r2 8013c0a: 4698 mov r8, r3 8013c0c: 688a ldr r2, [r1, #8] 8013c0e: 690b ldr r3, [r1, #16] 8013c10: 4607 mov r7, r0 8013c12: 4293 cmp r3, r2 8013c14: bfb8 it lt 8013c16: 4613 movlt r3, r2 8013c18: 6033 str r3, [r6, #0] 8013c1a: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 8013c1e: 460c mov r4, r1 8013c20: f8dd 9020 ldr.w r9, [sp, #32] 8013c24: b10a cbz r2, 8013c2a <_printf_common+0x26> 8013c26: 3301 adds r3, #1 8013c28: 6033 str r3, [r6, #0] 8013c2a: 6823 ldr r3, [r4, #0] 8013c2c: 0699 lsls r1, r3, #26 8013c2e: bf42 ittt mi 8013c30: 6833 ldrmi r3, [r6, #0] 8013c32: 3302 addmi r3, #2 8013c34: 6033 strmi r3, [r6, #0] 8013c36: 6825 ldr r5, [r4, #0] 8013c38: f015 0506 ands.w r5, r5, #6 8013c3c: d106 bne.n 8013c4c <_printf_common+0x48> 8013c3e: f104 0a19 add.w sl, r4, #25 8013c42: 68e3 ldr r3, [r4, #12] 8013c44: 6832 ldr r2, [r6, #0] 8013c46: 1a9b subs r3, r3, r2 8013c48: 42ab cmp r3, r5 8013c4a: dc2b bgt.n 8013ca4 <_printf_common+0xa0> 8013c4c: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 8013c50: 6822 ldr r2, [r4, #0] 8013c52: 3b00 subs r3, #0 8013c54: bf18 it ne 8013c56: 2301 movne r3, #1 8013c58: 0692 lsls r2, r2, #26 8013c5a: d430 bmi.n 8013cbe <_printf_common+0xba> 8013c5c: 4641 mov r1, r8 8013c5e: 4638 mov r0, r7 8013c60: f104 0243 add.w r2, r4, #67 @ 0x43 8013c64: 47c8 blx r9 8013c66: 3001 adds r0, #1 8013c68: d023 beq.n 8013cb2 <_printf_common+0xae> 8013c6a: 6823 ldr r3, [r4, #0] 8013c6c: 6922 ldr r2, [r4, #16] 8013c6e: f003 0306 and.w r3, r3, #6 8013c72: 2b04 cmp r3, #4 8013c74: bf14 ite ne 8013c76: 2500 movne r5, #0 8013c78: 6833 ldreq r3, [r6, #0] 8013c7a: f04f 0600 mov.w r6, #0 8013c7e: bf08 it eq 8013c80: 68e5 ldreq r5, [r4, #12] 8013c82: f104 041a add.w r4, r4, #26 8013c86: bf08 it eq 8013c88: 1aed subeq r5, r5, r3 8013c8a: f854 3c12 ldr.w r3, [r4, #-18] 8013c8e: bf08 it eq 8013c90: ea25 75e5 biceq.w r5, r5, r5, asr #31 8013c94: 4293 cmp r3, r2 8013c96: bfc4 itt gt 8013c98: 1a9b subgt r3, r3, r2 8013c9a: 18ed addgt r5, r5, r3 8013c9c: 42b5 cmp r5, r6 8013c9e: d11a bne.n 8013cd6 <_printf_common+0xd2> 8013ca0: 2000 movs r0, #0 8013ca2: e008 b.n 8013cb6 <_printf_common+0xb2> 8013ca4: 2301 movs r3, #1 8013ca6: 4652 mov r2, sl 8013ca8: 4641 mov r1, r8 8013caa: 4638 mov r0, r7 8013cac: 47c8 blx r9 8013cae: 3001 adds r0, #1 8013cb0: d103 bne.n 8013cba <_printf_common+0xb6> 8013cb2: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013cb6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8013cba: 3501 adds r5, #1 8013cbc: e7c1 b.n 8013c42 <_printf_common+0x3e> 8013cbe: 2030 movs r0, #48 @ 0x30 8013cc0: 18e1 adds r1, r4, r3 8013cc2: f881 0043 strb.w r0, [r1, #67] @ 0x43 8013cc6: 1c5a adds r2, r3, #1 8013cc8: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 8013ccc: 4422 add r2, r4 8013cce: 3302 adds r3, #2 8013cd0: f882 1043 strb.w r1, [r2, #67] @ 0x43 8013cd4: e7c2 b.n 8013c5c <_printf_common+0x58> 8013cd6: 2301 movs r3, #1 8013cd8: 4622 mov r2, r4 8013cda: 4641 mov r1, r8 8013cdc: 4638 mov r0, r7 8013cde: 47c8 blx r9 8013ce0: 3001 adds r0, #1 8013ce2: d0e6 beq.n 8013cb2 <_printf_common+0xae> 8013ce4: 3601 adds r6, #1 8013ce6: e7d9 b.n 8013c9c <_printf_common+0x98> 08013ce8 <_printf_i>: 8013ce8: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 8013cec: 7e0f ldrb r7, [r1, #24] 8013cee: 4691 mov r9, r2 8013cf0: 2f78 cmp r7, #120 @ 0x78 8013cf2: 4680 mov r8, r0 8013cf4: 460c mov r4, r1 8013cf6: 469a mov sl, r3 8013cf8: 9e0c ldr r6, [sp, #48] @ 0x30 8013cfa: f101 0243 add.w r2, r1, #67 @ 0x43 8013cfe: d807 bhi.n 8013d10 <_printf_i+0x28> 8013d00: 2f62 cmp r7, #98 @ 0x62 8013d02: d80a bhi.n 8013d1a <_printf_i+0x32> 8013d04: 2f00 cmp r7, #0 8013d06: f000 80d1 beq.w 8013eac <_printf_i+0x1c4> 8013d0a: 2f58 cmp r7, #88 @ 0x58 8013d0c: f000 80b8 beq.w 8013e80 <_printf_i+0x198> 8013d10: f104 0642 add.w r6, r4, #66 @ 0x42 8013d14: f884 7042 strb.w r7, [r4, #66] @ 0x42 8013d18: e03a b.n 8013d90 <_printf_i+0xa8> 8013d1a: f1a7 0363 sub.w r3, r7, #99 @ 0x63 8013d1e: 2b15 cmp r3, #21 8013d20: d8f6 bhi.n 8013d10 <_printf_i+0x28> 8013d22: a101 add r1, pc, #4 @ (adr r1, 8013d28 <_printf_i+0x40>) 8013d24: f851 f023 ldr.w pc, [r1, r3, lsl #2] 8013d28: 08013d81 .word 0x08013d81 8013d2c: 08013d95 .word 0x08013d95 8013d30: 08013d11 .word 0x08013d11 8013d34: 08013d11 .word 0x08013d11 8013d38: 08013d11 .word 0x08013d11 8013d3c: 08013d11 .word 0x08013d11 8013d40: 08013d95 .word 0x08013d95 8013d44: 08013d11 .word 0x08013d11 8013d48: 08013d11 .word 0x08013d11 8013d4c: 08013d11 .word 0x08013d11 8013d50: 08013d11 .word 0x08013d11 8013d54: 08013e93 .word 0x08013e93 8013d58: 08013dbf .word 0x08013dbf 8013d5c: 08013e4d .word 0x08013e4d 8013d60: 08013d11 .word 0x08013d11 8013d64: 08013d11 .word 0x08013d11 8013d68: 08013eb5 .word 0x08013eb5 8013d6c: 08013d11 .word 0x08013d11 8013d70: 08013dbf .word 0x08013dbf 8013d74: 08013d11 .word 0x08013d11 8013d78: 08013d11 .word 0x08013d11 8013d7c: 08013e55 .word 0x08013e55 8013d80: 6833 ldr r3, [r6, #0] 8013d82: 1d1a adds r2, r3, #4 8013d84: 681b ldr r3, [r3, #0] 8013d86: 6032 str r2, [r6, #0] 8013d88: f104 0642 add.w r6, r4, #66 @ 0x42 8013d8c: f884 3042 strb.w r3, [r4, #66] @ 0x42 8013d90: 2301 movs r3, #1 8013d92: e09c b.n 8013ece <_printf_i+0x1e6> 8013d94: 6833 ldr r3, [r6, #0] 8013d96: 6820 ldr r0, [r4, #0] 8013d98: 1d19 adds r1, r3, #4 8013d9a: 6031 str r1, [r6, #0] 8013d9c: 0606 lsls r6, r0, #24 8013d9e: d501 bpl.n 8013da4 <_printf_i+0xbc> 8013da0: 681d ldr r5, [r3, #0] 8013da2: e003 b.n 8013dac <_printf_i+0xc4> 8013da4: 0645 lsls r5, r0, #25 8013da6: d5fb bpl.n 8013da0 <_printf_i+0xb8> 8013da8: f9b3 5000 ldrsh.w r5, [r3] 8013dac: 2d00 cmp r5, #0 8013dae: da03 bge.n 8013db8 <_printf_i+0xd0> 8013db0: 232d movs r3, #45 @ 0x2d 8013db2: 426d negs r5, r5 8013db4: f884 3043 strb.w r3, [r4, #67] @ 0x43 8013db8: 230a movs r3, #10 8013dba: 4858 ldr r0, [pc, #352] @ (8013f1c <_printf_i+0x234>) 8013dbc: e011 b.n 8013de2 <_printf_i+0xfa> 8013dbe: 6821 ldr r1, [r4, #0] 8013dc0: 6833 ldr r3, [r6, #0] 8013dc2: 0608 lsls r0, r1, #24 8013dc4: f853 5b04 ldr.w r5, [r3], #4 8013dc8: d402 bmi.n 8013dd0 <_printf_i+0xe8> 8013dca: 0649 lsls r1, r1, #25 8013dcc: bf48 it mi 8013dce: b2ad uxthmi r5, r5 8013dd0: 2f6f cmp r7, #111 @ 0x6f 8013dd2: 6033 str r3, [r6, #0] 8013dd4: bf14 ite ne 8013dd6: 230a movne r3, #10 8013dd8: 2308 moveq r3, #8 8013dda: 4850 ldr r0, [pc, #320] @ (8013f1c <_printf_i+0x234>) 8013ddc: 2100 movs r1, #0 8013dde: f884 1043 strb.w r1, [r4, #67] @ 0x43 8013de2: 6866 ldr r6, [r4, #4] 8013de4: 2e00 cmp r6, #0 8013de6: 60a6 str r6, [r4, #8] 8013de8: db05 blt.n 8013df6 <_printf_i+0x10e> 8013dea: 6821 ldr r1, [r4, #0] 8013dec: 432e orrs r6, r5 8013dee: f021 0104 bic.w r1, r1, #4 8013df2: 6021 str r1, [r4, #0] 8013df4: d04b beq.n 8013e8e <_printf_i+0x1a6> 8013df6: 4616 mov r6, r2 8013df8: fbb5 f1f3 udiv r1, r5, r3 8013dfc: fb03 5711 mls r7, r3, r1, r5 8013e00: 5dc7 ldrb r7, [r0, r7] 8013e02: f806 7d01 strb.w r7, [r6, #-1]! 8013e06: 462f mov r7, r5 8013e08: 42bb cmp r3, r7 8013e0a: 460d mov r5, r1 8013e0c: d9f4 bls.n 8013df8 <_printf_i+0x110> 8013e0e: 2b08 cmp r3, #8 8013e10: d10b bne.n 8013e2a <_printf_i+0x142> 8013e12: 6823 ldr r3, [r4, #0] 8013e14: 07df lsls r7, r3, #31 8013e16: d508 bpl.n 8013e2a <_printf_i+0x142> 8013e18: 6923 ldr r3, [r4, #16] 8013e1a: 6861 ldr r1, [r4, #4] 8013e1c: 4299 cmp r1, r3 8013e1e: bfde ittt le 8013e20: 2330 movle r3, #48 @ 0x30 8013e22: f806 3c01 strble.w r3, [r6, #-1] 8013e26: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff 8013e2a: 1b92 subs r2, r2, r6 8013e2c: 6122 str r2, [r4, #16] 8013e2e: 464b mov r3, r9 8013e30: 4621 mov r1, r4 8013e32: 4640 mov r0, r8 8013e34: f8cd a000 str.w sl, [sp] 8013e38: aa03 add r2, sp, #12 8013e3a: f7ff fee3 bl 8013c04 <_printf_common> 8013e3e: 3001 adds r0, #1 8013e40: d14a bne.n 8013ed8 <_printf_i+0x1f0> 8013e42: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013e46: b004 add sp, #16 8013e48: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8013e4c: 6823 ldr r3, [r4, #0] 8013e4e: f043 0320 orr.w r3, r3, #32 8013e52: 6023 str r3, [r4, #0] 8013e54: 2778 movs r7, #120 @ 0x78 8013e56: 4832 ldr r0, [pc, #200] @ (8013f20 <_printf_i+0x238>) 8013e58: f884 7045 strb.w r7, [r4, #69] @ 0x45 8013e5c: 6823 ldr r3, [r4, #0] 8013e5e: 6831 ldr r1, [r6, #0] 8013e60: 061f lsls r7, r3, #24 8013e62: f851 5b04 ldr.w r5, [r1], #4 8013e66: d402 bmi.n 8013e6e <_printf_i+0x186> 8013e68: 065f lsls r7, r3, #25 8013e6a: bf48 it mi 8013e6c: b2ad uxthmi r5, r5 8013e6e: 6031 str r1, [r6, #0] 8013e70: 07d9 lsls r1, r3, #31 8013e72: bf44 itt mi 8013e74: f043 0320 orrmi.w r3, r3, #32 8013e78: 6023 strmi r3, [r4, #0] 8013e7a: b11d cbz r5, 8013e84 <_printf_i+0x19c> 8013e7c: 2310 movs r3, #16 8013e7e: e7ad b.n 8013ddc <_printf_i+0xf4> 8013e80: 4826 ldr r0, [pc, #152] @ (8013f1c <_printf_i+0x234>) 8013e82: e7e9 b.n 8013e58 <_printf_i+0x170> 8013e84: 6823 ldr r3, [r4, #0] 8013e86: f023 0320 bic.w r3, r3, #32 8013e8a: 6023 str r3, [r4, #0] 8013e8c: e7f6 b.n 8013e7c <_printf_i+0x194> 8013e8e: 4616 mov r6, r2 8013e90: e7bd b.n 8013e0e <_printf_i+0x126> 8013e92: 6833 ldr r3, [r6, #0] 8013e94: 6825 ldr r5, [r4, #0] 8013e96: 1d18 adds r0, r3, #4 8013e98: 6961 ldr r1, [r4, #20] 8013e9a: 6030 str r0, [r6, #0] 8013e9c: 062e lsls r6, r5, #24 8013e9e: 681b ldr r3, [r3, #0] 8013ea0: d501 bpl.n 8013ea6 <_printf_i+0x1be> 8013ea2: 6019 str r1, [r3, #0] 8013ea4: e002 b.n 8013eac <_printf_i+0x1c4> 8013ea6: 0668 lsls r0, r5, #25 8013ea8: d5fb bpl.n 8013ea2 <_printf_i+0x1ba> 8013eaa: 8019 strh r1, [r3, #0] 8013eac: 2300 movs r3, #0 8013eae: 4616 mov r6, r2 8013eb0: 6123 str r3, [r4, #16] 8013eb2: e7bc b.n 8013e2e <_printf_i+0x146> 8013eb4: 6833 ldr r3, [r6, #0] 8013eb6: 2100 movs r1, #0 8013eb8: 1d1a adds r2, r3, #4 8013eba: 6032 str r2, [r6, #0] 8013ebc: 681e ldr r6, [r3, #0] 8013ebe: 6862 ldr r2, [r4, #4] 8013ec0: 4630 mov r0, r6 8013ec2: f000 fa3f bl 8014344 8013ec6: b108 cbz r0, 8013ecc <_printf_i+0x1e4> 8013ec8: 1b80 subs r0, r0, r6 8013eca: 6060 str r0, [r4, #4] 8013ecc: 6863 ldr r3, [r4, #4] 8013ece: 6123 str r3, [r4, #16] 8013ed0: 2300 movs r3, #0 8013ed2: f884 3043 strb.w r3, [r4, #67] @ 0x43 8013ed6: e7aa b.n 8013e2e <_printf_i+0x146> 8013ed8: 4632 mov r2, r6 8013eda: 4649 mov r1, r9 8013edc: 4640 mov r0, r8 8013ede: 6923 ldr r3, [r4, #16] 8013ee0: 47d0 blx sl 8013ee2: 3001 adds r0, #1 8013ee4: d0ad beq.n 8013e42 <_printf_i+0x15a> 8013ee6: 6823 ldr r3, [r4, #0] 8013ee8: 079b lsls r3, r3, #30 8013eea: d413 bmi.n 8013f14 <_printf_i+0x22c> 8013eec: 68e0 ldr r0, [r4, #12] 8013eee: 9b03 ldr r3, [sp, #12] 8013ef0: 4298 cmp r0, r3 8013ef2: bfb8 it lt 8013ef4: 4618 movlt r0, r3 8013ef6: e7a6 b.n 8013e46 <_printf_i+0x15e> 8013ef8: 2301 movs r3, #1 8013efa: 4632 mov r2, r6 8013efc: 4649 mov r1, r9 8013efe: 4640 mov r0, r8 8013f00: 47d0 blx sl 8013f02: 3001 adds r0, #1 8013f04: d09d beq.n 8013e42 <_printf_i+0x15a> 8013f06: 3501 adds r5, #1 8013f08: 68e3 ldr r3, [r4, #12] 8013f0a: 9903 ldr r1, [sp, #12] 8013f0c: 1a5b subs r3, r3, r1 8013f0e: 42ab cmp r3, r5 8013f10: dcf2 bgt.n 8013ef8 <_printf_i+0x210> 8013f12: e7eb b.n 8013eec <_printf_i+0x204> 8013f14: 2500 movs r5, #0 8013f16: f104 0619 add.w r6, r4, #25 8013f1a: e7f5 b.n 8013f08 <_printf_i+0x220> 8013f1c: 08016d2a .word 0x08016d2a 8013f20: 08016d3b .word 0x08016d3b 08013f24 : 8013f24: 2300 movs r3, #0 8013f26: b510 push {r4, lr} 8013f28: 4604 mov r4, r0 8013f2a: e9c0 3300 strd r3, r3, [r0] 8013f2e: e9c0 3304 strd r3, r3, [r0, #16] 8013f32: 6083 str r3, [r0, #8] 8013f34: 8181 strh r1, [r0, #12] 8013f36: 6643 str r3, [r0, #100] @ 0x64 8013f38: 81c2 strh r2, [r0, #14] 8013f3a: 6183 str r3, [r0, #24] 8013f3c: 4619 mov r1, r3 8013f3e: 2208 movs r2, #8 8013f40: 305c adds r0, #92 @ 0x5c 8013f42: f000 f8ff bl 8014144 8013f46: 4b0d ldr r3, [pc, #52] @ (8013f7c ) 8013f48: 6224 str r4, [r4, #32] 8013f4a: 6263 str r3, [r4, #36] @ 0x24 8013f4c: 4b0c ldr r3, [pc, #48] @ (8013f80 ) 8013f4e: 62a3 str r3, [r4, #40] @ 0x28 8013f50: 4b0c ldr r3, [pc, #48] @ (8013f84 ) 8013f52: 62e3 str r3, [r4, #44] @ 0x2c 8013f54: 4b0c ldr r3, [pc, #48] @ (8013f88 ) 8013f56: 6323 str r3, [r4, #48] @ 0x30 8013f58: 4b0c ldr r3, [pc, #48] @ (8013f8c ) 8013f5a: 429c cmp r4, r3 8013f5c: d006 beq.n 8013f6c 8013f5e: f103 0268 add.w r2, r3, #104 @ 0x68 8013f62: 4294 cmp r4, r2 8013f64: d002 beq.n 8013f6c 8013f66: 33d0 adds r3, #208 @ 0xd0 8013f68: 429c cmp r4, r3 8013f6a: d105 bne.n 8013f78 8013f6c: f104 0058 add.w r0, r4, #88 @ 0x58 8013f70: e8bd 4010 ldmia.w sp!, {r4, lr} 8013f74: f000 b9de b.w 8014334 <__retarget_lock_init_recursive> 8013f78: bd10 pop {r4, pc} 8013f7a: bf00 nop 8013f7c: 08015f51 .word 0x08015f51 8013f80: 08015f73 .word 0x08015f73 8013f84: 08015fab .word 0x08015fab 8013f88: 08015fcf .word 0x08015fcf 8013f8c: 20001088 .word 0x20001088 08013f90 : 8013f90: 4a02 ldr r2, [pc, #8] @ (8013f9c ) 8013f92: 4903 ldr r1, [pc, #12] @ (8013fa0 ) 8013f94: 4803 ldr r0, [pc, #12] @ (8013fa4 ) 8013f96: f000 b8a5 b.w 80140e4 <_fwalk_sglue> 8013f9a: bf00 nop 8013f9c: 20000084 .word 0x20000084 8013fa0: 080157f5 .word 0x080157f5 8013fa4: 20000094 .word 0x20000094 08013fa8 : 8013fa8: 6841 ldr r1, [r0, #4] 8013faa: 4b0c ldr r3, [pc, #48] @ (8013fdc ) 8013fac: b510 push {r4, lr} 8013fae: 4299 cmp r1, r3 8013fb0: 4604 mov r4, r0 8013fb2: d001 beq.n 8013fb8 8013fb4: f001 fc1e bl 80157f4 <_fflush_r> 8013fb8: 68a1 ldr r1, [r4, #8] 8013fba: 4b09 ldr r3, [pc, #36] @ (8013fe0 ) 8013fbc: 4299 cmp r1, r3 8013fbe: d002 beq.n 8013fc6 8013fc0: 4620 mov r0, r4 8013fc2: f001 fc17 bl 80157f4 <_fflush_r> 8013fc6: 68e1 ldr r1, [r4, #12] 8013fc8: 4b06 ldr r3, [pc, #24] @ (8013fe4 ) 8013fca: 4299 cmp r1, r3 8013fcc: d004 beq.n 8013fd8 8013fce: 4620 mov r0, r4 8013fd0: e8bd 4010 ldmia.w sp!, {r4, lr} 8013fd4: f001 bc0e b.w 80157f4 <_fflush_r> 8013fd8: bd10 pop {r4, pc} 8013fda: bf00 nop 8013fdc: 20001088 .word 0x20001088 8013fe0: 200010f0 .word 0x200010f0 8013fe4: 20001158 .word 0x20001158 08013fe8 : 8013fe8: b510 push {r4, lr} 8013fea: 4b0b ldr r3, [pc, #44] @ (8014018 ) 8013fec: 4c0b ldr r4, [pc, #44] @ (801401c ) 8013fee: 4a0c ldr r2, [pc, #48] @ (8014020 ) 8013ff0: 4620 mov r0, r4 8013ff2: 601a str r2, [r3, #0] 8013ff4: 2104 movs r1, #4 8013ff6: 2200 movs r2, #0 8013ff8: f7ff ff94 bl 8013f24 8013ffc: f104 0068 add.w r0, r4, #104 @ 0x68 8014000: 2201 movs r2, #1 8014002: 2109 movs r1, #9 8014004: f7ff ff8e bl 8013f24 8014008: f104 00d0 add.w r0, r4, #208 @ 0xd0 801400c: 2202 movs r2, #2 801400e: e8bd 4010 ldmia.w sp!, {r4, lr} 8014012: 2112 movs r1, #18 8014014: f7ff bf86 b.w 8013f24 8014018: 200011c0 .word 0x200011c0 801401c: 20001088 .word 0x20001088 8014020: 08013f91 .word 0x08013f91 08014024 <__sfp_lock_acquire>: 8014024: 4801 ldr r0, [pc, #4] @ (801402c <__sfp_lock_acquire+0x8>) 8014026: f000 b986 b.w 8014336 <__retarget_lock_acquire_recursive> 801402a: bf00 nop 801402c: 200011c5 .word 0x200011c5 08014030 <__sfp_lock_release>: 8014030: 4801 ldr r0, [pc, #4] @ (8014038 <__sfp_lock_release+0x8>) 8014032: f000 b981 b.w 8014338 <__retarget_lock_release_recursive> 8014036: bf00 nop 8014038: 200011c5 .word 0x200011c5 0801403c <__sinit>: 801403c: b510 push {r4, lr} 801403e: 4604 mov r4, r0 8014040: f7ff fff0 bl 8014024 <__sfp_lock_acquire> 8014044: 6a23 ldr r3, [r4, #32] 8014046: b11b cbz r3, 8014050 <__sinit+0x14> 8014048: e8bd 4010 ldmia.w sp!, {r4, lr} 801404c: f7ff bff0 b.w 8014030 <__sfp_lock_release> 8014050: 4b04 ldr r3, [pc, #16] @ (8014064 <__sinit+0x28>) 8014052: 6223 str r3, [r4, #32] 8014054: 4b04 ldr r3, [pc, #16] @ (8014068 <__sinit+0x2c>) 8014056: 681b ldr r3, [r3, #0] 8014058: 2b00 cmp r3, #0 801405a: d1f5 bne.n 8014048 <__sinit+0xc> 801405c: f7ff ffc4 bl 8013fe8 8014060: e7f2 b.n 8014048 <__sinit+0xc> 8014062: bf00 nop 8014064: 08013fa9 .word 0x08013fa9 8014068: 200011c0 .word 0x200011c0 0801406c <_vsniprintf_r>: 801406c: b530 push {r4, r5, lr} 801406e: 4614 mov r4, r2 8014070: 2c00 cmp r4, #0 8014072: 4605 mov r5, r0 8014074: 461a mov r2, r3 8014076: b09b sub sp, #108 @ 0x6c 8014078: da05 bge.n 8014086 <_vsniprintf_r+0x1a> 801407a: 238b movs r3, #139 @ 0x8b 801407c: 6003 str r3, [r0, #0] 801407e: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8014082: b01b add sp, #108 @ 0x6c 8014084: bd30 pop {r4, r5, pc} 8014086: f44f 7302 mov.w r3, #520 @ 0x208 801408a: f8ad 300c strh.w r3, [sp, #12] 801408e: f04f 0300 mov.w r3, #0 8014092: 9319 str r3, [sp, #100] @ 0x64 8014094: bf0c ite eq 8014096: 4623 moveq r3, r4 8014098: f104 33ff addne.w r3, r4, #4294967295 @ 0xffffffff 801409c: 9302 str r3, [sp, #8] 801409e: 9305 str r3, [sp, #20] 80140a0: f64f 73ff movw r3, #65535 @ 0xffff 80140a4: 9100 str r1, [sp, #0] 80140a6: 9104 str r1, [sp, #16] 80140a8: f8ad 300e strh.w r3, [sp, #14] 80140ac: 4669 mov r1, sp 80140ae: 9b1e ldr r3, [sp, #120] @ 0x78 80140b0: f001 f83a bl 8015128 <_svfiprintf_r> 80140b4: 1c43 adds r3, r0, #1 80140b6: bfbc itt lt 80140b8: 238b movlt r3, #139 @ 0x8b 80140ba: 602b strlt r3, [r5, #0] 80140bc: 2c00 cmp r4, #0 80140be: d0e0 beq.n 8014082 <_vsniprintf_r+0x16> 80140c0: 2200 movs r2, #0 80140c2: 9b00 ldr r3, [sp, #0] 80140c4: 701a strb r2, [r3, #0] 80140c6: e7dc b.n 8014082 <_vsniprintf_r+0x16> 080140c8 : 80140c8: b507 push {r0, r1, r2, lr} 80140ca: 9300 str r3, [sp, #0] 80140cc: 4613 mov r3, r2 80140ce: 460a mov r2, r1 80140d0: 4601 mov r1, r0 80140d2: 4803 ldr r0, [pc, #12] @ (80140e0 ) 80140d4: 6800 ldr r0, [r0, #0] 80140d6: f7ff ffc9 bl 801406c <_vsniprintf_r> 80140da: b003 add sp, #12 80140dc: f85d fb04 ldr.w pc, [sp], #4 80140e0: 20000090 .word 0x20000090 080140e4 <_fwalk_sglue>: 80140e4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80140e8: 4607 mov r7, r0 80140ea: 4688 mov r8, r1 80140ec: 4614 mov r4, r2 80140ee: 2600 movs r6, #0 80140f0: e9d4 9501 ldrd r9, r5, [r4, #4] 80140f4: f1b9 0901 subs.w r9, r9, #1 80140f8: d505 bpl.n 8014106 <_fwalk_sglue+0x22> 80140fa: 6824 ldr r4, [r4, #0] 80140fc: 2c00 cmp r4, #0 80140fe: d1f7 bne.n 80140f0 <_fwalk_sglue+0xc> 8014100: 4630 mov r0, r6 8014102: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8014106: 89ab ldrh r3, [r5, #12] 8014108: 2b01 cmp r3, #1 801410a: d907 bls.n 801411c <_fwalk_sglue+0x38> 801410c: f9b5 300e ldrsh.w r3, [r5, #14] 8014110: 3301 adds r3, #1 8014112: d003 beq.n 801411c <_fwalk_sglue+0x38> 8014114: 4629 mov r1, r5 8014116: 4638 mov r0, r7 8014118: 47c0 blx r8 801411a: 4306 orrs r6, r0 801411c: 3568 adds r5, #104 @ 0x68 801411e: e7e9 b.n 80140f4 <_fwalk_sglue+0x10> 08014120 : 8014120: b40f push {r0, r1, r2, r3} 8014122: b507 push {r0, r1, r2, lr} 8014124: 4906 ldr r1, [pc, #24] @ (8014140 ) 8014126: ab04 add r3, sp, #16 8014128: 6808 ldr r0, [r1, #0] 801412a: f853 2b04 ldr.w r2, [r3], #4 801412e: 6881 ldr r1, [r0, #8] 8014130: 9301 str r3, [sp, #4] 8014132: f001 f91d bl 8015370 <_vfiprintf_r> 8014136: b003 add sp, #12 8014138: f85d eb04 ldr.w lr, [sp], #4 801413c: b004 add sp, #16 801413e: 4770 bx lr 8014140: 20000090 .word 0x20000090 08014144 : 8014144: 4603 mov r3, r0 8014146: 4402 add r2, r0 8014148: 4293 cmp r3, r2 801414a: d100 bne.n 801414e 801414c: 4770 bx lr 801414e: f803 1b01 strb.w r1, [r3], #1 8014152: e7f9 b.n 8014148 08014154 : 8014154: b538 push {r3, r4, r5, lr} 8014156: 4b0b ldr r3, [pc, #44] @ (8014184 ) 8014158: 4604 mov r4, r0 801415a: 681d ldr r5, [r3, #0] 801415c: 6b6b ldr r3, [r5, #52] @ 0x34 801415e: b953 cbnz r3, 8014176 8014160: 2024 movs r0, #36 @ 0x24 8014162: f001 fa1d bl 80155a0 8014166: 4602 mov r2, r0 8014168: 6368 str r0, [r5, #52] @ 0x34 801416a: b920 cbnz r0, 8014176 801416c: 213d movs r1, #61 @ 0x3d 801416e: 4b06 ldr r3, [pc, #24] @ (8014188 ) 8014170: 4806 ldr r0, [pc, #24] @ (801418c ) 8014172: f000 f903 bl 801437c <__assert_func> 8014176: 4620 mov r0, r4 8014178: 6b69 ldr r1, [r5, #52] @ 0x34 801417a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 801417e: f000 b807 b.w 8014190 8014182: bf00 nop 8014184: 20000090 .word 0x20000090 8014188: 08016d4c .word 0x08016d4c 801418c: 08016d63 .word 0x08016d63 08014190 : 8014190: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8014194: 2300 movs r3, #0 8014196: 460c mov r4, r1 8014198: e9d0 0100 ldrd r0, r1, [r0] 801419c: 4a4c ldr r2, [pc, #304] @ (80142d0 ) 801419e: f7f5 f829 bl 80091f4 <__aeabi_ldivmod> 80141a2: f44f 6161 mov.w r1, #3600 @ 0xe10 80141a6: 2a00 cmp r2, #0 80141a8: bfbc itt lt 80141aa: f502 32a8 addlt.w r2, r2, #86016 @ 0x15000 80141ae: f502 72c0 addlt.w r2, r2, #384 @ 0x180 80141b2: fbb2 f3f1 udiv r3, r2, r1 80141b6: fb01 2213 mls r2, r1, r3, r2 80141ba: f04f 013c mov.w r1, #60 @ 0x3c 80141be: 60a3 str r3, [r4, #8] 80141c0: fbb2 f3f1 udiv r3, r2, r1 80141c4: fb01 2213 mls r2, r1, r3, r2 80141c8: 6022 str r2, [r4, #0] 80141ca: f04f 0207 mov.w r2, #7 80141ce: f500 202f add.w r0, r0, #716800 @ 0xaf000 80141d2: bfac ite ge 80141d4: f600 206c addwge r0, r0, #2668 @ 0xa6c 80141d8: f600 206b addwlt r0, r0, #2667 @ 0xa6b 80141dc: 6063 str r3, [r4, #4] 80141de: 1cc3 adds r3, r0, #3 80141e0: fb93 f2f2 sdiv r2, r3, r2 80141e4: ebc2 02c2 rsb r2, r2, r2, lsl #3 80141e8: 1a9b subs r3, r3, r2 80141ea: 493a ldr r1, [pc, #232] @ (80142d4 ) 80141ec: d555 bpl.n 801429a 80141ee: 3307 adds r3, #7 80141f0: 61a3 str r3, [r4, #24] 80141f2: f5a0 330e sub.w r3, r0, #145408 @ 0x23800 80141f6: f5a3 732c sub.w r3, r3, #688 @ 0x2b0 80141fa: fb93 f1f1 sdiv r1, r3, r1 80141fe: 4b36 ldr r3, [pc, #216] @ (80142d8 ) 8014200: f240 5cb4 movw ip, #1460 @ 0x5b4 8014204: fb03 0001 mla r0, r3, r1, r0 8014208: f648 63ac movw r3, #36524 @ 0x8eac 801420c: fbb0 f3f3 udiv r3, r0, r3 8014210: fbb0 f2fc udiv r2, r0, ip 8014214: 4403 add r3, r0 8014216: 1a9b subs r3, r3, r2 8014218: 4a30 ldr r2, [pc, #192] @ (80142dc ) 801421a: f240 176d movw r7, #365 @ 0x16d 801421e: fbb0 f2f2 udiv r2, r0, r2 8014222: 1a9b subs r3, r3, r2 8014224: fbb3 f2f7 udiv r2, r3, r7 8014228: 2664 movs r6, #100 @ 0x64 801422a: fbb3 f3fc udiv r3, r3, ip 801422e: fbb2 f5f6 udiv r5, r2, r6 8014232: 1aeb subs r3, r5, r3 8014234: 4403 add r3, r0 8014236: 2099 movs r0, #153 @ 0x99 8014238: fb07 3312 mls r3, r7, r2, r3 801423c: eb03 0783 add.w r7, r3, r3, lsl #2 8014240: 3702 adds r7, #2 8014242: fbb7 fcf0 udiv ip, r7, r0 8014246: f04f 0805 mov.w r8, #5 801424a: fb00 f00c mul.w r0, r0, ip 801424e: 3002 adds r0, #2 8014250: fbb0 f0f8 udiv r0, r0, r8 8014254: f103 0e01 add.w lr, r3, #1 8014258: ebae 0000 sub.w r0, lr, r0 801425c: f240 5ef9 movw lr, #1529 @ 0x5f9 8014260: 4577 cmp r7, lr 8014262: bf8c ite hi 8014264: f06f 0709 mvnhi.w r7, #9 8014268: 2702 movls r7, #2 801426a: 4467 add r7, ip 801426c: f44f 7cc8 mov.w ip, #400 @ 0x190 8014270: fb0c 2101 mla r1, ip, r1, r2 8014274: 2f01 cmp r7, #1 8014276: bf98 it ls 8014278: 3101 addls r1, #1 801427a: f5b3 7f99 cmp.w r3, #306 @ 0x132 801427e: d312 bcc.n 80142a6 8014280: f5a3 7399 sub.w r3, r3, #306 @ 0x132 8014284: 61e3 str r3, [r4, #28] 8014286: 2300 movs r3, #0 8014288: f2a1 716c subw r1, r1, #1900 @ 0x76c 801428c: 60e0 str r0, [r4, #12] 801428e: e9c4 7104 strd r7, r1, [r4, #16] 8014292: 4620 mov r0, r4 8014294: 6223 str r3, [r4, #32] 8014296: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 801429a: 2800 cmp r0, #0 801429c: 61a3 str r3, [r4, #24] 801429e: dba8 blt.n 80141f2 80142a0: fb90 f1f1 sdiv r1, r0, r1 80142a4: e7ab b.n 80141fe 80142a6: f012 0f03 tst.w r2, #3 80142aa: d102 bne.n 80142b2 80142ac: fb06 2515 mls r5, r6, r5, r2 80142b0: b95d cbnz r5, 80142ca 80142b2: f44f 75c8 mov.w r5, #400 @ 0x190 80142b6: fbb2 f6f5 udiv r6, r2, r5 80142ba: fb05 2216 mls r2, r5, r6, r2 80142be: fab2 f282 clz r2, r2 80142c2: 0952 lsrs r2, r2, #5 80142c4: 333b adds r3, #59 @ 0x3b 80142c6: 4413 add r3, r2 80142c8: e7dc b.n 8014284 80142ca: 2201 movs r2, #1 80142cc: e7fa b.n 80142c4 80142ce: bf00 nop 80142d0: 00015180 .word 0x00015180 80142d4: 00023ab1 .word 0x00023ab1 80142d8: fffdc54f .word 0xfffdc54f 80142dc: 00023ab0 .word 0x00023ab0 080142e0 <__errno>: 80142e0: 4b01 ldr r3, [pc, #4] @ (80142e8 <__errno+0x8>) 80142e2: 6818 ldr r0, [r3, #0] 80142e4: 4770 bx lr 80142e6: bf00 nop 80142e8: 20000090 .word 0x20000090 080142ec <__libc_init_array>: 80142ec: b570 push {r4, r5, r6, lr} 80142ee: 2600 movs r6, #0 80142f0: 4d0c ldr r5, [pc, #48] @ (8014324 <__libc_init_array+0x38>) 80142f2: 4c0d ldr r4, [pc, #52] @ (8014328 <__libc_init_array+0x3c>) 80142f4: 1b64 subs r4, r4, r5 80142f6: 10a4 asrs r4, r4, #2 80142f8: 42a6 cmp r6, r4 80142fa: d109 bne.n 8014310 <__libc_init_array+0x24> 80142fc: f002 f904 bl 8016508 <_init> 8014300: 2600 movs r6, #0 8014302: 4d0a ldr r5, [pc, #40] @ (801432c <__libc_init_array+0x40>) 8014304: 4c0a ldr r4, [pc, #40] @ (8014330 <__libc_init_array+0x44>) 8014306: 1b64 subs r4, r4, r5 8014308: 10a4 asrs r4, r4, #2 801430a: 42a6 cmp r6, r4 801430c: d105 bne.n 801431a <__libc_init_array+0x2e> 801430e: bd70 pop {r4, r5, r6, pc} 8014310: f855 3b04 ldr.w r3, [r5], #4 8014314: 4798 blx r3 8014316: 3601 adds r6, #1 8014318: e7ee b.n 80142f8 <__libc_init_array+0xc> 801431a: f855 3b04 ldr.w r3, [r5], #4 801431e: 4798 blx r3 8014320: 3601 adds r6, #1 8014322: e7f2 b.n 801430a <__libc_init_array+0x1e> 8014324: 080170ec .word 0x080170ec 8014328: 080170ec .word 0x080170ec 801432c: 080170ec .word 0x080170ec 8014330: 080170f0 .word 0x080170f0 08014334 <__retarget_lock_init_recursive>: 8014334: 4770 bx lr 08014336 <__retarget_lock_acquire_recursive>: 8014336: 4770 bx lr 08014338 <__retarget_lock_release_recursive>: 8014338: 4770 bx lr ... 0801433c <_localeconv_r>: 801433c: 4800 ldr r0, [pc, #0] @ (8014340 <_localeconv_r+0x4>) 801433e: 4770 bx lr 8014340: 200001d0 .word 0x200001d0 08014344 : 8014344: 4603 mov r3, r0 8014346: b510 push {r4, lr} 8014348: b2c9 uxtb r1, r1 801434a: 4402 add r2, r0 801434c: 4293 cmp r3, r2 801434e: 4618 mov r0, r3 8014350: d101 bne.n 8014356 8014352: 2000 movs r0, #0 8014354: e003 b.n 801435e 8014356: 7804 ldrb r4, [r0, #0] 8014358: 3301 adds r3, #1 801435a: 428c cmp r4, r1 801435c: d1f6 bne.n 801434c 801435e: bd10 pop {r4, pc} 08014360 : 8014360: 440a add r2, r1 8014362: 4291 cmp r1, r2 8014364: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff 8014368: d100 bne.n 801436c 801436a: 4770 bx lr 801436c: b510 push {r4, lr} 801436e: f811 4b01 ldrb.w r4, [r1], #1 8014372: 4291 cmp r1, r2 8014374: f803 4f01 strb.w r4, [r3, #1]! 8014378: d1f9 bne.n 801436e 801437a: bd10 pop {r4, pc} 0801437c <__assert_func>: 801437c: b51f push {r0, r1, r2, r3, r4, lr} 801437e: 4614 mov r4, r2 8014380: 461a mov r2, r3 8014382: 4b09 ldr r3, [pc, #36] @ (80143a8 <__assert_func+0x2c>) 8014384: 4605 mov r5, r0 8014386: 681b ldr r3, [r3, #0] 8014388: 68d8 ldr r0, [r3, #12] 801438a: b14c cbz r4, 80143a0 <__assert_func+0x24> 801438c: 4b07 ldr r3, [pc, #28] @ (80143ac <__assert_func+0x30>) 801438e: e9cd 3401 strd r3, r4, [sp, #4] 8014392: 9100 str r1, [sp, #0] 8014394: 462b mov r3, r5 8014396: 4906 ldr r1, [pc, #24] @ (80143b0 <__assert_func+0x34>) 8014398: f001 fe1e bl 8015fd8 801439c: f001 ffe4 bl 8016368 80143a0: 4b04 ldr r3, [pc, #16] @ (80143b4 <__assert_func+0x38>) 80143a2: 461c mov r4, r3 80143a4: e7f3 b.n 801438e <__assert_func+0x12> 80143a6: bf00 nop 80143a8: 20000090 .word 0x20000090 80143ac: 08016dbb .word 0x08016dbb 80143b0: 08016dc8 .word 0x08016dc8 80143b4: 08016df6 .word 0x08016df6 080143b8 : 80143b8: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 80143bc: 6903 ldr r3, [r0, #16] 80143be: 690c ldr r4, [r1, #16] 80143c0: 4607 mov r7, r0 80143c2: 42a3 cmp r3, r4 80143c4: db7e blt.n 80144c4 80143c6: 3c01 subs r4, #1 80143c8: 00a3 lsls r3, r4, #2 80143ca: f100 0514 add.w r5, r0, #20 80143ce: f101 0814 add.w r8, r1, #20 80143d2: 9300 str r3, [sp, #0] 80143d4: eb05 0384 add.w r3, r5, r4, lsl #2 80143d8: 9301 str r3, [sp, #4] 80143da: f858 3024 ldr.w r3, [r8, r4, lsl #2] 80143de: f855 2024 ldr.w r2, [r5, r4, lsl #2] 80143e2: 3301 adds r3, #1 80143e4: 429a cmp r2, r3 80143e6: fbb2 f6f3 udiv r6, r2, r3 80143ea: eb08 0984 add.w r9, r8, r4, lsl #2 80143ee: d32e bcc.n 801444e 80143f0: f04f 0a00 mov.w sl, #0 80143f4: 46c4 mov ip, r8 80143f6: 46ae mov lr, r5 80143f8: 46d3 mov fp, sl 80143fa: f85c 3b04 ldr.w r3, [ip], #4 80143fe: b298 uxth r0, r3 8014400: fb06 a000 mla r0, r6, r0, sl 8014404: 0c1b lsrs r3, r3, #16 8014406: 0c02 lsrs r2, r0, #16 8014408: fb06 2303 mla r3, r6, r3, r2 801440c: f8de 2000 ldr.w r2, [lr] 8014410: b280 uxth r0, r0 8014412: b292 uxth r2, r2 8014414: 1a12 subs r2, r2, r0 8014416: 445a add r2, fp 8014418: f8de 0000 ldr.w r0, [lr] 801441c: ea4f 4a13 mov.w sl, r3, lsr #16 8014420: b29b uxth r3, r3 8014422: ebc3 4322 rsb r3, r3, r2, asr #16 8014426: eb03 4310 add.w r3, r3, r0, lsr #16 801442a: b292 uxth r2, r2 801442c: ea42 4203 orr.w r2, r2, r3, lsl #16 8014430: 45e1 cmp r9, ip 8014432: ea4f 4b23 mov.w fp, r3, asr #16 8014436: f84e 2b04 str.w r2, [lr], #4 801443a: d2de bcs.n 80143fa 801443c: 9b00 ldr r3, [sp, #0] 801443e: 58eb ldr r3, [r5, r3] 8014440: b92b cbnz r3, 801444e 8014442: 9b01 ldr r3, [sp, #4] 8014444: 3b04 subs r3, #4 8014446: 429d cmp r5, r3 8014448: 461a mov r2, r3 801444a: d32f bcc.n 80144ac 801444c: 613c str r4, [r7, #16] 801444e: 4638 mov r0, r7 8014450: f001 fc76 bl 8015d40 <__mcmp> 8014454: 2800 cmp r0, #0 8014456: db25 blt.n 80144a4 8014458: 4629 mov r1, r5 801445a: 2000 movs r0, #0 801445c: f858 2b04 ldr.w r2, [r8], #4 8014460: f8d1 c000 ldr.w ip, [r1] 8014464: fa1f fe82 uxth.w lr, r2 8014468: fa1f f38c uxth.w r3, ip 801446c: eba3 030e sub.w r3, r3, lr 8014470: 4403 add r3, r0 8014472: 0c12 lsrs r2, r2, #16 8014474: ebc2 4223 rsb r2, r2, r3, asr #16 8014478: eb02 421c add.w r2, r2, ip, lsr #16 801447c: b29b uxth r3, r3 801447e: ea43 4302 orr.w r3, r3, r2, lsl #16 8014482: 45c1 cmp r9, r8 8014484: ea4f 4022 mov.w r0, r2, asr #16 8014488: f841 3b04 str.w r3, [r1], #4 801448c: d2e6 bcs.n 801445c 801448e: f855 2024 ldr.w r2, [r5, r4, lsl #2] 8014492: eb05 0384 add.w r3, r5, r4, lsl #2 8014496: b922 cbnz r2, 80144a2 8014498: 3b04 subs r3, #4 801449a: 429d cmp r5, r3 801449c: 461a mov r2, r3 801449e: d30b bcc.n 80144b8 80144a0: 613c str r4, [r7, #16] 80144a2: 3601 adds r6, #1 80144a4: 4630 mov r0, r6 80144a6: b003 add sp, #12 80144a8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80144ac: 6812 ldr r2, [r2, #0] 80144ae: 3b04 subs r3, #4 80144b0: 2a00 cmp r2, #0 80144b2: d1cb bne.n 801444c 80144b4: 3c01 subs r4, #1 80144b6: e7c6 b.n 8014446 80144b8: 6812 ldr r2, [r2, #0] 80144ba: 3b04 subs r3, #4 80144bc: 2a00 cmp r2, #0 80144be: d1ef bne.n 80144a0 80144c0: 3c01 subs r4, #1 80144c2: e7ea b.n 801449a 80144c4: 2000 movs r0, #0 80144c6: e7ee b.n 80144a6 080144c8 <_dtoa_r>: 80144c8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80144cc: 4614 mov r4, r2 80144ce: 461d mov r5, r3 80144d0: 69c7 ldr r7, [r0, #28] 80144d2: b097 sub sp, #92 @ 0x5c 80144d4: 4681 mov r9, r0 80144d6: e9cd 4506 strd r4, r5, [sp, #24] 80144da: 9e23 ldr r6, [sp, #140] @ 0x8c 80144dc: b97f cbnz r7, 80144fe <_dtoa_r+0x36> 80144de: 2010 movs r0, #16 80144e0: f001 f85e bl 80155a0 80144e4: 4602 mov r2, r0 80144e6: f8c9 001c str.w r0, [r9, #28] 80144ea: b920 cbnz r0, 80144f6 <_dtoa_r+0x2e> 80144ec: 21ef movs r1, #239 @ 0xef 80144ee: 4bac ldr r3, [pc, #688] @ (80147a0 <_dtoa_r+0x2d8>) 80144f0: 48ac ldr r0, [pc, #688] @ (80147a4 <_dtoa_r+0x2dc>) 80144f2: f7ff ff43 bl 801437c <__assert_func> 80144f6: e9c0 7701 strd r7, r7, [r0, #4] 80144fa: 6007 str r7, [r0, #0] 80144fc: 60c7 str r7, [r0, #12] 80144fe: f8d9 301c ldr.w r3, [r9, #28] 8014502: 6819 ldr r1, [r3, #0] 8014504: b159 cbz r1, 801451e <_dtoa_r+0x56> 8014506: 685a ldr r2, [r3, #4] 8014508: 2301 movs r3, #1 801450a: 4093 lsls r3, r2 801450c: 604a str r2, [r1, #4] 801450e: 608b str r3, [r1, #8] 8014510: 4648 mov r0, r9 8014512: f001 f9e3 bl 80158dc <_Bfree> 8014516: 2200 movs r2, #0 8014518: f8d9 301c ldr.w r3, [r9, #28] 801451c: 601a str r2, [r3, #0] 801451e: 1e2b subs r3, r5, #0 8014520: bfaf iteee ge 8014522: 2300 movge r3, #0 8014524: 2201 movlt r2, #1 8014526: f023 4300 biclt.w r3, r3, #2147483648 @ 0x80000000 801452a: 9307 strlt r3, [sp, #28] 801452c: bfa8 it ge 801452e: 6033 strge r3, [r6, #0] 8014530: f8dd 801c ldr.w r8, [sp, #28] 8014534: 4b9c ldr r3, [pc, #624] @ (80147a8 <_dtoa_r+0x2e0>) 8014536: bfb8 it lt 8014538: 6032 strlt r2, [r6, #0] 801453a: ea33 0308 bics.w r3, r3, r8 801453e: d112 bne.n 8014566 <_dtoa_r+0x9e> 8014540: f242 730f movw r3, #9999 @ 0x270f 8014544: 9a22 ldr r2, [sp, #136] @ 0x88 8014546: 6013 str r3, [r2, #0] 8014548: f3c8 0313 ubfx r3, r8, #0, #20 801454c: 4323 orrs r3, r4 801454e: f000 855e beq.w 801500e <_dtoa_r+0xb46> 8014552: 9b24 ldr r3, [sp, #144] @ 0x90 8014554: f8df a254 ldr.w sl, [pc, #596] @ 80147ac <_dtoa_r+0x2e4> 8014558: 2b00 cmp r3, #0 801455a: f000 8560 beq.w 801501e <_dtoa_r+0xb56> 801455e: f10a 0303 add.w r3, sl, #3 8014562: f000 bd5a b.w 801501a <_dtoa_r+0xb52> 8014566: e9dd 2306 ldrd r2, r3, [sp, #24] 801456a: e9cd 230c strd r2, r3, [sp, #48] @ 0x30 801456e: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 8014572: 2200 movs r2, #0 8014574: 2300 movs r3, #0 8014576: f7f4 fa83 bl 8008a80 <__aeabi_dcmpeq> 801457a: 4607 mov r7, r0 801457c: b158 cbz r0, 8014596 <_dtoa_r+0xce> 801457e: 2301 movs r3, #1 8014580: 9a22 ldr r2, [sp, #136] @ 0x88 8014582: 6013 str r3, [r2, #0] 8014584: 9b24 ldr r3, [sp, #144] @ 0x90 8014586: b113 cbz r3, 801458e <_dtoa_r+0xc6> 8014588: 4b89 ldr r3, [pc, #548] @ (80147b0 <_dtoa_r+0x2e8>) 801458a: 9a24 ldr r2, [sp, #144] @ 0x90 801458c: 6013 str r3, [r2, #0] 801458e: f8df a224 ldr.w sl, [pc, #548] @ 80147b4 <_dtoa_r+0x2ec> 8014592: f000 bd44 b.w 801501e <_dtoa_r+0xb56> 8014596: ab14 add r3, sp, #80 @ 0x50 8014598: 9301 str r3, [sp, #4] 801459a: ab15 add r3, sp, #84 @ 0x54 801459c: 9300 str r3, [sp, #0] 801459e: 4648 mov r0, r9 80145a0: e9dd 230c ldrd r2, r3, [sp, #48] @ 0x30 80145a4: f001 fc7c bl 8015ea0 <__d2b> 80145a8: f3c8 560a ubfx r6, r8, #20, #11 80145ac: 9003 str r0, [sp, #12] 80145ae: 2e00 cmp r6, #0 80145b0: d078 beq.n 80146a4 <_dtoa_r+0x1dc> 80145b2: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 80145b6: 9b0d ldr r3, [sp, #52] @ 0x34 80145b8: f2a6 36ff subw r6, r6, #1023 @ 0x3ff 80145bc: f3c3 0313 ubfx r3, r3, #0, #20 80145c0: f043 537f orr.w r3, r3, #1069547520 @ 0x3fc00000 80145c4: f443 1340 orr.w r3, r3, #3145728 @ 0x300000 80145c8: 9712 str r7, [sp, #72] @ 0x48 80145ca: 4619 mov r1, r3 80145cc: 2200 movs r2, #0 80145ce: 4b7a ldr r3, [pc, #488] @ (80147b8 <_dtoa_r+0x2f0>) 80145d0: f7f3 fe36 bl 8008240 <__aeabi_dsub> 80145d4: a36c add r3, pc, #432 @ (adr r3, 8014788 <_dtoa_r+0x2c0>) 80145d6: e9d3 2300 ldrd r2, r3, [r3] 80145da: f7f3 ffe9 bl 80085b0 <__aeabi_dmul> 80145de: a36c add r3, pc, #432 @ (adr r3, 8014790 <_dtoa_r+0x2c8>) 80145e0: e9d3 2300 ldrd r2, r3, [r3] 80145e4: f7f3 fe2e bl 8008244 <__adddf3> 80145e8: 4604 mov r4, r0 80145ea: 4630 mov r0, r6 80145ec: 460d mov r5, r1 80145ee: f7f3 ff75 bl 80084dc <__aeabi_i2d> 80145f2: a369 add r3, pc, #420 @ (adr r3, 8014798 <_dtoa_r+0x2d0>) 80145f4: e9d3 2300 ldrd r2, r3, [r3] 80145f8: f7f3 ffda bl 80085b0 <__aeabi_dmul> 80145fc: 4602 mov r2, r0 80145fe: 460b mov r3, r1 8014600: 4620 mov r0, r4 8014602: 4629 mov r1, r5 8014604: f7f3 fe1e bl 8008244 <__adddf3> 8014608: 4604 mov r4, r0 801460a: 460d mov r5, r1 801460c: f7f4 fa80 bl 8008b10 <__aeabi_d2iz> 8014610: 2200 movs r2, #0 8014612: 4607 mov r7, r0 8014614: 2300 movs r3, #0 8014616: 4620 mov r0, r4 8014618: 4629 mov r1, r5 801461a: f7f4 fa3b bl 8008a94 <__aeabi_dcmplt> 801461e: b140 cbz r0, 8014632 <_dtoa_r+0x16a> 8014620: 4638 mov r0, r7 8014622: f7f3 ff5b bl 80084dc <__aeabi_i2d> 8014626: 4622 mov r2, r4 8014628: 462b mov r3, r5 801462a: f7f4 fa29 bl 8008a80 <__aeabi_dcmpeq> 801462e: b900 cbnz r0, 8014632 <_dtoa_r+0x16a> 8014630: 3f01 subs r7, #1 8014632: 2f16 cmp r7, #22 8014634: d854 bhi.n 80146e0 <_dtoa_r+0x218> 8014636: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 801463a: 4b60 ldr r3, [pc, #384] @ (80147bc <_dtoa_r+0x2f4>) 801463c: eb03 03c7 add.w r3, r3, r7, lsl #3 8014640: e9d3 2300 ldrd r2, r3, [r3] 8014644: f7f4 fa26 bl 8008a94 <__aeabi_dcmplt> 8014648: 2800 cmp r0, #0 801464a: d04b beq.n 80146e4 <_dtoa_r+0x21c> 801464c: 2300 movs r3, #0 801464e: 3f01 subs r7, #1 8014650: 930f str r3, [sp, #60] @ 0x3c 8014652: 9b14 ldr r3, [sp, #80] @ 0x50 8014654: 1b9b subs r3, r3, r6 8014656: 1e5a subs r2, r3, #1 8014658: bf49 itett mi 801465a: f1c3 0301 rsbmi r3, r3, #1 801465e: 2300 movpl r3, #0 8014660: 9304 strmi r3, [sp, #16] 8014662: 2300 movmi r3, #0 8014664: 9209 str r2, [sp, #36] @ 0x24 8014666: bf54 ite pl 8014668: 9304 strpl r3, [sp, #16] 801466a: 9309 strmi r3, [sp, #36] @ 0x24 801466c: 2f00 cmp r7, #0 801466e: db3b blt.n 80146e8 <_dtoa_r+0x220> 8014670: 9b09 ldr r3, [sp, #36] @ 0x24 8014672: 970e str r7, [sp, #56] @ 0x38 8014674: 443b add r3, r7 8014676: 9309 str r3, [sp, #36] @ 0x24 8014678: 2300 movs r3, #0 801467a: 930a str r3, [sp, #40] @ 0x28 801467c: 9b20 ldr r3, [sp, #128] @ 0x80 801467e: 2b09 cmp r3, #9 8014680: d865 bhi.n 801474e <_dtoa_r+0x286> 8014682: 2b05 cmp r3, #5 8014684: bfc4 itt gt 8014686: 3b04 subgt r3, #4 8014688: 9320 strgt r3, [sp, #128] @ 0x80 801468a: 9b20 ldr r3, [sp, #128] @ 0x80 801468c: bfc8 it gt 801468e: 2400 movgt r4, #0 8014690: f1a3 0302 sub.w r3, r3, #2 8014694: bfd8 it le 8014696: 2401 movle r4, #1 8014698: 2b03 cmp r3, #3 801469a: d864 bhi.n 8014766 <_dtoa_r+0x29e> 801469c: e8df f003 tbb [pc, r3] 80146a0: 2c385553 .word 0x2c385553 80146a4: e9dd 6314 ldrd r6, r3, [sp, #80] @ 0x50 80146a8: 441e add r6, r3 80146aa: f206 4332 addw r3, r6, #1074 @ 0x432 80146ae: 2b20 cmp r3, #32 80146b0: bfc1 itttt gt 80146b2: f1c3 0340 rsbgt r3, r3, #64 @ 0x40 80146b6: fa08 f803 lslgt.w r8, r8, r3 80146ba: f206 4312 addwgt r3, r6, #1042 @ 0x412 80146be: fa24 f303 lsrgt.w r3, r4, r3 80146c2: bfd6 itet le 80146c4: f1c3 0320 rsble r3, r3, #32 80146c8: ea48 0003 orrgt.w r0, r8, r3 80146cc: fa04 f003 lslle.w r0, r4, r3 80146d0: f7f3 fef4 bl 80084bc <__aeabi_ui2d> 80146d4: 2201 movs r2, #1 80146d6: f1a1 73f8 sub.w r3, r1, #32505856 @ 0x1f00000 80146da: 3e01 subs r6, #1 80146dc: 9212 str r2, [sp, #72] @ 0x48 80146de: e774 b.n 80145ca <_dtoa_r+0x102> 80146e0: 2301 movs r3, #1 80146e2: e7b5 b.n 8014650 <_dtoa_r+0x188> 80146e4: 900f str r0, [sp, #60] @ 0x3c 80146e6: e7b4 b.n 8014652 <_dtoa_r+0x18a> 80146e8: 9b04 ldr r3, [sp, #16] 80146ea: 1bdb subs r3, r3, r7 80146ec: 9304 str r3, [sp, #16] 80146ee: 427b negs r3, r7 80146f0: 930a str r3, [sp, #40] @ 0x28 80146f2: 2300 movs r3, #0 80146f4: 930e str r3, [sp, #56] @ 0x38 80146f6: e7c1 b.n 801467c <_dtoa_r+0x1b4> 80146f8: 2301 movs r3, #1 80146fa: 930b str r3, [sp, #44] @ 0x2c 80146fc: 9b21 ldr r3, [sp, #132] @ 0x84 80146fe: eb07 0b03 add.w fp, r7, r3 8014702: f10b 0301 add.w r3, fp, #1 8014706: 2b01 cmp r3, #1 8014708: 9308 str r3, [sp, #32] 801470a: bfb8 it lt 801470c: 2301 movlt r3, #1 801470e: e006 b.n 801471e <_dtoa_r+0x256> 8014710: 2301 movs r3, #1 8014712: 930b str r3, [sp, #44] @ 0x2c 8014714: 9b21 ldr r3, [sp, #132] @ 0x84 8014716: 2b00 cmp r3, #0 8014718: dd28 ble.n 801476c <_dtoa_r+0x2a4> 801471a: 469b mov fp, r3 801471c: 9308 str r3, [sp, #32] 801471e: 2100 movs r1, #0 8014720: 2204 movs r2, #4 8014722: f8d9 001c ldr.w r0, [r9, #28] 8014726: f102 0514 add.w r5, r2, #20 801472a: 429d cmp r5, r3 801472c: d926 bls.n 801477c <_dtoa_r+0x2b4> 801472e: 6041 str r1, [r0, #4] 8014730: 4648 mov r0, r9 8014732: f001 f893 bl 801585c <_Balloc> 8014736: 4682 mov sl, r0 8014738: 2800 cmp r0, #0 801473a: d143 bne.n 80147c4 <_dtoa_r+0x2fc> 801473c: 4602 mov r2, r0 801473e: f240 11af movw r1, #431 @ 0x1af 8014742: 4b1f ldr r3, [pc, #124] @ (80147c0 <_dtoa_r+0x2f8>) 8014744: e6d4 b.n 80144f0 <_dtoa_r+0x28> 8014746: 2300 movs r3, #0 8014748: e7e3 b.n 8014712 <_dtoa_r+0x24a> 801474a: 2300 movs r3, #0 801474c: e7d5 b.n 80146fa <_dtoa_r+0x232> 801474e: 2401 movs r4, #1 8014750: 2300 movs r3, #0 8014752: 940b str r4, [sp, #44] @ 0x2c 8014754: 9320 str r3, [sp, #128] @ 0x80 8014756: f04f 3bff mov.w fp, #4294967295 @ 0xffffffff 801475a: 2200 movs r2, #0 801475c: 2312 movs r3, #18 801475e: f8cd b020 str.w fp, [sp, #32] 8014762: 9221 str r2, [sp, #132] @ 0x84 8014764: e7db b.n 801471e <_dtoa_r+0x256> 8014766: 2301 movs r3, #1 8014768: 930b str r3, [sp, #44] @ 0x2c 801476a: e7f4 b.n 8014756 <_dtoa_r+0x28e> 801476c: f04f 0b01 mov.w fp, #1 8014770: 465b mov r3, fp 8014772: f8cd b020 str.w fp, [sp, #32] 8014776: f8cd b084 str.w fp, [sp, #132] @ 0x84 801477a: e7d0 b.n 801471e <_dtoa_r+0x256> 801477c: 3101 adds r1, #1 801477e: 0052 lsls r2, r2, #1 8014780: e7d1 b.n 8014726 <_dtoa_r+0x25e> 8014782: bf00 nop 8014784: f3af 8000 nop.w 8014788: 636f4361 .word 0x636f4361 801478c: 3fd287a7 .word 0x3fd287a7 8014790: 8b60c8b3 .word 0x8b60c8b3 8014794: 3fc68a28 .word 0x3fc68a28 8014798: 509f79fb .word 0x509f79fb 801479c: 3fd34413 .word 0x3fd34413 80147a0: 08016d4c .word 0x08016d4c 80147a4: 08016e04 .word 0x08016e04 80147a8: 7ff00000 .word 0x7ff00000 80147ac: 08016e00 .word 0x08016e00 80147b0: 08016d29 .word 0x08016d29 80147b4: 08016d28 .word 0x08016d28 80147b8: 3ff80000 .word 0x3ff80000 80147bc: 08016f18 .word 0x08016f18 80147c0: 08016e5c .word 0x08016e5c 80147c4: f8d9 301c ldr.w r3, [r9, #28] 80147c8: 6018 str r0, [r3, #0] 80147ca: 9b08 ldr r3, [sp, #32] 80147cc: 2b0e cmp r3, #14 80147ce: f200 80a1 bhi.w 8014914 <_dtoa_r+0x44c> 80147d2: 2c00 cmp r4, #0 80147d4: f000 809e beq.w 8014914 <_dtoa_r+0x44c> 80147d8: 2f00 cmp r7, #0 80147da: dd33 ble.n 8014844 <_dtoa_r+0x37c> 80147dc: 4b9c ldr r3, [pc, #624] @ (8014a50 <_dtoa_r+0x588>) 80147de: f007 020f and.w r2, r7, #15 80147e2: eb03 03c2 add.w r3, r3, r2, lsl #3 80147e6: 05f8 lsls r0, r7, #23 80147e8: e9d3 3400 ldrd r3, r4, [r3] 80147ec: e9cd 3410 strd r3, r4, [sp, #64] @ 0x40 80147f0: ea4f 1427 mov.w r4, r7, asr #4 80147f4: d516 bpl.n 8014824 <_dtoa_r+0x35c> 80147f6: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 80147fa: 4b96 ldr r3, [pc, #600] @ (8014a54 <_dtoa_r+0x58c>) 80147fc: 2603 movs r6, #3 80147fe: e9d3 2308 ldrd r2, r3, [r3, #32] 8014802: f7f3 ffff bl 8008804 <__aeabi_ddiv> 8014806: e9cd 0106 strd r0, r1, [sp, #24] 801480a: f004 040f and.w r4, r4, #15 801480e: 4d91 ldr r5, [pc, #580] @ (8014a54 <_dtoa_r+0x58c>) 8014810: b954 cbnz r4, 8014828 <_dtoa_r+0x360> 8014812: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014816: e9dd 0106 ldrd r0, r1, [sp, #24] 801481a: f7f3 fff3 bl 8008804 <__aeabi_ddiv> 801481e: e9cd 0106 strd r0, r1, [sp, #24] 8014822: e028 b.n 8014876 <_dtoa_r+0x3ae> 8014824: 2602 movs r6, #2 8014826: e7f2 b.n 801480e <_dtoa_r+0x346> 8014828: 07e1 lsls r1, r4, #31 801482a: d508 bpl.n 801483e <_dtoa_r+0x376> 801482c: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8014830: e9d5 2300 ldrd r2, r3, [r5] 8014834: f7f3 febc bl 80085b0 <__aeabi_dmul> 8014838: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 801483c: 3601 adds r6, #1 801483e: 1064 asrs r4, r4, #1 8014840: 3508 adds r5, #8 8014842: e7e5 b.n 8014810 <_dtoa_r+0x348> 8014844: f000 80af beq.w 80149a6 <_dtoa_r+0x4de> 8014848: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 801484c: 427c negs r4, r7 801484e: 4b80 ldr r3, [pc, #512] @ (8014a50 <_dtoa_r+0x588>) 8014850: f004 020f and.w r2, r4, #15 8014854: eb03 03c2 add.w r3, r3, r2, lsl #3 8014858: e9d3 2300 ldrd r2, r3, [r3] 801485c: f7f3 fea8 bl 80085b0 <__aeabi_dmul> 8014860: 2602 movs r6, #2 8014862: 2300 movs r3, #0 8014864: e9cd 0106 strd r0, r1, [sp, #24] 8014868: 4d7a ldr r5, [pc, #488] @ (8014a54 <_dtoa_r+0x58c>) 801486a: 1124 asrs r4, r4, #4 801486c: 2c00 cmp r4, #0 801486e: f040 808f bne.w 8014990 <_dtoa_r+0x4c8> 8014872: 2b00 cmp r3, #0 8014874: d1d3 bne.n 801481e <_dtoa_r+0x356> 8014876: e9dd 4506 ldrd r4, r5, [sp, #24] 801487a: 9b0f ldr r3, [sp, #60] @ 0x3c 801487c: 2b00 cmp r3, #0 801487e: f000 8094 beq.w 80149aa <_dtoa_r+0x4e2> 8014882: 2200 movs r2, #0 8014884: 4620 mov r0, r4 8014886: 4629 mov r1, r5 8014888: 4b73 ldr r3, [pc, #460] @ (8014a58 <_dtoa_r+0x590>) 801488a: f7f4 f903 bl 8008a94 <__aeabi_dcmplt> 801488e: 2800 cmp r0, #0 8014890: f000 808b beq.w 80149aa <_dtoa_r+0x4e2> 8014894: 9b08 ldr r3, [sp, #32] 8014896: 2b00 cmp r3, #0 8014898: f000 8087 beq.w 80149aa <_dtoa_r+0x4e2> 801489c: f1bb 0f00 cmp.w fp, #0 80148a0: dd34 ble.n 801490c <_dtoa_r+0x444> 80148a2: 4620 mov r0, r4 80148a4: 2200 movs r2, #0 80148a6: 4629 mov r1, r5 80148a8: 4b6c ldr r3, [pc, #432] @ (8014a5c <_dtoa_r+0x594>) 80148aa: f7f3 fe81 bl 80085b0 <__aeabi_dmul> 80148ae: 465c mov r4, fp 80148b0: e9cd 0106 strd r0, r1, [sp, #24] 80148b4: f107 38ff add.w r8, r7, #4294967295 @ 0xffffffff 80148b8: 3601 adds r6, #1 80148ba: 4630 mov r0, r6 80148bc: f7f3 fe0e bl 80084dc <__aeabi_i2d> 80148c0: e9dd 2306 ldrd r2, r3, [sp, #24] 80148c4: f7f3 fe74 bl 80085b0 <__aeabi_dmul> 80148c8: 2200 movs r2, #0 80148ca: 4b65 ldr r3, [pc, #404] @ (8014a60 <_dtoa_r+0x598>) 80148cc: f7f3 fcba bl 8008244 <__adddf3> 80148d0: 4605 mov r5, r0 80148d2: f1a1 7650 sub.w r6, r1, #54525952 @ 0x3400000 80148d6: 2c00 cmp r4, #0 80148d8: d16a bne.n 80149b0 <_dtoa_r+0x4e8> 80148da: e9dd 0106 ldrd r0, r1, [sp, #24] 80148de: 2200 movs r2, #0 80148e0: 4b60 ldr r3, [pc, #384] @ (8014a64 <_dtoa_r+0x59c>) 80148e2: f7f3 fcad bl 8008240 <__aeabi_dsub> 80148e6: 4602 mov r2, r0 80148e8: 460b mov r3, r1 80148ea: e9cd 2306 strd r2, r3, [sp, #24] 80148ee: 462a mov r2, r5 80148f0: 4633 mov r3, r6 80148f2: f7f4 f8ed bl 8008ad0 <__aeabi_dcmpgt> 80148f6: 2800 cmp r0, #0 80148f8: f040 8298 bne.w 8014e2c <_dtoa_r+0x964> 80148fc: e9dd 0106 ldrd r0, r1, [sp, #24] 8014900: 462a mov r2, r5 8014902: f106 4300 add.w r3, r6, #2147483648 @ 0x80000000 8014906: f7f4 f8c5 bl 8008a94 <__aeabi_dcmplt> 801490a: bb38 cbnz r0, 801495c <_dtoa_r+0x494> 801490c: e9dd 340c ldrd r3, r4, [sp, #48] @ 0x30 8014910: e9cd 3406 strd r3, r4, [sp, #24] 8014914: 9b15 ldr r3, [sp, #84] @ 0x54 8014916: 2b00 cmp r3, #0 8014918: f2c0 8157 blt.w 8014bca <_dtoa_r+0x702> 801491c: 2f0e cmp r7, #14 801491e: f300 8154 bgt.w 8014bca <_dtoa_r+0x702> 8014922: 4b4b ldr r3, [pc, #300] @ (8014a50 <_dtoa_r+0x588>) 8014924: eb03 03c7 add.w r3, r3, r7, lsl #3 8014928: e9d3 3400 ldrd r3, r4, [r3] 801492c: e9cd 3404 strd r3, r4, [sp, #16] 8014930: 9b21 ldr r3, [sp, #132] @ 0x84 8014932: 2b00 cmp r3, #0 8014934: f280 80e5 bge.w 8014b02 <_dtoa_r+0x63a> 8014938: 9b08 ldr r3, [sp, #32] 801493a: 2b00 cmp r3, #0 801493c: f300 80e1 bgt.w 8014b02 <_dtoa_r+0x63a> 8014940: d10c bne.n 801495c <_dtoa_r+0x494> 8014942: e9dd 0104 ldrd r0, r1, [sp, #16] 8014946: 2200 movs r2, #0 8014948: 4b46 ldr r3, [pc, #280] @ (8014a64 <_dtoa_r+0x59c>) 801494a: f7f3 fe31 bl 80085b0 <__aeabi_dmul> 801494e: e9dd 2306 ldrd r2, r3, [sp, #24] 8014952: f7f4 f8b3 bl 8008abc <__aeabi_dcmpge> 8014956: 2800 cmp r0, #0 8014958: f000 8266 beq.w 8014e28 <_dtoa_r+0x960> 801495c: 2400 movs r4, #0 801495e: 4625 mov r5, r4 8014960: 9b21 ldr r3, [sp, #132] @ 0x84 8014962: 4656 mov r6, sl 8014964: ea6f 0803 mvn.w r8, r3 8014968: 2700 movs r7, #0 801496a: 4621 mov r1, r4 801496c: 4648 mov r0, r9 801496e: f000 ffb5 bl 80158dc <_Bfree> 8014972: 2d00 cmp r5, #0 8014974: f000 80bd beq.w 8014af2 <_dtoa_r+0x62a> 8014978: b12f cbz r7, 8014986 <_dtoa_r+0x4be> 801497a: 42af cmp r7, r5 801497c: d003 beq.n 8014986 <_dtoa_r+0x4be> 801497e: 4639 mov r1, r7 8014980: 4648 mov r0, r9 8014982: f000 ffab bl 80158dc <_Bfree> 8014986: 4629 mov r1, r5 8014988: 4648 mov r0, r9 801498a: f000 ffa7 bl 80158dc <_Bfree> 801498e: e0b0 b.n 8014af2 <_dtoa_r+0x62a> 8014990: 07e2 lsls r2, r4, #31 8014992: d505 bpl.n 80149a0 <_dtoa_r+0x4d8> 8014994: e9d5 2300 ldrd r2, r3, [r5] 8014998: f7f3 fe0a bl 80085b0 <__aeabi_dmul> 801499c: 2301 movs r3, #1 801499e: 3601 adds r6, #1 80149a0: 1064 asrs r4, r4, #1 80149a2: 3508 adds r5, #8 80149a4: e762 b.n 801486c <_dtoa_r+0x3a4> 80149a6: 2602 movs r6, #2 80149a8: e765 b.n 8014876 <_dtoa_r+0x3ae> 80149aa: 46b8 mov r8, r7 80149ac: 9c08 ldr r4, [sp, #32] 80149ae: e784 b.n 80148ba <_dtoa_r+0x3f2> 80149b0: 4b27 ldr r3, [pc, #156] @ (8014a50 <_dtoa_r+0x588>) 80149b2: 990b ldr r1, [sp, #44] @ 0x2c 80149b4: eb03 03c4 add.w r3, r3, r4, lsl #3 80149b8: e953 2302 ldrd r2, r3, [r3, #-8] 80149bc: 4454 add r4, sl 80149be: 2900 cmp r1, #0 80149c0: d054 beq.n 8014a6c <_dtoa_r+0x5a4> 80149c2: 2000 movs r0, #0 80149c4: 4928 ldr r1, [pc, #160] @ (8014a68 <_dtoa_r+0x5a0>) 80149c6: f7f3 ff1d bl 8008804 <__aeabi_ddiv> 80149ca: 4633 mov r3, r6 80149cc: 462a mov r2, r5 80149ce: f7f3 fc37 bl 8008240 <__aeabi_dsub> 80149d2: 4656 mov r6, sl 80149d4: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 80149d8: e9dd 0106 ldrd r0, r1, [sp, #24] 80149dc: f7f4 f898 bl 8008b10 <__aeabi_d2iz> 80149e0: 4605 mov r5, r0 80149e2: f7f3 fd7b bl 80084dc <__aeabi_i2d> 80149e6: 4602 mov r2, r0 80149e8: 460b mov r3, r1 80149ea: e9dd 0106 ldrd r0, r1, [sp, #24] 80149ee: f7f3 fc27 bl 8008240 <__aeabi_dsub> 80149f2: 4602 mov r2, r0 80149f4: 460b mov r3, r1 80149f6: 3530 adds r5, #48 @ 0x30 80149f8: e9cd 2306 strd r2, r3, [sp, #24] 80149fc: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014a00: f806 5b01 strb.w r5, [r6], #1 8014a04: f7f4 f846 bl 8008a94 <__aeabi_dcmplt> 8014a08: 2800 cmp r0, #0 8014a0a: d172 bne.n 8014af2 <_dtoa_r+0x62a> 8014a0c: e9dd 2306 ldrd r2, r3, [sp, #24] 8014a10: 2000 movs r0, #0 8014a12: 4911 ldr r1, [pc, #68] @ (8014a58 <_dtoa_r+0x590>) 8014a14: f7f3 fc14 bl 8008240 <__aeabi_dsub> 8014a18: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014a1c: f7f4 f83a bl 8008a94 <__aeabi_dcmplt> 8014a20: 2800 cmp r0, #0 8014a22: f040 80b4 bne.w 8014b8e <_dtoa_r+0x6c6> 8014a26: 42a6 cmp r6, r4 8014a28: f43f af70 beq.w 801490c <_dtoa_r+0x444> 8014a2c: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8014a30: 2200 movs r2, #0 8014a32: 4b0a ldr r3, [pc, #40] @ (8014a5c <_dtoa_r+0x594>) 8014a34: f7f3 fdbc bl 80085b0 <__aeabi_dmul> 8014a38: 2200 movs r2, #0 8014a3a: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8014a3e: e9dd 0106 ldrd r0, r1, [sp, #24] 8014a42: 4b06 ldr r3, [pc, #24] @ (8014a5c <_dtoa_r+0x594>) 8014a44: f7f3 fdb4 bl 80085b0 <__aeabi_dmul> 8014a48: e9cd 0106 strd r0, r1, [sp, #24] 8014a4c: e7c4 b.n 80149d8 <_dtoa_r+0x510> 8014a4e: bf00 nop 8014a50: 08016f18 .word 0x08016f18 8014a54: 08016ef0 .word 0x08016ef0 8014a58: 3ff00000 .word 0x3ff00000 8014a5c: 40240000 .word 0x40240000 8014a60: 401c0000 .word 0x401c0000 8014a64: 40140000 .word 0x40140000 8014a68: 3fe00000 .word 0x3fe00000 8014a6c: 4631 mov r1, r6 8014a6e: 4628 mov r0, r5 8014a70: f7f3 fd9e bl 80085b0 <__aeabi_dmul> 8014a74: 4656 mov r6, sl 8014a76: e9cd 0110 strd r0, r1, [sp, #64] @ 0x40 8014a7a: 9413 str r4, [sp, #76] @ 0x4c 8014a7c: e9dd 0106 ldrd r0, r1, [sp, #24] 8014a80: f7f4 f846 bl 8008b10 <__aeabi_d2iz> 8014a84: 4605 mov r5, r0 8014a86: f7f3 fd29 bl 80084dc <__aeabi_i2d> 8014a8a: 4602 mov r2, r0 8014a8c: 460b mov r3, r1 8014a8e: e9dd 0106 ldrd r0, r1, [sp, #24] 8014a92: f7f3 fbd5 bl 8008240 <__aeabi_dsub> 8014a96: 4602 mov r2, r0 8014a98: 460b mov r3, r1 8014a9a: 3530 adds r5, #48 @ 0x30 8014a9c: f806 5b01 strb.w r5, [r6], #1 8014aa0: 42a6 cmp r6, r4 8014aa2: e9cd 2306 strd r2, r3, [sp, #24] 8014aa6: f04f 0200 mov.w r2, #0 8014aaa: d124 bne.n 8014af6 <_dtoa_r+0x62e> 8014aac: e9dd 0110 ldrd r0, r1, [sp, #64] @ 0x40 8014ab0: 4bae ldr r3, [pc, #696] @ (8014d6c <_dtoa_r+0x8a4>) 8014ab2: f7f3 fbc7 bl 8008244 <__adddf3> 8014ab6: 4602 mov r2, r0 8014ab8: 460b mov r3, r1 8014aba: e9dd 0106 ldrd r0, r1, [sp, #24] 8014abe: f7f4 f807 bl 8008ad0 <__aeabi_dcmpgt> 8014ac2: 2800 cmp r0, #0 8014ac4: d163 bne.n 8014b8e <_dtoa_r+0x6c6> 8014ac6: e9dd 2310 ldrd r2, r3, [sp, #64] @ 0x40 8014aca: 2000 movs r0, #0 8014acc: 49a7 ldr r1, [pc, #668] @ (8014d6c <_dtoa_r+0x8a4>) 8014ace: f7f3 fbb7 bl 8008240 <__aeabi_dsub> 8014ad2: 4602 mov r2, r0 8014ad4: 460b mov r3, r1 8014ad6: e9dd 0106 ldrd r0, r1, [sp, #24] 8014ada: f7f3 ffdb bl 8008a94 <__aeabi_dcmplt> 8014ade: 2800 cmp r0, #0 8014ae0: f43f af14 beq.w 801490c <_dtoa_r+0x444> 8014ae4: 9e13 ldr r6, [sp, #76] @ 0x4c 8014ae6: 1e73 subs r3, r6, #1 8014ae8: 9313 str r3, [sp, #76] @ 0x4c 8014aea: f816 3c01 ldrb.w r3, [r6, #-1] 8014aee: 2b30 cmp r3, #48 @ 0x30 8014af0: d0f8 beq.n 8014ae4 <_dtoa_r+0x61c> 8014af2: 4647 mov r7, r8 8014af4: e03b b.n 8014b6e <_dtoa_r+0x6a6> 8014af6: 4b9e ldr r3, [pc, #632] @ (8014d70 <_dtoa_r+0x8a8>) 8014af8: f7f3 fd5a bl 80085b0 <__aeabi_dmul> 8014afc: e9cd 0106 strd r0, r1, [sp, #24] 8014b00: e7bc b.n 8014a7c <_dtoa_r+0x5b4> 8014b02: 4656 mov r6, sl 8014b04: e9dd 4506 ldrd r4, r5, [sp, #24] 8014b08: e9dd 2304 ldrd r2, r3, [sp, #16] 8014b0c: 4620 mov r0, r4 8014b0e: 4629 mov r1, r5 8014b10: f7f3 fe78 bl 8008804 <__aeabi_ddiv> 8014b14: f7f3 fffc bl 8008b10 <__aeabi_d2iz> 8014b18: 4680 mov r8, r0 8014b1a: f7f3 fcdf bl 80084dc <__aeabi_i2d> 8014b1e: e9dd 2304 ldrd r2, r3, [sp, #16] 8014b22: f7f3 fd45 bl 80085b0 <__aeabi_dmul> 8014b26: 4602 mov r2, r0 8014b28: 460b mov r3, r1 8014b2a: 4620 mov r0, r4 8014b2c: 4629 mov r1, r5 8014b2e: f7f3 fb87 bl 8008240 <__aeabi_dsub> 8014b32: f108 0430 add.w r4, r8, #48 @ 0x30 8014b36: 9d08 ldr r5, [sp, #32] 8014b38: f806 4b01 strb.w r4, [r6], #1 8014b3c: eba6 040a sub.w r4, r6, sl 8014b40: 42a5 cmp r5, r4 8014b42: 4602 mov r2, r0 8014b44: 460b mov r3, r1 8014b46: d133 bne.n 8014bb0 <_dtoa_r+0x6e8> 8014b48: f7f3 fb7c bl 8008244 <__adddf3> 8014b4c: e9dd 2304 ldrd r2, r3, [sp, #16] 8014b50: 4604 mov r4, r0 8014b52: 460d mov r5, r1 8014b54: f7f3 ffbc bl 8008ad0 <__aeabi_dcmpgt> 8014b58: b9c0 cbnz r0, 8014b8c <_dtoa_r+0x6c4> 8014b5a: e9dd 2304 ldrd r2, r3, [sp, #16] 8014b5e: 4620 mov r0, r4 8014b60: 4629 mov r1, r5 8014b62: f7f3 ff8d bl 8008a80 <__aeabi_dcmpeq> 8014b66: b110 cbz r0, 8014b6e <_dtoa_r+0x6a6> 8014b68: f018 0f01 tst.w r8, #1 8014b6c: d10e bne.n 8014b8c <_dtoa_r+0x6c4> 8014b6e: 4648 mov r0, r9 8014b70: 9903 ldr r1, [sp, #12] 8014b72: f000 feb3 bl 80158dc <_Bfree> 8014b76: 2300 movs r3, #0 8014b78: 7033 strb r3, [r6, #0] 8014b7a: 9b22 ldr r3, [sp, #136] @ 0x88 8014b7c: 3701 adds r7, #1 8014b7e: 601f str r7, [r3, #0] 8014b80: 9b24 ldr r3, [sp, #144] @ 0x90 8014b82: 2b00 cmp r3, #0 8014b84: f000 824b beq.w 801501e <_dtoa_r+0xb56> 8014b88: 601e str r6, [r3, #0] 8014b8a: e248 b.n 801501e <_dtoa_r+0xb56> 8014b8c: 46b8 mov r8, r7 8014b8e: 4633 mov r3, r6 8014b90: 461e mov r6, r3 8014b92: f813 2d01 ldrb.w r2, [r3, #-1]! 8014b96: 2a39 cmp r2, #57 @ 0x39 8014b98: d106 bne.n 8014ba8 <_dtoa_r+0x6e0> 8014b9a: 459a cmp sl, r3 8014b9c: d1f8 bne.n 8014b90 <_dtoa_r+0x6c8> 8014b9e: 2230 movs r2, #48 @ 0x30 8014ba0: f108 0801 add.w r8, r8, #1 8014ba4: f88a 2000 strb.w r2, [sl] 8014ba8: 781a ldrb r2, [r3, #0] 8014baa: 3201 adds r2, #1 8014bac: 701a strb r2, [r3, #0] 8014bae: e7a0 b.n 8014af2 <_dtoa_r+0x62a> 8014bb0: 2200 movs r2, #0 8014bb2: 4b6f ldr r3, [pc, #444] @ (8014d70 <_dtoa_r+0x8a8>) 8014bb4: f7f3 fcfc bl 80085b0 <__aeabi_dmul> 8014bb8: 2200 movs r2, #0 8014bba: 2300 movs r3, #0 8014bbc: 4604 mov r4, r0 8014bbe: 460d mov r5, r1 8014bc0: f7f3 ff5e bl 8008a80 <__aeabi_dcmpeq> 8014bc4: 2800 cmp r0, #0 8014bc6: d09f beq.n 8014b08 <_dtoa_r+0x640> 8014bc8: e7d1 b.n 8014b6e <_dtoa_r+0x6a6> 8014bca: 9a0b ldr r2, [sp, #44] @ 0x2c 8014bcc: 2a00 cmp r2, #0 8014bce: f000 80ea beq.w 8014da6 <_dtoa_r+0x8de> 8014bd2: 9a20 ldr r2, [sp, #128] @ 0x80 8014bd4: 2a01 cmp r2, #1 8014bd6: f300 80cd bgt.w 8014d74 <_dtoa_r+0x8ac> 8014bda: 9a12 ldr r2, [sp, #72] @ 0x48 8014bdc: 2a00 cmp r2, #0 8014bde: f000 80c1 beq.w 8014d64 <_dtoa_r+0x89c> 8014be2: f203 4333 addw r3, r3, #1075 @ 0x433 8014be6: 9c0a ldr r4, [sp, #40] @ 0x28 8014be8: 9e04 ldr r6, [sp, #16] 8014bea: 9a04 ldr r2, [sp, #16] 8014bec: 2101 movs r1, #1 8014bee: 441a add r2, r3 8014bf0: 9204 str r2, [sp, #16] 8014bf2: 9a09 ldr r2, [sp, #36] @ 0x24 8014bf4: 4648 mov r0, r9 8014bf6: 441a add r2, r3 8014bf8: 9209 str r2, [sp, #36] @ 0x24 8014bfa: f000 ff23 bl 8015a44 <__i2b> 8014bfe: 4605 mov r5, r0 8014c00: b166 cbz r6, 8014c1c <_dtoa_r+0x754> 8014c02: 9b09 ldr r3, [sp, #36] @ 0x24 8014c04: 2b00 cmp r3, #0 8014c06: dd09 ble.n 8014c1c <_dtoa_r+0x754> 8014c08: 42b3 cmp r3, r6 8014c0a: bfa8 it ge 8014c0c: 4633 movge r3, r6 8014c0e: 9a04 ldr r2, [sp, #16] 8014c10: 1af6 subs r6, r6, r3 8014c12: 1ad2 subs r2, r2, r3 8014c14: 9204 str r2, [sp, #16] 8014c16: 9a09 ldr r2, [sp, #36] @ 0x24 8014c18: 1ad3 subs r3, r2, r3 8014c1a: 9309 str r3, [sp, #36] @ 0x24 8014c1c: 9b0a ldr r3, [sp, #40] @ 0x28 8014c1e: b30b cbz r3, 8014c64 <_dtoa_r+0x79c> 8014c20: 9b0b ldr r3, [sp, #44] @ 0x2c 8014c22: 2b00 cmp r3, #0 8014c24: f000 80c6 beq.w 8014db4 <_dtoa_r+0x8ec> 8014c28: 2c00 cmp r4, #0 8014c2a: f000 80c0 beq.w 8014dae <_dtoa_r+0x8e6> 8014c2e: 4629 mov r1, r5 8014c30: 4622 mov r2, r4 8014c32: 4648 mov r0, r9 8014c34: f000 ffbe bl 8015bb4 <__pow5mult> 8014c38: 9a03 ldr r2, [sp, #12] 8014c3a: 4601 mov r1, r0 8014c3c: 4605 mov r5, r0 8014c3e: 4648 mov r0, r9 8014c40: f000 ff16 bl 8015a70 <__multiply> 8014c44: 9903 ldr r1, [sp, #12] 8014c46: 4680 mov r8, r0 8014c48: 4648 mov r0, r9 8014c4a: f000 fe47 bl 80158dc <_Bfree> 8014c4e: 9b0a ldr r3, [sp, #40] @ 0x28 8014c50: 1b1b subs r3, r3, r4 8014c52: 930a str r3, [sp, #40] @ 0x28 8014c54: f000 80b1 beq.w 8014dba <_dtoa_r+0x8f2> 8014c58: 4641 mov r1, r8 8014c5a: 9a0a ldr r2, [sp, #40] @ 0x28 8014c5c: 4648 mov r0, r9 8014c5e: f000 ffa9 bl 8015bb4 <__pow5mult> 8014c62: 9003 str r0, [sp, #12] 8014c64: 2101 movs r1, #1 8014c66: 4648 mov r0, r9 8014c68: f000 feec bl 8015a44 <__i2b> 8014c6c: 9b0e ldr r3, [sp, #56] @ 0x38 8014c6e: 4604 mov r4, r0 8014c70: 2b00 cmp r3, #0 8014c72: f000 81d8 beq.w 8015026 <_dtoa_r+0xb5e> 8014c76: 461a mov r2, r3 8014c78: 4601 mov r1, r0 8014c7a: 4648 mov r0, r9 8014c7c: f000 ff9a bl 8015bb4 <__pow5mult> 8014c80: 9b20 ldr r3, [sp, #128] @ 0x80 8014c82: 4604 mov r4, r0 8014c84: 2b01 cmp r3, #1 8014c86: f300 809f bgt.w 8014dc8 <_dtoa_r+0x900> 8014c8a: 9b06 ldr r3, [sp, #24] 8014c8c: 2b00 cmp r3, #0 8014c8e: f040 8097 bne.w 8014dc0 <_dtoa_r+0x8f8> 8014c92: 9b07 ldr r3, [sp, #28] 8014c94: f3c3 0313 ubfx r3, r3, #0, #20 8014c98: 2b00 cmp r3, #0 8014c9a: f040 8093 bne.w 8014dc4 <_dtoa_r+0x8fc> 8014c9e: 9b07 ldr r3, [sp, #28] 8014ca0: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 8014ca4: 0d1b lsrs r3, r3, #20 8014ca6: 051b lsls r3, r3, #20 8014ca8: b133 cbz r3, 8014cb8 <_dtoa_r+0x7f0> 8014caa: 9b04 ldr r3, [sp, #16] 8014cac: 3301 adds r3, #1 8014cae: 9304 str r3, [sp, #16] 8014cb0: 9b09 ldr r3, [sp, #36] @ 0x24 8014cb2: 3301 adds r3, #1 8014cb4: 9309 str r3, [sp, #36] @ 0x24 8014cb6: 2301 movs r3, #1 8014cb8: 930a str r3, [sp, #40] @ 0x28 8014cba: 9b0e ldr r3, [sp, #56] @ 0x38 8014cbc: 2b00 cmp r3, #0 8014cbe: f000 81b8 beq.w 8015032 <_dtoa_r+0xb6a> 8014cc2: 6923 ldr r3, [r4, #16] 8014cc4: eb04 0383 add.w r3, r4, r3, lsl #2 8014cc8: 6918 ldr r0, [r3, #16] 8014cca: f000 fe6f bl 80159ac <__hi0bits> 8014cce: f1c0 0020 rsb r0, r0, #32 8014cd2: 9b09 ldr r3, [sp, #36] @ 0x24 8014cd4: 4418 add r0, r3 8014cd6: f010 001f ands.w r0, r0, #31 8014cda: f000 8082 beq.w 8014de2 <_dtoa_r+0x91a> 8014cde: f1c0 0320 rsb r3, r0, #32 8014ce2: 2b04 cmp r3, #4 8014ce4: dd73 ble.n 8014dce <_dtoa_r+0x906> 8014ce6: 9b04 ldr r3, [sp, #16] 8014ce8: f1c0 001c rsb r0, r0, #28 8014cec: 4403 add r3, r0 8014cee: 9304 str r3, [sp, #16] 8014cf0: 9b09 ldr r3, [sp, #36] @ 0x24 8014cf2: 4406 add r6, r0 8014cf4: 4403 add r3, r0 8014cf6: 9309 str r3, [sp, #36] @ 0x24 8014cf8: 9b04 ldr r3, [sp, #16] 8014cfa: 2b00 cmp r3, #0 8014cfc: dd05 ble.n 8014d0a <_dtoa_r+0x842> 8014cfe: 461a mov r2, r3 8014d00: 4648 mov r0, r9 8014d02: 9903 ldr r1, [sp, #12] 8014d04: f000 ffb0 bl 8015c68 <__lshift> 8014d08: 9003 str r0, [sp, #12] 8014d0a: 9b09 ldr r3, [sp, #36] @ 0x24 8014d0c: 2b00 cmp r3, #0 8014d0e: dd05 ble.n 8014d1c <_dtoa_r+0x854> 8014d10: 4621 mov r1, r4 8014d12: 461a mov r2, r3 8014d14: 4648 mov r0, r9 8014d16: f000 ffa7 bl 8015c68 <__lshift> 8014d1a: 4604 mov r4, r0 8014d1c: 9b0f ldr r3, [sp, #60] @ 0x3c 8014d1e: 2b00 cmp r3, #0 8014d20: d061 beq.n 8014de6 <_dtoa_r+0x91e> 8014d22: 4621 mov r1, r4 8014d24: 9803 ldr r0, [sp, #12] 8014d26: f001 f80b bl 8015d40 <__mcmp> 8014d2a: 2800 cmp r0, #0 8014d2c: da5b bge.n 8014de6 <_dtoa_r+0x91e> 8014d2e: 2300 movs r3, #0 8014d30: 220a movs r2, #10 8014d32: 4648 mov r0, r9 8014d34: 9903 ldr r1, [sp, #12] 8014d36: f000 fdf3 bl 8015920 <__multadd> 8014d3a: 9b0b ldr r3, [sp, #44] @ 0x2c 8014d3c: f107 38ff add.w r8, r7, #4294967295 @ 0xffffffff 8014d40: 9003 str r0, [sp, #12] 8014d42: 2b00 cmp r3, #0 8014d44: f000 8177 beq.w 8015036 <_dtoa_r+0xb6e> 8014d48: 4629 mov r1, r5 8014d4a: 2300 movs r3, #0 8014d4c: 220a movs r2, #10 8014d4e: 4648 mov r0, r9 8014d50: f000 fde6 bl 8015920 <__multadd> 8014d54: f1bb 0f00 cmp.w fp, #0 8014d58: 4605 mov r5, r0 8014d5a: dc6f bgt.n 8014e3c <_dtoa_r+0x974> 8014d5c: 9b20 ldr r3, [sp, #128] @ 0x80 8014d5e: 2b02 cmp r3, #2 8014d60: dc49 bgt.n 8014df6 <_dtoa_r+0x92e> 8014d62: e06b b.n 8014e3c <_dtoa_r+0x974> 8014d64: 9b14 ldr r3, [sp, #80] @ 0x50 8014d66: f1c3 0336 rsb r3, r3, #54 @ 0x36 8014d6a: e73c b.n 8014be6 <_dtoa_r+0x71e> 8014d6c: 3fe00000 .word 0x3fe00000 8014d70: 40240000 .word 0x40240000 8014d74: 9b08 ldr r3, [sp, #32] 8014d76: 1e5c subs r4, r3, #1 8014d78: 9b0a ldr r3, [sp, #40] @ 0x28 8014d7a: 42a3 cmp r3, r4 8014d7c: db09 blt.n 8014d92 <_dtoa_r+0x8ca> 8014d7e: 1b1c subs r4, r3, r4 8014d80: 9b08 ldr r3, [sp, #32] 8014d82: 2b00 cmp r3, #0 8014d84: f6bf af30 bge.w 8014be8 <_dtoa_r+0x720> 8014d88: 9b04 ldr r3, [sp, #16] 8014d8a: 9a08 ldr r2, [sp, #32] 8014d8c: 1a9e subs r6, r3, r2 8014d8e: 2300 movs r3, #0 8014d90: e72b b.n 8014bea <_dtoa_r+0x722> 8014d92: 9b0a ldr r3, [sp, #40] @ 0x28 8014d94: 9a0e ldr r2, [sp, #56] @ 0x38 8014d96: 1ae3 subs r3, r4, r3 8014d98: 441a add r2, r3 8014d9a: 940a str r4, [sp, #40] @ 0x28 8014d9c: 9e04 ldr r6, [sp, #16] 8014d9e: 2400 movs r4, #0 8014da0: 9b08 ldr r3, [sp, #32] 8014da2: 920e str r2, [sp, #56] @ 0x38 8014da4: e721 b.n 8014bea <_dtoa_r+0x722> 8014da6: 9c0a ldr r4, [sp, #40] @ 0x28 8014da8: 9e04 ldr r6, [sp, #16] 8014daa: 9d0b ldr r5, [sp, #44] @ 0x2c 8014dac: e728 b.n 8014c00 <_dtoa_r+0x738> 8014dae: f8dd 800c ldr.w r8, [sp, #12] 8014db2: e751 b.n 8014c58 <_dtoa_r+0x790> 8014db4: 9a0a ldr r2, [sp, #40] @ 0x28 8014db6: 9903 ldr r1, [sp, #12] 8014db8: e750 b.n 8014c5c <_dtoa_r+0x794> 8014dba: f8cd 800c str.w r8, [sp, #12] 8014dbe: e751 b.n 8014c64 <_dtoa_r+0x79c> 8014dc0: 2300 movs r3, #0 8014dc2: e779 b.n 8014cb8 <_dtoa_r+0x7f0> 8014dc4: 9b06 ldr r3, [sp, #24] 8014dc6: e777 b.n 8014cb8 <_dtoa_r+0x7f0> 8014dc8: 2300 movs r3, #0 8014dca: 930a str r3, [sp, #40] @ 0x28 8014dcc: e779 b.n 8014cc2 <_dtoa_r+0x7fa> 8014dce: d093 beq.n 8014cf8 <_dtoa_r+0x830> 8014dd0: 9a04 ldr r2, [sp, #16] 8014dd2: 331c adds r3, #28 8014dd4: 441a add r2, r3 8014dd6: 9204 str r2, [sp, #16] 8014dd8: 9a09 ldr r2, [sp, #36] @ 0x24 8014dda: 441e add r6, r3 8014ddc: 441a add r2, r3 8014dde: 9209 str r2, [sp, #36] @ 0x24 8014de0: e78a b.n 8014cf8 <_dtoa_r+0x830> 8014de2: 4603 mov r3, r0 8014de4: e7f4 b.n 8014dd0 <_dtoa_r+0x908> 8014de6: 9b08 ldr r3, [sp, #32] 8014de8: 46b8 mov r8, r7 8014dea: 2b00 cmp r3, #0 8014dec: dc20 bgt.n 8014e30 <_dtoa_r+0x968> 8014dee: 469b mov fp, r3 8014df0: 9b20 ldr r3, [sp, #128] @ 0x80 8014df2: 2b02 cmp r3, #2 8014df4: dd1e ble.n 8014e34 <_dtoa_r+0x96c> 8014df6: f1bb 0f00 cmp.w fp, #0 8014dfa: f47f adb1 bne.w 8014960 <_dtoa_r+0x498> 8014dfe: 4621 mov r1, r4 8014e00: 465b mov r3, fp 8014e02: 2205 movs r2, #5 8014e04: 4648 mov r0, r9 8014e06: f000 fd8b bl 8015920 <__multadd> 8014e0a: 4601 mov r1, r0 8014e0c: 4604 mov r4, r0 8014e0e: 9803 ldr r0, [sp, #12] 8014e10: f000 ff96 bl 8015d40 <__mcmp> 8014e14: 2800 cmp r0, #0 8014e16: f77f ada3 ble.w 8014960 <_dtoa_r+0x498> 8014e1a: 4656 mov r6, sl 8014e1c: 2331 movs r3, #49 @ 0x31 8014e1e: f108 0801 add.w r8, r8, #1 8014e22: f806 3b01 strb.w r3, [r6], #1 8014e26: e59f b.n 8014968 <_dtoa_r+0x4a0> 8014e28: 46b8 mov r8, r7 8014e2a: 9c08 ldr r4, [sp, #32] 8014e2c: 4625 mov r5, r4 8014e2e: e7f4 b.n 8014e1a <_dtoa_r+0x952> 8014e30: f8dd b020 ldr.w fp, [sp, #32] 8014e34: 9b0b ldr r3, [sp, #44] @ 0x2c 8014e36: 2b00 cmp r3, #0 8014e38: f000 8101 beq.w 801503e <_dtoa_r+0xb76> 8014e3c: 2e00 cmp r6, #0 8014e3e: dd05 ble.n 8014e4c <_dtoa_r+0x984> 8014e40: 4629 mov r1, r5 8014e42: 4632 mov r2, r6 8014e44: 4648 mov r0, r9 8014e46: f000 ff0f bl 8015c68 <__lshift> 8014e4a: 4605 mov r5, r0 8014e4c: 9b0a ldr r3, [sp, #40] @ 0x28 8014e4e: 2b00 cmp r3, #0 8014e50: d05c beq.n 8014f0c <_dtoa_r+0xa44> 8014e52: 4648 mov r0, r9 8014e54: 6869 ldr r1, [r5, #4] 8014e56: f000 fd01 bl 801585c <_Balloc> 8014e5a: 4606 mov r6, r0 8014e5c: b928 cbnz r0, 8014e6a <_dtoa_r+0x9a2> 8014e5e: 4602 mov r2, r0 8014e60: f240 21ef movw r1, #751 @ 0x2ef 8014e64: 4b80 ldr r3, [pc, #512] @ (8015068 <_dtoa_r+0xba0>) 8014e66: f7ff bb43 b.w 80144f0 <_dtoa_r+0x28> 8014e6a: 692a ldr r2, [r5, #16] 8014e6c: f105 010c add.w r1, r5, #12 8014e70: 3202 adds r2, #2 8014e72: 0092 lsls r2, r2, #2 8014e74: 300c adds r0, #12 8014e76: f7ff fa73 bl 8014360 8014e7a: 2201 movs r2, #1 8014e7c: 4631 mov r1, r6 8014e7e: 4648 mov r0, r9 8014e80: f000 fef2 bl 8015c68 <__lshift> 8014e84: 462f mov r7, r5 8014e86: 4605 mov r5, r0 8014e88: f10a 0301 add.w r3, sl, #1 8014e8c: 9304 str r3, [sp, #16] 8014e8e: eb0a 030b add.w r3, sl, fp 8014e92: 930a str r3, [sp, #40] @ 0x28 8014e94: 9b06 ldr r3, [sp, #24] 8014e96: f003 0301 and.w r3, r3, #1 8014e9a: 9309 str r3, [sp, #36] @ 0x24 8014e9c: 9b04 ldr r3, [sp, #16] 8014e9e: 4621 mov r1, r4 8014ea0: 9803 ldr r0, [sp, #12] 8014ea2: f103 3bff add.w fp, r3, #4294967295 @ 0xffffffff 8014ea6: f7ff fa87 bl 80143b8 8014eaa: 4603 mov r3, r0 8014eac: 4639 mov r1, r7 8014eae: 3330 adds r3, #48 @ 0x30 8014eb0: 9006 str r0, [sp, #24] 8014eb2: 9803 ldr r0, [sp, #12] 8014eb4: 930b str r3, [sp, #44] @ 0x2c 8014eb6: f000 ff43 bl 8015d40 <__mcmp> 8014eba: 462a mov r2, r5 8014ebc: 9008 str r0, [sp, #32] 8014ebe: 4621 mov r1, r4 8014ec0: 4648 mov r0, r9 8014ec2: f000 ff59 bl 8015d78 <__mdiff> 8014ec6: 68c2 ldr r2, [r0, #12] 8014ec8: 4606 mov r6, r0 8014eca: 9b0b ldr r3, [sp, #44] @ 0x2c 8014ecc: bb02 cbnz r2, 8014f10 <_dtoa_r+0xa48> 8014ece: 4601 mov r1, r0 8014ed0: 9803 ldr r0, [sp, #12] 8014ed2: f000 ff35 bl 8015d40 <__mcmp> 8014ed6: 4602 mov r2, r0 8014ed8: 9b0b ldr r3, [sp, #44] @ 0x2c 8014eda: 4631 mov r1, r6 8014edc: 4648 mov r0, r9 8014ede: e9cd 320b strd r3, r2, [sp, #44] @ 0x2c 8014ee2: f000 fcfb bl 80158dc <_Bfree> 8014ee6: 9b20 ldr r3, [sp, #128] @ 0x80 8014ee8: 9a0c ldr r2, [sp, #48] @ 0x30 8014eea: 9e04 ldr r6, [sp, #16] 8014eec: ea42 0103 orr.w r1, r2, r3 8014ef0: 9b09 ldr r3, [sp, #36] @ 0x24 8014ef2: 4319 orrs r1, r3 8014ef4: 9b0b ldr r3, [sp, #44] @ 0x2c 8014ef6: d10d bne.n 8014f14 <_dtoa_r+0xa4c> 8014ef8: 2b39 cmp r3, #57 @ 0x39 8014efa: d027 beq.n 8014f4c <_dtoa_r+0xa84> 8014efc: 9a08 ldr r2, [sp, #32] 8014efe: 2a00 cmp r2, #0 8014f00: dd01 ble.n 8014f06 <_dtoa_r+0xa3e> 8014f02: 9b06 ldr r3, [sp, #24] 8014f04: 3331 adds r3, #49 @ 0x31 8014f06: f88b 3000 strb.w r3, [fp] 8014f0a: e52e b.n 801496a <_dtoa_r+0x4a2> 8014f0c: 4628 mov r0, r5 8014f0e: e7b9 b.n 8014e84 <_dtoa_r+0x9bc> 8014f10: 2201 movs r2, #1 8014f12: e7e2 b.n 8014eda <_dtoa_r+0xa12> 8014f14: 9908 ldr r1, [sp, #32] 8014f16: 2900 cmp r1, #0 8014f18: db04 blt.n 8014f24 <_dtoa_r+0xa5c> 8014f1a: 9820 ldr r0, [sp, #128] @ 0x80 8014f1c: 4301 orrs r1, r0 8014f1e: 9809 ldr r0, [sp, #36] @ 0x24 8014f20: 4301 orrs r1, r0 8014f22: d120 bne.n 8014f66 <_dtoa_r+0xa9e> 8014f24: 2a00 cmp r2, #0 8014f26: ddee ble.n 8014f06 <_dtoa_r+0xa3e> 8014f28: 2201 movs r2, #1 8014f2a: 9903 ldr r1, [sp, #12] 8014f2c: 4648 mov r0, r9 8014f2e: 9304 str r3, [sp, #16] 8014f30: f000 fe9a bl 8015c68 <__lshift> 8014f34: 4621 mov r1, r4 8014f36: 9003 str r0, [sp, #12] 8014f38: f000 ff02 bl 8015d40 <__mcmp> 8014f3c: 2800 cmp r0, #0 8014f3e: 9b04 ldr r3, [sp, #16] 8014f40: dc02 bgt.n 8014f48 <_dtoa_r+0xa80> 8014f42: d1e0 bne.n 8014f06 <_dtoa_r+0xa3e> 8014f44: 07da lsls r2, r3, #31 8014f46: d5de bpl.n 8014f06 <_dtoa_r+0xa3e> 8014f48: 2b39 cmp r3, #57 @ 0x39 8014f4a: d1da bne.n 8014f02 <_dtoa_r+0xa3a> 8014f4c: 2339 movs r3, #57 @ 0x39 8014f4e: f88b 3000 strb.w r3, [fp] 8014f52: 4633 mov r3, r6 8014f54: 461e mov r6, r3 8014f56: f816 2c01 ldrb.w r2, [r6, #-1] 8014f5a: 3b01 subs r3, #1 8014f5c: 2a39 cmp r2, #57 @ 0x39 8014f5e: d04e beq.n 8014ffe <_dtoa_r+0xb36> 8014f60: 3201 adds r2, #1 8014f62: 701a strb r2, [r3, #0] 8014f64: e501 b.n 801496a <_dtoa_r+0x4a2> 8014f66: 2a00 cmp r2, #0 8014f68: dd03 ble.n 8014f72 <_dtoa_r+0xaaa> 8014f6a: 2b39 cmp r3, #57 @ 0x39 8014f6c: d0ee beq.n 8014f4c <_dtoa_r+0xa84> 8014f6e: 3301 adds r3, #1 8014f70: e7c9 b.n 8014f06 <_dtoa_r+0xa3e> 8014f72: 9a04 ldr r2, [sp, #16] 8014f74: 990a ldr r1, [sp, #40] @ 0x28 8014f76: f802 3c01 strb.w r3, [r2, #-1] 8014f7a: 428a cmp r2, r1 8014f7c: d028 beq.n 8014fd0 <_dtoa_r+0xb08> 8014f7e: 2300 movs r3, #0 8014f80: 220a movs r2, #10 8014f82: 9903 ldr r1, [sp, #12] 8014f84: 4648 mov r0, r9 8014f86: f000 fccb bl 8015920 <__multadd> 8014f8a: 42af cmp r7, r5 8014f8c: 9003 str r0, [sp, #12] 8014f8e: f04f 0300 mov.w r3, #0 8014f92: f04f 020a mov.w r2, #10 8014f96: 4639 mov r1, r7 8014f98: 4648 mov r0, r9 8014f9a: d107 bne.n 8014fac <_dtoa_r+0xae4> 8014f9c: f000 fcc0 bl 8015920 <__multadd> 8014fa0: 4607 mov r7, r0 8014fa2: 4605 mov r5, r0 8014fa4: 9b04 ldr r3, [sp, #16] 8014fa6: 3301 adds r3, #1 8014fa8: 9304 str r3, [sp, #16] 8014faa: e777 b.n 8014e9c <_dtoa_r+0x9d4> 8014fac: f000 fcb8 bl 8015920 <__multadd> 8014fb0: 4629 mov r1, r5 8014fb2: 4607 mov r7, r0 8014fb4: 2300 movs r3, #0 8014fb6: 220a movs r2, #10 8014fb8: 4648 mov r0, r9 8014fba: f000 fcb1 bl 8015920 <__multadd> 8014fbe: 4605 mov r5, r0 8014fc0: e7f0 b.n 8014fa4 <_dtoa_r+0xadc> 8014fc2: f1bb 0f00 cmp.w fp, #0 8014fc6: bfcc ite gt 8014fc8: 465e movgt r6, fp 8014fca: 2601 movle r6, #1 8014fcc: 2700 movs r7, #0 8014fce: 4456 add r6, sl 8014fd0: 2201 movs r2, #1 8014fd2: 9903 ldr r1, [sp, #12] 8014fd4: 4648 mov r0, r9 8014fd6: 9304 str r3, [sp, #16] 8014fd8: f000 fe46 bl 8015c68 <__lshift> 8014fdc: 4621 mov r1, r4 8014fde: 9003 str r0, [sp, #12] 8014fe0: f000 feae bl 8015d40 <__mcmp> 8014fe4: 2800 cmp r0, #0 8014fe6: dcb4 bgt.n 8014f52 <_dtoa_r+0xa8a> 8014fe8: d102 bne.n 8014ff0 <_dtoa_r+0xb28> 8014fea: 9b04 ldr r3, [sp, #16] 8014fec: 07db lsls r3, r3, #31 8014fee: d4b0 bmi.n 8014f52 <_dtoa_r+0xa8a> 8014ff0: 4633 mov r3, r6 8014ff2: 461e mov r6, r3 8014ff4: f813 2d01 ldrb.w r2, [r3, #-1]! 8014ff8: 2a30 cmp r2, #48 @ 0x30 8014ffa: d0fa beq.n 8014ff2 <_dtoa_r+0xb2a> 8014ffc: e4b5 b.n 801496a <_dtoa_r+0x4a2> 8014ffe: 459a cmp sl, r3 8015000: d1a8 bne.n 8014f54 <_dtoa_r+0xa8c> 8015002: 2331 movs r3, #49 @ 0x31 8015004: f108 0801 add.w r8, r8, #1 8015008: f88a 3000 strb.w r3, [sl] 801500c: e4ad b.n 801496a <_dtoa_r+0x4a2> 801500e: 9b24 ldr r3, [sp, #144] @ 0x90 8015010: f8df a058 ldr.w sl, [pc, #88] @ 801506c <_dtoa_r+0xba4> 8015014: b11b cbz r3, 801501e <_dtoa_r+0xb56> 8015016: f10a 0308 add.w r3, sl, #8 801501a: 9a24 ldr r2, [sp, #144] @ 0x90 801501c: 6013 str r3, [r2, #0] 801501e: 4650 mov r0, sl 8015020: b017 add sp, #92 @ 0x5c 8015022: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8015026: 9b20 ldr r3, [sp, #128] @ 0x80 8015028: 2b01 cmp r3, #1 801502a: f77f ae2e ble.w 8014c8a <_dtoa_r+0x7c2> 801502e: 9b0e ldr r3, [sp, #56] @ 0x38 8015030: 930a str r3, [sp, #40] @ 0x28 8015032: 2001 movs r0, #1 8015034: e64d b.n 8014cd2 <_dtoa_r+0x80a> 8015036: f1bb 0f00 cmp.w fp, #0 801503a: f77f aed9 ble.w 8014df0 <_dtoa_r+0x928> 801503e: 4656 mov r6, sl 8015040: 4621 mov r1, r4 8015042: 9803 ldr r0, [sp, #12] 8015044: f7ff f9b8 bl 80143b8 8015048: f100 0330 add.w r3, r0, #48 @ 0x30 801504c: f806 3b01 strb.w r3, [r6], #1 8015050: eba6 020a sub.w r2, r6, sl 8015054: 4593 cmp fp, r2 8015056: ddb4 ble.n 8014fc2 <_dtoa_r+0xafa> 8015058: 2300 movs r3, #0 801505a: 220a movs r2, #10 801505c: 4648 mov r0, r9 801505e: 9903 ldr r1, [sp, #12] 8015060: f000 fc5e bl 8015920 <__multadd> 8015064: 9003 str r0, [sp, #12] 8015066: e7eb b.n 8015040 <_dtoa_r+0xb78> 8015068: 08016e5c .word 0x08016e5c 801506c: 08016df7 .word 0x08016df7 08015070 <__ssputs_r>: 8015070: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8015074: 461f mov r7, r3 8015076: 688e ldr r6, [r1, #8] 8015078: 4682 mov sl, r0 801507a: 42be cmp r6, r7 801507c: 460c mov r4, r1 801507e: 4690 mov r8, r2 8015080: 680b ldr r3, [r1, #0] 8015082: d82d bhi.n 80150e0 <__ssputs_r+0x70> 8015084: f9b1 200c ldrsh.w r2, [r1, #12] 8015088: f412 6f90 tst.w r2, #1152 @ 0x480 801508c: d026 beq.n 80150dc <__ssputs_r+0x6c> 801508e: 6965 ldr r5, [r4, #20] 8015090: 6909 ldr r1, [r1, #16] 8015092: eb05 0545 add.w r5, r5, r5, lsl #1 8015096: eba3 0901 sub.w r9, r3, r1 801509a: eb05 75d5 add.w r5, r5, r5, lsr #31 801509e: 1c7b adds r3, r7, #1 80150a0: 444b add r3, r9 80150a2: 106d asrs r5, r5, #1 80150a4: 429d cmp r5, r3 80150a6: bf38 it cc 80150a8: 461d movcc r5, r3 80150aa: 0553 lsls r3, r2, #21 80150ac: d527 bpl.n 80150fe <__ssputs_r+0x8e> 80150ae: 4629 mov r1, r5 80150b0: f000 faa0 bl 80155f4 <_malloc_r> 80150b4: 4606 mov r6, r0 80150b6: b360 cbz r0, 8015112 <__ssputs_r+0xa2> 80150b8: 464a mov r2, r9 80150ba: 6921 ldr r1, [r4, #16] 80150bc: f7ff f950 bl 8014360 80150c0: 89a3 ldrh r3, [r4, #12] 80150c2: f423 6390 bic.w r3, r3, #1152 @ 0x480 80150c6: f043 0380 orr.w r3, r3, #128 @ 0x80 80150ca: 81a3 strh r3, [r4, #12] 80150cc: 6126 str r6, [r4, #16] 80150ce: 444e add r6, r9 80150d0: 6026 str r6, [r4, #0] 80150d2: 463e mov r6, r7 80150d4: 6165 str r5, [r4, #20] 80150d6: eba5 0509 sub.w r5, r5, r9 80150da: 60a5 str r5, [r4, #8] 80150dc: 42be cmp r6, r7 80150de: d900 bls.n 80150e2 <__ssputs_r+0x72> 80150e0: 463e mov r6, r7 80150e2: 4632 mov r2, r6 80150e4: 4641 mov r1, r8 80150e6: 6820 ldr r0, [r4, #0] 80150e8: f001 f8ab bl 8016242 80150ec: 2000 movs r0, #0 80150ee: 68a3 ldr r3, [r4, #8] 80150f0: 1b9b subs r3, r3, r6 80150f2: 60a3 str r3, [r4, #8] 80150f4: 6823 ldr r3, [r4, #0] 80150f6: 4433 add r3, r6 80150f8: 6023 str r3, [r4, #0] 80150fa: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80150fe: 462a mov r2, r5 8015100: f000 ff7c bl 8015ffc <_realloc_r> 8015104: 4606 mov r6, r0 8015106: 2800 cmp r0, #0 8015108: d1e0 bne.n 80150cc <__ssputs_r+0x5c> 801510a: 4650 mov r0, sl 801510c: 6921 ldr r1, [r4, #16] 801510e: f001 f947 bl 80163a0 <_free_r> 8015112: 230c movs r3, #12 8015114: f8ca 3000 str.w r3, [sl] 8015118: 89a3 ldrh r3, [r4, #12] 801511a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 801511e: f043 0340 orr.w r3, r3, #64 @ 0x40 8015122: 81a3 strh r3, [r4, #12] 8015124: e7e9 b.n 80150fa <__ssputs_r+0x8a> ... 08015128 <_svfiprintf_r>: 8015128: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 801512c: 4698 mov r8, r3 801512e: 898b ldrh r3, [r1, #12] 8015130: 4607 mov r7, r0 8015132: 061b lsls r3, r3, #24 8015134: 460d mov r5, r1 8015136: 4614 mov r4, r2 8015138: b09d sub sp, #116 @ 0x74 801513a: d510 bpl.n 801515e <_svfiprintf_r+0x36> 801513c: 690b ldr r3, [r1, #16] 801513e: b973 cbnz r3, 801515e <_svfiprintf_r+0x36> 8015140: 2140 movs r1, #64 @ 0x40 8015142: f000 fa57 bl 80155f4 <_malloc_r> 8015146: 6028 str r0, [r5, #0] 8015148: 6128 str r0, [r5, #16] 801514a: b930 cbnz r0, 801515a <_svfiprintf_r+0x32> 801514c: 230c movs r3, #12 801514e: 603b str r3, [r7, #0] 8015150: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8015154: b01d add sp, #116 @ 0x74 8015156: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 801515a: 2340 movs r3, #64 @ 0x40 801515c: 616b str r3, [r5, #20] 801515e: 2300 movs r3, #0 8015160: 9309 str r3, [sp, #36] @ 0x24 8015162: 2320 movs r3, #32 8015164: f88d 3029 strb.w r3, [sp, #41] @ 0x29 8015168: 2330 movs r3, #48 @ 0x30 801516a: f04f 0901 mov.w r9, #1 801516e: f8cd 800c str.w r8, [sp, #12] 8015172: f8df 8198 ldr.w r8, [pc, #408] @ 801530c <_svfiprintf_r+0x1e4> 8015176: f88d 302a strb.w r3, [sp, #42] @ 0x2a 801517a: 4623 mov r3, r4 801517c: 469a mov sl, r3 801517e: f813 2b01 ldrb.w r2, [r3], #1 8015182: b10a cbz r2, 8015188 <_svfiprintf_r+0x60> 8015184: 2a25 cmp r2, #37 @ 0x25 8015186: d1f9 bne.n 801517c <_svfiprintf_r+0x54> 8015188: ebba 0b04 subs.w fp, sl, r4 801518c: d00b beq.n 80151a6 <_svfiprintf_r+0x7e> 801518e: 465b mov r3, fp 8015190: 4622 mov r2, r4 8015192: 4629 mov r1, r5 8015194: 4638 mov r0, r7 8015196: f7ff ff6b bl 8015070 <__ssputs_r> 801519a: 3001 adds r0, #1 801519c: f000 80a7 beq.w 80152ee <_svfiprintf_r+0x1c6> 80151a0: 9a09 ldr r2, [sp, #36] @ 0x24 80151a2: 445a add r2, fp 80151a4: 9209 str r2, [sp, #36] @ 0x24 80151a6: f89a 3000 ldrb.w r3, [sl] 80151aa: 2b00 cmp r3, #0 80151ac: f000 809f beq.w 80152ee <_svfiprintf_r+0x1c6> 80151b0: 2300 movs r3, #0 80151b2: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80151b6: e9cd 2305 strd r2, r3, [sp, #20] 80151ba: f10a 0a01 add.w sl, sl, #1 80151be: 9304 str r3, [sp, #16] 80151c0: 9307 str r3, [sp, #28] 80151c2: f88d 3053 strb.w r3, [sp, #83] @ 0x53 80151c6: 931a str r3, [sp, #104] @ 0x68 80151c8: 4654 mov r4, sl 80151ca: 2205 movs r2, #5 80151cc: f814 1b01 ldrb.w r1, [r4], #1 80151d0: 484e ldr r0, [pc, #312] @ (801530c <_svfiprintf_r+0x1e4>) 80151d2: f7ff f8b7 bl 8014344 80151d6: 9a04 ldr r2, [sp, #16] 80151d8: b9d8 cbnz r0, 8015212 <_svfiprintf_r+0xea> 80151da: 06d0 lsls r0, r2, #27 80151dc: bf44 itt mi 80151de: 2320 movmi r3, #32 80151e0: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80151e4: 0711 lsls r1, r2, #28 80151e6: bf44 itt mi 80151e8: 232b movmi r3, #43 @ 0x2b 80151ea: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80151ee: f89a 3000 ldrb.w r3, [sl] 80151f2: 2b2a cmp r3, #42 @ 0x2a 80151f4: d015 beq.n 8015222 <_svfiprintf_r+0xfa> 80151f6: 4654 mov r4, sl 80151f8: 2000 movs r0, #0 80151fa: f04f 0c0a mov.w ip, #10 80151fe: 9a07 ldr r2, [sp, #28] 8015200: 4621 mov r1, r4 8015202: f811 3b01 ldrb.w r3, [r1], #1 8015206: 3b30 subs r3, #48 @ 0x30 8015208: 2b09 cmp r3, #9 801520a: d94b bls.n 80152a4 <_svfiprintf_r+0x17c> 801520c: b1b0 cbz r0, 801523c <_svfiprintf_r+0x114> 801520e: 9207 str r2, [sp, #28] 8015210: e014 b.n 801523c <_svfiprintf_r+0x114> 8015212: eba0 0308 sub.w r3, r0, r8 8015216: fa09 f303 lsl.w r3, r9, r3 801521a: 4313 orrs r3, r2 801521c: 46a2 mov sl, r4 801521e: 9304 str r3, [sp, #16] 8015220: e7d2 b.n 80151c8 <_svfiprintf_r+0xa0> 8015222: 9b03 ldr r3, [sp, #12] 8015224: 1d19 adds r1, r3, #4 8015226: 681b ldr r3, [r3, #0] 8015228: 9103 str r1, [sp, #12] 801522a: 2b00 cmp r3, #0 801522c: bfbb ittet lt 801522e: 425b neglt r3, r3 8015230: f042 0202 orrlt.w r2, r2, #2 8015234: 9307 strge r3, [sp, #28] 8015236: 9307 strlt r3, [sp, #28] 8015238: bfb8 it lt 801523a: 9204 strlt r2, [sp, #16] 801523c: 7823 ldrb r3, [r4, #0] 801523e: 2b2e cmp r3, #46 @ 0x2e 8015240: d10a bne.n 8015258 <_svfiprintf_r+0x130> 8015242: 7863 ldrb r3, [r4, #1] 8015244: 2b2a cmp r3, #42 @ 0x2a 8015246: d132 bne.n 80152ae <_svfiprintf_r+0x186> 8015248: 9b03 ldr r3, [sp, #12] 801524a: 3402 adds r4, #2 801524c: 1d1a adds r2, r3, #4 801524e: 681b ldr r3, [r3, #0] 8015250: 9203 str r2, [sp, #12] 8015252: ea43 73e3 orr.w r3, r3, r3, asr #31 8015256: 9305 str r3, [sp, #20] 8015258: f8df a0b4 ldr.w sl, [pc, #180] @ 8015310 <_svfiprintf_r+0x1e8> 801525c: 2203 movs r2, #3 801525e: 4650 mov r0, sl 8015260: 7821 ldrb r1, [r4, #0] 8015262: f7ff f86f bl 8014344 8015266: b138 cbz r0, 8015278 <_svfiprintf_r+0x150> 8015268: 2240 movs r2, #64 @ 0x40 801526a: 9b04 ldr r3, [sp, #16] 801526c: eba0 000a sub.w r0, r0, sl 8015270: 4082 lsls r2, r0 8015272: 4313 orrs r3, r2 8015274: 3401 adds r4, #1 8015276: 9304 str r3, [sp, #16] 8015278: f814 1b01 ldrb.w r1, [r4], #1 801527c: 2206 movs r2, #6 801527e: 4825 ldr r0, [pc, #148] @ (8015314 <_svfiprintf_r+0x1ec>) 8015280: f88d 1028 strb.w r1, [sp, #40] @ 0x28 8015284: f7ff f85e bl 8014344 8015288: 2800 cmp r0, #0 801528a: d036 beq.n 80152fa <_svfiprintf_r+0x1d2> 801528c: 4b22 ldr r3, [pc, #136] @ (8015318 <_svfiprintf_r+0x1f0>) 801528e: bb1b cbnz r3, 80152d8 <_svfiprintf_r+0x1b0> 8015290: 9b03 ldr r3, [sp, #12] 8015292: 3307 adds r3, #7 8015294: f023 0307 bic.w r3, r3, #7 8015298: 3308 adds r3, #8 801529a: 9303 str r3, [sp, #12] 801529c: 9b09 ldr r3, [sp, #36] @ 0x24 801529e: 4433 add r3, r6 80152a0: 9309 str r3, [sp, #36] @ 0x24 80152a2: e76a b.n 801517a <_svfiprintf_r+0x52> 80152a4: 460c mov r4, r1 80152a6: 2001 movs r0, #1 80152a8: fb0c 3202 mla r2, ip, r2, r3 80152ac: e7a8 b.n 8015200 <_svfiprintf_r+0xd8> 80152ae: 2300 movs r3, #0 80152b0: f04f 0c0a mov.w ip, #10 80152b4: 4619 mov r1, r3 80152b6: 3401 adds r4, #1 80152b8: 9305 str r3, [sp, #20] 80152ba: 4620 mov r0, r4 80152bc: f810 2b01 ldrb.w r2, [r0], #1 80152c0: 3a30 subs r2, #48 @ 0x30 80152c2: 2a09 cmp r2, #9 80152c4: d903 bls.n 80152ce <_svfiprintf_r+0x1a6> 80152c6: 2b00 cmp r3, #0 80152c8: d0c6 beq.n 8015258 <_svfiprintf_r+0x130> 80152ca: 9105 str r1, [sp, #20] 80152cc: e7c4 b.n 8015258 <_svfiprintf_r+0x130> 80152ce: 4604 mov r4, r0 80152d0: 2301 movs r3, #1 80152d2: fb0c 2101 mla r1, ip, r1, r2 80152d6: e7f0 b.n 80152ba <_svfiprintf_r+0x192> 80152d8: ab03 add r3, sp, #12 80152da: 9300 str r3, [sp, #0] 80152dc: 462a mov r2, r5 80152de: 4638 mov r0, r7 80152e0: 4b0e ldr r3, [pc, #56] @ (801531c <_svfiprintf_r+0x1f4>) 80152e2: a904 add r1, sp, #16 80152e4: f7fe fa62 bl 80137ac <_printf_float> 80152e8: 1c42 adds r2, r0, #1 80152ea: 4606 mov r6, r0 80152ec: d1d6 bne.n 801529c <_svfiprintf_r+0x174> 80152ee: 89ab ldrh r3, [r5, #12] 80152f0: 065b lsls r3, r3, #25 80152f2: f53f af2d bmi.w 8015150 <_svfiprintf_r+0x28> 80152f6: 9809 ldr r0, [sp, #36] @ 0x24 80152f8: e72c b.n 8015154 <_svfiprintf_r+0x2c> 80152fa: ab03 add r3, sp, #12 80152fc: 9300 str r3, [sp, #0] 80152fe: 462a mov r2, r5 8015300: 4638 mov r0, r7 8015302: 4b06 ldr r3, [pc, #24] @ (801531c <_svfiprintf_r+0x1f4>) 8015304: a904 add r1, sp, #16 8015306: f7fe fcef bl 8013ce8 <_printf_i> 801530a: e7ed b.n 80152e8 <_svfiprintf_r+0x1c0> 801530c: 08016e6d .word 0x08016e6d 8015310: 08016e73 .word 0x08016e73 8015314: 08016e77 .word 0x08016e77 8015318: 080137ad .word 0x080137ad 801531c: 08015071 .word 0x08015071 08015320 <__sfputc_r>: 8015320: 6893 ldr r3, [r2, #8] 8015322: b410 push {r4} 8015324: 3b01 subs r3, #1 8015326: 2b00 cmp r3, #0 8015328: 6093 str r3, [r2, #8] 801532a: da07 bge.n 801533c <__sfputc_r+0x1c> 801532c: 6994 ldr r4, [r2, #24] 801532e: 42a3 cmp r3, r4 8015330: db01 blt.n 8015336 <__sfputc_r+0x16> 8015332: 290a cmp r1, #10 8015334: d102 bne.n 801533c <__sfputc_r+0x1c> 8015336: bc10 pop {r4} 8015338: f000 be8e b.w 8016058 <__swbuf_r> 801533c: 6813 ldr r3, [r2, #0] 801533e: 1c58 adds r0, r3, #1 8015340: 6010 str r0, [r2, #0] 8015342: 7019 strb r1, [r3, #0] 8015344: 4608 mov r0, r1 8015346: bc10 pop {r4} 8015348: 4770 bx lr 0801534a <__sfputs_r>: 801534a: b5f8 push {r3, r4, r5, r6, r7, lr} 801534c: 4606 mov r6, r0 801534e: 460f mov r7, r1 8015350: 4614 mov r4, r2 8015352: 18d5 adds r5, r2, r3 8015354: 42ac cmp r4, r5 8015356: d101 bne.n 801535c <__sfputs_r+0x12> 8015358: 2000 movs r0, #0 801535a: e007 b.n 801536c <__sfputs_r+0x22> 801535c: 463a mov r2, r7 801535e: 4630 mov r0, r6 8015360: f814 1b01 ldrb.w r1, [r4], #1 8015364: f7ff ffdc bl 8015320 <__sfputc_r> 8015368: 1c43 adds r3, r0, #1 801536a: d1f3 bne.n 8015354 <__sfputs_r+0xa> 801536c: bdf8 pop {r3, r4, r5, r6, r7, pc} ... 08015370 <_vfiprintf_r>: 8015370: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8015374: 460d mov r5, r1 8015376: 4614 mov r4, r2 8015378: 4698 mov r8, r3 801537a: 4606 mov r6, r0 801537c: b09d sub sp, #116 @ 0x74 801537e: b118 cbz r0, 8015388 <_vfiprintf_r+0x18> 8015380: 6a03 ldr r3, [r0, #32] 8015382: b90b cbnz r3, 8015388 <_vfiprintf_r+0x18> 8015384: f7fe fe5a bl 801403c <__sinit> 8015388: 6e6b ldr r3, [r5, #100] @ 0x64 801538a: 07d9 lsls r1, r3, #31 801538c: d405 bmi.n 801539a <_vfiprintf_r+0x2a> 801538e: 89ab ldrh r3, [r5, #12] 8015390: 059a lsls r2, r3, #22 8015392: d402 bmi.n 801539a <_vfiprintf_r+0x2a> 8015394: 6da8 ldr r0, [r5, #88] @ 0x58 8015396: f7fe ffce bl 8014336 <__retarget_lock_acquire_recursive> 801539a: 89ab ldrh r3, [r5, #12] 801539c: 071b lsls r3, r3, #28 801539e: d501 bpl.n 80153a4 <_vfiprintf_r+0x34> 80153a0: 692b ldr r3, [r5, #16] 80153a2: b99b cbnz r3, 80153cc <_vfiprintf_r+0x5c> 80153a4: 4629 mov r1, r5 80153a6: 4630 mov r0, r6 80153a8: f000 fe94 bl 80160d4 <__swsetup_r> 80153ac: b170 cbz r0, 80153cc <_vfiprintf_r+0x5c> 80153ae: 6e6b ldr r3, [r5, #100] @ 0x64 80153b0: 07dc lsls r4, r3, #31 80153b2: d504 bpl.n 80153be <_vfiprintf_r+0x4e> 80153b4: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80153b8: b01d add sp, #116 @ 0x74 80153ba: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80153be: 89ab ldrh r3, [r5, #12] 80153c0: 0598 lsls r0, r3, #22 80153c2: d4f7 bmi.n 80153b4 <_vfiprintf_r+0x44> 80153c4: 6da8 ldr r0, [r5, #88] @ 0x58 80153c6: f7fe ffb7 bl 8014338 <__retarget_lock_release_recursive> 80153ca: e7f3 b.n 80153b4 <_vfiprintf_r+0x44> 80153cc: 2300 movs r3, #0 80153ce: 9309 str r3, [sp, #36] @ 0x24 80153d0: 2320 movs r3, #32 80153d2: f88d 3029 strb.w r3, [sp, #41] @ 0x29 80153d6: 2330 movs r3, #48 @ 0x30 80153d8: f04f 0901 mov.w r9, #1 80153dc: f8cd 800c str.w r8, [sp, #12] 80153e0: f8df 81a8 ldr.w r8, [pc, #424] @ 801558c <_vfiprintf_r+0x21c> 80153e4: f88d 302a strb.w r3, [sp, #42] @ 0x2a 80153e8: 4623 mov r3, r4 80153ea: 469a mov sl, r3 80153ec: f813 2b01 ldrb.w r2, [r3], #1 80153f0: b10a cbz r2, 80153f6 <_vfiprintf_r+0x86> 80153f2: 2a25 cmp r2, #37 @ 0x25 80153f4: d1f9 bne.n 80153ea <_vfiprintf_r+0x7a> 80153f6: ebba 0b04 subs.w fp, sl, r4 80153fa: d00b beq.n 8015414 <_vfiprintf_r+0xa4> 80153fc: 465b mov r3, fp 80153fe: 4622 mov r2, r4 8015400: 4629 mov r1, r5 8015402: 4630 mov r0, r6 8015404: f7ff ffa1 bl 801534a <__sfputs_r> 8015408: 3001 adds r0, #1 801540a: f000 80a7 beq.w 801555c <_vfiprintf_r+0x1ec> 801540e: 9a09 ldr r2, [sp, #36] @ 0x24 8015410: 445a add r2, fp 8015412: 9209 str r2, [sp, #36] @ 0x24 8015414: f89a 3000 ldrb.w r3, [sl] 8015418: 2b00 cmp r3, #0 801541a: f000 809f beq.w 801555c <_vfiprintf_r+0x1ec> 801541e: 2300 movs r3, #0 8015420: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8015424: e9cd 2305 strd r2, r3, [sp, #20] 8015428: f10a 0a01 add.w sl, sl, #1 801542c: 9304 str r3, [sp, #16] 801542e: 9307 str r3, [sp, #28] 8015430: f88d 3053 strb.w r3, [sp, #83] @ 0x53 8015434: 931a str r3, [sp, #104] @ 0x68 8015436: 4654 mov r4, sl 8015438: 2205 movs r2, #5 801543a: f814 1b01 ldrb.w r1, [r4], #1 801543e: 4853 ldr r0, [pc, #332] @ (801558c <_vfiprintf_r+0x21c>) 8015440: f7fe ff80 bl 8014344 8015444: 9a04 ldr r2, [sp, #16] 8015446: b9d8 cbnz r0, 8015480 <_vfiprintf_r+0x110> 8015448: 06d1 lsls r1, r2, #27 801544a: bf44 itt mi 801544c: 2320 movmi r3, #32 801544e: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 8015452: 0713 lsls r3, r2, #28 8015454: bf44 itt mi 8015456: 232b movmi r3, #43 @ 0x2b 8015458: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 801545c: f89a 3000 ldrb.w r3, [sl] 8015460: 2b2a cmp r3, #42 @ 0x2a 8015462: d015 beq.n 8015490 <_vfiprintf_r+0x120> 8015464: 4654 mov r4, sl 8015466: 2000 movs r0, #0 8015468: f04f 0c0a mov.w ip, #10 801546c: 9a07 ldr r2, [sp, #28] 801546e: 4621 mov r1, r4 8015470: f811 3b01 ldrb.w r3, [r1], #1 8015474: 3b30 subs r3, #48 @ 0x30 8015476: 2b09 cmp r3, #9 8015478: d94b bls.n 8015512 <_vfiprintf_r+0x1a2> 801547a: b1b0 cbz r0, 80154aa <_vfiprintf_r+0x13a> 801547c: 9207 str r2, [sp, #28] 801547e: e014 b.n 80154aa <_vfiprintf_r+0x13a> 8015480: eba0 0308 sub.w r3, r0, r8 8015484: fa09 f303 lsl.w r3, r9, r3 8015488: 4313 orrs r3, r2 801548a: 46a2 mov sl, r4 801548c: 9304 str r3, [sp, #16] 801548e: e7d2 b.n 8015436 <_vfiprintf_r+0xc6> 8015490: 9b03 ldr r3, [sp, #12] 8015492: 1d19 adds r1, r3, #4 8015494: 681b ldr r3, [r3, #0] 8015496: 9103 str r1, [sp, #12] 8015498: 2b00 cmp r3, #0 801549a: bfbb ittet lt 801549c: 425b neglt r3, r3 801549e: f042 0202 orrlt.w r2, r2, #2 80154a2: 9307 strge r3, [sp, #28] 80154a4: 9307 strlt r3, [sp, #28] 80154a6: bfb8 it lt 80154a8: 9204 strlt r2, [sp, #16] 80154aa: 7823 ldrb r3, [r4, #0] 80154ac: 2b2e cmp r3, #46 @ 0x2e 80154ae: d10a bne.n 80154c6 <_vfiprintf_r+0x156> 80154b0: 7863 ldrb r3, [r4, #1] 80154b2: 2b2a cmp r3, #42 @ 0x2a 80154b4: d132 bne.n 801551c <_vfiprintf_r+0x1ac> 80154b6: 9b03 ldr r3, [sp, #12] 80154b8: 3402 adds r4, #2 80154ba: 1d1a adds r2, r3, #4 80154bc: 681b ldr r3, [r3, #0] 80154be: 9203 str r2, [sp, #12] 80154c0: ea43 73e3 orr.w r3, r3, r3, asr #31 80154c4: 9305 str r3, [sp, #20] 80154c6: f8df a0c8 ldr.w sl, [pc, #200] @ 8015590 <_vfiprintf_r+0x220> 80154ca: 2203 movs r2, #3 80154cc: 4650 mov r0, sl 80154ce: 7821 ldrb r1, [r4, #0] 80154d0: f7fe ff38 bl 8014344 80154d4: b138 cbz r0, 80154e6 <_vfiprintf_r+0x176> 80154d6: 2240 movs r2, #64 @ 0x40 80154d8: 9b04 ldr r3, [sp, #16] 80154da: eba0 000a sub.w r0, r0, sl 80154de: 4082 lsls r2, r0 80154e0: 4313 orrs r3, r2 80154e2: 3401 adds r4, #1 80154e4: 9304 str r3, [sp, #16] 80154e6: f814 1b01 ldrb.w r1, [r4], #1 80154ea: 2206 movs r2, #6 80154ec: 4829 ldr r0, [pc, #164] @ (8015594 <_vfiprintf_r+0x224>) 80154ee: f88d 1028 strb.w r1, [sp, #40] @ 0x28 80154f2: f7fe ff27 bl 8014344 80154f6: 2800 cmp r0, #0 80154f8: d03f beq.n 801557a <_vfiprintf_r+0x20a> 80154fa: 4b27 ldr r3, [pc, #156] @ (8015598 <_vfiprintf_r+0x228>) 80154fc: bb1b cbnz r3, 8015546 <_vfiprintf_r+0x1d6> 80154fe: 9b03 ldr r3, [sp, #12] 8015500: 3307 adds r3, #7 8015502: f023 0307 bic.w r3, r3, #7 8015506: 3308 adds r3, #8 8015508: 9303 str r3, [sp, #12] 801550a: 9b09 ldr r3, [sp, #36] @ 0x24 801550c: 443b add r3, r7 801550e: 9309 str r3, [sp, #36] @ 0x24 8015510: e76a b.n 80153e8 <_vfiprintf_r+0x78> 8015512: 460c mov r4, r1 8015514: 2001 movs r0, #1 8015516: fb0c 3202 mla r2, ip, r2, r3 801551a: e7a8 b.n 801546e <_vfiprintf_r+0xfe> 801551c: 2300 movs r3, #0 801551e: f04f 0c0a mov.w ip, #10 8015522: 4619 mov r1, r3 8015524: 3401 adds r4, #1 8015526: 9305 str r3, [sp, #20] 8015528: 4620 mov r0, r4 801552a: f810 2b01 ldrb.w r2, [r0], #1 801552e: 3a30 subs r2, #48 @ 0x30 8015530: 2a09 cmp r2, #9 8015532: d903 bls.n 801553c <_vfiprintf_r+0x1cc> 8015534: 2b00 cmp r3, #0 8015536: d0c6 beq.n 80154c6 <_vfiprintf_r+0x156> 8015538: 9105 str r1, [sp, #20] 801553a: e7c4 b.n 80154c6 <_vfiprintf_r+0x156> 801553c: 4604 mov r4, r0 801553e: 2301 movs r3, #1 8015540: fb0c 2101 mla r1, ip, r1, r2 8015544: e7f0 b.n 8015528 <_vfiprintf_r+0x1b8> 8015546: ab03 add r3, sp, #12 8015548: 9300 str r3, [sp, #0] 801554a: 462a mov r2, r5 801554c: 4630 mov r0, r6 801554e: 4b13 ldr r3, [pc, #76] @ (801559c <_vfiprintf_r+0x22c>) 8015550: a904 add r1, sp, #16 8015552: f7fe f92b bl 80137ac <_printf_float> 8015556: 4607 mov r7, r0 8015558: 1c78 adds r0, r7, #1 801555a: d1d6 bne.n 801550a <_vfiprintf_r+0x19a> 801555c: 6e6b ldr r3, [r5, #100] @ 0x64 801555e: 07d9 lsls r1, r3, #31 8015560: d405 bmi.n 801556e <_vfiprintf_r+0x1fe> 8015562: 89ab ldrh r3, [r5, #12] 8015564: 059a lsls r2, r3, #22 8015566: d402 bmi.n 801556e <_vfiprintf_r+0x1fe> 8015568: 6da8 ldr r0, [r5, #88] @ 0x58 801556a: f7fe fee5 bl 8014338 <__retarget_lock_release_recursive> 801556e: 89ab ldrh r3, [r5, #12] 8015570: 065b lsls r3, r3, #25 8015572: f53f af1f bmi.w 80153b4 <_vfiprintf_r+0x44> 8015576: 9809 ldr r0, [sp, #36] @ 0x24 8015578: e71e b.n 80153b8 <_vfiprintf_r+0x48> 801557a: ab03 add r3, sp, #12 801557c: 9300 str r3, [sp, #0] 801557e: 462a mov r2, r5 8015580: 4630 mov r0, r6 8015582: 4b06 ldr r3, [pc, #24] @ (801559c <_vfiprintf_r+0x22c>) 8015584: a904 add r1, sp, #16 8015586: f7fe fbaf bl 8013ce8 <_printf_i> 801558a: e7e4 b.n 8015556 <_vfiprintf_r+0x1e6> 801558c: 08016e6d .word 0x08016e6d 8015590: 08016e73 .word 0x08016e73 8015594: 08016e77 .word 0x08016e77 8015598: 080137ad .word 0x080137ad 801559c: 0801534b .word 0x0801534b 080155a0 : 80155a0: 4b02 ldr r3, [pc, #8] @ (80155ac ) 80155a2: 4601 mov r1, r0 80155a4: 6818 ldr r0, [r3, #0] 80155a6: f000 b825 b.w 80155f4 <_malloc_r> 80155aa: bf00 nop 80155ac: 20000090 .word 0x20000090 080155b0 : 80155b0: b570 push {r4, r5, r6, lr} 80155b2: 4e0f ldr r6, [pc, #60] @ (80155f0 ) 80155b4: 460c mov r4, r1 80155b6: 6831 ldr r1, [r6, #0] 80155b8: 4605 mov r5, r0 80155ba: b911 cbnz r1, 80155c2 80155bc: f000 fe90 bl 80162e0 <_sbrk_r> 80155c0: 6030 str r0, [r6, #0] 80155c2: 4621 mov r1, r4 80155c4: 4628 mov r0, r5 80155c6: f000 fe8b bl 80162e0 <_sbrk_r> 80155ca: 1c43 adds r3, r0, #1 80155cc: d103 bne.n 80155d6 80155ce: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff 80155d2: 4620 mov r0, r4 80155d4: bd70 pop {r4, r5, r6, pc} 80155d6: 1cc4 adds r4, r0, #3 80155d8: f024 0403 bic.w r4, r4, #3 80155dc: 42a0 cmp r0, r4 80155de: d0f8 beq.n 80155d2 80155e0: 1a21 subs r1, r4, r0 80155e2: 4628 mov r0, r5 80155e4: f000 fe7c bl 80162e0 <_sbrk_r> 80155e8: 3001 adds r0, #1 80155ea: d1f2 bne.n 80155d2 80155ec: e7ef b.n 80155ce 80155ee: bf00 nop 80155f0: 200011c8 .word 0x200011c8 080155f4 <_malloc_r>: 80155f4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80155f8: 1ccd adds r5, r1, #3 80155fa: f025 0503 bic.w r5, r5, #3 80155fe: 3508 adds r5, #8 8015600: 2d0c cmp r5, #12 8015602: bf38 it cc 8015604: 250c movcc r5, #12 8015606: 2d00 cmp r5, #0 8015608: 4606 mov r6, r0 801560a: db01 blt.n 8015610 <_malloc_r+0x1c> 801560c: 42a9 cmp r1, r5 801560e: d904 bls.n 801561a <_malloc_r+0x26> 8015610: 230c movs r3, #12 8015612: 6033 str r3, [r6, #0] 8015614: 2000 movs r0, #0 8015616: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 801561a: f8df 80d4 ldr.w r8, [pc, #212] @ 80156f0 <_malloc_r+0xfc> 801561e: f000 f911 bl 8015844 <__malloc_lock> 8015622: f8d8 3000 ldr.w r3, [r8] 8015626: 461c mov r4, r3 8015628: bb44 cbnz r4, 801567c <_malloc_r+0x88> 801562a: 4629 mov r1, r5 801562c: 4630 mov r0, r6 801562e: f7ff ffbf bl 80155b0 8015632: 1c43 adds r3, r0, #1 8015634: 4604 mov r4, r0 8015636: d158 bne.n 80156ea <_malloc_r+0xf6> 8015638: f8d8 4000 ldr.w r4, [r8] 801563c: 4627 mov r7, r4 801563e: 2f00 cmp r7, #0 8015640: d143 bne.n 80156ca <_malloc_r+0xd6> 8015642: 2c00 cmp r4, #0 8015644: d04b beq.n 80156de <_malloc_r+0xea> 8015646: 6823 ldr r3, [r4, #0] 8015648: 4639 mov r1, r7 801564a: 4630 mov r0, r6 801564c: eb04 0903 add.w r9, r4, r3 8015650: f000 fe46 bl 80162e0 <_sbrk_r> 8015654: 4581 cmp r9, r0 8015656: d142 bne.n 80156de <_malloc_r+0xea> 8015658: 6821 ldr r1, [r4, #0] 801565a: 4630 mov r0, r6 801565c: 1a6d subs r5, r5, r1 801565e: 4629 mov r1, r5 8015660: f7ff ffa6 bl 80155b0 8015664: 3001 adds r0, #1 8015666: d03a beq.n 80156de <_malloc_r+0xea> 8015668: 6823 ldr r3, [r4, #0] 801566a: 442b add r3, r5 801566c: 6023 str r3, [r4, #0] 801566e: f8d8 3000 ldr.w r3, [r8] 8015672: 685a ldr r2, [r3, #4] 8015674: bb62 cbnz r2, 80156d0 <_malloc_r+0xdc> 8015676: f8c8 7000 str.w r7, [r8] 801567a: e00f b.n 801569c <_malloc_r+0xa8> 801567c: 6822 ldr r2, [r4, #0] 801567e: 1b52 subs r2, r2, r5 8015680: d420 bmi.n 80156c4 <_malloc_r+0xd0> 8015682: 2a0b cmp r2, #11 8015684: d917 bls.n 80156b6 <_malloc_r+0xc2> 8015686: 1961 adds r1, r4, r5 8015688: 42a3 cmp r3, r4 801568a: 6025 str r5, [r4, #0] 801568c: bf18 it ne 801568e: 6059 strne r1, [r3, #4] 8015690: 6863 ldr r3, [r4, #4] 8015692: bf08 it eq 8015694: f8c8 1000 streq.w r1, [r8] 8015698: 5162 str r2, [r4, r5] 801569a: 604b str r3, [r1, #4] 801569c: 4630 mov r0, r6 801569e: f000 f8d7 bl 8015850 <__malloc_unlock> 80156a2: f104 000b add.w r0, r4, #11 80156a6: 1d23 adds r3, r4, #4 80156a8: f020 0007 bic.w r0, r0, #7 80156ac: 1ac2 subs r2, r0, r3 80156ae: bf1c itt ne 80156b0: 1a1b subne r3, r3, r0 80156b2: 50a3 strne r3, [r4, r2] 80156b4: e7af b.n 8015616 <_malloc_r+0x22> 80156b6: 6862 ldr r2, [r4, #4] 80156b8: 42a3 cmp r3, r4 80156ba: bf0c ite eq 80156bc: f8c8 2000 streq.w r2, [r8] 80156c0: 605a strne r2, [r3, #4] 80156c2: e7eb b.n 801569c <_malloc_r+0xa8> 80156c4: 4623 mov r3, r4 80156c6: 6864 ldr r4, [r4, #4] 80156c8: e7ae b.n 8015628 <_malloc_r+0x34> 80156ca: 463c mov r4, r7 80156cc: 687f ldr r7, [r7, #4] 80156ce: e7b6 b.n 801563e <_malloc_r+0x4a> 80156d0: 461a mov r2, r3 80156d2: 685b ldr r3, [r3, #4] 80156d4: 42a3 cmp r3, r4 80156d6: d1fb bne.n 80156d0 <_malloc_r+0xdc> 80156d8: 2300 movs r3, #0 80156da: 6053 str r3, [r2, #4] 80156dc: e7de b.n 801569c <_malloc_r+0xa8> 80156de: 230c movs r3, #12 80156e0: 4630 mov r0, r6 80156e2: 6033 str r3, [r6, #0] 80156e4: f000 f8b4 bl 8015850 <__malloc_unlock> 80156e8: e794 b.n 8015614 <_malloc_r+0x20> 80156ea: 6005 str r5, [r0, #0] 80156ec: e7d6 b.n 801569c <_malloc_r+0xa8> 80156ee: bf00 nop 80156f0: 200011cc .word 0x200011cc 080156f4 <__sflush_r>: 80156f4: f9b1 200c ldrsh.w r2, [r1, #12] 80156f8: b5f8 push {r3, r4, r5, r6, r7, lr} 80156fa: 0716 lsls r6, r2, #28 80156fc: 4605 mov r5, r0 80156fe: 460c mov r4, r1 8015700: d454 bmi.n 80157ac <__sflush_r+0xb8> 8015702: 684b ldr r3, [r1, #4] 8015704: 2b00 cmp r3, #0 8015706: dc02 bgt.n 801570e <__sflush_r+0x1a> 8015708: 6c0b ldr r3, [r1, #64] @ 0x40 801570a: 2b00 cmp r3, #0 801570c: dd48 ble.n 80157a0 <__sflush_r+0xac> 801570e: 6ae6 ldr r6, [r4, #44] @ 0x2c 8015710: 2e00 cmp r6, #0 8015712: d045 beq.n 80157a0 <__sflush_r+0xac> 8015714: 2300 movs r3, #0 8015716: f412 5280 ands.w r2, r2, #4096 @ 0x1000 801571a: 682f ldr r7, [r5, #0] 801571c: 6a21 ldr r1, [r4, #32] 801571e: 602b str r3, [r5, #0] 8015720: d030 beq.n 8015784 <__sflush_r+0x90> 8015722: 6d62 ldr r2, [r4, #84] @ 0x54 8015724: 89a3 ldrh r3, [r4, #12] 8015726: 0759 lsls r1, r3, #29 8015728: d505 bpl.n 8015736 <__sflush_r+0x42> 801572a: 6863 ldr r3, [r4, #4] 801572c: 1ad2 subs r2, r2, r3 801572e: 6b63 ldr r3, [r4, #52] @ 0x34 8015730: b10b cbz r3, 8015736 <__sflush_r+0x42> 8015732: 6c23 ldr r3, [r4, #64] @ 0x40 8015734: 1ad2 subs r2, r2, r3 8015736: 2300 movs r3, #0 8015738: 4628 mov r0, r5 801573a: 6ae6 ldr r6, [r4, #44] @ 0x2c 801573c: 6a21 ldr r1, [r4, #32] 801573e: 47b0 blx r6 8015740: 1c43 adds r3, r0, #1 8015742: 89a3 ldrh r3, [r4, #12] 8015744: d106 bne.n 8015754 <__sflush_r+0x60> 8015746: 6829 ldr r1, [r5, #0] 8015748: 291d cmp r1, #29 801574a: d82b bhi.n 80157a4 <__sflush_r+0xb0> 801574c: 4a28 ldr r2, [pc, #160] @ (80157f0 <__sflush_r+0xfc>) 801574e: 40ca lsrs r2, r1 8015750: 07d6 lsls r6, r2, #31 8015752: d527 bpl.n 80157a4 <__sflush_r+0xb0> 8015754: 2200 movs r2, #0 8015756: 6062 str r2, [r4, #4] 8015758: 6922 ldr r2, [r4, #16] 801575a: 04d9 lsls r1, r3, #19 801575c: 6022 str r2, [r4, #0] 801575e: d504 bpl.n 801576a <__sflush_r+0x76> 8015760: 1c42 adds r2, r0, #1 8015762: d101 bne.n 8015768 <__sflush_r+0x74> 8015764: 682b ldr r3, [r5, #0] 8015766: b903 cbnz r3, 801576a <__sflush_r+0x76> 8015768: 6560 str r0, [r4, #84] @ 0x54 801576a: 6b61 ldr r1, [r4, #52] @ 0x34 801576c: 602f str r7, [r5, #0] 801576e: b1b9 cbz r1, 80157a0 <__sflush_r+0xac> 8015770: f104 0344 add.w r3, r4, #68 @ 0x44 8015774: 4299 cmp r1, r3 8015776: d002 beq.n 801577e <__sflush_r+0x8a> 8015778: 4628 mov r0, r5 801577a: f000 fe11 bl 80163a0 <_free_r> 801577e: 2300 movs r3, #0 8015780: 6363 str r3, [r4, #52] @ 0x34 8015782: e00d b.n 80157a0 <__sflush_r+0xac> 8015784: 2301 movs r3, #1 8015786: 4628 mov r0, r5 8015788: 47b0 blx r6 801578a: 4602 mov r2, r0 801578c: 1c50 adds r0, r2, #1 801578e: d1c9 bne.n 8015724 <__sflush_r+0x30> 8015790: 682b ldr r3, [r5, #0] 8015792: 2b00 cmp r3, #0 8015794: d0c6 beq.n 8015724 <__sflush_r+0x30> 8015796: 2b1d cmp r3, #29 8015798: d001 beq.n 801579e <__sflush_r+0xaa> 801579a: 2b16 cmp r3, #22 801579c: d11d bne.n 80157da <__sflush_r+0xe6> 801579e: 602f str r7, [r5, #0] 80157a0: 2000 movs r0, #0 80157a2: e021 b.n 80157e8 <__sflush_r+0xf4> 80157a4: f043 0340 orr.w r3, r3, #64 @ 0x40 80157a8: b21b sxth r3, r3 80157aa: e01a b.n 80157e2 <__sflush_r+0xee> 80157ac: 690f ldr r7, [r1, #16] 80157ae: 2f00 cmp r7, #0 80157b0: d0f6 beq.n 80157a0 <__sflush_r+0xac> 80157b2: 0793 lsls r3, r2, #30 80157b4: bf18 it ne 80157b6: 2300 movne r3, #0 80157b8: 680e ldr r6, [r1, #0] 80157ba: bf08 it eq 80157bc: 694b ldreq r3, [r1, #20] 80157be: 1bf6 subs r6, r6, r7 80157c0: 600f str r7, [r1, #0] 80157c2: 608b str r3, [r1, #8] 80157c4: 2e00 cmp r6, #0 80157c6: ddeb ble.n 80157a0 <__sflush_r+0xac> 80157c8: 4633 mov r3, r6 80157ca: 463a mov r2, r7 80157cc: 4628 mov r0, r5 80157ce: 6a21 ldr r1, [r4, #32] 80157d0: f8d4 c028 ldr.w ip, [r4, #40] @ 0x28 80157d4: 47e0 blx ip 80157d6: 2800 cmp r0, #0 80157d8: dc07 bgt.n 80157ea <__sflush_r+0xf6> 80157da: f9b4 300c ldrsh.w r3, [r4, #12] 80157de: f043 0340 orr.w r3, r3, #64 @ 0x40 80157e2: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80157e6: 81a3 strh r3, [r4, #12] 80157e8: bdf8 pop {r3, r4, r5, r6, r7, pc} 80157ea: 4407 add r7, r0 80157ec: 1a36 subs r6, r6, r0 80157ee: e7e9 b.n 80157c4 <__sflush_r+0xd0> 80157f0: 20400001 .word 0x20400001 080157f4 <_fflush_r>: 80157f4: b538 push {r3, r4, r5, lr} 80157f6: 690b ldr r3, [r1, #16] 80157f8: 4605 mov r5, r0 80157fa: 460c mov r4, r1 80157fc: b913 cbnz r3, 8015804 <_fflush_r+0x10> 80157fe: 2500 movs r5, #0 8015800: 4628 mov r0, r5 8015802: bd38 pop {r3, r4, r5, pc} 8015804: b118 cbz r0, 801580e <_fflush_r+0x1a> 8015806: 6a03 ldr r3, [r0, #32] 8015808: b90b cbnz r3, 801580e <_fflush_r+0x1a> 801580a: f7fe fc17 bl 801403c <__sinit> 801580e: f9b4 300c ldrsh.w r3, [r4, #12] 8015812: 2b00 cmp r3, #0 8015814: d0f3 beq.n 80157fe <_fflush_r+0xa> 8015816: 6e62 ldr r2, [r4, #100] @ 0x64 8015818: 07d0 lsls r0, r2, #31 801581a: d404 bmi.n 8015826 <_fflush_r+0x32> 801581c: 0599 lsls r1, r3, #22 801581e: d402 bmi.n 8015826 <_fflush_r+0x32> 8015820: 6da0 ldr r0, [r4, #88] @ 0x58 8015822: f7fe fd88 bl 8014336 <__retarget_lock_acquire_recursive> 8015826: 4628 mov r0, r5 8015828: 4621 mov r1, r4 801582a: f7ff ff63 bl 80156f4 <__sflush_r> 801582e: 6e63 ldr r3, [r4, #100] @ 0x64 8015830: 4605 mov r5, r0 8015832: 07da lsls r2, r3, #31 8015834: d4e4 bmi.n 8015800 <_fflush_r+0xc> 8015836: 89a3 ldrh r3, [r4, #12] 8015838: 059b lsls r3, r3, #22 801583a: d4e1 bmi.n 8015800 <_fflush_r+0xc> 801583c: 6da0 ldr r0, [r4, #88] @ 0x58 801583e: f7fe fd7b bl 8014338 <__retarget_lock_release_recursive> 8015842: e7dd b.n 8015800 <_fflush_r+0xc> 08015844 <__malloc_lock>: 8015844: 4801 ldr r0, [pc, #4] @ (801584c <__malloc_lock+0x8>) 8015846: f7fe bd76 b.w 8014336 <__retarget_lock_acquire_recursive> 801584a: bf00 nop 801584c: 200011c4 .word 0x200011c4 08015850 <__malloc_unlock>: 8015850: 4801 ldr r0, [pc, #4] @ (8015858 <__malloc_unlock+0x8>) 8015852: f7fe bd71 b.w 8014338 <__retarget_lock_release_recursive> 8015856: bf00 nop 8015858: 200011c4 .word 0x200011c4 0801585c <_Balloc>: 801585c: b570 push {r4, r5, r6, lr} 801585e: 69c6 ldr r6, [r0, #28] 8015860: 4604 mov r4, r0 8015862: 460d mov r5, r1 8015864: b976 cbnz r6, 8015884 <_Balloc+0x28> 8015866: 2010 movs r0, #16 8015868: f7ff fe9a bl 80155a0 801586c: 4602 mov r2, r0 801586e: 61e0 str r0, [r4, #28] 8015870: b920 cbnz r0, 801587c <_Balloc+0x20> 8015872: 216b movs r1, #107 @ 0x6b 8015874: 4b17 ldr r3, [pc, #92] @ (80158d4 <_Balloc+0x78>) 8015876: 4818 ldr r0, [pc, #96] @ (80158d8 <_Balloc+0x7c>) 8015878: f7fe fd80 bl 801437c <__assert_func> 801587c: e9c0 6601 strd r6, r6, [r0, #4] 8015880: 6006 str r6, [r0, #0] 8015882: 60c6 str r6, [r0, #12] 8015884: 69e6 ldr r6, [r4, #28] 8015886: 68f3 ldr r3, [r6, #12] 8015888: b183 cbz r3, 80158ac <_Balloc+0x50> 801588a: 69e3 ldr r3, [r4, #28] 801588c: 68db ldr r3, [r3, #12] 801588e: f853 0025 ldr.w r0, [r3, r5, lsl #2] 8015892: b9b8 cbnz r0, 80158c4 <_Balloc+0x68> 8015894: 2101 movs r1, #1 8015896: fa01 f605 lsl.w r6, r1, r5 801589a: 1d72 adds r2, r6, #5 801589c: 4620 mov r0, r4 801589e: 0092 lsls r2, r2, #2 80158a0: f000 fd69 bl 8016376 <_calloc_r> 80158a4: b160 cbz r0, 80158c0 <_Balloc+0x64> 80158a6: e9c0 5601 strd r5, r6, [r0, #4] 80158aa: e00e b.n 80158ca <_Balloc+0x6e> 80158ac: 2221 movs r2, #33 @ 0x21 80158ae: 2104 movs r1, #4 80158b0: 4620 mov r0, r4 80158b2: f000 fd60 bl 8016376 <_calloc_r> 80158b6: 69e3 ldr r3, [r4, #28] 80158b8: 60f0 str r0, [r6, #12] 80158ba: 68db ldr r3, [r3, #12] 80158bc: 2b00 cmp r3, #0 80158be: d1e4 bne.n 801588a <_Balloc+0x2e> 80158c0: 2000 movs r0, #0 80158c2: bd70 pop {r4, r5, r6, pc} 80158c4: 6802 ldr r2, [r0, #0] 80158c6: f843 2025 str.w r2, [r3, r5, lsl #2] 80158ca: 2300 movs r3, #0 80158cc: e9c0 3303 strd r3, r3, [r0, #12] 80158d0: e7f7 b.n 80158c2 <_Balloc+0x66> 80158d2: bf00 nop 80158d4: 08016d4c .word 0x08016d4c 80158d8: 08016e7e .word 0x08016e7e 080158dc <_Bfree>: 80158dc: b570 push {r4, r5, r6, lr} 80158de: 69c6 ldr r6, [r0, #28] 80158e0: 4605 mov r5, r0 80158e2: 460c mov r4, r1 80158e4: b976 cbnz r6, 8015904 <_Bfree+0x28> 80158e6: 2010 movs r0, #16 80158e8: f7ff fe5a bl 80155a0 80158ec: 4602 mov r2, r0 80158ee: 61e8 str r0, [r5, #28] 80158f0: b920 cbnz r0, 80158fc <_Bfree+0x20> 80158f2: 218f movs r1, #143 @ 0x8f 80158f4: 4b08 ldr r3, [pc, #32] @ (8015918 <_Bfree+0x3c>) 80158f6: 4809 ldr r0, [pc, #36] @ (801591c <_Bfree+0x40>) 80158f8: f7fe fd40 bl 801437c <__assert_func> 80158fc: e9c0 6601 strd r6, r6, [r0, #4] 8015900: 6006 str r6, [r0, #0] 8015902: 60c6 str r6, [r0, #12] 8015904: b13c cbz r4, 8015916 <_Bfree+0x3a> 8015906: 69eb ldr r3, [r5, #28] 8015908: 6862 ldr r2, [r4, #4] 801590a: 68db ldr r3, [r3, #12] 801590c: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8015910: 6021 str r1, [r4, #0] 8015912: f843 4022 str.w r4, [r3, r2, lsl #2] 8015916: bd70 pop {r4, r5, r6, pc} 8015918: 08016d4c .word 0x08016d4c 801591c: 08016e7e .word 0x08016e7e 08015920 <__multadd>: 8015920: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8015924: 4607 mov r7, r0 8015926: 460c mov r4, r1 8015928: 461e mov r6, r3 801592a: 2000 movs r0, #0 801592c: 690d ldr r5, [r1, #16] 801592e: f101 0c14 add.w ip, r1, #20 8015932: f8dc 3000 ldr.w r3, [ip] 8015936: 3001 adds r0, #1 8015938: b299 uxth r1, r3 801593a: fb02 6101 mla r1, r2, r1, r6 801593e: 0c1e lsrs r6, r3, #16 8015940: 0c0b lsrs r3, r1, #16 8015942: fb02 3306 mla r3, r2, r6, r3 8015946: b289 uxth r1, r1 8015948: eb01 4103 add.w r1, r1, r3, lsl #16 801594c: 4285 cmp r5, r0 801594e: ea4f 4613 mov.w r6, r3, lsr #16 8015952: f84c 1b04 str.w r1, [ip], #4 8015956: dcec bgt.n 8015932 <__multadd+0x12> 8015958: b30e cbz r6, 801599e <__multadd+0x7e> 801595a: 68a3 ldr r3, [r4, #8] 801595c: 42ab cmp r3, r5 801595e: dc19 bgt.n 8015994 <__multadd+0x74> 8015960: 6861 ldr r1, [r4, #4] 8015962: 4638 mov r0, r7 8015964: 3101 adds r1, #1 8015966: f7ff ff79 bl 801585c <_Balloc> 801596a: 4680 mov r8, r0 801596c: b928 cbnz r0, 801597a <__multadd+0x5a> 801596e: 4602 mov r2, r0 8015970: 21ba movs r1, #186 @ 0xba 8015972: 4b0c ldr r3, [pc, #48] @ (80159a4 <__multadd+0x84>) 8015974: 480c ldr r0, [pc, #48] @ (80159a8 <__multadd+0x88>) 8015976: f7fe fd01 bl 801437c <__assert_func> 801597a: 6922 ldr r2, [r4, #16] 801597c: f104 010c add.w r1, r4, #12 8015980: 3202 adds r2, #2 8015982: 0092 lsls r2, r2, #2 8015984: 300c adds r0, #12 8015986: f7fe fceb bl 8014360 801598a: 4621 mov r1, r4 801598c: 4638 mov r0, r7 801598e: f7ff ffa5 bl 80158dc <_Bfree> 8015992: 4644 mov r4, r8 8015994: eb04 0385 add.w r3, r4, r5, lsl #2 8015998: 3501 adds r5, #1 801599a: 615e str r6, [r3, #20] 801599c: 6125 str r5, [r4, #16] 801599e: 4620 mov r0, r4 80159a0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80159a4: 08016e5c .word 0x08016e5c 80159a8: 08016e7e .word 0x08016e7e 080159ac <__hi0bits>: 80159ac: 4603 mov r3, r0 80159ae: f5b0 3f80 cmp.w r0, #65536 @ 0x10000 80159b2: bf3a itte cc 80159b4: 0403 lslcc r3, r0, #16 80159b6: 2010 movcc r0, #16 80159b8: 2000 movcs r0, #0 80159ba: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 80159be: bf3c itt cc 80159c0: 021b lslcc r3, r3, #8 80159c2: 3008 addcc r0, #8 80159c4: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000 80159c8: bf3c itt cc 80159ca: 011b lslcc r3, r3, #4 80159cc: 3004 addcc r0, #4 80159ce: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80159d2: bf3c itt cc 80159d4: 009b lslcc r3, r3, #2 80159d6: 3002 addcc r0, #2 80159d8: 2b00 cmp r3, #0 80159da: db05 blt.n 80159e8 <__hi0bits+0x3c> 80159dc: f013 4f80 tst.w r3, #1073741824 @ 0x40000000 80159e0: f100 0001 add.w r0, r0, #1 80159e4: bf08 it eq 80159e6: 2020 moveq r0, #32 80159e8: 4770 bx lr 080159ea <__lo0bits>: 80159ea: 6803 ldr r3, [r0, #0] 80159ec: 4602 mov r2, r0 80159ee: f013 0007 ands.w r0, r3, #7 80159f2: d00b beq.n 8015a0c <__lo0bits+0x22> 80159f4: 07d9 lsls r1, r3, #31 80159f6: d421 bmi.n 8015a3c <__lo0bits+0x52> 80159f8: 0798 lsls r0, r3, #30 80159fa: bf49 itett mi 80159fc: 085b lsrmi r3, r3, #1 80159fe: 089b lsrpl r3, r3, #2 8015a00: 2001 movmi r0, #1 8015a02: 6013 strmi r3, [r2, #0] 8015a04: bf5c itt pl 8015a06: 2002 movpl r0, #2 8015a08: 6013 strpl r3, [r2, #0] 8015a0a: 4770 bx lr 8015a0c: b299 uxth r1, r3 8015a0e: b909 cbnz r1, 8015a14 <__lo0bits+0x2a> 8015a10: 2010 movs r0, #16 8015a12: 0c1b lsrs r3, r3, #16 8015a14: b2d9 uxtb r1, r3 8015a16: b909 cbnz r1, 8015a1c <__lo0bits+0x32> 8015a18: 3008 adds r0, #8 8015a1a: 0a1b lsrs r3, r3, #8 8015a1c: 0719 lsls r1, r3, #28 8015a1e: bf04 itt eq 8015a20: 091b lsreq r3, r3, #4 8015a22: 3004 addeq r0, #4 8015a24: 0799 lsls r1, r3, #30 8015a26: bf04 itt eq 8015a28: 089b lsreq r3, r3, #2 8015a2a: 3002 addeq r0, #2 8015a2c: 07d9 lsls r1, r3, #31 8015a2e: d403 bmi.n 8015a38 <__lo0bits+0x4e> 8015a30: 085b lsrs r3, r3, #1 8015a32: f100 0001 add.w r0, r0, #1 8015a36: d003 beq.n 8015a40 <__lo0bits+0x56> 8015a38: 6013 str r3, [r2, #0] 8015a3a: 4770 bx lr 8015a3c: 2000 movs r0, #0 8015a3e: 4770 bx lr 8015a40: 2020 movs r0, #32 8015a42: 4770 bx lr 08015a44 <__i2b>: 8015a44: b510 push {r4, lr} 8015a46: 460c mov r4, r1 8015a48: 2101 movs r1, #1 8015a4a: f7ff ff07 bl 801585c <_Balloc> 8015a4e: 4602 mov r2, r0 8015a50: b928 cbnz r0, 8015a5e <__i2b+0x1a> 8015a52: f240 1145 movw r1, #325 @ 0x145 8015a56: 4b04 ldr r3, [pc, #16] @ (8015a68 <__i2b+0x24>) 8015a58: 4804 ldr r0, [pc, #16] @ (8015a6c <__i2b+0x28>) 8015a5a: f7fe fc8f bl 801437c <__assert_func> 8015a5e: 2301 movs r3, #1 8015a60: 6144 str r4, [r0, #20] 8015a62: 6103 str r3, [r0, #16] 8015a64: bd10 pop {r4, pc} 8015a66: bf00 nop 8015a68: 08016e5c .word 0x08016e5c 8015a6c: 08016e7e .word 0x08016e7e 08015a70 <__multiply>: 8015a70: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8015a74: 4617 mov r7, r2 8015a76: 690a ldr r2, [r1, #16] 8015a78: 693b ldr r3, [r7, #16] 8015a7a: 4689 mov r9, r1 8015a7c: 429a cmp r2, r3 8015a7e: bfa2 ittt ge 8015a80: 463b movge r3, r7 8015a82: 460f movge r7, r1 8015a84: 4699 movge r9, r3 8015a86: 693d ldr r5, [r7, #16] 8015a88: f8d9 a010 ldr.w sl, [r9, #16] 8015a8c: 68bb ldr r3, [r7, #8] 8015a8e: 6879 ldr r1, [r7, #4] 8015a90: eb05 060a add.w r6, r5, sl 8015a94: 42b3 cmp r3, r6 8015a96: b085 sub sp, #20 8015a98: bfb8 it lt 8015a9a: 3101 addlt r1, #1 8015a9c: f7ff fede bl 801585c <_Balloc> 8015aa0: b930 cbnz r0, 8015ab0 <__multiply+0x40> 8015aa2: 4602 mov r2, r0 8015aa4: f44f 71b1 mov.w r1, #354 @ 0x162 8015aa8: 4b40 ldr r3, [pc, #256] @ (8015bac <__multiply+0x13c>) 8015aaa: 4841 ldr r0, [pc, #260] @ (8015bb0 <__multiply+0x140>) 8015aac: f7fe fc66 bl 801437c <__assert_func> 8015ab0: f100 0414 add.w r4, r0, #20 8015ab4: 4623 mov r3, r4 8015ab6: 2200 movs r2, #0 8015ab8: eb04 0e86 add.w lr, r4, r6, lsl #2 8015abc: 4573 cmp r3, lr 8015abe: d320 bcc.n 8015b02 <__multiply+0x92> 8015ac0: f107 0814 add.w r8, r7, #20 8015ac4: f109 0114 add.w r1, r9, #20 8015ac8: eb08 0585 add.w r5, r8, r5, lsl #2 8015acc: eb01 038a add.w r3, r1, sl, lsl #2 8015ad0: 9302 str r3, [sp, #8] 8015ad2: 1beb subs r3, r5, r7 8015ad4: 3b15 subs r3, #21 8015ad6: f023 0303 bic.w r3, r3, #3 8015ada: 3304 adds r3, #4 8015adc: 3715 adds r7, #21 8015ade: 42bd cmp r5, r7 8015ae0: bf38 it cc 8015ae2: 2304 movcc r3, #4 8015ae4: 9301 str r3, [sp, #4] 8015ae6: 9b02 ldr r3, [sp, #8] 8015ae8: 9103 str r1, [sp, #12] 8015aea: 428b cmp r3, r1 8015aec: d80c bhi.n 8015b08 <__multiply+0x98> 8015aee: 2e00 cmp r6, #0 8015af0: dd03 ble.n 8015afa <__multiply+0x8a> 8015af2: f85e 3d04 ldr.w r3, [lr, #-4]! 8015af6: 2b00 cmp r3, #0 8015af8: d055 beq.n 8015ba6 <__multiply+0x136> 8015afa: 6106 str r6, [r0, #16] 8015afc: b005 add sp, #20 8015afe: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8015b02: f843 2b04 str.w r2, [r3], #4 8015b06: e7d9 b.n 8015abc <__multiply+0x4c> 8015b08: f8b1 a000 ldrh.w sl, [r1] 8015b0c: f1ba 0f00 cmp.w sl, #0 8015b10: d01f beq.n 8015b52 <__multiply+0xe2> 8015b12: 46c4 mov ip, r8 8015b14: 46a1 mov r9, r4 8015b16: 2700 movs r7, #0 8015b18: f85c 2b04 ldr.w r2, [ip], #4 8015b1c: f8d9 3000 ldr.w r3, [r9] 8015b20: fa1f fb82 uxth.w fp, r2 8015b24: b29b uxth r3, r3 8015b26: fb0a 330b mla r3, sl, fp, r3 8015b2a: 443b add r3, r7 8015b2c: f8d9 7000 ldr.w r7, [r9] 8015b30: 0c12 lsrs r2, r2, #16 8015b32: 0c3f lsrs r7, r7, #16 8015b34: fb0a 7202 mla r2, sl, r2, r7 8015b38: eb02 4213 add.w r2, r2, r3, lsr #16 8015b3c: b29b uxth r3, r3 8015b3e: ea43 4302 orr.w r3, r3, r2, lsl #16 8015b42: 4565 cmp r5, ip 8015b44: ea4f 4712 mov.w r7, r2, lsr #16 8015b48: f849 3b04 str.w r3, [r9], #4 8015b4c: d8e4 bhi.n 8015b18 <__multiply+0xa8> 8015b4e: 9b01 ldr r3, [sp, #4] 8015b50: 50e7 str r7, [r4, r3] 8015b52: 9b03 ldr r3, [sp, #12] 8015b54: 3104 adds r1, #4 8015b56: f8b3 9002 ldrh.w r9, [r3, #2] 8015b5a: f1b9 0f00 cmp.w r9, #0 8015b5e: d020 beq.n 8015ba2 <__multiply+0x132> 8015b60: 4647 mov r7, r8 8015b62: 46a4 mov ip, r4 8015b64: f04f 0a00 mov.w sl, #0 8015b68: 6823 ldr r3, [r4, #0] 8015b6a: f8b7 b000 ldrh.w fp, [r7] 8015b6e: f8bc 2002 ldrh.w r2, [ip, #2] 8015b72: b29b uxth r3, r3 8015b74: fb09 220b mla r2, r9, fp, r2 8015b78: 4452 add r2, sl 8015b7a: ea43 4302 orr.w r3, r3, r2, lsl #16 8015b7e: f84c 3b04 str.w r3, [ip], #4 8015b82: f857 3b04 ldr.w r3, [r7], #4 8015b86: ea4f 4a13 mov.w sl, r3, lsr #16 8015b8a: f8bc 3000 ldrh.w r3, [ip] 8015b8e: 42bd cmp r5, r7 8015b90: fb09 330a mla r3, r9, sl, r3 8015b94: eb03 4312 add.w r3, r3, r2, lsr #16 8015b98: ea4f 4a13 mov.w sl, r3, lsr #16 8015b9c: d8e5 bhi.n 8015b6a <__multiply+0xfa> 8015b9e: 9a01 ldr r2, [sp, #4] 8015ba0: 50a3 str r3, [r4, r2] 8015ba2: 3404 adds r4, #4 8015ba4: e79f b.n 8015ae6 <__multiply+0x76> 8015ba6: 3e01 subs r6, #1 8015ba8: e7a1 b.n 8015aee <__multiply+0x7e> 8015baa: bf00 nop 8015bac: 08016e5c .word 0x08016e5c 8015bb0: 08016e7e .word 0x08016e7e 08015bb4 <__pow5mult>: 8015bb4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8015bb8: 4615 mov r5, r2 8015bba: f012 0203 ands.w r2, r2, #3 8015bbe: 4607 mov r7, r0 8015bc0: 460e mov r6, r1 8015bc2: d007 beq.n 8015bd4 <__pow5mult+0x20> 8015bc4: 4c25 ldr r4, [pc, #148] @ (8015c5c <__pow5mult+0xa8>) 8015bc6: 3a01 subs r2, #1 8015bc8: 2300 movs r3, #0 8015bca: f854 2022 ldr.w r2, [r4, r2, lsl #2] 8015bce: f7ff fea7 bl 8015920 <__multadd> 8015bd2: 4606 mov r6, r0 8015bd4: 10ad asrs r5, r5, #2 8015bd6: d03d beq.n 8015c54 <__pow5mult+0xa0> 8015bd8: 69fc ldr r4, [r7, #28] 8015bda: b97c cbnz r4, 8015bfc <__pow5mult+0x48> 8015bdc: 2010 movs r0, #16 8015bde: f7ff fcdf bl 80155a0 8015be2: 4602 mov r2, r0 8015be4: 61f8 str r0, [r7, #28] 8015be6: b928 cbnz r0, 8015bf4 <__pow5mult+0x40> 8015be8: f240 11b3 movw r1, #435 @ 0x1b3 8015bec: 4b1c ldr r3, [pc, #112] @ (8015c60 <__pow5mult+0xac>) 8015bee: 481d ldr r0, [pc, #116] @ (8015c64 <__pow5mult+0xb0>) 8015bf0: f7fe fbc4 bl 801437c <__assert_func> 8015bf4: e9c0 4401 strd r4, r4, [r0, #4] 8015bf8: 6004 str r4, [r0, #0] 8015bfa: 60c4 str r4, [r0, #12] 8015bfc: f8d7 801c ldr.w r8, [r7, #28] 8015c00: f8d8 4008 ldr.w r4, [r8, #8] 8015c04: b94c cbnz r4, 8015c1a <__pow5mult+0x66> 8015c06: f240 2171 movw r1, #625 @ 0x271 8015c0a: 4638 mov r0, r7 8015c0c: f7ff ff1a bl 8015a44 <__i2b> 8015c10: 2300 movs r3, #0 8015c12: 4604 mov r4, r0 8015c14: f8c8 0008 str.w r0, [r8, #8] 8015c18: 6003 str r3, [r0, #0] 8015c1a: f04f 0900 mov.w r9, #0 8015c1e: 07eb lsls r3, r5, #31 8015c20: d50a bpl.n 8015c38 <__pow5mult+0x84> 8015c22: 4631 mov r1, r6 8015c24: 4622 mov r2, r4 8015c26: 4638 mov r0, r7 8015c28: f7ff ff22 bl 8015a70 <__multiply> 8015c2c: 4680 mov r8, r0 8015c2e: 4631 mov r1, r6 8015c30: 4638 mov r0, r7 8015c32: f7ff fe53 bl 80158dc <_Bfree> 8015c36: 4646 mov r6, r8 8015c38: 106d asrs r5, r5, #1 8015c3a: d00b beq.n 8015c54 <__pow5mult+0xa0> 8015c3c: 6820 ldr r0, [r4, #0] 8015c3e: b938 cbnz r0, 8015c50 <__pow5mult+0x9c> 8015c40: 4622 mov r2, r4 8015c42: 4621 mov r1, r4 8015c44: 4638 mov r0, r7 8015c46: f7ff ff13 bl 8015a70 <__multiply> 8015c4a: 6020 str r0, [r4, #0] 8015c4c: f8c0 9000 str.w r9, [r0] 8015c50: 4604 mov r4, r0 8015c52: e7e4 b.n 8015c1e <__pow5mult+0x6a> 8015c54: 4630 mov r0, r6 8015c56: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8015c5a: bf00 nop 8015c5c: 08016ee4 .word 0x08016ee4 8015c60: 08016d4c .word 0x08016d4c 8015c64: 08016e7e .word 0x08016e7e 08015c68 <__lshift>: 8015c68: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8015c6c: 460c mov r4, r1 8015c6e: 4607 mov r7, r0 8015c70: 4691 mov r9, r2 8015c72: 6923 ldr r3, [r4, #16] 8015c74: 6849 ldr r1, [r1, #4] 8015c76: eb03 1862 add.w r8, r3, r2, asr #5 8015c7a: 68a3 ldr r3, [r4, #8] 8015c7c: ea4f 1a62 mov.w sl, r2, asr #5 8015c80: f108 0601 add.w r6, r8, #1 8015c84: 42b3 cmp r3, r6 8015c86: db0b blt.n 8015ca0 <__lshift+0x38> 8015c88: 4638 mov r0, r7 8015c8a: f7ff fde7 bl 801585c <_Balloc> 8015c8e: 4605 mov r5, r0 8015c90: b948 cbnz r0, 8015ca6 <__lshift+0x3e> 8015c92: 4602 mov r2, r0 8015c94: f44f 71ef mov.w r1, #478 @ 0x1de 8015c98: 4b27 ldr r3, [pc, #156] @ (8015d38 <__lshift+0xd0>) 8015c9a: 4828 ldr r0, [pc, #160] @ (8015d3c <__lshift+0xd4>) 8015c9c: f7fe fb6e bl 801437c <__assert_func> 8015ca0: 3101 adds r1, #1 8015ca2: 005b lsls r3, r3, #1 8015ca4: e7ee b.n 8015c84 <__lshift+0x1c> 8015ca6: 2300 movs r3, #0 8015ca8: f100 0114 add.w r1, r0, #20 8015cac: f100 0210 add.w r2, r0, #16 8015cb0: 4618 mov r0, r3 8015cb2: 4553 cmp r3, sl 8015cb4: db33 blt.n 8015d1e <__lshift+0xb6> 8015cb6: 6920 ldr r0, [r4, #16] 8015cb8: ea2a 7aea bic.w sl, sl, sl, asr #31 8015cbc: f104 0314 add.w r3, r4, #20 8015cc0: f019 091f ands.w r9, r9, #31 8015cc4: eb01 018a add.w r1, r1, sl, lsl #2 8015cc8: eb03 0c80 add.w ip, r3, r0, lsl #2 8015ccc: d02b beq.n 8015d26 <__lshift+0xbe> 8015cce: 468a mov sl, r1 8015cd0: 2200 movs r2, #0 8015cd2: f1c9 0e20 rsb lr, r9, #32 8015cd6: 6818 ldr r0, [r3, #0] 8015cd8: fa00 f009 lsl.w r0, r0, r9 8015cdc: 4310 orrs r0, r2 8015cde: f84a 0b04 str.w r0, [sl], #4 8015ce2: f853 2b04 ldr.w r2, [r3], #4 8015ce6: 459c cmp ip, r3 8015ce8: fa22 f20e lsr.w r2, r2, lr 8015cec: d8f3 bhi.n 8015cd6 <__lshift+0x6e> 8015cee: ebac 0304 sub.w r3, ip, r4 8015cf2: 3b15 subs r3, #21 8015cf4: f023 0303 bic.w r3, r3, #3 8015cf8: 3304 adds r3, #4 8015cfa: f104 0015 add.w r0, r4, #21 8015cfe: 4560 cmp r0, ip 8015d00: bf88 it hi 8015d02: 2304 movhi r3, #4 8015d04: 50ca str r2, [r1, r3] 8015d06: b10a cbz r2, 8015d0c <__lshift+0xa4> 8015d08: f108 0602 add.w r6, r8, #2 8015d0c: 3e01 subs r6, #1 8015d0e: 4638 mov r0, r7 8015d10: 4621 mov r1, r4 8015d12: 612e str r6, [r5, #16] 8015d14: f7ff fde2 bl 80158dc <_Bfree> 8015d18: 4628 mov r0, r5 8015d1a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8015d1e: f842 0f04 str.w r0, [r2, #4]! 8015d22: 3301 adds r3, #1 8015d24: e7c5 b.n 8015cb2 <__lshift+0x4a> 8015d26: 3904 subs r1, #4 8015d28: f853 2b04 ldr.w r2, [r3], #4 8015d2c: 459c cmp ip, r3 8015d2e: f841 2f04 str.w r2, [r1, #4]! 8015d32: d8f9 bhi.n 8015d28 <__lshift+0xc0> 8015d34: e7ea b.n 8015d0c <__lshift+0xa4> 8015d36: bf00 nop 8015d38: 08016e5c .word 0x08016e5c 8015d3c: 08016e7e .word 0x08016e7e 08015d40 <__mcmp>: 8015d40: 4603 mov r3, r0 8015d42: 690a ldr r2, [r1, #16] 8015d44: 6900 ldr r0, [r0, #16] 8015d46: b530 push {r4, r5, lr} 8015d48: 1a80 subs r0, r0, r2 8015d4a: d10e bne.n 8015d6a <__mcmp+0x2a> 8015d4c: 3314 adds r3, #20 8015d4e: 3114 adds r1, #20 8015d50: eb03 0482 add.w r4, r3, r2, lsl #2 8015d54: eb01 0182 add.w r1, r1, r2, lsl #2 8015d58: f854 5d04 ldr.w r5, [r4, #-4]! 8015d5c: f851 2d04 ldr.w r2, [r1, #-4]! 8015d60: 4295 cmp r5, r2 8015d62: d003 beq.n 8015d6c <__mcmp+0x2c> 8015d64: d205 bcs.n 8015d72 <__mcmp+0x32> 8015d66: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8015d6a: bd30 pop {r4, r5, pc} 8015d6c: 42a3 cmp r3, r4 8015d6e: d3f3 bcc.n 8015d58 <__mcmp+0x18> 8015d70: e7fb b.n 8015d6a <__mcmp+0x2a> 8015d72: 2001 movs r0, #1 8015d74: e7f9 b.n 8015d6a <__mcmp+0x2a> ... 08015d78 <__mdiff>: 8015d78: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8015d7c: 4689 mov r9, r1 8015d7e: 4606 mov r6, r0 8015d80: 4611 mov r1, r2 8015d82: 4648 mov r0, r9 8015d84: 4614 mov r4, r2 8015d86: f7ff ffdb bl 8015d40 <__mcmp> 8015d8a: 1e05 subs r5, r0, #0 8015d8c: d112 bne.n 8015db4 <__mdiff+0x3c> 8015d8e: 4629 mov r1, r5 8015d90: 4630 mov r0, r6 8015d92: f7ff fd63 bl 801585c <_Balloc> 8015d96: 4602 mov r2, r0 8015d98: b928 cbnz r0, 8015da6 <__mdiff+0x2e> 8015d9a: f240 2137 movw r1, #567 @ 0x237 8015d9e: 4b3e ldr r3, [pc, #248] @ (8015e98 <__mdiff+0x120>) 8015da0: 483e ldr r0, [pc, #248] @ (8015e9c <__mdiff+0x124>) 8015da2: f7fe faeb bl 801437c <__assert_func> 8015da6: 2301 movs r3, #1 8015da8: e9c0 3504 strd r3, r5, [r0, #16] 8015dac: 4610 mov r0, r2 8015dae: b003 add sp, #12 8015db0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8015db4: bfbc itt lt 8015db6: 464b movlt r3, r9 8015db8: 46a1 movlt r9, r4 8015dba: 4630 mov r0, r6 8015dbc: f8d9 1004 ldr.w r1, [r9, #4] 8015dc0: bfba itte lt 8015dc2: 461c movlt r4, r3 8015dc4: 2501 movlt r5, #1 8015dc6: 2500 movge r5, #0 8015dc8: f7ff fd48 bl 801585c <_Balloc> 8015dcc: 4602 mov r2, r0 8015dce: b918 cbnz r0, 8015dd8 <__mdiff+0x60> 8015dd0: f240 2145 movw r1, #581 @ 0x245 8015dd4: 4b30 ldr r3, [pc, #192] @ (8015e98 <__mdiff+0x120>) 8015dd6: e7e3 b.n 8015da0 <__mdiff+0x28> 8015dd8: f100 0b14 add.w fp, r0, #20 8015ddc: f8d9 7010 ldr.w r7, [r9, #16] 8015de0: f109 0310 add.w r3, r9, #16 8015de4: 60c5 str r5, [r0, #12] 8015de6: f04f 0c00 mov.w ip, #0 8015dea: f109 0514 add.w r5, r9, #20 8015dee: 46d9 mov r9, fp 8015df0: 6926 ldr r6, [r4, #16] 8015df2: f104 0e14 add.w lr, r4, #20 8015df6: eb05 0887 add.w r8, r5, r7, lsl #2 8015dfa: eb0e 0686 add.w r6, lr, r6, lsl #2 8015dfe: 9301 str r3, [sp, #4] 8015e00: 9b01 ldr r3, [sp, #4] 8015e02: f85e 0b04 ldr.w r0, [lr], #4 8015e06: f853 af04 ldr.w sl, [r3, #4]! 8015e0a: b281 uxth r1, r0 8015e0c: 9301 str r3, [sp, #4] 8015e0e: fa1f f38a uxth.w r3, sl 8015e12: 1a5b subs r3, r3, r1 8015e14: 0c00 lsrs r0, r0, #16 8015e16: 4463 add r3, ip 8015e18: ebc0 401a rsb r0, r0, sl, lsr #16 8015e1c: eb00 4023 add.w r0, r0, r3, asr #16 8015e20: b29b uxth r3, r3 8015e22: ea43 4300 orr.w r3, r3, r0, lsl #16 8015e26: 4576 cmp r6, lr 8015e28: ea4f 4c20 mov.w ip, r0, asr #16 8015e2c: f849 3b04 str.w r3, [r9], #4 8015e30: d8e6 bhi.n 8015e00 <__mdiff+0x88> 8015e32: 1b33 subs r3, r6, r4 8015e34: 3b15 subs r3, #21 8015e36: f023 0303 bic.w r3, r3, #3 8015e3a: 3415 adds r4, #21 8015e3c: 3304 adds r3, #4 8015e3e: 42a6 cmp r6, r4 8015e40: bf38 it cc 8015e42: 2304 movcc r3, #4 8015e44: 441d add r5, r3 8015e46: 445b add r3, fp 8015e48: 461e mov r6, r3 8015e4a: 462c mov r4, r5 8015e4c: 4544 cmp r4, r8 8015e4e: d30e bcc.n 8015e6e <__mdiff+0xf6> 8015e50: f108 0103 add.w r1, r8, #3 8015e54: 1b49 subs r1, r1, r5 8015e56: f021 0103 bic.w r1, r1, #3 8015e5a: 3d03 subs r5, #3 8015e5c: 45a8 cmp r8, r5 8015e5e: bf38 it cc 8015e60: 2100 movcc r1, #0 8015e62: 440b add r3, r1 8015e64: f853 1d04 ldr.w r1, [r3, #-4]! 8015e68: b199 cbz r1, 8015e92 <__mdiff+0x11a> 8015e6a: 6117 str r7, [r2, #16] 8015e6c: e79e b.n 8015dac <__mdiff+0x34> 8015e6e: 46e6 mov lr, ip 8015e70: f854 1b04 ldr.w r1, [r4], #4 8015e74: fa1f fc81 uxth.w ip, r1 8015e78: 44f4 add ip, lr 8015e7a: 0c08 lsrs r0, r1, #16 8015e7c: 4471 add r1, lr 8015e7e: eb00 402c add.w r0, r0, ip, asr #16 8015e82: b289 uxth r1, r1 8015e84: ea41 4100 orr.w r1, r1, r0, lsl #16 8015e88: ea4f 4c20 mov.w ip, r0, asr #16 8015e8c: f846 1b04 str.w r1, [r6], #4 8015e90: e7dc b.n 8015e4c <__mdiff+0xd4> 8015e92: 3f01 subs r7, #1 8015e94: e7e6 b.n 8015e64 <__mdiff+0xec> 8015e96: bf00 nop 8015e98: 08016e5c .word 0x08016e5c 8015e9c: 08016e7e .word 0x08016e7e 08015ea0 <__d2b>: 8015ea0: e92d 4373 stmdb sp!, {r0, r1, r4, r5, r6, r8, r9, lr} 8015ea4: 2101 movs r1, #1 8015ea6: 4690 mov r8, r2 8015ea8: 4699 mov r9, r3 8015eaa: 9e08 ldr r6, [sp, #32] 8015eac: f7ff fcd6 bl 801585c <_Balloc> 8015eb0: 4604 mov r4, r0 8015eb2: b930 cbnz r0, 8015ec2 <__d2b+0x22> 8015eb4: 4602 mov r2, r0 8015eb6: f240 310f movw r1, #783 @ 0x30f 8015eba: 4b23 ldr r3, [pc, #140] @ (8015f48 <__d2b+0xa8>) 8015ebc: 4823 ldr r0, [pc, #140] @ (8015f4c <__d2b+0xac>) 8015ebe: f7fe fa5d bl 801437c <__assert_func> 8015ec2: f3c9 550a ubfx r5, r9, #20, #11 8015ec6: f3c9 0313 ubfx r3, r9, #0, #20 8015eca: b10d cbz r5, 8015ed0 <__d2b+0x30> 8015ecc: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8015ed0: 9301 str r3, [sp, #4] 8015ed2: f1b8 0300 subs.w r3, r8, #0 8015ed6: d024 beq.n 8015f22 <__d2b+0x82> 8015ed8: 4668 mov r0, sp 8015eda: 9300 str r3, [sp, #0] 8015edc: f7ff fd85 bl 80159ea <__lo0bits> 8015ee0: e9dd 1200 ldrd r1, r2, [sp] 8015ee4: b1d8 cbz r0, 8015f1e <__d2b+0x7e> 8015ee6: f1c0 0320 rsb r3, r0, #32 8015eea: fa02 f303 lsl.w r3, r2, r3 8015eee: 430b orrs r3, r1 8015ef0: 40c2 lsrs r2, r0 8015ef2: 6163 str r3, [r4, #20] 8015ef4: 9201 str r2, [sp, #4] 8015ef6: 9b01 ldr r3, [sp, #4] 8015ef8: 2b00 cmp r3, #0 8015efa: bf0c ite eq 8015efc: 2201 moveq r2, #1 8015efe: 2202 movne r2, #2 8015f00: 61a3 str r3, [r4, #24] 8015f02: 6122 str r2, [r4, #16] 8015f04: b1ad cbz r5, 8015f32 <__d2b+0x92> 8015f06: f2a5 4533 subw r5, r5, #1075 @ 0x433 8015f0a: 4405 add r5, r0 8015f0c: 6035 str r5, [r6, #0] 8015f0e: f1c0 0035 rsb r0, r0, #53 @ 0x35 8015f12: 9b09 ldr r3, [sp, #36] @ 0x24 8015f14: 6018 str r0, [r3, #0] 8015f16: 4620 mov r0, r4 8015f18: b002 add sp, #8 8015f1a: e8bd 8370 ldmia.w sp!, {r4, r5, r6, r8, r9, pc} 8015f1e: 6161 str r1, [r4, #20] 8015f20: e7e9 b.n 8015ef6 <__d2b+0x56> 8015f22: a801 add r0, sp, #4 8015f24: f7ff fd61 bl 80159ea <__lo0bits> 8015f28: 9b01 ldr r3, [sp, #4] 8015f2a: 2201 movs r2, #1 8015f2c: 6163 str r3, [r4, #20] 8015f2e: 3020 adds r0, #32 8015f30: e7e7 b.n 8015f02 <__d2b+0x62> 8015f32: f2a0 4032 subw r0, r0, #1074 @ 0x432 8015f36: eb04 0382 add.w r3, r4, r2, lsl #2 8015f3a: 6030 str r0, [r6, #0] 8015f3c: 6918 ldr r0, [r3, #16] 8015f3e: f7ff fd35 bl 80159ac <__hi0bits> 8015f42: ebc0 1042 rsb r0, r0, r2, lsl #5 8015f46: e7e4 b.n 8015f12 <__d2b+0x72> 8015f48: 08016e5c .word 0x08016e5c 8015f4c: 08016e7e .word 0x08016e7e 08015f50 <__sread>: 8015f50: b510 push {r4, lr} 8015f52: 460c mov r4, r1 8015f54: f9b1 100e ldrsh.w r1, [r1, #14] 8015f58: f000 f9b0 bl 80162bc <_read_r> 8015f5c: 2800 cmp r0, #0 8015f5e: bfab itete ge 8015f60: 6d63 ldrge r3, [r4, #84] @ 0x54 8015f62: 89a3 ldrhlt r3, [r4, #12] 8015f64: 181b addge r3, r3, r0 8015f66: f423 5380 biclt.w r3, r3, #4096 @ 0x1000 8015f6a: bfac ite ge 8015f6c: 6563 strge r3, [r4, #84] @ 0x54 8015f6e: 81a3 strhlt r3, [r4, #12] 8015f70: bd10 pop {r4, pc} 08015f72 <__swrite>: 8015f72: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8015f76: 461f mov r7, r3 8015f78: 898b ldrh r3, [r1, #12] 8015f7a: 4605 mov r5, r0 8015f7c: 05db lsls r3, r3, #23 8015f7e: 460c mov r4, r1 8015f80: 4616 mov r6, r2 8015f82: d505 bpl.n 8015f90 <__swrite+0x1e> 8015f84: 2302 movs r3, #2 8015f86: 2200 movs r2, #0 8015f88: f9b1 100e ldrsh.w r1, [r1, #14] 8015f8c: f000 f984 bl 8016298 <_lseek_r> 8015f90: 89a3 ldrh r3, [r4, #12] 8015f92: 4632 mov r2, r6 8015f94: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8015f98: 81a3 strh r3, [r4, #12] 8015f9a: 4628 mov r0, r5 8015f9c: 463b mov r3, r7 8015f9e: f9b4 100e ldrsh.w r1, [r4, #14] 8015fa2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8015fa6: f000 b9ab b.w 8016300 <_write_r> 08015faa <__sseek>: 8015faa: b510 push {r4, lr} 8015fac: 460c mov r4, r1 8015fae: f9b1 100e ldrsh.w r1, [r1, #14] 8015fb2: f000 f971 bl 8016298 <_lseek_r> 8015fb6: 1c43 adds r3, r0, #1 8015fb8: 89a3 ldrh r3, [r4, #12] 8015fba: bf15 itete ne 8015fbc: 6560 strne r0, [r4, #84] @ 0x54 8015fbe: f423 5380 biceq.w r3, r3, #4096 @ 0x1000 8015fc2: f443 5380 orrne.w r3, r3, #4096 @ 0x1000 8015fc6: 81a3 strheq r3, [r4, #12] 8015fc8: bf18 it ne 8015fca: 81a3 strhne r3, [r4, #12] 8015fcc: bd10 pop {r4, pc} 08015fce <__sclose>: 8015fce: f9b1 100e ldrsh.w r1, [r1, #14] 8015fd2: f000 b9a7 b.w 8016324 <_close_r> ... 08015fd8 : 8015fd8: b40e push {r1, r2, r3} 8015fda: b503 push {r0, r1, lr} 8015fdc: 4601 mov r1, r0 8015fde: ab03 add r3, sp, #12 8015fe0: 4805 ldr r0, [pc, #20] @ (8015ff8 ) 8015fe2: f853 2b04 ldr.w r2, [r3], #4 8015fe6: 6800 ldr r0, [r0, #0] 8015fe8: 9301 str r3, [sp, #4] 8015fea: f7ff f9c1 bl 8015370 <_vfiprintf_r> 8015fee: b002 add sp, #8 8015ff0: f85d eb04 ldr.w lr, [sp], #4 8015ff4: b003 add sp, #12 8015ff6: 4770 bx lr 8015ff8: 20000090 .word 0x20000090 08015ffc <_realloc_r>: 8015ffc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8016000: 4607 mov r7, r0 8016002: 4614 mov r4, r2 8016004: 460d mov r5, r1 8016006: b921 cbnz r1, 8016012 <_realloc_r+0x16> 8016008: 4611 mov r1, r2 801600a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 801600e: f7ff baf1 b.w 80155f4 <_malloc_r> 8016012: b92a cbnz r2, 8016020 <_realloc_r+0x24> 8016014: f000 f9c4 bl 80163a0 <_free_r> 8016018: 4625 mov r5, r4 801601a: 4628 mov r0, r5 801601c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8016020: f000 fa18 bl 8016454 <_malloc_usable_size_r> 8016024: 4284 cmp r4, r0 8016026: 4606 mov r6, r0 8016028: d802 bhi.n 8016030 <_realloc_r+0x34> 801602a: ebb4 0f50 cmp.w r4, r0, lsr #1 801602e: d8f4 bhi.n 801601a <_realloc_r+0x1e> 8016030: 4621 mov r1, r4 8016032: 4638 mov r0, r7 8016034: f7ff fade bl 80155f4 <_malloc_r> 8016038: 4680 mov r8, r0 801603a: b908 cbnz r0, 8016040 <_realloc_r+0x44> 801603c: 4645 mov r5, r8 801603e: e7ec b.n 801601a <_realloc_r+0x1e> 8016040: 42b4 cmp r4, r6 8016042: 4622 mov r2, r4 8016044: 4629 mov r1, r5 8016046: bf28 it cs 8016048: 4632 movcs r2, r6 801604a: f7fe f989 bl 8014360 801604e: 4629 mov r1, r5 8016050: 4638 mov r0, r7 8016052: f000 f9a5 bl 80163a0 <_free_r> 8016056: e7f1 b.n 801603c <_realloc_r+0x40> 08016058 <__swbuf_r>: 8016058: b5f8 push {r3, r4, r5, r6, r7, lr} 801605a: 460e mov r6, r1 801605c: 4614 mov r4, r2 801605e: 4605 mov r5, r0 8016060: b118 cbz r0, 801606a <__swbuf_r+0x12> 8016062: 6a03 ldr r3, [r0, #32] 8016064: b90b cbnz r3, 801606a <__swbuf_r+0x12> 8016066: f7fd ffe9 bl 801403c <__sinit> 801606a: 69a3 ldr r3, [r4, #24] 801606c: 60a3 str r3, [r4, #8] 801606e: 89a3 ldrh r3, [r4, #12] 8016070: 071a lsls r2, r3, #28 8016072: d501 bpl.n 8016078 <__swbuf_r+0x20> 8016074: 6923 ldr r3, [r4, #16] 8016076: b943 cbnz r3, 801608a <__swbuf_r+0x32> 8016078: 4621 mov r1, r4 801607a: 4628 mov r0, r5 801607c: f000 f82a bl 80160d4 <__swsetup_r> 8016080: b118 cbz r0, 801608a <__swbuf_r+0x32> 8016082: f04f 37ff mov.w r7, #4294967295 @ 0xffffffff 8016086: 4638 mov r0, r7 8016088: bdf8 pop {r3, r4, r5, r6, r7, pc} 801608a: 6823 ldr r3, [r4, #0] 801608c: 6922 ldr r2, [r4, #16] 801608e: b2f6 uxtb r6, r6 8016090: 1a98 subs r0, r3, r2 8016092: 6963 ldr r3, [r4, #20] 8016094: 4637 mov r7, r6 8016096: 4283 cmp r3, r0 8016098: dc05 bgt.n 80160a6 <__swbuf_r+0x4e> 801609a: 4621 mov r1, r4 801609c: 4628 mov r0, r5 801609e: f7ff fba9 bl 80157f4 <_fflush_r> 80160a2: 2800 cmp r0, #0 80160a4: d1ed bne.n 8016082 <__swbuf_r+0x2a> 80160a6: 68a3 ldr r3, [r4, #8] 80160a8: 3b01 subs r3, #1 80160aa: 60a3 str r3, [r4, #8] 80160ac: 6823 ldr r3, [r4, #0] 80160ae: 1c5a adds r2, r3, #1 80160b0: 6022 str r2, [r4, #0] 80160b2: 701e strb r6, [r3, #0] 80160b4: 6962 ldr r2, [r4, #20] 80160b6: 1c43 adds r3, r0, #1 80160b8: 429a cmp r2, r3 80160ba: d004 beq.n 80160c6 <__swbuf_r+0x6e> 80160bc: 89a3 ldrh r3, [r4, #12] 80160be: 07db lsls r3, r3, #31 80160c0: d5e1 bpl.n 8016086 <__swbuf_r+0x2e> 80160c2: 2e0a cmp r6, #10 80160c4: d1df bne.n 8016086 <__swbuf_r+0x2e> 80160c6: 4621 mov r1, r4 80160c8: 4628 mov r0, r5 80160ca: f7ff fb93 bl 80157f4 <_fflush_r> 80160ce: 2800 cmp r0, #0 80160d0: d0d9 beq.n 8016086 <__swbuf_r+0x2e> 80160d2: e7d6 b.n 8016082 <__swbuf_r+0x2a> 080160d4 <__swsetup_r>: 80160d4: b538 push {r3, r4, r5, lr} 80160d6: 4b29 ldr r3, [pc, #164] @ (801617c <__swsetup_r+0xa8>) 80160d8: 4605 mov r5, r0 80160da: 6818 ldr r0, [r3, #0] 80160dc: 460c mov r4, r1 80160de: b118 cbz r0, 80160e8 <__swsetup_r+0x14> 80160e0: 6a03 ldr r3, [r0, #32] 80160e2: b90b cbnz r3, 80160e8 <__swsetup_r+0x14> 80160e4: f7fd ffaa bl 801403c <__sinit> 80160e8: f9b4 300c ldrsh.w r3, [r4, #12] 80160ec: 0719 lsls r1, r3, #28 80160ee: d422 bmi.n 8016136 <__swsetup_r+0x62> 80160f0: 06da lsls r2, r3, #27 80160f2: d407 bmi.n 8016104 <__swsetup_r+0x30> 80160f4: 2209 movs r2, #9 80160f6: 602a str r2, [r5, #0] 80160f8: f043 0340 orr.w r3, r3, #64 @ 0x40 80160fc: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8016100: 81a3 strh r3, [r4, #12] 8016102: e033 b.n 801616c <__swsetup_r+0x98> 8016104: 0758 lsls r0, r3, #29 8016106: d512 bpl.n 801612e <__swsetup_r+0x5a> 8016108: 6b61 ldr r1, [r4, #52] @ 0x34 801610a: b141 cbz r1, 801611e <__swsetup_r+0x4a> 801610c: f104 0344 add.w r3, r4, #68 @ 0x44 8016110: 4299 cmp r1, r3 8016112: d002 beq.n 801611a <__swsetup_r+0x46> 8016114: 4628 mov r0, r5 8016116: f000 f943 bl 80163a0 <_free_r> 801611a: 2300 movs r3, #0 801611c: 6363 str r3, [r4, #52] @ 0x34 801611e: 89a3 ldrh r3, [r4, #12] 8016120: f023 0324 bic.w r3, r3, #36 @ 0x24 8016124: 81a3 strh r3, [r4, #12] 8016126: 2300 movs r3, #0 8016128: 6063 str r3, [r4, #4] 801612a: 6923 ldr r3, [r4, #16] 801612c: 6023 str r3, [r4, #0] 801612e: 89a3 ldrh r3, [r4, #12] 8016130: f043 0308 orr.w r3, r3, #8 8016134: 81a3 strh r3, [r4, #12] 8016136: 6923 ldr r3, [r4, #16] 8016138: b94b cbnz r3, 801614e <__swsetup_r+0x7a> 801613a: 89a3 ldrh r3, [r4, #12] 801613c: f403 7320 and.w r3, r3, #640 @ 0x280 8016140: f5b3 7f00 cmp.w r3, #512 @ 0x200 8016144: d003 beq.n 801614e <__swsetup_r+0x7a> 8016146: 4621 mov r1, r4 8016148: 4628 mov r0, r5 801614a: f000 f83e bl 80161ca <__smakebuf_r> 801614e: f9b4 300c ldrsh.w r3, [r4, #12] 8016152: f013 0201 ands.w r2, r3, #1 8016156: d00a beq.n 801616e <__swsetup_r+0x9a> 8016158: 2200 movs r2, #0 801615a: 60a2 str r2, [r4, #8] 801615c: 6962 ldr r2, [r4, #20] 801615e: 4252 negs r2, r2 8016160: 61a2 str r2, [r4, #24] 8016162: 6922 ldr r2, [r4, #16] 8016164: b942 cbnz r2, 8016178 <__swsetup_r+0xa4> 8016166: f013 0080 ands.w r0, r3, #128 @ 0x80 801616a: d1c5 bne.n 80160f8 <__swsetup_r+0x24> 801616c: bd38 pop {r3, r4, r5, pc} 801616e: 0799 lsls r1, r3, #30 8016170: bf58 it pl 8016172: 6962 ldrpl r2, [r4, #20] 8016174: 60a2 str r2, [r4, #8] 8016176: e7f4 b.n 8016162 <__swsetup_r+0x8e> 8016178: 2000 movs r0, #0 801617a: e7f7 b.n 801616c <__swsetup_r+0x98> 801617c: 20000090 .word 0x20000090 08016180 <__swhatbuf_r>: 8016180: b570 push {r4, r5, r6, lr} 8016182: 460c mov r4, r1 8016184: f9b1 100e ldrsh.w r1, [r1, #14] 8016188: 4615 mov r5, r2 801618a: 2900 cmp r1, #0 801618c: 461e mov r6, r3 801618e: b096 sub sp, #88 @ 0x58 8016190: da0c bge.n 80161ac <__swhatbuf_r+0x2c> 8016192: 89a3 ldrh r3, [r4, #12] 8016194: 2100 movs r1, #0 8016196: f013 0f80 tst.w r3, #128 @ 0x80 801619a: bf14 ite ne 801619c: 2340 movne r3, #64 @ 0x40 801619e: f44f 6380 moveq.w r3, #1024 @ 0x400 80161a2: 2000 movs r0, #0 80161a4: 6031 str r1, [r6, #0] 80161a6: 602b str r3, [r5, #0] 80161a8: b016 add sp, #88 @ 0x58 80161aa: bd70 pop {r4, r5, r6, pc} 80161ac: 466a mov r2, sp 80161ae: f000 f8c9 bl 8016344 <_fstat_r> 80161b2: 2800 cmp r0, #0 80161b4: dbed blt.n 8016192 <__swhatbuf_r+0x12> 80161b6: 9901 ldr r1, [sp, #4] 80161b8: f401 4170 and.w r1, r1, #61440 @ 0xf000 80161bc: f5a1 5300 sub.w r3, r1, #8192 @ 0x2000 80161c0: 4259 negs r1, r3 80161c2: 4159 adcs r1, r3 80161c4: f44f 6380 mov.w r3, #1024 @ 0x400 80161c8: e7eb b.n 80161a2 <__swhatbuf_r+0x22> 080161ca <__smakebuf_r>: 80161ca: 898b ldrh r3, [r1, #12] 80161cc: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 80161ce: 079d lsls r5, r3, #30 80161d0: 4606 mov r6, r0 80161d2: 460c mov r4, r1 80161d4: d507 bpl.n 80161e6 <__smakebuf_r+0x1c> 80161d6: f104 0347 add.w r3, r4, #71 @ 0x47 80161da: 6023 str r3, [r4, #0] 80161dc: 6123 str r3, [r4, #16] 80161de: 2301 movs r3, #1 80161e0: 6163 str r3, [r4, #20] 80161e2: b003 add sp, #12 80161e4: bdf0 pop {r4, r5, r6, r7, pc} 80161e6: 466a mov r2, sp 80161e8: ab01 add r3, sp, #4 80161ea: f7ff ffc9 bl 8016180 <__swhatbuf_r> 80161ee: 9f00 ldr r7, [sp, #0] 80161f0: 4605 mov r5, r0 80161f2: 4639 mov r1, r7 80161f4: 4630 mov r0, r6 80161f6: f7ff f9fd bl 80155f4 <_malloc_r> 80161fa: b948 cbnz r0, 8016210 <__smakebuf_r+0x46> 80161fc: f9b4 300c ldrsh.w r3, [r4, #12] 8016200: 059a lsls r2, r3, #22 8016202: d4ee bmi.n 80161e2 <__smakebuf_r+0x18> 8016204: f023 0303 bic.w r3, r3, #3 8016208: f043 0302 orr.w r3, r3, #2 801620c: 81a3 strh r3, [r4, #12] 801620e: e7e2 b.n 80161d6 <__smakebuf_r+0xc> 8016210: 89a3 ldrh r3, [r4, #12] 8016212: e9c4 0704 strd r0, r7, [r4, #16] 8016216: f043 0380 orr.w r3, r3, #128 @ 0x80 801621a: 81a3 strh r3, [r4, #12] 801621c: 9b01 ldr r3, [sp, #4] 801621e: 6020 str r0, [r4, #0] 8016220: b15b cbz r3, 801623a <__smakebuf_r+0x70> 8016222: 4630 mov r0, r6 8016224: f9b4 100e ldrsh.w r1, [r4, #14] 8016228: f000 f826 bl 8016278 <_isatty_r> 801622c: b128 cbz r0, 801623a <__smakebuf_r+0x70> 801622e: 89a3 ldrh r3, [r4, #12] 8016230: f023 0303 bic.w r3, r3, #3 8016234: f043 0301 orr.w r3, r3, #1 8016238: 81a3 strh r3, [r4, #12] 801623a: 89a3 ldrh r3, [r4, #12] 801623c: 431d orrs r5, r3 801623e: 81a5 strh r5, [r4, #12] 8016240: e7cf b.n 80161e2 <__smakebuf_r+0x18> 08016242 : 8016242: 4288 cmp r0, r1 8016244: b510 push {r4, lr} 8016246: eb01 0402 add.w r4, r1, r2 801624a: d902 bls.n 8016252 801624c: 4284 cmp r4, r0 801624e: 4623 mov r3, r4 8016250: d807 bhi.n 8016262 8016252: 1e43 subs r3, r0, #1 8016254: 42a1 cmp r1, r4 8016256: d008 beq.n 801626a 8016258: f811 2b01 ldrb.w r2, [r1], #1 801625c: f803 2f01 strb.w r2, [r3, #1]! 8016260: e7f8 b.n 8016254 8016262: 4601 mov r1, r0 8016264: 4402 add r2, r0 8016266: 428a cmp r2, r1 8016268: d100 bne.n 801626c 801626a: bd10 pop {r4, pc} 801626c: f813 4d01 ldrb.w r4, [r3, #-1]! 8016270: f802 4d01 strb.w r4, [r2, #-1]! 8016274: e7f7 b.n 8016266 ... 08016278 <_isatty_r>: 8016278: b538 push {r3, r4, r5, lr} 801627a: 2300 movs r3, #0 801627c: 4d05 ldr r5, [pc, #20] @ (8016294 <_isatty_r+0x1c>) 801627e: 4604 mov r4, r0 8016280: 4608 mov r0, r1 8016282: 602b str r3, [r5, #0] 8016284: f7f7 ff49 bl 800e11a <_isatty> 8016288: 1c43 adds r3, r0, #1 801628a: d102 bne.n 8016292 <_isatty_r+0x1a> 801628c: 682b ldr r3, [r5, #0] 801628e: b103 cbz r3, 8016292 <_isatty_r+0x1a> 8016290: 6023 str r3, [r4, #0] 8016292: bd38 pop {r3, r4, r5, pc} 8016294: 200011d0 .word 0x200011d0 08016298 <_lseek_r>: 8016298: b538 push {r3, r4, r5, lr} 801629a: 4604 mov r4, r0 801629c: 4608 mov r0, r1 801629e: 4611 mov r1, r2 80162a0: 2200 movs r2, #0 80162a2: 4d05 ldr r5, [pc, #20] @ (80162b8 <_lseek_r+0x20>) 80162a4: 602a str r2, [r5, #0] 80162a6: 461a mov r2, r3 80162a8: f7f7 ff41 bl 800e12e <_lseek> 80162ac: 1c43 adds r3, r0, #1 80162ae: d102 bne.n 80162b6 <_lseek_r+0x1e> 80162b0: 682b ldr r3, [r5, #0] 80162b2: b103 cbz r3, 80162b6 <_lseek_r+0x1e> 80162b4: 6023 str r3, [r4, #0] 80162b6: bd38 pop {r3, r4, r5, pc} 80162b8: 200011d0 .word 0x200011d0 080162bc <_read_r>: 80162bc: b538 push {r3, r4, r5, lr} 80162be: 4604 mov r4, r0 80162c0: 4608 mov r0, r1 80162c2: 4611 mov r1, r2 80162c4: 2200 movs r2, #0 80162c6: 4d05 ldr r5, [pc, #20] @ (80162dc <_read_r+0x20>) 80162c8: 602a str r2, [r5, #0] 80162ca: 461a mov r2, r3 80162cc: f7f7 feee bl 800e0ac <_read> 80162d0: 1c43 adds r3, r0, #1 80162d2: d102 bne.n 80162da <_read_r+0x1e> 80162d4: 682b ldr r3, [r5, #0] 80162d6: b103 cbz r3, 80162da <_read_r+0x1e> 80162d8: 6023 str r3, [r4, #0] 80162da: bd38 pop {r3, r4, r5, pc} 80162dc: 200011d0 .word 0x200011d0 080162e0 <_sbrk_r>: 80162e0: b538 push {r3, r4, r5, lr} 80162e2: 2300 movs r3, #0 80162e4: 4d05 ldr r5, [pc, #20] @ (80162fc <_sbrk_r+0x1c>) 80162e6: 4604 mov r4, r0 80162e8: 4608 mov r0, r1 80162ea: 602b str r3, [r5, #0] 80162ec: f7f7 ff2c bl 800e148 <_sbrk> 80162f0: 1c43 adds r3, r0, #1 80162f2: d102 bne.n 80162fa <_sbrk_r+0x1a> 80162f4: 682b ldr r3, [r5, #0] 80162f6: b103 cbz r3, 80162fa <_sbrk_r+0x1a> 80162f8: 6023 str r3, [r4, #0] 80162fa: bd38 pop {r3, r4, r5, pc} 80162fc: 200011d0 .word 0x200011d0 08016300 <_write_r>: 8016300: b538 push {r3, r4, r5, lr} 8016302: 4604 mov r4, r0 8016304: 4608 mov r0, r1 8016306: 4611 mov r1, r2 8016308: 2200 movs r2, #0 801630a: 4d05 ldr r5, [pc, #20] @ (8016320 <_write_r+0x20>) 801630c: 602a str r2, [r5, #0] 801630e: 461a mov r2, r3 8016310: f7f5 f81a bl 800b348 <_write> 8016314: 1c43 adds r3, r0, #1 8016316: d102 bne.n 801631e <_write_r+0x1e> 8016318: 682b ldr r3, [r5, #0] 801631a: b103 cbz r3, 801631e <_write_r+0x1e> 801631c: 6023 str r3, [r4, #0] 801631e: bd38 pop {r3, r4, r5, pc} 8016320: 200011d0 .word 0x200011d0 08016324 <_close_r>: 8016324: b538 push {r3, r4, r5, lr} 8016326: 2300 movs r3, #0 8016328: 4d05 ldr r5, [pc, #20] @ (8016340 <_close_r+0x1c>) 801632a: 4604 mov r4, r0 801632c: 4608 mov r0, r1 801632e: 602b str r3, [r5, #0] 8016330: f7f7 fed9 bl 800e0e6 <_close> 8016334: 1c43 adds r3, r0, #1 8016336: d102 bne.n 801633e <_close_r+0x1a> 8016338: 682b ldr r3, [r5, #0] 801633a: b103 cbz r3, 801633e <_close_r+0x1a> 801633c: 6023 str r3, [r4, #0] 801633e: bd38 pop {r3, r4, r5, pc} 8016340: 200011d0 .word 0x200011d0 08016344 <_fstat_r>: 8016344: b538 push {r3, r4, r5, lr} 8016346: 2300 movs r3, #0 8016348: 4d06 ldr r5, [pc, #24] @ (8016364 <_fstat_r+0x20>) 801634a: 4604 mov r4, r0 801634c: 4608 mov r0, r1 801634e: 4611 mov r1, r2 8016350: 602b str r3, [r5, #0] 8016352: f7f7 fed3 bl 800e0fc <_fstat> 8016356: 1c43 adds r3, r0, #1 8016358: d102 bne.n 8016360 <_fstat_r+0x1c> 801635a: 682b ldr r3, [r5, #0] 801635c: b103 cbz r3, 8016360 <_fstat_r+0x1c> 801635e: 6023 str r3, [r4, #0] 8016360: bd38 pop {r3, r4, r5, pc} 8016362: bf00 nop 8016364: 200011d0 .word 0x200011d0 08016368 : 8016368: 2006 movs r0, #6 801636a: b508 push {r3, lr} 801636c: f000 f8b0 bl 80164d0 8016370: 2001 movs r0, #1 8016372: f7f7 fe90 bl 800e096 <_exit> 08016376 <_calloc_r>: 8016376: b570 push {r4, r5, r6, lr} 8016378: fba1 5402 umull r5, r4, r1, r2 801637c: b934 cbnz r4, 801638c <_calloc_r+0x16> 801637e: 4629 mov r1, r5 8016380: f7ff f938 bl 80155f4 <_malloc_r> 8016384: 4606 mov r6, r0 8016386: b928 cbnz r0, 8016394 <_calloc_r+0x1e> 8016388: 4630 mov r0, r6 801638a: bd70 pop {r4, r5, r6, pc} 801638c: 220c movs r2, #12 801638e: 2600 movs r6, #0 8016390: 6002 str r2, [r0, #0] 8016392: e7f9 b.n 8016388 <_calloc_r+0x12> 8016394: 462a mov r2, r5 8016396: 4621 mov r1, r4 8016398: f7fd fed4 bl 8014144 801639c: e7f4 b.n 8016388 <_calloc_r+0x12> ... 080163a0 <_free_r>: 80163a0: b538 push {r3, r4, r5, lr} 80163a2: 4605 mov r5, r0 80163a4: 2900 cmp r1, #0 80163a6: d040 beq.n 801642a <_free_r+0x8a> 80163a8: f851 3c04 ldr.w r3, [r1, #-4] 80163ac: 1f0c subs r4, r1, #4 80163ae: 2b00 cmp r3, #0 80163b0: bfb8 it lt 80163b2: 18e4 addlt r4, r4, r3 80163b4: f7ff fa46 bl 8015844 <__malloc_lock> 80163b8: 4a1c ldr r2, [pc, #112] @ (801642c <_free_r+0x8c>) 80163ba: 6813 ldr r3, [r2, #0] 80163bc: b933 cbnz r3, 80163cc <_free_r+0x2c> 80163be: 6063 str r3, [r4, #4] 80163c0: 6014 str r4, [r2, #0] 80163c2: 4628 mov r0, r5 80163c4: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80163c8: f7ff ba42 b.w 8015850 <__malloc_unlock> 80163cc: 42a3 cmp r3, r4 80163ce: d908 bls.n 80163e2 <_free_r+0x42> 80163d0: 6820 ldr r0, [r4, #0] 80163d2: 1821 adds r1, r4, r0 80163d4: 428b cmp r3, r1 80163d6: bf01 itttt eq 80163d8: 6819 ldreq r1, [r3, #0] 80163da: 685b ldreq r3, [r3, #4] 80163dc: 1809 addeq r1, r1, r0 80163de: 6021 streq r1, [r4, #0] 80163e0: e7ed b.n 80163be <_free_r+0x1e> 80163e2: 461a mov r2, r3 80163e4: 685b ldr r3, [r3, #4] 80163e6: b10b cbz r3, 80163ec <_free_r+0x4c> 80163e8: 42a3 cmp r3, r4 80163ea: d9fa bls.n 80163e2 <_free_r+0x42> 80163ec: 6811 ldr r1, [r2, #0] 80163ee: 1850 adds r0, r2, r1 80163f0: 42a0 cmp r0, r4 80163f2: d10b bne.n 801640c <_free_r+0x6c> 80163f4: 6820 ldr r0, [r4, #0] 80163f6: 4401 add r1, r0 80163f8: 1850 adds r0, r2, r1 80163fa: 4283 cmp r3, r0 80163fc: 6011 str r1, [r2, #0] 80163fe: d1e0 bne.n 80163c2 <_free_r+0x22> 8016400: 6818 ldr r0, [r3, #0] 8016402: 685b ldr r3, [r3, #4] 8016404: 4408 add r0, r1 8016406: 6010 str r0, [r2, #0] 8016408: 6053 str r3, [r2, #4] 801640a: e7da b.n 80163c2 <_free_r+0x22> 801640c: d902 bls.n 8016414 <_free_r+0x74> 801640e: 230c movs r3, #12 8016410: 602b str r3, [r5, #0] 8016412: e7d6 b.n 80163c2 <_free_r+0x22> 8016414: 6820 ldr r0, [r4, #0] 8016416: 1821 adds r1, r4, r0 8016418: 428b cmp r3, r1 801641a: bf01 itttt eq 801641c: 6819 ldreq r1, [r3, #0] 801641e: 685b ldreq r3, [r3, #4] 8016420: 1809 addeq r1, r1, r0 8016422: 6021 streq r1, [r4, #0] 8016424: 6063 str r3, [r4, #4] 8016426: 6054 str r4, [r2, #4] 8016428: e7cb b.n 80163c2 <_free_r+0x22> 801642a: bd38 pop {r3, r4, r5, pc} 801642c: 200011cc .word 0x200011cc 08016430 <__ascii_mbtowc>: 8016430: b082 sub sp, #8 8016432: b901 cbnz r1, 8016436 <__ascii_mbtowc+0x6> 8016434: a901 add r1, sp, #4 8016436: b142 cbz r2, 801644a <__ascii_mbtowc+0x1a> 8016438: b14b cbz r3, 801644e <__ascii_mbtowc+0x1e> 801643a: 7813 ldrb r3, [r2, #0] 801643c: 600b str r3, [r1, #0] 801643e: 7812 ldrb r2, [r2, #0] 8016440: 1e10 subs r0, r2, #0 8016442: bf18 it ne 8016444: 2001 movne r0, #1 8016446: b002 add sp, #8 8016448: 4770 bx lr 801644a: 4610 mov r0, r2 801644c: e7fb b.n 8016446 <__ascii_mbtowc+0x16> 801644e: f06f 0001 mvn.w r0, #1 8016452: e7f8 b.n 8016446 <__ascii_mbtowc+0x16> 08016454 <_malloc_usable_size_r>: 8016454: f851 3c04 ldr.w r3, [r1, #-4] 8016458: 1f18 subs r0, r3, #4 801645a: 2b00 cmp r3, #0 801645c: bfbc itt lt 801645e: 580b ldrlt r3, [r1, r0] 8016460: 18c0 addlt r0, r0, r3 8016462: 4770 bx lr 08016464 <__ascii_wctomb>: 8016464: 4603 mov r3, r0 8016466: 4608 mov r0, r1 8016468: b141 cbz r1, 801647c <__ascii_wctomb+0x18> 801646a: 2aff cmp r2, #255 @ 0xff 801646c: d904 bls.n 8016478 <__ascii_wctomb+0x14> 801646e: 228a movs r2, #138 @ 0x8a 8016470: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8016474: 601a str r2, [r3, #0] 8016476: 4770 bx lr 8016478: 2001 movs r0, #1 801647a: 700a strb r2, [r1, #0] 801647c: 4770 bx lr 0801647e <_raise_r>: 801647e: 291f cmp r1, #31 8016480: b538 push {r3, r4, r5, lr} 8016482: 4605 mov r5, r0 8016484: 460c mov r4, r1 8016486: d904 bls.n 8016492 <_raise_r+0x14> 8016488: 2316 movs r3, #22 801648a: 6003 str r3, [r0, #0] 801648c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8016490: bd38 pop {r3, r4, r5, pc} 8016492: 6bc2 ldr r2, [r0, #60] @ 0x3c 8016494: b112 cbz r2, 801649c <_raise_r+0x1e> 8016496: f852 3021 ldr.w r3, [r2, r1, lsl #2] 801649a: b94b cbnz r3, 80164b0 <_raise_r+0x32> 801649c: 4628 mov r0, r5 801649e: f000 f831 bl 8016504 <_getpid_r> 80164a2: 4622 mov r2, r4 80164a4: 4601 mov r1, r0 80164a6: 4628 mov r0, r5 80164a8: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80164ac: f000 b818 b.w 80164e0 <_kill_r> 80164b0: 2b01 cmp r3, #1 80164b2: d00a beq.n 80164ca <_raise_r+0x4c> 80164b4: 1c59 adds r1, r3, #1 80164b6: d103 bne.n 80164c0 <_raise_r+0x42> 80164b8: 2316 movs r3, #22 80164ba: 6003 str r3, [r0, #0] 80164bc: 2001 movs r0, #1 80164be: e7e7 b.n 8016490 <_raise_r+0x12> 80164c0: 2100 movs r1, #0 80164c2: 4620 mov r0, r4 80164c4: f842 1024 str.w r1, [r2, r4, lsl #2] 80164c8: 4798 blx r3 80164ca: 2000 movs r0, #0 80164cc: e7e0 b.n 8016490 <_raise_r+0x12> ... 080164d0 : 80164d0: 4b02 ldr r3, [pc, #8] @ (80164dc ) 80164d2: 4601 mov r1, r0 80164d4: 6818 ldr r0, [r3, #0] 80164d6: f7ff bfd2 b.w 801647e <_raise_r> 80164da: bf00 nop 80164dc: 20000090 .word 0x20000090 080164e0 <_kill_r>: 80164e0: b538 push {r3, r4, r5, lr} 80164e2: 2300 movs r3, #0 80164e4: 4d06 ldr r5, [pc, #24] @ (8016500 <_kill_r+0x20>) 80164e6: 4604 mov r4, r0 80164e8: 4608 mov r0, r1 80164ea: 4611 mov r1, r2 80164ec: 602b str r3, [r5, #0] 80164ee: f7f7 fdc2 bl 800e076 <_kill> 80164f2: 1c43 adds r3, r0, #1 80164f4: d102 bne.n 80164fc <_kill_r+0x1c> 80164f6: 682b ldr r3, [r5, #0] 80164f8: b103 cbz r3, 80164fc <_kill_r+0x1c> 80164fa: 6023 str r3, [r4, #0] 80164fc: bd38 pop {r3, r4, r5, pc} 80164fe: bf00 nop 8016500: 200011d0 .word 0x200011d0 08016504 <_getpid_r>: 8016504: f7f7 bdb0 b.w 800e068 <_getpid> 08016508 <_init>: 8016508: b5f8 push {r3, r4, r5, r6, r7, lr} 801650a: bf00 nop 801650c: bcf8 pop {r3, r4, r5, r6, r7} 801650e: bc08 pop {r3} 8016510: 469e mov lr, r3 8016512: 4770 bx lr 08016514 <_fini>: 8016514: b5f8 push {r3, r4, r5, r6, r7, lr} 8016516: bf00 nop 8016518: bcf8 pop {r3, r4, r5, r6, r7} 801651a: bc08 pop {r3} 801651c: 469e mov lr, r3 801651e: 4770 bx lr