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almost done dma

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This commit is contained in:
init.bin
2026-05-07 16:03:01 +03:00
parent ea8663e247
commit 1be17330fa
22 changed files with 27943 additions and 26697 deletions
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CCSModuleSW30Web.ioc
+55 -11
View File
@@ -54,10 +54,50 @@ Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
Dma.ADC1.0.Mode=DMA_CIRCULAR
Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
Dma.ADC1.0.Priority=DMA_PRIORITY_HIGH
Dma.ADC1.0.Priority=DMA_PRIORITY_MEDIUM
Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.Request0=ADC1
Dma.RequestsNb=1
Dma.Request1=USART2_RX
Dma.Request2=USART2_TX
Dma.Request3=USART3_RX
Dma.Request4=USART3_TX
Dma.RequestsNb=5
Dma.USART2_RX.1.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART2_RX.1.Instance=DMA1_Channel6
Dma.USART2_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_RX.1.MemInc=DMA_MINC_ENABLE
Dma.USART2_RX.1.Mode=DMA_NORMAL
Dma.USART2_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_RX.1.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_RX.1.Priority=DMA_PRIORITY_VERY_HIGH
Dma.USART2_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.USART2_TX.2.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART2_TX.2.Instance=DMA1_Channel7
Dma.USART2_TX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_TX.2.MemInc=DMA_MINC_ENABLE
Dma.USART2_TX.2.Mode=DMA_NORMAL
Dma.USART2_TX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_TX.2.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_TX.2.Priority=DMA_PRIORITY_HIGH
Dma.USART2_TX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.USART3_RX.3.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART3_RX.3.Instance=DMA1_Channel3
Dma.USART3_RX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_RX.3.MemInc=DMA_MINC_ENABLE
Dma.USART3_RX.3.Mode=DMA_NORMAL
Dma.USART3_RX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_RX.3.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_RX.3.Priority=DMA_PRIORITY_VERY_HIGH
Dma.USART3_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.USART3_TX.4.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART3_TX.4.Instance=DMA1_Channel2
Dma.USART3_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_TX.4.MemInc=DMA_MINC_ENABLE
Dma.USART3_TX.4.Mode=DMA_NORMAL
Dma.USART3_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_TX.4.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_TX.4.Priority=DMA_PRIORITY_HIGH
Dma.USART3_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
File.Version=6
GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
@@ -148,12 +188,16 @@ Mcu.UserConstants=
Mcu.UserName=STM32F107VCTx
MxCube.Version=6.15.0
MxDb.Version=DB.6.0.150
NVIC.ADC1_2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.ADC1_2_IRQn=true\:7\:0\:true\:false\:true\:true\:true\:true
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.CAN1_RX0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.CAN2_RX1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.CAN1_RX0_IRQn=true\:3\:0\:true\:false\:true\:true\:true\:true
NVIC.CAN2_RX1_IRQn=true\:3\:0\:true\:false\:true\:true\:true\:true
NVIC.CAN2_TX_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA1_Channel1_IRQn=true\:1\:0\:true\:false\:true\:false\:true\:true
NVIC.DMA1_Channel2_IRQn=true\:4\:0\:true\:false\:true\:false\:true\:true
NVIC.DMA1_Channel3_IRQn=true\:1\:0\:true\:false\:true\:false\:true\:true
NVIC.DMA1_Channel6_IRQn=true\:1\:0\:true\:false\:true\:false\:true\:true
NVIC.DMA1_Channel7_IRQn=true\:4\:0\:true\:false\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -163,11 +207,11 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
NVIC.TIM3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.UART5_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.TIM3_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
NVIC.UART5_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
NVIC.USART1_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
NVIC.USART2_IRQn=true\:2\:0\:true\:false\:true\:true\:true\:true
NVIC.USART3_IRQn=true\:2\:0\:true\:false\:true\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
OSC_IN.Mode=HSE-External-Oscillator
OSC_IN.Signal=RCC_OSC_IN
Core/Inc/adc.h
+63 -63
View File
@@ -1,63 +1,63 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file adc.h
* @brief This file contains all the function prototypes for
* the adc.c file
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __ADC_H__
#define __ADC_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
#include <stdint.h>
/* USER CODE END Includes */
extern ADC_HandleTypeDef hadc1;
/* USER CODE BEGIN Private defines */
typedef struct {
uint16_t in3_raw; /* Rank1: ADC_CHANNEL_3 */
uint16_t cp_raw; /* Rank2: ADC_CHANNEL_4 */
uint16_t ntc1_raw; /* Rank3: ADC_CHANNEL_8 */
uint16_t ntc2_raw; /* Rank4: ADC_CHANNEL_9 */
uint16_t temp_sensor_raw; /* Rank5: ADC_CHANNEL_TEMPSENSOR */
uint16_t vrefint_raw; /* Rank6: ADC_CHANNEL_VREFINT */
} ADC_ScanData_t;
extern volatile ADC_ScanData_t adc_data;
/* USER CODE END Private defines */
void MX_ADC1_Init(void);
/* USER CODE BEGIN Prototypes */
void ADC_ScanStart(void);
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __ADC_H__ */
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file adc.h
* @brief This file contains all the function prototypes for
* the adc.c file
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __ADC_H__
#define __ADC_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
#include <stdint.h>
/* USER CODE END Includes */
extern ADC_HandleTypeDef hadc1;
/* USER CODE BEGIN Private defines */
typedef struct {
uint16_t in3_raw; /* Rank1: ADC_CHANNEL_3 */
uint16_t cp_raw; /* Rank2: ADC_CHANNEL_4 */
uint16_t ntc1_raw; /* Rank3: ADC_CHANNEL_8 */
uint16_t ntc2_raw; /* Rank4: ADC_CHANNEL_9 */
uint16_t temp_sensor_raw; /* Rank5: ADC_CHANNEL_TEMPSENSOR */
uint16_t vrefint_raw; /* Rank6: ADC_CHANNEL_VREFINT */
} ADC_ScanData_t;
extern volatile ADC_ScanData_t adc_data;
/* USER CODE END Private defines */
void MX_ADC1_Init(void);
/* USER CODE BEGIN Prototypes */
void ADC_ScanStart(void);
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __ADC_H__ */
Core/Inc/serial.h
+1
View File
@@ -11,6 +11,7 @@ void CCS_Init(void);
void CCS_SendEmergencyStop(void);
void CCS_SendStart(void);
void CCS_RxEventCallback(UART_HandleTypeDef *huart, uint16_t size);
void CCS_TxCpltCallback(UART_HandleTypeDef *huart);
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
typedef enum {
Core/Inc/serial_control.h
+1
View File
@@ -170,6 +170,7 @@ struct SerialControl_t {
void SC_Init();
void SC_Task();
ISR_FAST void SC_SendPacket(const uint8_t* payload, uint16_t payload_len, uint8_t response_code);
void SC_RecoverUartDma(UART_HandleTypeDef *huart);
// Внешняя функция обработки команд (определена в serial_handler.c)
extern void SC_CommandHandler(ReceivedCommand_t* cmd);
Core/Inc/stm32f1xx_it.h
+4
View File
@@ -56,6 +56,10 @@ void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void DMA1_Channel1_IRQHandler(void);
void DMA1_Channel2_IRQHandler(void);
void DMA1_Channel3_IRQHandler(void);
void DMA1_Channel6_IRQHandler(void);
void DMA1_Channel7_IRQHandler(void);
void ADC1_2_IRQHandler(void);
void CAN1_RX0_IRQHandler(void);
void TIM3_IRQHandler(void);
Core/Src/adc.c
+234 -234
View File
@@ -1,234 +1,234 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file adc.c
* @brief This file provides code for the configuration
* of the ADC instances.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "adc.h"
/* USER CODE BEGIN 0 */
#include "isr_opt.h"
static volatile uint16_t adc_dma_raw[6];
volatile ADC_ScanData_t adc_data = {0};
static volatile uint8_t adc_scan_data_ready = 0u;
void ADC_ScanStart(void)
{
if (HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_raw, 6u) != HAL_OK)
{
Error_Handler();
}
}
ISR_FAST void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
{
if (hadc->Instance != ADC1)
{
return;
}
adc_data.in3_raw = adc_dma_raw[0];
adc_data.cp_raw = adc_dma_raw[1];
adc_data.ntc1_raw = adc_dma_raw[2];
adc_data.ntc2_raw = adc_dma_raw[3];
adc_data.temp_sensor_raw = adc_dma_raw[4];
adc_data.vrefint_raw = adc_dma_raw[5];
adc_scan_data_ready = 1u;
}
/* USER CODE END 0 */
ADC_HandleTypeDef hadc1;
DMA_HandleTypeDef hdma_adc1;
/* ADC1 init function */
void MX_ADC1_Init(void)
{
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
hadc1.Init.ContinuousConvMode = DISABLE;
hadc1.Init.DiscontinuousConvMode = DISABLE;
hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T3_TRGO;
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc1.Init.NbrOfConversion = 6;
if (HAL_ADC_Init(&hadc1) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_3;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_41CYCLES_5;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
sConfig.Rank = ADC_REGULAR_RANK_2;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
sConfig.Rank = ADC_REGULAR_RANK_3;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_9;
sConfig.Rank = ADC_REGULAR_RANK_4;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_TEMPSENSOR;
sConfig.Rank = ADC_REGULAR_RANK_5;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_VREFINT;
sConfig.Rank = ADC_REGULAR_RANK_6;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(adcHandle->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* ADC1 clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**ADC1 GPIO Configuration
PA3 ------> ADC1_IN3
PA4 ------> ADC1_IN4
PB0 ------> ADC1_IN8
PB1 ------> ADC1_IN9
*/
GPIO_InitStruct.Pin = GPIO_PIN_3|CP_ADC_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = ADC_NTC1_Pin|ADC_NTC2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_adc1.Init.Mode = DMA_CIRCULAR;
hdma_adc1.Init.Priority = DMA_PRIORITY_HIGH;
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
/* ADC1 interrupt Init */
HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
}
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
{
if(adcHandle->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspDeInit 0 */
/* USER CODE END ADC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ADC1_CLK_DISABLE();
/**ADC1 GPIO Configuration
PA3 ------> ADC1_IN3
PA4 ------> ADC1_IN4
PB0 ------> ADC1_IN8
PB1 ------> ADC1_IN9
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3|CP_ADC_Pin);
HAL_GPIO_DeInit(GPIOB, ADC_NTC1_Pin|ADC_NTC2_Pin);
/* ADC1 DMA DeInit */
HAL_DMA_DeInit(adcHandle->DMA_Handle);
/* ADC1 interrupt Deinit */
HAL_NVIC_DisableIRQ(ADC1_2_IRQn);
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file adc.c
* @brief This file provides code for the configuration
* of the ADC instances.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "adc.h"
/* USER CODE BEGIN 0 */
#include "isr_opt.h"
static volatile uint16_t adc_dma_raw[6];
volatile ADC_ScanData_t adc_data = {0};
static volatile uint8_t adc_scan_data_ready = 0u;
void ADC_ScanStart(void)
{
if (HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_raw, 6u) != HAL_OK)
{
Error_Handler();
}
}
ISR_FAST void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
{
if (hadc->Instance != ADC1)
{
return;
}
adc_data.in3_raw = adc_dma_raw[0];
adc_data.cp_raw = adc_dma_raw[1];
adc_data.ntc1_raw = adc_dma_raw[2];
adc_data.ntc2_raw = adc_dma_raw[3];
adc_data.temp_sensor_raw = adc_dma_raw[4];
adc_data.vrefint_raw = adc_dma_raw[5];
adc_scan_data_ready = 1u;
}
/* USER CODE END 0 */
ADC_HandleTypeDef hadc1;
DMA_HandleTypeDef hdma_adc1;
/* ADC1 init function */
void MX_ADC1_Init(void)
{
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
hadc1.Init.ContinuousConvMode = DISABLE;
hadc1.Init.DiscontinuousConvMode = DISABLE;
hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T3_TRGO;
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc1.Init.NbrOfConversion = 6;
if (HAL_ADC_Init(&hadc1) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_3;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_41CYCLES_5;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
sConfig.Rank = ADC_REGULAR_RANK_2;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
sConfig.Rank = ADC_REGULAR_RANK_3;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_9;
sConfig.Rank = ADC_REGULAR_RANK_4;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_TEMPSENSOR;
sConfig.Rank = ADC_REGULAR_RANK_5;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_VREFINT;
sConfig.Rank = ADC_REGULAR_RANK_6;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(adcHandle->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* ADC1 clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**ADC1 GPIO Configuration
PA3 ------> ADC1_IN3
PA4 ------> ADC1_IN4
PB0 ------> ADC1_IN8
PB1 ------> ADC1_IN9
*/
GPIO_InitStruct.Pin = GPIO_PIN_3|CP_ADC_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = ADC_NTC1_Pin|ADC_NTC2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_adc1.Init.Mode = DMA_CIRCULAR;
hdma_adc1.Init.Priority = DMA_PRIORITY_MEDIUM;
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
/* ADC1 interrupt Init */
HAL_NVIC_SetPriority(ADC1_2_IRQn, 7, 0);
HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
}
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
{
if(adcHandle->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspDeInit 0 */
/* USER CODE END ADC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ADC1_CLK_DISABLE();
/**ADC1 GPIO Configuration
PA3 ------> ADC1_IN3
PA4 ------> ADC1_IN4
PB0 ------> ADC1_IN8
PB1 ------> ADC1_IN9
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3|CP_ADC_Pin);
HAL_GPIO_DeInit(GPIOB, ADC_NTC1_Pin|ADC_NTC2_Pin);
/* ADC1 DMA DeInit */
HAL_DMA_DeInit(adcHandle->DMA_Handle);
/* ADC1 interrupt Deinit */
HAL_NVIC_DisableIRQ(ADC1_2_IRQn);
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
Core/Src/can.c
+2 -2
View File
@@ -127,7 +127,7 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
__HAL_AFIO_REMAP_CAN1_3();
/* CAN1 interrupt Init */
HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 0, 0);
HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 3, 0);
HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn);
/* USER CODE BEGIN CAN1_MspInit 1 */
@@ -165,7 +165,7 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
/* CAN2 interrupt Init */
HAL_NVIC_SetPriority(CAN2_TX_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(CAN2_TX_IRQn);
HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 0, 0);
HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 3, 0);
HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn);
/* USER CODE BEGIN CAN2_MspInit 1 */
Core/Src/cp.c
+3
View File
@@ -129,6 +129,9 @@ void CP_FilterState(void) {
}
void CP_Loop(void) {
static uint32_t tick;
if ((int32_t)(HAL_GetTick() - tick) < 1) return;
tick = HAL_GetTick();
static uint8_t initialized = 0;
static CP_State_t prev_state = EV_STATE_ACQUIRING;
static uint8_t prev_duty = 0;
Core/Src/dma.c
+13 -1
View File
@@ -44,8 +44,20 @@ void MX_DMA_Init(void)
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
/* DMA1_Channel2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 4, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
/* DMA1_Channel3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
/* DMA1_Channel6_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn);
/* DMA1_Channel7_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 4, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
}
Core/Src/serial.c
+69 -31
View File
@@ -8,6 +8,7 @@
#include <string.h>
#include "charger_config.h"
#include "psu_control.h"
#include "serial_control.h"
extern UART_HandleTypeDef huart3;
extern uint8_t config_initialized;
@@ -39,6 +40,9 @@ uint8_t ev_enable_output = 0;
static uint8_t rx_buffer[MAX_RX_BUFFER_SIZE];
static uint8_t tx_buffer[MAX_TX_BUFFER_SIZE];
static uint8_t tx_pending_buffer[MAX_TX_BUFFER_SIZE];
static uint16_t tx_pending_len = 0;
static uint8_t uart3_tx_busy = 0;
uint8_t ESTOP = 0;
uint8_t REPLUG = 0;
@@ -61,6 +65,7 @@ CCS_ConnectorState_t CCS_ConnectorState = CCS_UNKNOWN;
ISR_FAST static uint8_t process_received_packet(const uint8_t* packet, uint16_t packet_len);
static void CCS_UART3_Watchdog(void);
static void CCS_LogUart3Error(const char *tag);
ISR_FAST static void uart3_log_hal_error(uint8_t uart_num, uint32_t err) {
if (err == HAL_UART_ERROR_NONE) {
@@ -83,7 +88,7 @@ ISR_FAST static void uart3_log_hal_error(uint8_t uart_num, uint32_t err) {
}
ISR_FAST static void uart3_arm_rx_or_log(const char *where) {
HAL_StatusTypeDef st = HAL_UARTEx_ReceiveToIdle_IT(&huart3, rx_buffer, sizeof(rx_buffer));
HAL_StatusTypeDef st = HAL_UARTEx_ReceiveToIdle_DMA(&huart3, rx_buffer, sizeof(rx_buffer));
if (st == HAL_OK) {
return;
}
@@ -92,8 +97,9 @@ ISR_FAST static void uart3_arm_rx_or_log(const char *where) {
"UART3 RX arm failed (%s): HAL_Status=%d err_after=0x%08lx\n",
where, (int)st, (unsigned long)err_after);
uart3_log_hal_error(3u, err_after);
CCS_LogUart3Error("UART3 RX arm failed details");
if (err_after != HAL_UART_ERROR_NONE) {
(void)HAL_UART_Abort_IT(&huart3);
(void)HAL_UART_AbortReceive(&huart3);
}
}
@@ -130,15 +136,37 @@ ISR_FAST void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) {
"UART%u HAL error (ISR): raw=0x%08lx — RX may be corrupted until re-arm\n",
uart_num, (unsigned long)error);
uart3_log_hal_error(uart_num, error);
(void)HAL_UART_Abort_IT(huart);
(void)HAL_UART_AbortReceive(huart);
(void)HAL_UART_AbortTransmit(huart);
if (huart == &huart3) {
uart3_tx_busy = 0;
uart3_arm_rx_or_log("ErrorCallback");
} else {
SC_RecoverUartDma(huart);
}
}
void CCS_TxCpltCallback(UART_HandleTypeDef *huart) {
if (huart != &huart3) {
return;
}
uart3_tx_busy = 0;
if (tx_pending_len > 0) {
memcpy(tx_buffer, tx_pending_buffer, tx_pending_len);
uart3_tx_busy = 1;
if (HAL_UART_Transmit_DMA(&huart3, tx_buffer, tx_pending_len) != HAL_OK) {
uart3_tx_busy = 0;
CCS_LogUart3Error("UART3 TX DMA resend failed");
}
tx_pending_len = 0;
}
}
void CCS_SerialLoop(void) {
static uint32_t tick;
if ((int32_t)(HAL_GetTick() - tick) < 1) return;
tick = HAL_GetTick();
static uint32_t replug_tick = 0;
static uint32_t replug_watchdog_tick = 0;
static uint32_t replug_watchdog1_tick = 0;
@@ -146,10 +174,6 @@ void CCS_SerialLoop(void) {
static uint32_t force_unlock_tick = 0;
static uint32_t stop_tick = 0;
if ((&huart3)->RxState == HAL_UART_STATE_READY) {
uart3_arm_rx_or_log("SerialLoop");
}
CCS_UART3_Watchdog();
if (CONN.connControl != CMD_NONE) {
@@ -159,7 +183,7 @@ void CCS_SerialLoop(void) {
if (CONN.connControl == CMD_FORCE_UNLOCK) {
if (force_unlock_tick == 0) {
force_unlock_tick = HAL_GetTick();
} else if ((HAL_GetTick() - force_unlock_tick) >= 10000) {
} else if ((int32_t)(HAL_GetTick() - force_unlock_tick) >= 10000) {
CONN.connControl = CMD_NONE;
force_unlock_tick = 0;
}
@@ -170,7 +194,7 @@ void CCS_SerialLoop(void) {
if (CONN.connControl == CMD_STOP) {
if (stop_tick == 0) {
stop_tick = HAL_GetTick();
} else if ((HAL_GetTick() - stop_tick) >= 1000) {
} else if ((int32_t)(HAL_GetTick() - stop_tick) >= 1000) {
CONN.connControl = CMD_NONE;
stop_tick = 0;
}
@@ -178,8 +202,8 @@ void CCS_SerialLoop(void) {
stop_tick = 0;
}
if((HAL_GetTick() - last_cmd_sent) > CMD_INTERVAL){
if ((HAL_GetTick() - last_state_sent) >= 200) {
if((int32_t)(HAL_GetTick() - last_cmd_sent) > (int32_t)CMD_INTERVAL){
if ((int32_t)(HAL_GetTick() - last_state_sent) >= 200) {
send_state();
last_state_sent = HAL_GetTick();
}
@@ -193,7 +217,7 @@ void CCS_SerialLoop(void) {
if (((CONN.connControl == CMD_STOP) ||
(CONN.connControl == CMD_FORCE_UNLOCK) ||
(CONN.chargingError != CONN_NO_ERROR)) &&
((HAL_GetTick() - last_stop_sent) > 1000)) {
((int32_t)(HAL_GetTick() - last_stop_sent) > 1000)) {
last_stop_sent = HAL_GetTick();
log_printf(LOG_WARN, "Stopping charging...\n");
if (CONN.connControl == CMD_FORCE_UNLOCK) {
@@ -203,7 +227,7 @@ void CCS_SerialLoop(void) {
}
if (((CCS_EvseState == FinishedEV) || (CCS_EvseState == FinishedEVSE)) &&
((HAL_GetTick() - last_stop_sent) > 1000)) {
((int32_t)(HAL_GetTick() - last_stop_sent) > 1000)) {
last_stop_sent = HAL_GetTick();
log_printf(LOG_WARN, "FinishedEV, stopping...\n");
CCS_SendEmergencyStop();
@@ -213,9 +237,8 @@ void CCS_SerialLoop(void) {
(void)replug_watchdog_tick;
(void)replug_watchdog1_tick;
uint32_t now = HAL_GetTick();
uint8_t host_timeout_warn = (last_host_seen > 0 && (now - last_host_seen) > EVEREST_TIMEOUT_WARN_MS);
uint8_t host_timeout_stop = (last_host_seen > 0 && (now - last_host_seen) > EVEREST_TIMEOUT_STOP_MS);
uint8_t host_timeout_warn = (last_host_seen > 0u) && ((int32_t)(HAL_GetTick() - last_host_seen) > (int32_t)EVEREST_TIMEOUT_WARN_MS);
uint8_t host_timeout_stop = (last_host_seen > 0u) && ((int32_t)(HAL_GetTick() - last_host_seen) > (int32_t)EVEREST_TIMEOUT_STOP_MS);
uint8_t host_timed_out = host_timeout_stop;
if (host_timeout_warn && !everest_timeout_warn_latched) {
@@ -292,7 +315,7 @@ void CCS_SerialLoop(void) {
case CCS_REPLUGGING:
RELAY_Write(RELAY_CP, 0);
CONN_SetState(Replugging);
if((HAL_GetTick() - replug_tick) > 1000){
if((int32_t)(HAL_GetTick() - replug_tick) > 1000){
replug_tick = HAL_GetTick();
if(REPLUG > 0){
if (REPLUG != 0xFF) REPLUG--;
@@ -349,6 +372,7 @@ void CCS_Init(void){
CCS_MaxLoad.maxPower = PSU_MAX_POWER; //30000W
uart3_last_packet_tick = HAL_GetTick();
uart3_last_reinit_tick = uart3_last_packet_tick;
uart3_arm_rx_or_log("Init");
CCS_SendResetReason();
log_printf(LOG_INFO, "CCS init\n");
}
@@ -387,7 +411,16 @@ static uint16_t CCS_BuildPacket(uint8_t cmd, const void* payload, uint16_t paylo
static void CCS_SendPacket(uint8_t cmd, const void* payload, uint16_t payload_len) {
uint16_t len = CCS_BuildPacket(cmd, payload, payload_len, tx_buffer, sizeof(tx_buffer));
if (len > 0) {
HAL_UART_Transmit_IT(&huart3, tx_buffer, len);
if (uart3_tx_busy) {
memcpy(tx_pending_buffer, tx_buffer, len);
tx_pending_len = len;
} else {
uart3_tx_busy = 1;
if (HAL_UART_Transmit_DMA(&huart3, tx_buffer, len) != HAL_OK) {
uart3_tx_busy = 0;
CCS_LogUart3Error("UART3 TX DMA start failed");
}
}
}
last_cmd_sent = HAL_GetTick();
}
@@ -601,19 +634,24 @@ ISR_FAST static uint8_t process_received_packet(const uint8_t* packet, uint16_t
}
static void CCS_UART3_Watchdog(void) {
const uint32_t now = HAL_GetTick();
const uint32_t since_last_packet = now - uart3_last_packet_tick;
const int32_t since_last_packet = (int32_t)(HAL_GetTick() - uart3_last_packet_tick);
const int32_t since_last_reinit = (int32_t)(HAL_GetTick() - uart3_last_reinit_tick);
if ((since_last_packet >= UART3_REINIT_TIMEOUT_MS) &&
((now - uart3_last_reinit_tick) >= UART3_REINIT_TIMEOUT_MS)) {
(void)HAL_UART_Abort_IT(&huart3);
(void)HAL_UART_DeInit(&huart3);
(void)HAL_UART_Init(&huart3);
(void)HAL_UARTEx_ReceiveToIdle_IT(&huart3, rx_buffer, sizeof(rx_buffer));
log_printf(LOG_ERR,
"UART3 RX recover: stalled (no RxEvent data for %ums), hard reinit\n",
(unsigned)UART3_REINIT_TIMEOUT_MS);
uart3_last_reinit_tick = now;
if ((since_last_packet >= (int32_t)UART3_REINIT_TIMEOUT_MS) &&
(since_last_reinit >= (int32_t)UART3_REINIT_TIMEOUT_MS) &&
(huart3.RxState == HAL_UART_STATE_READY)) {
uart3_arm_rx_or_log("Watchdog");
CCS_LogUart3Error("UART3 watchdog rearm");
uart3_last_reinit_tick = HAL_GetTick();
}
}
static void CCS_LogUart3Error(const char *tag) {
log_printf(LOG_ERR, "%s: err=0x%08lx g=%lu rx=%lu tx_busy=%u\n",
tag,
(unsigned long)HAL_UART_GetError(&huart3),
(unsigned long)huart3.gState,
(unsigned long)huart3.RxState,
(unsigned)uart3_tx_busy);
}
Core/Src/serial_control.c
+89 -67
View File
@@ -11,6 +11,9 @@ ISR_FAST static uint16_t encode_packet(const uint8_t* payload, uint16_t payload_
ISR_FAST static uint8_t parse_packet(const uint8_t* packet_data, uint16_t packet_len, ReceivedCommand_t* out_cmd);
ISR_FAST static uint8_t process_received_packet(SerialControl_t *ctx, const uint8_t* packet_data, uint16_t packet_len);
static void SC_UART2_Watchdog(void);
static void SC_ArmUart2RxDma(void);
static void SC_ArmUart5RxDma(void);
static void SC_LogUartError(const char *tag, UART_HandleTypeDef *huart);
uint8_t test_crc_invalid = 0;
@@ -20,11 +23,9 @@ static SerialControl_t serial_iso;
volatile SC_Source_t g_sc_command_source = SC_SOURCE_UART2;
static volatile uint8_t sc_uart2_timed_out = 0;
static uint32_t sc_uart2_last_packet_tick = 0;
static uint32_t sc_uart2_last_reinit_tick = 0;
/** Событие приёма по UART2 при активной передаче (см. HAL_UARTEx_RxEventCallback / SC_UART2_Watchdog). */
static volatile uint8_t sc_uart2_rx_during_tx = 0;
static uint32_t sc_uart2_last_recover_tick = 0;
#define SC_UART2_REINIT_TIMEOUT_MS 500u
#define SC_UART2_RECOVER_GUARD_MS 200u
#define SC_UART2_PACKET_TIMEOUT_MS 5000u
StatusPacket_t statusPacket = {
@@ -85,34 +86,26 @@ void SC_Init() {
memset(&serial_iso, 0, sizeof(serial_iso));
sc_uart2_timed_out = 0;
sc_uart2_last_packet_tick = HAL_GetTick();
sc_uart2_last_reinit_tick = sc_uart2_last_packet_tick;
sc_uart2_rx_during_tx = 0;
sc_uart2_last_recover_tick = sc_uart2_last_packet_tick;
SC_ArmUart2RxDma();
SC_ArmUart5RxDma();
}
void SC_Task() {
static uint32_t tick;
if ((int32_t)(HAL_GetTick() - tick) < 1) return;
tick = HAL_GetTick();
SC_UART2_Watchdog();
// Запуск приема в режиме прерывания с ожиданием idle
if ((huart2.RxState == HAL_UART_STATE_READY) && (serial_control.command_ready == 0)) {
if ((HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1) != HAL_OK) &&
(HAL_UART_GetError(&huart2) != HAL_UART_ERROR_NONE)) {
(void)HAL_UART_Abort_IT(&huart2);
}
}
if (huart5.RxState == HAL_UART_STATE_READY) {
if ((HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1) != HAL_OK) &&
(HAL_UART_GetError(&huart5) != HAL_UART_ERROR_NONE)) {
(void)HAL_UART_Abort_IT(&huart5);
}
}
// Запуск приема в режиме DMA + idle
SC_ArmUart2RxDma();
SC_ArmUart5RxDma();
// Проверка таймаута отправки пакета (больше 100 мс)
if (huart2.gState == HAL_UART_STATE_BUSY_TX && serial_control.tx_tick != 0) {
if ((HAL_GetTick() - serial_control.tx_tick) > 100) {
if ((int32_t)(HAL_GetTick() - serial_control.tx_tick) > 100) {
// Таймаут: принудительно сбрасываем передачу
HAL_UART_Abort_IT(&huart2);
// Выключаем DIR при сбросе передачи
HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET);
(void)HAL_UART_AbortTransmit(&huart2);
serial_control.tx_tick = 0; // Сбрасываем tick
}
}
@@ -120,34 +113,37 @@ void SC_Task() {
// Проверка наличия принятой команды для обработки
if (serial_control.command_ready && (huart2.gState != HAL_UART_STATE_BUSY_TX)) {
// HAL_Delay(2);
SC_CommandHandler(&serial_control.received_command);
if ((HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1) != HAL_OK) &&
(HAL_UART_GetError(&huart2) != HAL_UART_ERROR_NONE)) {
(void)HAL_UART_Abort_IT(&huart2);
}
SC_CommandHandler((ReceivedCommand_t*)&serial_control.received_command);
serial_control.command_ready = 0; // Сбрасываем флаг
SC_ArmUart2RxDma();
}
}
ISR_FAST void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) {
if (huart->Instance == huart2.Instance) {
if (huart2.gState == HAL_UART_STATE_BUSY_TX) {
sc_uart2_rx_during_tx = 1u;
if (Size == 0u) {
log_printf(LOG_WARN, "UART2 RX idle event with zero size\n");
}
sc_uart2_last_packet_tick = HAL_GetTick();
sc_uart2_last_reinit_tick = sc_uart2_last_packet_tick;
sc_uart2_last_recover_tick = sc_uart2_last_packet_tick;
sc_uart2_timed_out = 0;
if(!process_received_packet(&serial_control, serial_control.rx_buffer, Size)){
log_printf(LOG_WARN, "UART2 RX invalid packet len=%u\n", (unsigned)Size);
SC_SendPacket(NULL, 0, RESP_INVALID);
}
g_sc_command_source = SC_SOURCE_UART2;
HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1);
SC_ArmUart2RxDma();
} else if (huart->Instance == huart5.Instance) {
if (Size == 0u) {
log_printf(LOG_WARN, "UART5 RX idle event with zero size\n");
}
if (process_received_packet(&serial_iso, serial_iso.rx_buffer, Size)) {
g_sc_command_source = SC_SOURCE_UART5;
SC_CommandHandler((ReceivedCommand_t*)&serial_iso.received_command);
} else {
log_printf(LOG_WARN, "UART5 RX invalid packet len=%u\n", (unsigned)Size);
}
HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1);
SC_ArmUart5RxDma();
} else if (huart->Instance == huart3.Instance) {
CCS_RxEventCallback(huart, Size);
}
@@ -155,8 +151,9 @@ ISR_FAST void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Siz
ISR_FAST void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
if (huart->Instance == huart2.Instance) {
HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET);
serial_control.tx_tick = 0;
} else if (huart->Instance == huart3.Instance) {
CCS_TxCpltCallback(huart);
}
}
@@ -217,16 +214,14 @@ ISR_FAST void SC_SendPacket(const uint8_t* payload, uint16_t payload_len, uint8_
uint16_t packet_len = encode_packet(payload, payload_len, serial_control.tx_buffer, response_code);
if (packet_len > 0) {
if (huart2.gState == HAL_UART_STATE_BUSY_TX) {
HAL_UART_Abort_IT(&huart2);
HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET);
if (huart2.gState != HAL_UART_STATE_READY) {
(void)HAL_UART_AbortTransmit(&huart2);
log_printf(LOG_WARN, "UART2 TX busy, abort transmit before resend\n");
}
if (HAL_UART_Transmit_DMA(&huart2, serial_control.tx_buffer, packet_len) != HAL_OK) {
SC_LogUartError("UART2 TX DMA start failed", &huart2);
return;
}
HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_SET);
sc_uart2_rx_during_tx = 0u;
HAL_UART_Transmit_IT(&huart2, serial_control.tx_buffer, packet_len);
serial_control.tx_tick = HAL_GetTick();
}
@@ -276,39 +271,66 @@ ISR_FAST static uint8_t process_received_packet(SerialControl_t *ctx, const uint
static void SC_UART2_Watchdog(void) {
const uint32_t now = HAL_GetTick();
const uint32_t since_last_packet = now - sc_uart2_last_packet_tick;
const int32_t since_last_packet = (int32_t)(now - sc_uart2_last_packet_tick);
if ((huart2.gState == HAL_UART_STATE_BUSY_TX) && (sc_uart2_rx_during_tx != 0u)) {
HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET);
(void)HAL_UART_Abort_IT(&huart2);
(void)HAL_UART_DeInit(&huart2);
(void)HAL_UART_Init(&huart2);
(void)HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1);
serial_control.tx_tick = 0;
sc_uart2_rx_during_tx = 0u;
sc_uart2_last_reinit_tick = now;
log_printf(LOG_ERR, "USART2 BUSY_TX: hard reinit\n");
return;
}
if (since_last_packet >= SC_UART2_PACKET_TIMEOUT_MS) {
if (since_last_packet >= (int32_t)SC_UART2_PACKET_TIMEOUT_MS) {
if (sc_uart2_timed_out == 0u) {
serial_control.command_ready = 0;
log_printf(LOG_WARN, "UART2 RX packet timeout (%u ms)\n", (unsigned)SC_UART2_PACKET_TIMEOUT_MS);
}
sc_uart2_timed_out = 1;
} else {
sc_uart2_timed_out = 0;
}
if ((since_last_packet >= SC_UART2_REINIT_TIMEOUT_MS) &&
((now - sc_uart2_last_reinit_tick) >= SC_UART2_REINIT_TIMEOUT_MS)) {
HAL_GPIO_WritePin(USART2_DIR_GPIO_Port, USART2_DIR_Pin, GPIO_PIN_RESET);
(void)HAL_UART_Abort_IT(&huart2);
(void)HAL_UART_DeInit(&huart2);
(void)HAL_UART_Init(&huart2);
(void)HAL_UARTEx_ReceiveToIdle_IT(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1);
sc_uart2_last_reinit_tick = now;
log_printf(LOG_ERR, "USART2 stalled: hard reinit\n");
if ((huart2.RxState == HAL_UART_STATE_READY) &&
((int32_t)(now - sc_uart2_last_recover_tick) >= (int32_t)SC_UART2_RECOVER_GUARD_MS)) {
SC_ArmUart2RxDma();
sc_uart2_last_recover_tick = now;
}
}
static void SC_ArmUart2RxDma(void) {
if ((huart2.RxState == HAL_UART_STATE_READY) && (serial_control.command_ready == 0)) {
if (HAL_UARTEx_ReceiveToIdle_DMA(&huart2, serial_control.rx_buffer, MAX_RX_BUFFER_SIZE - 1) != HAL_OK) {
SC_LogUartError("UART2 RX DMA arm failed", &huart2);
}
}
}
static void SC_ArmUart5RxDma(void) {
if (huart5.RxState == HAL_UART_STATE_READY) {
if (HAL_UARTEx_ReceiveToIdle_IT(&huart5, serial_iso.rx_buffer, MAX_RX_BUFFER_SIZE - 1) == HAL_OK) {
return;
}
SC_LogUartError("UART5 RX IT arm failed", &huart5);
}
}
void SC_RecoverUartDma(UART_HandleTypeDef *huart) {
if (huart == &huart2) {
SC_LogUartError("UART2 recover start", &huart2);
(void)HAL_UART_AbortReceive(&huart2);
(void)HAL_UART_AbortTransmit(&huart2);
serial_control.tx_tick = 0;
SC_ArmUart2RxDma();
sc_uart2_last_recover_tick = HAL_GetTick();
} else if (huart == &huart5) {
SC_LogUartError("UART5 recover start", &huart5);
(void)HAL_UART_AbortReceive(&huart5);
SC_ArmUart5RxDma();
}
}
static void SC_LogUartError(const char *tag, UART_HandleTypeDef *huart) {
if (tag == NULL || huart == NULL) {
return;
}
log_printf(LOG_ERR, "%s: instance=0x%08lx err=0x%08lx g=%lu rx=%lu\n",
tag,
(unsigned long)huart->Instance,
(unsigned long)HAL_UART_GetError(huart),
(unsigned long)huart->gState,
(unsigned long)huart->RxState);
}
Core/Src/stm32f1xx_it.c
+414 -354
View File
@@ -1,354 +1,414 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f1xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f1xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#if defined(__GNUC__)
#pragma GCC optimize("Ofast")
#endif
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_adc1;
extern ADC_HandleTypeDef hadc1;
extern CAN_HandleTypeDef hcan1;
extern CAN_HandleTypeDef hcan2;
extern TIM_HandleTypeDef htim3;
extern UART_HandleTypeDef huart5;
extern UART_HandleTypeDef huart1;
extern UART_HandleTypeDef huart2;
extern UART_HandleTypeDef huart3;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M3 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32F1xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_SET);
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET);
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
/**
* @brief This function handles ADC1 and ADC2 global interrupts.
*/
void ADC1_2_IRQHandler(void)
{
/* USER CODE BEGIN ADC1_2_IRQn 0 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_SET);
/* USER CODE END ADC1_2_IRQn 0 */
HAL_ADC_IRQHandler(&hadc1);
/* USER CODE BEGIN ADC1_2_IRQn 1 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET);
/* USER CODE END ADC1_2_IRQn 1 */
}
/**
* @brief This function handles CAN1 RX0 interrupt.
*/
void CAN1_RX0_IRQHandler(void)
{
/* USER CODE BEGIN CAN1_RX0_IRQn 0 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_SET);
/* USER CODE END CAN1_RX0_IRQn 0 */
HAL_CAN_IRQHandler(&hcan1);
/* USER CODE BEGIN CAN1_RX0_IRQn 1 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET);
/* USER CODE END CAN1_RX0_IRQn 1 */
}
/**
* @brief This function handles TIM3 global interrupt.
*/
void TIM3_IRQHandler(void)
{
/* USER CODE BEGIN TIM3_IRQn 0 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_SET);
/* USER CODE END TIM3_IRQn 0 */
HAL_TIM_IRQHandler(&htim3);
/* USER CODE BEGIN TIM3_IRQn 1 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET);
/* USER CODE END TIM3_IRQn 1 */
}
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
* @brief This function handles USART2 global interrupt.
*/
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
HAL_GPIO_WritePin(DBG2_GPIO_Port, DBG2_Pin, GPIO_PIN_SET);
/* USER CODE END USART2_IRQn 0 */
HAL_UART_IRQHandler(&huart2);
/* USER CODE BEGIN USART2_IRQn 1 */
HAL_GPIO_WritePin(DBG2_GPIO_Port, DBG2_Pin, GPIO_PIN_RESET);
/* USER CODE END USART2_IRQn 1 */
}
/**
* @brief This function handles USART3 global interrupt.
*/
void USART3_IRQHandler(void)
{
/* USER CODE BEGIN USART3_IRQn 0 */
HAL_GPIO_WritePin(DBG3_GPIO_Port, DBG3_Pin, GPIO_PIN_SET);
/* USER CODE END USART3_IRQn 0 */
HAL_UART_IRQHandler(&huart3);
/* USER CODE BEGIN USART3_IRQn 1 */
HAL_GPIO_WritePin(DBG3_GPIO_Port, DBG3_Pin, GPIO_PIN_RESET);
/* USER CODE END USART3_IRQn 1 */
}
/**
* @brief This function handles UART5 global interrupt.
*/
void UART5_IRQHandler(void)
{
/* USER CODE BEGIN UART5_IRQn 0 */
HAL_GPIO_WritePin(DBG1_GPIO_Port, DBG1_Pin, GPIO_PIN_SET);
/* USER CODE END UART5_IRQn 0 */
HAL_UART_IRQHandler(&huart5);
/* USER CODE BEGIN UART5_IRQn 1 */
HAL_GPIO_WritePin(DBG1_GPIO_Port, DBG1_Pin, GPIO_PIN_RESET);
/* USER CODE END UART5_IRQn 1 */
}
/**
* @brief This function handles CAN2 TX interrupt.
*/
void CAN2_TX_IRQHandler(void)
{
/* USER CODE BEGIN CAN2_TX_IRQn 0 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_SET);
/* USER CODE END CAN2_TX_IRQn 0 */
HAL_CAN_IRQHandler(&hcan2);
/* USER CODE BEGIN CAN2_TX_IRQn 1 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET);
/* USER CODE END CAN2_TX_IRQn 1 */
}
/**
* @brief This function handles CAN2 RX1 interrupt.
*/
void CAN2_RX1_IRQHandler(void)
{
/* USER CODE BEGIN CAN2_RX1_IRQn 0 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_SET);
/* USER CODE END CAN2_RX1_IRQn 0 */
HAL_CAN_IRQHandler(&hcan2);
/* USER CODE BEGIN CAN2_RX1_IRQn 1 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET);
/* USER CODE END CAN2_RX1_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f1xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f1xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#if defined(__GNUC__)
#pragma GCC optimize("Ofast")
#endif
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_adc1;
extern ADC_HandleTypeDef hadc1;
extern CAN_HandleTypeDef hcan1;
extern CAN_HandleTypeDef hcan2;
extern TIM_HandleTypeDef htim3;
extern DMA_HandleTypeDef hdma_usart2_rx;
extern DMA_HandleTypeDef hdma_usart2_tx;
extern DMA_HandleTypeDef hdma_usart3_rx;
extern DMA_HandleTypeDef hdma_usart3_tx;
extern UART_HandleTypeDef huart5;
extern UART_HandleTypeDef huart1;
extern UART_HandleTypeDef huart2;
extern UART_HandleTypeDef huart3;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M3 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32F1xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_SET);
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET);
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel2 global interrupt.
*/
void DMA1_Channel2_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
/* USER CODE END DMA1_Channel2_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart3_tx);
/* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
/* USER CODE END DMA1_Channel2_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel3 global interrupt.
*/
void DMA1_Channel3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel3_IRQn 0 */
/* USER CODE END DMA1_Channel3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart3_rx);
/* USER CODE BEGIN DMA1_Channel3_IRQn 1 */
/* USER CODE END DMA1_Channel3_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel6 global interrupt.
*/
void DMA1_Channel6_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel6_IRQn 0 */
/* USER CODE END DMA1_Channel6_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart2_rx);
/* USER CODE BEGIN DMA1_Channel6_IRQn 1 */
/* USER CODE END DMA1_Channel6_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel7 global interrupt.
*/
void DMA1_Channel7_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel7_IRQn 0 */
/* USER CODE END DMA1_Channel7_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart2_tx);
/* USER CODE BEGIN DMA1_Channel7_IRQn 1 */
/* USER CODE END DMA1_Channel7_IRQn 1 */
}
/**
* @brief This function handles ADC1 and ADC2 global interrupts.
*/
void ADC1_2_IRQHandler(void)
{
/* USER CODE BEGIN ADC1_2_IRQn 0 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_SET);
/* USER CODE END ADC1_2_IRQn 0 */
HAL_ADC_IRQHandler(&hadc1);
/* USER CODE BEGIN ADC1_2_IRQn 1 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET);
/* USER CODE END ADC1_2_IRQn 1 */
}
/**
* @brief This function handles CAN1 RX0 interrupt.
*/
void CAN1_RX0_IRQHandler(void)
{
/* USER CODE BEGIN CAN1_RX0_IRQn 0 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_SET);
/* USER CODE END CAN1_RX0_IRQn 0 */
HAL_CAN_IRQHandler(&hcan1);
/* USER CODE BEGIN CAN1_RX0_IRQn 1 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET);
/* USER CODE END CAN1_RX0_IRQn 1 */
}
/**
* @brief This function handles TIM3 global interrupt.
*/
void TIM3_IRQHandler(void)
{
/* USER CODE BEGIN TIM3_IRQn 0 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_SET);
/* USER CODE END TIM3_IRQn 0 */
HAL_TIM_IRQHandler(&htim3);
/* USER CODE BEGIN TIM3_IRQn 1 */
HAL_GPIO_WritePin(DBG4_GPIO_Port, DBG4_Pin, GPIO_PIN_RESET);
/* USER CODE END TIM3_IRQn 1 */
}
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
* @brief This function handles USART2 global interrupt.
*/
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
HAL_GPIO_WritePin(DBG2_GPIO_Port, DBG2_Pin, GPIO_PIN_SET);
/* USER CODE END USART2_IRQn 0 */
HAL_UART_IRQHandler(&huart2);
/* USER CODE BEGIN USART2_IRQn 1 */
HAL_GPIO_WritePin(DBG2_GPIO_Port, DBG2_Pin, GPIO_PIN_RESET);
/* USER CODE END USART2_IRQn 1 */
}
/**
* @brief This function handles USART3 global interrupt.
*/
void USART3_IRQHandler(void)
{
/* USER CODE BEGIN USART3_IRQn 0 */
HAL_GPIO_WritePin(DBG3_GPIO_Port, DBG3_Pin, GPIO_PIN_SET);
/* USER CODE END USART3_IRQn 0 */
HAL_UART_IRQHandler(&huart3);
/* USER CODE BEGIN USART3_IRQn 1 */
HAL_GPIO_WritePin(DBG3_GPIO_Port, DBG3_Pin, GPIO_PIN_RESET);
/* USER CODE END USART3_IRQn 1 */
}
/**
* @brief This function handles UART5 global interrupt.
*/
void UART5_IRQHandler(void)
{
/* USER CODE BEGIN UART5_IRQn 0 */
HAL_GPIO_WritePin(DBG1_GPIO_Port, DBG1_Pin, GPIO_PIN_SET);
/* USER CODE END UART5_IRQn 0 */
HAL_UART_IRQHandler(&huart5);
/* USER CODE BEGIN UART5_IRQn 1 */
HAL_GPIO_WritePin(DBG1_GPIO_Port, DBG1_Pin, GPIO_PIN_RESET);
/* USER CODE END UART5_IRQn 1 */
}
/**
* @brief This function handles CAN2 TX interrupt.
*/
void CAN2_TX_IRQHandler(void)
{
/* USER CODE BEGIN CAN2_TX_IRQn 0 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_SET);
/* USER CODE END CAN2_TX_IRQn 0 */
HAL_CAN_IRQHandler(&hcan2);
/* USER CODE BEGIN CAN2_TX_IRQn 1 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET);
/* USER CODE END CAN2_TX_IRQn 1 */
}
/**
* @brief This function handles CAN2 RX1 interrupt.
*/
void CAN2_RX1_IRQHandler(void)
{
/* USER CODE BEGIN CAN2_RX1_IRQn 0 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_SET);
/* USER CODE END CAN2_RX1_IRQn 0 */
HAL_CAN_IRQHandler(&hcan2);
/* USER CODE BEGIN CAN2_RX1_IRQn 1 */
HAL_GPIO_WritePin(DBG5_GPIO_Port, DBG5_Pin, GPIO_PIN_RESET);
/* USER CODE END CAN2_RX1_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
Core/Src/tim.c
+1 -1
View File
@@ -166,7 +166,7 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
__HAL_RCC_TIM3_CLK_ENABLE();
/* TIM3 interrupt Init */
HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
HAL_NVIC_SetPriority(TIM3_IRQn, 6, 0);
HAL_NVIC_EnableIRQ(TIM3_IRQn);
/* USER CODE BEGIN TIM3_MspInit 1 */
Core/Src/usart.c
+82 -4
View File
@@ -28,6 +28,10 @@ UART_HandleTypeDef huart5;
UART_HandleTypeDef huart1;
UART_HandleTypeDef huart2;
UART_HandleTypeDef huart3;
DMA_HandleTypeDef hdma_usart2_rx;
DMA_HandleTypeDef hdma_usart2_tx;
DMA_HandleTypeDef hdma_usart3_rx;
DMA_HandleTypeDef hdma_usart3_tx;
/* UART5 init function */
void MX_UART5_Init(void)
@@ -174,7 +178,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* UART5 interrupt Init */
HAL_NVIC_SetPriority(UART5_IRQn, 0, 0);
HAL_NVIC_SetPriority(UART5_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(UART5_IRQn);
/* USER CODE BEGIN UART5_MspInit 1 */
@@ -204,7 +208,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */
@@ -235,8 +239,41 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
__HAL_AFIO_REMAP_USART2_ENABLE();
/* USART2 DMA Init */
/* USART2_RX Init */
hdma_usart2_rx.Instance = DMA1_Channel6;
hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart2_rx.Init.Mode = DMA_NORMAL;
hdma_usart2_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx);
/* USART2_TX Init */
hdma_usart2_tx.Instance = DMA1_Channel7;
hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart2_tx.Init.Mode = DMA_NORMAL;
hdma_usart2_tx.Init.Priority = DMA_PRIORITY_HIGH;
if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx);
/* USART2 interrupt Init */
HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
HAL_NVIC_SetPriority(USART2_IRQn, 2, 0);
HAL_NVIC_EnableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspInit 1 */
@@ -267,8 +304,41 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
__HAL_AFIO_REMAP_USART3_PARTIAL();
/* USART3 DMA Init */
/* USART3_RX Init */
hdma_usart3_rx.Instance = DMA1_Channel3;
hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart3_rx.Init.Mode = DMA_NORMAL;
hdma_usart3_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart3_rx);
/* USART3_TX Init */
hdma_usart3_tx.Instance = DMA1_Channel2;
hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart3_tx.Init.Mode = DMA_NORMAL;
hdma_usart3_tx.Init.Priority = DMA_PRIORITY_HIGH;
if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart3_tx);
/* USART3 interrupt Init */
HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
HAL_NVIC_SetPriority(USART3_IRQn, 2, 0);
HAL_NVIC_EnableIRQ(USART3_IRQn);
/* USER CODE BEGIN USART3_MspInit 1 */
@@ -335,6 +405,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
*/
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6);
/* USART2 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx);
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USART2 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspDeInit 1 */
@@ -355,6 +429,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11);
/* USART3 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx);
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USART3 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART3_IRQn);
/* USER CODE BEGIN USART3_MspDeInit 1 */
Debug/CCSModuleSW30Web.bin
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Debug/CCSModuleSW30Web.list
+23208 -22345
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Debug/CCSModuleSW30Web.srec
+3639 -3529
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Debug/Core/Src/cp.cyclo
+1 -1
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@@ -6,4 +6,4 @@
../Core/Src/cp.c:75:12:CP_GetState 12
../Core/Src/cp.c:99:12:CP_GetFilteredState 1
../Core/Src/cp.c:103:6:CP_FilterState 5
../Core/Src/cp.c:131:6:CP_Loop 4
../Core/Src/cp.c:131:6:CP_Loop 5
Debug/Core/Src/serial.cyclo
+20 -18
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@@ -1,18 +1,20 @@
../Core/Src/serial.c:65:22:uart3_log_hal_error 3
../Core/Src/serial.c:85:22:uart3_arm_rx_or_log 3
../Core/Src/serial.c:100:15:CCS_RxEventCallback 4
../Core/Src/serial.c:123:15:HAL_UART_ErrorCallback 5
../Core/Src/serial.c:141:6:CCS_SerialLoop 62
../Core/Src/serial.c:342:6:CCS_Init 1
../Core/Src/serial.c:356:26:crc16_ibm 3
../Core/Src/serial.c:371:17:CCS_BuildPacket 4
../Core/Src/serial.c:387:13:CCS_SendPacket 2
../Core/Src/serial.c:395:13:CCS_SendResetReason 1
../Core/Src/serial.c:399:6:CCS_SendEmergencyStop 1
../Core/Src/serial.c:403:6:CCS_SendStart 1
../Core/Src/serial.c:407:13:CCS_CalculateEnergy 2
../Core/Src/serial.c:422:13:send_state 3
../Core/Src/serial.c:452:26:expected_payload_len 2
../Core/Src/serial.c:468:22:apply_command 15
../Core/Src/serial.c:550:25:process_received_packet 8
../Core/Src/serial.c:603:13:CCS_UART3_Watchdog 3
../Core/Src/serial.c:70:22:uart3_log_hal_error 3
../Core/Src/serial.c:90:22:uart3_arm_rx_or_log 3
../Core/Src/serial.c:106:15:CCS_RxEventCallback 4
../Core/Src/serial.c:129:15:HAL_UART_ErrorCallback 5
../Core/Src/serial.c:149:6:CCS_TxCpltCallback 4
../Core/Src/serial.c:165:6:CCS_SerialLoop 62
../Core/Src/serial.c:365:6:CCS_Init 1
../Core/Src/serial.c:380:26:crc16_ibm 3
../Core/Src/serial.c:395:17:CCS_BuildPacket 4
../Core/Src/serial.c:411:13:CCS_SendPacket 4
../Core/Src/serial.c:428:13:CCS_SendResetReason 1
../Core/Src/serial.c:432:6:CCS_SendEmergencyStop 1
../Core/Src/serial.c:436:6:CCS_SendStart 1
../Core/Src/serial.c:440:13:CCS_CalculateEnergy 2
../Core/Src/serial.c:455:13:send_state 3
../Core/Src/serial.c:485:26:expected_payload_len 2
../Core/Src/serial.c:501:22:apply_command 15
../Core/Src/serial.c:583:25:process_received_packet 8
../Core/Src/serial.c:636:13:CCS_UART3_Watchdog 4
../Core/Src/serial.c:649:13:CCS_LogUart3Error 1
Debug/Core/Src/serial_control.cyclo
+15 -11
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@@ -1,11 +1,15 @@
../Core/Src/serial_control.c:70:6:ReadVersion 1
../Core/Src/serial_control.c:82:6:SC_Init 1
../Core/Src/serial_control.c:92:6:SC_Task 15
../Core/Src/serial_control.c:132:15:HAL_UARTEx_RxEventCallback 7
../Core/Src/serial_control.c:156:15:HAL_UART_TxCpltCallback 2
../Core/Src/serial_control.c:166:26:calculate_crc32 3
../Core/Src/serial_control.c:183:26:encode_packet 5
../Core/Src/serial_control.c:216:15:SC_SendPacket 3
../Core/Src/serial_control.c:235:25:parse_packet 3
../Core/Src/serial_control.c:268:25:process_received_packet 2
../Core/Src/serial_control.c:277:13:SC_UART2_Watchdog 7
../Core/Src/serial_control.c:71:6:ReadVersion 1
../Core/Src/serial_control.c:83:6:SC_Init 1
../Core/Src/serial_control.c:94:6:SC_Task 7
../Core/Src/serial_control.c:122:15:HAL_UARTEx_RxEventCallback 8
../Core/Src/serial_control.c:152:15:HAL_UART_TxCpltCallback 3
../Core/Src/serial_control.c:163:26:calculate_crc32 3
../Core/Src/serial_control.c:180:26:encode_packet 5
../Core/Src/serial_control.c:213:15:SC_SendPacket 4
../Core/Src/serial_control.c:230:25:parse_packet 3
../Core/Src/serial_control.c:263:25:process_received_packet 2
../Core/Src/serial_control.c:272:13:SC_UART2_Watchdog 5
../Core/Src/serial_control.c:293:13:SC_ArmUart2RxDma 4
../Core/Src/serial_control.c:301:13:SC_ArmUart5RxDma 3
../Core/Src/serial_control.c:310:6:SC_RecoverUartDma 3
../Core/Src/serial_control.c:325:13:SC_LogUartError 3
Debug/Core/Src/stm32f1xx_it.cyclo
+23 -19
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@@ -1,19 +1,23 @@
../Core/Src/stm32f1xx_it.c:80:6:NMI_Handler 1
../Core/Src/stm32f1xx_it.c:95:6:HardFault_Handler 1
../Core/Src/stm32f1xx_it.c:110:6:MemManage_Handler 1
../Core/Src/stm32f1xx_it.c:125:6:BusFault_Handler 1
../Core/Src/stm32f1xx_it.c:140:6:UsageFault_Handler 1
../Core/Src/stm32f1xx_it.c:155:6:SVC_Handler 1
../Core/Src/stm32f1xx_it.c:168:6:DebugMon_Handler 1
../Core/Src/stm32f1xx_it.c:181:6:PendSV_Handler 1
../Core/Src/stm32f1xx_it.c:194:6:SysTick_Handler 1
../Core/Src/stm32f1xx_it.c:215:6:DMA1_Channel1_IRQHandler 1
../Core/Src/stm32f1xx_it.c:229:6:ADC1_2_IRQHandler 1
../Core/Src/stm32f1xx_it.c:243:6:CAN1_RX0_IRQHandler 1
../Core/Src/stm32f1xx_it.c:257:6:TIM3_IRQHandler 1
../Core/Src/stm32f1xx_it.c:271:6:USART1_IRQHandler 1
../Core/Src/stm32f1xx_it.c:285:6:USART2_IRQHandler 1
../Core/Src/stm32f1xx_it.c:299:6:USART3_IRQHandler 1
../Core/Src/stm32f1xx_it.c:313:6:UART5_IRQHandler 1
../Core/Src/stm32f1xx_it.c:327:6:CAN2_TX_IRQHandler 1
../Core/Src/stm32f1xx_it.c:341:6:CAN2_RX1_IRQHandler 1
../Core/Src/stm32f1xx_it.c:84:6:NMI_Handler 1
../Core/Src/stm32f1xx_it.c:99:6:HardFault_Handler 1
../Core/Src/stm32f1xx_it.c:114:6:MemManage_Handler 1
../Core/Src/stm32f1xx_it.c:129:6:BusFault_Handler 1
../Core/Src/stm32f1xx_it.c:144:6:UsageFault_Handler 1
../Core/Src/stm32f1xx_it.c:159:6:SVC_Handler 1
../Core/Src/stm32f1xx_it.c:172:6:DebugMon_Handler 1
../Core/Src/stm32f1xx_it.c:185:6:PendSV_Handler 1
../Core/Src/stm32f1xx_it.c:198:6:SysTick_Handler 1
../Core/Src/stm32f1xx_it.c:219:6:DMA1_Channel1_IRQHandler 1
../Core/Src/stm32f1xx_it.c:233:6:DMA1_Channel2_IRQHandler 1
../Core/Src/stm32f1xx_it.c:247:6:DMA1_Channel3_IRQHandler 1
../Core/Src/stm32f1xx_it.c:261:6:DMA1_Channel6_IRQHandler 1
../Core/Src/stm32f1xx_it.c:275:6:DMA1_Channel7_IRQHandler 1
../Core/Src/stm32f1xx_it.c:289:6:ADC1_2_IRQHandler 1
../Core/Src/stm32f1xx_it.c:303:6:CAN1_RX0_IRQHandler 1
../Core/Src/stm32f1xx_it.c:317:6:TIM3_IRQHandler 1
../Core/Src/stm32f1xx_it.c:331:6:USART1_IRQHandler 1
../Core/Src/stm32f1xx_it.c:345:6:USART2_IRQHandler 1
../Core/Src/stm32f1xx_it.c:359:6:USART3_IRQHandler 1
../Core/Src/stm32f1xx_it.c:373:6:UART5_IRQHandler 1
../Core/Src/stm32f1xx_it.c:387:6:CAN2_TX_IRQHandler 1
../Core/Src/stm32f1xx_it.c:401:6:CAN2_RX1_IRQHandler 1
Debug/Core/Src/usart.cyclo
+6 -6
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@@ -1,6 +1,6 @@
../Core/Src/usart.c:33:6:MX_UART5_Init 2
../Core/Src/usart.c:62:6:MX_USART1_UART_Init 2
../Core/Src/usart.c:91:6:MX_USART2_UART_Init 2
../Core/Src/usart.c:120:6:MX_USART3_UART_Init 2
../Core/Src/usart.c:148:6:HAL_UART_MspInit 5
../Core/Src/usart.c:279:6:HAL_UART_MspDeInit 5
../Core/Src/usart.c:37:6:MX_UART5_Init 2
../Core/Src/usart.c:66:6:MX_USART1_UART_Init 2
../Core/Src/usart.c:95:6:MX_USART2_UART_Init 2
../Core/Src/usart.c:124:6:MX_USART3_UART_Init 2
../Core/Src/usart.c:152:6:HAL_UART_MspInit 9
../Core/Src/usart.c:349:6:HAL_UART_MspDeInit 5